Boot log: qemu_arm64-virt-gicv3
- Errors: 0
- Kernel Errors: 0
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 4
1 22:21:06.376602 lava-dispatcher, installed at version: 2023.01
2 22:21:06.376788 start: 0 validate
3 22:21:06.376899 Start time: 2023-06-04 22:21:06.376892+00:00 (UTC)
4 22:21:06.377948 Validating that http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1281-g84d5372e0f314/arm64/defconfig/gcc-10/kernel/Image exists
5 22:21:06.732414 Validating that http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230527.0/arm64/rootfs.cpio.gz exists
6 22:21:06.909470 cmd: ['docker', 'pull', 'kernelci/qemu']
7 22:21:06.909695 Calling: 'nice' 'docker' 'pull' 'kernelci/qemu'
8 22:21:07.072675 >> Using default tag: latest
9 22:21:08.187416 >> latest: Pulling from kernelci/qemu
10 22:21:08.219355 >> Digest: sha256:fc85786d1b429cf64a5683fdc5d697be0f1ce54a15ccbe3e596ab02286b2b909
11 22:21:08.219543 >> Status: Image is up to date for kernelci/qemu:latest
12 22:21:08.252580 >> docker.io/kernelci/qemu:latest
13 22:21:08.255752 Returned 0 in 1 seconds
14 22:21:08.393392 cmd: ['docker', 'run', '--rm', '--init', 'kernelci/qemu', 'qemu-system-aarch64', '--version']
15 22:21:08.393782 Calling: 'nice' 'docker' 'run' '--rm' '--init' 'kernelci/qemu' 'qemu-system-aarch64' '--version'
16 22:21:10.122292 >> QEMU emulator version 7.2.2 (Debian 1:7.2+dfsg-7~bpo11+1)
17 22:21:10.122754 >> Copyright (c) 2003-2022 Fabrice Bellard and the QEMU Project developers
18 22:21:11.131537 Returned 0 in 2 seconds
19 22:21:11.232732 validate duration: 4.86
21 22:21:11.233220 start: 1 deployimages (timeout 00:03:00) [common]
22 22:21:11.233354 start: 1.1 lava-overlay (timeout 00:03:00) [common]
23 22:21:11.233755 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_
24 22:21:11.233950 makedir: /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin
25 22:21:11.234108 makedir: /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/tests
26 22:21:11.234261 makedir: /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/results
27 22:21:11.234421 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-add-keys
28 22:21:11.234630 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-add-sources
29 22:21:11.234816 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-background-process-start
30 22:21:11.235002 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-background-process-stop
31 22:21:11.235182 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-common-functions
32 22:21:11.235360 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-echo-ipv4
33 22:21:11.235546 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-install-packages
34 22:21:11.235723 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-installed-packages
35 22:21:11.235891 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-os-build
36 22:21:11.236056 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-probe-channel
37 22:21:11.236230 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-probe-ip
38 22:21:11.236405 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-target-ip
39 22:21:11.236579 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-target-mac
40 22:21:11.236748 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-target-storage
41 22:21:11.236926 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-test-case
42 22:21:11.237098 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-test-event
43 22:21:11.237270 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-test-feedback
44 22:21:11.237443 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-test-raise
45 22:21:11.237618 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-test-reference
46 22:21:11.237801 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-test-runner
47 22:21:11.237978 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-test-set
48 22:21:11.238157 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-test-shell
49 22:21:11.238340 Updating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-install-packages (oe)
50 22:21:11.238577 Updating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/bin/lava-installed-packages (oe)
51 22:21:11.238763 Creating /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/environment
52 22:21:11.238913 LAVA metadata
53 22:21:11.239017 - LAVA_JOB_ID=559916
54 22:21:11.239116 - LAVA_DISPATCHER_IP=172.27.0.2
55 22:21:11.239263 start: 1.1.1 lava-vland-overlay (timeout 00:03:00) [common]
56 22:21:11.239365 skipped lava-vland-overlay
57 22:21:11.239474 end: 1.1.1 lava-vland-overlay (duration 00:00:00) [common]
58 22:21:11.239591 start: 1.1.2 lava-multinode-overlay (timeout 00:03:00) [common]
59 22:21:11.239689 skipped lava-multinode-overlay
60 22:21:11.239797 end: 1.1.2 lava-multinode-overlay (duration 00:00:00) [common]
61 22:21:11.239912 start: 1.1.3 test-definition (timeout 00:03:00) [common]
62 22:21:11.240023 Loading test definitions
63 22:21:11.240158 start: 1.1.3.1 inline-repo-action (timeout 00:03:00) [common]
64 22:21:11.240266 Using /lava-559916 at stage 0
65 22:21:11.240722 uuid=559916_1.1.3.1 testdef=None
66 22:21:11.240852 end: 1.1.3.1 inline-repo-action (duration 00:00:00) [common]
67 22:21:11.240974 start: 1.1.3.2 test-overlay (timeout 00:03:00) [common]
68 22:21:11.241665 end: 1.1.3.2 test-overlay (duration 00:00:00) [common]
70 22:21:11.242023 start: 1.1.3.3 test-install-overlay (timeout 00:03:00) [common]
71 22:21:11.242849 end: 1.1.3.3 test-install-overlay (duration 00:00:00) [common]
73 22:21:11.243210 start: 1.1.3.4 test-runscript-overlay (timeout 00:03:00) [common]
74 22:21:11.243992 runner path: /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/0/tests/0_timesync-off test_uuid 559916_1.1.3.1
75 22:21:11.244197 end: 1.1.3.4 test-runscript-overlay (duration 00:00:00) [common]
77 22:21:11.244547 start: 1.1.3.5 git-repo-action (timeout 00:03:00) [common]
78 22:21:11.244653 Using /lava-559916 at stage 0
79 22:21:11.244798 Fetching tests from https://github.com/kernelci/test-definitions.git
80 22:21:11.244911 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/0/tests/1_kselftest-arm64_qemu'
81 22:21:14.095703 Running '/usr/bin/git checkout kernelci.org
82 22:21:14.276829 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/0/tests/1_kselftest-arm64_qemu/automated/linux/kselftest/kselftest.yaml
83 22:21:14.277997 uuid=559916_1.1.3.5 testdef=None
84 22:21:14.278248 end: 1.1.3.5 git-repo-action (duration 00:00:03) [common]
86 22:21:14.278729 start: 1.1.3.6 test-overlay (timeout 00:02:57) [common]
87 22:21:14.280335 end: 1.1.3.6 test-overlay (duration 00:00:00) [common]
89 22:21:14.280821 start: 1.1.3.7 test-install-overlay (timeout 00:02:57) [common]
90 22:21:14.282960 end: 1.1.3.7 test-install-overlay (duration 00:00:00) [common]
92 22:21:14.283466 start: 1.1.3.8 test-runscript-overlay (timeout 00:02:57) [common]
93 22:21:14.297504 runner path: /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/0/tests/1_kselftest-arm64_qemu test_uuid 559916_1.1.3.5
94 22:21:14.297686 BOARD='qemu_arm64-virt-gicv3'
95 22:21:14.297808 BRANCH='cip'
96 22:21:14.297922 SKIPFILE='/dev/null'
97 22:21:14.298034 SKIP_INSTALL='True'
98 22:21:14.298145 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1281-g84d5372e0f314/arm64/defconfig/gcc-10/kselftest.tar.xz'
99 22:21:14.298262 TST_CASENAME=''
100 22:21:14.298374 TST_CMDFILES='arm64'
101 22:21:14.298633 end: 1.1.3.8 test-runscript-overlay (duration 00:00:00) [common]
103 22:21:14.299077 Creating lava-test-runner.conf files
104 22:21:14.299200 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/559916/lava-overlay-_re2c0z_/lava-559916/0 for stage 0
105 22:21:14.299379 - 0_timesync-off
106 22:21:14.299514 - 1_kselftest-arm64_qemu
107 22:21:14.299691 end: 1.1.3 test-definition (duration 00:00:03) [common]
108 22:21:14.299856 start: 1.1.4 compress-overlay (timeout 00:02:57) [common]
109 22:21:22.868303 end: 1.1.4 compress-overlay (duration 00:00:09) [common]
110 22:21:22.868490 start: 1.1.5 persistent-nfs-overlay (timeout 00:02:48) [common]
111 22:21:22.868585 end: 1.1.5 persistent-nfs-overlay (duration 00:00:00) [common]
112 22:21:22.868688 end: 1.1 lava-overlay (duration 00:00:12) [common]
113 22:21:22.868781 start: 1.2 apply-overlay-guest (timeout 00:02:48) [common]
114 22:21:22.868856 Overlay: /var/lib/lava/dispatcher/tmp/559916/compress-overlay-k9uar4ty/overlay-1.1.4.tar.gz
115 22:21:37.532830 end: 1.2 apply-overlay-guest (duration 00:00:15) [common]
117 22:21:37.533591 start: 1.3 deploy-device-env (timeout 00:02:34) [common]
118 22:21:37.533764 end: 1.3 deploy-device-env (duration 00:00:00) [common]
119 22:21:37.533926 start: 1.4 download-retry (timeout 00:02:34) [common]
120 22:21:37.534090 start: 1.4.1 http-download (timeout 00:02:34) [common]
121 22:21:37.534384 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1281-g84d5372e0f314/arm64/defconfig/gcc-10/kernel/Image
122 22:21:37.534545 saving as /var/lib/lava/dispatcher/tmp/559916/deployimages-n_bp_9w0/kernel/Image
123 22:21:37.534679 total size: 37290496 (35MB)
124 22:21:37.534795 No compression specified
125 22:21:37.888291 progress 0% (0MB)
126 22:21:38.941372 progress 5% (1MB)
127 22:21:39.294352 progress 10% (3MB)
128 22:21:39.308200 progress 15% (5MB)
129 22:21:39.664064 progress 20% (7MB)
130 22:21:39.841970 progress 25% (8MB)
131 22:21:40.015188 progress 30% (10MB)
132 22:21:40.192934 progress 35% (12MB)
133 22:21:40.370567 progress 40% (14MB)
134 22:21:40.547954 progress 45% (16MB)
135 22:21:40.725153 progress 50% (17MB)
136 22:21:40.902025 progress 55% (19MB)
137 22:21:41.239247 progress 60% (21MB)
138 22:21:41.416917 progress 65% (23MB)
139 22:21:41.593633 progress 70% (24MB)
140 22:21:41.770308 progress 75% (26MB)
141 22:21:41.946679 progress 80% (28MB)
142 22:21:42.122995 progress 85% (30MB)
143 22:21:42.299187 progress 90% (32MB)
144 22:21:42.475246 progress 95% (33MB)
145 22:21:42.651204 progress 100% (35MB)
146 22:21:42.651411 35MB downloaded in 5.12s (6.95MB/s)
147 22:21:42.651685 end: 1.4.1 http-download (duration 00:00:05) [common]
149 22:21:42.652166 end: 1.4 download-retry (duration 00:00:05) [common]
150 22:21:42.652323 start: 1.5 download-retry (timeout 00:02:29) [common]
151 22:21:42.652474 start: 1.5.1 http-download (timeout 00:02:29) [common]
152 22:21:42.652691 Not decompressing ramdisk as can be used compressed.
153 22:21:42.652884 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230527.0/arm64/rootfs.cpio.gz
154 22:21:42.653017 saving as /var/lib/lava/dispatcher/tmp/559916/deployimages-n_bp_9w0/ramdisk/rootfs.cpio.gz
155 22:21:42.653136 total size: 88976554 (84MB)
156 22:21:42.653253 No compression specified
157 22:21:42.830284 progress 0% (0MB)
158 22:21:43.188003 progress 5% (4MB)
159 22:21:43.545836 progress 10% (8MB)
160 22:21:44.061814 progress 15% (12MB)
161 22:21:44.418923 progress 20% (17MB)
162 22:21:44.775424 progress 25% (21MB)
163 22:21:45.290175 progress 30% (25MB)
164 22:21:45.646881 progress 35% (29MB)
165 22:21:46.003258 progress 40% (33MB)
166 22:21:46.359167 progress 45% (38MB)
167 22:21:46.873449 progress 50% (42MB)
168 22:21:47.229633 progress 55% (46MB)
169 22:21:47.585928 progress 60% (50MB)
170 22:21:48.098732 progress 65% (55MB)
171 22:21:48.456201 progress 70% (59MB)
172 22:21:48.812588 progress 75% (63MB)
173 22:21:49.168831 progress 80% (67MB)
174 22:21:49.682345 progress 85% (72MB)
175 22:21:50.038802 progress 90% (76MB)
176 22:21:50.395331 progress 95% (80MB)
177 22:21:50.790815 progress 100% (84MB)
178 22:21:50.791170 84MB downloaded in 8.14s (10.43MB/s)
179 22:21:50.791433 end: 1.5.1 http-download (duration 00:00:08) [common]
181 22:21:50.791907 end: 1.5 download-retry (duration 00:00:08) [common]
182 22:21:50.792069 end: 1 deployimages (duration 00:00:40) [common]
183 22:21:50.792228 start: 2 boot-image-retry (timeout 00:05:00) [common]
184 22:21:50.792385 start: 2.1 boot-qemu-image (timeout 00:05:00) [common]
185 22:21:50.792543 start: 2.1.1 execute-qemu (timeout 00:05:00) [common]
186 22:21:50.792879 Extending command line for qcow2 test overlay
187 22:21:50.793475 Pulling docker image
188 22:21:50.793633 cmd: ['docker', 'pull', 'kernelci/qemu']
189 22:21:50.793773 Calling: 'nice' 'docker' 'pull' 'kernelci/qemu'
190 22:21:50.952741 >> Using default tag: latest
191 22:21:52.092236 >> latest: Pulling from kernelci/qemu
192 22:21:52.124254 >> Digest: sha256:fc85786d1b429cf64a5683fdc5d697be0f1ce54a15ccbe3e596ab02286b2b909
193 22:21:52.124441 >> Status: Image is up to date for kernelci/qemu:latest
194 22:21:52.157374 >> docker.io/kernelci/qemu:latest
195 22:21:52.160670 Returned 0 in 1 seconds
196 22:21:52.297171 Boot command: docker run --network=host --cap-add=NET_ADMIN --interactive --tty --rm --init --name=lava-docker-qemu-559916-2.1.1-hga5kc4yto --mount=type=bind,source=/var/lib/lava/dispatcher/tmp,destination=/var/lib/lava/dispatcher/tmp kernelci/qemu qemu-system-aarch64 -cpu max,pauth-impdef=on -machine virt,gic-version=3,mte=on,accel=tcg -nographic -net nic,model=virtio,macaddr=52:54:00:12:34:58 -net user -m 1g -monitor none -kernel /var/lib/lava/dispatcher/tmp/559916/deployimages-n_bp_9w0/kernel/Image -append "console=ttyAMA0,115200 root=/dev/ram0 debug verbose console_msg_format=syslog earlycon" -initrd /var/lib/lava/dispatcher/tmp/559916/deployimages-n_bp_9w0/ramdisk/rootfs.cpio.gz -drive format=qcow2,file=/var/lib/lava/dispatcher/tmp/559916/apply-overlay-guest-5tjp5lxn/lava-guest.qcow2,media=disk,if=virtio,id=lavatest
197 22:21:52.430722 started a shell command
198 22:21:52.431229 end: 2.1.1 execute-qemu (duration 00:00:02) [common]
199 22:21:52.431422 end: 2.1 boot-qemu-image (duration 00:00:02) [common]
200 22:21:52.431598 start: 2.2 auto-login-action (timeout 00:04:58) [common]
201 22:21:52.431776 Setting prompt string to ['Linux version [0-9]']
202 22:21:52.431917 auto-login-action: Wait for prompt ['Linux version [0-9]'] (timeout 00:05:00)
203 22:21:54.826473 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x000f0510]
204 22:21:54.827076 start: 2.2.1 login-action (timeout 00:04:56) [common]
205 22:21:54.827280 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
206 22:21:54.827473 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
207 22:21:54.827633 Using line separator: #'\n'#
208 22:21:54.827753 No login prompt set.
209 22:21:54.827881 Parsing kernel messages
210 22:21:54.828004 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
211 22:21:54.828246 [login-action] Waiting for messages, (timeout 00:04:56)
212 22:21:54.829575 [ 0.000000] Linux version 6.1.31 (KernelCI@build-j1606576-arm64-gcc-10-defconfig-rp65f) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Sun Jun 4 22:03:45 UTC 2023
213 22:21:54.829754 [ 0.000000] random: crng init done
214 22:21:54.829883 [ 0.000000] Machine model: linux,dummy-virt
215 22:21:54.830003 [ 0.000000] efi: UEFI not found.
216 22:21:54.830122 [ 0.000000] earlycon: pl11 at MMIO 0x0000000009000000 (options '')
217 22:21:54.830236 [ 0.000000] printk: bootconsole [pl11] enabled
218 22:21:54.830896 [ 0.000000] NUMA: No NUMA configuration found
219 22:21:54.831095 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000007fffffff]
220 22:21:54.831717 [ 0.000000] NUMA: NODE_DATA [mem 0x7fdf1a00-0x7fdf3fff]
221 22:21:54.833706 [ 0.000000] Zone ranges:
222 22:21:54.834439 [ 0.000000] DMA [mem 0x0000000040000000-0x000000007fffffff]
223 22:21:54.834541 [ 0.000000] DMA32 empty
224 22:21:54.834626 [ 0.000000] Normal empty
225 22:21:54.834699 [ 0.000000] Movable zone start for each node
226 22:21:54.834772 [ 0.000000] Early memory node ranges
227 22:21:54.835024 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000007fffffff]
228 22:21:54.835374 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000007fffffff]
229 22:21:54.849772 [ 0.000000] cma: Reserved 32 MiB at 0x000000007cc00000
230 22:21:54.850898 [ 0.000000] psci: probing for conduit method from DT.
231 22:21:54.851146 [ 0.000000] psci: PSCIv1.1 detected in firmware.
232 22:21:54.851359 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
233 22:21:54.851570 [ 0.000000] psci: Trusted OS migration not required
234 22:21:54.851705 [ 0.000000] psci: SMC Calling Convention v1.0
235 22:21:54.853983 [ 0.000000] percpu: Embedded 20 pages/cpu s44840 r8192 d28888 u81920
236 22:21:54.854648 [ 0.000000] pcpu-alloc: s44840 r8192 d28888 u81920 alloc=20*4096
237 22:21:54.854822 [ 0.000000] pcpu-alloc: [0] 0
238 22:21:54.856254 [ 0.000000] Detected PIPT I-cache on CPU0
239 22:21:54.861418 [ 0.000000] CPU features: detected: Address authentication (IMP DEF algorithm)
240 22:21:54.862158 [ 0.000000] CPU features: detected: GIC system register CPU interface
241 22:21:54.862390 [ 0.000000] CPU features: detected: Hardware dirty bit management
242 22:21:54.862627 [ 0.000000] CPU features: detected: Memory Tagging Extension
243 22:21:54.862793 [ 0.000000] CPU features: detected: Asymmetric MTE Tag Check Fault
244 22:21:54.862972 [ 0.000000] CPU features: detected: Spectre-v4
245 22:21:54.866695 [ 0.000000] alternatives: applying boot alternatives
246 22:21:54.869564 [ 0.000000] Fallback order for Node 0: 0
247 22:21:54.869727 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 258048
248 22:21:54.869865 [ 0.000000] Policy zone: DMA
249 22:21:54.870297 [ 0.000000] Kernel command line: console=ttyAMA0,115200 root=/dev/ram0 debug verbose console_msg_format=syslog earlycon
250 22:21:54.872643 <5>[ 0.000000] Unknown kernel command line parameters \"verbose\", will be passed to user space.
251 22:21:54.875096 <6>[ 0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
252 22:21:54.875541 <6>[ 0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
253 22:21:54.875977 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
254 22:21:54.884813 <6>[ 0.000000] Memory: 870732K/1048576K available (16128K kernel code, 3712K rwdata, 8856K rodata, 7552K init, 609K bss, 145076K reserved, 32768K cma-reserved)
255 22:21:54.890758 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
256 22:21:54.897482 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
257 22:21:54.898076 <6>[ 0.000000] rcu: RCU event tracing is enabled.
258 22:21:54.898242 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=1.
259 22:21:54.898382 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
260 22:21:54.898548 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
261 22:21:54.898695 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
262 22:21:54.898861 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
263 22:21:54.899796 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
264 22:21:54.906712 <6>[ 0.000000] GICv3: 224 SPIs implemented
265 22:21:54.906904 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
266 22:21:54.908540 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
267 22:21:54.908742 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
268 22:21:54.909444 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x00000000080a0000
269 22:21:54.913906 <6>[ 0.000000] ITS [mem 0x08080000-0x0809ffff]
270 22:21:54.914658 <6>[ 0.000000] ITS@0x0000000008080000: allocated 8192 Devices @42830000 (indirect, esz 8, psz 64K, shr 1)
271 22:21:54.915147 <6>[ 0.000000] ITS@0x0000000008080000: allocated 8192 Interrupt Collections @42840000 (flat, esz 8, psz 64K, shr 1)
272 22:21:54.915624 <6>[ 0.000000] GICv3: using LPI property table @0x0000000042850000
273 22:21:54.916419 <6>[ 0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000042860000
274 22:21:54.917696 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
275 22:21:54.925802 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 62.50MHz (virt).
276 22:21:54.926417 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0x1ffffffffffffff max_cycles: 0x1cd42e208c, max_idle_ns: 881590405314 ns
277 22:21:54.927029 <6>[ 0.000075] sched_clock: 57 bits at 63MHz, resolution 16ns, wraps every 4398046511096ns
278 22:21:54.944025 <6>[ 0.014645] Console: colour dummy device 80x25
279 22:21:54.947946 <6>[ 0.020607] Calibrating delay loop (skipped), value calculated using timer frequency.. 125.00 BogoMIPS (lpj=250000)
280 22:21:54.948313 <6>[ 0.021514] pid_max: default: 32768 minimum: 301
281 22:21:54.949659 <6>[ 0.022905] LSM: Security Framework initializing
282 22:21:54.953907 <6>[ 0.027038] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
283 22:21:54.954109 <6>[ 0.027335] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
284 22:21:54.985969 <4>[ 0.059069] cacheinfo: Unable to detect cache hierarchy for CPU 0
285 22:21:54.991893 <6>[ 0.065087] cblist_init_generic: Setting adjustable number of callback queues.
286 22:21:54.992203 <6>[ 0.065402] cblist_init_generic: Setting shift to 0 and lim to 1.
287 22:21:54.992725 <6>[ 0.065942] cblist_init_generic: Setting shift to 0 and lim to 1.
288 22:21:54.994410 <6>[ 0.067607] rcu: Hierarchical SRCU implementation.
289 22:21:54.994532 <6>[ 0.067839] rcu: Max phase no-delay instances is 1000.
290 22:21:54.999889 <6>[ 0.073098] Platform MSI: its@8080000 domain created
291 22:21:55.000647 <6>[ 0.073677] PCI/MSI: /intc@8000000/its@8080000 domain created
292 22:21:55.000924 <6>[ 0.074264] fsl-mc MSI: its@8080000 domain created
293 22:21:55.003834 <6>[ 0.077245] EFI services will not be available.
294 22:21:55.004892 <6>[ 0.078111] smp: Bringing up secondary CPUs ...
295 22:21:55.005009 <6>[ 0.078341] smp: Brought up 1 node, 1 CPU
296 22:21:55.005116 <6>[ 0.078485] SMP: Total of 1 processors activated.
297 22:21:55.005448 <6>[ 0.078783] CPU features: detected: Branch Target Identification
298 22:21:55.005837 <6>[ 0.078997] CPU features: detected: 32-bit EL0 Support
299 22:21:55.005937 <6>[ 0.079149] CPU features: detected: 32-bit EL1 Support
300 22:21:55.006030 <6>[ 0.079306] CPU features: detected: ARMv8.4 Translation Table Level
301 22:21:55.006185 <6>[ 0.079486] CPU features: detected: Data cache clean to the PoU not required for I/D coherence
302 22:21:55.006497 <6>[ 0.079749] CPU features: detected: Common not Private translations
303 22:21:55.006600 <6>[ 0.079900] CPU features: detected: CRC32 instructions
304 22:21:55.006901 <6>[ 0.080113] CPU features: detected: E0PD
305 22:21:55.007005 <6>[ 0.080271] CPU features: detected: Generic authentication (IMP DEF algorithm)
306 22:21:55.007317 <6>[ 0.080483] CPU features: detected: RCpc load-acquire (LDAPR)
307 22:21:55.007457 <6>[ 0.080630] CPU features: detected: LSE atomic instructions
308 22:21:55.007596 <6>[ 0.080784] CPU features: detected: Privileged Access Never
309 22:21:55.007727 <6>[ 0.080962] CPU features: detected: RAS Extension Support
310 22:21:55.007858 <6>[ 0.081122] CPU features: detected: Random Number Generator
311 22:21:55.008000 <6>[ 0.081273] CPU features: detected: Speculation barrier (SB)
312 22:21:55.008157 <6>[ 0.081433] CPU features: detected: Stage-2 Force Write-Back
313 22:21:55.008532 <6>[ 0.081607] CPU features: detected: TLB range maintenance instructions
314 22:21:55.008639 <6>[ 0.081864] CPU features: detected: Scalable Matrix Extension
315 22:21:55.008801 <6>[ 0.082033] CPU features: detected: FA64
316 22:21:55.008935 <6>[ 0.082171] CPU features: detected: Speculative Store Bypassing Safe (SSBS)
317 22:21:55.009269 <6>[ 0.082367] CPU features: detected: Scalable Vector Extension
318 22:21:55.020975 <6>[ 0.091778] SVE: maximum available vector length 256 bytes per vector
319 22:21:55.021551 <6>[ 0.094755] SVE: default vector length 64 bytes per vector
320 22:21:55.023515 <6>[ 0.096685] SME: minimum available vector length 16 bytes per vector
321 22:21:55.023881 <6>[ 0.096871] SME: maximum available vector length 256 bytes per vector
322 22:21:55.023994 <6>[ 0.097053] SME: default vector length 32 bytes per vector
323 22:21:55.024099 <6>[ 0.097445] CPU: All CPU(s) started at EL1
324 22:21:55.024600 <6>[ 0.097773] alternatives: applying system-wide alternatives
325 22:21:55.075676 <6>[ 0.148867] devtmpfs: initialized
326 22:21:55.095365 <6>[ 0.168296] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
327 22:21:55.095927 <6>[ 0.169133] futex hash table entries: 256 (order: 2, 16384 bytes, linear)
328 22:21:55.101640 <6>[ 0.174837] pinctrl core: initialized pinctrl subsystem
329 22:21:55.112525 <6>[ 0.185703] DMI not present or invalid.
330 22:21:55.121320 <6>[ 0.194490] NET: Registered PF_NETLINK/PF_ROUTE protocol family
331 22:21:55.132689 <6>[ 0.205644] DMA: preallocated 128 KiB GFP_KERNEL pool for atomic allocations
332 22:21:55.133398 <6>[ 0.206461] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
333 22:21:55.133913 <6>[ 0.206967] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
334 22:21:55.134137 <6>[ 0.207458] audit: initializing netlink subsys (disabled)
335 22:21:55.139351 <5>[ 0.212476] audit: type=2000 audit(0.176:1): state=initialized audit_enabled=0 res=1
336 22:21:55.142086 <6>[ 0.215167] thermal_sys: Registered thermal governor 'step_wise'
337 22:21:55.142756 <6>[ 0.215257] thermal_sys: Registered thermal governor 'power_allocator'
338 22:21:55.142897 <6>[ 0.215857] cpuidle: using governor menu
339 22:21:55.144285 <6>[ 0.217452] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
340 22:21:55.144744 <6>[ 0.218035] ASID allocator initialised with 65536 entries
341 22:21:55.150733 <6>[ 0.224045] Serial: AMBA PL011 UART driver
342 22:21:55.199919 <6>[ 0.272902] 9000000.pl011: ttyAMA0 at MMIO 0x9000000 (irq = 13, base_baud = 0) is a PL011 rev1
343 22:21:55.201507 <6>[ 0.274538] printk: console [ttyAMA0] enabled
344 22:21:55.201664 <6>[ 0.274538] printk: console [ttyAMA0] enabled
345 22:21:55.201818 <6>[ 0.275023] printk: bootconsole [pl11] disabled
346 22:21:55.201920 <6>[ 0.275023] printk: bootconsole [pl11] disabled
347 22:21:55.212490 <6>[ 0.285873] KASLR enabled
348 22:21:55.243974 <6>[ 0.317095] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
349 22:21:55.244394 <6>[ 0.317533] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
350 22:21:55.244524 <6>[ 0.317736] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
351 22:21:55.244653 <6>[ 0.317902] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
352 22:21:55.244796 <6>[ 0.318101] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
353 22:21:55.245309 <6>[ 0.318319] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
354 22:21:55.245524 <6>[ 0.318540] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
355 22:21:55.245717 <6>[ 0.318729] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
356 22:21:55.257044 <6>[ 0.330158] ACPI: Interpreter disabled.
357 22:21:55.265446 <6>[ 0.338597] iommu: Default domain type: Translated
358 22:21:55.265573 <6>[ 0.338813] iommu: DMA domain TLB invalidation policy: strict mode
359 22:21:55.267220 <5>[ 0.340429] SCSI subsystem initialized
360 22:21:55.268047 <7>[ 0.341271] libata version 3.00 loaded.
361 22:21:55.269305 <6>[ 0.342645] usbcore: registered new interface driver usbfs
362 22:21:55.269809 <6>[ 0.343036] usbcore: registered new interface driver hub
363 22:21:55.270094 <6>[ 0.343405] usbcore: registered new device driver usb
364 22:21:55.273180 <6>[ 0.346308] pps_core: LinuxPPS API ver. 1 registered
365 22:21:55.273330 <6>[ 0.346463] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
366 22:21:55.273473 <6>[ 0.346774] PTP clock support registered
367 22:21:55.274164 <6>[ 0.347346] EDAC MC: Ver: 3.0.0
368 22:21:55.279262 <6>[ 0.352660] FPGA manager framework
369 22:21:55.280247 <6>[ 0.353435] Advanced Linux Sound Architecture Driver Initialized.
370 22:21:55.289034 <6>[ 0.362202] vgaarb: loaded
371 22:21:55.292550 <6>[ 0.365650] clocksource: Switched to clocksource arch_sys_counter
372 22:21:55.295071 <5>[ 0.368220] VFS: Disk quotas dquot_6.6.0
373 22:21:55.295447 <6>[ 0.368524] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
374 22:21:55.297217 <6>[ 0.370618] pnp: PnP ACPI: disabled
375 22:21:55.315263 <6>[ 0.388333] NET: Registered PF_INET protocol family
376 22:21:55.317429 <6>[ 0.390499] IP idents hash table entries: 16384 (order: 5, 131072 bytes, linear)
377 22:21:55.322143 <6>[ 0.395253] tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes, linear)
378 22:21:55.322313 <6>[ 0.395532] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
379 22:21:55.322491 <6>[ 0.395805] TCP established hash table entries: 8192 (order: 4, 65536 bytes, linear)
380 22:21:55.323091 <6>[ 0.396205] TCP bind hash table entries: 8192 (order: 6, 262144 bytes, linear)
381 22:21:55.323463 <6>[ 0.396752] TCP: Hash tables configured (established 8192 bind 8192)
382 22:21:55.324927 <6>[ 0.397960] UDP hash table entries: 512 (order: 2, 16384 bytes, linear)
383 22:21:55.325148 <6>[ 0.398328] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear)
384 22:21:55.326329 <6>[ 0.399474] NET: Registered PF_UNIX/PF_LOCAL protocol family
385 22:21:55.328564 <6>[ 0.401649] RPC: Registered named UNIX socket transport module.
386 22:21:55.328751 <6>[ 0.401872] RPC: Registered udp transport module.
387 22:21:55.328936 <6>[ 0.402017] RPC: Registered tcp transport module.
388 22:21:55.329092 <6>[ 0.402164] RPC: Registered tcp NFSv4.1 backchannel transport module.
389 22:21:55.329251 <6>[ 0.402438] PCI: CLS 0 bytes, default 64
390 22:21:55.333335 <6>[ 0.406721] Unpacking initramfs...
391 22:21:55.340205 <6>[ 0.413295] hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 counters available
392 22:21:55.344797 <6>[ 0.417958] kvm [1]: HYP mode not available
393 22:21:55.348034 <5>[ 0.421189] Initialise system trusted keyrings
394 22:21:55.354278 <6>[ 0.427383] workingset: timestamp_bits=42 max_order=18 bucket_order=0
395 22:21:55.389348 <6>[ 0.462445] squashfs: version 4.0 (2009/01/31) Phillip Lougher
396 22:21:55.393779 <5>[ 0.466887] NFS: Registering the id_resolver key type
397 22:21:55.393988 <5>[ 0.467265] Key type id_resolver registered
398 22:21:55.394171 <5>[ 0.467398] Key type id_legacy registered
399 22:21:55.394899 <6>[ 0.467917] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
400 22:21:55.395088 <6>[ 0.468203] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
401 22:21:55.400388 <6>[ 0.473533] 9p: Installing v9fs 9p2000 file system support
402 22:21:55.464979 <5>[ 0.538331] Key type asymmetric registered
403 22:21:55.465444 <5>[ 0.538502] Asymmetric key parser 'x509' registered
404 22:21:55.465625 <6>[ 0.538904] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245)
405 22:21:55.466139 <6>[ 0.539234] io scheduler mq-deadline registered
406 22:21:55.466310 <6>[ 0.539448] io scheduler kyber registered
407 22:21:55.529269 <6>[ 0.602219] pl061_gpio 9030000.pl061: PL061 GPIO chip registered
408 22:21:55.539498 <6>[ 0.612518] pci-host-generic 4010000000.pcie: host bridge /pcie@10000000 ranges:
409 22:21:55.544521 <6>[ 0.617501] pci-host-generic 4010000000.pcie: IO 0x003eff0000..0x003effffff -> 0x0000000000
410 22:21:55.544973 <6>[ 0.618237] pci-host-generic 4010000000.pcie: MEM 0x0010000000..0x003efeffff -> 0x0010000000
411 22:21:55.545452 <6>[ 0.618493] pci-host-generic 4010000000.pcie: MEM 0x8000000000..0xffffffffff -> 0x8000000000
412 22:21:55.546215 <4>[ 0.619354] pci-host-generic 4010000000.pcie: Memory resource size exceeds max for 32 bits
413 22:21:55.547143 <6>[ 0.620038] pci-host-generic 4010000000.pcie: ECAM at [mem 0x4010000000-0x401fffffff] for [bus 00-ff]
414 22:21:55.552437 <6>[ 0.625571] pci-host-generic 4010000000.pcie: PCI host bridge to bus 0000:00
415 22:21:55.552638 <6>[ 0.625990] pci_bus 0000:00: root bus resource [bus 00-ff]
416 22:21:55.553076 <6>[ 0.626219] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
417 22:21:55.553279 <6>[ 0.626474] pci_bus 0000:00: root bus resource [mem 0x10000000-0x3efeffff]
418 22:21:55.553458 <6>[ 0.626683] pci_bus 0000:00: root bus resource [mem 0x8000000000-0xffffffffff]
419 22:21:55.555051 <6>[ 0.628211] pci 0000:00:00.0: [1b36:0008] type 00 class 0x060000
420 22:21:55.562507 <6>[ 0.635636] pci 0000:00:01.0: [1af4:1000] type 00 class 0x020000
421 22:21:55.562969 <6>[ 0.636060] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x001f]
422 22:21:55.563106 <6>[ 0.636283] pci 0000:00:01.0: reg 0x14: [mem 0x00000000-0x00000fff]
423 22:21:55.563582 <6>[ 0.636556] pci 0000:00:01.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit pref]
424 22:21:55.563759 <6>[ 0.636855] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x0003ffff pref]
425 22:21:55.568459 <6>[ 0.641592] pci 0000:00:02.0: [1af4:1001] type 00 class 0x010000
426 22:21:55.568638 <6>[ 0.641796] pci 0000:00:02.0: reg 0x10: [io 0x0000-0x007f]
427 22:21:55.568814 <6>[ 0.641979] pci 0000:00:02.0: reg 0x14: [mem 0x00000000-0x00000fff]
428 22:21:55.568981 <6>[ 0.642213] pci 0000:00:02.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit pref]
429 22:21:55.571625 <6>[ 0.644897] pci 0000:00:01.0: BAR 6: assigned [mem 0x10000000-0x1003ffff pref]
430 22:21:55.576399 <6>[ 0.649476] pci 0000:00:01.0: BAR 4: assigned [mem 0x8000000000-0x8000003fff 64bit pref]
431 22:21:55.576620 <6>[ 0.649815] pci 0000:00:02.0: BAR 4: assigned [mem 0x8000004000-0x8000007fff 64bit pref]
432 22:21:55.576814 <6>[ 0.650095] pci 0000:00:01.0: BAR 1: assigned [mem 0x10040000-0x10040fff]
433 22:21:55.577277 <6>[ 0.650367] pci 0000:00:02.0: BAR 1: assigned [mem 0x10041000-0x10041fff]
434 22:21:55.577448 <6>[ 0.650604] pci 0000:00:02.0: BAR 0: assigned [io 0x1000-0x107f]
435 22:21:55.577593 <6>[ 0.650827] pci 0000:00:01.0: BAR 0: assigned [io 0x1080-0x109f]
436 22:21:55.589130 <6>[ 0.662506] EINJ: ACPI disabled.
437 22:21:55.670838 <6>[ 0.743938] virtio-pci 0000:00:01.0: enabling device (0000 -> 0003)
438 22:21:55.677747 <6>[ 0.750822] virtio-pci 0000:00:02.0: enabling device (0000 -> 0003)
439 22:21:55.705589 <6>[ 0.778676] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
440 22:21:55.715999 <6>[ 0.789121] SuperH (H)SCI(F) driver initialized
441 22:21:55.721263 <6>[ 0.794634] msm_serial: driver initialized
442 22:21:55.729947 <4>[ 0.803042] cacheinfo: Unable to detect cache hierarchy for CPU 0
443 22:21:55.759534 <6>[ 0.832832] loop: module loaded
444 22:21:55.764821 <6>[ 0.837941] virtio_blk virtio1: 1/0/0 default/read/poll queues
445 22:21:55.777128 <5>[ 0.850244] virtio_blk virtio1: [vda] 1048576 512-byte logical blocks (537 MB/512 MiB)
446 22:21:55.808401 <6>[ 0.881753] megasas: 07.719.03.00-rc1
447 22:21:55.822514 <5>[ 0.895584] physmap-flash 0.flash: physmap platform flash device: [mem 0x00000000-0x03ffffff]
448 22:21:55.823874 <6>[ 0.896983] 0.flash: Found 2 x16 devices at 0x0 in 32-bit bank. Manufacturer ID 0x000000 Chip ID 0x000000
449 22:21:55.828569 <6>[ 0.901684] Intel/Sharp Extended Query Table at 0x0031
450 22:21:55.829358 <6>[ 0.902476] Using buffer write method
451 22:21:55.829836 <7>[ 0.902920] erase region 0: offset=0x0,size=0x40000,blocks=256
452 22:21:55.830030 <5>[ 0.903289] physmap-flash 0.flash: physmap platform flash device: [mem 0x04000000-0x07ffffff]
453 22:21:55.830849 <6>[ 0.903960] 0.flash: Found 2 x16 devices at 0x0 in 32-bit bank. Manufacturer ID 0x000000 Chip ID 0x000000
454 22:21:55.831024 <6>[ 0.904238] Intel/Sharp Extended Query Table at 0x0031
455 22:21:55.831420 <6>[ 0.904804] Using buffer write method
456 22:21:55.831857 <7>[ 0.904931] erase region 0: offset=0x0,size=0x40000,blocks=256
457 22:21:55.831992 <5>[ 0.905166] Concatenating MTD devices:
458 22:21:55.832129 <5>[ 0.905286] (0): \"0.flash\"
459 22:21:55.836127 <5>[ 0.909499] (1): \"0.flash\"
460 22:21:55.836545 <5>[ 0.909605] into device \"0.flash\"
461 22:22:00.435516 <6>[ 5.508588] Freeing initrd memory: 86888K
462 22:22:00.542854 <6>[ 5.615921] tun: Universal TUN/TAP device driver, 1.6
463 22:22:00.552197 <6>[ 5.625333] thunder_xcv, ver 1.0
464 22:22:00.552595 <6>[ 5.625661] thunder_bgx, ver 1.0
465 22:22:00.552702 <6>[ 5.625914] nicpf, ver 1.0
466 22:22:00.555930 <6>[ 5.629140] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
467 22:22:00.556277 <6>[ 5.629297] hns3: Copyright (c) 2017 Huawei Corporation.
468 22:22:00.556616 <6>[ 5.629793] hclge is initializing
469 22:22:00.556737 <6>[ 5.630069] e1000: Intel(R) PRO/1000 Network Driver
470 22:22:00.557077 <6>[ 5.630241] e1000: Copyright (c) 1999-2006 Intel Corporation.
471 22:22:00.557419 <6>[ 5.630611] e1000e: Intel(R) PRO/1000 Network Driver
472 22:22:00.557532 <6>[ 5.630787] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
473 22:22:00.557857 <6>[ 5.631146] igb: Intel(R) Gigabit Ethernet Network Driver
474 22:22:00.558198 <6>[ 5.631319] igb: Copyright (c) 2007-2014 Intel Corporation.
475 22:22:00.558325 <6>[ 5.631623] igbvf: Intel(R) Gigabit Virtual Function Network Driver
476 22:22:00.558666 <6>[ 5.631845] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
477 22:22:00.559781 <6>[ 5.632945] sky2: driver version 1.30
478 22:22:00.562844 <6>[ 5.635947] VFIO - User Level meta-driver version: 0.3
479 22:22:00.571473 <6>[ 5.644658] usbcore: registered new interface driver usb-storage
480 22:22:00.580361 <6>[ 5.653516] rtc-pl031 9010000.pl031: registered as rtc0
481 22:22:00.581375 <6>[ 5.654226] rtc-pl031 9010000.pl031: setting system clock to 2023-06-04T22:22:00 UTC (1685917320)
482 22:22:00.582851 <6>[ 5.656214] i2c_dev: i2c /dev entries driver
483 22:22:00.598075 <6>[ 5.671264] sdhci: Secure Digital Host Controller Interface driver
484 22:22:00.598234 <6>[ 5.671395] sdhci: Copyright(c) Pierre Ossman
485 22:22:00.600044 <6>[ 5.673158] Synopsys Designware Multimedia Card Interface Driver
486 22:22:00.602475 <6>[ 5.675555] sdhci-pltfm: SDHCI platform and OF driver helper
487 22:22:00.607147 <6>[ 5.680349] ledtrig-cpu: registered to indicate activity on CPUs
488 22:22:00.612584 <6>[ 5.685774] usbcore: registered new interface driver usbhid
489 22:22:00.612760 <6>[ 5.685931] usbhid: USB HID core driver
490 22:22:00.628385 <6>[ 5.701518] NET: Registered PF_PACKET protocol family
491 22:22:00.629215 <6>[ 5.702567] 9pnet: Installing 9P2000 support
492 22:22:00.629685 <5>[ 5.702905] Key type dns_resolver registered
493 22:22:00.630685 <6>[ 5.704044] registered taskstats version 1
494 22:22:00.631139 <5>[ 5.704406] Loading compiled-in X.509 certificates
495 22:22:00.651777 <6>[ 5.724935] input: gpio-keys as /devices/platform/gpio-keys/input/input0
496 22:22:00.658536 <6>[ 5.731853] ALSA device list:
497 22:22:00.658963 <6>[ 5.731988] No soundcards found.
498 22:22:00.661386 <6>[ 5.734604] uart-pl011 9000000.pl011: no DMA platform data
499 22:22:00.714384 <6>[ 5.787487] Freeing unused kernel memory: 7552K
500 22:22:00.714963 <6>[ 5.788304] Run /init as init process
501 22:22:00.715409 <7>[ 5.788412] with arguments:
502 22:22:00.715590 <7>[ 5.788501] /init
503 22:22:00.715763 <7>[ 5.788588] verbose
504 22:22:00.715909 <7>[ 5.788672] with environment:
505 22:22:00.716052 <7>[ 5.788772] HOME=/
506 22:22:00.716227 <7>[ 5.788861] TERM=linux
507 22:22:00.836791 <30>[ 5.909010] systemd[1]: systemd 247.3-7+deb11u2 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +ZSTD +SECCOMP +BLKID +ELFUTILS +KMOD +IDN2 -IDN +PCRE2 default-hierarchy=unified)
508 22:22:00.838593 <31>[ 5.911696] systemd[1]: No virtualization found in DMI
509 22:22:00.840095 <31>[ 5.913111] systemd[1]: UML virtualization not found in /proc/cpuinfo.
510 22:22:00.840656 <31>[ 5.913930] systemd[1]: No virtualization found in CPUID
511 22:22:00.841080 <31>[ 5.914297] systemd[1]: Virtualization XEN not found, /proc/xen does not exist
512 22:22:00.842232 <31>[ 5.915396] systemd[1]: Virtualization QEMU: \"fw-cfg\" present in /proc/device-tree/fw-cfg@9020000
513 22:22:00.842668 <31>[ 5.915789] systemd[1]: Found VM virtualization qemu
514 22:22:00.842823 <30>[ 5.916035] systemd[1]: Detected virtualization qemu.
515 22:22:00.843235 <30>[ 5.916381] systemd[1]: Detected architecture arm64.
516 22:22:00.843408 <31>[ 5.916714] systemd[1]: Detected initialized system, this is not the first boot.
517 22:22:00.847471
518 22:22:00.847901 Welcome to [1mDebian GNU/Linux 11 (bullseye)[0m!
519 22:22:00.848032
520 22:22:00.849754 <30>[ 5.922930] systemd[1]: Set hostname to <debian-bullseye-arm64>.
521 22:22:00.868038 <31>[ 5.941091] systemd[1]: Successfully added address 127.0.0.1 to loopback interface
522 22:22:00.869459 <31>[ 5.942578] systemd[1]: Failed to add address ::1 to loopback interface: Operation not supported
523 22:22:00.869959 <31>[ 5.943084] systemd[1]: Successfully brought loopback interface up
524 22:22:00.874670 <31>[ 5.947725] systemd[1]: Setting 'fs/file-max' to '9223372036854775807'.
525 22:22:00.886335 <31>[ 5.959392] systemd[1]: Found cgroup2 on /sys/fs/cgroup/, full unified hierarchy
526 22:22:00.886536 <31>[ 5.959690] systemd[1]: Unified cgroup hierarchy is located at /sys/fs/cgroup.
527 22:22:00.926588 <31>[ 5.999773] systemd[1]: Got EBADF when using BPF_F_ALLOW_MULTI, which indicates it is supported. Yay!
528 22:22:00.928046 <31>[ 6.001103] systemd[1]: Controller 'cpu' supported: yes
529 22:22:00.928303 <31>[ 6.001320] systemd[1]: Controller 'cpuacct' supported: no
530 22:22:00.928537 <31>[ 6.001798] systemd[1]: Controller 'cpuset' supported: yes
531 22:22:00.928759 <31>[ 6.001997] systemd[1]: Controller 'io' supported: yes
532 22:22:00.928983 <31>[ 6.002211] systemd[1]: Controller 'blkio' supported: no
533 22:22:00.929206 <31>[ 6.002409] systemd[1]: Controller 'memory' supported: yes
534 22:22:00.929432 <31>[ 6.002624] systemd[1]: Controller 'devices' supported: no
535 22:22:00.929671 <31>[ 6.002813] systemd[1]: Controller 'pids' supported: yes
536 22:22:00.929871 <31>[ 6.002988] systemd[1]: Controller 'bpf-firewall' supported: yes
537 22:22:00.930090 <31>[ 6.003167] systemd[1]: Controller 'bpf-devices' supported: yes
538 22:22:00.931280 <31>[ 6.004369] systemd[1]: Set up TFD_TIMER_CANCEL_ON_SET timerfd.
539 22:22:00.931532 <31>[ 6.004712] systemd[1]: Failed to stat /etc/localtime, ignoring: No such file or directory
540 22:22:00.932015 <31>[ 6.005244] systemd[1]: /etc/localtime doesn't exist yet, watching /etc instead.
541 22:22:00.939175 <31>[ 6.012291] systemd[1]: Enabling (yes) showing of status (commandline).
542 22:22:00.946623 <31>[ 6.019755] systemd[1]: Successfully forked off '(sd-executor)' as PID 96.
543 22:22:00.955745 <31>[ 6.028843] systemd[96]: Successfully forked off '(direxec)' as PID 97.
544 22:22:00.957772 <31>[ 6.030926] systemd[96]: Successfully forked off '(direxec)' as PID 98.
545 22:22:00.970848 <31>[ 6.043920] systemd[96]: Successfully forked off '(direxec)' as PID 99.
546 22:22:00.976882 <31>[ 6.050135] systemd[96]: Successfully forked off '(direxec)' as PID 100.
547 22:22:00.978868 <31>[ 6.051924] systemd[96]: Successfully forked off '(direxec)' as PID 101.
548 22:22:01.122842 <31>[ 6.196001] systemd-bless-boot-generator[97]: Skipping generator, not an EFI boot.
549 22:22:01.125748 <31>[ 6.198810] systemd-fstab-generator[98]: Parsing /etc/fstab...
550 22:22:01.127820 <31>[ 6.200880] systemd-fstab-generator[98]: Found entry what=/dev/disk/by-uuid/ffe0be16-960b-4f4f-abe2-c028c6995c76 where=/ type=ext4 makefs=no growfs=no noauto=no nofail=no
551 22:22:01.138166 <31>[ 6.211230] systemd-getty-generator[99]: Automatically adding serial getty for /dev/ttyAMA0.
552 22:22:01.139518 <31>[ 6.212612] systemd-getty-generator[99]: SELinux enabled state cached to: disabled
553 22:22:01.146673 <31>[ 6.219658] systemd-fstab-generator[98]: Checking was requested for /dev/disk/by-uuid/ffe0be16-960b-4f4f-abe2-c028c6995c76, but fsck.ext4 does not exist.
554 22:22:01.149449 <31>[ 6.222500] systemd[96]: /usr/lib/systemd/system-generators/systemd-bless-boot-generator succeeded.
555 22:22:01.162143 <31>[ 6.235211] systemd-fstab-generator[98]: SELinux enabled state cached to: disabled
556 22:22:01.169091 <31>[ 6.242155] systemd[96]: /usr/lib/systemd/system-generators/systemd-fstab-generator succeeded.
557 22:22:01.169344 <31>[ 6.242568] systemd[96]: /usr/lib/systemd/system-generators/systemd-run-generator succeeded.
558 22:22:01.169791 <31>[ 6.242934] systemd[96]: /usr/lib/systemd/system-generators/systemd-getty-generator succeeded.
559 22:22:01.170283 <31>[ 6.243335] systemd[96]: /usr/lib/systemd/system-generators/systemd-veritysetup-generator succeeded.
560 22:22:01.173272 <31>[ 6.246356] systemd[1]: (sd-executor) succeeded.
561 22:22:01.174665 <31>[ 6.247804] systemd[1]: Looking for unit files in (higher priority first):
562 22:22:01.174876 <31>[ 6.248040] systemd[1]: /etc/systemd/system.control
563 22:22:01.175044 <31>[ 6.248210] systemd[1]: /run/systemd/system.control
564 22:22:01.175222 <31>[ 6.248383] systemd[1]: /run/systemd/transient
565 22:22:01.175387 <31>[ 6.248570] systemd[1]: /run/systemd/generator.early
566 22:22:01.175554 <31>[ 6.248756] systemd[1]: /etc/systemd/system
567 22:22:01.175718 <31>[ 6.248966] systemd[1]: /etc/systemd/system.attached
568 22:22:01.175881 <31>[ 6.249163] systemd[1]: /run/systemd/system
569 22:22:01.176043 <31>[ 6.249316] systemd[1]: /run/systemd/system.attached
570 22:22:01.176823 <31>[ 6.249937] systemd[1]: /run/systemd/generator
571 22:22:01.176990 <31>[ 6.250145] systemd[1]: /usr/local/lib/systemd/system
572 22:22:01.177157 <31>[ 6.250336] systemd[1]: /lib/systemd/system
573 22:22:01.177318 <31>[ 6.250500] systemd[1]: /usr/lib/systemd/system
574 22:22:01.177480 <31>[ 6.250696] systemd[1]: /run/systemd/generator.late
575 22:22:01.212920 <31>[ 6.285950] systemd[1]: Modification times have changed, need to update cache.
576 22:22:01.214423 <31>[ 6.287476] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.network1.service → systemd-networkd.service
577 22:22:01.215376 <31>[ 6.288440] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.timesync1.service → systemd-timesyncd.service
578 22:22:01.216130 <31>[ 6.289131] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.resolve1.service → systemd-resolved.service
579 22:22:01.217359 <31>[ 6.290473] systemd[1]: unit_file_build_name_map: normal unit file: /run/systemd/generator/-.mount
580 22:22:01.218238 <31>[ 6.291330] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald@.service
581 22:22:01.218817 <31>[ 6.291674] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/console-getty.service
582 22:22:01.219000 <31>[ 6.292044] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/fstrim.timer
583 22:22:01.219186 <31>[ 6.292333] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-wall.path
584 22:22:01.219756 <31>[ 6.292636] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-rfkill.service
585 22:22:01.219914 <31>[ 6.292997] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/poweroff.target
586 22:22:01.220378 <31>[ 6.293658] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network-pre.target
587 22:22:01.221255 <31>[ 6.294330] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel4.target → multi-user.target
588 22:22:01.221458 <31>[ 6.294652] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/suspend-then-hibernate.target
589 22:22:01.221939 <31>[ 6.295024] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network.target
590 22:22:01.222772 <31>[ 6.295646] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel5.target → graphical.target
591 22:22:01.222982 <31>[ 6.296021] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald.service
592 22:22:01.223144 <31>[ 6.296332] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-update-utmp-runlevel.service
593 22:22:01.223634 <31>[ 6.296663] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-root-fs.target
594 22:22:01.223812 <31>[ 6.296992] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/slices.target
595 22:22:01.224944 <31>[ 6.297966] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/kmod.service → systemd-modules-load.service
596 22:22:01.225149 <31>[ 6.298311] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-update-utmp.service
597 22:22:01.225932 <31>[ 6.298908] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel1.target → rescue.target
598 22:22:01.226178 <31>[ 6.299209] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/cryptsetup-pre.target
599 22:22:01.226397 <31>[ 6.299525] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update-pre.target
600 22:22:01.226614 <31>[ 6.299827] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/machine.slice
601 22:22:01.227244 <31>[ 6.300175] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-fs-pre.target
602 22:22:01.227403 <31>[ 6.300475] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-clean.service
603 22:22:01.227877 <31>[ 6.301086] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel3.target → multi-user.target
604 22:22:01.228935 <31>[ 6.302035] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.timedate1.service → systemd-timedated.service
605 22:22:01.229462 <31>[ 6.302432] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dbus.service
606 22:22:01.229641 <31>[ 6.302723] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/reboot.target
607 22:22:01.230163 <31>[ 6.303184] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-audit.socket
608 22:22:01.230354 <31>[ 6.303520] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty@.service
609 22:22:01.230577 <31>[ 6.303829] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/kexec.target
610 22:22:01.231068 <31>[ 6.304111] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-systemd\x2dcryptsetup.slice
611 22:22:01.231244 <31>[ 6.304428] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-timedated.service
612 22:22:01.231793 <31>[ 6.304750] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-root-device.target
613 22:22:01.232001 <31>[ 6.305067] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-parse-etc.service
614 22:22:01.232488 <31>[ 6.305691] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd.target
615 22:22:01.232986 <31>[ 6.306026] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_all.timer
616 22:22:01.233172 <31>[ 6.306342] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-binfmt.service
617 22:22:01.233698 <31>[ 6.306645] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/local-fs-pre.target
618 22:22:01.233876 <31>[ 6.306934] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_all.service
619 22:22:01.234044 <31>[ 6.307242] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/paths.target
620 22:22:01.234360 <31>[ 6.307500] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/modprobe@.service
621 22:22:01.234841 <31>[ 6.308063] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/rc.service → /dev/null
622 22:22:01.235085 <31>[ 6.308380] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty-static.service
623 22:22:01.235881 <31>[ 6.308974] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel2.target → multi-user.target
624 22:22:01.236398 <31>[ 6.309304] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-modules-load.service
625 22:22:01.236918 <31>[ 6.309941] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/suspend.target
626 22:22:01.237132 <31>[ 6.310262] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sys-kernel-debug.mount
627 22:22:01.237362 <31>[ 6.310573] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-sysusers.service
628 22:22:01.238102 <31>[ 6.311236] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/default.target → graphical.target
629 22:22:01.238351 <31>[ 6.311583] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-poweroff.service
630 22:22:01.238927 <31>[ 6.311919] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-switch-root.target
631 22:22:01.239132 <31>[ 6.312249] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-sysctl.service
632 22:22:01.239612 <31>[ 6.312830] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/procps.service → systemd-sysctl.service
633 22:22:01.240154 <31>[ 6.313160] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-time-wait-sync.service
634 22:22:01.240637 <31>[ 6.313728] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user@.service
635 22:22:01.241483 <31>[ 6.314403] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/udev.service → systemd-udevd.service
636 22:22:01.241702 <31>[ 6.314723] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update-cleanup.service
637 22:22:01.241886 <31>[ 6.315063] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/nss-lookup.target
638 22:22:01.242397 <31>[ 6.315399] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/umount.target
639 22:22:01.242574 <31>[ 6.315710] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-udevadm-cleanup-db.service
640 22:22:01.243011 <31>[ 6.316068] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sys-kernel-tracing.mount
641 22:22:01.243221 <31>[ 6.316380] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-initctl.socket
642 22:22:01.243433 <31>[ 6.316684] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-timesyncd.service
643 22:22:01.243984 <31>[ 6.316939] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald.socket
644 22:22:01.244138 <31>[ 6.317200] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/printer.target
645 22:22:01.244566 <31>[ 6.317785] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network-online.target
646 22:22:01.245131 <31>[ 6.318104] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/usb-gadget.target
647 22:22:01.245323 <31>[ 6.318395] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hybrid-sleep.service
648 22:22:01.245505 <31>[ 6.318661] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-reboot.service
649 22:22:01.245726 <31>[ 6.318975] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/quotaon.service
650 22:22:01.246618 <31>[ 6.319570] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/bluetooth.target
651 22:22:01.246798 <31>[ 6.319885] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rescue.service
652 22:22:01.247240 <31>[ 6.320190] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-backlight@.service
653 22:22:01.247716 <31>[ 6.320769] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/cryptdisks-early.service → /dev/null
654 22:22:01.248188 <31>[ 6.321191] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dev-hugepages.mount
655 22:22:01.248674 <31>[ 6.321880] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-cryptsetup.target
656 22:22:01.249217 <31>[ 6.322231] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-pstore.service
657 22:22:01.249457 <31>[ 6.322712] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/x11-common.service → /dev/null
658 22:22:01.250218 <31>[ 6.323282] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.locale1.service → systemd-localed.service
659 22:22:01.250447 <31>[ 6.323580] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/timers.target
660 22:22:01.250688 <31>[ 6.323813] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/proc-sys-fs-binfmt_misc.automount
661 22:22:01.250912 <31>[ 6.324083] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-console.service
662 22:22:01.251267 <31>[ 6.324360] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-rfkill.socket
663 22:22:01.251504 <31>[ 6.324663] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user.slice
664 22:22:01.251701 <31>[ 6.324907] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-setup.service
665 22:22:01.252190 <31>[ 6.325191] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-fsck-root.service
666 22:22:01.252458 <31>[ 6.325690] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-quotacheck.service
667 22:22:01.253007 <31>[ 6.326032] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-kexec.service
668 22:22:01.253191 <31>[ 6.326369] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/graphical.target
669 22:22:01.253444 <31>[ 6.326686] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-clean.timer
670 22:22:01.254036 <31>[ 6.327008] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/exit.target
671 22:22:01.254230 <31>[ 6.327307] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-fs.target
672 22:22:01.254422 <31>[ 6.327613] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-boot-system-token.service
673 22:22:01.254878 <31>[ 6.328046] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-varlink@.socket
674 22:22:01.255107 <31>[ 6.328371] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd.service
675 22:22:01.255573 <31>[ 6.328659] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rpcbind.target
676 22:22:01.256472 <31>[ 6.329583] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.hostname1.service → systemd-hostnamed.service
677 22:22:01.257091 <31>[ 6.330006] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/syslog.socket
678 22:22:01.257260 <31>[ 6.330320] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-user-sessions.service
679 22:22:01.257433 <31>[ 6.330630] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-volatile-root.service
680 22:22:01.258054 <31>[ 6.330960] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user-runtime-dir@.service
681 22:22:01.258254 <31>[ 6.331311] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/kmod-static-nodes.service
682 22:22:01.258479 <31>[ 6.331621] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-logind.service
683 22:22:01.258683 <31>[ 6.331894] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd-control.socket
684 22:22:01.258916 <31>[ 6.332144] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-bless-boot.service
685 22:22:01.259121 <31>[ 6.332403] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd.service
686 22:22:01.259553 <31>[ 6.332655] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journal-flush.service
687 22:22:01.259776 <31>[ 6.332986] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty-pre.target
688 22:22:01.260236 <31>[ 6.333324] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty.target
689 22:22:01.260948 <31>[ 6.333876] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-network-generator.service
690 22:22:01.261112 <31>[ 6.334271] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update.target
691 22:22:01.261605 <31>[ 6.334599] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/multi-user.target
692 22:22:01.261811 <31>[ 6.334910] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-suspend.service
693 22:22:01.262019 <31>[ 6.335236] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-initctl.service
694 22:22:01.262566 <31>[ 6.335556] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-cleanup.service
695 22:22:01.262774 <31>[ 6.335849] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/basic.target
696 22:22:01.262986 <31>[ 6.336143] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/emergency.target
697 22:22:01.263254 <31>[ 6.336461] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-suspend-then-hibernate.service
698 22:22:01.263587 <31>[ 6.336792] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hibernate-resume@.service
699 22:22:01.264162 <31>[ 6.337119] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd-kernel.socket
700 22:22:01.264361 <31>[ 6.337544] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-dev-log.socket
701 22:22:01.264891 <31>[ 6.337877] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-machine-id-commit.service
702 22:22:01.265085 <31>[ 6.338208] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/serial-getty@.service
703 22:22:01.265287 <31>[ 6.338519] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-switch-root.service
704 22:22:01.265780 <31>[ 6.338827] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_reap.service
705 22:22:01.266008 <31>[ 6.339156] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sockets.target
706 22:22:01.266499 <31>[ 6.339662] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/cryptdisks.service → /dev/null
707 22:22:01.266764 <31>[ 6.340023] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/hybrid-sleep.target
708 22:22:01.267752 <31>[ 6.340661] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.login1.service → systemd-logind.service
709 22:22:01.267915 <31>[ 6.341111] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sleep.target
710 22:22:01.268631 <31>[ 6.341653] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hibernate.service
711 22:22:01.268797 <31>[ 6.341944] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-halt.service
712 22:22:01.268974 <31>[ 6.342207] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/halt.target
713 22:22:01.269428 <31>[ 6.342438] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sigpwr.target
714 22:22:01.269609 <31>[ 6.342676] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-setup-dev.service
715 22:22:01.269791 <31>[ 6.342990] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sound.target
716 22:22:01.270326 <31>[ 6.343281] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/time-set.target
717 22:22:01.270551 <31>[ 6.343571] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udev-settle.service
718 22:22:01.270745 <31>[ 6.343872] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dbus.socket
719 22:22:01.271257 <31>[ 6.344316] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/hwclock.service → /dev/null
720 22:22:01.271813 <31>[ 6.344766] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/rcS.service → /dev/null
721 22:22:01.272001 <31>[ 6.345068] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/hibernate.target
722 22:22:01.272460 <31>[ 6.345639] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-random-seed.service
723 22:22:01.272987 <31>[ 6.346034] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/cryptsetup.target
724 22:22:01.273163 <31>[ 6.346364] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/boot-complete.target
725 22:22:01.273624 <31>[ 6.346688] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/blockdev@.target
726 22:22:01.273854 <31>[ 6.347043] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd-wait-online.service
727 22:22:01.688369 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m.
728 22:22:01.693117 [[0;32m OK [0m] Created slice [0;1;39msystem-modprobe.slice[0m.
729 22:22:01.696519 [[0;32m OK [0m] Created slice [0;1;39msystem-serial\x2dgetty.slice[0m.
730 22:22:01.699533 [[0;32m OK [0m] Created slice [0;1;39mUser and Session Slice[0m.
731 22:22:01.703050 [[0;32m OK [0m] Started [0;1;39mDispatch Password …ts to Console Directory Watch[0m.
732 22:22:01.704676 [[0;32m OK [0m] Started [0;1;39mForward Password R…uests to Wall Directory Watch[0m.
733 22:22:01.706792 [[0;32m OK [0m] Reached target [0;1;39mLocal Encrypted Volumes[0m.
734 22:22:01.707786 [[0;32m OK [0m] Reached target [0;1;39mPaths[0m.
735 22:22:01.708740 [[0;32m OK [0m] Reached target [0;1;39mRemote File Systems[0m.
736 22:22:01.709265 [[0;32m OK [0m] Reached target [0;1;39mSlices[0m.
737 22:22:01.710237 [[0;32m OK [0m] Reached target [0;1;39mSwap[0m.
738 22:22:01.713871 [[0;32m OK [0m] Listening on [0;1;39minitctl Compatibility Named Pipe[0m.
739 22:22:01.717856 [[0;32m OK [0m] Listening on [0;1;39mJournal Audit Socket[0m.
740 22:22:01.720479 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket (/dev/log)[0m.
741 22:22:01.722509 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket[0m.
742 22:22:01.725020 [[0;32m OK [0m] Listening on [0;1;39mNetwork Service Netlink Socket[0m.
743 22:22:01.727192 [[0;32m OK [0m] Listening on [0;1;39mudev Control Socket[0m.
744 22:22:01.729441 [[0;32m OK [0m] Listening on [0;1;39mudev Kernel Socket[0m.
745 22:22:01.753940 Mounting [0;1;39mHuge Pages File System[0m...
746 22:22:01.773543 Mounting [0;1;39mPOSIX Message Queue File System[0m...
747 22:22:01.809763 Mounting [0;1;39mKernel Debug File System[0m...
748 22:22:01.866196 Starting [0;1;39mLoad Kernel Module configfs[0m...
749 22:22:01.909731 Starting [0;1;39mLoad Kernel Module drm[0m...
750 22:22:01.965816 Starting [0;1;39mJournal Service[0m...
751 22:22:01.998016 Starting [0;1;39mLoad Kernel Modules[0m...
752 22:22:02.037981 Starting [0;1;39mRemount Root and Kernel File Systems[0m...
753 22:22:02.094049 Starting [0;1;39mColdplug All udev Devices[0m...
754 22:22:02.171702 [[0;32m OK [0m] Mounted [0;1;39mHuge Pages File System[0m.
755 22:22:02.183707 [[0;32m OK [0m] Mounted [0;1;39mPOSIX Message Queue File System[0m.
756 22:22:02.194400 [[0;32m OK [0m] Mounted [0;1;39mKernel Debug File System[0m.
757 22:22:02.242614 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module configfs[0m.
758 22:22:02.293376 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module drm[0m.
759 22:22:02.310637 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Modules[0m.
760 22:22:02.385656 Mounting [0;1;39mKernel Configuration File System[0m...
761 22:22:02.490056 Starting [0;1;39mApply Kernel Variables[0m...
762 22:22:02.554397 [[0;32m OK [0m] Mounted [0;1;39mKernel Configuration File System[0m.
763 22:22:02.602922 <47>[ 7.675943] systemd-journald[107]: SELinux enabled state cached to: disabled
764 22:22:02.604105 <47>[ 7.677176] systemd-journald[107]: Auditing in kernel turned off.
765 22:22:02.644790 <47>[ 7.717866] systemd-journald[107]: Found cgroup2 on /sys/fs/cgroup/, full unified hierarchy
766 22:22:02.698218 <47>[ 7.771221] systemd-journald[107]: Journal effective settings seal=no keyed_hash=no compress=yes compress_threshold_bytes=512B
767 22:22:02.705373 [[0;1;31mFAILED[0m] Failed to start [0;1;39mRemount Root and Kernel File Systems[0m.
768 22:22:02.705874 See 'systemctl status systemd-remount-fs.service' for details.
769 22:22:02.708670 <47>[ 7.781809] systemd-journald[107]: Fixed min_use=3.8M max_use=19.4M max_size=2.4M min_size=512.0K keep_free=9.7M n_max_files=100
770 22:22:02.710347 <47>[ 7.783379] systemd-journald[107]: Reserving 333 entries in field hash table.
771 22:22:02.736010 <47>[ 7.809184] systemd-journald[107]: Reserving 4437 entries in data hash table.
772 22:22:02.749554 Starting [0;1;39mLoad/Save Random Seed[0m...
773 22:22:02.751568 <47>[ 7.824775] systemd-journald[107]: Vacuuming...
774 22:22:02.764777 <47>[ 7.837938] systemd-journald[107]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
775 22:22:02.765293 <47>[ 7.838532] systemd-journald[107]: Flushing /dev/kmsg...
776 22:22:02.790051 Starting [0;1;39mCreate System Users[0m...
777 22:22:02.834649 [[0;32m OK [0m] Finished [0;1;39mApply Kernel Variables[0m.
778 22:22:02.937986 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Random Seed[0m.
779 22:22:03.114500 [[0;32m OK [0m] Finished [0;1;39mCreate System Users[0m.
780 22:22:03.142171 Starting [0;1;39mCreate Static Device Nodes in /dev[0m...
781 22:22:03.290714 <47>[ 8.363871] systemd-journald[107]: systemd-journald running as PID 107 for the system.
782 22:22:03.305073 [[0;32m OK [0m] Started [0;1;39mJournal Service[0m.
783 22:22:03.312692 <47>[ 8.385763] systemd-journald[107]: Sent READY=1 notification.
784 22:22:03.313183 <47>[ 8.386199] systemd-journald[107]: Sent WATCHDOG=1 notification.
785 22:22:03.346972 <47>[ 8.419980] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
786 22:22:03.354371 Starting [0;1;39mFlush Journal to Persistent Storage[0m...
787 22:22:03.374427 <47>[ 8.447350] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
788 22:22:03.394374 <47>[ 8.467316] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
789 22:22:03.408612 <47>[ 8.481661] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
790 22:22:03.421674 <47>[ 8.494635] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
791 22:22:03.423860 <47>[ 8.496973] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
792 22:22:03.429425 [[0;32m OK [0m] Finished [0;1;39mCreate Static Device Nodes in /dev[0m.
793 22:22:03.439044 <47>[ 8.512114] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
794 22:22:03.450242 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems (Pre)[0m.
795 22:22:03.451258 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems[0m.
796 22:22:03.456295 <47>[ 8.529296] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
797 22:22:03.482492 <47>[ 8.555441] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
798 22:22:03.483956 <47>[ 8.557070] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
799 22:22:03.498179 <47>[ 8.571422] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
800 22:22:03.499956 <47>[ 8.573026] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
801 22:22:03.514874 <47>[ 8.588082] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
802 22:22:03.527032 <47>[ 8.600096] systemd-journald[107]: n/a: New incoming connection.
803 22:22:03.527476 <47>[ 8.600720] systemd-journald[107]: varlink-21: varlink: setting state idle-server
804 22:22:03.534794 <47>[ 8.607900] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
805 22:22:03.541988 Starting [0;1;39mRule-based Manage…for Device Events and Files[0m...
806 22:22:03.557639 <47>[ 8.630621] systemd-journald[107]: varlink-21: New incoming message: {\"method\":\"io.systemd.Journal.FlushToVar\",\"parameters\":{}}
807 22:22:03.559402 <47>[ 8.632509] systemd-journald[107]: varlink-21: varlink: changing state idle-server → processing-method
808 22:22:03.559884 <46>[ 8.632939] systemd-journald[107]: Received client request to flush runtime journal.
809 22:22:03.570452 <47>[ 8.643551] systemd-journald[107]: Journal effective settings seal=yes keyed_hash=no compress=yes compress_threshold_bytes=512B
810 22:22:03.571382 <47>[ 8.644483] systemd-journald[107]: Vacuuming...
811 22:22:03.571897 <47>[ 8.644920] systemd-journald[107]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
812 22:22:03.573426 <47>[ 8.646447] systemd-journald[107]: varlink-21: Sending message: {\"parameters\":{}}
813 22:22:03.573613 <47>[ 8.646709] systemd-journald[107]: varlink-21: varlink: changing state processing-method → processed-method
814 22:22:03.573829 <47>[ 8.647089] systemd-journald[107]: varlink-21: varlink: changing state processed-method → idle-server
815 22:22:03.588682 <47>[ 8.661743] systemd-journald[107]: varlink-21: varlink: changing state idle-server → pending-disconnect
816 22:22:03.588921 <47>[ 8.662130] systemd-journald[107]: varlink-21: varlink: changing state pending-disconnect → processing-disconnect
817 22:22:03.589426 <47>[ 8.662473] systemd-journald[107]: varlink-21: varlink: changing state processing-disconnect → disconnected
818 22:22:03.606596 [[0;32m OK [0m] Finished [0;1;39mFlush Journal to Persistent Storage[0m.
819 22:22:03.607096 <47>[ 8.680323] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
820 22:22:03.661691 Starting [0;1;39mCreate Volatile Files and Directories[0m...
821 22:22:03.680638 <47>[ 8.753656] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
822 22:22:04.094045 [[0;32m OK [0m] Started [0;1;39mRule-based Manager for Device Events and Files[0m.
823 22:22:04.170924 Starting [0;1;39mNetwork Service[0m...
824 22:22:04.201178 [[0;32m OK [0m] Finished [0;1;39mCreate Volatile Files and Directories[0m.
825 22:22:04.206930 <47>[ 9.279954] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
826 22:22:04.290561 Starting [0;1;39mNetwork Time Synchronization[0m...
827 22:22:04.294968 <47>[ 9.367995] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
828 22:22:04.362005 Starting [0;1;39mUpdate UTMP about System Boot/Shutdown[0m...
829 22:22:04.392899 <47>[ 9.465853] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
830 22:22:04.776057 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Boot/Shutdown[0m.
831 22:22:05.675895 <47>[ 10.748603] systemd-journald[107]: Data hash table of /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal has a fill level at 75.0 (3329 of 4437 items, 2555904 file size, 767 bytes per hash table item), suggesting rotation.
832 22:22:05.676264 <47>[ 10.749269] systemd-journald[107]: /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal: Journal header limits reached or header out-of-date, rotating.
833 22:22:05.692602 <47>[ 10.765637] systemd-journald[107]: Rotating...
834 22:22:05.693624 <47>[ 10.766706] systemd-journald[107]: Journal effective settings seal=no keyed_hash=no compress=yes compress_threshold_bytes=512B
835 22:22:05.695000 <47>[ 10.768121] systemd-journald[107]: Reserving 333 entries in field hash table.
836 22:22:05.755550 <47>[ 10.828497] systemd-journald[107]: Reserving 4437 entries in data hash table.
837 22:22:05.770431 [[0;32m OK [0m] Started [0;1;39mNetwork Service[0m.
838 22:22:05.773728 <47>[ 10.847024] systemd-journald[107]: Vacuuming...
839 22:22:05.775761 <47>[ 10.848671] systemd-journald[107]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
840 22:22:05.891226 Starting [0;1;39mNetwork Name Resolution[0m...
841 22:22:05.919619 <47>[ 10.992510] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
842 22:22:06.144907 [[0;32m OK [0m] Started [0;1;39mNetwork Time Synchronization[0m.
843 22:22:06.147120 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Set[0m.
844 22:22:06.161249 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Synchronized[0m.
845 22:22:06.234712 <47>[ 11.307665] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
846 22:22:07.394094 [[0;32m OK [0m] Finished [0;1;39mColdplug All udev Devices[0m.
847 22:22:07.404543 [[0;32m OK [0m] Reached target [0;1;39mSystem Initialization[0m.
848 22:22:07.427411 [[0;32m OK [0m] Started [0;1;39mPeriodic ext4 Onli…ata Check for All Filesystems[0m.
849 22:22:07.442063 [[0;32m OK [0m] Started [0;1;39mDiscard unused blocks once a week[0m.
850 22:22:07.451466 [[0;32m OK [0m] Started [0;1;39mDaily Cleanup of Temporary Directories[0m.
851 22:22:07.460764 [[0;32m OK [0m] Reached target [0;1;39mTimers[0m.
852 22:22:07.485167 [[0;32m OK [0m] Listening on [0;1;39mD-Bus System Message Bus Socket[0m.
853 22:22:07.486035 [[0;32m OK [0m] Reached target [0;1;39mSockets[0m.
854 22:22:07.486452 [[0;32m OK [0m] Reached target [0;1;39mBasic System[0m.
855 22:22:07.550083 [[0;32m OK [0m] Started [0;1;39mD-Bus System Message Bus[0m.
856 22:22:07.566619 <47>[ 12.639848] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
857 22:22:07.725592 <47>[ 12.798627] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
858 22:22:07.726589 Starting [0;1;39mRemove Stale Onli…t4 Metadata Check Snapshots[0m...
859 22:22:07.913823 Starting [0;1;39mUser Login Management[0m...
860 22:22:07.934883 <47>[ 13.007861] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
861 22:22:08.239188 [[0;32m OK [0m] Started [0;1;39mNetwork Name Resolution[0m.
862 22:22:08.240861 [[0;32m OK [0m] Reached target [0;1;39mNetwork[0m.
863 22:22:08.243851 [[0;32m OK [0m] Reached target [0;1;39mHost and Network Name Lookups[0m.
864 22:22:08.313806 Starting [0;1;39mPermit User Sessions[0m...
865 22:22:08.332506 <47>[ 13.405558] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
866 22:22:08.509984 [[0;32m OK [0m] Finished [0;1;39mPermit User Sessions[0m.
867 22:22:08.582936 [[0;32m OK [0m] Started [0;1;39mGetty on tty1[0m.
868 22:22:08.633596 [[0;32m OK [0m] Finished [0;1;39mRemove Stale Onli…ext4 Metadata Check Snapshots[0m.
869 22:22:09.049412 [[0;32m OK [0m] Started [0;1;39mUser Login Management[0m.
870 22:22:11.066618 [[0;32m OK [0m] Found device [0;1;39m/dev/ttyAMA0[0m.
871 22:22:11.122018 [[0;32m OK [0m] Started [0;1;39mSerial Getty on ttyAMA0[0m.
872 22:22:11.146457 [[0;32m OK [0m] Reached target [0;1;39mLogin Prompts[0m.
873 22:22:11.157777 [[0;32m OK [0m] Reached target [0;1;39mMulti-User System[0m.
874 22:22:11.172650 [[0;32m OK [0m] Reached target [0;1;39mGraphical Interface[0m.
875 22:22:11.253199 Starting [0;1;39mUpdate UTMP about System Runlevel Changes[0m...
876 22:22:11.262679 <47>[ 16.335691] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
877 22:22:11.446434 <6>[ 16.519597] virtio_net virtio0 enp0s1: renamed from eth0
878 22:22:11.459983 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Runlevel Changes[0m.
879 22:22:11.493328 <47>[ 16.566304] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
880 22:22:11.495827 <47>[ 16.568811] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
881 22:22:11.567288
882 22:22:11.567592 Debian GNU/Linux 11 debian-bullseye-arm64 ttyAMA0
883 22:22:11.567737
884 22:22:11.578884 debian-bullseye-arm64 login: root (automatic login)
885 22:22:11.579269
886 22:22:11.874520 Linux debian-bullseye-arm64 6.1.31 #1 SMP PREEMPT Sun Jun 4 22:03:45 UTC 2023 aarch64
887 22:22:11.875147
888 22:22:11.875304 The programs included with the Debian GNU/Linux system are free software;
889 22:22:11.875747 the exact distribution terms for each program are described in the
890 22:22:11.875909 individual files in /usr/share/doc/*/copyright.
891 22:22:11.876031
892 22:22:11.876147 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
893 22:22:11.876263 permitted by applicable law.
894 22:22:12.389556 <47>[ 17.462520] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
895 22:22:12.403626 <47>[ 17.476335] systemd-journald[107]: Data hash table of /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal has a fill level at 75.0 (3328 of 4437 items, 2555904 file size, 768 bytes per hash table item), suggesting rotation.
896 22:22:12.403958 <47>[ 17.476947] systemd-journald[107]: /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal: Journal header limits reached or header out-of-date, rotating.
897 22:22:12.404153 <47>[ 17.477381] systemd-journald[107]: Rotating...
898 22:22:12.413814 <47>[ 17.486733] systemd-journald[107]: Reserving 333 entries in field hash table.
899 22:22:12.438076 <47>[ 17.510934] systemd-journald[107]: Reserving 4437 entries in data hash table.
900 22:22:12.454108 <47>[ 17.527405] systemd-journald[107]: Vacuuming...
901 22:22:12.455349 <47>[ 17.528415] systemd-journald[107]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
902 22:22:12.698441 <47>[ 17.771524] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
903 22:22:14.268739 <47>[ 19.341725] systemd-journald[107]: Successfully sent stream file descriptor to service manager.
904 22:22:14.615397 Matched prompt #10: / #
906 22:22:14.615860 Setting prompt string to ['/ #']
907 22:22:14.616042 end: 2.2.1 login-action (duration 00:00:20) [common]
909 22:22:14.616441 end: 2.2 auto-login-action (duration 00:00:22) [common]
910 22:22:14.616604 start: 2.3 expect-shell-connection (timeout 00:04:36) [common]
911 22:22:14.616737 Setting prompt string to ['/ #']
912 22:22:14.616855 Forcing a shell prompt, looking for ['/ #']
914 22:22:14.667387 / #
915 22:22:14.667586 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
916 22:22:14.667735 Waiting using forced prompt support (timeout 00:02:30)
917 22:22:14.669834
918 22:22:14.678489 end: 2.3 expect-shell-connection (duration 00:00:00) [common]
919 22:22:14.678738 start: 2.4 export-device-env (timeout 00:04:36) [common]
920 22:22:14.678923 end: 2.4 export-device-env (duration 00:00:00) [common]
921 22:22:14.679087 end: 2 boot-image-retry (duration 00:00:24) [common]
922 22:22:14.679244 start: 3 lava-test-retry (timeout 00:08:57) [common]
923 22:22:14.679404 start: 3.1 lava-test-shell (timeout 00:08:57) [common]
924 22:22:14.679538 Using namespace: common
926 22:22:14.780415 / # #
927 22:22:14.780670 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
928 22:22:14.781436 #
930 22:22:14.889697 / # mkdir /lava-559916
931 22:22:14.890417 mkdir /lava-559916
933 22:22:15.019606 / # mount /dev/disk/by-uuid/40b216ed-d30d-46fc-ac56-f02bed896a10 -t ext2 /lava-559916
934 22:22:15.020778 mount /dev/disk/by-uuid/40b216ed-d30d-46fc-ac56-f02bed896a10 -t ext2 /lava-559916
935 22:22:15.058439 <4>[ 20.131236] ext2 filesystem being mounted at /lava-559916 supports timestamps until 2038 (0x7fffffff)
937 22:22:15.197702 / # ls -la /lava-559916/bin/lava-test-runner
938 22:22:15.198697 ls -la /lava-559916/bin/lava-test-runner
939 22:22:15.236843 -rwxr-xr-x 1 root root 1039 Jun 4 22:21 /lava-559916/bin/lava-test-runner
940 22:22:15.248097 Using /lava-559916
942 22:22:15.349080 / # export SHELL=/bin/sh
943 22:22:15.350133 export SHELL=/bin/sh
945 22:22:15.458430 / # . /lava-559916/environment
946 22:22:15.459320 . /lava-559916/environment
948 22:22:15.570100 / # /lava-559916/bin/lava-test-runner /lava-559916/0
949 22:22:15.570396 Test shell timeout: 10s (minimum of the action and connection timeout)
950 22:22:15.571135 /lava-559916/bin/lava-test-runner /lava-559916/0
951 22:22:15.725722 + export TESTRUN_ID=0_timesync-off
952 22:22:15.725957 + cd /lava-559916/0/tests/0_timesync-off
953 22:22:15.728045 + cat uuid
954 22:22:15.735435 + UUID=559916_1.1.3.1
955 22:22:15.735630 + set +x
956 22:22:15.735846 <LAVA_SIGNAL_STARTRUN 0_timesync-off 559916_1.1.3.1>
957 22:22:15.736019 + systemctl stop systemd-timesyncd
958 22:22:15.736352 Received signal: <STARTRUN> 0_timesync-off 559916_1.1.3.1
959 22:22:15.736489 Starting test lava.0_timesync-off (559916_1.1.3.1)
960 22:22:15.736657 Skipping test definition patterns.
961 22:22:15.963492 + set +x
962 22:22:15.963764 <LAVA_SIGNAL_ENDRUN 0_timesync-off 559916_1.1.3.1>
963 22:22:15.964096 Received signal: <ENDRUN> 0_timesync-off 559916_1.1.3.1
964 22:22:15.964249 Ending use of test pattern.
965 22:22:15.964373 Ending test lava.0_timesync-off (559916_1.1.3.1), duration 0.23
967 22:22:16.003802 + export TESTRUN_ID=1_kselftest-arm64_qemu
968 22:22:16.003996 + cd /lava-559916/0/tests/1_kselftest-arm64_qemu
969 22:22:16.005681 + cat uuid
970 22:22:16.013206 + UUID=559916_1.1.3.5
971 22:22:16.013388 + set +x
972 22:22:16.013563 <LAVA_SIGNAL_STARTRUN 1_kselftest-arm64_qemu 559916_1.1.3.5>
973 22:22:16.013703 + cd ./automated/linux/kselftest/
974 22:22:16.014017 Received signal: <STARTRUN> 1_kselftest-arm64_qemu 559916_1.1.3.5
975 22:22:16.014148 Starting test lava.1_kselftest-arm64_qemu (559916_1.1.3.5)
976 22:22:16.014301 Skipping test definition patterns.
977 22:22:16.017565 + ./kselftest.sh -c arm64 -T -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1281-g84d5372e0f314/arm64/defconfig/gcc-10/kselftest.tar.xz -L -S /dev/null -b qemu_arm64-virt-gicv3 -g cip -e -p /opt/kselftests/mainline/ -n 1 -i 1
978 22:22:16.107029 INFO: install_deps skipped
979 22:22:16.139537 --2023-06-04 22:22:16-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1281-g84d5372e0f314/arm64/defconfig/gcc-10/kselftest.tar.xz
980 22:22:16.184494 Resolving storage.kernelci.org (storage.kernelci.org)... 52.250.1.28
981 22:22:16.377890 Connecting to storage.kernelci.org (storage.kernelci.org)|52.250.1.28|:80... connected.
982 22:22:16.569407 HTTP request sent, awaiting response... 200 OK
983 22:22:16.572013 Length: 2714056 (2.6M) [application/octet-stream]
984 22:22:16.573389 Saving to: 'kselftest.tar.xz'
985 22:22:16.574622
986 22:22:18.005718 kselftest.tar.xz 0%[ ] 0 --.-KB/s kselftest.tar.xz 1%[ ] 50.15K 145KB/s kselftest.tar.xz 6%[> ] 170.35K 242KB/s kselftest.tar.xz 22%[===> ] 603.05K 568KB/s kselftest.tar.xz 48%[========> ] 1.26M 1023KB/s kselftest.tar.xz 100%[===================>] 2.59M 1.80MB/s in 1.4s
987 22:22:18.006031
988 22:22:18.013137 2023-06-04 22:22:17 (1.80 MB/s) - 'kselftest.tar.xz' saved [2714056/2714056]
989 22:22:18.013317
990 22:22:20.917326 skiplist:
991 22:22:20.917609 ========================================
992 22:22:20.917987 ========================================
993 22:22:20.966805 arm64:tags_test
994 22:22:20.967148 arm64:run_tags_test.sh
995 22:22:20.967334 arm64:fake_sigreturn_bad_magic
996 22:22:20.967727 arm64:fake_sigreturn_bad_size
997 22:22:20.967924 arm64:fake_sigreturn_bad_size_for_magic0
998 22:22:20.968106 arm64:fake_sigreturn_duplicated_fpsimd
999 22:22:20.968286 arm64:fake_sigreturn_misaligned_sp
1000 22:22:20.968455 arm64:fake_sigreturn_missing_fpsimd
1001 22:22:20.968621 arm64:fake_sigreturn_sme_change_vl
1002 22:22:20.968786 arm64:fake_sigreturn_sve_change_vl
1003 22:22:20.968952 arm64:mangle_pstate_invalid_compat_toggle
1004 22:22:20.969114 arm64:mangle_pstate_invalid_daif_bits
1005 22:22:20.969271 arm64:mangle_pstate_invalid_mode_el1h
1006 22:22:20.969436 arm64:mangle_pstate_invalid_mode_el1t
1007 22:22:20.969632 arm64:mangle_pstate_invalid_mode_el2h
1008 22:22:20.969775 arm64:mangle_pstate_invalid_mode_el2t
1009 22:22:20.969893 arm64:mangle_pstate_invalid_mode_el3h
1010 22:22:20.970007 arm64:mangle_pstate_invalid_mode_el3t
1011 22:22:20.970120 arm64:sme_trap_no_sm
1012 22:22:20.970232 arm64:sme_trap_non_streaming
1013 22:22:20.970344 arm64:sme_trap_za
1014 22:22:20.970455 arm64:sme_vl
1015 22:22:20.970565 arm64:ssve_regs
1016 22:22:20.970675 arm64:sve_regs
1017 22:22:20.970786 arm64:sve_vl
1018 22:22:20.970896 arm64:za_no_regs
1019 22:22:20.971006 arm64:za_regs
1020 22:22:20.971116 arm64:pac
1021 22:22:20.971227 arm64:fp-stress
1022 22:22:20.971337 arm64:sve-ptrace
1023 22:22:20.971448 arm64:sve-probe-vls
1024 22:22:20.971560 arm64:vec-syscfg
1025 22:22:20.971683 arm64:za-fork
1026 22:22:20.971797 arm64:za-ptrace
1027 22:22:20.971907 arm64:check_buffer_fill
1028 22:22:20.972018 arm64:check_child_memory
1029 22:22:20.972128 arm64:check_gcr_el1_cswitch
1030 22:22:20.972237 arm64:check_ksm_options
1031 22:22:20.972346 arm64:check_mmap_options
1032 22:22:20.972455 arm64:check_prctl
1033 22:22:20.972566 arm64:check_tags_inclusion
1034 22:22:20.972679 arm64:check_user_mem
1035 22:22:20.972878 arm64:btitest
1036 22:22:20.972993 arm64:nobtitest
1037 22:22:20.973104 arm64:hwcap
1038 22:22:20.973214 arm64:ptrace
1039 22:22:20.973323 arm64:syscall-abi
1040 22:22:20.973432 arm64:tpidr2
1041 22:22:20.981184 ============== Tests to run ===============
1042 22:22:20.985588 arm64:tags_test
1043 22:22:20.985802 arm64:run_tags_test.sh
1044 22:22:20.985998 arm64:fake_sigreturn_bad_magic
1045 22:22:20.986167 arm64:fake_sigreturn_bad_size
1046 22:22:20.986310 arm64:fake_sigreturn_bad_size_for_magic0
1047 22:22:20.986686 arm64:fake_sigreturn_duplicated_fpsimd
1048 22:22:20.986879 arm64:fake_sigreturn_misaligned_sp
1049 22:22:20.987051 arm64:fake_sigreturn_missing_fpsimd
1050 22:22:20.987259 arm64:fake_sigreturn_sme_change_vl
1051 22:22:20.987471 arm64:fake_sigreturn_sve_change_vl
1052 22:22:20.987667 arm64:mangle_pstate_invalid_compat_toggle
1053 22:22:20.987878 arm64:mangle_pstate_invalid_daif_bits
1054 22:22:20.988068 arm64:mangle_pstate_invalid_mode_el1h
1055 22:22:20.988289 arm64:mangle_pstate_invalid_mode_el1t
1056 22:22:20.988493 arm64:mangle_pstate_invalid_mode_el2h
1057 22:22:20.988625 arm64:mangle_pstate_invalid_mode_el2t
1058 22:22:20.988738 arm64:mangle_pstate_invalid_mode_el3h
1059 22:22:20.988848 arm64:mangle_pstate_invalid_mode_el3t
1060 22:22:20.988955 arm64:sme_trap_no_sm
1061 22:22:20.989063 arm64:sme_trap_non_streaming
1062 22:22:20.989171 arm64:sme_trap_za
1063 22:22:20.989278 arm64:sme_vl
1064 22:22:20.989385 arm64:ssve_regs
1065 22:22:20.989491 arm64:sve_regs
1066 22:22:20.989600 arm64:sve_vl
1067 22:22:20.989825 arm64:za_no_regs
1068 22:22:20.990020 arm64:za_regs
1069 22:22:20.990200 arm64:pac
1070 22:22:20.990378 arm64:fp-stress
1071 22:22:20.990531 arm64:sve-ptrace
1072 22:22:20.990675 arm64:sve-probe-vls
1073 22:22:20.990813 arm64:vec-syscfg
1074 22:22:20.990949 arm64:za-fork
1075 22:22:20.991086 arm64:za-ptrace
1076 22:22:20.991224 arm64:check_buffer_fill
1077 22:22:20.991360 arm64:check_child_memory
1078 22:22:20.991499 arm64:check_gcr_el1_cswitch
1079 22:22:20.991640 arm64:check_ksm_options
1080 22:22:20.991776 arm64:check_mmap_options
1081 22:22:20.991912 arm64:check_prctl
1082 22:22:20.992049 arm64:check_tags_inclusion
1083 22:22:20.992186 arm64:check_user_mem
1084 22:22:20.992323 arm64:btitest
1085 22:22:20.992462 arm64:nobtitest
1086 22:22:20.992600 arm64:hwcap
1087 22:22:20.992737 arm64:ptrace
1088 22:22:20.992873 arm64:syscall-abi
1089 22:22:20.993012 arm64:tpidr2
1090 22:22:20.993186 ===========End Tests to run ===============
1091 22:22:21.884854 <12>[ 26.957889] kselftest: Running tests in arm64
1092 22:22:21.912911 TAP version 13
1093 22:22:21.930449 1..48
1094 22:22:21.976878 # selftests: arm64: tags_test
1095 22:22:22.028376 ok 1 selftests: arm64: tags_test
1096 22:22:22.075317 # selftests: arm64: run_tags_test.sh
1097 22:22:22.124131 # --------------------
1098 22:22:22.124406 # running tags test
1099 22:22:22.124534 # --------------------
1100 22:22:22.124651 # [PASS]
1101 22:22:22.130054 ok 2 selftests: arm64: run_tags_test.sh
1102 22:22:22.176555 # selftests: arm64: fake_sigreturn_bad_magic
1103 22:22:22.225292 # Registered handlers for all signals.
1104 22:22:22.225538 # Detected MINSTKSIGSZ:10000
1105 22:22:22.225697 # Testcase initialized.
1106 22:22:22.225898 # uc context validated.
1107 22:22:22.226282 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1108 22:22:22.226417 # Handled SIG_COPYCTX
1109 22:22:22.226533 # Available space:3536
1110 22:22:22.226643 # Using badly built context - ERR: BAD MAGIC !
1111 22:22:22.226753 # SIG_OK -- SP:0xFFFFDEA0E160 si_addr@:0xffffdea0e160 si_code:2 token@:0xffffdea0cf00 offset:-4704
1112 22:22:22.226865 # ==>> completed. PASS(1)
1113 22:22:22.226975 # # FAKE_SIGRETURN_BAD_MAGIC :: Trigger a sigreturn with a sigframe with a bad magic
1114 22:22:22.227087 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFDEA0CF00
1115 22:22:22.234122 ok 3 selftests: arm64: fake_sigreturn_bad_magic
1116 22:22:22.278358 # selftests: arm64: fake_sigreturn_bad_size
1117 22:22:22.324752 # Registered handlers for all signals.
1118 22:22:22.324938 # Detected MINSTKSIGSZ:10000
1119 22:22:22.325111 # Testcase initialized.
1120 22:22:22.325267 # uc context validated.
1121 22:22:22.325641 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1122 22:22:22.325843 # Handled SIG_COPYCTX
1123 22:22:22.325990 # Available space:3536
1124 22:22:22.326106 # uc context validated.
1125 22:22:22.326217 # Using badly built context - ERR: Bad size for esr_context
1126 22:22:22.326327 # SIG_OK -- SP:0xFFFFC32AF8F0 si_addr@:0xffffc32af8f0 si_code:2 token@:0xffffc32ae690 offset:-4704
1127 22:22:22.326440 # ==>> completed. PASS(1)
1128 22:22:22.326549 # # FAKE_SIGRETURN_BAD_SIZE :: Triggers a sigreturn with a overrun __reserved area
1129 22:22:22.326684 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFC32AE690
1130 22:22:22.334522 ok 4 selftests: arm64: fake_sigreturn_bad_size
1131 22:22:22.378772 # selftests: arm64: fake_sigreturn_bad_size_for_magic0
1132 22:22:22.427721 # Registered handlers for all signals.
1133 22:22:22.427983 # Detected MINSTKSIGSZ:10000
1134 22:22:22.428154 # Testcase initialized.
1135 22:22:22.428309 # uc context validated.
1136 22:22:22.428463 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1137 22:22:22.428616 # Handled SIG_COPYCTX
1138 22:22:22.429001 # Available space:3536
1139 22:22:22.429953 # Using badly built context - ERR: Bad size for terminator
1140 22:22:22.430357 # SIG_OK -- SP:0xFFFFFC3E1A00 si_addr@:0xfffffc3e1a00 si_code:2 token@:0xfffffc3e07a0 offset:-4704
1141 22:22:22.430523 # ==>> completed. PASS(1)
1142 22:22:22.430640 # # FAKE_SIGRETURN_BAD_SIZE_FOR_TERMINATOR :: Trigger a sigreturn using non-zero size terminator
1143 22:22:22.430773 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFFC3E07A0
1144 22:22:22.437096 ok 5 selftests: arm64: fake_sigreturn_bad_size_for_magic0
1145 22:22:22.481798 # selftests: arm64: fake_sigreturn_duplicated_fpsimd
1146 22:22:22.529439 # Registered handlers for all signals.
1147 22:22:22.529638 # Detected MINSTKSIGSZ:10000
1148 22:22:22.529826 # Testcase initialized.
1149 22:22:22.529988 # uc context validated.
1150 22:22:22.530147 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1151 22:22:22.530521 # Handled SIG_COPYCTX
1152 22:22:22.530652 # Available space:3536
1153 22:22:22.530768 # Using badly built context - ERR: Multiple FPSIMD_MAGIC
1154 22:22:22.530883 # SIG_OK -- SP:0xFFFFE8242310 si_addr@:0xffffe8242310 si_code:2 token@:0xffffe82410b0 offset:-4704
1155 22:22:22.530998 # ==>> completed. PASS(1)
1156 22:22:22.531112 # # FAKE_SIGRETURN_DUPLICATED_FPSIMD :: Triggers a sigreturn including two fpsimd_context
1157 22:22:22.531227 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFE82410B0
1158 22:22:22.537772 ok 6 selftests: arm64: fake_sigreturn_duplicated_fpsimd
1159 22:22:22.582047 # selftests: arm64: fake_sigreturn_misaligned_sp
1160 22:22:22.629504 # Registered handlers for all signals.
1161 22:22:22.629723 # Detected MINSTKSIGSZ:10000
1162 22:22:22.629894 # Testcase initialized.
1163 22:22:22.630054 # uc context validated.
1164 22:22:22.630194 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1165 22:22:22.630522 # Handled SIG_COPYCTX
1166 22:22:22.630648 # SIG_OK -- SP:0xFFFFE82DBEE3 si_addr@:0xffffe82dbee3 si_code:2 token@:0xffffe82dbee3 offset:0
1167 22:22:22.630767 # ==>> completed. PASS(1)
1168 22:22:22.630879 # # FAKE_SIGRETURN_MISALIGNED_SP :: Triggers a sigreturn with a misaligned sigframe
1169 22:22:22.630992 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFE82DBEE3
1170 22:22:22.637750 ok 7 selftests: arm64: fake_sigreturn_misaligned_sp
1171 22:22:22.681278 # selftests: arm64: fake_sigreturn_missing_fpsimd
1172 22:22:22.730283 # Registered handlers for all signals.
1173 22:22:22.730567 # Detected MINSTKSIGSZ:10000
1174 22:22:22.730999 # Testcase initialized.
1175 22:22:22.731194 # uc context validated.
1176 22:22:22.731342 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1177 22:22:22.731503 # Handled SIG_COPYCTX
1178 22:22:22.731657 # Mangling template header. Spare space:4096
1179 22:22:22.731812 # Using badly built context - ERR: Missing FPSIMD
1180 22:22:22.732702 # SIG_OK -- SP:0xFFFFDDD25780 si_addr@:0xffffddd25780 si_code:2 token@:0xffffddd24520 offset:-4704
1181 22:22:22.732897 # ==>> completed. PASS(1)
1182 22:22:22.733286 # # FAKE_SIGRETURN_MISSING_FPSIMD :: Triggers a sigreturn with a missing fpsimd_context
1183 22:22:22.733476 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFDDD24520
1184 22:22:22.739948 ok 8 selftests: arm64: fake_sigreturn_missing_fpsimd
1185 22:22:22.787154 # selftests: arm64: fake_sigreturn_sme_change_vl
1186 22:22:22.841062 # Registered handlers for all signals.
1187 22:22:22.841552 # Detected MINSTKSIGSZ:10000
1188 22:22:22.841788 # Required Features: [ SME ] supported
1189 22:22:22.841995 # Incompatible Features: [] absent
1190 22:22:22.842178 # Testcase initialized.
1191 22:22:22.842375 # uc context validated.
1192 22:22:22.842593 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1193 22:22:22.842771 # Handled SIG_COPYCTX
1194 22:22:22.842938 # Attempting to change VL from 16 to 256
1195 22:22:22.843100 # SIG_OK -- SP:0xFFFFC94766A0 si_addr@:0xffffc94766a0 si_code:2 token@:0xffffc9475440 offset:-4704
1196 22:22:22.843227 # ==>> completed. PASS(1)
1197 22:22:22.851890 # # FAKE_SIGRETURN_SSVE_CHANGE :: Attempt to change Streaming SVE VL
1198 22:22:22.852327 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFC9475440
1199 22:22:22.852487 ok 9 selftests: arm64: fake_sigreturn_sme_change_vl
1200 22:22:22.894970 # selftests: arm64: fake_sigreturn_sve_change_vl
1201 22:22:22.942593 # Registered handlers for all signals.
1202 22:22:22.942918 # Detected MINSTKSIGSZ:10000
1203 22:22:22.943101 # Required Features: [ SVE ] supported
1204 22:22:22.943264 # Incompatible Features: [] absent
1205 22:22:22.943426 # Testcase initialized.
1206 22:22:22.943625 # uc context validated.
1207 22:22:22.943822 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1208 22:22:22.943966 # Handled SIG_COPYCTX
1209 22:22:22.944082 # Attempting to change VL from 16 to 256
1210 22:22:22.944193 # SIG_OK -- SP:0xFFFFDF0F99B0 si_addr@:0xffffdf0f99b0 si_code:2 token@:0xffffdf0f8750 offset:-4704
1211 22:22:22.944307 # ==>> completed. PASS(1)
1212 22:22:22.944417 # # FAKE_SIGRETURN_SVE_CHANGE :: Attempt to change SVE VL
1213 22:22:22.944555 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFDF0F8750
1214 22:22:22.952660 ok 10 selftests: arm64: fake_sigreturn_sve_change_vl
1215 22:22:22.996977 # selftests: arm64: mangle_pstate_invalid_compat_toggle
1216 22:22:23.051126 # Registered handlers for all signals.
1217 22:22:23.051353 # Detected MINSTKSIGSZ:10000
1218 22:22:23.051645 # Testcase initialized.
1219 22:22:23.051749 # uc context validated.
1220 22:22:23.051835 # Handled SIG_TRIG
1221 22:22:23.051921 # SIG_OK -- SP:0xFFFFDE9A96D0 si_addr@:0xffffde9a96d0 si_code:2 token@:(nil) offset:-281474416416464
1222 22:22:23.052022 # ==>> completed. PASS(1)
1223 22:22:23.052108 # # MANGLE_PSTATE_INVALID_STATE_TOGGLE :: Mangling uc_mcontext with INVALID STATE_TOGGLE
1224 22:22:23.059092 ok 11 selftests: arm64: mangle_pstate_invalid_compat_toggle
1225 22:22:23.114394 # selftests: arm64: mangle_pstate_invalid_daif_bits
1226 22:22:23.175423 # Registered handlers for all signals.
1227 22:22:23.175989 # Detected MINSTKSIGSZ:10000
1228 22:22:23.176109 # Testcase initialized.
1229 22:22:23.176211 # uc context validated.
1230 22:22:23.176307 # Handled SIG_TRIG
1231 22:22:23.176402 # SIG_OK -- SP:0xFFFFE5501D20 si_addr@:0xffffe5501d20 si_code:2 token@:(nil) offset:-281474528976160
1232 22:22:23.176499 # ==>> completed. PASS(1)
1233 22:22:23.176612 # # MANGLE_PSTATE_INVALID_DAIF_BITS :: Mangling uc_mcontext with INVALID DAIF_BITS
1234 22:22:23.184469 ok 12 selftests: arm64: mangle_pstate_invalid_daif_bits
1235 22:22:23.229469 # selftests: arm64: mangle_pstate_invalid_mode_el1h
1236 22:22:23.279115 # Registered handlers for all signals.
1237 22:22:23.279451 # Detected MINSTKSIGSZ:10000
1238 22:22:23.279878 # Testcase initialized.
1239 22:22:23.280075 # uc context validated.
1240 22:22:23.280246 # Handled SIG_TRIG
1241 22:22:23.280415 # SIG_OK -- SP:0xFFFFD039D1F0 si_addr@:0xffffd039d1f0 si_code:2 token@:(nil) offset:-281474175193584
1242 22:22:23.280585 # ==>> completed. PASS(1)
1243 22:22:23.280749 # # MANGLE_PSTATE_INVALID_MODE_EL1h :: Mangling uc_mcontext INVALID MODE EL1h
1244 22:22:23.287603 ok 13 selftests: arm64: mangle_pstate_invalid_mode_el1h
1245 22:22:23.335235 # selftests: arm64: mangle_pstate_invalid_mode_el1t
1246 22:22:23.385234 # Registered handlers for all signals.
1247 22:22:23.385562 # Detected MINSTKSIGSZ:10000
1248 22:22:23.385798 # Testcase initialized.
1249 22:22:23.386196 # uc context validated.
1250 22:22:23.386360 # Handled SIG_TRIG
1251 22:22:23.386530 # SIG_OK -- SP:0xFFFFEAF1E2D0 si_addr@:0xffffeaf1e2d0 si_code:2 token@:(nil) offset:-281474623464144
1252 22:22:23.386677 # ==>> completed. PASS(1)
1253 22:22:23.386818 # # MANGLE_PSTATE_INVALID_MODE_EL1t :: Mangling uc_mcontext INVALID MODE EL1t
1254 22:22:23.394111 ok 14 selftests: arm64: mangle_pstate_invalid_mode_el1t
1255 22:22:23.440895 # selftests: arm64: mangle_pstate_invalid_mode_el2h
1256 22:22:23.490493 # Registered handlers for all signals.
1257 22:22:23.490831 # Detected MINSTKSIGSZ:10000
1258 22:22:23.491250 # Testcase initialized.
1259 22:22:23.491405 # uc context validated.
1260 22:22:23.491529 # Handled SIG_TRIG
1261 22:22:23.491646 # SIG_OK -- SP:0xFFFFD5394570 si_addr@:0xffffd5394570 si_code:2 token@:(nil) offset:-281474259043696
1262 22:22:23.491760 # ==>> completed. PASS(1)
1263 22:22:23.491872 # # MANGLE_PSTATE_INVALID_MODE_EL2h :: Mangling uc_mcontext INVALID MODE EL2h
1264 22:22:23.499046 ok 15 selftests: arm64: mangle_pstate_invalid_mode_el2h
1265 22:22:23.546083 # selftests: arm64: mangle_pstate_invalid_mode_el2t
1266 22:22:23.594129 # Registered handlers for all signals.
1267 22:22:23.594401 # Detected MINSTKSIGSZ:10000
1268 22:22:23.594814 # Testcase initialized.
1269 22:22:23.594982 # uc context validated.
1270 22:22:23.595105 # Handled SIG_TRIG
1271 22:22:23.595220 # SIG_OK -- SP:0xFFFFE07956F0 si_addr@:0xffffe07956f0 si_code:2 token@:(nil) offset:-281474447791856
1272 22:22:23.595338 # ==>> completed. PASS(1)
1273 22:22:23.595453 # # MANGLE_PSTATE_INVALID_MODE_EL2t :: Mangling uc_mcontext INVALID MODE EL2t
1274 22:22:23.600629 ok 16 selftests: arm64: mangle_pstate_invalid_mode_el2t
1275 22:22:23.647423 # selftests: arm64: mangle_pstate_invalid_mode_el3h
1276 22:22:23.695482 # Registered handlers for all signals.
1277 22:22:23.695751 # Detected MINSTKSIGSZ:10000
1278 22:22:23.695931 # Testcase initialized.
1279 22:22:23.699365 # uc context validated.
1280 22:22:23.707285 # Handled SIG_TRIG
1281 22:22:23.707667 # SIG_OK -- SP:0xFFFFE979E7F0 si_addr@:0xffffe979e7f0 si_code:2 token@:(nil) offset:-281474598823920
1282 22:22:23.707771 # ==>> completed. PASS(1)
1283 22:22:23.708071 # # MANGLE_PSTATE_INVALID_MODE_EL3h :: Mangling uc_mcontext INVALID MODE EL3h
1284 22:22:23.708382 ok 17 selftests: arm64: mangle_pstate_invalid_mode_el3h
1285 22:22:23.753510 # selftests: arm64: mangle_pstate_invalid_mode_el3t
1286 22:22:23.802112 # Registered handlers for all signals.
1287 22:22:23.802438 # Detected MINSTKSIGSZ:10000
1288 22:22:23.802617 # Testcase initialized.
1289 22:22:23.803032 # uc context validated.
1290 22:22:23.803214 # Handled SIG_TRIG
1291 22:22:23.803381 # SIG_OK -- SP:0xFFFFC776A290 si_addr@:0xffffc776a290 si_code:2 token@:(nil) offset:-281474028184208
1292 22:22:23.803550 # ==>> completed. PASS(1)
1293 22:22:23.803716 # # MANGLE_PSTATE_INVALID_MODE_EL3t :: Mangling uc_mcontext INVALID MODE EL3t
1294 22:22:23.810266 ok 18 selftests: arm64: mangle_pstate_invalid_mode_el3t
1295 22:22:23.856798 # selftests: arm64: sme_trap_no_sm
1296 22:22:23.978192 # Registered handlers for all signals.
1297 22:22:23.978550 # Detected MINSTKSIGSZ:10000
1298 22:22:23.978748 # Required Features: [ SME ] supported
1299 22:22:23.980435 # Incompatible Features: [] absent
1300 22:22:23.980548 # Testcase initialized.
1301 22:22:23.980838 # SIG_OK -- SP:0xFFFFC26879B0 si_addr@:0xaaaacb452514 si_code:1 token@:(nil) offset:-187650531468564
1302 22:22:23.980942 # ==>> completed. PASS(1)
1303 22:22:23.981050 # # SME trap without SM :: Check that we get a SIGILL if we use streaming mode without enabling it
1304 22:22:24.000228 ok 19 selftests: arm64: sme_trap_no_sm
1305 22:22:24.088313 # selftests: arm64: sme_trap_non_streaming
1306 22:22:24.156480 # Registered handlers for all signals.
1307 22:22:24.156724 # Detected MINSTKSIGSZ:10000
1308 22:22:24.156812 # Required Features: [] NOT supported
1309 22:22:24.157106 # Incompatible Features: [] supported
1310 22:22:24.157207 # ==>> completed. SKIP.
1311 22:22:24.157300 # # SME SM trap unsupported instruction :: Check that we get a SIGILL if we use an unsupported instruction in streaming mode
1312 22:22:24.165341 ok 20 selftests: arm64: sme_trap_non_streaming # SKIP
1313 22:22:24.214376 # selftests: arm64: sme_trap_za
1314 22:22:24.265168 # Registered handlers for all signals.
1315 22:22:24.265512 # Detected MINSTKSIGSZ:10000
1316 22:22:24.265931 # Testcase initialized.
1317 22:22:24.266100 # SIG_OK -- SP:0xFFFFC3AAB400 si_addr@:0xaaaacb232510 si_code:1 token@:(nil) offset:-187650529240336
1318 22:22:24.266260 # ==>> completed. PASS(1)
1319 22:22:24.267658 # # SME ZA trap :: Check that we get a SIGILL if we access ZA without enabling
1320 22:22:24.273707 ok 21 selftests: arm64: sme_trap_za
1321 22:22:24.321715 # selftests: arm64: sme_vl
1322 22:22:24.372130 # Registered handlers for all signals.
1323 22:22:24.372620 # Detected MINSTKSIGSZ:10000
1324 22:22:24.372819 # Required Features: [ SME ] supported
1325 22:22:24.372956 # Incompatible Features: [] absent
1326 22:22:24.373114 # Testcase initialized.
1327 22:22:24.373275 # uc context validated.
1328 22:22:24.373437 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1329 22:22:24.373844 # Handled SIG_COPYCTX
1330 22:22:24.374037 # got expected VL 32
1331 22:22:24.374203 # ==>> completed. PASS(1)
1332 22:22:24.374364 # # SME VL :: Check that we get the right SME VL reported
1333 22:22:24.380583 ok 22 selftests: arm64: sme_vl
1334 22:22:24.427475 # selftests: arm64: ssve_regs
1335 22:22:24.605065 # Registered handlers for all signals.
1336 22:22:24.605310 # Detected MINSTKSIGSZ:10000
1337 22:22:24.605675 # Required Features: [ SME FA64 ] supported
1338 22:22:24.605913 # Incompatible Features: [] absent
1339 22:22:24.606092 # Testcase initialized.
1340 22:22:24.606259 # Testing VL 256
1341 22:22:24.606418 # Validating EXTRA...
1342 22:22:24.606575 # uc context validated.
1343 22:22:24.606737 # 9360 byte GOOD CONTEXT grabbed from sig_copyctx handler
1344 22:22:24.606896 # Handled SIG_COPYCTX
1345 22:22:24.607092 # Got expected size 8752 and VL 256
1346 22:22:24.607249 # Testing VL 128
1347 22:22:24.607402 # Validating EXTRA...
1348 22:22:24.607563 # uc context validated.
1349 22:22:24.607719 # 4992 byte GOOD CONTEXT grabbed from sig_copyctx handler
1350 22:22:24.607877 # Handled SIG_COPYCTX
1351 22:22:24.608036 # Got expected size 4384 and VL 128
1352 22:22:24.608193 # Testing VL 64
1353 22:22:24.608345 # uc context validated.
1354 22:22:24.608498 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1355 22:22:24.608654 # Handled SIG_COPYCTX
1356 22:22:24.608809 # Got expected size 2208 and VL 64
1357 22:22:24.608967 # Testing VL 32
1358 22:22:24.609117 # uc context validated.
1359 22:22:24.609265 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1360 22:22:24.609416 # Handled SIG_COPYCTX
1361 22:22:24.609571 # Got expected size 1120 and VL 32
1362 22:22:24.610391 # Testing VL 16
1363 22:22:24.610568 # uc context validated.
1364 22:22:24.610733 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1365 22:22:24.610896 # Handled SIG_COPYCTX
1366 22:22:24.611091 # Got expected size 576 and VL 16
1367 22:22:24.611257 # ==>> completed. PASS(1)
1368 22:22:24.611420 # # Streaming SVE registers :: Check that we get the right Streaming SVE registers reported
1369 22:22:24.615920 ok 23 selftests: arm64: ssve_regs
1370 22:22:24.660158 # selftests: arm64: sve_regs
1371 22:22:25.079752 # Registered handlers for all signals.
1372 22:22:25.079997 # Detected MINSTKSIGSZ:10000
1373 22:22:25.080090 # Required Features: [ SVE ] supported
1374 22:22:25.080453 # Incompatible Features: [] absent
1375 22:22:25.080674 # Testcase initialized.
1376 22:22:25.080877 # Testing VL 256
1377 22:22:25.081050 # Validating EXTRA...
1378 22:22:25.081238 # uc context validated.
1379 22:22:25.081422 # 9360 byte GOOD CONTEXT grabbed from sig_copyctx handler
1380 22:22:25.081636 # Handled SIG_COPYCTX
1381 22:22:25.081911 # Got expected size 8752 and VL 256
1382 22:22:25.082107 # Testing VL 240
1383 22:22:25.082272 # Validating EXTRA...
1384 22:22:25.082412 # uc context validated.
1385 22:22:25.082559 # 8816 byte GOOD CONTEXT grabbed from sig_copyctx handler
1386 22:22:25.082792 # Handled SIG_COPYCTX
1387 22:22:25.083013 # Got expected size 8208 and VL 240
1388 22:22:25.083222 # Testing VL 224
1389 22:22:25.083427 # Validating EXTRA...
1390 22:22:25.083570 # uc context validated.
1391 22:22:25.083689 # 8272 byte GOOD CONTEXT grabbed from sig_copyctx handler
1392 22:22:25.083806 # Handled SIG_COPYCTX
1393 22:22:25.083921 # Got expected size 7664 and VL 224
1394 22:22:25.084038 # Testing VL 208
1395 22:22:25.084154 # Validating EXTRA...
1396 22:22:25.084269 # uc context validated.
1397 22:22:25.084419 # 7728 byte GOOD CONTEXT grabbed from sig_copyctx handler
1398 22:22:25.084543 # Handled SIG_COPYCTX
1399 22:22:25.084659 # Got expected size 7120 and VL 208
1400 22:22:25.084773 # Testing VL 192
1401 22:22:25.084887 # Validating EXTRA...
1402 22:22:25.085001 # uc context validated.
1403 22:22:25.085114 # 7184 byte GOOD CONTEXT grabbed from sig_copyctx handler
1404 22:22:25.085228 # Handled SIG_COPYCTX
1405 22:22:25.085340 # Got expected size 6576 and VL 192
1406 22:22:25.085457 # Testing VL 176
1407 22:22:25.085571 # Validating EXTRA...
1408 22:22:25.085717 # uc context validated.
1409 22:22:25.085866 # 6640 byte GOOD CONTEXT grabbed from sig_copyctx handler
1410 22:22:25.085982 # Handled SIG_COPYCTX
1411 22:22:25.086094 # Got expected size 6032 and VL 176
1412 22:22:25.086206 # Testing VL 160
1413 22:22:25.086317 # Validating EXTRA...
1414 22:22:25.086474 # uc context validated.
1415 22:22:25.093871 # 6096 byte GOOD CONTEXT grabbed from sig_copyctx handler
1416 22:22:25.094133 # Handled SIG_COPYCTX
1417 22:22:25.094477 # Got expected size 5488 and VL 160
1418 22:22:25.094588 # Testing VL 144
1419 22:22:25.094681 # Validating EXTRA...
1420 22:22:25.094765 # uc context validated.
1421 22:22:25.094850 # 5552 byte GOOD CONTEXT grabbed from sig_copyctx handler
1422 22:22:25.094933 # Handled SIG_COPYCTX
1423 22:22:25.095016 # Got expected size 4944 and VL 144
1424 22:22:25.095101 # Testing VL 128
1425 22:22:25.095185 # Validating EXTRA...
1426 22:22:25.095270 # uc context validated.
1427 22:22:25.095374 # 4992 byte GOOD CONTEXT grabbed from sig_copyctx handler
1428 22:22:25.095463 # Handled SIG_COPYCTX
1429 22:22:25.095547 # Got expected size 4384 and VL 128
1430 22:22:25.095632 # Testing VL 112
1431 22:22:25.095716 # Validating EXTRA...
1432 22:22:25.095799 # uc context validated.
1433 22:22:25.095880 # 4448 byte GOOD CONTEXT grabbed from sig_copyctx handler
1434 22:22:25.095964 # Handled SIG_COPYCTX
1435 22:22:25.096046 # Got expected size 3840 and VL 112
1436 22:22:25.096639 # Testing VL 96
1437 22:22:25.097029 # uc context validated.
1438 22:22:25.097206 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1439 22:22:25.097414 # Handled SIG_COPYCTX
1440 22:22:25.097620 # Got expected size 3296 and VL 96
1441 22:22:25.097843 # Testing VL 80
1442 22:22:25.098020 # uc context validated.
1443 22:22:25.098177 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1444 22:22:25.098339 # Handled SIG_COPYCTX
1445 22:22:25.098504 # Got expected size 2752 and VL 80
1446 22:22:25.098674 # Testing VL 64
1447 22:22:25.098886 # uc context validated.
1448 22:22:25.099122 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1449 22:22:25.099262 # Handled SIG_COPYCTX
1450 22:22:25.099377 # Got expected size 2208 and VL 64
1451 22:22:25.099494 # Testing VL 48
1452 22:22:25.099606 # uc context validated.
1453 22:22:25.099717 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1454 22:22:25.099830 # Handled SIG_COPYCTX
1455 22:22:25.099942 # Got expected size 1664 and VL 48
1456 22:22:25.100055 # Testing VL 32
1457 22:22:25.100167 # uc context validated.
1458 22:22:25.100279 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1459 22:22:25.100392 # Handled SIG_COPYCTX
1460 22:22:25.100507 # Got expected size 1120 and VL 32
1461 22:22:25.100619 # Testing VL 16
1462 22:22:25.100755 # uc context validated.
1463 22:22:25.103808 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1464 22:22:25.104017 # Handled SIG_COPYCTX
1465 22:22:25.104169 # Got expected size 576 and VL 16
1466 22:22:25.104289 # ==>> completed. PASS(1)
1467 22:22:25.104410 # # SVE registers :: Check that we get the right SVE registers reported
1468 22:22:25.104574 ok 24 selftests: arm64: sve_regs
1469 22:22:25.165865 # selftests: arm64: sve_vl
1470 22:22:25.220711 # Registered handlers for all signals.
1471 22:22:25.221009 # Detected MINSTKSIGSZ:10000
1472 22:22:25.221355 # Required Features: [ SVE ] supported
1473 22:22:25.221487 # Incompatible Features: [] absent
1474 22:22:25.221606 # Testcase initialized.
1475 22:22:25.221736 # uc context validated.
1476 22:22:25.221851 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1477 22:22:25.221964 # Handled SIG_COPYCTX
1478 22:22:25.222076 # got expected VL 64
1479 22:22:25.222188 # ==>> completed. PASS(1)
1480 22:22:25.222323 # # SVE VL :: Check that we get the right SVE VL reported
1481 22:22:25.227592 ok 25 selftests: arm64: sve_vl
1482 22:22:25.273751 # selftests: arm64: za_no_regs
1483 22:22:25.331126 # Registered handlers for all signals.
1484 22:22:25.331453 # Detected MINSTKSIGSZ:10000
1485 22:22:25.331874 # Required Features: [ SME ] supported
1486 22:22:25.331987 # Incompatible Features: [] absent
1487 22:22:25.332077 # Testcase initialized.
1488 22:22:25.332169 # Testing VL 256
1489 22:22:25.332255 # uc context validated.
1490 22:22:25.332339 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1491 22:22:25.332424 # Handled SIG_COPYCTX
1492 22:22:25.332507 # Got expected size 16 and VL 256
1493 22:22:25.332591 # Testing VL 128
1494 22:22:25.332672 # uc context validated.
1495 22:22:25.332754 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1496 22:22:25.332856 # Handled SIG_COPYCTX
1497 22:22:25.332946 # Got expected size 16 and VL 128
1498 22:22:25.333030 # Testing VL 64
1499 22:22:25.333111 # uc context validated.
1500 22:22:25.333193 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1501 22:22:25.333275 # Handled SIG_COPYCTX
1502 22:22:25.333358 # Got expected size 16 and VL 64
1503 22:22:25.333441 # Testing VL 32
1504 22:22:25.333525 # uc context validated.
1505 22:22:25.333608 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1506 22:22:25.333720 # Handled SIG_COPYCTX
1507 22:22:25.333806 # Got expected size 16 and VL 32
1508 22:22:25.333889 # Testing VL 16
1509 22:22:25.333973 # uc context validated.
1510 22:22:25.334053 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1511 22:22:25.334137 # Handled SIG_COPYCTX
1512 22:22:25.334216 # Got expected size 16 and VL 16
1513 22:22:25.334292 # ==>> completed. PASS(1)
1514 22:22:25.334389 # # ZA registers - ZA disabled :: Check ZA context with ZA disabled
1515 22:22:25.343943 ok 26 selftests: arm64: za_no_regs
1516 22:22:25.390428 # selftests: arm64: za_regs
1517 22:22:25.566511 # Registered handlers for all signals.
1518 22:22:25.566859 # Detected MINSTKSIGSZ:10000
1519 22:22:25.567305 # Required Features: [ SME ] supported
1520 22:22:25.567514 # Incompatible Features: [] absent
1521 22:22:25.567693 # Testcase initialized.
1522 22:22:25.567863 # Testing VL 256
1523 22:22:25.568035 # Validating EXTRA...
1524 22:22:25.568246 # uc context validated.
1525 22:22:25.568464 # 66160 byte GOOD CONTEXT grabbed from sig_copyctx handler
1526 22:22:25.568672 # Handled SIG_COPYCTX
1527 22:22:25.568898 # Got expected size 65552 and VL 256
1528 22:22:25.569100 # Testing VL 128
1529 22:22:25.569289 # Validating EXTRA...
1530 22:22:25.569434 # uc context validated.
1531 22:22:25.569587 # 17008 byte GOOD CONTEXT grabbed from sig_copyctx handler
1532 22:22:25.569771 # Handled SIG_COPYCTX
1533 22:22:25.569964 # Got expected size 16400 and VL 128
1534 22:22:25.570119 # Testing VL 64
1535 22:22:25.570260 # Validating EXTRA...
1536 22:22:25.570405 # uc context validated.
1537 22:22:25.570545 # 4720 byte GOOD CONTEXT grabbed from sig_copyctx handler
1538 22:22:25.570686 # Handled SIG_COPYCTX
1539 22:22:25.570826 # Got expected size 4112 and VL 64
1540 22:22:25.570966 # Testing VL 32
1541 22:22:25.571105 # uc context validated.
1542 22:22:25.571242 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1543 22:22:25.571382 # Handled SIG_COPYCTX
1544 22:22:25.571520 # Got expected size 1040 and VL 32
1545 22:22:25.571659 # Testing VL 16
1546 22:22:25.571799 # uc context validated.
1547 22:22:25.571937 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1548 22:22:25.572077 # Handled SIG_COPYCTX
1549 22:22:25.572215 # Got expected size 272 and VL 16
1550 22:22:25.572356 # ==>> completed. PASS(1)
1551 22:22:25.572494 # # ZA register :: Check that we get the right ZA registers reported
1552 22:22:25.578697 ok 27 selftests: arm64: za_regs
1553 22:22:25.678180 # selftests: arm64: pac
1554 22:22:25.848556 # TAP version 13
1555 22:22:25.848824 # 1..7
1556 22:22:25.848948 # # Starting 7 tests from 1 test cases.
1557 22:22:25.849300 # # RUN global.corrupt_pac ...
1558 22:22:25.849480 # # OK global.corrupt_pac
1559 22:22:25.849611 # ok 1 global.corrupt_pac
1560 22:22:25.849749 # # RUN global.pac_instructions_not_nop ...
1561 22:22:25.849868 # # OK global.pac_instructions_not_nop
1562 22:22:25.849981 # ok 2 global.pac_instructions_not_nop
1563 22:22:25.856868 # # RUN global.pac_instructions_not_nop_generic ...
1564 22:22:25.857339 # # OK global.pac_instructions_not_nop_generic
1565 22:22:25.857499 # ok 3 global.pac_instructions_not_nop_generic
1566 22:22:25.857626 # # RUN global.single_thread_different_keys ...
1567 22:22:25.858787 # # OK global.single_thread_different_keys
1568 22:22:25.858987 # ok 4 global.single_thread_different_keys
1569 22:22:25.859463 # # RUN global.exec_changed_keys ...
1570 22:22:25.859636 # # OK global.exec_changed_keys
1571 22:22:25.859840 # ok 5 global.exec_changed_keys
1572 22:22:25.860068 # # RUN global.context_switch_keep_keys ...
1573 22:22:25.860304 # # OK global.context_switch_keep_keys
1574 22:22:25.860485 # ok 6 global.context_switch_keep_keys
1575 22:22:25.860661 # # RUN global.context_switch_keep_keys_generic ...
1576 22:22:25.861077 # # OK global.context_switch_keep_keys_generic
1577 22:22:25.861304 # ok 7 global.context_switch_keep_keys_generic
1578 22:22:25.861454 # # PASSED: 7 / 7 tests passed.
1579 22:22:25.865606 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
1580 22:22:25.866092 ok 28 selftests: arm64: pac
1581 22:22:25.907181 # selftests: arm64: fp-stress
1582 22:22:42.407030 # TAP version 13
1583 22:22:42.407363 # 1..27
1584 22:22:42.407574 # # 1 CPUs, 16 SVE VLs, 5 SME VLs
1585 22:22:42.407726 # # Will run for 10s
1586 22:22:42.407875 # # Started FPSIMD-0-0
1587 22:22:42.408036 # # Started SVE-VL-256-0
1588 22:22:42.408199 # # Started SVE-VL-240-0
1589 22:22:42.408365 # # Started SVE-VL-224-0
1590 22:22:42.408526 # # Started SVE-VL-208-0
1591 22:22:42.408912 # # Started SVE-VL-192-0
1592 22:22:42.409071 # # Started SVE-VL-176-0
1593 22:22:42.409196 # # Started SVE-VL-160-0
1594 22:22:42.409318 # # Started SVE-VL-144-0
1595 22:22:42.409437 # # Started SVE-VL-128-0
1596 22:22:42.409593 # # Started SVE-VL-112-0
1597 22:22:42.409725 # # Started SVE-VL-96-0
1598 22:22:42.409855 # # Started SVE-VL-80-0
1599 22:22:42.410023 # # Started SVE-VL-64-0
1600 22:22:42.410153 # # Started SVE-VL-48-0
1601 22:22:42.410266 # # Started SVE-VL-32-0
1602 22:22:42.410380 # # Started SVE-VL-16-0
1603 22:22:42.410493 # # Started SSVE-VL-256-0
1604 22:22:42.410607 # # Started ZA-VL-256-0
1605 22:22:42.410719 # # Started SSVE-VL-128-0
1606 22:22:42.410833 # # Started ZA-VL-128-0
1607 22:22:42.410944 # # Started SSVE-VL-64-0
1608 22:22:42.411055 # # Started ZA-VL-64-0
1609 22:22:42.411167 # # Started SSVE-VL-32-0
1610 22:22:42.411280 # # Started ZA-VL-32-0
1611 22:22:42.411390 # # Started SSVE-VL-16-0
1612 22:22:42.411502 # # Started ZA-VL-16-0
1613 22:22:42.411612 # # SVE-VL-256-0: Vector length: 2048 bits
1614 22:22:42.411725 # # SVE-VL-256-0: PID: 909
1615 22:22:42.411835 # # SVE-VL-208-0: Vector length: 1664 bits
1616 22:22:42.411973 # # SVE-VL-208-0: PID: 912
1617 22:22:42.415779 # # SVE-VL-240-0: Vector length: 1920 bits
1618 22:22:42.416001 # # SVE-VL-240-0: PID: 910
1619 22:22:42.416092 # # FPSIMD-0-0: Vector length: 128 bits
1620 22:22:42.416177 # # FPSIMD-0-0: PID: 908
1621 22:22:42.416268 # # SVE-VL-176-0: Vector length: 1408 bits
1622 22:22:42.416353 # # SVE-VL-176-0: PID: 914
1623 22:22:42.416436 # # SVE-VL-160-0: Vector length: 1280 bits
1624 22:22:42.416519 # # SVE-VL-160-0: PID: 915
1625 22:22:42.416810 # # SVE-VL-64-0: Vector length: 512 bits
1626 22:22:42.416903 # # SVE-VL-64-0: PID: 921
1627 22:22:42.416991 # # SVE-VL-112-0: Vector length: 896 bits
1628 22:22:42.417075 # # SVE-VL-112-0: PID: 918
1629 22:22:42.417159 # # ZA-VL-64-0: Streaming mode vector length: 512 bits
1630 22:22:42.417247 # # ZA-VL-64-0: PID: 930
1631 22:22:42.417330 # # SVE-VL-128-0: Vector length: 1024 bits
1632 22:22:42.417414 # # SVE-VL-128-0: PID: 917
1633 22:22:42.417497 # # SVE-VL-96-0: Vector length: 768 bits
1634 22:22:42.417580 # # SVE-VL-96-0: PID: 919
1635 22:22:42.417691 # # SVE-VL-32-0: Vector length: 256 bits
1636 22:22:42.417779 # # SVE-VL-32-0: PID: 923
1637 22:22:42.419452 # # ZA-VL-128-0: Streaming mode vector length: 1024 bits
1638 22:22:42.419696 # # ZA-VL-256-0: Streaming mode vector length: 2048 bits
1639 22:22:42.419880 # # SSVE-VL-256-0: Streaming mode Vector length: 2048 bits
1640 22:22:42.420067 # # SSVE-VL-256-0: PID: 925
1641 22:22:42.420198 # # SVE-VL-192-0: Vector length: 1536 bits
1642 22:22:42.420345 # # SVE-VL-192-0: PID: 913
1643 22:22:42.420508 # # ZA-VL-16-0: Streaming mode vector length: 128 bits
1644 22:22:42.420670 # # ZA-VL-16-0: PID: 934
1645 22:22:42.420909 # # SSVE-VL-64-0: Streaming mode Vector length: 512 bits
1646 22:22:42.421106 # # SSVE-VL-64-0: PID: 929
1647 22:22:42.421275 # # SVE-VL-16-0: Vector length: 128 bits
1648 22:22:42.421400 # # SVE-VL-16-0: PID: 924
1649 22:22:42.421517 # # ZA-VL-128-0: PID: 928
1650 22:22:42.421631 # # SSVE-VL-16-0: Streaming mode Vector length: 128 bits
1651 22:22:42.421797 # # SSVE-VL-16-0: PID: 933
1652 22:22:42.421928 # # ZA-VL-256-0: PID: 926
1653 22:22:42.422049 # # SVE-VL-48-0: Vector length: 384 bits
1654 22:22:42.422198 # # SVE-VL-48-0: PID: 922
1655 22:22:42.422462 # # SSVE-VL-128-0: Streaming mode Vector length: 1024 bits
1656 22:22:42.422700 # # SSVE-VL-128-0: PID: 927
1657 22:22:42.422879 # # SSVE-VL-32-0: Streaming mode Vector length: 256 bits
1658 22:22:42.423041 # # SVE-VL-144-0: Vector length: 1152 bits
1659 22:22:42.423252 # # SVE-VL-144-0: PID: 916
1660 22:22:42.423413 # # SVE-VL-80-0: Vector length: 640 bits
1661 22:22:42.423600 # # SSVE-VL-32-0: PID: 931
1662 22:22:42.423750 # # SVE-VL-80-0: PID: 920
1663 22:22:42.423951 # # ZA-VL-32-0: Streaming mode vector length: 256 bits
1664 22:22:42.424134 # # ZA-VL-32-0: PID: 932
1665 22:22:42.424306 # # SVE-VL-224-0: Vector length: 1792 bits
1666 22:22:42.424512 # # SVE-VL-224-0: PID: 911
1667 22:22:42.424703 # # Finishing up...
1668 22:22:42.424885 # ok 1 FPSIMD-0-0
1669 22:22:42.425062 # ok 2 SVE-VL-256-0
1670 22:22:42.425233 # ok 3 SVE-VL-240-0
1671 22:22:42.425361 # ok 4 SVE-VL-224-0
1672 22:22:42.425476 # ok 5 SVE-VL-208-0
1673 22:22:42.425589 # ok 6 SVE-VL-192-0
1674 22:22:42.425789 # ok 7 SVE-VL-176-0
1675 22:22:42.425985 # ok 8 SVE-VL-160-0
1676 22:22:42.426167 # ok 9 SVE-VL-144-0
1677 22:22:42.426349 # ok 10 SVE-VL-128-0
1678 22:22:42.426495 # ok 11 SVE-VL-112-0
1679 22:22:42.426635 # ok 12 SVE-VL-96-0
1680 22:22:42.426773 # ok 13 SVE-VL-80-0
1681 22:22:42.426912 # ok 14 SVE-VL-64-0
1682 22:22:42.427092 # ok 15 SVE-VL-48-0
1683 22:22:42.427227 # ok 16 SVE-VL-32-0
1684 22:22:42.427369 # ok 17 SVE-VL-16-0
1685 22:22:42.427510 # ok 18 SSVE-VL-256-0
1686 22:22:42.427650 # ok 19 ZA-VL-256-0
1687 22:22:42.427826 # ok 20 SSVE-VL-128-0
1688 22:22:42.428014 # ok 21 ZA-VL-128-0
1689 22:22:42.428189 # ok 22 SSVE-VL-64-0
1690 22:22:42.428348 # ok 23 ZA-VL-64-0
1691 22:22:42.428513 # ok 24 SSVE-VL-32-0
1692 22:22:42.428706 # ok 25 ZA-VL-32-0
1693 22:22:42.428913 # ok 26 SSVE-VL-16-0
1694 22:22:42.429079 # ok 27 ZA-VL-16-0
1695 22:22:42.429210 # # ZA-VL-16-0: Terminated by signal 15, no error, iterations=2047, signals=9
1696 22:22:42.429327 # # SVE-VL-128-0: Terminated by signal 15, no error, iterations=4552, signals=9
1697 22:22:42.429680 # # SSVE-VL-16-0: Terminated by signal 15, no error, iterations=12816, signals=9
1698 22:22:42.429810 # # SVE-VL-48-0: Terminated by signal 15, no error, iterations=7738, signals=9
1699 22:22:42.429925 # # SVE-VL-192-0: Terminated by signal 15, no error, iterations=3177, signals=9
1700 22:22:42.430038 # # SVE-VL-16-0: Terminated by signal 15, no error, iterations=13519, signals=9
1701 22:22:42.430150 # # SSVE-VL-64-0: Terminated by signal 15, no error, iterations=6565, signals=9
1702 22:22:42.430261 # # ZA-VL-64-0: Terminated by signal 15, no error, iterations=1673, signals=9
1703 22:22:42.430378 # # ZA-VL-256-0: Terminated by signal 15, no error, iterations=278, signals=9
1704 22:22:42.430491 # # FPSIMD-0-0: Terminated by signal 15, no error, iterations=3418, signals=9
1705 22:22:42.522671 # # SVE-VL-32-0: Terminated by signal 15, no error, iterations=10509, signals=9
1706 22:22:42.522935 # # ZA-VL-128-0: Terminated by signal 15, no error, iterations=769, signals=9
1707 22:22:42.523190 # # SVE-VL-64-0: Terminated by signal 15, no error, iterations=7869, signals=9
1708 22:22:42.523379 # # SVE-VL-112-0: Terminated by signal 15, no error, iterations=4951, signals=9
1709 22:22:42.523628 # # SVE-VL-208-0: Terminated by signal 15, no error, iterations=2827, signals=9
1710 22:22:42.523818 # # SSVE-VL-128-0: Terminated by signal 15, no error, iterations=4307, signals=9
1711 22:22:42.524026 # # SVE-VL-224-0: Terminated by signal 15, no error, iterations=1450, signals=7
1712 22:22:42.524247 # # SVE-VL-96-0: Terminated by signal 15, no error, iterations=5460, signals=9
1713 22:22:42.524432 # # SSVE-VL-256-0: Terminated by signal 15, no error, iterations=2568, signals=9
1714 22:22:42.524619 # # SVE-VL-160-0: Terminated by signal 15, no error, iterations=4011, signals=9
1715 22:22:42.524767 # # ZA-VL-32-0: Terminated by signal 15, no error, iterations=1662, signals=9
1716 22:22:42.524932 # # SSVE-VL-32-0: Terminated by signal 15, no error, iterations=9521, signals=9
1717 22:22:42.525145 # # SVE-VL-240-0: Terminated by signal 15, no error, iterations=2938, signals=9
1718 22:22:42.525289 # # SVE-VL-144-0: Terminated by signal 15, no error, iterations=3676, signals=9
1719 22:22:42.544110 # # SVE-VL-176-0: Terminated by signal 15, no error, iterations=3832, signals=9
1720 22:22:42.544551 # # SVE-VL-80-0: Terminated by signal 15, no error, iterations=4889, signals=9
1721 22:22:42.544710 # # SVE-VL-256-0: Terminated by signal 15, no error, iterations=2866, signals=9
1722 22:22:42.544883 # # Totals: pass:27 fail:0 xfail:0 xpass:0 skip:0 error:0
1723 22:22:42.564941 ok 29 selftests: arm64: fp-stress
1724 22:22:42.756658 # selftests: arm64: sve-ptrace
1725 22:22:42.911483 # TAP version 13
1726 22:22:42.911834 # 1..4104
1727 22:22:42.912286 # # Parent is 951, child is 952
1728 22:22:42.912497 # ok 1 SVE FPSIMD set via SVE: 0
1729 22:22:42.912717 # ok 2 SVE get_fpsimd() gave same state
1730 22:22:42.912903 # ok 3 SVE SVE_PT_VL_INHERIT set
1731 22:22:42.913063 # ok 4 SVE SVE_PT_VL_INHERIT cleared
1732 22:22:42.913199 # ok 5 Set SVE VL 16
1733 22:22:42.913316 # ok 6 Set and get SVE data for VL 16
1734 22:22:42.913431 # ok 7 Set and get FPSIMD data for SVE VL 16
1735 22:22:42.913547 # ok 8 Set FPSIMD, read via SVE for SVE VL 16
1736 22:22:42.913676 # ok 9 Set SVE VL 32
1737 22:22:42.913832 # ok 10 Set and get SVE data for VL 32
1738 22:22:42.914047 # ok 11 Set and get FPSIMD data for SVE VL 32
1739 22:22:42.914265 # ok 12 Set FPSIMD, read via SVE for SVE VL 32
1740 22:22:42.914465 # ok 13 Set SVE VL 48
1741 22:22:42.914622 # ok 14 Set and get SVE data for VL 48
1742 22:22:42.914791 # ok 15 Set and get FPSIMD data for SVE VL 48
1743 22:22:42.914991 # ok 16 Set FPSIMD, read via SVE for SVE VL 48
1744 22:22:42.915198 # ok 17 Set SVE VL 64
1745 22:22:42.915428 # ok 18 Set and get SVE data for VL 64
1746 22:22:42.915602 # ok 19 Set and get FPSIMD data for SVE VL 64
1747 22:22:42.915803 # ok 20 Set FPSIMD, read via SVE for SVE VL 64
1748 22:22:42.916010 # ok 21 Set SVE VL 80
1749 22:22:42.916232 # ok 22 Set and get SVE data for VL 80
1750 22:22:42.916445 # ok 23 Set and get FPSIMD data for SVE VL 80
1751 22:22:42.916630 # ok 24 Set FPSIMD, read via SVE for SVE VL 80
1752 22:22:42.916791 # ok 25 Set SVE VL 96
1753 22:22:42.916934 # ok 26 Set and get SVE data for VL 96
1754 22:22:42.917062 # ok 27 Set and get FPSIMD data for SVE VL 96
1755 22:22:42.917177 # ok 28 Set FPSIMD, read via SVE for SVE VL 96
1756 22:22:42.917293 # ok 29 Set SVE VL 112
1757 22:22:42.917440 # ok 30 Set and get SVE data for VL 112
1758 22:22:42.917564 # ok 31 Set and get FPSIMD data for SVE VL 112
1759 22:22:42.917710 # ok 32 Set FPSIMD, read via SVE for SVE VL 112
1760 22:22:42.917917 # ok 33 Set SVE VL 128
1761 22:22:42.918081 # ok 34 Set and get SVE data for VL 128
1762 22:22:42.918227 # ok 35 Set and get FPSIMD data for SVE VL 128
1763 22:22:42.918372 # ok 36 Set FPSIMD, read via SVE for SVE VL 128
1764 22:22:42.918516 # ok 37 Set SVE VL 144
1765 22:22:42.918658 # ok 38 Set and get SVE data for VL 144
1766 22:22:42.918801 # ok 39 Set and get FPSIMD data for SVE VL 144
1767 22:22:42.918944 # ok 40 Set FPSIMD, read via SVE for SVE VL 144
1768 22:22:42.922511 # ok 41 Set SVE VL 160
1769 22:22:42.923041 # ok 42 Set and get SVE data for VL 160
1770 22:22:42.923156 # ok 43 Set and get FPSIMD data for SVE VL 160
1771 22:22:42.923253 # ok 44 Set FPSIMD, read via SVE for SVE VL 160
1772 22:22:42.923340 # ok 45 Set SVE VL 176
1773 22:22:42.923426 # ok 46 Set and get SVE data for VL 176
1774 22:22:42.923511 # ok 47 Set and get FPSIMD data for SVE VL 176
1775 22:22:42.923595 # ok 48 Set FPSIMD, read via SVE for SVE VL 176
1776 22:22:42.923703 # ok 49 Set SVE VL 192
1777 22:22:42.923791 # ok 50 Set and get SVE data for VL 192
1778 22:22:42.923878 # ok 51 Set and get FPSIMD data for SVE VL 192
1779 22:22:42.923964 # ok 52 Set FPSIMD, read via SVE for SVE VL 192
1780 22:22:42.924050 # ok 53 Set SVE VL 208
1781 22:22:42.924152 # ok 54 Set and get SVE data for VL 208
1782 22:22:42.924242 # ok 55 Set and get FPSIMD data for SVE VL 208
1783 22:22:42.924328 # ok 56 Set FPSIMD, read via SVE for SVE VL 208
1784 22:22:42.924412 # ok 57 Set SVE VL 224
1785 22:22:42.924513 # ok 58 Set and get SVE data for VL 224
1786 22:22:42.924600 # ok 59 Set and get FPSIMD data for SVE VL 224
1787 22:22:42.924684 # ok 60 Set FPSIMD, read via SVE for SVE VL 224
1788 22:22:42.924783 # ok 61 Set SVE VL 240
1789 22:22:42.924870 # ok 62 Set and get SVE data for VL 240
1790 22:22:42.924969 # ok 63 Set and get FPSIMD data for SVE VL 240
1791 22:22:42.925451 # ok 64 Set FPSIMD, read via SVE for SVE VL 240
1792 22:22:42.925762 # ok 65 Set SVE VL 256
1793 22:22:42.925867 # ok 66 Set and get SVE data for VL 256
1794 22:22:42.925969 # ok 67 Set and get FPSIMD data for SVE VL 256
1795 22:22:42.926055 # ok 68 Set FPSIMD, read via SVE for SVE VL 256
1796 22:22:42.926138 # ok 69 Set SVE VL 272
1797 22:22:42.926238 # ok 70 # SKIP SVE set SVE get SVE for VL 272
1798 22:22:42.926325 # ok 71 # SKIP SVE set SVE get FPSIMD for VL 272
1799 22:22:42.926423 # ok 72 # SKIP SVE set FPSIMD get SVE for VL 272
1800 22:22:42.926508 # ok 73 Set SVE VL 288
1801 22:22:42.926605 # ok 74 # SKIP SVE set SVE get SVE for VL 288
1802 22:22:42.926690 # ok 75 # SKIP SVE set SVE get FPSIMD for VL 288
1803 22:22:42.926786 # ok 76 # SKIP SVE set FPSIMD get SVE for VL 288
1804 22:22:42.926871 # ok 77 Set SVE VL 304
1805 22:22:42.926968 # ok 78 # SKIP SVE set SVE get SVE for VL 304
1806 22:22:42.927052 # ok 79 # SKIP SVE set SVE get FPSIMD for VL 304
1807 22:22:42.927150 # ok 80 # SKIP SVE set FPSIMD get SVE for VL 304
1808 22:22:42.927235 # ok 81 Set SVE VL 320
1809 22:22:42.927331 # ok 82 # SKIP SVE set SVE get SVE for VL 320
1810 22:22:42.927428 # ok 83 # SKIP SVE set SVE get FPSIMD for VL 320
1811 22:22:42.927525 # ok 84 # SKIP SVE set FPSIMD get SVE for VL 320
1812 22:22:42.927624 # ok 85 Set SVE VL 336
1813 22:22:42.927714 # ok 86 # SKIP SVE set SVE get SVE for VL 336
1814 22:22:42.927811 # ok 87 # SKIP SVE set SVE get FPSIMD for VL 336
1815 22:22:42.927909 # ok 88 # SKIP SVE set FPSIMD get SVE for VL 336
1816 22:22:42.928007 # ok 89 Set SVE VL 352
1817 22:22:42.928105 # ok 90 # SKIP SVE set SVE get SVE for VL 352
1818 22:22:42.928441 # ok 91 # SKIP SVE set SVE get FPSIMD for VL 352
1819 22:22:42.928673 # ok 92 # SKIP SVE set FPSIMD get SVE for VL 352
1820 22:22:42.928864 # ok 93 Set SVE VL 368
1821 22:22:42.929101 # ok 94 # SKIP SVE set SVE get SVE for VL 368
1822 22:22:42.929254 # ok 95 # SKIP SVE set SVE get FPSIMD for VL 368
1823 22:22:42.929380 # ok 96 # SKIP SVE set FPSIMD get SVE for VL 368
1824 22:22:42.939303 # ok 97 Set SVE VL 384
1825 22:22:42.939789 # ok 98 # SKIP SVE set SVE get SVE for VL 384
1826 22:22:42.939943 # ok 99 # SKIP SVE set SVE get FPSIMD for VL 384
1827 22:22:42.940065 # ok 100 # SKIP SVE set FPSIMD get SVE for VL 384
1828 22:22:42.940182 # ok 101 Set SVE VL 400
1829 22:22:42.940548 # ok 102 # SKIP SVE set SVE get SVE for VL 400
1830 22:22:42.940799 # ok 103 # SKIP SVE set SVE get FPSIMD for VL 400
1831 22:22:42.941005 # ok 104 # SKIP SVE set FPSIMD get SVE for VL 400
1832 22:22:42.941159 # ok 105 Set SVE VL 416
1833 22:22:42.941284 # ok 106 # SKIP SVE set SVE get SVE for VL 416
1834 22:22:42.941430 # ok 107 # SKIP SVE set SVE get FPSIMD for VL 416
1835 22:22:42.941820 # ok 108 # SKIP SVE set FPSIMD get SVE for VL 416
1836 22:22:42.942014 # ok 109 Set SVE VL 432
1837 22:22:42.942207 # ok 110 # SKIP SVE set SVE get SVE for VL 432
1838 22:22:42.942432 # ok 111 # SKIP SVE set SVE get FPSIMD for VL 432
1839 22:22:42.942605 # ok 112 # SKIP SVE set FPSIMD get SVE for VL 432
1840 22:22:42.942774 # ok 113 Set SVE VL 448
1841 22:22:42.942943 # ok 114 # SKIP SVE set SVE get SVE for VL 448
1842 22:22:42.943105 # ok 115 # SKIP SVE set SVE get FPSIMD for VL 448
1843 22:22:42.943268 # ok 116 # SKIP SVE set FPSIMD get SVE for VL 448
1844 22:22:42.943429 # ok 117 Set SVE VL 464
1845 22:22:42.943588 # ok 118 # SKIP SVE set SVE get SVE for VL 464
1846 22:22:42.943784 # ok 119 # SKIP SVE set SVE get FPSIMD for VL 464
1847 22:22:42.943927 # ok 120 # SKIP SVE set FPSIMD get SVE for VL 464
1848 22:22:42.944083 # ok 121 Set SVE VL 480
1849 22:22:42.944232 # ok 122 # SKIP SVE set SVE get SVE for VL 480
1850 22:22:42.944377 # ok 123 # SKIP SVE set SVE get FPSIMD for VL 480
1851 22:22:42.944533 # ok 124 # SKIP SVE set FPSIMD get SVE for VL 480
1852 22:22:42.944685 # ok 125 Set SVE VL 496
1853 22:22:42.944812 # ok 126 # SKIP SVE set SVE get SVE for VL 496
1854 22:22:42.944936 # ok 127 # SKIP SVE set SVE get FPSIMD for VL 496
1855 22:22:42.945055 # ok 128 # SKIP SVE set FPSIMD get SVE for VL 496
1856 22:22:42.945171 # ok 129 Set SVE VL 512
1857 22:22:42.945290 # ok 130 # SKIP SVE set SVE get SVE for VL 512
1858 22:22:42.945406 # ok 131 # SKIP SVE set SVE get FPSIMD for VL 512
1859 22:22:42.945522 # ok 132 # SKIP SVE set FPSIMD get SVE for VL 512
1860 22:22:42.945639 # ok 133 Set SVE VL 528
1861 22:22:42.945808 # ok 134 # SKIP SVE set SVE get SVE for VL 528
1862 22:22:42.945929 # ok 135 # SKIP SVE set SVE get FPSIMD for VL 528
1863 22:22:42.946043 # ok 136 # SKIP SVE set FPSIMD get SVE for VL 528
1864 22:22:42.946158 # ok 137 Set SVE VL 544
1865 22:22:42.946273 # ok 138 # SKIP SVE set SVE get SVE for VL 544
1866 22:22:42.946388 # ok 139 # SKIP SVE set SVE get FPSIMD for VL 544
1867 22:22:42.946501 # ok 140 # SKIP SVE set FPSIMD get SVE for VL 544
1868 22:22:42.946613 # ok 141 Set SVE VL 560
1869 22:22:42.946727 # ok 142 # SKIP SVE set SVE get SVE for VL 560
1870 22:22:42.946840 # ok 143 # SKIP SVE set SVE get FPSIMD for VL 560
1871 22:22:42.946953 # ok 144 # SKIP SVE set FPSIMD get SVE for VL 560
1872 22:22:42.947066 # ok 145 Set SVE VL 576
1873 22:22:42.947178 # ok 146 # SKIP SVE set SVE get SVE for VL 576
1874 22:22:42.952843 # ok 147 # SKIP SVE set SVE get FPSIMD for VL 576
1875 22:22:42.953048 # ok 148 # SKIP SVE set FPSIMD get SVE for VL 576
1876 22:22:42.953381 # ok 149 Set SVE VL 592
1877 22:22:42.953553 # ok 150 # SKIP SVE set SVE get SVE for VL 592
1878 22:22:42.953729 # ok 151 # SKIP SVE set SVE get FPSIMD for VL 592
1879 22:22:42.953905 # ok 152 # SKIP SVE set FPSIMD get SVE for VL 592
1880 22:22:42.954058 # ok 153 Set SVE VL 608
1881 22:22:42.954211 # ok 154 # SKIP SVE set SVE get SVE for VL 608
1882 22:22:42.954390 # ok 155 # SKIP SVE set SVE get FPSIMD for VL 608
1883 22:22:42.954546 # ok 156 # SKIP SVE set FPSIMD get SVE for VL 608
1884 22:22:42.954670 # ok 157 Set SVE VL 624
1885 22:22:42.954785 # ok 158 # SKIP SVE set SVE get SVE for VL 624
1886 22:22:42.954925 # ok 159 # SKIP SVE set SVE get FPSIMD for VL 624
1887 22:22:42.955046 # ok 160 # SKIP SVE set FPSIMD get SVE for VL 624
1888 22:22:42.955162 # ok 161 Set SVE VL 640
1889 22:22:42.955284 # ok 162 # SKIP SVE set SVE get SVE for VL 640
1890 22:22:42.955433 # ok 163 # SKIP SVE set SVE get FPSIMD for VL 640
1891 22:22:42.955586 # ok 164 # SKIP SVE set FPSIMD get SVE for VL 640
1892 22:22:42.955737 # ok 165 Set SVE VL 656
1893 22:22:42.955932 # ok 166 # SKIP SVE set SVE get SVE for VL 656
1894 22:22:42.956105 # ok 167 # SKIP SVE set SVE get FPSIMD for VL 656
1895 22:22:42.956298 # ok 168 # SKIP SVE set FPSIMD get SVE for VL 656
1896 22:22:42.956444 # ok 169 Set SVE VL 672
1897 22:22:42.956595 # ok 170 # SKIP SVE set SVE get SVE for VL 672
1898 22:22:42.956722 # ok 171 # SKIP SVE set SVE get FPSIMD for VL 672
1899 22:22:42.956862 # ok 172 # SKIP SVE set FPSIMD get SVE for VL 672
1900 22:22:42.956993 # ok 173 Set SVE VL 688
1901 22:22:42.957108 # ok 174 # SKIP SVE set SVE get SVE for VL 688
1902 22:22:42.957253 # ok 175 # SKIP SVE set SVE get FPSIMD for VL 688
1903 22:22:42.957375 # ok 176 # SKIP SVE set FPSIMD get SVE for VL 688
1904 22:22:42.957489 # ok 177 Set SVE VL 704
1905 22:22:42.957602 # ok 178 # SKIP SVE set SVE get SVE for VL 704
1906 22:22:42.957741 # ok 179 # SKIP SVE set SVE get FPSIMD for VL 704
1907 22:22:42.957856 # ok 180 # SKIP SVE set FPSIMD get SVE for VL 704
1908 22:22:42.957969 # ok 181 Set SVE VL 720
1909 22:22:42.958082 # ok 182 # SKIP SVE set SVE get SVE for VL 720
1910 22:22:42.958196 # ok 183 # SKIP SVE set SVE get FPSIMD for VL 720
1911 22:22:42.958310 # ok 184 # SKIP SVE set FPSIMD get SVE for VL 720
1912 22:22:42.962949 # ok 185 Set SVE VL 736
1913 22:22:42.963349 # ok 186 # SKIP SVE set SVE get SVE for VL 736
1914 22:22:42.963564 # ok 187 # SKIP SVE set SVE get FPSIMD for VL 736
1915 22:22:42.963771 # ok 188 # SKIP SVE set FPSIMD get SVE for VL 736
1916 22:22:42.963998 # ok 189 Set SVE VL 752
1917 22:22:42.964197 # ok 190 # SKIP SVE set SVE get SVE for VL 752
1918 22:22:42.964374 # ok 191 # SKIP SVE set SVE get FPSIMD for VL 752
1919 22:22:42.964519 # ok 192 # SKIP SVE set FPSIMD get SVE for VL 752
1920 22:22:42.964725 # ok 193 Set SVE VL 768
1921 22:22:42.964943 # ok 194 # SKIP SVE set SVE get SVE for VL 768
1922 22:22:42.965091 # ok 195 # SKIP SVE set SVE get FPSIMD for VL 768
1923 22:22:42.965241 # ok 196 # SKIP SVE set FPSIMD get SVE for VL 768
1924 22:22:42.965366 # ok 197 Set SVE VL 784
1925 22:22:42.965553 # ok 198 # SKIP SVE set SVE get SVE for VL 784
1926 22:22:42.965776 # ok 199 # SKIP SVE set SVE get FPSIMD for VL 784
1927 22:22:42.965952 # ok 200 # SKIP SVE set FPSIMD get SVE for VL 784
1928 22:22:42.966117 # ok 201 Set SVE VL 800
1929 22:22:42.966275 # ok 202 # SKIP SVE set SVE get SVE for VL 800
1930 22:22:42.966400 # ok 203 # SKIP SVE set SVE get FPSIMD for VL 800
1931 22:22:42.966555 # ok 204 # SKIP SVE set FPSIMD get SVE for VL 800
1932 22:22:42.966715 # ok 205 Set SVE VL 816
1933 22:22:42.966873 # ok 206 # SKIP SVE set SVE get SVE for VL 816
1934 22:22:42.967011 # ok 207 # SKIP SVE set SVE get FPSIMD for VL 816
1935 22:22:42.967132 # ok 208 # SKIP SVE set FPSIMD get SVE for VL 816
1936 22:22:42.967247 # ok 209 Set SVE VL 832
1937 22:22:42.967360 # ok 210 # SKIP SVE set SVE get SVE for VL 832
1938 22:22:42.967479 # ok 211 # SKIP SVE set SVE get FPSIMD for VL 832
1939 22:22:42.967618 # ok 212 # SKIP SVE set FPSIMD get SVE for VL 832
1940 22:22:42.967757 # ok 213 Set SVE VL 848
1941 22:22:42.967913 # ok 214 # SKIP SVE set SVE get SVE for VL 848
1942 22:22:42.968072 # ok 215 # SKIP SVE set SVE get FPSIMD for VL 848
1943 22:22:42.968276 # ok 216 # SKIP SVE set FPSIMD get SVE for VL 848
1944 22:22:42.968448 # ok 217 Set SVE VL 864
1945 22:22:42.968592 # ok 218 # SKIP SVE set SVE get SVE for VL 864
1946 22:22:42.968728 # ok 219 # SKIP SVE set SVE get FPSIMD for VL 864
1947 22:22:42.968879 # ok 220 # SKIP SVE set FPSIMD get SVE for VL 864
1948 22:22:42.968999 # ok 221 Set SVE VL 880
1949 22:22:42.969114 # ok 222 # SKIP SVE set SVE get SVE for VL 880
1950 22:22:42.969227 # ok 223 # SKIP SVE set SVE get FPSIMD for VL 880
1951 22:22:42.969343 # ok 224 # SKIP SVE set FPSIMD get SVE for VL 880
1952 22:22:42.969462 # ok 225 Set SVE VL 896
1953 22:22:42.969577 # ok 226 # SKIP SVE set SVE get SVE for VL 896
1954 22:22:42.969716 # ok 227 # SKIP SVE set SVE get FPSIMD for VL 896
1955 22:22:42.969832 # ok 228 # SKIP SVE set FPSIMD get SVE for VL 896
1956 22:22:42.969946 # ok 229 Set SVE VL 912
1957 22:22:42.970059 # ok 230 # SKIP SVE set SVE get SVE for VL 912
1958 22:22:42.970387 # ok 231 # SKIP SVE set SVE get FPSIMD for VL 912
1959 22:22:42.970522 # ok 232 # SKIP SVE set FPSIMD get SVE for VL 912
1960 22:22:42.970641 # ok 233 Set SVE VL 928
1961 22:22:42.970759 # ok 234 # SKIP SVE set SVE get SVE for VL 928
1962 22:22:42.970876 # ok 235 # SKIP SVE set SVE get FPSIMD for VL 928
1963 22:22:42.978815 # ok 236 # SKIP SVE set FPSIMD get SVE for VL 928
1964 22:22:42.979233 # ok 237 Set SVE VL 944
1965 22:22:42.979429 # ok 238 # SKIP SVE set SVE get SVE for VL 944
1966 22:22:42.979638 # ok 239 # SKIP SVE set SVE get FPSIMD for VL 944
1967 22:22:42.979834 # ok 240 # SKIP SVE set FPSIMD get SVE for VL 944
1968 22:22:42.980003 # ok 241 Set SVE VL 960
1969 22:22:42.980153 # ok 242 # SKIP SVE set SVE get SVE for VL 960
1970 22:22:42.980318 # ok 243 # SKIP SVE set SVE get FPSIMD for VL 960
1971 22:22:42.980468 # ok 244 # SKIP SVE set FPSIMD get SVE for VL 960
1972 22:22:42.980625 # ok 245 Set SVE VL 976
1973 22:22:42.980787 # ok 246 # SKIP SVE set SVE get SVE for VL 976
1974 22:22:42.980942 # ok 247 # SKIP SVE set SVE get FPSIMD for VL 976
1975 22:22:42.981064 # ok 248 # SKIP SVE set FPSIMD get SVE for VL 976
1976 22:22:42.981182 # ok 249 Set SVE VL 992
1977 22:22:42.981326 # ok 250 # SKIP SVE set SVE get SVE for VL 992
1978 22:22:42.981525 # ok 251 # SKIP SVE set SVE get FPSIMD for VL 992
1979 22:22:42.981707 # ok 252 # SKIP SVE set FPSIMD get SVE for VL 992
1980 22:22:42.981879 # ok 253 Set SVE VL 1008
1981 22:22:42.982045 # ok 254 # SKIP SVE set SVE get SVE for VL 1008
1982 22:22:42.982211 # ok 255 # SKIP SVE set SVE get FPSIMD for VL 1008
1983 22:22:42.982372 # ok 256 # SKIP SVE set FPSIMD get SVE for VL 1008
1984 22:22:42.982528 # ok 257 Set SVE VL 1024
1985 22:22:42.982717 # ok 258 # SKIP SVE set SVE get SVE for VL 1024
1986 22:22:42.982887 # ok 259 # SKIP SVE set SVE get FPSIMD for VL 1024
1987 22:22:42.983041 # ok 260 # SKIP SVE set FPSIMD get SVE for VL 1024
1988 22:22:42.983207 # ok 261 Set SVE VL 1040
1989 22:22:42.983355 # ok 262 # SKIP SVE set SVE get SVE for VL 1040
1990 22:22:42.983504 # ok 263 # SKIP SVE set SVE get FPSIMD for VL 1040
1991 22:22:42.983654 # ok 264 # SKIP SVE set FPSIMD get SVE for VL 1040
1992 22:22:42.983799 # ok 265 Set SVE VL 1056
1993 22:22:42.983951 # ok 266 # SKIP SVE set SVE get SVE for VL 1056
1994 22:22:42.984080 # ok 267 # SKIP SVE set SVE get FPSIMD for VL 1056
1995 22:22:42.984204 # ok 268 # SKIP SVE set FPSIMD get SVE for VL 1056
1996 22:22:42.984352 # ok 269 Set SVE VL 1072
1997 22:22:42.984478 # ok 270 # SKIP SVE set SVE get SVE for VL 1072
1998 22:22:42.984600 # ok 271 # SKIP SVE set SVE get FPSIMD for VL 1072
1999 22:22:42.984759 # ok 272 # SKIP SVE set FPSIMD get SVE for VL 1072
2000 22:22:42.984895 # ok 273 Set SVE VL 1088
2001 22:22:42.985028 # ok 274 # SKIP SVE set SVE get SVE for VL 1088
2002 22:22:42.985145 # ok 275 # SKIP SVE set SVE get FPSIMD for VL 1088
2003 22:22:42.985263 # ok 276 # SKIP SVE set FPSIMD get SVE for VL 1088
2004 22:22:42.985377 # ok 277 Set SVE VL 1104
2005 22:22:42.985490 # ok 278 # SKIP SVE set SVE get SVE for VL 1104
2006 22:22:42.985604 # ok 279 # SKIP SVE set SVE get FPSIMD for VL 1104
2007 22:22:42.985813 # ok 280 # SKIP SVE set FPSIMD get SVE for VL 1104
2008 22:22:42.986250 # ok 281 Set SVE VL 1120
2009 22:22:42.986447 # ok 282 # SKIP SVE set SVE get SVE for VL 1120
2010 22:22:42.986635 # ok 283 # SKIP SVE set SVE get FPSIMD for VL 1120
2011 22:22:42.986820 # ok 284 # SKIP SVE set FPSIMD get SVE for VL 1120
2012 22:22:42.987005 # ok 285 Set SVE VL 1136
2013 22:22:42.987179 # ok 286 # SKIP SVE set SVE get SVE for VL 1136
2014 22:22:42.987325 # ok 287 # SKIP SVE set SVE get FPSIMD for VL 1136
2015 22:22:42.987468 # ok 288 # SKIP SVE set FPSIMD get SVE for VL 1136
2016 22:22:42.987611 # ok 289 Set SVE VL 1152
2017 22:22:42.987750 # ok 290 # SKIP SVE set SVE get SVE for VL 1152
2018 22:22:42.987893 # ok 291 # SKIP SVE set SVE get FPSIMD for VL 1152
2019 22:22:42.994446 # ok 292 # SKIP SVE set FPSIMD get SVE for VL 1152
2020 22:22:42.996471 # ok 293 Set SVE VL 1168
2021 22:22:42.996664 # ok 294 # SKIP SVE set SVE get SVE for VL 1168
2022 22:22:42.997060 # ok 295 # SKIP SVE set SVE get FPSIMD for VL 1168
2023 22:22:42.997209 # ok 296 # SKIP SVE set FPSIMD get SVE for VL 1168
2024 22:22:42.997334 # ok 297 Set SVE VL 1184
2025 22:22:42.997461 # ok 298 # SKIP SVE set SVE get SVE for VL 1184
2026 22:22:42.997679 # ok 299 # SKIP SVE set SVE get FPSIMD for VL 1184
2027 22:22:42.997820 # ok 300 # SKIP SVE set FPSIMD get SVE for VL 1184
2028 22:22:42.997999 # ok 301 Set SVE VL 1200
2029 22:22:42.998275 # ok 302 # SKIP SVE set SVE get SVE for VL 1200
2030 22:22:42.998452 # ok 303 # SKIP SVE set SVE get FPSIMD for VL 1200
2031 22:22:42.998614 # ok 304 # SKIP SVE set FPSIMD get SVE for VL 1200
2032 22:22:42.998777 # ok 305 Set SVE VL 1216
2033 22:22:42.998935 # ok 306 # SKIP SVE set SVE get SVE for VL 1216
2034 22:22:42.999148 # ok 307 # SKIP SVE set SVE get FPSIMD for VL 1216
2035 22:22:42.999319 # ok 308 # SKIP SVE set FPSIMD get SVE for VL 1216
2036 22:22:42.999491 # ok 309 Set SVE VL 1232
2037 22:22:42.999658 # ok 310 # SKIP SVE set SVE get SVE for VL 1232
2038 22:22:42.999826 # ok 311 # SKIP SVE set SVE get FPSIMD for VL 1232
2039 22:22:42.999978 # ok 312 # SKIP SVE set FPSIMD get SVE for VL 1232
2040 22:22:43.000134 # ok 313 Set SVE VL 1248
2041 22:22:43.000257 # ok 314 # SKIP SVE set SVE get SVE for VL 1248
2042 22:22:43.000373 # ok 315 # SKIP SVE set SVE get FPSIMD for VL 1248
2043 22:22:43.000500 # ok 316 # SKIP SVE set FPSIMD get SVE for VL 1248
2044 22:22:43.000671 # ok 317 Set SVE VL 1264
2045 22:22:43.000829 # ok 318 # SKIP SVE set SVE get SVE for VL 1264
2046 22:22:43.000955 # ok 319 # SKIP SVE set SVE get FPSIMD for VL 1264
2047 22:22:43.001070 # ok 320 # SKIP SVE set FPSIMD get SVE for VL 1264
2048 22:22:43.001186 # ok 321 Set SVE VL 1280
2049 22:22:43.001299 # ok 322 # SKIP SVE set SVE get SVE for VL 1280
2050 22:22:43.001412 # ok 323 # SKIP SVE set SVE get FPSIMD for VL 1280
2051 22:22:43.001525 # ok 324 # SKIP SVE set FPSIMD get SVE for VL 1280
2052 22:22:43.001639 # ok 325 Set SVE VL 1296
2053 22:22:43.001876 # ok 326 # SKIP SVE set SVE get SVE for VL 1296
2054 22:22:43.002067 # ok 327 # SKIP SVE set SVE get FPSIMD for VL 1296
2055 22:22:43.002252 # ok 328 # SKIP SVE set FPSIMD get SVE for VL 1296
2056 22:22:43.002438 # ok 329 Set SVE VL 1312
2057 22:22:43.002621 # ok 330 # SKIP SVE set SVE get SVE for VL 1312
2058 22:22:43.002799 # ok 331 # SKIP SVE set SVE get FPSIMD for VL 1312
2059 22:22:43.002936 # ok 332 # SKIP SVE set FPSIMD get SVE for VL 1312
2060 22:22:43.009841 # ok 333 Set SVE VL 1328
2061 22:22:43.010084 # ok 334 # SKIP SVE set SVE get SVE for VL 1328
2062 22:22:43.010291 # ok 335 # SKIP SVE set SVE get FPSIMD for VL 1328
2063 22:22:43.010494 # ok 336 # SKIP SVE set FPSIMD get SVE for VL 1328
2064 22:22:43.010696 # ok 337 Set SVE VL 1344
2065 22:22:43.010841 # ok 338 # SKIP SVE set SVE get SVE for VL 1344
2066 22:22:43.010963 # ok 339 # SKIP SVE set SVE get FPSIMD for VL 1344
2067 22:22:43.011086 # ok 340 # SKIP SVE set FPSIMD get SVE for VL 1344
2068 22:22:43.011298 # ok 341 Set SVE VL 1360
2069 22:22:43.011504 # ok 342 # SKIP SVE set SVE get SVE for VL 1360
2070 22:22:43.011683 # ok 343 # SKIP SVE set SVE get FPSIMD for VL 1360
2071 22:22:43.011962 # ok 344 # SKIP SVE set FPSIMD get SVE for VL 1360
2072 22:22:43.012172 # ok 345 Set SVE VL 1376
2073 22:22:43.012393 # ok 346 # SKIP SVE set SVE get SVE for VL 1376
2074 22:22:43.012596 # ok 347 # SKIP SVE set SVE get FPSIMD for VL 1376
2075 22:22:43.012813 # ok 348 # SKIP SVE set FPSIMD get SVE for VL 1376
2076 22:22:43.012994 # ok 349 Set SVE VL 1392
2077 22:22:43.013124 # ok 350 # SKIP SVE set SVE get SVE for VL 1392
2078 22:22:43.013241 # ok 351 # SKIP SVE set SVE get FPSIMD for VL 1392
2079 22:22:43.013356 # ok 352 # SKIP SVE set FPSIMD get SVE for VL 1392
2080 22:22:43.013469 # ok 353 Set SVE VL 1408
2081 22:22:43.013612 # ok 354 # SKIP SVE set SVE get SVE for VL 1408
2082 22:22:43.013854 # ok 355 # SKIP SVE set SVE get FPSIMD for VL 1408
2083 22:22:43.014050 # ok 356 # SKIP SVE set FPSIMD get SVE for VL 1408
2084 22:22:43.014225 # ok 357 Set SVE VL 1424
2085 22:22:43.014367 # ok 358 # SKIP SVE set SVE get SVE for VL 1424
2086 22:22:43.014510 # ok 359 # SKIP SVE set SVE get FPSIMD for VL 1424
2087 22:22:43.014650 # ok 360 # SKIP SVE set FPSIMD get SVE for VL 1424
2088 22:22:43.014791 # ok 361 Set SVE VL 1440
2089 22:22:43.014931 # ok 362 # SKIP SVE set SVE get SVE for VL 1440
2090 22:22:43.015071 # ok 363 # SKIP SVE set SVE get FPSIMD for VL 1440
2091 22:22:43.018194 # ok 364 # SKIP SVE set FPSIMD get SVE for VL 1440
2092 22:22:43.018450 # ok 365 Set SVE VL 1456
2093 22:22:43.018896 # ok 366 # SKIP SVE set SVE get SVE for VL 1456
2094 22:22:43.019150 # ok 367 # SKIP SVE set SVE get FPSIMD for VL 1456
2095 22:22:43.019370 # ok 368 # SKIP SVE set FPSIMD get SVE for VL 1456
2096 22:22:43.019571 # ok 369 Set SVE VL 1472
2097 22:22:43.019779 # ok 370 # SKIP SVE set SVE get SVE for VL 1472
2098 22:22:43.020000 # ok 371 # SKIP SVE set SVE get FPSIMD for VL 1472
2099 22:22:43.020212 # ok 372 # SKIP SVE set FPSIMD get SVE for VL 1472
2100 22:22:43.020472 # ok 373 Set SVE VL 1488
2101 22:22:43.020676 # ok 374 # SKIP SVE set SVE get SVE for VL 1488
2102 22:22:43.020889 # ok 375 # SKIP SVE set SVE get FPSIMD for VL 1488
2103 22:22:43.021032 # ok 376 # SKIP SVE set FPSIMD get SVE for VL 1488
2104 22:22:43.021153 # ok 377 Set SVE VL 1504
2105 22:22:43.021269 # ok 378 # SKIP SVE set SVE get SVE for VL 1504
2106 22:22:43.021387 # ok 379 # SKIP SVE set SVE get FPSIMD for VL 1504
2107 22:22:43.021505 # ok 380 # SKIP SVE set FPSIMD get SVE for VL 1504
2108 22:22:43.021620 # ok 381 Set SVE VL 1520
2109 22:22:43.021755 # ok 382 # SKIP SVE set SVE get SVE for VL 1520
2110 22:22:43.021872 # ok 383 # SKIP SVE set SVE get FPSIMD for VL 1520
2111 22:22:43.021988 # ok 384 # SKIP SVE set FPSIMD get SVE for VL 1520
2112 22:22:43.022104 # ok 385 Set SVE VL 1536
2113 22:22:43.022220 # ok 386 # SKIP SVE set SVE get SVE for VL 1536
2114 22:22:43.022336 # ok 387 # SKIP SVE set SVE get FPSIMD for VL 1536
2115 22:22:43.022481 # ok 388 # SKIP SVE set FPSIMD get SVE for VL 1536
2116 22:22:43.022605 # ok 389 Set SVE VL 1552
2117 22:22:43.022720 # ok 390 # SKIP SVE set SVE get SVE for VL 1552
2118 22:22:43.022836 # ok 391 # SKIP SVE set SVE get FPSIMD for VL 1552
2119 22:22:43.022952 # ok 392 # SKIP SVE set FPSIMD get SVE for VL 1552
2120 22:22:43.023069 # ok 393 Set SVE VL 1568
2121 22:22:43.023185 # ok 394 # SKIP SVE set SVE get SVE for VL 1568
2122 22:22:43.023301 # ok 395 # SKIP SVE set SVE get FPSIMD for VL 1568
2123 22:22:43.023418 # ok 396 # SKIP SVE set FPSIMD get SVE for VL 1568
2124 22:22:43.025706 # ok 397 Set SVE VL 1584
2125 22:22:43.026163 # ok 398 # SKIP SVE set SVE get SVE for VL 1584
2126 22:22:43.026271 # ok 399 # SKIP SVE set SVE get FPSIMD for VL 1584
2127 22:22:43.026358 # ok 400 # SKIP SVE set FPSIMD get SVE for VL 1584
2128 22:22:43.026448 # ok 401 Set SVE VL 1600
2129 22:22:43.026530 # ok 402 # SKIP SVE set SVE get SVE for VL 1600
2130 22:22:43.026631 # ok 403 # SKIP SVE set SVE get FPSIMD for VL 1600
2131 22:22:43.026717 # ok 404 # SKIP SVE set FPSIMD get SVE for VL 1600
2132 22:22:43.026801 # ok 405 Set SVE VL 1616
2133 22:22:43.026884 # ok 406 # SKIP SVE set SVE get SVE for VL 1616
2134 22:22:43.026967 # ok 407 # SKIP SVE set SVE get FPSIMD for VL 1616
2135 22:22:43.027067 # ok 408 # SKIP SVE set FPSIMD get SVE for VL 1616
2136 22:22:43.027152 # ok 409 Set SVE VL 1632
2137 22:22:43.027235 # ok 410 # SKIP SVE set SVE get SVE for VL 1632
2138 22:22:43.027317 # ok 411 # SKIP SVE set SVE get FPSIMD for VL 1632
2139 22:22:43.027415 # ok 412 # SKIP SVE set FPSIMD get SVE for VL 1632
2140 22:22:43.027502 # ok 413 Set SVE VL 1648
2141 22:22:43.027599 # ok 414 # SKIP SVE set SVE get SVE for VL 1648
2142 22:22:43.027684 # ok 415 # SKIP SVE set SVE get FPSIMD for VL 1648
2143 22:22:43.027782 # ok 416 # SKIP SVE set FPSIMD get SVE for VL 1648
2144 22:22:43.027884 # ok 417 Set SVE VL 1664
2145 22:22:43.027983 # ok 418 # SKIP SVE set SVE get SVE for VL 1664
2146 22:22:43.028069 # ok 419 # SKIP SVE set SVE get FPSIMD for VL 1664
2147 22:22:43.028166 # ok 420 # SKIP SVE set FPSIMD get SVE for VL 1664
2148 22:22:43.028637 # ok 421 Set SVE VL 1680
2149 22:22:43.028741 # ok 422 # SKIP SVE set SVE get SVE for VL 1680
2150 22:22:43.028829 # ok 423 # SKIP SVE set SVE get FPSIMD for VL 1680
2151 22:22:43.028914 # ok 424 # SKIP SVE set FPSIMD get SVE for VL 1680
2152 22:22:43.029015 # ok 425 Set SVE VL 1696
2153 22:22:43.029100 # ok 426 # SKIP SVE set SVE get SVE for VL 1696
2154 22:22:43.029516 # ok 427 # SKIP SVE set SVE get FPSIMD for VL 1696
2155 22:22:43.029824 # ok 428 # SKIP SVE set FPSIMD get SVE for VL 1696
2156 22:22:43.029928 # ok 429 Set SVE VL 1712
2157 22:22:43.030012 # ok 430 # SKIP SVE set SVE get SVE for VL 1712
2158 22:22:43.030094 # ok 431 # SKIP SVE set SVE get FPSIMD for VL 1712
2159 22:22:43.030176 # ok 432 # SKIP SVE set FPSIMD get SVE for VL 1712
2160 22:22:43.030258 # ok 433 Set SVE VL 1728
2161 22:22:43.030339 # ok 434 # SKIP SVE set SVE get SVE for VL 1728
2162 22:22:43.030443 # ok 435 # SKIP SVE set SVE get FPSIMD for VL 1728
2163 22:22:43.030527 # ok 436 # SKIP SVE set FPSIMD get SVE for VL 1728
2164 22:22:43.030610 # ok 437 Set SVE VL 1744
2165 22:22:43.030691 # ok 438 # SKIP SVE set SVE get SVE for VL 1744
2166 22:22:43.030774 # ok 439 # SKIP SVE set SVE get FPSIMD for VL 1744
2167 22:22:43.030872 # ok 440 # SKIP SVE set FPSIMD get SVE for VL 1744
2168 22:22:43.030956 # ok 441 Set SVE VL 1760
2169 22:22:43.031038 # ok 442 # SKIP SVE set SVE get SVE for VL 1760
2170 22:22:43.031120 # ok 443 # SKIP SVE set SVE get FPSIMD for VL 1760
2171 22:22:43.031218 # ok 444 # SKIP SVE set FPSIMD get SVE for VL 1760
2172 22:22:43.031303 # ok 445 Set SVE VL 1776
2173 22:22:43.031384 # ok 446 # SKIP SVE set SVE get SVE for VL 1776
2174 22:22:43.031481 # ok 447 # SKIP SVE set SVE get FPSIMD for VL 1776
2175 22:22:43.031566 # ok 448 # SKIP SVE set FPSIMD get SVE for VL 1776
2176 22:22:43.031663 # ok 449 Set SVE VL 1792
2177 22:22:43.031747 # ok 450 # SKIP SVE set SVE get SVE for VL 1792
2178 22:22:43.031846 # ok 451 # SKIP SVE set SVE get FPSIMD for VL 1792
2179 22:22:43.031933 # ok 452 # SKIP SVE set FPSIMD get SVE for VL 1792
2180 22:22:43.032030 # ok 453 Set SVE VL 1808
2181 22:22:43.032545 # ok 454 # SKIP SVE set SVE get SVE for VL 1808
2182 22:22:43.032651 # ok 455 # SKIP SVE set SVE get FPSIMD for VL 1808
2183 22:22:43.032735 # ok 456 # SKIP SVE set FPSIMD get SVE for VL 1808
2184 22:22:43.032818 # ok 457 Set SVE VL 1824
2185 22:22:43.032899 # ok 458 # SKIP SVE set SVE get SVE for VL 1824
2186 22:22:43.032997 # ok 459 # SKIP SVE set SVE get FPSIMD for VL 1824
2187 22:22:43.033082 # ok 460 # SKIP SVE set FPSIMD get SVE for VL 1824
2188 22:22:43.033164 # ok 461 Set SVE VL 1840
2189 22:22:43.033245 # ok 462 # SKIP SVE set SVE get SVE for VL 1840
2190 22:22:43.033327 # ok 463 # SKIP SVE set SVE get FPSIMD for VL 1840
2191 22:22:43.033424 # ok 464 # SKIP SVE set FPSIMD get SVE for VL 1840
2192 22:22:43.033509 # ok 465 Set SVE VL 1856
2193 22:22:43.033591 # ok 466 # SKIP SVE set SVE get SVE for VL 1856
2194 22:22:43.033682 # ok 467 # SKIP SVE set SVE get FPSIMD for VL 1856
2195 22:22:43.034019 # ok 468 # SKIP SVE set FPSIMD get SVE for VL 1856
2196 22:22:43.034110 # ok 469 Set SVE VL 1872
2197 22:22:43.034193 # ok 470 # SKIP SVE set SVE get SVE for VL 1872
2198 22:22:43.034275 # ok 471 # SKIP SVE set SVE get FPSIMD for VL 1872
2199 22:22:43.034357 # ok 472 # SKIP SVE set FPSIMD get SVE for VL 1872
2200 22:22:43.034439 # ok 473 Set SVE VL 1888
2201 22:22:43.034537 # ok 474 # SKIP SVE set SVE get SVE for VL 1888
2202 22:22:43.034622 # ok 475 # SKIP SVE set SVE get FPSIMD for VL 1888
2203 22:22:43.034704 # ok 476 # SKIP SVE set FPSIMD get SVE for VL 1888
2204 22:22:43.034787 # ok 477 Set SVE VL 1904
2205 22:22:43.034884 # ok 478 # SKIP SVE set SVE get SVE for VL 1904
2206 22:22:43.034970 # ok 479 # SKIP SVE set SVE get FPSIMD for VL 1904
2207 22:22:43.063156 # ok 480 # SKIP SVE set FPSIMD get SVE for VL 1904
2208 22:22:43.063394 # ok 481 Set SVE VL 1920
2209 22:22:43.063508 # ok 482 # SKIP SVE set SVE get SVE for VL 1920
2210 22:22:43.063599 # ok 483 # SKIP SVE set SVE get FPSIMD for VL 1920
2211 22:22:43.063693 # ok 484 # SKIP SVE set FPSIMD get SVE for VL 1920
2212 22:22:43.063783 # ok 485 Set SVE VL 1936
2213 22:22:43.063890 # ok 486 # SKIP SVE set SVE get SVE for VL 1936
2214 22:22:43.063981 # ok 487 # SKIP SVE set SVE get FPSIMD for VL 1936
2215 22:22:43.064067 # ok 488 # SKIP SVE set FPSIMD get SVE for VL 1936
2216 22:22:43.064169 # ok 489 Set SVE VL 1952
2217 22:22:43.064255 # ok 490 # SKIP SVE set SVE get SVE for VL 1952
2218 22:22:43.064359 # ok 491 # SKIP SVE set SVE get FPSIMD for VL 1952
2219 22:22:43.064448 # ok 492 # SKIP SVE set FPSIMD get SVE for VL 1952
2220 22:22:43.064553 # ok 493 Set SVE VL 1968
2221 22:22:43.064654 # ok 494 # SKIP SVE set SVE get SVE for VL 1968
2222 22:22:43.064759 # ok 495 # SKIP SVE set SVE get FPSIMD for VL 1968
2223 22:22:43.065628 # ok 496 # SKIP SVE set FPSIMD get SVE for VL 1968
2224 22:22:43.066107 # ok 497 Set SVE VL 1984
2225 22:22:43.066276 # ok 498 # SKIP SVE set SVE get SVE for VL 1984
2226 22:22:43.066406 # ok 499 # SKIP SVE set SVE get FPSIMD for VL 1984
2227 22:22:43.066534 # ok 500 # SKIP SVE set FPSIMD get SVE for VL 1984
2228 22:22:43.066653 # ok 501 Set SVE VL 2000
2229 22:22:43.066777 # ok 502 # SKIP SVE set SVE get SVE for VL 2000
2230 22:22:43.066924 # ok 503 # SKIP SVE set SVE get FPSIMD for VL 2000
2231 22:22:43.067048 # ok 504 # SKIP SVE set FPSIMD get SVE for VL 2000
2232 22:22:43.067166 # ok 505 Set SVE VL 2016
2233 22:22:43.067283 # ok 506 # SKIP SVE set SVE get SVE for VL 2016
2234 22:22:43.067413 # ok 507 # SKIP SVE set SVE get FPSIMD for VL 2016
2235 22:22:43.067549 # ok 508 # SKIP SVE set FPSIMD get SVE for VL 2016
2236 22:22:43.067709 # ok 509 Set SVE VL 2032
2237 22:22:43.067878 # ok 510 # SKIP SVE set SVE get SVE for VL 2032
2238 22:22:43.068032 # ok 511 # SKIP SVE set SVE get FPSIMD for VL 2032
2239 22:22:43.068232 # ok 512 # SKIP SVE set FPSIMD get SVE for VL 2032
2240 22:22:43.068429 # ok 513 Set SVE VL 2048
2241 22:22:43.068587 # ok 514 # SKIP SVE set SVE get SVE for VL 2048
2242 22:22:43.068747 # ok 515 # SKIP SVE set SVE get FPSIMD for VL 2048
2243 22:22:43.068896 # ok 516 # SKIP SVE set FPSIMD get SVE for VL 2048
2244 22:22:43.069017 # ok 517 Set SVE VL 2064
2245 22:22:43.069134 # ok 518 # SKIP SVE set SVE get SVE for VL 2064
2246 22:22:43.069250 # ok 519 # SKIP SVE set SVE get FPSIMD for VL 2064
2247 22:22:43.069366 # ok 520 # SKIP SVE set FPSIMD get SVE for VL 2064
2248 22:22:43.069482 # ok 521 Set SVE VL 2080
2249 22:22:43.069598 # ok 522 # SKIP SVE set SVE get SVE for VL 2080
2250 22:22:43.069733 # ok 523 # SKIP SVE set SVE get FPSIMD for VL 2080
2251 22:22:43.069852 # ok 524 # SKIP SVE set FPSIMD get SVE for VL 2080
2252 22:22:43.069967 # ok 525 Set SVE VL 2096
2253 22:22:43.070083 # ok 526 # SKIP SVE set SVE get SVE for VL 2096
2254 22:22:43.070229 # ok 527 # SKIP SVE set SVE get FPSIMD for VL 2096
2255 22:22:43.070353 # ok 528 # SKIP SVE set FPSIMD get SVE for VL 2096
2256 22:22:43.070472 # ok 529 Set SVE VL 2112
2257 22:22:43.070591 # ok 530 # SKIP SVE set SVE get SVE for VL 2112
2258 22:22:43.070706 # ok 531 # SKIP SVE set SVE get FPSIMD for VL 2112
2259 22:22:43.073520 # ok 532 # SKIP SVE set FPSIMD get SVE for VL 2112
2260 22:22:43.073834 # ok 533 Set SVE VL 2128
2261 22:22:43.073939 # ok 534 # SKIP SVE set SVE get SVE for VL 2128
2262 22:22:43.074026 # ok 535 # SKIP SVE set SVE get FPSIMD for VL 2128
2263 22:22:43.074124 # ok 536 # SKIP SVE set FPSIMD get SVE for VL 2128
2264 22:22:43.074210 # ok 537 Set SVE VL 2144
2265 22:22:43.074292 # ok 538 # SKIP SVE set SVE get SVE for VL 2144
2266 22:22:43.074390 # ok 539 # SKIP SVE set SVE get FPSIMD for VL 2144
2267 22:22:43.074474 # ok 540 # SKIP SVE set FPSIMD get SVE for VL 2144
2268 22:22:43.074571 # ok 541 Set SVE VL 2160
2269 22:22:43.074655 # ok 542 # SKIP SVE set SVE get SVE for VL 2160
2270 22:22:43.074737 # ok 543 # SKIP SVE set SVE get FPSIMD for VL 2160
2271 22:22:43.074834 # ok 544 # SKIP SVE set FPSIMD get SVE for VL 2160
2272 22:22:43.074919 # ok 545 Set SVE VL 2176
2273 22:22:43.075001 # ok 546 # SKIP SVE set SVE get SVE for VL 2176
2274 22:22:43.075099 # ok 547 # SKIP SVE set SVE get FPSIMD for VL 2176
2275 22:22:43.075183 # ok 548 # SKIP SVE set FPSIMD get SVE for VL 2176
2276 22:22:43.075279 # ok 549 Set SVE VL 2192
2277 22:22:43.075364 # ok 550 # SKIP SVE set SVE get SVE for VL 2192
2278 22:22:43.075460 # ok 551 # SKIP SVE set SVE get FPSIMD for VL 2192
2279 22:22:43.075545 # ok 552 # SKIP SVE set FPSIMD get SVE for VL 2192
2280 22:22:43.075641 # ok 553 Set SVE VL 2208
2281 22:22:43.075725 # ok 554 # SKIP SVE set SVE get SVE for VL 2208
2282 22:22:43.075825 # ok 555 # SKIP SVE set SVE get FPSIMD for VL 2208
2283 22:22:43.075926 # ok 556 # SKIP SVE set FPSIMD get SVE for VL 2208
2284 22:22:43.076023 # ok 557 Set SVE VL 2224
2285 22:22:43.076125 # ok 558 # SKIP SVE set SVE get SVE for VL 2224
2286 22:22:43.076224 # ok 559 # SKIP SVE set SVE get FPSIMD for VL 2224
2287 22:22:43.076323 # ok 560 # SKIP SVE set FPSIMD get SVE for VL 2224
2288 22:22:43.076408 # ok 561 Set SVE VL 2240
2289 22:22:43.076512 # ok 562 # SKIP SVE set SVE get SVE for VL 2240
2290 22:22:43.076597 # ok 563 # SKIP SVE set SVE get FPSIMD for VL 2240
2291 22:22:43.076922 # ok 564 # SKIP SVE set FPSIMD get SVE for VL 2240
2292 22:22:43.077076 # ok 565 Set SVE VL 2256
2293 22:22:43.077201 # ok 566 # SKIP SVE set SVE get SVE for VL 2256
2294 22:22:43.081369 # ok 567 # SKIP SVE set SVE get FPSIMD for VL 2256
2295 22:22:43.081715 # ok 568 # SKIP SVE set FPSIMD get SVE for VL 2256
2296 22:22:43.081871 # ok 569 Set SVE VL 2272
2297 22:22:43.082056 # ok 570 # SKIP SVE set SVE get SVE for VL 2272
2298 22:22:43.082219 # ok 571 # SKIP SVE set SVE get FPSIMD for VL 2272
2299 22:22:43.082366 # ok 572 # SKIP SVE set FPSIMD get SVE for VL 2272
2300 22:22:43.082508 # ok 573 Set SVE VL 2288
2301 22:22:43.082625 # ok 574 # SKIP SVE set SVE get SVE for VL 2288
2302 22:22:43.082738 # ok 575 # SKIP SVE set SVE get FPSIMD for VL 2288
2303 22:22:43.082850 # ok 576 # SKIP SVE set FPSIMD get SVE for VL 2288
2304 22:22:43.082990 # ok 577 Set SVE VL 2304
2305 22:22:43.083107 # ok 578 # SKIP SVE set SVE get SVE for VL 2304
2306 22:22:43.083221 # ok 579 # SKIP SVE set SVE get FPSIMD for VL 2304
2307 22:22:43.083334 # ok 580 # SKIP SVE set FPSIMD get SVE for VL 2304
2308 22:22:43.083448 # ok 581 Set SVE VL 2320
2309 22:22:43.083563 # ok 582 # SKIP SVE set SVE get SVE for VL 2320
2310 22:22:43.083691 # ok 583 # SKIP SVE set SVE get FPSIMD for VL 2320
2311 22:22:43.083853 # ok 584 # SKIP SVE set FPSIMD get SVE for VL 2320
2312 22:22:43.083973 # ok 585 Set SVE VL 2336
2313 22:22:43.084086 # ok 586 # SKIP SVE set SVE get SVE for VL 2336
2314 22:22:43.084231 # ok 587 # SKIP SVE set SVE get FPSIMD for VL 2336
2315 22:22:43.084350 # ok 588 # SKIP SVE set FPSIMD get SVE for VL 2336
2316 22:22:43.084464 # ok 589 Set SVE VL 2352
2317 22:22:43.084581 # ok 590 # SKIP SVE set SVE get SVE for VL 2352
2318 22:22:43.084703 # ok 591 # SKIP SVE set SVE get FPSIMD for VL 2352
2319 22:22:43.084863 # ok 592 # SKIP SVE set FPSIMD get SVE for VL 2352
2320 22:22:43.084982 # ok 593 Set SVE VL 2368
2321 22:22:43.085096 # ok 594 # SKIP SVE set SVE get SVE for VL 2368
2322 22:22:43.085210 # ok 595 # SKIP SVE set SVE get FPSIMD for VL 2368
2323 22:22:43.085323 # ok 596 # SKIP SVE set FPSIMD get SVE for VL 2368
2324 22:22:43.085435 # ok 597 Set SVE VL 2384
2325 22:22:43.085551 # ok 598 # SKIP SVE set SVE get SVE for VL 2384
2326 22:22:43.085684 # ok 599 # SKIP SVE set SVE get FPSIMD for VL 2384
2327 22:22:43.085800 # ok 600 # SKIP SVE set FPSIMD get SVE for VL 2384
2328 22:22:43.085912 # ok 601 Set SVE VL 2400
2329 22:22:43.086053 # ok 602 # SKIP SVE set SVE get SVE for VL 2400
2330 22:22:43.086174 # ok 603 # SKIP SVE set SVE get FPSIMD for VL 2400
2331 22:22:43.086289 # ok 604 # SKIP SVE set FPSIMD get SVE for VL 2400
2332 22:22:43.086414 # ok 605 Set SVE VL 2416
2333 22:22:43.086590 # ok 606 # SKIP SVE set SVE get SVE for VL 2416
2334 22:22:43.086732 # ok 607 # SKIP SVE set SVE get FPSIMD for VL 2416
2335 22:22:43.086872 # ok 608 # SKIP SVE set FPSIMD get SVE for VL 2416
2336 22:22:43.087299 # ok 609 Set SVE VL 2432
2337 22:22:43.087540 # ok 610 # SKIP SVE set SVE get SVE for VL 2432
2338 22:22:43.087710 # ok 611 # SKIP SVE set SVE get FPSIMD for VL 2432
2339 22:22:43.087896 # ok 612 # SKIP SVE set FPSIMD get SVE for VL 2432
2340 22:22:43.088105 # ok 613 Set SVE VL 2448
2341 22:22:43.088266 # ok 614 # SKIP SVE set SVE get SVE for VL 2448
2342 22:22:43.088418 # ok 615 # SKIP SVE set SVE get FPSIMD for VL 2448
2343 22:22:43.088551 # ok 616 # SKIP SVE set FPSIMD get SVE for VL 2448
2344 22:22:43.088695 # ok 617 Set SVE VL 2464
2345 22:22:43.088875 # ok 618 # SKIP SVE set SVE get SVE for VL 2464
2346 22:22:43.089004 # ok 619 # SKIP SVE set SVE get FPSIMD for VL 2464
2347 22:22:43.089118 # ok 620 # SKIP SVE set FPSIMD get SVE for VL 2464
2348 22:22:43.089231 # ok 621 Set SVE VL 2480
2349 22:22:43.089372 # ok 622 # SKIP SVE set SVE get SVE for VL 2480
2350 22:22:43.089528 # ok 623 # SKIP SVE set SVE get FPSIMD for VL 2480
2351 22:22:43.089675 # ok 624 # SKIP SVE set FPSIMD get SVE for VL 2480
2352 22:22:43.089874 # ok 625 Set SVE VL 2496
2353 22:22:43.090123 # ok 626 # SKIP SVE set SVE get SVE for VL 2496
2354 22:22:43.090308 # ok 627 # SKIP SVE set SVE get FPSIMD for VL 2496
2355 22:22:43.090496 # ok 628 # SKIP SVE set FPSIMD get SVE for VL 2496
2356 22:22:43.090674 # ok 629 Set SVE VL 2512
2357 22:22:43.090818 # ok 630 # SKIP SVE set SVE get SVE for VL 2512
2358 22:22:43.090948 # ok 631 # SKIP SVE set SVE get FPSIMD for VL 2512
2359 22:22:43.091098 # ok 632 # SKIP SVE set FPSIMD get SVE for VL 2512
2360 22:22:43.091285 # ok 633 Set SVE VL 2528
2361 22:22:43.091444 # ok 634 # SKIP SVE set SVE get SVE for VL 2528
2362 22:22:43.091602 # ok 635 # SKIP SVE set SVE get FPSIMD for VL 2528
2363 22:22:43.091764 # ok 636 # SKIP SVE set FPSIMD get SVE for VL 2528
2364 22:22:43.091929 # ok 637 Set SVE VL 2544
2365 22:22:43.092089 # ok 638 # SKIP SVE set SVE get SVE for VL 2544
2366 22:22:43.092241 # ok 639 # SKIP SVE set SVE get FPSIMD for VL 2544
2367 22:22:43.092399 # ok 640 # SKIP SVE set FPSIMD get SVE for VL 2544
2368 22:22:43.092563 # ok 641 Set SVE VL 2560
2369 22:22:43.092730 # ok 642 # SKIP SVE set SVE get SVE for VL 2560
2370 22:22:43.092890 # ok 643 # SKIP SVE set SVE get FPSIMD for VL 2560
2371 22:22:43.093127 # ok 644 # SKIP SVE set FPSIMD get SVE for VL 2560
2372 22:22:43.093336 # ok 645 Set SVE VL 2576
2373 22:22:43.093549 # ok 646 # SKIP SVE set SVE get SVE for VL 2576
2374 22:22:43.094283 # ok 647 # SKIP SVE set SVE get FPSIMD for VL 2576
2375 22:22:43.094420 # ok 648 # SKIP SVE set FPSIMD get SVE for VL 2576
2376 22:22:43.094538 # ok 649 Set SVE VL 2592
2377 22:22:43.094654 # ok 650 # SKIP SVE set SVE get SVE for VL 2592
2378 22:22:43.094768 # ok 651 # SKIP SVE set SVE get FPSIMD for VL 2592
2379 22:22:43.094882 # ok 652 # SKIP SVE set FPSIMD get SVE for VL 2592
2380 22:22:43.095216 # ok 653 Set SVE VL 2608
2381 22:22:43.095344 # ok 654 # SKIP SVE set SVE get SVE for VL 2608
2382 22:22:43.095460 # ok 655 # SKIP SVE set SVE get FPSIMD for VL 2608
2383 22:22:43.095579 # ok 656 # SKIP SVE set FPSIMD get SVE for VL 2608
2384 22:22:43.095694 # ok 657 Set SVE VL 2624
2385 22:22:43.095809 # ok 658 # SKIP SVE set SVE get SVE for VL 2624
2386 22:22:43.095924 # ok 659 # SKIP SVE set SVE get FPSIMD for VL 2624
2387 22:22:43.096038 # ok 660 # SKIP SVE set FPSIMD get SVE for VL 2624
2388 22:22:43.096154 # ok 661 Set SVE VL 2640
2389 22:22:43.096268 # ok 662 # SKIP SVE set SVE get SVE for VL 2640
2390 22:22:43.096383 # ok 663 # SKIP SVE set SVE get FPSIMD for VL 2640
2391 22:22:43.096499 # ok 664 # SKIP SVE set FPSIMD get SVE for VL 2640
2392 22:22:43.096618 # ok 665 Set SVE VL 2656
2393 22:22:43.096732 # ok 666 # SKIP SVE set SVE get SVE for VL 2656
2394 22:22:43.101594 # ok 667 # SKIP SVE set SVE get FPSIMD for VL 2656
2395 22:22:43.101954 # ok 668 # SKIP SVE set FPSIMD get SVE for VL 2656
2396 22:22:43.102058 # ok 669 Set SVE VL 2672
2397 22:22:43.102146 # ok 670 # SKIP SVE set SVE get SVE for VL 2672
2398 22:22:43.102246 # ok 671 # SKIP SVE set SVE get FPSIMD for VL 2672
2399 22:22:43.102335 # ok 672 # SKIP SVE set FPSIMD get SVE for VL 2672
2400 22:22:43.102418 # ok 673 Set SVE VL 2688
2401 22:22:43.102516 # ok 674 # SKIP SVE set SVE get SVE for VL 2688
2402 22:22:43.102603 # ok 675 # SKIP SVE set SVE get FPSIMD for VL 2688
2403 22:22:43.102698 # ok 676 # SKIP SVE set FPSIMD get SVE for VL 2688
2404 22:22:43.102840 # ok 677 Set SVE VL 2704
2405 22:22:43.102941 # ok 678 # SKIP SVE set SVE get SVE for VL 2704
2406 22:22:43.103025 # ok 679 # SKIP SVE set SVE get FPSIMD for VL 2704
2407 22:22:43.103107 # ok 680 # SKIP SVE set FPSIMD get SVE for VL 2704
2408 22:22:43.103204 # ok 681 Set SVE VL 2720
2409 22:22:43.103288 # ok 682 # SKIP SVE set SVE get SVE for VL 2720
2410 22:22:43.103442 # ok 683 # SKIP SVE set SVE get FPSIMD for VL 2720
2411 22:22:43.103537 # ok 684 # SKIP SVE set FPSIMD get SVE for VL 2720
2412 22:22:43.103621 # ok 685 Set SVE VL 2736
2413 22:22:43.103717 # ok 686 # SKIP SVE set SVE get SVE for VL 2736
2414 22:22:43.103801 # ok 687 # SKIP SVE set SVE get FPSIMD for VL 2736
2415 22:22:43.104175 # ok 688 # SKIP SVE set FPSIMD get SVE for VL 2736
2416 22:22:43.104280 # ok 689 Set SVE VL 2752
2417 22:22:43.104365 # ok 690 # SKIP SVE set SVE get SVE for VL 2752
2418 22:22:43.104462 # ok 691 # SKIP SVE set SVE get FPSIMD for VL 2752
2419 22:22:43.104554 # ok 692 # SKIP SVE set FPSIMD get SVE for VL 2752
2420 22:22:43.104651 # ok 693 Set SVE VL 2768
2421 22:22:43.104744 # ok 694 # SKIP SVE set SVE get SVE for VL 2768
2422 22:22:43.104828 # ok 695 # SKIP SVE set SVE get FPSIMD for VL 2768
2423 22:22:43.104925 # ok 696 # SKIP SVE set FPSIMD get SVE for VL 2768
2424 22:22:43.105010 # ok 697 Set SVE VL 2784
2425 22:22:43.105092 # ok 698 # SKIP SVE set SVE get SVE for VL 2784
2426 22:22:43.105190 # ok 699 # SKIP SVE set SVE get FPSIMD for VL 2784
2427 22:22:43.105275 # ok 700 # SKIP SVE set FPSIMD get SVE for VL 2784
2428 22:22:43.105371 # ok 701 Set SVE VL 2800
2429 22:22:43.105468 # ok 702 # SKIP SVE set SVE get SVE for VL 2800
2430 22:22:43.105570 # ok 703 # SKIP SVE set SVE get FPSIMD for VL 2800
2431 22:22:43.105663 # ok 704 # SKIP SVE set FPSIMD get SVE for VL 2800
2432 22:22:43.105762 # ok 705 Set SVE VL 2816
2433 22:22:43.105858 # ok 706 # SKIP SVE set SVE get SVE for VL 2816
2434 22:22:43.106259 # ok 707 # SKIP SVE set SVE get FPSIMD for VL 2816
2435 22:22:43.106366 # ok 708 # SKIP SVE set FPSIMD get SVE for VL 2816
2436 22:22:43.106453 # ok 709 Set SVE VL 2832
2437 22:22:43.106983 # ok 710 # SKIP SVE set SVE get SVE for VL 2832
2438 22:22:43.107088 # ok 711 # SKIP SVE set SVE get FPSIMD for VL 2832
2439 22:22:43.107175 # ok 712 # SKIP SVE set FPSIMD get SVE for VL 2832
2440 22:22:43.107260 # ok 713 Set SVE VL 2848
2441 22:22:43.109704 # ok 714 # SKIP SVE set SVE get SVE for VL 2848
2442 22:22:43.109856 # ok 715 # SKIP SVE set SVE get FPSIMD for VL 2848
2443 22:22:43.109947 # ok 716 # SKIP SVE set FPSIMD get SVE for VL 2848
2444 22:22:43.110029 # ok 717 Set SVE VL 2864
2445 22:22:43.110316 # ok 718 # SKIP SVE set SVE get SVE for VL 2864
2446 22:22:43.110418 # ok 719 # SKIP SVE set SVE get FPSIMD for VL 2864
2447 22:22:43.110732 # ok 720 # SKIP SVE set FPSIMD get SVE for VL 2864
2448 22:22:43.110836 # ok 721 Set SVE VL 2880
2449 22:22:43.110920 # ok 722 # SKIP SVE set SVE get SVE for VL 2880
2450 22:22:43.111004 # ok 723 # SKIP SVE set SVE get FPSIMD for VL 2880
2451 22:22:43.111086 # ok 724 # SKIP SVE set FPSIMD get SVE for VL 2880
2452 22:22:43.111174 # ok 725 Set SVE VL 2896
2453 22:22:43.111275 # ok 726 # SKIP SVE set SVE get SVE for VL 2896
2454 22:22:43.111362 # ok 727 # SKIP SVE set SVE get FPSIMD for VL 2896
2455 22:22:43.111446 # ok 728 # SKIP SVE set FPSIMD get SVE for VL 2896
2456 22:22:43.111535 # ok 729 Set SVE VL 2912
2457 22:22:43.111638 # ok 730 # SKIP SVE set SVE get SVE for VL 2912
2458 22:22:43.111729 # ok 731 # SKIP SVE set SVE get FPSIMD for VL 2912
2459 22:22:43.111837 # ok 732 # SKIP SVE set FPSIMD get SVE for VL 2912
2460 22:22:43.111923 # ok 733 Set SVE VL 2928
2461 22:22:43.112552 # ok 734 # SKIP SVE set SVE get SVE for VL 2928
2462 22:22:43.112660 # ok 735 # SKIP SVE set SVE get FPSIMD for VL 2928
2463 22:22:43.112754 # ok 736 # SKIP SVE set FPSIMD get SVE for VL 2928
2464 22:22:43.112840 # ok 737 Set SVE VL 2944
2465 22:22:43.112942 # ok 738 # SKIP SVE set SVE get SVE for VL 2944
2466 22:22:43.113031 # ok 739 # SKIP SVE set SVE get FPSIMD for VL 2944
2467 22:22:43.113134 # ok 740 # SKIP SVE set FPSIMD get SVE for VL 2944
2468 22:22:43.113222 # ok 741 Set SVE VL 2960
2469 22:22:43.113320 # ok 742 # SKIP SVE set SVE get SVE for VL 2960
2470 22:22:43.113614 # ok 743 # SKIP SVE set SVE get FPSIMD for VL 2960
2471 22:22:43.113749 # ok 744 # SKIP SVE set FPSIMD get SVE for VL 2960
2472 22:22:43.113837 # ok 745 Set SVE VL 2976
2473 22:22:43.113921 # ok 746 # SKIP SVE set SVE get SVE for VL 2976
2474 22:22:43.114131 # ok 747 # SKIP SVE set SVE get FPSIMD for VL 2976
2475 22:22:43.114221 # ok 748 # SKIP SVE set FPSIMD get SVE for VL 2976
2476 22:22:43.114317 # ok 749 Set SVE VL 2992
2477 22:22:43.114601 # ok 750 # SKIP SVE set SVE get SVE for VL 2992
2478 22:22:43.114721 # ok 751 # SKIP SVE set SVE get FPSIMD for VL 2992
2479 22:22:43.114825 # ok 752 # SKIP SVE set FPSIMD get SVE for VL 2992
2480 22:22:43.114926 # ok 753 Set SVE VL 3008
2481 22:22:43.115025 # ok 754 # SKIP SVE set SVE get SVE for VL 3008
2482 22:22:43.115126 # ok 755 # SKIP SVE set SVE get FPSIMD for VL 3008
2483 22:22:43.115426 # ok 756 # SKIP SVE set FPSIMD get SVE for VL 3008
2484 22:22:43.115532 # ok 757 Set SVE VL 3024
2485 22:22:43.115631 # ok 758 # SKIP SVE set SVE get SVE for VL 3024
2486 22:22:43.115716 # ok 759 # SKIP SVE set SVE get FPSIMD for VL 3024
2487 22:22:43.115813 # ok 760 # SKIP SVE set FPSIMD get SVE for VL 3024
2488 22:22:43.115908 # ok 761 Set SVE VL 3040
2489 22:22:43.116005 # ok 762 # SKIP SVE set SVE get SVE for VL 3040
2490 22:22:43.116104 # ok 763 # SKIP SVE set SVE get FPSIMD for VL 3040
2491 22:22:43.116202 # ok 764 # SKIP SVE set FPSIMD get SVE for VL 3040
2492 22:22:43.116300 # ok 765 Set SVE VL 3056
2493 22:22:43.116397 # ok 766 # SKIP SVE set SVE get SVE for VL 3056
2494 22:22:43.116738 # ok 767 # SKIP SVE set SVE get FPSIMD for VL 3056
2495 22:22:43.116960 # ok 768 # SKIP SVE set FPSIMD get SVE for VL 3056
2496 22:22:43.117159 # ok 769 Set SVE VL 3072
2497 22:22:43.117384 # ok 770 # SKIP SVE set SVE get SVE for VL 3072
2498 22:22:43.117581 # ok 771 # SKIP SVE set SVE get FPSIMD for VL 3072
2499 22:22:43.117784 # ok 772 # SKIP SVE set FPSIMD get SVE for VL 3072
2500 22:22:43.117971 # ok 773 Set SVE VL 3088
2501 22:22:43.118151 # ok 774 # SKIP SVE set SVE get SVE for VL 3088
2502 22:22:43.118374 # ok 775 # SKIP SVE set SVE get FPSIMD for VL 3088
2503 22:22:43.118569 # ok 776 # SKIP SVE set FPSIMD get SVE for VL 3088
2504 22:22:43.118755 # ok 777 Set SVE VL 3104
2505 22:22:43.118934 # ok 778 # SKIP SVE set SVE get SVE for VL 3104
2506 22:22:43.119110 # ok 779 # SKIP SVE set SVE get FPSIMD for VL 3104
2507 22:22:43.119290 # ok 780 # SKIP SVE set FPSIMD get SVE for VL 3104
2508 22:22:43.119469 # ok 781 Set SVE VL 3120
2509 22:22:43.119641 # ok 782 # SKIP SVE set SVE get SVE for VL 3120
2510 22:22:43.119829 # ok 783 # SKIP SVE set SVE get FPSIMD for VL 3120
2511 22:22:43.120012 # ok 784 # SKIP SVE set FPSIMD get SVE for VL 3120
2512 22:22:43.120193 # ok 785 Set SVE VL 3136
2513 22:22:43.120418 # ok 786 # SKIP SVE set SVE get SVE for VL 3136
2514 22:22:43.120591 # ok 787 # SKIP SVE set SVE get FPSIMD for VL 3136
2515 22:22:43.120776 # ok 788 # SKIP SVE set FPSIMD get SVE for VL 3136
2516 22:22:43.120976 # ok 789 Set SVE VL 3152
2517 22:22:43.121160 # ok 790 # SKIP SVE set SVE get SVE for VL 3152
2518 22:22:43.121345 # ok 791 # SKIP SVE set SVE get FPSIMD for VL 3152
2519 22:22:43.121532 # ok 792 # SKIP SVE set FPSIMD get SVE for VL 3152
2520 22:22:43.122311 # ok 793 Set SVE VL 3168
2521 22:22:43.122494 # ok 794 # SKIP SVE set SVE get SVE for VL 3168
2522 22:22:43.122656 # ok 795 # SKIP SVE set SVE get FPSIMD for VL 3168
2523 22:22:43.122815 # ok 796 # SKIP SVE set FPSIMD get SVE for VL 3168
2524 22:22:43.122972 # ok 797 Set SVE VL 3184
2525 22:22:43.123119 # ok 798 # SKIP SVE set SVE get SVE for VL 3184
2526 22:22:43.123278 # ok 799 # SKIP SVE set SVE get FPSIMD for VL 3184
2527 22:22:43.123437 # ok 800 # SKIP SVE set FPSIMD get SVE for VL 3184
2528 22:22:43.123598 # ok 801 Set SVE VL 3200
2529 22:22:43.123754 # ok 802 # SKIP SVE set SVE get SVE for VL 3200
2530 22:22:43.123909 # ok 803 # SKIP SVE set SVE get FPSIMD for VL 3200
2531 22:22:43.124037 # ok 804 # SKIP SVE set FPSIMD get SVE for VL 3200
2532 22:22:43.124164 # ok 805 Set SVE VL 3216
2533 22:22:43.124289 # ok 806 # SKIP SVE set SVE get SVE for VL 3216
2534 22:22:43.124417 # ok 807 # SKIP SVE set SVE get FPSIMD for VL 3216
2535 22:22:43.124543 # ok 808 # SKIP SVE set FPSIMD get SVE for VL 3216
2536 22:22:43.124673 # ok 809 Set SVE VL 3232
2537 22:22:43.124826 # ok 810 # SKIP SVE set SVE get SVE for VL 3232
2538 22:22:43.125177 # ok 811 # SKIP SVE set SVE get FPSIMD for VL 3232
2539 22:22:43.125306 # ok 812 # SKIP SVE set FPSIMD get SVE for VL 3232
2540 22:22:43.125423 # ok 813 Set SVE VL 3248
2541 22:22:43.125540 # ok 814 # SKIP SVE set SVE get SVE for VL 3248
2542 22:22:43.125672 # ok 815 # SKIP SVE set SVE get FPSIMD for VL 3248
2543 22:22:43.125792 # ok 816 # SKIP SVE set FPSIMD get SVE for VL 3248
2544 22:22:43.125906 # ok 817 Set SVE VL 3264
2545 22:22:43.126022 # ok 818 # SKIP SVE set SVE get SVE for VL 3264
2546 22:22:43.126137 # ok 819 # SKIP SVE set SVE get FPSIMD for VL 3264
2547 22:22:43.126253 # ok 820 # SKIP SVE set FPSIMD get SVE for VL 3264
2548 22:22:43.126368 # ok 821 Set SVE VL 3280
2549 22:22:43.126483 # ok 822 # SKIP SVE set SVE get SVE for VL 3280
2550 22:22:43.126599 # ok 823 # SKIP SVE set SVE get FPSIMD for VL 3280
2551 22:22:43.126713 # ok 824 # SKIP SVE set FPSIMD get SVE for VL 3280
2552 22:22:43.126829 # ok 825 Set SVE VL 3296
2553 22:22:43.126943 # ok 826 # SKIP SVE set SVE get SVE for VL 3296
2554 22:22:43.127061 # ok 827 # SKIP SVE set SVE get FPSIMD for VL 3296
2555 22:22:43.127176 # ok 828 # SKIP SVE set FPSIMD get SVE for VL 3296
2556 22:22:43.127291 # ok 829 Set SVE VL 3312
2557 22:22:43.127406 # ok 830 # SKIP SVE set SVE get SVE for VL 3312
2558 22:22:43.127521 # ok 831 # SKIP SVE set SVE get FPSIMD for VL 3312
2559 22:22:43.127639 # ok 832 # SKIP SVE set FPSIMD get SVE for VL 3312
2560 22:22:43.127806 # ok 833 Set SVE VL 3328
2561 22:22:43.127951 # ok 834 # SKIP SVE set SVE get SVE for VL 3328
2562 22:22:43.128072 # ok 835 # SKIP SVE set SVE get FPSIMD for VL 3328
2563 22:22:43.128189 # ok 836 # SKIP SVE set FPSIMD get SVE for VL 3328
2564 22:22:43.128305 # ok 837 Set SVE VL 3344
2565 22:22:43.128421 # ok 838 # SKIP SVE set SVE get SVE for VL 3344
2566 22:22:43.128535 # ok 839 # SKIP SVE set SVE get FPSIMD for VL 3344
2567 22:22:43.128654 # ok 840 # SKIP SVE set FPSIMD get SVE for VL 3344
2568 22:22:43.128770 # ok 841 Set SVE VL 3360
2569 22:22:43.128886 # ok 842 # SKIP SVE set SVE get SVE for VL 3360
2570 22:22:43.129002 # ok 843 # SKIP SVE set SVE get FPSIMD for VL 3360
2571 22:22:43.129118 # ok 844 # SKIP SVE set FPSIMD get SVE for VL 3360
2572 22:22:43.129235 # ok 845 Set SVE VL 3376
2573 22:22:43.129350 # ok 846 # SKIP SVE set SVE get SVE for VL 3376
2574 22:22:43.129466 # ok 847 # SKIP SVE set SVE get FPSIMD for VL 3376
2575 22:22:43.129584 # ok 848 # SKIP SVE set FPSIMD get SVE for VL 3376
2576 22:22:43.129714 # ok 849 Set SVE VL 3392
2577 22:22:43.129831 # ok 850 # SKIP SVE set SVE get SVE for VL 3392
2578 22:22:43.129947 # ok 851 # SKIP SVE set SVE get FPSIMD for VL 3392
2579 22:22:43.130062 # ok 852 # SKIP SVE set FPSIMD get SVE for VL 3392
2580 22:22:43.130178 # ok 853 Set SVE VL 3408
2581 22:22:43.130293 # ok 854 # SKIP SVE set SVE get SVE for VL 3408
2582 22:22:43.134055 # ok 855 # SKIP SVE set SVE get FPSIMD for VL 3408
2583 22:22:43.134281 # ok 856 # SKIP SVE set FPSIMD get SVE for VL 3408
2584 22:22:43.134507 # ok 857 Set SVE VL 3424
2585 22:22:43.134746 # ok 858 # SKIP SVE set SVE get SVE for VL 3424
2586 22:22:43.134960 # ok 859 # SKIP SVE set SVE get FPSIMD for VL 3424
2587 22:22:43.135181 # ok 860 # SKIP SVE set FPSIMD get SVE for VL 3424
2588 22:22:43.135393 # ok 861 Set SVE VL 3440
2589 22:22:43.135649 # ok 862 # SKIP SVE set SVE get SVE for VL 3440
2590 22:22:43.135854 # ok 863 # SKIP SVE set SVE get FPSIMD for VL 3440
2591 22:22:43.136061 # ok 864 # SKIP SVE set FPSIMD get SVE for VL 3440
2592 22:22:43.136278 # ok 865 Set SVE VL 3456
2593 22:22:43.136488 # ok 866 # SKIP SVE set SVE get SVE for VL 3456
2594 22:22:43.136705 # ok 867 # SKIP SVE set SVE get FPSIMD for VL 3456
2595 22:22:43.136902 # ok 868 # SKIP SVE set FPSIMD get SVE for VL 3456
2596 22:22:43.137069 # ok 869 Set SVE VL 3472
2597 22:22:43.137230 # ok 870 # SKIP SVE set SVE get SVE for VL 3472
2598 22:22:43.137463 # ok 871 # SKIP SVE set SVE get FPSIMD for VL 3472
2599 22:22:43.137633 # ok 872 # SKIP SVE set FPSIMD get SVE for VL 3472
2600 22:22:43.137815 # ok 873 Set SVE VL 3488
2601 22:22:43.137980 # ok 874 # SKIP SVE set SVE get SVE for VL 3488
2602 22:22:43.138128 # ok 875 # SKIP SVE set SVE get FPSIMD for VL 3488
2603 22:22:43.138284 # ok 876 # SKIP SVE set FPSIMD get SVE for VL 3488
2604 22:22:43.138432 # ok 877 Set SVE VL 3504
2605 22:22:43.138626 # ok 878 # SKIP SVE set SVE get SVE for VL 3504
2606 22:22:43.138791 # ok 879 # SKIP SVE set SVE get FPSIMD for VL 3504
2607 22:22:43.138949 # ok 880 # SKIP SVE set FPSIMD get SVE for VL 3504
2608 22:22:43.139107 # ok 881 Set SVE VL 3520
2609 22:22:43.139266 # ok 882 # SKIP SVE set SVE get SVE for VL 3520
2610 22:22:43.139421 # ok 883 # SKIP SVE set SVE get FPSIMD for VL 3520
2611 22:22:43.139619 # ok 884 # SKIP SVE set FPSIMD get SVE for VL 3520
2612 22:22:43.139808 # ok 885 Set SVE VL 3536
2613 22:22:43.139988 # ok 886 # SKIP SVE set SVE get SVE for VL 3536
2614 22:22:43.140141 # ok 887 # SKIP SVE set SVE get FPSIMD for VL 3536
2615 22:22:43.140292 # ok 888 # SKIP SVE set FPSIMD get SVE for VL 3536
2616 22:22:43.140436 # ok 889 Set SVE VL 3552
2617 22:22:43.140588 # ok 890 # SKIP SVE set SVE get SVE for VL 3552
2618 22:22:43.140745 # ok 891 # SKIP SVE set SVE get FPSIMD for VL 3552
2619 22:22:43.140915 # ok 892 # SKIP SVE set FPSIMD get SVE for VL 3552
2620 22:22:43.141073 # ok 893 Set SVE VL 3568
2621 22:22:43.141219 # ok 894 # SKIP SVE set SVE get SVE for VL 3568
2622 22:22:43.141391 # ok 895 # SKIP SVE set SVE get FPSIMD for VL 3568
2623 22:22:43.141572 # ok 896 # SKIP SVE set FPSIMD get SVE for VL 3568
2624 22:22:43.141737 # ok 897 Set SVE VL 3584
2625 22:22:43.141896 # ok 898 # SKIP SVE set SVE get SVE for VL 3584
2626 22:22:43.142341 # ok 899 # SKIP SVE set SVE get FPSIMD for VL 3584
2627 22:22:43.142672 # ok 900 # SKIP SVE set FPSIMD get SVE for VL 3584
2628 22:22:43.142995 # ok 901 Set SVE VL 3600
2629 22:22:43.143327 # ok 902 # SKIP SVE set SVE get SVE for VL 3600
2630 22:22:43.143598 # ok 903 # SKIP SVE set SVE get FPSIMD for VL 3600
2631 22:22:43.143767 # ok 904 # SKIP SVE set FPSIMD get SVE for VL 3600
2632 22:22:43.143921 # ok 905 Set SVE VL 3616
2633 22:22:43.144061 # ok 906 # SKIP SVE set SVE get SVE for VL 3616
2634 22:22:43.144184 # ok 907 # SKIP SVE set SVE get FPSIMD for VL 3616
2635 22:22:43.144306 # ok 908 # SKIP SVE set FPSIMD get SVE for VL 3616
2636 22:22:43.144421 # ok 909 Set SVE VL 3632
2637 22:22:43.144541 # ok 910 # SKIP SVE set SVE get SVE for VL 3632
2638 22:22:43.144675 # ok 911 # SKIP SVE set SVE get FPSIMD for VL 3632
2639 22:22:43.144798 # ok 912 # SKIP SVE set FPSIMD get SVE for VL 3632
2640 22:22:43.144900 # ok 913 Set SVE VL 3648
2641 22:22:43.144993 # ok 914 # SKIP SVE set SVE get SVE for VL 3648
2642 22:22:43.145078 # ok 915 # SKIP SVE set SVE get FPSIMD for VL 3648
2643 22:22:43.145165 # ok 916 # SKIP SVE set FPSIMD get SVE for VL 3648
2644 22:22:43.145258 # ok 917 Set SVE VL 3664
2645 22:22:43.145372 # ok 918 # SKIP SVE set SVE get SVE for VL 3664
2646 22:22:43.145486 # ok 919 # SKIP SVE set SVE get FPSIMD for VL 3664
2647 22:22:43.145601 # ok 920 # SKIP SVE set FPSIMD get SVE for VL 3664
2648 22:22:43.145737 # ok 921 Set SVE VL 3680
2649 22:22:43.145854 # ok 922 # SKIP SVE set SVE get SVE for VL 3680
2650 22:22:43.145970 # ok 923 # SKIP SVE set SVE get FPSIMD for VL 3680
2651 22:22:43.146080 # ok 924 # SKIP SVE set FPSIMD get SVE for VL 3680
2652 22:22:43.146194 # ok 925 Set SVE VL 3696
2653 22:22:43.146308 # ok 926 # SKIP SVE set SVE get SVE for VL 3696
2654 22:22:43.146449 # ok 927 # SKIP SVE set SVE get FPSIMD for VL 3696
2655 22:22:43.146572 # ok 928 # SKIP SVE set FPSIMD get SVE for VL 3696
2656 22:22:43.146659 # ok 929 Set SVE VL 3712
2657 22:22:43.146736 # ok 930 # SKIP SVE set SVE get SVE for VL 3712
2658 22:22:43.146815 # ok 931 # SKIP SVE set SVE get FPSIMD for VL 3712
2659 22:22:43.146893 # ok 932 # SKIP SVE set FPSIMD get SVE for VL 3712
2660 22:22:43.146989 # ok 933 Set SVE VL 3728
2661 22:22:43.147072 # ok 934 # SKIP SVE set SVE get SVE for VL 3728
2662 22:22:43.147153 # ok 935 # SKIP SVE set SVE get FPSIMD for VL 3728
2663 22:22:43.147231 # ok 936 # SKIP SVE set FPSIMD get SVE for VL 3728
2664 22:22:43.147308 # ok 937 Set SVE VL 3744
2665 22:22:43.147386 # ok 938 # SKIP SVE set SVE get SVE for VL 3744
2666 22:22:43.147464 # ok 939 # SKIP SVE set SVE get FPSIMD for VL 3744
2667 22:22:43.147543 # ok 940 # SKIP SVE set FPSIMD get SVE for VL 3744
2668 22:22:43.147624 # ok 941 Set SVE VL 3760
2669 22:22:43.147706 # ok 942 # SKIP SVE set SVE get SVE for VL 3760
2670 22:22:43.148008 # ok 943 # SKIP SVE set SVE get FPSIMD for VL 3760
2671 22:22:43.148093 # ok 944 # SKIP SVE set FPSIMD get SVE for VL 3760
2672 22:22:43.148170 # ok 945 Set SVE VL 3776
2673 22:22:43.148233 # ok 946 # SKIP SVE set SVE get SVE for VL 3776
2674 22:22:43.148296 # ok 947 # SKIP SVE set SVE get FPSIMD for VL 3776
2675 22:22:43.148359 # ok 948 # SKIP SVE set FPSIMD get SVE for VL 3776
2676 22:22:43.148423 # ok 949 Set SVE VL 3792
2677 22:22:43.148484 # ok 950 # SKIP SVE set SVE get SVE for VL 3792
2678 22:22:43.148558 # ok 951 # SKIP SVE set SVE get FPSIMD for VL 3792
2679 22:22:43.148633 # ok 952 # SKIP SVE set FPSIMD get SVE for VL 3792
2680 22:22:43.148706 # ok 953 Set SVE VL 3808
2681 22:22:43.148814 # ok 954 # SKIP SVE set SVE get SVE for VL 3808
2682 22:22:43.148909 # ok 955 # SKIP SVE set SVE get FPSIMD for VL 3808
2683 22:22:43.148974 # ok 956 # SKIP SVE set FPSIMD get SVE for VL 3808
2684 22:22:43.149041 # ok 957 Set SVE VL 3824
2685 22:22:43.149101 # ok 958 # SKIP SVE set SVE get SVE for VL 3824
2686 22:22:43.149160 # ok 959 # SKIP SVE set SVE get FPSIMD for VL 3824
2687 22:22:43.149228 # ok 960 # SKIP SVE set FPSIMD get SVE for VL 3824
2688 22:22:43.149298 # ok 961 Set SVE VL 3840
2689 22:22:43.149373 # ok 962 # SKIP SVE set SVE get SVE for VL 3840
2690 22:22:43.149445 # ok 963 # SKIP SVE set SVE get FPSIMD for VL 3840
2691 22:22:43.149512 # ok 964 # SKIP SVE set FPSIMD get SVE for VL 3840
2692 22:22:43.149588 # ok 965 Set SVE VL 3856
2693 22:22:43.149682 # ok 966 # SKIP SVE set SVE get SVE for VL 3856
2694 22:22:43.149784 # ok 967 # SKIP SVE set SVE get FPSIMD for VL 3856
2695 22:22:43.149862 # ok 968 # SKIP SVE set FPSIMD get SVE for VL 3856
2696 22:22:43.149928 # ok 969 Set SVE VL 3872
2697 22:22:43.149991 # ok 970 # SKIP SVE set SVE get SVE for VL 3872
2698 22:22:43.150052 # ok 971 # SKIP SVE set SVE get FPSIMD for VL 3872
2699 22:22:43.150114 # ok 972 # SKIP SVE set FPSIMD get SVE for VL 3872
2700 22:22:43.150177 # ok 973 Set SVE VL 3888
2701 22:22:43.150245 # ok 974 # SKIP SVE set SVE get SVE for VL 3888
2702 22:22:43.150319 # ok 975 # SKIP SVE set SVE get FPSIMD for VL 3888
2703 22:22:43.150389 # ok 976 # SKIP SVE set FPSIMD get SVE for VL 3888
2704 22:22:43.150467 # ok 977 Set SVE VL 3904
2705 22:22:43.150539 # ok 978 # SKIP SVE set SVE get SVE for VL 3904
2706 22:22:43.150609 # ok 979 # SKIP SVE set SVE get FPSIMD for VL 3904
2707 22:22:43.150686 # ok 980 # SKIP SVE set FPSIMD get SVE for VL 3904
2708 22:22:43.150774 # ok 981 Set SVE VL 3920
2709 22:22:43.150845 # ok 982 # SKIP SVE set SVE get SVE for VL 3920
2710 22:22:43.150909 # ok 983 # SKIP SVE set SVE get FPSIMD for VL 3920
2711 22:22:43.150977 # ok 984 # SKIP SVE set FPSIMD get SVE for VL 3920
2712 22:22:43.151065 # ok 985 Set SVE VL 3936
2713 22:22:43.151168 # ok 986 # SKIP SVE set SVE get SVE for VL 3936
2714 22:22:43.151470 # ok 987 # SKIP SVE set SVE get FPSIMD for VL 3936
2715 22:22:43.151566 # ok 988 # SKIP SVE set FPSIMD get SVE for VL 3936
2716 22:22:43.151645 # ok 989 Set SVE VL 3952
2717 22:22:43.151736 # ok 990 # SKIP SVE set SVE get SVE for VL 3952
2718 22:22:43.151824 # ok 991 # SKIP SVE set SVE get FPSIMD for VL 3952
2719 22:22:43.151919 # ok 992 # SKIP SVE set FPSIMD get SVE for VL 3952
2720 22:22:43.152002 # ok 993 Set SVE VL 3968
2721 22:22:43.152076 # ok 994 # SKIP SVE set SVE get SVE for VL 3968
2722 22:22:43.152152 # ok 995 # SKIP SVE set SVE get FPSIMD for VL 3968
2723 22:22:43.152242 # ok 996 # SKIP SVE set FPSIMD get SVE for VL 3968
2724 22:22:43.152322 # ok 997 Set SVE VL 3984
2725 22:22:43.152397 # ok 998 # SKIP SVE set SVE get SVE for VL 3984
2726 22:22:43.152464 # ok 999 # SKIP SVE set SVE get FPSIMD for VL 3984
2727 22:22:43.152536 # ok 1000 # SKIP SVE set FPSIMD get SVE for VL 3984
2728 22:22:43.152620 # ok 1001 Set SVE VL 4000
2729 22:22:43.152691 # ok 1002 # SKIP SVE set SVE get SVE for VL 4000
2730 22:22:43.152781 # ok 1003 # SKIP SVE set SVE get FPSIMD for VL 4000
2731 22:22:43.152871 # ok 1004 # SKIP SVE set FPSIMD get SVE for VL 4000
2732 22:22:43.152940 # ok 1005 Set SVE VL 4016
2733 22:22:43.153031 # ok 1006 # SKIP SVE set SVE get SVE for VL 4016
2734 22:22:43.153112 # ok 1007 # SKIP SVE set SVE get FPSIMD for VL 4016
2735 22:22:43.153203 # ok 1008 # SKIP SVE set FPSIMD get SVE for VL 4016
2736 22:22:43.153276 # ok 1009 Set SVE VL 4032
2737 22:22:43.153339 # ok 1010 # SKIP SVE set SVE get SVE for VL 4032
2738 22:22:43.153424 # ok 1011 # SKIP SVE set SVE get FPSIMD for VL 4032
2739 22:22:43.153500 # ok 1012 # SKIP SVE set FPSIMD get SVE for VL 4032
2740 22:22:43.153596 # ok 1013 Set SVE VL 4048
2741 22:22:43.153690 # ok 1014 # SKIP SVE set SVE get SVE for VL 4048
2742 22:22:43.153786 # ok 1015 # SKIP SVE set SVE get FPSIMD for VL 4048
2743 22:22:43.153870 # ok 1016 # SKIP SVE set FPSIMD get SVE for VL 4048
2744 22:22:43.153967 # ok 1017 Set SVE VL 4064
2745 22:22:43.154050 # ok 1018 # SKIP SVE set SVE get SVE for VL 4064
2746 22:22:43.154143 # ok 1019 # SKIP SVE set SVE get FPSIMD for VL 4064
2747 22:22:43.154224 # ok 1020 # SKIP SVE set FPSIMD get SVE for VL 4064
2748 22:22:43.154303 # ok 1021 Set SVE VL 4080
2749 22:22:43.154393 # ok 1022 # SKIP SVE set SVE get SVE for VL 4080
2750 22:22:43.154468 # ok 1023 # SKIP SVE set SVE get FPSIMD for VL 4080
2751 22:22:43.154543 # ok 1024 # SKIP SVE set FPSIMD get SVE for VL 4080
2752 22:22:43.154636 # ok 1025 Set SVE VL 4096
2753 22:22:43.154715 # ok 1026 # SKIP SVE set SVE get SVE for VL 4096
2754 22:22:43.154802 # ok 1027 # SKIP SVE set SVE get FPSIMD for VL 4096
2755 22:22:43.154887 # ok 1028 # SKIP SVE set FPSIMD get SVE for VL 4096
2756 22:22:43.154968 # ok 1029 Set SVE VL 4112
2757 22:22:43.155263 # ok 1030 # SKIP SVE set SVE get SVE for VL 4112
2758 22:22:43.155373 # ok 1031 # SKIP SVE set SVE get FPSIMD for VL 4112
2759 22:22:43.155462 # ok 1032 # SKIP SVE set FPSIMD get SVE for VL 4112
2760 22:22:43.155549 # ok 1033 Set SVE VL 4128
2761 22:22:43.155639 # ok 1034 # SKIP SVE set SVE get SVE for VL 4128
2762 22:22:43.155741 # ok 1035 # SKIP SVE set SVE get FPSIMD for VL 4128
2763 22:22:43.155828 # ok 1036 # SKIP SVE set FPSIMD get SVE for VL 4128
2764 22:22:43.155916 # ok 1037 Set SVE VL 4144
2765 22:22:43.156018 # ok 1038 # SKIP SVE set SVE get SVE for VL 4144
2766 22:22:43.156096 # ok 1039 # SKIP SVE set SVE get FPSIMD for VL 4144
2767 22:22:43.156185 # ok 1040 # SKIP SVE set FPSIMD get SVE for VL 4144
2768 22:22:43.163465 # ok 1041 Set SVE VL 4160
2769 22:22:43.163689 # ok 1042 # SKIP SVE set SVE get SVE for VL 4160
2770 22:22:43.163790 # ok 1043 # SKIP SVE set SVE get FPSIMD for VL 4160
2771 22:22:43.163863 # ok 1044 # SKIP SVE set FPSIMD get SVE for VL 4160
2772 22:22:43.163929 # ok 1045 Set SVE VL 4176
2773 22:22:43.164005 # ok 1046 # SKIP SVE set SVE get SVE for VL 4176
2774 22:22:43.164074 # ok 1047 # SKIP SVE set SVE get FPSIMD for VL 4176
2775 22:22:43.164151 # ok 1048 # SKIP SVE set FPSIMD get SVE for VL 4176
2776 22:22:43.164239 # ok 1049 Set SVE VL 4192
2777 22:22:43.164318 # ok 1050 # SKIP SVE set SVE get SVE for VL 4192
2778 22:22:43.164398 # ok 1051 # SKIP SVE set SVE get FPSIMD for VL 4192
2779 22:22:43.164492 # ok 1052 # SKIP SVE set FPSIMD get SVE for VL 4192
2780 22:22:43.164573 # ok 1053 Set SVE VL 4208
2781 22:22:43.164652 # ok 1054 # SKIP SVE set SVE get SVE for VL 4208
2782 22:22:43.164732 # ok 1055 # SKIP SVE set SVE get FPSIMD for VL 4208
2783 22:22:43.164846 # ok 1056 # SKIP SVE set FPSIMD get SVE for VL 4208
2784 22:22:43.164933 # ok 1057 Set SVE VL 4224
2785 22:22:43.165002 # ok 1058 # SKIP SVE set SVE get SVE for VL 4224
2786 22:22:43.165078 # ok 1059 # SKIP SVE set SVE get FPSIMD for VL 4224
2787 22:22:43.165142 # ok 1060 # SKIP SVE set FPSIMD get SVE for VL 4224
2788 22:22:43.165858 # ok 1061 Set SVE VL 4240
2789 22:22:43.165969 # ok 1062 # SKIP SVE set SVE get SVE for VL 4240
2790 22:22:43.166077 # ok 1063 # SKIP SVE set SVE get FPSIMD for VL 4240
2791 22:22:43.166181 # ok 1064 # SKIP SVE set FPSIMD get SVE for VL 4240
2792 22:22:43.166270 # ok 1065 Set SVE VL 4256
2793 22:22:43.166373 # ok 1066 # SKIP SVE set SVE get SVE for VL 4256
2794 22:22:43.166474 # ok 1067 # SKIP SVE set SVE get FPSIMD for VL 4256
2795 22:22:43.166579 # ok 1068 # SKIP SVE set FPSIMD get SVE for VL 4256
2796 22:22:43.166680 # ok 1069 Set SVE VL 4272
2797 22:22:43.166788 # ok 1070 # SKIP SVE set SVE get SVE for VL 4272
2798 22:22:43.167083 # ok 1071 # SKIP SVE set SVE get FPSIMD for VL 4272
2799 22:22:43.167174 # ok 1072 # SKIP SVE set FPSIMD get SVE for VL 4272
2800 22:22:43.167275 # ok 1073 Set SVE VL 4288
2801 22:22:43.167376 # ok 1074 # SKIP SVE set SVE get SVE for VL 4288
2802 22:22:43.167477 # ok 1075 # SKIP SVE set SVE get FPSIMD for VL 4288
2803 22:22:43.167581 # ok 1076 # SKIP SVE set FPSIMD get SVE for VL 4288
2804 22:22:43.167689 # ok 1077 Set SVE VL 4304
2805 22:22:43.167791 # ok 1078 # SKIP SVE set SVE get SVE for VL 4304
2806 22:22:43.167900 # ok 1079 # SKIP SVE set SVE get FPSIMD for VL 4304
2807 22:22:43.168198 # ok 1080 # SKIP SVE set FPSIMD get SVE for VL 4304
2808 22:22:43.168293 # ok 1081 Set SVE VL 4320
2809 22:22:43.168395 # ok 1082 # SKIP SVE set SVE get SVE for VL 4320
2810 22:22:43.168484 # ok 1083 # SKIP SVE set SVE get FPSIMD for VL 4320
2811 22:22:43.168585 # ok 1084 # SKIP SVE set FPSIMD get SVE for VL 4320
2812 22:22:43.168691 # ok 1085 Set SVE VL 4336
2813 22:22:43.168791 # ok 1086 # SKIP SVE set SVE get SVE for VL 4336
2814 22:22:43.169267 # ok 1087 # SKIP SVE set SVE get FPSIMD for VL 4336
2815 22:22:43.169361 # ok 1088 # SKIP SVE set FPSIMD get SVE for VL 4336
2816 22:22:43.169443 # ok 1089 Set SVE VL 4352
2817 22:22:43.169517 # ok 1090 # SKIP SVE set SVE get SVE for VL 4352
2818 22:22:43.169590 # ok 1091 # SKIP SVE set SVE get FPSIMD for VL 4352
2819 22:22:43.169672 # ok 1092 # SKIP SVE set FPSIMD get SVE for VL 4352
2820 22:22:43.169737 # ok 1093 Set SVE VL 4368
2821 22:22:43.169808 # ok 1094 # SKIP SVE set SVE get SVE for VL 4368
2822 22:22:43.169869 # ok 1095 # SKIP SVE set SVE get FPSIMD for VL 4368
2823 22:22:43.169940 # ok 1096 # SKIP SVE set FPSIMD get SVE for VL 4368
2824 22:22:43.170187 # ok 1097 Set SVE VL 4384
2825 22:22:43.170264 # ok 1098 # SKIP SVE set SVE get SVE for VL 4384
2826 22:22:43.170332 # ok 1099 # SKIP SVE set SVE get FPSIMD for VL 4384
2827 22:22:43.170406 # ok 1100 # SKIP SVE set FPSIMD get SVE for VL 4384
2828 22:22:43.170483 # ok 1101 Set SVE VL 4400
2829 22:22:43.170565 # ok 1102 # SKIP SVE set SVE get SVE for VL 4400
2830 22:22:43.170628 # ok 1103 # SKIP SVE set SVE get FPSIMD for VL 4400
2831 22:22:43.170688 # ok 1104 # SKIP SVE set FPSIMD get SVE for VL 4400
2832 22:22:43.170757 # ok 1105 Set SVE VL 4416
2833 22:22:43.170818 # ok 1106 # SKIP SVE set SVE get SVE for VL 4416
2834 22:22:43.170888 # ok 1107 # SKIP SVE set SVE get FPSIMD for VL 4416
2835 22:22:43.171131 # ok 1108 # SKIP SVE set FPSIMD get SVE for VL 4416
2836 22:22:43.171199 # ok 1109 Set SVE VL 4432
2837 22:22:43.171269 # ok 1110 # SKIP SVE set SVE get SVE for VL 4432
2838 22:22:43.171342 # ok 1111 # SKIP SVE set SVE get FPSIMD for VL 4432
2839 22:22:43.171431 # ok 1112 # SKIP SVE set FPSIMD get SVE for VL 4432
2840 22:22:43.171507 # ok 1113 Set SVE VL 4448
2841 22:22:43.171569 # ok 1114 # SKIP SVE set SVE get SVE for VL 4448
2842 22:22:43.171630 # ok 1115 # SKIP SVE set SVE get FPSIMD for VL 4448
2843 22:22:43.171738 # ok 1116 # SKIP SVE set FPSIMD get SVE for VL 4448
2844 22:22:43.171815 # ok 1117 Set SVE VL 4464
2845 22:22:43.171878 # ok 1118 # SKIP SVE set SVE get SVE for VL 4464
2846 22:22:43.171950 # ok 1119 # SKIP SVE set SVE get FPSIMD for VL 4464
2847 22:22:43.172011 # ok 1120 # SKIP SVE set FPSIMD get SVE for VL 4464
2848 22:22:43.172070 # ok 1121 Set SVE VL 4480
2849 22:22:43.172317 # ok 1122 # SKIP SVE set SVE get SVE for VL 4480
2850 22:22:43.172383 # ok 1123 # SKIP SVE set SVE get FPSIMD for VL 4480
2851 22:22:43.172443 # ok 1124 # SKIP SVE set FPSIMD get SVE for VL 4480
2852 22:22:43.172502 # ok 1125 Set SVE VL 4496
2853 22:22:43.172572 # ok 1126 # SKIP SVE set SVE get SVE for VL 4496
2854 22:22:43.172636 # ok 1127 # SKIP SVE set SVE get FPSIMD for VL 4496
2855 22:22:43.172712 # ok 1128 # SKIP SVE set FPSIMD get SVE for VL 4496
2856 22:22:43.172795 # ok 1129 Set SVE VL 4512
2857 22:22:43.172864 # ok 1130 # SKIP SVE set SVE get SVE for VL 4512
2858 22:22:43.172937 # ok 1131 # SKIP SVE set SVE get FPSIMD for VL 4512
2859 22:22:43.173010 # ok 1132 # SKIP SVE set FPSIMD get SVE for VL 4512
2860 22:22:43.173096 # ok 1133 Set SVE VL 4528
2861 22:22:43.173168 # ok 1134 # SKIP SVE set SVE get SVE for VL 4528
2862 22:22:43.173415 # ok 1135 # SKIP SVE set SVE get FPSIMD for VL 4528
2863 22:22:43.173480 # ok 1136 # SKIP SVE set FPSIMD get SVE for VL 4528
2864 22:22:43.173540 # ok 1137 Set SVE VL 4544
2865 22:22:43.173609 # ok 1138 # SKIP SVE set SVE get SVE for VL 4544
2866 22:22:43.173685 # ok 1139 # SKIP SVE set SVE get FPSIMD for VL 4544
2867 22:22:43.173757 # ok 1140 # SKIP SVE set FPSIMD get SVE for VL 4544
2868 22:22:43.173837 # ok 1141 Set SVE VL 4560
2869 22:22:43.173916 # ok 1142 # SKIP SVE set SVE get SVE for VL 4560
2870 22:22:43.173994 # ok 1143 # SKIP SVE set SVE get FPSIMD for VL 4560
2871 22:22:43.174240 # ok 1144 # SKIP SVE set FPSIMD get SVE for VL 4560
2872 22:22:43.174315 # ok 1145 Set SVE VL 4576
2873 22:22:43.174389 # ok 1146 # SKIP SVE set SVE get SVE for VL 4576
2874 22:22:43.174460 # ok 1147 # SKIP SVE set SVE get FPSIMD for VL 4576
2875 22:22:43.174543 # ok 1148 # SKIP SVE set FPSIMD get SVE for VL 4576
2876 22:22:43.174621 # ok 1149 Set SVE VL 4592
2877 22:22:43.174709 # ok 1150 # SKIP SVE set SVE get SVE for VL 4592
2878 22:22:43.174794 # ok 1151 # SKIP SVE set SVE get FPSIMD for VL 4592
2879 22:22:43.174860 # ok 1152 # SKIP SVE set FPSIMD get SVE for VL 4592
2880 22:22:43.174926 # ok 1153 Set SVE VL 4608
2881 22:22:43.175012 # ok 1154 # SKIP SVE set SVE get SVE for VL 4608
2882 22:22:43.175087 # ok 1155 # SKIP SVE set SVE get FPSIMD for VL 4608
2883 22:22:43.175158 # ok 1156 # SKIP SVE set FPSIMD get SVE for VL 4608
2884 22:22:43.175247 # ok 1157 Set SVE VL 4624
2885 22:22:43.175314 # ok 1158 # SKIP SVE set SVE get SVE for VL 4624
2886 22:22:43.175391 # ok 1159 # SKIP SVE set SVE get FPSIMD for VL 4624
2887 22:22:43.175459 # ok 1160 # SKIP SVE set FPSIMD get SVE for VL 4624
2888 22:22:43.175532 # ok 1161 Set SVE VL 4640
2889 22:22:43.175605 # ok 1162 # SKIP SVE set SVE get SVE for VL 4640
2890 22:22:43.175684 # ok 1163 # SKIP SVE set SVE get FPSIMD for VL 4640
2891 22:22:43.175766 # ok 1164 # SKIP SVE set FPSIMD get SVE for VL 4640
2892 22:22:43.175848 # ok 1165 Set SVE VL 4656
2893 22:22:43.175911 # ok 1166 # SKIP SVE set SVE get SVE for VL 4656
2894 22:22:43.175981 # ok 1167 # SKIP SVE set SVE get FPSIMD for VL 4656
2895 22:22:43.176053 # ok 1168 # SKIP SVE set FPSIMD get SVE for VL 4656
2896 22:22:43.176125 # ok 1169 Set SVE VL 4672
2897 22:22:43.176196 # ok 1170 # SKIP SVE set SVE get SVE for VL 4672
2898 22:22:43.176267 # ok 1171 # SKIP SVE set SVE get FPSIMD for VL 4672
2899 22:22:43.176520 # ok 1172 # SKIP SVE set FPSIMD get SVE for VL 4672
2900 22:22:43.176586 # ok 1173 Set SVE VL 4688
2901 22:22:43.176655 # ok 1174 # SKIP SVE set SVE get SVE for VL 4688
2902 22:22:43.176727 # ok 1175 # SKIP SVE set SVE get FPSIMD for VL 4688
2903 22:22:43.176820 # ok 1176 # SKIP SVE set FPSIMD get SVE for VL 4688
2904 22:22:43.176885 # ok 1177 Set SVE VL 4704
2905 22:22:43.177125 # ok 1178 # SKIP SVE set SVE get SVE for VL 4704
2906 22:22:43.177200 # ok 1179 # SKIP SVE set SVE get FPSIMD for VL 4704
2907 22:22:43.177261 # ok 1180 # SKIP SVE set FPSIMD get SVE for VL 4704
2908 22:22:43.177321 # ok 1181 Set SVE VL 4720
2909 22:22:43.177392 # ok 1182 # SKIP SVE set SVE get SVE for VL 4720
2910 22:22:43.177453 # ok 1183 # SKIP SVE set SVE get FPSIMD for VL 4720
2911 22:22:43.177522 # ok 1184 # SKIP SVE set FPSIMD get SVE for VL 4720
2912 22:22:43.177593 # ok 1185 Set SVE VL 4736
2913 22:22:43.177660 # ok 1186 # SKIP SVE set SVE get SVE for VL 4736
2914 22:22:43.177905 # ok 1187 # SKIP SVE set SVE get FPSIMD for VL 4736
2915 22:22:43.177969 # ok 1188 # SKIP SVE set FPSIMD get SVE for VL 4736
2916 22:22:43.178028 # ok 1189 Set SVE VL 4752
2917 22:22:43.181810 # ok 1190 # SKIP SVE set SVE get SVE for VL 4752
2918 22:22:43.181894 # ok 1191 # SKIP SVE set SVE get FPSIMD for VL 4752
2919 22:22:43.181956 # ok 1192 # SKIP SVE set FPSIMD get SVE for VL 4752
2920 22:22:43.182016 # ok 1193 Set SVE VL 4768
2921 22:22:43.182076 # ok 1194 # SKIP SVE set SVE get SVE for VL 4768
2922 22:22:43.182136 # ok 1195 # SKIP SVE set SVE get FPSIMD for VL 4768
2923 22:22:43.182195 # ok 1196 # SKIP SVE set FPSIMD get SVE for VL 4768
2924 22:22:43.182255 # ok 1197 Set SVE VL 4784
2925 22:22:43.182314 # ok 1198 # SKIP SVE set SVE get SVE for VL 4784
2926 22:22:43.182373 # ok 1199 # SKIP SVE set SVE get FPSIMD for VL 4784
2927 22:22:43.182432 # ok 1200 # SKIP SVE set FPSIMD get SVE for VL 4784
2928 22:22:43.182491 # ok 1201 Set SVE VL 4800
2929 22:22:43.182550 # ok 1202 # SKIP SVE set SVE get SVE for VL 4800
2930 22:22:43.182609 # ok 1203 # SKIP SVE set SVE get FPSIMD for VL 4800
2931 22:22:43.182669 # ok 1204 # SKIP SVE set FPSIMD get SVE for VL 4800
2932 22:22:43.182728 # ok 1205 Set SVE VL 4816
2933 22:22:43.182787 # ok 1206 # SKIP SVE set SVE get SVE for VL 4816
2934 22:22:43.182847 # ok 1207 # SKIP SVE set SVE get FPSIMD for VL 4816
2935 22:22:43.182907 # ok 1208 # SKIP SVE set FPSIMD get SVE for VL 4816
2936 22:22:43.182966 # ok 1209 Set SVE VL 4832
2937 22:22:43.183024 # ok 1210 # SKIP SVE set SVE get SVE for VL 4832
2938 22:22:43.183083 # ok 1211 # SKIP SVE set SVE get FPSIMD for VL 4832
2939 22:22:43.183141 # ok 1212 # SKIP SVE set FPSIMD get SVE for VL 4832
2940 22:22:43.183200 # ok 1213 Set SVE VL 4848
2941 22:22:43.183259 # ok 1214 # SKIP SVE set SVE get SVE for VL 4848
2942 22:22:43.183319 # ok 1215 # SKIP SVE set SVE get FPSIMD for VL 4848
2943 22:22:43.183378 # ok 1216 # SKIP SVE set FPSIMD get SVE for VL 4848
2944 22:22:43.183439 # ok 1217 Set SVE VL 4864
2945 22:22:43.183498 # ok 1218 # SKIP SVE set SVE get SVE for VL 4864
2946 22:22:43.183557 # ok 1219 # SKIP SVE set SVE get FPSIMD for VL 4864
2947 22:22:43.183616 # ok 1220 # SKIP SVE set FPSIMD get SVE for VL 4864
2948 22:22:43.183677 # ok 1221 Set SVE VL 4880
2949 22:22:43.183763 # ok 1222 # SKIP SVE set SVE get SVE for VL 4880
2950 22:22:43.183831 # ok 1223 # SKIP SVE set SVE get FPSIMD for VL 4880
2951 22:22:43.191335 # ok 1224 # SKIP SVE set FPSIMD get SVE for VL 4880
2952 22:22:43.191531 # ok 1225 Set SVE VL 4896
2953 22:22:43.191657 # ok 1226 # SKIP SVE set SVE get SVE for VL 4896
2954 22:22:43.191761 # ok 1227 # SKIP SVE set SVE get FPSIMD for VL 4896
2955 22:22:43.191844 # ok 1228 # SKIP SVE set FPSIMD get SVE for VL 4896
2956 22:22:43.191911 # ok 1229 Set SVE VL 4912
2957 22:22:43.191991 # ok 1230 # SKIP SVE set SVE get SVE for VL 4912
2958 22:22:43.192062 # ok 1231 # SKIP SVE set SVE get FPSIMD for VL 4912
2959 22:22:43.192125 # ok 1232 # SKIP SVE set FPSIMD get SVE for VL 4912
2960 22:22:43.192197 # ok 1233 Set SVE VL 4928
2961 22:22:43.192286 # ok 1234 # SKIP SVE set SVE get SVE for VL 4928
2962 22:22:43.192349 # ok 1235 # SKIP SVE set SVE get FPSIMD for VL 4928
2963 22:22:43.192417 # ok 1236 # SKIP SVE set FPSIMD get SVE for VL 4928
2964 22:22:43.192503 # ok 1237 Set SVE VL 4944
2965 22:22:43.192582 # ok 1238 # SKIP SVE set SVE get SVE for VL 4944
2966 22:22:43.192687 # ok 1239 # SKIP SVE set SVE get FPSIMD for VL 4944
2967 22:22:43.192779 # ok 1240 # SKIP SVE set FPSIMD get SVE for VL 4944
2968 22:22:43.192871 # ok 1241 Set SVE VL 4960
2969 22:22:43.193558 # ok 1242 # SKIP SVE set SVE get SVE for VL 4960
2970 22:22:43.193817 # ok 1243 # SKIP SVE set SVE get FPSIMD for VL 4960
2971 22:22:43.193899 # ok 1244 # SKIP SVE set FPSIMD get SVE for VL 4960
2972 22:22:43.193964 # ok 1245 Set SVE VL 4976
2973 22:22:43.194028 # ok 1246 # SKIP SVE set SVE get SVE for VL 4976
2974 22:22:43.194100 # ok 1247 # SKIP SVE set SVE get FPSIMD for VL 4976
2975 22:22:43.194164 # ok 1248 # SKIP SVE set FPSIMD get SVE for VL 4976
2976 22:22:43.194238 # ok 1249 Set SVE VL 4992
2977 22:22:43.194301 # ok 1250 # SKIP SVE set SVE get SVE for VL 4992
2978 22:22:43.194373 # ok 1251 # SKIP SVE set SVE get FPSIMD for VL 4992
2979 22:22:43.194452 # ok 1252 # SKIP SVE set FPSIMD get SVE for VL 4992
2980 22:22:43.194712 # ok 1253 Set SVE VL 5008
2981 22:22:43.194809 # ok 1254 # SKIP SVE set SVE get SVE for VL 5008
2982 22:22:43.194923 # ok 1255 # SKIP SVE set SVE get FPSIMD for VL 5008
2983 22:22:43.195026 # ok 1256 # SKIP SVE set FPSIMD get SVE for VL 5008
2984 22:22:43.195144 # ok 1257 Set SVE VL 5024
2985 22:22:43.195242 # ok 1258 # SKIP SVE set SVE get SVE for VL 5024
2986 22:22:43.195349 # ok 1259 # SKIP SVE set SVE get FPSIMD for VL 5024
2987 22:22:43.195434 # ok 1260 # SKIP SVE set FPSIMD get SVE for VL 5024
2988 22:22:43.195520 # ok 1261 Set SVE VL 5040
2989 22:22:43.195595 # ok 1262 # SKIP SVE set SVE get SVE for VL 5040
2990 22:22:43.195697 # ok 1263 # SKIP SVE set SVE get FPSIMD for VL 5040
2991 22:22:43.195790 # ok 1264 # SKIP SVE set FPSIMD get SVE for VL 5040
2992 22:22:43.195868 # ok 1265 Set SVE VL 5056
2993 22:22:43.196126 # ok 1266 # SKIP SVE set SVE get SVE for VL 5056
2994 22:22:43.196235 # ok 1267 # SKIP SVE set SVE get FPSIMD for VL 5056
2995 22:22:43.196319 # ok 1268 # SKIP SVE set FPSIMD get SVE for VL 5056
2996 22:22:43.196385 # ok 1269 Set SVE VL 5072
2997 22:22:43.196458 # ok 1270 # SKIP SVE set SVE get SVE for VL 5072
2998 22:22:43.196769 # ok 1271 # SKIP SVE set SVE get FPSIMD for VL 5072
2999 22:22:43.196859 # ok 1272 # SKIP SVE set FPSIMD get SVE for VL 5072
3000 22:22:43.196923 # ok 1273 Set SVE VL 5088
3001 22:22:43.198848 # ok 1274 # SKIP SVE set SVE get SVE for VL 5088
3002 22:22:43.199170 # ok 1275 # SKIP SVE set SVE get FPSIMD for VL 5088
3003 22:22:43.199293 # ok 1276 # SKIP SVE set FPSIMD get SVE for VL 5088
3004 22:22:43.199385 # ok 1277 Set SVE VL 5104
3005 22:22:43.199489 # ok 1278 # SKIP SVE set SVE get SVE for VL 5104
3006 22:22:43.199579 # ok 1279 # SKIP SVE set SVE get FPSIMD for VL 5104
3007 22:22:43.199669 # ok 1280 # SKIP SVE set FPSIMD get SVE for VL 5104
3008 22:22:43.199783 # ok 1281 Set SVE VL 5120
3009 22:22:43.199870 # ok 1282 # SKIP SVE set SVE get SVE for VL 5120
3010 22:22:43.199973 # ok 1283 # SKIP SVE set SVE get FPSIMD for VL 5120
3011 22:22:43.200083 # ok 1284 # SKIP SVE set FPSIMD get SVE for VL 5120
3012 22:22:43.200171 # ok 1285 Set SVE VL 5136
3013 22:22:43.200269 # ok 1286 # SKIP SVE set SVE get SVE for VL 5136
3014 22:22:43.200568 # ok 1287 # SKIP SVE set SVE get FPSIMD for VL 5136
3015 22:22:43.200668 # ok 1288 # SKIP SVE set FPSIMD get SVE for VL 5136
3016 22:22:43.200783 # ok 1289 Set SVE VL 5152
3017 22:22:43.200867 # ok 1290 # SKIP SVE set SVE get SVE for VL 5152
3018 22:22:43.200943 # ok 1291 # SKIP SVE set SVE get FPSIMD for VL 5152
3019 22:22:43.201936 # ok 1292 # SKIP SVE set FPSIMD get SVE for VL 5152
3020 22:22:43.202223 # ok 1293 Set SVE VL 5168
3021 22:22:43.202314 # ok 1294 # SKIP SVE set SVE get SVE for VL 5168
3022 22:22:43.202398 # ok 1295 # SKIP SVE set SVE get FPSIMD for VL 5168
3023 22:22:43.202499 # ok 1296 # SKIP SVE set FPSIMD get SVE for VL 5168
3024 22:22:43.202584 # ok 1297 Set SVE VL 5184
3025 22:22:43.202682 # ok 1298 # SKIP SVE set SVE get SVE for VL 5184
3026 22:22:43.202788 # ok 1299 # SKIP SVE set SVE get FPSIMD for VL 5184
3027 22:22:43.202889 # ok 1300 # SKIP SVE set FPSIMD get SVE for VL 5184
3028 22:22:43.202988 # ok 1301 Set SVE VL 5200
3029 22:22:43.203087 # ok 1302 # SKIP SVE set SVE get SVE for VL 5200
3030 22:22:43.203374 # ok 1303 # SKIP SVE set SVE get FPSIMD for VL 5200
3031 22:22:43.203464 # ok 1304 # SKIP SVE set FPSIMD get SVE for VL 5200
3032 22:22:43.203548 # ok 1305 Set SVE VL 5216
3033 22:22:43.203646 # ok 1306 # SKIP SVE set SVE get SVE for VL 5216
3034 22:22:43.203733 # ok 1307 # SKIP SVE set SVE get FPSIMD for VL 5216
3035 22:22:43.203831 # ok 1308 # SKIP SVE set FPSIMD get SVE for VL 5216
3036 22:22:43.203931 # ok 1309 Set SVE VL 5232
3037 22:22:43.204030 # ok 1310 # SKIP SVE set SVE get SVE for VL 5232
3038 22:22:43.204129 # ok 1311 # SKIP SVE set SVE get FPSIMD for VL 5232
3039 22:22:43.204412 # ok 1312 # SKIP SVE set FPSIMD get SVE for VL 5232
3040 22:22:43.204500 # ok 1313 Set SVE VL 5248
3041 22:22:43.204585 # ok 1314 # SKIP SVE set SVE get SVE for VL 5248
3042 22:22:43.204684 # ok 1315 # SKIP SVE set SVE get FPSIMD for VL 5248
3043 22:22:43.204782 # ok 1316 # SKIP SVE set FPSIMD get SVE for VL 5248
3044 22:22:43.205065 # ok 1317 Set SVE VL 5264
3045 22:22:43.205172 # ok 1318 # SKIP SVE set SVE get SVE for VL 5264
3046 22:22:43.205272 # ok 1319 # SKIP SVE set SVE get FPSIMD for VL 5264
3047 22:22:43.205561 # ok 1320 # SKIP SVE set FPSIMD get SVE for VL 5264
3048 22:22:43.205662 # ok 1321 Set SVE VL 5280
3049 22:22:43.205763 # ok 1322 # SKIP SVE set SVE get SVE for VL 5280
3050 22:22:43.205850 # ok 1323 # SKIP SVE set SVE get FPSIMD for VL 5280
3051 22:22:43.205948 # ok 1324 # SKIP SVE set FPSIMD get SVE for VL 5280
3052 22:22:43.206036 # ok 1325 Set SVE VL 5296
3053 22:22:43.206135 # ok 1326 # SKIP SVE set SVE get SVE for VL 5296
3054 22:22:43.206233 # ok 1327 # SKIP SVE set SVE get FPSIMD for VL 5296
3055 22:22:43.206332 # ok 1328 # SKIP SVE set FPSIMD get SVE for VL 5296
3056 22:22:43.206616 # ok 1329 Set SVE VL 5312
3057 22:22:43.206897 # ok 1330 # SKIP SVE set SVE get SVE for VL 5312
3058 22:22:43.206987 # ok 1331 # SKIP SVE set SVE get FPSIMD for VL 5312
3059 22:22:43.207070 # ok 1332 # SKIP SVE set FPSIMD get SVE for VL 5312
3060 22:22:43.207155 # ok 1333 Set SVE VL 5328
3061 22:22:43.207238 # ok 1334 # SKIP SVE set SVE get SVE for VL 5328
3062 22:22:43.207337 # ok 1335 # SKIP SVE set SVE get FPSIMD for VL 5328
3063 22:22:43.207423 # ok 1336 # SKIP SVE set FPSIMD get SVE for VL 5328
3064 22:22:43.207521 # ok 1337 Set SVE VL 5344
3065 22:22:43.207604 # ok 1338 # SKIP SVE set SVE get SVE for VL 5344
3066 22:22:43.207704 # ok 1339 # SKIP SVE set SVE get FPSIMD for VL 5344
3067 22:22:43.207802 # ok 1340 # SKIP SVE set FPSIMD get SVE for VL 5344
3068 22:22:43.207901 # ok 1341 Set SVE VL 5360
3069 22:22:43.207998 # ok 1342 # SKIP SVE set SVE get SVE for VL 5360
3070 22:22:43.208274 # ok 1343 # SKIP SVE set SVE get FPSIMD for VL 5360
3071 22:22:43.208364 # ok 1344 # SKIP SVE set FPSIMD get SVE for VL 5360
3072 22:22:43.208447 # ok 1345 Set SVE VL 5376
3073 22:22:43.208544 # ok 1346 # SKIP SVE set SVE get SVE for VL 5376
3074 22:22:43.208630 # ok 1347 # SKIP SVE set SVE get FPSIMD for VL 5376
3075 22:22:43.208730 # ok 1348 # SKIP SVE set FPSIMD get SVE for VL 5376
3076 22:22:43.208829 # ok 1349 Set SVE VL 5392
3077 22:22:43.209114 # ok 1350 # SKIP SVE set SVE get SVE for VL 5392
3078 22:22:43.209220 # ok 1351 # SKIP SVE set SVE get FPSIMD for VL 5392
3079 22:22:43.209320 # ok 1352 # SKIP SVE set FPSIMD get SVE for VL 5392
3080 22:22:43.209418 # ok 1353 Set SVE VL 5408
3081 22:22:43.209516 # ok 1354 # SKIP SVE set SVE get SVE for VL 5408
3082 22:22:43.209616 # ok 1355 # SKIP SVE set SVE get FPSIMD for VL 5408
3083 22:22:43.209910 # ok 1356 # SKIP SVE set FPSIMD get SVE for VL 5408
3084 22:22:43.210014 # ok 1357 Set SVE VL 5424
3085 22:22:43.210099 # ok 1358 # SKIP SVE set SVE get SVE for VL 5424
3086 22:22:43.210199 # ok 1359 # SKIP SVE set SVE get FPSIMD for VL 5424
3087 22:22:43.210299 # ok 1360 # SKIP SVE set FPSIMD get SVE for VL 5424
3088 22:22:43.210399 # ok 1361 Set SVE VL 5440
3089 22:22:43.210725 # ok 1362 # SKIP SVE set SVE get SVE for VL 5440
3090 22:22:43.210816 # ok 1363 # SKIP SVE set SVE get FPSIMD for VL 5440
3091 22:22:43.210899 # ok 1364 # SKIP SVE set FPSIMD get SVE for VL 5440
3092 22:22:43.210983 # ok 1365 Set SVE VL 5456
3093 22:22:43.211252 # ok 1366 # SKIP SVE set SVE get SVE for VL 5456
3094 22:22:43.211341 # ok 1367 # SKIP SVE set SVE get FPSIMD for VL 5456
3095 22:22:43.211425 # ok 1368 # SKIP SVE set FPSIMD get SVE for VL 5456
3096 22:22:43.211510 # ok 1369 Set SVE VL 5472
3097 22:22:43.211608 # ok 1370 # SKIP SVE set SVE get SVE for VL 5472
3098 22:22:43.211692 # ok 1371 # SKIP SVE set SVE get FPSIMD for VL 5472
3099 22:22:43.211792 # ok 1372 # SKIP SVE set FPSIMD get SVE for VL 5472
3100 22:22:43.211878 # ok 1373 Set SVE VL 5488
3101 22:22:43.211976 # ok 1374 # SKIP SVE set SVE get SVE for VL 5488
3102 22:22:43.212075 # ok 1375 # SKIP SVE set SVE get FPSIMD for VL 5488
3103 22:22:43.212175 # ok 1376 # SKIP SVE set FPSIMD get SVE for VL 5488
3104 22:22:43.212273 # ok 1377 Set SVE VL 5504
3105 22:22:43.212371 # ok 1378 # SKIP SVE set SVE get SVE for VL 5504
3106 22:22:43.212470 # ok 1379 # SKIP SVE set SVE get FPSIMD for VL 5504
3107 22:22:43.212775 # ok 1380 # SKIP SVE set FPSIMD get SVE for VL 5504
3108 22:22:43.212874 # ok 1381 Set SVE VL 5520
3109 22:22:43.213166 # ok 1382 # SKIP SVE set SVE get SVE for VL 5520
3110 22:22:43.213280 # ok 1383 # SKIP SVE set SVE get FPSIMD for VL 5520
3111 22:22:43.213380 # ok 1384 # SKIP SVE set FPSIMD get SVE for VL 5520
3112 22:22:43.213478 # ok 1385 Set SVE VL 5536
3113 22:22:43.213577 # ok 1386 # SKIP SVE set SVE get SVE for VL 5536
3114 22:22:43.213852 # ok 1387 # SKIP SVE set SVE get FPSIMD for VL 5536
3115 22:22:43.213938 # ok 1388 # SKIP SVE set FPSIMD get SVE for VL 5536
3116 22:22:43.214055 # ok 1389 Set SVE VL 5552
3117 22:22:43.214152 # ok 1390 # SKIP SVE set SVE get SVE for VL 5552
3118 22:22:43.214282 # ok 1391 # SKIP SVE set SVE get FPSIMD for VL 5552
3119 22:22:43.214380 # ok 1392 # SKIP SVE set FPSIMD get SVE for VL 5552
3120 22:22:43.214482 # ok 1393 Set SVE VL 5568
3121 22:22:43.214593 # ok 1394 # SKIP SVE set SVE get SVE for VL 5568
3122 22:22:43.214718 # ok 1395 # SKIP SVE set SVE get FPSIMD for VL 5568
3123 22:22:43.214824 # ok 1396 # SKIP SVE set FPSIMD get SVE for VL 5568
3124 22:22:43.214924 # ok 1397 Set SVE VL 5584
3125 22:22:43.215015 # ok 1398 # SKIP SVE set SVE get SVE for VL 5584
3126 22:22:43.215083 # ok 1399 # SKIP SVE set SVE get FPSIMD for VL 5584
3127 22:22:43.215158 # ok 1400 # SKIP SVE set FPSIMD get SVE for VL 5584
3128 22:22:43.215222 # ok 1401 Set SVE VL 5600
3129 22:22:43.215300 # ok 1402 # SKIP SVE set SVE get SVE for VL 5600
3130 22:22:43.215395 # ok 1403 # SKIP SVE set SVE get FPSIMD for VL 5600
3131 22:22:43.215482 # ok 1404 # SKIP SVE set FPSIMD get SVE for VL 5600
3132 22:22:43.215557 # ok 1405 Set SVE VL 5616
3133 22:22:43.215823 # ok 1406 # SKIP SVE set SVE get SVE for VL 5616
3134 22:22:43.247311 # ok 1407 # SKIP SVE set SVE get FPSIMD for VL 5616
3135 22:22:43.247792 # ok 1408 # SKIP SVE set FPSIMD get SVE for VL 5616
3136 22:22:43.247915 # ok 1409 Set SVE VL 5632
3137 22:22:43.248030 # ok 1410 # SKIP SVE set SVE get SVE for VL 5632
3138 22:22:43.248139 # ok 1411 # SKIP SVE set SVE get FPSIMD for VL 5632
3139 22:22:43.248273 # ok 1412 # SKIP SVE set FPSIMD get SVE for VL 5632
3140 22:22:43.248376 # ok 1413 Set SVE VL 5648
3141 22:22:43.251857 # ok 1414 # SKIP SVE set SVE get SVE for VL 5648
3142 22:22:43.251980 # ok 1415 # SKIP SVE set SVE get FPSIMD for VL 5648
3143 22:22:43.252094 # ok 1416 # SKIP SVE set FPSIMD get SVE for VL 5648
3144 22:22:43.252241 # ok 1417 Set SVE VL 5664
3145 22:22:43.252378 # ok 1418 # SKIP SVE set SVE get SVE for VL 5664
3146 22:22:43.252527 # ok 1419 # SKIP SVE set SVE get FPSIMD for VL 5664
3147 22:22:43.252667 # ok 1420 # SKIP SVE set FPSIMD get SVE for VL 5664
3148 22:22:43.252827 # ok 1421 Set SVE VL 5680
3149 22:22:43.252957 # ok 1422 # SKIP SVE set SVE get SVE for VL 5680
3150 22:22:43.253265 # ok 1423 # SKIP SVE set SVE get FPSIMD for VL 5680
3151 22:22:43.253371 # ok 1424 # SKIP SVE set FPSIMD get SVE for VL 5680
3152 22:22:43.253481 # ok 1425 Set SVE VL 5696
3153 22:22:43.253612 # ok 1426 # SKIP SVE set SVE get SVE for VL 5696
3154 22:22:43.253752 # ok 1427 # SKIP SVE set SVE get FPSIMD for VL 5696
3155 22:22:43.253862 # ok 1428 # SKIP SVE set FPSIMD get SVE for VL 5696
3156 22:22:43.253976 # ok 1429 Set SVE VL 5712
3157 22:22:43.254084 # ok 1430 # SKIP SVE set SVE get SVE for VL 5712
3158 22:22:43.254559 # ok 1431 # SKIP SVE set SVE get FPSIMD for VL 5712
3159 22:22:43.254681 # ok 1432 # SKIP SVE set FPSIMD get SVE for VL 5712
3160 22:22:43.255013 # ok 1433 Set SVE VL 5728
3161 22:22:43.255109 # ok 1434 # SKIP SVE set SVE get SVE for VL 5728
3162 22:22:43.255202 # ok 1435 # SKIP SVE set SVE get FPSIMD for VL 5728
3163 22:22:43.255299 # ok 1436 # SKIP SVE set FPSIMD get SVE for VL 5728
3164 22:22:43.255383 # ok 1437 Set SVE VL 5744
3165 22:22:43.255460 # ok 1438 # SKIP SVE set SVE get SVE for VL 5744
3166 22:22:43.255569 # ok 1439 # SKIP SVE set SVE get FPSIMD for VL 5744
3167 22:22:43.255660 # ok 1440 # SKIP SVE set FPSIMD get SVE for VL 5744
3168 22:22:43.255777 # ok 1441 Set SVE VL 5760
3169 22:22:43.255872 # ok 1442 # SKIP SVE set SVE get SVE for VL 5760
3170 22:22:43.255986 # ok 1443 # SKIP SVE set SVE get FPSIMD for VL 5760
3171 22:22:43.256080 # ok 1444 # SKIP SVE set FPSIMD get SVE for VL 5760
3172 22:22:43.256158 # ok 1445 Set SVE VL 5776
3173 22:22:43.256236 # ok 1446 # SKIP SVE set SVE get SVE for VL 5776
3174 22:22:43.256326 # ok 1447 # SKIP SVE set SVE get FPSIMD for VL 5776
3175 22:22:43.256415 # ok 1448 # SKIP SVE set FPSIMD get SVE for VL 5776
3176 22:22:43.256501 # ok 1449 Set SVE VL 5792
3177 22:22:43.256799 # ok 1450 # SKIP SVE set SVE get SVE for VL 5792
3178 22:22:43.256925 # ok 1451 # SKIP SVE set SVE get FPSIMD for VL 5792
3179 22:22:43.258014 # ok 1452 # SKIP SVE set FPSIMD get SVE for VL 5792
3180 22:22:43.258425 # ok 1453 Set SVE VL 5808
3181 22:22:43.258576 # ok 1454 # SKIP SVE set SVE get SVE for VL 5808
3182 22:22:43.258684 # ok 1455 # SKIP SVE set SVE get FPSIMD for VL 5808
3183 22:22:43.258798 # ok 1456 # SKIP SVE set FPSIMD get SVE for VL 5808
3184 22:22:43.258896 # ok 1457 Set SVE VL 5824
3185 22:22:43.258991 # ok 1458 # SKIP SVE set SVE get SVE for VL 5824
3186 22:22:43.259083 # ok 1459 # SKIP SVE set SVE get FPSIMD for VL 5824
3187 22:22:43.259197 # ok 1460 # SKIP SVE set FPSIMD get SVE for VL 5824
3188 22:22:43.259296 # ok 1461 Set SVE VL 5840
3189 22:22:43.259393 # ok 1462 # SKIP SVE set SVE get SVE for VL 5840
3190 22:22:43.259506 # ok 1463 # SKIP SVE set SVE get FPSIMD for VL 5840
3191 22:22:43.259606 # ok 1464 # SKIP SVE set FPSIMD get SVE for VL 5840
3192 22:22:43.259716 # ok 1465 Set SVE VL 5856
3193 22:22:43.259813 # ok 1466 # SKIP SVE set SVE get SVE for VL 5856
3194 22:22:43.259925 # ok 1467 # SKIP SVE set SVE get FPSIMD for VL 5856
3195 22:22:43.260069 # ok 1468 # SKIP SVE set FPSIMD get SVE for VL 5856
3196 22:22:43.260196 # ok 1469 Set SVE VL 5872
3197 22:22:43.260320 # ok 1470 # SKIP SVE set SVE get SVE for VL 5872
3198 22:22:43.260487 # ok 1471 # SKIP SVE set SVE get FPSIMD for VL 5872
3199 22:22:43.260633 # ok 1472 # SKIP SVE set FPSIMD get SVE for VL 5872
3200 22:22:43.260753 # ok 1473 Set SVE VL 5888
3201 22:22:43.260866 # ok 1474 # SKIP SVE set SVE get SVE for VL 5888
3202 22:22:43.260960 # ok 1475 # SKIP SVE set SVE get FPSIMD for VL 5888
3203 22:22:43.261050 # ok 1476 # SKIP SVE set FPSIMD get SVE for VL 5888
3204 22:22:43.261955 # ok 1477 Set SVE VL 5904
3205 22:22:43.262087 # ok 1478 # SKIP SVE set SVE get SVE for VL 5904
3206 22:22:43.262269 # ok 1479 # SKIP SVE set SVE get FPSIMD for VL 5904
3207 22:22:43.262422 # ok 1480 # SKIP SVE set FPSIMD get SVE for VL 5904
3208 22:22:43.262554 # ok 1481 Set SVE VL 5920
3209 22:22:43.262700 # ok 1482 # SKIP SVE set SVE get SVE for VL 5920
3210 22:22:43.262831 # ok 1483 # SKIP SVE set SVE get FPSIMD for VL 5920
3211 22:22:43.262966 # ok 1484 # SKIP SVE set FPSIMD get SVE for VL 5920
3212 22:22:43.263091 # ok 1485 Set SVE VL 5936
3213 22:22:43.263234 # ok 1486 # SKIP SVE set SVE get SVE for VL 5936
3214 22:22:43.263363 # ok 1487 # SKIP SVE set SVE get FPSIMD for VL 5936
3215 22:22:43.263518 # ok 1488 # SKIP SVE set FPSIMD get SVE for VL 5936
3216 22:22:43.263647 # ok 1489 Set SVE VL 5952
3217 22:22:43.263795 # ok 1490 # SKIP SVE set SVE get SVE for VL 5952
3218 22:22:43.263927 # ok 1491 # SKIP SVE set SVE get FPSIMD for VL 5952
3219 22:22:43.264070 # ok 1492 # SKIP SVE set FPSIMD get SVE for VL 5952
3220 22:22:43.264203 # ok 1493 Set SVE VL 5968
3221 22:22:43.264314 # ok 1494 # SKIP SVE set SVE get SVE for VL 5968
3222 22:22:43.264450 # ok 1495 # SKIP SVE set SVE get FPSIMD for VL 5968
3223 22:22:43.264585 # ok 1496 # SKIP SVE set FPSIMD get SVE for VL 5968
3224 22:22:43.264694 # ok 1497 Set SVE VL 5984
3225 22:22:43.264798 # ok 1498 # SKIP SVE set SVE get SVE for VL 5984
3226 22:22:43.264934 # ok 1499 # SKIP SVE set SVE get FPSIMD for VL 5984
3227 22:22:43.265037 # ok 1500 # SKIP SVE set FPSIMD get SVE for VL 5984
3228 22:22:43.265149 # ok 1501 Set SVE VL 6000
3229 22:22:43.265244 # ok 1502 # SKIP SVE set SVE get SVE for VL 6000
3230 22:22:43.265334 # ok 1503 # SKIP SVE set SVE get FPSIMD for VL 6000
3231 22:22:43.265629 # ok 1504 # SKIP SVE set FPSIMD get SVE for VL 6000
3232 22:22:43.265762 # ok 1505 Set SVE VL 6016
3233 22:22:43.265875 # ok 1506 # SKIP SVE set SVE get SVE for VL 6016
3234 22:22:43.265978 # ok 1507 # SKIP SVE set SVE get FPSIMD for VL 6016
3235 22:22:43.266077 # ok 1508 # SKIP SVE set FPSIMD get SVE for VL 6016
3236 22:22:43.266175 # ok 1509 Set SVE VL 6032
3237 22:22:43.266273 # ok 1510 # SKIP SVE set SVE get SVE for VL 6032
3238 22:22:43.266371 # ok 1511 # SKIP SVE set SVE get FPSIMD for VL 6032
3239 22:22:43.266469 # ok 1512 # SKIP SVE set FPSIMD get SVE for VL 6032
3240 22:22:43.266554 # ok 1513 Set SVE VL 6048
3241 22:22:43.266651 # ok 1514 # SKIP SVE set SVE get SVE for VL 6048
3242 22:22:43.266750 # ok 1515 # SKIP SVE set SVE get FPSIMD for VL 6048
3243 22:22:43.266848 # ok 1516 # SKIP SVE set FPSIMD get SVE for VL 6048
3244 22:22:43.266949 # ok 1517 Set SVE VL 6064
3245 22:22:43.267263 # ok 1518 # SKIP SVE set SVE get SVE for VL 6064
3246 22:22:43.267402 # ok 1519 # SKIP SVE set SVE get FPSIMD for VL 6064
3247 22:22:43.267521 # ok 1520 # SKIP SVE set FPSIMD get SVE for VL 6064
3248 22:22:43.267632 # ok 1521 Set SVE VL 6080
3249 22:22:43.267816 # ok 1522 # SKIP SVE set SVE get SVE for VL 6080
3250 22:22:43.267942 # ok 1523 # SKIP SVE set SVE get FPSIMD for VL 6080
3251 22:22:43.268075 # ok 1524 # SKIP SVE set FPSIMD get SVE for VL 6080
3252 22:22:43.268209 # ok 1525 Set SVE VL 6096
3253 22:22:43.268373 # ok 1526 # SKIP SVE set SVE get SVE for VL 6096
3254 22:22:43.268507 # ok 1527 # SKIP SVE set SVE get FPSIMD for VL 6096
3255 22:22:43.268630 # ok 1528 # SKIP SVE set FPSIMD get SVE for VL 6096
3256 22:22:43.268771 # ok 1529 Set SVE VL 6112
3257 22:22:43.268866 # ok 1530 # SKIP SVE set SVE get SVE for VL 6112
3258 22:22:43.268949 # ok 1531 # SKIP SVE set SVE get FPSIMD for VL 6112
3259 22:22:43.269021 # ok 1532 # SKIP SVE set FPSIMD get SVE for VL 6112
3260 22:22:43.269776 # ok 1533 Set SVE VL 6128
3261 22:22:43.269894 # ok 1534 # SKIP SVE set SVE get SVE for VL 6128
3262 22:22:43.270007 # ok 1535 # SKIP SVE set SVE get FPSIMD for VL 6128
3263 22:22:43.270133 # ok 1536 # SKIP SVE set FPSIMD get SVE for VL 6128
3264 22:22:43.270223 # ok 1537 Set SVE VL 6144
3265 22:22:43.270319 # ok 1538 # SKIP SVE set SVE get SVE for VL 6144
3266 22:22:43.270419 # ok 1539 # SKIP SVE set SVE get FPSIMD for VL 6144
3267 22:22:43.270705 # ok 1540 # SKIP SVE set FPSIMD get SVE for VL 6144
3268 22:22:43.270801 # ok 1541 Set SVE VL 6160
3269 22:22:43.270879 # ok 1542 # SKIP SVE set SVE get SVE for VL 6160
3270 22:22:43.270944 # ok 1543 # SKIP SVE set SVE get FPSIMD for VL 6160
3271 22:22:43.271017 # ok 1544 # SKIP SVE set FPSIMD get SVE for VL 6160
3272 22:22:43.271275 # ok 1545 Set SVE VL 6176
3273 22:22:43.271365 # ok 1546 # SKIP SVE set SVE get SVE for VL 6176
3274 22:22:43.271445 # ok 1547 # SKIP SVE set SVE get FPSIMD for VL 6176
3275 22:22:43.271528 # ok 1548 # SKIP SVE set FPSIMD get SVE for VL 6176
3276 22:22:43.271606 # ok 1549 Set SVE VL 6192
3277 22:22:43.271860 # ok 1550 # SKIP SVE set SVE get SVE for VL 6192
3278 22:22:43.271941 # ok 1551 # SKIP SVE set SVE get FPSIMD for VL 6192
3279 22:22:43.272024 # ok 1552 # SKIP SVE set FPSIMD get SVE for VL 6192
3280 22:22:43.272102 # ok 1553 Set SVE VL 6208
3281 22:22:43.272354 # ok 1554 # SKIP SVE set SVE get SVE for VL 6208
3282 22:22:43.272426 # ok 1555 # SKIP SVE set SVE get FPSIMD for VL 6208
3283 22:22:43.272678 # ok 1556 # SKIP SVE set FPSIMD get SVE for VL 6208
3284 22:22:43.272751 # ok 1557 Set SVE VL 6224
3285 22:22:43.272828 # ok 1558 # SKIP SVE set SVE get SVE for VL 6224
3286 22:22:43.273403 # ok 1559 # SKIP SVE set SVE get FPSIMD for VL 6224
3287 22:22:43.273842 # ok 1560 # SKIP SVE set FPSIMD get SVE for VL 6224
3288 22:22:43.273930 # ok 1561 Set SVE VL 6240
3289 22:22:43.274002 # ok 1562 # SKIP SVE set SVE get SVE for VL 6240
3290 22:22:43.274081 # ok 1563 # SKIP SVE set SVE get FPSIMD for VL 6240
3291 22:22:43.274149 # ok 1564 # SKIP SVE set FPSIMD get SVE for VL 6240
3292 22:22:43.274229 # ok 1565 Set SVE VL 6256
3293 22:22:43.274295 # ok 1566 # SKIP SVE set SVE get SVE for VL 6256
3294 22:22:43.274547 # ok 1567 # SKIP SVE set SVE get FPSIMD for VL 6256
3295 22:22:43.274797 # ok 1568 # SKIP SVE set FPSIMD get SVE for VL 6256
3296 22:22:43.274879 # ok 1569 Set SVE VL 6272
3297 22:22:43.275100 # ok 1570 # SKIP SVE set SVE get SVE for VL 6272
3298 22:22:43.275337 # ok 1571 # SKIP SVE set SVE get FPSIMD for VL 6272
3299 22:22:43.275509 # ok 1572 # SKIP SVE set FPSIMD get SVE for VL 6272
3300 22:22:43.275673 # ok 1573 Set SVE VL 6288
3301 22:22:43.275869 # ok 1574 # SKIP SVE set SVE get SVE for VL 6288
3302 22:22:43.276066 # ok 1575 # SKIP SVE set SVE get FPSIMD for VL 6288
3303 22:22:43.276278 # ok 1576 # SKIP SVE set FPSIMD get SVE for VL 6288
3304 22:22:43.276452 # ok 1577 Set SVE VL 6304
3305 22:22:43.276617 # ok 1578 # SKIP SVE set SVE get SVE for VL 6304
3306 22:22:43.276747 # ok 1579 # SKIP SVE set SVE get FPSIMD for VL 6304
3307 22:22:43.276867 # ok 1580 # SKIP SVE set FPSIMD get SVE for VL 6304
3308 22:22:43.276986 # ok 1581 Set SVE VL 6320
3309 22:22:43.277104 # ok 1582 # SKIP SVE set SVE get SVE for VL 6320
3310 22:22:43.277220 # ok 1583 # SKIP SVE set SVE get FPSIMD for VL 6320
3311 22:22:43.277336 # ok 1584 # SKIP SVE set FPSIMD get SVE for VL 6320
3312 22:22:43.277452 # ok 1585 Set SVE VL 6336
3313 22:22:43.277592 # ok 1586 # SKIP SVE set SVE get SVE for VL 6336
3314 22:22:43.277733 # ok 1587 # SKIP SVE set SVE get FPSIMD for VL 6336
3315 22:22:43.277910 # ok 1588 # SKIP SVE set FPSIMD get SVE for VL 6336
3316 22:22:43.278039 # ok 1589 Set SVE VL 6352
3317 22:22:43.279247 # ok 1590 # SKIP SVE set SVE get SVE for VL 6352
3318 22:22:43.279352 # ok 1591 # SKIP SVE set SVE get FPSIMD for VL 6352
3319 22:22:43.279471 # ok 1592 # SKIP SVE set FPSIMD get SVE for VL 6352
3320 22:22:43.279563 # ok 1593 Set SVE VL 6368
3321 22:22:43.279645 # ok 1594 # SKIP SVE set SVE get SVE for VL 6368
3322 22:22:43.279739 # ok 1595 # SKIP SVE set SVE get FPSIMD for VL 6368
3323 22:22:43.279813 # ok 1596 # SKIP SVE set FPSIMD get SVE for VL 6368
3324 22:22:43.279955 # ok 1597 Set SVE VL 6384
3325 22:22:43.280077 # ok 1598 # SKIP SVE set SVE get SVE for VL 6384
3326 22:22:43.280215 # ok 1599 # SKIP SVE set SVE get FPSIMD for VL 6384
3327 22:22:43.280365 # ok 1600 # SKIP SVE set FPSIMD get SVE for VL 6384
3328 22:22:43.280540 # ok 1601 Set SVE VL 6400
3329 22:22:43.280698 # ok 1602 # SKIP SVE set SVE get SVE for VL 6400
3330 22:22:43.280829 # ok 1603 # SKIP SVE set SVE get FPSIMD for VL 6400
3331 22:22:43.280958 # ok 1604 # SKIP SVE set FPSIMD get SVE for VL 6400
3332 22:22:43.281054 # ok 1605 Set SVE VL 6416
3333 22:22:43.281141 # ok 1606 # SKIP SVE set SVE get SVE for VL 6416
3334 22:22:43.281440 # ok 1607 # SKIP SVE set SVE get FPSIMD for VL 6416
3335 22:22:43.281560 # ok 1608 # SKIP SVE set FPSIMD get SVE for VL 6416
3336 22:22:43.281655 # ok 1609 Set SVE VL 6432
3337 22:22:43.281754 # ok 1610 # SKIP SVE set SVE get SVE for VL 6432
3338 22:22:43.281843 # ok 1611 # SKIP SVE set SVE get FPSIMD for VL 6432
3339 22:22:43.281948 # ok 1612 # SKIP SVE set FPSIMD get SVE for VL 6432
3340 22:22:43.282047 # ok 1613 Set SVE VL 6448
3341 22:22:43.282145 # ok 1614 # SKIP SVE set SVE get SVE for VL 6448
3342 22:22:43.282243 # ok 1615 # SKIP SVE set SVE get FPSIMD for VL 6448
3343 22:22:43.282341 # ok 1616 # SKIP SVE set FPSIMD get SVE for VL 6448
3344 22:22:43.282427 # ok 1617 Set SVE VL 6464
3345 22:22:43.282523 # ok 1618 # SKIP SVE set SVE get SVE for VL 6464
3346 22:22:43.282621 # ok 1619 # SKIP SVE set SVE get FPSIMD for VL 6464
3347 22:22:43.282726 # ok 1620 # SKIP SVE set FPSIMD get SVE for VL 6464
3348 22:22:43.282824 # ok 1621 Set SVE VL 6480
3349 22:22:43.282921 # ok 1622 # SKIP SVE set SVE get SVE for VL 6480
3350 22:22:43.283261 # ok 1623 # SKIP SVE set SVE get FPSIMD for VL 6480
3351 22:22:43.283366 # ok 1624 # SKIP SVE set FPSIMD get SVE for VL 6480
3352 22:22:43.283455 # ok 1625 Set SVE VL 6496
3353 22:22:43.283554 # ok 1626 # SKIP SVE set SVE get SVE for VL 6496
3354 22:22:43.283642 # ok 1627 # SKIP SVE set SVE get FPSIMD for VL 6496
3355 22:22:43.283740 # ok 1628 # SKIP SVE set FPSIMD get SVE for VL 6496
3356 22:22:43.283827 # ok 1629 Set SVE VL 6512
3357 22:22:43.283916 # ok 1630 # SKIP SVE set SVE get SVE for VL 6512
3358 22:22:43.284016 # ok 1631 # SKIP SVE set SVE get FPSIMD for VL 6512
3359 22:22:43.284101 # ok 1632 # SKIP SVE set FPSIMD get SVE for VL 6512
3360 22:22:43.284198 # ok 1633 Set SVE VL 6528
3361 22:22:43.284284 # ok 1634 # SKIP SVE set SVE get SVE for VL 6528
3362 22:22:43.284384 # ok 1635 # SKIP SVE set SVE get FPSIMD for VL 6528
3363 22:22:43.284485 # ok 1636 # SKIP SVE set FPSIMD get SVE for VL 6528
3364 22:22:43.284586 # ok 1637 Set SVE VL 6544
3365 22:22:43.284675 # ok 1638 # SKIP SVE set SVE get SVE for VL 6544
3366 22:22:43.284774 # ok 1639 # SKIP SVE set SVE get FPSIMD for VL 6544
3367 22:22:43.285119 # ok 1640 # SKIP SVE set FPSIMD get SVE for VL 6544
3368 22:22:43.285225 # ok 1641 Set SVE VL 6560
3369 22:22:43.285509 # ok 1642 # SKIP SVE set SVE get SVE for VL 6560
3370 22:22:43.285713 # ok 1643 # SKIP SVE set SVE get FPSIMD for VL 6560
3371 22:22:43.285916 # ok 1644 # SKIP SVE set FPSIMD get SVE for VL 6560
3372 22:22:43.286070 # ok 1645 Set SVE VL 6576
3373 22:22:43.286256 # ok 1646 # SKIP SVE set SVE get SVE for VL 6576
3374 22:22:43.286401 # ok 1647 # SKIP SVE set SVE get FPSIMD for VL 6576
3375 22:22:43.286527 # ok 1648 # SKIP SVE set FPSIMD get SVE for VL 6576
3376 22:22:43.286640 # ok 1649 Set SVE VL 6592
3377 22:22:43.286755 # ok 1650 # SKIP SVE set SVE get SVE for VL 6592
3378 22:22:43.286880 # ok 1651 # SKIP SVE set SVE get FPSIMD for VL 6592
3379 22:22:43.286992 # ok 1652 # SKIP SVE set FPSIMD get SVE for VL 6592
3380 22:22:43.287103 # ok 1653 Set SVE VL 6608
3381 22:22:43.287243 # ok 1654 # SKIP SVE set SVE get SVE for VL 6608
3382 22:22:43.287362 # ok 1655 # SKIP SVE set SVE get FPSIMD for VL 6608
3383 22:22:43.287494 # ok 1656 # SKIP SVE set FPSIMD get SVE for VL 6608
3384 22:22:43.287604 # ok 1657 Set SVE VL 6624
3385 22:22:43.287711 # ok 1658 # SKIP SVE set SVE get SVE for VL 6624
3386 22:22:43.287818 # ok 1659 # SKIP SVE set SVE get FPSIMD for VL 6624
3387 22:22:43.287923 # ok 1660 # SKIP SVE set FPSIMD get SVE for VL 6624
3388 22:22:43.288040 # ok 1661 Set SVE VL 6640
3389 22:22:43.288128 # ok 1662 # SKIP SVE set SVE get SVE for VL 6640
3390 22:22:43.288234 # ok 1663 # SKIP SVE set SVE get FPSIMD for VL 6640
3391 22:22:43.288317 # ok 1664 # SKIP SVE set FPSIMD get SVE for VL 6640
3392 22:22:43.288396 # ok 1665 Set SVE VL 6656
3393 22:22:43.288466 # ok 1666 # SKIP SVE set SVE get SVE for VL 6656
3394 22:22:43.288537 # ok 1667 # SKIP SVE set SVE get FPSIMD for VL 6656
3395 22:22:43.288603 # ok 1668 # SKIP SVE set FPSIMD get SVE for VL 6656
3396 22:22:43.288666 # ok 1669 Set SVE VL 6672
3397 22:22:43.288736 # ok 1670 # SKIP SVE set SVE get SVE for VL 6672
3398 22:22:43.288807 # ok 1671 # SKIP SVE set SVE get FPSIMD for VL 6672
3399 22:22:43.288868 # ok 1672 # SKIP SVE set FPSIMD get SVE for VL 6672
3400 22:22:43.288931 # ok 1673 Set SVE VL 6688
3401 22:22:43.289014 # ok 1674 # SKIP SVE set SVE get SVE for VL 6688
3402 22:22:43.289087 # ok 1675 # SKIP SVE set SVE get FPSIMD for VL 6688
3403 22:22:43.289165 # ok 1676 # SKIP SVE set FPSIMD get SVE for VL 6688
3404 22:22:43.289243 # ok 1677 Set SVE VL 6704
3405 22:22:43.289320 # ok 1678 # SKIP SVE set SVE get SVE for VL 6704
3406 22:22:43.289425 # ok 1679 # SKIP SVE set SVE get FPSIMD for VL 6704
3407 22:22:43.289510 # ok 1680 # SKIP SVE set FPSIMD get SVE for VL 6704
3408 22:22:43.289602 # ok 1681 Set SVE VL 6720
3409 22:22:43.290087 # ok 1682 # SKIP SVE set SVE get SVE for VL 6720
3410 22:22:43.290194 # ok 1683 # SKIP SVE set SVE get FPSIMD for VL 6720
3411 22:22:43.290490 # ok 1684 # SKIP SVE set FPSIMD get SVE for VL 6720
3412 22:22:43.290581 # ok 1685 Set SVE VL 6736
3413 22:22:43.290671 # ok 1686 # SKIP SVE set SVE get SVE for VL 6736
3414 22:22:43.290781 # ok 1687 # SKIP SVE set SVE get FPSIMD for VL 6736
3415 22:22:43.290866 # ok 1688 # SKIP SVE set FPSIMD get SVE for VL 6736
3416 22:22:43.290934 # ok 1689 Set SVE VL 6752
3417 22:22:43.291010 # ok 1690 # SKIP SVE set SVE get SVE for VL 6752
3418 22:22:43.291090 # ok 1691 # SKIP SVE set SVE get FPSIMD for VL 6752
3419 22:22:43.291163 # ok 1692 # SKIP SVE set FPSIMD get SVE for VL 6752
3420 22:22:43.291249 # ok 1693 Set SVE VL 6768
3421 22:22:43.291327 # ok 1694 # SKIP SVE set SVE get SVE for VL 6768
3422 22:22:43.291397 # ok 1695 # SKIP SVE set SVE get FPSIMD for VL 6768
3423 22:22:43.291466 # ok 1696 # SKIP SVE set FPSIMD get SVE for VL 6768
3424 22:22:43.291541 # ok 1697 Set SVE VL 6784
3425 22:22:43.291619 # ok 1698 # SKIP SVE set SVE get SVE for VL 6784
3426 22:22:43.291699 # ok 1699 # SKIP SVE set SVE get FPSIMD for VL 6784
3427 22:22:43.291792 # ok 1700 # SKIP SVE set FPSIMD get SVE for VL 6784
3428 22:22:43.291878 # ok 1701 Set SVE VL 6800
3429 22:22:43.291963 # ok 1702 # SKIP SVE set SVE get SVE for VL 6800
3430 22:22:43.292061 # ok 1703 # SKIP SVE set SVE get FPSIMD for VL 6800
3431 22:22:43.292147 # ok 1704 # SKIP SVE set FPSIMD get SVE for VL 6800
3432 22:22:43.292231 # ok 1705 Set SVE VL 6816
3433 22:22:43.292356 # ok 1706 # SKIP SVE set SVE get SVE for VL 6816
3434 22:22:43.292472 # ok 1707 # SKIP SVE set SVE get FPSIMD for VL 6816
3435 22:22:43.292578 # ok 1708 # SKIP SVE set FPSIMD get SVE for VL 6816
3436 22:22:43.292657 # ok 1709 Set SVE VL 6832
3437 22:22:43.292754 # ok 1710 # SKIP SVE set SVE get SVE for VL 6832
3438 22:22:43.292852 # ok 1711 # SKIP SVE set SVE get FPSIMD for VL 6832
3439 22:22:43.292939 # ok 1712 # SKIP SVE set FPSIMD get SVE for VL 6832
3440 22:22:43.293041 # ok 1713 Set SVE VL 6848
3441 22:22:43.293121 # ok 1714 # SKIP SVE set SVE get SVE for VL 6848
3442 22:22:43.293193 # ok 1715 # SKIP SVE set SVE get FPSIMD for VL 6848
3443 22:22:43.293274 # ok 1716 # SKIP SVE set FPSIMD get SVE for VL 6848
3444 22:22:43.293340 # ok 1717 Set SVE VL 6864
3445 22:22:43.293429 # ok 1718 # SKIP SVE set SVE get SVE for VL 6864
3446 22:22:43.293514 # ok 1719 # SKIP SVE set SVE get FPSIMD for VL 6864
3447 22:22:43.293626 # ok 1720 # SKIP SVE set FPSIMD get SVE for VL 6864
3448 22:22:43.294240 # ok 1721 Set SVE VL 6880
3449 22:22:43.294342 # ok 1722 # SKIP SVE set SVE get SVE for VL 6880
3450 22:22:43.294440 # ok 1723 # SKIP SVE set SVE get FPSIMD for VL 6880
3451 22:22:43.294510 # ok 1724 # SKIP SVE set FPSIMD get SVE for VL 6880
3452 22:22:43.294589 # ok 1725 Set SVE VL 6896
3453 22:22:43.294666 # ok 1726 # SKIP SVE set SVE get SVE for VL 6896
3454 22:22:43.294964 # ok 1727 # SKIP SVE set SVE get FPSIMD for VL 6896
3455 22:22:43.295049 # ok 1728 # SKIP SVE set FPSIMD get SVE for VL 6896
3456 22:22:43.295147 # ok 1729 Set SVE VL 6912
3457 22:22:43.295247 # ok 1730 # SKIP SVE set SVE get SVE for VL 6912
3458 22:22:43.295350 # ok 1731 # SKIP SVE set SVE get FPSIMD for VL 6912
3459 22:22:43.295462 # ok 1732 # SKIP SVE set FPSIMD get SVE for VL 6912
3460 22:22:43.295568 # ok 1733 Set SVE VL 6928
3461 22:22:43.295667 # ok 1734 # SKIP SVE set SVE get SVE for VL 6928
3462 22:22:43.295777 # ok 1735 # SKIP SVE set SVE get FPSIMD for VL 6928
3463 22:22:43.295885 # ok 1736 # SKIP SVE set FPSIMD get SVE for VL 6928
3464 22:22:43.295987 # ok 1737 Set SVE VL 6944
3465 22:22:43.296081 # ok 1738 # SKIP SVE set SVE get SVE for VL 6944
3466 22:22:43.296184 # ok 1739 # SKIP SVE set SVE get FPSIMD for VL 6944
3467 22:22:43.296270 # ok 1740 # SKIP SVE set FPSIMD get SVE for VL 6944
3468 22:22:43.296345 # ok 1741 Set SVE VL 6960
3469 22:22:43.296422 # ok 1742 # SKIP SVE set SVE get SVE for VL 6960
3470 22:22:43.296517 # ok 1743 # SKIP SVE set SVE get FPSIMD for VL 6960
3471 22:22:43.296622 # ok 1744 # SKIP SVE set FPSIMD get SVE for VL 6960
3472 22:22:43.296708 # ok 1745 Set SVE VL 6976
3473 22:22:43.296798 # ok 1746 # SKIP SVE set SVE get SVE for VL 6976
3474 22:22:43.296882 # ok 1747 # SKIP SVE set SVE get FPSIMD for VL 6976
3475 22:22:43.296951 # ok 1748 # SKIP SVE set FPSIMD get SVE for VL 6976
3476 22:22:43.297011 # ok 1749 Set SVE VL 6992
3477 22:22:43.297090 # ok 1750 # SKIP SVE set SVE get SVE for VL 6992
3478 22:22:43.297175 # ok 1751 # SKIP SVE set SVE get FPSIMD for VL 6992
3479 22:22:43.297251 # ok 1752 # SKIP SVE set FPSIMD get SVE for VL 6992
3480 22:22:43.297339 # ok 1753 Set SVE VL 7008
3481 22:22:43.297467 # ok 1754 # SKIP SVE set SVE get SVE for VL 7008
3482 22:22:43.297573 # ok 1755 # SKIP SVE set SVE get FPSIMD for VL 7008
3483 22:22:43.297687 # ok 1756 # SKIP SVE set FPSIMD get SVE for VL 7008
3484 22:22:43.297793 # ok 1757 Set SVE VL 7024
3485 22:22:43.297890 # ok 1758 # SKIP SVE set SVE get SVE for VL 7024
3486 22:22:43.298192 # ok 1759 # SKIP SVE set SVE get FPSIMD for VL 7024
3487 22:22:43.298357 # ok 1760 # SKIP SVE set FPSIMD get SVE for VL 7024
3488 22:22:43.298502 # ok 1761 Set SVE VL 7040
3489 22:22:43.298630 # ok 1762 # SKIP SVE set SVE get SVE for VL 7040
3490 22:22:43.298775 # ok 1763 # SKIP SVE set SVE get FPSIMD for VL 7040
3491 22:22:43.298919 # ok 1764 # SKIP SVE set FPSIMD get SVE for VL 7040
3492 22:22:43.299064 # ok 1765 Set SVE VL 7056
3493 22:22:43.299208 # ok 1766 # SKIP SVE set SVE get SVE for VL 7056
3494 22:22:43.299379 # ok 1767 # SKIP SVE set SVE get FPSIMD for VL 7056
3495 22:22:43.299541 # ok 1768 # SKIP SVE set FPSIMD get SVE for VL 7056
3496 22:22:43.299667 # ok 1769 Set SVE VL 7072
3497 22:22:43.299804 # ok 1770 # SKIP SVE set SVE get SVE for VL 7072
3498 22:22:43.299897 # ok 1771 # SKIP SVE set SVE get FPSIMD for VL 7072
3499 22:22:43.299984 # ok 1772 # SKIP SVE set FPSIMD get SVE for VL 7072
3500 22:22:43.302472 # ok 1773 Set SVE VL 7088
3501 22:22:43.302562 # ok 1774 # SKIP SVE set SVE get SVE for VL 7088
3502 22:22:43.302651 # ok 1775 # SKIP SVE set SVE get FPSIMD for VL 7088
3503 22:22:43.302726 # ok 1776 # SKIP SVE set FPSIMD get SVE for VL 7088
3504 22:22:43.302844 # ok 1777 Set SVE VL 7104
3505 22:22:43.302950 # ok 1778 # SKIP SVE set SVE get SVE for VL 7104
3506 22:22:43.303029 # ok 1779 # SKIP SVE set SVE get FPSIMD for VL 7104
3507 22:22:43.303117 # ok 1780 # SKIP SVE set FPSIMD get SVE for VL 7104
3508 22:22:43.303194 # ok 1781 Set SVE VL 7120
3509 22:22:43.303279 # ok 1782 # SKIP SVE set SVE get SVE for VL 7120
3510 22:22:43.303364 # ok 1783 # SKIP SVE set SVE get FPSIMD for VL 7120
3511 22:22:43.303450 # ok 1784 # SKIP SVE set FPSIMD get SVE for VL 7120
3512 22:22:43.303536 # ok 1785 Set SVE VL 7136
3513 22:22:43.303622 # ok 1786 # SKIP SVE set SVE get SVE for VL 7136
3514 22:22:43.303912 # ok 1787 # SKIP SVE set SVE get FPSIMD for VL 7136
3515 22:22:43.304036 # ok 1788 # SKIP SVE set FPSIMD get SVE for VL 7136
3516 22:22:43.304122 # ok 1789 Set SVE VL 7152
3517 22:22:43.304212 # ok 1790 # SKIP SVE set SVE get SVE for VL 7152
3518 22:22:43.304284 # ok 1791 # SKIP SVE set SVE get FPSIMD for VL 7152
3519 22:22:43.304358 # ok 1792 # SKIP SVE set FPSIMD get SVE for VL 7152
3520 22:22:43.304434 # ok 1793 Set SVE VL 7168
3521 22:22:43.304509 # ok 1794 # SKIP SVE set SVE get SVE for VL 7168
3522 22:22:43.304773 # ok 1795 # SKIP SVE set SVE get FPSIMD for VL 7168
3523 22:22:43.304853 # ok 1796 # SKIP SVE set FPSIMD get SVE for VL 7168
3524 22:22:43.305823 # ok 1797 Set SVE VL 7184
3525 22:22:43.306176 # ok 1798 # SKIP SVE set SVE get SVE for VL 7184
3526 22:22:43.306378 # ok 1799 # SKIP SVE set SVE get FPSIMD for VL 7184
3527 22:22:43.306547 # ok 1800 # SKIP SVE set FPSIMD get SVE for VL 7184
3528 22:22:43.306711 # ok 1801 Set SVE VL 7200
3529 22:22:43.306901 # ok 1802 # SKIP SVE set SVE get SVE for VL 7200
3530 22:22:43.307013 # ok 1803 # SKIP SVE set SVE get FPSIMD for VL 7200
3531 22:22:43.307106 # ok 1804 # SKIP SVE set FPSIMD get SVE for VL 7200
3532 22:22:43.307209 # ok 1805 Set SVE VL 7216
3533 22:22:43.307317 # ok 1806 # SKIP SVE set SVE get SVE for VL 7216
3534 22:22:43.307414 # ok 1807 # SKIP SVE set SVE get FPSIMD for VL 7216
3535 22:22:43.307506 # ok 1808 # SKIP SVE set FPSIMD get SVE for VL 7216
3536 22:22:43.307630 # ok 1809 Set SVE VL 7232
3537 22:22:43.307741 # ok 1810 # SKIP SVE set SVE get SVE for VL 7232
3538 22:22:43.307855 # ok 1811 # SKIP SVE set SVE get FPSIMD for VL 7232
3539 22:22:43.307966 # ok 1812 # SKIP SVE set FPSIMD get SVE for VL 7232
3540 22:22:43.308105 # ok 1813 Set SVE VL 7248
3541 22:22:43.308223 # ok 1814 # SKIP SVE set SVE get SVE for VL 7248
3542 22:22:43.308370 # ok 1815 # SKIP SVE set SVE get FPSIMD for VL 7248
3543 22:22:43.308498 # ok 1816 # SKIP SVE set FPSIMD get SVE for VL 7248
3544 22:22:43.308621 # ok 1817 Set SVE VL 7264
3545 22:22:43.308737 # ok 1818 # SKIP SVE set SVE get SVE for VL 7264
3546 22:22:43.308831 # ok 1819 # SKIP SVE set SVE get FPSIMD for VL 7264
3547 22:22:43.308920 # ok 1820 # SKIP SVE set FPSIMD get SVE for VL 7264
3548 22:22:43.309006 # ok 1821 Set SVE VL 7280
3549 22:22:43.309113 # ok 1822 # SKIP SVE set SVE get SVE for VL 7280
3550 22:22:43.309263 # ok 1823 # SKIP SVE set SVE get FPSIMD for VL 7280
3551 22:22:43.309411 # ok 1824 # SKIP SVE set FPSIMD get SVE for VL 7280
3552 22:22:43.309540 # ok 1825 Set SVE VL 7296
3553 22:22:43.309670 # ok 1826 # SKIP SVE set SVE get SVE for VL 7296
3554 22:22:43.309808 # ok 1827 # SKIP SVE set SVE get FPSIMD for VL 7296
3555 22:22:43.309988 # ok 1828 # SKIP SVE set FPSIMD get SVE for VL 7296
3556 22:22:43.310092 # ok 1829 Set SVE VL 7312
3557 22:22:43.310173 # ok 1830 # SKIP SVE set SVE get SVE for VL 7312
3558 22:22:43.310272 # ok 1831 # SKIP SVE set SVE get FPSIMD for VL 7312
3559 22:22:43.310358 # ok 1832 # SKIP SVE set FPSIMD get SVE for VL 7312
3560 22:22:43.310437 # ok 1833 Set SVE VL 7328
3561 22:22:43.310542 # ok 1834 # SKIP SVE set SVE get SVE for VL 7328
3562 22:22:43.310630 # ok 1835 # SKIP SVE set SVE get FPSIMD for VL 7328
3563 22:22:43.310713 # ok 1836 # SKIP SVE set FPSIMD get SVE for VL 7328
3564 22:22:43.310793 # ok 1837 Set SVE VL 7344
3565 22:22:43.310865 # ok 1838 # SKIP SVE set SVE get SVE for VL 7344
3566 22:22:43.310946 # ok 1839 # SKIP SVE set SVE get FPSIMD for VL 7344
3567 22:22:43.311025 # ok 1840 # SKIP SVE set FPSIMD get SVE for VL 7344
3568 22:22:43.311301 # ok 1841 Set SVE VL 7360
3569 22:22:43.311396 # ok 1842 # SKIP SVE set SVE get SVE for VL 7360
3570 22:22:43.311464 # ok 1843 # SKIP SVE set SVE get FPSIMD for VL 7360
3571 22:22:43.311524 # ok 1844 # SKIP SVE set FPSIMD get SVE for VL 7360
3572 22:22:43.311590 # ok 1845 Set SVE VL 7376
3573 22:22:43.311665 # ok 1846 # SKIP SVE set SVE get SVE for VL 7376
3574 22:22:43.311744 # ok 1847 # SKIP SVE set SVE get FPSIMD for VL 7376
3575 22:22:43.311827 # ok 1848 # SKIP SVE set FPSIMD get SVE for VL 7376
3576 22:22:43.311930 # ok 1849 Set SVE VL 7392
3577 22:22:43.312055 # ok 1850 # SKIP SVE set SVE get SVE for VL 7392
3578 22:22:43.312143 # ok 1851 # SKIP SVE set SVE get FPSIMD for VL 7392
3579 22:22:43.312256 # ok 1852 # SKIP SVE set FPSIMD get SVE for VL 7392
3580 22:22:43.312343 # ok 1853 Set SVE VL 7408
3581 22:22:43.312471 # ok 1854 # SKIP SVE set SVE get SVE for VL 7408
3582 22:22:43.312571 # ok 1855 # SKIP SVE set SVE get FPSIMD for VL 7408
3583 22:22:43.312656 # ok 1856 # SKIP SVE set FPSIMD get SVE for VL 7408
3584 22:22:43.312748 # ok 1857 Set SVE VL 7424
3585 22:22:43.312813 # ok 1858 # SKIP SVE set SVE get SVE for VL 7424
3586 22:22:43.312941 # ok 1859 # SKIP SVE set SVE get FPSIMD for VL 7424
3587 22:22:43.313112 # ok 1860 # SKIP SVE set FPSIMD get SVE for VL 7424
3588 22:22:43.313245 # ok 1861 Set SVE VL 7440
3589 22:22:43.313418 # ok 1862 # SKIP SVE set SVE get SVE for VL 7440
3590 22:22:43.313551 # ok 1863 # SKIP SVE set SVE get FPSIMD for VL 7440
3591 22:22:43.313672 # ok 1864 # SKIP SVE set FPSIMD get SVE for VL 7440
3592 22:22:43.313837 # ok 1865 Set SVE VL 7456
3593 22:22:43.313955 # ok 1866 # SKIP SVE set SVE get SVE for VL 7456
3594 22:22:43.314030 # ok 1867 # SKIP SVE set SVE get FPSIMD for VL 7456
3595 22:22:43.314139 # ok 1868 # SKIP SVE set FPSIMD get SVE for VL 7456
3596 22:22:43.314226 # ok 1869 Set SVE VL 7472
3597 22:22:43.314307 # ok 1870 # SKIP SVE set SVE get SVE for VL 7472
3598 22:22:43.314424 # ok 1871 # SKIP SVE set SVE get FPSIMD for VL 7472
3599 22:22:43.314530 # ok 1872 # SKIP SVE set FPSIMD get SVE for VL 7472
3600 22:22:43.314649 # ok 1873 Set SVE VL 7488
3601 22:22:43.314756 # ok 1874 # SKIP SVE set SVE get SVE for VL 7488
3602 22:22:43.314855 # ok 1875 # SKIP SVE set SVE get FPSIMD for VL 7488
3603 22:22:43.314969 # ok 1876 # SKIP SVE set FPSIMD get SVE for VL 7488
3604 22:22:43.315080 # ok 1877 Set SVE VL 7504
3605 22:22:43.315173 # ok 1878 # SKIP SVE set SVE get SVE for VL 7504
3606 22:22:43.315295 # ok 1879 # SKIP SVE set SVE get FPSIMD for VL 7504
3607 22:22:43.315392 # ok 1880 # SKIP SVE set FPSIMD get SVE for VL 7504
3608 22:22:43.315484 # ok 1881 Set SVE VL 7520
3609 22:22:43.315582 # ok 1882 # SKIP SVE set SVE get SVE for VL 7520
3610 22:22:43.315659 # ok 1883 # SKIP SVE set SVE get FPSIMD for VL 7520
3611 22:22:43.315930 # ok 1884 # SKIP SVE set FPSIMD get SVE for VL 7520
3612 22:22:43.316031 # ok 1885 Set SVE VL 7536
3613 22:22:43.316106 # ok 1886 # SKIP SVE set SVE get SVE for VL 7536
3614 22:22:43.316196 # ok 1887 # SKIP SVE set SVE get FPSIMD for VL 7536
3615 22:22:43.316281 # ok 1888 # SKIP SVE set FPSIMD get SVE for VL 7536
3616 22:22:43.316355 # ok 1889 Set SVE VL 7552
3617 22:22:43.316418 # ok 1890 # SKIP SVE set SVE get SVE for VL 7552
3618 22:22:43.316494 # ok 1891 # SKIP SVE set SVE get FPSIMD for VL 7552
3619 22:22:43.316560 # ok 1892 # SKIP SVE set FPSIMD get SVE for VL 7552
3620 22:22:43.316623 # ok 1893 Set SVE VL 7568
3621 22:22:43.316696 # ok 1894 # SKIP SVE set SVE get SVE for VL 7568
3622 22:22:43.316770 # ok 1895 # SKIP SVE set SVE get FPSIMD for VL 7568
3623 22:22:43.317050 # ok 1896 # SKIP SVE set FPSIMD get SVE for VL 7568
3624 22:22:43.317153 # ok 1897 Set SVE VL 7584
3625 22:22:43.317250 # ok 1898 # SKIP SVE set SVE get SVE for VL 7584
3626 22:22:43.317348 # ok 1899 # SKIP SVE set SVE get FPSIMD for VL 7584
3627 22:22:43.317624 # ok 1900 # SKIP SVE set FPSIMD get SVE for VL 7584
3628 22:22:43.317726 # ok 1901 Set SVE VL 7600
3629 22:22:43.317817 # ok 1902 # SKIP SVE set SVE get SVE for VL 7600
3630 22:22:43.317910 # ok 1903 # SKIP SVE set SVE get FPSIMD for VL 7600
3631 22:22:43.317982 # ok 1904 # SKIP SVE set FPSIMD get SVE for VL 7600
3632 22:22:43.318064 # ok 1905 Set SVE VL 7616
3633 22:22:43.318157 # ok 1906 # SKIP SVE set SVE get SVE for VL 7616
3634 22:22:43.318252 # ok 1907 # SKIP SVE set SVE get FPSIMD for VL 7616
3635 22:22:43.318343 # ok 1908 # SKIP SVE set FPSIMD get SVE for VL 7616
3636 22:22:43.318431 # ok 1909 Set SVE VL 7632
3637 22:22:43.318719 # ok 1910 # SKIP SVE set SVE get SVE for VL 7632
3638 22:22:43.318819 # ok 1911 # SKIP SVE set SVE get FPSIMD for VL 7632
3639 22:22:43.318922 # ok 1912 # SKIP SVE set FPSIMD get SVE for VL 7632
3640 22:22:43.319009 # ok 1913 Set SVE VL 7648
3641 22:22:43.319103 # ok 1914 # SKIP SVE set SVE get SVE for VL 7648
3642 22:22:43.319185 # ok 1915 # SKIP SVE set SVE get FPSIMD for VL 7648
3643 22:22:43.319261 # ok 1916 # SKIP SVE set FPSIMD get SVE for VL 7648
3644 22:22:43.319338 # ok 1917 Set SVE VL 7664
3645 22:22:43.319598 # ok 1918 # SKIP SVE set SVE get SVE for VL 7664
3646 22:22:43.319699 # ok 1919 # SKIP SVE set SVE get FPSIMD for VL 7664
3647 22:22:43.319799 # ok 1920 # SKIP SVE set FPSIMD get SVE for VL 7664
3648 22:22:43.319879 # ok 1921 Set SVE VL 7680
3649 22:22:43.319971 # ok 1922 # SKIP SVE set SVE get SVE for VL 7680
3650 22:22:43.320065 # ok 1923 # SKIP SVE set SVE get FPSIMD for VL 7680
3651 22:22:43.320170 # ok 1924 # SKIP SVE set FPSIMD get SVE for VL 7680
3652 22:22:43.320278 # ok 1925 Set SVE VL 7696
3653 22:22:43.320364 # ok 1926 # SKIP SVE set SVE get SVE for VL 7696
3654 22:22:43.320484 # ok 1927 # SKIP SVE set SVE get FPSIMD for VL 7696
3655 22:22:43.320596 # ok 1928 # SKIP SVE set FPSIMD get SVE for VL 7696
3656 22:22:43.320708 # ok 1929 Set SVE VL 7712
3657 22:22:43.320813 # ok 1930 # SKIP SVE set SVE get SVE for VL 7712
3658 22:22:43.321089 # ok 1931 # SKIP SVE set SVE get FPSIMD for VL 7712
3659 22:22:43.321183 # ok 1932 # SKIP SVE set FPSIMD get SVE for VL 7712
3660 22:22:43.321273 # ok 1933 Set SVE VL 7728
3661 22:22:43.321541 # ok 1934 # SKIP SVE set SVE get SVE for VL 7728
3662 22:22:43.321637 # ok 1935 # SKIP SVE set SVE get FPSIMD for VL 7728
3663 22:22:43.321770 # ok 1936 # SKIP SVE set FPSIMD get SVE for VL 7728
3664 22:22:43.321888 # ok 1937 Set SVE VL 7744
3665 22:22:43.321981 # ok 1938 # SKIP SVE set SVE get SVE for VL 7744
3666 22:22:43.322069 # ok 1939 # SKIP SVE set SVE get FPSIMD for VL 7744
3667 22:22:43.322161 # ok 1940 # SKIP SVE set FPSIMD get SVE for VL 7744
3668 22:22:43.322268 # ok 1941 Set SVE VL 7760
3669 22:22:43.322357 # ok 1942 # SKIP SVE set SVE get SVE for VL 7760
3670 22:22:43.322660 # ok 1943 # SKIP SVE set SVE get FPSIMD for VL 7760
3671 22:22:43.322787 # ok 1944 # SKIP SVE set FPSIMD get SVE for VL 7760
3672 22:22:43.322868 # ok 1945 Set SVE VL 7776
3673 22:22:43.322934 # ok 1946 # SKIP SVE set SVE get SVE for VL 7776
3674 22:22:43.323006 # ok 1947 # SKIP SVE set SVE get FPSIMD for VL 7776
3675 22:22:43.323089 # ok 1948 # SKIP SVE set FPSIMD get SVE for VL 7776
3676 22:22:43.323167 # ok 1949 Set SVE VL 7792
3677 22:22:43.323247 # ok 1950 # SKIP SVE set SVE get SVE for VL 7792
3678 22:22:43.323340 # ok 1951 # SKIP SVE set SVE get FPSIMD for VL 7792
3679 22:22:43.323417 # ok 1952 # SKIP SVE set FPSIMD get SVE for VL 7792
3680 22:22:43.323496 # ok 1953 Set SVE VL 7808
3681 22:22:43.323592 # ok 1954 # SKIP SVE set SVE get SVE for VL 7808
3682 22:22:43.323688 # ok 1955 # SKIP SVE set SVE get FPSIMD for VL 7808
3683 22:22:43.327643 # ok 1956 # SKIP SVE set FPSIMD get SVE for VL 7808
3684 22:22:43.327849 # ok 1957 Set SVE VL 7824
3685 22:22:43.327946 # ok 1958 # SKIP SVE set SVE get SVE for VL 7824
3686 22:22:43.328035 # ok 1959 # SKIP SVE set SVE get FPSIMD for VL 7824
3687 22:22:43.328156 # ok 1960 # SKIP SVE set FPSIMD get SVE for VL 7824
3688 22:22:43.328248 # ok 1961 Set SVE VL 7840
3689 22:22:43.328336 # ok 1962 # SKIP SVE set SVE get SVE for VL 7840
3690 22:22:43.328422 # ok 1963 # SKIP SVE set SVE get FPSIMD for VL 7840
3691 22:22:43.328506 # ok 1964 # SKIP SVE set FPSIMD get SVE for VL 7840
3692 22:22:43.328590 # ok 1965 Set SVE VL 7856
3693 22:22:43.328691 # ok 1966 # SKIP SVE set SVE get SVE for VL 7856
3694 22:22:43.328839 # ok 1967 # SKIP SVE set SVE get FPSIMD for VL 7856
3695 22:22:43.328912 # ok 1968 # SKIP SVE set FPSIMD get SVE for VL 7856
3696 22:22:43.328979 # ok 1969 Set SVE VL 7872
3697 22:22:43.329075 # ok 1970 # SKIP SVE set SVE get SVE for VL 7872
3698 22:22:43.329460 # ok 1971 # SKIP SVE set SVE get FPSIMD for VL 7872
3699 22:22:43.329812 # ok 1972 # SKIP SVE set FPSIMD get SVE for VL 7872
3700 22:22:43.329963 # ok 1973 Set SVE VL 7888
3701 22:22:43.330060 # ok 1974 # SKIP SVE set SVE get SVE for VL 7888
3702 22:22:43.330169 # ok 1975 # SKIP SVE set SVE get FPSIMD for VL 7888
3703 22:22:43.330260 # ok 1976 # SKIP SVE set FPSIMD get SVE for VL 7888
3704 22:22:43.330349 # ok 1977 Set SVE VL 7904
3705 22:22:43.330438 # ok 1978 # SKIP SVE set SVE get SVE for VL 7904
3706 22:22:43.330542 # ok 1979 # SKIP SVE set SVE get FPSIMD for VL 7904
3707 22:22:43.330631 # ok 1980 # SKIP SVE set FPSIMD get SVE for VL 7904
3708 22:22:43.330719 # ok 1981 Set SVE VL 7920
3709 22:22:43.330811 # ok 1982 # SKIP SVE set SVE get SVE for VL 7920
3710 22:22:43.330883 # ok 1983 # SKIP SVE set SVE get FPSIMD for VL 7920
3711 22:22:43.333804 # ok 1984 # SKIP SVE set FPSIMD get SVE for VL 7920
3712 22:22:43.333965 # ok 1985 Set SVE VL 7936
3713 22:22:43.334059 # ok 1986 # SKIP SVE set SVE get SVE for VL 7936
3714 22:22:43.334154 # ok 1987 # SKIP SVE set SVE get FPSIMD for VL 7936
3715 22:22:43.334243 # ok 1988 # SKIP SVE set FPSIMD get SVE for VL 7936
3716 22:22:43.334328 # ok 1989 Set SVE VL 7952
3717 22:22:43.334413 # ok 1990 # SKIP SVE set SVE get SVE for VL 7952
3718 22:22:43.334494 # ok 1991 # SKIP SVE set SVE get FPSIMD for VL 7952
3719 22:22:43.334580 # ok 1992 # SKIP SVE set FPSIMD get SVE for VL 7952
3720 22:22:43.334665 # ok 1993 Set SVE VL 7968
3721 22:22:43.334750 # ok 1994 # SKIP SVE set SVE get SVE for VL 7968
3722 22:22:43.334851 # ok 1995 # SKIP SVE set SVE get FPSIMD for VL 7968
3723 22:22:43.334944 # ok 1996 # SKIP SVE set FPSIMD get SVE for VL 7968
3724 22:22:43.335047 # ok 1997 Set SVE VL 7984
3725 22:22:43.335149 # ok 1998 # SKIP SVE set SVE get SVE for VL 7984
3726 22:22:43.335243 # ok 1999 # SKIP SVE set SVE get FPSIMD for VL 7984
3727 22:22:43.335339 # ok 2000 # SKIP SVE set FPSIMD get SVE for VL 7984
3728 22:22:43.335437 # ok 2001 Set SVE VL 8000
3729 22:22:43.335528 # ok 2002 # SKIP SVE set SVE get SVE for VL 8000
3730 22:22:43.335595 # ok 2003 # SKIP SVE set SVE get FPSIMD for VL 8000
3731 22:22:43.335654 # ok 2004 # SKIP SVE set FPSIMD get SVE for VL 8000
3732 22:22:43.335712 # ok 2005 Set SVE VL 8016
3733 22:22:43.335788 # ok 2006 # SKIP SVE set SVE get SVE for VL 8016
3734 22:22:43.335880 # ok 2007 # SKIP SVE set SVE get FPSIMD for VL 8016
3735 22:22:43.335966 # ok 2008 # SKIP SVE set FPSIMD get SVE for VL 8016
3736 22:22:43.336055 # ok 2009 Set SVE VL 8032
3737 22:22:43.336148 # ok 2010 # SKIP SVE set SVE get SVE for VL 8032
3738 22:22:43.336242 # ok 2011 # SKIP SVE set SVE get FPSIMD for VL 8032
3739 22:22:43.336337 # ok 2012 # SKIP SVE set FPSIMD get SVE for VL 8032
3740 22:22:43.336433 # ok 2013 Set SVE VL 8048
3741 22:22:43.336758 # ok 2014 # SKIP SVE set SVE get SVE for VL 8048
3742 22:22:43.336839 # ok 2015 # SKIP SVE set SVE get FPSIMD for VL 8048
3743 22:22:43.336902 # ok 2016 # SKIP SVE set FPSIMD get SVE for VL 8048
3744 22:22:43.336963 # ok 2017 Set SVE VL 8064
3745 22:22:43.337021 # ok 2018 # SKIP SVE set SVE get SVE for VL 8064
3746 22:22:43.337080 # ok 2019 # SKIP SVE set SVE get FPSIMD for VL 8064
3747 22:22:43.337139 # ok 2020 # SKIP SVE set FPSIMD get SVE for VL 8064
3748 22:22:43.337198 # ok 2021 Set SVE VL 8080
3749 22:22:43.337257 # ok 2022 # SKIP SVE set SVE get SVE for VL 8080
3750 22:22:43.337315 # ok 2023 # SKIP SVE set SVE get FPSIMD for VL 8080
3751 22:22:43.337374 # ok 2024 # SKIP SVE set FPSIMD get SVE for VL 8080
3752 22:22:43.337433 # ok 2025 Set SVE VL 8096
3753 22:22:43.337491 # ok 2026 # SKIP SVE set SVE get SVE for VL 8096
3754 22:22:43.337550 # ok 2027 # SKIP SVE set SVE get FPSIMD for VL 8096
3755 22:22:43.337609 # ok 2028 # SKIP SVE set FPSIMD get SVE for VL 8096
3756 22:22:43.337687 # ok 2029 Set SVE VL 8112
3757 22:22:43.337773 # ok 2030 # SKIP SVE set SVE get SVE for VL 8112
3758 22:22:43.337845 # ok 2031 # SKIP SVE set SVE get FPSIMD for VL 8112
3759 22:22:43.337912 # ok 2032 # SKIP SVE set FPSIMD get SVE for VL 8112
3760 22:22:43.337976 # ok 2033 Set SVE VL 8128
3761 22:22:43.338035 # ok 2034 # SKIP SVE set SVE get SVE for VL 8128
3762 22:22:43.338093 # ok 2035 # SKIP SVE set SVE get FPSIMD for VL 8128
3763 22:22:43.338152 # ok 2036 # SKIP SVE set FPSIMD get SVE for VL 8128
3764 22:22:43.338212 # ok 2037 Set SVE VL 8144
3765 22:22:43.338270 # ok 2038 # SKIP SVE set SVE get SVE for VL 8144
3766 22:22:43.338328 # ok 2039 # SKIP SVE set SVE get FPSIMD for VL 8144
3767 22:22:43.338401 # ok 2040 # SKIP SVE set FPSIMD get SVE for VL 8144
3768 22:22:43.338464 # ok 2041 Set SVE VL 8160
3769 22:22:43.338523 # ok 2042 # SKIP SVE set SVE get SVE for VL 8160
3770 22:22:43.338582 # ok 2043 # SKIP SVE set SVE get FPSIMD for VL 8160
3771 22:22:43.338641 # ok 2044 # SKIP SVE set FPSIMD get SVE for VL 8160
3772 22:22:43.338700 # ok 2045 Set SVE VL 8176
3773 22:22:43.338758 # ok 2046 # SKIP SVE set SVE get SVE for VL 8176
3774 22:22:43.338817 # ok 2047 # SKIP SVE set SVE get FPSIMD for VL 8176
3775 22:22:43.338887 # ok 2048 # SKIP SVE set FPSIMD get SVE for VL 8176
3776 22:22:43.338949 # ok 2049 Set SVE VL 8192
3777 22:22:43.339010 # ok 2050 # SKIP SVE set SVE get SVE for VL 8192
3778 22:22:43.339069 # ok 2051 # SKIP SVE set SVE get FPSIMD for VL 8192
3779 22:22:43.339127 # ok 2052 # SKIP SVE set FPSIMD get SVE for VL 8192
3780 22:22:43.339198 # ok 2053 Streaming SVE FPSIMD set via SVE: 0
3781 22:22:43.339259 # ok 2054 Streaming SVE get_fpsimd() gave same state
3782 22:22:43.339319 # ok 2055 Streaming SVE SVE_PT_VL_INHERIT set
3783 22:22:43.339387 # ok 2056 Streaming SVE SVE_PT_VL_INHERIT cleared
3784 22:22:43.339647 # ok 2057 Set Streaming SVE VL 16
3785 22:22:43.339729 # ok 2058 Set and get Streaming SVE data for VL 16
3786 22:22:43.339840 # ok 2059 Set and get FPSIMD data for Streaming SVE VL 16
3787 22:22:43.340190 # ok 2060 Set FPSIMD, read via SVE for Streaming SVE VL 16
3788 22:22:43.340351 # ok 2061 Set Streaming SVE VL 32
3789 22:22:43.340481 # ok 2062 Set and get Streaming SVE data for VL 32
3790 22:22:43.340626 # ok 2063 Set and get FPSIMD data for Streaming SVE VL 32
3791 22:22:43.340751 # ok 2064 Set FPSIMD, read via SVE for Streaming SVE VL 32
3792 22:22:43.340874 # ok 2065 Set Streaming SVE VL 48
3793 22:22:43.340996 # ok 2066 # SKIP Streaming SVE set SVE get SVE for VL 48
3794 22:22:43.341339 # ok 2067 # SKIP Streaming SVE set SVE get FPSIMD for VL 48
3795 22:22:43.341476 # ok 2068 # SKIP Streaming SVE set FPSIMD get SVE for VL 48
3796 22:22:43.341619 # ok 2069 Set Streaming SVE VL 64
3797 22:22:43.341753 # ok 2070 Set and get Streaming SVE data for VL 64
3798 22:22:43.341893 # ok 2071 Set and get FPSIMD data for Streaming SVE VL 64
3799 22:22:43.342003 # ok 2072 Set FPSIMD, read via SVE for Streaming SVE VL 64
3800 22:22:43.342095 # ok 2073 Set Streaming SVE VL 80
3801 22:22:43.342181 # ok 2074 # SKIP Streaming SVE set SVE get SVE for VL 80
3802 22:22:43.342467 # ok 2075 # SKIP Streaming SVE set SVE get FPSIMD for VL 80
3803 22:22:43.342554 # ok 2076 # SKIP Streaming SVE set FPSIMD get SVE for VL 80
3804 22:22:43.342633 # ok 2077 Set Streaming SVE VL 96
3805 22:22:43.342727 # ok 2078 # SKIP Streaming SVE set SVE get SVE for VL 96
3806 22:22:43.342827 # ok 2079 # SKIP Streaming SVE set SVE get FPSIMD for VL 96
3807 22:22:43.342936 # ok 2080 # SKIP Streaming SVE set FPSIMD get SVE for VL 96
3808 22:22:43.343226 # ok 2081 Set Streaming SVE VL 112
3809 22:22:43.343325 # ok 2082 # SKIP Streaming SVE set SVE get SVE for VL 112
3810 22:22:43.343614 # ok 2083 # SKIP Streaming SVE set SVE get FPSIMD for VL 112
3811 22:22:43.343726 # ok 2084 # SKIP Streaming SVE set FPSIMD get SVE for VL 112
3812 22:22:43.343816 # ok 2085 Set Streaming SVE VL 128
3813 22:22:43.343920 # ok 2086 Set and get Streaming SVE data for VL 128
3814 22:22:43.344028 # ok 2087 Set and get FPSIMD data for Streaming SVE VL 128
3815 22:22:43.344325 # ok 2088 Set FPSIMD, read via SVE for Streaming SVE VL 128
3816 22:22:43.344422 # ok 2089 Set Streaming SVE VL 144
3817 22:22:43.344527 # ok 2090 # SKIP Streaming SVE set SVE get SVE for VL 144
3818 22:22:43.344619 # ok 2091 # SKIP Streaming SVE set SVE get FPSIMD for VL 144
3819 22:22:43.344723 # ok 2092 # SKIP Streaming SVE set FPSIMD get SVE for VL 144
3820 22:22:43.344828 # ok 2093 Set Streaming SVE VL 160
3821 22:22:43.345121 # ok 2094 # SKIP Streaming SVE set SVE get SVE for VL 160
3822 22:22:43.345232 # ok 2095 # SKIP Streaming SVE set SVE get FPSIMD for VL 160
3823 22:22:43.345358 # ok 2096 # SKIP Streaming SVE set FPSIMD get SVE for VL 160
3824 22:22:43.345459 # ok 2097 Set Streaming SVE VL 176
3825 22:22:43.345559 # ok 2098 # SKIP Streaming SVE set SVE get SVE for VL 176
3826 22:22:43.345877 # ok 2099 # SKIP Streaming SVE set SVE get FPSIMD for VL 176
3827 22:22:43.345993 # ok 2100 # SKIP Streaming SVE set FPSIMD get SVE for VL 176
3828 22:22:43.346100 # ok 2101 Set Streaming SVE VL 192
3829 22:22:43.346191 # ok 2102 # SKIP Streaming SVE set SVE get SVE for VL 192
3830 22:22:43.346295 # ok 2103 # SKIP Streaming SVE set SVE get FPSIMD for VL 192
3831 22:22:43.346402 # ok 2104 # SKIP Streaming SVE set FPSIMD get SVE for VL 192
3832 22:22:43.346511 # ok 2105 Set Streaming SVE VL 208
3833 22:22:43.346803 # ok 2106 # SKIP Streaming SVE set SVE get SVE for VL 208
3834 22:22:43.346914 # ok 2107 # SKIP Streaming SVE set SVE get FPSIMD for VL 208
3835 22:22:43.347196 # ok 2108 # SKIP Streaming SVE set FPSIMD get SVE for VL 208
3836 22:22:43.347291 # ok 2109 Set Streaming SVE VL 224
3837 22:22:43.347378 # ok 2110 # SKIP Streaming SVE set SVE get SVE for VL 224
3838 22:22:43.347484 # ok 2111 # SKIP Streaming SVE set SVE get FPSIMD for VL 224
3839 22:22:43.347576 # ok 2112 # SKIP Streaming SVE set FPSIMD get SVE for VL 224
3840 22:22:43.347680 # ok 2113 Set Streaming SVE VL 240
3841 22:22:43.347784 # ok 2114 # SKIP Streaming SVE set SVE get SVE for VL 240
3842 22:22:43.347888 # ok 2115 # SKIP Streaming SVE set SVE get FPSIMD for VL 240
3843 22:22:43.348206 # ok 2116 # SKIP Streaming SVE set FPSIMD get SVE for VL 240
3844 22:22:43.348660 # ok 2117 Set Streaming SVE VL 256
3845 22:22:43.348733 # ok 2118 Set and get Streaming SVE data for VL 256
3846 22:22:43.348808 # ok 2119 Set and get FPSIMD data for Streaming SVE VL 256
3847 22:22:43.348869 # ok 2120 Set FPSIMD, read via SVE for Streaming SVE VL 256
3848 22:22:43.348929 # ok 2121 Set Streaming SVE VL 272
3849 22:22:43.348986 # ok 2122 # SKIP Streaming SVE set SVE get SVE for VL 272
3850 22:22:43.349055 # ok 2123 # SKIP Streaming SVE set SVE get FPSIMD for VL 272
3851 22:22:43.349133 # ok 2124 # SKIP Streaming SVE set FPSIMD get SVE for VL 272
3852 22:22:43.349381 # ok 2125 Set Streaming SVE VL 288
3853 22:22:43.351617 # ok 2126 # SKIP Streaming SVE set SVE get SVE for VL 288
3854 22:22:43.351751 # ok 2127 # SKIP Streaming SVE set SVE get FPSIMD for VL 288
3855 22:22:43.351858 # ok 2128 # SKIP Streaming SVE set FPSIMD get SVE for VL 288
3856 22:22:43.351954 # ok 2129 Set Streaming SVE VL 304
3857 22:22:43.352047 # ok 2130 # SKIP Streaming SVE set SVE get SVE for VL 304
3858 22:22:43.352330 # ok 2131 # SKIP Streaming SVE set SVE get FPSIMD for VL 304
3859 22:22:43.352440 # ok 2132 # SKIP Streaming SVE set FPSIMD get SVE for VL 304
3860 22:22:43.352547 # ok 2133 Set Streaming SVE VL 320
3861 22:22:43.352654 # ok 2134 # SKIP Streaming SVE set SVE get SVE for VL 320
3862 22:22:43.353372 # ok 2135 # SKIP Streaming SVE set SVE get FPSIMD for VL 320
3863 22:22:43.353663 # ok 2136 # SKIP Streaming SVE set FPSIMD get SVE for VL 320
3864 22:22:43.353750 # ok 2137 Set Streaming SVE VL 336
3865 22:22:43.353841 # ok 2138 # SKIP Streaming SVE set SVE get SVE for VL 336
3866 22:22:43.353934 # ok 2139 # SKIP Streaming SVE set SVE get FPSIMD for VL 336
3867 22:22:43.354212 # ok 2140 # SKIP Streaming SVE set FPSIMD get SVE for VL 336
3868 22:22:43.354298 # ok 2141 Set Streaming SVE VL 352
3869 22:22:43.354390 # ok 2142 # SKIP Streaming SVE set SVE get SVE for VL 352
3870 22:22:43.354483 # ok 2143 # SKIP Streaming SVE set SVE get FPSIMD for VL 352
3871 22:22:43.354765 # ok 2144 # SKIP Streaming SVE set FPSIMD get SVE for VL 352
3872 22:22:43.354864 # ok 2145 Set Streaming SVE VL 368
3873 22:22:43.354946 # ok 2146 # SKIP Streaming SVE set SVE get SVE for VL 368
3874 22:22:43.355039 # ok 2147 # SKIP Streaming SVE set SVE get FPSIMD for VL 368
3875 22:22:43.355313 # ok 2148 # SKIP Streaming SVE set FPSIMD get SVE for VL 368
3876 22:22:43.355395 # ok 2149 Set Streaming SVE VL 384
3877 22:22:43.355488 # ok 2150 # SKIP Streaming SVE set SVE get SVE for VL 384
3878 22:22:43.355768 # ok 2151 # SKIP Streaming SVE set SVE get FPSIMD for VL 384
3879 22:22:43.355854 # ok 2152 # SKIP Streaming SVE set FPSIMD get SVE for VL 384
3880 22:22:43.355946 # ok 2153 Set Streaming SVE VL 400
3881 22:22:43.356213 # ok 2154 # SKIP Streaming SVE set SVE get SVE for VL 400
3882 22:22:43.356297 # ok 2155 # SKIP Streaming SVE set SVE get FPSIMD for VL 400
3883 22:22:43.356389 # ok 2156 # SKIP Streaming SVE set FPSIMD get SVE for VL 400
3884 22:22:43.356473 # ok 2157 Set Streaming SVE VL 416
3885 22:22:43.356567 # ok 2158 # SKIP Streaming SVE set SVE get SVE for VL 416
3886 22:22:43.356844 # ok 2159 # SKIP Streaming SVE set SVE get FPSIMD for VL 416
3887 22:22:43.356937 # ok 2160 # SKIP Streaming SVE set FPSIMD get SVE for VL 416
3888 22:22:43.357027 # ok 2161 Set Streaming SVE VL 432
3889 22:22:43.357304 # ok 2162 # SKIP Streaming SVE set SVE get SVE for VL 432
3890 22:22:43.357575 # ok 2163 # SKIP Streaming SVE set SVE get FPSIMD for VL 432
3891 22:22:43.357684 # ok 2164 # SKIP Streaming SVE set FPSIMD get SVE for VL 432
3892 22:22:43.357773 # ok 2165 Set Streaming SVE VL 448
3893 22:22:43.357862 # ok 2166 # SKIP Streaming SVE set SVE get SVE for VL 448
3894 22:22:43.357952 # ok 2167 # SKIP Streaming SVE set SVE get FPSIMD for VL 448
3895 22:22:43.358229 # ok 2168 # SKIP Streaming SVE set FPSIMD get SVE for VL 448
3896 22:22:43.358322 # ok 2169 Set Streaming SVE VL 464
3897 22:22:43.358410 # ok 2170 # SKIP Streaming SVE set SVE get SVE for VL 464
3898 22:22:43.358687 # ok 2171 # SKIP Streaming SVE set SVE get FPSIMD for VL 464
3899 22:22:43.358801 # ok 2172 # SKIP Streaming SVE set FPSIMD get SVE for VL 464
3900 22:22:43.358898 # ok 2173 Set Streaming SVE VL 480
3901 22:22:43.359169 # ok 2174 # SKIP Streaming SVE set SVE get SVE for VL 480
3902 22:22:43.359259 # ok 2175 # SKIP Streaming SVE set SVE get FPSIMD for VL 480
3903 22:22:43.359529 # ok 2176 # SKIP Streaming SVE set FPSIMD get SVE for VL 480
3904 22:22:43.359626 # ok 2177 Set Streaming SVE VL 496
3905 22:22:43.359904 # ok 2178 # SKIP Streaming SVE set SVE get SVE for VL 496
3906 22:22:43.360006 # ok 2179 # SKIP Streaming SVE set SVE get FPSIMD for VL 496
3907 22:22:43.360108 # ok 2180 # SKIP Streaming SVE set FPSIMD get SVE for VL 496
3908 22:22:43.360200 # ok 2181 Set Streaming SVE VL 512
3909 22:22:43.360481 # ok 2182 # SKIP Streaming SVE set SVE get SVE for VL 512
3910 22:22:43.360576 # ok 2183 # SKIP Streaming SVE set SVE get FPSIMD for VL 512
3911 22:22:43.360848 # ok 2184 # SKIP Streaming SVE set FPSIMD get SVE for VL 512
3912 22:22:43.360944 # ok 2185 Set Streaming SVE VL 528
3913 22:22:43.361261 # ok 2186 # SKIP Streaming SVE set SVE get SVE for VL 528
3914 22:22:43.361386 # ok 2187 # SKIP Streaming SVE set SVE get FPSIMD for VL 528
3915 22:22:43.361490 # ok 2188 # SKIP Streaming SVE set FPSIMD get SVE for VL 528
3916 22:22:43.361589 # ok 2189 Set Streaming SVE VL 544
3917 22:22:43.361698 # ok 2190 # SKIP Streaming SVE set SVE get SVE for VL 544
3918 22:22:43.362009 # ok 2191 # SKIP Streaming SVE set SVE get FPSIMD for VL 544
3919 22:22:43.362125 # ok 2192 # SKIP Streaming SVE set FPSIMD get SVE for VL 544
3920 22:22:43.362212 # ok 2193 Set Streaming SVE VL 560
3921 22:22:43.362310 # ok 2194 # SKIP Streaming SVE set SVE get SVE for VL 560
3922 22:22:43.362594 # ok 2195 # SKIP Streaming SVE set SVE get FPSIMD for VL 560
3923 22:22:43.362684 # ok 2196 # SKIP Streaming SVE set FPSIMD get SVE for VL 560
3924 22:22:43.362781 # ok 2197 Set Streaming SVE VL 576
3925 22:22:43.362879 # ok 2198 # SKIP Streaming SVE set SVE get SVE for VL 576
3926 22:22:43.362977 # ok 2199 # SKIP Streaming SVE set SVE get FPSIMD for VL 576
3927 22:22:43.363264 # ok 2200 # SKIP Streaming SVE set FPSIMD get SVE for VL 576
3928 22:22:43.363354 # ok 2201 Set Streaming SVE VL 592
3929 22:22:43.363451 # ok 2202 # SKIP Streaming SVE set SVE get SVE for VL 592
3930 22:22:43.363732 # ok 2203 # SKIP Streaming SVE set SVE get FPSIMD for VL 592
3931 22:22:43.363834 # ok 2204 # SKIP Streaming SVE set FPSIMD get SVE for VL 592
3932 22:22:43.363936 # ok 2205 Set Streaming SVE VL 608
3933 22:22:43.364052 # ok 2206 # SKIP Streaming SVE set SVE get SVE for VL 608
3934 22:22:43.364337 # ok 2207 # SKIP Streaming SVE set SVE get FPSIMD for VL 608
3935 22:22:43.364426 # ok 2208 # SKIP Streaming SVE set FPSIMD get SVE for VL 608
3936 22:22:43.364524 # ok 2209 Set Streaming SVE VL 624
3937 22:22:43.364621 # ok 2210 # SKIP Streaming SVE set SVE get SVE for VL 624
3938 22:22:43.364904 # ok 2211 # SKIP Streaming SVE set SVE get FPSIMD for VL 624
3939 22:22:43.365006 # ok 2212 # SKIP Streaming SVE set FPSIMD get SVE for VL 624
3940 22:22:43.365121 # ok 2213 Set Streaming SVE VL 640
3941 22:22:43.365405 # ok 2214 # SKIP Streaming SVE set SVE get SVE for VL 640
3942 22:22:43.365494 # ok 2215 # SKIP Streaming SVE set SVE get FPSIMD for VL 640
3943 22:22:43.365592 # ok 2216 # SKIP Streaming SVE set FPSIMD get SVE for VL 640
3944 22:22:43.365701 # ok 2217 Set Streaming SVE VL 656
3945 22:22:43.366005 # ok 2218 # SKIP Streaming SVE set SVE get SVE for VL 656
3946 22:22:43.366126 # ok 2219 # SKIP Streaming SVE set SVE get FPSIMD for VL 656
3947 22:22:43.366399 # ok 2220 # SKIP Streaming SVE set FPSIMD get SVE for VL 656
3948 22:22:43.366504 # ok 2221 Set Streaming SVE VL 672
3949 22:22:43.366588 # ok 2222 # SKIP Streaming SVE set SVE get SVE for VL 672
3950 22:22:43.366685 # ok 2223 # SKIP Streaming SVE set SVE get FPSIMD for VL 672
3951 22:22:43.366784 # ok 2224 # SKIP Streaming SVE set FPSIMD get SVE for VL 672
3952 22:22:43.366883 # ok 2225 Set Streaming SVE VL 688
3953 22:22:43.366967 # ok 2226 # SKIP Streaming SVE set SVE get SVE for VL 688
3954 22:22:43.367065 # ok 2227 # SKIP Streaming SVE set SVE get FPSIMD for VL 688
3955 22:22:43.367162 # ok 2228 # SKIP Streaming SVE set FPSIMD get SVE for VL 688
3956 22:22:43.367260 # ok 2229 Set Streaming SVE VL 704
3957 22:22:43.367572 # ok 2230 # SKIP Streaming SVE set SVE get SVE for VL 704
3958 22:22:43.367692 # ok 2231 # SKIP Streaming SVE set SVE get FPSIMD for VL 704
3959 22:22:43.367779 # ok 2232 # SKIP Streaming SVE set FPSIMD get SVE for VL 704
3960 22:22:43.367877 # ok 2233 Set Streaming SVE VL 720
3961 22:22:43.367975 # ok 2234 # SKIP Streaming SVE set SVE get SVE for VL 720
3962 22:22:43.368320 # ok 2235 # SKIP Streaming SVE set SVE get FPSIMD for VL 720
3963 22:22:43.368424 # ok 2236 # SKIP Streaming SVE set FPSIMD get SVE for VL 720
3964 22:22:43.368510 # ok 2237 Set Streaming SVE VL 736
3965 22:22:43.368608 # ok 2238 # SKIP Streaming SVE set SVE get SVE for VL 736
3966 22:22:43.368698 # ok 2239 # SKIP Streaming SVE set SVE get FPSIMD for VL 736
3967 22:22:43.368987 # ok 2240 # SKIP Streaming SVE set FPSIMD get SVE for VL 736
3968 22:22:43.369103 # ok 2241 Set Streaming SVE VL 752
3969 22:22:43.369191 # ok 2242 # SKIP Streaming SVE set SVE get SVE for VL 752
3970 22:22:43.369486 # ok 2243 # SKIP Streaming SVE set SVE get FPSIMD for VL 752
3971 22:22:43.369594 # ok 2244 # SKIP Streaming SVE set FPSIMD get SVE for VL 752
3972 22:22:43.369691 # ok 2245 Set Streaming SVE VL 768
3973 22:22:43.369789 # ok 2246 # SKIP Streaming SVE set SVE get SVE for VL 768
3974 22:22:43.370087 # ok 2247 # SKIP Streaming SVE set SVE get FPSIMD for VL 768
3975 22:22:43.370242 # ok 2248 # SKIP Streaming SVE set FPSIMD get SVE for VL 768
3976 22:22:43.370394 # ok 2249 Set Streaming SVE VL 784
3977 22:22:43.370517 # ok 2250 # SKIP Streaming SVE set SVE get SVE for VL 784
3978 22:22:43.370604 # ok 2251 # SKIP Streaming SVE set SVE get FPSIMD for VL 784
3979 22:22:43.370689 # ok 2252 # SKIP Streaming SVE set FPSIMD get SVE for VL 784
3980 22:22:43.370787 # ok 2253 Set Streaming SVE VL 800
3981 22:22:43.370872 # ok 2254 # SKIP Streaming SVE set SVE get SVE for VL 800
3982 22:22:43.370970 # ok 2255 # SKIP Streaming SVE set SVE get FPSIMD for VL 800
3983 22:22:43.371069 # ok 2256 # SKIP Streaming SVE set FPSIMD get SVE for VL 800
3984 22:22:43.371168 # ok 2257 Set Streaming SVE VL 816
3985 22:22:43.371500 # ok 2258 # SKIP Streaming SVE set SVE get SVE for VL 816
3986 22:22:43.371604 # ok 2259 # SKIP Streaming SVE set SVE get FPSIMD for VL 816
3987 22:22:43.371900 # ok 2260 # SKIP Streaming SVE set FPSIMD get SVE for VL 816
3988 22:22:43.372007 # ok 2261 Set Streaming SVE VL 832
3989 22:22:43.372111 # ok 2262 # SKIP Streaming SVE set SVE get SVE for VL 832
3990 22:22:43.372209 # ok 2263 # SKIP Streaming SVE set SVE get FPSIMD for VL 832
3991 22:22:43.372308 # ok 2264 # SKIP Streaming SVE set FPSIMD get SVE for VL 832
3992 22:22:43.372586 # ok 2265 Set Streaming SVE VL 848
3993 22:22:43.372723 # ok 2266 # SKIP Streaming SVE set SVE get SVE for VL 848
3994 22:22:43.373018 # ok 2267 # SKIP Streaming SVE set SVE get FPSIMD for VL 848
3995 22:22:43.373158 # ok 2268 # SKIP Streaming SVE set FPSIMD get SVE for VL 848
3996 22:22:43.373259 # ok 2269 Set Streaming SVE VL 864
3997 22:22:43.373544 # ok 2270 # SKIP Streaming SVE set SVE get SVE for VL 864
3998 22:22:43.373641 # ok 2271 # SKIP Streaming SVE set SVE get FPSIMD for VL 864
3999 22:22:43.373738 # ok 2272 # SKIP Streaming SVE set FPSIMD get SVE for VL 864
4000 22:22:43.373829 # ok 2273 Set Streaming SVE VL 880
4001 22:22:43.373908 # ok 2274 # SKIP Streaming SVE set SVE get SVE for VL 880
4002 22:22:43.373998 # ok 2275 # SKIP Streaming SVE set SVE get FPSIMD for VL 880
4003 22:22:43.374089 # ok 2276 # SKIP Streaming SVE set FPSIMD get SVE for VL 880
4004 22:22:43.374186 # ok 2277 Set Streaming SVE VL 896
4005 22:22:43.374275 # ok 2278 # SKIP Streaming SVE set SVE get SVE for VL 896
4006 22:22:43.376721 # ok 2279 # SKIP Streaming SVE set SVE get FPSIMD for VL 896
4007 22:22:43.376939 # ok 2280 # SKIP Streaming SVE set FPSIMD get SVE for VL 896
4008 22:22:43.377031 # ok 2281 Set Streaming SVE VL 912
4009 22:22:43.377685 # ok 2282 # SKIP Streaming SVE set SVE get SVE for VL 912
4010 22:22:43.377783 # ok 2283 # SKIP Streaming SVE set SVE get FPSIMD for VL 912
4011 22:22:43.377875 # ok 2284 # SKIP Streaming SVE set FPSIMD get SVE for VL 912
4012 22:22:43.377954 # ok 2285 Set Streaming SVE VL 928
4013 22:22:43.378219 # ok 2286 # SKIP Streaming SVE set SVE get SVE for VL 928
4014 22:22:43.378305 # ok 2287 # SKIP Streaming SVE set SVE get FPSIMD for VL 928
4015 22:22:43.378396 # ok 2288 # SKIP Streaming SVE set FPSIMD get SVE for VL 928
4016 22:22:43.379058 # ok 2289 Set Streaming SVE VL 944
4017 22:22:43.379150 # ok 2290 # SKIP Streaming SVE set SVE get SVE for VL 944
4018 22:22:43.379227 # ok 2291 # SKIP Streaming SVE set SVE get FPSIMD for VL 944
4019 22:22:43.379302 # ok 2292 # SKIP Streaming SVE set FPSIMD get SVE for VL 944
4020 22:22:43.379378 # ok 2293 Set Streaming SVE VL 960
4021 22:22:43.379452 # ok 2294 # SKIP Streaming SVE set SVE get SVE for VL 960
4022 22:22:43.379716 # ok 2295 # SKIP Streaming SVE set SVE get FPSIMD for VL 960
4023 22:22:43.379798 # ok 2296 # SKIP Streaming SVE set FPSIMD get SVE for VL 960
4024 22:22:43.379875 # ok 2297 Set Streaming SVE VL 976
4025 22:22:43.379948 # ok 2298 # SKIP Streaming SVE set SVE get SVE for VL 976
4026 22:22:43.380025 # ok 2299 # SKIP Streaming SVE set SVE get FPSIMD for VL 976
4027 22:22:43.380118 # ok 2300 # SKIP Streaming SVE set FPSIMD get SVE for VL 976
4028 22:22:43.380199 # ok 2301 Set Streaming SVE VL 992
4029 22:22:43.380275 # ok 2302 # SKIP Streaming SVE set SVE get SVE for VL 992
4030 22:22:43.380350 # ok 2303 # SKIP Streaming SVE set SVE get FPSIMD for VL 992
4031 22:22:43.380438 # ok 2304 # SKIP Streaming SVE set FPSIMD get SVE for VL 992
4032 22:22:43.380783 # ok 2305 Set Streaming SVE VL 1008
4033 22:22:43.380867 # ok 2306 # SKIP Streaming SVE set SVE get SVE for VL 1008
4034 22:22:43.380943 # ok 2307 # SKIP Streaming SVE set SVE get FPSIMD for VL 1008
4035 22:22:43.381201 # ok 2308 # SKIP Streaming SVE set FPSIMD get SVE for VL 1008
4036 22:22:43.381282 # ok 2309 Set Streaming SVE VL 1024
4037 22:22:43.381370 # ok 2310 # SKIP Streaming SVE set SVE get SVE for VL 1024
4038 22:22:43.381459 # ok 2311 # SKIP Streaming SVE set SVE get FPSIMD for VL 1024
4039 22:22:43.381534 # ok 2312 # SKIP Streaming SVE set FPSIMD get SVE for VL 1024
4040 22:22:43.381864 # ok 2313 Set Streaming SVE VL 1040
4041 22:22:43.382132 # ok 2314 # SKIP Streaming SVE set SVE get SVE for VL 1040
4042 22:22:43.382214 # ok 2315 # SKIP Streaming SVE set SVE get FPSIMD for VL 1040
4043 22:22:43.382290 # ok 2316 # SKIP Streaming SVE set FPSIMD get SVE for VL 1040
4044 22:22:43.382381 # ok 2317 Set Streaming SVE VL 1056
4045 22:22:43.382456 # ok 2318 # SKIP Streaming SVE set SVE get SVE for VL 1056
4046 22:22:43.382538 # ok 2319 # SKIP Streaming SVE set SVE get FPSIMD for VL 1056
4047 22:22:43.382823 # ok 2320 # SKIP Streaming SVE set FPSIMD get SVE for VL 1056
4048 22:22:43.382931 # ok 2321 Set Streaming SVE VL 1072
4049 22:22:43.383017 # ok 2322 # SKIP Streaming SVE set SVE get SVE for VL 1072
4050 22:22:43.383116 # ok 2323 # SKIP Streaming SVE set SVE get FPSIMD for VL 1072
4051 22:22:43.383201 # ok 2324 # SKIP Streaming SVE set FPSIMD get SVE for VL 1072
4052 22:22:43.383300 # ok 2325 Set Streaming SVE VL 1088
4053 22:22:43.383386 # ok 2326 # SKIP Streaming SVE set SVE get SVE for VL 1088
4054 22:22:43.383484 # ok 2327 # SKIP Streaming SVE set SVE get FPSIMD for VL 1088
4055 22:22:43.383908 # ok 2328 # SKIP Streaming SVE set FPSIMD get SVE for VL 1088
4056 22:22:43.384099 # ok 2329 Set Streaming SVE VL 1104
4057 22:22:43.384203 # ok 2330 # SKIP Streaming SVE set SVE get SVE for VL 1104
4058 22:22:43.384306 # ok 2331 # SKIP Streaming SVE set SVE get FPSIMD for VL 1104
4059 22:22:43.384393 # ok 2332 # SKIP Streaming SVE set FPSIMD get SVE for VL 1104
4060 22:22:43.384477 # ok 2333 Set Streaming SVE VL 1120
4061 22:22:43.384576 # ok 2334 # SKIP Streaming SVE set SVE get SVE for VL 1120
4062 22:22:43.384662 # ok 2335 # SKIP Streaming SVE set SVE get FPSIMD for VL 1120
4063 22:22:43.384760 # ok 2336 # SKIP Streaming SVE set FPSIMD get SVE for VL 1120
4064 22:22:43.384845 # ok 2337 Set Streaming SVE VL 1136
4065 22:22:43.385195 # ok 2338 # SKIP Streaming SVE set SVE get SVE for VL 1136
4066 22:22:43.385331 # ok 2339 # SKIP Streaming SVE set SVE get FPSIMD for VL 1136
4067 22:22:43.385441 # ok 2340 # SKIP Streaming SVE set FPSIMD get SVE for VL 1136
4068 22:22:43.385529 # ok 2341 Set Streaming SVE VL 1152
4069 22:22:43.385882 # ok 2342 # SKIP Streaming SVE set SVE get SVE for VL 1152
4070 22:22:43.386049 # ok 2343 # SKIP Streaming SVE set SVE get FPSIMD for VL 1152
4071 22:22:43.386200 # ok 2344 # SKIP Streaming SVE set FPSIMD get SVE for VL 1152
4072 22:22:43.386374 # ok 2345 Set Streaming SVE VL 1168
4073 22:22:43.386480 # ok 2346 # SKIP Streaming SVE set SVE get SVE for VL 1168
4074 22:22:43.386567 # ok 2347 # SKIP Streaming SVE set SVE get FPSIMD for VL 1168
4075 22:22:43.386651 # ok 2348 # SKIP Streaming SVE set FPSIMD get SVE for VL 1168
4076 22:22:43.386734 # ok 2349 Set Streaming SVE VL 1184
4077 22:22:43.386817 # ok 2350 # SKIP Streaming SVE set SVE get SVE for VL 1184
4078 22:22:43.386918 # ok 2351 # SKIP Streaming SVE set SVE get FPSIMD for VL 1184
4079 22:22:43.387004 # ok 2352 # SKIP Streaming SVE set FPSIMD get SVE for VL 1184
4080 22:22:43.387088 # ok 2353 Set Streaming SVE VL 1200
4081 22:22:43.387174 # ok 2354 # SKIP Streaming SVE set SVE get SVE for VL 1200
4082 22:22:43.387273 # ok 2355 # SKIP Streaming SVE set SVE get FPSIMD for VL 1200
4083 22:22:43.387359 # ok 2356 # SKIP Streaming SVE set FPSIMD get SVE for VL 1200
4084 22:22:43.387442 # ok 2357 Set Streaming SVE VL 1216
4085 22:22:43.387538 # ok 2358 # SKIP Streaming SVE set SVE get SVE for VL 1216
4086 22:22:43.387622 # ok 2359 # SKIP Streaming SVE set SVE get FPSIMD for VL 1216
4087 22:22:43.387720 # ok 2360 # SKIP Streaming SVE set FPSIMD get SVE for VL 1216
4088 22:22:43.387805 # ok 2361 Set Streaming SVE VL 1232
4089 22:22:43.387901 # ok 2362 # SKIP Streaming SVE set SVE get SVE for VL 1232
4090 22:22:43.388206 # ok 2363 # SKIP Streaming SVE set SVE get FPSIMD for VL 1232
4091 22:22:43.388310 # ok 2364 # SKIP Streaming SVE set FPSIMD get SVE for VL 1232
4092 22:22:43.388409 # ok 2365 Set Streaming SVE VL 1248
4093 22:22:43.388507 # ok 2366 # SKIP Streaming SVE set SVE get SVE for VL 1248
4094 22:22:43.388605 # ok 2367 # SKIP Streaming SVE set SVE get FPSIMD for VL 1248
4095 22:22:43.388907 # ok 2368 # SKIP Streaming SVE set FPSIMD get SVE for VL 1248
4096 22:22:43.389210 # ok 2369 Set Streaming SVE VL 1264
4097 22:22:43.389324 # ok 2370 # SKIP Streaming SVE set SVE get SVE for VL 1264
4098 22:22:43.389427 # ok 2371 # SKIP Streaming SVE set SVE get FPSIMD for VL 1264
4099 22:22:43.389706 # ok 2372 # SKIP Streaming SVE set FPSIMD get SVE for VL 1264
4100 22:22:43.389879 # ok 2373 Set Streaming SVE VL 1280
4101 22:22:43.390001 # ok 2374 # SKIP Streaming SVE set SVE get SVE for VL 1280
4102 22:22:43.390117 # ok 2375 # SKIP Streaming SVE set SVE get FPSIMD for VL 1280
4103 22:22:43.390217 # ok 2376 # SKIP Streaming SVE set FPSIMD get SVE for VL 1280
4104 22:22:43.390302 # ok 2377 Set Streaming SVE VL 1296
4105 22:22:43.390398 # ok 2378 # SKIP Streaming SVE set SVE get SVE for VL 1296
4106 22:22:43.390693 # ok 2379 # SKIP Streaming SVE set SVE get FPSIMD for VL 1296
4107 22:22:43.390808 # ok 2380 # SKIP Streaming SVE set FPSIMD get SVE for VL 1296
4108 22:22:43.390895 # ok 2381 Set Streaming SVE VL 1312
4109 22:22:43.390991 # ok 2382 # SKIP Streaming SVE set SVE get SVE for VL 1312
4110 22:22:43.391089 # ok 2383 # SKIP Streaming SVE set SVE get FPSIMD for VL 1312
4111 22:22:43.391192 # ok 2384 # SKIP Streaming SVE set FPSIMD get SVE for VL 1312
4112 22:22:43.391514 # ok 2385 Set Streaming SVE VL 1328
4113 22:22:43.391621 # ok 2386 # SKIP Streaming SVE set SVE get SVE for VL 1328
4114 22:22:43.391721 # ok 2387 # SKIP Streaming SVE set SVE get FPSIMD for VL 1328
4115 22:22:43.391807 # ok 2388 # SKIP Streaming SVE set FPSIMD get SVE for VL 1328
4116 22:22:43.391904 # ok 2389 Set Streaming SVE VL 1344
4117 22:22:43.392002 # ok 2390 # SKIP Streaming SVE set SVE get SVE for VL 1344
4118 22:22:43.392102 # ok 2391 # SKIP Streaming SVE set SVE get FPSIMD for VL 1344
4119 22:22:43.392401 # ok 2392 # SKIP Streaming SVE set FPSIMD get SVE for VL 1344
4120 22:22:43.392503 # ok 2393 Set Streaming SVE VL 1360
4121 22:22:43.392602 # ok 2394 # SKIP Streaming SVE set SVE get SVE for VL 1360
4122 22:22:43.392701 # ok 2395 # SKIP Streaming SVE set SVE get FPSIMD for VL 1360
4123 22:22:43.392800 # ok 2396 # SKIP Streaming SVE set FPSIMD get SVE for VL 1360
4124 22:22:43.393088 # ok 2397 Set Streaming SVE VL 1376
4125 22:22:43.393206 # ok 2398 # SKIP Streaming SVE set SVE get SVE for VL 1376
4126 22:22:43.393304 # ok 2399 # SKIP Streaming SVE set SVE get FPSIMD for VL 1376
4127 22:22:43.393396 # ok 2400 # SKIP Streaming SVE set FPSIMD get SVE for VL 1376
4128 22:22:43.393700 # ok 2401 Set Streaming SVE VL 1392
4129 22:22:43.393810 # ok 2402 # SKIP Streaming SVE set SVE get SVE for VL 1392
4130 22:22:43.393903 # ok 2403 # SKIP Streaming SVE set SVE get FPSIMD for VL 1392
4131 22:22:43.430991 # ok 2404 # SKIP Streaming SVE set FPSIMD get SVE for VL 1392
4132 22:22:43.431257 # ok 2405 Set Streaming SVE VL 1408
4133 22:22:43.431340 # ok 2406 # SKIP Streaming SVE set SVE get SVE for VL 1408
4134 22:22:43.431414 # ok 2407 # SKIP Streaming SVE set SVE get FPSIMD for VL 1408
4135 22:22:43.431486 # ok 2408 # SKIP Streaming SVE set FPSIMD get SVE for VL 1408
4136 22:22:43.431561 # ok 2409 Set Streaming SVE VL 1424
4137 22:22:43.431637 # ok 2410 # SKIP Streaming SVE set SVE get SVE for VL 1424
4138 22:22:43.431718 # ok 2411 # SKIP Streaming SVE set SVE get FPSIMD for VL 1424
4139 22:22:43.431802 # ok 2412 # SKIP Streaming SVE set FPSIMD get SVE for VL 1424
4140 22:22:43.431895 # ok 2413 Set Streaming SVE VL 1440
4141 22:22:43.431975 # ok 2414 # SKIP Streaming SVE set SVE get SVE for VL 1440
4142 22:22:43.432039 # ok 2415 # SKIP Streaming SVE set SVE get FPSIMD for VL 1440
4143 22:22:43.432100 # ok 2416 # SKIP Streaming SVE set FPSIMD get SVE for VL 1440
4144 22:22:43.432164 # ok 2417 Set Streaming SVE VL 1456
4145 22:22:43.432228 # ok 2418 # SKIP Streaming SVE set SVE get SVE for VL 1456
4146 22:22:43.432287 # ok 2419 # SKIP Streaming SVE set SVE get FPSIMD for VL 1456
4147 22:22:43.432349 # ok 2420 # SKIP Streaming SVE set FPSIMD get SVE for VL 1456
4148 22:22:43.432407 # ok 2421 Set Streaming SVE VL 1472
4149 22:22:43.432465 # ok 2422 # SKIP Streaming SVE set SVE get SVE for VL 1472
4150 22:22:43.432523 # ok 2423 # SKIP Streaming SVE set SVE get FPSIMD for VL 1472
4151 22:22:43.432581 # ok 2424 # SKIP Streaming SVE set FPSIMD get SVE for VL 1472
4152 22:22:43.432639 # ok 2425 Set Streaming SVE VL 1488
4153 22:22:43.432697 # ok 2426 # SKIP Streaming SVE set SVE get SVE for VL 1488
4154 22:22:43.432754 # ok 2427 # SKIP Streaming SVE set SVE get FPSIMD for VL 1488
4155 22:22:43.432812 # ok 2428 # SKIP Streaming SVE set FPSIMD get SVE for VL 1488
4156 22:22:43.432870 # ok 2429 Set Streaming SVE VL 1504
4157 22:22:43.432929 # ok 2430 # SKIP Streaming SVE set SVE get SVE for VL 1504
4158 22:22:43.432986 # ok 2431 # SKIP Streaming SVE set SVE get FPSIMD for VL 1504
4159 22:22:43.433045 # ok 2432 # SKIP Streaming SVE set FPSIMD get SVE for VL 1504
4160 22:22:43.433102 # ok 2433 Set Streaming SVE VL 1520
4161 22:22:43.433160 # ok 2434 # SKIP Streaming SVE set SVE get SVE for VL 1520
4162 22:22:43.433218 # ok 2435 # SKIP Streaming SVE set SVE get FPSIMD for VL 1520
4163 22:22:43.433468 # ok 2436 # SKIP Streaming SVE set FPSIMD get SVE for VL 1520
4164 22:22:43.433551 # ok 2437 Set Streaming SVE VL 1536
4165 22:22:43.433615 # ok 2438 # SKIP Streaming SVE set SVE get SVE for VL 1536
4166 22:22:43.433689 # ok 2439 # SKIP Streaming SVE set SVE get FPSIMD for VL 1536
4167 22:22:43.433761 # ok 2440 # SKIP Streaming SVE set FPSIMD get SVE for VL 1536
4168 22:22:43.433849 # ok 2441 Set Streaming SVE VL 1552
4169 22:22:43.433940 # ok 2442 # SKIP Streaming SVE set SVE get SVE for VL 1552
4170 22:22:43.434021 # ok 2443 # SKIP Streaming SVE set SVE get FPSIMD for VL 1552
4171 22:22:43.434087 # ok 2444 # SKIP Streaming SVE set FPSIMD get SVE for VL 1552
4172 22:22:43.434150 # ok 2445 Set Streaming SVE VL 1568
4173 22:22:43.434213 # ok 2446 # SKIP Streaming SVE set SVE get SVE for VL 1568
4174 22:22:43.434273 # ok 2447 # SKIP Streaming SVE set SVE get FPSIMD for VL 1568
4175 22:22:43.434335 # ok 2448 # SKIP Streaming SVE set FPSIMD get SVE for VL 1568
4176 22:22:43.434396 # ok 2449 Set Streaming SVE VL 1584
4177 22:22:43.434461 # ok 2450 # SKIP Streaming SVE set SVE get SVE for VL 1584
4178 22:22:43.434523 # ok 2451 # SKIP Streaming SVE set SVE get FPSIMD for VL 1584
4179 22:22:43.434607 # ok 2452 # SKIP Streaming SVE set FPSIMD get SVE for VL 1584
4180 22:22:43.434684 # ok 2453 Set Streaming SVE VL 1600
4181 22:22:43.434749 # ok 2454 # SKIP Streaming SVE set SVE get SVE for VL 1600
4182 22:22:43.434809 # ok 2455 # SKIP Streaming SVE set SVE get FPSIMD for VL 1600
4183 22:22:43.434874 # ok 2456 # SKIP Streaming SVE set FPSIMD get SVE for VL 1600
4184 22:22:43.434937 # ok 2457 Set Streaming SVE VL 1616
4185 22:22:43.434998 # ok 2458 # SKIP Streaming SVE set SVE get SVE for VL 1616
4186 22:22:43.435059 # ok 2459 # SKIP Streaming SVE set SVE get FPSIMD for VL 1616
4187 22:22:43.435121 # ok 2460 # SKIP Streaming SVE set FPSIMD get SVE for VL 1616
4188 22:22:43.435185 # ok 2461 Set Streaming SVE VL 1632
4189 22:22:43.435257 # ok 2462 # SKIP Streaming SVE set SVE get SVE for VL 1632
4190 22:22:43.435350 # ok 2463 # SKIP Streaming SVE set SVE get FPSIMD for VL 1632
4191 22:22:43.435430 # ok 2464 # SKIP Streaming SVE set FPSIMD get SVE for VL 1632
4192 22:22:43.435491 # ok 2465 Set Streaming SVE VL 1648
4193 22:22:43.435555 # ok 2466 # SKIP Streaming SVE set SVE get SVE for VL 1648
4194 22:22:43.435618 # ok 2467 # SKIP Streaming SVE set SVE get FPSIMD for VL 1648
4195 22:22:43.435678 # ok 2468 # SKIP Streaming SVE set FPSIMD get SVE for VL 1648
4196 22:22:43.435739 # ok 2469 Set Streaming SVE VL 1664
4197 22:22:43.435800 # ok 2470 # SKIP Streaming SVE set SVE get SVE for VL 1664
4198 22:22:43.435862 # ok 2471 # SKIP Streaming SVE set SVE get FPSIMD for VL 1664
4199 22:22:43.436118 # ok 2472 # SKIP Streaming SVE set FPSIMD get SVE for VL 1664
4200 22:22:43.436189 # ok 2473 Set Streaming SVE VL 1680
4201 22:22:43.436252 # ok 2474 # SKIP Streaming SVE set SVE get SVE for VL 1680
4202 22:22:43.436314 # ok 2475 # SKIP Streaming SVE set SVE get FPSIMD for VL 1680
4203 22:22:43.436378 # ok 2476 # SKIP Streaming SVE set FPSIMD get SVE for VL 1680
4204 22:22:43.436440 # ok 2477 Set Streaming SVE VL 1696
4205 22:22:43.436502 # ok 2478 # SKIP Streaming SVE set SVE get SVE for VL 1696
4206 22:22:43.436563 # ok 2479 # SKIP Streaming SVE set SVE get FPSIMD for VL 1696
4207 22:22:43.436624 # ok 2480 # SKIP Streaming SVE set FPSIMD get SVE for VL 1696
4208 22:22:43.436685 # ok 2481 Set Streaming SVE VL 1712
4209 22:22:43.436747 # ok 2482 # SKIP Streaming SVE set SVE get SVE for VL 1712
4210 22:22:43.436810 # ok 2483 # SKIP Streaming SVE set SVE get FPSIMD for VL 1712
4211 22:22:43.436871 # ok 2484 # SKIP Streaming SVE set FPSIMD get SVE for VL 1712
4212 22:22:43.436933 # ok 2485 Set Streaming SVE VL 1728
4213 22:22:43.436995 # ok 2486 # SKIP Streaming SVE set SVE get SVE for VL 1728
4214 22:22:43.437057 # ok 2487 # SKIP Streaming SVE set SVE get FPSIMD for VL 1728
4215 22:22:43.437117 # ok 2488 # SKIP Streaming SVE set FPSIMD get SVE for VL 1728
4216 22:22:43.437179 # ok 2489 Set Streaming SVE VL 1744
4217 22:22:43.437242 # ok 2490 # SKIP Streaming SVE set SVE get SVE for VL 1744
4218 22:22:43.437303 # ok 2491 # SKIP Streaming SVE set SVE get FPSIMD for VL 1744
4219 22:22:43.437366 # ok 2492 # SKIP Streaming SVE set FPSIMD get SVE for VL 1744
4220 22:22:43.437429 # ok 2493 Set Streaming SVE VL 1760
4221 22:22:43.437490 # ok 2494 # SKIP Streaming SVE set SVE get SVE for VL 1760
4222 22:22:43.437551 # ok 2495 # SKIP Streaming SVE set SVE get FPSIMD for VL 1760
4223 22:22:43.437613 # ok 2496 # SKIP Streaming SVE set FPSIMD get SVE for VL 1760
4224 22:22:43.437685 # ok 2497 Set Streaming SVE VL 1776
4225 22:22:43.437755 # ok 2498 # SKIP Streaming SVE set SVE get SVE for VL 1776
4226 22:22:43.437835 # ok 2499 # SKIP Streaming SVE set SVE get FPSIMD for VL 1776
4227 22:22:43.437904 # ok 2500 # SKIP Streaming SVE set FPSIMD get SVE for VL 1776
4228 22:22:43.437965 # ok 2501 Set Streaming SVE VL 1792
4229 22:22:43.438024 # ok 2502 # SKIP Streaming SVE set SVE get SVE for VL 1792
4230 22:22:43.438083 # ok 2503 # SKIP Streaming SVE set SVE get FPSIMD for VL 1792
4231 22:22:43.438142 # ok 2504 # SKIP Streaming SVE set FPSIMD get SVE for VL 1792
4232 22:22:43.438200 # ok 2505 Set Streaming SVE VL 1808
4233 22:22:43.438276 # ok 2506 # SKIP Streaming SVE set SVE get SVE for VL 1808
4234 22:22:43.438541 # ok 2507 # SKIP Streaming SVE set SVE get FPSIMD for VL 1808
4235 22:22:43.438611 # ok 2508 # SKIP Streaming SVE set FPSIMD get SVE for VL 1808
4236 22:22:43.438678 # ok 2509 Set Streaming SVE VL 1824
4237 22:22:43.438741 # ok 2510 # SKIP Streaming SVE set SVE get SVE for VL 1824
4238 22:22:43.438804 # ok 2511 # SKIP Streaming SVE set SVE get FPSIMD for VL 1824
4239 22:22:43.438866 # ok 2512 # SKIP Streaming SVE set FPSIMD get SVE for VL 1824
4240 22:22:43.438929 # ok 2513 Set Streaming SVE VL 1840
4241 22:22:43.438990 # ok 2514 # SKIP Streaming SVE set SVE get SVE for VL 1840
4242 22:22:43.439049 # ok 2515 # SKIP Streaming SVE set SVE get FPSIMD for VL 1840
4243 22:22:43.439114 # ok 2516 # SKIP Streaming SVE set FPSIMD get SVE for VL 1840
4244 22:22:43.439184 # ok 2517 Set Streaming SVE VL 1856
4245 22:22:43.439246 # ok 2518 # SKIP Streaming SVE set SVE get SVE for VL 1856
4246 22:22:43.439308 # ok 2519 # SKIP Streaming SVE set SVE get FPSIMD for VL 1856
4247 22:22:43.439370 # ok 2520 # SKIP Streaming SVE set FPSIMD get SVE for VL 1856
4248 22:22:43.439435 # ok 2521 Set Streaming SVE VL 1872
4249 22:22:43.439499 # ok 2522 # SKIP Streaming SVE set SVE get SVE for VL 1872
4250 22:22:43.439561 # ok 2523 # SKIP Streaming SVE set SVE get FPSIMD for VL 1872
4251 22:22:43.439623 # ok 2524 # SKIP Streaming SVE set FPSIMD get SVE for VL 1872
4252 22:22:43.439686 # ok 2525 Set Streaming SVE VL 1888
4253 22:22:43.439749 # ok 2526 # SKIP Streaming SVE set SVE get SVE for VL 1888
4254 22:22:43.439813 # ok 2527 # SKIP Streaming SVE set SVE get FPSIMD for VL 1888
4255 22:22:43.439875 # ok 2528 # SKIP Streaming SVE set FPSIMD get SVE for VL 1888
4256 22:22:43.439938 # ok 2529 Set Streaming SVE VL 1904
4257 22:22:43.440001 # ok 2530 # SKIP Streaming SVE set SVE get SVE for VL 1904
4258 22:22:43.440064 # ok 2531 # SKIP Streaming SVE set SVE get FPSIMD for VL 1904
4259 22:22:43.440127 # ok 2532 # SKIP Streaming SVE set FPSIMD get SVE for VL 1904
4260 22:22:43.440190 # ok 2533 Set Streaming SVE VL 1920
4261 22:22:43.440256 # ok 2534 # SKIP Streaming SVE set SVE get SVE for VL 1920
4262 22:22:43.440324 # ok 2535 # SKIP Streaming SVE set SVE get FPSIMD for VL 1920
4263 22:22:43.440388 # ok 2536 # SKIP Streaming SVE set FPSIMD get SVE for VL 1920
4264 22:22:43.440451 # ok 2537 Set Streaming SVE VL 1936
4265 22:22:43.440514 # ok 2538 # SKIP Streaming SVE set SVE get SVE for VL 1936
4266 22:22:43.440579 # ok 2539 # SKIP Streaming SVE set SVE get FPSIMD for VL 1936
4267 22:22:43.440642 # ok 2540 # SKIP Streaming SVE set FPSIMD get SVE for VL 1936
4268 22:22:43.440707 # ok 2541 Set Streaming SVE VL 1952
4269 22:22:43.440961 # ok 2542 # SKIP Streaming SVE set SVE get SVE for VL 1952
4270 22:22:43.441033 # ok 2543 # SKIP Streaming SVE set SVE get FPSIMD for VL 1952
4271 22:22:43.441100 # ok 2544 # SKIP Streaming SVE set FPSIMD get SVE for VL 1952
4272 22:22:43.441162 # ok 2545 Set Streaming SVE VL 1968
4273 22:22:43.441226 # ok 2546 # SKIP Streaming SVE set SVE get SVE for VL 1968
4274 22:22:43.441290 # ok 2547 # SKIP Streaming SVE set SVE get FPSIMD for VL 1968
4275 22:22:43.441353 # ok 2548 # SKIP Streaming SVE set FPSIMD get SVE for VL 1968
4276 22:22:43.441415 # ok 2549 Set Streaming SVE VL 1984
4277 22:22:43.441478 # ok 2550 # SKIP Streaming SVE set SVE get SVE for VL 1984
4278 22:22:43.441541 # ok 2551 # SKIP Streaming SVE set SVE get FPSIMD for VL 1984
4279 22:22:43.441607 # ok 2552 # SKIP Streaming SVE set FPSIMD get SVE for VL 1984
4280 22:22:43.441679 # ok 2553 Set Streaming SVE VL 2000
4281 22:22:43.441745 # ok 2554 # SKIP Streaming SVE set SVE get SVE for VL 2000
4282 22:22:43.441838 # ok 2555 # SKIP Streaming SVE set SVE get FPSIMD for VL 2000
4283 22:22:43.441928 # ok 2556 # SKIP Streaming SVE set FPSIMD get SVE for VL 2000
4284 22:22:43.442002 # ok 2557 Set Streaming SVE VL 2016
4285 22:22:43.442066 # ok 2558 # SKIP Streaming SVE set SVE get SVE for VL 2016
4286 22:22:43.442129 # ok 2559 # SKIP Streaming SVE set SVE get FPSIMD for VL 2016
4287 22:22:43.442191 # ok 2560 # SKIP Streaming SVE set FPSIMD get SVE for VL 2016
4288 22:22:43.442258 # ok 2561 Set Streaming SVE VL 2032
4289 22:22:43.442322 # ok 2562 # SKIP Streaming SVE set SVE get SVE for VL 2032
4290 22:22:43.442389 # ok 2563 # SKIP Streaming SVE set SVE get FPSIMD for VL 2032
4291 22:22:43.442453 # ok 2564 # SKIP Streaming SVE set FPSIMD get SVE for VL 2032
4292 22:22:43.442516 # ok 2565 Set Streaming SVE VL 2048
4293 22:22:43.442579 # ok 2566 # SKIP Streaming SVE set SVE get SVE for VL 2048
4294 22:22:43.442644 # ok 2567 # SKIP Streaming SVE set SVE get FPSIMD for VL 2048
4295 22:22:43.442707 # ok 2568 # SKIP Streaming SVE set FPSIMD get SVE for VL 2048
4296 22:22:43.442770 # ok 2569 Set Streaming SVE VL 2064
4297 22:22:43.442833 # ok 2570 # SKIP Streaming SVE set SVE get SVE for VL 2064
4298 22:22:43.442897 # ok 2571 # SKIP Streaming SVE set SVE get FPSIMD for VL 2064
4299 22:22:43.442963 # ok 2572 # SKIP Streaming SVE set FPSIMD get SVE for VL 2064
4300 22:22:43.443026 # ok 2573 Set Streaming SVE VL 2080
4301 22:22:43.443090 # ok 2574 # SKIP Streaming SVE set SVE get SVE for VL 2080
4302 22:22:43.443153 # ok 2575 # SKIP Streaming SVE set SVE get FPSIMD for VL 2080
4303 22:22:43.443218 # ok 2576 # SKIP Streaming SVE set FPSIMD get SVE for VL 2080
4304 22:22:43.443287 # ok 2577 Set Streaming SVE VL 2096
4305 22:22:43.443542 # ok 2578 # SKIP Streaming SVE set SVE get SVE for VL 2096
4306 22:22:43.443617 # ok 2579 # SKIP Streaming SVE set SVE get FPSIMD for VL 2096
4307 22:22:43.443683 # ok 2580 # SKIP Streaming SVE set FPSIMD get SVE for VL 2096
4308 22:22:43.443747 # ok 2581 Set Streaming SVE VL 2112
4309 22:22:43.443812 # ok 2582 # SKIP Streaming SVE set SVE get SVE for VL 2112
4310 22:22:43.443878 # ok 2583 # SKIP Streaming SVE set SVE get FPSIMD for VL 2112
4311 22:22:43.443941 # ok 2584 # SKIP Streaming SVE set FPSIMD get SVE for VL 2112
4312 22:22:43.444003 # ok 2585 Set Streaming SVE VL 2128
4313 22:22:43.444068 # ok 2586 # SKIP Streaming SVE set SVE get SVE for VL 2128
4314 22:22:43.444132 # ok 2587 # SKIP Streaming SVE set SVE get FPSIMD for VL 2128
4315 22:22:43.444195 # ok 2588 # SKIP Streaming SVE set FPSIMD get SVE for VL 2128
4316 22:22:43.444257 # ok 2589 Set Streaming SVE VL 2144
4317 22:22:43.444320 # ok 2590 # SKIP Streaming SVE set SVE get SVE for VL 2144
4318 22:22:43.444381 # ok 2591 # SKIP Streaming SVE set SVE get FPSIMD for VL 2144
4319 22:22:43.444447 # ok 2592 # SKIP Streaming SVE set FPSIMD get SVE for VL 2144
4320 22:22:43.444510 # ok 2593 Set Streaming SVE VL 2160
4321 22:22:43.444574 # ok 2594 # SKIP Streaming SVE set SVE get SVE for VL 2160
4322 22:22:43.444636 # ok 2595 # SKIP Streaming SVE set SVE get FPSIMD for VL 2160
4323 22:22:43.444699 # ok 2596 # SKIP Streaming SVE set FPSIMD get SVE for VL 2160
4324 22:22:43.444762 # ok 2597 Set Streaming SVE VL 2176
4325 22:22:43.444823 # ok 2598 # SKIP Streaming SVE set SVE get SVE for VL 2176
4326 22:22:43.444887 # ok 2599 # SKIP Streaming SVE set SVE get FPSIMD for VL 2176
4327 22:22:43.444950 # ok 2600 # SKIP Streaming SVE set FPSIMD get SVE for VL 2176
4328 22:22:43.445013 # ok 2601 Set Streaming SVE VL 2192
4329 22:22:43.445079 # ok 2602 # SKIP Streaming SVE set SVE get SVE for VL 2192
4330 22:22:43.445141 # ok 2603 # SKIP Streaming SVE set SVE get FPSIMD for VL 2192
4331 22:22:43.445205 # ok 2604 # SKIP Streaming SVE set FPSIMD get SVE for VL 2192
4332 22:22:43.445272 # ok 2605 Set Streaming SVE VL 2208
4333 22:22:43.445336 # ok 2606 # SKIP Streaming SVE set SVE get SVE for VL 2208
4334 22:22:43.445398 # ok 2607 # SKIP Streaming SVE set SVE get FPSIMD for VL 2208
4335 22:22:43.445464 # ok 2608 # SKIP Streaming SVE set FPSIMD get SVE for VL 2208
4336 22:22:43.445526 # ok 2609 Set Streaming SVE VL 2224
4337 22:22:43.445589 # ok 2610 # SKIP Streaming SVE set SVE get SVE for VL 2224
4338 22:22:43.445658 # ok 2611 # SKIP Streaming SVE set SVE get FPSIMD for VL 2224
4339 22:22:43.445724 # ok 2612 # SKIP Streaming SVE set FPSIMD get SVE for VL 2224
4340 22:22:43.446017 # ok 2613 Set Streaming SVE VL 2240
4341 22:22:43.446097 # ok 2614 # SKIP Streaming SVE set SVE get SVE for VL 2240
4342 22:22:43.446164 # ok 2615 # SKIP Streaming SVE set SVE get FPSIMD for VL 2240
4343 22:22:43.446228 # ok 2616 # SKIP Streaming SVE set FPSIMD get SVE for VL 2240
4344 22:22:43.446294 # ok 2617 Set Streaming SVE VL 2256
4345 22:22:43.446359 # ok 2618 # SKIP Streaming SVE set SVE get SVE for VL 2256
4346 22:22:43.446422 # ok 2619 # SKIP Streaming SVE set SVE get FPSIMD for VL 2256
4347 22:22:43.446487 # ok 2620 # SKIP Streaming SVE set FPSIMD get SVE for VL 2256
4348 22:22:43.446550 # ok 2621 Set Streaming SVE VL 2272
4349 22:22:43.446614 # ok 2622 # SKIP Streaming SVE set SVE get SVE for VL 2272
4350 22:22:43.446680 # ok 2623 # SKIP Streaming SVE set SVE get FPSIMD for VL 2272
4351 22:22:43.446745 # ok 2624 # SKIP Streaming SVE set FPSIMD get SVE for VL 2272
4352 22:22:43.446809 # ok 2625 Set Streaming SVE VL 2288
4353 22:22:43.446871 # ok 2626 # SKIP Streaming SVE set SVE get SVE for VL 2288
4354 22:22:43.446937 # ok 2627 # SKIP Streaming SVE set SVE get FPSIMD for VL 2288
4355 22:22:43.447002 # ok 2628 # SKIP Streaming SVE set FPSIMD get SVE for VL 2288
4356 22:22:43.447065 # ok 2629 Set Streaming SVE VL 2304
4357 22:22:43.447127 # ok 2630 # SKIP Streaming SVE set SVE get SVE for VL 2304
4358 22:22:43.447191 # ok 2631 # SKIP Streaming SVE set SVE get FPSIMD for VL 2304
4359 22:22:43.447258 # ok 2632 # SKIP Streaming SVE set FPSIMD get SVE for VL 2304
4360 22:22:43.447321 # ok 2633 Set Streaming SVE VL 2320
4361 22:22:43.447384 # ok 2634 # SKIP Streaming SVE set SVE get SVE for VL 2320
4362 22:22:43.447447 # ok 2635 # SKIP Streaming SVE set SVE get FPSIMD for VL 2320
4363 22:22:43.447513 # ok 2636 # SKIP Streaming SVE set FPSIMD get SVE for VL 2320
4364 22:22:43.447577 # ok 2637 Set Streaming SVE VL 2336
4365 22:22:43.447640 # ok 2638 # SKIP Streaming SVE set SVE get SVE for VL 2336
4366 22:22:43.447705 # ok 2639 # SKIP Streaming SVE set SVE get FPSIMD for VL 2336
4367 22:22:43.447770 # ok 2640 # SKIP Streaming SVE set FPSIMD get SVE for VL 2336
4368 22:22:43.447832 # ok 2641 Set Streaming SVE VL 2352
4369 22:22:43.447895 # ok 2642 # SKIP Streaming SVE set SVE get SVE for VL 2352
4370 22:22:43.447959 # ok 2643 # SKIP Streaming SVE set SVE get FPSIMD for VL 2352
4371 22:22:43.448020 # ok 2644 # SKIP Streaming SVE set FPSIMD get SVE for VL 2352
4372 22:22:43.448080 # ok 2645 Set Streaming SVE VL 2368
4373 22:22:43.448140 # ok 2646 # SKIP Streaming SVE set SVE get SVE for VL 2368
4374 22:22:43.448200 # ok 2647 # SKIP Streaming SVE set SVE get FPSIMD for VL 2368
4375 22:22:43.448450 # ok 2648 # SKIP Streaming SVE set FPSIMD get SVE for VL 2368
4376 22:22:43.448516 # ok 2649 Set Streaming SVE VL 2384
4377 22:22:43.448577 # ok 2650 # SKIP Streaming SVE set SVE get SVE for VL 2384
4378 22:22:43.448638 # ok 2651 # SKIP Streaming SVE set SVE get FPSIMD for VL 2384
4379 22:22:43.448697 # ok 2652 # SKIP Streaming SVE set FPSIMD get SVE for VL 2384
4380 22:22:43.448757 # ok 2653 Set Streaming SVE VL 2400
4381 22:22:43.448817 # ok 2654 # SKIP Streaming SVE set SVE get SVE for VL 2400
4382 22:22:43.448877 # ok 2655 # SKIP Streaming SVE set SVE get FPSIMD for VL 2400
4383 22:22:43.448937 # ok 2656 # SKIP Streaming SVE set FPSIMD get SVE for VL 2400
4384 22:22:43.448997 # ok 2657 Set Streaming SVE VL 2416
4385 22:22:43.449058 # ok 2658 # SKIP Streaming SVE set SVE get SVE for VL 2416
4386 22:22:43.449119 # ok 2659 # SKIP Streaming SVE set SVE get FPSIMD for VL 2416
4387 22:22:43.449179 # ok 2660 # SKIP Streaming SVE set FPSIMD get SVE for VL 2416
4388 22:22:43.449240 # ok 2661 Set Streaming SVE VL 2432
4389 22:22:43.449300 # ok 2662 # SKIP Streaming SVE set SVE get SVE for VL 2432
4390 22:22:43.449361 # ok 2663 # SKIP Streaming SVE set SVE get FPSIMD for VL 2432
4391 22:22:43.449421 # ok 2664 # SKIP Streaming SVE set FPSIMD get SVE for VL 2432
4392 22:22:43.449481 # ok 2665 Set Streaming SVE VL 2448
4393 22:22:43.449541 # ok 2666 # SKIP Streaming SVE set SVE get SVE for VL 2448
4394 22:22:43.449601 # ok 2667 # SKIP Streaming SVE set SVE get FPSIMD for VL 2448
4395 22:22:43.449676 # ok 2668 # SKIP Streaming SVE set FPSIMD get SVE for VL 2448
4396 22:22:43.449775 # ok 2669 Set Streaming SVE VL 2464
4397 22:22:43.449877 # ok 2670 # SKIP Streaming SVE set SVE get SVE for VL 2464
4398 22:22:43.449966 # ok 2671 # SKIP Streaming SVE set SVE get FPSIMD for VL 2464
4399 22:22:43.450042 # ok 2672 # SKIP Streaming SVE set FPSIMD get SVE for VL 2464
4400 22:22:43.450116 # ok 2673 Set Streaming SVE VL 2480
4401 22:22:43.450190 # ok 2674 # SKIP Streaming SVE set SVE get SVE for VL 2480
4402 22:22:43.450276 # ok 2675 # SKIP Streaming SVE set SVE get FPSIMD for VL 2480
4403 22:22:43.450373 # ok 2676 # SKIP Streaming SVE set FPSIMD get SVE for VL 2480
4404 22:22:43.450471 # ok 2677 Set Streaming SVE VL 2496
4405 22:22:43.450567 # ok 2678 # SKIP Streaming SVE set SVE get SVE for VL 2496
4406 22:22:43.450662 # ok 2679 # SKIP Streaming SVE set SVE get FPSIMD for VL 2496
4407 22:22:43.450758 # ok 2680 # SKIP Streaming SVE set FPSIMD get SVE for VL 2496
4408 22:22:43.450854 # ok 2681 Set Streaming SVE VL 2512
4409 22:22:43.450950 # ok 2682 # SKIP Streaming SVE set SVE get SVE for VL 2512
4410 22:22:43.451251 # ok 2683 # SKIP Streaming SVE set SVE get FPSIMD for VL 2512
4411 22:22:43.451337 # ok 2684 # SKIP Streaming SVE set FPSIMD get SVE for VL 2512
4412 22:22:43.451433 # ok 2685 Set Streaming SVE VL 2528
4413 22:22:43.451529 # ok 2686 # SKIP Streaming SVE set SVE get SVE for VL 2528
4414 22:22:43.451627 # ok 2687 # SKIP Streaming SVE set SVE get FPSIMD for VL 2528
4415 22:22:43.451723 # ok 2688 # SKIP Streaming SVE set FPSIMD get SVE for VL 2528
4416 22:22:43.451818 # ok 2689 Set Streaming SVE VL 2544
4417 22:22:43.451916 # ok 2690 # SKIP Streaming SVE set SVE get SVE for VL 2544
4418 22:22:43.452010 # ok 2691 # SKIP Streaming SVE set SVE get FPSIMD for VL 2544
4419 22:22:43.452107 # ok 2692 # SKIP Streaming SVE set FPSIMD get SVE for VL 2544
4420 22:22:43.452206 # ok 2693 Set Streaming SVE VL 2560
4421 22:22:43.452301 # ok 2694 # SKIP Streaming SVE set SVE get SVE for VL 2560
4422 22:22:43.452396 # ok 2695 # SKIP Streaming SVE set SVE get FPSIMD for VL 2560
4423 22:22:43.452493 # ok 2696 # SKIP Streaming SVE set FPSIMD get SVE for VL 2560
4424 22:22:43.452590 # ok 2697 Set Streaming SVE VL 2576
4425 22:22:43.452687 # ok 2698 # SKIP Streaming SVE set SVE get SVE for VL 2576
4426 22:22:43.452784 # ok 2699 # SKIP Streaming SVE set SVE get FPSIMD for VL 2576
4427 22:22:43.452878 # ok 2700 # SKIP Streaming SVE set FPSIMD get SVE for VL 2576
4428 22:22:43.452967 # ok 2701 Set Streaming SVE VL 2592
4429 22:22:43.453042 # ok 2702 # SKIP Streaming SVE set SVE get SVE for VL 2592
4430 22:22:43.453115 # ok 2703 # SKIP Streaming SVE set SVE get FPSIMD for VL 2592
4431 22:22:43.453188 # ok 2704 # SKIP Streaming SVE set FPSIMD get SVE for VL 2592
4432 22:22:43.453271 # ok 2705 Set Streaming SVE VL 2608
4433 22:22:43.453377 # ok 2706 # SKIP Streaming SVE set SVE get SVE for VL 2608
4434 22:22:43.453476 # ok 2707 # SKIP Streaming SVE set SVE get FPSIMD for VL 2608
4435 22:22:43.453577 # ok 2708 # SKIP Streaming SVE set FPSIMD get SVE for VL 2608
4436 22:22:43.453682 # ok 2709 Set Streaming SVE VL 2624
4437 22:22:43.453782 # ok 2710 # SKIP Streaming SVE set SVE get SVE for VL 2624
4438 22:22:43.453890 # ok 2711 # SKIP Streaming SVE set SVE get FPSIMD for VL 2624
4439 22:22:43.453986 # ok 2712 # SKIP Streaming SVE set FPSIMD get SVE for VL 2624
4440 22:22:43.454085 # ok 2713 Set Streaming SVE VL 2640
4441 22:22:43.454175 # ok 2714 # SKIP Streaming SVE set SVE get SVE for VL 2640
4442 22:22:43.454251 # ok 2715 # SKIP Streaming SVE set SVE get FPSIMD for VL 2640
4443 22:22:43.454326 # ok 2716 # SKIP Streaming SVE set FPSIMD get SVE for VL 2640
4444 22:22:43.454399 # ok 2717 Set Streaming SVE VL 2656
4445 22:22:43.454473 # ok 2718 # SKIP Streaming SVE set SVE get SVE for VL 2656
4446 22:22:43.454750 # ok 2719 # SKIP Streaming SVE set SVE get FPSIMD for VL 2656
4447 22:22:43.454834 # ok 2720 # SKIP Streaming SVE set FPSIMD get SVE for VL 2656
4448 22:22:43.454911 # ok 2721 Set Streaming SVE VL 2672
4449 22:22:43.454985 # ok 2722 # SKIP Streaming SVE set SVE get SVE for VL 2672
4450 22:22:43.455059 # ok 2723 # SKIP Streaming SVE set SVE get FPSIMD for VL 2672
4451 22:22:43.455132 # ok 2724 # SKIP Streaming SVE set FPSIMD get SVE for VL 2672
4452 22:22:43.455205 # ok 2725 Set Streaming SVE VL 2688
4453 22:22:43.455279 # ok 2726 # SKIP Streaming SVE set SVE get SVE for VL 2688
4454 22:22:43.455352 # ok 2727 # SKIP Streaming SVE set SVE get FPSIMD for VL 2688
4455 22:22:43.455425 # ok 2728 # SKIP Streaming SVE set FPSIMD get SVE for VL 2688
4456 22:22:43.455499 # ok 2729 Set Streaming SVE VL 2704
4457 22:22:43.455573 # ok 2730 # SKIP Streaming SVE set SVE get SVE for VL 2704
4458 22:22:43.455647 # ok 2731 # SKIP Streaming SVE set SVE get FPSIMD for VL 2704
4459 22:22:43.455720 # ok 2732 # SKIP Streaming SVE set FPSIMD get SVE for VL 2704
4460 22:22:43.455794 # ok 2733 Set Streaming SVE VL 2720
4461 22:22:43.455867 # ok 2734 # SKIP Streaming SVE set SVE get SVE for VL 2720
4462 22:22:43.455941 # ok 2735 # SKIP Streaming SVE set SVE get FPSIMD for VL 2720
4463 22:22:43.456014 # ok 2736 # SKIP Streaming SVE set FPSIMD get SVE for VL 2720
4464 22:22:43.456088 # ok 2737 Set Streaming SVE VL 2736
4465 22:22:43.456161 # ok 2738 # SKIP Streaming SVE set SVE get SVE for VL 2736
4466 22:22:43.456235 # ok 2739 # SKIP Streaming SVE set SVE get FPSIMD for VL 2736
4467 22:22:43.456309 # ok 2740 # SKIP Streaming SVE set FPSIMD get SVE for VL 2736
4468 22:22:43.456382 # ok 2741 Set Streaming SVE VL 2752
4469 22:22:43.456455 # ok 2742 # SKIP Streaming SVE set SVE get SVE for VL 2752
4470 22:22:43.456529 # ok 2743 # SKIP Streaming SVE set SVE get FPSIMD for VL 2752
4471 22:22:43.456602 # ok 2744 # SKIP Streaming SVE set FPSIMD get SVE for VL 2752
4472 22:22:43.456675 # ok 2745 Set Streaming SVE VL 2768
4473 22:22:43.456749 # ok 2746 # SKIP Streaming SVE set SVE get SVE for VL 2768
4474 22:22:43.456823 # ok 2747 # SKIP Streaming SVE set SVE get FPSIMD for VL 2768
4475 22:22:43.456897 # ok 2748 # SKIP Streaming SVE set FPSIMD get SVE for VL 2768
4476 22:22:43.456970 # ok 2749 Set Streaming SVE VL 2784
4477 22:22:43.457044 # ok 2750 # SKIP Streaming SVE set SVE get SVE for VL 2784
4478 22:22:43.457118 # ok 2751 # SKIP Streaming SVE set SVE get FPSIMD for VL 2784
4479 22:22:43.457192 # ok 2752 # SKIP Streaming SVE set FPSIMD get SVE for VL 2784
4480 22:22:43.457267 # ok 2753 Set Streaming SVE VL 2800
4481 22:22:43.457530 # ok 2754 # SKIP Streaming SVE set SVE get SVE for VL 2800
4482 22:22:43.457601 # ok 2755 # SKIP Streaming SVE set SVE get FPSIMD for VL 2800
4483 22:22:43.457684 # ok 2756 # SKIP Streaming SVE set FPSIMD get SVE for VL 2800
4484 22:22:43.457769 # ok 2757 Set Streaming SVE VL 2816
4485 22:22:43.457850 # ok 2758 # SKIP Streaming SVE set SVE get SVE for VL 2816
4486 22:22:43.457914 # ok 2759 # SKIP Streaming SVE set SVE get FPSIMD for VL 2816
4487 22:22:43.457974 # ok 2760 # SKIP Streaming SVE set FPSIMD get SVE for VL 2816
4488 22:22:43.458034 # ok 2761 Set Streaming SVE VL 2832
4489 22:22:43.458094 # ok 2762 # SKIP Streaming SVE set SVE get SVE for VL 2832
4490 22:22:43.458154 # ok 2763 # SKIP Streaming SVE set SVE get FPSIMD for VL 2832
4491 22:22:43.458214 # ok 2764 # SKIP Streaming SVE set FPSIMD get SVE for VL 2832
4492 22:22:43.458274 # ok 2765 Set Streaming SVE VL 2848
4493 22:22:43.458333 # ok 2766 # SKIP Streaming SVE set SVE get SVE for VL 2848
4494 22:22:43.458393 # ok 2767 # SKIP Streaming SVE set SVE get FPSIMD for VL 2848
4495 22:22:43.458453 # ok 2768 # SKIP Streaming SVE set FPSIMD get SVE for VL 2848
4496 22:22:43.458513 # ok 2769 Set Streaming SVE VL 2864
4497 22:22:43.458572 # ok 2770 # SKIP Streaming SVE set SVE get SVE for VL 2864
4498 22:22:43.458633 # ok 2771 # SKIP Streaming SVE set SVE get FPSIMD for VL 2864
4499 22:22:43.458708 # ok 2772 # SKIP Streaming SVE set FPSIMD get SVE for VL 2864
4500 22:22:43.458771 # ok 2773 Set Streaming SVE VL 2880
4501 22:22:43.458833 # ok 2774 # SKIP Streaming SVE set SVE get SVE for VL 2880
4502 22:22:43.458893 # ok 2775 # SKIP Streaming SVE set SVE get FPSIMD for VL 2880
4503 22:22:43.458954 # ok 2776 # SKIP Streaming SVE set FPSIMD get SVE for VL 2880
4504 22:22:43.459014 # ok 2777 Set Streaming SVE VL 2896
4505 22:22:43.459074 # ok 2778 # SKIP Streaming SVE set SVE get SVE for VL 2896
4506 22:22:43.459134 # ok 2779 # SKIP Streaming SVE set SVE get FPSIMD for VL 2896
4507 22:22:43.459207 # ok 2780 # SKIP Streaming SVE set FPSIMD get SVE for VL 2896
4508 22:22:43.459269 # ok 2781 Set Streaming SVE VL 2912
4509 22:22:43.459338 # ok 2782 # SKIP Streaming SVE set SVE get SVE for VL 2912
4510 22:22:43.459409 # ok 2783 # SKIP Streaming SVE set SVE get FPSIMD for VL 2912
4511 22:22:43.459653 # ok 2784 # SKIP Streaming SVE set FPSIMD get SVE for VL 2912
4512 22:22:43.459719 # ok 2785 Set Streaming SVE VL 2928
4513 22:22:43.459803 # ok 2786 # SKIP Streaming SVE set SVE get SVE for VL 2928
4514 22:22:43.459903 # ok 2787 # SKIP Streaming SVE set SVE get FPSIMD for VL 2928
4515 22:22:43.460175 # ok 2788 # SKIP Streaming SVE set FPSIMD get SVE for VL 2928
4516 22:22:43.460437 # ok 2789 Set Streaming SVE VL 2944
4517 22:22:43.460508 # ok 2790 # SKIP Streaming SVE set SVE get SVE for VL 2944
4518 22:22:43.460584 # ok 2791 # SKIP Streaming SVE set SVE get FPSIMD for VL 2944
4519 22:22:43.460836 # ok 2792 # SKIP Streaming SVE set FPSIMD get SVE for VL 2944
4520 22:22:43.461092 # ok 2793 Set Streaming SVE VL 2960
4521 22:22:43.461171 # ok 2794 # SKIP Streaming SVE set SVE get SVE for VL 2960
4522 22:22:43.461425 # ok 2795 # SKIP Streaming SVE set SVE get FPSIMD for VL 2960
4523 22:22:43.461673 # ok 2796 # SKIP Streaming SVE set FPSIMD get SVE for VL 2960
4524 22:22:43.461747 # ok 2797 Set Streaming SVE VL 2976
4525 22:22:43.461846 # ok 2798 # SKIP Streaming SVE set SVE get SVE for VL 2976
4526 22:22:43.462097 # ok 2799 # SKIP Streaming SVE set SVE get FPSIMD for VL 2976
4527 22:22:43.462347 # ok 2800 # SKIP Streaming SVE set FPSIMD get SVE for VL 2976
4528 22:22:43.462413 # ok 2801 Set Streaming SVE VL 2992
4529 22:22:43.462657 # ok 2802 # SKIP Streaming SVE set SVE get SVE for VL 2992
4530 22:22:43.462733 # ok 2803 # SKIP Streaming SVE set SVE get FPSIMD for VL 2992
4531 22:22:43.462978 # ok 2804 # SKIP Streaming SVE set FPSIMD get SVE for VL 2992
4532 22:22:43.463053 # ok 2805 Set Streaming SVE VL 3008
4533 22:22:43.463310 # ok 2806 # SKIP Streaming SVE set SVE get SVE for VL 3008
4534 22:22:43.463558 # ok 2807 # SKIP Streaming SVE set SVE get FPSIMD for VL 3008
4535 22:22:43.463805 # ok 2808 # SKIP Streaming SVE set FPSIMD get SVE for VL 3008
4536 22:22:43.463872 # ok 2809 Set Streaming SVE VL 3024
4537 22:22:43.463943 # ok 2810 # SKIP Streaming SVE set SVE get SVE for VL 3024
4538 22:22:43.464188 # ok 2811 # SKIP Streaming SVE set SVE get FPSIMD for VL 3024
4539 22:22:43.464268 # ok 2812 # SKIP Streaming SVE set FPSIMD get SVE for VL 3024
4540 22:22:43.464514 # ok 2813 Set Streaming SVE VL 3040
4541 22:22:43.464589 # ok 2814 # SKIP Streaming SVE set SVE get SVE for VL 3040
4542 22:22:43.465004 # ok 2815 # SKIP Streaming SVE set SVE get FPSIMD for VL 3040
4543 22:22:43.465081 # ok 2816 # SKIP Streaming SVE set FPSIMD get SVE for VL 3040
4544 22:22:43.465326 # ok 2817 Set Streaming SVE VL 3056
4545 22:22:43.465402 # ok 2818 # SKIP Streaming SVE set SVE get SVE for VL 3056
4546 22:22:43.465651 # ok 2819 # SKIP Streaming SVE set SVE get FPSIMD for VL 3056
4547 22:22:43.465910 # ok 2820 # SKIP Streaming SVE set FPSIMD get SVE for VL 3056
4548 22:22:43.465989 # ok 2821 Set Streaming SVE VL 3072
4549 22:22:43.466247 # ok 2822 # SKIP Streaming SVE set SVE get SVE for VL 3072
4550 22:22:43.466328 # ok 2823 # SKIP Streaming SVE set SVE get FPSIMD for VL 3072
4551 22:22:43.466408 # ok 2824 # SKIP Streaming SVE set FPSIMD get SVE for VL 3072
4552 22:22:43.466488 # ok 2825 Set Streaming SVE VL 3088
4553 22:22:43.466746 # ok 2826 # SKIP Streaming SVE set SVE get SVE for VL 3088
4554 22:22:43.467005 # ok 2827 # SKIP Streaming SVE set SVE get FPSIMD for VL 3088
4555 22:22:43.467074 # ok 2828 # SKIP Streaming SVE set FPSIMD get SVE for VL 3088
4556 22:22:43.467151 # ok 2829 Set Streaming SVE VL 3104
4557 22:22:43.467227 # ok 2830 # SKIP Streaming SVE set SVE get SVE for VL 3104
4558 22:22:43.467479 # ok 2831 # SKIP Streaming SVE set SVE get FPSIMD for VL 3104
4559 22:22:43.467733 # ok 2832 # SKIP Streaming SVE set FPSIMD get SVE for VL 3104
4560 22:22:43.467988 # ok 2833 Set Streaming SVE VL 3120
4561 22:22:43.468059 # ok 2834 # SKIP Streaming SVE set SVE get SVE for VL 3120
4562 22:22:43.468311 # ok 2835 # SKIP Streaming SVE set SVE get FPSIMD for VL 3120
4563 22:22:43.468380 # ok 2836 # SKIP Streaming SVE set FPSIMD get SVE for VL 3120
4564 22:22:43.468456 # ok 2837 Set Streaming SVE VL 3136
4565 22:22:43.468709 # ok 2838 # SKIP Streaming SVE set SVE get SVE for VL 3136
4566 22:22:43.468964 # ok 2839 # SKIP Streaming SVE set SVE get FPSIMD for VL 3136
4567 22:22:43.469044 # ok 2840 # SKIP Streaming SVE set FPSIMD get SVE for VL 3136
4568 22:22:43.469293 # ok 2841 Set Streaming SVE VL 3152
4569 22:22:43.469372 # ok 2842 # SKIP Streaming SVE set SVE get SVE for VL 3152
4570 22:22:43.469624 # ok 2843 # SKIP Streaming SVE set SVE get FPSIMD for VL 3152
4571 22:22:43.469740 # ok 2844 # SKIP Streaming SVE set FPSIMD get SVE for VL 3152
4572 22:22:43.469849 # ok 2845 Set Streaming SVE VL 3168
4573 22:22:43.469952 # ok 2846 # SKIP Streaming SVE set SVE get SVE for VL 3168
4574 22:22:43.470253 # ok 2847 # SKIP Streaming SVE set SVE get FPSIMD for VL 3168
4575 22:22:43.470349 # ok 2848 # SKIP Streaming SVE set FPSIMD get SVE for VL 3168
4576 22:22:43.470428 # ok 2849 Set Streaming SVE VL 3184
4577 22:22:43.470680 # ok 2850 # SKIP Streaming SVE set SVE get SVE for VL 3184
4578 22:22:43.470759 # ok 2851 # SKIP Streaming SVE set SVE get FPSIMD for VL 3184
4579 22:22:43.471010 # ok 2852 # SKIP Streaming SVE set FPSIMD get SVE for VL 3184
4580 22:22:43.471080 # ok 2853 Set Streaming SVE VL 3200
4581 22:22:43.471330 # ok 2854 # SKIP Streaming SVE set SVE get SVE for VL 3200
4582 22:22:43.471401 # ok 2855 # SKIP Streaming SVE set SVE get FPSIMD for VL 3200
4583 22:22:43.471651 # ok 2856 # SKIP Streaming SVE set FPSIMD get SVE for VL 3200
4584 22:22:43.471719 # ok 2857 Set Streaming SVE VL 3216
4585 22:22:43.471793 # ok 2858 # SKIP Streaming SVE set SVE get SVE for VL 3216
4586 22:22:43.472042 # ok 2859 # SKIP Streaming SVE set SVE get FPSIMD for VL 3216
4587 22:22:43.472294 # ok 2860 # SKIP Streaming SVE set FPSIMD get SVE for VL 3216
4588 22:22:43.472364 # ok 2861 Set Streaming SVE VL 3232
4589 22:22:43.472437 # ok 2862 # SKIP Streaming SVE set SVE get SVE for VL 3232
4590 22:22:43.472687 # ok 2863 # SKIP Streaming SVE set SVE get FPSIMD for VL 3232
4591 22:22:43.472763 # ok 2864 # SKIP Streaming SVE set FPSIMD get SVE for VL 3232
4592 22:22:43.473178 # ok 2865 Set Streaming SVE VL 3248
4593 22:22:43.473257 # ok 2866 # SKIP Streaming SVE set SVE get SVE for VL 3248
4594 22:22:43.473506 # ok 2867 # SKIP Streaming SVE set SVE get FPSIMD for VL 3248
4595 22:22:43.473575 # ok 2868 # SKIP Streaming SVE set FPSIMD get SVE for VL 3248
4596 22:22:43.473656 # ok 2869 Set Streaming SVE VL 3264
4597 22:22:43.473929 # ok 2870 # SKIP Streaming SVE set SVE get SVE for VL 3264
4598 22:22:43.474042 # ok 2871 # SKIP Streaming SVE set SVE get FPSIMD for VL 3264
4599 22:22:43.474151 # ok 2872 # SKIP Streaming SVE set FPSIMD get SVE for VL 3264
4600 22:22:43.474252 # ok 2873 Set Streaming SVE VL 3280
4601 22:22:43.474546 # ok 2874 # SKIP Streaming SVE set SVE get SVE for VL 3280
4602 22:22:43.474647 # ok 2875 # SKIP Streaming SVE set SVE get FPSIMD for VL 3280
4603 22:22:43.474745 # ok 2876 # SKIP Streaming SVE set FPSIMD get SVE for VL 3280
4604 22:22:43.474842 # ok 2877 Set Streaming SVE VL 3296
4605 22:22:43.483390 # ok 2878 # SKIP Streaming SVE set SVE get SVE for VL 3296
4606 22:22:43.483612 # ok 2879 # SKIP Streaming SVE set SVE get FPSIMD for VL 3296
4607 22:22:43.483730 # ok 2880 # SKIP Streaming SVE set FPSIMD get SVE for VL 3296
4608 22:22:43.483829 # ok 2881 Set Streaming SVE VL 3312
4609 22:22:43.483941 # ok 2882 # SKIP Streaming SVE set SVE get SVE for VL 3312
4610 22:22:43.484056 # ok 2883 # SKIP Streaming SVE set SVE get FPSIMD for VL 3312
4611 22:22:43.484175 # ok 2884 # SKIP Streaming SVE set FPSIMD get SVE for VL 3312
4612 22:22:43.484286 # ok 2885 Set Streaming SVE VL 3328
4613 22:22:43.484394 # ok 2886 # SKIP Streaming SVE set SVE get SVE for VL 3328
4614 22:22:43.484716 # ok 2887 # SKIP Streaming SVE set SVE get FPSIMD for VL 3328
4615 22:22:43.487134 # ok 2888 # SKIP Streaming SVE set FPSIMD get SVE for VL 3328
4616 22:22:43.487436 # ok 2889 Set Streaming SVE VL 3344
4617 22:22:43.487546 # ok 2890 # SKIP Streaming SVE set SVE get SVE for VL 3344
4618 22:22:43.487648 # ok 2891 # SKIP Streaming SVE set SVE get FPSIMD for VL 3344
4619 22:22:43.487734 # ok 2892 # SKIP Streaming SVE set FPSIMD get SVE for VL 3344
4620 22:22:43.488044 # ok 2893 Set Streaming SVE VL 3360
4621 22:22:43.488146 # ok 2894 # SKIP Streaming SVE set SVE get SVE for VL 3360
4622 22:22:43.488245 # ok 2895 # SKIP Streaming SVE set SVE get FPSIMD for VL 3360
4623 22:22:43.488331 # ok 2896 # SKIP Streaming SVE set FPSIMD get SVE for VL 3360
4624 22:22:43.488429 # ok 2897 Set Streaming SVE VL 3376
4625 22:22:43.488527 # ok 2898 # SKIP Streaming SVE set SVE get SVE for VL 3376
4626 22:22:43.488632 # ok 2899 # SKIP Streaming SVE set SVE get FPSIMD for VL 3376
4627 22:22:43.498679 # ok 2900 # SKIP Streaming SVE set FPSIMD get SVE for VL 3376
4628 22:22:43.499145 # ok 2901 Set Streaming SVE VL 3392
4629 22:22:43.499256 # ok 2902 # SKIP Streaming SVE set SVE get SVE for VL 3392
4630 22:22:43.499351 # ok 2903 # SKIP Streaming SVE set SVE get FPSIMD for VL 3392
4631 22:22:43.499460 # ok 2904 # SKIP Streaming SVE set FPSIMD get SVE for VL 3392
4632 22:22:43.499554 # ok 2905 Set Streaming SVE VL 3408
4633 22:22:43.499660 # ok 2906 # SKIP Streaming SVE set SVE get SVE for VL 3408
4634 22:22:43.499752 # ok 2907 # SKIP Streaming SVE set SVE get FPSIMD for VL 3408
4635 22:22:43.499880 # ok 2908 # SKIP Streaming SVE set FPSIMD get SVE for VL 3408
4636 22:22:43.499975 # ok 2909 Set Streaming SVE VL 3424
4637 22:22:43.500080 # ok 2910 # SKIP Streaming SVE set SVE get SVE for VL 3424
4638 22:22:43.500377 # ok 2911 # SKIP Streaming SVE set SVE get FPSIMD for VL 3424
4639 22:22:43.500483 # ok 2912 # SKIP Streaming SVE set FPSIMD get SVE for VL 3424
4640 22:22:43.500590 # ok 2913 Set Streaming SVE VL 3440
4641 22:22:43.500696 # ok 2914 # SKIP Streaming SVE set SVE get SVE for VL 3440
4642 22:22:43.503655 # ok 2915 # SKIP Streaming SVE set SVE get FPSIMD for VL 3440
4643 22:22:43.503782 # ok 2916 # SKIP Streaming SVE set FPSIMD get SVE for VL 3440
4644 22:22:43.503869 # ok 2917 Set Streaming SVE VL 3456
4645 22:22:43.504155 # ok 2918 # SKIP Streaming SVE set SVE get SVE for VL 3456
4646 22:22:43.504246 # ok 2919 # SKIP Streaming SVE set SVE get FPSIMD for VL 3456
4647 22:22:43.504344 # ok 2920 # SKIP Streaming SVE set FPSIMD get SVE for VL 3456
4648 22:22:43.504441 # ok 2921 Set Streaming SVE VL 3472
4649 22:22:43.504730 # ok 2922 # SKIP Streaming SVE set SVE get SVE for VL 3472
4650 22:22:43.512756 # ok 2923 # SKIP Streaming SVE set SVE get FPSIMD for VL 3472
4651 22:22:43.514372 # ok 2924 # SKIP Streaming SVE set FPSIMD get SVE for VL 3472
4652 22:22:43.514492 # ok 2925 Set Streaming SVE VL 3488
4653 22:22:43.514814 # ok 2926 # SKIP Streaming SVE set SVE get SVE for VL 3488
4654 22:22:43.514916 # ok 2927 # SKIP Streaming SVE set SVE get FPSIMD for VL 3488
4655 22:22:43.515015 # ok 2928 # SKIP Streaming SVE set FPSIMD get SVE for VL 3488
4656 22:22:43.515101 # ok 2929 Set Streaming SVE VL 3504
4657 22:22:43.515399 # ok 2930 # SKIP Streaming SVE set SVE get SVE for VL 3504
4658 22:22:43.515498 # ok 2931 # SKIP Streaming SVE set SVE get FPSIMD for VL 3504
4659 22:22:43.515586 # ok 2932 # SKIP Streaming SVE set FPSIMD get SVE for VL 3504
4660 22:22:43.515676 # ok 2933 Set Streaming SVE VL 3520
4661 22:22:43.515772 # ok 2934 # SKIP Streaming SVE set SVE get SVE for VL 3520
4662 22:22:43.516113 # ok 2935 # SKIP Streaming SVE set SVE get FPSIMD for VL 3520
4663 22:22:43.516228 # ok 2936 # SKIP Streaming SVE set FPSIMD get SVE for VL 3520
4664 22:22:43.516341 # ok 2937 Set Streaming SVE VL 3536
4665 22:22:43.516444 # ok 2938 # SKIP Streaming SVE set SVE get SVE for VL 3536
4666 22:22:43.516555 # ok 2939 # SKIP Streaming SVE set SVE get FPSIMD for VL 3536
4667 22:22:43.516854 # ok 2940 # SKIP Streaming SVE set FPSIMD get SVE for VL 3536
4668 22:22:43.524727 # ok 2941 Set Streaming SVE VL 3552
4669 22:22:43.526667 # ok 2942 # SKIP Streaming SVE set SVE get SVE for VL 3552
4670 22:22:43.526974 # ok 2943 # SKIP Streaming SVE set SVE get FPSIMD for VL 3552
4671 22:22:43.527308 # ok 2944 # SKIP Streaming SVE set FPSIMD get SVE for VL 3552
4672 22:22:43.527621 # ok 2945 Set Streaming SVE VL 3568
4673 22:22:43.527731 # ok 2946 # SKIP Streaming SVE set SVE get SVE for VL 3568
4674 22:22:43.527845 # ok 2947 # SKIP Streaming SVE set SVE get FPSIMD for VL 3568
4675 22:22:43.528174 # ok 2948 # SKIP Streaming SVE set FPSIMD get SVE for VL 3568
4676 22:22:43.528298 # ok 2949 Set Streaming SVE VL 3584
4677 22:22:43.528615 # ok 2950 # SKIP Streaming SVE set SVE get SVE for VL 3584
4678 22:22:43.528727 # ok 2951 # SKIP Streaming SVE set SVE get FPSIMD for VL 3584
4679 22:22:43.536202 # ok 2952 # SKIP Streaming SVE set FPSIMD get SVE for VL 3584
4680 22:22:43.536341 # ok 2953 Set Streaming SVE VL 3600
4681 22:22:43.536481 # ok 2954 # SKIP Streaming SVE set SVE get SVE for VL 3600
4682 22:22:43.536597 # ok 2955 # SKIP Streaming SVE set SVE get FPSIMD for VL 3600
4683 22:22:43.536715 # ok 2956 # SKIP Streaming SVE set FPSIMD get SVE for VL 3600
4684 22:22:43.543333 # ok 2957 Set Streaming SVE VL 3616
4685 22:22:43.543661 # ok 2958 # SKIP Streaming SVE set SVE get SVE for VL 3616
4686 22:22:43.543771 # ok 2959 # SKIP Streaming SVE set SVE get FPSIMD for VL 3616
4687 22:22:43.543892 # ok 2960 # SKIP Streaming SVE set FPSIMD get SVE for VL 3616
4688 22:22:43.544012 # ok 2961 Set Streaming SVE VL 3632
4689 22:22:43.544150 # ok 2962 # SKIP Streaming SVE set SVE get SVE for VL 3632
4690 22:22:43.544308 # ok 2963 # SKIP Streaming SVE set SVE get FPSIMD for VL 3632
4691 22:22:43.544438 # ok 2964 # SKIP Streaming SVE set FPSIMD get SVE for VL 3632
4692 22:22:43.544579 # ok 2965 Set Streaming SVE VL 3648
4693 22:22:43.544681 # ok 2966 # SKIP Streaming SVE set SVE get SVE for VL 3648
4694 22:22:43.544797 # ok 2967 # SKIP Streaming SVE set SVE get FPSIMD for VL 3648
4695 22:22:43.545976 # ok 2968 # SKIP Streaming SVE set FPSIMD get SVE for VL 3648
4696 22:22:43.546274 # ok 2969 Set Streaming SVE VL 3664
4697 22:22:43.546369 # ok 2970 # SKIP Streaming SVE set SVE get SVE for VL 3664
4698 22:22:43.546479 # ok 2971 # SKIP Streaming SVE set SVE get FPSIMD for VL 3664
4699 22:22:43.546580 # ok 2972 # SKIP Streaming SVE set FPSIMD get SVE for VL 3664
4700 22:22:43.546679 # ok 2973 Set Streaming SVE VL 3680
4701 22:22:43.546773 # ok 2974 # SKIP Streaming SVE set SVE get SVE for VL 3680
4702 22:22:43.547059 # ok 2975 # SKIP Streaming SVE set SVE get FPSIMD for VL 3680
4703 22:22:43.547162 # ok 2976 # SKIP Streaming SVE set FPSIMD get SVE for VL 3680
4704 22:22:43.547260 # ok 2977 Set Streaming SVE VL 3696
4705 22:22:43.547348 # ok 2978 # SKIP Streaming SVE set SVE get SVE for VL 3696
4706 22:22:43.547439 # ok 2979 # SKIP Streaming SVE set SVE get FPSIMD for VL 3696
4707 22:22:43.547621 # ok 2980 # SKIP Streaming SVE set FPSIMD get SVE for VL 3696
4708 22:22:43.547720 # ok 2981 Set Streaming SVE VL 3712
4709 22:22:43.547813 # ok 2982 # SKIP Streaming SVE set SVE get SVE for VL 3712
4710 22:22:43.548116 # ok 2983 # SKIP Streaming SVE set SVE get FPSIMD for VL 3712
4711 22:22:43.548219 # ok 2984 # SKIP Streaming SVE set FPSIMD get SVE for VL 3712
4712 22:22:43.548343 # ok 2985 Set Streaming SVE VL 3728
4713 22:22:43.554186 # ok 2986 # SKIP Streaming SVE set SVE get SVE for VL 3728
4714 22:22:43.554622 # ok 2987 # SKIP Streaming SVE set SVE get FPSIMD for VL 3728
4715 22:22:43.554731 # ok 2988 # SKIP Streaming SVE set FPSIMD get SVE for VL 3728
4716 22:22:43.554820 # ok 2989 Set Streaming SVE VL 3744
4717 22:22:43.554904 # ok 2990 # SKIP Streaming SVE set SVE get SVE for VL 3744
4718 22:22:43.555005 # ok 2991 # SKIP Streaming SVE set SVE get FPSIMD for VL 3744
4719 22:22:43.555090 # ok 2992 # SKIP Streaming SVE set FPSIMD get SVE for VL 3744
4720 22:22:43.555174 # ok 2993 Set Streaming SVE VL 3760
4721 22:22:43.555273 # ok 2994 # SKIP Streaming SVE set SVE get SVE for VL 3760
4722 22:22:43.555358 # ok 2995 # SKIP Streaming SVE set SVE get FPSIMD for VL 3760
4723 22:22:43.555466 # ok 2996 # SKIP Streaming SVE set FPSIMD get SVE for VL 3760
4724 22:22:43.555565 # ok 2997 Set Streaming SVE VL 3776
4725 22:22:43.555862 # ok 2998 # SKIP Streaming SVE set SVE get SVE for VL 3776
4726 22:22:43.555990 # ok 2999 # SKIP Streaming SVE set SVE get FPSIMD for VL 3776
4727 22:22:43.556098 # ok 3000 # SKIP Streaming SVE set FPSIMD get SVE for VL 3776
4728 22:22:43.556199 # ok 3001 Set Streaming SVE VL 3792
4729 22:22:43.556405 # ok 3002 # SKIP Streaming SVE set SVE get SVE for VL 3792
4730 22:22:43.556729 # ok 3003 # SKIP Streaming SVE set SVE get FPSIMD for VL 3792
4731 22:22:43.556826 # ok 3004 # SKIP Streaming SVE set FPSIMD get SVE for VL 3792
4732 22:22:43.562279 # ok 3005 Set Streaming SVE VL 3808
4733 22:22:43.562877 # ok 3006 # SKIP Streaming SVE set SVE get SVE for VL 3808
4734 22:22:43.563083 # ok 3007 # SKIP Streaming SVE set SVE get FPSIMD for VL 3808
4735 22:22:43.563274 # ok 3008 # SKIP Streaming SVE set FPSIMD get SVE for VL 3808
4736 22:22:43.563487 # ok 3009 Set Streaming SVE VL 3824
4737 22:22:43.563714 # ok 3010 # SKIP Streaming SVE set SVE get SVE for VL 3824
4738 22:22:43.563951 # ok 3011 # SKIP Streaming SVE set SVE get FPSIMD for VL 3824
4739 22:22:43.564162 # ok 3012 # SKIP Streaming SVE set FPSIMD get SVE for VL 3824
4740 22:22:43.564357 # ok 3013 Set Streaming SVE VL 3840
4741 22:22:43.564522 # ok 3014 # SKIP Streaming SVE set SVE get SVE for VL 3840
4742 22:22:43.564697 # ok 3015 # SKIP Streaming SVE set SVE get FPSIMD for VL 3840
4743 22:22:43.564890 # ok 3016 # SKIP Streaming SVE set FPSIMD get SVE for VL 3840
4744 22:22:43.565025 # ok 3017 Set Streaming SVE VL 3856
4745 22:22:43.565142 # ok 3018 # SKIP Streaming SVE set SVE get SVE for VL 3856
4746 22:22:43.565287 # ok 3019 # SKIP Streaming SVE set SVE get FPSIMD for VL 3856
4747 22:22:43.565410 # ok 3020 # SKIP Streaming SVE set FPSIMD get SVE for VL 3856
4748 22:22:43.565526 # ok 3021 Set Streaming SVE VL 3872
4749 22:22:43.565642 # ok 3022 # SKIP Streaming SVE set SVE get SVE for VL 3872
4750 22:22:43.565854 # ok 3023 # SKIP Streaming SVE set SVE get FPSIMD for VL 3872
4751 22:22:43.566047 # ok 3024 # SKIP Streaming SVE set FPSIMD get SVE for VL 3872
4752 22:22:43.566233 # ok 3025 Set Streaming SVE VL 3888
4753 22:22:43.570664 # ok 3026 # SKIP Streaming SVE set SVE get SVE for VL 3888
4754 22:22:43.571731 # ok 3027 # SKIP Streaming SVE set SVE get FPSIMD for VL 3888
4755 22:22:43.572201 # ok 3028 # SKIP Streaming SVE set FPSIMD get SVE for VL 3888
4756 22:22:43.572401 # ok 3029 Set Streaming SVE VL 3904
4757 22:22:43.572578 # ok 3030 # SKIP Streaming SVE set SVE get SVE for VL 3904
4758 22:22:43.572786 # ok 3031 # SKIP Streaming SVE set SVE get FPSIMD for VL 3904
4759 22:22:43.572946 # ok 3032 # SKIP Streaming SVE set FPSIMD get SVE for VL 3904
4760 22:22:43.573094 # ok 3033 Set Streaming SVE VL 3920
4761 22:22:43.573238 # ok 3034 # SKIP Streaming SVE set SVE get SVE for VL 3920
4762 22:22:43.573596 # ok 3035 # SKIP Streaming SVE set SVE get FPSIMD for VL 3920
4763 22:22:43.573728 # ok 3036 # SKIP Streaming SVE set FPSIMD get SVE for VL 3920
4764 22:22:43.573822 # ok 3037 Set Streaming SVE VL 3936
4765 22:22:43.573924 # ok 3038 # SKIP Streaming SVE set SVE get SVE for VL 3936
4766 22:22:43.574262 # ok 3039 # SKIP Streaming SVE set SVE get FPSIMD for VL 3936
4767 22:22:43.574501 # ok 3040 # SKIP Streaming SVE set FPSIMD get SVE for VL 3936
4768 22:22:43.574700 # ok 3041 Set Streaming SVE VL 3952
4769 22:22:43.574879 # ok 3042 # SKIP Streaming SVE set SVE get SVE for VL 3952
4770 22:22:43.575066 # ok 3043 # SKIP Streaming SVE set SVE get FPSIMD for VL 3952
4771 22:22:43.575209 # ok 3044 # SKIP Streaming SVE set FPSIMD get SVE for VL 3952
4772 22:22:43.575366 # ok 3045 Set Streaming SVE VL 3968
4773 22:22:43.575525 # ok 3046 # SKIP Streaming SVE set SVE get SVE for VL 3968
4774 22:22:43.575769 # ok 3047 # SKIP Streaming SVE set SVE get FPSIMD for VL 3968
4775 22:22:43.575977 # ok 3048 # SKIP Streaming SVE set FPSIMD get SVE for VL 3968
4776 22:22:43.576185 # ok 3049 Set Streaming SVE VL 3984
4777 22:22:43.576386 # ok 3050 # SKIP Streaming SVE set SVE get SVE for VL 3984
4778 22:22:43.576600 # ok 3051 # SKIP Streaming SVE set SVE get FPSIMD for VL 3984
4779 22:22:43.576777 # ok 3052 # SKIP Streaming SVE set FPSIMD get SVE for VL 3984
4780 22:22:43.576931 # ok 3053 Set Streaming SVE VL 4000
4781 22:22:43.577051 # ok 3054 # SKIP Streaming SVE set SVE get SVE for VL 4000
4782 22:22:43.577166 # ok 3055 # SKIP Streaming SVE set SVE get FPSIMD for VL 4000
4783 22:22:43.577281 # ok 3056 # SKIP Streaming SVE set FPSIMD get SVE for VL 4000
4784 22:22:43.577394 # ok 3057 Set Streaming SVE VL 4016
4785 22:22:43.577536 # ok 3058 # SKIP Streaming SVE set SVE get SVE for VL 4016
4786 22:22:43.584831 # ok 3059 # SKIP Streaming SVE set SVE get FPSIMD for VL 4016
4787 22:22:43.591047 # ok 3060 # SKIP Streaming SVE set FPSIMD get SVE for VL 4016
4788 22:22:43.591376 # ok 3061 Set Streaming SVE VL 4032
4789 22:22:43.591597 # ok 3062 # SKIP Streaming SVE set SVE get SVE for VL 4032
4790 22:22:43.591847 # ok 3063 # SKIP Streaming SVE set SVE get FPSIMD for VL 4032
4791 22:22:43.592066 # ok 3064 # SKIP Streaming SVE set FPSIMD get SVE for VL 4032
4792 22:22:43.592273 # ok 3065 Set Streaming SVE VL 4048
4793 22:22:43.592449 # ok 3066 # SKIP Streaming SVE set SVE get SVE for VL 4048
4794 22:22:43.592649 # ok 3067 # SKIP Streaming SVE set SVE get FPSIMD for VL 4048
4795 22:22:43.592826 # ok 3068 # SKIP Streaming SVE set FPSIMD get SVE for VL 4048
4796 22:22:43.592962 # ok 3069 Set Streaming SVE VL 4064
4797 22:22:43.593081 # ok 3070 # SKIP Streaming SVE set SVE get SVE for VL 4064
4798 22:22:43.593200 # ok 3071 # SKIP Streaming SVE set SVE get FPSIMD for VL 4064
4799 22:22:43.593317 # ok 3072 # SKIP Streaming SVE set FPSIMD get SVE for VL 4064
4800 22:22:43.593459 # ok 3073 Set Streaming SVE VL 4080
4801 22:22:43.598432 # ok 3074 # SKIP Streaming SVE set SVE get SVE for VL 4080
4802 22:22:43.598838 # ok 3075 # SKIP Streaming SVE set SVE get FPSIMD for VL 4080
4803 22:22:43.598944 # ok 3076 # SKIP Streaming SVE set FPSIMD get SVE for VL 4080
4804 22:22:43.599033 # ok 3077 Set Streaming SVE VL 4096
4805 22:22:43.599118 # ok 3078 # SKIP Streaming SVE set SVE get SVE for VL 4096
4806 22:22:43.599218 # ok 3079 # SKIP Streaming SVE set SVE get FPSIMD for VL 4096
4807 22:22:43.599305 # ok 3080 # SKIP Streaming SVE set FPSIMD get SVE for VL 4096
4808 22:22:43.599390 # ok 3081 Set Streaming SVE VL 4112
4809 22:22:43.599679 # ok 3082 # SKIP Streaming SVE set SVE get SVE for VL 4112
4810 22:22:43.599782 # ok 3083 # SKIP Streaming SVE set SVE get FPSIMD for VL 4112
4811 22:22:43.599869 # ok 3084 # SKIP Streaming SVE set FPSIMD get SVE for VL 4112
4812 22:22:43.599970 # ok 3085 Set Streaming SVE VL 4128
4813 22:22:43.600300 # ok 3086 # SKIP Streaming SVE set SVE get SVE for VL 4128
4814 22:22:43.600504 # ok 3087 # SKIP Streaming SVE set SVE get FPSIMD for VL 4128
4815 22:22:43.600692 # ok 3088 # SKIP Streaming SVE set FPSIMD get SVE for VL 4128
4816 22:22:43.600896 # ok 3089 Set Streaming SVE VL 4144
4817 22:22:43.601032 # ok 3090 # SKIP Streaming SVE set SVE get SVE for VL 4144
4818 22:22:43.601152 # ok 3091 # SKIP Streaming SVE set SVE get FPSIMD for VL 4144
4819 22:22:43.601269 # ok 3092 # SKIP Streaming SVE set FPSIMD get SVE for VL 4144
4820 22:22:43.606275 # ok 3093 Set Streaming SVE VL 4160
4821 22:22:43.606739 # ok 3094 # SKIP Streaming SVE set SVE get SVE for VL 4160
4822 22:22:43.606938 # ok 3095 # SKIP Streaming SVE set SVE get FPSIMD for VL 4160
4823 22:22:43.607109 # ok 3096 # SKIP Streaming SVE set FPSIMD get SVE for VL 4160
4824 22:22:43.607264 # ok 3097 Set Streaming SVE VL 4176
4825 22:22:43.607441 # ok 3098 # SKIP Streaming SVE set SVE get SVE for VL 4176
4826 22:22:43.607649 # ok 3099 # SKIP Streaming SVE set SVE get FPSIMD for VL 4176
4827 22:22:43.607848 # ok 3100 # SKIP Streaming SVE set FPSIMD get SVE for VL 4176
4828 22:22:43.608007 # ok 3101 Set Streaming SVE VL 4192
4829 22:22:43.608163 # ok 3102 # SKIP Streaming SVE set SVE get SVE for VL 4192
4830 22:22:43.608362 # ok 3103 # SKIP Streaming SVE set SVE get FPSIMD for VL 4192
4831 22:22:43.608563 # ok 3104 # SKIP Streaming SVE set FPSIMD get SVE for VL 4192
4832 22:22:43.608758 # ok 3105 Set Streaming SVE VL 4208
4833 22:22:43.608900 # ok 3106 # SKIP Streaming SVE set SVE get SVE for VL 4208
4834 22:22:43.609017 # ok 3107 # SKIP Streaming SVE set SVE get FPSIMD for VL 4208
4835 22:22:43.609132 # ok 3108 # SKIP Streaming SVE set FPSIMD get SVE for VL 4208
4836 22:22:43.609246 # ok 3109 Set Streaming SVE VL 4224
4837 22:22:43.609361 # ok 3110 # SKIP Streaming SVE set SVE get SVE for VL 4224
4838 22:22:43.609503 # ok 3111 # SKIP Streaming SVE set SVE get FPSIMD for VL 4224
4839 22:22:43.609625 # ok 3112 # SKIP Streaming SVE set FPSIMD get SVE for VL 4224
4840 22:22:43.609821 # ok 3113 Set Streaming SVE VL 4240
4841 22:22:43.610016 # ok 3114 # SKIP Streaming SVE set SVE get SVE for VL 4240
4842 22:22:43.614662 # ok 3115 # SKIP Streaming SVE set SVE get FPSIMD for VL 4240
4843 22:22:43.614823 # ok 3116 # SKIP Streaming SVE set FPSIMD get SVE for VL 4240
4844 22:22:43.614915 # ok 3117 Set Streaming SVE VL 4256
4845 22:22:43.615015 # ok 3118 # SKIP Streaming SVE set SVE get SVE for VL 4256
4846 22:22:43.615103 # ok 3119 # SKIP Streaming SVE set SVE get FPSIMD for VL 4256
4847 22:22:43.615203 # ok 3120 # SKIP Streaming SVE set FPSIMD get SVE for VL 4256
4848 22:22:43.615538 # ok 3121 Set Streaming SVE VL 4272
4849 22:22:43.615755 # ok 3122 # SKIP Streaming SVE set SVE get SVE for VL 4272
4850 22:22:43.615978 # ok 3123 # SKIP Streaming SVE set SVE get FPSIMD for VL 4272
4851 22:22:43.616147 # ok 3124 # SKIP Streaming SVE set FPSIMD get SVE for VL 4272
4852 22:22:43.616305 # ok 3125 Set Streaming SVE VL 4288
4853 22:22:43.616500 # ok 3126 # SKIP Streaming SVE set SVE get SVE for VL 4288
4854 22:22:43.616686 # ok 3127 # SKIP Streaming SVE set SVE get FPSIMD for VL 4288
4855 22:22:43.616838 # ok 3128 # SKIP Streaming SVE set FPSIMD get SVE for VL 4288
4856 22:22:43.616957 # ok 3129 Set Streaming SVE VL 4304
4857 22:22:43.617096 # ok 3130 # SKIP Streaming SVE set SVE get SVE for VL 4304
4858 22:22:43.617218 # ok 3131 # SKIP Streaming SVE set SVE get FPSIMD for VL 4304
4859 22:22:43.622162 # ok 3132 # SKIP Streaming SVE set FPSIMD get SVE for VL 4304
4860 22:22:43.622528 # ok 3133 Set Streaming SVE VL 4320
4861 22:22:43.622678 # ok 3134 # SKIP Streaming SVE set SVE get SVE for VL 4320
4862 22:22:43.622799 # ok 3135 # SKIP Streaming SVE set SVE get FPSIMD for VL 4320
4863 22:22:43.622940 # ok 3136 # SKIP Streaming SVE set FPSIMD get SVE for VL 4320
4864 22:22:43.623045 # ok 3137 Set Streaming SVE VL 4336
4865 22:22:43.623157 # ok 3138 # SKIP Streaming SVE set SVE get SVE for VL 4336
4866 22:22:43.623266 # ok 3139 # SKIP Streaming SVE set SVE get FPSIMD for VL 4336
4867 22:22:43.623368 # ok 3140 # SKIP Streaming SVE set FPSIMD get SVE for VL 4336
4868 22:22:43.623480 # ok 3141 Set Streaming SVE VL 4352
4869 22:22:43.623576 # ok 3142 # SKIP Streaming SVE set SVE get SVE for VL 4352
4870 22:22:43.623689 # ok 3143 # SKIP Streaming SVE set SVE get FPSIMD for VL 4352
4871 22:22:43.623806 # ok 3144 # SKIP Streaming SVE set FPSIMD get SVE for VL 4352
4872 22:22:43.623927 # ok 3145 Set Streaming SVE VL 4368
4873 22:22:43.624055 # ok 3146 # SKIP Streaming SVE set SVE get SVE for VL 4368
4874 22:22:43.624416 # ok 3147 # SKIP Streaming SVE set SVE get FPSIMD for VL 4368
4875 22:22:43.624649 # ok 3148 # SKIP Streaming SVE set FPSIMD get SVE for VL 4368
4876 22:22:43.624811 # ok 3149 Set Streaming SVE VL 4384
4877 22:22:43.624985 # ok 3150 # SKIP Streaming SVE set SVE get SVE for VL 4384
4878 22:22:43.625789 # ok 3151 # SKIP Streaming SVE set SVE get FPSIMD for VL 4384
4879 22:22:43.625956 # ok 3152 # SKIP Streaming SVE set FPSIMD get SVE for VL 4384
4880 22:22:43.626089 # ok 3153 Set Streaming SVE VL 4400
4881 22:22:43.626215 # ok 3154 # SKIP Streaming SVE set SVE get SVE for VL 4400
4882 22:22:43.626357 # ok 3155 # SKIP Streaming SVE set SVE get FPSIMD for VL 4400
4883 22:22:43.626508 # ok 3156 # SKIP Streaming SVE set FPSIMD get SVE for VL 4400
4884 22:22:43.626655 # ok 3157 Set Streaming SVE VL 4416
4885 22:22:43.626789 # ok 3158 # SKIP Streaming SVE set SVE get SVE for VL 4416
4886 22:22:43.627139 # ok 3159 # SKIP Streaming SVE set SVE get FPSIMD for VL 4416
4887 22:22:43.627276 # ok 3160 # SKIP Streaming SVE set FPSIMD get SVE for VL 4416
4888 22:22:43.627391 # ok 3161 Set Streaming SVE VL 4432
4889 22:22:43.627843 # ok 3162 # SKIP Streaming SVE set SVE get SVE for VL 4432
4890 22:22:43.627954 # ok 3163 # SKIP Streaming SVE set SVE get FPSIMD for VL 4432
4891 22:22:43.628053 # ok 3164 # SKIP Streaming SVE set FPSIMD get SVE for VL 4432
4892 22:22:43.628159 # ok 3165 Set Streaming SVE VL 4448
4893 22:22:43.628459 # ok 3166 # SKIP Streaming SVE set SVE get SVE for VL 4448
4894 22:22:43.628582 # ok 3167 # SKIP Streaming SVE set SVE get FPSIMD for VL 4448
4895 22:22:43.628679 # ok 3168 # SKIP Streaming SVE set FPSIMD get SVE for VL 4448
4896 22:22:43.628789 # ok 3169 Set Streaming SVE VL 4464
4897 22:22:43.628881 # ok 3170 # SKIP Streaming SVE set SVE get SVE for VL 4464
4898 22:22:43.632672 # ok 3171 # SKIP Streaming SVE set SVE get FPSIMD for VL 4464
4899 22:22:43.638623 # ok 3172 # SKIP Streaming SVE set FPSIMD get SVE for VL 4464
4900 22:22:43.639057 # ok 3173 Set Streaming SVE VL 4480
4901 22:22:43.639225 # ok 3174 # SKIP Streaming SVE set SVE get SVE for VL 4480
4902 22:22:43.639349 # ok 3175 # SKIP Streaming SVE set SVE get FPSIMD for VL 4480
4903 22:22:43.639488 # ok 3176 # SKIP Streaming SVE set FPSIMD get SVE for VL 4480
4904 22:22:43.639958 # ok 3177 Set Streaming SVE VL 4496
4905 22:22:43.640391 # ok 3178 # SKIP Streaming SVE set SVE get SVE for VL 4496
4906 22:22:43.640570 # ok 3179 # SKIP Streaming SVE set SVE get FPSIMD for VL 4496
4907 22:22:43.640773 # ok 3180 # SKIP Streaming SVE set FPSIMD get SVE for VL 4496
4908 22:22:43.640988 # ok 3181 Set Streaming SVE VL 4512
4909 22:22:43.641131 # ok 3182 # SKIP Streaming SVE set SVE get SVE for VL 4512
4910 22:22:43.641252 # ok 3183 # SKIP Streaming SVE set SVE get FPSIMD for VL 4512
4911 22:22:43.646173 # ok 3184 # SKIP Streaming SVE set FPSIMD get SVE for VL 4512
4912 22:22:43.646411 # ok 3185 Set Streaming SVE VL 4528
4913 22:22:43.646718 # ok 3186 # SKIP Streaming SVE set SVE get SVE for VL 4528
4914 22:22:43.646823 # ok 3187 # SKIP Streaming SVE set SVE get FPSIMD for VL 4528
4915 22:22:43.646911 # ok 3188 # SKIP Streaming SVE set FPSIMD get SVE for VL 4528
4916 22:22:43.646999 # ok 3189 Set Streaming SVE VL 4544
4917 22:22:43.647103 # ok 3190 # SKIP Streaming SVE set SVE get SVE for VL 4544
4918 22:22:43.647198 # ok 3191 # SKIP Streaming SVE set SVE get FPSIMD for VL 4544
4919 22:22:43.647302 # ok 3192 # SKIP Streaming SVE set FPSIMD get SVE for VL 4544
4920 22:22:43.647391 # ok 3193 Set Streaming SVE VL 4560
4921 22:22:43.647492 # ok 3194 # SKIP Streaming SVE set SVE get SVE for VL 4560
4922 22:22:43.647595 # ok 3195 # SKIP Streaming SVE set SVE get FPSIMD for VL 4560
4923 22:22:43.647895 # ok 3196 # SKIP Streaming SVE set FPSIMD get SVE for VL 4560
4924 22:22:43.648015 # ok 3197 Set Streaming SVE VL 4576
4925 22:22:43.648118 # ok 3198 # SKIP Streaming SVE set SVE get SVE for VL 4576
4926 22:22:43.648225 # ok 3199 # SKIP Streaming SVE set SVE get FPSIMD for VL 4576
4927 22:22:43.648530 # ok 3200 # SKIP Streaming SVE set FPSIMD get SVE for VL 4576
4928 22:22:43.648635 # ok 3201 Set Streaming SVE VL 4592
4929 22:22:43.648736 # ok 3202 # SKIP Streaming SVE set SVE get SVE for VL 4592
4930 22:22:43.658210 # ok 3203 # SKIP Streaming SVE set SVE get FPSIMD for VL 4592
4931 22:22:43.658670 # ok 3204 # SKIP Streaming SVE set FPSIMD get SVE for VL 4592
4932 22:22:43.658776 # ok 3205 Set Streaming SVE VL 4608
4933 22:22:43.658864 # ok 3206 # SKIP Streaming SVE set SVE get SVE for VL 4608
4934 22:22:43.658952 # ok 3207 # SKIP Streaming SVE set SVE get FPSIMD for VL 4608
4935 22:22:43.659055 # ok 3208 # SKIP Streaming SVE set FPSIMD get SVE for VL 4608
4936 22:22:43.659146 # ok 3209 Set Streaming SVE VL 4624
4937 22:22:43.659252 # ok 3210 # SKIP Streaming SVE set SVE get SVE for VL 4624
4938 22:22:43.659356 # ok 3211 # SKIP Streaming SVE set SVE get FPSIMD for VL 4624
4939 22:22:43.659658 # ok 3212 # SKIP Streaming SVE set FPSIMD get SVE for VL 4624
4940 22:22:43.659763 # ok 3213 Set Streaming SVE VL 4640
4941 22:22:43.659866 # ok 3214 # SKIP Streaming SVE set SVE get SVE for VL 4640
4942 22:22:43.660162 # ok 3215 # SKIP Streaming SVE set SVE get FPSIMD for VL 4640
4943 22:22:43.660264 # ok 3216 # SKIP Streaming SVE set FPSIMD get SVE for VL 4640
4944 22:22:43.660353 # ok 3217 Set Streaming SVE VL 4656
4945 22:22:43.660453 # ok 3218 # SKIP Streaming SVE set SVE get SVE for VL 4656
4946 22:22:43.660556 # ok 3219 # SKIP Streaming SVE set SVE get FPSIMD for VL 4656
4947 22:22:43.660846 # ok 3220 # SKIP Streaming SVE set FPSIMD get SVE for VL 4656
4948 22:22:43.667896 # ok 3221 Set Streaming SVE VL 4672
4949 22:22:43.668186 # ok 3222 # SKIP Streaming SVE set SVE get SVE for VL 4672
4950 22:22:43.668351 # ok 3223 # SKIP Streaming SVE set SVE get FPSIMD for VL 4672
4951 22:22:43.668517 # ok 3224 # SKIP Streaming SVE set FPSIMD get SVE for VL 4672
4952 22:22:43.668692 # ok 3225 Set Streaming SVE VL 4688
4953 22:22:43.668827 # ok 3226 # SKIP Streaming SVE set SVE get SVE for VL 4688
4954 22:22:43.668943 # ok 3227 # SKIP Streaming SVE set SVE get FPSIMD for VL 4688
4955 22:22:43.669057 # ok 3228 # SKIP Streaming SVE set FPSIMD get SVE for VL 4688
4956 22:22:43.669199 # ok 3229 Set Streaming SVE VL 4704
4957 22:22:43.669341 # ok 3230 # SKIP Streaming SVE set SVE get SVE for VL 4704
4958 22:22:43.669527 # ok 3231 # SKIP Streaming SVE set SVE get FPSIMD for VL 4704
4959 22:22:43.669740 # ok 3232 # SKIP Streaming SVE set FPSIMD get SVE for VL 4704
4960 22:22:43.669905 # ok 3233 Set Streaming SVE VL 4720
4961 22:22:43.670086 # ok 3234 # SKIP Streaming SVE set SVE get SVE for VL 4720
4962 22:22:43.670319 # ok 3235 # SKIP Streaming SVE set SVE get FPSIMD for VL 4720
4963 22:22:43.670486 # ok 3236 # SKIP Streaming SVE set FPSIMD get SVE for VL 4720
4964 22:22:43.670683 # ok 3237 Set Streaming SVE VL 4736
4965 22:22:43.670886 # ok 3238 # SKIP Streaming SVE set SVE get SVE for VL 4736
4966 22:22:43.671132 # ok 3239 # SKIP Streaming SVE set SVE get FPSIMD for VL 4736
4967 22:22:43.671335 # ok 3240 # SKIP Streaming SVE set FPSIMD get SVE for VL 4736
4968 22:22:43.671494 # ok 3241 Set Streaming SVE VL 4752
4969 22:22:43.671664 # ok 3242 # SKIP Streaming SVE set SVE get SVE for VL 4752
4970 22:22:43.671828 # ok 3243 # SKIP Streaming SVE set SVE get FPSIMD for VL 4752
4971 22:22:43.672034 # ok 3244 # SKIP Streaming SVE set FPSIMD get SVE for VL 4752
4972 22:22:43.672207 # ok 3245 Set Streaming SVE VL 4768
4973 22:22:43.672399 # ok 3246 # SKIP Streaming SVE set SVE get SVE for VL 4768
4974 22:22:43.672560 # ok 3247 # SKIP Streaming SVE set SVE get FPSIMD for VL 4768
4975 22:22:43.672750 # ok 3248 # SKIP Streaming SVE set FPSIMD get SVE for VL 4768
4976 22:22:43.672909 # ok 3249 Set Streaming SVE VL 4784
4977 22:22:43.673039 # ok 3250 # SKIP Streaming SVE set SVE get SVE for VL 4784
4978 22:22:43.673155 # ok 3251 # SKIP Streaming SVE set SVE get FPSIMD for VL 4784
4979 22:22:43.673269 # ok 3252 # SKIP Streaming SVE set FPSIMD get SVE for VL 4784
4980 22:22:43.673382 # ok 3253 Set Streaming SVE VL 4800
4981 22:22:43.673496 # ok 3254 # SKIP Streaming SVE set SVE get SVE for VL 4800
4982 22:22:43.673639 # ok 3255 # SKIP Streaming SVE set SVE get FPSIMD for VL 4800
4983 22:22:43.674115 # ok 3256 # SKIP Streaming SVE set FPSIMD get SVE for VL 4800
4984 22:22:43.674316 # ok 3257 Set Streaming SVE VL 4816
4985 22:22:43.693888 # ok 3258 # SKIP Streaming SVE set SVE get SVE for VL 4816
4986 22:22:43.694506 # ok 3259 # SKIP Streaming SVE set SVE get FPSIMD for VL 4816
4987 22:22:43.694706 # ok 3260 # SKIP Streaming SVE set FPSIMD get SVE for VL 4816
4988 22:22:43.694871 # ok 3261 Set Streaming SVE VL 4832
4989 22:22:43.695030 # ok 3262 # SKIP Streaming SVE set SVE get SVE for VL 4832
4990 22:22:43.695189 # ok 3263 # SKIP Streaming SVE set SVE get FPSIMD for VL 4832
4991 22:22:43.695383 # ok 3264 # SKIP Streaming SVE set FPSIMD get SVE for VL 4832
4992 22:22:43.695546 # ok 3265 Set Streaming SVE VL 4848
4993 22:22:43.695999 # ok 3266 # SKIP Streaming SVE set SVE get SVE for VL 4848
4994 22:22:43.696179 # ok 3267 # SKIP Streaming SVE set SVE get FPSIMD for VL 4848
4995 22:22:43.696325 # ok 3268 # SKIP Streaming SVE set FPSIMD get SVE for VL 4848
4996 22:22:43.696467 # ok 3269 Set Streaming SVE VL 4864
4997 22:22:43.696628 # ok 3270 # SKIP Streaming SVE set SVE get SVE for VL 4864
4998 22:22:43.696810 # ok 3271 # SKIP Streaming SVE set SVE get FPSIMD for VL 4864
4999 22:22:43.696936 # ok 3272 # SKIP Streaming SVE set FPSIMD get SVE for VL 4864
5000 22:22:43.697056 # ok 3273 Set Streaming SVE VL 4880
5001 22:22:43.697173 # ok 3274 # SKIP Streaming SVE set SVE get SVE for VL 4880
5002 22:22:43.697291 # ok 3275 # SKIP Streaming SVE set SVE get FPSIMD for VL 4880
5003 22:22:43.697420 # ok 3276 # SKIP Streaming SVE set FPSIMD get SVE for VL 4880
5004 22:22:43.697541 # ok 3277 Set Streaming SVE VL 4896
5005 22:22:43.697676 # ok 3278 # SKIP Streaming SVE set SVE get SVE for VL 4896
5006 22:22:43.697829 # ok 3279 # SKIP Streaming SVE set SVE get FPSIMD for VL 4896
5007 22:22:43.714691 # ok 3280 # SKIP Streaming SVE set FPSIMD get SVE for VL 4896
5008 22:22:43.715353 # ok 3281 Set Streaming SVE VL 4912
5009 22:22:43.715568 # ok 3282 # SKIP Streaming SVE set SVE get SVE for VL 4912
5010 22:22:43.715917 # ok 3283 # SKIP Streaming SVE set SVE get FPSIMD for VL 4912
5011 22:22:43.716121 # ok 3284 # SKIP Streaming SVE set FPSIMD get SVE for VL 4912
5012 22:22:43.716344 # ok 3285 Set Streaming SVE VL 4928
5013 22:22:43.716520 # ok 3286 # SKIP Streaming SVE set SVE get SVE for VL 4928
5014 22:22:43.716717 # ok 3287 # SKIP Streaming SVE set SVE get FPSIMD for VL 4928
5015 22:22:43.716868 # ok 3288 # SKIP Streaming SVE set FPSIMD get SVE for VL 4928
5016 22:22:43.716988 # ok 3289 Set Streaming SVE VL 4944
5017 22:22:43.717103 # ok 3290 # SKIP Streaming SVE set SVE get SVE for VL 4944
5018 22:22:43.717242 # ok 3291 # SKIP Streaming SVE set SVE get FPSIMD for VL 4944
5019 22:22:43.717376 # ok 3292 # SKIP Streaming SVE set FPSIMD get SVE for VL 4944
5020 22:22:43.717523 # ok 3293 Set Streaming SVE VL 4960
5021 22:22:43.730855 # ok 3294 # SKIP Streaming SVE set SVE get SVE for VL 4960
5022 22:22:43.731483 # ok 3295 # SKIP Streaming SVE set SVE get FPSIMD for VL 4960
5023 22:22:43.731695 # ok 3296 # SKIP Streaming SVE set FPSIMD get SVE for VL 4960
5024 22:22:43.731890 # ok 3297 Set Streaming SVE VL 4976
5025 22:22:43.732127 # ok 3298 # SKIP Streaming SVE set SVE get SVE for VL 4976
5026 22:22:43.732353 # ok 3299 # SKIP Streaming SVE set SVE get FPSIMD for VL 4976
5027 22:22:43.732509 # ok 3300 # SKIP Streaming SVE set FPSIMD get SVE for VL 4976
5028 22:22:43.732682 # ok 3301 Set Streaming SVE VL 4992
5029 22:22:43.732836 # ok 3302 # SKIP Streaming SVE set SVE get SVE for VL 4992
5030 22:22:43.732987 # ok 3303 # SKIP Streaming SVE set SVE get FPSIMD for VL 4992
5031 22:22:43.733108 # ok 3304 # SKIP Streaming SVE set FPSIMD get SVE for VL 4992
5032 22:22:43.733225 # ok 3305 Set Streaming SVE VL 5008
5033 22:22:43.733363 # ok 3306 # SKIP Streaming SVE set SVE get SVE for VL 5008
5034 22:22:43.746162 # ok 3307 # SKIP Streaming SVE set SVE get FPSIMD for VL 5008
5035 22:22:43.746745 # ok 3308 # SKIP Streaming SVE set FPSIMD get SVE for VL 5008
5036 22:22:43.746964 # ok 3309 Set Streaming SVE VL 5024
5037 22:22:43.747188 # ok 3310 # SKIP Streaming SVE set SVE get SVE for VL 5024
5038 22:22:43.747391 # ok 3311 # SKIP Streaming SVE set SVE get FPSIMD for VL 5024
5039 22:22:43.747638 # ok 3312 # SKIP Streaming SVE set FPSIMD get SVE for VL 5024
5040 22:22:43.747847 # ok 3313 Set Streaming SVE VL 5040
5041 22:22:43.748051 # ok 3314 # SKIP Streaming SVE set SVE get SVE for VL 5040
5042 22:22:43.748271 # ok 3315 # SKIP Streaming SVE set SVE get FPSIMD for VL 5040
5043 22:22:43.748496 # ok 3316 # SKIP Streaming SVE set FPSIMD get SVE for VL 5040
5044 22:22:43.748710 # ok 3317 Set Streaming SVE VL 5056
5045 22:22:43.748869 # ok 3318 # SKIP Streaming SVE set SVE get SVE for VL 5056
5046 22:22:43.748990 # ok 3319 # SKIP Streaming SVE set SVE get FPSIMD for VL 5056
5047 22:22:43.749107 # ok 3320 # SKIP Streaming SVE set FPSIMD get SVE for VL 5056
5048 22:22:43.749223 # ok 3321 Set Streaming SVE VL 5072
5049 22:22:43.749337 # ok 3322 # SKIP Streaming SVE set SVE get SVE for VL 5072
5050 22:22:43.749477 # ok 3323 # SKIP Streaming SVE set SVE get FPSIMD for VL 5072
5051 22:22:43.762467 # ok 3324 # SKIP Streaming SVE set FPSIMD get SVE for VL 5072
5052 22:22:43.762906 # ok 3325 Set Streaming SVE VL 5088
5053 22:22:43.763044 # ok 3326 # SKIP Streaming SVE set SVE get SVE for VL 5088
5054 22:22:43.764286 # ok 3327 # SKIP Streaming SVE set SVE get FPSIMD for VL 5088
5055 22:22:43.764463 # ok 3328 # SKIP Streaming SVE set FPSIMD get SVE for VL 5088
5056 22:22:43.764632 # ok 3329 Set Streaming SVE VL 5104
5057 22:22:43.764771 # ok 3330 # SKIP Streaming SVE set SVE get SVE for VL 5104
5058 22:22:43.764914 # ok 3331 # SKIP Streaming SVE set SVE get FPSIMD for VL 5104
5059 22:22:43.778495 # ok 3332 # SKIP Streaming SVE set FPSIMD get SVE for VL 5104
5060 22:22:43.778603 # ok 3333 Set Streaming SVE VL 5120
5061 22:22:43.778691 # ok 3334 # SKIP Streaming SVE set SVE get SVE for VL 5120
5062 22:22:43.778793 # ok 3335 # SKIP Streaming SVE set SVE get FPSIMD for VL 5120
5063 22:22:43.778882 # ok 3336 # SKIP Streaming SVE set FPSIMD get SVE for VL 5120
5064 22:22:43.778967 # ok 3337 Set Streaming SVE VL 5136
5065 22:22:43.779066 # ok 3338 # SKIP Streaming SVE set SVE get SVE for VL 5136
5066 22:22:43.779351 # ok 3339 # SKIP Streaming SVE set SVE get FPSIMD for VL 5136
5067 22:22:43.779455 # ok 3340 # SKIP Streaming SVE set FPSIMD get SVE for VL 5136
5068 22:22:43.779543 # ok 3341 Set Streaming SVE VL 5152
5069 22:22:43.779640 # ok 3342 # SKIP Streaming SVE set SVE get SVE for VL 5152
5070 22:22:43.779923 # ok 3343 # SKIP Streaming SVE set SVE get FPSIMD for VL 5152
5071 22:22:43.780026 # ok 3344 # SKIP Streaming SVE set FPSIMD get SVE for VL 5152
5072 22:22:43.780126 # ok 3345 Set Streaming SVE VL 5168
5073 22:22:43.780408 # ok 3346 # SKIP Streaming SVE set SVE get SVE for VL 5168
5074 22:22:43.780511 # ok 3347 # SKIP Streaming SVE set SVE get FPSIMD for VL 5168
5075 22:22:43.780802 # ok 3348 # SKIP Streaming SVE set FPSIMD get SVE for VL 5168
5076 22:22:43.792808 # ok 3349 Set Streaming SVE VL 5184
5077 22:22:43.796053 # ok 3350 # SKIP Streaming SVE set SVE get SVE for VL 5184
5078 22:22:43.796249 # ok 3351 # SKIP Streaming SVE set SVE get FPSIMD for VL 5184
5079 22:22:43.796682 # ok 3352 # SKIP Streaming SVE set FPSIMD get SVE for VL 5184
5080 22:22:43.796836 # ok 3353 Set Streaming SVE VL 5200
5081 22:22:43.796959 # ok 3354 # SKIP Streaming SVE set SVE get SVE for VL 5200
5082 22:22:43.797078 # ok 3355 # SKIP Streaming SVE set SVE get FPSIMD for VL 5200
5083 22:22:43.797196 # ok 3356 # SKIP Streaming SVE set FPSIMD get SVE for VL 5200
5084 22:22:43.800067 # ok 3357 Set Streaming SVE VL 5216
5085 22:22:43.800257 # ok 3358 # SKIP Streaming SVE set SVE get SVE for VL 5216
5086 22:22:43.800438 # ok 3359 # SKIP Streaming SVE set SVE get FPSIMD for VL 5216
5087 22:22:43.800596 # ok 3360 # SKIP Streaming SVE set FPSIMD get SVE for VL 5216
5088 22:22:43.800772 # ok 3361 Set Streaming SVE VL 5232
5089 22:22:43.800897 # ok 3362 # SKIP Streaming SVE set SVE get SVE for VL 5232
5090 22:22:43.806496 # ok 3363 # SKIP Streaming SVE set SVE get FPSIMD for VL 5232
5091 22:22:43.806931 # ok 3364 # SKIP Streaming SVE set FPSIMD get SVE for VL 5232
5092 22:22:43.807128 # ok 3365 Set Streaming SVE VL 5248
5093 22:22:43.807299 # ok 3366 # SKIP Streaming SVE set SVE get SVE for VL 5248
5094 22:22:43.807493 # ok 3367 # SKIP Streaming SVE set SVE get FPSIMD for VL 5248
5095 22:22:43.807666 # ok 3368 # SKIP Streaming SVE set FPSIMD get SVE for VL 5248
5096 22:22:43.807827 # ok 3369 Set Streaming SVE VL 5264
5097 22:22:43.808016 # ok 3370 # SKIP Streaming SVE set SVE get SVE for VL 5264
5098 22:22:43.808232 # ok 3371 # SKIP Streaming SVE set SVE get FPSIMD for VL 5264
5099 22:22:43.808440 # ok 3372 # SKIP Streaming SVE set FPSIMD get SVE for VL 5264
5100 22:22:43.808634 # ok 3373 Set Streaming SVE VL 5280
5101 22:22:43.808802 # ok 3374 # SKIP Streaming SVE set SVE get SVE for VL 5280
5102 22:22:43.808930 # ok 3375 # SKIP Streaming SVE set SVE get FPSIMD for VL 5280
5103 22:22:43.809045 # ok 3376 # SKIP Streaming SVE set FPSIMD get SVE for VL 5280
5104 22:22:43.809157 # ok 3377 Set Streaming SVE VL 5296
5105 22:22:43.809269 # ok 3378 # SKIP Streaming SVE set SVE get SVE for VL 5296
5106 22:22:43.809408 # ok 3379 # SKIP Streaming SVE set SVE get FPSIMD for VL 5296
5107 22:22:43.809528 # ok 3380 # SKIP Streaming SVE set FPSIMD get SVE for VL 5296
5108 22:22:43.818770 # ok 3381 Set Streaming SVE VL 5312
5109 22:22:43.819209 # ok 3382 # SKIP Streaming SVE set SVE get SVE for VL 5312
5110 22:22:43.819315 # ok 3383 # SKIP Streaming SVE set SVE get FPSIMD for VL 5312
5111 22:22:43.819416 # ok 3384 # SKIP Streaming SVE set FPSIMD get SVE for VL 5312
5112 22:22:43.819501 # ok 3385 Set Streaming SVE VL 5328
5113 22:22:43.819597 # ok 3386 # SKIP Streaming SVE set SVE get SVE for VL 5328
5114 22:22:43.819693 # ok 3387 # SKIP Streaming SVE set SVE get FPSIMD for VL 5328
5115 22:22:43.819798 # ok 3388 # SKIP Streaming SVE set FPSIMD get SVE for VL 5328
5116 22:22:43.819901 # ok 3389 Set Streaming SVE VL 5344
5117 22:22:43.820203 # ok 3390 # SKIP Streaming SVE set SVE get SVE for VL 5344
5118 22:22:43.820306 # ok 3391 # SKIP Streaming SVE set SVE get FPSIMD for VL 5344
5119 22:22:43.820629 # ok 3392 # SKIP Streaming SVE set FPSIMD get SVE for VL 5344
5120 22:22:43.820827 # ok 3393 Set Streaming SVE VL 5360
5121 22:22:43.820985 # ok 3394 # SKIP Streaming SVE set SVE get SVE for VL 5360
5122 22:22:43.821847 # ok 3395 # SKIP Streaming SVE set SVE get FPSIMD for VL 5360
5123 22:22:43.822323 # ok 3396 # SKIP Streaming SVE set FPSIMD get SVE for VL 5360
5124 22:22:43.822518 # ok 3397 Set Streaming SVE VL 5376
5125 22:22:43.822719 # ok 3398 # SKIP Streaming SVE set SVE get SVE for VL 5376
5126 22:22:43.822926 # ok 3399 # SKIP Streaming SVE set SVE get FPSIMD for VL 5376
5127 22:22:43.823099 # ok 3400 # SKIP Streaming SVE set FPSIMD get SVE for VL 5376
5128 22:22:43.823224 # ok 3401 Set Streaming SVE VL 5392
5129 22:22:43.823369 # ok 3402 # SKIP Streaming SVE set SVE get SVE for VL 5392
5130 22:22:43.823550 # ok 3403 # SKIP Streaming SVE set SVE get FPSIMD for VL 5392
5131 22:22:43.823707 # ok 3404 # SKIP Streaming SVE set FPSIMD get SVE for VL 5392
5132 22:22:43.823893 # ok 3405 Set Streaming SVE VL 5408
5133 22:22:43.824073 # ok 3406 # SKIP Streaming SVE set SVE get SVE for VL 5408
5134 22:22:43.824302 # ok 3407 # SKIP Streaming SVE set SVE get FPSIMD for VL 5408
5135 22:22:43.824462 # ok 3408 # SKIP Streaming SVE set FPSIMD get SVE for VL 5408
5136 22:22:43.824610 # ok 3409 Set Streaming SVE VL 5424
5137 22:22:43.824754 # ok 3410 # SKIP Streaming SVE set SVE get SVE for VL 5424
5138 22:22:43.824898 # ok 3411 # SKIP Streaming SVE set SVE get FPSIMD for VL 5424
5139 22:22:43.825076 # ok 3412 # SKIP Streaming SVE set FPSIMD get SVE for VL 5424
5140 22:22:43.825214 # ok 3413 Set Streaming SVE VL 5440
5141 22:22:43.825355 # ok 3414 # SKIP Streaming SVE set SVE get SVE for VL 5440
5142 22:22:43.830089 # ok 3415 # SKIP Streaming SVE set SVE get FPSIMD for VL 5440
5143 22:22:43.830297 # ok 3416 # SKIP Streaming SVE set FPSIMD get SVE for VL 5440
5144 22:22:43.830472 # ok 3417 Set Streaming SVE VL 5456
5145 22:22:43.830684 # ok 3418 # SKIP Streaming SVE set SVE get SVE for VL 5456
5146 22:22:43.830889 # ok 3419 # SKIP Streaming SVE set SVE get FPSIMD for VL 5456
5147 22:22:43.831064 # ok 3420 # SKIP Streaming SVE set FPSIMD get SVE for VL 5456
5148 22:22:43.831256 # ok 3421 Set Streaming SVE VL 5472
5149 22:22:43.831414 # ok 3422 # SKIP Streaming SVE set SVE get SVE for VL 5472
5150 22:22:43.831565 # ok 3423 # SKIP Streaming SVE set SVE get FPSIMD for VL 5472
5151 22:22:43.831714 # ok 3424 # SKIP Streaming SVE set FPSIMD get SVE for VL 5472
5152 22:22:43.831873 # ok 3425 Set Streaming SVE VL 5488
5153 22:22:43.832062 # ok 3426 # SKIP Streaming SVE set SVE get SVE for VL 5488
5154 22:22:43.832227 # ok 3427 # SKIP Streaming SVE set SVE get FPSIMD for VL 5488
5155 22:22:43.832372 # ok 3428 # SKIP Streaming SVE set FPSIMD get SVE for VL 5488
5156 22:22:43.832519 # ok 3429 Set Streaming SVE VL 5504
5157 22:22:43.832656 # ok 3430 # SKIP Streaming SVE set SVE get SVE for VL 5504
5158 22:22:43.832802 # ok 3431 # SKIP Streaming SVE set SVE get FPSIMD for VL 5504
5159 22:22:43.832925 # ok 3432 # SKIP Streaming SVE set FPSIMD get SVE for VL 5504
5160 22:22:43.833042 # ok 3433 Set Streaming SVE VL 5520
5161 22:22:43.833158 # ok 3434 # SKIP Streaming SVE set SVE get SVE for VL 5520
5162 22:22:43.833274 # ok 3435 # SKIP Streaming SVE set SVE get FPSIMD for VL 5520
5163 22:22:43.838306 # ok 3436 # SKIP Streaming SVE set FPSIMD get SVE for VL 5520
5164 22:22:43.838488 # ok 3437 Set Streaming SVE VL 5536
5165 22:22:43.838686 # ok 3438 # SKIP Streaming SVE set SVE get SVE for VL 5536
5166 22:22:43.838876 # ok 3439 # SKIP Streaming SVE set SVE get FPSIMD for VL 5536
5167 22:22:43.839089 # ok 3440 # SKIP Streaming SVE set FPSIMD get SVE for VL 5536
5168 22:22:43.839255 # ok 3441 Set Streaming SVE VL 5552
5169 22:22:43.839419 # ok 3442 # SKIP Streaming SVE set SVE get SVE for VL 5552
5170 22:22:43.839611 # ok 3443 # SKIP Streaming SVE set SVE get FPSIMD for VL 5552
5171 22:22:43.839789 # ok 3444 # SKIP Streaming SVE set FPSIMD get SVE for VL 5552
5172 22:22:43.839992 # ok 3445 Set Streaming SVE VL 5568
5173 22:22:43.840161 # ok 3446 # SKIP Streaming SVE set SVE get SVE for VL 5568
5174 22:22:43.840363 # ok 3447 # SKIP Streaming SVE set SVE get FPSIMD for VL 5568
5175 22:22:43.840538 # ok 3448 # SKIP Streaming SVE set FPSIMD get SVE for VL 5568
5176 22:22:43.840705 # ok 3449 Set Streaming SVE VL 5584
5177 22:22:43.840828 # ok 3450 # SKIP Streaming SVE set SVE get SVE for VL 5584
5178 22:22:43.840945 # ok 3451 # SKIP Streaming SVE set SVE get FPSIMD for VL 5584
5179 22:22:43.841064 # ok 3452 # SKIP Streaming SVE set FPSIMD get SVE for VL 5584
5180 22:22:43.841179 # ok 3453 Set Streaming SVE VL 5600
5181 22:22:43.841320 # ok 3454 # SKIP Streaming SVE set SVE get SVE for VL 5600
5182 22:22:43.841440 # ok 3455 # SKIP Streaming SVE set SVE get FPSIMD for VL 5600
5183 22:22:43.841554 # ok 3456 # SKIP Streaming SVE set FPSIMD get SVE for VL 5600
5184 22:22:43.846464 # ok 3457 Set Streaming SVE VL 5616
5185 22:22:43.846773 # ok 3458 # SKIP Streaming SVE set SVE get SVE for VL 5616
5186 22:22:43.846879 # ok 3459 # SKIP Streaming SVE set SVE get FPSIMD for VL 5616
5187 22:22:43.846964 # ok 3460 # SKIP Streaming SVE set FPSIMD get SVE for VL 5616
5188 22:22:43.847047 # ok 3461 Set Streaming SVE VL 5632
5189 22:22:43.847144 # ok 3462 # SKIP Streaming SVE set SVE get SVE for VL 5632
5190 22:22:43.847228 # ok 3463 # SKIP Streaming SVE set SVE get FPSIMD for VL 5632
5191 22:22:43.847324 # ok 3464 # SKIP Streaming SVE set FPSIMD get SVE for VL 5632
5192 22:22:43.847409 # ok 3465 Set Streaming SVE VL 5648
5193 22:22:43.847703 # ok 3466 # SKIP Streaming SVE set SVE get SVE for VL 5648
5194 22:22:43.847833 # ok 3467 # SKIP Streaming SVE set SVE get FPSIMD for VL 5648
5195 22:22:43.847924 # ok 3468 # SKIP Streaming SVE set FPSIMD get SVE for VL 5648
5196 22:22:43.848008 # ok 3469 Set Streaming SVE VL 5664
5197 22:22:43.848108 # ok 3470 # SKIP Streaming SVE set SVE get SVE for VL 5664
5198 22:22:43.848197 # ok 3471 # SKIP Streaming SVE set SVE get FPSIMD for VL 5664
5199 22:22:43.848281 # ok 3472 # SKIP Streaming SVE set FPSIMD get SVE for VL 5664
5200 22:22:43.848378 # ok 3473 Set Streaming SVE VL 5680
5201 22:22:43.848462 # ok 3474 # SKIP Streaming SVE set SVE get SVE for VL 5680
5202 22:22:43.848544 # ok 3475 # SKIP Streaming SVE set SVE get FPSIMD for VL 5680
5203 22:22:43.855319 # ok 3476 # SKIP Streaming SVE set FPSIMD get SVE for VL 5680
5204 22:22:43.855424 # ok 3477 Set Streaming SVE VL 5696
5205 22:22:43.855522 # ok 3478 # SKIP Streaming SVE set SVE get SVE for VL 5696
5206 22:22:43.855621 # ok 3479 # SKIP Streaming SVE set SVE get FPSIMD for VL 5696
5207 22:22:43.855718 # ok 3480 # SKIP Streaming SVE set FPSIMD get SVE for VL 5696
5208 22:22:43.856018 # ok 3481 Set Streaming SVE VL 5712
5209 22:22:43.856121 # ok 3482 # SKIP Streaming SVE set SVE get SVE for VL 5712
5210 22:22:43.856206 # ok 3483 # SKIP Streaming SVE set SVE get FPSIMD for VL 5712
5211 22:22:43.856303 # ok 3484 # SKIP Streaming SVE set FPSIMD get SVE for VL 5712
5212 22:22:43.856388 # ok 3485 Set Streaming SVE VL 5728
5213 22:22:43.856484 # ok 3486 # SKIP Streaming SVE set SVE get SVE for VL 5728
5214 22:22:43.856568 # ok 3487 # SKIP Streaming SVE set SVE get FPSIMD for VL 5728
5215 22:22:43.856664 # ok 3488 # SKIP Streaming SVE set FPSIMD get SVE for VL 5728
5216 22:22:43.857368 # ok 3489 Set Streaming SVE VL 5744
5217 22:22:43.857715 # ok 3490 # SKIP Streaming SVE set SVE get SVE for VL 5744
5218 22:22:43.857907 # ok 3491 # SKIP Streaming SVE set SVE get FPSIMD for VL 5744
5219 22:22:43.858086 # ok 3492 # SKIP Streaming SVE set FPSIMD get SVE for VL 5744
5220 22:22:43.858243 # ok 3493 Set Streaming SVE VL 5760
5221 22:22:43.858403 # ok 3494 # SKIP Streaming SVE set SVE get SVE for VL 5760
5222 22:22:43.858594 # ok 3495 # SKIP Streaming SVE set SVE get FPSIMD for VL 5760
5223 22:22:43.858750 # ok 3496 # SKIP Streaming SVE set FPSIMD get SVE for VL 5760
5224 22:22:43.858907 # ok 3497 Set Streaming SVE VL 5776
5225 22:22:43.859061 # ok 3498 # SKIP Streaming SVE set SVE get SVE for VL 5776
5226 22:22:43.859246 # ok 3499 # SKIP Streaming SVE set SVE get FPSIMD for VL 5776
5227 22:22:43.859435 # ok 3500 # SKIP Streaming SVE set FPSIMD get SVE for VL 5776
5228 22:22:43.859603 # ok 3501 Set Streaming SVE VL 5792
5229 22:22:43.859764 # ok 3502 # SKIP Streaming SVE set SVE get SVE for VL 5792
5230 22:22:43.859936 # ok 3503 # SKIP Streaming SVE set SVE get FPSIMD for VL 5792
5231 22:22:43.860133 # ok 3504 # SKIP Streaming SVE set FPSIMD get SVE for VL 5792
5232 22:22:43.860296 # ok 3505 Set Streaming SVE VL 5808
5233 22:22:43.860439 # ok 3506 # SKIP Streaming SVE set SVE get SVE for VL 5808
5234 22:22:43.860588 # ok 3507 # SKIP Streaming SVE set SVE get FPSIMD for VL 5808
5235 22:22:43.860728 # ok 3508 # SKIP Streaming SVE set FPSIMD get SVE for VL 5808
5236 22:22:43.860846 # ok 3509 Set Streaming SVE VL 5824
5237 22:22:43.860958 # ok 3510 # SKIP Streaming SVE set SVE get SVE for VL 5824
5238 22:22:43.861098 # ok 3511 # SKIP Streaming SVE set SVE get FPSIMD for VL 5824
5239 22:22:43.861217 # ok 3512 # SKIP Streaming SVE set FPSIMD get SVE for VL 5824
5240 22:22:43.861331 # ok 3513 Set Streaming SVE VL 5840
5241 22:22:43.861444 # ok 3514 # SKIP Streaming SVE set SVE get SVE for VL 5840
5242 22:22:43.870463 # ok 3515 # SKIP Streaming SVE set SVE get FPSIMD for VL 5840
5243 22:22:43.870936 # ok 3516 # SKIP Streaming SVE set FPSIMD get SVE for VL 5840
5244 22:22:43.871100 # ok 3517 Set Streaming SVE VL 5856
5245 22:22:43.871231 # ok 3518 # SKIP Streaming SVE set SVE get SVE for VL 5856
5246 22:22:43.871377 # ok 3519 # SKIP Streaming SVE set SVE get FPSIMD for VL 5856
5247 22:22:43.871561 # ok 3520 # SKIP Streaming SVE set FPSIMD get SVE for VL 5856
5248 22:22:43.871720 # ok 3521 Set Streaming SVE VL 5872
5249 22:22:43.871855 # ok 3522 # SKIP Streaming SVE set SVE get SVE for VL 5872
5250 22:22:43.872002 # ok 3523 # SKIP Streaming SVE set SVE get FPSIMD for VL 5872
5251 22:22:43.872156 # ok 3524 # SKIP Streaming SVE set FPSIMD get SVE for VL 5872
5252 22:22:43.872310 # ok 3525 Set Streaming SVE VL 5888
5253 22:22:43.872496 # ok 3526 # SKIP Streaming SVE set SVE get SVE for VL 5888
5254 22:22:43.872633 # ok 3527 # SKIP Streaming SVE set SVE get FPSIMD for VL 5888
5255 22:22:43.872761 # ok 3528 # SKIP Streaming SVE set FPSIMD get SVE for VL 5888
5256 22:22:43.872880 # ok 3529 Set Streaming SVE VL 5904
5257 22:22:43.872996 # ok 3530 # SKIP Streaming SVE set SVE get SVE for VL 5904
5258 22:22:43.873113 # ok 3531 # SKIP Streaming SVE set SVE get FPSIMD for VL 5904
5259 22:22:43.873248 # ok 3532 # SKIP Streaming SVE set FPSIMD get SVE for VL 5904
5260 22:22:43.873368 # ok 3533 Set Streaming SVE VL 5920
5261 22:22:43.877980 # ok 3534 # SKIP Streaming SVE set SVE get SVE for VL 5920
5262 22:22:43.878396 # ok 3535 # SKIP Streaming SVE set SVE get FPSIMD for VL 5920
5263 22:22:43.878555 # ok 3536 # SKIP Streaming SVE set FPSIMD get SVE for VL 5920
5264 22:22:43.878726 # ok 3537 Set Streaming SVE VL 5936
5265 22:22:43.878923 # ok 3538 # SKIP Streaming SVE set SVE get SVE for VL 5936
5266 22:22:43.879097 # ok 3539 # SKIP Streaming SVE set SVE get FPSIMD for VL 5936
5267 22:22:43.879262 # ok 3540 # SKIP Streaming SVE set FPSIMD get SVE for VL 5936
5268 22:22:43.879431 # ok 3541 Set Streaming SVE VL 5952
5269 22:22:43.879646 # ok 3542 # SKIP Streaming SVE set SVE get SVE for VL 5952
5270 22:22:43.879844 # ok 3543 # SKIP Streaming SVE set SVE get FPSIMD for VL 5952
5271 22:22:43.880009 # ok 3544 # SKIP Streaming SVE set FPSIMD get SVE for VL 5952
5272 22:22:43.880164 # ok 3545 Set Streaming SVE VL 5968
5273 22:22:43.880338 # ok 3546 # SKIP Streaming SVE set SVE get SVE for VL 5968
5274 22:22:43.880527 # ok 3547 # SKIP Streaming SVE set SVE get FPSIMD for VL 5968
5275 22:22:43.880711 # ok 3548 # SKIP Streaming SVE set FPSIMD get SVE for VL 5968
5276 22:22:43.880840 # ok 3549 Set Streaming SVE VL 5984
5277 22:22:43.880955 # ok 3550 # SKIP Streaming SVE set SVE get SVE for VL 5984
5278 22:22:43.881071 # ok 3551 # SKIP Streaming SVE set SVE get FPSIMD for VL 5984
5279 22:22:43.881188 # ok 3552 # SKIP Streaming SVE set FPSIMD get SVE for VL 5984
5280 22:22:43.881301 # ok 3553 Set Streaming SVE VL 6000
5281 22:22:43.881414 # ok 3554 # SKIP Streaming SVE set SVE get SVE for VL 6000
5282 22:22:43.881528 # ok 3555 # SKIP Streaming SVE set SVE get FPSIMD for VL 6000
5283 22:22:43.885889 # ok 3556 # SKIP Streaming SVE set FPSIMD get SVE for VL 6000
5284 22:22:43.886099 # ok 3557 Set Streaming SVE VL 6016
5285 22:22:43.886325 # ok 3558 # SKIP Streaming SVE set SVE get SVE for VL 6016
5286 22:22:43.886490 # ok 3559 # SKIP Streaming SVE set SVE get FPSIMD for VL 6016
5287 22:22:43.886645 # ok 3560 # SKIP Streaming SVE set FPSIMD get SVE for VL 6016
5288 22:22:43.886839 # ok 3561 Set Streaming SVE VL 6032
5289 22:22:43.886998 # ok 3562 # SKIP Streaming SVE set SVE get SVE for VL 6032
5290 22:22:43.887156 # ok 3563 # SKIP Streaming SVE set SVE get FPSIMD for VL 6032
5291 22:22:43.887305 # ok 3564 # SKIP Streaming SVE set FPSIMD get SVE for VL 6032
5292 22:22:43.887459 # ok 3565 Set Streaming SVE VL 6048
5293 22:22:43.887642 # ok 3566 # SKIP Streaming SVE set SVE get SVE for VL 6048
5294 22:22:43.887810 # ok 3567 # SKIP Streaming SVE set SVE get FPSIMD for VL 6048
5295 22:22:43.887974 # ok 3568 # SKIP Streaming SVE set FPSIMD get SVE for VL 6048
5296 22:22:43.888139 # ok 3569 Set Streaming SVE VL 6064
5297 22:22:43.888299 # ok 3570 # SKIP Streaming SVE set SVE get SVE for VL 6064
5298 22:22:43.888455 # ok 3571 # SKIP Streaming SVE set SVE get FPSIMD for VL 6064
5299 22:22:43.888616 # ok 3572 # SKIP Streaming SVE set FPSIMD get SVE for VL 6064
5300 22:22:43.888773 # ok 3573 Set Streaming SVE VL 6080
5301 22:22:43.888923 # ok 3574 # SKIP Streaming SVE set SVE get SVE for VL 6080
5302 22:22:43.889041 # ok 3575 # SKIP Streaming SVE set SVE get FPSIMD for VL 6080
5303 22:22:43.889161 # ok 3576 # SKIP Streaming SVE set FPSIMD get SVE for VL 6080
5304 22:22:43.889276 # ok 3577 Set Streaming SVE VL 6096
5305 22:22:43.889392 # ok 3578 # SKIP Streaming SVE set SVE get SVE for VL 6096
5306 22:22:43.889507 # ok 3579 # SKIP Streaming SVE set SVE get FPSIMD for VL 6096
5307 22:22:43.889620 # ok 3580 # SKIP Streaming SVE set FPSIMD get SVE for VL 6096
5308 22:22:43.889828 # ok 3581 Set Streaming SVE VL 6112
5309 22:22:43.898345 # ok 3582 # SKIP Streaming SVE set SVE get SVE for VL 6112
5310 22:22:43.898782 # ok 3583 # SKIP Streaming SVE set SVE get FPSIMD for VL 6112
5311 22:22:43.898962 # ok 3584 # SKIP Streaming SVE set FPSIMD get SVE for VL 6112
5312 22:22:43.899106 # ok 3585 Set Streaming SVE VL 6128
5313 22:22:43.899296 # ok 3586 # SKIP Streaming SVE set SVE get SVE for VL 6128
5314 22:22:43.899449 # ok 3587 # SKIP Streaming SVE set SVE get FPSIMD for VL 6128
5315 22:22:43.899605 # ok 3588 # SKIP Streaming SVE set FPSIMD get SVE for VL 6128
5316 22:22:43.899767 # ok 3589 Set Streaming SVE VL 6144
5317 22:22:43.899948 # ok 3590 # SKIP Streaming SVE set SVE get SVE for VL 6144
5318 22:22:43.900153 # ok 3591 # SKIP Streaming SVE set SVE get FPSIMD for VL 6144
5319 22:22:43.900366 # ok 3592 # SKIP Streaming SVE set FPSIMD get SVE for VL 6144
5320 22:22:43.900564 # ok 3593 Set Streaming SVE VL 6160
5321 22:22:43.900740 # ok 3594 # SKIP Streaming SVE set SVE get SVE for VL 6160
5322 22:22:43.900892 # ok 3595 # SKIP Streaming SVE set SVE get FPSIMD for VL 6160
5323 22:22:43.901013 # ok 3596 # SKIP Streaming SVE set FPSIMD get SVE for VL 6160
5324 22:22:43.901132 # ok 3597 Set Streaming SVE VL 6176
5325 22:22:43.901246 # ok 3598 # SKIP Streaming SVE set SVE get SVE for VL 6176
5326 22:22:43.901359 # ok 3599 # SKIP Streaming SVE set SVE get FPSIMD for VL 6176
5327 22:22:43.910704 # ok 3600 # SKIP Streaming SVE set FPSIMD get SVE for VL 6176
5328 22:22:43.911146 # ok 3601 Set Streaming SVE VL 6192
5329 22:22:43.911377 # ok 3602 # SKIP Streaming SVE set SVE get SVE for VL 6192
5330 22:22:43.911594 # ok 3603 # SKIP Streaming SVE set SVE get FPSIMD for VL 6192
5331 22:22:43.911801 # ok 3604 # SKIP Streaming SVE set FPSIMD get SVE for VL 6192
5332 22:22:43.911940 # ok 3605 Set Streaming SVE VL 6208
5333 22:22:43.912084 # ok 3606 # SKIP Streaming SVE set SVE get SVE for VL 6208
5334 22:22:43.912256 # ok 3607 # SKIP Streaming SVE set SVE get FPSIMD for VL 6208
5335 22:22:43.912453 # ok 3608 # SKIP Streaming SVE set FPSIMD get SVE for VL 6208
5336 22:22:43.912589 # ok 3609 Set Streaming SVE VL 6224
5337 22:22:43.912704 # ok 3610 # SKIP Streaming SVE set SVE get SVE for VL 6224
5338 22:22:43.912844 # ok 3611 # SKIP Streaming SVE set SVE get FPSIMD for VL 6224
5339 22:22:43.912964 # ok 3612 # SKIP Streaming SVE set FPSIMD get SVE for VL 6224
5340 22:22:43.913080 # ok 3613 Set Streaming SVE VL 6240
5341 22:22:43.918129 # ok 3614 # SKIP Streaming SVE set SVE get SVE for VL 6240
5342 22:22:43.918555 # ok 3615 # SKIP Streaming SVE set SVE get FPSIMD for VL 6240
5343 22:22:43.918755 # ok 3616 # SKIP Streaming SVE set FPSIMD get SVE for VL 6240
5344 22:22:43.918963 # ok 3617 Set Streaming SVE VL 6256
5345 22:22:43.919136 # ok 3618 # SKIP Streaming SVE set SVE get SVE for VL 6256
5346 22:22:43.919356 # ok 3619 # SKIP Streaming SVE set SVE get FPSIMD for VL 6256
5347 22:22:43.919607 # ok 3620 # SKIP Streaming SVE set FPSIMD get SVE for VL 6256
5348 22:22:43.919767 # ok 3621 Set Streaming SVE VL 6272
5349 22:22:43.919913 # ok 3622 # SKIP Streaming SVE set SVE get SVE for VL 6272
5350 22:22:43.920055 # ok 3623 # SKIP Streaming SVE set SVE get FPSIMD for VL 6272
5351 22:22:43.920227 # ok 3624 # SKIP Streaming SVE set FPSIMD get SVE for VL 6272
5352 22:22:43.920365 # ok 3625 Set Streaming SVE VL 6288
5353 22:22:43.935075 # ok 3626 # SKIP Streaming SVE set SVE get SVE for VL 6288
5354 22:22:43.935264 # ok 3627 # SKIP Streaming SVE set SVE get FPSIMD for VL 6288
5355 22:22:43.935499 # ok 3628 # SKIP Streaming SVE set FPSIMD get SVE for VL 6288
5356 22:22:43.935714 # ok 3629 Set Streaming SVE VL 6304
5357 22:22:43.935959 # ok 3630 # SKIP Streaming SVE set SVE get SVE for VL 6304
5358 22:22:43.936164 # ok 3631 # SKIP Streaming SVE set SVE get FPSIMD for VL 6304
5359 22:22:43.936387 # ok 3632 # SKIP Streaming SVE set FPSIMD get SVE for VL 6304
5360 22:22:43.936609 # ok 3633 Set Streaming SVE VL 6320
5361 22:22:43.936762 # ok 3634 # SKIP Streaming SVE set SVE get SVE for VL 6320
5362 22:22:43.936912 # ok 3635 # SKIP Streaming SVE set SVE get FPSIMD for VL 6320
5363 22:22:43.937035 # ok 3636 # SKIP Streaming SVE set FPSIMD get SVE for VL 6320
5364 22:22:43.937153 # ok 3637 Set Streaming SVE VL 6336
5365 22:22:43.937266 # ok 3638 # SKIP Streaming SVE set SVE get SVE for VL 6336
5366 22:22:43.937380 # ok 3639 # SKIP Streaming SVE set SVE get FPSIMD for VL 6336
5367 22:22:43.937494 # ok 3640 # SKIP Streaming SVE set FPSIMD get SVE for VL 6336
5368 22:22:43.937607 # ok 3641 Set Streaming SVE VL 6352
5369 22:22:43.944335 # ok 3642 # SKIP Streaming SVE set SVE get SVE for VL 6352
5370 22:22:43.944445 # ok 3643 # SKIP Streaming SVE set SVE get FPSIMD for VL 6352
5371 22:22:43.944547 # ok 3644 # SKIP Streaming SVE set FPSIMD get SVE for VL 6352
5372 22:22:43.944649 # ok 3645 Set Streaming SVE VL 6368
5373 22:22:43.944735 # ok 3646 # SKIP Streaming SVE set SVE get SVE for VL 6368
5374 22:22:43.946109 # ok 3647 # SKIP Streaming SVE set SVE get FPSIMD for VL 6368
5375 22:22:43.946214 # ok 3648 # SKIP Streaming SVE set FPSIMD get SVE for VL 6368
5376 22:22:43.946518 # ok 3649 Set Streaming SVE VL 6384
5377 22:22:43.946646 # ok 3650 # SKIP Streaming SVE set SVE get SVE for VL 6384
5378 22:22:43.946739 # ok 3651 # SKIP Streaming SVE set SVE get FPSIMD for VL 6384
5379 22:22:43.946840 # ok 3652 # SKIP Streaming SVE set FPSIMD get SVE for VL 6384
5380 22:22:43.946926 # ok 3653 Set Streaming SVE VL 6400
5381 22:22:43.947011 # ok 3654 # SKIP Streaming SVE set SVE get SVE for VL 6400
5382 22:22:43.947114 # ok 3655 # SKIP Streaming SVE set SVE get FPSIMD for VL 6400
5383 22:22:43.947198 # ok 3656 # SKIP Streaming SVE set FPSIMD get SVE for VL 6400
5384 22:22:43.947294 # ok 3657 Set Streaming SVE VL 6416
5385 22:22:43.947393 # ok 3658 # SKIP Streaming SVE set SVE get SVE for VL 6416
5386 22:22:43.947494 # ok 3659 # SKIP Streaming SVE set SVE get FPSIMD for VL 6416
5387 22:22:43.947781 # ok 3660 # SKIP Streaming SVE set FPSIMD get SVE for VL 6416
5388 22:22:43.947876 # ok 3661 Set Streaming SVE VL 6432
5389 22:22:43.947975 # ok 3662 # SKIP Streaming SVE set SVE get SVE for VL 6432
5390 22:22:43.948256 # ok 3663 # SKIP Streaming SVE set SVE get FPSIMD for VL 6432
5391 22:22:43.948364 # ok 3664 # SKIP Streaming SVE set FPSIMD get SVE for VL 6432
5392 22:22:43.948463 # ok 3665 Set Streaming SVE VL 6448
5393 22:22:43.948548 # ok 3666 # SKIP Streaming SVE set SVE get SVE for VL 6448
5394 22:22:43.948645 # ok 3667 # SKIP Streaming SVE set SVE get FPSIMD for VL 6448
5395 22:22:43.957591 # ok 3668 # SKIP Streaming SVE set FPSIMD get SVE for VL 6448
5396 22:22:43.957900 # ok 3669 Set Streaming SVE VL 6464
5397 22:22:43.958004 # ok 3670 # SKIP Streaming SVE set SVE get SVE for VL 6464
5398 22:22:43.958090 # ok 3671 # SKIP Streaming SVE set SVE get FPSIMD for VL 6464
5399 22:22:43.958189 # ok 3672 # SKIP Streaming SVE set FPSIMD get SVE for VL 6464
5400 22:22:43.958284 # ok 3673 Set Streaming SVE VL 6480
5401 22:22:43.958384 # ok 3674 # SKIP Streaming SVE set SVE get SVE for VL 6480
5402 22:22:43.958484 # ok 3675 # SKIP Streaming SVE set SVE get FPSIMD for VL 6480
5403 22:22:43.958814 # ok 3676 # SKIP Streaming SVE set FPSIMD get SVE for VL 6480
5404 22:22:43.959017 # ok 3677 Set Streaming SVE VL 6496
5405 22:22:43.959219 # ok 3678 # SKIP Streaming SVE set SVE get SVE for VL 6496
5406 22:22:43.959391 # ok 3679 # SKIP Streaming SVE set SVE get FPSIMD for VL 6496
5407 22:22:43.959601 # ok 3680 # SKIP Streaming SVE set FPSIMD get SVE for VL 6496
5408 22:22:43.959804 # ok 3681 Set Streaming SVE VL 6512
5409 22:22:43.960041 # ok 3682 # SKIP Streaming SVE set SVE get SVE for VL 6512
5410 22:22:43.960240 # ok 3683 # SKIP Streaming SVE set SVE get FPSIMD for VL 6512
5411 22:22:43.960425 # ok 3684 # SKIP Streaming SVE set FPSIMD get SVE for VL 6512
5412 22:22:43.960600 # ok 3685 Set Streaming SVE VL 6528
5413 22:22:43.960733 # ok 3686 # SKIP Streaming SVE set SVE get SVE for VL 6528
5414 22:22:43.960852 # ok 3687 # SKIP Streaming SVE set SVE get FPSIMD for VL 6528
5415 22:22:43.960968 # ok 3688 # SKIP Streaming SVE set FPSIMD get SVE for VL 6528
5416 22:22:43.961084 # ok 3689 Set Streaming SVE VL 6544
5417 22:22:43.961226 # ok 3690 # SKIP Streaming SVE set SVE get SVE for VL 6544
5418 22:22:43.970298 # ok 3691 # SKIP Streaming SVE set SVE get FPSIMD for VL 6544
5419 22:22:43.970745 # ok 3692 # SKIP Streaming SVE set FPSIMD get SVE for VL 6544
5420 22:22:43.970980 # ok 3693 Set Streaming SVE VL 6560
5421 22:22:43.971181 # ok 3694 # SKIP Streaming SVE set SVE get SVE for VL 6560
5422 22:22:43.971346 # ok 3695 # SKIP Streaming SVE set SVE get FPSIMD for VL 6560
5423 22:22:43.971555 # ok 3696 # SKIP Streaming SVE set FPSIMD get SVE for VL 6560
5424 22:22:43.971720 # ok 3697 Set Streaming SVE VL 6576
5425 22:22:43.971882 # ok 3698 # SKIP Streaming SVE set SVE get SVE for VL 6576
5426 22:22:43.972045 # ok 3699 # SKIP Streaming SVE set SVE get FPSIMD for VL 6576
5427 22:22:43.972201 # ok 3700 # SKIP Streaming SVE set FPSIMD get SVE for VL 6576
5428 22:22:43.972350 # ok 3701 Set Streaming SVE VL 6592
5429 22:22:43.972542 # ok 3702 # SKIP Streaming SVE set SVE get SVE for VL 6592
5430 22:22:43.972681 # ok 3703 # SKIP Streaming SVE set SVE get FPSIMD for VL 6592
5431 22:22:43.972798 # ok 3704 # SKIP Streaming SVE set FPSIMD get SVE for VL 6592
5432 22:22:43.972912 # ok 3705 Set Streaming SVE VL 6608
5433 22:22:43.973025 # ok 3706 # SKIP Streaming SVE set SVE get SVE for VL 6608
5434 22:22:43.973138 # ok 3707 # SKIP Streaming SVE set SVE get FPSIMD for VL 6608
5435 22:22:43.973252 # ok 3708 # SKIP Streaming SVE set FPSIMD get SVE for VL 6608
5436 22:22:43.973394 # ok 3709 Set Streaming SVE VL 6624
5437 22:22:43.982006 # ok 3710 # SKIP Streaming SVE set SVE get SVE for VL 6624
5438 22:22:43.982442 # ok 3711 # SKIP Streaming SVE set SVE get FPSIMD for VL 6624
5439 22:22:43.982635 # ok 3712 # SKIP Streaming SVE set FPSIMD get SVE for VL 6624
5440 22:22:43.982824 # ok 3713 Set Streaming SVE VL 6640
5441 22:22:43.982972 # ok 3714 # SKIP Streaming SVE set SVE get SVE for VL 6640
5442 22:22:43.983127 # ok 3715 # SKIP Streaming SVE set SVE get FPSIMD for VL 6640
5443 22:22:43.983276 # ok 3716 # SKIP Streaming SVE set FPSIMD get SVE for VL 6640
5444 22:22:43.983442 # ok 3717 Set Streaming SVE VL 6656
5445 22:22:43.983645 # ok 3718 # SKIP Streaming SVE set SVE get SVE for VL 6656
5446 22:22:43.983817 # ok 3719 # SKIP Streaming SVE set SVE get FPSIMD for VL 6656
5447 22:22:43.983967 # ok 3720 # SKIP Streaming SVE set FPSIMD get SVE for VL 6656
5448 22:22:43.984125 # ok 3721 Set Streaming SVE VL 6672
5449 22:22:43.984285 # ok 3722 # SKIP Streaming SVE set SVE get SVE for VL 6672
5450 22:22:43.984440 # ok 3723 # SKIP Streaming SVE set SVE get FPSIMD for VL 6672
5451 22:22:43.984625 # ok 3724 # SKIP Streaming SVE set FPSIMD get SVE for VL 6672
5452 22:22:43.984766 # ok 3725 Set Streaming SVE VL 6688
5453 22:22:43.984883 # ok 3726 # SKIP Streaming SVE set SVE get SVE for VL 6688
5454 22:22:43.984998 # ok 3727 # SKIP Streaming SVE set SVE get FPSIMD for VL 6688
5455 22:22:43.985112 # ok 3728 # SKIP Streaming SVE set FPSIMD get SVE for VL 6688
5456 22:22:43.985228 # ok 3729 Set Streaming SVE VL 6704
5457 22:22:43.985343 # ok 3730 # SKIP Streaming SVE set SVE get SVE for VL 6704
5458 22:22:43.994099 # ok 3731 # SKIP Streaming SVE set SVE get FPSIMD for VL 6704
5459 22:22:43.994536 # ok 3732 # SKIP Streaming SVE set FPSIMD get SVE for VL 6704
5460 22:22:43.994740 # ok 3733 Set Streaming SVE VL 6720
5461 22:22:43.994943 # ok 3734 # SKIP Streaming SVE set SVE get SVE for VL 6720
5462 22:22:43.995126 # ok 3735 # SKIP Streaming SVE set SVE get FPSIMD for VL 6720
5463 22:22:43.995283 # ok 3736 # SKIP Streaming SVE set FPSIMD get SVE for VL 6720
5464 22:22:43.995416 # ok 3737 Set Streaming SVE VL 6736
5465 22:22:43.995580 # ok 3738 # SKIP Streaming SVE set SVE get SVE for VL 6736
5466 22:22:43.995774 # ok 3739 # SKIP Streaming SVE set SVE get FPSIMD for VL 6736
5467 22:22:43.996015 # ok 3740 # SKIP Streaming SVE set FPSIMD get SVE for VL 6736
5468 22:22:43.996195 # ok 3741 Set Streaming SVE VL 6752
5469 22:22:43.996359 # ok 3742 # SKIP Streaming SVE set SVE get SVE for VL 6752
5470 22:22:43.996526 # ok 3743 # SKIP Streaming SVE set SVE get FPSIMD for VL 6752
5471 22:22:43.996688 # ok 3744 # SKIP Streaming SVE set FPSIMD get SVE for VL 6752
5472 22:22:43.996849 # ok 3745 Set Streaming SVE VL 6768
5473 22:22:43.996969 # ok 3746 # SKIP Streaming SVE set SVE get SVE for VL 6768
5474 22:22:43.997082 # ok 3747 # SKIP Streaming SVE set SVE get FPSIMD for VL 6768
5475 22:22:43.997196 # ok 3748 # SKIP Streaming SVE set FPSIMD get SVE for VL 6768
5476 22:22:43.997310 # ok 3749 Set Streaming SVE VL 6784
5477 22:22:43.997424 # ok 3750 # SKIP Streaming SVE set SVE get SVE for VL 6784
5478 22:22:44.002353 # ok 3751 # SKIP Streaming SVE set SVE get FPSIMD for VL 6784
5479 22:22:44.002749 # ok 3752 # SKIP Streaming SVE set FPSIMD get SVE for VL 6784
5480 22:22:44.002859 # ok 3753 Set Streaming SVE VL 6800
5481 22:22:44.002945 # ok 3754 # SKIP Streaming SVE set SVE get SVE for VL 6800
5482 22:22:44.003043 # ok 3755 # SKIP Streaming SVE set SVE get FPSIMD for VL 6800
5483 22:22:44.003127 # ok 3756 # SKIP Streaming SVE set FPSIMD get SVE for VL 6800
5484 22:22:44.003211 # ok 3757 Set Streaming SVE VL 6816
5485 22:22:44.003307 # ok 3758 # SKIP Streaming SVE set SVE get SVE for VL 6816
5486 22:22:44.003400 # ok 3759 # SKIP Streaming SVE set SVE get FPSIMD for VL 6816
5487 22:22:44.003497 # ok 3760 # SKIP Streaming SVE set FPSIMD get SVE for VL 6816
5488 22:22:44.003595 # ok 3761 Set Streaming SVE VL 6832
5489 22:22:44.003692 # ok 3762 # SKIP Streaming SVE set SVE get SVE for VL 6832
5490 22:22:44.003798 # ok 3763 # SKIP Streaming SVE set SVE get FPSIMD for VL 6832
5491 22:22:44.004139 # ok 3764 # SKIP Streaming SVE set FPSIMD get SVE for VL 6832
5492 22:22:44.004244 # ok 3765 Set Streaming SVE VL 6848
5493 22:22:44.004346 # ok 3766 # SKIP Streaming SVE set SVE get SVE for VL 6848
5494 22:22:44.004434 # ok 3767 # SKIP Streaming SVE set SVE get FPSIMD for VL 6848
5495 22:22:44.004718 # ok 3768 # SKIP Streaming SVE set FPSIMD get SVE for VL 6848
5496 22:22:44.005426 # ok 3769 Set Streaming SVE VL 6864
5497 22:22:44.005698 # ok 3770 # SKIP Streaming SVE set SVE get SVE for VL 6864
5498 22:22:44.005857 # ok 3771 # SKIP Streaming SVE set SVE get FPSIMD for VL 6864
5499 22:22:44.005977 # ok 3772 # SKIP Streaming SVE set FPSIMD get SVE for VL 6864
5500 22:22:44.006065 # ok 3773 Set Streaming SVE VL 6880
5501 22:22:44.006161 # ok 3774 # SKIP Streaming SVE set SVE get SVE for VL 6880
5502 22:22:44.007678 # ok 3775 # SKIP Streaming SVE set SVE get FPSIMD for VL 6880
5503 22:22:44.008016 # ok 3776 # SKIP Streaming SVE set FPSIMD get SVE for VL 6880
5504 22:22:44.008215 # ok 3777 Set Streaming SVE VL 6896
5505 22:22:44.008420 # ok 3778 # SKIP Streaming SVE set SVE get SVE for VL 6896
5506 22:22:44.008598 # ok 3779 # SKIP Streaming SVE set SVE get FPSIMD for VL 6896
5507 22:22:44.008771 # ok 3780 # SKIP Streaming SVE set FPSIMD get SVE for VL 6896
5508 22:22:44.008928 # ok 3781 Set Streaming SVE VL 6912
5509 22:22:44.020754 # ok 3782 # SKIP Streaming SVE set SVE get SVE for VL 6912
5510 22:22:44.023532 # ok 3783 # SKIP Streaming SVE set SVE get FPSIMD for VL 6912
5511 22:22:44.023736 # ok 3784 # SKIP Streaming SVE set FPSIMD get SVE for VL 6912
5512 22:22:44.023940 # ok 3785 Set Streaming SVE VL 6928
5513 22:22:44.024189 # ok 3786 # SKIP Streaming SVE set SVE get SVE for VL 6928
5514 22:22:44.024377 # ok 3787 # SKIP Streaming SVE set SVE get FPSIMD for VL 6928
5515 22:22:44.024634 # ok 3788 # SKIP Streaming SVE set FPSIMD get SVE for VL 6928
5516 22:22:44.024793 # ok 3789 Set Streaming SVE VL 6944
5517 22:22:44.024936 # ok 3790 # SKIP Streaming SVE set SVE get SVE for VL 6944
5518 22:22:44.025077 # ok 3791 # SKIP Streaming SVE set SVE get FPSIMD for VL 6944
5519 22:22:44.025288 # ok 3792 # SKIP Streaming SVE set FPSIMD get SVE for VL 6944
5520 22:22:44.025501 # ok 3793 Set Streaming SVE VL 6960
5521 22:22:44.025689 # ok 3794 # SKIP Streaming SVE set SVE get SVE for VL 6960
5522 22:22:44.025850 # ok 3795 # SKIP Streaming SVE set SVE get FPSIMD for VL 6960
5523 22:22:44.026033 # ok 3796 # SKIP Streaming SVE set FPSIMD get SVE for VL 6960
5524 22:22:44.026201 # ok 3797 Set Streaming SVE VL 6976
5525 22:22:44.026370 # ok 3798 # SKIP Streaming SVE set SVE get SVE for VL 6976
5526 22:22:44.026530 # ok 3799 # SKIP Streaming SVE set SVE get FPSIMD for VL 6976
5527 22:22:44.026679 # ok 3800 # SKIP Streaming SVE set FPSIMD get SVE for VL 6976
5528 22:22:44.026818 # ok 3801 Set Streaming SVE VL 6992
5529 22:22:44.026961 # ok 3802 # SKIP Streaming SVE set SVE get SVE for VL 6992
5530 22:22:44.027145 # ok 3803 # SKIP Streaming SVE set SVE get FPSIMD for VL 6992
5531 22:22:44.027276 # ok 3804 # SKIP Streaming SVE set FPSIMD get SVE for VL 6992
5532 22:22:44.027395 # ok 3805 Set Streaming SVE VL 7008
5533 22:22:44.027509 # ok 3806 # SKIP Streaming SVE set SVE get SVE for VL 7008
5534 22:22:44.027623 # ok 3807 # SKIP Streaming SVE set SVE get FPSIMD for VL 7008
5535 22:22:44.027738 # ok 3808 # SKIP Streaming SVE set FPSIMD get SVE for VL 7008
5536 22:22:44.027852 # ok 3809 Set Streaming SVE VL 7024
5537 22:22:44.027965 # ok 3810 # SKIP Streaming SVE set SVE get SVE for VL 7024
5538 22:22:44.028189 # ok 3811 # SKIP Streaming SVE set SVE get FPSIMD for VL 7024
5539 22:22:44.028366 # ok 3812 # SKIP Streaming SVE set FPSIMD get SVE for VL 7024
5540 22:22:44.028518 # ok 3813 Set Streaming SVE VL 7040
5541 22:22:44.028684 # ok 3814 # SKIP Streaming SVE set SVE get SVE for VL 7040
5542 22:22:44.028807 # ok 3815 # SKIP Streaming SVE set SVE get FPSIMD for VL 7040
5543 22:22:44.028923 # ok 3816 # SKIP Streaming SVE set FPSIMD get SVE for VL 7040
5544 22:22:44.029058 # ok 3817 Set Streaming SVE VL 7056
5545 22:22:44.037493 # ok 3818 # SKIP Streaming SVE set SVE get SVE for VL 7056
5546 22:22:44.038222 # ok 3819 # SKIP Streaming SVE set SVE get FPSIMD for VL 7056
5547 22:22:44.038401 # ok 3820 # SKIP Streaming SVE set FPSIMD get SVE for VL 7056
5548 22:22:44.038604 # ok 3821 Set Streaming SVE VL 7072
5549 22:22:44.038815 # ok 3822 # SKIP Streaming SVE set SVE get SVE for VL 7072
5550 22:22:44.039031 # ok 3823 # SKIP Streaming SVE set SVE get FPSIMD for VL 7072
5551 22:22:44.039243 # ok 3824 # SKIP Streaming SVE set FPSIMD get SVE for VL 7072
5552 22:22:44.039404 # ok 3825 Set Streaming SVE VL 7088
5553 22:22:44.039550 # ok 3826 # SKIP Streaming SVE set SVE get SVE for VL 7088
5554 22:22:44.039745 # ok 3827 # SKIP Streaming SVE set SVE get FPSIMD for VL 7088
5555 22:22:44.039961 # ok 3828 # SKIP Streaming SVE set FPSIMD get SVE for VL 7088
5556 22:22:44.040161 # ok 3829 Set Streaming SVE VL 7104
5557 22:22:44.040416 # ok 3830 # SKIP Streaming SVE set SVE get SVE for VL 7104
5558 22:22:44.040580 # ok 3831 # SKIP Streaming SVE set SVE get FPSIMD for VL 7104
5559 22:22:44.040714 # ok 3832 # SKIP Streaming SVE set FPSIMD get SVE for VL 7104
5560 22:22:44.040832 # ok 3833 Set Streaming SVE VL 7120
5561 22:22:44.040946 # ok 3834 # SKIP Streaming SVE set SVE get SVE for VL 7120
5562 22:22:44.041062 # ok 3835 # SKIP Streaming SVE set SVE get FPSIMD for VL 7120
5563 22:22:44.041176 # ok 3836 # SKIP Streaming SVE set FPSIMD get SVE for VL 7120
5564 22:22:44.041290 # ok 3837 Set Streaming SVE VL 7136
5565 22:22:44.041429 # ok 3838 # SKIP Streaming SVE set SVE get SVE for VL 7136
5566 22:22:44.041547 # ok 3839 # SKIP Streaming SVE set SVE get FPSIMD for VL 7136
5567 22:22:44.045934 # ok 3840 # SKIP Streaming SVE set FPSIMD get SVE for VL 7136
5568 22:22:44.046579 # ok 3841 Set Streaming SVE VL 7152
5569 22:22:44.046684 # ok 3842 # SKIP Streaming SVE set SVE get SVE for VL 7152
5570 22:22:44.046783 # ok 3843 # SKIP Streaming SVE set SVE get FPSIMD for VL 7152
5571 22:22:44.046881 # ok 3844 # SKIP Streaming SVE set FPSIMD get SVE for VL 7152
5572 22:22:44.046978 # ok 3845 Set Streaming SVE VL 7168
5573 22:22:44.047075 # ok 3846 # SKIP Streaming SVE set SVE get SVE for VL 7168
5574 22:22:44.047179 # ok 3847 # SKIP Streaming SVE set SVE get FPSIMD for VL 7168
5575 22:22:44.047561 # ok 3848 # SKIP Streaming SVE set FPSIMD get SVE for VL 7168
5576 22:22:44.047716 # ok 3849 Set Streaming SVE VL 7184
5577 22:22:44.048074 # ok 3850 # SKIP Streaming SVE set SVE get SVE for VL 7184
5578 22:22:44.048458 # ok 3851 # SKIP Streaming SVE set SVE get FPSIMD for VL 7184
5579 22:22:44.048591 # ok 3852 # SKIP Streaming SVE set FPSIMD get SVE for VL 7184
5580 22:22:44.048739 # ok 3853 Set Streaming SVE VL 7200
5581 22:22:44.053766 # ok 3854 # SKIP Streaming SVE set SVE get SVE for VL 7200
5582 22:22:44.054720 # ok 3855 # SKIP Streaming SVE set SVE get FPSIMD for VL 7200
5583 22:22:44.054896 # ok 3856 # SKIP Streaming SVE set FPSIMD get SVE for VL 7200
5584 22:22:44.055051 # ok 3857 Set Streaming SVE VL 7216
5585 22:22:44.055243 # ok 3858 # SKIP Streaming SVE set SVE get SVE for VL 7216
5586 22:22:44.055416 # ok 3859 # SKIP Streaming SVE set SVE get FPSIMD for VL 7216
5587 22:22:44.055603 # ok 3860 # SKIP Streaming SVE set FPSIMD get SVE for VL 7216
5588 22:22:44.055765 # ok 3861 Set Streaming SVE VL 7232
5589 22:22:44.055952 # ok 3862 # SKIP Streaming SVE set SVE get SVE for VL 7232
5590 22:22:44.056114 # ok 3863 # SKIP Streaming SVE set SVE get FPSIMD for VL 7232
5591 22:22:44.056275 # ok 3864 # SKIP Streaming SVE set FPSIMD get SVE for VL 7232
5592 22:22:44.056465 # ok 3865 Set Streaming SVE VL 7248
5593 22:22:44.056622 # ok 3866 # SKIP Streaming SVE set SVE get SVE for VL 7248
5594 22:22:44.056739 # ok 3867 # SKIP Streaming SVE set SVE get FPSIMD for VL 7248
5595 22:22:44.056872 # ok 3868 # SKIP Streaming SVE set FPSIMD get SVE for VL 7248
5596 22:22:44.060477 # ok 3869 Set Streaming SVE VL 7264
5597 22:22:44.060919 # ok 3870 # SKIP Streaming SVE set SVE get SVE for VL 7264
5598 22:22:44.061111 # ok 3871 # SKIP Streaming SVE set SVE get FPSIMD for VL 7264
5599 22:22:44.061307 # ok 3872 # SKIP Streaming SVE set FPSIMD get SVE for VL 7264
5600 22:22:44.061478 # ok 3873 Set Streaming SVE VL 7280
5601 22:22:44.061623 # ok 3874 # SKIP Streaming SVE set SVE get SVE for VL 7280
5602 22:22:44.061822 # ok 3875 # SKIP Streaming SVE set SVE get FPSIMD for VL 7280
5603 22:22:44.061980 # ok 3876 # SKIP Streaming SVE set FPSIMD get SVE for VL 7280
5604 22:22:44.062134 # ok 3877 Set Streaming SVE VL 7296
5605 22:22:44.062296 # ok 3878 # SKIP Streaming SVE set SVE get SVE for VL 7296
5606 22:22:44.062485 # ok 3879 # SKIP Streaming SVE set SVE get FPSIMD for VL 7296
5607 22:22:44.062648 # ok 3880 # SKIP Streaming SVE set FPSIMD get SVE for VL 7296
5608 22:22:44.062807 # ok 3881 Set Streaming SVE VL 7312
5609 22:22:44.062969 # ok 3882 # SKIP Streaming SVE set SVE get SVE for VL 7312
5610 22:22:44.063133 # ok 3883 # SKIP Streaming SVE set SVE get FPSIMD for VL 7312
5611 22:22:44.063340 # ok 3884 # SKIP Streaming SVE set FPSIMD get SVE for VL 7312
5612 22:22:44.063548 # ok 3885 Set Streaming SVE VL 7328
5613 22:22:44.063743 # ok 3886 # SKIP Streaming SVE set SVE get SVE for VL 7328
5614 22:22:44.063947 # ok 3887 # SKIP Streaming SVE set SVE get FPSIMD for VL 7328
5615 22:22:44.064146 # ok 3888 # SKIP Streaming SVE set FPSIMD get SVE for VL 7328
5616 22:22:44.064400 # ok 3889 Set Streaming SVE VL 7344
5617 22:22:44.064582 # ok 3890 # SKIP Streaming SVE set SVE get SVE for VL 7344
5618 22:22:44.064749 # ok 3891 # SKIP Streaming SVE set SVE get FPSIMD for VL 7344
5619 22:22:44.064872 # ok 3892 # SKIP Streaming SVE set FPSIMD get SVE for VL 7344
5620 22:22:44.064989 # ok 3893 Set Streaming SVE VL 7360
5621 22:22:44.065099 # ok 3894 # SKIP Streaming SVE set SVE get SVE for VL 7360
5622 22:22:44.065211 # ok 3895 # SKIP Streaming SVE set SVE get FPSIMD for VL 7360
5623 22:22:44.065323 # ok 3896 # SKIP Streaming SVE set FPSIMD get SVE for VL 7360
5624 22:22:44.065434 # ok 3897 Set Streaming SVE VL 7376
5625 22:22:44.065544 # ok 3898 # SKIP Streaming SVE set SVE get SVE for VL 7376
5626 22:22:44.065695 # ok 3899 # SKIP Streaming SVE set SVE get FPSIMD for VL 7376
5627 22:22:44.066102 # ok 3900 # SKIP Streaming SVE set FPSIMD get SVE for VL 7376
5628 22:22:44.066291 # ok 3901 Set Streaming SVE VL 7392
5629 22:22:44.066420 # ok 3902 # SKIP Streaming SVE set SVE get SVE for VL 7392
5630 22:22:44.066538 # ok 3903 # SKIP Streaming SVE set SVE get FPSIMD for VL 7392
5631 22:22:44.066676 # ok 3904 # SKIP Streaming SVE set FPSIMD get SVE for VL 7392
5632 22:22:44.066815 # ok 3905 Set Streaming SVE VL 7408
5633 22:22:44.066956 # ok 3906 # SKIP Streaming SVE set SVE get SVE for VL 7408
5634 22:22:44.067142 # ok 3907 # SKIP Streaming SVE set SVE get FPSIMD for VL 7408
5635 22:22:44.067303 # ok 3908 # SKIP Streaming SVE set FPSIMD get SVE for VL 7408
5636 22:22:44.067459 # ok 3909 Set Streaming SVE VL 7424
5637 22:22:44.067616 # ok 3910 # SKIP Streaming SVE set SVE get SVE for VL 7424
5638 22:22:44.067780 # ok 3911 # SKIP Streaming SVE set SVE get FPSIMD for VL 7424
5639 22:22:44.067935 # ok 3912 # SKIP Streaming SVE set FPSIMD get SVE for VL 7424
5640 22:22:44.068096 # ok 3913 Set Streaming SVE VL 7440
5641 22:22:44.068255 # ok 3914 # SKIP Streaming SVE set SVE get SVE for VL 7440
5642 22:22:44.068442 # ok 3915 # SKIP Streaming SVE set SVE get FPSIMD for VL 7440
5643 22:22:44.068606 # ok 3916 # SKIP Streaming SVE set FPSIMD get SVE for VL 7440
5644 22:22:44.068730 # ok 3917 Set Streaming SVE VL 7456
5645 22:22:44.068846 # ok 3918 # SKIP Streaming SVE set SVE get SVE for VL 7456
5646 22:22:44.068984 # ok 3919 # SKIP Streaming SVE set SVE get FPSIMD for VL 7456
5647 22:22:44.082852 # ok 3920 # SKIP Streaming SVE set FPSIMD get SVE for VL 7456
5648 22:22:44.083403 # ok 3921 Set Streaming SVE VL 7472
5649 22:22:44.083557 # ok 3922 # SKIP Streaming SVE set SVE get SVE for VL 7472
5650 22:22:44.083685 # ok 3923 # SKIP Streaming SVE set SVE get FPSIMD for VL 7472
5651 22:22:44.083802 # ok 3924 # SKIP Streaming SVE set FPSIMD get SVE for VL 7472
5652 22:22:44.091746 # ok 3925 Set Streaming SVE VL 7488
5653 22:22:44.092002 # ok 3926 # SKIP Streaming SVE set SVE get SVE for VL 7488
5654 22:22:44.092187 # ok 3927 # SKIP Streaming SVE set SVE get FPSIMD for VL 7488
5655 22:22:44.092616 # ok 3928 # SKIP Streaming SVE set FPSIMD get SVE for VL 7488
5656 22:22:44.092795 # ok 3929 Set Streaming SVE VL 7504
5657 22:22:44.092926 # ok 3930 # SKIP Streaming SVE set SVE get SVE for VL 7504
5658 22:22:44.093043 # ok 3931 # SKIP Streaming SVE set SVE get FPSIMD for VL 7504
5659 22:22:44.093157 # ok 3932 # SKIP Streaming SVE set FPSIMD get SVE for VL 7504
5660 22:22:44.093501 # ok 3933 Set Streaming SVE VL 7520
5661 22:22:44.095181 # ok 3934 # SKIP Streaming SVE set SVE get SVE for VL 7520
5662 22:22:44.095292 # ok 3935 # SKIP Streaming SVE set SVE get FPSIMD for VL 7520
5663 22:22:44.095615 # ok 3936 # SKIP Streaming SVE set FPSIMD get SVE for VL 7520
5664 22:22:44.095722 # ok 3937 Set Streaming SVE VL 7536
5665 22:22:44.095811 # ok 3938 # SKIP Streaming SVE set SVE get SVE for VL 7536
5666 22:22:44.095912 # ok 3939 # SKIP Streaming SVE set SVE get FPSIMD for VL 7536
5667 22:22:44.096013 # ok 3940 # SKIP Streaming SVE set FPSIMD get SVE for VL 7536
5668 22:22:44.096115 # ok 3941 Set Streaming SVE VL 7552
5669 22:22:44.096217 # ok 3942 # SKIP Streaming SVE set SVE get SVE for VL 7552
5670 22:22:44.096408 # ok 3943 # SKIP Streaming SVE set SVE get FPSIMD for VL 7552
5671 22:22:44.096788 # ok 3944 # SKIP Streaming SVE set FPSIMD get SVE for VL 7552
5672 22:22:44.098532 # ok 3945 Set Streaming SVE VL 7568
5673 22:22:44.098943 # ok 3946 # SKIP Streaming SVE set SVE get SVE for VL 7568
5674 22:22:44.099147 # ok 3947 # SKIP Streaming SVE set SVE get FPSIMD for VL 7568
5675 22:22:44.099332 # ok 3948 # SKIP Streaming SVE set FPSIMD get SVE for VL 7568
5676 22:22:44.099532 # ok 3949 Set Streaming SVE VL 7584
5677 22:22:44.099674 # ok 3950 # SKIP Streaming SVE set SVE get SVE for VL 7584
5678 22:22:44.099843 # ok 3951 # SKIP Streaming SVE set SVE get FPSIMD for VL 7584
5679 22:22:44.100057 # ok 3952 # SKIP Streaming SVE set FPSIMD get SVE for VL 7584
5680 22:22:44.100227 # ok 3953 Set Streaming SVE VL 7600
5681 22:22:44.100387 # ok 3954 # SKIP Streaming SVE set SVE get SVE for VL 7600
5682 22:22:44.100578 # ok 3955 # SKIP Streaming SVE set SVE get FPSIMD for VL 7600
5683 22:22:44.100745 # ok 3956 # SKIP Streaming SVE set FPSIMD get SVE for VL 7600
5684 22:22:44.100904 # ok 3957 Set Streaming SVE VL 7616
5685 22:22:44.101061 # ok 3958 # SKIP Streaming SVE set SVE get SVE for VL 7616
5686 22:22:44.101246 # ok 3959 # SKIP Streaming SVE set SVE get FPSIMD for VL 7616
5687 22:22:44.102664 # ok 3960 # SKIP Streaming SVE set FPSIMD get SVE for VL 7616
5688 22:22:44.103020 # ok 3961 Set Streaming SVE VL 7632
5689 22:22:44.103123 # ok 3962 # SKIP Streaming SVE set SVE get SVE for VL 7632
5690 22:22:44.103224 # ok 3963 # SKIP Streaming SVE set SVE get FPSIMD for VL 7632
5691 22:22:44.103311 # ok 3964 # SKIP Streaming SVE set FPSIMD get SVE for VL 7632
5692 22:22:44.103405 # ok 3965 Set Streaming SVE VL 7648
5693 22:22:44.103509 # ok 3966 # SKIP Streaming SVE set SVE get SVE for VL 7648
5694 22:22:44.103839 # ok 3967 # SKIP Streaming SVE set SVE get FPSIMD for VL 7648
5695 22:22:44.104007 # ok 3968 # SKIP Streaming SVE set FPSIMD get SVE for VL 7648
5696 22:22:44.104415 # ok 3969 Set Streaming SVE VL 7664
5697 22:22:44.104527 # ok 3970 # SKIP Streaming SVE set SVE get SVE for VL 7664
5698 22:22:44.104610 # ok 3971 # SKIP Streaming SVE set SVE get FPSIMD for VL 7664
5699 22:22:44.104691 # ok 3972 # SKIP Streaming SVE set FPSIMD get SVE for VL 7664
5700 22:22:44.104974 # ok 3973 Set Streaming SVE VL 7680
5701 22:22:44.105077 # ok 3974 # SKIP Streaming SVE set SVE get SVE for VL 7680
5702 22:22:44.105166 # ok 3975 # SKIP Streaming SVE set SVE get FPSIMD for VL 7680
5703 22:22:44.105253 # ok 3976 # SKIP Streaming SVE set FPSIMD get SVE for VL 7680
5704 22:22:44.108955 # ok 3977 Set Streaming SVE VL 7696
5705 22:22:44.109215 # ok 3978 # SKIP Streaming SVE set SVE get SVE for VL 7696
5706 22:22:44.109331 # ok 3979 # SKIP Streaming SVE set SVE get FPSIMD for VL 7696
5707 22:22:44.109436 # ok 3980 # SKIP Streaming SVE set FPSIMD get SVE for VL 7696
5708 22:22:44.109534 # ok 3981 Set Streaming SVE VL 7712
5709 22:22:44.109659 # ok 3982 # SKIP Streaming SVE set SVE get SVE for VL 7712
5710 22:22:44.109968 # ok 3983 # SKIP Streaming SVE set SVE get FPSIMD for VL 7712
5711 22:22:44.110070 # ok 3984 # SKIP Streaming SVE set FPSIMD get SVE for VL 7712
5712 22:22:44.110169 # ok 3985 Set Streaming SVE VL 7728
5713 22:22:44.110253 # ok 3986 # SKIP Streaming SVE set SVE get SVE for VL 7728
5714 22:22:44.110349 # ok 3987 # SKIP Streaming SVE set SVE get FPSIMD for VL 7728
5715 22:22:44.110665 # ok 3988 # SKIP Streaming SVE set FPSIMD get SVE for VL 7728
5716 22:22:44.110768 # ok 3989 Set Streaming SVE VL 7744
5717 22:22:44.111058 # ok 3990 # SKIP Streaming SVE set SVE get SVE for VL 7744
5718 22:22:44.111157 # ok 3991 # SKIP Streaming SVE set SVE get FPSIMD for VL 7744
5719 22:22:44.111241 # ok 3992 # SKIP Streaming SVE set FPSIMD get SVE for VL 7744
5720 22:22:44.111338 # ok 3993 Set Streaming SVE VL 7760
5721 22:22:44.111424 # ok 3994 # SKIP Streaming SVE set SVE get SVE for VL 7760
5722 22:22:44.111521 # ok 3995 # SKIP Streaming SVE set SVE get FPSIMD for VL 7760
5723 22:22:44.111617 # ok 3996 # SKIP Streaming SVE set FPSIMD get SVE for VL 7760
5724 22:22:44.111713 # ok 3997 Set Streaming SVE VL 7776
5725 22:22:44.112018 # ok 3998 # SKIP Streaming SVE set SVE get SVE for VL 7776
5726 22:22:44.112131 # ok 3999 # SKIP Streaming SVE set SVE get FPSIMD for VL 7776
5727 22:22:44.112437 # ok 4000 # SKIP Streaming SVE set FPSIMD get SVE for VL 7776
5728 22:22:44.112537 # ok 4001 Set Streaming SVE VL 7792
5729 22:22:44.112634 # ok 4002 # SKIP Streaming SVE set SVE get SVE for VL 7792
5730 22:22:44.115077 # ok 4003 # SKIP Streaming SVE set SVE get FPSIMD for VL 7792
5731 22:22:44.115359 # ok 4004 # SKIP Streaming SVE set FPSIMD get SVE for VL 7792
5732 22:22:44.115448 # ok 4005 Set Streaming SVE VL 7808
5733 22:22:44.115544 # ok 4006 # SKIP Streaming SVE set SVE get SVE for VL 7808
5734 22:22:44.115628 # ok 4007 # SKIP Streaming SVE set SVE get FPSIMD for VL 7808
5735 22:22:44.115725 # ok 4008 # SKIP Streaming SVE set FPSIMD get SVE for VL 7808
5736 22:22:44.115811 # ok 4009 Set Streaming SVE VL 7824
5737 22:22:44.115910 # ok 4010 # SKIP Streaming SVE set SVE get SVE for VL 7824
5738 22:22:44.116007 # ok 4011 # SKIP Streaming SVE set SVE get FPSIMD for VL 7824
5739 22:22:44.116338 # ok 4012 # SKIP Streaming SVE set FPSIMD get SVE for VL 7824
5740 22:22:44.116444 # ok 4013 Set Streaming SVE VL 7840
5741 22:22:44.116527 # ok 4014 # SKIP Streaming SVE set SVE get SVE for VL 7840
5742 22:22:44.116623 # ok 4015 # SKIP Streaming SVE set SVE get FPSIMD for VL 7840
5743 22:22:44.118470 # ok 4016 # SKIP Streaming SVE set FPSIMD get SVE for VL 7840
5744 22:22:44.118768 # ok 4017 Set Streaming SVE VL 7856
5745 22:22:44.118868 # ok 4018 # SKIP Streaming SVE set SVE get SVE for VL 7856
5746 22:22:44.118966 # ok 4019 # SKIP Streaming SVE set SVE get FPSIMD for VL 7856
5747 22:22:44.119062 # ok 4020 # SKIP Streaming SVE set FPSIMD get SVE for VL 7856
5748 22:22:44.119147 # ok 4021 Set Streaming SVE VL 7872
5749 22:22:44.119245 # ok 4022 # SKIP Streaming SVE set SVE get SVE for VL 7872
5750 22:22:44.119349 # ok 4023 # SKIP Streaming SVE set SVE get FPSIMD for VL 7872
5751 22:22:44.119446 # ok 4024 # SKIP Streaming SVE set FPSIMD get SVE for VL 7872
5752 22:22:44.119796 # ok 4025 Set Streaming SVE VL 7888
5753 22:22:44.119898 # ok 4026 # SKIP Streaming SVE set SVE get SVE for VL 7888
5754 22:22:44.120183 # ok 4027 # SKIP Streaming SVE set SVE get FPSIMD for VL 7888
5755 22:22:44.120282 # ok 4028 # SKIP Streaming SVE set FPSIMD get SVE for VL 7888
5756 22:22:44.120364 # ok 4029 Set Streaming SVE VL 7904
5757 22:22:44.120428 # ok 4030 # SKIP Streaming SVE set SVE get SVE for VL 7904
5758 22:22:44.120512 # ok 4031 # SKIP Streaming SVE set SVE get FPSIMD for VL 7904
5759 22:22:44.120620 # ok 4032 # SKIP Streaming SVE set FPSIMD get SVE for VL 7904
5760 22:22:44.122440 # ok 4033 Set Streaming SVE VL 7920
5761 22:22:44.122755 # ok 4034 # SKIP Streaming SVE set SVE get SVE for VL 7920
5762 22:22:44.122867 # ok 4035 # SKIP Streaming SVE set SVE get FPSIMD for VL 7920
5763 22:22:44.122953 # ok 4036 # SKIP Streaming SVE set FPSIMD get SVE for VL 7920
5764 22:22:44.123070 # ok 4037 Set Streaming SVE VL 7936
5765 22:22:44.123160 # ok 4038 # SKIP Streaming SVE set SVE get SVE for VL 7936
5766 22:22:44.123249 # ok 4039 # SKIP Streaming SVE set SVE get FPSIMD for VL 7936
5767 22:22:44.123337 # ok 4040 # SKIP Streaming SVE set FPSIMD get SVE for VL 7936
5768 22:22:44.123431 # ok 4041 Set Streaming SVE VL 7952
5769 22:22:44.123737 # ok 4042 # SKIP Streaming SVE set SVE get SVE for VL 7952
5770 22:22:44.123839 # ok 4043 # SKIP Streaming SVE set SVE get FPSIMD for VL 7952
5771 22:22:44.123946 # ok 4044 # SKIP Streaming SVE set FPSIMD get SVE for VL 7952
5772 22:22:44.124045 # ok 4045 Set Streaming SVE VL 7968
5773 22:22:44.124326 # ok 4046 # SKIP Streaming SVE set SVE get SVE for VL 7968
5774 22:22:44.124436 # ok 4047 # SKIP Streaming SVE set SVE get FPSIMD for VL 7968
5775 22:22:44.124549 # ok 4048 # SKIP Streaming SVE set FPSIMD get SVE for VL 7968
5776 22:22:44.129083 # ok 4049 Set Streaming SVE VL 7984
5777 22:22:44.129570 # ok 4050 # SKIP Streaming SVE set SVE get SVE for VL 7984
5778 22:22:44.129739 # ok 4051 # SKIP Streaming SVE set SVE get FPSIMD for VL 7984
5779 22:22:44.129914 # ok 4052 # SKIP Streaming SVE set FPSIMD get SVE for VL 7984
5780 22:22:44.130080 # ok 4053 Set Streaming SVE VL 8000
5781 22:22:44.130237 # ok 4054 # SKIP Streaming SVE set SVE get SVE for VL 8000
5782 22:22:44.130371 # ok 4055 # SKIP Streaming SVE set SVE get FPSIMD for VL 8000
5783 22:22:44.130496 # ok 4056 # SKIP Streaming SVE set FPSIMD get SVE for VL 8000
5784 22:22:44.130613 # ok 4057 Set Streaming SVE VL 8016
5785 22:22:44.130734 # ok 4058 # SKIP Streaming SVE set SVE get SVE for VL 8016
5786 22:22:44.130854 # ok 4059 # SKIP Streaming SVE set SVE get FPSIMD for VL 8016
5787 22:22:44.131007 # ok 4060 # SKIP Streaming SVE set FPSIMD get SVE for VL 8016
5788 22:22:44.131134 # ok 4061 Set Streaming SVE VL 8032
5789 22:22:44.131254 # ok 4062 # SKIP Streaming SVE set SVE get SVE for VL 8032
5790 22:22:44.131371 # ok 4063 # SKIP Streaming SVE set SVE get FPSIMD for VL 8032
5791 22:22:44.131530 # ok 4064 # SKIP Streaming SVE set FPSIMD get SVE for VL 8032
5792 22:22:44.131688 # ok 4065 Set Streaming SVE VL 8048
5793 22:22:44.131819 # ok 4066 # SKIP Streaming SVE set SVE get SVE for VL 8048
5794 22:22:44.131937 # ok 4067 # SKIP Streaming SVE set SVE get FPSIMD for VL 8048
5795 22:22:44.132087 # ok 4068 # SKIP Streaming SVE set FPSIMD get SVE for VL 8048
5796 22:22:44.132240 # ok 4069 Set Streaming SVE VL 8064
5797 22:22:44.132383 # ok 4070 # SKIP Streaming SVE set SVE get SVE for VL 8064
5798 22:22:44.132527 # ok 4071 # SKIP Streaming SVE set SVE get FPSIMD for VL 8064
5799 22:22:44.132687 # ok 4072 # SKIP Streaming SVE set FPSIMD get SVE for VL 8064
5800 22:22:44.132807 # ok 4073 Set Streaming SVE VL 8080
5801 22:22:44.132920 # ok 4074 # SKIP Streaming SVE set SVE get SVE for VL 8080
5802 22:22:44.133059 # ok 4075 # SKIP Streaming SVE set SVE get FPSIMD for VL 8080
5803 22:22:44.133179 # ok 4076 # SKIP Streaming SVE set FPSIMD get SVE for VL 8080
5804 22:22:44.133294 # ok 4077 Set Streaming SVE VL 8096
5805 22:22:44.133407 # ok 4078 # SKIP Streaming SVE set SVE get SVE for VL 8096
5806 22:22:44.145409 # ok 4079 # SKIP Streaming SVE set SVE get FPSIMD for VL 8096
5807 22:22:44.145766 # ok 4080 # SKIP Streaming SVE set FPSIMD get SVE for VL 8096
5808 22:22:44.145871 # ok 4081 Set Streaming SVE VL 8112
5809 22:22:44.145960 # ok 4082 # SKIP Streaming SVE set SVE get SVE for VL 8112
5810 22:22:44.146058 # ok 4083 # SKIP Streaming SVE set SVE get FPSIMD for VL 8112
5811 22:22:44.146157 # ok 4084 # SKIP Streaming SVE set FPSIMD get SVE for VL 8112
5812 22:22:44.146242 # ok 4085 Set Streaming SVE VL 8128
5813 22:22:44.146338 # ok 4086 # SKIP Streaming SVE set SVE get SVE for VL 8128
5814 22:22:44.146637 # ok 4087 # SKIP Streaming SVE set SVE get FPSIMD for VL 8128
5815 22:22:44.146731 # ok 4088 # SKIP Streaming SVE set FPSIMD get SVE for VL 8128
5816 22:22:44.146815 # ok 4089 Set Streaming SVE VL 8144
5817 22:22:44.147114 # ok 4090 # SKIP Streaming SVE set SVE get SVE for VL 8144
5818 22:22:44.147220 # ok 4091 # SKIP Streaming SVE set SVE get FPSIMD for VL 8144
5819 22:22:44.147305 # ok 4092 # SKIP Streaming SVE set FPSIMD get SVE for VL 8144
5820 22:22:44.147388 # ok 4093 Set Streaming SVE VL 8160
5821 22:22:44.147484 # ok 4094 # SKIP Streaming SVE set SVE get SVE for VL 8160
5822 22:22:44.147569 # ok 4095 # SKIP Streaming SVE set SVE get FPSIMD for VL 8160
5823 22:22:44.147651 # ok 4096 # SKIP Streaming SVE set FPSIMD get SVE for VL 8160
5824 22:22:44.147749 # ok 4097 Set Streaming SVE VL 8176
5825 22:22:44.147833 # ok 4098 # SKIP Streaming SVE set SVE get SVE for VL 8176
5826 22:22:44.147929 # ok 4099 # SKIP Streaming SVE set SVE get FPSIMD for VL 8176
5827 22:22:44.148227 # ok 4100 # SKIP Streaming SVE set FPSIMD get SVE for VL 8176
5828 22:22:44.148422 # ok 4101 Set Streaming SVE VL 8192
5829 22:22:44.148606 # ok 4102 # SKIP Streaming SVE set SVE get SVE for VL 8192
5830 22:22:44.148778 # ok 4103 # SKIP Streaming SVE set SVE get FPSIMD for VL 8192
5831 22:22:44.148940 # ok 4104 # SKIP Streaming SVE set FPSIMD get SVE for VL 8192
5832 22:22:44.156395 # # Totals: pass:1095 fail:0 xfail:0 xpass:0 skip:3009 error:0
5833 22:22:44.156703 ok 30 selftests: arm64: sve-ptrace
5834 22:22:44.156794 # selftests: arm64: sve-probe-vls
5835 22:22:44.156873 # TAP version 13
5836 22:22:44.158445 # 1..2
5837 22:22:44.158864 # ok 1 Enumerated 16 vector lengths
5838 22:22:44.159044 # ok 2 All vector lengths valid
5839 22:22:44.159214 # # 16
5840 22:22:44.159361 # # 32
5841 22:22:44.159503 # # 48
5842 22:22:44.159644 # # 64
5843 22:22:44.159782 # # 80
5844 22:22:44.159921 # # 96
5845 22:22:44.160061 # # 112
5846 22:22:44.160201 # # 128
5847 22:22:44.160339 # # 144
5848 22:22:44.160478 # # 160
5849 22:22:44.160655 # # 176
5850 22:22:44.160790 # # 192
5851 22:22:44.160930 # # 208
5852 22:22:44.161071 # # 224
5853 22:22:44.161211 # # 240
5854 22:22:44.161349 # # 256
5855 22:22:44.161488 # # Totals: pass:2 fail:0 xfail:0 xpass:0 skip:0 error:0
5856 22:22:44.161632 ok 31 selftests: arm64: sve-probe-vls
5857 22:22:44.164566 # selftests: arm64: vec-syscfg
5858 22:22:44.664589 # TAP version 13
5859 22:22:44.668106 # 1..20
5860 22:22:44.668565 # ok 1 SVE default vector length 64
5861 22:22:44.668722 # ok 2 SVE minimum vector length 16
5862 22:22:44.668844 # ok 3 SVE maximum vector length 256
5863 22:22:44.668959 # ok 4 SVE current VL is 64
5864 22:22:44.674706 # ok 5 SVE set VL 64 and have VL 64
5865 22:22:44.674906 # ok 6 SVE prctl() set min/max
5866 22:22:44.675301 # ok 7 SVE vector length used default
5867 22:22:44.675519 # ok 8 SVE vector length was inherited
5868 22:22:44.675734 # ok 9 SVE vector length set on exec
5869 22:22:44.675942 # ok 10 SVE prctl() set all VLs, 0 errors
5870 22:22:44.676114 # ok 11 SME default vector length 32
5871 22:22:44.676260 # ok 12 SME minimum vector length 16
5872 22:22:44.676401 # ok 13 SME maximum vector length 256
5873 22:22:44.676581 # ok 14 SME current VL is 32
5874 22:22:44.676717 # ok 15 SME set VL 32 and have VL 32
5875 22:22:44.676860 # ok 16 SME prctl() set min/max
5876 22:22:44.677000 # ok 17 SME vector length used default
5877 22:22:44.677139 # ok 18 SME vector length was inherited
5878 22:22:44.677279 # ok 19 SME vector length set on exec
5879 22:22:44.677418 # ok 20 SME prctl() set all VLs, 0 errors
5880 22:22:44.677559 # # Totals: pass:20 fail:0 xfail:0 xpass:0 skip:0 error:0
5881 22:22:44.692105 ok 32 selftests: arm64: vec-syscfg
5882 22:22:44.818580 # selftests: arm64: za-fork
5883 22:22:45.005926 # TAP version 13
5884 22:22:45.006060 # 1..1
5885 22:22:45.006163 # # PID: 1015
5886 22:22:45.006438 # ok 1 fork_test
5887 22:22:45.006528 # # Totals: pass:1 fail:0 xfail:0 xpass:0 skip:0 error:0
5888 22:22:45.018819 ok 33 selftests: arm64: za-fork
5889 22:22:45.155017 # selftests: arm64: za-ptrace
5890 22:22:45.295619 # TAP version 13
5891 22:22:45.295820 # 1..1536
5892 22:22:45.296243 # # Parent is 1033, child is 1034
5893 22:22:45.296440 # ok 1 Set VL 16
5894 22:22:45.296615 # ok 2 Disabled ZA for VL 16
5895 22:22:45.296766 # ok 3 Data match for VL 16
5896 22:22:45.296909 # ok 4 Set VL 32
5897 22:22:45.297050 # ok 5 Disabled ZA for VL 32
5898 22:22:45.297192 # ok 6 Data match for VL 32
5899 22:22:45.297331 # ok 7 Set VL 48
5900 22:22:45.297519 # ok 8 # SKIP Disabled ZA for VL 48
5901 22:22:45.297758 # ok 9 # SKIP Get and set data for VL 48
5902 22:22:45.297957 # ok 10 Set VL 64
5903 22:22:45.298134 # ok 11 Disabled ZA for VL 64
5904 22:22:45.298295 # ok 12 Data match for VL 64
5905 22:22:45.298451 # ok 13 Set VL 80
5906 22:22:45.298609 # ok 14 # SKIP Disabled ZA for VL 80
5907 22:22:45.298774 # ok 15 # SKIP Get and set data for VL 80
5908 22:22:45.298973 # ok 16 Set VL 96
5909 22:22:45.299142 # ok 17 # SKIP Disabled ZA for VL 96
5910 22:22:45.299307 # ok 18 # SKIP Get and set data for VL 96
5911 22:22:45.299472 # ok 19 Set VL 112
5912 22:22:45.299627 # ok 20 # SKIP Disabled ZA for VL 112
5913 22:22:45.299778 # ok 21 # SKIP Get and set data for VL 112
5914 22:22:45.299936 # ok 22 Set VL 128
5915 22:22:45.300095 # ok 23 Disabled ZA for VL 128
5916 22:22:45.300257 # ok 24 Data match for VL 128
5917 22:22:45.300408 # ok 25 Set VL 144
5918 22:22:45.300543 # ok 26 # SKIP Disabled ZA for VL 144
5919 22:22:45.300658 # ok 27 # SKIP Get and set data for VL 144
5920 22:22:45.300774 # ok 28 Set VL 160
5921 22:22:45.300886 # ok 29 # SKIP Disabled ZA for VL 160
5922 22:22:45.300999 # ok 30 # SKIP Get and set data for VL 160
5923 22:22:45.301113 # ok 31 Set VL 176
5924 22:22:45.301257 # ok 32 # SKIP Disabled ZA for VL 176
5925 22:22:45.301375 # ok 33 # SKIP Get and set data for VL 176
5926 22:22:45.301488 # ok 34 Set VL 192
5927 22:22:45.301600 # ok 35 # SKIP Disabled ZA for VL 192
5928 22:22:45.301809 # ok 36 # SKIP Get and set data for VL 192
5929 22:22:45.302003 # ok 37 Set VL 208
5930 22:22:45.302186 # ok 38 # SKIP Disabled ZA for VL 208
5931 22:22:45.302368 # ok 39 # SKIP Get and set data for VL 208
5932 22:22:45.302549 # ok 40 Set VL 224
5933 22:22:45.302729 # ok 41 # SKIP Disabled ZA for VL 224
5934 22:22:45.302871 # ok 42 # SKIP Get and set data for VL 224
5935 22:22:45.303012 # ok 43 Set VL 240
5936 22:22:45.303152 # ok 44 # SKIP Disabled ZA for VL 240
5937 22:22:45.303292 # ok 45 # SKIP Get and set data for VL 240
5938 22:22:45.303432 # ok 46 Set VL 256
5939 22:22:45.303570 # ok 47 Disabled ZA for VL 256
5940 22:22:45.303709 # ok 48 Data match for VL 256
5941 22:22:45.304200 # ok 49 Set VL 272
5942 22:22:45.304491 # ok 50 # SKIP Disabled ZA for VL 272
5943 22:22:45.304648 # ok 51 # SKIP Get and set data for VL 272
5944 22:22:45.304993 # ok 52 Set VL 288
5945 22:22:45.305154 # ok 53 # SKIP Disabled ZA for VL 288
5946 22:22:45.305335 # ok 54 # SKIP Get and set data for VL 288
5947 22:22:45.305501 # ok 55 Set VL 304
5948 22:22:45.305670 # ok 56 # SKIP Disabled ZA for VL 304
5949 22:22:45.305872 # ok 57 # SKIP Get and set data for VL 304
5950 22:22:45.306053 # ok 58 Set VL 320
5951 22:22:45.306198 # ok 59 # SKIP Disabled ZA for VL 320
5952 22:22:45.306361 # ok 60 # SKIP Get and set data for VL 320
5953 22:22:45.306507 # ok 61 Set VL 336
5954 22:22:45.306668 # ok 62 # SKIP Disabled ZA for VL 336
5955 22:22:45.306814 # ok 63 # SKIP Get and set data for VL 336
5956 22:22:45.306999 # ok 64 Set VL 352
5957 22:22:45.307152 # ok 65 # SKIP Disabled ZA for VL 352
5958 22:22:45.307310 # ok 66 # SKIP Get and set data for VL 352
5959 22:22:45.307466 # ok 67 Set VL 368
5960 22:22:45.307627 # ok 68 # SKIP Disabled ZA for VL 368
5961 22:22:45.307783 # ok 69 # SKIP Get and set data for VL 368
5962 22:22:45.307935 # ok 70 Set VL 384
5963 22:22:45.308087 # ok 71 # SKIP Disabled ZA for VL 384
5964 22:22:45.308239 # ok 72 # SKIP Get and set data for VL 384
5965 22:22:45.308378 # ok 73 Set VL 400
5966 22:22:45.308491 # ok 74 # SKIP Disabled ZA for VL 400
5967 22:22:45.308632 # ok 75 # SKIP Get and set data for VL 400
5968 22:22:45.308750 # ok 76 Set VL 416
5969 22:22:45.308863 # ok 77 # SKIP Disabled ZA for VL 416
5970 22:22:45.308976 # ok 78 # SKIP Get and set data for VL 416
5971 22:22:45.309088 # ok 79 Set VL 432
5972 22:22:45.309199 # ok 80 # SKIP Disabled ZA for VL 432
5973 22:22:45.309312 # ok 81 # SKIP Get and set data for VL 432
5974 22:22:45.309425 # ok 82 Set VL 448
5975 22:22:45.309537 # ok 83 # SKIP Disabled ZA for VL 448
5976 22:22:45.309679 # ok 84 # SKIP Get and set data for VL 448
5977 22:22:45.309895 # ok 85 Set VL 464
5978 22:22:45.310079 # ok 86 # SKIP Disabled ZA for VL 464
5979 22:22:45.310259 # ok 87 # SKIP Get and set data for VL 464
5980 22:22:45.310440 # ok 88 Set VL 480
5981 22:22:45.310620 # ok 89 # SKIP Disabled ZA for VL 480
5982 22:22:45.314858 # ok 90 # SKIP Get and set data for VL 480
5983 22:22:45.315163 # ok 91 Set VL 496
5984 22:22:45.315266 # ok 92 # SKIP Disabled ZA for VL 496
5985 22:22:45.315352 # ok 93 # SKIP Get and set data for VL 496
5986 22:22:45.315439 # ok 94 Set VL 512
5987 22:22:45.315535 # ok 95 # SKIP Disabled ZA for VL 512
5988 22:22:45.315637 # ok 96 # SKIP Get and set data for VL 512
5989 22:22:45.315723 # ok 97 Set VL 528
5990 22:22:45.315808 # ok 98 # SKIP Disabled ZA for VL 528
5991 22:22:45.315891 # ok 99 # SKIP Get and set data for VL 528
5992 22:22:45.315974 # ok 100 Set VL 544
5993 22:22:45.316071 # ok 101 # SKIP Disabled ZA for VL 544
5994 22:22:45.316158 # ok 102 # SKIP Get and set data for VL 544
5995 22:22:45.316241 # ok 103 Set VL 560
5996 22:22:45.316324 # ok 104 # SKIP Disabled ZA for VL 560
5997 22:22:45.316421 # ok 105 # SKIP Get and set data for VL 560
5998 22:22:45.316507 # ok 106 Set VL 576
5999 22:22:45.316590 # ok 107 # SKIP Disabled ZA for VL 576
6000 22:22:45.317111 # ok 108 # SKIP Get and set data for VL 576
6001 22:22:45.317307 # ok 109 Set VL 592
6002 22:22:45.317478 # ok 110 # SKIP Disabled ZA for VL 592
6003 22:22:45.317677 # ok 111 # SKIP Get and set data for VL 592
6004 22:22:45.317836 # ok 112 Set VL 608
6005 22:22:45.317979 # ok 113 # SKIP Disabled ZA for VL 608
6006 22:22:45.318137 # ok 114 # SKIP Get and set data for VL 608
6007 22:22:45.318289 # ok 115 Set VL 624
6008 22:22:45.318424 # ok 116 # SKIP Disabled ZA for VL 624
6009 22:22:45.318564 # ok 117 # SKIP Get and set data for VL 624
6010 22:22:45.318679 # ok 118 Set VL 640
6011 22:22:45.318788 # ok 119 # SKIP Disabled ZA for VL 640
6012 22:22:45.318897 # ok 120 # SKIP Get and set data for VL 640
6013 22:22:45.319007 # ok 121 Set VL 656
6014 22:22:45.319147 # ok 122 # SKIP Disabled ZA for VL 656
6015 22:22:45.319301 # ok 123 # SKIP Get and set data for VL 656
6016 22:22:45.319461 # ok 124 Set VL 672
6017 22:22:45.319642 # ok 125 # SKIP Disabled ZA for VL 672
6018 22:22:45.319806 # ok 126 # SKIP Get and set data for VL 672
6019 22:22:45.319967 # ok 127 Set VL 688
6020 22:22:45.320126 # ok 128 # SKIP Disabled ZA for VL 688
6021 22:22:45.320260 # ok 129 # SKIP Get and set data for VL 688
6022 22:22:45.320399 # ok 130 Set VL 704
6023 22:22:45.320541 # ok 131 # SKIP Disabled ZA for VL 704
6024 22:22:45.320661 # ok 132 # SKIP Get and set data for VL 704
6025 22:22:45.320777 # ok 133 Set VL 720
6026 22:22:45.320889 # ok 134 # SKIP Disabled ZA for VL 720
6027 22:22:45.321003 # ok 135 # SKIP Get and set data for VL 720
6028 22:22:45.321116 # ok 136 Set VL 736
6029 22:22:45.321228 # ok 137 # SKIP Disabled ZA for VL 736
6030 22:22:45.321341 # ok 138 # SKIP Get and set data for VL 736
6031 22:22:45.330101 # ok 139 Set VL 752
6032 22:22:45.330516 # ok 140 # SKIP Disabled ZA for VL 752
6033 22:22:45.330623 # ok 141 # SKIP Get and set data for VL 752
6034 22:22:45.330710 # ok 142 Set VL 768
6035 22:22:45.330793 # ok 143 # SKIP Disabled ZA for VL 768
6036 22:22:45.330878 # ok 144 # SKIP Get and set data for VL 768
6037 22:22:45.330959 # ok 145 Set VL 784
6038 22:22:45.331056 # ok 146 # SKIP Disabled ZA for VL 784
6039 22:22:45.331139 # ok 147 # SKIP Get and set data for VL 784
6040 22:22:45.331221 # ok 148 Set VL 800
6041 22:22:45.331301 # ok 149 # SKIP Disabled ZA for VL 800
6042 22:22:45.331382 # ok 150 # SKIP Get and set data for VL 800
6043 22:22:45.331477 # ok 151 Set VL 816
6044 22:22:45.331561 # ok 152 # SKIP Disabled ZA for VL 816
6045 22:22:45.331642 # ok 153 # SKIP Get and set data for VL 816
6046 22:22:45.331724 # ok 154 Set VL 832
6047 22:22:45.331819 # ok 155 # SKIP Disabled ZA for VL 832
6048 22:22:45.331903 # ok 156 # SKIP Get and set data for VL 832
6049 22:22:45.331984 # ok 157 Set VL 848
6050 22:22:45.332065 # ok 158 # SKIP Disabled ZA for VL 848
6051 22:22:45.332161 # ok 159 # SKIP Get and set data for VL 848
6052 22:22:45.332245 # ok 160 Set VL 864
6053 22:22:45.332327 # ok 161 # SKIP Disabled ZA for VL 864
6054 22:22:45.332422 # ok 162 # SKIP Get and set data for VL 864
6055 22:22:45.332505 # ok 163 Set VL 880
6056 22:22:45.332936 # ok 164 # SKIP Disabled ZA for VL 880
6057 22:22:45.333352 # ok 165 # SKIP Get and set data for VL 880
6058 22:22:45.333552 # ok 166 Set VL 896
6059 22:22:45.333771 # ok 167 # SKIP Disabled ZA for VL 896
6060 22:22:45.333964 # ok 168 # SKIP Get and set data for VL 896
6061 22:22:45.334106 # ok 169 Set VL 912
6062 22:22:45.334272 # ok 170 # SKIP Disabled ZA for VL 912
6063 22:22:45.334405 # ok 171 # SKIP Get and set data for VL 912
6064 22:22:45.334557 # ok 172 Set VL 928
6065 22:22:45.334698 # ok 173 # SKIP Disabled ZA for VL 928
6066 22:22:45.334853 # ok 174 # SKIP Get and set data for VL 928
6067 22:22:45.335012 # ok 175 Set VL 944
6068 22:22:45.335157 # ok 176 # SKIP Disabled ZA for VL 944
6069 22:22:45.335317 # ok 177 # SKIP Get and set data for VL 944
6070 22:22:45.335474 # ok 178 Set VL 960
6071 22:22:45.335630 # ok 179 # SKIP Disabled ZA for VL 960
6072 22:22:45.335816 # ok 180 # SKIP Get and set data for VL 960
6073 22:22:45.335980 # ok 181 Set VL 976
6074 22:22:45.336147 # ok 182 # SKIP Disabled ZA for VL 976
6075 22:22:45.336314 # ok 183 # SKIP Get and set data for VL 976
6076 22:22:45.336444 # ok 184 Set VL 992
6077 22:22:45.336557 # ok 185 # SKIP Disabled ZA for VL 992
6078 22:22:45.336670 # ok 186 # SKIP Get and set data for VL 992
6079 22:22:45.336782 # ok 187 Set VL 1008
6080 22:22:45.336894 # ok 188 # SKIP Disabled ZA for VL 1008
6081 22:22:45.337006 # ok 189 # SKIP Get and set data for VL 1008
6082 22:22:45.337118 # ok 190 Set VL 1024
6083 22:22:45.337229 # ok 191 # SKIP Disabled ZA for VL 1024
6084 22:22:45.337341 # ok 192 # SKIP Get and set data for VL 1024
6085 22:22:45.337455 # ok 193 Set VL 1040
6086 22:22:45.337567 # ok 194 # SKIP Disabled ZA for VL 1040
6087 22:22:45.337734 # ok 195 # SKIP Get and set data for VL 1040
6088 22:22:45.337939 # ok 196 Set VL 1056
6089 22:22:45.338120 # ok 197 # SKIP Disabled ZA for VL 1056
6090 22:22:45.338339 # ok 198 # SKIP Get and set data for VL 1056
6091 22:22:45.338527 # ok 199 Set VL 1072
6092 22:22:45.338708 # ok 200 # SKIP Disabled ZA for VL 1072
6093 22:22:45.338868 # ok 201 # SKIP Get and set data for VL 1072
6094 22:22:45.339010 # ok 202 Set VL 1088
6095 22:22:45.339152 # ok 203 # SKIP Disabled ZA for VL 1088
6096 22:22:45.342915 # ok 204 # SKIP Get and set data for VL 1088
6097 22:22:45.343100 # ok 205 Set VL 1104
6098 22:22:45.343472 # ok 206 # SKIP Disabled ZA for VL 1104
6099 22:22:45.343668 # ok 207 # SKIP Get and set data for VL 1104
6100 22:22:45.343836 # ok 208 Set VL 1120
6101 22:22:45.344000 # ok 209 # SKIP Disabled ZA for VL 1120
6102 22:22:45.344144 # ok 210 # SKIP Get and set data for VL 1120
6103 22:22:45.344286 # ok 211 Set VL 1136
6104 22:22:45.344435 # ok 212 # SKIP Disabled ZA for VL 1136
6105 22:22:45.344556 # ok 213 # SKIP Get and set data for VL 1136
6106 22:22:45.344670 # ok 214 Set VL 1152
6107 22:22:45.344787 # ok 215 # SKIP Disabled ZA for VL 1152
6108 22:22:45.344919 # ok 216 # SKIP Get and set data for VL 1152
6109 22:22:45.345071 # ok 217 Set VL 1168
6110 22:22:45.345222 # ok 218 # SKIP Disabled ZA for VL 1168
6111 22:22:45.345377 # ok 219 # SKIP Get and set data for VL 1168
6112 22:22:45.345533 # ok 220 Set VL 1184
6113 22:22:45.345730 # ok 221 # SKIP Disabled ZA for VL 1184
6114 22:22:45.345893 # ok 222 # SKIP Get and set data for VL 1184
6115 22:22:45.346055 # ok 223 Set VL 1200
6116 22:22:45.346211 # ok 224 # SKIP Disabled ZA for VL 1200
6117 22:22:45.346370 # ok 225 # SKIP Get and set data for VL 1200
6118 22:22:45.346528 # ok 226 Set VL 1216
6119 22:22:45.346685 # ok 227 # SKIP Disabled ZA for VL 1216
6120 22:22:45.346845 # ok 228 # SKIP Get and set data for VL 1216
6121 22:22:45.347010 # ok 229 Set VL 1232
6122 22:22:45.347169 # ok 230 # SKIP Disabled ZA for VL 1232
6123 22:22:45.347363 # ok 231 # SKIP Get and set data for VL 1232
6124 22:22:45.347516 # ok 232 Set VL 1248
6125 22:22:45.347667 # ok 233 # SKIP Disabled ZA for VL 1248
6126 22:22:45.347828 # ok 234 # SKIP Get and set data for VL 1248
6127 22:22:45.347989 # ok 235 Set VL 1264
6128 22:22:45.348130 # ok 236 # SKIP Disabled ZA for VL 1264
6129 22:22:45.348271 # ok 237 # SKIP Get and set data for VL 1264
6130 22:22:45.348421 # ok 238 Set VL 1280
6131 22:22:45.348539 # ok 239 # SKIP Disabled ZA for VL 1280
6132 22:22:45.348652 # ok 240 # SKIP Get and set data for VL 1280
6133 22:22:45.348764 # ok 241 Set VL 1296
6134 22:22:45.348874 # ok 242 # SKIP Disabled ZA for VL 1296
6135 22:22:45.348986 # ok 243 # SKIP Get and set data for VL 1296
6136 22:22:45.349098 # ok 244 Set VL 1312
6137 22:22:45.349210 # ok 245 # SKIP Disabled ZA for VL 1312
6138 22:22:45.349325 # ok 246 # SKIP Get and set data for VL 1312
6139 22:22:45.349439 # ok 247 Set VL 1328
6140 22:22:45.349550 # ok 248 # SKIP Disabled ZA for VL 1328
6141 22:22:45.349707 # ok 249 # SKIP Get and set data for VL 1328
6142 22:22:45.349915 # ok 250 Set VL 1344
6143 22:22:45.350135 # ok 251 # SKIP Disabled ZA for VL 1344
6144 22:22:45.350322 # ok 252 # SKIP Get and set data for VL 1344
6145 22:22:45.350505 # ok 253 Set VL 1360
6146 22:22:45.350687 # ok 254 # SKIP Disabled ZA for VL 1360
6147 22:22:45.350870 # ok 255 # SKIP Get and set data for VL 1360
6148 22:22:45.351049 # ok 256 Set VL 1376
6149 22:22:45.351229 # ok 257 # SKIP Disabled ZA for VL 1376
6150 22:22:45.351406 # ok 258 # SKIP Get and set data for VL 1376
6151 22:22:45.351759 # ok 259 Set VL 1392
6152 22:22:45.351895 # ok 260 # SKIP Disabled ZA for VL 1392
6153 22:22:45.352039 # ok 261 # SKIP Get and set data for VL 1392
6154 22:22:45.358979 # ok 262 Set VL 1408
6155 22:22:45.359090 # ok 263 # SKIP Disabled ZA for VL 1408
6156 22:22:45.359372 # ok 264 # SKIP Get and set data for VL 1408
6157 22:22:45.359479 # ok 265 Set VL 1424
6158 22:22:45.359565 # ok 266 # SKIP Disabled ZA for VL 1424
6159 22:22:45.359649 # ok 267 # SKIP Get and set data for VL 1424
6160 22:22:45.359731 # ok 268 Set VL 1440
6161 22:22:45.359829 # ok 269 # SKIP Disabled ZA for VL 1440
6162 22:22:45.359914 # ok 270 # SKIP Get and set data for VL 1440
6163 22:22:45.359998 # ok 271 Set VL 1456
6164 22:22:45.360082 # ok 272 # SKIP Disabled ZA for VL 1456
6165 22:22:45.360180 # ok 273 # SKIP Get and set data for VL 1456
6166 22:22:45.360266 # ok 274 Set VL 1472
6167 22:22:45.360349 # ok 275 # SKIP Disabled ZA for VL 1472
6168 22:22:45.360447 # ok 276 # SKIP Get and set data for VL 1472
6169 22:22:45.360533 # ok 277 Set VL 1488
6170 22:22:45.360615 # ok 278 # SKIP Disabled ZA for VL 1488
6171 22:22:45.360933 # ok 279 # SKIP Get and set data for VL 1488
6172 22:22:45.361220 # ok 280 Set VL 1504
6173 22:22:45.361323 # ok 281 # SKIP Disabled ZA for VL 1504
6174 22:22:45.361409 # ok 282 # SKIP Get and set data for VL 1504
6175 22:22:45.361507 # ok 283 Set VL 1520
6176 22:22:45.361593 # ok 284 # SKIP Disabled ZA for VL 1520
6177 22:22:45.361685 # ok 285 # SKIP Get and set data for VL 1520
6178 22:22:45.361785 # ok 286 Set VL 1536
6179 22:22:45.361871 # ok 287 # SKIP Disabled ZA for VL 1536
6180 22:22:45.361956 # ok 288 # SKIP Get and set data for VL 1536
6181 22:22:45.362046 # ok 289 Set VL 1552
6182 22:22:45.362144 # ok 290 # SKIP Disabled ZA for VL 1552
6183 22:22:45.362228 # ok 291 # SKIP Get and set data for VL 1552
6184 22:22:45.362311 # ok 292 Set VL 1568
6185 22:22:45.362407 # ok 293 # SKIP Disabled ZA for VL 1568
6186 22:22:45.362492 # ok 294 # SKIP Get and set data for VL 1568
6187 22:22:45.362575 # ok 295 Set VL 1584
6188 22:22:45.362671 # ok 296 # SKIP Disabled ZA for VL 1584
6189 22:22:45.362754 # ok 297 # SKIP Get and set data for VL 1584
6190 22:22:45.362836 # ok 298 Set VL 1600
6191 22:22:45.362932 # ok 299 # SKIP Disabled ZA for VL 1600
6192 22:22:45.363016 # ok 300 # SKIP Get and set data for VL 1600
6193 22:22:45.363098 # ok 301 Set VL 1616
6194 22:22:45.363193 # ok 302 # SKIP Disabled ZA for VL 1616
6195 22:22:45.363278 # ok 303 # SKIP Get and set data for VL 1616
6196 22:22:45.363373 # ok 304 Set VL 1632
6197 22:22:45.363457 # ok 305 # SKIP Disabled ZA for VL 1632
6198 22:22:45.363553 # ok 306 # SKIP Get and set data for VL 1632
6199 22:22:45.363639 # ok 307 Set VL 1648
6200 22:22:45.363734 # ok 308 # SKIP Disabled ZA for VL 1648
6201 22:22:45.363821 # ok 309 # SKIP Get and set data for VL 1648
6202 22:22:45.363919 # ok 310 Set VL 1664
6203 22:22:45.364003 # ok 311 # SKIP Disabled ZA for VL 1664
6204 22:22:45.364098 # ok 312 # SKIP Get and set data for VL 1664
6205 22:22:45.364195 # ok 313 Set VL 1680
6206 22:22:45.364291 # ok 314 # SKIP Disabled ZA for VL 1680
6207 22:22:45.371617 # ok 315 # SKIP Get and set data for VL 1680
6208 22:22:45.372033 # ok 316 Set VL 1696
6209 22:22:45.372211 # ok 317 # SKIP Disabled ZA for VL 1696
6210 22:22:45.372380 # ok 318 # SKIP Get and set data for VL 1696
6211 22:22:45.372506 # ok 319 Set VL 1712
6212 22:22:45.372647 # ok 320 # SKIP Disabled ZA for VL 1712
6213 22:22:45.372768 # ok 321 # SKIP Get and set data for VL 1712
6214 22:22:45.372888 # ok 322 Set VL 1728
6215 22:22:45.373004 # ok 323 # SKIP Disabled ZA for VL 1728
6216 22:22:45.399907 # ok 324 # SKIP Get and set data for VL 1728
6217 22:22:45.400019 # ok 325 Set VL 1744
6218 22:22:45.400310 # ok 326 # SKIP Disabled ZA for VL 1744
6219 22:22:45.400480 # ok 327 # SKIP Get and set data for VL 1744
6220 22:22:45.400602 # ok 328 Set VL 1760
6221 22:22:45.400740 # ok 329 # SKIP Disabled ZA for VL 1760
6222 22:22:45.411053 # ok 330 # SKIP Get and set data for VL 1760
6223 22:22:45.411460 # ok 331 Set VL 1776
6224 22:22:45.411564 # ok 332 # SKIP Disabled ZA for VL 1776
6225 22:22:45.411648 # ok 333 # SKIP Get and set data for VL 1776
6226 22:22:45.411730 # ok 334 Set VL 1792
6227 22:22:45.411811 # ok 335 # SKIP Disabled ZA for VL 1792
6228 22:22:45.411907 # ok 336 # SKIP Get and set data for VL 1792
6229 22:22:45.411991 # ok 337 Set VL 1808
6230 22:22:45.412073 # ok 338 # SKIP Disabled ZA for VL 1808
6231 22:22:45.412153 # ok 339 # SKIP Get and set data for VL 1808
6232 22:22:45.412234 # ok 340 Set VL 1824
6233 22:22:45.412314 # ok 341 # SKIP Disabled ZA for VL 1824
6234 22:22:45.412409 # ok 342 # SKIP Get and set data for VL 1824
6235 22:22:45.412493 # ok 343 Set VL 1840
6236 22:22:45.412574 # ok 344 # SKIP Disabled ZA for VL 1840
6237 22:22:45.412655 # ok 345 # SKIP Get and set data for VL 1840
6238 22:22:45.412735 # ok 346 Set VL 1856
6239 22:22:45.412830 # ok 347 # SKIP Disabled ZA for VL 1856
6240 22:22:45.424309 # ok 348 # SKIP Get and set data for VL 1856
6241 22:22:45.424476 # ok 349 Set VL 1872
6242 22:22:45.424803 # ok 350 # SKIP Disabled ZA for VL 1872
6243 22:22:45.434023 # ok 351 # SKIP Get and set data for VL 1872
6244 22:22:45.434209 # ok 352 Set VL 1888
6245 22:22:45.434423 # ok 353 # SKIP Disabled ZA for VL 1888
6246 22:22:45.434569 # ok 354 # SKIP Get and set data for VL 1888
6247 22:22:45.434689 # ok 355 Set VL 1904
6248 22:22:45.434805 # ok 356 # SKIP Disabled ZA for VL 1904
6249 22:22:45.434919 # ok 357 # SKIP Get and set data for VL 1904
6250 22:22:45.435035 # ok 358 Set VL 1920
6251 22:22:45.435388 # ok 359 # SKIP Disabled ZA for VL 1920
6252 22:22:45.435611 # ok 360 # SKIP Get and set data for VL 1920
6253 22:22:45.435817 # ok 361 Set VL 1936
6254 22:22:45.436013 # ok 362 # SKIP Disabled ZA for VL 1936
6255 22:22:45.436223 # ok 363 # SKIP Get and set data for VL 1936
6256 22:22:45.436387 # ok 364 Set VL 1952
6257 22:22:45.436508 # ok 365 # SKIP Disabled ZA for VL 1952
6258 22:22:45.436624 # ok 366 # SKIP Get and set data for VL 1952
6259 22:22:45.436740 # ok 367 Set VL 1968
6260 22:22:45.436854 # ok 368 # SKIP Disabled ZA for VL 1968
6261 22:22:45.436972 # ok 369 # SKIP Get and set data for VL 1968
6262 22:22:45.437087 # ok 370 Set VL 1984
6263 22:22:45.437224 # ok 371 # SKIP Disabled ZA for VL 1984
6264 22:22:45.441904 # ok 372 # SKIP Get and set data for VL 1984
6265 22:22:45.442115 # ok 373 Set VL 2000
6266 22:22:45.442516 # ok 374 # SKIP Disabled ZA for VL 2000
6267 22:22:45.442669 # ok 375 # SKIP Get and set data for VL 2000
6268 22:22:45.442793 # ok 376 Set VL 2016
6269 22:22:45.442918 # ok 377 # SKIP Disabled ZA for VL 2016
6270 22:22:45.443046 # ok 378 # SKIP Get and set data for VL 2016
6271 22:22:45.443218 # ok 379 Set VL 2032
6272 22:22:45.443391 # ok 380 # SKIP Disabled ZA for VL 2032
6273 22:22:45.443523 # ok 381 # SKIP Get and set data for VL 2032
6274 22:22:45.443680 # ok 382 Set VL 2048
6275 22:22:45.443821 # ok 383 # SKIP Disabled ZA for VL 2048
6276 22:22:45.443946 # ok 384 # SKIP Get and set data for VL 2048
6277 22:22:45.444073 # ok 385 Set VL 2064
6278 22:22:45.444201 # ok 386 # SKIP Disabled ZA for VL 2064
6279 22:22:45.444327 # ok 387 # SKIP Get and set data for VL 2064
6280 22:22:45.444451 # ok 388 Set VL 2080
6281 22:22:45.444569 # ok 389 # SKIP Disabled ZA for VL 2080
6282 22:22:45.444713 # ok 390 # SKIP Get and set data for VL 2080
6283 22:22:45.444835 # ok 391 Set VL 2096
6284 22:22:45.444953 # ok 392 # SKIP Disabled ZA for VL 2096
6285 22:22:45.445071 # ok 393 # SKIP Get and set data for VL 2096
6286 22:22:45.445185 # ok 394 Set VL 2112
6287 22:22:45.445299 # ok 395 # SKIP Disabled ZA for VL 2112
6288 22:22:45.445413 # ok 396 # SKIP Get and set data for VL 2112
6289 22:22:45.445527 # ok 397 Set VL 2128
6290 22:22:45.449846 # ok 398 # SKIP Disabled ZA for VL 2128
6291 22:22:45.450232 # ok 399 # SKIP Get and set data for VL 2128
6292 22:22:45.450438 # ok 400 Set VL 2144
6293 22:22:45.450611 # ok 401 # SKIP Disabled ZA for VL 2144
6294 22:22:45.450768 # ok 402 # SKIP Get and set data for VL 2144
6295 22:22:45.450974 # ok 403 Set VL 2160
6296 22:22:45.451139 # ok 404 # SKIP Disabled ZA for VL 2160
6297 22:22:45.451283 # ok 405 # SKIP Get and set data for VL 2160
6298 22:22:45.451403 # ok 406 Set VL 2176
6299 22:22:45.451548 # ok 407 # SKIP Disabled ZA for VL 2176
6300 22:22:45.451715 # ok 408 # SKIP Get and set data for VL 2176
6301 22:22:45.451864 # ok 409 Set VL 2192
6302 22:22:45.451983 # ok 410 # SKIP Disabled ZA for VL 2192
6303 22:22:45.452138 # ok 411 # SKIP Get and set data for VL 2192
6304 22:22:45.452290 # ok 412 Set VL 2208
6305 22:22:45.452450 # ok 413 # SKIP Disabled ZA for VL 2208
6306 22:22:45.452570 # ok 414 # SKIP Get and set data for VL 2208
6307 22:22:45.452683 # ok 415 Set VL 2224
6308 22:22:45.452796 # ok 416 # SKIP Disabled ZA for VL 2224
6309 22:22:45.452909 # ok 417 # SKIP Get and set data for VL 2224
6310 22:22:45.453020 # ok 418 Set VL 2240
6311 22:22:45.453132 # ok 419 # SKIP Disabled ZA for VL 2240
6312 22:22:45.453244 # ok 420 # SKIP Get and set data for VL 2240
6313 22:22:45.453356 # ok 421 Set VL 2256
6314 22:22:45.453468 # ok 422 # SKIP Disabled ZA for VL 2256
6315 22:22:45.453579 # ok 423 # SKIP Get and set data for VL 2256
6316 22:22:45.453748 # ok 424 Set VL 2272
6317 22:22:45.453944 # ok 425 # SKIP Disabled ZA for VL 2272
6318 22:22:45.454131 # ok 426 # SKIP Get and set data for VL 2272
6319 22:22:45.454313 # ok 427 Set VL 2288
6320 22:22:45.454494 # ok 428 # SKIP Disabled ZA for VL 2288
6321 22:22:45.458256 # ok 429 # SKIP Get and set data for VL 2288
6322 22:22:45.458460 # ok 430 Set VL 2304
6323 22:22:45.458914 # ok 431 # SKIP Disabled ZA for VL 2304
6324 22:22:45.459103 # ok 432 # SKIP Get and set data for VL 2304
6325 22:22:45.459300 # ok 433 Set VL 2320
6326 22:22:45.459480 # ok 434 # SKIP Disabled ZA for VL 2320
6327 22:22:45.459665 # ok 435 # SKIP Get and set data for VL 2320
6328 22:22:45.459810 # ok 436 Set VL 2336
6329 22:22:45.459940 # ok 437 # SKIP Disabled ZA for VL 2336
6330 22:22:45.460159 # ok 438 # SKIP Get and set data for VL 2336
6331 22:22:45.460360 # ok 439 Set VL 2352
6332 22:22:45.460523 # ok 440 # SKIP Disabled ZA for VL 2352
6333 22:22:45.460651 # ok 441 # SKIP Get and set data for VL 2352
6334 22:22:45.460766 # ok 442 Set VL 2368
6335 22:22:45.460879 # ok 443 # SKIP Disabled ZA for VL 2368
6336 22:22:45.460992 # ok 444 # SKIP Get and set data for VL 2368
6337 22:22:45.461103 # ok 445 Set VL 2384
6338 22:22:45.461213 # ok 446 # SKIP Disabled ZA for VL 2384
6339 22:22:45.461399 # ok 447 # SKIP Get and set data for VL 2384
6340 22:22:45.461570 # ok 448 Set VL 2400
6341 22:22:45.461774 # ok 449 # SKIP Disabled ZA for VL 2400
6342 22:22:45.461998 # ok 450 # SKIP Get and set data for VL 2400
6343 22:22:45.462211 # ok 451 Set VL 2416
6344 22:22:45.462398 # ok 452 # SKIP Disabled ZA for VL 2416
6345 22:22:45.462635 # ok 453 # SKIP Get and set data for VL 2416
6346 22:22:45.462840 # ok 454 Set VL 2432
6347 22:22:45.463014 # ok 455 # SKIP Disabled ZA for VL 2432
6348 22:22:45.463194 # ok 456 # SKIP Get and set data for VL 2432
6349 22:22:45.463414 # ok 457 Set VL 2448
6350 22:22:45.463650 # ok 458 # SKIP Disabled ZA for VL 2448
6351 22:22:45.463847 # ok 459 # SKIP Get and set data for VL 2448
6352 22:22:45.464057 # ok 460 Set VL 2464
6353 22:22:45.464262 # ok 461 # SKIP Disabled ZA for VL 2464
6354 22:22:45.464436 # ok 462 # SKIP Get and set data for VL 2464
6355 22:22:45.464580 # ok 463 Set VL 2480
6356 22:22:45.464695 # ok 464 # SKIP Disabled ZA for VL 2480
6357 22:22:45.464809 # ok 465 # SKIP Get and set data for VL 2480
6358 22:22:45.464920 # ok 466 Set VL 2496
6359 22:22:45.465035 # ok 467 # SKIP Disabled ZA for VL 2496
6360 22:22:45.465148 # ok 468 # SKIP Get and set data for VL 2496
6361 22:22:45.465262 # ok 469 Set VL 2512
6362 22:22:45.465404 # ok 470 # SKIP Disabled ZA for VL 2512
6363 22:22:45.465524 # ok 471 # SKIP Get and set data for VL 2512
6364 22:22:45.465637 # ok 472 Set VL 2528
6365 22:22:45.465870 # ok 473 # SKIP Disabled ZA for VL 2528
6366 22:22:45.466070 # ok 474 # SKIP Get and set data for VL 2528
6367 22:22:45.466254 # ok 475 Set VL 2544
6368 22:22:45.466435 # ok 476 # SKIP Disabled ZA for VL 2544
6369 22:22:45.466609 # ok 477 # SKIP Get and set data for VL 2544
6370 22:22:45.466751 # ok 478 Set VL 2560
6371 22:22:45.466892 # ok 479 # SKIP Disabled ZA for VL 2560
6372 22:22:45.467034 # ok 480 # SKIP Get and set data for VL 2560
6373 22:22:45.467174 # ok 481 Set VL 2576
6374 22:22:45.467315 # ok 482 # SKIP Disabled ZA for VL 2576
6375 22:22:45.467456 # ok 483 # SKIP Get and set data for VL 2576
6376 22:22:45.467598 # ok 484 Set VL 2592
6377 22:22:45.467949 # ok 485 # SKIP Disabled ZA for VL 2592
6378 22:22:45.468087 # ok 486 # SKIP Get and set data for VL 2592
6379 22:22:45.468231 # ok 487 Set VL 2608
6380 22:22:45.472210 # ok 488 # SKIP Disabled ZA for VL 2608
6381 22:22:45.472438 # ok 489 # SKIP Get and set data for VL 2608
6382 22:22:45.472573 # ok 490 Set VL 2624
6383 22:22:45.472679 # ok 491 # SKIP Disabled ZA for VL 2624
6384 22:22:45.478389 # ok 492 # SKIP Get and set data for VL 2624
6385 22:22:45.478924 # ok 493 Set VL 2640
6386 22:22:45.479125 # ok 494 # SKIP Disabled ZA for VL 2640
6387 22:22:45.479301 # ok 495 # SKIP Get and set data for VL 2640
6388 22:22:45.479493 # ok 496 Set VL 2656
6389 22:22:45.479645 # ok 497 # SKIP Disabled ZA for VL 2656
6390 22:22:45.479824 # ok 498 # SKIP Get and set data for VL 2656
6391 22:22:45.480022 # ok 499 Set VL 2672
6392 22:22:45.480218 # ok 500 # SKIP Disabled ZA for VL 2672
6393 22:22:45.480391 # ok 501 # SKIP Get and set data for VL 2672
6394 22:22:45.480530 # ok 502 Set VL 2688
6395 22:22:45.480647 # ok 503 # SKIP Disabled ZA for VL 2688
6396 22:22:45.480762 # ok 504 # SKIP Get and set data for VL 2688
6397 22:22:45.480874 # ok 505 Set VL 2704
6398 22:22:45.481017 # ok 506 # SKIP Disabled ZA for VL 2704
6399 22:22:45.481137 # ok 507 # SKIP Get and set data for VL 2704
6400 22:22:45.481252 # ok 508 Set VL 2720
6401 22:22:45.481366 # ok 509 # SKIP Disabled ZA for VL 2720
6402 22:22:45.481479 # ok 510 # SKIP Get and set data for VL 2720
6403 22:22:45.481592 # ok 511 Set VL 2736
6404 22:22:45.481771 # ok 512 # SKIP Disabled ZA for VL 2736
6405 22:22:45.483098 # ok 513 # SKIP Get and set data for VL 2736
6406 22:22:45.483506 # ok 514 Set VL 2752
6407 22:22:45.483670 # ok 515 # SKIP Disabled ZA for VL 2752
6408 22:22:45.483832 # ok 516 # SKIP Get and set data for VL 2752
6409 22:22:45.483993 # ok 517 Set VL 2768
6410 22:22:45.484162 # ok 518 # SKIP Disabled ZA for VL 2768
6411 22:22:45.484387 # ok 519 # SKIP Get and set data for VL 2768
6412 22:22:45.484560 # ok 520 Set VL 2784
6413 22:22:45.484731 # ok 521 # SKIP Disabled ZA for VL 2784
6414 22:22:45.484874 # ok 522 # SKIP Get and set data for VL 2784
6415 22:22:45.485015 # ok 523 Set VL 2800
6416 22:22:45.485155 # ok 524 # SKIP Disabled ZA for VL 2800
6417 22:22:45.485295 # ok 525 # SKIP Get and set data for VL 2800
6418 22:22:45.485435 # ok 526 Set VL 2816
6419 22:22:45.494204 # ok 527 # SKIP Disabled ZA for VL 2816
6420 22:22:45.494846 # ok 528 # SKIP Get and set data for VL 2816
6421 22:22:45.495075 # ok 529 Set VL 2832
6422 22:22:45.495270 # ok 530 # SKIP Disabled ZA for VL 2832
6423 22:22:45.495470 # ok 531 # SKIP Get and set data for VL 2832
6424 22:22:45.495669 # ok 532 Set VL 2848
6425 22:22:45.495840 # ok 533 # SKIP Disabled ZA for VL 2848
6426 22:22:45.496037 # ok 534 # SKIP Get and set data for VL 2848
6427 22:22:45.496184 # ok 535 Set VL 2864
6428 22:22:45.496354 # ok 536 # SKIP Disabled ZA for VL 2864
6429 22:22:45.496505 # ok 537 # SKIP Get and set data for VL 2864
6430 22:22:45.496621 # ok 538 Set VL 2880
6431 22:22:45.496734 # ok 539 # SKIP Disabled ZA for VL 2880
6432 22:22:45.496844 # ok 540 # SKIP Get and set data for VL 2880
6433 22:22:45.496992 # ok 541 Set VL 2896
6434 22:22:45.497127 # ok 542 # SKIP Disabled ZA for VL 2896
6435 22:22:45.497242 # ok 543 # SKIP Get and set data for VL 2896
6436 22:22:45.497356 # ok 544 Set VL 2912
6437 22:22:45.497468 # ok 545 # SKIP Disabled ZA for VL 2912
6438 22:22:45.497607 # ok 546 # SKIP Get and set data for VL 2912
6439 22:22:45.497747 # ok 547 Set VL 2928
6440 22:22:45.497864 # ok 548 # SKIP Disabled ZA for VL 2928
6441 22:22:45.503255 # ok 549 # SKIP Get and set data for VL 2928
6442 22:22:45.503546 # ok 550 Set VL 2944
6443 22:22:45.503751 # ok 551 # SKIP Disabled ZA for VL 2944
6444 22:22:45.503920 # ok 552 # SKIP Get and set data for VL 2944
6445 22:22:45.504094 # ok 553 Set VL 2960
6446 22:22:45.504270 # ok 554 # SKIP Disabled ZA for VL 2960
6447 22:22:45.504446 # ok 555 # SKIP Get and set data for VL 2960
6448 22:22:45.504624 # ok 556 Set VL 2976
6449 22:22:45.504794 # ok 557 # SKIP Disabled ZA for VL 2976
6450 22:22:45.505001 # ok 558 # SKIP Get and set data for VL 2976
6451 22:22:45.505187 # ok 559 Set VL 2992
6452 22:22:45.505378 # ok 560 # SKIP Disabled ZA for VL 2992
6453 22:22:45.505585 # ok 561 # SKIP Get and set data for VL 2992
6454 22:22:45.505775 # ok 562 Set VL 3008
6455 22:22:45.505971 # ok 563 # SKIP Disabled ZA for VL 3008
6456 22:22:45.506133 # ok 564 # SKIP Get and set data for VL 3008
6457 22:22:45.506295 # ok 565 Set VL 3024
6458 22:22:45.506456 # ok 566 # SKIP Disabled ZA for VL 3024
6459 22:22:45.506615 # ok 567 # SKIP Get and set data for VL 3024
6460 22:22:45.506806 # ok 568 Set VL 3040
6461 22:22:45.506990 # ok 569 # SKIP Disabled ZA for VL 3040
6462 22:22:45.507187 # ok 570 # SKIP Get and set data for VL 3040
6463 22:22:45.507319 # ok 571 Set VL 3056
6464 22:22:45.507435 # ok 572 # SKIP Disabled ZA for VL 3056
6465 22:22:45.507549 # ok 573 # SKIP Get and set data for VL 3056
6466 22:22:45.507665 # ok 574 Set VL 3072
6467 22:22:45.507777 # ok 575 # SKIP Disabled ZA for VL 3072
6468 22:22:45.507889 # ok 576 # SKIP Get and set data for VL 3072
6469 22:22:45.508001 # ok 577 Set VL 3088
6470 22:22:45.508145 # ok 578 # SKIP Disabled ZA for VL 3088
6471 22:22:45.508265 # ok 579 # SKIP Get and set data for VL 3088
6472 22:22:45.508382 # ok 580 Set VL 3104
6473 22:22:45.508535 # ok 581 # SKIP Disabled ZA for VL 3104
6474 22:22:45.508689 # ok 582 # SKIP Get and set data for VL 3104
6475 22:22:45.508831 # ok 583 Set VL 3120
6476 22:22:45.508959 # ok 584 # SKIP Disabled ZA for VL 3120
6477 22:22:45.509121 # ok 585 # SKIP Get and set data for VL 3120
6478 22:22:45.509263 # ok 586 Set VL 3136
6479 22:22:45.509408 # ok 587 # SKIP Disabled ZA for VL 3136
6480 22:22:45.509552 # ok 588 # SKIP Get and set data for VL 3136
6481 22:22:45.510513 # ok 589 Set VL 3152
6482 22:22:45.510692 # ok 590 # SKIP Disabled ZA for VL 3152
6483 22:22:45.510819 # ok 591 # SKIP Get and set data for VL 3152
6484 22:22:45.510937 # ok 592 Set VL 3168
6485 22:22:45.511053 # ok 593 # SKIP Disabled ZA for VL 3168
6486 22:22:45.511170 # ok 594 # SKIP Get and set data for VL 3168
6487 22:22:45.511286 # ok 595 Set VL 3184
6488 22:22:45.511400 # ok 596 # SKIP Disabled ZA for VL 3184
6489 22:22:45.511516 # ok 597 # SKIP Get and set data for VL 3184
6490 22:22:45.511631 # ok 598 Set VL 3200
6491 22:22:45.511746 # ok 599 # SKIP Disabled ZA for VL 3200
6492 22:22:45.511860 # ok 600 # SKIP Get and set data for VL 3200
6493 22:22:45.512024 # ok 601 Set VL 3216
6494 22:22:45.512155 # ok 602 # SKIP Disabled ZA for VL 3216
6495 22:22:45.512492 # ok 603 # SKIP Get and set data for VL 3216
6496 22:22:45.522531 # ok 604 Set VL 3232
6497 22:22:45.523150 # ok 605 # SKIP Disabled ZA for VL 3232
6498 22:22:45.523350 # ok 606 # SKIP Get and set data for VL 3232
6499 22:22:45.523516 # ok 607 Set VL 3248
6500 22:22:45.523673 # ok 608 # SKIP Disabled ZA for VL 3248
6501 22:22:45.523842 # ok 609 # SKIP Get and set data for VL 3248
6502 22:22:45.524001 # ok 610 Set VL 3264
6503 22:22:45.524196 # ok 611 # SKIP Disabled ZA for VL 3264
6504 22:22:45.524347 # ok 612 # SKIP Get and set data for VL 3264
6505 22:22:45.524465 # ok 613 Set VL 3280
6506 22:22:45.524577 # ok 614 # SKIP Disabled ZA for VL 3280
6507 22:22:45.524689 # ok 615 # SKIP Get and set data for VL 3280
6508 22:22:45.524803 # ok 616 Set VL 3296
6509 22:22:45.524915 # ok 617 # SKIP Disabled ZA for VL 3296
6510 22:22:45.525027 # ok 618 # SKIP Get and set data for VL 3296
6511 22:22:45.525139 # ok 619 Set VL 3312
6512 22:22:45.525252 # ok 620 # SKIP Disabled ZA for VL 3312
6513 22:22:45.525388 # ok 621 # SKIP Get and set data for VL 3312
6514 22:22:45.525504 # ok 622 Set VL 3328
6515 22:22:45.525617 # ok 623 # SKIP Disabled ZA for VL 3328
6516 22:22:45.530871 # ok 624 # SKIP Get and set data for VL 3328
6517 22:22:45.531152 # ok 625 Set VL 3344
6518 22:22:45.531297 # ok 626 # SKIP Disabled ZA for VL 3344
6519 22:22:45.531473 # ok 627 # SKIP Get and set data for VL 3344
6520 22:22:45.531632 # ok 628 Set VL 3360
6521 22:22:45.531781 # ok 629 # SKIP Disabled ZA for VL 3360
6522 22:22:45.531927 # ok 630 # SKIP Get and set data for VL 3360
6523 22:22:45.532049 # ok 631 Set VL 3376
6524 22:22:45.532204 # ok 632 # SKIP Disabled ZA for VL 3376
6525 22:22:45.532359 # ok 633 # SKIP Get and set data for VL 3376
6526 22:22:45.532489 # ok 634 Set VL 3392
6527 22:22:45.532602 # ok 635 # SKIP Disabled ZA for VL 3392
6528 22:22:45.532716 # ok 636 # SKIP Get and set data for VL 3392
6529 22:22:45.532829 # ok 637 Set VL 3408
6530 22:22:45.532942 # ok 638 # SKIP Disabled ZA for VL 3408
6531 22:22:45.533057 # ok 639 # SKIP Get and set data for VL 3408
6532 22:22:45.533169 # ok 640 Set VL 3424
6533 22:22:45.533303 # ok 641 # SKIP Disabled ZA for VL 3424
6534 22:22:45.538478 # ok 642 # SKIP Get and set data for VL 3424
6535 22:22:45.539014 # ok 643 Set VL 3440
6536 22:22:45.539243 # ok 644 # SKIP Disabled ZA for VL 3440
6537 22:22:45.539454 # ok 645 # SKIP Get and set data for VL 3440
6538 22:22:45.539667 # ok 646 Set VL 3456
6539 22:22:45.539898 # ok 647 # SKIP Disabled ZA for VL 3456
6540 22:22:45.540123 # ok 648 # SKIP Get and set data for VL 3456
6541 22:22:45.540304 # ok 649 Set VL 3472
6542 22:22:45.540467 # ok 650 # SKIP Disabled ZA for VL 3472
6543 22:22:45.540589 # ok 651 # SKIP Get and set data for VL 3472
6544 22:22:45.540705 # ok 652 Set VL 3488
6545 22:22:45.540820 # ok 653 # SKIP Disabled ZA for VL 3488
6546 22:22:45.540935 # ok 654 # SKIP Get and set data for VL 3488
6547 22:22:45.541048 # ok 655 Set VL 3504
6548 22:22:45.541162 # ok 656 # SKIP Disabled ZA for VL 3504
6549 22:22:45.541275 # ok 657 # SKIP Get and set data for VL 3504
6550 22:22:45.541416 # ok 658 Set VL 3520
6551 22:22:45.541536 # ok 659 # SKIP Disabled ZA for VL 3520
6552 22:22:45.546562 # ok 660 # SKIP Get and set data for VL 3520
6553 22:22:45.547084 # ok 661 Set VL 3536
6554 22:22:45.547299 # ok 662 # SKIP Disabled ZA for VL 3536
6555 22:22:45.547533 # ok 663 # SKIP Get and set data for VL 3536
6556 22:22:45.547728 # ok 664 Set VL 3552
6557 22:22:45.547919 # ok 665 # SKIP Disabled ZA for VL 3552
6558 22:22:45.548147 # ok 666 # SKIP Get and set data for VL 3552
6559 22:22:45.548346 # ok 667 Set VL 3568
6560 22:22:45.548513 # ok 668 # SKIP Disabled ZA for VL 3568
6561 22:22:45.548645 # ok 669 # SKIP Get and set data for VL 3568
6562 22:22:45.548761 # ok 670 Set VL 3584
6563 22:22:45.548874 # ok 671 # SKIP Disabled ZA for VL 3584
6564 22:22:45.548998 # ok 672 # SKIP Get and set data for VL 3584
6565 22:22:45.549112 # ok 673 Set VL 3600
6566 22:22:45.549225 # ok 674 # SKIP Disabled ZA for VL 3600
6567 22:22:45.549338 # ok 675 # SKIP Get and set data for VL 3600
6568 22:22:45.549478 # ok 676 Set VL 3616
6569 22:22:45.549596 # ok 677 # SKIP Disabled ZA for VL 3616
6570 22:22:45.553821 # ok 678 # SKIP Get and set data for VL 3616
6571 22:22:45.554320 # ok 679 Set VL 3632
6572 22:22:45.554514 # ok 680 # SKIP Disabled ZA for VL 3632
6573 22:22:45.554723 # ok 681 # SKIP Get and set data for VL 3632
6574 22:22:45.554911 # ok 682 Set VL 3648
6575 22:22:45.555104 # ok 683 # SKIP Disabled ZA for VL 3648
6576 22:22:45.555341 # ok 684 # SKIP Get and set data for VL 3648
6577 22:22:45.555516 # ok 685 Set VL 3664
6578 22:22:45.555675 # ok 686 # SKIP Disabled ZA for VL 3664
6579 22:22:45.555872 # ok 687 # SKIP Get and set data for VL 3664
6580 22:22:45.556077 # ok 688 Set VL 3680
6581 22:22:45.556256 # ok 689 # SKIP Disabled ZA for VL 3680
6582 22:22:45.556396 # ok 690 # SKIP Get and set data for VL 3680
6583 22:22:45.556547 # ok 691 Set VL 3696
6584 22:22:45.556669 # ok 692 # SKIP Disabled ZA for VL 3696
6585 22:22:45.556784 # ok 693 # SKIP Get and set data for VL 3696
6586 22:22:45.556898 # ok 694 Set VL 3712
6587 22:22:45.557013 # ok 695 # SKIP Disabled ZA for VL 3712
6588 22:22:45.557126 # ok 696 # SKIP Get and set data for VL 3712
6589 22:22:45.557243 # ok 697 Set VL 3728
6590 22:22:45.557355 # ok 698 # SKIP Disabled ZA for VL 3728
6591 22:22:45.557469 # ok 699 # SKIP Get and set data for VL 3728
6592 22:22:45.557581 # ok 700 Set VL 3744
6593 22:22:45.561136 # ok 701 # SKIP Disabled ZA for VL 3744
6594 22:22:45.561247 # ok 702 # SKIP Get and set data for VL 3744
6595 22:22:45.561334 # ok 703 Set VL 3760
6596 22:22:45.562506 # ok 704 # SKIP Disabled ZA for VL 3760
6597 22:22:45.562957 # ok 705 # SKIP Get and set data for VL 3760
6598 22:22:45.563127 # ok 706 Set VL 3776
6599 22:22:45.563320 # ok 707 # SKIP Disabled ZA for VL 3776
6600 22:22:45.563485 # ok 708 # SKIP Get and set data for VL 3776
6601 22:22:45.563648 # ok 709 Set VL 3792
6602 22:22:45.563801 # ok 710 # SKIP Disabled ZA for VL 3792
6603 22:22:45.564014 # ok 711 # SKIP Get and set data for VL 3792
6604 22:22:45.564205 # ok 712 Set VL 3808
6605 22:22:45.564415 # ok 713 # SKIP Disabled ZA for VL 3808
6606 22:22:45.564552 # ok 714 # SKIP Get and set data for VL 3808
6607 22:22:45.564669 # ok 715 Set VL 3824
6608 22:22:45.564782 # ok 716 # SKIP Disabled ZA for VL 3824
6609 22:22:45.564895 # ok 717 # SKIP Get and set data for VL 3824
6610 22:22:45.565007 # ok 718 Set VL 3840
6611 22:22:45.565145 # ok 719 # SKIP Disabled ZA for VL 3840
6612 22:22:45.565266 # ok 720 # SKIP Get and set data for VL 3840
6613 22:22:45.565385 # ok 721 Set VL 3856
6614 22:22:45.565807 # ok 722 # SKIP Disabled ZA for VL 3856
6615 22:22:45.566213 # ok 723 # SKIP Get and set data for VL 3856
6616 22:22:45.566315 # ok 724 Set VL 3872
6617 22:22:45.566399 # ok 725 # SKIP Disabled ZA for VL 3872
6618 22:22:45.566481 # ok 726 # SKIP Get and set data for VL 3872
6619 22:22:45.566578 # ok 727 Set VL 3888
6620 22:22:45.566662 # ok 728 # SKIP Disabled ZA for VL 3888
6621 22:22:45.566744 # ok 729 # SKIP Get and set data for VL 3888
6622 22:22:45.566825 # ok 730 Set VL 3904
6623 22:22:45.566921 # ok 731 # SKIP Disabled ZA for VL 3904
6624 22:22:45.567005 # ok 732 # SKIP Get and set data for VL 3904
6625 22:22:45.567101 # ok 733 Set VL 3920
6626 22:22:45.567185 # ok 734 # SKIP Disabled ZA for VL 3920
6627 22:22:45.567280 # ok 735 # SKIP Get and set data for VL 3920
6628 22:22:45.567364 # ok 736 Set VL 3936
6629 22:22:45.567459 # ok 737 # SKIP Disabled ZA for VL 3936
6630 22:22:45.567543 # ok 738 # SKIP Get and set data for VL 3936
6631 22:22:45.567638 # ok 739 Set VL 3952
6632 22:22:45.567733 # ok 740 # SKIP Disabled ZA for VL 3952
6633 22:22:45.567817 # ok 741 # SKIP Get and set data for VL 3952
6634 22:22:45.567912 # ok 742 Set VL 3968
6635 22:22:45.567995 # ok 743 # SKIP Disabled ZA for VL 3968
6636 22:22:45.568089 # ok 744 # SKIP Get and set data for VL 3968
6637 22:22:45.568173 # ok 745 Set VL 3984
6638 22:22:45.568274 # ok 746 # SKIP Disabled ZA for VL 3984
6639 22:22:45.568370 # ok 747 # SKIP Get and set data for VL 3984
6640 22:22:45.575133 # ok 748 Set VL 4000
6641 22:22:45.575266 # ok 749 # SKIP Disabled ZA for VL 4000
6642 22:22:45.575584 # ok 750 # SKIP Get and set data for VL 4000
6643 22:22:45.575773 # ok 751 Set VL 4016
6644 22:22:45.575939 # ok 752 # SKIP Disabled ZA for VL 4016
6645 22:22:45.576092 # ok 753 # SKIP Get and set data for VL 4016
6646 22:22:45.576287 # ok 754 Set VL 4032
6647 22:22:45.576445 # ok 755 # SKIP Disabled ZA for VL 4032
6648 22:22:45.576589 # ok 756 # SKIP Get and set data for VL 4032
6649 22:22:45.576731 # ok 757 Set VL 4048
6650 22:22:45.576873 # ok 758 # SKIP Disabled ZA for VL 4048
6651 22:22:45.577016 # ok 759 # SKIP Get and set data for VL 4048
6652 22:22:45.577164 # ok 760 Set VL 4064
6653 22:22:45.577310 # ok 761 # SKIP Disabled ZA for VL 4064
6654 22:22:45.581984 # ok 762 # SKIP Get and set data for VL 4064
6655 22:22:45.582493 # ok 763 Set VL 4080
6656 22:22:45.582691 # ok 764 # SKIP Disabled ZA for VL 4080
6657 22:22:45.589851 # ok 765 # SKIP Get and set data for VL 4080
6658 22:22:45.590033 # ok 766 Set VL 4096
6659 22:22:45.590194 # ok 767 # SKIP Disabled ZA for VL 4096
6660 22:22:45.590410 # ok 768 # SKIP Get and set data for VL 4096
6661 22:22:45.590577 # ok 769 Set VL 4112
6662 22:22:45.590737 # ok 770 # SKIP Disabled ZA for VL 4112
6663 22:22:45.590898 # ok 771 # SKIP Get and set data for VL 4112
6664 22:22:45.591058 # ok 772 Set VL 4128
6665 22:22:45.591215 # ok 773 # SKIP Disabled ZA for VL 4128
6666 22:22:45.591376 # ok 774 # SKIP Get and set data for VL 4128
6667 22:22:45.591534 # ok 775 Set VL 4144
6668 22:22:45.591693 # ok 776 # SKIP Disabled ZA for VL 4144
6669 22:22:45.591850 # ok 777 # SKIP Get and set data for VL 4144
6670 22:22:45.592008 # ok 778 Set VL 4160
6671 22:22:45.592165 # ok 779 # SKIP Disabled ZA for VL 4160
6672 22:22:45.592337 # ok 780 # SKIP Get and set data for VL 4160
6673 22:22:45.592496 # ok 781 Set VL 4176
6674 22:22:45.592654 # ok 782 # SKIP Disabled ZA for VL 4176
6675 22:22:45.592812 # ok 783 # SKIP Get and set data for VL 4176
6676 22:22:45.592972 # ok 784 Set VL 4192
6677 22:22:45.593131 # ok 785 # SKIP Disabled ZA for VL 4192
6678 22:22:45.593290 # ok 786 # SKIP Get and set data for VL 4192
6679 22:22:45.593449 # ok 787 Set VL 4208
6680 22:22:45.593608 # ok 788 # SKIP Disabled ZA for VL 4208
6681 22:22:45.593776 # ok 789 # SKIP Get and set data for VL 4208
6682 22:22:45.593937 # ok 790 Set VL 4224
6683 22:22:45.594094 # ok 791 # SKIP Disabled ZA for VL 4224
6684 22:22:45.594255 # ok 792 # SKIP Get and set data for VL 4224
6685 22:22:45.594415 # ok 793 Set VL 4240
6686 22:22:45.594573 # ok 794 # SKIP Disabled ZA for VL 4240
6687 22:22:45.594731 # ok 795 # SKIP Get and set data for VL 4240
6688 22:22:45.594888 # ok 796 Set VL 4256
6689 22:22:45.595046 # ok 797 # SKIP Disabled ZA for VL 4256
6690 22:22:45.595204 # ok 798 # SKIP Get and set data for VL 4256
6691 22:22:45.595368 # ok 799 Set VL 4272
6692 22:22:45.595525 # ok 800 # SKIP Disabled ZA for VL 4272
6693 22:22:45.595683 # ok 801 # SKIP Get and set data for VL 4272
6694 22:22:45.595840 # ok 802 Set VL 4288
6695 22:22:45.598398 # ok 803 # SKIP Disabled ZA for VL 4288
6696 22:22:45.598968 # ok 804 # SKIP Get and set data for VL 4288
6697 22:22:45.599157 # ok 805 Set VL 4304
6698 22:22:45.599307 # ok 806 # SKIP Disabled ZA for VL 4304
6699 22:22:45.599457 # ok 807 # SKIP Get and set data for VL 4304
6700 22:22:45.599613 # ok 808 Set VL 4320
6701 22:22:45.599806 # ok 809 # SKIP Disabled ZA for VL 4320
6702 22:22:45.600004 # ok 810 # SKIP Get and set data for VL 4320
6703 22:22:45.600158 # ok 811 Set VL 4336
6704 22:22:45.600277 # ok 812 # SKIP Disabled ZA for VL 4336
6705 22:22:45.600391 # ok 813 # SKIP Get and set data for VL 4336
6706 22:22:45.600504 # ok 814 Set VL 4352
6707 22:22:45.600616 # ok 815 # SKIP Disabled ZA for VL 4352
6708 22:22:45.600730 # ok 816 # SKIP Get and set data for VL 4352
6709 22:22:45.600842 # ok 817 Set VL 4368
6710 22:22:45.600981 # ok 818 # SKIP Disabled ZA for VL 4368
6711 22:22:45.601101 # ok 819 # SKIP Get and set data for VL 4368
6712 22:22:45.601215 # ok 820 Set VL 4384
6713 22:22:45.601329 # ok 821 # SKIP Disabled ZA for VL 4384
6714 22:22:45.607931 # ok 822 # SKIP Get and set data for VL 4384
6715 22:22:45.608229 # ok 823 Set VL 4400
6716 22:22:45.608388 # ok 824 # SKIP Disabled ZA for VL 4400
6717 22:22:45.608538 # ok 825 # SKIP Get and set data for VL 4400
6718 22:22:45.608658 # ok 826 Set VL 4416
6719 22:22:45.608774 # ok 827 # SKIP Disabled ZA for VL 4416
6720 22:22:45.608887 # ok 828 # SKIP Get and set data for VL 4416
6721 22:22:45.608999 # ok 829 Set VL 4432
6722 22:22:45.609667 # ok 830 # SKIP Disabled ZA for VL 4432
6723 22:22:45.610142 # ok 831 # SKIP Get and set data for VL 4432
6724 22:22:45.610363 # ok 832 Set VL 4448
6725 22:22:45.610595 # ok 833 # SKIP Disabled ZA for VL 4448
6726 22:22:45.610795 # ok 834 # SKIP Get and set data for VL 4448
6727 22:22:45.611006 # ok 835 Set VL 4464
6728 22:22:45.611229 # ok 836 # SKIP Disabled ZA for VL 4464
6729 22:22:45.611399 # ok 837 # SKIP Get and set data for VL 4464
6730 22:22:45.611580 # ok 838 Set VL 4480
6731 22:22:45.611785 # ok 839 # SKIP Disabled ZA for VL 4480
6732 22:22:45.612013 # ok 840 # SKIP Get and set data for VL 4480
6733 22:22:45.612231 # ok 841 Set VL 4496
6734 22:22:45.612417 # ok 842 # SKIP Disabled ZA for VL 4496
6735 22:22:45.612548 # ok 843 # SKIP Get and set data for VL 4496
6736 22:22:45.612663 # ok 844 Set VL 4512
6737 22:22:45.612804 # ok 845 # SKIP Disabled ZA for VL 4512
6738 22:22:45.612924 # ok 846 # SKIP Get and set data for VL 4512
6739 22:22:45.613037 # ok 847 Set VL 4528
6740 22:22:45.613149 # ok 848 # SKIP Disabled ZA for VL 4528
6741 22:22:45.613262 # ok 849 # SKIP Get and set data for VL 4528
6742 22:22:45.613375 # ok 850 Set VL 4544
6743 22:22:45.613486 # ok 851 # SKIP Disabled ZA for VL 4544
6744 22:22:45.613598 # ok 852 # SKIP Get and set data for VL 4544
6745 22:22:45.613731 # ok 853 Set VL 4560
6746 22:22:45.613845 # ok 854 # SKIP Disabled ZA for VL 4560
6747 22:22:45.613958 # ok 855 # SKIP Get and set data for VL 4560
6748 22:22:45.617712 # ok 856 Set VL 4576
6749 22:22:45.618218 # ok 857 # SKIP Disabled ZA for VL 4576
6750 22:22:45.618411 # ok 858 # SKIP Get and set data for VL 4576
6751 22:22:45.618582 # ok 859 Set VL 4592
6752 22:22:45.618719 # ok 860 # SKIP Disabled ZA for VL 4592
6753 22:22:45.618861 # ok 861 # SKIP Get and set data for VL 4592
6754 22:22:45.619018 # ok 862 Set VL 4608
6755 22:22:45.619156 # ok 863 # SKIP Disabled ZA for VL 4608
6756 22:22:45.619302 # ok 864 # SKIP Get and set data for VL 4608
6757 22:22:45.619432 # ok 865 Set VL 4624
6758 22:22:45.619601 # ok 866 # SKIP Disabled ZA for VL 4624
6759 22:22:45.619818 # ok 867 # SKIP Get and set data for VL 4624
6760 22:22:45.620070 # ok 868 Set VL 4640
6761 22:22:45.620266 # ok 869 # SKIP Disabled ZA for VL 4640
6762 22:22:45.620415 # ok 870 # SKIP Get and set data for VL 4640
6763 22:22:45.620532 # ok 871 Set VL 4656
6764 22:22:45.620645 # ok 872 # SKIP Disabled ZA for VL 4656
6765 22:22:45.620757 # ok 873 # SKIP Get and set data for VL 4656
6766 22:22:45.620869 # ok 874 Set VL 4672
6767 22:22:45.620980 # ok 875 # SKIP Disabled ZA for VL 4672
6768 22:22:45.621092 # ok 876 # SKIP Get and set data for VL 4672
6769 22:22:45.621207 # ok 877 Set VL 4688
6770 22:22:45.621318 # ok 878 # SKIP Disabled ZA for VL 4688
6771 22:22:45.621457 # ok 879 # SKIP Get and set data for VL 4688
6772 22:22:45.621576 # ok 880 Set VL 4704
6773 22:22:45.633696 # ok 881 # SKIP Disabled ZA for VL 4704
6774 22:22:45.634009 # ok 882 # SKIP Get and set data for VL 4704
6775 22:22:45.634442 # ok 883 Set VL 4720
6776 22:22:45.634640 # ok 884 # SKIP Disabled ZA for VL 4720
6777 22:22:45.634889 # ok 885 # SKIP Get and set data for VL 4720
6778 22:22:45.635076 # ok 886 Set VL 4736
6779 22:22:45.635260 # ok 887 # SKIP Disabled ZA for VL 4736
6780 22:22:45.635429 # ok 888 # SKIP Get and set data for VL 4736
6781 22:22:45.635590 # ok 889 Set VL 4752
6782 22:22:45.635784 # ok 890 # SKIP Disabled ZA for VL 4752
6783 22:22:45.635942 # ok 891 # SKIP Get and set data for VL 4752
6784 22:22:45.636108 # ok 892 Set VL 4768
6785 22:22:45.636305 # ok 893 # SKIP Disabled ZA for VL 4768
6786 22:22:45.636462 # ok 894 # SKIP Get and set data for VL 4768
6787 22:22:45.636580 # ok 895 Set VL 4784
6788 22:22:45.636693 # ok 896 # SKIP Disabled ZA for VL 4784
6789 22:22:45.636805 # ok 897 # SKIP Get and set data for VL 4784
6790 22:22:45.636917 # ok 898 Set VL 4800
6791 22:22:45.637029 # ok 899 # SKIP Disabled ZA for VL 4800
6792 22:22:45.637141 # ok 900 # SKIP Get and set data for VL 4800
6793 22:22:45.637252 # ok 901 Set VL 4816
6794 22:22:45.637393 # ok 902 # SKIP Disabled ZA for VL 4816
6795 22:22:45.637513 # ok 903 # SKIP Get and set data for VL 4816
6796 22:22:45.637628 # ok 904 Set VL 4832
6797 22:22:45.637758 # ok 905 # SKIP Disabled ZA for VL 4832
6798 22:22:45.637873 # ok 906 # SKIP Get and set data for VL 4832
6799 22:22:45.637986 # ok 907 Set VL 4848
6800 22:22:45.642558 # ok 908 # SKIP Disabled ZA for VL 4848
6801 22:22:45.643064 # ok 909 # SKIP Get and set data for VL 4848
6802 22:22:45.643257 # ok 910 Set VL 4864
6803 22:22:45.643426 # ok 911 # SKIP Disabled ZA for VL 4864
6804 22:22:45.643591 # ok 912 # SKIP Get and set data for VL 4864
6805 22:22:45.643753 # ok 913 Set VL 4880
6806 22:22:45.643948 # ok 914 # SKIP Disabled ZA for VL 4880
6807 22:22:45.644148 # ok 915 # SKIP Get and set data for VL 4880
6808 22:22:45.644318 # ok 916 Set VL 4896
6809 22:22:45.644448 # ok 917 # SKIP Disabled ZA for VL 4896
6810 22:22:45.644565 # ok 918 # SKIP Get and set data for VL 4896
6811 22:22:45.644678 # ok 919 Set VL 4912
6812 22:22:45.644790 # ok 920 # SKIP Disabled ZA for VL 4912
6813 22:22:45.644900 # ok 921 # SKIP Get and set data for VL 4912
6814 22:22:45.645014 # ok 922 Set VL 4928
6815 22:22:45.645155 # ok 923 # SKIP Disabled ZA for VL 4928
6816 22:22:45.645275 # ok 924 # SKIP Get and set data for VL 4928
6817 22:22:45.645390 # ok 925 Set VL 4944
6818 22:22:45.645503 # ok 926 # SKIP Disabled ZA for VL 4944
6819 22:22:45.645616 # ok 927 # SKIP Get and set data for VL 4944
6820 22:22:45.645745 # ok 928 Set VL 4960
6821 22:22:45.657863 # ok 929 # SKIP Disabled ZA for VL 4960
6822 22:22:45.658190 # ok 930 # SKIP Get and set data for VL 4960
6823 22:22:45.658355 # ok 931 Set VL 4976
6824 22:22:45.658739 # ok 932 # SKIP Disabled ZA for VL 4976
6825 22:22:45.658845 # ok 933 # SKIP Get and set data for VL 4976
6826 22:22:45.658932 # ok 934 Set VL 4992
6827 22:22:45.659015 # ok 935 # SKIP Disabled ZA for VL 4992
6828 22:22:45.659097 # ok 936 # SKIP Get and set data for VL 4992
6829 22:22:45.659180 # ok 937 Set VL 5008
6830 22:22:45.659261 # ok 938 # SKIP Disabled ZA for VL 5008
6831 22:22:45.659342 # ok 939 # SKIP Get and set data for VL 5008
6832 22:22:45.659428 # ok 940 Set VL 5024
6833 22:22:45.659509 # ok 941 # SKIP Disabled ZA for VL 5024
6834 22:22:45.659592 # ok 942 # SKIP Get and set data for VL 5024
6835 22:22:45.659696 # ok 943 Set VL 5040
6836 22:22:45.659781 # ok 944 # SKIP Disabled ZA for VL 5040
6837 22:22:45.659865 # ok 945 # SKIP Get and set data for VL 5040
6838 22:22:45.659949 # ok 946 Set VL 5056
6839 22:22:45.660031 # ok 947 # SKIP Disabled ZA for VL 5056
6840 22:22:45.660113 # ok 948 # SKIP Get and set data for VL 5056
6841 22:22:45.660194 # ok 949 Set VL 5072
6842 22:22:45.660276 # ok 950 # SKIP Disabled ZA for VL 5072
6843 22:22:45.660376 # ok 951 # SKIP Get and set data for VL 5072
6844 22:22:45.660462 # ok 952 Set VL 5088
6845 22:22:45.660544 # ok 953 # SKIP Disabled ZA for VL 5088
6846 22:22:45.660626 # ok 954 # SKIP Get and set data for VL 5088
6847 22:22:45.660709 # ok 955 Set VL 5104
6848 22:22:45.660791 # ok 956 # SKIP Disabled ZA for VL 5104
6849 22:22:45.660872 # ok 957 # SKIP Get and set data for VL 5104
6850 22:22:45.660954 # ok 958 Set VL 5120
6851 22:22:45.661035 # ok 959 # SKIP Disabled ZA for VL 5120
6852 22:22:45.661118 # ok 960 # SKIP Get and set data for VL 5120
6853 22:22:45.661199 # ok 961 Set VL 5136
6854 22:22:45.661280 # ok 962 # SKIP Disabled ZA for VL 5136
6855 22:22:45.661376 # ok 963 # SKIP Get and set data for VL 5136
6856 22:22:45.677983 # ok 964 Set VL 5152
6857 22:22:45.678223 # ok 965 # SKIP Disabled ZA for VL 5152
6858 22:22:45.678311 # ok 966 # SKIP Get and set data for VL 5152
6859 22:22:45.678605 # ok 967 Set VL 5168
6860 22:22:45.678697 # ok 968 # SKIP Disabled ZA for VL 5168
6861 22:22:45.678781 # ok 969 # SKIP Get and set data for VL 5168
6862 22:22:45.678865 # ok 970 Set VL 5184
6863 22:22:45.678947 # ok 971 # SKIP Disabled ZA for VL 5184
6864 22:22:45.679030 # ok 972 # SKIP Get and set data for VL 5184
6865 22:22:45.679128 # ok 973 Set VL 5200
6866 22:22:45.679212 # ok 974 # SKIP Disabled ZA for VL 5200
6867 22:22:45.679294 # ok 975 # SKIP Get and set data for VL 5200
6868 22:22:45.679376 # ok 976 Set VL 5216
6869 22:22:45.679457 # ok 977 # SKIP Disabled ZA for VL 5216
6870 22:22:45.679539 # ok 978 # SKIP Get and set data for VL 5216
6871 22:22:45.679620 # ok 979 Set VL 5232
6872 22:22:45.679718 # ok 980 # SKIP Disabled ZA for VL 5232
6873 22:22:45.679802 # ok 981 # SKIP Get and set data for VL 5232
6874 22:22:45.679884 # ok 982 Set VL 5248
6875 22:22:45.679967 # ok 983 # SKIP Disabled ZA for VL 5248
6876 22:22:45.680049 # ok 984 # SKIP Get and set data for VL 5248
6877 22:22:45.680130 # ok 985 Set VL 5264
6878 22:22:45.680228 # ok 986 # SKIP Disabled ZA for VL 5264
6879 22:22:45.680311 # ok 987 # SKIP Get and set data for VL 5264
6880 22:22:45.680393 # ok 988 Set VL 5280
6881 22:22:45.680474 # ok 989 # SKIP Disabled ZA for VL 5280
6882 22:22:45.680555 # ok 990 # SKIP Get and set data for VL 5280
6883 22:22:45.680636 # ok 991 Set VL 5296
6884 22:22:45.694061 # ok 992 # SKIP Disabled ZA for VL 5296
6885 22:22:45.694630 # ok 993 # SKIP Get and set data for VL 5296
6886 22:22:45.694733 # ok 994 Set VL 5312
6887 22:22:45.694821 # ok 995 # SKIP Disabled ZA for VL 5312
6888 22:22:45.694906 # ok 996 # SKIP Get and set data for VL 5312
6889 22:22:45.694991 # ok 997 Set VL 5328
6890 22:22:45.695076 # ok 998 # SKIP Disabled ZA for VL 5328
6891 22:22:45.695176 # ok 999 # SKIP Get and set data for VL 5328
6892 22:22:45.695262 # ok 1000 Set VL 5344
6893 22:22:45.695346 # ok 1001 # SKIP Disabled ZA for VL 5344
6894 22:22:45.695432 # ok 1002 # SKIP Get and set data for VL 5344
6895 22:22:45.695515 # ok 1003 Set VL 5360
6896 22:22:45.695616 # ok 1004 # SKIP Disabled ZA for VL 5360
6897 22:22:45.695703 # ok 1005 # SKIP Get and set data for VL 5360
6898 22:22:45.695833 # ok 1006 Set VL 5376
6899 22:22:45.695981 # ok 1007 # SKIP Disabled ZA for VL 5376
6900 22:22:45.696079 # ok 1008 # SKIP Get and set data for VL 5376
6901 22:22:45.696166 # ok 1009 Set VL 5392
6902 22:22:45.696275 # ok 1010 # SKIP Disabled ZA for VL 5392
6903 22:22:45.696363 # ok 1011 # SKIP Get and set data for VL 5392
6904 22:22:45.696438 # ok 1012 Set VL 5408
6905 22:22:45.710446 # ok 1013 # SKIP Disabled ZA for VL 5408
6906 22:22:45.710695 # ok 1014 # SKIP Get and set data for VL 5408
6907 22:22:45.711014 # ok 1015 Set VL 5424
6908 22:22:45.711119 # ok 1016 # SKIP Disabled ZA for VL 5424
6909 22:22:45.711210 # ok 1017 # SKIP Get and set data for VL 5424
6910 22:22:45.711297 # ok 1018 Set VL 5440
6911 22:22:45.711382 # ok 1019 # SKIP Disabled ZA for VL 5440
6912 22:22:45.711482 # ok 1020 # SKIP Get and set data for VL 5440
6913 22:22:45.711572 # ok 1021 Set VL 5456
6914 22:22:45.711656 # ok 1022 # SKIP Disabled ZA for VL 5456
6915 22:22:45.711741 # ok 1023 # SKIP Get and set data for VL 5456
6916 22:22:45.712023 # ok 1024 Set VL 5472
6917 22:22:45.712136 # ok 1025 # SKIP Disabled ZA for VL 5472
6918 22:22:45.712225 # ok 1026 # SKIP Get and set data for VL 5472
6919 22:22:45.712311 # ok 1027 Set VL 5488
6920 22:22:45.713756 # ok 1028 # SKIP Disabled ZA for VL 5488
6921 22:22:45.713904 # ok 1029 # SKIP Get and set data for VL 5488
6922 22:22:45.714035 # ok 1030 Set VL 5504
6923 22:22:45.714121 # ok 1031 # SKIP Disabled ZA for VL 5504
6924 22:22:45.717920 # ok 1032 # SKIP Get and set data for VL 5504
6925 22:22:45.718382 # ok 1033 Set VL 5520
6926 22:22:45.718619 # ok 1034 # SKIP Disabled ZA for VL 5520
6927 22:22:45.718843 # ok 1035 # SKIP Get and set data for VL 5520
6928 22:22:45.719038 # ok 1036 Set VL 5536
6929 22:22:45.719205 # ok 1037 # SKIP Disabled ZA for VL 5536
6930 22:22:45.719406 # ok 1038 # SKIP Get and set data for VL 5536
6931 22:22:45.719592 # ok 1039 Set VL 5552
6932 22:22:45.719768 # ok 1040 # SKIP Disabled ZA for VL 5552
6933 22:22:45.719977 # ok 1041 # SKIP Get and set data for VL 5552
6934 22:22:45.720155 # ok 1042 Set VL 5568
6935 22:22:45.720278 # ok 1043 # SKIP Disabled ZA for VL 5568
6936 22:22:45.720396 # ok 1044 # SKIP Get and set data for VL 5568
6937 22:22:45.720512 # ok 1045 Set VL 5584
6938 22:22:45.720655 # ok 1046 # SKIP Disabled ZA for VL 5584
6939 22:22:45.720778 # ok 1047 # SKIP Get and set data for VL 5584
6940 22:22:45.720895 # ok 1048 Set VL 5600
6941 22:22:45.721010 # ok 1049 # SKIP Disabled ZA for VL 5600
6942 22:22:45.721125 # ok 1050 # SKIP Get and set data for VL 5600
6943 22:22:45.721237 # ok 1051 Set VL 5616
6944 22:22:45.721351 # ok 1052 # SKIP Disabled ZA for VL 5616
6945 22:22:45.731261 # ok 1053 # SKIP Get and set data for VL 5616
6946 22:22:45.731597 # ok 1054 Set VL 5632
6947 22:22:45.731811 # ok 1055 # SKIP Disabled ZA for VL 5632
6948 22:22:45.732041 # ok 1056 # SKIP Get and set data for VL 5632
6949 22:22:45.732219 # ok 1057 Set VL 5648
6950 22:22:45.732382 # ok 1058 # SKIP Disabled ZA for VL 5648
6951 22:22:45.732508 # ok 1059 # SKIP Get and set data for VL 5648
6952 22:22:45.732627 # ok 1060 Set VL 5664
6953 22:22:45.732746 # ok 1061 # SKIP Disabled ZA for VL 5664
6954 22:22:45.732863 # ok 1062 # SKIP Get and set data for VL 5664
6955 22:22:45.732980 # ok 1063 Set VL 5680
6956 22:22:45.733098 # ok 1064 # SKIP Disabled ZA for VL 5680
6957 22:22:45.733241 # ok 1065 # SKIP Get and set data for VL 5680
6958 22:22:45.733364 # ok 1066 Set VL 5696
6959 22:22:45.733481 # ok 1067 # SKIP Disabled ZA for VL 5696
6960 22:22:45.738367 # ok 1068 # SKIP Get and set data for VL 5696
6961 22:22:45.738952 # ok 1069 Set VL 5712
6962 22:22:45.739153 # ok 1070 # SKIP Disabled ZA for VL 5712
6963 22:22:45.739342 # ok 1071 # SKIP Get and set data for VL 5712
6964 22:22:45.739513 # ok 1072 Set VL 5728
6965 22:22:45.739685 # ok 1073 # SKIP Disabled ZA for VL 5728
6966 22:22:45.739846 # ok 1074 # SKIP Get and set data for VL 5728
6967 22:22:45.740047 # ok 1075 Set VL 5744
6968 22:22:45.740224 # ok 1076 # SKIP Disabled ZA for VL 5744
6969 22:22:45.740432 # ok 1077 # SKIP Get and set data for VL 5744
6970 22:22:45.740580 # ok 1078 Set VL 5760
6971 22:22:45.740698 # ok 1079 # SKIP Disabled ZA for VL 5760
6972 22:22:45.740814 # ok 1080 # SKIP Get and set data for VL 5760
6973 22:22:45.740929 # ok 1081 Set VL 5776
6974 22:22:45.741078 # ok 1082 # SKIP Disabled ZA for VL 5776
6975 22:22:45.741293 # ok 1083 # SKIP Get and set data for VL 5776
6976 22:22:45.741486 # ok 1084 Set VL 5792
6977 22:22:45.741722 # ok 1085 # SKIP Disabled ZA for VL 5792
6978 22:22:45.741927 # ok 1086 # SKIP Get and set data for VL 5792
6979 22:22:45.742135 # ok 1087 Set VL 5808
6980 22:22:45.742345 # ok 1088 # SKIP Disabled ZA for VL 5808
6981 22:22:45.742547 # ok 1089 # SKIP Get and set data for VL 5808
6982 22:22:45.742773 # ok 1090 Set VL 5824
6983 22:22:45.742976 # ok 1091 # SKIP Disabled ZA for VL 5824
6984 22:22:45.743176 # ok 1092 # SKIP Get and set data for VL 5824
6985 22:22:45.743368 # ok 1093 Set VL 5840
6986 22:22:45.743612 # ok 1094 # SKIP Disabled ZA for VL 5840
6987 22:22:45.743832 # ok 1095 # SKIP Get and set data for VL 5840
6988 22:22:45.744049 # ok 1096 Set VL 5856
6989 22:22:45.744254 # ok 1097 # SKIP Disabled ZA for VL 5856
6990 22:22:45.744429 # ok 1098 # SKIP Get and set data for VL 5856
6991 22:22:45.744560 # ok 1099 Set VL 5872
6992 22:22:45.744679 # ok 1100 # SKIP Disabled ZA for VL 5872
6993 22:22:45.744794 # ok 1101 # SKIP Get and set data for VL 5872
6994 22:22:45.744908 # ok 1102 Set VL 5888
6995 22:22:45.745019 # ok 1103 # SKIP Disabled ZA for VL 5888
6996 22:22:45.745133 # ok 1104 # SKIP Get and set data for VL 5888
6997 22:22:45.745246 # ok 1105 Set VL 5904
6998 22:22:45.745358 # ok 1106 # SKIP Disabled ZA for VL 5904
6999 22:22:45.745470 # ok 1107 # SKIP Get and set data for VL 5904
7000 22:22:45.745584 # ok 1108 Set VL 5920
7001 22:22:45.747132 # ok 1109 # SKIP Disabled ZA for VL 5920
7002 22:22:45.747305 # ok 1110 # SKIP Get and set data for VL 5920
7003 22:22:45.747507 # ok 1111 Set VL 5936
7004 22:22:45.747718 # ok 1112 # SKIP Disabled ZA for VL 5936
7005 22:22:45.747920 # ok 1113 # SKIP Get and set data for VL 5936
7006 22:22:45.748099 # ok 1114 Set VL 5952
7007 22:22:45.748247 # ok 1115 # SKIP Disabled ZA for VL 5952
7008 22:22:45.748389 # ok 1116 # SKIP Get and set data for VL 5952
7009 22:22:45.748530 # ok 1117 Set VL 5968
7010 22:22:45.748670 # ok 1118 # SKIP Disabled ZA for VL 5968
7011 22:22:45.748812 # ok 1119 # SKIP Get and set data for VL 5968
7012 22:22:45.748952 # ok 1120 Set VL 5984
7013 22:22:45.749332 # ok 1121 # SKIP Disabled ZA for VL 5984
7014 22:22:45.749476 # ok 1122 # SKIP Get and set data for VL 5984
7015 22:22:45.749621 # ok 1123 Set VL 6000
7016 22:22:45.749776 # ok 1124 # SKIP Disabled ZA for VL 6000
7017 22:22:45.749918 # ok 1125 # SKIP Get and set data for VL 6000
7018 22:22:45.750061 # ok 1126 Set VL 6016
7019 22:22:45.750201 # ok 1127 # SKIP Disabled ZA for VL 6016
7020 22:22:45.750341 # ok 1128 # SKIP Get and set data for VL 6016
7021 22:22:45.750481 # ok 1129 Set VL 6032
7022 22:22:45.750625 # ok 1130 # SKIP Disabled ZA for VL 6032
7023 22:22:45.750766 # ok 1131 # SKIP Get and set data for VL 6032
7024 22:22:45.750907 # ok 1132 Set VL 6048
7025 22:22:45.751047 # ok 1133 # SKIP Disabled ZA for VL 6048
7026 22:22:45.751188 # ok 1134 # SKIP Get and set data for VL 6048
7027 22:22:45.751328 # ok 1135 Set VL 6064
7028 22:22:45.751468 # ok 1136 # SKIP Disabled ZA for VL 6064
7029 22:22:45.751608 # ok 1137 # SKIP Get and set data for VL 6064
7030 22:22:45.751749 # ok 1138 Set VL 6080
7031 22:22:45.751889 # ok 1139 # SKIP Disabled ZA for VL 6080
7032 22:22:45.752029 # ok 1140 # SKIP Get and set data for VL 6080
7033 22:22:45.758258 # ok 1141 Set VL 6096
7034 22:22:45.758444 # ok 1142 # SKIP Disabled ZA for VL 6096
7035 22:22:45.758562 # ok 1143 # SKIP Get and set data for VL 6096
7036 22:22:45.758667 # ok 1144 Set VL 6112
7037 22:22:45.758746 # ok 1145 # SKIP Disabled ZA for VL 6112
7038 22:22:45.758827 # ok 1146 # SKIP Get and set data for VL 6112
7039 22:22:45.758892 # ok 1147 Set VL 6128
7040 22:22:45.758954 # ok 1148 # SKIP Disabled ZA for VL 6128
7041 22:22:45.759028 # ok 1149 # SKIP Get and set data for VL 6128
7042 22:22:45.759096 # ok 1150 Set VL 6144
7043 22:22:45.759169 # ok 1151 # SKIP Disabled ZA for VL 6144
7044 22:22:45.759242 # ok 1152 # SKIP Get and set data for VL 6144
7045 22:22:45.759317 # ok 1153 Set VL 6160
7046 22:22:45.759598 # ok 1154 # SKIP Disabled ZA for VL 6160
7047 22:22:45.759686 # ok 1155 # SKIP Get and set data for VL 6160
7048 22:22:45.759777 # ok 1156 Set VL 6176
7049 22:22:45.759868 # ok 1157 # SKIP Disabled ZA for VL 6176
7050 22:22:45.759990 # ok 1158 # SKIP Get and set data for VL 6176
7051 22:22:45.760074 # ok 1159 Set VL 6192
7052 22:22:45.760148 # ok 1160 # SKIP Disabled ZA for VL 6192
7053 22:22:45.760237 # ok 1161 # SKIP Get and set data for VL 6192
7054 22:22:45.760308 # ok 1162 Set VL 6208
7055 22:22:45.763713 # ok 1163 # SKIP Disabled ZA for VL 6208
7056 22:22:45.764089 # ok 1164 # SKIP Get and set data for VL 6208
7057 22:22:45.764217 # ok 1165 Set VL 6224
7058 22:22:45.764338 # ok 1166 # SKIP Disabled ZA for VL 6224
7059 22:22:45.764468 # ok 1167 # SKIP Get and set data for VL 6224
7060 22:22:45.764558 # ok 1168 Set VL 6240
7061 22:22:45.774094 # ok 1169 # SKIP Disabled ZA for VL 6240
7062 22:22:45.774492 # ok 1170 # SKIP Get and set data for VL 6240
7063 22:22:45.774571 # ok 1171 Set VL 6256
7064 22:22:45.774650 # ok 1172 # SKIP Disabled ZA for VL 6256
7065 22:22:45.774728 # ok 1173 # SKIP Get and set data for VL 6256
7066 22:22:45.774820 # ok 1174 Set VL 6272
7067 22:22:45.774893 # ok 1175 # SKIP Disabled ZA for VL 6272
7068 22:22:45.774968 # ok 1176 # SKIP Get and set data for VL 6272
7069 22:22:45.775058 # ok 1177 Set VL 6288
7070 22:22:45.775132 # ok 1178 # SKIP Disabled ZA for VL 6288
7071 22:22:45.775209 # ok 1179 # SKIP Get and set data for VL 6288
7072 22:22:45.775312 # ok 1180 Set VL 6304
7073 22:22:45.775403 # ok 1181 # SKIP Disabled ZA for VL 6304
7074 22:22:45.775538 # ok 1182 # SKIP Get and set data for VL 6304
7075 22:22:45.775634 # ok 1183 Set VL 6320
7076 22:22:45.775755 # ok 1184 # SKIP Disabled ZA for VL 6320
7077 22:22:45.775867 # ok 1185 # SKIP Get and set data for VL 6320
7078 22:22:45.775989 # ok 1186 Set VL 6336
7079 22:22:45.776073 # ok 1187 # SKIP Disabled ZA for VL 6336
7080 22:22:45.776165 # ok 1188 # SKIP Get and set data for VL 6336
7081 22:22:45.776237 # ok 1189 Set VL 6352
7082 22:22:45.776326 # ok 1190 # SKIP Disabled ZA for VL 6352
7083 22:22:45.776398 # ok 1191 # SKIP Get and set data for VL 6352
7084 22:22:45.780138 # ok 1192 Set VL 6368
7085 22:22:45.780484 # ok 1193 # SKIP Disabled ZA for VL 6368
7086 22:22:45.782297 # ok 1194 # SKIP Get and set data for VL 6368
7087 22:22:45.782582 # ok 1195 Set VL 6384
7088 22:22:45.782664 # ok 1196 # SKIP Disabled ZA for VL 6384
7089 22:22:45.782762 # ok 1197 # SKIP Get and set data for VL 6384
7090 22:22:45.782851 # ok 1198 Set VL 6400
7091 22:22:45.782958 # ok 1199 # SKIP Disabled ZA for VL 6400
7092 22:22:45.783038 # ok 1200 # SKIP Get and set data for VL 6400
7093 22:22:45.783129 # ok 1201 Set VL 6416
7094 22:22:45.783213 # ok 1202 # SKIP Disabled ZA for VL 6416
7095 22:22:45.783308 # ok 1203 # SKIP Get and set data for VL 6416
7096 22:22:45.783402 # ok 1204 Set VL 6432
7097 22:22:45.783514 # ok 1205 # SKIP Disabled ZA for VL 6432
7098 22:22:45.783616 # ok 1206 # SKIP Get and set data for VL 6432
7099 22:22:45.783720 # ok 1207 Set VL 6448
7100 22:22:45.783806 # ok 1208 # SKIP Disabled ZA for VL 6448
7101 22:22:45.783912 # ok 1209 # SKIP Get and set data for VL 6448
7102 22:22:45.784011 # ok 1210 Set VL 6464
7103 22:22:45.784089 # ok 1211 # SKIP Disabled ZA for VL 6464
7104 22:22:45.784162 # ok 1212 # SKIP Get and set data for VL 6464
7105 22:22:45.784423 # ok 1213 Set VL 6480
7106 22:22:45.790324 # ok 1214 # SKIP Disabled ZA for VL 6480
7107 22:22:45.790709 # ok 1215 # SKIP Get and set data for VL 6480
7108 22:22:45.790788 # ok 1216 Set VL 6496
7109 22:22:45.790865 # ok 1217 # SKIP Disabled ZA for VL 6496
7110 22:22:45.790956 # ok 1218 # SKIP Get and set data for VL 6496
7111 22:22:45.791027 # ok 1219 Set VL 6512
7112 22:22:45.791102 # ok 1220 # SKIP Disabled ZA for VL 6512
7113 22:22:45.791193 # ok 1221 # SKIP Get and set data for VL 6512
7114 22:22:45.791264 # ok 1222 Set VL 6528
7115 22:22:45.791352 # ok 1223 # SKIP Disabled ZA for VL 6528
7116 22:22:45.791608 # ok 1224 # SKIP Get and set data for VL 6528
7117 22:22:45.791685 # ok 1225 Set VL 6544
7118 22:22:45.791761 # ok 1226 # SKIP Disabled ZA for VL 6544
7119 22:22:45.791875 # ok 1227 # SKIP Get and set data for VL 6544
7120 22:22:45.791970 # ok 1228 Set VL 6560
7121 22:22:45.792077 # ok 1229 # SKIP Disabled ZA for VL 6560
7122 22:22:45.792163 # ok 1230 # SKIP Get and set data for VL 6560
7123 22:22:45.792236 # ok 1231 Set VL 6576
7124 22:22:45.792325 # ok 1232 # SKIP Disabled ZA for VL 6576
7125 22:22:45.797811 # ok 1233 # SKIP Get and set data for VL 6576
7126 22:22:45.799470 # ok 1234 Set VL 6592
7127 22:22:45.799775 # ok 1235 # SKIP Disabled ZA for VL 6592
7128 22:22:45.799950 # ok 1236 # SKIP Get and set data for VL 6592
7129 22:22:45.800130 # ok 1237 Set VL 6608
7130 22:22:45.800366 # ok 1238 # SKIP Disabled ZA for VL 6608
7131 22:22:45.800529 # ok 1239 # SKIP Get and set data for VL 6608
7132 22:22:45.800680 # ok 1240 Set VL 6624
7133 22:22:45.800824 # ok 1241 # SKIP Disabled ZA for VL 6624
7134 22:22:45.801041 # ok 1242 # SKIP Get and set data for VL 6624
7135 22:22:45.801189 # ok 1243 Set VL 6640
7136 22:22:45.801446 # ok 1244 # SKIP Disabled ZA for VL 6640
7137 22:22:45.801605 # ok 1245 # SKIP Get and set data for VL 6640
7138 22:22:45.801781 # ok 1246 Set VL 6656
7139 22:22:45.801958 # ok 1247 # SKIP Disabled ZA for VL 6656
7140 22:22:45.802210 # ok 1248 # SKIP Get and set data for VL 6656
7141 22:22:45.802364 # ok 1249 Set VL 6672
7142 22:22:45.802493 # ok 1250 # SKIP Disabled ZA for VL 6672
7143 22:22:45.802634 # ok 1251 # SKIP Get and set data for VL 6672
7144 22:22:45.802797 # ok 1252 Set VL 6688
7145 22:22:45.802959 # ok 1253 # SKIP Disabled ZA for VL 6688
7146 22:22:45.803162 # ok 1254 # SKIP Get and set data for VL 6688
7147 22:22:45.803372 # ok 1255 Set VL 6704
7148 22:22:45.803575 # ok 1256 # SKIP Disabled ZA for VL 6704
7149 22:22:45.803775 # ok 1257 # SKIP Get and set data for VL 6704
7150 22:22:45.803961 # ok 1258 Set VL 6720
7151 22:22:45.804133 # ok 1259 # SKIP Disabled ZA for VL 6720
7152 22:22:45.804319 # ok 1260 # SKIP Get and set data for VL 6720
7153 22:22:45.804470 # ok 1261 Set VL 6736
7154 22:22:45.804589 # ok 1262 # SKIP Disabled ZA for VL 6736
7155 22:22:45.804733 # ok 1263 # SKIP Get and set data for VL 6736
7156 22:22:45.804857 # ok 1264 Set VL 6752
7157 22:22:45.804972 # ok 1265 # SKIP Disabled ZA for VL 6752
7158 22:22:45.805086 # ok 1266 # SKIP Get and set data for VL 6752
7159 22:22:45.805200 # ok 1267 Set VL 6768
7160 22:22:45.805314 # ok 1268 # SKIP Disabled ZA for VL 6768
7161 22:22:45.805428 # ok 1269 # SKIP Get and set data for VL 6768
7162 22:22:45.805542 # ok 1270 Set VL 6784
7163 22:22:45.805682 # ok 1271 # SKIP Disabled ZA for VL 6784
7164 22:22:45.805889 # ok 1272 # SKIP Get and set data for VL 6784
7165 22:22:45.806076 # ok 1273 Set VL 6800
7166 22:22:45.810561 # ok 1274 # SKIP Disabled ZA for VL 6800
7167 22:22:45.811088 # ok 1275 # SKIP Get and set data for VL 6800
7168 22:22:45.811243 # ok 1276 Set VL 6816
7169 22:22:45.811362 # ok 1277 # SKIP Disabled ZA for VL 6816
7170 22:22:45.818427 # ok 1278 # SKIP Get and set data for VL 6816
7171 22:22:45.818765 # ok 1279 Set VL 6832
7172 22:22:45.819174 # ok 1280 # SKIP Disabled ZA for VL 6832
7173 22:22:45.819346 # ok 1281 # SKIP Get and set data for VL 6832
7174 22:22:45.819519 # ok 1282 Set VL 6848
7175 22:22:45.819666 # ok 1283 # SKIP Disabled ZA for VL 6848
7176 22:22:45.819821 # ok 1284 # SKIP Get and set data for VL 6848
7177 22:22:45.819973 # ok 1285 Set VL 6864
7178 22:22:45.820103 # ok 1286 # SKIP Disabled ZA for VL 6864
7179 22:22:45.820270 # ok 1287 # SKIP Get and set data for VL 6864
7180 22:22:45.820442 # ok 1288 Set VL 6880
7181 22:22:45.820612 # ok 1289 # SKIP Disabled ZA for VL 6880
7182 22:22:45.820759 # ok 1290 # SKIP Get and set data for VL 6880
7183 22:22:45.820901 # ok 1291 Set VL 6896
7184 22:22:45.821040 # ok 1292 # SKIP Disabled ZA for VL 6896
7185 22:22:45.821180 # ok 1293 # SKIP Get and set data for VL 6896
7186 22:22:45.821333 # ok 1294 Set VL 6912
7187 22:22:45.821550 # ok 1295 # SKIP Disabled ZA for VL 6912
7188 22:22:45.821802 # ok 1296 # SKIP Get and set data for VL 6912
7189 22:22:45.822008 # ok 1297 Set VL 6928
7190 22:22:45.822220 # ok 1298 # SKIP Disabled ZA for VL 6928
7191 22:22:45.822436 # ok 1299 # SKIP Get and set data for VL 6928
7192 22:22:45.822678 # ok 1300 Set VL 6944
7193 22:22:45.822899 # ok 1301 # SKIP Disabled ZA for VL 6944
7194 22:22:45.823106 # ok 1302 # SKIP Get and set data for VL 6944
7195 22:22:45.823283 # ok 1303 Set VL 6960
7196 22:22:45.823470 # ok 1304 # SKIP Disabled ZA for VL 6960
7197 22:22:45.823659 # ok 1305 # SKIP Get and set data for VL 6960
7198 22:22:45.823850 # ok 1306 Set VL 6976
7199 22:22:45.824064 # ok 1307 # SKIP Disabled ZA for VL 6976
7200 22:22:45.824270 # ok 1308 # SKIP Get and set data for VL 6976
7201 22:22:45.824434 # ok 1309 Set VL 6992
7202 22:22:45.824566 # ok 1310 # SKIP Disabled ZA for VL 6992
7203 22:22:45.824679 # ok 1311 # SKIP Get and set data for VL 6992
7204 22:22:45.824793 # ok 1312 Set VL 7008
7205 22:22:45.824905 # ok 1313 # SKIP Disabled ZA for VL 7008
7206 22:22:45.825018 # ok 1314 # SKIP Get and set data for VL 7008
7207 22:22:45.825129 # ok 1315 Set VL 7024
7208 22:22:45.825242 # ok 1316 # SKIP Disabled ZA for VL 7024
7209 22:22:45.825355 # ok 1317 # SKIP Get and set data for VL 7024
7210 22:22:45.825468 # ok 1318 Set VL 7040
7211 22:22:45.825581 # ok 1319 # SKIP Disabled ZA for VL 7040
7212 22:22:45.825779 # ok 1320 # SKIP Get and set data for VL 7040
7213 22:22:45.825975 # ok 1321 Set VL 7056
7214 22:22:45.826194 # ok 1322 # SKIP Disabled ZA for VL 7056
7215 22:22:45.834288 # ok 1323 # SKIP Get and set data for VL 7056
7216 22:22:45.834885 # ok 1324 Set VL 7072
7217 22:22:45.835081 # ok 1325 # SKIP Disabled ZA for VL 7072
7218 22:22:45.835254 # ok 1326 # SKIP Get and set data for VL 7072
7219 22:22:45.835451 # ok 1327 Set VL 7088
7220 22:22:45.835668 # ok 1328 # SKIP Disabled ZA for VL 7088
7221 22:22:45.835890 # ok 1329 # SKIP Get and set data for VL 7088
7222 22:22:45.836084 # ok 1330 Set VL 7104
7223 22:22:45.836274 # ok 1331 # SKIP Disabled ZA for VL 7104
7224 22:22:45.836403 # ok 1332 # SKIP Get and set data for VL 7104
7225 22:22:45.836519 # ok 1333 Set VL 7120
7226 22:22:45.836631 # ok 1334 # SKIP Disabled ZA for VL 7120
7227 22:22:45.836744 # ok 1335 # SKIP Get and set data for VL 7120
7228 22:22:45.836857 # ok 1336 Set VL 7136
7229 22:22:45.836968 # ok 1337 # SKIP Disabled ZA for VL 7136
7230 22:22:45.837080 # ok 1338 # SKIP Get and set data for VL 7136
7231 22:22:45.837192 # ok 1339 Set VL 7152
7232 22:22:45.837302 # ok 1340 # SKIP Disabled ZA for VL 7152
7233 22:22:45.837414 # ok 1341 # SKIP Get and set data for VL 7152
7234 22:22:45.837548 # ok 1342 Set VL 7168
7235 22:22:45.841984 # ok 1343 # SKIP Disabled ZA for VL 7168
7236 22:22:45.842297 # ok 1344 # SKIP Get and set data for VL 7168
7237 22:22:45.842488 # ok 1345 Set VL 7184
7238 22:22:45.842639 # ok 1346 # SKIP Disabled ZA for VL 7184
7239 22:22:45.842874 # ok 1347 # SKIP Get and set data for VL 7184
7240 22:22:45.843077 # ok 1348 Set VL 7200
7241 22:22:45.843263 # ok 1349 # SKIP Disabled ZA for VL 7200
7242 22:22:45.843468 # ok 1350 # SKIP Get and set data for VL 7200
7243 22:22:45.843660 # ok 1351 Set VL 7216
7244 22:22:45.843844 # ok 1352 # SKIP Disabled ZA for VL 7216
7245 22:22:45.844045 # ok 1353 # SKIP Get and set data for VL 7216
7246 22:22:45.844213 # ok 1354 Set VL 7232
7247 22:22:45.844364 # ok 1355 # SKIP Disabled ZA for VL 7232
7248 22:22:45.844484 # ok 1356 # SKIP Get and set data for VL 7232
7249 22:22:45.844598 # ok 1357 Set VL 7248
7250 22:22:45.844714 # ok 1358 # SKIP Disabled ZA for VL 7248
7251 22:22:45.844828 # ok 1359 # SKIP Get and set data for VL 7248
7252 22:22:45.844942 # ok 1360 Set VL 7264
7253 22:22:45.845055 # ok 1361 # SKIP Disabled ZA for VL 7264
7254 22:22:45.845169 # ok 1362 # SKIP Get and set data for VL 7264
7255 22:22:45.845283 # ok 1363 Set VL 7280
7256 22:22:45.845395 # ok 1364 # SKIP Disabled ZA for VL 7280
7257 22:22:45.845540 # ok 1365 # SKIP Get and set data for VL 7280
7258 22:22:45.845698 # ok 1366 Set VL 7296
7259 22:22:45.850482 # ok 1367 # SKIP Disabled ZA for VL 7296
7260 22:22:45.851330 # ok 1368 # SKIP Get and set data for VL 7296
7261 22:22:45.851535 # ok 1369 Set VL 7312
7262 22:22:45.851786 # ok 1370 # SKIP Disabled ZA for VL 7312
7263 22:22:45.851993 # ok 1371 # SKIP Get and set data for VL 7312
7264 22:22:45.852215 # ok 1372 Set VL 7328
7265 22:22:45.852426 # ok 1373 # SKIP Disabled ZA for VL 7328
7266 22:22:45.852591 # ok 1374 # SKIP Get and set data for VL 7328
7267 22:22:45.852723 # ok 1375 Set VL 7344
7268 22:22:45.852866 # ok 1376 # SKIP Disabled ZA for VL 7344
7269 22:22:45.852986 # ok 1377 # SKIP Get and set data for VL 7344
7270 22:22:45.853101 # ok 1378 Set VL 7360
7271 22:22:45.853252 # ok 1379 # SKIP Disabled ZA for VL 7360
7272 22:22:45.853444 # ok 1380 # SKIP Get and set data for VL 7360
7273 22:22:45.853658 # ok 1381 Set VL 7376
7274 22:22:45.853843 # ok 1382 # SKIP Disabled ZA for VL 7376
7275 22:22:45.854055 # ok 1383 # SKIP Get and set data for VL 7376
7276 22:22:45.854267 # ok 1384 Set VL 7392
7277 22:22:45.854434 # ok 1385 # SKIP Disabled ZA for VL 7392
7278 22:22:45.854674 # ok 1386 # SKIP Get and set data for VL 7392
7279 22:22:45.854881 # ok 1387 Set VL 7408
7280 22:22:45.855076 # ok 1388 # SKIP Disabled ZA for VL 7408
7281 22:22:45.855285 # ok 1389 # SKIP Get and set data for VL 7408
7282 22:22:45.855499 # ok 1390 Set VL 7424
7283 22:22:45.855709 # ok 1391 # SKIP Disabled ZA for VL 7424
7284 22:22:45.855906 # ok 1392 # SKIP Get and set data for VL 7424
7285 22:22:45.856108 # ok 1393 Set VL 7440
7286 22:22:45.856300 # ok 1394 # SKIP Disabled ZA for VL 7440
7287 22:22:45.856467 # ok 1395 # SKIP Get and set data for VL 7440
7288 22:22:45.856597 # ok 1396 Set VL 7456
7289 22:22:45.856712 # ok 1397 # SKIP Disabled ZA for VL 7456
7290 22:22:45.856825 # ok 1398 # SKIP Get and set data for VL 7456
7291 22:22:45.856970 # ok 1399 Set VL 7472
7292 22:22:45.857090 # ok 1400 # SKIP Disabled ZA for VL 7472
7293 22:22:45.857204 # ok 1401 # SKIP Get and set data for VL 7472
7294 22:22:45.857318 # ok 1402 Set VL 7488
7295 22:22:45.857430 # ok 1403 # SKIP Disabled ZA for VL 7488
7296 22:22:45.857544 # ok 1404 # SKIP Get and set data for VL 7488
7297 22:22:45.857701 # ok 1405 Set VL 7504
7298 22:22:45.857911 # ok 1406 # SKIP Disabled ZA for VL 7504
7299 22:22:45.858096 # ok 1407 # SKIP Get and set data for VL 7504
7300 22:22:45.858278 # ok 1408 Set VL 7520
7301 22:22:45.858458 # ok 1409 # SKIP Disabled ZA for VL 7520
7302 22:22:45.858637 # ok 1410 # SKIP Get and set data for VL 7520
7303 22:22:45.858821 # ok 1411 Set VL 7536
7304 22:22:45.859006 # ok 1412 # SKIP Disabled ZA for VL 7536
7305 22:22:45.864125 # ok 1413 # SKIP Get and set data for VL 7536
7306 22:22:45.864401 # ok 1414 Set VL 7552
7307 22:22:45.864743 # ok 1415 # SKIP Disabled ZA for VL 7552
7308 22:22:45.864873 # ok 1416 # SKIP Get and set data for VL 7552
7309 22:22:45.870284 # ok 1417 Set VL 7568
7310 22:22:45.870482 # ok 1418 # SKIP Disabled ZA for VL 7568
7311 22:22:45.870893 # ok 1419 # SKIP Get and set data for VL 7568
7312 22:22:45.871067 # ok 1420 Set VL 7584
7313 22:22:45.871242 # ok 1421 # SKIP Disabled ZA for VL 7584
7314 22:22:45.871434 # ok 1422 # SKIP Get and set data for VL 7584
7315 22:22:45.871632 # ok 1423 Set VL 7600
7316 22:22:45.871846 # ok 1424 # SKIP Disabled ZA for VL 7600
7317 22:22:45.872077 # ok 1425 # SKIP Get and set data for VL 7600
7318 22:22:45.872248 # ok 1426 Set VL 7616
7319 22:22:45.872377 # ok 1427 # SKIP Disabled ZA for VL 7616
7320 22:22:45.872495 # ok 1428 # SKIP Get and set data for VL 7616
7321 22:22:45.872613 # ok 1429 Set VL 7632
7322 22:22:45.872736 # ok 1430 # SKIP Disabled ZA for VL 7632
7323 22:22:45.872907 # ok 1431 # SKIP Get and set data for VL 7632
7324 22:22:45.873051 # ok 1432 Set VL 7648
7325 22:22:45.873193 # ok 1433 # SKIP Disabled ZA for VL 7648
7326 22:22:45.873335 # ok 1434 # SKIP Get and set data for VL 7648
7327 22:22:45.873476 # ok 1435 Set VL 7664
7328 22:22:45.873617 # ok 1436 # SKIP Disabled ZA for VL 7664
7329 22:22:45.873774 # ok 1437 # SKIP Get and set data for VL 7664
7330 22:22:45.873952 # ok 1438 Set VL 7680
7331 22:22:45.874088 # ok 1439 # SKIP Disabled ZA for VL 7680
7332 22:22:45.877737 # ok 1440 # SKIP Get and set data for VL 7680
7333 22:22:45.877941 # ok 1441 Set VL 7696
7334 22:22:45.878336 # ok 1442 # SKIP Disabled ZA for VL 7696
7335 22:22:45.878554 # ok 1443 # SKIP Get and set data for VL 7696
7336 22:22:45.878719 # ok 1444 Set VL 7712
7337 22:22:45.878883 # ok 1445 # SKIP Disabled ZA for VL 7712
7338 22:22:45.879040 # ok 1446 # SKIP Get and set data for VL 7712
7339 22:22:45.879270 # ok 1447 Set VL 7728
7340 22:22:45.879512 # ok 1448 # SKIP Disabled ZA for VL 7728
7341 22:22:45.879707 # ok 1449 # SKIP Get and set data for VL 7728
7342 22:22:45.879893 # ok 1450 Set VL 7744
7343 22:22:45.880107 # ok 1451 # SKIP Disabled ZA for VL 7744
7344 22:22:45.880306 # ok 1452 # SKIP Get and set data for VL 7744
7345 22:22:45.880479 # ok 1453 Set VL 7760
7346 22:22:45.880624 # ok 1454 # SKIP Disabled ZA for VL 7760
7347 22:22:45.880766 # ok 1455 # SKIP Get and set data for VL 7760
7348 22:22:45.880908 # ok 1456 Set VL 7776
7349 22:22:45.881048 # ok 1457 # SKIP Disabled ZA for VL 7776
7350 22:22:45.881187 # ok 1458 # SKIP Get and set data for VL 7776
7351 22:22:45.881328 # ok 1459 Set VL 7792
7352 22:22:45.881467 # ok 1460 # SKIP Disabled ZA for VL 7792
7353 22:22:45.881657 # ok 1461 # SKIP Get and set data for VL 7792
7354 22:22:45.881797 # ok 1462 Set VL 7808
7355 22:22:45.881939 # ok 1463 # SKIP Disabled ZA for VL 7808
7356 22:22:45.882082 # ok 1464 # SKIP Get and set data for VL 7808
7357 22:22:45.882224 # ok 1465 Set VL 7824
7358 22:22:45.882364 # ok 1466 # SKIP Disabled ZA for VL 7824
7359 22:22:45.882505 # ok 1467 # SKIP Get and set data for VL 7824
7360 22:22:45.882646 # ok 1468 Set VL 7840
7361 22:22:45.885398 # ok 1469 # SKIP Disabled ZA for VL 7840
7362 22:22:45.885813 # ok 1470 # SKIP Get and set data for VL 7840
7363 22:22:45.885977 # ok 1471 Set VL 7856
7364 22:22:45.886132 # ok 1472 # SKIP Disabled ZA for VL 7856
7365 22:22:45.886261 # ok 1473 # SKIP Get and set data for VL 7856
7366 22:22:45.886422 # ok 1474 Set VL 7872
7367 22:22:45.886610 # ok 1475 # SKIP Disabled ZA for VL 7872
7368 22:22:45.886785 # ok 1476 # SKIP Get and set data for VL 7872
7369 22:22:45.886982 # ok 1477 Set VL 7888
7370 22:22:45.887159 # ok 1478 # SKIP Disabled ZA for VL 7888
7371 22:22:45.887374 # ok 1479 # SKIP Get and set data for VL 7888
7372 22:22:45.887582 # ok 1480 Set VL 7904
7373 22:22:45.887755 # ok 1481 # SKIP Disabled ZA for VL 7904
7374 22:22:45.887966 # ok 1482 # SKIP Get and set data for VL 7904
7375 22:22:45.888197 # ok 1483 Set VL 7920
7376 22:22:45.888369 # ok 1484 # SKIP Disabled ZA for VL 7920
7377 22:22:45.888534 # ok 1485 # SKIP Get and set data for VL 7920
7378 22:22:45.888696 # ok 1486 Set VL 7936
7379 22:22:45.888851 # ok 1487 # SKIP Disabled ZA for VL 7936
7380 22:22:45.888974 # ok 1488 # SKIP Get and set data for VL 7936
7381 22:22:45.889096 # ok 1489 Set VL 7952
7382 22:22:45.889217 # ok 1490 # SKIP Disabled ZA for VL 7952
7383 22:22:45.889338 # ok 1491 # SKIP Get and set data for VL 7952
7384 22:22:45.889458 # ok 1492 Set VL 7968
7385 22:22:45.889578 # ok 1493 # SKIP Disabled ZA for VL 7968
7386 22:22:45.889710 # ok 1494 # SKIP Get and set data for VL 7968
7387 22:22:45.889833 # ok 1495 Set VL 7984
7388 22:22:45.889930 # ok 1496 # SKIP Disabled ZA for VL 7984
7389 22:22:45.890013 # ok 1497 # SKIP Get and set data for VL 7984
7390 22:22:45.890096 # ok 1498 Set VL 8000
7391 22:22:45.890194 # ok 1499 # SKIP Disabled ZA for VL 8000
7392 22:22:45.895993 # ok 1500 # SKIP Get and set data for VL 8000
7393 22:22:45.896296 # ok 1501 Set VL 8016
7394 22:22:45.896399 # ok 1502 # SKIP Disabled ZA for VL 8016
7395 22:22:45.897469 # ok 1503 # SKIP Get and set data for VL 8016
7396 22:22:45.897803 # ok 1504 Set VL 8032
7397 22:22:45.897999 # ok 1505 # SKIP Disabled ZA for VL 8032
7398 22:22:45.898166 # ok 1506 # SKIP Get and set data for VL 8032
7399 22:22:45.898386 # ok 1507 Set VL 8048
7400 22:22:45.898568 # ok 1508 # SKIP Disabled ZA for VL 8048
7401 22:22:45.898732 # ok 1509 # SKIP Get and set data for VL 8048
7402 22:22:45.898890 # ok 1510 Set VL 8064
7403 22:22:45.899059 # ok 1511 # SKIP Disabled ZA for VL 8064
7404 22:22:45.899259 # ok 1512 # SKIP Get and set data for VL 8064
7405 22:22:45.899437 # ok 1513 Set VL 8080
7406 22:22:45.899633 # ok 1514 # SKIP Disabled ZA for VL 8080
7407 22:22:45.899817 # ok 1515 # SKIP Get and set data for VL 8080
7408 22:22:45.900017 # ok 1516 Set VL 8096
7409 22:22:45.900198 # ok 1517 # SKIP Disabled ZA for VL 8096
7410 22:22:45.900396 # ok 1518 # SKIP Get and set data for VL 8096
7411 22:22:45.900527 # ok 1519 Set VL 8112
7412 22:22:45.900692 # ok 1520 # SKIP Disabled ZA for VL 8112
7413 22:22:45.900818 # ok 1521 # SKIP Get and set data for VL 8112
7414 22:22:45.900934 # ok 1522 Set VL 8128
7415 22:22:45.901047 # ok 1523 # SKIP Disabled ZA for VL 8128
7416 22:22:45.901161 # ok 1524 # SKIP Get and set data for VL 8128
7417 22:22:45.901272 # ok 1525 Set VL 8144
7418 22:22:45.901383 # ok 1526 # SKIP Disabled ZA for VL 8144
7419 22:22:45.901496 # ok 1527 # SKIP Get and set data for VL 8144
7420 22:22:45.901608 # ok 1528 Set VL 8160
7421 22:22:45.901771 # ok 1529 # SKIP Disabled ZA for VL 8160
7422 22:22:45.901894 # ok 1530 # SKIP Get and set data for VL 8160
7423 22:22:45.902009 # ok 1531 Set VL 8176
7424 22:22:45.902123 # ok 1532 # SKIP Disabled ZA for VL 8176
7425 22:22:45.902243 # ok 1533 # SKIP Get and set data for VL 8176
7426 22:22:45.902358 # ok 1534 Set VL 8192
7427 22:22:45.902473 # ok 1535 # SKIP Disabled ZA for VL 8192
7428 22:22:45.902587 # ok 1536 # SKIP Get and set data for VL 8192
7429 22:22:45.908150 # # Totals: pass:522 fail:0 xfail:0 xpass:0 skip:1014 error:0
7430 22:22:45.908320 ok 34 selftests: arm64: za-ptrace
7431 22:22:45.908648 # selftests: arm64: check_buffer_fill
7432 22:22:46.326395 # 1..20
7433 22:22:46.326967 # ok 1 Check buffer correctness by byte with sync err mode and mmap memory
7434 22:22:46.327164 # ok 2 Check buffer correctness by byte with async err mode and mmap memory
7435 22:22:46.327336 # ok 3 Check buffer correctness by byte with sync err mode and mmap/mprotect memory
7436 22:22:46.327497 # ok 4 Check buffer correctness by byte with async err mode and mmap/mprotect memory
7437 22:22:46.327694 # not ok 5 Check buffer write underflow by byte with sync mode and mmap memory
7438 22:22:46.327859 # not ok 6 Check buffer write underflow by byte with async mode and mmap memory
7439 22:22:46.328020 # ok 7 Check buffer write underflow by byte with tag check fault ignore and mmap memory
7440 22:22:46.328190 # ok 8 Check buffer write underflow by byte with sync mode and mmap memory
7441 22:22:46.328419 # ok 9 Check buffer write underflow by byte with async mode and mmap memory
7442 22:22:46.328560 # ok 10 Check buffer write underflow by byte with tag check fault ignore and mmap memory
7443 22:22:46.328682 # not ok 11 Check buffer write overflow by byte with sync mode and mmap memory
7444 22:22:46.328800 # not ok 12 Check buffer write overflow by byte with async mode and mmap memory
7445 22:22:46.337607 # ok 13 Check buffer write overflow by byte with tag fault ignore mode and mmap memory
7446 22:22:46.337943 # not ok 14 Check buffer write correctness by block with sync mode and mmap memory
7447 22:22:46.338067 # not ok 15 Check buffer write correctness by block with async mode and mmap memory
7448 22:22:46.338172 # ok 16 Check buffer write correctness by block with tag fault ignore and mmap memory
7449 22:22:46.338459 # ok 17 Check initial tags with private mapping, sync error mode and mmap memory
7450 22:22:46.338565 # ok 18 Check initial tags with private mapping, sync error mode and mmap/mprotect memory
7451 22:22:46.338866 # ok 19 Check initial tags with shared mapping, sync error mode and mmap memory
7452 22:22:46.338973 # ok 20 Check initial tags with shared mapping, sync error mode and mmap/mprotect memory
7453 22:22:46.339271 # # Totals: pass:14 fail:6 xfail:0 xpass:0 skip:0 error:0
7454 22:22:46.356351 not ok 35 selftests: arm64: check_buffer_fill # exit=1
7455 22:22:46.488003 # selftests: arm64: check_child_memory
7456 22:22:47.114325 # 1..12
7457 22:22:47.114685 # not ok 1 Check child anonymous memory with private mapping, precise mode and mmap memory
7458 22:22:47.115119 # not ok 2 Check child anonymous memory with shared mapping, precise mode and mmap memory
7459 22:22:47.115344 # not ok 3 Check child anonymous memory with private mapping, imprecise mode and mmap memory
7460 22:22:47.115574 # not ok 4 Check child anonymous memory with shared mapping, imprecise mode and mmap memory
7461 22:22:47.115830 # not ok 5 Check child anonymous memory with private mapping, precise mode and mmap/mprotect memory
7462 22:22:47.116050 # not ok 6 Check child anonymous memory with shared mapping, precise mode and mmap/mprotect memory
7463 22:22:47.116275 # not ok 7 Check child file memory with private mapping, precise mode and mmap memory
7464 22:22:47.116418 # not ok 8 Check child file memory with shared mapping, precise mode and mmap memory
7465 22:22:47.116539 # not ok 9 Check child file memory with private mapping, imprecise mode and mmap memory
7466 22:22:47.123716 # not ok 10 Check child file memory with shared mapping, imprecise mode and mmap memory
7467 22:22:47.124065 # not ok 11 Check child file memory with private mapping, precise mode and mmap/mprotect memory
7468 22:22:47.125435 # not ok 12 Check child file memory with shared mapping, precise mode and mmap/mprotect memory
7469 22:22:47.125737 # # Totals: pass:0 fail:12 xfail:0 xpass:0 skip:0 error:0
7470 22:22:47.142552 not ok 36 selftests: arm64: check_child_memory # exit=1
7471 22:22:47.267349 # selftests: arm64: check_gcr_el1_cswitch
7472 22:23:32.574230 <47>[ 97.645790] systemd-journald[107]: Sent WATCHDOG=1 notification.
7473 22:23:33.022789 <47>[ 98.095659] systemd-journald[107]: Data hash table of /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal has a fill level at 75.0 (3328 of 4437 items, 2555904 file size, 768 bytes per hash table item), suggesting rotation.
7474 22:23:33.023566 <47>[ 98.096299] systemd-journald[107]: /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal: Journal header limits reached or header out-of-date, rotating.
7475 22:23:33.025707 <47>[ 98.098736] systemd-journald[107]: Rotating...
7476 22:23:33.060014 <47>[ 98.132457] systemd-journald[107]: Reserving 333 entries in field hash table.
7477 22:23:33.102317 <47>[ 98.175519] systemd-journald[107]: Reserving 4437 entries in data hash table.
7478 22:23:33.116209 <47>[ 98.189431] systemd-journald[107]: Vacuuming...
7479 22:23:33.118855 <47>[ 98.191925] systemd-journald[107]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
7480 22:23:33.656352 # 1..1
7481 22:23:33.656663 # 1..1
7482 22:23:33.656813 # 1..1
7483 22:23:33.656940 # 1..1
7484 22:23:33.657056 # 1..1
7485 22:23:33.657170 # 1..1
7486 22:23:33.657284 # 1..1
7487 22:23:33.657400 # 1..1
7488 22:23:33.657774 # 1..1
7489 22:23:33.657969 # 1..1
7490 22:23:33.658138 # 1..1
7491 22:23:33.658303 # 1..1
7492 22:23:33.658490 # 1..1
7493 22:23:33.658687 # 1..1
7494 22:23:33.658862 # 1..1
7495 22:23:33.659005 # 1..1
7496 22:23:33.659142 # 1..1
7497 22:23:33.659262 # 1..1
7498 22:23:33.659381 # 1..1
7499 22:23:33.659499 # 1..1
7500 22:23:33.659615 # 1..1
7501 22:23:33.659731 # 1..1
7502 22:23:33.659847 # 1..1
7503 22:23:33.659964 # 1..1
7504 22:23:33.660081 # 1..1
7505 22:23:33.660196 # 1..1
7506 22:23:33.660314 # 1..1
7507 22:23:33.660429 # 1..1
7508 22:23:33.660547 # 1..1
7509 22:23:33.660664 # 1..1
7510 22:23:33.660782 # 1..1
7511 22:23:33.660897 # 1..1
7512 22:23:33.661012 # 1..1
7513 22:23:33.661128 # 1..1
7514 22:23:33.661243 # 1..1
7515 22:23:33.661360 # 1..1
7516 22:23:33.661475 # 1..1
7517 22:23:33.661591 # 1..1
7518 22:23:33.661731 # 1..1
7519 22:23:33.661858 # 1..1
7520 22:23:33.661983 # 1..1
7521 22:23:33.662106 # 1..1
7522 22:23:33.662230 # 1..1
7523 22:23:33.662355 # 1..1
7524 22:23:33.662479 # 1..1
7525 22:23:33.662605 # 1..1
7526 22:23:33.662728 # 1..1
7527 22:23:33.662853 # 1..1
7528 22:23:33.662979 # 1..1
7529 22:23:33.663102 # 1..1
7530 22:23:33.663226 # 1..1
7531 22:23:33.663350 # 1..1
7532 22:23:33.663473 # 1..1
7533 22:23:33.663597 # 1..1
7534 22:23:33.663720 # 1..1
7535 22:23:33.663844 # 1..1
7536 22:23:33.663967 # 1..1
7537 22:23:33.664089 # 1..1
7538 22:23:33.664207 # 1..1
7539 22:23:33.664329 # 1..1
7540 22:23:33.664446 # 1..1
7541 22:23:33.664562 # 1..1
7542 22:23:33.664684 # 1..1
7543 22:23:33.664802 # 1..1
7544 22:23:33.664918 # 1..1
7545 22:23:33.665036 # 1..1
7546 22:23:33.665153 # 1..1
7547 22:23:33.665269 # 1..1
7548 22:23:33.665392 # 1..1
7549 22:23:33.665509 # 1..1
7550 22:23:33.665625 # 1..1
7551 22:23:33.665755 # 1..1
7552 22:23:33.665920 # 1..1
7553 22:23:33.666043 # 1..1
7554 22:23:33.666161 # 1..1
7555 22:23:33.666278 # 1..1
7556 22:23:33.666398 # 1..1
7557 22:23:33.666515 # 1..1
7558 22:23:33.666631 # 1..1
7559 22:23:33.666755 # 1..1
7560 22:23:33.666872 # 1..1
7561 22:23:33.666989 # 1..1
7562 22:23:33.667105 # 1..1
7563 22:23:33.667221 # 1..1
7564 22:23:33.667340 # 1..1
7565 22:23:33.667456 # 1..1
7566 22:23:33.667571 # 1..1
7567 22:23:33.667686 # 1..1
7568 22:23:33.667801 # 1..1
7569 22:23:33.667917 # 1..1
7570 22:23:33.668033 # 1..1
7571 22:23:33.668148 # 1..1
7572 22:23:33.668265 # 1..1
7573 22:23:33.668382 # 1..1
7574 22:23:33.668498 # 1..1
7575 22:23:33.668613 # 1..1
7576 22:23:33.668728 # 1..1
7577 22:23:33.668842 # 1..1
7578 22:23:33.668957 # 1..1
7579 22:23:33.669074 # 1..1
7580 22:23:33.669190 # 1..1
7581 22:23:33.669309 # 1..1
7582 22:23:33.669428 # 1..1
7583 22:23:33.669544 # 1..1
7584 22:23:33.669669 # 1..1
7585 22:23:33.669787 # 1..1
7586 22:23:33.669903 # 1..1
7587 22:23:33.670021 # 1..1
7588 22:23:33.698834 # 1..1
7589 22:23:33.699070 # 1..1
7590 22:23:33.699147 # 1..1
7591 22:23:33.699405 # 1..1
7592 22:23:33.699475 # 1..1
7593 22:23:33.699538 # 1..1
7594 22:23:33.699600 # 1..1
7595 22:23:33.699663 # 1..1
7596 22:23:33.699724 # 1..1
7597 22:23:33.699785 # 1..1
7598 22:23:33.699846 # 1..1
7599 22:23:33.699907 # 1..1
7600 22:23:33.701849 # 1..1
7601 22:23:33.702189 # 1..1
7602 22:23:33.702400 # 1..1
7603 22:23:33.702542 # 1..1
7604 22:23:33.702678 # 1..1
7605 22:23:33.702809 # 1..1
7606 22:23:33.702949 # 1..1
7607 22:23:33.703097 # 1..1
7608 22:23:33.703213 # 1..1
7609 22:23:33.703322 # 1..1
7610 22:23:33.703414 # 1..1
7611 22:23:33.703486 # 1..1
7612 22:23:33.703561 # 1..1
7613 22:23:33.703633 # 1..1
7614 22:23:33.703705 # 1..1
7615 22:23:33.703777 # 1..1
7616 22:23:33.703851 # 1..1
7617 22:23:33.703926 # 1..1
7618 22:23:33.703999 # 1..1
7619 22:23:33.704074 # 1..1
7620 22:23:33.704154 # 1..1
7621 22:23:33.704232 # 1..1
7622 22:23:33.704311 # 1..1
7623 22:23:33.713504 # 1..1
7624 22:23:33.713761 # 1..1
7625 22:23:33.713864 # 1..1
7626 22:23:33.713957 # 1..1
7627 22:23:33.714045 # 1..1
7628 22:23:33.714131 # 1..1
7629 22:23:33.714459 # 1..1
7630 22:23:33.714565 # 1..1
7631 22:23:33.714655 # 1..1
7632 22:23:33.714743 # 1..1
7633 22:23:33.714829 # 1..1
7634 22:23:33.714915 # 1..1
7635 22:23:33.715000 # 1..1
7636 22:23:33.715088 # 1..1
7637 22:23:33.715163 # 1..1
7638 22:23:33.715236 # 1..1
7639 22:23:33.715307 # 1..1
7640 22:23:33.715377 # 1..1
7641 22:23:33.715448 # 1..1
7642 22:23:33.715518 # 1..1
7643 22:23:33.715592 # 1..1
7644 22:23:33.715662 # 1..1
7645 22:23:33.715732 # 1..1
7646 22:23:33.715803 # 1..1
7647 22:23:33.715873 # 1..1
7648 22:23:33.715943 # 1..1
7649 22:23:33.716013 # 1..1
7650 22:23:33.716082 # 1..1
7651 22:23:33.716152 # 1..1
7652 22:23:33.716224 # 1..1
7653 22:23:33.716300 # 1..1
7654 22:23:33.716371 # 1..1
7655 22:23:33.716441 # 1..1
7656 22:23:33.716515 # 1..1
7657 22:23:33.716608 # 1..1
7658 22:23:33.716690 # 1..1
7659 22:23:33.716766 # 1..1
7660 22:23:33.716840 # 1..1
7661 22:23:33.716917 # 1..1
7662 22:23:33.716991 # 1..1
7663 22:23:33.717066 # 1..1
7664 22:23:33.717144 # 1..1
7665 22:23:33.717224 # 1..1
7666 22:23:33.717302 # 1..1
7667 22:23:33.717381 # 1..1
7668 22:23:33.717461 # 1..1
7669 22:23:33.717535 # 1..1
7670 22:23:33.717612 # 1..1
7671 22:23:33.718243 # 1..1
7672 22:23:33.718426 # 1..1
7673 22:23:33.734653 # 1..1
7674 22:23:33.734894 # 1..1
7675 22:23:33.734984 # 1..1
7676 22:23:33.735061 # 1..1
7677 22:23:33.735135 # 1..1
7678 22:23:33.735207 # 1..1
7679 22:23:33.735278 # 1..1
7680 22:23:33.735348 # 1..1
7681 22:23:33.735419 # 1..1
7682 22:23:33.735734 # 1..1
7683 22:23:33.735895 # 1..1
7684 22:23:33.736018 # 1..1
7685 22:23:33.736133 # 1..1
7686 22:23:33.736246 # 1..1
7687 22:23:33.736359 # 1..1
7688 22:23:33.736472 # 1..1
7689 22:23:33.736586 # 1..1
7690 22:23:33.736699 # 1..1
7691 22:23:33.736812 # 1..1
7692 22:23:33.736925 # 1..1
7693 22:23:33.748476 # 1..1
7694 22:23:33.748721 # 1..1
7695 22:23:33.748816 # 1..1
7696 22:23:33.748909 # 1..1
7697 22:23:33.748997 # 1..1
7698 22:23:33.749294 # 1..1
7699 22:23:33.749389 # 1..1
7700 22:23:33.749479 # 1..1
7701 22:23:33.749569 # 1..1
7702 22:23:33.749663 # 1..1
7703 22:23:33.749751 # 1..1
7704 22:23:33.749837 # 1..1
7705 22:23:33.749925 # 1..1
7706 22:23:33.750011 # 1..1
7707 22:23:33.750097 # 1..1
7708 22:23:33.750184 # 1..1
7709 22:23:33.750273 # 1..1
7710 22:23:33.750360 # 1..1
7711 22:23:33.750446 # 1..1
7712 22:23:33.750533 # 1..1
7713 22:23:33.750619 # 1..1
7714 22:23:33.750705 # 1..1
7715 22:23:33.750789 # 1..1
7716 22:23:33.750876 # 1..1
7717 22:23:33.750961 # 1..1
7718 22:23:33.751038 # 1..1
7719 22:23:33.751113 # 1..1
7720 22:23:33.751187 # 1..1
7721 22:23:33.751261 # 1..1
7722 22:23:33.751334 # 1..1
7723 22:23:33.751409 # 1..1
7724 22:23:33.751486 # 1..1
7725 22:23:33.751561 # 1..1
7726 22:23:33.751635 # 1..1
7727 22:23:33.751708 # 1..1
7728 22:23:33.751804 # 1..1
7729 22:23:33.751884 # 1..1
7730 22:23:33.751964 # 1..1
7731 22:23:33.752040 # 1..1
7732 22:23:33.752117 # 1..1
7733 22:23:33.752193 # 1..1
7734 22:23:33.752269 # 1..1
7735 22:23:33.752346 # 1..1
7736 22:23:33.752426 # 1..1
7737 22:23:33.752509 # 1..1
7738 22:23:33.752589 # 1..1
7739 22:23:33.752662 # 1..1
7740 22:23:33.752735 # 1..1
7741 22:23:33.752815 # 1..1
7742 22:23:33.752887 # 1..1
7743 22:23:33.752963 # 1..1
7744 22:23:33.753043 # 1..1
7745 22:23:33.753120 # 1..1
7746 22:23:33.753197 # 1..1
7747 22:23:33.753276 # 1..1
7748 22:23:33.753352 # 1..1
7749 22:23:33.753430 # 1..1
7750 22:23:33.753509 # 1..1
7751 22:23:33.753587 # 1..1
7752 22:23:33.753677 # 1..1
7753 22:23:33.753760 # 1..1
7754 22:23:33.753841 # 1..1
7755 22:23:33.753922 # 1..1
7756 22:23:33.754004 # 1..1
7757 22:23:33.754087 # 1..1
7758 22:23:33.754170 # 1..1
7759 22:23:33.754256 # 1..1
7760 22:23:33.754341 # 1..1
7761 22:23:33.754427 # 1..1
7762 22:23:33.754512 # 1..1
7763 22:23:33.754599 # 1..1
7764 22:23:33.754681 # 1..1
7765 22:23:33.754764 # 1..1
7766 22:23:33.754844 # 1..1
7767 22:23:33.754918 # 1..1
7768 22:23:33.754993 # 1..1
7769 22:23:33.755067 # 1..1
7770 22:23:33.755140 # 1..1
7771 22:23:33.755212 # 1..1
7772 22:23:33.755285 # 1..1
7773 22:23:33.755357 # 1..1
7774 22:23:33.755428 # 1..1
7775 22:23:33.755501 # 1..1
7776 22:23:33.774892 # 1..1
7777 22:23:33.775333 # 1..1
7778 22:23:33.775419 # 1..1
7779 22:23:33.775498 # 1..1
7780 22:23:33.775573 # 1..1
7781 22:23:33.775646 # 1..1
7782 22:23:33.775717 # 1..1
7783 22:23:33.775790 # 1..1
7784 22:23:33.775864 # 1..1
7785 22:23:33.775944 # 1..1
7786 22:23:33.776241 # 1..1
7787 22:23:33.776338 # 1..1
7788 22:23:33.776426 # 1..1
7789 22:23:33.776513 # 1..1
7790 22:23:33.776600 # 1..1
7791 22:23:33.776895 # 1..1
7792 22:23:33.777000 # 1..1
7793 22:23:33.777089 # 1..1
7794 22:23:33.777177 # 1..1
7795 22:23:33.777264 # 1..1
7796 22:23:33.777350 # 1..1
7797 22:23:33.777437 # 1..1
7798 22:23:33.777524 # 1..1
7799 22:23:33.777610 # 1..1
7800 22:23:33.777706 # 1..1
7801 22:23:33.777793 # 1..1
7802 22:23:33.777880 # 1..1
7803 22:23:33.777966 # 1..1
7804 22:23:33.778052 # 1..1
7805 22:23:33.778141 # 1..1
7806 22:23:33.778226 # 1..1
7807 22:23:33.778334 # 1..1
7808 22:23:33.778423 # 1..1
7809 22:23:33.778511 # 1..1
7810 22:23:33.778598 # 1..1
7811 22:23:33.778684 # 1..1
7812 22:23:33.778771 # 1..1
7813 22:23:33.778859 # 1..1
7814 22:23:33.778942 # 1..1
7815 22:23:33.779025 # 1..1
7816 22:23:33.779103 # 1..1
7817 22:23:33.779178 # 1..1
7818 22:23:33.779249 # 1..1
7819 22:23:33.779318 # 1..1
7820 22:23:33.779390 # 1..1
7821 22:23:33.779462 # 1..1
7822 22:23:33.779535 # 1..1
7823 22:23:33.779606 # 1..1
7824 22:23:33.779676 # 1..1
7825 22:23:33.779750 # 1..1
7826 22:23:33.779826 # 1..1
7827 22:23:33.779898 # 1..1
7828 22:23:33.779972 # 1..1
7829 22:23:33.780050 # 1..1
7830 22:23:33.780127 # 1..1
7831 22:23:33.780207 # 1..1
7832 22:23:33.780282 # 1..1
7833 22:23:33.780357 # 1..1
7834 22:23:33.780437 # 1..1
7835 22:23:33.780515 # 1..1
7836 22:23:33.780586 # 1..1
7837 22:23:33.780658 # 1..1
7838 22:23:33.780736 # 1..1
7839 22:23:33.780807 # 1..1
7840 22:23:33.780880 # 1..1
7841 22:23:33.780954 # 1..1
7842 22:23:33.781030 # 1..1
7843 22:23:33.781106 # 1..1
7844 22:23:33.781181 # 1..1
7845 22:23:33.781257 # 1..1
7846 22:23:33.781332 # 1..1
7847 22:23:33.781408 # 1..1
7848 22:23:33.781485 # 1..1
7849 22:23:33.781561 # 1..1
7850 22:23:33.781639 # 1..1
7851 22:23:33.782310 # 1..1
7852 22:23:33.782403 # 1..1
7853 22:23:33.782488 # 1..1
7854 22:23:33.782573 # 1..1
7855 22:23:33.782685 # 1..1
7856 22:23:33.782771 # 1..1
7857 22:23:33.782849 # 1..1
7858 22:23:33.782926 # 1..1
7859 22:23:33.783001 # 1..1
7860 22:23:33.783076 # 1..1
7861 22:23:33.783148 # 1..1
7862 22:23:33.783220 # 1..1
7863 22:23:33.783291 # 1..1
7864 22:23:33.783362 # 1..1
7865 22:23:33.783432 # 1..1
7866 22:23:33.783503 # 1..1
7867 22:23:33.783575 # 1..1
7868 22:23:33.783646 # 1..1
7869 22:23:33.783716 # 1..1
7870 22:23:33.783788 # 1..1
7871 22:23:33.783859 # 1..1
7872 22:23:33.783933 # 1..1
7873 22:23:33.784007 # 1..1
7874 22:23:33.784082 # 1..1
7875 22:23:33.784153 # 1..1
7876 22:23:33.786417 # 1..1
7877 22:23:33.786547 # 1..1
7878 22:23:33.786640 # 1..1
7879 22:23:33.786725 # 1..1
7880 22:23:33.786809 # 1..1
7881 22:23:33.786894 # 1..1
7882 22:23:33.786979 # 1..1
7883 22:23:33.787075 # 1..1
7884 22:23:33.787154 # 1..1
7885 22:23:33.787226 # 1..1
7886 22:23:33.787297 # 1..1
7887 22:23:33.787382 # 1..1
7888 22:23:33.787456 # 1..1
7889 22:23:33.787527 # 1..1
7890 22:23:33.787602 # 1..1
7891 22:23:33.787676 # 1..1
7892 22:23:33.787745 # 1..1
7893 22:23:33.787815 # 1..1
7894 22:23:33.787884 # 1..1
7895 22:23:33.787953 # 1..1
7896 22:23:33.788023 # 1..1
7897 22:23:33.788093 # 1..1
7898 22:23:33.788167 # 1..1
7899 22:23:33.788241 # 1..1
7900 22:23:33.788317 # 1..1
7901 22:23:33.788395 # 1..1
7902 22:23:33.788468 # 1..1
7903 22:23:33.788541 # 1..1
7904 22:23:33.788620 # 1..1
7905 22:23:33.800373 # 1..1
7906 22:23:33.800749 # 1..1
7907 22:23:33.800952 # 1..1
7908 22:23:33.801151 # 1..1
7909 22:23:33.801383 # 1..1
7910 22:23:33.801572 # 1..1
7911 22:23:33.801733 # 1..1
7912 22:23:33.802138 # 1..1
7913 22:23:33.802334 # 1..1
7914 22:23:33.802536 # 1..1
7915 22:23:33.802753 # 1..1
7916 22:23:33.802952 # 1..1
7917 22:23:33.803125 # 1..1
7918 22:23:33.803270 # 1..1
7919 22:23:33.803411 # 1..1
7920 22:23:33.803552 # 1..1
7921 22:23:33.803693 # 1..1
7922 22:23:33.803836 # 1..1
7923 22:23:33.803977 # 1..1
7924 22:23:33.804120 # 1..1
7925 22:23:33.804261 # 1..1
7926 22:23:33.804403 # 1..1
7927 22:23:33.804543 # 1..1
7928 22:23:33.804687 # 1..1
7929 22:23:33.804829 # 1..1
7930 22:23:33.804970 # 1..1
7931 22:23:33.805113 # 1..1
7932 22:23:33.805258 # 1..1
7933 22:23:33.805398 # 1..1
7934 22:23:33.805538 # 1..1
7935 22:23:33.805698 # 1..1
7936 22:23:33.805842 # 1..1
7937 22:23:33.805983 # 1..1
7938 22:23:33.806126 # 1..1
7939 22:23:33.806269 # 1..1
7940 22:23:33.806410 # 1..1
7941 22:23:33.806551 # 1..1
7942 22:23:33.806692 # 1..1
7943 22:23:33.806833 # 1..1
7944 22:23:33.806973 # 1..1
7945 22:23:33.807113 # 1..1
7946 22:23:33.807253 # 1..1
7947 22:23:33.807394 # 1..1
7948 22:23:33.807534 # 1..1
7949 22:23:33.807678 # 1..1
7950 22:23:33.807817 # 1..1
7951 22:23:33.807958 # 1..1
7952 22:23:33.808098 # 1..1
7953 22:23:33.808238 # 1..1
7954 22:23:33.808377 # 1..1
7955 22:23:33.808518 # 1..1
7956 22:23:33.808658 # 1..1
7957 22:23:33.808801 # 1..1
7958 22:23:33.808941 # 1..1
7959 22:23:33.809081 # 1..1
7960 22:23:33.809221 # 1..1
7961 22:23:33.809362 # 1..1
7962 22:23:33.809502 # 1..1
7963 22:23:33.809642 # 1..1
7964 22:23:33.809797 # 1..1
7965 22:23:33.809938 # 1..1
7966 22:23:33.810078 # 1..1
7967 22:23:33.810216 # 1..1
7968 22:23:33.810357 # 1..1
7969 22:23:33.810498 # 1..1
7970 22:23:33.810638 # 1..1
7971 22:23:33.810777 # 1..1
7972 22:23:33.810917 # 1..1
7973 22:23:33.811056 # 1..1
7974 22:23:33.811197 # 1..1
7975 22:23:33.811336 # 1..1
7976 22:23:33.811476 # 1..1
7977 22:23:33.811616 # 1..1
7978 22:23:33.811757 # 1..1
7979 22:23:33.811950 # 1..1
7980 22:23:33.812088 # 1..1
7981 22:23:33.812229 # 1..1
7982 22:23:33.812372 # 1..1
7983 22:23:33.812514 # 1..1
7984 22:23:33.812655 # 1..1
7985 22:23:33.812801 # 1..1
7986 22:23:33.812942 # 1..1
7987 22:23:33.813084 # 1..1
7988 22:23:33.813225 # 1..1
7989 22:23:33.813366 # 1..1
7990 22:23:33.813507 # 1..1
7991 22:23:33.813660 # 1..1
7992 22:23:33.813804 # 1..1
7993 22:23:33.813945 # 1..1
7994 22:23:33.814084 # 1..1
7995 22:23:33.814227 # 1..1
7996 22:23:33.814367 # 1..1
7997 22:23:33.814507 # 1..1
7998 22:23:33.814649 # 1..1
7999 22:23:33.814791 # 1..1
8000 22:23:33.814931 # 1..1
8001 22:23:33.815071 # 1..1
8002 22:23:33.815211 # 1..1
8003 22:23:33.815352 # 1..1
8004 22:23:33.815493 # 1..1
8005 22:23:33.815633 # 1..1
8006 22:23:33.815779 # 1..1
8007 22:23:33.815920 # 1..1
8008 22:23:33.816060 # 1..1
8009 22:23:33.816201 # 1..1
8010 22:23:33.816341 # 1..1
8011 22:23:33.816483 # 1..1
8012 22:23:33.836325 # 1..1
8013 22:23:33.836661 # 1..1
8014 22:23:33.836857 # 1..1
8015 22:23:33.837046 # 1..1
8016 22:23:33.837217 # 1..1
8017 22:23:33.837577 # 1..1
8018 22:23:33.837746 # 1..1
8019 22:23:33.837871 # 1..1
8020 22:23:33.837986 # 1..1
8021 22:23:33.838101 # 1..1
8022 22:23:33.838238 # 1..1
8023 22:23:33.838394 # 1..1
8024 22:23:33.838514 # 1..1
8025 22:23:33.838626 # 1..1
8026 22:23:33.838739 # 1..1
8027 22:23:33.838851 # 1..1
8028 22:23:33.838962 # 1..1
8029 22:23:33.839073 # 1..1
8030 22:23:33.839183 # 1..1
8031 22:23:33.839295 # 1..1
8032 22:23:33.839405 # 1..1
8033 22:23:33.839518 # 1..1
8034 22:23:33.839628 # 1..1
8035 22:23:33.839739 # 1..1
8036 22:23:33.839851 # 1..1
8037 22:23:33.839964 # 1..1
8038 22:23:33.840075 # 1..1
8039 22:23:33.840187 # 1..1
8040 22:23:33.840298 # 1..1
8041 22:23:33.840410 # 1..1
8042 22:23:33.840521 # 1..1
8043 22:23:33.840632 # 1..1
8044 22:23:33.840745 # 1..1
8045 22:23:33.840855 # 1..1
8046 22:23:33.840966 # 1..1
8047 22:23:33.841077 # 1..1
8048 22:23:33.841187 # 1..1
8049 22:23:33.841298 # 1..1
8050 22:23:33.841408 # 1..1
8051 22:23:33.841518 # 1..1
8052 22:23:33.841686 #
8053 22:23:33.841897 not ok 37 selftests: arm64: check_gcr_el1_cswitch # TIMEOUT 45 seconds
8054 22:23:34.108550 # selftests: arm64: check_ksm_options
8055 22:23:34.523170 # 1..4
8056 22:23:34.523456 # # Invalid MTE synchronous exception caught!
8057 22:23:34.578112 not ok 38 selftests: arm64: check_ksm_options # exit=1
8058 22:23:34.913333 # selftests: arm64: check_mmap_options
8059 22:23:35.820515 # 1..22
8060 22:23:35.821081 # ok 1 Check anonymous memory with private mapping, sync error mode, mmap memory and tag check off
8061 22:23:35.821272 # ok 2 Check file memory with private mapping, sync error mode, mmap/mprotect memory and tag check off
8062 22:23:35.821423 # ok 3 Check anonymous memory with private mapping, no error mode, mmap memory and tag check off
8063 22:23:35.821621 # ok 4 Check file memory with private mapping, no error mode, mmap/mprotect memory and tag check off
8064 22:23:35.821843 # not ok 5 Check anonymous memory with private mapping, sync error mode, mmap memory and tag check on
8065 22:23:35.822021 # not ok 6 Check anonymous memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
8066 22:23:35.822227 # not ok 7 Check anonymous memory with shared mapping, sync error mode, mmap memory and tag check on
8067 22:23:35.822432 # not ok 8 Check anonymous memory with shared mapping, sync error mode, mmap/mprotect memory and tag check on
8068 22:23:35.822631 # not ok 9 Check anonymous memory with private mapping, async error mode, mmap memory and tag check on
8069 22:23:35.822796 # not ok 10 Check anonymous memory with private mapping, async error mode, mmap/mprotect memory and tag check on
8070 22:23:35.822987 # not ok 11 Check anonymous memory with shared mapping, async error mode, mmap memory and tag check on
8071 22:23:35.823177 # not ok 12 Check anonymous memory with shared mapping, async error mode, mmap/mprotect memory and tag check on
8072 22:23:35.845830 # not ok 13 Check file memory with private mapping, sync error mode, mmap memory and tag check on
8073 22:23:35.846240 # not ok 14 Check file memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
8074 22:23:35.846447 # not ok 15 Check file memory with shared mapping, sync error mode, mmap memory and tag check on
8075 22:23:35.846664 # not ok 16 Check file memory with shared mapping, sync error mode, mmap/mprotect memory and tag check on
8076 22:23:35.846886 # not ok 17 Check file memory with private mapping, async error mode, mmap memory and tag check on
8077 22:23:35.847061 # not ok 18 Check file memory with private mapping, async error mode, mmap/mprotect memory and tag check on
8078 22:23:35.847233 # not ok 19 Check file memory with shared mapping, async error mode, mmap memory and tag check on
8079 22:23:35.885690 # not ok 20 Check file memory with shared mapping, async error mode, mmap/mprotect memory and tag check on
8080 22:23:35.885964 # not ok 21 Check clear PROT_MTE flags with private mapping, sync error mode and mmap memory
8081 22:23:35.886111 # not ok 22 Check clear PROT_MTE flags with private mapping and sync error mode and mmap/mprotect memory
8082 22:23:35.886410 # # Totals: pass:4 fail:18 xfail:0 xpass:0 skip:0 error:0
8083 22:23:35.896623 not ok 39 selftests: arm64: check_mmap_options # exit=1
8084 22:23:36.230515 # selftests: arm64: check_prctl
8085 22:23:36.572121 # TAP version 13
8086 22:23:36.572433 # 1..5
8087 22:23:36.572576 # ok 1 check_basic_read
8088 22:23:36.572701 # ok 2 NONE
8089 22:23:36.572821 # ok 3 SYNC
8090 22:23:36.573158 # ok 4 ASYNC
8091 22:23:36.573293 # ok 5 SYNC+ASYNC
8092 22:23:36.573415 # # Totals: pass:5 fail:0 xfail:0 xpass:0 skip:0 error:0
8093 22:23:36.616645 ok 40 selftests: arm64: check_prctl
8094 22:23:36.970290 # selftests: arm64: check_tags_inclusion
8095 22:23:37.334380 # 1..4
8096 22:23:37.334743 # # Unexpected fault recorded for 0x600ffff8f2cc000-0x600ffff8f2cc050 in mode 1
8097 22:23:37.334852 # not ok 1 Check an included tag value with sync mode
8098 22:23:37.335156 # # Unexpected fault recorded for 0x600ffff8f2cc000-0x600ffff8f2cc050 in mode 1
8099 22:23:37.335261 # not ok 2 Check different included tags value with sync mode
8100 22:23:37.335350 # ok 3 Check none included tags value with sync mode
8101 22:23:37.353278 # # Unexpected fault recorded for 0x500ffff8f2cc000-0x500ffff8f2cc050 in mode 1
8102 22:23:37.353588 # not ok 4 Check all included tags value with sync mode
8103 22:23:37.353701 # # Totals: pass:1 fail:3 xfail:0 xpass:0 skip:0 error:0
8104 22:23:37.395017 not ok 41 selftests: arm64: check_tags_inclusion # exit=1
8105 22:23:37.723009 # selftests: arm64: check_user_mem
8106 22:23:46.109866 # 1..64
8107 22:23:46.110178 # ok 1 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8108 22:23:46.110612 # ok 2 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8109 22:23:46.110805 # ok 3 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8110 22:23:46.110964 # ok 4 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8111 22:23:46.111145 # ok 5 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8112 22:23:46.111674 # ok 6 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8113 22:23:46.111790 # ok 7 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8114 22:23:46.111880 # ok 8 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8115 22:23:46.112715 # ok 9 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8116 22:23:46.113020 # ok 10 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8117 22:23:46.113137 # ok 11 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8118 22:23:46.113443 # ok 12 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8119 22:23:46.113558 # ok 13 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8120 22:23:46.113872 # ok 14 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8121 22:23:46.113991 # ok 15 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8122 22:23:46.114278 # ok 16 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8123 22:23:46.114380 # ok 17 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8124 22:23:46.114479 # ok 18 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8125 22:23:46.114768 # ok 19 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8126 22:23:46.115057 # ok 20 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8127 22:23:46.115146 # ok 21 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8128 22:23:46.120246 # ok 22 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8129 22:23:46.120560 # ok 23 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8130 22:23:46.120864 # ok 24 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8131 22:23:46.120979 # ok 25 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8132 22:23:46.121276 # ok 26 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8133 22:23:46.121391 # ok 27 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8134 22:23:46.121686 # ok 28 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8135 22:23:46.121806 # ok 29 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8136 22:23:46.122115 # ok 30 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8137 22:23:46.122218 # ok 31 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8138 22:23:46.124154 # ok 32 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8139 22:23:46.124265 # ok 33 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8140 22:23:46.124352 # ok 34 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8141 22:23:46.124438 # ok 35 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8142 22:23:46.127846 # ok 36 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8143 22:23:46.128132 # ok 37 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8144 22:23:46.128257 # ok 38 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8145 22:23:46.128564 # ok 39 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8146 22:23:46.128671 # ok 40 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8147 22:23:46.128994 # ok 41 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8148 22:23:46.129158 # ok 42 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8149 22:23:46.129263 # ok 43 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8150 22:23:46.129560 # ok 44 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8151 22:23:46.129699 # ok 45 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8152 22:23:46.129807 # ok 46 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8153 22:23:46.130111 # ok 47 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8154 22:23:46.130216 # ok 48 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8155 22:23:46.130317 # ok 49 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8156 22:23:46.130417 # ok 50 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8157 22:23:46.130718 # ok 51 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8158 22:23:47.689212 # ok 52 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8159 22:23:47.689781 # ok 53 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8160 22:23:47.689892 # ok 54 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8161 22:23:47.689986 # ok 55 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8162 22:23:47.690095 # ok 56 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8163 22:23:47.690186 # ok 57 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8164 22:23:47.690291 # ok 58 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8165 22:23:47.690416 # ok 59 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8166 22:23:47.690716 # ok 60 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8167 22:23:47.690839 # ok 61 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8168 22:23:47.698565 # ok 62 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8169 22:23:47.699016 # ok 63 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8170 22:23:47.699178 # ok 64 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8171 22:23:47.699305 # # Totals: pass:64 fail:0 xfail:0 xpass:0 skip:0 error:0
8172 22:23:47.717140 ok 42 selftests: arm64: check_user_mem
8173 22:23:47.838525 # selftests: arm64: btitest
8174 22:23:47.962117 # TAP version 13
8175 22:23:47.962458 # 1..18
8176 22:23:47.962650 # # HWCAP_PACA present
8177 22:23:47.962822 # # HWCAP2_BTI present
8178 22:23:47.963242 # # Test binary built for BTI
8179 22:23:47.963403 # # [SIGILL in nohint_func/call_using_br_x0, BTYPE=11 (expected)]
8180 22:23:47.963531 # ok 1 nohint_func/call_using_br_x0
8181 22:23:47.963681 # # [SIGILL in nohint_func/call_using_br_x16, BTYPE=01 (expected)]
8182 22:23:47.963847 # ok 2 nohint_func/call_using_br_x16
8183 22:23:47.963980 # # [SIGILL in nohint_func/call_using_blr, BTYPE=10 (expected)]
8184 22:23:47.964108 # ok 3 nohint_func/call_using_blr
8185 22:23:47.964235 # # [SIGILL in bti_none_func/call_using_br_x0, BTYPE=11 (expected)]
8186 22:23:47.965065 # ok 4 bti_none_func/call_using_br_x0
8187 22:23:47.965525 # # [SIGILL in bti_none_func/call_using_br_x16, BTYPE=01 (expected)]
8188 22:23:47.965745 # ok 5 bti_none_func/call_using_br_x16
8189 22:23:47.965927 # # [SIGILL in bti_none_func/call_using_blr, BTYPE=10 (expected)]
8190 22:23:47.966128 # ok 6 bti_none_func/call_using_blr
8191 22:23:47.966304 # # [SIGILL in bti_c_func/call_using_br_x0, BTYPE=11 (expected)]
8192 22:23:47.966464 # ok 7 bti_c_func/call_using_br_x0
8193 22:23:47.966610 # ok 8 bti_c_func/call_using_br_x16
8194 22:23:47.966784 # ok 9 bti_c_func/call_using_blr
8195 22:23:47.966970 # ok 10 bti_j_func/call_using_br_x0
8196 22:23:47.967148 # ok 11 bti_j_func/call_using_br_x16
8197 22:23:47.967324 # # [SIGILL in bti_j_func/call_using_blr, BTYPE=10 (expected)]
8198 22:23:47.967474 # ok 12 bti_j_func/call_using_blr
8199 22:23:47.967617 # ok 13 bti_jc_func/call_using_br_x0
8200 22:23:47.967759 # ok 14 bti_jc_func/call_using_br_x16
8201 22:23:47.967903 # ok 15 bti_jc_func/call_using_blr
8202 22:23:47.968045 # # [SIGILL in paciasp_func/call_using_br_x0, BTYPE=11 (expected)]
8203 22:23:47.968226 # ok 16 paciasp_func/call_using_br_x0
8204 22:23:47.968363 # ok 17 paciasp_func/call_using_br_x16
8205 22:23:47.970863 # ok 18 paciasp_func/call_using_blr
8206 22:23:47.971040 # # Totals: pass:18 fail:0 xfail:0 xpass:0 skip:0 error:0
8207 22:23:47.986804 ok 43 selftests: arm64: btitest
8208 22:23:48.108575 # selftests: arm64: nobtitest
8209 22:23:48.213400 # TAP version 13
8210 22:23:48.213749 # 1..18
8211 22:23:48.214231 # # HWCAP_PACA present
8212 22:23:48.214396 # # HWCAP2_BTI present
8213 22:23:48.214571 # # Test binary not built for BTI
8214 22:23:48.214721 # ok 1 nohint_func/call_using_br_x0
8215 22:23:48.214867 # ok 2 nohint_func/call_using_br_x16
8216 22:23:48.215018 # ok 3 nohint_func/call_using_blr
8217 22:23:48.215162 # ok 4 bti_none_func/call_using_br_x0
8218 22:23:48.215306 # ok 5 bti_none_func/call_using_br_x16
8219 22:23:48.215447 # ok 6 bti_none_func/call_using_blr
8220 22:23:48.215622 # ok 7 bti_c_func/call_using_br_x0
8221 22:23:48.215865 # ok 8 bti_c_func/call_using_br_x16
8222 22:23:48.216027 # ok 9 bti_c_func/call_using_blr
8223 22:23:48.216175 # ok 10 bti_j_func/call_using_br_x0
8224 22:23:48.216318 # ok 11 bti_j_func/call_using_br_x16
8225 22:23:48.216460 # ok 12 bti_j_func/call_using_blr
8226 22:23:48.216603 # ok 13 bti_jc_func/call_using_br_x0
8227 22:23:48.216745 # ok 14 bti_jc_func/call_using_br_x16
8228 22:23:48.216886 # ok 15 bti_jc_func/call_using_blr
8229 22:23:48.217029 # ok 16 paciasp_func/call_using_br_x0
8230 22:23:48.217171 # ok 17 paciasp_func/call_using_br_x16
8231 22:23:48.217313 # ok 18 paciasp_func/call_using_blr
8232 22:23:48.218980 # # Totals: pass:18 fail:0 xfail:0 xpass:0 skip:0 error:0
8233 22:23:48.242209 ok 44 selftests: arm64: nobtitest
8234 22:23:48.360490 # selftests: arm64: hwcap
8235 22:23:48.489383 # TAP version 13
8236 22:23:48.489737 # 1..28
8237 22:23:48.490211 # # RNG present
8238 22:23:48.490444 # ok 1 cpuinfo_match_RNG
8239 22:23:48.490640 # ok 2 sigill_RNG
8240 22:23:48.490813 # # SME present
8241 22:23:48.491031 # ok 3 cpuinfo_match_SME
8242 22:23:48.491207 # ok 4 sigill_SME
8243 22:23:48.491345 # # SVE present
8244 22:23:48.491512 # ok 5 cpuinfo_match_SVE
8245 22:23:48.491663 # ok 6 sigill_SVE
8246 22:23:48.491788 # # SVE 2 present
8247 22:23:48.491911 # ok 7 cpuinfo_match_SVE 2
8248 22:23:48.492035 # ok 8 sigill_SVE 2
8249 22:23:48.492155 # # SVE AES present
8250 22:23:48.492279 # ok 9 cpuinfo_match_SVE AES
8251 22:23:48.492437 # ok 10 sigill_SVE AES
8252 22:23:48.492569 # # SVE2 PMULL present
8253 22:23:48.492691 # ok 11 cpuinfo_match_SVE2 PMULL
8254 22:23:48.492815 # ok 12 sigill_SVE2 PMULL
8255 22:23:48.492941 # # SVE2 BITPERM present
8256 22:23:48.493064 # ok 13 cpuinfo_match_SVE2 BITPERM
8257 22:23:48.493185 # ok 14 sigill_SVE2 BITPERM
8258 22:23:48.493305 # # SVE2 SHA3 present
8259 22:23:48.493420 # ok 15 cpuinfo_match_SVE2 SHA3
8260 22:23:48.493540 # ok 16 sigill_SVE2 SHA3
8261 22:23:48.493685 # # SVE2 SM4 present
8262 22:23:48.499039 # ok 17 cpuinfo_match_SVE2 SM4
8263 22:23:48.499278 # ok 18 sigill_SVE2 SM4
8264 22:23:48.499615 # # SVE2 I8MM present
8265 22:23:48.512861 # ok 19 cpuinfo_match_SVE2 I8MM
8266 22:23:48.513200 # ok 20 sigill_SVE2 I8MM
8267 22:23:48.513681 # # SVE2 F32MM present
8268 22:23:48.513870 # ok 21 cpuinfo_match_SVE2 F32MM
8269 22:23:48.514014 # ok 22 sigill_SVE2 F32MM
8270 22:23:48.514138 # # SVE2 F64MM present
8271 22:23:48.514257 # ok 23 cpuinfo_match_SVE2 F64MM
8272 22:23:48.514373 # ok 24 sigill_SVE2 F64MM
8273 22:23:48.514494 # # SVE2 BF16 present
8274 22:23:48.514610 # ok 25 cpuinfo_match_SVE2 BF16
8275 22:23:48.514729 # ok 26 sigill_SVE2 BF16
8276 22:23:48.514846 # ok 27 cpuinfo_match_SVE2 EBF16
8277 22:23:48.514965 # ok 28 # SKIP sigill_SVE2 EBF16
8278 22:23:48.515110 # # Totals: pass:27 fail:0 xfail:0 xpass:0 skip:1 error:0
8279 22:23:48.521546 ok 45 selftests: arm64: hwcap
8280 22:23:48.612972 # selftests: arm64: ptrace
8281 22:23:48.740013 # TAP version 13
8282 22:23:48.740261 # 1..7
8283 22:23:48.740564 # # Parent is 4701, child is 4702
8284 22:23:48.740659 # ok 1 read_tpidr_one
8285 22:23:48.740746 # ok 2 write_tpidr_one
8286 22:23:48.740832 # ok 3 verify_tpidr_one
8287 22:23:48.740916 # ok 4 count_tpidrs
8288 22:23:48.741001 # ok 5 tpidr2_write
8289 22:23:48.741085 # ok 6 tpidr2_read
8290 22:23:48.741171 # ok 7 write_tpidr_only
8291 22:23:48.741256 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
8292 22:23:48.760134 ok 46 selftests: arm64: ptrace
8293 22:23:48.850202 # selftests: arm64: syscall-abi
8294 22:23:51.389886 # TAP version 13
8295 22:23:51.390531 # 1..514
8296 22:23:51.390703 # # SME with FA64
8297 22:23:51.390837 # ok 1 getpid() FPSIMD
8298 22:23:51.390963 # ok 2 getpid() SVE VL 256
8299 22:23:51.391084 # ok 3 getpid() SVE VL 256/SME VL 256 SM+ZA
8300 22:23:51.391225 # ok 4 getpid() SVE VL 256/SME VL 256 SM
8301 22:23:51.391344 # ok 5 getpid() SVE VL 256/SME VL 256 ZA
8302 22:23:51.391460 # ok 6 getpid() SVE VL 256/SME VL 128 SM+ZA
8303 22:23:51.391575 # ok 7 getpid() SVE VL 256/SME VL 128 SM
8304 22:23:51.395280 # ok 8 getpid() SVE VL 256/SME VL 128 ZA
8305 22:23:51.395655 # ok 9 getpid() SVE VL 256/SME VL 64 SM+ZA
8306 22:23:51.395841 # ok 10 getpid() SVE VL 256/SME VL 64 SM
8307 22:23:51.396022 # ok 11 getpid() SVE VL 256/SME VL 64 ZA
8308 22:23:51.396174 # ok 12 getpid() SVE VL 256/SME VL 32 SM+ZA
8309 22:23:51.396298 # ok 13 getpid() SVE VL 256/SME VL 32 SM
8310 22:23:51.396413 # ok 14 getpid() SVE VL 256/SME VL 32 ZA
8311 22:23:51.396529 # ok 15 getpid() SVE VL 256/SME VL 16 SM+ZA
8312 22:23:51.396666 # ok 16 getpid() SVE VL 256/SME VL 16 SM
8313 22:23:51.396786 # ok 17 getpid() SVE VL 256/SME VL 16 ZA
8314 22:23:51.396901 # ok 18 getpid() SVE VL 240
8315 22:23:51.397016 # ok 19 getpid() SVE VL 240/SME VL 256 SM+ZA
8316 22:23:51.397130 # ok 20 getpid() SVE VL 240/SME VL 256 SM
8317 22:23:51.397268 # ok 21 getpid() SVE VL 240/SME VL 256 ZA
8318 22:23:51.397422 # ok 22 getpid() SVE VL 240/SME VL 128 SM+ZA
8319 22:23:51.397567 # ok 23 getpid() SVE VL 240/SME VL 128 SM
8320 22:23:51.397718 # ok 24 getpid() SVE VL 240/SME VL 128 ZA
8321 22:23:51.397894 # ok 25 getpid() SVE VL 240/SME VL 64 SM+ZA
8322 22:23:51.398029 # ok 26 getpid() SVE VL 240/SME VL 64 SM
8323 22:23:51.398148 # ok 27 getpid() SVE VL 240/SME VL 64 ZA
8324 22:23:51.398264 # ok 28 getpid() SVE VL 240/SME VL 32 SM+ZA
8325 22:23:51.398379 # ok 29 getpid() SVE VL 240/SME VL 32 SM
8326 22:23:51.398519 # ok 30 getpid() SVE VL 240/SME VL 32 ZA
8327 22:23:51.398638 # ok 31 getpid() SVE VL 240/SME VL 16 SM+ZA
8328 22:23:51.398752 # ok 32 getpid() SVE VL 240/SME VL 16 SM
8329 22:23:51.398866 # ok 33 getpid() SVE VL 240/SME VL 16 ZA
8330 22:23:51.398979 # ok 34 getpid() SVE VL 224
8331 22:23:51.399119 # ok 35 getpid() SVE VL 224/SME VL 256 SM+ZA
8332 22:23:51.399239 # ok 36 getpid() SVE VL 224/SME VL 256 SM
8333 22:23:51.399353 # ok 37 getpid() SVE VL 224/SME VL 256 ZA
8334 22:23:51.399472 # ok 38 getpid() SVE VL 224/SME VL 128 SM+ZA
8335 22:23:51.403232 # ok 39 getpid() SVE VL 224/SME VL 128 SM
8336 22:23:51.403609 # ok 40 getpid() SVE VL 224/SME VL 128 ZA
8337 22:23:51.403764 # ok 41 getpid() SVE VL 224/SME VL 64 SM+ZA
8338 22:23:51.403924 # ok 42 getpid() SVE VL 224/SME VL 64 SM
8339 22:23:51.404085 # ok 43 getpid() SVE VL 224/SME VL 64 ZA
8340 22:23:51.404205 # ok 44 getpid() SVE VL 224/SME VL 32 SM+ZA
8341 22:23:51.404345 # ok 45 getpid() SVE VL 224/SME VL 32 SM
8342 22:23:51.404465 # ok 46 getpid() SVE VL 224/SME VL 32 ZA
8343 22:23:51.404580 # ok 47 getpid() SVE VL 224/SME VL 16 SM+ZA
8344 22:23:51.404694 # ok 48 getpid() SVE VL 224/SME VL 16 SM
8345 22:23:51.404830 # ok 49 getpid() SVE VL 224/SME VL 16 ZA
8346 22:23:51.404951 # ok 50 getpid() SVE VL 208
8347 22:23:51.405086 # ok 51 getpid() SVE VL 208/SME VL 256 SM+ZA
8348 22:23:51.405203 # ok 52 getpid() SVE VL 208/SME VL 256 SM
8349 22:23:51.405344 # ok 53 getpid() SVE VL 208/SME VL 256 ZA
8350 22:23:51.405553 # ok 54 getpid() SVE VL 208/SME VL 128 SM+ZA
8351 22:23:51.405745 # ok 55 getpid() SVE VL 208/SME VL 128 SM
8352 22:23:51.405868 # ok 56 getpid() SVE VL 208/SME VL 128 ZA
8353 22:23:51.405984 # ok 57 getpid() SVE VL 208/SME VL 64 SM+ZA
8354 22:23:51.406120 # ok 58 getpid() SVE VL 208/SME VL 64 SM
8355 22:23:51.406237 # ok 59 getpid() SVE VL 208/SME VL 64 ZA
8356 22:23:51.406351 # ok 60 getpid() SVE VL 208/SME VL 32 SM+ZA
8357 22:23:51.406464 # ok 61 getpid() SVE VL 208/SME VL 32 SM
8358 22:23:51.406601 # ok 62 getpid() SVE VL 208/SME VL 32 ZA
8359 22:23:51.406719 # ok 63 getpid() SVE VL 208/SME VL 16 SM+ZA
8360 22:23:51.406834 # ok 64 getpid() SVE VL 208/SME VL 16 SM
8361 22:23:51.406971 # ok 65 getpid() SVE VL 208/SME VL 16 ZA
8362 22:23:51.407093 # ok 66 getpid() SVE VL 192
8363 22:23:51.407206 # ok 67 getpid() SVE VL 192/SME VL 256 SM+ZA
8364 22:23:51.407320 # ok 68 getpid() SVE VL 192/SME VL 256 SM
8365 22:23:51.411257 # ok 69 getpid() SVE VL 192/SME VL 256 ZA
8366 22:23:51.411745 # ok 70 getpid() SVE VL 192/SME VL 128 SM+ZA
8367 22:23:51.411935 # ok 71 getpid() SVE VL 192/SME VL 128 SM
8368 22:23:51.412106 # ok 72 getpid() SVE VL 192/SME VL 128 ZA
8369 22:23:51.412295 # ok 73 getpid() SVE VL 192/SME VL 64 SM+ZA
8370 22:23:51.412469 # ok 74 getpid() SVE VL 192/SME VL 64 SM
8371 22:23:51.412597 # ok 75 getpid() SVE VL 192/SME VL 64 ZA
8372 22:23:51.412779 # ok 76 getpid() SVE VL 192/SME VL 32 SM+ZA
8373 22:23:51.412962 # ok 77 getpid() SVE VL 192/SME VL 32 SM
8374 22:23:51.413134 # ok 78 getpid() SVE VL 192/SME VL 32 ZA
8375 22:23:51.413313 # ok 79 getpid() SVE VL 192/SME VL 16 SM+ZA
8376 22:23:51.413489 # ok 80 getpid() SVE VL 192/SME VL 16 SM
8377 22:23:51.413672 # ok 81 getpid() SVE VL 192/SME VL 16 ZA
8378 22:23:51.413812 # ok 82 getpid() SVE VL 176
8379 22:23:51.413935 # ok 83 getpid() SVE VL 176/SME VL 256 SM+ZA
8380 22:23:51.414052 # ok 84 getpid() SVE VL 176/SME VL 256 SM
8381 22:23:51.414167 # ok 85 getpid() SVE VL 176/SME VL 256 ZA
8382 22:23:51.414310 # ok 86 getpid() SVE VL 176/SME VL 128 SM+ZA
8383 22:23:51.414432 # ok 87 getpid() SVE VL 176/SME VL 128 SM
8384 22:23:51.414548 # ok 88 getpid() SVE VL 176/SME VL 128 ZA
8385 22:23:51.414664 # ok 89 getpid() SVE VL 176/SME VL 64 SM+ZA
8386 22:23:51.414779 # ok 90 getpid() SVE VL 176/SME VL 64 SM
8387 22:23:51.414894 # ok 91 getpid() SVE VL 176/SME VL 64 ZA
8388 22:23:51.415008 # ok 92 getpid() SVE VL 176/SME VL 32 SM+ZA
8389 22:23:51.415125 # ok 93 getpid() SVE VL 176/SME VL 32 SM
8390 22:23:51.415264 # ok 94 getpid() SVE VL 176/SME VL 32 ZA
8391 22:23:51.415384 # ok 95 getpid() SVE VL 176/SME VL 16 SM+ZA
8392 22:23:51.415499 # ok 96 getpid() SVE VL 176/SME VL 16 SM
8393 22:23:51.415612 # ok 97 getpid() SVE VL 176/SME VL 16 ZA
8394 22:23:51.415726 # ok 98 getpid() SVE VL 160
8395 22:23:53.824562 # ok 99 getpid() SVE VL 160/SME VL 256 SM+ZA
8396 22:23:53.825117 # ok 100 getpid() SVE VL 160/SME VL 256 SM
8397 22:23:53.825324 # ok 101 getpid() SVE VL 160/SME VL 256 ZA
8398 22:23:53.825500 # ok 102 getpid() SVE VL 160/SME VL 128 SM+ZA
8399 22:23:53.825679 # ok 103 getpid() SVE VL 160/SME VL 128 SM
8400 22:23:53.825836 # ok 104 getpid() SVE VL 160/SME VL 128 ZA
8401 22:23:53.825971 # ok 105 getpid() SVE VL 160/SME VL 64 SM+ZA
8402 22:23:53.826205 # ok 106 getpid() SVE VL 160/SME VL 64 SM
8403 22:23:53.826382 # ok 107 getpid() SVE VL 160/SME VL 64 ZA
8404 22:23:53.826532 # ok 108 getpid() SVE VL 160/SME VL 32 SM+ZA
8405 22:23:53.826679 # ok 109 getpid() SVE VL 160/SME VL 32 SM
8406 22:23:53.826825 # ok 110 getpid() SVE VL 160/SME VL 32 ZA
8407 22:23:53.826970 # ok 111 getpid() SVE VL 160/SME VL 16 SM+ZA
8408 22:23:53.827098 # ok 112 getpid() SVE VL 160/SME VL 16 SM
8409 22:23:53.827213 # ok 113 getpid() SVE VL 160/SME VL 16 ZA
8410 22:23:53.827325 # ok 114 getpid() SVE VL 144
8411 22:23:53.827439 # ok 115 getpid() SVE VL 144/SME VL 256 SM+ZA
8412 22:23:53.827581 # ok 116 getpid() SVE VL 144/SME VL 256 SM
8413 22:23:53.827701 # ok 117 getpid() SVE VL 144/SME VL 256 ZA
8414 22:23:53.827823 # ok 118 getpid() SVE VL 144/SME VL 128 SM+ZA
8415 22:23:53.827939 # ok 119 getpid() SVE VL 144/SME VL 128 SM
8416 22:23:53.828053 # ok 120 getpid() SVE VL 144/SME VL 128 ZA
8417 22:23:53.828167 # ok 121 getpid() SVE VL 144/SME VL 64 SM+ZA
8418 22:23:53.828280 # ok 122 getpid() SVE VL 144/SME VL 64 SM
8419 22:23:53.828392 # ok 123 getpid() SVE VL 144/SME VL 64 ZA
8420 22:23:53.831346 # ok 124 getpid() SVE VL 144/SME VL 32 SM+ZA
8421 22:23:53.831797 # ok 125 getpid() SVE VL 144/SME VL 32 SM
8422 22:23:53.832005 # ok 126 getpid() SVE VL 144/SME VL 32 ZA
8423 22:23:53.832184 # ok 127 getpid() SVE VL 144/SME VL 16 SM+ZA
8424 22:23:53.832351 # ok 128 getpid() SVE VL 144/SME VL 16 SM
8425 22:23:53.832549 # ok 129 getpid() SVE VL 144/SME VL 16 ZA
8426 22:23:53.832723 # ok 130 getpid() SVE VL 128
8427 22:23:53.832861 # ok 131 getpid() SVE VL 128/SME VL 256 SM+ZA
8428 22:23:53.833000 # ok 132 getpid() SVE VL 128/SME VL 256 SM
8429 22:23:53.833139 # ok 133 getpid() SVE VL 128/SME VL 256 ZA
8430 22:23:53.833329 # ok 134 getpid() SVE VL 128/SME VL 128 SM+ZA
8431 22:23:53.833504 # ok 135 getpid() SVE VL 128/SME VL 128 SM
8432 22:23:53.833693 # ok 136 getpid() SVE VL 128/SME VL 128 ZA
8433 22:23:53.833859 # ok 137 getpid() SVE VL 128/SME VL 64 SM+ZA
8434 22:23:53.834053 # ok 138 getpid() SVE VL 128/SME VL 64 SM
8435 22:23:53.834205 # ok 139 getpid() SVE VL 128/SME VL 64 ZA
8436 22:23:53.834351 # ok 140 getpid() SVE VL 128/SME VL 32 SM+ZA
8437 22:23:53.834508 # ok 141 getpid() SVE VL 128/SME VL 32 SM
8438 22:23:53.834669 # ok 142 getpid() SVE VL 128/SME VL 32 ZA
8439 22:23:53.834826 # ok 143 getpid() SVE VL 128/SME VL 16 SM+ZA
8440 22:23:53.834979 # ok 144 getpid() SVE VL 128/SME VL 16 SM
8441 22:23:53.835117 # ok 145 getpid() SVE VL 128/SME VL 16 ZA
8442 22:23:53.835232 # ok 146 getpid() SVE VL 112
8443 22:23:53.835343 # ok 147 getpid() SVE VL 112/SME VL 256 SM+ZA
8444 22:23:53.835454 # ok 148 getpid() SVE VL 112/SME VL 256 SM
8445 22:23:53.835570 # ok 149 getpid() SVE VL 112/SME VL 256 ZA
8446 22:23:53.835681 # ok 150 getpid() SVE VL 112/SME VL 128 SM+ZA
8447 22:23:53.835793 # ok 151 getpid() SVE VL 112/SME VL 128 SM
8448 22:23:53.835933 # ok 152 getpid() SVE VL 112/SME VL 128 ZA
8449 22:23:53.836052 # ok 153 getpid() SVE VL 112/SME VL 64 SM+ZA
8450 22:23:53.836165 # ok 154 getpid() SVE VL 112/SME VL 64 SM
8451 22:23:53.836277 # ok 155 getpid() SVE VL 112/SME VL 64 ZA
8452 22:23:53.836389 # ok 156 getpid() SVE VL 112/SME VL 32 SM+ZA
8453 22:23:53.836502 # ok 157 getpid() SVE VL 112/SME VL 32 SM
8454 22:23:53.836617 # ok 158 getpid() SVE VL 112/SME VL 32 ZA
8455 22:23:53.836728 # ok 159 getpid() SVE VL 112/SME VL 16 SM+ZA
8456 22:23:53.836839 # ok 160 getpid() SVE VL 112/SME VL 16 SM
8457 22:23:53.836950 # ok 161 getpid() SVE VL 112/SME VL 16 ZA
8458 22:23:53.837062 # ok 162 getpid() SVE VL 96
8459 22:23:53.839279 # ok 163 getpid() SVE VL 96/SME VL 256 SM+ZA
8460 22:23:53.839721 # ok 164 getpid() SVE VL 96/SME VL 256 SM
8461 22:23:53.839908 # ok 165 getpid() SVE VL 96/SME VL 256 ZA
8462 22:23:53.840078 # ok 166 getpid() SVE VL 96/SME VL 128 SM+ZA
8463 22:23:53.840251 # ok 167 getpid() SVE VL 96/SME VL 128 SM
8464 22:23:53.840433 # ok 168 getpid() SVE VL 96/SME VL 128 ZA
8465 22:23:53.840615 # ok 169 getpid() SVE VL 96/SME VL 64 SM+ZA
8466 22:23:53.840788 # ok 170 getpid() SVE VL 96/SME VL 64 SM
8467 22:23:53.840933 # ok 171 getpid() SVE VL 96/SME VL 64 ZA
8468 22:23:53.841119 # ok 172 getpid() SVE VL 96/SME VL 32 SM+ZA
8469 22:23:53.841314 # ok 173 getpid() SVE VL 96/SME VL 32 SM
8470 22:23:53.841501 # ok 174 getpid() SVE VL 96/SME VL 32 ZA
8471 22:23:53.841670 # ok 175 getpid() SVE VL 96/SME VL 16 SM+ZA
8472 22:23:53.841868 # ok 176 getpid() SVE VL 96/SME VL 16 SM
8473 22:23:53.842013 # ok 177 getpid() SVE VL 96/SME VL 16 ZA
8474 22:23:53.842154 # ok 178 getpid() SVE VL 80
8475 22:23:53.842314 # ok 179 getpid() SVE VL 80/SME VL 256 SM+ZA
8476 22:23:53.842467 # ok 180 getpid() SVE VL 80/SME VL 256 SM
8477 22:23:53.842614 # ok 181 getpid() SVE VL 80/SME VL 256 ZA
8478 22:23:53.842755 # ok 182 getpid() SVE VL 80/SME VL 128 SM+ZA
8479 22:23:53.842898 # ok 183 getpid() SVE VL 80/SME VL 128 SM
8480 22:23:53.843038 # ok 184 getpid() SVE VL 80/SME VL 128 ZA
8481 22:23:53.843180 # ok 185 getpid() SVE VL 80/SME VL 64 SM+ZA
8482 22:23:53.843360 # ok 186 getpid() SVE VL 80/SME VL 64 SM
8483 22:23:53.843497 # ok 187 getpid() SVE VL 80/SME VL 64 ZA
8484 22:23:53.843640 # ok 188 getpid() SVE VL 80/SME VL 32 SM+ZA
8485 22:23:53.843784 # ok 189 getpid() SVE VL 80/SME VL 32 SM
8486 22:23:53.843927 # ok 190 getpid() SVE VL 80/SME VL 32 ZA
8487 22:23:53.844069 # ok 191 getpid() SVE VL 80/SME VL 16 SM+ZA
8488 22:23:53.844210 # ok 192 getpid() SVE VL 80/SME VL 16 SM
8489 22:23:53.844352 # ok 193 getpid() SVE VL 80/SME VL 16 ZA
8490 22:23:53.844493 # ok 194 getpid() SVE VL 64
8491 22:23:53.844636 # ok 195 getpid() SVE VL 64/SME VL 256 SM+ZA
8492 22:23:56.074879 # ok 196 getpid() SVE VL 64/SME VL 256 SM
8493 22:23:56.075191 # ok 197 getpid() SVE VL 64/SME VL 256 ZA
8494 22:23:56.075377 # ok 198 getpid() SVE VL 64/SME VL 128 SM+ZA
8495 22:23:56.075529 # ok 199 getpid() SVE VL 64/SME VL 128 SM
8496 22:23:56.075911 # ok 200 getpid() SVE VL 64/SME VL 128 ZA
8497 22:23:56.076077 # ok 201 getpid() SVE VL 64/SME VL 64 SM+ZA
8498 22:23:56.077812 # ok 202 getpid() SVE VL 64/SME VL 64 SM
8499 22:23:56.078286 # ok 203 getpid() SVE VL 64/SME VL 64 ZA
8500 22:23:56.078674 # ok 204 getpid() SVE VL 64/SME VL 32 SM+ZA
8501 22:23:56.078902 # ok 205 getpid() SVE VL 64/SME VL 32 SM
8502 22:23:56.079117 # ok 206 getpid() SVE VL 64/SME VL 32 ZA
8503 22:23:56.079254 # ok 207 getpid() SVE VL 64/SME VL 16 SM+ZA
8504 22:23:56.079416 # ok 208 getpid() SVE VL 64/SME VL 16 SM
8505 22:23:56.079547 # ok 209 getpid() SVE VL 64/SME VL 16 ZA
8506 22:23:56.079663 # ok 210 getpid() SVE VL 48
8507 22:23:56.079825 # ok 211 getpid() SVE VL 48/SME VL 256 SM+ZA
8508 22:23:56.080005 # ok 212 getpid() SVE VL 48/SME VL 256 SM
8509 22:23:56.080172 # ok 213 getpid() SVE VL 48/SME VL 256 ZA
8510 22:23:56.080338 # ok 214 getpid() SVE VL 48/SME VL 128 SM+ZA
8511 22:23:56.080534 # ok 215 getpid() SVE VL 48/SME VL 128 SM
8512 22:23:56.080696 # ok 216 getpid() SVE VL 48/SME VL 128 ZA
8513 22:23:56.080864 # ok 217 getpid() SVE VL 48/SME VL 64 SM+ZA
8514 22:23:56.081041 # ok 218 getpid() SVE VL 48/SME VL 64 SM
8515 22:23:56.081207 # ok 219 getpid() SVE VL 48/SME VL 64 ZA
8516 22:23:56.081376 # ok 220 getpid() SVE VL 48/SME VL 32 SM+ZA
8517 22:23:56.081532 # ok 221 getpid() SVE VL 48/SME VL 32 SM
8518 22:23:56.082383 # ok 222 getpid() SVE VL 48/SME VL 32 ZA
8519 22:23:56.082633 # ok 223 getpid() SVE VL 48/SME VL 16 SM+ZA
8520 22:23:56.082832 # ok 224 getpid() SVE VL 48/SME VL 16 SM
8521 22:23:56.083049 # ok 225 getpid() SVE VL 48/SME VL 16 ZA
8522 22:23:56.083202 # ok 226 getpid() SVE VL 32
8523 22:23:56.083321 # ok 227 getpid() SVE VL 32/SME VL 256 SM+ZA
8524 22:23:56.083437 # ok 228 getpid() SVE VL 32/SME VL 256 SM
8525 22:23:56.083552 # ok 229 getpid() SVE VL 32/SME VL 256 ZA
8526 22:23:56.083667 # ok 230 getpid() SVE VL 32/SME VL 128 SM+ZA
8527 22:23:56.083780 # ok 231 getpid() SVE VL 32/SME VL 128 SM
8528 22:23:56.083893 # ok 232 getpid() SVE VL 32/SME VL 128 ZA
8529 22:23:56.084006 # ok 233 getpid() SVE VL 32/SME VL 64 SM+ZA
8530 22:23:56.084151 # ok 234 getpid() SVE VL 32/SME VL 64 SM
8531 22:23:56.084285 # ok 235 getpid() SVE VL 32/SME VL 64 ZA
8532 22:23:56.084400 # ok 236 getpid() SVE VL 32/SME VL 32 SM+ZA
8533 22:23:56.084514 # ok 237 getpid() SVE VL 32/SME VL 32 SM
8534 22:23:56.084627 # ok 238 getpid() SVE VL 32/SME VL 32 ZA
8535 22:23:56.084740 # ok 239 getpid() SVE VL 32/SME VL 16 SM+ZA
8536 22:23:56.084854 # ok 240 getpid() SVE VL 32/SME VL 16 SM
8537 22:23:56.084968 # ok 241 getpid() SVE VL 32/SME VL 16 ZA
8538 22:23:56.085082 # ok 242 getpid() SVE VL 16
8539 22:23:56.085194 # ok 243 getpid() SVE VL 16/SME VL 256 SM+ZA
8540 22:23:56.085307 # ok 244 getpid() SVE VL 16/SME VL 256 SM
8541 22:23:56.085420 # ok 245 getpid() SVE VL 16/SME VL 256 ZA
8542 22:23:56.085562 # ok 246 getpid() SVE VL 16/SME VL 128 SM+ZA
8543 22:23:56.085740 # ok 247 getpid() SVE VL 16/SME VL 128 SM
8544 22:23:56.085950 # ok 248 getpid() SVE VL 16/SME VL 128 ZA
8545 22:23:56.086374 # ok 249 getpid() SVE VL 16/SME VL 64 SM+ZA
8546 22:23:56.086528 # ok 250 getpid() SVE VL 16/SME VL 64 SM
8547 22:23:56.086673 # ok 251 getpid() SVE VL 16/SME VL 64 ZA
8548 22:23:56.086815 # ok 252 getpid() SVE VL 16/SME VL 32 SM+ZA
8549 22:23:56.087743 # ok 253 getpid() SVE VL 16/SME VL 32 SM
8550 22:23:56.088212 # ok 254 getpid() SVE VL 16/SME VL 32 ZA
8551 22:23:56.088529 # ok 255 getpid() SVE VL 16/SME VL 16 SM+ZA
8552 22:23:56.088703 # ok 256 getpid() SVE VL 16/SME VL 16 SM
8553 22:23:56.088877 # ok 257 getpid() SVE VL 16/SME VL 16 ZA
8554 22:23:56.089070 # ok 258 sched_yield() FPSIMD
8555 22:23:56.089225 # ok 259 sched_yield() SVE VL 256
8556 22:23:56.089389 # ok 260 sched_yield() SVE VL 256/SME VL 256 SM+ZA
8557 22:23:56.089611 # ok 261 sched_yield() SVE VL 256/SME VL 256 SM
8558 22:23:56.089828 # ok 262 sched_yield() SVE VL 256/SME VL 256 ZA
8559 22:23:56.090040 # ok 263 sched_yield() SVE VL 256/SME VL 128 SM+ZA
8560 22:23:56.090254 # ok 264 sched_yield() SVE VL 256/SME VL 128 SM
8561 22:23:56.090438 # ok 265 sched_yield() SVE VL 256/SME VL 128 ZA
8562 22:23:56.090612 # ok 266 sched_yield() SVE VL 256/SME VL 64 SM+ZA
8563 22:23:56.090808 # ok 267 sched_yield() SVE VL 256/SME VL 64 SM
8564 22:23:56.090941 # ok 268 sched_yield() SVE VL 256/SME VL 64 ZA
8565 22:23:56.091058 # ok 269 sched_yield() SVE VL 256/SME VL 32 SM+ZA
8566 22:23:56.091209 # ok 270 sched_yield() SVE VL 256/SME VL 32 SM
8567 22:23:56.091333 # ok 271 sched_yield() SVE VL 256/SME VL 32 ZA
8568 22:23:56.091448 # ok 272 sched_yield() SVE VL 256/SME VL 16 SM+ZA
8569 22:23:56.091563 # ok 273 sched_yield() SVE VL 256/SME VL 16 SM
8570 22:23:56.091677 # ok 274 sched_yield() SVE VL 256/SME VL 16 ZA
8571 22:23:56.091791 # ok 275 sched_yield() SVE VL 240
8572 22:23:56.091905 # ok 276 sched_yield() SVE VL 240/SME VL 256 SM+ZA
8573 22:23:56.092019 # ok 277 sched_yield() SVE VL 240/SME VL 256 SM
8574 22:23:56.092134 # ok 278 sched_yield() SVE VL 240/SME VL 256 ZA
8575 22:23:56.092248 # ok 279 sched_yield() SVE VL 240/SME VL 128 SM+ZA
8576 22:23:56.092364 # ok 280 sched_yield() SVE VL 240/SME VL 128 SM
8577 22:23:56.092478 # ok 281 sched_yield() SVE VL 240/SME VL 128 ZA
8578 22:23:56.092590 # ok 282 sched_yield() SVE VL 240/SME VL 64 SM+ZA
8579 22:23:56.092704 # ok 283 sched_yield() SVE VL 240/SME VL 64 SM
8580 22:23:56.092818 # ok 284 sched_yield() SVE VL 240/SME VL 64 ZA
8581 22:23:56.092932 # ok 285 sched_yield() SVE VL 240/SME VL 32 SM+ZA
8582 22:23:56.093045 # ok 286 sched_yield() SVE VL 240/SME VL 32 SM
8583 22:23:56.093157 # ok 287 sched_yield() SVE VL 240/SME VL 32 ZA
8584 22:23:56.093272 # ok 288 sched_yield() SVE VL 240/SME VL 16 SM+ZA
8585 22:23:56.093386 # ok 289 sched_yield() SVE VL 240/SME VL 16 SM
8586 22:23:58.091443 # ok 290 sched_yield() SVE VL 240/SME VL 16 ZA
8587 22:23:58.093106 # ok 291 sched_yield() SVE VL 224
8588 22:23:58.093314 # ok 292 sched_yield() SVE VL 224/SME VL 256 SM+ZA
8589 22:23:58.093404 # ok 293 sched_yield() SVE VL 224/SME VL 256 SM
8590 22:23:58.093490 # ok 294 sched_yield() SVE VL 224/SME VL 256 ZA
8591 22:23:58.093573 # ok 295 sched_yield() SVE VL 224/SME VL 128 SM+ZA
8592 22:23:58.093664 # ok 296 sched_yield() SVE VL 224/SME VL 128 SM
8593 22:23:58.093755 # ok 297 sched_yield() SVE VL 224/SME VL 128 ZA
8594 22:23:58.093838 # ok 298 sched_yield() SVE VL 224/SME VL 64 SM+ZA
8595 22:23:58.093921 # ok 299 sched_yield() SVE VL 224/SME VL 64 SM
8596 22:23:58.094004 # ok 300 sched_yield() SVE VL 224/SME VL 64 ZA
8597 22:23:58.094086 # ok 301 sched_yield() SVE VL 224/SME VL 32 SM+ZA
8598 22:23:58.094169 # ok 302 sched_yield() SVE VL 224/SME VL 32 SM
8599 22:23:58.094252 # ok 303 sched_yield() SVE VL 224/SME VL 32 ZA
8600 22:23:58.094334 # ok 304 sched_yield() SVE VL 224/SME VL 16 SM+ZA
8601 22:23:58.094415 # ok 305 sched_yield() SVE VL 224/SME VL 16 SM
8602 22:23:58.094497 # ok 306 sched_yield() SVE VL 224/SME VL 16 ZA
8603 22:23:58.094579 # ok 307 sched_yield() SVE VL 208
8604 22:23:58.094664 # ok 308 sched_yield() SVE VL 208/SME VL 256 SM+ZA
8605 22:23:58.094748 # ok 309 sched_yield() SVE VL 208/SME VL 256 SM
8606 22:23:58.094854 # ok 310 sched_yield() SVE VL 208/SME VL 256 ZA
8607 22:23:58.094939 # ok 311 sched_yield() SVE VL 208/SME VL 128 SM+ZA
8608 22:23:58.095027 # ok 312 sched_yield() SVE VL 208/SME VL 128 SM
8609 22:23:58.095110 # ok 313 sched_yield() SVE VL 208/SME VL 128 ZA
8610 22:23:58.095192 # ok 314 sched_yield() SVE VL 208/SME VL 64 SM+ZA
8611 22:23:58.095274 # ok 315 sched_yield() SVE VL 208/SME VL 64 SM
8612 22:23:58.095356 # ok 316 sched_yield() SVE VL 208/SME VL 64 ZA
8613 22:23:58.095438 # ok 317 sched_yield() SVE VL 208/SME VL 32 SM+ZA
8614 22:23:58.095520 # ok 318 sched_yield() SVE VL 208/SME VL 32 SM
8615 22:23:58.095602 # ok 319 sched_yield() SVE VL 208/SME VL 32 ZA
8616 22:23:58.095689 # ok 320 sched_yield() SVE VL 208/SME VL 16 SM+ZA
8617 22:23:58.095773 # ok 321 sched_yield() SVE VL 208/SME VL 16 SM
8618 22:23:58.095855 # ok 322 sched_yield() SVE VL 208/SME VL 16 ZA
8619 22:23:58.095937 # ok 323 sched_yield() SVE VL 192
8620 22:23:58.096019 # ok 324 sched_yield() SVE VL 192/SME VL 256 SM+ZA
8621 22:23:58.096118 # ok 325 sched_yield() SVE VL 192/SME VL 256 SM
8622 22:23:58.103258 # ok 326 sched_yield() SVE VL 192/SME VL 256 ZA
8623 22:23:58.103589 # ok 327 sched_yield() SVE VL 192/SME VL 128 SM+ZA
8624 22:23:58.103695 # ok 328 sched_yield() SVE VL 192/SME VL 128 SM
8625 22:23:58.103783 # ok 329 sched_yield() SVE VL 192/SME VL 128 ZA
8626 22:23:58.103881 # ok 330 sched_yield() SVE VL 192/SME VL 64 SM+ZA
8627 22:23:58.103967 # ok 331 sched_yield() SVE VL 192/SME VL 64 SM
8628 22:23:58.104064 # ok 332 sched_yield() SVE VL 192/SME VL 64 ZA
8629 22:23:58.104408 # ok 333 sched_yield() SVE VL 192/SME VL 32 SM+ZA
8630 22:23:58.104689 # ok 334 sched_yield() SVE VL 192/SME VL 32 SM
8631 22:23:58.104799 # ok 335 sched_yield() SVE VL 192/SME VL 32 ZA
8632 22:23:58.104906 # ok 336 sched_yield() SVE VL 192/SME VL 16 SM+ZA
8633 22:23:58.104996 # ok 337 sched_yield() SVE VL 192/SME VL 16 SM
8634 22:23:58.105098 # ok 338 sched_yield() SVE VL 192/SME VL 16 ZA
8635 22:23:58.105198 # ok 339 sched_yield() SVE VL 176
8636 22:23:58.105521 # ok 340 sched_yield() SVE VL 176/SME VL 256 SM+ZA
8637 22:23:58.105645 # ok 341 sched_yield() SVE VL 176/SME VL 256 SM
8638 22:23:58.105761 # ok 342 sched_yield() SVE VL 176/SME VL 256 ZA
8639 22:23:58.105850 # ok 343 sched_yield() SVE VL 176/SME VL 128 SM+ZA
8640 22:23:58.105950 # ok 344 sched_yield() SVE VL 176/SME VL 128 SM
8641 22:23:58.106049 # ok 345 sched_yield() SVE VL 176/SME VL 128 ZA
8642 22:23:58.106150 # ok 346 sched_yield() SVE VL 176/SME VL 64 SM+ZA
8643 22:23:58.106251 # ok 347 sched_yield() SVE VL 176/SME VL 64 SM
8644 22:23:58.106549 # ok 348 sched_yield() SVE VL 176/SME VL 64 ZA
8645 22:23:58.106667 # ok 349 sched_yield() SVE VL 176/SME VL 32 SM+ZA
8646 22:23:58.106756 # ok 350 sched_yield() SVE VL 176/SME VL 32 SM
8647 22:23:58.106855 # ok 351 sched_yield() SVE VL 176/SME VL 32 ZA
8648 22:23:58.107165 # ok 352 sched_yield() SVE VL 176/SME VL 16 SM+ZA
8649 22:23:58.107270 # ok 353 sched_yield() SVE VL 176/SME VL 16 SM
8650 22:23:58.111503 # ok 354 sched_yield() SVE VL 176/SME VL 16 ZA
8651 22:23:58.111712 # ok 355 sched_yield() SVE VL 160
8652 22:23:58.111913 # ok 356 sched_yield() SVE VL 160/SME VL 256 SM+ZA
8653 22:23:58.112079 # ok 357 sched_yield() SVE VL 160/SME VL 256 SM
8654 22:23:58.112221 # ok 358 sched_yield() SVE VL 160/SME VL 256 ZA
8655 22:23:58.112346 # ok 359 sched_yield() SVE VL 160/SME VL 128 SM+ZA
8656 22:23:58.112531 # ok 360 sched_yield() SVE VL 160/SME VL 128 SM
8657 22:23:58.112688 # ok 361 sched_yield() SVE VL 160/SME VL 128 ZA
8658 22:23:58.112838 # ok 362 sched_yield() SVE VL 160/SME VL 64 SM+ZA
8659 22:23:58.112997 # ok 363 sched_yield() SVE VL 160/SME VL 64 SM
8660 22:23:58.113153 # ok 364 sched_yield() SVE VL 160/SME VL 64 ZA
8661 22:23:58.113309 # ok 365 sched_yield() SVE VL 160/SME VL 32 SM+ZA
8662 22:23:58.113486 # ok 366 sched_yield() SVE VL 160/SME VL 32 SM
8663 22:23:58.113619 # ok 367 sched_yield() SVE VL 160/SME VL 32 ZA
8664 22:23:58.113789 # ok 368 sched_yield() SVE VL 160/SME VL 16 SM+ZA
8665 22:23:58.113920 # ok 369 sched_yield() SVE VL 160/SME VL 16 SM
8666 22:23:58.114035 # ok 370 sched_yield() SVE VL 160/SME VL 16 ZA
8667 22:23:58.114148 # ok 371 sched_yield() SVE VL 144
8668 22:23:58.114259 # ok 372 sched_yield() SVE VL 144/SME VL 256 SM+ZA
8669 22:23:58.114373 # ok 373 sched_yield() SVE VL 144/SME VL 256 SM
8670 22:23:58.114487 # ok 374 sched_yield() SVE VL 144/SME VL 256 ZA
8671 22:23:58.114626 # ok 375 sched_yield() SVE VL 144/SME VL 128 SM+ZA
8672 22:23:58.114748 # ok 376 sched_yield() SVE VL 144/SME VL 128 SM
8673 22:24:00.138709 # ok 377 sched_yield() SVE VL 144/SME VL 128 ZA
8674 22:24:00.139251 # ok 378 sched_yield() SVE VL 144/SME VL 64 SM+ZA
8675 22:24:00.139413 # ok 379 sched_yield() SVE VL 144/SME VL 64 SM
8676 22:24:00.139543 # ok 380 sched_yield() SVE VL 144/SME VL 64 ZA
8677 22:24:00.140757 # ok 381 sched_yield() SVE VL 144/SME VL 32 SM+ZA
8678 22:24:00.141050 # ok 382 sched_yield() SVE VL 144/SME VL 32 SM
8679 22:24:00.141258 # ok 383 sched_yield() SVE VL 144/SME VL 32 ZA
8680 22:24:00.141500 # ok 384 sched_yield() SVE VL 144/SME VL 16 SM+ZA
8681 22:24:00.141710 # ok 385 sched_yield() SVE VL 144/SME VL 16 SM
8682 22:24:00.141915 # ok 386 sched_yield() SVE VL 144/SME VL 16 ZA
8683 22:24:00.142107 # ok 387 sched_yield() SVE VL 128
8684 22:24:00.142317 # ok 388 sched_yield() SVE VL 128/SME VL 256 SM+ZA
8685 22:24:00.142488 # ok 389 sched_yield() SVE VL 128/SME VL 256 SM
8686 22:24:00.142655 # ok 390 sched_yield() SVE VL 128/SME VL 256 ZA
8687 22:24:00.142817 # ok 391 sched_yield() SVE VL 128/SME VL 128 SM+ZA
8688 22:24:00.142975 # ok 392 sched_yield() SVE VL 128/SME VL 128 SM
8689 22:24:00.143098 # ok 393 sched_yield() SVE VL 128/SME VL 128 ZA
8690 22:24:00.143240 # ok 394 sched_yield() SVE VL 128/SME VL 64 SM+ZA
8691 22:24:00.143369 # ok 395 sched_yield() SVE VL 128/SME VL 64 SM
8692 22:24:00.143526 # ok 396 sched_yield() SVE VL 128/SME VL 64 ZA
8693 22:24:00.143687 # ok 397 sched_yield() SVE VL 128/SME VL 32 SM+ZA
8694 22:24:00.143848 # ok 398 sched_yield() SVE VL 128/SME VL 32 SM
8695 22:24:00.144009 # ok 399 sched_yield() SVE VL 128/SME VL 32 ZA
8696 22:24:00.144199 # ok 400 sched_yield() SVE VL 128/SME VL 16 SM+ZA
8697 22:24:00.144345 # ok 401 sched_yield() SVE VL 128/SME VL 16 SM
8698 22:24:00.144503 # ok 402 sched_yield() SVE VL 128/SME VL 16 ZA
8699 22:24:00.144664 # ok 403 sched_yield() SVE VL 112
8700 22:24:00.144821 # ok 404 sched_yield() SVE VL 112/SME VL 256 SM+ZA
8701 22:24:00.144977 # ok 405 sched_yield() SVE VL 112/SME VL 256 SM
8702 22:24:00.145135 # ok 406 sched_yield() SVE VL 112/SME VL 256 ZA
8703 22:24:00.145291 # ok 407 sched_yield() SVE VL 112/SME VL 128 SM+ZA
8704 22:24:00.145468 # ok 408 sched_yield() SVE VL 112/SME VL 128 SM
8705 22:24:00.145601 # ok 409 sched_yield() SVE VL 112/SME VL 128 ZA
8706 22:24:00.145810 # ok 410 sched_yield() SVE VL 112/SME VL 64 SM+ZA
8707 22:24:00.146004 # ok 411 sched_yield() SVE VL 112/SME VL 64 SM
8708 22:24:00.146185 # ok 412 sched_yield() SVE VL 112/SME VL 64 ZA
8709 22:24:00.146364 # ok 413 sched_yield() SVE VL 112/SME VL 32 SM+ZA
8710 22:24:00.146546 # ok 414 sched_yield() SVE VL 112/SME VL 32 SM
8711 22:24:00.146726 # ok 415 sched_yield() SVE VL 112/SME VL 32 ZA
8712 22:24:00.146871 # ok 416 sched_yield() SVE VL 112/SME VL 16 SM+ZA
8713 22:24:00.147042 # ok 417 sched_yield() SVE VL 112/SME VL 16 SM
8714 22:24:00.147220 # ok 418 sched_yield() SVE VL 112/SME VL 16 ZA
8715 22:24:00.147350 # ok 419 sched_yield() SVE VL 96
8716 22:24:00.147493 # ok 420 sched_yield() SVE VL 96/SME VL 256 SM+ZA
8717 22:24:00.147613 # ok 421 sched_yield() SVE VL 96/SME VL 256 SM
8718 22:24:00.147727 # ok 422 sched_yield() SVE VL 96/SME VL 256 ZA
8719 22:24:00.148052 # ok 423 sched_yield() SVE VL 96/SME VL 128 SM+ZA
8720 22:24:00.148176 # ok 424 sched_yield() SVE VL 96/SME VL 128 SM
8721 22:24:00.148289 # ok 425 sched_yield() SVE VL 96/SME VL 128 ZA
8722 22:24:00.148402 # ok 426 sched_yield() SVE VL 96/SME VL 64 SM+ZA
8723 22:24:00.148515 # ok 427 sched_yield() SVE VL 96/SME VL 64 SM
8724 22:24:00.148628 # ok 428 sched_yield() SVE VL 96/SME VL 64 ZA
8725 22:24:00.148739 # ok 429 sched_yield() SVE VL 96/SME VL 32 SM+ZA
8726 22:24:00.148850 # ok 430 sched_yield() SVE VL 96/SME VL 32 SM
8727 22:24:00.148961 # ok 431 sched_yield() SVE VL 96/SME VL 32 ZA
8728 22:24:00.149072 # ok 432 sched_yield() SVE VL 96/SME VL 16 SM+ZA
8729 22:24:00.155263 # ok 433 sched_yield() SVE VL 96/SME VL 16 SM
8730 22:24:00.155692 # ok 434 sched_yield() SVE VL 96/SME VL 16 ZA
8731 22:24:00.155860 # ok 435 sched_yield() SVE VL 80
8732 22:24:00.156025 # ok 436 sched_yield() SVE VL 80/SME VL 256 SM+ZA
8733 22:24:00.156177 # ok 437 sched_yield() SVE VL 80/SME VL 256 SM
8734 22:24:00.156379 # ok 438 sched_yield() SVE VL 80/SME VL 256 ZA
8735 22:24:00.156529 # ok 439 sched_yield() SVE VL 80/SME VL 128 SM+ZA
8736 22:24:00.156669 # ok 440 sched_yield() SVE VL 80/SME VL 128 SM
8737 22:24:00.156852 # ok 441 sched_yield() SVE VL 80/SME VL 128 ZA
8738 22:24:00.156983 # ok 442 sched_yield() SVE VL 80/SME VL 64 SM+ZA
8739 22:24:00.157107 # ok 443 sched_yield() SVE VL 80/SME VL 64 SM
8740 22:24:00.157232 # ok 444 sched_yield() SVE VL 80/SME VL 64 ZA
8741 22:24:00.157381 # ok 445 sched_yield() SVE VL 80/SME VL 32 SM+ZA
8742 22:24:00.157514 # ok 446 sched_yield() SVE VL 80/SME VL 32 SM
8743 22:24:00.157674 # ok 447 sched_yield() SVE VL 80/SME VL 32 ZA
8744 22:24:00.157834 # ok 448 sched_yield() SVE VL 80/SME VL 16 SM+ZA
8745 22:24:00.157993 # ok 449 sched_yield() SVE VL 80/SME VL 16 SM
8746 22:24:00.158125 # ok 450 sched_yield() SVE VL 80/SME VL 16 ZA
8747 22:24:00.158245 # ok 451 sched_yield() SVE VL 64
8748 22:24:00.158360 # ok 452 sched_yield() SVE VL 64/SME VL 256 SM+ZA
8749 22:24:00.158483 # ok 453 sched_yield() SVE VL 64/SME VL 256 SM
8750 22:24:00.158637 # ok 454 sched_yield() SVE VL 64/SME VL 256 ZA
8751 22:24:00.158760 # ok 455 sched_yield() SVE VL 64/SME VL 128 SM+ZA
8752 22:24:00.158875 # ok 456 sched_yield() SVE VL 64/SME VL 128 SM
8753 22:24:00.159037 # ok 457 sched_yield() SVE VL 64/SME VL 128 ZA
8754 22:24:00.159169 # ok 458 sched_yield() SVE VL 64/SME VL 64 SM+ZA
8755 22:24:00.159297 # ok 459 sched_yield() SVE VL 64/SME VL 64 SM
8756 22:24:00.159413 # ok 460 sched_yield() SVE VL 64/SME VL 64 ZA
8757 22:24:00.159530 # ok 461 sched_yield() SVE VL 64/SME VL 32 SM+ZA
8758 22:24:00.159646 # ok 462 sched_yield() SVE VL 64/SME VL 32 SM
8759 22:24:00.159761 # ok 463 sched_yield() SVE VL 64/SME VL 32 ZA
8760 22:24:00.798090 # ok 464 sched_yield() SVE VL 64/SME VL 16 SM+ZA
8761 22:24:00.798705 # ok 465 sched_yield() SVE VL 64/SME VL 16 SM
8762 22:24:00.798917 # ok 466 sched_yield() SVE VL 64/SME VL 16 ZA
8763 22:24:00.799086 # ok 467 sched_yield() SVE VL 48
8764 22:24:00.799251 # ok 468 sched_yield() SVE VL 48/SME VL 256 SM+ZA
8765 22:24:00.799413 # ok 469 sched_yield() SVE VL 48/SME VL 256 SM
8766 22:24:00.799649 # ok 470 sched_yield() SVE VL 48/SME VL 256 ZA
8767 22:24:00.799831 # ok 471 sched_yield() SVE VL 48/SME VL 128 SM+ZA
8768 22:24:00.800026 # ok 472 sched_yield() SVE VL 48/SME VL 128 SM
8769 22:24:00.800200 # ok 473 sched_yield() SVE VL 48/SME VL 128 ZA
8770 22:24:00.800363 # ok 474 sched_yield() SVE VL 48/SME VL 64 SM+ZA
8771 22:24:00.800532 # ok 475 sched_yield() SVE VL 48/SME VL 64 SM
8772 22:24:00.800708 # ok 476 sched_yield() SVE VL 48/SME VL 64 ZA
8773 22:24:00.800895 # ok 477 sched_yield() SVE VL 48/SME VL 32 SM+ZA
8774 22:24:00.801040 # ok 478 sched_yield() SVE VL 48/SME VL 32 SM
8775 22:24:00.801184 # ok 479 sched_yield() SVE VL 48/SME VL 32 ZA
8776 22:24:00.801371 # ok 480 sched_yield() SVE VL 48/SME VL 16 SM+ZA
8777 22:24:00.801509 # ok 481 sched_yield() SVE VL 48/SME VL 16 SM
8778 22:24:00.801730 # ok 482 sched_yield() SVE VL 48/SME VL 16 ZA
8779 22:24:00.801933 # ok 483 sched_yield() SVE VL 32
8780 22:24:00.802113 # ok 484 sched_yield() SVE VL 32/SME VL 256 SM+ZA
8781 22:24:00.802322 # ok 485 sched_yield() SVE VL 32/SME VL 256 SM
8782 22:24:00.802506 # ok 486 sched_yield() SVE VL 32/SME VL 256 ZA
8783 22:24:00.802695 # ok 487 sched_yield() SVE VL 32/SME VL 128 SM+ZA
8784 22:24:00.802913 # ok 488 sched_yield() SVE VL 32/SME VL 128 SM
8785 22:24:00.803118 # ok 489 sched_yield() SVE VL 32/SME VL 128 ZA
8786 22:24:00.803321 # ok 490 sched_yield() SVE VL 32/SME VL 64 SM+ZA
8787 22:24:00.803539 # ok 491 sched_yield() SVE VL 32/SME VL 64 SM
8788 22:24:00.803692 # ok 492 sched_yield() SVE VL 32/SME VL 64 ZA
8789 22:24:00.803815 # ok 493 sched_yield() SVE VL 32/SME VL 32 SM+ZA
8790 22:24:00.803934 # ok 494 sched_yield() SVE VL 32/SME VL 32 SM
8791 22:24:00.804084 # ok 495 sched_yield() SVE VL 32/SME VL 32 ZA
8792 22:24:00.804210 # ok 496 sched_yield() SVE VL 32/SME VL 16 SM+ZA
8793 22:24:00.804328 # ok 497 sched_yield() SVE VL 32/SME VL 16 SM
8794 22:24:00.804448 # ok 498 sched_yield() SVE VL 32/SME VL 16 ZA
8795 22:24:00.804567 # ok 499 sched_yield() SVE VL 16
8796 22:24:00.804683 # ok 500 sched_yield() SVE VL 16/SME VL 256 SM+ZA
8797 22:24:00.804800 # ok 501 sched_yield() SVE VL 16/SME VL 256 SM
8798 22:24:00.804917 # ok 502 sched_yield() SVE VL 16/SME VL 256 ZA
8799 22:24:00.805035 # ok 503 sched_yield() SVE VL 16/SME VL 128 SM+ZA
8800 22:24:00.805154 # ok 504 sched_yield() SVE VL 16/SME VL 128 SM
8801 22:24:00.805272 # ok 505 sched_yield() SVE VL 16/SME VL 128 ZA
8802 22:24:00.805618 # ok 506 sched_yield() SVE VL 16/SME VL 64 SM+ZA
8803 22:24:00.805787 # ok 507 sched_yield() SVE VL 16/SME VL 64 SM
8804 22:24:00.805910 # ok 508 sched_yield() SVE VL 16/SME VL 64 ZA
8805 22:24:00.806029 # ok 509 sched_yield() SVE VL 16/SME VL 32 SM+ZA
8806 22:24:00.806145 # ok 510 sched_yield() SVE VL 16/SME VL 32 SM
8807 22:24:00.806264 # ok 511 sched_yield() SVE VL 16/SME VL 32 ZA
8808 22:24:00.806381 # ok 512 sched_yield() SVE VL 16/SME VL 16 SM+ZA
8809 22:24:00.806498 # ok 513 sched_yield() SVE VL 16/SME VL 16 SM
8810 22:24:00.806615 # ok 514 sched_yield() SVE VL 16/SME VL 16 ZA
8811 22:24:00.806732 # # Totals: pass:514 fail:0 xfail:0 xpass:0 skip:0 error:0
8812 22:24:00.812225 ok 47 selftests: arm64: syscall-abi
8813 22:24:00.858047 # selftests: arm64: tpidr2
8814 22:24:01.016366 # TAP version 13
8815 22:24:01.016705 # 1..5
8816 22:24:01.016887 # # PID: 4736
8817 22:24:01.017291 # ok 1 default_value
8818 22:24:01.017452 # ok 2 write_read
8819 22:24:01.017579 # ok 3 write_sleep_read
8820 22:24:01.017713 # ok 4 write_fork_read
8821 22:24:01.017833 # ok 5 write_clone_read
8822 22:24:01.017951 # # Totals: pass:5 fail:0 xfail:0 xpass:0 skip:0 error:0
8823 22:24:01.027939 ok 48 selftests: arm64: tpidr2
8824 22:24:01.506926 arm64_tags_test pass
8825 22:24:01.507180 arm64_run_tags_test_sh pass
8826 22:24:01.507491 arm64_fake_sigreturn_bad_magic pass
8827 22:24:01.507599 arm64_fake_sigreturn_bad_size pass
8828 22:24:01.507687 arm64_fake_sigreturn_bad_size_for_magic0 pass
8829 22:24:01.507776 arm64_fake_sigreturn_duplicated_fpsimd pass
8830 22:24:01.507880 arm64_fake_sigreturn_misaligned_sp pass
8831 22:24:01.507969 arm64_fake_sigreturn_missing_fpsimd pass
8832 22:24:01.508053 arm64_fake_sigreturn_sme_change_vl pass
8833 22:24:01.508143 arm64_fake_sigreturn_sve_change_vl pass
8834 22:24:01.508246 arm64_mangle_pstate_invalid_compat_toggle pass
8835 22:24:01.508333 arm64_mangle_pstate_invalid_daif_bits pass
8836 22:24:01.508418 arm64_mangle_pstate_invalid_mode_el1h pass
8837 22:24:01.508519 arm64_mangle_pstate_invalid_mode_el1t pass
8838 22:24:01.508606 arm64_mangle_pstate_invalid_mode_el2h pass
8839 22:24:01.508690 arm64_mangle_pstate_invalid_mode_el2t pass
8840 22:24:01.508791 arm64_mangle_pstate_invalid_mode_el3h pass
8841 22:24:01.508879 arm64_mangle_pstate_invalid_mode_el3t pass
8842 22:24:01.508979 arm64_sme_trap_no_sm pass
8843 22:24:01.509067 arm64_sme_trap_non_streaming skip
8844 22:24:01.509155 arm64_sme_trap_za pass
8845 22:24:01.509255 arm64_sme_vl pass
8846 22:24:01.509342 arm64_ssve_regs pass
8847 22:24:01.509426 arm64_sve_regs pass
8848 22:24:01.509509 arm64_sve_vl pass
8849 22:24:01.509594 arm64_za_no_regs pass
8850 22:24:01.509687 arm64_za_regs pass
8851 22:24:01.509789 arm64_pac_global_corrupt_pac pass
8852 22:24:01.509878 arm64_pac_global_pac_instructions_not_nop pass
8853 22:24:01.509965 arm64_pac_global_pac_instructions_not_nop_generic pass
8854 22:24:01.510049 arm64_pac_global_single_thread_different_keys pass
8855 22:24:01.510147 arm64_pac_global_exec_changed_keys pass
8856 22:24:01.510231 arm64_pac_global_context_switch_keep_keys pass
8857 22:24:01.510314 arm64_pac_global_context_switch_keep_keys_generic pass
8858 22:24:01.510418 arm64_pac pass
8859 22:24:01.510503 arm64_fp-stress_FPSIMD-0-0 pass
8860 22:24:01.510586 arm64_fp-stress_SVE-VL-256-0 pass
8861 22:24:01.510668 arm64_fp-stress_SVE-VL-240-0 pass
8862 22:24:01.510766 arm64_fp-stress_SVE-VL-224-0 pass
8863 22:24:01.510851 arm64_fp-stress_SVE-VL-208-0 pass
8864 22:24:01.510933 arm64_fp-stress_SVE-VL-192-0 pass
8865 22:24:01.511016 arm64_fp-stress_SVE-VL-176-0 pass
8866 22:24:01.511113 arm64_fp-stress_SVE-VL-160-0 pass
8867 22:24:01.511197 arm64_fp-stress_SVE-VL-144-0 pass
8868 22:24:01.511280 arm64_fp-stress_SVE-VL-128-0 pass
8869 22:24:01.515250 arm64_fp-stress_SVE-VL-112-0 pass
8870 22:24:01.515726 arm64_fp-stress_SVE-VL-96-0 pass
8871 22:24:01.515920 arm64_fp-stress_SVE-VL-80-0 pass
8872 22:24:01.516094 arm64_fp-stress_SVE-VL-64-0 pass
8873 22:24:01.516252 arm64_fp-stress_SVE-VL-48-0 pass
8874 22:24:01.516410 arm64_fp-stress_SVE-VL-32-0 pass
8875 22:24:01.516579 arm64_fp-stress_SVE-VL-16-0 pass
8876 22:24:01.516776 arm64_fp-stress_SSVE-VL-256-0 pass
8877 22:24:01.516932 arm64_fp-stress_ZA-VL-256-0 pass
8878 22:24:01.517053 arm64_fp-stress_SSVE-VL-128-0 pass
8879 22:24:01.517189 arm64_fp-stress_ZA-VL-128-0 pass
8880 22:24:01.517349 arm64_fp-stress_SSVE-VL-64-0 pass
8881 22:24:01.517507 arm64_fp-stress_ZA-VL-64-0 pass
8882 22:24:01.517672 arm64_fp-stress_SSVE-VL-32-0 pass
8883 22:24:01.517824 arm64_fp-stress_ZA-VL-32-0 pass
8884 22:24:01.517995 arm64_fp-stress_SSVE-VL-16-0 pass
8885 22:24:01.518155 arm64_fp-stress_ZA-VL-16-0 pass
8886 22:24:01.518329 arm64_fp-stress pass
8887 22:24:01.518493 arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 pass
8888 22:24:01.518697 arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state pass
8889 22:24:01.518875 arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set pass
8890 22:24:01.519028 arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared pass
8891 22:24:01.519150 arm64_sve-ptrace_Set_SVE_VL_16 pass
8892 22:24:01.519267 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 pass
8893 22:24:01.519384 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 pass
8894 22:24:01.519500 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 pass
8895 22:24:01.519618 arm64_sve-ptrace_Set_SVE_VL_32 pass
8896 22:24:01.519733 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 pass
8897 22:24:01.519850 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 pass
8898 22:24:01.519964 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 pass
8899 22:24:01.520079 arm64_sve-ptrace_Set_SVE_VL_48 pass
8900 22:24:01.520194 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 pass
8901 22:24:01.520309 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 pass
8902 22:24:01.520452 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 pass
8903 22:24:01.520574 arm64_sve-ptrace_Set_SVE_VL_64 pass
8904 22:24:01.520692 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 pass
8905 22:24:01.523416 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 pass
8906 22:24:01.523545 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 pass
8907 22:24:01.523646 arm64_sve-ptrace_Set_SVE_VL_80 pass
8908 22:24:01.523750 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 pass
8909 22:24:01.523852 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 pass
8910 22:24:01.524142 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 pass
8911 22:24:01.524235 arm64_sve-ptrace_Set_SVE_VL_96 pass
8912 22:24:01.524334 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 pass
8913 22:24:01.524621 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 pass
8914 22:24:01.524726 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 pass
8915 22:24:01.524827 arm64_sve-ptrace_Set_SVE_VL_112 pass
8916 22:24:01.525116 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 pass
8917 22:24:01.525222 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 pass
8918 22:24:01.525508 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 pass
8919 22:24:01.525600 arm64_sve-ptrace_Set_SVE_VL_128 pass
8920 22:24:01.525707 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 pass
8921 22:24:01.525985 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 pass
8922 22:24:01.526099 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 pass
8923 22:24:01.526214 arm64_sve-ptrace_Set_SVE_VL_144 pass
8924 22:24:01.526301 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 pass
8925 22:24:01.526400 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 pass
8926 22:24:01.526501 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 pass
8927 22:24:01.526610 arm64_sve-ptrace_Set_SVE_VL_160 pass
8928 22:24:01.526712 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 pass
8929 22:24:01.526998 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 pass
8930 22:24:01.527102 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 pass
8931 22:24:01.531201 arm64_sve-ptrace_Set_SVE_VL_176 pass
8932 22:24:01.531633 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 pass
8933 22:24:01.531810 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 pass
8934 22:24:01.531987 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 pass
8935 22:24:01.532146 arm64_sve-ptrace_Set_SVE_VL_192 pass
8936 22:24:01.532375 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 pass
8937 22:24:01.532584 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 pass
8938 22:24:01.532803 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 pass
8939 22:24:01.532983 arm64_sve-ptrace_Set_SVE_VL_208 pass
8940 22:24:01.533148 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 pass
8941 22:24:01.533324 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 pass
8942 22:24:01.533496 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 pass
8943 22:24:01.533661 arm64_sve-ptrace_Set_SVE_VL_224 pass
8944 22:24:01.533912 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 pass
8945 22:24:01.534087 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 pass
8946 22:24:01.534231 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 pass
8947 22:24:01.534372 arm64_sve-ptrace_Set_SVE_VL_240 pass
8948 22:24:01.534512 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 pass
8949 22:24:01.535838 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 pass
8950 22:24:01.535985 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 pass
8951 22:24:01.536133 arm64_sve-ptrace_Set_SVE_VL_256 pass
8952 22:24:01.536276 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 pass
8953 22:24:01.536417 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 pass
8954 22:24:01.536558 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 pass
8955 22:24:01.536699 arm64_sve-ptrace_Set_SVE_VL_272 pass
8956 22:24:01.536840 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 skip
8957 22:24:01.536981 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 skip
8958 22:24:01.537122 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 skip
8959 22:24:01.537267 arm64_sve-ptrace_Set_SVE_VL_288 pass
8960 22:24:01.537408 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 skip
8961 22:24:01.537548 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 skip
8962 22:24:01.539396 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 skip
8963 22:24:01.539581 arm64_sve-ptrace_Set_SVE_VL_304 pass
8964 22:24:01.539838 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 skip
8965 22:24:01.540007 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 skip
8966 22:24:01.540170 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 skip
8967 22:24:01.540369 arm64_sve-ptrace_Set_SVE_VL_320 pass
8968 22:24:01.540531 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 skip
8969 22:24:01.540677 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 skip
8970 22:24:01.540819 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 skip
8971 22:24:01.540963 arm64_sve-ptrace_Set_SVE_VL_336 pass
8972 22:24:01.541140 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 skip
8973 22:24:01.541304 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 skip
8974 22:24:01.541449 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 skip
8975 22:24:01.541612 arm64_sve-ptrace_Set_SVE_VL_352 pass
8976 22:24:01.541791 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 skip
8977 22:24:01.541955 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 skip
8978 22:24:01.542137 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 skip
8979 22:24:01.542306 arm64_sve-ptrace_Set_SVE_VL_368 pass
8980 22:24:01.542477 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 skip
8981 22:24:01.542626 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 skip
8982 22:24:01.542768 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 skip
8983 22:24:01.542925 arm64_sve-ptrace_Set_SVE_VL_384 pass
8984 22:24:01.543065 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 skip
8985 22:24:01.543182 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 skip
8986 22:24:01.543295 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 skip
8987 22:24:01.543432 arm64_sve-ptrace_Set_SVE_VL_400 pass
8988 22:24:01.543551 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 skip
8989 22:24:01.543714 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 skip
8990 22:24:01.543845 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 skip
8991 22:24:01.543958 arm64_sve-ptrace_Set_SVE_VL_416 pass
8992 22:24:01.544071 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 skip
8993 22:24:01.544186 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 skip
8994 22:24:01.544298 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 skip
8995 22:24:01.547160 arm64_sve-ptrace_Set_SVE_VL_432 pass
8996 22:24:01.547508 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 skip
8997 22:24:01.547657 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 skip
8998 22:24:01.547816 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 skip
8999 22:24:01.547937 arm64_sve-ptrace_Set_SVE_VL_448 pass
9000 22:24:01.548035 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 skip
9001 22:24:01.548132 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 skip
9002 22:24:01.557245 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 skip
9003 22:24:01.557580 arm64_sve-ptrace_Set_SVE_VL_464 pass
9004 22:24:01.557731 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 skip
9005 22:24:01.557885 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 skip
9006 22:24:01.558013 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 skip
9007 22:24:01.558147 arm64_sve-ptrace_Set_SVE_VL_480 pass
9008 22:24:01.558256 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 skip
9009 22:24:01.558386 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 skip
9010 22:24:01.558493 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 skip
9011 22:24:01.558593 arm64_sve-ptrace_Set_SVE_VL_496 pass
9012 22:24:01.558693 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 skip
9013 22:24:01.558801 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 skip
9014 22:24:01.558911 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 skip
9015 22:24:01.559018 arm64_sve-ptrace_Set_SVE_VL_512 pass
9016 22:24:01.559100 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 skip
9017 22:24:01.559195 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 skip
9018 22:24:01.559312 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 skip
9019 22:24:01.559387 arm64_sve-ptrace_Set_SVE_VL_528 pass
9020 22:24:01.559451 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 skip
9021 22:24:01.559529 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 skip
9022 22:24:01.559651 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 skip
9023 22:24:01.559760 arm64_sve-ptrace_Set_SVE_VL_544 pass
9024 22:24:01.559877 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 skip
9025 22:24:01.559973 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 skip
9026 22:24:01.560064 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 skip
9027 22:24:01.560172 arm64_sve-ptrace_Set_SVE_VL_560 pass
9028 22:24:01.560267 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 skip
9029 22:24:01.560381 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 skip
9030 22:24:01.560486 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 skip
9031 22:24:01.560592 arm64_sve-ptrace_Set_SVE_VL_576 pass
9032 22:24:01.560673 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 skip
9033 22:24:01.560769 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 skip
9034 22:24:01.560886 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 skip
9035 22:24:01.560991 arm64_sve-ptrace_Set_SVE_VL_592 pass
9036 22:24:01.561457 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 skip
9037 22:24:01.561571 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 skip
9038 22:24:01.561670 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 skip
9039 22:24:01.561775 arm64_sve-ptrace_Set_SVE_VL_608 pass
9040 22:24:01.561881 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 skip
9041 22:24:01.561963 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 skip
9042 22:24:01.562045 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 skip
9043 22:24:01.562148 arm64_sve-ptrace_Set_SVE_VL_624 pass
9044 22:24:01.562239 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 skip
9045 22:24:01.562321 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 skip
9046 22:24:01.562404 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 skip
9047 22:24:01.562489 arm64_sve-ptrace_Set_SVE_VL_640 pass
9048 22:24:01.562564 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 skip
9049 22:24:01.562651 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 skip
9050 22:24:01.562750 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 skip
9051 22:24:01.562840 arm64_sve-ptrace_Set_SVE_VL_656 pass
9052 22:24:01.562955 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 skip
9053 22:24:01.563056 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 skip
9054 22:24:01.567206 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 skip
9055 22:24:01.567477 arm64_sve-ptrace_Set_SVE_VL_672 pass
9056 22:24:01.567579 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 skip
9057 22:24:01.567885 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 skip
9058 22:24:01.568006 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 skip
9059 22:24:01.568102 arm64_sve-ptrace_Set_SVE_VL_688 pass
9060 22:24:01.568197 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 skip
9061 22:24:01.568289 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 skip
9062 22:24:01.568365 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 skip
9063 22:24:01.568461 arm64_sve-ptrace_Set_SVE_VL_704 pass
9064 22:24:01.568560 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 skip
9065 22:24:01.568682 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 skip
9066 22:24:01.568783 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 skip
9067 22:24:01.568874 arm64_sve-ptrace_Set_SVE_VL_720 pass
9068 22:24:01.568977 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 skip
9069 22:24:01.569058 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 skip
9070 22:24:01.569150 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 skip
9071 22:24:01.569257 arm64_sve-ptrace_Set_SVE_VL_736 pass
9072 22:24:01.569340 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 skip
9073 22:24:01.569444 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 skip
9074 22:24:01.569549 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 skip
9075 22:24:01.569632 arm64_sve-ptrace_Set_SVE_VL_752 pass
9076 22:24:01.569756 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 skip
9077 22:24:01.569864 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 skip
9078 22:24:01.570147 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 skip
9079 22:24:01.570241 arm64_sve-ptrace_Set_SVE_VL_768 pass
9080 22:24:01.570344 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 skip
9081 22:24:01.570459 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 skip
9082 22:24:01.570556 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 skip
9083 22:24:01.570674 arm64_sve-ptrace_Set_SVE_VL_784 pass
9084 22:24:01.570776 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 skip
9085 22:24:01.570889 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 skip
9086 22:24:01.570974 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 skip
9087 22:24:01.571058 arm64_sve-ptrace_Set_SVE_VL_800 pass
9088 22:24:01.575183 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 skip
9089 22:24:01.575557 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 skip
9090 22:24:01.575681 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 skip
9091 22:24:01.575785 arm64_sve-ptrace_Set_SVE_VL_816 pass
9092 22:24:01.575935 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 skip
9093 22:24:01.576065 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 skip
9094 22:24:01.576190 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 skip
9095 22:24:01.576288 arm64_sve-ptrace_Set_SVE_VL_832 pass
9096 22:24:01.576393 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 skip
9097 22:24:01.576467 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 skip
9098 22:24:01.576547 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 skip
9099 22:24:01.576639 arm64_sve-ptrace_Set_SVE_VL_848 pass
9100 22:24:01.576721 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 skip
9101 22:24:01.576820 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 skip
9102 22:24:01.576898 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 skip
9103 22:24:01.576988 arm64_sve-ptrace_Set_SVE_VL_864 pass
9104 22:24:01.577052 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 skip
9105 22:24:01.577341 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 skip
9106 22:24:01.577447 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 skip
9107 22:24:01.577534 arm64_sve-ptrace_Set_SVE_VL_880 pass
9108 22:24:01.577621 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 skip
9109 22:24:01.577731 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 skip
9110 22:24:01.577818 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 skip
9111 22:24:01.577901 arm64_sve-ptrace_Set_SVE_VL_896 pass
9112 22:24:01.577999 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 skip
9113 22:24:01.578085 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 skip
9114 22:24:01.578182 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 skip
9115 22:24:01.578271 arm64_sve-ptrace_Set_SVE_VL_912 pass
9116 22:24:01.578368 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 skip
9117 22:24:01.578467 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 skip
9118 22:24:01.578566 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 skip
9119 22:24:01.578665 arm64_sve-ptrace_Set_SVE_VL_928 pass
9120 22:24:01.578978 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 skip
9121 22:24:01.579084 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 skip
9122 22:24:01.583170 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 skip
9123 22:24:01.583474 arm64_sve-ptrace_Set_SVE_VL_944 pass
9124 22:24:01.583583 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 skip
9125 22:24:01.583690 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 skip
9126 22:24:01.583782 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 skip
9127 22:24:01.583883 arm64_sve-ptrace_Set_SVE_VL_960 pass
9128 22:24:01.583971 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 skip
9129 22:24:01.584072 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 skip
9130 22:24:01.584158 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 skip
9131 22:24:01.584263 arm64_sve-ptrace_Set_SVE_VL_976 pass
9132 22:24:01.584363 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 skip
9133 22:24:01.584473 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 skip
9134 22:24:01.584780 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 skip
9135 22:24:01.584875 arm64_sve-ptrace_Set_SVE_VL_992 pass
9136 22:24:01.584977 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 skip
9137 22:24:01.585063 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 skip
9138 22:24:01.585160 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 skip
9139 22:24:01.585258 arm64_sve-ptrace_Set_SVE_VL_1008 pass
9140 22:24:01.585357 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 skip
9141 22:24:01.585456 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 skip
9142 22:24:01.585553 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 skip
9143 22:24:01.585845 arm64_sve-ptrace_Set_SVE_VL_1024 pass
9144 22:24:01.585937 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 skip
9145 22:24:01.586214 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 skip
9146 22:24:01.586305 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 skip
9147 22:24:01.586390 arm64_sve-ptrace_Set_SVE_VL_1040 pass
9148 22:24:01.586489 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 skip
9149 22:24:01.586576 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 skip
9150 22:24:01.586674 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 skip
9151 22:24:01.586761 arm64_sve-ptrace_Set_SVE_VL_1056 pass
9152 22:24:01.586860 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 skip
9153 22:24:01.586961 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 skip
9154 22:24:01.587059 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 skip
9155 22:24:01.591182 arm64_sve-ptrace_Set_SVE_VL_1072 pass
9156 22:24:01.591513 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 skip
9157 22:24:01.591616 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 skip
9158 22:24:01.591708 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 skip
9159 22:24:01.591987 arm64_sve-ptrace_Set_SVE_VL_1088 pass
9160 22:24:01.592080 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 skip
9161 22:24:01.592165 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 skip
9162 22:24:01.592269 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 skip
9163 22:24:01.592355 arm64_sve-ptrace_Set_SVE_VL_1104 pass
9164 22:24:01.604995 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 skip
9165 22:24:01.605214 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 skip
9166 22:24:01.605508 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 skip
9167 22:24:01.605612 arm64_sve-ptrace_Set_SVE_VL_1120 pass
9168 22:24:01.605702 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 skip
9169 22:24:01.605794 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 skip
9170 22:24:01.605866 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 skip
9171 22:24:01.605947 arm64_sve-ptrace_Set_SVE_VL_1136 pass
9172 22:24:01.606018 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 skip
9173 22:24:01.606280 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 skip
9174 22:24:01.606368 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 skip
9175 22:24:01.606460 arm64_sve-ptrace_Set_SVE_VL_1152 pass
9176 22:24:01.606728 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 skip
9177 22:24:01.606808 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 skip
9178 22:24:01.606888 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 skip
9179 22:24:01.606971 arm64_sve-ptrace_Set_SVE_VL_1168 pass
9180 22:24:01.607233 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 skip
9181 22:24:01.607325 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 skip
9182 22:24:01.607418 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 skip
9183 22:24:01.607498 arm64_sve-ptrace_Set_SVE_VL_1184 pass
9184 22:24:01.607779 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 skip
9185 22:24:01.607868 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 skip
9186 22:24:01.608117 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 skip
9187 22:24:01.608183 arm64_sve-ptrace_Set_SVE_VL_1200 pass
9188 22:24:01.608256 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 skip
9189 22:24:01.608507 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 skip
9190 22:24:01.608583 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 skip
9191 22:24:01.608656 arm64_sve-ptrace_Set_SVE_VL_1216 pass
9192 22:24:01.608728 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 skip
9193 22:24:01.608974 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 skip
9194 22:24:01.609243 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 skip
9195 22:24:01.609322 arm64_sve-ptrace_Set_SVE_VL_1232 pass
9196 22:24:01.609399 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 skip
9197 22:24:01.609507 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 skip
9198 22:24:01.609622 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 skip
9199 22:24:01.609714 arm64_sve-ptrace_Set_SVE_VL_1248 pass
9200 22:24:01.609813 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 skip
9201 22:24:01.609896 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 skip
9202 22:24:01.610179 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 skip
9203 22:24:01.610282 arm64_sve-ptrace_Set_SVE_VL_1264 pass
9204 22:24:01.610375 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 skip
9205 22:24:01.610454 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 skip
9206 22:24:01.610539 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 skip
9207 22:24:01.610626 arm64_sve-ptrace_Set_SVE_VL_1280 pass
9208 22:24:01.610915 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 skip
9209 22:24:01.611035 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 skip
9210 22:24:01.615154 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 skip
9211 22:24:01.615476 arm64_sve-ptrace_Set_SVE_VL_1296 pass
9212 22:24:01.615606 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 skip
9213 22:24:01.615757 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 skip
9214 22:24:01.615880 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 skip
9215 22:24:01.616015 arm64_sve-ptrace_Set_SVE_VL_1312 pass
9216 22:24:01.616122 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 skip
9217 22:24:01.616279 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 skip
9218 22:24:01.616389 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 skip
9219 22:24:01.616502 arm64_sve-ptrace_Set_SVE_VL_1328 pass
9220 22:24:01.616605 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 skip
9221 22:24:01.616711 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 skip
9222 22:24:01.616796 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 skip
9223 22:24:01.616894 arm64_sve-ptrace_Set_SVE_VL_1344 pass
9224 22:24:01.616963 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 skip
9225 22:24:01.617053 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 skip
9226 22:24:01.617343 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 skip
9227 22:24:01.617448 arm64_sve-ptrace_Set_SVE_VL_1360 pass
9228 22:24:01.617547 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 skip
9229 22:24:01.617651 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 skip
9230 22:24:01.617751 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 skip
9231 22:24:01.617849 arm64_sve-ptrace_Set_SVE_VL_1376 pass
9232 22:24:01.617947 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 skip
9233 22:24:01.618044 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 skip
9234 22:24:01.618338 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 skip
9235 22:24:01.618443 arm64_sve-ptrace_Set_SVE_VL_1392 pass
9236 22:24:01.618541 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 skip
9237 22:24:01.618639 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 skip
9238 22:24:01.618736 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 skip
9239 22:24:01.618832 arm64_sve-ptrace_Set_SVE_VL_1408 pass
9240 22:24:01.618928 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 skip
9241 22:24:01.623262 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 skip
9242 22:24:01.623377 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 skip
9243 22:24:01.623695 arm64_sve-ptrace_Set_SVE_VL_1424 pass
9244 22:24:01.623895 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 skip
9245 22:24:01.624069 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 skip
9246 22:24:01.624280 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 skip
9247 22:24:01.624448 arm64_sve-ptrace_Set_SVE_VL_1440 pass
9248 22:24:01.624614 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 skip
9249 22:24:01.624794 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 skip
9250 22:24:01.624952 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 skip
9251 22:24:01.625130 arm64_sve-ptrace_Set_SVE_VL_1456 pass
9252 22:24:01.625286 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 skip
9253 22:24:01.625439 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 skip
9254 22:24:01.625583 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 skip
9255 22:24:01.625756 arm64_sve-ptrace_Set_SVE_VL_1472 pass
9256 22:24:01.625894 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 skip
9257 22:24:01.626041 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 skip
9258 22:24:01.626234 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 skip
9259 22:24:01.626403 arm64_sve-ptrace_Set_SVE_VL_1488 pass
9260 22:24:01.626596 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 skip
9261 22:24:01.626806 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 skip
9262 22:24:01.626979 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 skip
9263 22:24:01.627134 arm64_sve-ptrace_Set_SVE_VL_1504 pass
9264 22:24:01.627254 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 skip
9265 22:24:01.627369 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 skip
9266 22:24:01.627510 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 skip
9267 22:24:01.627633 arm64_sve-ptrace_Set_SVE_VL_1520 pass
9268 22:24:01.627749 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 skip
9269 22:24:01.627864 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 skip
9270 22:24:01.627978 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 skip
9271 22:24:01.628092 arm64_sve-ptrace_Set_SVE_VL_1536 pass
9272 22:24:01.628206 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 skip
9273 22:24:01.631447 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 skip
9274 22:24:01.631667 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 skip
9275 22:24:01.631898 arm64_sve-ptrace_Set_SVE_VL_1552 pass
9276 22:24:01.632065 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 skip
9277 22:24:01.632209 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 skip
9278 22:24:01.632362 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 skip
9279 22:24:01.632533 arm64_sve-ptrace_Set_SVE_VL_1568 pass
9280 22:24:01.632673 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 skip
9281 22:24:01.632821 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 skip
9282 22:24:01.632986 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 skip
9283 22:24:01.633203 arm64_sve-ptrace_Set_SVE_VL_1584 pass
9284 22:24:01.633469 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 skip
9285 22:24:01.633701 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 skip
9286 22:24:01.633909 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 skip
9287 22:24:01.634082 arm64_sve-ptrace_Set_SVE_VL_1600 pass
9288 22:24:01.634239 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 skip
9289 22:24:01.634425 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 skip
9290 22:24:01.634621 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 skip
9291 22:24:01.634788 arm64_sve-ptrace_Set_SVE_VL_1616 pass
9292 22:24:01.634954 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 skip
9293 22:24:01.635125 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 skip
9294 22:24:01.635249 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 skip
9295 22:24:01.635367 arm64_sve-ptrace_Set_SVE_VL_1632 pass
9296 22:24:01.635481 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 skip
9297 22:24:01.635592 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 skip
9298 22:24:01.635729 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 skip
9299 22:24:01.635850 arm64_sve-ptrace_Set_SVE_VL_1648 pass
9300 22:24:01.639332 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 skip
9301 22:24:01.639660 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 skip
9302 22:24:01.639806 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 skip
9303 22:24:01.639957 arm64_sve-ptrace_Set_SVE_VL_1664 pass
9304 22:24:01.640079 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 skip
9305 22:24:01.640223 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 skip
9306 22:24:01.640327 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 skip
9307 22:24:01.640424 arm64_sve-ptrace_Set_SVE_VL_1680 pass
9308 22:24:01.640510 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 skip
9309 22:24:01.640777 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 skip
9310 22:24:01.640871 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 skip
9311 22:24:01.640971 arm64_sve-ptrace_Set_SVE_VL_1696 pass
9312 22:24:01.641228 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 skip
9313 22:24:01.641496 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 skip
9314 22:24:01.641570 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 skip
9315 22:24:01.641680 arm64_sve-ptrace_Set_SVE_VL_1712 pass
9316 22:24:01.641781 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 skip
9317 22:24:01.642067 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 skip
9318 22:24:01.642175 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 skip
9319 22:24:01.642255 arm64_sve-ptrace_Set_SVE_VL_1728 pass
9320 22:24:01.642353 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 skip
9321 22:24:01.642450 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 skip
9322 22:24:01.642745 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 skip
9323 22:24:01.642839 arm64_sve-ptrace_Set_SVE_VL_1744 pass
9324 22:24:01.664001 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 skip
9325 22:24:01.664255 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 skip
9326 22:24:01.664338 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 skip
9327 22:24:01.664567 arm64_sve-ptrace_Set_SVE_VL_1760 pass
9328 22:24:01.664750 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 skip
9329 22:24:01.664941 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 skip
9330 22:24:01.665097 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 skip
9331 22:24:01.665265 arm64_sve-ptrace_Set_SVE_VL_1776 pass
9332 22:24:01.665499 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 skip
9333 22:24:01.665700 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 skip
9334 22:24:01.665872 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 skip
9335 22:24:01.666102 arm64_sve-ptrace_Set_SVE_VL_1792 pass
9336 22:24:01.666284 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 skip
9337 22:24:01.666454 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 skip
9338 22:24:01.666618 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 skip
9339 22:24:01.666780 arm64_sve-ptrace_Set_SVE_VL_1808 pass
9340 22:24:01.666968 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 skip
9341 22:24:01.667131 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 skip
9342 22:24:01.667250 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 skip
9343 22:24:01.667361 arm64_sve-ptrace_Set_SVE_VL_1824 pass
9344 22:24:01.667495 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 skip
9345 22:24:01.667611 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 skip
9346 22:24:01.671268 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 skip
9347 22:24:01.671692 arm64_sve-ptrace_Set_SVE_VL_1840 pass
9348 22:24:01.671888 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 skip
9349 22:24:01.672085 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 skip
9350 22:24:01.672311 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 skip
9351 22:24:01.672498 arm64_sve-ptrace_Set_SVE_VL_1856 pass
9352 22:24:01.672702 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 skip
9353 22:24:01.672889 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 skip
9354 22:24:01.673136 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 skip
9355 22:24:01.673317 arm64_sve-ptrace_Set_SVE_VL_1872 pass
9356 22:24:01.673501 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 skip
9357 22:24:01.673676 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 skip
9358 22:24:01.673831 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 skip
9359 22:24:01.673993 arm64_sve-ptrace_Set_SVE_VL_1888 pass
9360 22:24:01.674193 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 skip
9361 22:24:01.674366 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 skip
9362 22:24:01.674530 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 skip
9363 22:24:01.674690 arm64_sve-ptrace_Set_SVE_VL_1904 pass
9364 22:24:01.674846 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 skip
9365 22:24:01.675001 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 skip
9366 22:24:01.675145 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 skip
9367 22:24:01.675290 arm64_sve-ptrace_Set_SVE_VL_1920 pass
9368 22:24:01.675410 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 skip
9369 22:24:01.675526 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 skip
9370 22:24:01.675641 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 skip
9371 22:24:01.675755 arm64_sve-ptrace_Set_SVE_VL_1936 pass
9372 22:24:01.675870 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 skip
9373 22:24:01.679272 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 skip
9374 22:24:01.679665 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 skip
9375 22:24:01.679861 arm64_sve-ptrace_Set_SVE_VL_1952 pass
9376 22:24:01.680074 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 skip
9377 22:24:01.680326 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 skip
9378 22:24:01.680512 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 skip
9379 22:24:01.680661 arm64_sve-ptrace_Set_SVE_VL_1968 pass
9380 22:24:01.680827 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 skip
9381 22:24:01.681020 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 skip
9382 22:24:01.681177 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 skip
9383 22:24:01.681338 arm64_sve-ptrace_Set_SVE_VL_1984 pass
9384 22:24:01.681495 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 skip
9385 22:24:01.681673 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 skip
9386 22:24:01.681873 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 skip
9387 22:24:01.682036 arm64_sve-ptrace_Set_SVE_VL_2000 pass
9388 22:24:01.682190 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 skip
9389 22:24:01.682351 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 skip
9390 22:24:01.682515 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 skip
9391 22:24:01.682707 arm64_sve-ptrace_Set_SVE_VL_2016 pass
9392 22:24:01.682889 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 skip
9393 22:24:01.683076 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 skip
9394 22:24:01.683208 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 skip
9395 22:24:01.683326 arm64_sve-ptrace_Set_SVE_VL_2032 pass
9396 22:24:01.683443 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 skip
9397 22:24:01.683583 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 skip
9398 22:24:01.683706 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 skip
9399 22:24:01.687329 arm64_sve-ptrace_Set_SVE_VL_2048 pass
9400 22:24:01.687793 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 skip
9401 22:24:01.687977 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 skip
9402 22:24:01.688191 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 skip
9403 22:24:01.688400 arm64_sve-ptrace_Set_SVE_VL_2064 pass
9404 22:24:01.688572 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 skip
9405 22:24:01.688727 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 skip
9406 22:24:01.688963 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 skip
9407 22:24:01.689151 arm64_sve-ptrace_Set_SVE_VL_2080 pass
9408 22:24:01.689302 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 skip
9409 22:24:01.689456 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 skip
9410 22:24:01.689636 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 skip
9411 22:24:01.689848 arm64_sve-ptrace_Set_SVE_VL_2096 pass
9412 22:24:01.690012 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 skip
9413 22:24:01.690164 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 skip
9414 22:24:01.690317 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 skip
9415 22:24:01.690510 arm64_sve-ptrace_Set_SVE_VL_2112 pass
9416 22:24:01.690680 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 skip
9417 22:24:01.690868 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 skip
9418 22:24:01.691018 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 skip
9419 22:24:01.691138 arm64_sve-ptrace_Set_SVE_VL_2128 pass
9420 22:24:01.691254 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 skip
9421 22:24:01.691368 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 skip
9422 22:24:01.691485 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 skip
9423 22:24:01.691600 arm64_sve-ptrace_Set_SVE_VL_2144 pass
9424 22:24:01.691715 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 skip
9425 22:24:01.695389 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 skip
9426 22:24:01.695823 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 skip
9427 22:24:01.696027 arm64_sve-ptrace_Set_SVE_VL_2160 pass
9428 22:24:01.696255 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 skip
9429 22:24:01.696436 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 skip
9430 22:24:01.696676 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 skip
9431 22:24:01.696867 arm64_sve-ptrace_Set_SVE_VL_2176 pass
9432 22:24:01.697033 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 skip
9433 22:24:01.697233 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 skip
9434 22:24:01.697435 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 skip
9435 22:24:01.697639 arm64_sve-ptrace_Set_SVE_VL_2192 pass
9436 22:24:01.697897 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 skip
9437 22:24:01.698110 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 skip
9438 22:24:01.698312 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 skip
9439 22:24:01.698507 arm64_sve-ptrace_Set_SVE_VL_2208 pass
9440 22:24:01.698668 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 skip
9441 22:24:01.698820 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 skip
9442 22:24:01.698987 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 skip
9443 22:24:01.699112 arm64_sve-ptrace_Set_SVE_VL_2224 pass
9444 22:24:01.699227 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 skip
9445 22:24:01.699341 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 skip
9446 22:24:01.703204 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 skip
9447 22:24:01.703515 arm64_sve-ptrace_Set_SVE_VL_2240 pass
9448 22:24:01.703623 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 skip
9449 22:24:01.703714 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 skip
9450 22:24:01.703815 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 skip
9451 22:24:01.703902 arm64_sve-ptrace_Set_SVE_VL_2256 pass
9452 22:24:01.704000 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 skip
9453 22:24:01.704087 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 skip
9454 22:24:01.704187 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 skip
9455 22:24:01.704276 arm64_sve-ptrace_Set_SVE_VL_2272 pass
9456 22:24:01.704372 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 skip
9457 22:24:01.704472 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 skip
9458 22:24:01.704569 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 skip
9459 22:24:01.704665 arm64_sve-ptrace_Set_SVE_VL_2288 pass
9460 22:24:01.704959 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 skip
9461 22:24:01.705077 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 skip
9462 22:24:01.705418 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 skip
9463 22:24:01.705607 arm64_sve-ptrace_Set_SVE_VL_2304 pass
9464 22:24:01.705828 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 skip
9465 22:24:01.706046 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 skip
9466 22:24:01.706206 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 skip
9467 22:24:01.706391 arm64_sve-ptrace_Set_SVE_VL_2320 pass
9468 22:24:01.706571 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 skip
9469 22:24:01.706708 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 skip
9470 22:24:01.706865 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 skip
9471 22:24:01.707011 arm64_sve-ptrace_Set_SVE_VL_2336 pass
9472 22:24:01.707136 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 skip
9473 22:24:01.707251 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 skip
9474 22:24:01.707365 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 skip
9475 22:24:01.707478 arm64_sve-ptrace_Set_SVE_VL_2352 pass
9476 22:24:01.707616 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 skip
9477 22:24:01.707797 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 skip
9478 22:24:01.711222 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 skip
9479 22:24:01.711452 arm64_sve-ptrace_Set_SVE_VL_2368 pass
9480 22:24:01.711871 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 skip
9481 22:24:01.712051 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 skip
9482 22:24:01.712184 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 skip
9483 22:24:01.712302 arm64_sve-ptrace_Set_SVE_VL_2384 pass
9484 22:24:01.723759 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 skip
9485 22:24:01.724229 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 skip
9486 22:24:01.724435 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 skip
9487 22:24:01.724601 arm64_sve-ptrace_Set_SVE_VL_2400 pass
9488 22:24:01.724746 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 skip
9489 22:24:01.724916 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 skip
9490 22:24:01.725070 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 skip
9491 22:24:01.725220 arm64_sve-ptrace_Set_SVE_VL_2416 pass
9492 22:24:01.725412 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 skip
9493 22:24:01.725607 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 skip
9494 22:24:01.725822 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 skip
9495 22:24:01.725983 arm64_sve-ptrace_Set_SVE_VL_2432 pass
9496 22:24:01.726139 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 skip
9497 22:24:01.726318 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 skip
9498 22:24:01.726534 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 skip
9499 22:24:01.726713 arm64_sve-ptrace_Set_SVE_VL_2448 pass
9500 22:24:01.726870 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 skip
9501 22:24:01.727053 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 skip
9502 22:24:01.727226 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 skip
9503 22:24:01.727356 arm64_sve-ptrace_Set_SVE_VL_2464 pass
9504 22:24:01.727471 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 skip
9505 22:24:01.727590 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 skip
9506 22:24:01.727757 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 skip
9507 22:24:01.727878 arm64_sve-ptrace_Set_SVE_VL_2480 pass
9508 22:24:01.727991 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 skip
9509 22:24:01.728104 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 skip
9510 22:24:01.728242 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 skip
9511 22:24:01.728364 arm64_sve-ptrace_Set_SVE_VL_2496 pass
9512 22:24:01.731257 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 skip
9513 22:24:01.731715 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 skip
9514 22:24:01.731916 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 skip
9515 22:24:01.732111 arm64_sve-ptrace_Set_SVE_VL_2512 pass
9516 22:24:01.732308 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 skip
9517 22:24:01.732542 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 skip
9518 22:24:01.732744 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 skip
9519 22:24:01.732941 arm64_sve-ptrace_Set_SVE_VL_2528 pass
9520 22:24:01.733090 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 skip
9521 22:24:01.733216 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 skip
9522 22:24:01.733376 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 skip
9523 22:24:01.733537 arm64_sve-ptrace_Set_SVE_VL_2544 pass
9524 22:24:01.733784 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 skip
9525 22:24:01.733978 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 skip
9526 22:24:01.734181 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 skip
9527 22:24:01.734356 arm64_sve-ptrace_Set_SVE_VL_2560 pass
9528 22:24:01.734521 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 skip
9529 22:24:01.734722 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 skip
9530 22:24:01.734967 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 skip
9531 22:24:01.735140 arm64_sve-ptrace_Set_SVE_VL_2576 pass
9532 22:24:01.735327 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 skip
9533 22:24:01.735465 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 skip
9534 22:24:01.735609 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 skip
9535 22:24:01.735751 arm64_sve-ptrace_Set_SVE_VL_2592 pass
9536 22:24:01.735892 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 skip
9537 22:24:01.736033 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 skip
9538 22:24:01.736173 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 skip
9539 22:24:01.736312 arm64_sve-ptrace_Set_SVE_VL_2608 pass
9540 22:24:01.736452 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 skip
9541 22:24:01.736597 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 skip
9542 22:24:01.739167 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 skip
9543 22:24:01.739531 arm64_sve-ptrace_Set_SVE_VL_2624 pass
9544 22:24:01.739703 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 skip
9545 22:24:01.739906 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 skip
9546 22:24:01.740260 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 skip
9547 22:24:01.740395 arm64_sve-ptrace_Set_SVE_VL_2640 pass
9548 22:24:01.740539 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 skip
9549 22:24:01.740683 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 skip
9550 22:24:01.740848 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 skip
9551 22:24:01.741055 arm64_sve-ptrace_Set_SVE_VL_2656 pass
9552 22:24:01.741193 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 skip
9553 22:24:01.741334 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 skip
9554 22:24:01.741475 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 skip
9555 22:24:01.741616 arm64_sve-ptrace_Set_SVE_VL_2672 pass
9556 22:24:01.741771 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 skip
9557 22:24:01.741948 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 skip
9558 22:24:01.742083 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 skip
9559 22:24:01.742224 arm64_sve-ptrace_Set_SVE_VL_2688 pass
9560 22:24:01.742365 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 skip
9561 22:24:01.742506 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 skip
9562 22:24:01.742647 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 skip
9563 22:24:01.742844 arm64_sve-ptrace_Set_SVE_VL_2704 pass
9564 22:24:01.743063 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 skip
9565 22:24:01.743202 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 skip
9566 22:24:01.743320 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 skip
9567 22:24:01.743434 arm64_sve-ptrace_Set_SVE_VL_2720 pass
9568 22:24:01.743549 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 skip
9569 22:24:01.743664 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 skip
9570 22:24:01.743779 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 skip
9571 22:24:01.743895 arm64_sve-ptrace_Set_SVE_VL_2736 pass
9572 22:24:01.747419 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 skip
9573 22:24:01.747546 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 skip
9574 22:24:01.747656 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 skip
9575 22:24:01.747744 arm64_sve-ptrace_Set_SVE_VL_2752 pass
9576 22:24:01.748061 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 skip
9577 22:24:01.748164 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 skip
9578 22:24:01.748264 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 skip
9579 22:24:01.748349 arm64_sve-ptrace_Set_SVE_VL_2768 pass
9580 22:24:01.748431 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 skip
9581 22:24:01.748530 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 skip
9582 22:24:01.748616 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 skip
9583 22:24:01.748713 arm64_sve-ptrace_Set_SVE_VL_2784 pass
9584 22:24:01.748797 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 skip
9585 22:24:01.748892 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 skip
9586 22:24:01.748976 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 skip
9587 22:24:01.749072 arm64_sve-ptrace_Set_SVE_VL_2800 pass
9588 22:24:01.749156 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 skip
9589 22:24:01.749252 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 skip
9590 22:24:01.749337 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 skip
9591 22:24:01.749433 arm64_sve-ptrace_Set_SVE_VL_2816 pass
9592 22:24:01.749517 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 skip
9593 22:24:01.753704 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 skip
9594 22:24:01.753806 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 skip
9595 22:24:01.753891 arm64_sve-ptrace_Set_SVE_VL_2832 pass
9596 22:24:01.753973 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 skip
9597 22:24:01.754055 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 skip
9598 22:24:01.754137 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 skip
9599 22:24:01.754219 arm64_sve-ptrace_Set_SVE_VL_2848 pass
9600 22:24:01.754300 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 skip
9601 22:24:01.754381 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 skip
9602 22:24:01.754462 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 skip
9603 22:24:01.754545 arm64_sve-ptrace_Set_SVE_VL_2864 pass
9604 22:24:01.754631 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 skip
9605 22:24:01.754712 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 skip
9606 22:24:01.755277 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 skip
9607 22:24:01.755474 arm64_sve-ptrace_Set_SVE_VL_2880 pass
9608 22:24:01.755998 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 skip
9609 22:24:01.756191 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 skip
9610 22:24:01.756357 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 skip
9611 22:24:01.756671 arm64_sve-ptrace_Set_SVE_VL_2896 pass
9612 22:24:01.756846 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 skip
9613 22:24:01.757011 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 skip
9614 22:24:01.757216 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 skip
9615 22:24:01.757383 arm64_sve-ptrace_Set_SVE_VL_2912 pass
9616 22:24:01.757543 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 skip
9617 22:24:01.757720 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 skip
9618 22:24:01.757887 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 skip
9619 22:24:01.758051 arm64_sve-ptrace_Set_SVE_VL_2928 pass
9620 22:24:01.758216 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 skip
9621 22:24:01.758378 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 skip
9622 22:24:01.758537 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 skip
9623 22:24:01.758697 arm64_sve-ptrace_Set_SVE_VL_2944 pass
9624 22:24:01.758853 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 skip
9625 22:24:01.759043 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 skip
9626 22:24:01.759170 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 skip
9627 22:24:01.759285 arm64_sve-ptrace_Set_SVE_VL_2960 pass
9628 22:24:01.759400 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 skip
9629 22:24:01.759514 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 skip
9630 22:24:01.759639 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 skip
9631 22:24:01.759777 arm64_sve-ptrace_Set_SVE_VL_2976 pass
9632 22:24:01.759923 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 skip
9633 22:24:01.760043 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 skip
9634 22:24:01.760159 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 skip
9635 22:24:01.760318 arm64_sve-ptrace_Set_SVE_VL_2992 pass
9636 22:24:01.760467 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 skip
9637 22:24:01.760585 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 skip
9638 22:24:01.760700 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 skip
9639 22:24:01.760815 arm64_sve-ptrace_Set_SVE_VL_3008 pass
9640 22:24:01.763303 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 skip
9641 22:24:01.763708 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 skip
9642 22:24:01.763842 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 skip
9643 22:24:01.763964 arm64_sve-ptrace_Set_SVE_VL_3024 pass
9644 22:24:01.775703 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 skip
9645 22:24:01.776196 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 skip
9646 22:24:01.776305 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 skip
9647 22:24:01.776391 arm64_sve-ptrace_Set_SVE_VL_3040 pass
9648 22:24:01.776491 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 skip
9649 22:24:01.776578 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 skip
9650 22:24:01.776661 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 skip
9651 22:24:01.776758 arm64_sve-ptrace_Set_SVE_VL_3056 pass
9652 22:24:01.776843 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 skip
9653 22:24:01.776940 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 skip
9654 22:24:01.777038 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 skip
9655 22:24:01.777136 arm64_sve-ptrace_Set_SVE_VL_3072 pass
9656 22:24:01.777436 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 skip
9657 22:24:01.777537 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 skip
9658 22:24:01.777660 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 skip
9659 22:24:01.777761 arm64_sve-ptrace_Set_SVE_VL_3088 pass
9660 22:24:01.778045 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 skip
9661 22:24:01.778136 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 skip
9662 22:24:01.778233 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 skip
9663 22:24:01.778317 arm64_sve-ptrace_Set_SVE_VL_3104 pass
9664 22:24:01.778420 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 skip
9665 22:24:01.778518 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 skip
9666 22:24:01.778807 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 skip
9667 22:24:01.778909 arm64_sve-ptrace_Set_SVE_VL_3120 pass
9668 22:24:01.779006 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 skip
9669 22:24:01.783223 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 skip
9670 22:24:01.783489 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 skip
9671 22:24:01.783602 arm64_sve-ptrace_Set_SVE_VL_3136 pass
9672 22:24:01.783711 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 skip
9673 22:24:01.783808 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 skip
9674 22:24:01.783927 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 skip
9675 22:24:01.784014 arm64_sve-ptrace_Set_SVE_VL_3152 pass
9676 22:24:01.784129 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 skip
9677 22:24:01.784229 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 skip
9678 22:24:01.784337 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 skip
9679 22:24:01.784417 arm64_sve-ptrace_Set_SVE_VL_3168 pass
9680 22:24:01.784522 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 skip
9681 22:24:01.784860 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 skip
9682 22:24:01.784957 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 skip
9683 22:24:01.785039 arm64_sve-ptrace_Set_SVE_VL_3184 pass
9684 22:24:01.785134 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 skip
9685 22:24:01.785218 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 skip
9686 22:24:01.785501 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 skip
9687 22:24:01.785601 arm64_sve-ptrace_Set_SVE_VL_3200 pass
9688 22:24:01.785691 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 skip
9689 22:24:01.785787 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 skip
9690 22:24:01.785870 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 skip
9691 22:24:01.785949 arm64_sve-ptrace_Set_SVE_VL_3216 pass
9692 22:24:01.786036 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 skip
9693 22:24:01.786110 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 skip
9694 22:24:01.786194 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 skip
9695 22:24:01.786520 arm64_sve-ptrace_Set_SVE_VL_3232 pass
9696 22:24:01.786724 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 skip
9697 22:24:01.786953 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 skip
9698 22:24:01.787111 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 skip
9699 22:24:01.787240 arm64_sve-ptrace_Set_SVE_VL_3248 pass
9700 22:24:01.787378 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 skip
9701 22:24:01.791226 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 skip
9702 22:24:01.791559 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 skip
9703 22:24:01.791656 arm64_sve-ptrace_Set_SVE_VL_3264 pass
9704 22:24:01.791727 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 skip
9705 22:24:01.791808 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 skip
9706 22:24:01.792108 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 skip
9707 22:24:01.792206 arm64_sve-ptrace_Set_SVE_VL_3280 pass
9708 22:24:01.792306 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 skip
9709 22:24:01.792387 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 skip
9710 22:24:01.792466 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 skip
9711 22:24:01.792746 arm64_sve-ptrace_Set_SVE_VL_3296 pass
9712 22:24:01.792840 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 skip
9713 22:24:01.792940 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 skip
9714 22:24:01.793021 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 skip
9715 22:24:01.793116 arm64_sve-ptrace_Set_SVE_VL_3312 pass
9716 22:24:01.793215 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 skip
9717 22:24:01.793308 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 skip
9718 22:24:01.793570 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 skip
9719 22:24:01.793685 arm64_sve-ptrace_Set_SVE_VL_3328 pass
9720 22:24:01.793800 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 skip
9721 22:24:01.793883 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 skip
9722 22:24:01.793976 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 skip
9723 22:24:01.794070 arm64_sve-ptrace_Set_SVE_VL_3344 pass
9724 22:24:01.794160 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 skip
9725 22:24:01.794250 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 skip
9726 22:24:01.794537 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 skip
9727 22:24:01.794640 arm64_sve-ptrace_Set_SVE_VL_3360 pass
9728 22:24:01.794733 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 skip
9729 22:24:01.794994 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 skip
9730 22:24:01.795085 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 skip
9731 22:24:01.795160 arm64_sve-ptrace_Set_SVE_VL_3376 pass
9732 22:24:01.799185 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 skip
9733 22:24:01.799523 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 skip
9734 22:24:01.799637 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 skip
9735 22:24:01.799714 arm64_sve-ptrace_Set_SVE_VL_3392 pass
9736 22:24:01.799817 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 skip
9737 22:24:01.799914 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 skip
9738 22:24:01.800016 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 skip
9739 22:24:01.800111 arm64_sve-ptrace_Set_SVE_VL_3408 pass
9740 22:24:01.800250 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 skip
9741 22:24:01.800363 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 skip
9742 22:24:01.800476 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 skip
9743 22:24:01.800605 arm64_sve-ptrace_Set_SVE_VL_3424 pass
9744 22:24:01.800724 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 skip
9745 22:24:01.800834 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 skip
9746 22:24:01.800952 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 skip
9747 22:24:01.801076 arm64_sve-ptrace_Set_SVE_VL_3440 pass
9748 22:24:01.801396 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 skip
9749 22:24:01.801499 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 skip
9750 22:24:01.801584 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 skip
9751 22:24:01.801691 arm64_sve-ptrace_Set_SVE_VL_3456 pass
9752 22:24:01.801778 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 skip
9753 22:24:01.801875 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 skip
9754 22:24:01.801980 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 skip
9755 22:24:01.802078 arm64_sve-ptrace_Set_SVE_VL_3472 pass
9756 22:24:01.802176 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 skip
9757 22:24:01.802274 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 skip
9758 22:24:01.802372 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 skip
9759 22:24:01.802468 arm64_sve-ptrace_Set_SVE_VL_3488 pass
9760 22:24:01.802761 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 skip
9761 22:24:01.802854 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 skip
9762 22:24:01.802968 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 skip
9763 22:24:01.803062 arm64_sve-ptrace_Set_SVE_VL_3504 pass
9764 22:24:01.807415 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 skip
9765 22:24:01.807709 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 skip
9766 22:24:01.807789 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 skip
9767 22:24:01.807856 arm64_sve-ptrace_Set_SVE_VL_3520 pass
9768 22:24:01.807934 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 skip
9769 22:24:01.808011 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 skip
9770 22:24:01.808346 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 skip
9771 22:24:01.808523 arm64_sve-ptrace_Set_SVE_VL_3536 pass
9772 22:24:01.808675 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 skip
9773 22:24:01.808804 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 skip
9774 22:24:01.808938 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 skip
9775 22:24:01.809090 arm64_sve-ptrace_Set_SVE_VL_3552 pass
9776 22:24:01.809216 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 skip
9777 22:24:01.809338 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 skip
9778 22:24:01.809482 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 skip
9779 22:24:01.809605 arm64_sve-ptrace_Set_SVE_VL_3568 pass
9780 22:24:01.809766 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 skip
9781 22:24:01.809922 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 skip
9782 22:24:01.810068 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 skip
9783 22:24:01.810193 arm64_sve-ptrace_Set_SVE_VL_3584 pass
9784 22:24:01.810347 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 skip
9785 22:24:01.810468 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 skip
9786 22:24:01.810603 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 skip
9787 22:24:01.810742 arm64_sve-ptrace_Set_SVE_VL_3600 pass
9788 22:24:01.810861 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 skip
9789 22:24:01.810995 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 skip
9790 22:24:01.811131 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 skip
9791 22:24:01.815317 arm64_sve-ptrace_Set_SVE_VL_3616 pass
9792 22:24:01.815447 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 skip
9793 22:24:01.815760 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 skip
9794 22:24:01.815882 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 skip
9795 22:24:01.816014 arm64_sve-ptrace_Set_SVE_VL_3632 pass
9796 22:24:01.816130 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 skip
9797 22:24:01.816242 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 skip
9798 22:24:01.816373 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 skip
9799 22:24:01.816489 arm64_sve-ptrace_Set_SVE_VL_3648 pass
9800 22:24:01.816619 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 skip
9801 22:24:01.816735 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 skip
9802 22:24:01.816864 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 skip
9803 22:24:01.816979 arm64_sve-ptrace_Set_SVE_VL_3664 pass
9804 22:24:01.828669 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 skip
9805 22:24:01.829120 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 skip
9806 22:24:01.829368 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 skip
9807 22:24:01.829554 arm64_sve-ptrace_Set_SVE_VL_3680 pass
9808 22:24:01.829773 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 skip
9809 22:24:01.830027 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 skip
9810 22:24:01.830245 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 skip
9811 22:24:01.830435 arm64_sve-ptrace_Set_SVE_VL_3696 pass
9812 22:24:01.830648 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 skip
9813 22:24:01.830815 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 skip
9814 22:24:01.830988 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 skip
9815 22:24:01.831205 arm64_sve-ptrace_Set_SVE_VL_3712 pass
9816 22:24:01.831424 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 skip
9817 22:24:01.831623 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 skip
9818 22:24:01.831809 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 skip
9819 22:24:01.831977 arm64_sve-ptrace_Set_SVE_VL_3728 pass
9820 22:24:01.832146 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 skip
9821 22:24:01.832342 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 skip
9822 22:24:01.832512 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 skip
9823 22:24:01.832675 arm64_sve-ptrace_Set_SVE_VL_3744 pass
9824 22:24:01.832869 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 skip
9825 22:24:01.833043 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 skip
9826 22:24:01.833255 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 skip
9827 22:24:01.833460 arm64_sve-ptrace_Set_SVE_VL_3760 pass
9828 22:24:01.834211 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 skip
9829 22:24:01.834434 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 skip
9830 22:24:01.834622 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 skip
9831 22:24:01.834786 arm64_sve-ptrace_Set_SVE_VL_3776 pass
9832 22:24:01.834943 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 skip
9833 22:24:01.835072 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 skip
9834 22:24:01.835187 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 skip
9835 22:24:01.835300 arm64_sve-ptrace_Set_SVE_VL_3792 pass
9836 22:24:01.835411 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 skip
9837 22:24:01.835523 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 skip
9838 22:24:01.835633 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 skip
9839 22:24:01.835744 arm64_sve-ptrace_Set_SVE_VL_3808 pass
9840 22:24:01.835879 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 skip
9841 22:24:01.835998 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 skip
9842 22:24:01.836343 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 skip
9843 22:24:01.836501 arm64_sve-ptrace_Set_SVE_VL_3824 pass
9844 22:24:01.836625 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 skip
9845 22:24:01.836743 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 skip
9846 22:24:01.836860 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 skip
9847 22:24:01.836976 arm64_sve-ptrace_Set_SVE_VL_3840 pass
9848 22:24:01.837095 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 skip
9849 22:24:01.837212 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 skip
9850 22:24:01.837330 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 skip
9851 22:24:01.837447 arm64_sve-ptrace_Set_SVE_VL_3856 pass
9852 22:24:01.837563 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 skip
9853 22:24:01.837693 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 skip
9854 22:24:01.837811 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 skip
9855 22:24:01.837927 arm64_sve-ptrace_Set_SVE_VL_3872 pass
9856 22:24:01.838044 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 skip
9857 22:24:01.838162 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 skip
9858 22:24:01.838278 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 skip
9859 22:24:01.838395 arm64_sve-ptrace_Set_SVE_VL_3888 pass
9860 22:24:01.839224 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 skip
9861 22:24:01.839622 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 skip
9862 22:24:01.839730 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 skip
9863 22:24:01.839816 arm64_sve-ptrace_Set_SVE_VL_3904 pass
9864 22:24:01.839899 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 skip
9865 22:24:01.839995 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 skip
9866 22:24:01.840082 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 skip
9867 22:24:01.840168 arm64_sve-ptrace_Set_SVE_VL_3920 pass
9868 22:24:01.840266 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 skip
9869 22:24:01.840350 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 skip
9870 22:24:01.840446 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 skip
9871 22:24:01.840530 arm64_sve-ptrace_Set_SVE_VL_3936 pass
9872 22:24:01.840625 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 skip
9873 22:24:01.840709 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 skip
9874 22:24:01.840812 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 skip
9875 22:24:01.840910 arm64_sve-ptrace_Set_SVE_VL_3952 pass
9876 22:24:01.840994 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 skip
9877 22:24:01.841091 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 skip
9878 22:24:01.841196 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 skip
9879 22:24:01.841294 arm64_sve-ptrace_Set_SVE_VL_3968 pass
9880 22:24:01.841391 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 skip
9881 22:24:01.841488 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 skip
9882 22:24:01.841823 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 skip
9883 22:24:01.842021 arm64_sve-ptrace_Set_SVE_VL_3984 pass
9884 22:24:01.842246 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 skip
9885 22:24:01.842429 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 skip
9886 22:24:01.842598 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 skip
9887 22:24:01.842733 arm64_sve-ptrace_Set_SVE_VL_4000 pass
9888 22:24:01.842920 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 skip
9889 22:24:01.843055 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 skip
9890 22:24:01.843172 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 skip
9891 22:24:01.843286 arm64_sve-ptrace_Set_SVE_VL_4016 pass
9892 22:24:01.843400 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 skip
9893 22:24:01.843536 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 skip
9894 22:24:01.847378 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 skip
9895 22:24:01.847493 arm64_sve-ptrace_Set_SVE_VL_4032 pass
9896 22:24:01.847618 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 skip
9897 22:24:01.847741 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 skip
9898 22:24:01.847844 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 skip
9899 22:24:01.847947 arm64_sve-ptrace_Set_SVE_VL_4048 pass
9900 22:24:01.848041 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 skip
9901 22:24:01.848140 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 skip
9902 22:24:01.848209 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 skip
9903 22:24:01.848296 arm64_sve-ptrace_Set_SVE_VL_4064 pass
9904 22:24:01.848401 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 skip
9905 22:24:01.848496 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 skip
9906 22:24:01.848770 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 skip
9907 22:24:01.848876 arm64_sve-ptrace_Set_SVE_VL_4080 pass
9908 22:24:01.848998 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 skip
9909 22:24:01.849096 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 skip
9910 22:24:01.849213 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 skip
9911 22:24:01.849300 arm64_sve-ptrace_Set_SVE_VL_4096 pass
9912 22:24:01.849414 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 skip
9913 22:24:01.849519 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 skip
9914 22:24:01.849630 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 skip
9915 22:24:01.849737 arm64_sve-ptrace_Set_SVE_VL_4112 pass
9916 22:24:01.849846 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 skip
9917 22:24:01.849923 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 skip
9918 22:24:01.850013 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 skip
9919 22:24:01.850118 arm64_sve-ptrace_Set_SVE_VL_4128 pass
9920 22:24:01.850215 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 skip
9921 22:24:01.850342 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 skip
9922 22:24:01.850469 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 skip
9923 22:24:01.850571 arm64_sve-ptrace_Set_SVE_VL_4144 pass
9924 22:24:01.850888 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 skip
9925 22:24:01.850993 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 skip
9926 22:24:01.851094 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 skip
9927 22:24:01.855181 arm64_sve-ptrace_Set_SVE_VL_4160 pass
9928 22:24:01.855506 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 skip
9929 22:24:01.855649 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 skip
9930 22:24:01.855783 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 skip
9931 22:24:01.855893 arm64_sve-ptrace_Set_SVE_VL_4176 pass
9932 22:24:01.855981 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 skip
9933 22:24:01.856066 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 skip
9934 22:24:01.856164 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 skip
9935 22:24:01.856250 arm64_sve-ptrace_Set_SVE_VL_4192 pass
9936 22:24:01.856350 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 skip
9937 22:24:01.856434 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 skip
9938 22:24:01.856530 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 skip
9939 22:24:01.856627 arm64_sve-ptrace_Set_SVE_VL_4208 pass
9940 22:24:01.856724 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 skip
9941 22:24:01.856820 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 skip
9942 22:24:01.857484 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 skip
9943 22:24:01.857589 arm64_sve-ptrace_Set_SVE_VL_4224 pass
9944 22:24:01.857681 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 skip
9945 22:24:01.857765 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 skip
9946 22:24:01.857846 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 skip
9947 22:24:01.858134 arm64_sve-ptrace_Set_SVE_VL_4240 pass
9948 22:24:01.858237 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 skip
9949 22:24:01.858322 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 skip
9950 22:24:01.858406 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 skip
9951 22:24:01.858489 arm64_sve-ptrace_Set_SVE_VL_4256 pass
9952 22:24:01.858571 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 skip
9953 22:24:01.858668 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 skip
9954 22:24:01.858754 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 skip
9955 22:24:01.858838 arm64_sve-ptrace_Set_SVE_VL_4272 pass
9956 22:24:01.858921 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 skip
9957 22:24:01.859202 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 skip
9958 22:24:01.859305 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 skip
9959 22:24:01.859390 arm64_sve-ptrace_Set_SVE_VL_4288 pass
9960 22:24:01.863178 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 skip
9961 22:24:01.863488 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 skip
9962 22:24:01.863595 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 skip
9963 22:24:01.863686 arm64_sve-ptrace_Set_SVE_VL_4304 pass
9964 22:24:01.877303 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 skip
9965 22:24:01.877679 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 skip
9966 22:24:01.877830 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 skip
9967 22:24:01.877957 arm64_sve-ptrace_Set_SVE_VL_4320 pass
9968 22:24:01.878099 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 skip
9969 22:24:01.878245 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 skip
9970 22:24:01.878390 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 skip
9971 22:24:01.878575 arm64_sve-ptrace_Set_SVE_VL_4336 pass
9972 22:24:01.878707 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 skip
9973 22:24:01.878866 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 skip
9974 22:24:01.879035 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 skip
9975 22:24:01.879222 arm64_sve-ptrace_Set_SVE_VL_4352 pass
9976 22:24:01.879375 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 skip
9977 22:24:01.879530 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 skip
9978 22:24:01.879740 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 skip
9979 22:24:01.879959 arm64_sve-ptrace_Set_SVE_VL_4368 pass
9980 22:24:01.880179 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 skip
9981 22:24:01.880393 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 skip
9982 22:24:01.880562 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 skip
9983 22:24:01.880756 arm64_sve-ptrace_Set_SVE_VL_4384 pass
9984 22:24:01.880952 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 skip
9985 22:24:01.881167 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 skip
9986 22:24:01.881371 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 skip
9987 22:24:01.881556 arm64_sve-ptrace_Set_SVE_VL_4400 pass
9988 22:24:01.882059 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 skip
9989 22:24:01.882255 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 skip
9990 22:24:01.882482 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 skip
9991 22:24:01.882657 arm64_sve-ptrace_Set_SVE_VL_4416 pass
9992 22:24:01.882832 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 skip
9993 22:24:01.883016 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 skip
9994 22:24:01.883162 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 skip
9995 22:24:01.883279 arm64_sve-ptrace_Set_SVE_VL_4432 pass
9996 22:24:01.883393 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 skip
9997 22:24:01.883506 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 skip
9998 22:24:01.883647 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 skip
9999 22:24:01.883793 arm64_sve-ptrace_Set_SVE_VL_4448 pass
10000 22:24:01.883910 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 skip
10001 22:24:01.884023 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 skip
10002 22:24:01.884367 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 skip
10003 22:24:01.884521 arm64_sve-ptrace_Set_SVE_VL_4464 pass
10004 22:24:01.884640 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 skip
10005 22:24:01.884755 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 skip
10006 22:24:01.884872 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 skip
10007 22:24:01.884986 arm64_sve-ptrace_Set_SVE_VL_4480 pass
10008 22:24:01.885099 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 skip
10009 22:24:01.885212 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 skip
10010 22:24:01.885326 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 skip
10011 22:24:01.885439 arm64_sve-ptrace_Set_SVE_VL_4496 pass
10012 22:24:01.885552 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 skip
10013 22:24:01.885680 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 skip
10014 22:24:01.887229 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 skip
10015 22:24:01.887451 arm64_sve-ptrace_Set_SVE_VL_4512 pass
10016 22:24:01.887875 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 skip
10017 22:24:01.888070 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 skip
10018 22:24:01.888245 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 skip
10019 22:24:01.888411 arm64_sve-ptrace_Set_SVE_VL_4528 pass
10020 22:24:01.888568 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 skip
10021 22:24:01.888754 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 skip
10022 22:24:01.888895 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 skip
10023 22:24:01.889021 arm64_sve-ptrace_Set_SVE_VL_4544 pass
10024 22:24:01.889165 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 skip
10025 22:24:01.889314 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 skip
10026 22:24:01.889465 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 skip
10027 22:24:01.889619 arm64_sve-ptrace_Set_SVE_VL_4560 pass
10028 22:24:01.889817 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 skip
10029 22:24:01.889982 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 skip
10030 22:24:01.890143 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 skip
10031 22:24:01.890285 arm64_sve-ptrace_Set_SVE_VL_4576 pass
10032 22:24:01.890439 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 skip
10033 22:24:01.890595 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 skip
10034 22:24:01.890754 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 skip
10035 22:24:01.890923 arm64_sve-ptrace_Set_SVE_VL_4592 pass
10036 22:24:01.891061 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 skip
10037 22:24:01.891206 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 skip
10038 22:24:01.891327 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 skip
10039 22:24:01.891442 arm64_sve-ptrace_Set_SVE_VL_4608 pass
10040 22:24:01.891556 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 skip
10041 22:24:01.891669 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 skip
10042 22:24:01.891782 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 skip
10043 22:24:01.891898 arm64_sve-ptrace_Set_SVE_VL_4624 pass
10044 22:24:01.892012 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 skip
10045 22:24:01.892125 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 skip
10046 22:24:01.895238 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 skip
10047 22:24:01.895615 arm64_sve-ptrace_Set_SVE_VL_4640 pass
10048 22:24:01.895725 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 skip
10049 22:24:01.895812 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 skip
10050 22:24:01.895914 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 skip
10051 22:24:01.896000 arm64_sve-ptrace_Set_SVE_VL_4656 pass
10052 22:24:01.896086 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 skip
10053 22:24:01.896183 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 skip
10054 22:24:01.896267 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 skip
10055 22:24:01.896364 arm64_sve-ptrace_Set_SVE_VL_4672 pass
10056 22:24:01.896448 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 skip
10057 22:24:01.896543 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 skip
10058 22:24:01.896640 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 skip
10059 22:24:01.896737 arm64_sve-ptrace_Set_SVE_VL_4688 pass
10060 22:24:01.896821 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 skip
10061 22:24:01.896932 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 skip
10062 22:24:01.897031 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 skip
10063 22:24:01.897128 arm64_sve-ptrace_Set_SVE_VL_4704 pass
10064 22:24:01.897469 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 skip
10065 22:24:01.897675 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 skip
10066 22:24:01.897890 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 skip
10067 22:24:01.898074 arm64_sve-ptrace_Set_SVE_VL_4720 pass
10068 22:24:01.898238 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 skip
10069 22:24:01.898399 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 skip
10070 22:24:01.898574 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 skip
10071 22:24:01.898740 arm64_sve-ptrace_Set_SVE_VL_4736 pass
10072 22:24:01.898901 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 skip
10073 22:24:01.899028 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 skip
10074 22:24:01.899145 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 skip
10075 22:24:01.899285 arm64_sve-ptrace_Set_SVE_VL_4752 pass
10076 22:24:01.899405 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 skip
10077 22:24:01.899521 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 skip
10078 22:24:01.899635 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 skip
10079 22:24:01.903194 arm64_sve-ptrace_Set_SVE_VL_4768 pass
10080 22:24:01.903547 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 skip
10081 22:24:01.903777 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 skip
10082 22:24:01.904002 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 skip
10083 22:24:01.904198 arm64_sve-ptrace_Set_SVE_VL_4784 pass
10084 22:24:01.904413 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 skip
10085 22:24:01.904587 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 skip
10086 22:24:01.904761 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 skip
10087 22:24:01.904960 arm64_sve-ptrace_Set_SVE_VL_4800 pass
10088 22:24:01.905205 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 skip
10089 22:24:01.905394 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 skip
10090 22:24:01.905531 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 skip
10091 22:24:01.905734 arm64_sve-ptrace_Set_SVE_VL_4816 pass
10092 22:24:01.905895 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 skip
10093 22:24:01.906045 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 skip
10094 22:24:01.906187 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 skip
10095 22:24:01.906336 arm64_sve-ptrace_Set_SVE_VL_4832 pass
10096 22:24:01.906489 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 skip
10097 22:24:01.906683 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 skip
10098 22:24:01.906850 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 skip
10099 22:24:01.906998 arm64_sve-ptrace_Set_SVE_VL_4848 pass
10100 22:24:01.907133 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 skip
10101 22:24:01.907250 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 skip
10102 22:24:01.907363 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 skip
10103 22:24:01.907475 arm64_sve-ptrace_Set_SVE_VL_4864 pass
10104 22:24:01.907588 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 skip
10105 22:24:01.907741 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 skip
10106 22:24:01.907890 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 skip
10107 22:24:01.908012 arm64_sve-ptrace_Set_SVE_VL_4880 pass
10108 22:24:01.908155 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 skip
10109 22:24:01.908276 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 skip
10110 22:24:01.911194 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 skip
10111 22:24:01.911632 arm64_sve-ptrace_Set_SVE_VL_4896 pass
10112 22:24:01.911824 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 skip
10113 22:24:01.911991 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 skip
10114 22:24:01.912150 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 skip
10115 22:24:01.912307 arm64_sve-ptrace_Set_SVE_VL_4912 pass
10116 22:24:01.912454 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 skip
10117 22:24:01.912612 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 skip
10118 22:24:01.912764 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 skip
10119 22:24:01.912882 arm64_sve-ptrace_Set_SVE_VL_4928 pass
10120 22:24:01.913037 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 skip
10121 22:24:01.913171 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 skip
10122 22:24:01.913289 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 skip
10123 22:24:01.913404 arm64_sve-ptrace_Set_SVE_VL_4944 pass
10124 22:24:01.927254 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 skip
10125 22:24:01.927677 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 skip
10126 22:24:01.927930 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 skip
10127 22:24:01.928130 arm64_sve-ptrace_Set_SVE_VL_4960 pass
10128 22:24:01.928303 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 skip
10129 22:24:01.928502 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 skip
10130 22:24:01.928670 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 skip
10131 22:24:01.928834 arm64_sve-ptrace_Set_SVE_VL_4976 pass
10132 22:24:01.929003 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 skip
10133 22:24:01.929149 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 skip
10134 22:24:01.929304 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 skip
10135 22:24:01.929462 arm64_sve-ptrace_Set_SVE_VL_4992 pass
10136 22:24:01.929661 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 skip
10137 22:24:01.929817 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 skip
10138 22:24:01.929972 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 skip
10139 22:24:01.930141 arm64_sve-ptrace_Set_SVE_VL_5008 pass
10140 22:24:01.930306 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 skip
10141 22:24:01.930470 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 skip
10142 22:24:01.930635 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 skip
10143 22:24:01.930798 arm64_sve-ptrace_Set_SVE_VL_5024 pass
10144 22:24:01.930959 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 skip
10145 22:24:01.931086 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 skip
10146 22:24:01.931230 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 skip
10147 22:24:01.931346 arm64_sve-ptrace_Set_SVE_VL_5040 pass
10148 22:24:01.931458 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 skip
10149 22:24:01.931571 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 skip
10150 22:24:01.931683 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 skip
10151 22:24:01.931795 arm64_sve-ptrace_Set_SVE_VL_5056 pass
10152 22:24:01.931907 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 skip
10153 22:24:01.932022 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 skip
10154 22:24:01.932133 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 skip
10155 22:24:01.932244 arm64_sve-ptrace_Set_SVE_VL_5072 pass
10156 22:24:01.935212 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 skip
10157 22:24:01.935644 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 skip
10158 22:24:01.935829 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 skip
10159 22:24:01.935997 arm64_sve-ptrace_Set_SVE_VL_5088 pass
10160 22:24:01.936191 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 skip
10161 22:24:01.936356 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 skip
10162 22:24:01.936518 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 skip
10163 22:24:01.936685 arm64_sve-ptrace_Set_SVE_VL_5104 pass
10164 22:24:01.936848 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 skip
10165 22:24:01.937025 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 skip
10166 22:24:01.937181 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 skip
10167 22:24:01.937340 arm64_sve-ptrace_Set_SVE_VL_5120 pass
10168 22:24:01.937507 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 skip
10169 22:24:01.937684 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 skip
10170 22:24:01.937884 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 skip
10171 22:24:01.938057 arm64_sve-ptrace_Set_SVE_VL_5136 pass
10172 22:24:01.938221 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 skip
10173 22:24:01.938385 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 skip
10174 22:24:01.938544 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 skip
10175 22:24:01.938703 arm64_sve-ptrace_Set_SVE_VL_5152 pass
10176 22:24:01.938853 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 skip
10177 22:24:01.938990 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 skip
10178 22:24:01.939135 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 skip
10179 22:24:01.939255 arm64_sve-ptrace_Set_SVE_VL_5168 pass
10180 22:24:01.939369 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 skip
10181 22:24:01.939483 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 skip
10182 22:24:01.939597 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 skip
10183 22:24:01.939710 arm64_sve-ptrace_Set_SVE_VL_5184 pass
10184 22:24:01.939823 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 skip
10185 22:24:01.939938 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 skip
10186 22:24:01.943193 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 skip
10187 22:24:01.943600 arm64_sve-ptrace_Set_SVE_VL_5200 pass
10188 22:24:01.943769 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 skip
10189 22:24:01.943931 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 skip
10190 22:24:01.944141 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 skip
10191 22:24:01.944319 arm64_sve-ptrace_Set_SVE_VL_5216 pass
10192 22:24:01.944487 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 skip
10193 22:24:01.944638 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 skip
10194 22:24:01.944799 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 skip
10195 22:24:01.945021 arm64_sve-ptrace_Set_SVE_VL_5232 pass
10196 22:24:01.945182 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 skip
10197 22:24:01.945303 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 skip
10198 22:24:01.945426 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 skip
10199 22:24:01.945547 arm64_sve-ptrace_Set_SVE_VL_5248 pass
10200 22:24:01.945696 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 skip
10201 22:24:01.945903 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 skip
10202 22:24:01.946139 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 skip
10203 22:24:01.946315 arm64_sve-ptrace_Set_SVE_VL_5264 pass
10204 22:24:01.946475 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 skip
10205 22:24:01.946627 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 skip
10206 22:24:01.946779 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 skip
10207 22:24:01.946935 arm64_sve-ptrace_Set_SVE_VL_5280 pass
10208 22:24:01.947062 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 skip
10209 22:24:01.947178 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 skip
10210 22:24:01.947292 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 skip
10211 22:24:01.947434 arm64_sve-ptrace_Set_SVE_VL_5296 pass
10212 22:24:01.947556 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 skip
10213 22:24:01.947671 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 skip
10214 22:24:01.947786 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 skip
10215 22:24:01.947900 arm64_sve-ptrace_Set_SVE_VL_5312 pass
10216 22:24:01.948018 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 skip
10217 22:24:01.948133 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 skip
10218 22:24:01.951429 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 skip
10219 22:24:01.951613 arm64_sve-ptrace_Set_SVE_VL_5328 pass
10220 22:24:01.951815 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 skip
10221 22:24:01.951974 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 skip
10222 22:24:01.952108 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 skip
10223 22:24:01.952254 arm64_sve-ptrace_Set_SVE_VL_5344 pass
10224 22:24:01.952381 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 skip
10225 22:24:01.952518 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 skip
10226 22:24:01.952668 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 skip
10227 22:24:01.952809 arm64_sve-ptrace_Set_SVE_VL_5360 pass
10228 22:24:01.952956 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 skip
10229 22:24:01.953141 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 skip
10230 22:24:01.953307 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 skip
10231 22:24:01.953463 arm64_sve-ptrace_Set_SVE_VL_5376 pass
10232 22:24:01.953601 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 skip
10233 22:24:01.953845 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 skip
10234 22:24:01.954045 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 skip
10235 22:24:01.954231 arm64_sve-ptrace_Set_SVE_VL_5392 pass
10236 22:24:01.954396 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 skip
10237 22:24:01.954544 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 skip
10238 22:24:01.954715 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 skip
10239 22:24:01.954874 arm64_sve-ptrace_Set_SVE_VL_5408 pass
10240 22:24:01.955008 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 skip
10241 22:24:01.955127 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 skip
10242 22:24:01.955242 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 skip
10243 22:24:01.955358 arm64_sve-ptrace_Set_SVE_VL_5424 pass
10244 22:24:01.955472 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 skip
10245 22:24:01.955599 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 skip
10246 22:24:01.955785 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 skip
10247 22:24:01.955911 arm64_sve-ptrace_Set_SVE_VL_5440 pass
10248 22:24:01.956027 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 skip
10249 22:24:01.959487 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 skip
10250 22:24:01.959631 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 skip
10251 22:24:01.959777 arm64_sve-ptrace_Set_SVE_VL_5456 pass
10252 22:24:01.959945 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 skip
10253 22:24:01.960058 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 skip
10254 22:24:01.960165 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 skip
10255 22:24:01.960244 arm64_sve-ptrace_Set_SVE_VL_5472 pass
10256 22:24:01.960341 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 skip
10257 22:24:01.960442 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 skip
10258 22:24:01.960531 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 skip
10259 22:24:01.960782 arm64_sve-ptrace_Set_SVE_VL_5488 pass
10260 22:24:01.960872 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 skip
10261 22:24:01.960963 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 skip
10262 22:24:01.961042 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 skip
10263 22:24:01.961134 arm64_sve-ptrace_Set_SVE_VL_5504 pass
10264 22:24:01.961231 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 skip
10265 22:24:01.961326 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 skip
10266 22:24:01.961420 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 skip
10267 22:24:01.961695 arm64_sve-ptrace_Set_SVE_VL_5520 pass
10268 22:24:01.961800 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 skip
10269 22:24:01.961902 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 skip
10270 22:24:01.962004 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 skip
10271 22:24:01.962090 arm64_sve-ptrace_Set_SVE_VL_5536 pass
10272 22:24:01.962187 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 skip
10273 22:24:01.962285 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 skip
10274 22:24:01.962383 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 skip
10275 22:24:01.962480 arm64_sve-ptrace_Set_SVE_VL_5552 pass
10276 22:24:01.962585 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 skip
10277 22:24:01.962683 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 skip
10278 22:24:01.962978 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 skip
10279 22:24:01.963085 arm64_sve-ptrace_Set_SVE_VL_5568 pass
10280 22:24:01.967202 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 skip
10281 22:24:01.967612 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 skip
10282 22:24:01.967760 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 skip
10283 22:24:01.967898 arm64_sve-ptrace_Set_SVE_VL_5584 pass
10284 22:24:01.978017 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 skip
10285 22:24:01.978481 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 skip
10286 22:24:01.978693 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 skip
10287 22:24:01.978878 arm64_sve-ptrace_Set_SVE_VL_5600 pass
10288 22:24:01.979050 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 skip
10289 22:24:01.979248 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 skip
10290 22:24:01.979412 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 skip
10291 22:24:01.979584 arm64_sve-ptrace_Set_SVE_VL_5616 pass
10292 22:24:01.979751 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 skip
10293 22:24:01.979905 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 skip
10294 22:24:01.980079 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 skip
10295 22:24:01.980248 arm64_sve-ptrace_Set_SVE_VL_5632 pass
10296 22:24:01.980385 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 skip
10297 22:24:01.980511 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 skip
10298 22:24:01.980645 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 skip
10299 22:24:01.980800 arm64_sve-ptrace_Set_SVE_VL_5648 pass
10300 22:24:01.980952 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 skip
10301 22:24:01.981113 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 skip
10302 22:24:01.981311 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 skip
10303 22:24:01.981487 arm64_sve-ptrace_Set_SVE_VL_5664 pass
10304 22:24:01.982204 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 skip
10305 22:24:01.982404 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 skip
10306 22:24:01.982580 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 skip
10307 22:24:01.982744 arm64_sve-ptrace_Set_SVE_VL_5680 pass
10308 22:24:01.982896 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 skip
10309 22:24:01.983045 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 skip
10310 22:24:01.983166 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 skip
10311 22:24:01.983281 arm64_sve-ptrace_Set_SVE_VL_5696 pass
10312 22:24:01.983426 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 skip
10313 22:24:01.983548 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 skip
10314 22:24:01.983663 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 skip
10315 22:24:01.983777 arm64_sve-ptrace_Set_SVE_VL_5712 pass
10316 22:24:01.983893 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 skip
10317 22:24:01.984007 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 skip
10318 22:24:01.984124 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 skip
10319 22:24:01.984239 arm64_sve-ptrace_Set_SVE_VL_5728 pass
10320 22:24:01.984353 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 skip
10321 22:24:01.984466 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 skip
10322 22:24:01.984580 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 skip
10323 22:24:01.984922 arm64_sve-ptrace_Set_SVE_VL_5744 pass
10324 22:24:01.985075 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 skip
10325 22:24:01.985199 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 skip
10326 22:24:01.987199 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 skip
10327 22:24:01.987502 arm64_sve-ptrace_Set_SVE_VL_5760 pass
10328 22:24:01.987626 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 skip
10329 22:24:01.987737 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 skip
10330 22:24:01.987839 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 skip
10331 22:24:01.987939 arm64_sve-ptrace_Set_SVE_VL_5776 pass
10332 22:24:01.988026 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 skip
10333 22:24:01.988126 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 skip
10334 22:24:01.988225 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 skip
10335 22:24:01.988324 arm64_sve-ptrace_Set_SVE_VL_5792 pass
10336 22:24:01.988423 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 skip
10337 22:24:01.988710 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 skip
10338 22:24:01.988815 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 skip
10339 22:24:01.989138 arm64_sve-ptrace_Set_SVE_VL_5808 pass
10340 22:24:01.989309 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 skip
10341 22:24:01.989446 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 skip
10342 22:24:01.989678 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 skip
10343 22:24:01.989872 arm64_sve-ptrace_Set_SVE_VL_5824 pass
10344 22:24:01.990045 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 skip
10345 22:24:01.990229 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 skip
10346 22:24:01.990390 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 skip
10347 22:24:01.990542 arm64_sve-ptrace_Set_SVE_VL_5840 pass
10348 22:24:01.990694 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 skip
10349 22:24:01.990872 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 skip
10350 22:24:01.991016 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 skip
10351 22:24:01.991142 arm64_sve-ptrace_Set_SVE_VL_5856 pass
10352 22:24:01.991261 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 skip
10353 22:24:01.991380 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 skip
10354 22:24:01.991520 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 skip
10355 22:24:01.995208 arm64_sve-ptrace_Set_SVE_VL_5872 pass
10356 22:24:01.995612 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 skip
10357 22:24:01.995810 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 skip
10358 22:24:01.996006 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 skip
10359 22:24:01.996214 arm64_sve-ptrace_Set_SVE_VL_5888 pass
10360 22:24:01.996384 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 skip
10361 22:24:01.996541 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 skip
10362 22:24:01.996669 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 skip
10363 22:24:01.996798 arm64_sve-ptrace_Set_SVE_VL_5904 pass
10364 22:24:01.996918 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 skip
10365 22:24:01.997063 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 skip
10366 22:24:01.997183 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 skip
10367 22:24:01.997302 arm64_sve-ptrace_Set_SVE_VL_5920 pass
10368 22:24:01.997439 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 skip
10369 22:24:01.997567 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 skip
10370 22:24:01.997724 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 skip
10371 22:24:01.997978 arm64_sve-ptrace_Set_SVE_VL_5936 pass
10372 22:24:01.998175 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 skip
10373 22:24:01.998382 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 skip
10374 22:24:01.998562 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 skip
10375 22:24:01.998711 arm64_sve-ptrace_Set_SVE_VL_5952 pass
10376 22:24:01.998868 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 skip
10377 22:24:01.999069 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 skip
10378 22:24:01.999213 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 skip
10379 22:24:01.999333 arm64_sve-ptrace_Set_SVE_VL_5968 pass
10380 22:24:01.999448 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 skip
10381 22:24:01.999563 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 skip
10382 22:24:01.999678 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 skip
10383 22:24:01.999792 arm64_sve-ptrace_Set_SVE_VL_5984 pass
10384 22:24:01.999906 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 skip
10385 22:24:02.003198 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 skip
10386 22:24:02.003719 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 skip
10387 22:24:02.003929 arm64_sve-ptrace_Set_SVE_VL_6000 pass
10388 22:24:02.004131 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 skip
10389 22:24:02.004276 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 skip
10390 22:24:02.004432 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 skip
10391 22:24:02.004575 arm64_sve-ptrace_Set_SVE_VL_6016 pass
10392 22:24:02.004775 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 skip
10393 22:24:02.004963 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 skip
10394 22:24:02.005132 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 skip
10395 22:24:02.005287 arm64_sve-ptrace_Set_SVE_VL_6032 pass
10396 22:24:02.005478 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 skip
10397 22:24:02.005645 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 skip
10398 22:24:02.005818 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 skip
10399 22:24:02.005981 arm64_sve-ptrace_Set_SVE_VL_6048 pass
10400 22:24:02.006134 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 skip
10401 22:24:02.006285 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 skip
10402 22:24:02.006430 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 skip
10403 22:24:02.006655 arm64_sve-ptrace_Set_SVE_VL_6064 pass
10404 22:24:02.006886 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 skip
10405 22:24:02.007043 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 skip
10406 22:24:02.007163 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 skip
10407 22:24:02.007277 arm64_sve-ptrace_Set_SVE_VL_6080 pass
10408 22:24:02.007390 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 skip
10409 22:24:02.007503 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 skip
10410 22:24:02.007625 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 skip
10411 22:24:02.007764 arm64_sve-ptrace_Set_SVE_VL_6096 pass
10412 22:24:02.007885 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 skip
10413 22:24:02.011249 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 skip
10414 22:24:02.011665 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 skip
10415 22:24:02.011868 arm64_sve-ptrace_Set_SVE_VL_6112 pass
10416 22:24:02.012012 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 skip
10417 22:24:02.012159 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 skip
10418 22:24:02.012304 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 skip
10419 22:24:02.012423 arm64_sve-ptrace_Set_SVE_VL_6128 pass
10420 22:24:02.012561 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 skip
10421 22:24:02.012701 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 skip
10422 22:24:02.012819 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 skip
10423 22:24:02.012958 arm64_sve-ptrace_Set_SVE_VL_6144 pass
10424 22:24:02.013080 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 skip
10425 22:24:02.013211 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 skip
10426 22:24:02.013349 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 skip
10427 22:24:02.013472 arm64_sve-ptrace_Set_SVE_VL_6160 pass
10428 22:24:02.013592 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 skip
10429 22:24:02.013815 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 skip
10430 22:24:02.013991 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 skip
10431 22:24:02.014163 arm64_sve-ptrace_Set_SVE_VL_6176 pass
10432 22:24:02.014366 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 skip
10433 22:24:02.014590 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 skip
10434 22:24:02.014800 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 skip
10435 22:24:02.014993 arm64_sve-ptrace_Set_SVE_VL_6192 pass
10436 22:24:02.015177 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 skip
10437 22:24:02.015301 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 skip
10438 22:24:02.015417 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 skip
10439 22:24:02.015534 arm64_sve-ptrace_Set_SVE_VL_6208 pass
10440 22:24:02.019300 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 skip
10441 22:24:02.019729 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 skip
10442 22:24:02.019887 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 skip
10443 22:24:02.020010 arm64_sve-ptrace_Set_SVE_VL_6224 pass
10444 22:24:02.035002 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 skip
10445 22:24:02.035394 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 skip
10446 22:24:02.035641 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 skip
10447 22:24:02.035842 arm64_sve-ptrace_Set_SVE_VL_6240 pass
10448 22:24:02.036088 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 skip
10449 22:24:02.036292 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 skip
10450 22:24:02.036481 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 skip
10451 22:24:02.036621 arm64_sve-ptrace_Set_SVE_VL_6256 pass
10452 22:24:02.036817 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 skip
10453 22:24:02.036984 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 skip
10454 22:24:02.037141 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 skip
10455 22:24:02.037295 arm64_sve-ptrace_Set_SVE_VL_6272 pass
10456 22:24:02.037457 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 skip
10457 22:24:02.037619 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 skip
10458 22:24:02.037795 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 skip
10459 22:24:02.037995 arm64_sve-ptrace_Set_SVE_VL_6288 pass
10460 22:24:02.038162 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 skip
10461 22:24:02.038318 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 skip
10462 22:24:02.038473 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 skip
10463 22:24:02.038623 arm64_sve-ptrace_Set_SVE_VL_6304 pass
10464 22:24:02.038764 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 skip
10465 22:24:02.038916 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 skip
10466 22:24:02.039059 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 skip
10467 22:24:02.039202 arm64_sve-ptrace_Set_SVE_VL_6320 pass
10468 22:24:02.039321 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 skip
10469 22:24:02.039436 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 skip
10470 22:24:02.039549 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 skip
10471 22:24:02.039714 arm64_sve-ptrace_Set_SVE_VL_6336 pass
10472 22:24:02.039847 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 skip
10473 22:24:02.039962 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 skip
10474 22:24:02.043266 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 skip
10475 22:24:02.043763 arm64_sve-ptrace_Set_SVE_VL_6352 pass
10476 22:24:02.043901 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 skip
10477 22:24:02.044046 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 skip
10478 22:24:02.044204 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 skip
10479 22:24:02.044359 arm64_sve-ptrace_Set_SVE_VL_6368 pass
10480 22:24:02.044543 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 skip
10481 22:24:02.044670 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 skip
10482 22:24:02.044770 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 skip
10483 22:24:02.044866 arm64_sve-ptrace_Set_SVE_VL_6384 pass
10484 22:24:02.044961 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 skip
10485 22:24:02.045057 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 skip
10486 22:24:02.045174 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 skip
10487 22:24:02.045273 arm64_sve-ptrace_Set_SVE_VL_6400 pass
10488 22:24:02.045368 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 skip
10489 22:24:02.045461 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 skip
10490 22:24:02.045553 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 skip
10491 22:24:02.045659 arm64_sve-ptrace_Set_SVE_VL_6416 pass
10492 22:24:02.045779 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 skip
10493 22:24:02.045880 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 skip
10494 22:24:02.045976 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 skip
10495 22:24:02.046071 arm64_sve-ptrace_Set_SVE_VL_6432 pass
10496 22:24:02.046164 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 skip
10497 22:24:02.046278 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 skip
10498 22:24:02.046378 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 skip
10499 22:24:02.046472 arm64_sve-ptrace_Set_SVE_VL_6448 pass
10500 22:24:02.046565 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 skip
10501 22:24:02.046659 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 skip
10502 22:24:02.046772 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 skip
10503 22:24:02.046871 arm64_sve-ptrace_Set_SVE_VL_6464 pass
10504 22:24:02.046966 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 skip
10505 22:24:02.047094 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 skip
10506 22:24:02.047209 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 skip
10507 22:24:02.047322 arm64_sve-ptrace_Set_SVE_VL_6480 pass
10508 22:24:02.047415 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 skip
10509 22:24:02.051153 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 skip
10510 22:24:02.051453 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 skip
10511 22:24:02.051557 arm64_sve-ptrace_Set_SVE_VL_6496 pass
10512 22:24:02.051668 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 skip
10513 22:24:02.051765 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 skip
10514 22:24:02.051861 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 skip
10515 22:24:02.051975 arm64_sve-ptrace_Set_SVE_VL_6512 pass
10516 22:24:02.052072 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 skip
10517 22:24:02.052185 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 skip
10518 22:24:02.052283 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 skip
10519 22:24:02.052376 arm64_sve-ptrace_Set_SVE_VL_6528 pass
10520 22:24:02.052488 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 skip
10521 22:24:02.052587 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 skip
10522 22:24:02.052680 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 skip
10523 22:24:02.052791 arm64_sve-ptrace_Set_SVE_VL_6544 pass
10524 22:24:02.053085 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 skip
10525 22:24:02.053226 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 skip
10526 22:24:02.053355 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 skip
10527 22:24:02.053481 arm64_sve-ptrace_Set_SVE_VL_6560 pass
10528 22:24:02.053631 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 skip
10529 22:24:02.053768 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 skip
10530 22:24:02.053894 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 skip
10531 22:24:02.054019 arm64_sve-ptrace_Set_SVE_VL_6576 pass
10532 22:24:02.054149 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 skip
10533 22:24:02.054303 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 skip
10534 22:24:02.054433 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 skip
10535 22:24:02.054559 arm64_sve-ptrace_Set_SVE_VL_6592 pass
10536 22:24:02.054682 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 skip
10537 22:24:02.054809 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 skip
10538 22:24:02.054957 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 skip
10539 22:24:02.055158 arm64_sve-ptrace_Set_SVE_VL_6608 pass
10540 22:24:02.055291 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 skip
10541 22:24:02.055408 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 skip
10542 22:24:02.055523 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 skip
10543 22:24:02.055640 arm64_sve-ptrace_Set_SVE_VL_6624 pass
10544 22:24:02.055755 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 skip
10545 22:24:02.055868 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 skip
10546 22:24:02.059178 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 skip
10547 22:24:02.059549 arm64_sve-ptrace_Set_SVE_VL_6640 pass
10548 22:24:02.059723 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 skip
10549 22:24:02.059911 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 skip
10550 22:24:02.060121 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 skip
10551 22:24:02.060272 arm64_sve-ptrace_Set_SVE_VL_6656 pass
10552 22:24:02.060402 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 skip
10553 22:24:02.060528 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 skip
10554 22:24:02.060653 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 skip
10555 22:24:02.060778 arm64_sve-ptrace_Set_SVE_VL_6672 pass
10556 22:24:02.060931 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 skip
10557 22:24:02.061063 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 skip
10558 22:24:02.061189 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 skip
10559 22:24:02.061317 arm64_sve-ptrace_Set_SVE_VL_6688 pass
10560 22:24:02.061442 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 skip
10561 22:24:02.061566 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 skip
10562 22:24:02.061703 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 skip
10563 22:24:02.061829 arm64_sve-ptrace_Set_SVE_VL_6704 pass
10564 22:24:02.061981 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 skip
10565 22:24:02.062114 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 skip
10566 22:24:02.062242 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 skip
10567 22:24:02.062370 arm64_sve-ptrace_Set_SVE_VL_6720 pass
10568 22:24:02.062498 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 skip
10569 22:24:02.062624 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 skip
10570 22:24:02.062750 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 skip
10571 22:24:02.062877 arm64_sve-ptrace_Set_SVE_VL_6736 pass
10572 22:24:02.063013 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 skip
10573 22:24:02.063141 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 skip
10574 22:24:02.063290 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 skip
10575 22:24:02.063410 arm64_sve-ptrace_Set_SVE_VL_6752 pass
10576 22:24:02.063526 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 skip
10577 22:24:02.063641 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 skip
10578 22:24:02.063756 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 skip
10579 22:24:02.063872 arm64_sve-ptrace_Set_SVE_VL_6768 pass
10580 22:24:02.063987 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 skip
10581 22:24:02.064101 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 skip
10582 22:24:02.064218 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 skip
10583 22:24:02.064333 arm64_sve-ptrace_Set_SVE_VL_6784 pass
10584 22:24:02.067239 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 skip
10585 22:24:02.067626 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 skip
10586 22:24:02.067791 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 skip
10587 22:24:02.067920 arm64_sve-ptrace_Set_SVE_VL_6800 pass
10588 22:24:02.068044 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 skip
10589 22:24:02.068195 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 skip
10590 22:24:02.068334 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 skip
10591 22:24:02.068489 arm64_sve-ptrace_Set_SVE_VL_6816 pass
10592 22:24:02.068657 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 skip
10593 22:24:02.068824 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 skip
10594 22:24:02.069021 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 skip
10595 22:24:02.069164 arm64_sve-ptrace_Set_SVE_VL_6832 pass
10596 22:24:02.069352 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 skip
10597 22:24:02.069525 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 skip
10598 22:24:02.069665 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 skip
10599 22:24:02.069792 arm64_sve-ptrace_Set_SVE_VL_6848 pass
10600 22:24:02.069993 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 skip
10601 22:24:02.070136 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 skip
10602 22:24:02.070254 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 skip
10603 22:24:02.070367 arm64_sve-ptrace_Set_SVE_VL_6864 pass
10604 22:24:02.087169 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 skip
10605 22:24:02.087799 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 skip
10606 22:24:02.088026 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 skip
10607 22:24:02.088240 arm64_sve-ptrace_Set_SVE_VL_6880 pass
10608 22:24:02.088433 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 skip
10609 22:24:02.088608 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 skip
10610 22:24:02.088809 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 skip
10611 22:24:02.088990 arm64_sve-ptrace_Set_SVE_VL_6896 pass
10612 22:24:02.089187 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 skip
10613 22:24:02.089412 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 skip
10614 22:24:02.089632 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 skip
10615 22:24:02.089841 arm64_sve-ptrace_Set_SVE_VL_6912 pass
10616 22:24:02.090013 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 skip
10617 22:24:02.090169 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 skip
10618 22:24:02.090324 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 skip
10619 22:24:02.090480 arm64_sve-ptrace_Set_SVE_VL_6928 pass
10620 22:24:02.090635 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 skip
10621 22:24:02.090863 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 skip
10622 22:24:02.091050 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 skip
10623 22:24:02.091202 arm64_sve-ptrace_Set_SVE_VL_6944 pass
10624 22:24:02.091321 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 skip
10625 22:24:02.091435 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 skip
10626 22:24:02.091547 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 skip
10627 22:24:02.091658 arm64_sve-ptrace_Set_SVE_VL_6960 pass
10628 22:24:02.091768 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 skip
10629 22:24:02.091879 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 skip
10630 22:24:02.091990 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 skip
10631 22:24:02.092101 arm64_sve-ptrace_Set_SVE_VL_6976 pass
10632 22:24:02.092242 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 skip
10633 22:24:02.092361 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 skip
10634 22:24:02.092475 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 skip
10635 22:24:02.092588 arm64_sve-ptrace_Set_SVE_VL_6992 pass
10636 22:24:02.095205 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 skip
10637 22:24:02.095698 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 skip
10638 22:24:02.095917 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 skip
10639 22:24:02.096143 arm64_sve-ptrace_Set_SVE_VL_7008 pass
10640 22:24:02.096677 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 skip
10641 22:24:02.096917 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 skip
10642 22:24:02.097113 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 skip
10643 22:24:02.097318 arm64_sve-ptrace_Set_SVE_VL_7024 pass
10644 22:24:02.097500 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 skip
10645 22:24:02.097674 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 skip
10646 22:24:02.097873 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 skip
10647 22:24:02.098042 arm64_sve-ptrace_Set_SVE_VL_7040 pass
10648 22:24:02.098207 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 skip
10649 22:24:02.098369 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 skip
10650 22:24:02.098530 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 skip
10651 22:24:02.098687 arm64_sve-ptrace_Set_SVE_VL_7056 pass
10652 22:24:02.098845 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 skip
10653 22:24:02.099040 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 skip
10654 22:24:02.099190 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 skip
10655 22:24:02.099314 arm64_sve-ptrace_Set_SVE_VL_7072 pass
10656 22:24:02.099432 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 skip
10657 22:24:02.099548 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 skip
10658 22:24:02.099662 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 skip
10659 22:24:02.099784 arm64_sve-ptrace_Set_SVE_VL_7088 pass
10660 22:24:02.099898 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 skip
10661 22:24:02.100011 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 skip
10662 22:24:02.100124 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 skip
10663 22:24:02.100241 arm64_sve-ptrace_Set_SVE_VL_7104 pass
10664 22:24:02.103231 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 skip
10665 22:24:02.103549 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 skip
10666 22:24:02.103658 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 skip
10667 22:24:02.103747 arm64_sve-ptrace_Set_SVE_VL_7120 pass
10668 22:24:02.103850 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 skip
10669 22:24:02.103952 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 skip
10670 22:24:02.104266 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 skip
10671 22:24:02.104370 arm64_sve-ptrace_Set_SVE_VL_7136 pass
10672 22:24:02.104459 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 skip
10673 22:24:02.104597 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 skip
10674 22:24:02.104715 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 skip
10675 22:24:02.105009 arm64_sve-ptrace_Set_SVE_VL_7152 pass
10676 22:24:02.105142 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 skip
10677 22:24:02.105250 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 skip
10678 22:24:02.105382 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 skip
10679 22:24:02.105511 arm64_sve-ptrace_Set_SVE_VL_7168 pass
10680 22:24:02.105881 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 skip
10681 22:24:02.106099 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 skip
10682 22:24:02.106323 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 skip
10683 22:24:02.106509 arm64_sve-ptrace_Set_SVE_VL_7184 pass
10684 22:24:02.106700 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 skip
10685 22:24:02.106931 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 skip
10686 22:24:02.107102 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 skip
10687 22:24:02.107237 arm64_sve-ptrace_Set_SVE_VL_7200 pass
10688 22:24:02.107355 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 skip
10689 22:24:02.107467 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 skip
10690 22:24:02.107607 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 skip
10691 22:24:02.111188 arm64_sve-ptrace_Set_SVE_VL_7216 pass
10692 22:24:02.111706 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 skip
10693 22:24:02.111929 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 skip
10694 22:24:02.112073 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 skip
10695 22:24:02.112197 arm64_sve-ptrace_Set_SVE_VL_7232 pass
10696 22:24:02.112350 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 skip
10697 22:24:02.112476 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 skip
10698 22:24:02.112643 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 skip
10699 22:24:02.112821 arm64_sve-ptrace_Set_SVE_VL_7248 pass
10700 22:24:02.112979 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 skip
10701 22:24:02.113164 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 skip
10702 22:24:02.113329 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 skip
10703 22:24:02.113492 arm64_sve-ptrace_Set_SVE_VL_7264 pass
10704 22:24:02.113640 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 skip
10705 22:24:02.113814 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 skip
10706 22:24:02.113975 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 skip
10707 22:24:02.114173 arm64_sve-ptrace_Set_SVE_VL_7280 pass
10708 22:24:02.114401 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 skip
10709 22:24:02.114589 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 skip
10710 22:24:02.114758 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 skip
10711 22:24:02.114931 arm64_sve-ptrace_Set_SVE_VL_7296 pass
10712 22:24:02.115110 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 skip
10713 22:24:02.115266 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 skip
10714 22:24:02.115388 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 skip
10715 22:24:02.115503 arm64_sve-ptrace_Set_SVE_VL_7312 pass
10716 22:24:02.115619 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 skip
10717 22:24:02.115734 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 skip
10718 22:24:02.115849 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 skip
10719 22:24:02.115964 arm64_sve-ptrace_Set_SVE_VL_7328 pass
10720 22:24:02.116078 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 skip
10721 22:24:02.119445 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 skip
10722 22:24:02.119879 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 skip
10723 22:24:02.120039 arm64_sve-ptrace_Set_SVE_VL_7344 pass
10724 22:24:02.120168 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 skip
10725 22:24:02.120295 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 skip
10726 22:24:02.120442 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 skip
10727 22:24:02.120570 arm64_sve-ptrace_Set_SVE_VL_7360 pass
10728 22:24:02.120694 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 skip
10729 22:24:02.120815 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 skip
10730 22:24:02.120963 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 skip
10731 22:24:02.121089 arm64_sve-ptrace_Set_SVE_VL_7376 pass
10732 22:24:02.121210 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 skip
10733 22:24:02.121334 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 skip
10734 22:24:02.121482 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 skip
10735 22:24:02.121610 arm64_sve-ptrace_Set_SVE_VL_7392 pass
10736 22:24:02.121760 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 skip
10737 22:24:02.121887 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 skip
10738 22:24:02.122034 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 skip
10739 22:24:02.122161 arm64_sve-ptrace_Set_SVE_VL_7408 pass
10740 22:24:02.122282 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 skip
10741 22:24:02.122407 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 skip
10742 22:24:02.122535 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 skip
10743 22:24:02.122687 arm64_sve-ptrace_Set_SVE_VL_7424 pass
10744 22:24:02.122816 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 skip
10745 22:24:02.122942 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 skip
10746 22:24:02.123064 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 skip
10747 22:24:02.123180 arm64_sve-ptrace_Set_SVE_VL_7440 pass
10748 22:24:02.123320 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 skip
10749 22:24:02.123440 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 skip
10750 22:24:02.123554 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 skip
10751 22:24:02.127169 arm64_sve-ptrace_Set_SVE_VL_7456 pass
10752 22:24:02.127603 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 skip
10753 22:24:02.127834 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 skip
10754 22:24:02.128035 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 skip
10755 22:24:02.128248 arm64_sve-ptrace_Set_SVE_VL_7472 pass
10756 22:24:02.128421 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 skip
10757 22:24:02.128600 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 skip
10758 22:24:02.128767 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 skip
10759 22:24:02.128902 arm64_sve-ptrace_Set_SVE_VL_7488 pass
10760 22:24:02.129047 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 skip
10761 22:24:02.129170 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 skip
10762 22:24:02.129311 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 skip
10763 22:24:02.129472 arm64_sve-ptrace_Set_SVE_VL_7504 pass
10764 22:24:02.140934 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 skip
10765 22:24:02.141376 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 skip
10766 22:24:02.141486 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 skip
10767 22:24:02.141601 arm64_sve-ptrace_Set_SVE_VL_7520 pass
10768 22:24:02.141712 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 skip
10769 22:24:02.141840 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 skip
10770 22:24:02.141940 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 skip
10771 22:24:02.142030 arm64_sve-ptrace_Set_SVE_VL_7536 pass
10772 22:24:02.142125 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 skip
10773 22:24:02.142199 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 skip
10774 22:24:02.142296 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 skip
10775 22:24:02.142586 arm64_sve-ptrace_Set_SVE_VL_7552 pass
10776 22:24:02.142687 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 skip
10777 22:24:02.142815 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 skip
10778 22:24:02.142899 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 skip
10779 22:24:02.142990 arm64_sve-ptrace_Set_SVE_VL_7568 pass
10780 22:24:02.143075 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 skip
10781 22:24:02.143527 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 skip
10782 22:24:02.143641 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 skip
10783 22:24:02.143732 arm64_sve-ptrace_Set_SVE_VL_7584 pass
10784 22:24:02.143839 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 skip
10785 22:24:02.143927 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 skip
10786 22:24:02.144201 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 skip
10787 22:24:02.144290 arm64_sve-ptrace_Set_SVE_VL_7600 pass
10788 22:24:02.144404 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 skip
10789 22:24:02.144515 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 skip
10790 22:24:02.144600 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 skip
10791 22:24:02.144702 arm64_sve-ptrace_Set_SVE_VL_7616 pass
10792 22:24:02.144814 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 skip
10793 22:24:02.145139 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 skip
10794 22:24:02.145242 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 skip
10795 22:24:02.145343 arm64_sve-ptrace_Set_SVE_VL_7632 pass
10796 22:24:02.145439 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 skip
10797 22:24:02.145531 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 skip
10798 22:24:02.145615 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 skip
10799 22:24:02.145900 arm64_sve-ptrace_Set_SVE_VL_7648 pass
10800 22:24:02.145987 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 skip
10801 22:24:02.146081 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 skip
10802 22:24:02.146166 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 skip
10803 22:24:02.146250 arm64_sve-ptrace_Set_SVE_VL_7664 pass
10804 22:24:02.146522 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 skip
10805 22:24:02.146620 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 skip
10806 22:24:02.146693 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 skip
10807 22:24:02.146782 arm64_sve-ptrace_Set_SVE_VL_7680 pass
10808 22:24:02.146866 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 skip
10809 22:24:02.146951 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 skip
10810 22:24:02.151312 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 skip
10811 22:24:02.151412 arm64_sve-ptrace_Set_SVE_VL_7696 pass
10812 22:24:02.151674 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 skip
10813 22:24:02.151759 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 skip
10814 22:24:02.151848 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 skip
10815 22:24:02.152128 arm64_sve-ptrace_Set_SVE_VL_7712 pass
10816 22:24:02.152210 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 skip
10817 22:24:02.152289 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 skip
10818 22:24:02.152381 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 skip
10819 22:24:02.152451 arm64_sve-ptrace_Set_SVE_VL_7728 pass
10820 22:24:02.152524 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 skip
10821 22:24:02.152614 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 skip
10822 22:24:02.152685 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 skip
10823 22:24:02.152759 arm64_sve-ptrace_Set_SVE_VL_7744 pass
10824 22:24:02.152847 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 skip
10825 22:24:02.152931 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 skip
10826 22:24:02.153017 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 skip
10827 22:24:02.153088 arm64_sve-ptrace_Set_SVE_VL_7760 pass
10828 22:24:02.153186 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 skip
10829 22:24:02.153279 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 skip
10830 22:24:02.153362 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 skip
10831 22:24:02.153447 arm64_sve-ptrace_Set_SVE_VL_7776 pass
10832 22:24:02.153540 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 skip
10833 22:24:02.153638 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 skip
10834 22:24:02.153909 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 skip
10835 22:24:02.153991 arm64_sve-ptrace_Set_SVE_VL_7792 pass
10836 22:24:02.154067 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 skip
10837 22:24:02.154155 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 skip
10838 22:24:02.154227 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 skip
10839 22:24:02.154317 arm64_sve-ptrace_Set_SVE_VL_7808 pass
10840 22:24:02.154387 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 skip
10841 22:24:02.154475 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 skip
10842 22:24:02.154560 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 skip
10843 22:24:02.154645 arm64_sve-ptrace_Set_SVE_VL_7824 pass
10844 22:24:02.154874 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 skip
10845 22:24:02.155000 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 skip
10846 22:24:02.155096 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 skip
10847 22:24:02.159359 arm64_sve-ptrace_Set_SVE_VL_7840 pass
10848 22:24:02.159440 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 skip
10849 22:24:02.159553 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 skip
10850 22:24:02.159647 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 skip
10851 22:24:02.159768 arm64_sve-ptrace_Set_SVE_VL_7856 pass
10852 22:24:02.159870 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 skip
10853 22:24:02.159958 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 skip
10854 22:24:02.160037 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 skip
10855 22:24:02.160126 arm64_sve-ptrace_Set_SVE_VL_7872 pass
10856 22:24:02.160205 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 skip
10857 22:24:02.160455 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 skip
10858 22:24:02.160539 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 skip
10859 22:24:02.160616 arm64_sve-ptrace_Set_SVE_VL_7888 pass
10860 22:24:02.160705 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 skip
10861 22:24:02.160780 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 skip
10862 22:24:02.160856 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 skip
10863 22:24:02.160945 arm64_sve-ptrace_Set_SVE_VL_7904 pass
10864 22:24:02.161038 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 skip
10865 22:24:02.161121 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 skip
10866 22:24:02.161369 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 skip
10867 22:24:02.161441 arm64_sve-ptrace_Set_SVE_VL_7920 pass
10868 22:24:02.161516 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 skip
10869 22:24:02.161590 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 skip
10870 22:24:02.161690 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 skip
10871 22:24:02.161947 arm64_sve-ptrace_Set_SVE_VL_7936 pass
10872 22:24:02.162018 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 skip
10873 22:24:02.162094 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 skip
10874 22:24:02.162170 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 skip
10875 22:24:02.162247 arm64_sve-ptrace_Set_SVE_VL_7952 pass
10876 22:24:02.162322 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 skip
10877 22:24:02.162400 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 skip
10878 22:24:02.162646 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 skip
10879 22:24:02.162728 arm64_sve-ptrace_Set_SVE_VL_7968 pass
10880 22:24:02.162793 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 skip
10881 22:24:02.162869 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 skip
10882 22:24:02.163142 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 skip
10883 22:24:02.163219 arm64_sve-ptrace_Set_SVE_VL_7984 pass
10884 22:24:02.167261 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 skip
10885 22:24:02.167554 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 skip
10886 22:24:02.167656 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 skip
10887 22:24:02.167739 arm64_sve-ptrace_Set_SVE_VL_8000 pass
10888 22:24:02.167847 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 skip
10889 22:24:02.167942 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 skip
10890 22:24:02.168066 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 skip
10891 22:24:02.168161 arm64_sve-ptrace_Set_SVE_VL_8016 pass
10892 22:24:02.168243 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 skip
10893 22:24:02.168326 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 skip
10894 22:24:02.168393 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 skip
10895 22:24:02.168469 arm64_sve-ptrace_Set_SVE_VL_8032 pass
10896 22:24:02.168536 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 skip
10897 22:24:02.168644 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 skip
10898 22:24:02.168745 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 skip
10899 22:24:02.168832 arm64_sve-ptrace_Set_SVE_VL_8048 pass
10900 22:24:02.168909 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 skip
10901 22:24:02.168985 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 skip
10902 22:24:02.169239 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 skip
10903 22:24:02.169317 arm64_sve-ptrace_Set_SVE_VL_8064 pass
10904 22:24:02.169415 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 skip
10905 22:24:02.169507 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 skip
10906 22:24:02.169621 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 skip
10907 22:24:02.169733 arm64_sve-ptrace_Set_SVE_VL_8080 pass
10908 22:24:02.169849 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 skip
10909 22:24:02.169966 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 skip
10910 22:24:02.170085 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 skip
10911 22:24:02.170179 arm64_sve-ptrace_Set_SVE_VL_8096 pass
10912 22:24:02.170262 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 skip
10913 22:24:02.170340 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 skip
10914 22:24:02.170589 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 skip
10915 22:24:02.170657 arm64_sve-ptrace_Set_SVE_VL_8112 pass
10916 22:24:02.170735 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 skip
10917 22:24:02.170810 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 skip
10918 22:24:02.170885 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 skip
10919 22:24:02.170990 arm64_sve-ptrace_Set_SVE_VL_8128 pass
10920 22:24:02.175204 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 skip
10921 22:24:02.175496 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 skip
10922 22:24:02.175575 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 skip
10923 22:24:02.175640 arm64_sve-ptrace_Set_SVE_VL_8144 pass
10924 22:24:02.187721 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 skip
10925 22:24:02.187922 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 skip
10926 22:24:02.188346 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 skip
10927 22:24:02.188553 arm64_sve-ptrace_Set_SVE_VL_8160 pass
10928 22:24:02.188730 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 skip
10929 22:24:02.188893 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 skip
10930 22:24:02.189034 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 skip
10931 22:24:02.189231 arm64_sve-ptrace_Set_SVE_VL_8176 pass
10932 22:24:02.189398 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 skip
10933 22:24:02.189568 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 skip
10934 22:24:02.189748 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 skip
10935 22:24:02.189916 arm64_sve-ptrace_Set_SVE_VL_8192 pass
10936 22:24:02.190078 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 skip
10937 22:24:02.190241 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 skip
10938 22:24:02.190437 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 skip
10939 22:24:02.190612 arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 pass
10940 22:24:02.190772 arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state pass
10941 22:24:02.190934 arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set pass
10942 22:24:02.191134 arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared pass
10943 22:24:02.191282 arm64_sve-ptrace_Set_Streaming_SVE_VL_16 pass
10944 22:24:02.191404 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 pass
10945 22:24:02.191521 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 pass
10946 22:24:02.191666 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 pass
10947 22:24:02.191790 arm64_sve-ptrace_Set_Streaming_SVE_VL_32 pass
10948 22:24:02.191908 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 pass
10949 22:24:02.192024 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 pass
10950 22:24:02.192139 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 pass
10951 22:24:02.195230 arm64_sve-ptrace_Set_Streaming_SVE_VL_48 pass
10952 22:24:02.195619 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 skip
10953 22:24:02.195783 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 skip
10954 22:24:02.195909 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 skip
10955 22:24:02.196062 arm64_sve-ptrace_Set_Streaming_SVE_VL_64 pass
10956 22:24:02.196190 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 pass
10957 22:24:02.196320 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 pass
10958 22:24:02.196447 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 pass
10959 22:24:02.196599 arm64_sve-ptrace_Set_Streaming_SVE_VL_80 pass
10960 22:24:02.196731 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 skip
10961 22:24:02.196859 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 skip
10962 22:24:02.196983 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 skip
10963 22:24:02.197109 arm64_sve-ptrace_Set_Streaming_SVE_VL_96 pass
10964 22:24:02.197261 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 skip
10965 22:24:02.197392 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 skip
10966 22:24:02.197519 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 skip
10967 22:24:02.197645 arm64_sve-ptrace_Set_Streaming_SVE_VL_112 pass
10968 22:24:02.197787 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 skip
10969 22:24:02.197940 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 skip
10970 22:24:02.198070 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 skip
10971 22:24:02.198199 arm64_sve-ptrace_Set_Streaming_SVE_VL_128 pass
10972 22:24:02.198323 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 pass
10973 22:24:02.198448 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 pass
10974 22:24:02.198571 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 pass
10975 22:24:02.198723 arm64_sve-ptrace_Set_Streaming_SVE_VL_144 pass
10976 22:24:02.198852 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 skip
10977 22:24:02.199024 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 skip
10978 22:24:02.199205 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 skip
10979 22:24:02.199339 arm64_sve-ptrace_Set_Streaming_SVE_VL_160 pass
10980 22:24:02.199457 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 skip
10981 22:24:02.199578 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 skip
10982 22:24:02.199719 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 skip
10983 22:24:02.199843 arm64_sve-ptrace_Set_Streaming_SVE_VL_176 pass
10984 22:24:02.200167 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 skip
10985 22:24:02.203316 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 skip
10986 22:24:02.203429 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 skip
10987 22:24:02.203705 arm64_sve-ptrace_Set_Streaming_SVE_VL_192 pass
10988 22:24:02.203876 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 skip
10989 22:24:02.204053 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 skip
10990 22:24:02.204223 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 skip
10991 22:24:02.204442 arm64_sve-ptrace_Set_Streaming_SVE_VL_208 pass
10992 22:24:02.204677 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 skip
10993 22:24:02.204883 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 skip
10994 22:24:02.205052 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 skip
10995 22:24:02.205206 arm64_sve-ptrace_Set_Streaming_SVE_VL_224 pass
10996 22:24:02.205406 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 skip
10997 22:24:02.205580 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 skip
10998 22:24:02.205759 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 skip
10999 22:24:02.205921 arm64_sve-ptrace_Set_Streaming_SVE_VL_240 pass
11000 22:24:02.206086 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 skip
11001 22:24:02.206274 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 skip
11002 22:24:02.206485 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 skip
11003 22:24:02.206667 arm64_sve-ptrace_Set_Streaming_SVE_VL_256 pass
11004 22:24:02.206822 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 pass
11005 22:24:02.207302 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 pass
11006 22:24:02.207409 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 pass
11007 22:24:02.207526 arm64_sve-ptrace_Set_Streaming_SVE_VL_272 pass
11008 22:24:02.207620 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 skip
11009 22:24:02.207711 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 skip
11010 22:24:02.207800 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 skip
11011 22:24:02.211168 arm64_sve-ptrace_Set_Streaming_SVE_VL_288 pass
11012 22:24:02.211492 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 skip
11013 22:24:02.211596 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 skip
11014 22:24:02.211711 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 skip
11015 22:24:02.212025 arm64_sve-ptrace_Set_Streaming_SVE_VL_304 pass
11016 22:24:02.212181 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 skip
11017 22:24:02.212332 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 skip
11018 22:24:02.212541 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 skip
11019 22:24:02.212741 arm64_sve-ptrace_Set_Streaming_SVE_VL_320 pass
11020 22:24:02.212957 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 skip
11021 22:24:02.213176 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 skip
11022 22:24:02.213444 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 skip
11023 22:24:02.213661 arm64_sve-ptrace_Set_Streaming_SVE_VL_336 pass
11024 22:24:02.213882 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 skip
11025 22:24:02.214090 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 skip
11026 22:24:02.214341 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 skip
11027 22:24:02.214549 arm64_sve-ptrace_Set_Streaming_SVE_VL_352 pass
11028 22:24:02.214762 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 skip
11029 22:24:02.214949 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 skip
11030 22:24:02.215146 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 skip
11031 22:24:02.215285 arm64_sve-ptrace_Set_Streaming_SVE_VL_368 pass
11032 22:24:02.215405 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 skip
11033 22:24:02.215554 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 skip
11034 22:24:02.215679 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 skip
11035 22:24:02.215797 arm64_sve-ptrace_Set_Streaming_SVE_VL_384 pass
11036 22:24:02.215914 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 skip
11037 22:24:02.216030 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 skip
11038 22:24:02.219188 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 skip
11039 22:24:02.219488 arm64_sve-ptrace_Set_Streaming_SVE_VL_400 pass
11040 22:24:02.219587 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 skip
11041 22:24:02.219691 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 skip
11042 22:24:02.219794 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 skip
11043 22:24:02.220093 arm64_sve-ptrace_Set_Streaming_SVE_VL_416 pass
11044 22:24:02.220199 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 skip
11045 22:24:02.220305 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 skip
11046 22:24:02.220418 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 skip
11047 22:24:02.220715 arm64_sve-ptrace_Set_Streaming_SVE_VL_432 pass
11048 22:24:02.220831 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 skip
11049 22:24:02.220958 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 skip
11050 22:24:02.221239 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 skip
11051 22:24:02.221345 arm64_sve-ptrace_Set_Streaming_SVE_VL_448 pass
11052 22:24:02.221446 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 skip
11053 22:24:02.221552 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 skip
11054 22:24:02.221863 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 skip
11055 22:24:02.221972 arm64_sve-ptrace_Set_Streaming_SVE_VL_464 pass
11056 22:24:02.222275 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 skip
11057 22:24:02.222378 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 skip
11058 22:24:02.222482 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 skip
11059 22:24:02.222594 arm64_sve-ptrace_Set_Streaming_SVE_VL_480 pass
11060 22:24:02.222773 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 skip
11061 22:24:02.235798 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 skip
11062 22:24:02.236107 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 skip
11063 22:24:02.236244 arm64_sve-ptrace_Set_Streaming_SVE_VL_496 pass
11064 22:24:02.236358 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 skip
11065 22:24:02.236450 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 skip
11066 22:24:02.236550 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 skip
11067 22:24:02.236875 arm64_sve-ptrace_Set_Streaming_SVE_VL_512 pass
11068 22:24:02.236980 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 skip
11069 22:24:02.237082 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 skip
11070 22:24:02.237368 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 skip
11071 22:24:02.237461 arm64_sve-ptrace_Set_Streaming_SVE_VL_528 pass
11072 22:24:02.237562 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 skip
11073 22:24:02.237676 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 skip
11074 22:24:02.237765 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 skip
11075 22:24:02.237862 arm64_sve-ptrace_Set_Streaming_SVE_VL_544 pass
11076 22:24:02.237960 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 skip
11077 22:24:02.238255 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 skip
11078 22:24:02.238362 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 skip
11079 22:24:02.238462 arm64_sve-ptrace_Set_Streaming_SVE_VL_560 pass
11080 22:24:02.238561 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 skip
11081 22:24:02.238659 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 skip
11082 22:24:02.238968 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 skip
11083 22:24:02.239072 arm64_sve-ptrace_Set_Streaming_SVE_VL_576 pass
11084 22:24:02.243208 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 skip
11085 22:24:02.243525 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 skip
11086 22:24:02.243629 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 skip
11087 22:24:02.243733 arm64_sve-ptrace_Set_Streaming_SVE_VL_592 pass
11088 22:24:02.243819 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 skip
11089 22:24:02.244005 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 skip
11090 22:24:02.244125 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 skip
11091 22:24:02.244213 arm64_sve-ptrace_Set_Streaming_SVE_VL_608 pass
11092 22:24:02.244527 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 skip
11093 22:24:02.244663 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 skip
11094 22:24:02.244765 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 skip
11095 22:24:02.245061 arm64_sve-ptrace_Set_Streaming_SVE_VL_624 pass
11096 22:24:02.245166 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 skip
11097 22:24:02.245266 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 skip
11098 22:24:02.245365 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 skip
11099 22:24:02.245450 arm64_sve-ptrace_Set_Streaming_SVE_VL_640 pass
11100 22:24:02.245548 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 skip
11101 22:24:02.245655 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 skip
11102 22:24:02.245897 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 skip
11103 22:24:02.246018 arm64_sve-ptrace_Set_Streaming_SVE_VL_656 pass
11104 22:24:02.246118 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 skip
11105 22:24:02.246506 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 skip
11106 22:24:02.246611 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 skip
11107 22:24:02.246709 arm64_sve-ptrace_Set_Streaming_SVE_VL_672 pass
11108 22:24:02.246974 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 skip
11109 22:24:02.247063 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 skip
11110 22:24:02.251216 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 skip
11111 22:24:02.251514 arm64_sve-ptrace_Set_Streaming_SVE_VL_688 pass
11112 22:24:02.251647 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 skip
11113 22:24:02.251754 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 skip
11114 22:24:02.251861 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 skip
11115 22:24:02.252168 arm64_sve-ptrace_Set_Streaming_SVE_VL_704 pass
11116 22:24:02.252273 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 skip
11117 22:24:02.252377 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 skip
11118 22:24:02.252682 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 skip
11119 22:24:02.252788 arm64_sve-ptrace_Set_Streaming_SVE_VL_720 pass
11120 22:24:02.252891 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 skip
11121 22:24:02.252980 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 skip
11122 22:24:02.253080 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 skip
11123 22:24:02.253169 arm64_sve-ptrace_Set_Streaming_SVE_VL_736 pass
11124 22:24:02.253268 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 skip
11125 22:24:02.253367 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 skip
11126 22:24:02.253466 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 skip
11127 22:24:02.253565 arm64_sve-ptrace_Set_Streaming_SVE_VL_752 pass
11128 22:24:02.253673 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 skip
11129 22:24:02.253775 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 skip
11130 22:24:02.254074 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 skip
11131 22:24:02.254180 arm64_sve-ptrace_Set_Streaming_SVE_VL_768 pass
11132 22:24:02.254280 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 skip
11133 22:24:02.254367 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 skip
11134 22:24:02.254465 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 skip
11135 22:24:02.254550 arm64_sve-ptrace_Set_Streaming_SVE_VL_784 pass
11136 22:24:02.254651 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 skip
11137 22:24:02.254736 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 skip
11138 22:24:02.254834 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 skip
11139 22:24:02.254933 arm64_sve-ptrace_Set_Streaming_SVE_VL_800 pass
11140 22:24:02.255030 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 skip
11141 22:24:02.259326 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 skip
11142 22:24:02.259706 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 skip
11143 22:24:02.259800 arm64_sve-ptrace_Set_Streaming_SVE_VL_816 pass
11144 22:24:02.259886 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 skip
11145 22:24:02.259971 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 skip
11146 22:24:02.260071 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 skip
11147 22:24:02.260158 arm64_sve-ptrace_Set_Streaming_SVE_VL_832 pass
11148 22:24:02.260244 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 skip
11149 22:24:02.260346 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 skip
11150 22:24:02.260433 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 skip
11151 22:24:02.260519 arm64_sve-ptrace_Set_Streaming_SVE_VL_848 pass
11152 22:24:02.260620 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 skip
11153 22:24:02.260708 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 skip
11154 22:24:02.260795 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 skip
11155 22:24:02.260898 arm64_sve-ptrace_Set_Streaming_SVE_VL_864 pass
11156 22:24:02.260986 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 skip
11157 22:24:02.261085 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 skip
11158 22:24:02.261173 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 skip
11159 22:24:02.261273 arm64_sve-ptrace_Set_Streaming_SVE_VL_880 pass
11160 22:24:02.261360 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 skip
11161 22:24:02.261654 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 skip
11162 22:24:02.261747 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 skip
11163 22:24:02.261834 arm64_sve-ptrace_Set_Streaming_SVE_VL_896 pass
11164 22:24:02.261934 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 skip
11165 22:24:02.262021 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 skip
11166 22:24:02.262121 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 skip
11167 22:24:02.262208 arm64_sve-ptrace_Set_Streaming_SVE_VL_912 pass
11168 22:24:02.262307 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 skip
11169 22:24:02.262395 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 skip
11170 22:24:02.262493 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 skip
11171 22:24:02.262594 arm64_sve-ptrace_Set_Streaming_SVE_VL_928 pass
11172 22:24:02.262681 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 skip
11173 22:24:02.262780 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 skip
11174 22:24:02.262880 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 skip
11175 22:24:02.262982 arm64_sve-ptrace_Set_Streaming_SVE_VL_944 pass
11176 22:24:02.263070 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 skip
11177 22:24:02.267427 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 skip
11178 22:24:02.267558 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 skip
11179 22:24:02.267676 arm64_sve-ptrace_Set_Streaming_SVE_VL_960 pass
11180 22:24:02.267992 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 skip
11181 22:24:02.268099 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 skip
11182 22:24:02.268218 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 skip
11183 22:24:02.268333 arm64_sve-ptrace_Set_Streaming_SVE_VL_976 pass
11184 22:24:02.268640 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 skip
11185 22:24:02.268743 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 skip
11186 22:24:02.268852 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 skip
11187 22:24:02.269145 arm64_sve-ptrace_Set_Streaming_SVE_VL_992 pass
11188 22:24:02.269238 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 skip
11189 22:24:02.269324 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 skip
11190 22:24:02.269580 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 skip
11191 22:24:02.269671 arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 pass
11192 22:24:02.269761 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 skip
11193 22:24:02.270040 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 skip
11194 22:24:02.270134 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 skip
11195 22:24:02.270233 arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 pass
11196 22:24:02.270305 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 skip
11197 22:24:02.283793 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 skip
11198 22:24:02.284099 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 skip
11199 22:24:02.284187 arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 pass
11200 22:24:02.284298 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 skip
11201 22:24:02.284386 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 skip
11202 22:24:02.284496 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 skip
11203 22:24:02.284600 arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 pass
11204 22:24:02.284733 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 skip
11205 22:24:02.285043 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 skip
11206 22:24:02.285148 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 skip
11207 22:24:02.285249 arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 pass
11208 22:24:02.285336 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 skip
11209 22:24:02.285436 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 skip
11210 22:24:02.285696 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 skip
11211 22:24:02.285790 arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 pass
11212 22:24:02.285864 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 skip
11213 22:24:02.285960 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 skip
11214 22:24:02.286057 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 skip
11215 22:24:02.286150 arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 pass
11216 22:24:02.286433 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 skip
11217 22:24:02.286529 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 skip
11218 22:24:02.286599 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 skip
11219 22:24:02.286674 arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 pass
11220 22:24:02.286750 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 skip
11221 22:24:02.286825 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 skip
11222 22:24:02.291199 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 skip
11223 22:24:02.291578 arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 pass
11224 22:24:02.291794 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 skip
11225 22:24:02.292016 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 skip
11226 22:24:02.292253 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 skip
11227 22:24:02.292466 arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 pass
11228 22:24:02.292673 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 skip
11229 22:24:02.292881 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 skip
11230 22:24:02.293140 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 skip
11231 22:24:02.293462 arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 pass
11232 22:24:02.293664 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 skip
11233 22:24:02.293831 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 skip
11234 22:24:02.293976 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 skip
11235 22:24:02.294150 arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 pass
11236 22:24:02.294330 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 skip
11237 22:24:02.294487 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 skip
11238 22:24:02.294653 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 skip
11239 22:24:02.294868 arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 pass
11240 22:24:02.295039 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 skip
11241 22:24:02.295172 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 skip
11242 22:24:02.295289 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 skip
11243 22:24:02.295403 arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 pass
11244 22:24:02.295517 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 skip
11245 22:24:02.295634 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 skip
11246 22:24:02.295749 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 skip
11247 22:24:02.295863 arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 pass
11248 22:24:02.295977 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 skip
11249 22:24:02.296092 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 skip
11250 22:24:02.296232 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 skip
11251 22:24:02.299198 arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 pass
11252 22:24:02.299594 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 skip
11253 22:24:02.299705 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 skip
11254 22:24:02.299813 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 skip
11255 22:24:02.299901 arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 pass
11256 22:24:02.300003 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 skip
11257 22:24:02.300106 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 skip
11258 22:24:02.300404 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 skip
11259 22:24:02.300520 arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 pass
11260 22:24:02.300624 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 skip
11261 22:24:02.300909 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 skip
11262 22:24:02.301024 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 skip
11263 22:24:02.301127 arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 pass
11264 22:24:02.301444 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 skip
11265 22:24:02.301641 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 skip
11266 22:24:02.301837 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 skip
11267 22:24:02.302035 arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 pass
11268 22:24:02.302255 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 skip
11269 22:24:02.302509 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 skip
11270 22:24:02.302685 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 skip
11271 22:24:02.302808 arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 pass
11272 22:24:02.302987 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 skip
11273 22:24:02.303139 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 skip
11274 22:24:02.303258 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 skip
11275 22:24:02.303396 arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 pass
11276 22:24:02.307201 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 skip
11277 22:24:02.307486 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 skip
11278 22:24:02.307590 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 skip
11279 22:24:02.307694 arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 pass
11280 22:24:02.307796 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 skip
11281 22:24:02.308089 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 skip
11282 22:24:02.308184 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 skip
11283 22:24:02.308286 arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 pass
11284 22:24:02.308388 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 skip
11285 22:24:02.308499 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 skip
11286 22:24:02.308800 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 skip
11287 22:24:02.308918 arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 pass
11288 22:24:02.309022 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 skip
11289 22:24:02.309330 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 skip
11290 22:24:02.309449 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 skip
11291 22:24:02.309552 arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 pass
11292 22:24:02.309659 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 skip
11293 22:24:02.309961 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 skip
11294 22:24:02.310066 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 skip
11295 22:24:02.310153 arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 pass
11296 22:24:02.310254 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 skip
11297 22:24:02.310342 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 skip
11298 22:24:02.310440 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 skip
11299 22:24:02.310540 arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 pass
11300 22:24:02.310916 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 skip
11301 22:24:02.311082 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 skip
11302 22:24:02.311287 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 skip
11303 22:24:02.315240 arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 pass
11304 22:24:02.315543 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 skip
11305 22:24:02.315647 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 skip
11306 22:24:02.315751 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 skip
11307 22:24:02.315851 arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 pass
11308 22:24:02.316138 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 skip
11309 22:24:02.316231 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 skip
11310 22:24:02.316348 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 skip
11311 22:24:02.316636 arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 pass
11312 22:24:02.316729 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 skip
11313 22:24:02.316829 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 skip
11314 22:24:02.317114 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 skip
11315 22:24:02.317206 arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 pass
11316 22:24:02.317306 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 skip
11317 22:24:02.317406 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 skip
11318 22:24:02.317682 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 skip
11319 22:24:02.317775 arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 pass
11320 22:24:02.317874 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 skip
11321 22:24:02.318158 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 skip
11322 22:24:02.318263 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 skip
11323 22:24:02.318350 arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 pass
11324 22:24:02.318451 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 skip
11325 22:24:02.318910 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 skip
11326 22:24:02.319006 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 skip
11327 22:24:02.319090 arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 pass
11328 22:24:02.319195 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 skip
11329 22:24:02.323186 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 skip
11330 22:24:02.323481 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 skip
11331 22:24:02.332186 arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 pass
11332 22:24:02.332492 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 skip
11333 22:24:02.332595 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 skip
11334 22:24:02.332702 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 skip
11335 22:24:02.332803 arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 pass
11336 22:24:02.333132 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 skip
11337 22:24:02.333323 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 skip
11338 22:24:02.333567 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 skip
11339 22:24:02.333761 arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 pass
11340 22:24:02.333975 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 skip
11341 22:24:02.334180 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 skip
11342 22:24:02.334341 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 skip
11343 22:24:02.334551 arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 pass
11344 22:24:02.334732 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 skip
11345 22:24:02.334960 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 skip
11346 22:24:02.335172 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 skip
11347 22:24:02.335311 arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 pass
11348 22:24:02.335456 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 skip
11349 22:24:02.335599 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 skip
11350 22:24:02.335745 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 skip
11351 22:24:02.339176 arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 pass
11352 22:24:02.339487 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 skip
11353 22:24:02.339605 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 skip
11354 22:24:02.339706 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 skip
11355 22:24:02.339804 arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 pass
11356 22:24:02.339901 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 skip
11357 22:24:02.340280 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 skip
11358 22:24:02.340479 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 skip
11359 22:24:02.340705 arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 pass
11360 22:24:02.340926 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 skip
11361 22:24:02.341089 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 skip
11362 22:24:02.341271 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 skip
11363 22:24:02.341497 arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 pass
11364 22:24:02.341740 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 skip
11365 22:24:02.341960 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 skip
11366 22:24:02.342186 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 skip
11367 22:24:02.342376 arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 pass
11368 22:24:02.342582 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 skip
11369 22:24:02.342761 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 skip
11370 22:24:02.342935 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 skip
11371 22:24:02.343058 arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 pass
11372 22:24:02.343172 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 skip
11373 22:24:02.343314 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 skip
11374 22:24:02.343437 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 skip
11375 22:24:02.347245 arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 pass
11376 22:24:02.347527 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 skip
11377 22:24:02.347630 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 skip
11378 22:24:02.347723 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 skip
11379 22:24:02.348044 arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 pass
11380 22:24:02.348267 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 skip
11381 22:24:02.348431 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 skip
11382 22:24:02.348633 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 skip
11383 22:24:02.348823 arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 pass
11384 22:24:02.349006 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 skip
11385 22:24:02.349169 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 skip
11386 22:24:02.349354 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 skip
11387 22:24:02.349510 arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 pass
11388 22:24:02.349705 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 skip
11389 22:24:02.349875 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 skip
11390 22:24:02.350114 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 skip
11391 22:24:02.350283 arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 pass
11392 22:24:02.350455 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 skip
11393 22:24:02.350667 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 skip
11394 22:24:02.350837 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 skip
11395 22:24:02.350991 arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 pass
11396 22:24:02.351136 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 skip
11397 22:24:02.351255 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 skip
11398 22:24:02.355519 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 skip
11399 22:24:02.355700 arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 pass
11400 22:24:02.355892 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 skip
11401 22:24:02.356061 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 skip
11402 22:24:02.356269 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 skip
11403 22:24:02.356482 arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 pass
11404 22:24:02.356642 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 skip
11405 22:24:02.356838 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 skip
11406 22:24:02.357005 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 skip
11407 22:24:02.357155 arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 pass
11408 22:24:02.357347 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 skip
11409 22:24:02.357516 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 skip
11410 22:24:02.357690 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 skip
11411 22:24:02.357932 arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 pass
11412 22:24:02.358096 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 skip
11413 22:24:02.358294 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 skip
11414 22:24:02.358554 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 skip
11415 22:24:02.358738 arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 pass
11416 22:24:02.358906 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 skip
11417 22:24:02.359048 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 skip
11418 22:24:02.359189 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 skip
11419 22:24:02.359310 arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 pass
11420 22:24:02.359426 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 skip
11421 22:24:02.363422 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 skip
11422 22:24:02.363553 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 skip
11423 22:24:02.363843 arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 pass
11424 22:24:02.363965 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 skip
11425 22:24:02.364079 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 skip
11426 22:24:02.364388 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 skip
11427 22:24:02.364499 arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 pass
11428 22:24:02.364623 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 skip
11429 22:24:02.364927 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 skip
11430 22:24:02.365039 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 skip
11431 22:24:02.365153 arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 pass
11432 22:24:02.365251 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 skip
11433 22:24:02.365533 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 skip
11434 22:24:02.365622 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 skip
11435 22:24:02.365896 arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 pass
11436 22:24:02.365980 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 skip
11437 22:24:02.366077 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 skip
11438 22:24:02.366367 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 skip
11439 22:24:02.366498 arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 pass
11440 22:24:02.366616 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 skip
11441 22:24:02.366945 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 skip
11442 22:24:02.367232 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 skip
11443 22:24:02.371318 arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 pass
11444 22:24:02.371647 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 skip
11445 22:24:02.371978 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 skip
11446 22:24:02.372342 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 skip
11447 22:24:02.372434 arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 pass
11448 22:24:02.372702 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 skip
11449 22:24:02.373006 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 skip
11450 22:24:02.373108 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 skip
11451 22:24:02.373381 arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 pass
11452 22:24:02.373506 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 skip
11453 22:24:02.373623 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 skip
11454 22:24:02.373951 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 skip
11455 22:24:02.374071 arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 pass
11456 22:24:02.374176 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 skip
11457 22:24:02.374481 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 skip
11458 22:24:02.374854 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 skip
11459 22:24:02.374972 arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 pass
11460 22:24:02.379256 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 skip
11461 22:24:02.379706 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 skip
11462 22:24:02.379874 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 skip
11463 22:24:02.380000 arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 pass
11464 22:24:02.380182 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 skip
11465 22:24:02.389529 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 skip
11466 22:24:02.389982 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 skip
11467 22:24:02.390188 arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 pass
11468 22:24:02.390370 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 skip
11469 22:24:02.390571 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 skip
11470 22:24:02.390741 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 skip
11471 22:24:02.390902 arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 pass
11472 22:24:02.391074 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 skip
11473 22:24:02.391254 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 skip
11474 22:24:02.391408 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 skip
11475 22:24:02.391576 arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 pass
11476 22:24:02.391791 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 skip
11477 22:24:02.392041 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 skip
11478 22:24:02.392202 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 skip
11479 22:24:02.392370 arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 pass
11480 22:24:02.392551 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 skip
11481 22:24:02.392715 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 skip
11482 22:24:02.392952 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 skip
11483 22:24:02.393126 arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 pass
11484 22:24:02.393268 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 skip
11485 22:24:02.393456 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 skip
11486 22:24:02.393625 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 skip
11487 22:24:02.394403 arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 pass
11488 22:24:02.394605 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 skip
11489 22:24:02.394785 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 skip
11490 22:24:02.394925 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 skip
11491 22:24:02.395063 arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 pass
11492 22:24:02.395182 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 skip
11493 22:24:02.395296 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 skip
11494 22:24:02.395409 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 skip
11495 22:24:02.395524 arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 pass
11496 22:24:02.395639 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 skip
11497 22:24:02.395755 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 skip
11498 22:24:02.396104 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 skip
11499 22:24:02.396266 arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 pass
11500 22:24:02.396390 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 skip
11501 22:24:02.396508 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 skip
11502 22:24:02.396624 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 skip
11503 22:24:02.399436 arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 pass
11504 22:24:02.399654 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 skip
11505 22:24:02.399812 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 skip
11506 22:24:02.399996 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 skip
11507 22:24:02.400177 arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 pass
11508 22:24:02.400378 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 skip
11509 22:24:02.400550 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 skip
11510 22:24:02.400750 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 skip
11511 22:24:02.400956 arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 pass
11512 22:24:02.401171 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 skip
11513 22:24:02.401390 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 skip
11514 22:24:02.401600 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 skip
11515 22:24:02.401808 arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 pass
11516 22:24:02.402013 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 skip
11517 22:24:02.402205 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 skip
11518 22:24:02.402462 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 skip
11519 22:24:02.402683 arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 pass
11520 22:24:02.402896 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 skip
11521 22:24:02.403065 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 skip
11522 22:24:02.403188 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 skip
11523 22:24:02.403305 arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 pass
11524 22:24:02.403419 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 skip
11525 22:24:02.403561 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 skip
11526 22:24:02.403684 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 skip
11527 22:24:02.403800 arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 pass
11528 22:24:02.403920 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 skip
11529 22:24:02.407203 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 skip
11530 22:24:02.407656 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 skip
11531 22:24:02.407820 arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 pass
11532 22:24:02.407944 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 skip
11533 22:24:02.408083 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 skip
11534 22:24:02.408449 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 skip
11535 22:24:02.408641 arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 pass
11536 22:24:02.408847 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 skip
11537 22:24:02.409066 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 skip
11538 22:24:02.409278 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 skip
11539 22:24:02.409472 arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 pass
11540 22:24:02.409694 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 skip
11541 22:24:02.409871 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 skip
11542 22:24:02.410038 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 skip
11543 22:24:02.410187 arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 pass
11544 22:24:02.410346 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 skip
11545 22:24:02.410547 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 skip
11546 22:24:02.410717 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 skip
11547 22:24:02.410928 arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 pass
11548 22:24:02.411092 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 skip
11549 22:24:02.411270 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 skip
11550 22:24:02.411397 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 skip
11551 22:24:02.411513 arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 pass
11552 22:24:02.411628 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 skip
11553 22:24:02.411741 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 skip
11554 22:24:02.411854 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 skip
11555 22:24:02.411968 arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 pass
11556 22:24:02.412107 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 skip
11557 22:24:02.415207 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 skip
11558 22:24:02.415698 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 skip
11559 22:24:02.415900 arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 pass
11560 22:24:02.416077 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 skip
11561 22:24:02.416247 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 skip
11562 22:24:02.416434 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 skip
11563 22:24:02.416591 arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 pass
11564 22:24:02.416741 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 skip
11565 22:24:02.416898 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 skip
11566 22:24:02.417047 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 skip
11567 22:24:02.417213 arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 pass
11568 22:24:02.417398 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 skip
11569 22:24:02.417630 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 skip
11570 22:24:02.417873 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 skip
11571 22:24:02.418063 arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 pass
11572 22:24:02.418240 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 skip
11573 22:24:02.418452 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 skip
11574 22:24:02.418617 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 skip
11575 22:24:02.418778 arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 pass
11576 22:24:02.418929 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 skip
11577 22:24:02.419147 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 skip
11578 22:24:02.419303 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 skip
11579 22:24:02.419427 arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 pass
11580 22:24:02.419545 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 skip
11581 22:24:02.419662 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 skip
11582 22:24:02.419781 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 skip
11583 22:24:02.419901 arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 pass
11584 22:24:02.420021 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 skip
11585 22:24:02.420139 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 skip
11586 22:24:02.423198 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 skip
11587 22:24:02.423548 arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 pass
11588 22:24:02.423652 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 skip
11589 22:24:02.423756 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 skip
11590 22:24:02.423857 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 skip
11591 22:24:02.423943 arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 pass
11592 22:24:02.424040 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 skip
11593 22:24:02.424343 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 skip
11594 22:24:02.424445 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 skip
11595 22:24:02.424545 arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 pass
11596 22:24:02.424859 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 skip
11597 22:24:02.424961 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 skip
11598 22:24:02.425060 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 skip
11599 22:24:02.437408 arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 pass
11600 22:24:02.437852 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 skip
11601 22:24:02.438082 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 skip
11602 22:24:02.438255 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 skip
11603 22:24:02.438436 arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 pass
11604 22:24:02.438618 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 skip
11605 22:24:02.438829 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 skip
11606 22:24:02.439012 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 skip
11607 22:24:02.439197 arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 pass
11608 22:24:02.439373 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 skip
11609 22:24:02.439592 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 skip
11610 22:24:02.439776 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 skip
11611 22:24:02.439944 arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 pass
11612 22:24:02.440142 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 skip
11613 22:24:02.440333 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 skip
11614 22:24:02.440592 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 skip
11615 22:24:02.440804 arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 pass
11616 22:24:02.441029 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 skip
11617 22:24:02.441244 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 skip
11618 22:24:02.441467 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 skip
11619 22:24:02.441678 arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 pass
11620 22:24:02.441855 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 skip
11621 22:24:02.442059 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 skip
11622 22:24:02.442219 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 skip
11623 22:24:02.442375 arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 pass
11624 22:24:02.442563 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 skip
11625 22:24:02.442770 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 skip
11626 22:24:02.442946 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 skip
11627 22:24:02.443107 arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 pass
11628 22:24:02.443275 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 skip
11629 22:24:02.443416 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 skip
11630 22:24:02.443561 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 skip
11631 22:24:02.443679 arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 pass
11632 22:24:02.444008 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 skip
11633 22:24:02.444138 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 skip
11634 22:24:02.444256 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 skip
11635 22:24:02.444371 arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 pass
11636 22:24:02.444487 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 skip
11637 22:24:02.444600 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 skip
11638 22:24:02.444714 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 skip
11639 22:24:02.444834 arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 pass
11640 22:24:02.447273 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 skip
11641 22:24:02.447692 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 skip
11642 22:24:02.447794 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 skip
11643 22:24:02.447880 arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 pass
11644 22:24:02.447982 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 skip
11645 22:24:02.448080 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 skip
11646 22:24:02.448380 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 skip
11647 22:24:02.448481 arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 pass
11648 22:24:02.448565 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 skip
11649 22:24:02.448890 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 skip
11650 22:24:02.449088 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 skip
11651 22:24:02.449251 arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 pass
11652 22:24:02.449441 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 skip
11653 22:24:02.449600 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 skip
11654 22:24:02.449774 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 skip
11655 22:24:02.449939 arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 pass
11656 22:24:02.450135 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 skip
11657 22:24:02.450303 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 skip
11658 22:24:02.450452 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 skip
11659 22:24:02.450611 arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 pass
11660 22:24:02.450756 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 skip
11661 22:24:02.450959 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 skip
11662 22:24:02.451118 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 skip
11663 22:24:02.451238 arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 pass
11664 22:24:02.451352 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 skip
11665 22:24:02.451466 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 skip
11666 22:24:02.451605 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 skip
11667 22:24:02.455262 arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 pass
11668 22:24:02.455698 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 skip
11669 22:24:02.455910 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 skip
11670 22:24:02.456064 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 skip
11671 22:24:02.456231 arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 pass
11672 22:24:02.456381 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 skip
11673 22:24:02.456530 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 skip
11674 22:24:02.456700 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 skip
11675 22:24:02.456867 arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 pass
11676 22:24:02.456995 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 skip
11677 22:24:02.457092 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 skip
11678 22:24:02.457200 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 skip
11679 22:24:02.457339 arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 pass
11680 22:24:02.457516 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 skip
11681 22:24:02.457694 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 skip
11682 22:24:02.457850 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 skip
11683 22:24:02.457955 arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 pass
11684 22:24:02.458079 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 skip
11685 22:24:02.458157 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 skip
11686 22:24:02.458223 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 skip
11687 22:24:02.458285 arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 pass
11688 22:24:02.458346 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 skip
11689 22:24:02.458452 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 skip
11690 22:24:02.458552 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 skip
11691 22:24:02.458668 arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 pass
11692 22:24:02.458788 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 skip
11693 22:24:02.458902 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 skip
11694 22:24:02.463192 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 skip
11695 22:24:02.463551 arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 pass
11696 22:24:02.463660 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 skip
11697 22:24:02.463786 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 skip
11698 22:24:02.463918 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 skip
11699 22:24:02.464021 arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 pass
11700 22:24:02.464136 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 skip
11701 22:24:02.464247 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 skip
11702 22:24:02.464338 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 skip
11703 22:24:02.464437 arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 pass
11704 22:24:02.464539 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 skip
11705 22:24:02.464970 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 skip
11706 22:24:02.465078 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 skip
11707 22:24:02.465159 arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 pass
11708 22:24:02.465237 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 skip
11709 22:24:02.465504 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 skip
11710 22:24:02.465606 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 skip
11711 22:24:02.465707 arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 pass
11712 22:24:02.465794 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 skip
11713 22:24:02.465891 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 skip
11714 22:24:02.465977 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 skip
11715 22:24:02.466060 arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 pass
11716 22:24:02.466156 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 skip
11717 22:24:02.466239 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 skip
11718 22:24:02.466320 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 skip
11719 22:24:02.466417 arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 pass
11720 22:24:02.466503 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 skip
11721 22:24:02.466617 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 skip
11722 22:24:02.466911 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 skip
11723 22:24:02.466994 arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 pass
11724 22:24:02.467078 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 skip
11725 22:24:02.467143 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 skip
11726 22:24:02.471171 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 skip
11727 22:24:02.471498 arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 pass
11728 22:24:02.471620 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 skip
11729 22:24:02.471735 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 skip
11730 22:24:02.471821 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 skip
11731 22:24:02.471908 arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 pass
11732 22:24:02.471989 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 skip
11733 22:24:02.485271 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 skip
11734 22:24:02.485729 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 skip
11735 22:24:02.485835 arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 pass
11736 22:24:02.485923 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 skip
11737 22:24:02.486009 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 skip
11738 22:24:02.486109 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 skip
11739 22:24:02.486195 arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 pass
11740 22:24:02.486292 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 skip
11741 22:24:02.486393 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 skip
11742 22:24:02.486689 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 skip
11743 22:24:02.486808 arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 pass
11744 22:24:02.486917 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 skip
11745 22:24:02.487390 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 skip
11746 22:24:02.487499 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 skip
11747 22:24:02.487600 arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 pass
11748 22:24:02.489833 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 skip
11749 22:24:02.490031 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 skip
11750 22:24:02.490119 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 skip
11751 22:24:02.490197 arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 pass
11752 22:24:02.490273 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 skip
11753 22:24:02.490349 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 skip
11754 22:24:02.490425 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 skip
11755 22:24:02.490501 arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 pass
11756 22:24:02.490577 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 skip
11757 22:24:02.490650 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 skip
11758 22:24:02.490726 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 skip
11759 22:24:02.490801 arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 pass
11760 22:24:02.490875 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 skip
11761 22:24:02.491025 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 skip
11762 22:24:02.491326 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 skip
11763 22:24:02.491423 arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 pass
11764 22:24:02.491503 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 skip
11765 22:24:02.491580 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 skip
11766 22:24:02.491655 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 skip
11767 22:24:02.491729 arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 pass
11768 22:24:02.491804 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 skip
11769 22:24:02.491880 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 skip
11770 22:24:02.495432 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 skip
11771 22:24:02.495902 arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 pass
11772 22:24:02.495999 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 skip
11773 22:24:02.496079 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 skip
11774 22:24:02.496367 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 skip
11775 22:24:02.496467 arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 pass
11776 22:24:02.496551 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 skip
11777 22:24:02.496627 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 skip
11778 22:24:02.496718 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 skip
11779 22:24:02.496796 arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 pass
11780 22:24:02.496884 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 skip
11781 22:24:02.496978 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 skip
11782 22:24:02.497066 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 skip
11783 22:24:02.497236 arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 pass
11784 22:24:02.497551 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 skip
11785 22:24:02.497660 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 skip
11786 22:24:02.497752 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 skip
11787 22:24:02.497842 arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 pass
11788 22:24:02.498089 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 skip
11789 22:24:02.498187 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 skip
11790 22:24:02.498277 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 skip
11791 22:24:02.498368 arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 pass
11792 22:24:02.498455 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 skip
11793 22:24:02.498742 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 skip
11794 22:24:02.498874 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 skip
11795 22:24:02.499110 arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 pass
11796 22:24:02.503478 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 skip
11797 22:24:02.504050 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 skip
11798 22:24:02.504147 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 skip
11799 22:24:02.504228 arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 pass
11800 22:24:02.504304 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 skip
11801 22:24:02.504391 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 skip
11802 22:24:02.504468 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 skip
11803 22:24:02.504562 arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 pass
11804 22:24:02.504638 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 skip
11805 22:24:02.504728 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 skip
11806 22:24:02.505073 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 skip
11807 22:24:02.505172 arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 pass
11808 22:24:02.505261 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 skip
11809 22:24:02.505534 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 skip
11810 22:24:02.505623 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 skip
11811 22:24:02.505723 arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 pass
11812 22:24:02.505797 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 skip
11813 22:24:02.505884 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 skip
11814 22:24:02.506174 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 skip
11815 22:24:02.506281 arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 pass
11816 22:24:02.506358 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 skip
11817 22:24:02.506639 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 skip
11818 22:24:02.506752 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 skip
11819 22:24:02.506847 arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 pass
11820 22:24:02.507143 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 skip
11821 22:24:02.511432 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 skip
11822 22:24:02.511863 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 skip
11823 22:24:02.511957 arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 pass
11824 22:24:02.512043 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 skip
11825 22:24:02.512126 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 skip
11826 22:24:02.512225 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 skip
11827 22:24:02.512310 arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 pass
11828 22:24:02.512392 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 skip
11829 22:24:02.512490 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 skip
11830 22:24:02.512575 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 skip
11831 22:24:02.512656 arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 pass
11832 22:24:02.512752 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 skip
11833 22:24:02.512851 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 skip
11834 22:24:02.512950 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 skip
11835 22:24:02.513037 arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 pass
11836 22:24:02.513143 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 skip
11837 22:24:02.513242 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 skip
11838 22:24:02.513537 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 skip
11839 22:24:02.513628 arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 pass
11840 22:24:02.513736 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 skip
11841 22:24:02.513836 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 skip
11842 22:24:02.514128 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 skip
11843 22:24:02.514218 arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 pass
11844 22:24:02.514316 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 skip
11845 22:24:02.514414 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 skip
11846 22:24:02.514688 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 skip
11847 22:24:02.514777 arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 pass
11848 22:24:02.514876 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 skip
11849 22:24:02.514961 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 skip
11850 22:24:02.515058 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 skip
11851 22:24:02.523355 arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 pass
11852 22:24:02.523845 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 skip
11853 22:24:02.524012 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 skip
11854 22:24:02.524135 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 skip
11855 22:24:02.524250 arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 pass
11856 22:24:02.524624 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 skip
11857 22:24:02.524817 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 skip
11858 22:24:02.524994 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 skip
11859 22:24:02.525157 arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 pass
11860 22:24:02.525293 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 skip
11861 22:24:02.525410 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 skip
11862 22:24:02.525551 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 skip
11863 22:24:02.525683 arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 pass
11864 22:24:02.525823 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 skip
11865 22:24:02.525942 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 skip
11866 22:24:02.526056 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 skip
11867 22:24:02.535964 arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 pass
11868 22:24:02.536401 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 skip
11869 22:24:02.536607 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 skip
11870 22:24:02.536804 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 skip
11871 22:24:02.536992 arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 pass
11872 22:24:02.537196 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 skip
11873 22:24:02.537384 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 skip
11874 22:24:02.537596 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 skip
11875 22:24:02.537818 arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 pass
11876 22:24:02.537993 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 skip
11877 22:24:02.538150 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 skip
11878 22:24:02.538377 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 skip
11879 22:24:02.538529 arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 pass
11880 22:24:02.538671 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 skip
11881 22:24:02.538836 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 skip
11882 22:24:02.539039 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 skip
11883 22:24:02.539171 arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 pass
11884 22:24:02.539285 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 skip
11885 22:24:02.539396 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 skip
11886 22:24:02.539507 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 skip
11887 22:24:02.539618 arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 pass
11888 22:24:02.539757 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 skip
11889 22:24:02.539874 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 skip
11890 22:24:02.539986 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 skip
11891 22:24:02.540101 arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 pass
11892 22:24:02.540214 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 skip
11893 22:24:02.543245 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 skip
11894 22:24:02.543660 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 skip
11895 22:24:02.543775 arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 pass
11896 22:24:02.543866 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 skip
11897 22:24:02.543965 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 skip
11898 22:24:02.544054 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 skip
11899 22:24:02.544151 arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 pass
11900 22:24:02.544235 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 skip
11901 22:24:02.544366 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 skip
11902 22:24:02.544487 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 skip
11903 22:24:02.544588 arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 pass
11904 22:24:02.544885 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 skip
11905 22:24:02.544999 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 skip
11906 22:24:02.545330 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 skip
11907 22:24:02.545517 arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 pass
11908 22:24:02.545721 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 skip
11909 22:24:02.545897 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 skip
11910 22:24:02.546106 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 skip
11911 22:24:02.546292 arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 pass
11912 22:24:02.546488 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 skip
11913 22:24:02.546695 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 skip
11914 22:24:02.546876 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 skip
11915 22:24:02.547082 arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 pass
11916 22:24:02.547241 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 skip
11917 22:24:02.547370 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 skip
11918 22:24:02.547484 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 skip
11919 22:24:02.547632 arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 pass
11920 22:24:02.551328 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 skip
11921 22:24:02.551848 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 skip
11922 22:24:02.552043 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 skip
11923 22:24:02.552207 arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 pass
11924 22:24:02.552569 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 skip
11925 22:24:02.552672 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 skip
11926 22:24:02.552758 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 skip
11927 22:24:02.552840 arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 pass
11928 22:24:02.552922 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 skip
11929 22:24:02.553004 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 skip
11930 22:24:02.553086 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 skip
11931 22:24:02.553185 arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 pass
11932 22:24:02.553269 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 skip
11933 22:24:02.553352 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 skip
11934 22:24:02.553434 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 skip
11935 22:24:02.553533 arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 pass
11936 22:24:02.553617 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 skip
11937 22:24:02.553710 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 skip
11938 22:24:02.553793 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 skip
11939 22:24:02.553892 arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 pass
11940 22:24:02.553977 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 skip
11941 22:24:02.554060 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 skip
11942 22:24:02.554157 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 skip
11943 22:24:02.554244 arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 pass
11944 22:24:02.554342 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 skip
11945 22:24:02.554441 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 skip
11946 22:24:02.554540 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 skip
11947 22:24:02.554639 arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 pass
11948 22:24:02.554935 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 skip
11949 22:24:02.555038 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 skip
11950 22:24:02.559211 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 skip
11951 22:24:02.559631 arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 pass
11952 22:24:02.559825 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 skip
11953 22:24:02.559990 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 skip
11954 22:24:02.560189 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 skip
11955 22:24:02.560399 arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 pass
11956 22:24:02.560584 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 skip
11957 22:24:02.560753 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 skip
11958 22:24:02.560957 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 skip
11959 22:24:02.561142 arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 pass
11960 22:24:02.561337 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 skip
11961 22:24:02.561514 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 skip
11962 22:24:02.561702 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 skip
11963 22:24:02.561901 arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 pass
11964 22:24:02.562116 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 skip
11965 22:24:02.562318 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 skip
11966 22:24:02.562530 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 skip
11967 22:24:02.562750 arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 pass
11968 22:24:02.562933 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 skip
11969 22:24:02.563133 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 skip
11970 22:24:02.563271 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 skip
11971 22:24:02.563391 arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 pass
11972 22:24:02.563509 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 skip
11973 22:24:02.563656 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 skip
11974 22:24:02.563783 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 skip
11975 22:24:02.563902 arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 pass
11976 22:24:02.564019 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 skip
11977 22:24:02.564136 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 skip
11978 22:24:02.564253 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 skip
11979 22:24:02.564371 arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 pass
11980 22:24:02.564488 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 skip
11981 22:24:02.567297 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 skip
11982 22:24:02.567508 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 skip
11983 22:24:02.567931 arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 pass
11984 22:24:02.568125 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 skip
11985 22:24:02.568281 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 skip
11986 22:24:02.568446 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 skip
11987 22:24:02.568631 arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 pass
11988 22:24:02.568828 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 skip
11989 22:24:02.569019 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 skip
11990 22:24:02.569179 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 skip
11991 22:24:02.569337 arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 pass
11992 22:24:02.569459 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 skip
11993 22:24:02.569574 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 skip
11994 22:24:02.569707 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 skip
11995 22:24:02.569855 arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 pass
11996 22:24:02.569973 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 skip
11997 22:24:02.570086 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 skip
11998 22:24:02.570224 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 skip
11999 22:24:02.570342 arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 pass
12000 22:24:02.570455 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 skip
12001 22:24:02.581667 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 skip
12002 22:24:02.581940 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 skip
12003 22:24:02.582045 arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 pass
12004 22:24:02.582337 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 skip
12005 22:24:02.582446 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 skip
12006 22:24:02.582534 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 skip
12007 22:24:02.582617 arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 pass
12008 22:24:02.582716 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 skip
12009 22:24:02.582804 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 skip
12010 22:24:02.582902 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 skip
12011 22:24:02.582987 arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 pass
12012 22:24:02.583320 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 skip
12013 22:24:02.583552 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 skip
12014 22:24:02.583817 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 skip
12015 22:24:02.584013 arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 pass
12016 22:24:02.584219 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 skip
12017 22:24:02.584451 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 skip
12018 22:24:02.584634 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 skip
12019 22:24:02.584852 arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 pass
12020 22:24:02.585057 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 skip
12021 22:24:02.585264 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 skip
12022 22:24:02.585487 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 skip
12023 22:24:02.585677 arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 pass
12024 22:24:02.585896 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 skip
12025 22:24:02.586129 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 skip
12026 22:24:02.586321 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 skip
12027 22:24:02.586501 arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 pass
12028 22:24:02.586679 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 skip
12029 22:24:02.586850 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 skip
12030 22:24:02.587079 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 skip
12031 22:24:02.587218 arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 pass
12032 22:24:02.587338 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 skip
12033 22:24:02.587454 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 skip
12034 22:24:02.587573 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 skip
12035 22:24:02.587690 arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 pass
12036 22:24:02.587807 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 skip
12037 22:24:02.587923 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 skip
12038 22:24:02.588038 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 skip
12039 22:24:02.588155 arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 pass
12040 22:24:02.588271 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 skip
12041 22:24:02.591234 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 skip
12042 22:24:02.591726 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 skip
12043 22:24:02.591932 arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 pass
12044 22:24:02.592115 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 skip
12045 22:24:02.592311 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 skip
12046 22:24:02.592571 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 skip
12047 22:24:02.592788 arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 pass
12048 22:24:02.592994 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 skip
12049 22:24:02.593212 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 skip
12050 22:24:02.593402 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 skip
12051 22:24:02.593605 arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 pass
12052 22:24:02.593860 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 skip
12053 22:24:02.594045 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 skip
12054 22:24:02.594211 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 skip
12055 22:24:02.594411 arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 pass
12056 22:24:02.594644 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 skip
12057 22:24:02.594858 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 skip
12058 22:24:02.595046 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 skip
12059 22:24:02.595177 arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 pass
12060 22:24:02.595294 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 skip
12061 22:24:02.595437 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 skip
12062 22:24:02.595558 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 skip
12063 22:24:02.595672 arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 pass
12064 22:24:02.595786 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 skip
12065 22:24:02.595901 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 skip
12066 22:24:02.596016 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 skip
12067 22:24:02.596130 arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 pass
12068 22:24:02.596243 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 skip
12069 22:24:02.596356 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 skip
12070 22:24:02.599321 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 skip
12071 22:24:02.599512 arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 pass
12072 22:24:02.599906 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 skip
12073 22:24:02.600110 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 skip
12074 22:24:02.600280 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 skip
12075 22:24:02.600447 arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 pass
12076 22:24:02.600613 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 skip
12077 22:24:02.600808 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 skip
12078 22:24:02.600978 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 skip
12079 22:24:02.601142 arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 pass
12080 22:24:02.601303 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 skip
12081 22:24:02.601467 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 skip
12082 22:24:02.601630 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 skip
12083 22:24:02.601843 arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 pass
12084 22:24:02.602012 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 skip
12085 22:24:02.602177 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 skip
12086 22:24:02.602300 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 skip
12087 22:24:02.602424 arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 pass
12088 22:24:02.602545 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 skip
12089 22:24:02.602697 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 skip
12090 22:24:02.602823 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 skip
12091 22:24:02.602945 arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 pass
12092 22:24:02.603065 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 skip
12093 22:24:02.603185 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 skip
12094 22:24:02.603305 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 skip
12095 22:24:02.603449 arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 pass
12096 22:24:02.603573 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 skip
12097 22:24:02.603701 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 skip
12098 22:24:02.603825 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 skip
12099 22:24:02.607420 arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 pass
12100 22:24:02.607647 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 skip
12101 22:24:02.607778 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 skip
12102 22:24:02.607888 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 skip
12103 22:24:02.607994 arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 pass
12104 22:24:02.608113 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 skip
12105 22:24:02.608199 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 skip
12106 22:24:02.608298 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 skip
12107 22:24:02.608386 arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 pass
12108 22:24:02.608485 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 skip
12109 22:24:02.608563 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 skip
12110 22:24:02.608657 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 skip
12111 22:24:02.608744 arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 pass
12112 22:24:02.608839 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 skip
12113 22:24:02.608944 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 skip
12114 22:24:02.609045 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 skip
12115 22:24:02.609144 arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 pass
12116 22:24:02.609229 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 skip
12117 22:24:02.609330 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 skip
12118 22:24:02.609433 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 skip
12119 22:24:02.609529 arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 pass
12120 22:24:02.609822 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 skip
12121 22:24:02.610113 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 skip
12122 22:24:02.610240 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 skip
12123 22:24:02.610347 arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 pass
12124 22:24:02.610470 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 skip
12125 22:24:02.610594 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 skip
12126 22:24:02.610728 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 skip
12127 22:24:02.611057 arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 pass
12128 22:24:02.615196 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 skip
12129 22:24:02.615512 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 skip
12130 22:24:02.615618 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 skip
12131 22:24:02.615721 arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 pass
12132 22:24:02.615823 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 skip
12133 22:24:02.616123 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 skip
12134 22:24:02.616242 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 skip
12135 22:24:02.628576 arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 pass
12136 22:24:02.628877 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 skip
12137 22:24:02.628973 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 skip
12138 22:24:02.629077 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 skip
12139 22:24:02.629400 arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 pass
12140 22:24:02.629565 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 skip
12141 22:24:02.629728 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 skip
12142 22:24:02.629855 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 skip
12143 22:24:02.629995 arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 pass
12144 22:24:02.630116 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 skip
12145 22:24:02.630256 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 skip
12146 22:24:02.630396 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 skip
12147 22:24:02.630515 arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 pass
12148 22:24:02.630648 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 skip
12149 22:24:02.631031 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 skip
12150 22:24:02.631242 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 skip
12151 22:24:02.631460 arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 pass
12152 22:24:02.631627 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 skip
12153 22:24:02.631821 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 skip
12154 22:24:02.631985 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 skip
12155 22:24:02.632178 arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 pass
12156 22:24:02.632348 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 skip
12157 22:24:02.632519 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 skip
12158 22:24:02.632773 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 skip
12159 22:24:02.632967 arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 pass
12160 22:24:02.633120 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 skip
12161 22:24:02.633288 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 skip
12162 22:24:02.633419 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 skip
12163 22:24:02.633536 arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 pass
12164 22:24:02.633723 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 skip
12165 22:24:02.633974 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 skip
12166 22:24:02.634126 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 skip
12167 22:24:02.634271 arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 pass
12168 22:24:02.634415 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 skip
12169 22:24:02.634558 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 skip
12170 22:24:02.634736 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 skip
12171 22:24:02.634923 arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 pass
12172 22:24:02.635106 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 skip
12173 22:24:02.635237 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 skip
12174 22:24:02.635353 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 skip
12175 22:24:02.635466 arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 pass
12176 22:24:02.635604 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 skip
12177 22:24:02.635726 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 skip
12178 22:24:02.639360 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 skip
12179 22:24:02.639480 arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 pass
12180 22:24:02.639780 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 skip
12181 22:24:02.639886 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 skip
12182 22:24:02.639989 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 skip
12183 22:24:02.640100 arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 pass
12184 22:24:02.640390 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 skip
12185 22:24:02.640483 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 skip
12186 22:24:02.640584 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 skip
12187 22:24:02.640686 arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 pass
12188 22:24:02.640972 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 skip
12189 22:24:02.641078 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 skip
12190 22:24:02.641181 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 skip
12191 22:24:02.641501 arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 pass
12192 22:24:02.641605 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 skip
12193 22:24:02.641724 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 skip
12194 22:24:02.642036 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 skip
12195 22:24:02.642134 arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 pass
12196 22:24:02.642236 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 skip
12197 22:24:02.642352 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 skip
12198 22:24:02.642779 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 skip
12199 22:24:02.642973 arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 pass
12200 22:24:02.643130 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 skip
12201 22:24:02.643255 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 skip
12202 22:24:02.647422 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 skip
12203 22:24:02.647622 arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 pass
12204 22:24:02.647809 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 skip
12205 22:24:02.647982 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 skip
12206 22:24:02.648170 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 skip
12207 22:24:02.648400 arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 pass
12208 22:24:02.648590 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 skip
12209 22:24:02.648767 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 skip
12210 22:24:02.648933 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 skip
12211 22:24:02.649130 arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 pass
12212 22:24:02.649296 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 skip
12213 22:24:02.649462 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 skip
12214 22:24:02.649637 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 skip
12215 22:24:02.649868 arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 pass
12216 22:24:02.650039 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 skip
12217 22:24:02.650234 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 skip
12218 22:24:02.650404 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 skip
12219 22:24:02.650562 arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 pass
12220 22:24:02.650713 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 skip
12221 22:24:02.650893 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 skip
12222 22:24:02.651080 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 skip
12223 22:24:02.651238 arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 pass
12224 22:24:02.651356 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 skip
12225 22:24:02.651471 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 skip
12226 22:24:02.651587 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 skip
12227 22:24:02.651701 arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 pass
12228 22:24:02.651840 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 skip
12229 22:24:02.655179 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 skip
12230 22:24:02.655492 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 skip
12231 22:24:02.655599 arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 pass
12232 22:24:02.655703 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 skip
12233 22:24:02.655806 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 skip
12234 22:24:02.655913 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 skip
12235 22:24:02.656209 arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 pass
12236 22:24:02.656469 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 skip
12237 22:24:02.656577 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 skip
12238 22:24:02.656679 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 skip
12239 22:24:02.656767 arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 pass
12240 22:24:02.656866 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 skip
12241 22:24:02.656977 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 skip
12242 22:24:02.657292 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 skip
12243 22:24:02.657406 arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 pass
12244 22:24:02.657506 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 skip
12245 22:24:02.657605 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 skip
12246 22:24:02.657909 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 skip
12247 22:24:02.658017 arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 pass
12248 22:24:02.658118 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 skip
12249 22:24:02.658221 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 skip
12250 22:24:02.658325 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 skip
12251 22:24:02.658620 arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 pass
12252 22:24:02.658738 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 skip
12253 22:24:02.658825 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 skip
12254 22:24:02.658923 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 skip
12255 22:24:02.659021 arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 pass
12256 22:24:02.663522 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 skip
12257 22:24:02.663630 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 skip
12258 22:24:02.663733 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 skip
12259 22:24:02.663836 arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 pass
12260 22:24:02.664122 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 skip
12261 22:24:02.664213 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 skip
12262 22:24:02.664318 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 skip
12263 22:24:02.664405 arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 pass
12264 22:24:02.664506 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 skip
12265 22:24:02.664611 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 skip
12266 22:24:02.664892 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 skip
12267 22:24:02.664984 arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 pass
12268 22:24:02.665069 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 skip
12269 22:24:02.677044 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 skip
12270 22:24:02.677484 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 skip
12271 22:24:02.677691 arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 pass
12272 22:24:02.677901 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 skip
12273 22:24:02.678112 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 skip
12274 22:24:02.678272 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 skip
12275 22:24:02.678434 arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 pass
12276 22:24:02.678591 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 skip
12277 22:24:02.678748 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 skip
12278 22:24:02.678946 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 skip
12279 22:24:02.679089 arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 pass
12280 22:24:02.679247 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 skip
12281 22:24:02.679405 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 skip
12282 22:24:02.679558 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 skip
12283 22:24:02.679713 arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 pass
12284 22:24:02.679871 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 skip
12285 22:24:02.680055 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 skip
12286 22:24:02.680215 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 skip
12287 22:24:02.680337 arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 pass
12288 22:24:02.680485 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 skip
12289 22:24:02.680636 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 skip
12290 22:24:02.680759 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 skip
12291 22:24:02.680881 arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 pass
12292 22:24:02.681059 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 skip
12293 22:24:02.681221 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 skip
12294 22:24:02.681366 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 skip
12295 22:24:02.681491 arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 pass
12296 22:24:02.681630 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 skip
12297 22:24:02.682493 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 skip
12298 22:24:02.682674 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 skip
12299 22:24:02.682845 arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 pass
12300 22:24:02.683011 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 skip
12301 22:24:02.683162 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 skip
12302 22:24:02.683499 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 skip
12303 22:24:02.683627 arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 pass
12304 22:24:02.683746 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 skip
12305 22:24:02.683863 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 skip
12306 22:24:02.683981 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 skip
12307 22:24:02.684097 arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 pass
12308 22:24:02.684213 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 skip
12309 22:24:02.684330 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 skip
12310 22:24:02.684450 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 skip
12311 22:24:02.684568 arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 pass
12312 22:24:02.684732 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 skip
12313 22:24:02.684857 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 skip
12314 22:24:02.684974 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 skip
12315 22:24:02.685088 arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 pass
12316 22:24:02.687207 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 skip
12317 22:24:02.687511 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 skip
12318 22:24:02.687614 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 skip
12319 22:24:02.687717 arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 pass
12320 22:24:02.687817 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 skip
12321 22:24:02.688117 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 skip
12322 22:24:02.688224 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 skip
12323 22:24:02.688328 arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 pass
12324 22:24:02.688432 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 skip
12325 22:24:02.688532 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 skip
12326 22:24:02.688636 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 skip
12327 22:24:02.688935 arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 pass
12328 22:24:02.689038 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 skip
12329 22:24:02.689335 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 skip
12330 22:24:02.689681 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 skip
12331 22:24:02.689785 arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 pass
12332 22:24:02.689874 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 skip
12333 22:24:02.689972 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 skip
12334 22:24:02.690057 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 skip
12335 22:24:02.690154 arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 pass
12336 22:24:02.690442 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 skip
12337 22:24:02.690547 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 skip
12338 22:24:02.690646 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 skip
12339 22:24:02.690745 arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 pass
12340 22:24:02.691045 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 skip
12341 22:24:02.695270 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 skip
12342 22:24:02.695704 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 skip
12343 22:24:02.695811 arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 pass
12344 22:24:02.695915 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 skip
12345 22:24:02.696004 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 skip
12346 22:24:02.696105 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 skip
12347 22:24:02.696196 arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 pass
12348 22:24:02.696295 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 skip
12349 22:24:02.696397 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 skip
12350 22:24:02.696500 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 skip
12351 22:24:02.696809 arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 pass
12352 22:24:02.696918 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 skip
12353 22:24:02.697019 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 skip
12354 22:24:02.697109 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 skip
12355 22:24:02.697210 arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 pass
12356 22:24:02.697313 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 skip
12357 22:24:02.697414 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 skip
12358 22:24:02.697516 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 skip
12359 22:24:02.697625 arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 pass
12360 22:24:02.697744 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 skip
12361 22:24:02.698102 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 skip
12362 22:24:02.698297 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 skip
12363 22:24:02.698538 arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 pass
12364 22:24:02.698721 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 skip
12365 22:24:02.698868 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 skip
12366 22:24:02.699107 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 skip
12367 22:24:02.699268 arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 pass
12368 22:24:02.699414 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 skip
12369 22:24:02.703226 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 skip
12370 22:24:02.703659 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 skip
12371 22:24:02.703858 arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 pass
12372 22:24:02.704028 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 skip
12373 22:24:02.704236 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 skip
12374 22:24:02.704444 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 skip
12375 22:24:02.704657 arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 pass
12376 22:24:02.704867 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 skip
12377 22:24:02.705045 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 skip
12378 22:24:02.705251 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 skip
12379 22:24:02.705425 arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 pass
12380 22:24:02.705590 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 skip
12381 22:24:02.705762 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 skip
12382 22:24:02.705930 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 skip
12383 22:24:02.706096 arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 pass
12384 22:24:02.706264 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 skip
12385 22:24:02.706470 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 skip
12386 22:24:02.706641 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 skip
12387 22:24:02.706807 arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 pass
12388 22:24:02.706971 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 skip
12389 22:24:02.707116 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 skip
12390 22:24:02.707234 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 skip
12391 22:24:02.707347 arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 pass
12392 22:24:02.707458 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 skip
12393 22:24:02.707569 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 skip
12394 22:24:02.707681 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 skip
12395 22:24:02.707817 arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 pass
12396 22:24:02.707934 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 skip
12397 22:24:02.708048 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 skip
12398 22:24:02.711232 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 skip
12399 22:24:02.711689 arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 pass
12400 22:24:02.711848 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 skip
12401 22:24:02.711992 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 skip
12402 22:24:02.712141 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 skip
12403 22:24:02.724378 arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 pass
12404 22:24:02.724828 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 skip
12405 22:24:02.725029 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 skip
12406 22:24:02.725198 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 skip
12407 22:24:02.725376 arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 pass
12408 22:24:02.725571 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 skip
12409 22:24:02.725774 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 skip
12410 22:24:02.725959 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 skip
12411 22:24:02.726152 arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 pass
12412 22:24:02.726339 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 skip
12413 22:24:02.726543 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 skip
12414 22:24:02.726739 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 skip
12415 22:24:02.726898 arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 pass
12416 22:24:02.727099 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 skip
12417 22:24:02.727272 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 skip
12418 22:24:02.727408 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 skip
12419 22:24:02.727530 arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 pass
12420 22:24:02.727700 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 skip
12421 22:24:02.727826 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 skip
12422 22:24:02.731250 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 skip
12423 22:24:02.731690 arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 pass
12424 22:24:02.731799 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 skip
12425 22:24:02.731885 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 skip
12426 22:24:02.731983 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 skip
12427 22:24:02.732070 arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 pass
12428 22:24:02.732170 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 skip
12429 22:24:02.732259 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 skip
12430 22:24:02.732358 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 skip
12431 22:24:02.732656 arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 pass
12432 22:24:02.732792 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 skip
12433 22:24:02.732879 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 skip
12434 22:24:02.732963 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 skip
12435 22:24:02.733062 arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 pass
12436 22:24:02.733162 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 skip
12437 22:24:02.733262 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 skip
12438 22:24:02.733550 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 skip
12439 22:24:02.733665 arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 pass
12440 22:24:02.733756 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 skip
12441 22:24:02.733858 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 skip
12442 22:24:02.733945 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 skip
12443 22:24:02.734044 arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 pass
12444 22:24:02.734332 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 skip
12445 22:24:02.734437 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 skip
12446 22:24:02.734523 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 skip
12447 22:24:02.734621 arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 pass
12448 22:24:02.734706 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 skip
12449 22:24:02.734788 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 skip
12450 22:24:02.734885 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 skip
12451 22:24:02.734970 arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 pass
12452 22:24:02.735068 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 skip
12453 22:24:02.739175 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 skip
12454 22:24:02.739484 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 skip
12455 22:24:02.739588 arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 pass
12456 22:24:02.739693 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 skip
12457 22:24:02.739795 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 skip
12458 22:24:02.740093 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 skip
12459 22:24:02.740197 arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 pass
12460 22:24:02.740297 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 skip
12461 22:24:02.740396 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 skip
12462 22:24:02.740501 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 skip
12463 22:24:02.740841 arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 pass
12464 22:24:02.741090 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 skip
12465 22:24:02.741271 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 skip
12466 22:24:02.741442 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 skip
12467 22:24:02.741626 arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 pass
12468 22:24:02.741798 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 skip
12469 22:24:02.741942 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 skip
12470 22:24:02.742151 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 skip
12471 22:24:02.742335 arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 pass
12472 22:24:02.742548 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 skip
12473 22:24:02.742752 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 skip
12474 22:24:02.742963 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 skip
12475 22:24:02.743151 arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 pass
12476 22:24:02.743292 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 skip
12477 22:24:02.743410 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 skip
12478 22:24:02.743524 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 skip
12479 22:24:02.743667 arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 pass
12480 22:24:02.747275 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 skip
12481 22:24:02.747684 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 skip
12482 22:24:02.747795 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 skip
12483 22:24:02.747884 arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 pass
12484 22:24:02.747988 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 skip
12485 22:24:02.748075 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 skip
12486 22:24:02.748173 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 skip
12487 22:24:02.748259 arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 pass
12488 22:24:02.748355 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 skip
12489 22:24:02.748654 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 skip
12490 22:24:02.748772 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 skip
12491 22:24:02.748876 arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 pass
12492 22:24:02.748974 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 skip
12493 22:24:02.749163 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 skip
12494 22:24:02.749282 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 skip
12495 22:24:02.749582 arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 pass
12496 22:24:02.749706 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 skip
12497 22:24:02.750042 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 skip
12498 22:24:02.750243 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 skip
12499 22:24:02.750440 arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 pass
12500 22:24:02.750608 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 skip
12501 22:24:02.750779 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 skip
12502 22:24:02.750939 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 skip
12503 22:24:02.751105 arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 pass
12504 22:24:02.751254 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 skip
12505 22:24:02.755237 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 skip
12506 22:24:02.755731 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 skip
12507 22:24:02.755975 arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 pass
12508 22:24:02.756194 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 skip
12509 22:24:02.756411 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 skip
12510 22:24:02.756686 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 skip
12511 22:24:02.756892 arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 pass
12512 22:24:02.757092 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 skip
12513 22:24:02.757261 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 skip
12514 22:24:02.757417 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 skip
12515 22:24:02.757577 arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 pass
12516 22:24:02.757745 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 skip
12517 22:24:02.757905 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 skip
12518 22:24:02.758103 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 skip
12519 22:24:02.758272 arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 pass
12520 22:24:02.758442 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 skip
12521 22:24:02.758604 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 skip
12522 22:24:02.758725 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 skip
12523 22:24:02.758867 arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 pass
12524 22:24:02.759003 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 skip
12525 22:24:02.759119 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 skip
12526 22:24:02.759236 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 skip
12527 22:24:02.759353 arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 pass
12528 22:24:02.759465 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 skip
12529 22:24:02.759578 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 skip
12530 22:24:02.759693 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 skip
12531 22:24:02.759805 arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 pass
12532 22:24:02.759946 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 skip
12533 22:24:02.760066 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 skip
12534 22:24:02.760180 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 skip
12535 22:24:02.760294 arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 pass
12536 22:24:02.760408 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 skip
12537 22:24:02.773005 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 skip
12538 22:24:02.773397 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 skip
12539 22:24:02.773559 arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 pass
12540 22:24:02.773707 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 skip
12541 22:24:02.773870 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 skip
12542 22:24:02.774064 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 skip
12543 22:24:02.774236 arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 pass
12544 22:24:02.774384 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 skip
12545 22:24:02.774560 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 skip
12546 22:24:02.774717 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 skip
12547 22:24:02.774880 arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 pass
12548 22:24:02.775027 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 skip
12549 22:24:02.775200 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 skip
12550 22:24:02.775340 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 skip
12551 22:24:02.775501 arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 pass
12552 22:24:02.775736 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 skip
12553 22:24:02.775906 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 skip
12554 22:24:02.776041 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 skip
12555 22:24:02.776228 arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 pass
12556 22:24:02.776394 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 skip
12557 22:24:02.776563 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 skip
12558 22:24:02.776728 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 skip
12559 22:24:02.776926 arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 pass
12560 22:24:02.777091 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 skip
12561 22:24:02.777242 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 skip
12562 22:24:02.777405 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 skip
12563 22:24:02.777604 arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 pass
12564 22:24:02.778262 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 skip
12565 22:24:02.778442 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 skip
12566 22:24:02.778608 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 skip
12567 22:24:02.778815 arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 pass
12568 22:24:02.779011 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 skip
12569 22:24:02.779369 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 skip
12570 22:24:02.779501 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 skip
12571 22:24:02.779632 arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 pass
12572 22:24:02.779753 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 skip
12573 22:24:02.779871 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 skip
12574 22:24:02.779989 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 skip
12575 22:24:02.780107 arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 pass
12576 22:24:02.780225 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 skip
12577 22:24:02.783204 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 skip
12578 22:24:02.783658 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 skip
12579 22:24:02.783852 arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 pass
12580 22:24:02.784019 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 skip
12581 22:24:02.784215 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 skip
12582 22:24:02.784389 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 skip
12583 22:24:02.784554 arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 pass
12584 22:24:02.784745 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 skip
12585 22:24:02.784913 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 skip
12586 22:24:02.785076 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 skip
12587 22:24:02.785238 arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 pass
12588 22:24:02.785426 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 skip
12589 22:24:02.785595 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 skip
12590 22:24:02.785770 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 skip
12591 22:24:02.785933 arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 pass
12592 22:24:02.786109 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 skip
12593 22:24:02.786270 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 skip
12594 22:24:02.786416 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 skip
12595 22:24:02.786559 arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 pass
12596 22:24:02.786728 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 skip
12597 22:24:02.786878 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 skip
12598 22:24:02.787023 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 skip
12599 22:24:02.787142 arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 pass
12600 22:24:02.787256 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 skip
12601 22:24:02.787393 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 skip
12602 22:24:02.791209 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 skip
12603 22:24:02.791634 arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 pass
12604 22:24:02.791825 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 skip
12605 22:24:02.791989 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 skip
12606 22:24:02.792150 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 skip
12607 22:24:02.792285 arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 pass
12608 22:24:02.792408 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 skip
12609 22:24:02.792575 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 skip
12610 22:24:02.792722 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 skip
12611 22:24:02.792899 arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 pass
12612 22:24:02.793059 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 skip
12613 22:24:02.793245 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 skip
12614 22:24:02.793395 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 skip
12615 22:24:02.793579 arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 pass
12616 22:24:02.793755 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 skip
12617 22:24:02.793943 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 skip
12618 22:24:02.794107 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 skip
12619 22:24:02.794250 arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 pass
12620 22:24:02.794427 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 skip
12621 22:24:02.794584 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 skip
12622 22:24:02.794767 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 skip
12623 22:24:02.794925 arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 pass
12624 22:24:02.795071 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 skip
12625 22:24:02.795214 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 skip
12626 22:24:02.799297 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 skip
12627 22:24:02.799711 arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 pass
12628 22:24:02.799946 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 skip
12629 22:24:02.800114 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 skip
12630 22:24:02.800296 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 skip
12631 22:24:02.800461 arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 pass
12632 22:24:02.800615 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 skip
12633 22:24:02.800743 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 skip
12634 22:24:02.800912 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 skip
12635 22:24:02.801077 arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 pass
12636 22:24:02.801239 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 skip
12637 22:24:02.801398 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 skip
12638 22:24:02.801591 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 skip
12639 22:24:02.801764 arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 pass
12640 22:24:02.801900 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 skip
12641 22:24:02.802064 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 skip
12642 22:24:02.802261 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 skip
12643 22:24:02.802421 arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 pass
12644 22:24:02.802593 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 skip
12645 22:24:02.802726 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 skip
12646 22:24:02.802854 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 skip
12647 22:24:02.802978 arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 pass
12648 22:24:02.803125 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 skip
12649 22:24:02.803251 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 skip
12650 22:24:02.803369 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 skip
12651 22:24:02.803483 arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 pass
12652 22:24:02.811290 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 skip
12653 22:24:02.811734 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 skip
12654 22:24:02.811927 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 skip
12655 22:24:02.812078 arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 pass
12656 22:24:02.812260 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 skip
12657 22:24:02.812418 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 skip
12658 22:24:02.812594 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 skip
12659 22:24:02.812740 arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 pass
12660 22:24:02.812925 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 skip
12661 22:24:02.813060 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 skip
12662 22:24:02.813190 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 skip
12663 22:24:02.813339 arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 pass
12664 22:24:02.813473 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 skip
12665 22:24:02.813660 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 skip
12666 22:24:02.813855 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 skip
12667 22:24:02.814005 arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 pass
12668 22:24:02.814147 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 skip
12669 22:24:02.814304 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 skip
12670 22:24:02.814444 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 skip
12671 22:24:02.831309 arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 pass
12672 22:24:02.831584 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 skip
12673 22:24:02.831692 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 skip
12674 22:24:02.831803 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 skip
12675 22:24:02.832102 arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 pass
12676 22:24:02.832212 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 skip
12677 22:24:02.832305 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 skip
12678 22:24:02.832591 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 skip
12679 22:24:02.832698 arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 pass
12680 22:24:02.832799 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 skip
12681 22:24:02.833094 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 skip
12682 22:24:02.833211 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 skip
12683 22:24:02.833321 arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 pass
12684 22:24:02.833621 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 skip
12685 22:24:02.833728 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 skip
12686 22:24:02.834023 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 skip
12687 22:24:02.834124 arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 pass
12688 22:24:02.834217 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 skip
12689 22:24:02.834516 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 skip
12690 22:24:02.834618 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 skip
12691 22:24:02.834887 arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 pass
12692 22:24:02.834968 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 skip
12693 22:24:02.839261 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 skip
12694 22:24:02.839571 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 skip
12695 22:24:02.839695 arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 pass
12696 22:24:02.839784 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 skip
12697 22:24:02.840067 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 skip
12698 22:24:02.840355 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 skip
12699 22:24:02.840456 arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 pass
12700 22:24:02.840555 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 skip
12701 22:24:02.840852 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 skip
12702 22:24:02.840959 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 skip
12703 22:24:02.841058 arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 pass
12704 22:24:02.841343 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 skip
12705 22:24:02.841446 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 skip
12706 22:24:02.841684 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 skip
12707 22:24:02.841788 arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 pass
12708 22:24:02.842093 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 skip
12709 22:24:02.842213 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 skip
12710 22:24:02.842497 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 skip
12711 22:24:02.842586 arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 pass
12712 22:24:02.842692 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 skip
12713 22:24:02.842790 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 skip
12714 22:24:02.843073 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 skip
12715 22:24:02.847252 arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 pass
12716 22:24:02.847582 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 skip
12717 22:24:02.847874 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 skip
12718 22:24:02.847957 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 skip
12719 22:24:02.848245 arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 pass
12720 22:24:02.848438 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 skip
12721 22:24:02.848605 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 skip
12722 22:24:02.848792 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 skip
12723 22:24:02.848937 arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 pass
12724 22:24:02.849075 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 skip
12725 22:24:02.849235 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 skip
12726 22:24:02.849381 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 skip
12727 22:24:02.849548 arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 pass
12728 22:24:02.849687 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 skip
12729 22:24:02.849838 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 skip
12730 22:24:02.849997 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 skip
12731 22:24:02.850127 arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 pass
12732 22:24:02.850273 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 skip
12733 22:24:02.850423 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 skip
12734 22:24:02.850570 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 skip
12735 22:24:02.850719 arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 pass
12736 22:24:02.850891 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 skip
12737 22:24:02.851050 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 skip
12738 22:24:02.855446 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 skip
12739 22:24:02.855594 arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 pass
12740 22:24:02.855727 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 skip
12741 22:24:02.855813 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 skip
12742 22:24:02.856139 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 skip
12743 22:24:02.856330 arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 pass
12744 22:24:02.856504 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 skip
12745 22:24:02.856690 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 skip
12746 22:24:02.856861 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 skip
12747 22:24:02.857002 arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 pass
12748 22:24:02.857162 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 skip
12749 22:24:02.857315 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 skip
12750 22:24:02.857462 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 skip
12751 22:24:02.857611 arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 pass
12752 22:24:02.857801 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 skip
12753 22:24:02.857982 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 skip
12754 22:24:02.858158 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 skip
12755 22:24:02.858328 arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 pass
12756 22:24:02.858506 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 skip
12757 22:24:02.858672 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 skip
12758 22:24:02.858854 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 skip
12759 22:24:02.859060 arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 pass
12760 22:24:02.863289 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 skip
12761 22:24:02.863743 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 skip
12762 22:24:02.863919 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 skip
12763 22:24:02.864094 arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 pass
12764 22:24:02.864285 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 skip
12765 22:24:02.864511 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 skip
12766 22:24:02.864691 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 skip
12767 22:24:02.864845 arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 pass
12768 22:24:02.865013 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 skip
12769 22:24:02.865159 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 skip
12770 22:24:02.865338 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 skip
12771 22:24:02.865489 arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 pass
12772 22:24:02.865657 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 skip
12773 22:24:02.865810 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 skip
12774 22:24:02.866000 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 skip
12775 22:24:02.866159 arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 pass
12776 22:24:02.866339 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 skip
12777 22:24:02.866483 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 skip
12778 22:24:02.866686 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 skip
12779 22:24:02.866855 arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 pass
12780 22:24:02.867062 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 skip
12781 22:24:02.867208 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 skip
12782 22:24:02.871602 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 skip
12783 22:24:02.871997 arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 pass
12784 22:24:02.872164 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 skip
12785 22:24:02.872350 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 skip
12786 22:24:02.872534 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 skip
12787 22:24:02.872722 arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 pass
12788 22:24:02.872908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 skip
12789 22:24:02.873268 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 skip
12790 22:24:02.873380 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 skip
12791 22:24:02.873661 arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 pass
12792 22:24:02.873959 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 skip
12793 22:24:02.874250 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 skip
12794 22:24:02.874506 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 skip
12795 22:24:02.874775 arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 pass
12796 22:24:02.874854 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 skip
12797 22:24:02.879186 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 skip
12798 22:24:02.879500 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 skip
12799 22:24:02.879609 arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 pass
12800 22:24:02.879713 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 skip
12801 22:24:02.879813 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 skip
12802 22:24:02.880109 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 skip
12803 22:24:02.880214 arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 pass
12804 22:24:02.880315 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 skip
12805 22:24:02.891677 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 skip
12806 22:24:02.892010 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 skip
12807 22:24:02.892114 arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 pass
12808 22:24:02.892214 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 skip
12809 22:24:02.892298 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 skip
12810 22:24:02.892396 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 skip
12811 22:24:02.892493 arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 pass
12812 22:24:02.892794 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 skip
12813 22:24:02.892913 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 skip
12814 22:24:02.893017 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 skip
12815 22:24:02.893116 arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 pass
12816 22:24:02.893420 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 skip
12817 22:24:02.893542 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 skip
12818 22:24:02.893642 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 skip
12819 22:24:02.893752 arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 pass
12820 22:24:02.893853 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 skip
12821 22:24:02.894152 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 skip
12822 22:24:02.894466 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 skip
12823 22:24:02.894628 arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 pass
12824 22:24:02.894735 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 skip
12825 22:24:02.894867 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 skip
12826 22:24:02.894958 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 skip
12827 22:24:02.895041 arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 pass
12828 22:24:02.899167 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 skip
12829 22:24:02.899537 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 skip
12830 22:24:02.899675 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 skip
12831 22:24:02.899791 arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 pass
12832 22:24:02.899898 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 skip
12833 22:24:02.899992 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 skip
12834 22:24:02.900076 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 skip
12835 22:24:02.900160 arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 pass
12836 22:24:02.900240 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 skip
12837 22:24:02.900326 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 skip
12838 22:24:02.900575 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 skip
12839 22:24:02.900696 arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 pass
12840 22:24:02.900825 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 skip
12841 22:24:02.900928 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 skip
12842 22:24:02.901027 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 skip
12843 22:24:02.901304 arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 pass
12844 22:24:02.901409 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 skip
12845 22:24:02.901535 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 skip
12846 22:24:02.901633 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 skip
12847 22:24:02.901764 arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 pass
12848 22:24:02.901872 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 skip
12849 22:24:02.901962 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 skip
12850 22:24:02.902060 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 skip
12851 22:24:02.902146 arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 pass
12852 22:24:02.902356 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 skip
12853 22:24:02.902663 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 skip
12854 22:24:02.902752 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 skip
12855 22:24:02.902854 arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 pass
12856 22:24:02.902928 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 skip
12857 22:24:02.907158 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 skip
12858 22:24:02.907507 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 skip
12859 22:24:02.907693 arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 pass
12860 22:24:02.907845 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 skip
12861 22:24:02.907958 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 skip
12862 22:24:02.908075 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 skip
12863 22:24:02.908218 arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 pass
12864 22:24:02.908322 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 skip
12865 22:24:02.908440 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 skip
12866 22:24:02.908532 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 skip
12867 22:24:02.908623 arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 pass
12868 22:24:02.908722 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 skip
12869 22:24:02.908804 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 skip
12870 22:24:02.908882 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 skip
12871 22:24:02.908975 arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 pass
12872 22:24:02.909061 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 skip
12873 22:24:02.909154 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 skip
12874 22:24:02.909451 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 skip
12875 22:24:02.909567 arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 pass
12876 22:24:02.909665 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 skip
12877 22:24:02.909770 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 skip
12878 22:24:02.909888 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 skip
12879 22:24:02.910014 arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 pass
12880 22:24:02.910114 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 skip
12881 22:24:02.910230 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 skip
12882 22:24:02.910336 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 skip
12883 22:24:02.910457 arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 pass
12884 22:24:02.910563 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 skip
12885 22:24:02.910686 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 skip
12886 22:24:02.910774 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 skip
12887 22:24:02.910867 arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 pass
12888 22:24:02.910958 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 skip
12889 22:24:02.911046 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 skip
12890 22:24:02.915191 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 skip
12891 22:24:02.915517 arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 pass
12892 22:24:02.915682 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 skip
12893 22:24:02.915842 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 skip
12894 22:24:02.915929 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 skip
12895 22:24:02.916007 arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 pass
12896 22:24:02.916097 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 skip
12897 22:24:02.916191 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 skip
12898 22:24:02.916288 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 skip
12899 22:24:02.916381 arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 pass
12900 22:24:02.916493 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 skip
12901 22:24:02.916748 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 skip
12902 22:24:02.916834 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 skip
12903 22:24:02.916928 arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 pass
12904 22:24:02.917010 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 skip
12905 22:24:02.917104 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 skip
12906 22:24:02.917393 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 skip
12907 22:24:02.917494 arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 pass
12908 22:24:02.917608 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 skip
12909 22:24:02.917727 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 skip
12910 22:24:02.917838 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 skip
12911 22:24:02.917937 arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 pass
12912 22:24:02.918031 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 skip
12913 22:24:02.918173 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 skip
12914 22:24:02.918406 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 skip
12915 22:24:02.918583 arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 pass
12916 22:24:02.918803 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 skip
12917 22:24:02.918950 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 skip
12918 22:24:02.919098 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 skip
12919 22:24:02.919257 arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 pass
12920 22:24:02.919377 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 skip
12921 22:24:02.923250 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 skip
12922 22:24:02.923470 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 skip
12923 22:24:02.923850 arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 pass
12924 22:24:02.923954 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 skip
12925 22:24:02.924040 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 skip
12926 22:24:02.924141 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 skip
12927 22:24:02.924229 arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 pass
12928 22:24:02.924312 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 skip
12929 22:24:02.924412 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 skip
12930 22:24:02.924500 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 skip
12931 22:24:02.924597 arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 pass
12932 22:24:02.924686 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 skip
12933 22:24:02.924784 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 skip
12934 22:24:02.925092 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 skip
12935 22:24:02.925198 arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 pass
12936 22:24:02.925298 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 skip
12937 22:24:02.925593 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 skip
12938 22:24:02.925705 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 skip
12939 22:24:02.941877 arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 pass
12940 22:24:02.942228 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 skip
12941 22:24:02.942413 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 skip
12942 22:24:02.942605 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 skip
12943 22:24:02.942771 arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 pass
12944 22:24:02.942939 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 skip
12945 22:24:02.943101 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 skip
12946 22:24:02.943260 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 skip
12947 22:24:02.943421 arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 pass
12948 22:24:02.943614 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 skip
12949 22:24:02.943779 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 skip
12950 22:24:02.943940 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 skip
12951 22:24:02.944127 arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 pass
12952 22:24:02.944281 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 skip
12953 22:24:02.944416 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 skip
12954 22:24:02.944561 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 skip
12955 22:24:02.944751 arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 pass
12956 22:24:02.944916 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 skip
12957 22:24:02.945078 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 skip
12958 22:24:02.945235 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 skip
12959 22:24:02.945424 arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 pass
12960 22:24:02.945589 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 skip
12961 22:24:02.945791 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 skip
12962 22:24:02.945989 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 skip
12963 22:24:02.946175 arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 pass
12964 22:24:02.946359 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 skip
12965 22:24:02.946579 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 skip
12966 22:24:02.946775 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 skip
12967 22:24:02.946956 arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 pass
12968 22:24:02.947110 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 skip
12969 22:24:02.947231 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 skip
12970 22:24:02.947347 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 skip
12971 22:24:02.947463 arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 pass
12972 22:24:02.947790 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 skip
12973 22:24:02.947920 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 skip
12974 22:24:02.948039 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 skip
12975 22:24:02.948157 arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 pass
12976 22:24:02.948273 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 skip
12977 22:24:02.951217 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 skip
12978 22:24:02.951571 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 skip
12979 22:24:02.951770 arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 pass
12980 22:24:02.951938 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 skip
12981 22:24:02.952109 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 skip
12982 22:24:02.952272 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 skip
12983 22:24:02.952462 arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 pass
12984 22:24:02.952628 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 skip
12985 22:24:02.952780 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 skip
12986 22:24:02.952964 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 skip
12987 22:24:02.953118 arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 pass
12988 22:24:02.953279 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 skip
12989 22:24:02.953469 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 skip
12990 22:24:02.953634 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 skip
12991 22:24:02.953811 arm64_sve-ptrace pass
12992 22:24:02.953981 arm64_sve-probe-vls_Enumerated_16_vector_lengths pass
12993 22:24:02.954150 arm64_sve-probe-vls_All_vector_lengths_valid pass
12994 22:24:02.954345 arm64_sve-probe-vls pass
12995 22:24:02.954506 arm64_vec-syscfg_SVE_default_vector_length_64 pass
12996 22:24:02.954665 arm64_vec-syscfg_SVE_minimum_vector_length_16 pass
12997 22:24:02.954835 arm64_vec-syscfg_SVE_maximum_vector_length_256 pass
12998 22:24:02.954990 arm64_vec-syscfg_SVE_current_VL_is_64 pass
12999 22:24:02.955110 arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 pass
13000 22:24:02.955224 arm64_vec-syscfg_SVE_prctl_set_min_max pass
13001 22:24:02.955339 arm64_vec-syscfg_SVE_vector_length_used_default pass
13002 22:24:02.955480 arm64_vec-syscfg_SVE_vector_length_was_inherited pass
13003 22:24:02.955601 arm64_vec-syscfg_SVE_vector_length_set_on_exec pass
13004 22:24:02.955718 arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors pass
13005 22:24:02.955833 arm64_vec-syscfg_SME_default_vector_length_32 pass
13006 22:24:02.955949 arm64_vec-syscfg_SME_minimum_vector_length_16 pass
13007 22:24:02.959427 arm64_vec-syscfg_SME_maximum_vector_length_256 pass
13008 22:24:02.959787 arm64_vec-syscfg_SME_current_VL_is_32 pass
13009 22:24:02.959966 arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 pass
13010 22:24:02.960141 arm64_vec-syscfg_SME_prctl_set_min_max pass
13011 22:24:02.960286 arm64_vec-syscfg_SME_vector_length_used_default pass
13012 22:24:02.960462 arm64_vec-syscfg_SME_vector_length_was_inherited pass
13013 22:24:02.960600 arm64_vec-syscfg_SME_vector_length_set_on_exec pass
13014 22:24:02.960743 arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors pass
13015 22:24:02.960886 arm64_vec-syscfg pass
13016 22:24:02.961025 arm64_za-fork_fork_test pass
13017 22:24:02.961200 arm64_za-fork pass
13018 22:24:02.961336 arm64_za-ptrace_Set_VL_16 pass
13019 22:24:02.961478 arm64_za-ptrace_Disabled_ZA_for_VL_16 pass
13020 22:24:02.961618 arm64_za-ptrace_Data_match_for_VL_16 pass
13021 22:24:02.961774 arm64_za-ptrace_Set_VL_32 pass
13022 22:24:02.961915 arm64_za-ptrace_Disabled_ZA_for_VL_32 pass
13023 22:24:02.962057 arm64_za-ptrace_Data_match_for_VL_32 pass
13024 22:24:02.962199 arm64_za-ptrace_Set_VL_48 pass
13025 22:24:02.962375 arm64_za-ptrace_Disabled_ZA_for_VL_48 skip
13026 22:24:02.962509 arm64_za-ptrace_Get_and_set_data_for_VL_48 skip
13027 22:24:02.962650 arm64_za-ptrace_Set_VL_64 pass
13028 22:24:02.962790 arm64_za-ptrace_Disabled_ZA_for_VL_64 pass
13029 22:24:02.962931 arm64_za-ptrace_Data_match_for_VL_64 pass
13030 22:24:02.963071 arm64_za-ptrace_Set_VL_80 pass
13031 22:24:02.963213 arm64_za-ptrace_Disabled_ZA_for_VL_80 skip
13032 22:24:02.963353 arm64_za-ptrace_Get_and_set_data_for_VL_80 skip
13033 22:24:02.963494 arm64_za-ptrace_Set_VL_96 pass
13034 22:24:02.963635 arm64_za-ptrace_Disabled_ZA_for_VL_96 skip
13035 22:24:02.963814 arm64_za-ptrace_Get_and_set_data_for_VL_96 skip
13036 22:24:02.963950 arm64_za-ptrace_Set_VL_112 pass
13037 22:24:02.964090 arm64_za-ptrace_Disabled_ZA_for_VL_112 skip
13038 22:24:02.964231 arm64_za-ptrace_Get_and_set_data_for_VL_112 skip
13039 22:24:02.964373 arm64_za-ptrace_Set_VL_128 pass
13040 22:24:02.964513 arm64_za-ptrace_Disabled_ZA_for_VL_128 pass
13041 22:24:02.964653 arm64_za-ptrace_Data_match_for_VL_128 pass
13042 22:24:02.964795 arm64_za-ptrace_Set_VL_144 pass
13043 22:24:02.964935 arm64_za-ptrace_Disabled_ZA_for_VL_144 skip
13044 22:24:02.965073 arm64_za-ptrace_Get_and_set_data_for_VL_144 skip
13045 22:24:02.965214 arm64_za-ptrace_Set_VL_160 pass
13046 22:24:02.965391 arm64_za-ptrace_Disabled_ZA_for_VL_160 skip
13047 22:24:02.965526 arm64_za-ptrace_Get_and_set_data_for_VL_160 skip
13048 22:24:02.965690 arm64_za-ptrace_Set_VL_176 pass
13049 22:24:02.965834 arm64_za-ptrace_Disabled_ZA_for_VL_176 skip
13050 22:24:02.965974 arm64_za-ptrace_Get_and_set_data_for_VL_176 skip
13051 22:24:02.966115 arm64_za-ptrace_Set_VL_192 pass
13052 22:24:02.966256 arm64_za-ptrace_Disabled_ZA_for_VL_192 skip
13053 22:24:02.971209 arm64_za-ptrace_Get_and_set_data_for_VL_192 skip
13054 22:24:02.971579 arm64_za-ptrace_Set_VL_208 pass
13055 22:24:02.971729 arm64_za-ptrace_Disabled_ZA_for_VL_208 skip
13056 22:24:02.971867 arm64_za-ptrace_Get_and_set_data_for_VL_208 skip
13057 22:24:02.971994 arm64_za-ptrace_Set_VL_224 pass
13058 22:24:02.972120 arm64_za-ptrace_Disabled_ZA_for_VL_224 skip
13059 22:24:02.972244 arm64_za-ptrace_Get_and_set_data_for_VL_224 skip
13060 22:24:02.972361 arm64_za-ptrace_Set_VL_240 pass
13061 22:24:02.972457 arm64_za-ptrace_Disabled_ZA_for_VL_240 skip
13062 22:24:02.972569 arm64_za-ptrace_Get_and_set_data_for_VL_240 skip
13063 22:24:02.972665 arm64_za-ptrace_Set_VL_256 pass
13064 22:24:02.972758 arm64_za-ptrace_Disabled_ZA_for_VL_256 pass
13065 22:24:02.972873 arm64_za-ptrace_Data_match_for_VL_256 pass
13066 22:24:02.972965 arm64_za-ptrace_Set_VL_272 pass
13067 22:24:02.973061 arm64_za-ptrace_Disabled_ZA_for_VL_272 skip
13068 22:24:02.973184 arm64_za-ptrace_Get_and_set_data_for_VL_272 skip
13069 22:24:02.973299 arm64_za-ptrace_Set_VL_288 pass
13070 22:24:02.973431 arm64_za-ptrace_Disabled_ZA_for_VL_288 skip
13071 22:24:02.973541 arm64_za-ptrace_Get_and_set_data_for_VL_288 skip
13072 22:24:02.973630 arm64_za-ptrace_Set_VL_304 pass
13073 22:24:02.973748 arm64_za-ptrace_Disabled_ZA_for_VL_304 skip
13074 22:24:02.973844 arm64_za-ptrace_Get_and_set_data_for_VL_304 skip
13075 22:24:02.973952 arm64_za-ptrace_Set_VL_320 pass
13076 22:24:02.974047 arm64_za-ptrace_Disabled_ZA_for_VL_320 skip
13077 22:24:02.974156 arm64_za-ptrace_Get_and_set_data_for_VL_320 skip
13078 22:24:02.974251 arm64_za-ptrace_Set_VL_336 pass
13079 22:24:02.974359 arm64_za-ptrace_Disabled_ZA_for_VL_336 skip
13080 22:24:02.974470 arm64_za-ptrace_Get_and_set_data_for_VL_336 skip
13081 22:24:02.974624 arm64_za-ptrace_Set_VL_352 pass
13082 22:24:02.974746 arm64_za-ptrace_Disabled_ZA_for_VL_352 skip
13083 22:24:02.974873 arm64_za-ptrace_Get_and_set_data_for_VL_352 skip
13084 22:24:02.974978 arm64_za-ptrace_Set_VL_368 pass
13085 22:24:02.979215 arm64_za-ptrace_Disabled_ZA_for_VL_368 skip
13086 22:24:02.979590 arm64_za-ptrace_Get_and_set_data_for_VL_368 skip
13087 22:24:02.979739 arm64_za-ptrace_Set_VL_384 pass
13088 22:24:02.979852 arm64_za-ptrace_Disabled_ZA_for_VL_384 skip
13089 22:24:02.980013 arm64_za-ptrace_Get_and_set_data_for_VL_384 skip
13090 22:24:02.980161 arm64_za-ptrace_Set_VL_400 pass
13091 22:24:02.980287 arm64_za-ptrace_Disabled_ZA_for_VL_400 skip
13092 22:24:02.980451 arm64_za-ptrace_Get_and_set_data_for_VL_400 skip
13093 22:24:02.980604 arm64_za-ptrace_Set_VL_416 pass
13094 22:24:02.980721 arm64_za-ptrace_Disabled_ZA_for_VL_416 skip
13095 22:24:02.980815 arm64_za-ptrace_Get_and_set_data_for_VL_416 skip
13096 22:24:02.980922 arm64_za-ptrace_Set_VL_432 pass
13097 22:24:02.981005 arm64_za-ptrace_Disabled_ZA_for_VL_432 skip
13098 22:24:02.981079 arm64_za-ptrace_Get_and_set_data_for_VL_432 skip
13099 22:24:02.981142 arm64_za-ptrace_Set_VL_448 pass
13100 22:24:02.981217 arm64_za-ptrace_Disabled_ZA_for_VL_448 skip
13101 22:24:02.981284 arm64_za-ptrace_Get_and_set_data_for_VL_448 skip
13102 22:24:02.981358 arm64_za-ptrace_Set_VL_464 pass
13103 22:24:02.981432 arm64_za-ptrace_Disabled_ZA_for_VL_464 skip
13104 22:24:02.981695 arm64_za-ptrace_Get_and_set_data_for_VL_464 skip
13105 22:24:02.981800 arm64_za-ptrace_Set_VL_480 pass
13106 22:24:02.981906 arm64_za-ptrace_Disabled_ZA_for_VL_480 skip
13107 22:24:02.982007 arm64_za-ptrace_Get_and_set_data_for_VL_480 skip
13108 22:24:02.982123 arm64_za-ptrace_Set_VL_496 pass
13109 22:24:02.982234 arm64_za-ptrace_Disabled_ZA_for_VL_496 skip
13110 22:24:03.003623 arm64_za-ptrace_Get_and_set_data_for_VL_496 skip
13111 22:24:03.003932 arm64_za-ptrace_Set_VL_512 pass
13112 22:24:03.004132 arm64_za-ptrace_Disabled_ZA_for_VL_512 skip
13113 22:24:03.004303 arm64_za-ptrace_Get_and_set_data_for_VL_512 skip
13114 22:24:03.004492 arm64_za-ptrace_Set_VL_528 pass
13115 22:24:03.004654 arm64_za-ptrace_Disabled_ZA_for_VL_528 skip
13116 22:24:03.004790 arm64_za-ptrace_Get_and_set_data_for_VL_528 skip
13117 22:24:03.004930 arm64_za-ptrace_Set_VL_544 pass
13118 22:24:03.005098 arm64_za-ptrace_Disabled_ZA_for_VL_544 skip
13119 22:24:03.005296 arm64_za-ptrace_Get_and_set_data_for_VL_544 skip
13120 22:24:03.005473 arm64_za-ptrace_Set_VL_560 pass
13121 22:24:03.005699 arm64_za-ptrace_Disabled_ZA_for_VL_560 skip
13122 22:24:03.005910 arm64_za-ptrace_Get_and_set_data_for_VL_560 skip
13123 22:24:03.006103 arm64_za-ptrace_Set_VL_576 pass
13124 22:24:03.006279 arm64_za-ptrace_Disabled_ZA_for_VL_576 skip
13125 22:24:03.006422 arm64_za-ptrace_Get_and_set_data_for_VL_576 skip
13126 22:24:03.006609 arm64_za-ptrace_Set_VL_592 pass
13127 22:24:03.006756 arm64_za-ptrace_Disabled_ZA_for_VL_592 skip
13128 22:24:03.006910 arm64_za-ptrace_Get_and_set_data_for_VL_592 skip
13129 22:24:03.007071 arm64_za-ptrace_Set_VL_608 pass
13130 22:24:03.007237 arm64_za-ptrace_Disabled_ZA_for_VL_608 skip
13131 22:24:03.007368 arm64_za-ptrace_Get_and_set_data_for_VL_608 skip
13132 22:24:03.007484 arm64_za-ptrace_Set_VL_624 pass
13133 22:24:03.007596 arm64_za-ptrace_Disabled_ZA_for_VL_624 skip
13134 22:24:03.007709 arm64_za-ptrace_Get_and_set_data_for_VL_624 skip
13135 22:24:03.007822 arm64_za-ptrace_Set_VL_640 pass
13136 22:24:03.007937 arm64_za-ptrace_Disabled_ZA_for_VL_640 skip
13137 22:24:03.008050 arm64_za-ptrace_Get_and_set_data_for_VL_640 skip
13138 22:24:03.008189 arm64_za-ptrace_Set_VL_656 pass
13139 22:24:03.008308 arm64_za-ptrace_Disabled_ZA_for_VL_656 skip
13140 22:24:03.008424 arm64_za-ptrace_Get_and_set_data_for_VL_656 skip
13141 22:24:03.008539 arm64_za-ptrace_Set_VL_672 pass
13142 22:24:03.011214 arm64_za-ptrace_Disabled_ZA_for_VL_672 skip
13143 22:24:03.011624 arm64_za-ptrace_Get_and_set_data_for_VL_672 skip
13144 22:24:03.011803 arm64_za-ptrace_Set_VL_688 pass
13145 22:24:03.011978 arm64_za-ptrace_Disabled_ZA_for_VL_688 skip
13146 22:24:03.012123 arm64_za-ptrace_Get_and_set_data_for_VL_688 skip
13147 22:24:03.012312 arm64_za-ptrace_Set_VL_704 pass
13148 22:24:03.012499 arm64_za-ptrace_Disabled_ZA_for_VL_704 skip
13149 22:24:03.012669 arm64_za-ptrace_Get_and_set_data_for_VL_704 skip
13150 22:24:03.012834 arm64_za-ptrace_Set_VL_720 pass
13151 22:24:03.013001 arm64_za-ptrace_Disabled_ZA_for_VL_720 skip
13152 22:24:03.013165 arm64_za-ptrace_Get_and_set_data_for_VL_720 skip
13153 22:24:03.013357 arm64_za-ptrace_Set_VL_736 pass
13154 22:24:03.013495 arm64_za-ptrace_Disabled_ZA_for_VL_736 skip
13155 22:24:03.013629 arm64_za-ptrace_Get_and_set_data_for_VL_736 skip
13156 22:24:03.013781 arm64_za-ptrace_Set_VL_752 pass
13157 22:24:03.013919 arm64_za-ptrace_Disabled_ZA_for_VL_752 skip
13158 22:24:03.014049 arm64_za-ptrace_Get_and_set_data_for_VL_752 skip
13159 22:24:03.014171 arm64_za-ptrace_Set_VL_768 pass
13160 22:24:03.014303 arm64_za-ptrace_Disabled_ZA_for_VL_768 skip
13161 22:24:03.014420 arm64_za-ptrace_Get_and_set_data_for_VL_768 skip
13162 22:24:03.014536 arm64_za-ptrace_Set_VL_784 pass
13163 22:24:03.014679 arm64_za-ptrace_Disabled_ZA_for_VL_784 skip
13164 22:24:03.014802 arm64_za-ptrace_Get_and_set_data_for_VL_784 skip
13165 22:24:03.014919 arm64_za-ptrace_Set_VL_800 pass
13166 22:24:03.015036 arm64_za-ptrace_Disabled_ZA_for_VL_800 skip
13167 22:24:03.015150 arm64_za-ptrace_Get_and_set_data_for_VL_800 skip
13168 22:24:03.015264 arm64_za-ptrace_Set_VL_816 pass
13169 22:24:03.015377 arm64_za-ptrace_Disabled_ZA_for_VL_816 skip
13170 22:24:03.015493 arm64_za-ptrace_Get_and_set_data_for_VL_816 skip
13171 22:24:03.015609 arm64_za-ptrace_Set_VL_832 pass
13172 22:24:03.015771 arm64_za-ptrace_Disabled_ZA_for_VL_832 skip
13173 22:24:03.015909 arm64_za-ptrace_Get_and_set_data_for_VL_832 skip
13174 22:24:03.016073 arm64_za-ptrace_Set_VL_848 pass
13175 22:24:03.016207 arm64_za-ptrace_Disabled_ZA_for_VL_848 skip
13176 22:24:03.016333 arm64_za-ptrace_Get_and_set_data_for_VL_848 skip
13177 22:24:03.016461 arm64_za-ptrace_Set_VL_864 pass
13178 22:24:03.016587 arm64_za-ptrace_Disabled_ZA_for_VL_864 skip
13179 22:24:03.016710 arm64_za-ptrace_Get_and_set_data_for_VL_864 skip
13180 22:24:03.016827 arm64_za-ptrace_Set_VL_880 pass
13181 22:24:03.016941 arm64_za-ptrace_Disabled_ZA_for_VL_880 skip
13182 22:24:03.017058 arm64_za-ptrace_Get_and_set_data_for_VL_880 skip
13183 22:24:03.017173 arm64_za-ptrace_Set_VL_896 pass
13184 22:24:03.017312 arm64_za-ptrace_Disabled_ZA_for_VL_896 skip
13185 22:24:03.017432 arm64_za-ptrace_Get_and_set_data_for_VL_896 skip
13186 22:24:03.017550 arm64_za-ptrace_Set_VL_912 pass
13187 22:24:03.017677 arm64_za-ptrace_Disabled_ZA_for_VL_912 skip
13188 22:24:03.017794 arm64_za-ptrace_Get_and_set_data_for_VL_912 skip
13189 22:24:03.023123 arm64_za-ptrace_Set_VL_928 pass
13190 22:24:03.023471 arm64_za-ptrace_Disabled_ZA_for_VL_928 skip
13191 22:24:03.023609 arm64_za-ptrace_Get_and_set_data_for_VL_928 skip
13192 22:24:03.023772 arm64_za-ptrace_Set_VL_944 pass
13193 22:24:03.023965 arm64_za-ptrace_Disabled_ZA_for_VL_944 skip
13194 22:24:03.024164 arm64_za-ptrace_Get_and_set_data_for_VL_944 skip
13195 22:24:03.024371 arm64_za-ptrace_Set_VL_960 pass
13196 22:24:03.024584 arm64_za-ptrace_Disabled_ZA_for_VL_960 skip
13197 22:24:03.024797 arm64_za-ptrace_Get_and_set_data_for_VL_960 skip
13198 22:24:03.024991 arm64_za-ptrace_Set_VL_976 pass
13199 22:24:03.025150 arm64_za-ptrace_Disabled_ZA_for_VL_976 skip
13200 22:24:03.025335 arm64_za-ptrace_Get_and_set_data_for_VL_976 skip
13201 22:24:03.025567 arm64_za-ptrace_Set_VL_992 pass
13202 22:24:03.025749 arm64_za-ptrace_Disabled_ZA_for_VL_992 skip
13203 22:24:03.025907 arm64_za-ptrace_Get_and_set_data_for_VL_992 skip
13204 22:24:03.026062 arm64_za-ptrace_Set_VL_1008 pass
13205 22:24:03.026213 arm64_za-ptrace_Disabled_ZA_for_VL_1008 skip
13206 22:24:03.026363 arm64_za-ptrace_Get_and_set_data_for_VL_1008 skip
13207 22:24:03.026515 arm64_za-ptrace_Set_VL_1024 pass
13208 22:24:03.026664 arm64_za-ptrace_Disabled_ZA_for_VL_1024 skip
13209 22:24:03.026799 arm64_za-ptrace_Get_and_set_data_for_VL_1024 skip
13210 22:24:03.026938 arm64_za-ptrace_Set_VL_1040 pass
13211 22:24:03.027060 arm64_za-ptrace_Disabled_ZA_for_VL_1040 skip
13212 22:24:03.027177 arm64_za-ptrace_Get_and_set_data_for_VL_1040 skip
13213 22:24:03.027290 arm64_za-ptrace_Set_VL_1056 pass
13214 22:24:03.027430 arm64_za-ptrace_Disabled_ZA_for_VL_1056 skip
13215 22:24:03.027545 arm64_za-ptrace_Get_and_set_data_for_VL_1056 skip
13216 22:24:03.027657 arm64_za-ptrace_Set_VL_1072 pass
13217 22:24:03.027766 arm64_za-ptrace_Disabled_ZA_for_VL_1072 skip
13218 22:24:03.027876 arm64_za-ptrace_Get_and_set_data_for_VL_1072 skip
13219 22:24:03.027987 arm64_za-ptrace_Set_VL_1088 pass
13220 22:24:03.028097 arm64_za-ptrace_Disabled_ZA_for_VL_1088 skip
13221 22:24:03.028207 arm64_za-ptrace_Get_and_set_data_for_VL_1088 skip
13222 22:24:03.028317 arm64_za-ptrace_Set_VL_1104 pass
13223 22:24:03.028427 arm64_za-ptrace_Disabled_ZA_for_VL_1104 skip
13224 22:24:03.028537 arm64_za-ptrace_Get_and_set_data_for_VL_1104 skip
13225 22:24:03.028647 arm64_za-ptrace_Set_VL_1120 pass
13226 22:24:03.028757 arm64_za-ptrace_Disabled_ZA_for_VL_1120 skip
13227 22:24:03.031211 arm64_za-ptrace_Get_and_set_data_for_VL_1120 skip
13228 22:24:03.031649 arm64_za-ptrace_Set_VL_1136 pass
13229 22:24:03.031821 arm64_za-ptrace_Disabled_ZA_for_VL_1136 skip
13230 22:24:03.032032 arm64_za-ptrace_Get_and_set_data_for_VL_1136 skip
13231 22:24:03.032235 arm64_za-ptrace_Set_VL_1152 pass
13232 22:24:03.032433 arm64_za-ptrace_Disabled_ZA_for_VL_1152 skip
13233 22:24:03.032662 arm64_za-ptrace_Get_and_set_data_for_VL_1152 skip
13234 22:24:03.032850 arm64_za-ptrace_Set_VL_1168 pass
13235 22:24:03.033030 arm64_za-ptrace_Disabled_ZA_for_VL_1168 skip
13236 22:24:03.033160 arm64_za-ptrace_Get_and_set_data_for_VL_1168 skip
13237 22:24:03.033287 arm64_za-ptrace_Set_VL_1184 pass
13238 22:24:03.033408 arm64_za-ptrace_Disabled_ZA_for_VL_1184 skip
13239 22:24:03.033528 arm64_za-ptrace_Get_and_set_data_for_VL_1184 skip
13240 22:24:03.033660 arm64_za-ptrace_Set_VL_1200 pass
13241 22:24:03.033789 arm64_za-ptrace_Disabled_ZA_for_VL_1200 skip
13242 22:24:03.033910 arm64_za-ptrace_Get_and_set_data_for_VL_1200 skip
13243 22:24:03.034013 arm64_za-ptrace_Set_VL_1216 pass
13244 22:24:03.034107 arm64_za-ptrace_Disabled_ZA_for_VL_1216 skip
13245 22:24:03.034184 arm64_za-ptrace_Get_and_set_data_for_VL_1216 skip
13246 22:24:03.034290 arm64_za-ptrace_Set_VL_1232 pass
13247 22:24:03.034385 arm64_za-ptrace_Disabled_ZA_for_VL_1232 skip
13248 22:24:03.034473 arm64_za-ptrace_Get_and_set_data_for_VL_1232 skip
13249 22:24:03.034571 arm64_za-ptrace_Set_VL_1248 pass
13250 22:24:03.034660 arm64_za-ptrace_Disabled_ZA_for_VL_1248 skip
13251 22:24:03.034759 arm64_za-ptrace_Get_and_set_data_for_VL_1248 skip
13252 22:24:03.034847 arm64_za-ptrace_Set_VL_1264 pass
13253 22:24:03.034949 arm64_za-ptrace_Disabled_ZA_for_VL_1264 skip
13254 22:24:03.035040 arm64_za-ptrace_Get_and_set_data_for_VL_1264 skip
13255 22:24:03.035108 arm64_za-ptrace_Set_VL_1280 pass
13256 22:24:03.035168 arm64_za-ptrace_Disabled_ZA_for_VL_1280 skip
13257 22:24:03.035227 arm64_za-ptrace_Get_and_set_data_for_VL_1280 skip
13258 22:24:03.035301 arm64_za-ptrace_Set_VL_1296 pass
13259 22:24:03.035363 arm64_za-ptrace_Disabled_ZA_for_VL_1296 skip
13260 22:24:03.035423 arm64_za-ptrace_Get_and_set_data_for_VL_1296 skip
13261 22:24:03.035482 arm64_za-ptrace_Set_VL_1312 pass
13262 22:24:03.035548 arm64_za-ptrace_Disabled_ZA_for_VL_1312 skip
13263 22:24:03.035628 arm64_za-ptrace_Get_and_set_data_for_VL_1312 skip
13264 22:24:03.035690 arm64_za-ptrace_Set_VL_1328 pass
13265 22:24:03.035749 arm64_za-ptrace_Disabled_ZA_for_VL_1328 skip
13266 22:24:03.035808 arm64_za-ptrace_Get_and_set_data_for_VL_1328 skip
13267 22:24:03.039184 arm64_za-ptrace_Set_VL_1344 pass
13268 22:24:03.039554 arm64_za-ptrace_Disabled_ZA_for_VL_1344 skip
13269 22:24:03.039751 arm64_za-ptrace_Get_and_set_data_for_VL_1344 skip
13270 22:24:03.039925 arm64_za-ptrace_Set_VL_1360 pass
13271 22:24:03.040089 arm64_za-ptrace_Disabled_ZA_for_VL_1360 skip
13272 22:24:03.040283 arm64_za-ptrace_Get_and_set_data_for_VL_1360 skip
13273 22:24:03.040449 arm64_za-ptrace_Set_VL_1376 pass
13274 22:24:03.040612 arm64_za-ptrace_Disabled_ZA_for_VL_1376 skip
13275 22:24:03.040773 arm64_za-ptrace_Get_and_set_data_for_VL_1376 skip
13276 22:24:03.040938 arm64_za-ptrace_Set_VL_1392 pass
13277 22:24:03.041067 arm64_za-ptrace_Disabled_ZA_for_VL_1392 skip
13278 22:24:03.041204 arm64_za-ptrace_Get_and_set_data_for_VL_1392 skip
13279 22:24:03.041330 arm64_za-ptrace_Set_VL_1408 pass
13280 22:24:03.041503 arm64_za-ptrace_Disabled_ZA_for_VL_1408 skip
13281 22:24:03.041638 arm64_za-ptrace_Get_and_set_data_for_VL_1408 skip
13282 22:24:03.041778 arm64_za-ptrace_Set_VL_1424 pass
13283 22:24:03.041896 arm64_za-ptrace_Disabled_ZA_for_VL_1424 skip
13284 22:24:03.042014 arm64_za-ptrace_Get_and_set_data_for_VL_1424 skip
13285 22:24:03.042101 arm64_za-ptrace_Set_VL_1440 pass
13286 22:24:03.042182 arm64_za-ptrace_Disabled_ZA_for_VL_1440 skip
13287 22:24:03.042261 arm64_za-ptrace_Get_and_set_data_for_VL_1440 skip
13288 22:24:03.042339 arm64_za-ptrace_Set_VL_1456 pass
13289 22:24:03.042421 arm64_za-ptrace_Disabled_ZA_for_VL_1456 skip
13290 22:24:03.042494 arm64_za-ptrace_Get_and_set_data_for_VL_1456 skip
13291 22:24:03.042569 arm64_za-ptrace_Set_VL_1472 pass
13292 22:24:03.042682 arm64_za-ptrace_Disabled_ZA_for_VL_1472 skip
13293 22:24:03.042793 arm64_za-ptrace_Get_and_set_data_for_VL_1472 skip
13294 22:24:03.042874 arm64_za-ptrace_Set_VL_1488 pass
13295 22:24:03.042935 arm64_za-ptrace_Disabled_ZA_for_VL_1488 skip
13296 22:24:03.042997 arm64_za-ptrace_Get_and_set_data_for_VL_1488 skip
13297 22:24:03.043054 arm64_za-ptrace_Set_VL_1504 pass
13298 22:24:03.043112 arm64_za-ptrace_Disabled_ZA_for_VL_1504 skip
13299 22:24:03.043171 arm64_za-ptrace_Get_and_set_data_for_VL_1504 skip
13300 22:24:03.043229 arm64_za-ptrace_Set_VL_1520 pass
13301 22:24:03.043286 arm64_za-ptrace_Disabled_ZA_for_VL_1520 skip
13302 22:24:03.043344 arm64_za-ptrace_Get_and_set_data_for_VL_1520 skip
13303 22:24:03.043415 arm64_za-ptrace_Set_VL_1536 pass
13304 22:24:03.043477 arm64_za-ptrace_Disabled_ZA_for_VL_1536 skip
13305 22:24:03.057177 arm64_za-ptrace_Get_and_set_data_for_VL_1536 skip
13306 22:24:03.057382 arm64_za-ptrace_Set_VL_1552 pass
13307 22:24:03.057705 arm64_za-ptrace_Disabled_ZA_for_VL_1552 skip
13308 22:24:03.057822 arm64_za-ptrace_Get_and_set_data_for_VL_1552 skip
13309 22:24:03.057932 arm64_za-ptrace_Set_VL_1568 pass
13310 22:24:03.058020 arm64_za-ptrace_Disabled_ZA_for_VL_1568 skip
13311 22:24:03.058111 arm64_za-ptrace_Get_and_set_data_for_VL_1568 skip
13312 22:24:03.058376 arm64_za-ptrace_Set_VL_1584 pass
13313 22:24:03.058460 arm64_za-ptrace_Disabled_ZA_for_VL_1584 skip
13314 22:24:03.058565 arm64_za-ptrace_Get_and_set_data_for_VL_1584 skip
13315 22:24:03.058668 arm64_za-ptrace_Set_VL_1600 pass
13316 22:24:03.058809 arm64_za-ptrace_Disabled_ZA_for_VL_1600 skip
13317 22:24:03.058913 arm64_za-ptrace_Get_and_set_data_for_VL_1600 skip
13318 22:24:03.059024 arm64_za-ptrace_Set_VL_1616 pass
13319 22:24:03.059112 arm64_za-ptrace_Disabled_ZA_for_VL_1616 skip
13320 22:24:03.059197 arm64_za-ptrace_Get_and_set_data_for_VL_1616 skip
13321 22:24:03.059282 arm64_za-ptrace_Set_VL_1632 pass
13322 22:24:03.059367 arm64_za-ptrace_Disabled_ZA_for_VL_1632 skip
13323 22:24:03.059451 arm64_za-ptrace_Get_and_set_data_for_VL_1632 skip
13324 22:24:03.059537 arm64_za-ptrace_Set_VL_1648 pass
13325 22:24:03.059642 arm64_za-ptrace_Disabled_ZA_for_VL_1648 skip
13326 22:24:03.059731 arm64_za-ptrace_Get_and_set_data_for_VL_1648 skip
13327 22:24:03.059816 arm64_za-ptrace_Set_VL_1664 pass
13328 22:24:03.059900 arm64_za-ptrace_Disabled_ZA_for_VL_1664 skip
13329 22:24:03.059999 arm64_za-ptrace_Get_and_set_data_for_VL_1664 skip
13330 22:24:03.060085 arm64_za-ptrace_Set_VL_1680 pass
13331 22:24:03.060168 arm64_za-ptrace_Disabled_ZA_for_VL_1680 skip
13332 22:24:03.060253 arm64_za-ptrace_Get_and_set_data_for_VL_1680 skip
13333 22:24:03.060351 arm64_za-ptrace_Set_VL_1696 pass
13334 22:24:03.060437 arm64_za-ptrace_Disabled_ZA_for_VL_1696 skip
13335 22:24:03.060535 arm64_za-ptrace_Get_and_set_data_for_VL_1696 skip
13336 22:24:03.060634 arm64_za-ptrace_Set_VL_1712 pass
13337 22:24:03.060734 arm64_za-ptrace_Disabled_ZA_for_VL_1712 skip
13338 22:24:03.061045 arm64_za-ptrace_Get_and_set_data_for_VL_1712 skip
13339 22:24:03.061150 arm64_za-ptrace_Set_VL_1728 pass
13340 22:24:03.061250 arm64_za-ptrace_Disabled_ZA_for_VL_1728 skip
13341 22:24:03.061352 arm64_za-ptrace_Get_and_set_data_for_VL_1728 skip
13342 22:24:03.061439 arm64_za-ptrace_Set_VL_1744 pass
13343 22:24:03.061524 arm64_za-ptrace_Disabled_ZA_for_VL_1744 skip
13344 22:24:03.061622 arm64_za-ptrace_Get_and_set_data_for_VL_1744 skip
13345 22:24:03.061718 arm64_za-ptrace_Set_VL_1760 pass
13346 22:24:03.061817 arm64_za-ptrace_Disabled_ZA_for_VL_1760 skip
13347 22:24:03.061917 arm64_za-ptrace_Get_and_set_data_for_VL_1760 skip
13348 22:24:03.062016 arm64_za-ptrace_Set_VL_1776 pass
13349 22:24:03.062115 arm64_za-ptrace_Disabled_ZA_for_VL_1776 skip
13350 22:24:03.062402 arm64_za-ptrace_Get_and_set_data_for_VL_1776 skip
13351 22:24:03.062492 arm64_za-ptrace_Set_VL_1792 pass
13352 22:24:03.062591 arm64_za-ptrace_Disabled_ZA_for_VL_1792 skip
13353 22:24:03.062690 arm64_za-ptrace_Get_and_set_data_for_VL_1792 skip
13354 22:24:03.063507 arm64_za-ptrace_Set_VL_1808 pass
13355 22:24:03.063601 arm64_za-ptrace_Disabled_ZA_for_VL_1808 skip
13356 22:24:03.063690 arm64_za-ptrace_Get_and_set_data_for_VL_1808 skip
13357 22:24:03.063775 arm64_za-ptrace_Set_VL_1824 pass
13358 22:24:03.067366 arm64_za-ptrace_Disabled_ZA_for_VL_1824 skip
13359 22:24:03.067486 arm64_za-ptrace_Get_and_set_data_for_VL_1824 skip
13360 22:24:03.067587 arm64_za-ptrace_Set_VL_1840 pass
13361 22:24:03.067693 arm64_za-ptrace_Disabled_ZA_for_VL_1840 skip
13362 22:24:03.067791 arm64_za-ptrace_Get_and_set_data_for_VL_1840 skip
13363 22:24:03.067889 arm64_za-ptrace_Set_VL_1856 pass
13364 22:24:03.067985 arm64_za-ptrace_Disabled_ZA_for_VL_1856 skip
13365 22:24:03.068083 arm64_za-ptrace_Get_and_set_data_for_VL_1856 skip
13366 22:24:03.068181 arm64_za-ptrace_Set_VL_1872 pass
13367 22:24:03.068278 arm64_za-ptrace_Disabled_ZA_for_VL_1872 skip
13368 22:24:03.068383 arm64_za-ptrace_Get_and_set_data_for_VL_1872 skip
13369 22:24:03.068668 arm64_za-ptrace_Set_VL_1888 pass
13370 22:24:03.068774 arm64_za-ptrace_Disabled_ZA_for_VL_1888 skip
13371 22:24:03.068874 arm64_za-ptrace_Get_and_set_data_for_VL_1888 skip
13372 22:24:03.068963 arm64_za-ptrace_Set_VL_1904 pass
13373 22:24:03.069048 arm64_za-ptrace_Disabled_ZA_for_VL_1904 skip
13374 22:24:03.069146 arm64_za-ptrace_Get_and_set_data_for_VL_1904 skip
13375 22:24:03.069232 arm64_za-ptrace_Set_VL_1920 pass
13376 22:24:03.069330 arm64_za-ptrace_Disabled_ZA_for_VL_1920 skip
13377 22:24:03.069428 arm64_za-ptrace_Get_and_set_data_for_VL_1920 skip
13378 22:24:03.069528 arm64_za-ptrace_Set_VL_1936 pass
13379 22:24:03.069614 arm64_za-ptrace_Disabled_ZA_for_VL_1936 skip
13380 22:24:03.069726 arm64_za-ptrace_Get_and_set_data_for_VL_1936 skip
13381 22:24:03.069825 arm64_za-ptrace_Set_VL_1952 pass
13382 22:24:03.070324 arm64_za-ptrace_Disabled_ZA_for_VL_1952 skip
13383 22:24:03.070429 arm64_za-ptrace_Get_and_set_data_for_VL_1952 skip
13384 22:24:03.070517 arm64_za-ptrace_Set_VL_1968 pass
13385 22:24:03.070601 arm64_za-ptrace_Disabled_ZA_for_VL_1968 skip
13386 22:24:03.070887 arm64_za-ptrace_Get_and_set_data_for_VL_1968 skip
13387 22:24:03.070990 arm64_za-ptrace_Set_VL_1984 pass
13388 22:24:03.071076 arm64_za-ptrace_Disabled_ZA_for_VL_1984 skip
13389 22:24:03.071159 arm64_za-ptrace_Get_and_set_data_for_VL_1984 skip
13390 22:24:03.071243 arm64_za-ptrace_Set_VL_2000 pass
13391 22:24:03.071328 arm64_za-ptrace_Disabled_ZA_for_VL_2000 skip
13392 22:24:03.071425 arm64_za-ptrace_Get_and_set_data_for_VL_2000 skip
13393 22:24:03.075302 arm64_za-ptrace_Set_VL_2016 pass
13394 22:24:03.075490 arm64_za-ptrace_Disabled_ZA_for_VL_2016 skip
13395 22:24:03.075802 arm64_za-ptrace_Get_and_set_data_for_VL_2016 skip
13396 22:24:03.075906 arm64_za-ptrace_Set_VL_2032 pass
13397 22:24:03.075999 arm64_za-ptrace_Disabled_ZA_for_VL_2032 skip
13398 22:24:03.076084 arm64_za-ptrace_Get_and_set_data_for_VL_2032 skip
13399 22:24:03.076170 arm64_za-ptrace_Set_VL_2048 pass
13400 22:24:03.076268 arm64_za-ptrace_Disabled_ZA_for_VL_2048 skip
13401 22:24:03.076352 arm64_za-ptrace_Get_and_set_data_for_VL_2048 skip
13402 22:24:03.076434 arm64_za-ptrace_Set_VL_2064 pass
13403 22:24:03.076516 arm64_za-ptrace_Disabled_ZA_for_VL_2064 skip
13404 22:24:03.076613 arm64_za-ptrace_Get_and_set_data_for_VL_2064 skip
13405 22:24:03.076698 arm64_za-ptrace_Set_VL_2080 pass
13406 22:24:03.076793 arm64_za-ptrace_Disabled_ZA_for_VL_2080 skip
13407 22:24:03.076891 arm64_za-ptrace_Get_and_set_data_for_VL_2080 skip
13408 22:24:03.076975 arm64_za-ptrace_Set_VL_2096 pass
13409 22:24:03.077077 arm64_za-ptrace_Disabled_ZA_for_VL_2096 skip
13410 22:24:03.077161 arm64_za-ptrace_Get_and_set_data_for_VL_2096 skip
13411 22:24:03.077243 arm64_za-ptrace_Set_VL_2112 pass
13412 22:24:03.077339 arm64_za-ptrace_Disabled_ZA_for_VL_2112 skip
13413 22:24:03.077423 arm64_za-ptrace_Get_and_set_data_for_VL_2112 skip
13414 22:24:03.077505 arm64_za-ptrace_Set_VL_2128 pass
13415 22:24:03.077601 arm64_za-ptrace_Disabled_ZA_for_VL_2128 skip
13416 22:24:03.077710 arm64_za-ptrace_Get_and_set_data_for_VL_2128 skip
13417 22:24:03.077796 arm64_za-ptrace_Set_VL_2144 pass
13418 22:24:03.077892 arm64_za-ptrace_Disabled_ZA_for_VL_2144 skip
13419 22:24:03.077977 arm64_za-ptrace_Get_and_set_data_for_VL_2144 skip
13420 22:24:03.078059 arm64_za-ptrace_Set_VL_2160 pass
13421 22:24:03.078162 arm64_za-ptrace_Disabled_ZA_for_VL_2160 skip
13422 22:24:03.078247 arm64_za-ptrace_Get_and_set_data_for_VL_2160 skip
13423 22:24:03.078745 arm64_za-ptrace_Set_VL_2176 pass
13424 22:24:03.078850 arm64_za-ptrace_Disabled_ZA_for_VL_2176 skip
13425 22:24:03.078935 arm64_za-ptrace_Get_and_set_data_for_VL_2176 skip
13426 22:24:03.079018 arm64_za-ptrace_Set_VL_2192 pass
13427 22:24:03.079102 arm64_za-ptrace_Disabled_ZA_for_VL_2192 skip
13428 22:24:03.079186 arm64_za-ptrace_Get_and_set_data_for_VL_2192 skip
13429 22:24:03.079283 arm64_za-ptrace_Set_VL_2208 pass
13430 22:24:03.079367 arm64_za-ptrace_Disabled_ZA_for_VL_2208 skip
13431 22:24:03.079451 arm64_za-ptrace_Get_and_set_data_for_VL_2208 skip
13432 22:24:03.079538 arm64_za-ptrace_Set_VL_2224 pass
13433 22:24:03.083526 arm64_za-ptrace_Disabled_ZA_for_VL_2224 skip
13434 22:24:03.083786 arm64_za-ptrace_Get_and_set_data_for_VL_2224 skip
13435 22:24:03.083991 arm64_za-ptrace_Set_VL_2240 pass
13436 22:24:03.084474 arm64_za-ptrace_Disabled_ZA_for_VL_2240 skip
13437 22:24:03.084657 arm64_za-ptrace_Get_and_set_data_for_VL_2240 skip
13438 22:24:03.084817 arm64_za-ptrace_Set_VL_2256 pass
13439 22:24:03.084990 arm64_za-ptrace_Disabled_ZA_for_VL_2256 skip
13440 22:24:03.085167 arm64_za-ptrace_Get_and_set_data_for_VL_2256 skip
13441 22:24:03.085346 arm64_za-ptrace_Set_VL_2272 pass
13442 22:24:03.085522 arm64_za-ptrace_Disabled_ZA_for_VL_2272 skip
13443 22:24:03.085737 arm64_za-ptrace_Get_and_set_data_for_VL_2272 skip
13444 22:24:03.085959 arm64_za-ptrace_Set_VL_2288 pass
13445 22:24:03.086145 arm64_za-ptrace_Disabled_ZA_for_VL_2288 skip
13446 22:24:03.086340 arm64_za-ptrace_Get_and_set_data_for_VL_2288 skip
13447 22:24:03.086511 arm64_za-ptrace_Set_VL_2304 pass
13448 22:24:03.086689 arm64_za-ptrace_Disabled_ZA_for_VL_2304 skip
13449 22:24:03.086847 arm64_za-ptrace_Get_and_set_data_for_VL_2304 skip
13450 22:24:03.087028 arm64_za-ptrace_Set_VL_2320 pass
13451 22:24:03.087166 arm64_za-ptrace_Disabled_ZA_for_VL_2320 skip
13452 22:24:03.087281 arm64_za-ptrace_Get_and_set_data_for_VL_2320 skip
13453 22:24:03.087395 arm64_za-ptrace_Set_VL_2336 pass
13454 22:24:03.087509 arm64_za-ptrace_Disabled_ZA_for_VL_2336 skip
13455 22:24:03.087623 arm64_za-ptrace_Get_and_set_data_for_VL_2336 skip
13456 22:24:03.087737 arm64_za-ptrace_Set_VL_2352 pass
13457 22:24:03.087848 arm64_za-ptrace_Disabled_ZA_for_VL_2352 skip
13458 22:24:03.087960 arm64_za-ptrace_Get_and_set_data_for_VL_2352 skip
13459 22:24:03.088071 arm64_za-ptrace_Set_VL_2368 pass
13460 22:24:03.088184 arm64_za-ptrace_Disabled_ZA_for_VL_2368 skip
13461 22:24:03.088297 arm64_za-ptrace_Get_and_set_data_for_VL_2368 skip
13462 22:24:03.088411 arm64_za-ptrace_Set_VL_2384 pass
13463 22:24:03.088530 arm64_za-ptrace_Disabled_ZA_for_VL_2384 skip
13464 22:24:03.088672 arm64_za-ptrace_Get_and_set_data_for_VL_2384 skip
13465 22:24:03.088794 arm64_za-ptrace_Set_VL_2400 pass
13466 22:24:03.088910 arm64_za-ptrace_Disabled_ZA_for_VL_2400 skip
13467 22:24:03.089024 arm64_za-ptrace_Get_and_set_data_for_VL_2400 skip
13468 22:24:03.089141 arm64_za-ptrace_Set_VL_2416 pass
13469 22:24:03.089254 arm64_za-ptrace_Disabled_ZA_for_VL_2416 skip
13470 22:24:03.091182 arm64_za-ptrace_Get_and_set_data_for_VL_2416 skip
13471 22:24:03.091580 arm64_za-ptrace_Set_VL_2432 pass
13472 22:24:03.091813 arm64_za-ptrace_Disabled_ZA_for_VL_2432 skip
13473 22:24:03.092012 arm64_za-ptrace_Get_and_set_data_for_VL_2432 skip
13474 22:24:03.092236 arm64_za-ptrace_Set_VL_2448 pass
13475 22:24:03.092402 arm64_za-ptrace_Disabled_ZA_for_VL_2448 skip
13476 22:24:03.092562 arm64_za-ptrace_Get_and_set_data_for_VL_2448 skip
13477 22:24:03.092725 arm64_za-ptrace_Set_VL_2464 pass
13478 22:24:03.092890 arm64_za-ptrace_Disabled_ZA_for_VL_2464 skip
13479 22:24:03.093053 arm64_za-ptrace_Get_and_set_data_for_VL_2464 skip
13480 22:24:03.093216 arm64_za-ptrace_Set_VL_2480 pass
13481 22:24:03.093412 arm64_za-ptrace_Disabled_ZA_for_VL_2480 skip
13482 22:24:03.093579 arm64_za-ptrace_Get_and_set_data_for_VL_2480 skip
13483 22:24:03.093758 arm64_za-ptrace_Set_VL_2496 pass
13484 22:24:03.093909 arm64_za-ptrace_Disabled_ZA_for_VL_2496 skip
13485 22:24:03.094030 arm64_za-ptrace_Get_and_set_data_for_VL_2496 skip
13486 22:24:03.094144 arm64_za-ptrace_Set_VL_2512 pass
13487 22:24:03.094268 arm64_za-ptrace_Disabled_ZA_for_VL_2512 skip
13488 22:24:03.094391 arm64_za-ptrace_Get_and_set_data_for_VL_2512 skip
13489 22:24:03.094507 arm64_za-ptrace_Set_VL_2528 pass
13490 22:24:03.094619 arm64_za-ptrace_Disabled_ZA_for_VL_2528 skip
13491 22:24:03.094733 arm64_za-ptrace_Get_and_set_data_for_VL_2528 skip
13492 22:24:03.094845 arm64_za-ptrace_Set_VL_2544 pass
13493 22:24:03.094985 arm64_za-ptrace_Disabled_ZA_for_VL_2544 skip
13494 22:24:03.095105 arm64_za-ptrace_Get_and_set_data_for_VL_2544 skip
13495 22:24:03.095221 arm64_za-ptrace_Set_VL_2560 pass
13496 22:24:03.095335 arm64_za-ptrace_Disabled_ZA_for_VL_2560 skip
13497 22:24:03.095450 arm64_za-ptrace_Get_and_set_data_for_VL_2560 skip
13498 22:24:03.110383 arm64_za-ptrace_Set_VL_2576 pass
13499 22:24:03.110580 arm64_za-ptrace_Disabled_ZA_for_VL_2576 skip
13500 22:24:03.110780 arm64_za-ptrace_Get_and_set_data_for_VL_2576 skip
13501 22:24:03.111025 arm64_za-ptrace_Set_VL_2592 pass
13502 22:24:03.111231 arm64_za-ptrace_Disabled_ZA_for_VL_2592 skip
13503 22:24:03.111434 arm64_za-ptrace_Get_and_set_data_for_VL_2592 skip
13504 22:24:03.111640 arm64_za-ptrace_Set_VL_2608 pass
13505 22:24:03.111824 arm64_za-ptrace_Disabled_ZA_for_VL_2608 skip
13506 22:24:03.112037 arm64_za-ptrace_Get_and_set_data_for_VL_2608 skip
13507 22:24:03.112220 arm64_za-ptrace_Set_VL_2624 pass
13508 22:24:03.112394 arm64_za-ptrace_Disabled_ZA_for_VL_2624 skip
13509 22:24:03.112566 arm64_za-ptrace_Get_and_set_data_for_VL_2624 skip
13510 22:24:03.112760 arm64_za-ptrace_Set_VL_2640 pass
13511 22:24:03.112921 arm64_za-ptrace_Disabled_ZA_for_VL_2640 skip
13512 22:24:03.113063 arm64_za-ptrace_Get_and_set_data_for_VL_2640 skip
13513 22:24:03.113219 arm64_za-ptrace_Set_VL_2656 pass
13514 22:24:03.113384 arm64_za-ptrace_Disabled_ZA_for_VL_2656 skip
13515 22:24:03.113558 arm64_za-ptrace_Get_and_set_data_for_VL_2656 skip
13516 22:24:03.113725 arm64_za-ptrace_Set_VL_2672 pass
13517 22:24:03.113929 arm64_za-ptrace_Disabled_ZA_for_VL_2672 skip
13518 22:24:03.114114 arm64_za-ptrace_Get_and_set_data_for_VL_2672 skip
13519 22:24:03.114325 arm64_za-ptrace_Set_VL_2688 pass
13520 22:24:03.114485 arm64_za-ptrace_Disabled_ZA_for_VL_2688 skip
13521 22:24:03.114642 arm64_za-ptrace_Get_and_set_data_for_VL_2688 skip
13522 22:24:03.114796 arm64_za-ptrace_Set_VL_2704 pass
13523 22:24:03.114952 arm64_za-ptrace_Disabled_ZA_for_VL_2704 skip
13524 22:24:03.115076 arm64_za-ptrace_Get_and_set_data_for_VL_2704 skip
13525 22:24:03.115195 arm64_za-ptrace_Set_VL_2720 pass
13526 22:24:03.115311 arm64_za-ptrace_Disabled_ZA_for_VL_2720 skip
13527 22:24:03.115427 arm64_za-ptrace_Get_and_set_data_for_VL_2720 skip
13528 22:24:03.115544 arm64_za-ptrace_Set_VL_2736 pass
13529 22:24:03.115659 arm64_za-ptrace_Disabled_ZA_for_VL_2736 skip
13530 22:24:03.115775 arm64_za-ptrace_Get_and_set_data_for_VL_2736 skip
13531 22:24:03.115923 arm64_za-ptrace_Set_VL_2752 pass
13532 22:24:03.116048 arm64_za-ptrace_Disabled_ZA_for_VL_2752 skip
13533 22:24:03.116167 arm64_za-ptrace_Get_and_set_data_for_VL_2752 skip
13534 22:24:03.116284 arm64_za-ptrace_Set_VL_2768 pass
13535 22:24:03.116401 arm64_za-ptrace_Disabled_ZA_for_VL_2768 skip
13536 22:24:03.116517 arm64_za-ptrace_Get_and_set_data_for_VL_2768 skip
13537 22:24:03.116634 arm64_za-ptrace_Set_VL_2784 pass
13538 22:24:03.116750 arm64_za-ptrace_Disabled_ZA_for_VL_2784 skip
13539 22:24:03.116867 arm64_za-ptrace_Get_and_set_data_for_VL_2784 skip
13540 22:24:03.116984 arm64_za-ptrace_Set_VL_2800 pass
13541 22:24:03.117099 arm64_za-ptrace_Disabled_ZA_for_VL_2800 skip
13542 22:24:03.117216 arm64_za-ptrace_Get_and_set_data_for_VL_2800 skip
13543 22:24:03.117541 arm64_za-ptrace_Set_VL_2816 pass
13544 22:24:03.119180 arm64_za-ptrace_Disabled_ZA_for_VL_2816 skip
13545 22:24:03.119648 arm64_za-ptrace_Get_and_set_data_for_VL_2816 skip
13546 22:24:03.119856 arm64_za-ptrace_Set_VL_2832 pass
13547 22:24:03.120038 arm64_za-ptrace_Disabled_ZA_for_VL_2832 skip
13548 22:24:03.120218 arm64_za-ptrace_Get_and_set_data_for_VL_2832 skip
13549 22:24:03.120428 arm64_za-ptrace_Set_VL_2848 pass
13550 22:24:03.120635 arm64_za-ptrace_Disabled_ZA_for_VL_2848 skip
13551 22:24:03.120863 arm64_za-ptrace_Get_and_set_data_for_VL_2848 skip
13552 22:24:03.121087 arm64_za-ptrace_Set_VL_2864 pass
13553 22:24:03.121315 arm64_za-ptrace_Disabled_ZA_for_VL_2864 skip
13554 22:24:03.121563 arm64_za-ptrace_Get_and_set_data_for_VL_2864 skip
13555 22:24:03.121775 arm64_za-ptrace_Set_VL_2880 pass
13556 22:24:03.121962 arm64_za-ptrace_Disabled_ZA_for_VL_2880 skip
13557 22:24:03.122166 arm64_za-ptrace_Get_and_set_data_for_VL_2880 skip
13558 22:24:03.122330 arm64_za-ptrace_Set_VL_2896 pass
13559 22:24:03.122490 arm64_za-ptrace_Disabled_ZA_for_VL_2896 skip
13560 22:24:03.122655 arm64_za-ptrace_Get_and_set_data_for_VL_2896 skip
13561 22:24:03.122820 arm64_za-ptrace_Set_VL_2912 pass
13562 22:24:03.122979 arm64_za-ptrace_Disabled_ZA_for_VL_2912 skip
13563 22:24:03.123126 arm64_za-ptrace_Get_and_set_data_for_VL_2912 skip
13564 22:24:03.123244 arm64_za-ptrace_Set_VL_2928 pass
13565 22:24:03.123358 arm64_za-ptrace_Disabled_ZA_for_VL_2928 skip
13566 22:24:03.123471 arm64_za-ptrace_Get_and_set_data_for_VL_2928 skip
13567 22:24:03.123626 arm64_za-ptrace_Set_VL_2944 pass
13568 22:24:03.123765 arm64_za-ptrace_Disabled_ZA_for_VL_2944 skip
13569 22:24:03.123882 arm64_za-ptrace_Get_and_set_data_for_VL_2944 skip
13570 22:24:03.123995 arm64_za-ptrace_Set_VL_2960 pass
13571 22:24:03.124137 arm64_za-ptrace_Disabled_ZA_for_VL_2960 skip
13572 22:24:03.124263 arm64_za-ptrace_Get_and_set_data_for_VL_2960 skip
13573 22:24:03.124380 arm64_za-ptrace_Set_VL_2976 pass
13574 22:24:03.124496 arm64_za-ptrace_Disabled_ZA_for_VL_2976 skip
13575 22:24:03.124611 arm64_za-ptrace_Get_and_set_data_for_VL_2976 skip
13576 22:24:03.124724 arm64_za-ptrace_Set_VL_2992 pass
13577 22:24:03.124838 arm64_za-ptrace_Disabled_ZA_for_VL_2992 skip
13578 22:24:03.127298 arm64_za-ptrace_Get_and_set_data_for_VL_2992 skip
13579 22:24:03.127760 arm64_za-ptrace_Set_VL_3008 pass
13580 22:24:03.127962 arm64_za-ptrace_Disabled_ZA_for_VL_3008 skip
13581 22:24:03.128178 arm64_za-ptrace_Get_and_set_data_for_VL_3008 skip
13582 22:24:03.128382 arm64_za-ptrace_Set_VL_3024 pass
13583 22:24:03.128659 arm64_za-ptrace_Disabled_ZA_for_VL_3024 skip
13584 22:24:03.128866 arm64_za-ptrace_Get_and_set_data_for_VL_3024 skip
13585 22:24:03.129081 arm64_za-ptrace_Set_VL_3040 pass
13586 22:24:03.129289 arm64_za-ptrace_Disabled_ZA_for_VL_3040 skip
13587 22:24:03.129479 arm64_za-ptrace_Get_and_set_data_for_VL_3040 skip
13588 22:24:03.129708 arm64_za-ptrace_Set_VL_3056 pass
13589 22:24:03.129903 arm64_za-ptrace_Disabled_ZA_for_VL_3056 skip
13590 22:24:03.130108 arm64_za-ptrace_Get_and_set_data_for_VL_3056 skip
13591 22:24:03.130253 arm64_za-ptrace_Set_VL_3072 pass
13592 22:24:03.130370 arm64_za-ptrace_Disabled_ZA_for_VL_3072 skip
13593 22:24:03.130487 arm64_za-ptrace_Get_and_set_data_for_VL_3072 skip
13594 22:24:03.130604 arm64_za-ptrace_Set_VL_3088 pass
13595 22:24:03.130721 arm64_za-ptrace_Disabled_ZA_for_VL_3088 skip
13596 22:24:03.130838 arm64_za-ptrace_Get_and_set_data_for_VL_3088 skip
13597 22:24:03.130952 arm64_za-ptrace_Set_VL_3104 pass
13598 22:24:03.133742 arm64_za-ptrace_Disabled_ZA_for_VL_3104 skip
13599 22:24:03.133865 arm64_za-ptrace_Get_and_set_data_for_VL_3104 skip
13600 22:24:03.133956 arm64_za-ptrace_Set_VL_3120 pass
13601 22:24:03.134043 arm64_za-ptrace_Disabled_ZA_for_VL_3120 skip
13602 22:24:03.134129 arm64_za-ptrace_Get_and_set_data_for_VL_3120 skip
13603 22:24:03.134216 arm64_za-ptrace_Set_VL_3136 pass
13604 22:24:03.134303 arm64_za-ptrace_Disabled_ZA_for_VL_3136 skip
13605 22:24:03.134389 arm64_za-ptrace_Get_and_set_data_for_VL_3136 skip
13606 22:24:03.134475 arm64_za-ptrace_Set_VL_3152 pass
13607 22:24:03.134561 arm64_za-ptrace_Disabled_ZA_for_VL_3152 skip
13608 22:24:03.134648 arm64_za-ptrace_Get_and_set_data_for_VL_3152 skip
13609 22:24:03.134734 arm64_za-ptrace_Set_VL_3168 pass
13610 22:24:03.134820 arm64_za-ptrace_Disabled_ZA_for_VL_3168 skip
13611 22:24:03.135449 arm64_za-ptrace_Get_and_set_data_for_VL_3168 skip
13612 22:24:03.135579 arm64_za-ptrace_Set_VL_3184 pass
13613 22:24:03.135702 arm64_za-ptrace_Disabled_ZA_for_VL_3184 skip
13614 22:24:03.135798 arm64_za-ptrace_Get_and_set_data_for_VL_3184 skip
13615 22:24:03.135901 arm64_za-ptrace_Set_VL_3200 pass
13616 22:24:03.136005 arm64_za-ptrace_Disabled_ZA_for_VL_3200 skip
13617 22:24:03.136117 arm64_za-ptrace_Get_and_set_data_for_VL_3200 skip
13618 22:24:03.136225 arm64_za-ptrace_Set_VL_3216 pass
13619 22:24:03.136513 arm64_za-ptrace_Disabled_ZA_for_VL_3216 skip
13620 22:24:03.136607 arm64_za-ptrace_Get_and_set_data_for_VL_3216 skip
13621 22:24:03.136710 arm64_za-ptrace_Set_VL_3232 pass
13622 22:24:03.136799 arm64_za-ptrace_Disabled_ZA_for_VL_3232 skip
13623 22:24:03.137132 arm64_za-ptrace_Get_and_set_data_for_VL_3232 skip
13624 22:24:03.137264 arm64_za-ptrace_Set_VL_3248 pass
13625 22:24:03.137379 arm64_za-ptrace_Disabled_ZA_for_VL_3248 skip
13626 22:24:03.137506 arm64_za-ptrace_Get_and_set_data_for_VL_3248 skip
13627 22:24:03.137614 arm64_za-ptrace_Set_VL_3264 pass
13628 22:24:03.137765 arm64_za-ptrace_Disabled_ZA_for_VL_3264 skip
13629 22:24:03.137897 arm64_za-ptrace_Get_and_set_data_for_VL_3264 skip
13630 22:24:03.138023 arm64_za-ptrace_Set_VL_3280 pass
13631 22:24:03.138175 arm64_za-ptrace_Disabled_ZA_for_VL_3280 skip
13632 22:24:03.138346 arm64_za-ptrace_Get_and_set_data_for_VL_3280 skip
13633 22:24:03.138494 arm64_za-ptrace_Set_VL_3296 pass
13634 22:24:03.138652 arm64_za-ptrace_Disabled_ZA_for_VL_3296 skip
13635 22:24:03.138774 arm64_za-ptrace_Get_and_set_data_for_VL_3296 skip
13636 22:24:03.138889 arm64_za-ptrace_Set_VL_3312 pass
13637 22:24:03.139029 arm64_za-ptrace_Disabled_ZA_for_VL_3312 skip
13638 22:24:03.139176 arm64_za-ptrace_Get_and_set_data_for_VL_3312 skip
13639 22:24:03.139280 arm64_za-ptrace_Set_VL_3328 pass
13640 22:24:03.139369 arm64_za-ptrace_Disabled_ZA_for_VL_3328 skip
13641 22:24:03.143246 arm64_za-ptrace_Get_and_set_data_for_VL_3328 skip
13642 22:24:03.143582 arm64_za-ptrace_Set_VL_3344 pass
13643 22:24:03.143737 arm64_za-ptrace_Disabled_ZA_for_VL_3344 skip
13644 22:24:03.143911 arm64_za-ptrace_Get_and_set_data_for_VL_3344 skip
13645 22:24:03.144045 arm64_za-ptrace_Set_VL_3360 pass
13646 22:24:03.144199 arm64_za-ptrace_Disabled_ZA_for_VL_3360 skip
13647 22:24:03.144389 arm64_za-ptrace_Get_and_set_data_for_VL_3360 skip
13648 22:24:03.144551 arm64_za-ptrace_Set_VL_3376 pass
13649 22:24:03.144672 arm64_za-ptrace_Disabled_ZA_for_VL_3376 skip
13650 22:24:03.144812 arm64_za-ptrace_Get_and_set_data_for_VL_3376 skip
13651 22:24:03.144937 arm64_za-ptrace_Set_VL_3392 pass
13652 22:24:03.145123 arm64_za-ptrace_Disabled_ZA_for_VL_3392 skip
13653 22:24:03.145271 arm64_za-ptrace_Get_and_set_data_for_VL_3392 skip
13654 22:24:03.145400 arm64_za-ptrace_Set_VL_3408 pass
13655 22:24:03.145499 arm64_za-ptrace_Disabled_ZA_for_VL_3408 skip
13656 22:24:03.145612 arm64_za-ptrace_Get_and_set_data_for_VL_3408 skip
13657 22:24:03.145785 arm64_za-ptrace_Set_VL_3424 pass
13658 22:24:03.145909 arm64_za-ptrace_Disabled_ZA_for_VL_3424 skip
13659 22:24:03.146050 arm64_za-ptrace_Get_and_set_data_for_VL_3424 skip
13660 22:24:03.146212 arm64_za-ptrace_Set_VL_3440 pass
13661 22:24:03.146376 arm64_za-ptrace_Disabled_ZA_for_VL_3440 skip
13662 22:24:03.146532 arm64_za-ptrace_Get_and_set_data_for_VL_3440 skip
13663 22:24:03.146724 arm64_za-ptrace_Set_VL_3456 pass
13664 22:24:03.146853 arm64_za-ptrace_Disabled_ZA_for_VL_3456 skip
13665 22:24:03.146968 arm64_za-ptrace_Get_and_set_data_for_VL_3456 skip
13666 22:24:03.147088 arm64_za-ptrace_Set_VL_3472 pass
13667 22:24:03.147186 arm64_za-ptrace_Disabled_ZA_for_VL_3472 skip
13668 22:24:03.147274 arm64_za-ptrace_Get_and_set_data_for_VL_3472 skip
13669 22:24:03.147360 arm64_za-ptrace_Set_VL_3488 pass
13670 22:24:03.147465 arm64_za-ptrace_Disabled_ZA_for_VL_3488 skip
13671 22:24:03.147557 arm64_za-ptrace_Get_and_set_data_for_VL_3488 skip
13672 22:24:03.151326 arm64_za-ptrace_Set_VL_3504 pass
13673 22:24:03.151662 arm64_za-ptrace_Disabled_ZA_for_VL_3504 skip
13674 22:24:03.152289 arm64_za-ptrace_Get_and_set_data_for_VL_3504 skip
13675 22:24:03.152398 arm64_za-ptrace_Set_VL_3520 pass
13676 22:24:03.152483 arm64_za-ptrace_Disabled_ZA_for_VL_3520 skip
13677 22:24:03.152566 arm64_za-ptrace_Get_and_set_data_for_VL_3520 skip
13678 22:24:03.152648 arm64_za-ptrace_Set_VL_3536 pass
13679 22:24:03.152730 arm64_za-ptrace_Disabled_ZA_for_VL_3536 skip
13680 22:24:03.152811 arm64_za-ptrace_Get_and_set_data_for_VL_3536 skip
13681 22:24:03.152893 arm64_za-ptrace_Set_VL_3552 pass
13682 22:24:03.153193 arm64_za-ptrace_Disabled_ZA_for_VL_3552 skip
13683 22:24:03.153293 arm64_za-ptrace_Get_and_set_data_for_VL_3552 skip
13684 22:24:03.153377 arm64_za-ptrace_Set_VL_3568 pass
13685 22:24:03.153459 arm64_za-ptrace_Disabled_ZA_for_VL_3568 skip
13686 22:24:03.153541 arm64_za-ptrace_Get_and_set_data_for_VL_3568 skip
13687 22:24:03.153624 arm64_za-ptrace_Set_VL_3584 pass
13688 22:24:03.153715 arm64_za-ptrace_Disabled_ZA_for_VL_3584 skip
13689 22:24:03.153813 arm64_za-ptrace_Get_and_set_data_for_VL_3584 skip
13690 22:24:03.172465 arm64_za-ptrace_Set_VL_3600 pass
13691 22:24:03.172765 arm64_za-ptrace_Disabled_ZA_for_VL_3600 skip
13692 22:24:03.172865 arm64_za-ptrace_Get_and_set_data_for_VL_3600 skip
13693 22:24:03.172950 arm64_za-ptrace_Set_VL_3616 pass
13694 22:24:03.173048 arm64_za-ptrace_Disabled_ZA_for_VL_3616 skip
13695 22:24:03.173133 arm64_za-ptrace_Get_and_set_data_for_VL_3616 skip
13696 22:24:03.173216 arm64_za-ptrace_Set_VL_3632 pass
13697 22:24:03.173311 arm64_za-ptrace_Disabled_ZA_for_VL_3632 skip
13698 22:24:03.173395 arm64_za-ptrace_Get_and_set_data_for_VL_3632 skip
13699 22:24:03.173480 arm64_za-ptrace_Set_VL_3648 pass
13700 22:24:03.173577 arm64_za-ptrace_Disabled_ZA_for_VL_3648 skip
13701 22:24:03.173683 arm64_za-ptrace_Get_and_set_data_for_VL_3648 skip
13702 22:24:03.173783 arm64_za-ptrace_Set_VL_3664 pass
13703 22:24:03.173881 arm64_za-ptrace_Disabled_ZA_for_VL_3664 skip
13704 22:24:03.173979 arm64_za-ptrace_Get_and_set_data_for_VL_3664 skip
13705 22:24:03.174063 arm64_za-ptrace_Set_VL_3680 pass
13706 22:24:03.174160 arm64_za-ptrace_Disabled_ZA_for_VL_3680 skip
13707 22:24:03.174262 arm64_za-ptrace_Get_and_set_data_for_VL_3680 skip
13708 22:24:03.174359 arm64_za-ptrace_Set_VL_3696 pass
13709 22:24:03.174463 arm64_za-ptrace_Disabled_ZA_for_VL_3696 skip
13710 22:24:03.174561 arm64_za-ptrace_Get_and_set_data_for_VL_3696 skip
13711 22:24:03.174847 arm64_za-ptrace_Set_VL_3712 pass
13712 22:24:03.174948 arm64_za-ptrace_Disabled_ZA_for_VL_3712 skip
13713 22:24:03.175047 arm64_za-ptrace_Get_and_set_data_for_VL_3712 skip
13714 22:24:03.175145 arm64_za-ptrace_Set_VL_3728 pass
13715 22:24:03.179203 arm64_za-ptrace_Disabled_ZA_for_VL_3728 skip
13716 22:24:03.179488 arm64_za-ptrace_Get_and_set_data_for_VL_3728 skip
13717 22:24:03.179589 arm64_za-ptrace_Set_VL_3744 pass
13718 22:24:03.179677 arm64_za-ptrace_Disabled_ZA_for_VL_3744 skip
13719 22:24:03.179778 arm64_za-ptrace_Get_and_set_data_for_VL_3744 skip
13720 22:24:03.179863 arm64_za-ptrace_Set_VL_3760 pass
13721 22:24:03.179945 arm64_za-ptrace_Disabled_ZA_for_VL_3760 skip
13722 22:24:03.180042 arm64_za-ptrace_Get_and_set_data_for_VL_3760 skip
13723 22:24:03.180127 arm64_za-ptrace_Set_VL_3776 pass
13724 22:24:03.180209 arm64_za-ptrace_Disabled_ZA_for_VL_3776 skip
13725 22:24:03.180306 arm64_za-ptrace_Get_and_set_data_for_VL_3776 skip
13726 22:24:03.180390 arm64_za-ptrace_Set_VL_3792 pass
13727 22:24:03.180485 arm64_za-ptrace_Disabled_ZA_for_VL_3792 skip
13728 22:24:03.180570 arm64_za-ptrace_Get_and_set_data_for_VL_3792 skip
13729 22:24:03.180666 arm64_za-ptrace_Set_VL_3808 pass
13730 22:24:03.180763 arm64_za-ptrace_Disabled_ZA_for_VL_3808 skip
13731 22:24:03.180861 arm64_za-ptrace_Get_and_set_data_for_VL_3808 skip
13732 22:24:03.181149 arm64_za-ptrace_Set_VL_3824 pass
13733 22:24:03.181249 arm64_za-ptrace_Disabled_ZA_for_VL_3824 skip
13734 22:24:03.181350 arm64_za-ptrace_Get_and_set_data_for_VL_3824 skip
13735 22:24:03.181434 arm64_za-ptrace_Set_VL_3840 pass
13736 22:24:03.181531 arm64_za-ptrace_Disabled_ZA_for_VL_3840 skip
13737 22:24:03.181615 arm64_za-ptrace_Get_and_set_data_for_VL_3840 skip
13738 22:24:03.181720 arm64_za-ptrace_Set_VL_3856 pass
13739 22:24:03.181804 arm64_za-ptrace_Disabled_ZA_for_VL_3856 skip
13740 22:24:03.181900 arm64_za-ptrace_Get_and_set_data_for_VL_3856 skip
13741 22:24:03.181996 arm64_za-ptrace_Set_VL_3872 pass
13742 22:24:03.182080 arm64_za-ptrace_Disabled_ZA_for_VL_3872 skip
13743 22:24:03.182175 arm64_za-ptrace_Get_and_set_data_for_VL_3872 skip
13744 22:24:03.182260 arm64_za-ptrace_Set_VL_3888 pass
13745 22:24:03.182363 arm64_za-ptrace_Disabled_ZA_for_VL_3888 skip
13746 22:24:03.182448 arm64_za-ptrace_Get_and_set_data_for_VL_3888 skip
13747 22:24:03.182545 arm64_za-ptrace_Set_VL_3904 pass
13748 22:24:03.182629 arm64_za-ptrace_Disabled_ZA_for_VL_3904 skip
13749 22:24:03.182726 arm64_za-ptrace_Get_and_set_data_for_VL_3904 skip
13750 22:24:03.182842 arm64_za-ptrace_Set_VL_3920 pass
13751 22:24:03.182941 arm64_za-ptrace_Disabled_ZA_for_VL_3920 skip
13752 22:24:03.187171 arm64_za-ptrace_Get_and_set_data_for_VL_3920 skip
13753 22:24:03.187502 arm64_za-ptrace_Set_VL_3936 pass
13754 22:24:03.187693 arm64_za-ptrace_Disabled_ZA_for_VL_3936 skip
13755 22:24:03.187909 arm64_za-ptrace_Get_and_set_data_for_VL_3936 skip
13756 22:24:03.188080 arm64_za-ptrace_Set_VL_3952 pass
13757 22:24:03.188206 arm64_za-ptrace_Disabled_ZA_for_VL_3952 skip
13758 22:24:03.188310 arm64_za-ptrace_Get_and_set_data_for_VL_3952 skip
13759 22:24:03.188404 arm64_za-ptrace_Set_VL_3968 pass
13760 22:24:03.188515 arm64_za-ptrace_Disabled_ZA_for_VL_3968 skip
13761 22:24:03.188611 arm64_za-ptrace_Get_and_set_data_for_VL_3968 skip
13762 22:24:03.188703 arm64_za-ptrace_Set_VL_3984 pass
13763 22:24:03.188798 arm64_za-ptrace_Disabled_ZA_for_VL_3984 skip
13764 22:24:03.188888 arm64_za-ptrace_Get_and_set_data_for_VL_3984 skip
13765 22:24:03.188991 arm64_za-ptrace_Set_VL_4000 pass
13766 22:24:03.189818 arm64_za-ptrace_Disabled_ZA_for_VL_4000 skip
13767 22:24:03.189907 arm64_za-ptrace_Get_and_set_data_for_VL_4000 skip
13768 22:24:03.189995 arm64_za-ptrace_Set_VL_4016 pass
13769 22:24:03.190103 arm64_za-ptrace_Disabled_ZA_for_VL_4016 skip
13770 22:24:03.190194 arm64_za-ptrace_Get_and_set_data_for_VL_4016 skip
13771 22:24:03.190265 arm64_za-ptrace_Set_VL_4032 pass
13772 22:24:03.190332 arm64_za-ptrace_Disabled_ZA_for_VL_4032 skip
13773 22:24:03.190394 arm64_za-ptrace_Get_and_set_data_for_VL_4032 skip
13774 22:24:03.190457 arm64_za-ptrace_Set_VL_4048 pass
13775 22:24:03.190554 arm64_za-ptrace_Disabled_ZA_for_VL_4048 skip
13776 22:24:03.190632 arm64_za-ptrace_Get_and_set_data_for_VL_4048 skip
13777 22:24:03.190732 arm64_za-ptrace_Set_VL_4064 pass
13778 22:24:03.190827 arm64_za-ptrace_Disabled_ZA_for_VL_4064 skip
13779 22:24:03.190913 arm64_za-ptrace_Get_and_set_data_for_VL_4064 skip
13780 22:24:03.191168 arm64_za-ptrace_Set_VL_4080 pass
13781 22:24:03.191233 arm64_za-ptrace_Disabled_ZA_for_VL_4080 skip
13782 22:24:03.191292 arm64_za-ptrace_Get_and_set_data_for_VL_4080 skip
13783 22:24:03.191354 arm64_za-ptrace_Set_VL_4096 pass
13784 22:24:03.191412 arm64_za-ptrace_Disabled_ZA_for_VL_4096 skip
13785 22:24:03.191469 arm64_za-ptrace_Get_and_set_data_for_VL_4096 skip
13786 22:24:03.191526 arm64_za-ptrace_Set_VL_4112 pass
13787 22:24:03.191583 arm64_za-ptrace_Disabled_ZA_for_VL_4112 skip
13788 22:24:03.191641 arm64_za-ptrace_Get_and_set_data_for_VL_4112 skip
13789 22:24:03.195252 arm64_za-ptrace_Set_VL_4128 pass
13790 22:24:03.195559 arm64_za-ptrace_Disabled_ZA_for_VL_4128 skip
13791 22:24:03.195726 arm64_za-ptrace_Get_and_set_data_for_VL_4128 skip
13792 22:24:03.195838 arm64_za-ptrace_Set_VL_4144 pass
13793 22:24:03.195925 arm64_za-ptrace_Disabled_ZA_for_VL_4144 skip
13794 22:24:03.196008 arm64_za-ptrace_Get_and_set_data_for_VL_4144 skip
13795 22:24:03.196104 arm64_za-ptrace_Set_VL_4160 pass
13796 22:24:03.196187 arm64_za-ptrace_Disabled_ZA_for_VL_4160 skip
13797 22:24:03.196272 arm64_za-ptrace_Get_and_set_data_for_VL_4160 skip
13798 22:24:03.196369 arm64_za-ptrace_Set_VL_4176 pass
13799 22:24:03.196453 arm64_za-ptrace_Disabled_ZA_for_VL_4176 skip
13800 22:24:03.196549 arm64_za-ptrace_Get_and_set_data_for_VL_4176 skip
13801 22:24:03.196633 arm64_za-ptrace_Set_VL_4192 pass
13802 22:24:03.196714 arm64_za-ptrace_Disabled_ZA_for_VL_4192 skip
13803 22:24:03.196810 arm64_za-ptrace_Get_and_set_data_for_VL_4192 skip
13804 22:24:03.196894 arm64_za-ptrace_Set_VL_4208 pass
13805 22:24:03.196988 arm64_za-ptrace_Disabled_ZA_for_VL_4208 skip
13806 22:24:03.197071 arm64_za-ptrace_Get_and_set_data_for_VL_4208 skip
13807 22:24:03.197153 arm64_za-ptrace_Set_VL_4224 pass
13808 22:24:03.197248 arm64_za-ptrace_Disabled_ZA_for_VL_4224 skip
13809 22:24:03.197336 arm64_za-ptrace_Get_and_set_data_for_VL_4224 skip
13810 22:24:03.197422 arm64_za-ptrace_Set_VL_4240 pass
13811 22:24:03.197806 arm64_za-ptrace_Disabled_ZA_for_VL_4240 skip
13812 22:24:03.197912 arm64_za-ptrace_Get_and_set_data_for_VL_4240 skip
13813 22:24:03.197996 arm64_za-ptrace_Set_VL_4256 pass
13814 22:24:03.198079 arm64_za-ptrace_Disabled_ZA_for_VL_4256 skip
13815 22:24:03.198161 arm64_za-ptrace_Get_and_set_data_for_VL_4256 skip
13816 22:24:03.198242 arm64_za-ptrace_Set_VL_4272 pass
13817 22:24:03.198343 arm64_za-ptrace_Disabled_ZA_for_VL_4272 skip
13818 22:24:03.198427 arm64_za-ptrace_Get_and_set_data_for_VL_4272 skip
13819 22:24:03.198510 arm64_za-ptrace_Set_VL_4288 pass
13820 22:24:03.198591 arm64_za-ptrace_Disabled_ZA_for_VL_4288 skip
13821 22:24:03.198672 arm64_za-ptrace_Get_and_set_data_for_VL_4288 skip
13822 22:24:03.198754 arm64_za-ptrace_Set_VL_4304 pass
13823 22:24:03.198835 arm64_za-ptrace_Disabled_ZA_for_VL_4304 skip
13824 22:24:03.198916 arm64_za-ptrace_Get_and_set_data_for_VL_4304 skip
13825 22:24:03.199014 arm64_za-ptrace_Set_VL_4320 pass
13826 22:24:03.199098 arm64_za-ptrace_Disabled_ZA_for_VL_4320 skip
13827 22:24:03.199179 arm64_za-ptrace_Get_and_set_data_for_VL_4320 skip
13828 22:24:03.199260 arm64_za-ptrace_Set_VL_4336 pass
13829 22:24:03.199346 arm64_za-ptrace_Disabled_ZA_for_VL_4336 skip
13830 22:24:03.199430 arm64_za-ptrace_Get_and_set_data_for_VL_4336 skip
13831 22:24:03.199515 arm64_za-ptrace_Set_VL_4352 pass
13832 22:24:03.199601 arm64_za-ptrace_Disabled_ZA_for_VL_4352 skip
13833 22:24:03.203161 arm64_za-ptrace_Get_and_set_data_for_VL_4352 skip
13834 22:24:03.203581 arm64_za-ptrace_Set_VL_4368 pass
13835 22:24:03.203804 arm64_za-ptrace_Disabled_ZA_for_VL_4368 skip
13836 22:24:03.203990 arm64_za-ptrace_Get_and_set_data_for_VL_4368 skip
13837 22:24:03.204188 arm64_za-ptrace_Set_VL_4384 pass
13838 22:24:03.204417 arm64_za-ptrace_Disabled_ZA_for_VL_4384 skip
13839 22:24:03.204603 arm64_za-ptrace_Get_and_set_data_for_VL_4384 skip
13840 22:24:03.204778 arm64_za-ptrace_Set_VL_4400 pass
13841 22:24:03.204952 arm64_za-ptrace_Disabled_ZA_for_VL_4400 skip
13842 22:24:03.205123 arm64_za-ptrace_Get_and_set_data_for_VL_4400 skip
13843 22:24:03.205289 arm64_za-ptrace_Set_VL_4416 pass
13844 22:24:03.205441 arm64_za-ptrace_Disabled_ZA_for_VL_4416 skip
13845 22:24:03.205686 arm64_za-ptrace_Get_and_set_data_for_VL_4416 skip
13846 22:24:03.205921 arm64_za-ptrace_Set_VL_4432 pass
13847 22:24:03.206120 arm64_za-ptrace_Disabled_ZA_for_VL_4432 skip
13848 22:24:03.206295 arm64_za-ptrace_Get_and_set_data_for_VL_4432 skip
13849 22:24:03.206455 arm64_za-ptrace_Set_VL_4448 pass
13850 22:24:03.206616 arm64_za-ptrace_Disabled_ZA_for_VL_4448 skip
13851 22:24:03.206777 arm64_za-ptrace_Get_and_set_data_for_VL_4448 skip
13852 22:24:03.206942 arm64_za-ptrace_Set_VL_4464 pass
13853 22:24:03.207108 arm64_za-ptrace_Disabled_ZA_for_VL_4464 skip
13854 22:24:03.207237 arm64_za-ptrace_Get_and_set_data_for_VL_4464 skip
13855 22:24:03.207354 arm64_za-ptrace_Set_VL_4480 pass
13856 22:24:03.207468 arm64_za-ptrace_Disabled_ZA_for_VL_4480 skip
13857 22:24:03.207581 arm64_za-ptrace_Get_and_set_data_for_VL_4480 skip
13858 22:24:03.207695 arm64_za-ptrace_Set_VL_4496 pass
13859 22:24:03.207807 arm64_za-ptrace_Disabled_ZA_for_VL_4496 skip
13860 22:24:03.207919 arm64_za-ptrace_Get_and_set_data_for_VL_4496 skip
13861 22:24:03.208031 arm64_za-ptrace_Set_VL_4512 pass
13862 22:24:03.208142 arm64_za-ptrace_Disabled_ZA_for_VL_4512 skip
13863 22:24:03.208286 arm64_za-ptrace_Get_and_set_data_for_VL_4512 skip
13864 22:24:03.208407 arm64_za-ptrace_Set_VL_4528 pass
13865 22:24:03.208522 arm64_za-ptrace_Disabled_ZA_for_VL_4528 skip
13866 22:24:03.208636 arm64_za-ptrace_Get_and_set_data_for_VL_4528 skip
13867 22:24:03.208751 arm64_za-ptrace_Set_VL_4544 pass
13868 22:24:03.208865 arm64_za-ptrace_Disabled_ZA_for_VL_4544 skip
13869 22:24:03.208979 arm64_za-ptrace_Get_and_set_data_for_VL_4544 skip
13870 22:24:03.209092 arm64_za-ptrace_Set_VL_4560 pass
13871 22:24:03.209205 arm64_za-ptrace_Disabled_ZA_for_VL_4560 skip
13872 22:24:03.209320 arm64_za-ptrace_Get_and_set_data_for_VL_4560 skip
13873 22:24:03.209433 arm64_za-ptrace_Set_VL_4576 pass
13874 22:24:03.209547 arm64_za-ptrace_Disabled_ZA_for_VL_4576 skip
13875 22:24:03.209710 arm64_za-ptrace_Get_and_set_data_for_VL_4576 skip
13876 22:24:03.209923 arm64_za-ptrace_Set_VL_4592 pass
13877 22:24:03.211267 arm64_za-ptrace_Disabled_ZA_for_VL_4592 skip
13878 22:24:03.211468 arm64_za-ptrace_Get_and_set_data_for_VL_4592 skip
13879 22:24:03.211853 arm64_za-ptrace_Set_VL_4608 pass
13880 22:24:03.212025 arm64_za-ptrace_Disabled_ZA_for_VL_4608 skip
13881 22:24:03.212195 arm64_za-ptrace_Get_and_set_data_for_VL_4608 skip
13882 22:24:03.212373 arm64_za-ptrace_Set_VL_4624 pass
13883 22:24:03.225411 arm64_za-ptrace_Disabled_ZA_for_VL_4624 skip
13884 22:24:03.225534 arm64_za-ptrace_Get_and_set_data_for_VL_4624 skip
13885 22:24:03.225626 arm64_za-ptrace_Set_VL_4640 pass
13886 22:24:03.225718 arm64_za-ptrace_Disabled_ZA_for_VL_4640 skip
13887 22:24:03.225816 arm64_za-ptrace_Get_and_set_data_for_VL_4640 skip
13888 22:24:03.225901 arm64_za-ptrace_Set_VL_4656 pass
13889 22:24:03.225997 arm64_za-ptrace_Disabled_ZA_for_VL_4656 skip
13890 22:24:03.226082 arm64_za-ptrace_Get_and_set_data_for_VL_4656 skip
13891 22:24:03.226178 arm64_za-ptrace_Set_VL_4672 pass
13892 22:24:03.226276 arm64_za-ptrace_Disabled_ZA_for_VL_4672 skip
13893 22:24:03.226363 arm64_za-ptrace_Get_and_set_data_for_VL_4672 skip
13894 22:24:03.226459 arm64_za-ptrace_Set_VL_4688 pass
13895 22:24:03.226543 arm64_za-ptrace_Disabled_ZA_for_VL_4688 skip
13896 22:24:03.226639 arm64_za-ptrace_Get_and_set_data_for_VL_4688 skip
13897 22:24:03.226723 arm64_za-ptrace_Set_VL_4704 pass
13898 22:24:03.226818 arm64_za-ptrace_Disabled_ZA_for_VL_4704 skip
13899 22:24:03.227179 arm64_za-ptrace_Get_and_set_data_for_VL_4704 skip
13900 22:24:03.227282 arm64_za-ptrace_Set_VL_4720 pass
13901 22:24:03.227367 arm64_za-ptrace_Disabled_ZA_for_VL_4720 skip
13902 22:24:03.227662 arm64_za-ptrace_Get_and_set_data_for_VL_4720 skip
13903 22:24:03.227766 arm64_za-ptrace_Set_VL_4736 pass
13904 22:24:03.227850 arm64_za-ptrace_Disabled_ZA_for_VL_4736 skip
13905 22:24:03.227932 arm64_za-ptrace_Get_and_set_data_for_VL_4736 skip
13906 22:24:03.228014 arm64_za-ptrace_Set_VL_4752 pass
13907 22:24:03.228383 arm64_za-ptrace_Disabled_ZA_for_VL_4752 skip
13908 22:24:03.228577 arm64_za-ptrace_Get_and_set_data_for_VL_4752 skip
13909 22:24:03.228748 arm64_za-ptrace_Set_VL_4768 pass
13910 22:24:03.228943 arm64_za-ptrace_Disabled_ZA_for_VL_4768 skip
13911 22:24:03.229156 arm64_za-ptrace_Get_and_set_data_for_VL_4768 skip
13912 22:24:03.229339 arm64_za-ptrace_Set_VL_4784 pass
13913 22:24:03.229507 arm64_za-ptrace_Disabled_ZA_for_VL_4784 skip
13914 22:24:03.229687 arm64_za-ptrace_Get_and_set_data_for_VL_4784 skip
13915 22:24:03.229856 arm64_za-ptrace_Set_VL_4800 pass
13916 22:24:03.230063 arm64_za-ptrace_Disabled_ZA_for_VL_4800 skip
13917 22:24:03.230321 arm64_za-ptrace_Get_and_set_data_for_VL_4800 skip
13918 22:24:03.230504 arm64_za-ptrace_Set_VL_4816 pass
13919 22:24:03.230664 arm64_za-ptrace_Disabled_ZA_for_VL_4816 skip
13920 22:24:03.230852 arm64_za-ptrace_Get_and_set_data_for_VL_4816 skip
13921 22:24:03.231036 arm64_za-ptrace_Set_VL_4832 pass
13922 22:24:03.231179 arm64_za-ptrace_Disabled_ZA_for_VL_4832 skip
13923 22:24:03.231297 arm64_za-ptrace_Get_and_set_data_for_VL_4832 skip
13924 22:24:03.231414 arm64_za-ptrace_Set_VL_4848 pass
13925 22:24:03.231528 arm64_za-ptrace_Disabled_ZA_for_VL_4848 skip
13926 22:24:03.231700 arm64_za-ptrace_Get_and_set_data_for_VL_4848 skip
13927 22:24:03.231824 arm64_za-ptrace_Set_VL_4864 pass
13928 22:24:03.231940 arm64_za-ptrace_Disabled_ZA_for_VL_4864 skip
13929 22:24:03.232054 arm64_za-ptrace_Get_and_set_data_for_VL_4864 skip
13930 22:24:03.232167 arm64_za-ptrace_Set_VL_4880 pass
13931 22:24:03.232281 arm64_za-ptrace_Disabled_ZA_for_VL_4880 skip
13932 22:24:03.232395 arm64_za-ptrace_Get_and_set_data_for_VL_4880 skip
13933 22:24:03.232507 arm64_za-ptrace_Set_VL_4896 pass
13934 22:24:03.232621 arm64_za-ptrace_Disabled_ZA_for_VL_4896 skip
13935 22:24:03.232734 arm64_za-ptrace_Get_and_set_data_for_VL_4896 skip
13936 22:24:03.232848 arm64_za-ptrace_Set_VL_4912 pass
13937 22:24:03.232991 arm64_za-ptrace_Disabled_ZA_for_VL_4912 skip
13938 22:24:03.233112 arm64_za-ptrace_Get_and_set_data_for_VL_4912 skip
13939 22:24:03.233227 arm64_za-ptrace_Set_VL_4928 pass
13940 22:24:03.233341 arm64_za-ptrace_Disabled_ZA_for_VL_4928 skip
13941 22:24:03.233457 arm64_za-ptrace_Get_and_set_data_for_VL_4928 skip
13942 22:24:03.233571 arm64_za-ptrace_Set_VL_4944 pass
13943 22:24:03.235227 arm64_za-ptrace_Disabled_ZA_for_VL_4944 skip
13944 22:24:03.235645 arm64_za-ptrace_Get_and_set_data_for_VL_4944 skip
13945 22:24:03.235839 arm64_za-ptrace_Set_VL_4960 pass
13946 22:24:03.235988 arm64_za-ptrace_Disabled_ZA_for_VL_4960 skip
13947 22:24:03.236154 arm64_za-ptrace_Get_and_set_data_for_VL_4960 skip
13948 22:24:03.236350 arm64_za-ptrace_Set_VL_4976 pass
13949 22:24:03.236512 arm64_za-ptrace_Disabled_ZA_for_VL_4976 skip
13950 22:24:03.236668 arm64_za-ptrace_Get_and_set_data_for_VL_4976 skip
13951 22:24:03.236810 arm64_za-ptrace_Set_VL_4992 pass
13952 22:24:03.236958 arm64_za-ptrace_Disabled_ZA_for_VL_4992 skip
13953 22:24:03.237117 arm64_za-ptrace_Get_and_set_data_for_VL_4992 skip
13954 22:24:03.237260 arm64_za-ptrace_Set_VL_5008 pass
13955 22:24:03.237412 arm64_za-ptrace_Disabled_ZA_for_VL_5008 skip
13956 22:24:03.237563 arm64_za-ptrace_Get_and_set_data_for_VL_5008 skip
13957 22:24:03.237747 arm64_za-ptrace_Set_VL_5024 pass
13958 22:24:03.237893 arm64_za-ptrace_Disabled_ZA_for_VL_5024 skip
13959 22:24:03.238045 arm64_za-ptrace_Get_and_set_data_for_VL_5024 skip
13960 22:24:03.238171 arm64_za-ptrace_Set_VL_5040 pass
13961 22:24:03.238289 arm64_za-ptrace_Disabled_ZA_for_VL_5040 skip
13962 22:24:03.238395 arm64_za-ptrace_Get_and_set_data_for_VL_5040 skip
13963 22:24:03.238478 arm64_za-ptrace_Set_VL_5056 pass
13964 22:24:03.238550 arm64_za-ptrace_Disabled_ZA_for_VL_5056 skip
13965 22:24:03.238618 arm64_za-ptrace_Get_and_set_data_for_VL_5056 skip
13966 22:24:03.238684 arm64_za-ptrace_Set_VL_5072 pass
13967 22:24:03.238748 arm64_za-ptrace_Disabled_ZA_for_VL_5072 skip
13968 22:24:03.238825 arm64_za-ptrace_Get_and_set_data_for_VL_5072 skip
13969 22:24:03.238922 arm64_za-ptrace_Set_VL_5088 pass
13970 22:24:03.238994 arm64_za-ptrace_Disabled_ZA_for_VL_5088 skip
13971 22:24:03.239055 arm64_za-ptrace_Get_and_set_data_for_VL_5088 skip
13972 22:24:03.239114 arm64_za-ptrace_Set_VL_5104 pass
13973 22:24:03.239173 arm64_za-ptrace_Disabled_ZA_for_VL_5104 skip
13974 22:24:03.239232 arm64_za-ptrace_Get_and_set_data_for_VL_5104 skip
13975 22:24:03.239291 arm64_za-ptrace_Set_VL_5120 pass
13976 22:24:03.239349 arm64_za-ptrace_Disabled_ZA_for_VL_5120 skip
13977 22:24:03.239407 arm64_za-ptrace_Get_and_set_data_for_VL_5120 skip
13978 22:24:03.239465 arm64_za-ptrace_Set_VL_5136 pass
13979 22:24:03.239523 arm64_za-ptrace_Disabled_ZA_for_VL_5136 skip
13980 22:24:03.243176 arm64_za-ptrace_Get_and_set_data_for_VL_5136 skip
13981 22:24:03.243467 arm64_za-ptrace_Set_VL_5152 pass
13982 22:24:03.243551 arm64_za-ptrace_Disabled_ZA_for_VL_5152 skip
13983 22:24:03.243640 arm64_za-ptrace_Get_and_set_data_for_VL_5152 skip
13984 22:24:03.243917 arm64_za-ptrace_Set_VL_5168 pass
13985 22:24:03.244010 arm64_za-ptrace_Disabled_ZA_for_VL_5168 skip
13986 22:24:03.244115 arm64_za-ptrace_Get_and_set_data_for_VL_5168 skip
13987 22:24:03.244214 arm64_za-ptrace_Set_VL_5184 pass
13988 22:24:03.244302 arm64_za-ptrace_Disabled_ZA_for_VL_5184 skip
13989 22:24:03.244405 arm64_za-ptrace_Get_and_set_data_for_VL_5184 skip
13990 22:24:03.244491 arm64_za-ptrace_Set_VL_5200 pass
13991 22:24:03.244574 arm64_za-ptrace_Disabled_ZA_for_VL_5200 skip
13992 22:24:03.244652 arm64_za-ptrace_Get_and_set_data_for_VL_5200 skip
13993 22:24:03.244761 arm64_za-ptrace_Set_VL_5216 pass
13994 22:24:03.244845 arm64_za-ptrace_Disabled_ZA_for_VL_5216 skip
13995 22:24:03.244933 arm64_za-ptrace_Get_and_set_data_for_VL_5216 skip
13996 22:24:03.245220 arm64_za-ptrace_Set_VL_5232 pass
13997 22:24:03.245322 arm64_za-ptrace_Disabled_ZA_for_VL_5232 skip
13998 22:24:03.245410 arm64_za-ptrace_Get_and_set_data_for_VL_5232 skip
13999 22:24:03.245489 arm64_za-ptrace_Set_VL_5248 pass
14000 22:24:03.245567 arm64_za-ptrace_Disabled_ZA_for_VL_5248 skip
14001 22:24:03.245672 arm64_za-ptrace_Get_and_set_data_for_VL_5248 skip
14002 22:24:03.245753 arm64_za-ptrace_Set_VL_5264 pass
14003 22:24:03.245824 arm64_za-ptrace_Disabled_ZA_for_VL_5264 skip
14004 22:24:03.245917 arm64_za-ptrace_Get_and_set_data_for_VL_5264 skip
14005 22:24:03.245997 arm64_za-ptrace_Set_VL_5280 pass
14006 22:24:03.246080 arm64_za-ptrace_Disabled_ZA_for_VL_5280 skip
14007 22:24:03.246163 arm64_za-ptrace_Get_and_set_data_for_VL_5280 skip
14008 22:24:03.246246 arm64_za-ptrace_Set_VL_5296 pass
14009 22:24:03.246315 arm64_za-ptrace_Disabled_ZA_for_VL_5296 skip
14010 22:24:03.246482 arm64_za-ptrace_Get_and_set_data_for_VL_5296 skip
14011 22:24:03.246664 arm64_za-ptrace_Set_VL_5312 pass
14012 22:24:03.246870 arm64_za-ptrace_Disabled_ZA_for_VL_5312 skip
14013 22:24:03.247034 arm64_za-ptrace_Get_and_set_data_for_VL_5312 skip
14014 22:24:03.247161 arm64_za-ptrace_Set_VL_5328 pass
14015 22:24:03.247277 arm64_za-ptrace_Disabled_ZA_for_VL_5328 skip
14016 22:24:03.247392 arm64_za-ptrace_Get_and_set_data_for_VL_5328 skip
14017 22:24:03.247507 arm64_za-ptrace_Set_VL_5344 pass
14018 22:24:03.247642 arm64_za-ptrace_Disabled_ZA_for_VL_5344 skip
14019 22:24:03.251193 arm64_za-ptrace_Get_and_set_data_for_VL_5344 skip
14020 22:24:03.251644 arm64_za-ptrace_Set_VL_5360 pass
14021 22:24:03.251843 arm64_za-ptrace_Disabled_ZA_for_VL_5360 skip
14022 22:24:03.252003 arm64_za-ptrace_Get_and_set_data_for_VL_5360 skip
14023 22:24:03.252157 arm64_za-ptrace_Set_VL_5376 pass
14024 22:24:03.252307 arm64_za-ptrace_Disabled_ZA_for_VL_5376 skip
14025 22:24:03.252514 arm64_za-ptrace_Get_and_set_data_for_VL_5376 skip
14026 22:24:03.252655 arm64_za-ptrace_Set_VL_5392 pass
14027 22:24:03.252799 arm64_za-ptrace_Disabled_ZA_for_VL_5392 skip
14028 22:24:03.252942 arm64_za-ptrace_Get_and_set_data_for_VL_5392 skip
14029 22:24:03.253108 arm64_za-ptrace_Set_VL_5408 pass
14030 22:24:03.253277 arm64_za-ptrace_Disabled_ZA_for_VL_5408 skip
14031 22:24:03.253431 arm64_za-ptrace_Get_and_set_data_for_VL_5408 skip
14032 22:24:03.253592 arm64_za-ptrace_Set_VL_5424 pass
14033 22:24:03.253764 arm64_za-ptrace_Disabled_ZA_for_VL_5424 skip
14034 22:24:03.253964 arm64_za-ptrace_Get_and_set_data_for_VL_5424 skip
14035 22:24:03.254132 arm64_za-ptrace_Set_VL_5440 pass
14036 22:24:03.254293 arm64_za-ptrace_Disabled_ZA_for_VL_5440 skip
14037 22:24:03.254448 arm64_za-ptrace_Get_and_set_data_for_VL_5440 skip
14038 22:24:03.254600 arm64_za-ptrace_Set_VL_5456 pass
14039 22:24:03.254809 arm64_za-ptrace_Disabled_ZA_for_VL_5456 skip
14040 22:24:03.255031 arm64_za-ptrace_Get_and_set_data_for_VL_5456 skip
14041 22:24:03.255195 arm64_za-ptrace_Set_VL_5472 pass
14042 22:24:03.255325 arm64_za-ptrace_Disabled_ZA_for_VL_5472 skip
14043 22:24:03.255443 arm64_za-ptrace_Get_and_set_data_for_VL_5472 skip
14044 22:24:03.255556 arm64_za-ptrace_Set_VL_5488 pass
14045 22:24:03.255669 arm64_za-ptrace_Disabled_ZA_for_VL_5488 skip
14046 22:24:03.255782 arm64_za-ptrace_Get_and_set_data_for_VL_5488 skip
14047 22:24:03.255895 arm64_za-ptrace_Set_VL_5504 pass
14048 22:24:03.256036 arm64_za-ptrace_Disabled_ZA_for_VL_5504 skip
14049 22:24:03.256159 arm64_za-ptrace_Get_and_set_data_for_VL_5504 skip
14050 22:24:03.256275 arm64_za-ptrace_Set_VL_5520 pass
14051 22:24:03.256392 arm64_za-ptrace_Disabled_ZA_for_VL_5520 skip
14052 22:24:03.256508 arm64_za-ptrace_Get_and_set_data_for_VL_5520 skip
14053 22:24:03.256620 arm64_za-ptrace_Set_VL_5536 pass
14054 22:24:03.256734 arm64_za-ptrace_Disabled_ZA_for_VL_5536 skip
14055 22:24:03.256848 arm64_za-ptrace_Get_and_set_data_for_VL_5536 skip
14056 22:24:03.256961 arm64_za-ptrace_Set_VL_5552 pass
14057 22:24:03.259178 arm64_za-ptrace_Disabled_ZA_for_VL_5552 skip
14058 22:24:03.259645 arm64_za-ptrace_Get_and_set_data_for_VL_5552 skip
14059 22:24:03.259846 arm64_za-ptrace_Set_VL_5568 pass
14060 22:24:03.260053 arm64_za-ptrace_Disabled_ZA_for_VL_5568 skip
14061 22:24:03.260274 arm64_za-ptrace_Get_and_set_data_for_VL_5568 skip
14062 22:24:03.260496 arm64_za-ptrace_Set_VL_5584 pass
14063 22:24:03.260798 arm64_za-ptrace_Disabled_ZA_for_VL_5584 skip
14064 22:24:03.261003 arm64_za-ptrace_Get_and_set_data_for_VL_5584 skip
14065 22:24:03.261202 arm64_za-ptrace_Set_VL_5600 pass
14066 22:24:03.261377 arm64_za-ptrace_Disabled_ZA_for_VL_5600 skip
14067 22:24:03.261523 arm64_za-ptrace_Get_and_set_data_for_VL_5600 skip
14068 22:24:03.261682 arm64_za-ptrace_Set_VL_5616 pass
14069 22:24:03.261829 arm64_za-ptrace_Disabled_ZA_for_VL_5616 skip
14070 22:24:03.261972 arm64_za-ptrace_Get_and_set_data_for_VL_5616 skip
14071 22:24:03.262115 arm64_za-ptrace_Set_VL_5632 pass
14072 22:24:03.262257 arm64_za-ptrace_Disabled_ZA_for_VL_5632 skip
14073 22:24:03.262437 arm64_za-ptrace_Get_and_set_data_for_VL_5632 skip
14074 22:24:03.262575 arm64_za-ptrace_Set_VL_5648 pass
14075 22:24:03.277444 arm64_za-ptrace_Disabled_ZA_for_VL_5648 skip
14076 22:24:03.277685 arm64_za-ptrace_Get_and_set_data_for_VL_5648 skip
14077 22:24:03.278188 arm64_za-ptrace_Set_VL_5664 pass
14078 22:24:03.278345 arm64_za-ptrace_Disabled_ZA_for_VL_5664 skip
14079 22:24:03.278485 arm64_za-ptrace_Get_and_set_data_for_VL_5664 skip
14080 22:24:03.278666 arm64_za-ptrace_Set_VL_5680 pass
14081 22:24:03.278820 arm64_za-ptrace_Disabled_ZA_for_VL_5680 skip
14082 22:24:03.278969 arm64_za-ptrace_Get_and_set_data_for_VL_5680 skip
14083 22:24:03.279112 arm64_za-ptrace_Set_VL_5696 pass
14084 22:24:03.279307 arm64_za-ptrace_Disabled_ZA_for_VL_5696 skip
14085 22:24:03.279480 arm64_za-ptrace_Get_and_set_data_for_VL_5696 skip
14086 22:24:03.280031 arm64_za-ptrace_Set_VL_5712 pass
14087 22:24:03.280297 arm64_za-ptrace_Disabled_ZA_for_VL_5712 skip
14088 22:24:03.280504 arm64_za-ptrace_Get_and_set_data_for_VL_5712 skip
14089 22:24:03.280663 arm64_za-ptrace_Set_VL_5728 pass
14090 22:24:03.280830 arm64_za-ptrace_Disabled_ZA_for_VL_5728 skip
14091 22:24:03.280972 arm64_za-ptrace_Get_and_set_data_for_VL_5728 skip
14092 22:24:03.281110 arm64_za-ptrace_Set_VL_5744 pass
14093 22:24:03.281289 arm64_za-ptrace_Disabled_ZA_for_VL_5744 skip
14094 22:24:03.281465 arm64_za-ptrace_Get_and_set_data_for_VL_5744 skip
14095 22:24:03.281609 arm64_za-ptrace_Set_VL_5760 pass
14096 22:24:03.281835 arm64_za-ptrace_Disabled_ZA_for_VL_5760 skip
14097 22:24:03.282032 arm64_za-ptrace_Get_and_set_data_for_VL_5760 skip
14098 22:24:03.282218 arm64_za-ptrace_Set_VL_5776 pass
14099 22:24:03.282369 arm64_za-ptrace_Disabled_ZA_for_VL_5776 skip
14100 22:24:03.282569 arm64_za-ptrace_Get_and_set_data_for_VL_5776 skip
14101 22:24:03.282753 arm64_za-ptrace_Set_VL_5792 pass
14102 22:24:03.282913 arm64_za-ptrace_Disabled_ZA_for_VL_5792 skip
14103 22:24:03.283067 arm64_za-ptrace_Get_and_set_data_for_VL_5792 skip
14104 22:24:03.283186 arm64_za-ptrace_Set_VL_5808 pass
14105 22:24:03.283299 arm64_za-ptrace_Disabled_ZA_for_VL_5808 skip
14106 22:24:03.283412 arm64_za-ptrace_Get_and_set_data_for_VL_5808 skip
14107 22:24:03.283526 arm64_za-ptrace_Set_VL_5824 pass
14108 22:24:03.283698 arm64_za-ptrace_Disabled_ZA_for_VL_5824 skip
14109 22:24:03.283822 arm64_za-ptrace_Get_and_set_data_for_VL_5824 skip
14110 22:24:03.283937 arm64_za-ptrace_Set_VL_5840 pass
14111 22:24:03.284050 arm64_za-ptrace_Disabled_ZA_for_VL_5840 skip
14112 22:24:03.284163 arm64_za-ptrace_Get_and_set_data_for_VL_5840 skip
14113 22:24:03.284275 arm64_za-ptrace_Set_VL_5856 pass
14114 22:24:03.284388 arm64_za-ptrace_Disabled_ZA_for_VL_5856 skip
14115 22:24:03.284528 arm64_za-ptrace_Get_and_set_data_for_VL_5856 skip
14116 22:24:03.284648 arm64_za-ptrace_Set_VL_5872 pass
14117 22:24:03.284761 arm64_za-ptrace_Disabled_ZA_for_VL_5872 skip
14118 22:24:03.284874 arm64_za-ptrace_Get_and_set_data_for_VL_5872 skip
14119 22:24:03.284987 arm64_za-ptrace_Set_VL_5888 pass
14120 22:24:03.285099 arm64_za-ptrace_Disabled_ZA_for_VL_5888 skip
14121 22:24:03.285441 arm64_za-ptrace_Get_and_set_data_for_VL_5888 skip
14122 22:24:03.285594 arm64_za-ptrace_Set_VL_5904 pass
14123 22:24:03.285722 arm64_za-ptrace_Disabled_ZA_for_VL_5904 skip
14124 22:24:03.285838 arm64_za-ptrace_Get_and_set_data_for_VL_5904 skip
14125 22:24:03.285952 arm64_za-ptrace_Set_VL_5920 pass
14126 22:24:03.286065 arm64_za-ptrace_Disabled_ZA_for_VL_5920 skip
14127 22:24:03.286179 arm64_za-ptrace_Get_and_set_data_for_VL_5920 skip
14128 22:24:03.286292 arm64_za-ptrace_Set_VL_5936 pass
14129 22:24:03.286406 arm64_za-ptrace_Disabled_ZA_for_VL_5936 skip
14130 22:24:03.286521 arm64_za-ptrace_Get_and_set_data_for_VL_5936 skip
14131 22:24:03.286635 arm64_za-ptrace_Set_VL_5952 pass
14132 22:24:03.286750 arm64_za-ptrace_Disabled_ZA_for_VL_5952 skip
14133 22:24:03.287217 arm64_za-ptrace_Get_and_set_data_for_VL_5952 skip
14134 22:24:03.287524 arm64_za-ptrace_Set_VL_5968 pass
14135 22:24:03.287745 arm64_za-ptrace_Disabled_ZA_for_VL_5968 skip
14136 22:24:03.287934 arm64_za-ptrace_Get_and_set_data_for_VL_5968 skip
14137 22:24:03.288160 arm64_za-ptrace_Set_VL_5984 pass
14138 22:24:03.288356 arm64_za-ptrace_Disabled_ZA_for_VL_5984 skip
14139 22:24:03.288557 arm64_za-ptrace_Get_and_set_data_for_VL_5984 skip
14140 22:24:03.288766 arm64_za-ptrace_Set_VL_6000 pass
14141 22:24:03.288951 arm64_za-ptrace_Disabled_ZA_for_VL_6000 skip
14142 22:24:03.289116 arm64_za-ptrace_Get_and_set_data_for_VL_6000 skip
14143 22:24:03.289268 arm64_za-ptrace_Set_VL_6016 pass
14144 22:24:03.289507 arm64_za-ptrace_Disabled_ZA_for_VL_6016 skip
14145 22:24:03.289727 arm64_za-ptrace_Get_and_set_data_for_VL_6016 skip
14146 22:24:03.289937 arm64_za-ptrace_Set_VL_6032 pass
14147 22:24:03.290128 arm64_za-ptrace_Disabled_ZA_for_VL_6032 skip
14148 22:24:03.290331 arm64_za-ptrace_Get_and_set_data_for_VL_6032 skip
14149 22:24:03.290499 arm64_za-ptrace_Set_VL_6048 pass
14150 22:24:03.290660 arm64_za-ptrace_Disabled_ZA_for_VL_6048 skip
14151 22:24:03.290854 arm64_za-ptrace_Get_and_set_data_for_VL_6048 skip
14152 22:24:03.291030 arm64_za-ptrace_Set_VL_6064 pass
14153 22:24:03.291172 arm64_za-ptrace_Disabled_ZA_for_VL_6064 skip
14154 22:24:03.291289 arm64_za-ptrace_Get_and_set_data_for_VL_6064 skip
14155 22:24:03.291434 arm64_za-ptrace_Set_VL_6080 pass
14156 22:24:03.291579 arm64_za-ptrace_Disabled_ZA_for_VL_6080 skip
14157 22:24:03.291728 arm64_za-ptrace_Get_and_set_data_for_VL_6080 skip
14158 22:24:03.291846 arm64_za-ptrace_Set_VL_6096 pass
14159 22:24:03.291960 arm64_za-ptrace_Disabled_ZA_for_VL_6096 skip
14160 22:24:03.292074 arm64_za-ptrace_Get_and_set_data_for_VL_6096 skip
14161 22:24:03.292187 arm64_za-ptrace_Set_VL_6112 pass
14162 22:24:03.292299 arm64_za-ptrace_Disabled_ZA_for_VL_6112 skip
14163 22:24:03.292412 arm64_za-ptrace_Get_and_set_data_for_VL_6112 skip
14164 22:24:03.292528 arm64_za-ptrace_Set_VL_6128 pass
14165 22:24:03.292638 arm64_za-ptrace_Disabled_ZA_for_VL_6128 skip
14166 22:24:03.292751 arm64_za-ptrace_Get_and_set_data_for_VL_6128 skip
14167 22:24:03.292863 arm64_za-ptrace_Set_VL_6144 pass
14168 22:24:03.295281 arm64_za-ptrace_Disabled_ZA_for_VL_6144 skip
14169 22:24:03.295696 arm64_za-ptrace_Get_and_set_data_for_VL_6144 skip
14170 22:24:03.295899 arm64_za-ptrace_Set_VL_6160 pass
14171 22:24:03.296054 arm64_za-ptrace_Disabled_ZA_for_VL_6160 skip
14172 22:24:03.296243 arm64_za-ptrace_Get_and_set_data_for_VL_6160 skip
14173 22:24:03.296412 arm64_za-ptrace_Set_VL_6176 pass
14174 22:24:03.296573 arm64_za-ptrace_Disabled_ZA_for_VL_6176 skip
14175 22:24:03.296736 arm64_za-ptrace_Get_and_set_data_for_VL_6176 skip
14176 22:24:03.296920 arm64_za-ptrace_Set_VL_6192 pass
14177 22:24:03.297095 arm64_za-ptrace_Disabled_ZA_for_VL_6192 skip
14178 22:24:03.297258 arm64_za-ptrace_Get_and_set_data_for_VL_6192 skip
14179 22:24:03.297419 arm64_za-ptrace_Set_VL_6208 pass
14180 22:24:03.297580 arm64_za-ptrace_Disabled_ZA_for_VL_6208 skip
14181 22:24:03.297751 arm64_za-ptrace_Get_and_set_data_for_VL_6208 skip
14182 22:24:03.297911 arm64_za-ptrace_Set_VL_6224 pass
14183 22:24:03.298094 arm64_za-ptrace_Disabled_ZA_for_VL_6224 skip
14184 22:24:03.298260 arm64_za-ptrace_Get_and_set_data_for_VL_6224 skip
14185 22:24:03.298426 arm64_za-ptrace_Set_VL_6240 pass
14186 22:24:03.298593 arm64_za-ptrace_Disabled_ZA_for_VL_6240 skip
14187 22:24:03.298762 arm64_za-ptrace_Get_and_set_data_for_VL_6240 skip
14188 22:24:03.298968 arm64_za-ptrace_Set_VL_6256 pass
14189 22:24:03.299114 arm64_za-ptrace_Disabled_ZA_for_VL_6256 skip
14190 22:24:03.299231 arm64_za-ptrace_Get_and_set_data_for_VL_6256 skip
14191 22:24:03.299345 arm64_za-ptrace_Set_VL_6272 pass
14192 22:24:03.299458 arm64_za-ptrace_Disabled_ZA_for_VL_6272 skip
14193 22:24:03.299609 arm64_za-ptrace_Get_and_set_data_for_VL_6272 skip
14194 22:24:03.299750 arm64_za-ptrace_Set_VL_6288 pass
14195 22:24:03.299866 arm64_za-ptrace_Disabled_ZA_for_VL_6288 skip
14196 22:24:03.300011 arm64_za-ptrace_Get_and_set_data_for_VL_6288 skip
14197 22:24:03.300132 arm64_za-ptrace_Set_VL_6304 pass
14198 22:24:03.300247 arm64_za-ptrace_Disabled_ZA_for_VL_6304 skip
14199 22:24:03.300362 arm64_za-ptrace_Get_and_set_data_for_VL_6304 skip
14200 22:24:03.300480 arm64_za-ptrace_Set_VL_6320 pass
14201 22:24:03.300596 arm64_za-ptrace_Disabled_ZA_for_VL_6320 skip
14202 22:24:03.300711 arm64_za-ptrace_Get_and_set_data_for_VL_6320 skip
14203 22:24:03.300826 arm64_za-ptrace_Set_VL_6336 pass
14204 22:24:03.300941 arm64_za-ptrace_Disabled_ZA_for_VL_6336 skip
14205 22:24:03.301053 arm64_za-ptrace_Get_and_set_data_for_VL_6336 skip
14206 22:24:03.303201 arm64_za-ptrace_Set_VL_6352 pass
14207 22:24:03.303658 arm64_za-ptrace_Disabled_ZA_for_VL_6352 skip
14208 22:24:03.303865 arm64_za-ptrace_Get_and_set_data_for_VL_6352 skip
14209 22:24:03.304036 arm64_za-ptrace_Set_VL_6368 pass
14210 22:24:03.304196 arm64_za-ptrace_Disabled_ZA_for_VL_6368 skip
14211 22:24:03.304376 arm64_za-ptrace_Get_and_set_data_for_VL_6368 skip
14212 22:24:03.304515 arm64_za-ptrace_Set_VL_6384 pass
14213 22:24:03.304633 arm64_za-ptrace_Disabled_ZA_for_VL_6384 skip
14214 22:24:03.304751 arm64_za-ptrace_Get_and_set_data_for_VL_6384 skip
14215 22:24:03.304871 arm64_za-ptrace_Set_VL_6400 pass
14216 22:24:03.304990 arm64_za-ptrace_Disabled_ZA_for_VL_6400 skip
14217 22:24:03.305111 arm64_za-ptrace_Get_and_set_data_for_VL_6400 skip
14218 22:24:03.305255 arm64_za-ptrace_Set_VL_6416 pass
14219 22:24:03.305371 arm64_za-ptrace_Disabled_ZA_for_VL_6416 skip
14220 22:24:03.305484 arm64_za-ptrace_Get_and_set_data_for_VL_6416 skip
14221 22:24:03.305599 arm64_za-ptrace_Set_VL_6432 pass
14222 22:24:03.305722 arm64_za-ptrace_Disabled_ZA_for_VL_6432 skip
14223 22:24:03.305825 arm64_za-ptrace_Get_and_set_data_for_VL_6432 skip
14224 22:24:03.305944 arm64_za-ptrace_Set_VL_6448 pass
14225 22:24:03.306063 arm64_za-ptrace_Disabled_ZA_for_VL_6448 skip
14226 22:24:03.306166 arm64_za-ptrace_Get_and_set_data_for_VL_6448 skip
14227 22:24:03.306295 arm64_za-ptrace_Set_VL_6464 pass
14228 22:24:03.306406 arm64_za-ptrace_Disabled_ZA_for_VL_6464 skip
14229 22:24:03.306518 arm64_za-ptrace_Get_and_set_data_for_VL_6464 skip
14230 22:24:03.306590 arm64_za-ptrace_Set_VL_6480 pass
14231 22:24:03.306678 arm64_za-ptrace_Disabled_ZA_for_VL_6480 skip
14232 22:24:03.306763 arm64_za-ptrace_Get_and_set_data_for_VL_6480 skip
14233 22:24:03.306839 arm64_za-ptrace_Set_VL_6496 pass
14234 22:24:03.306917 arm64_za-ptrace_Disabled_ZA_for_VL_6496 skip
14235 22:24:03.306984 arm64_za-ptrace_Get_and_set_data_for_VL_6496 skip
14236 22:24:03.307044 arm64_za-ptrace_Set_VL_6512 pass
14237 22:24:03.307116 arm64_za-ptrace_Disabled_ZA_for_VL_6512 skip
14238 22:24:03.307179 arm64_za-ptrace_Get_and_set_data_for_VL_6512 skip
14239 22:24:03.307238 arm64_za-ptrace_Set_VL_6528 pass
14240 22:24:03.307297 arm64_za-ptrace_Disabled_ZA_for_VL_6528 skip
14241 22:24:03.307356 arm64_za-ptrace_Get_and_set_data_for_VL_6528 skip
14242 22:24:03.307415 arm64_za-ptrace_Set_VL_6544 pass
14243 22:24:03.311195 arm64_za-ptrace_Disabled_ZA_for_VL_6544 skip
14244 22:24:03.311562 arm64_za-ptrace_Get_and_set_data_for_VL_6544 skip
14245 22:24:03.311665 arm64_za-ptrace_Set_VL_6560 pass
14246 22:24:03.311750 arm64_za-ptrace_Disabled_ZA_for_VL_6560 skip
14247 22:24:03.311834 arm64_za-ptrace_Get_and_set_data_for_VL_6560 skip
14248 22:24:03.311931 arm64_za-ptrace_Set_VL_6576 pass
14249 22:24:03.312007 arm64_za-ptrace_Disabled_ZA_for_VL_6576 skip
14250 22:24:03.312074 arm64_za-ptrace_Get_and_set_data_for_VL_6576 skip
14251 22:24:03.312156 arm64_za-ptrace_Set_VL_6592 pass
14252 22:24:03.312279 arm64_za-ptrace_Disabled_ZA_for_VL_6592 skip
14253 22:24:03.312360 arm64_za-ptrace_Get_and_set_data_for_VL_6592 skip
14254 22:24:03.312427 arm64_za-ptrace_Set_VL_6608 pass
14255 22:24:03.312502 arm64_za-ptrace_Disabled_ZA_for_VL_6608 skip
14256 22:24:03.312568 arm64_za-ptrace_Get_and_set_data_for_VL_6608 skip
14257 22:24:03.312655 arm64_za-ptrace_Set_VL_6624 pass
14258 22:24:03.312771 arm64_za-ptrace_Disabled_ZA_for_VL_6624 skip
14259 22:24:03.312864 arm64_za-ptrace_Get_and_set_data_for_VL_6624 skip
14260 22:24:03.313006 arm64_za-ptrace_Set_VL_6640 pass
14261 22:24:03.313098 arm64_za-ptrace_Disabled_ZA_for_VL_6640 skip
14262 22:24:03.313372 arm64_za-ptrace_Get_and_set_data_for_VL_6640 skip
14263 22:24:03.313466 arm64_za-ptrace_Set_VL_6656 pass
14264 22:24:03.313588 arm64_za-ptrace_Disabled_ZA_for_VL_6656 skip
14265 22:24:03.313684 arm64_za-ptrace_Get_and_set_data_for_VL_6656 skip
14266 22:24:03.313774 arm64_za-ptrace_Set_VL_6672 pass
14267 22:24:03.314053 arm64_za-ptrace_Disabled_ZA_for_VL_6672 skip
14268 22:24:03.330974 arm64_za-ptrace_Get_and_set_data_for_VL_6672 skip
14269 22:24:03.331424 arm64_za-ptrace_Set_VL_6688 pass
14270 22:24:03.331548 arm64_za-ptrace_Disabled_ZA_for_VL_6688 skip
14271 22:24:03.331847 arm64_za-ptrace_Get_and_set_data_for_VL_6688 skip
14272 22:24:03.331940 arm64_za-ptrace_Set_VL_6704 pass
14273 22:24:03.332040 arm64_za-ptrace_Disabled_ZA_for_VL_6704 skip
14274 22:24:03.332150 arm64_za-ptrace_Get_and_set_data_for_VL_6704 skip
14275 22:24:03.332437 arm64_za-ptrace_Set_VL_6720 pass
14276 22:24:03.332531 arm64_za-ptrace_Disabled_ZA_for_VL_6720 skip
14277 22:24:03.332817 arm64_za-ptrace_Get_and_set_data_for_VL_6720 skip
14278 22:24:03.332924 arm64_za-ptrace_Set_VL_6736 pass
14279 22:24:03.333025 arm64_za-ptrace_Disabled_ZA_for_VL_6736 skip
14280 22:24:03.333488 arm64_za-ptrace_Get_and_set_data_for_VL_6736 skip
14281 22:24:03.333581 arm64_za-ptrace_Set_VL_6752 pass
14282 22:24:03.333677 arm64_za-ptrace_Disabled_ZA_for_VL_6752 skip
14283 22:24:03.333779 arm64_za-ptrace_Get_and_set_data_for_VL_6752 skip
14284 22:24:03.333879 arm64_za-ptrace_Set_VL_6768 pass
14285 22:24:03.334164 arm64_za-ptrace_Disabled_ZA_for_VL_6768 skip
14286 22:24:03.334268 arm64_za-ptrace_Get_and_set_data_for_VL_6768 skip
14287 22:24:03.334356 arm64_za-ptrace_Set_VL_6784 pass
14288 22:24:03.334454 arm64_za-ptrace_Disabled_ZA_for_VL_6784 skip
14289 22:24:03.334729 arm64_za-ptrace_Get_and_set_data_for_VL_6784 skip
14290 22:24:03.334833 arm64_za-ptrace_Set_VL_6800 pass
14291 22:24:03.334934 arm64_za-ptrace_Disabled_ZA_for_VL_6800 skip
14292 22:24:03.335021 arm64_za-ptrace_Get_and_set_data_for_VL_6800 skip
14293 22:24:03.339177 arm64_za-ptrace_Set_VL_6816 pass
14294 22:24:03.339462 arm64_za-ptrace_Disabled_ZA_for_VL_6816 skip
14295 22:24:03.339553 arm64_za-ptrace_Get_and_set_data_for_VL_6816 skip
14296 22:24:03.339639 arm64_za-ptrace_Set_VL_6832 pass
14297 22:24:03.339723 arm64_za-ptrace_Disabled_ZA_for_VL_6832 skip
14298 22:24:03.339824 arm64_za-ptrace_Get_and_set_data_for_VL_6832 skip
14299 22:24:03.339911 arm64_za-ptrace_Set_VL_6848 pass
14300 22:24:03.339996 arm64_za-ptrace_Disabled_ZA_for_VL_6848 skip
14301 22:24:03.340079 arm64_za-ptrace_Get_and_set_data_for_VL_6848 skip
14302 22:24:03.340164 arm64_za-ptrace_Set_VL_6864 pass
14303 22:24:03.340264 arm64_za-ptrace_Disabled_ZA_for_VL_6864 skip
14304 22:24:03.340351 arm64_za-ptrace_Get_and_set_data_for_VL_6864 skip
14305 22:24:03.340436 arm64_za-ptrace_Set_VL_6880 pass
14306 22:24:03.340521 arm64_za-ptrace_Disabled_ZA_for_VL_6880 skip
14307 22:24:03.340613 arm64_za-ptrace_Get_and_set_data_for_VL_6880 skip
14308 22:24:03.340715 arm64_za-ptrace_Set_VL_6896 pass
14309 22:24:03.340802 arm64_za-ptrace_Disabled_ZA_for_VL_6896 skip
14310 22:24:03.340886 arm64_za-ptrace_Get_and_set_data_for_VL_6896 skip
14311 22:24:03.340971 arm64_za-ptrace_Set_VL_6912 pass
14312 22:24:03.341055 arm64_za-ptrace_Disabled_ZA_for_VL_6912 skip
14313 22:24:03.341155 arm64_za-ptrace_Get_and_set_data_for_VL_6912 skip
14314 22:24:03.341242 arm64_za-ptrace_Set_VL_6928 pass
14315 22:24:03.341326 arm64_za-ptrace_Disabled_ZA_for_VL_6928 skip
14316 22:24:03.341409 arm64_za-ptrace_Get_and_set_data_for_VL_6928 skip
14317 22:24:03.341494 arm64_za-ptrace_Set_VL_6944 pass
14318 22:24:03.341594 arm64_za-ptrace_Disabled_ZA_for_VL_6944 skip
14319 22:24:03.341688 arm64_za-ptrace_Get_and_set_data_for_VL_6944 skip
14320 22:24:03.341774 arm64_za-ptrace_Set_VL_6960 pass
14321 22:24:03.341859 arm64_za-ptrace_Disabled_ZA_for_VL_6960 skip
14322 22:24:03.341943 arm64_za-ptrace_Get_and_set_data_for_VL_6960 skip
14323 22:24:03.342028 arm64_za-ptrace_Set_VL_6976 pass
14324 22:24:03.342130 arm64_za-ptrace_Disabled_ZA_for_VL_6976 skip
14325 22:24:03.342217 arm64_za-ptrace_Get_and_set_data_for_VL_6976 skip
14326 22:24:03.342301 arm64_za-ptrace_Set_VL_6992 pass
14327 22:24:03.342386 arm64_za-ptrace_Disabled_ZA_for_VL_6992 skip
14328 22:24:03.342469 arm64_za-ptrace_Get_and_set_data_for_VL_6992 skip
14329 22:24:03.342553 arm64_za-ptrace_Set_VL_7008 pass
14330 22:24:03.342637 arm64_za-ptrace_Disabled_ZA_for_VL_7008 skip
14331 22:24:03.342720 arm64_za-ptrace_Get_and_set_data_for_VL_7008 skip
14332 22:24:03.342821 arm64_za-ptrace_Set_VL_7024 pass
14333 22:24:03.342909 arm64_za-ptrace_Disabled_ZA_for_VL_7024 skip
14334 22:24:03.342994 arm64_za-ptrace_Get_and_set_data_for_VL_7024 skip
14335 22:24:03.343078 arm64_za-ptrace_Set_VL_7040 pass
14336 22:24:03.343162 arm64_za-ptrace_Disabled_ZA_for_VL_7040 skip
14337 22:24:03.343245 arm64_za-ptrace_Get_and_set_data_for_VL_7040 skip
14338 22:24:03.343328 arm64_za-ptrace_Set_VL_7056 pass
14339 22:24:03.343603 arm64_za-ptrace_Disabled_ZA_for_VL_7056 skip
14340 22:24:03.343700 arm64_za-ptrace_Get_and_set_data_for_VL_7056 skip
14341 22:24:03.343785 arm64_za-ptrace_Set_VL_7072 pass
14342 22:24:03.343871 arm64_za-ptrace_Disabled_ZA_for_VL_7072 skip
14343 22:24:03.347248 arm64_za-ptrace_Get_and_set_data_for_VL_7072 skip
14344 22:24:03.347437 arm64_za-ptrace_Set_VL_7088 pass
14345 22:24:03.347808 arm64_za-ptrace_Disabled_ZA_for_VL_7088 skip
14346 22:24:03.348013 arm64_za-ptrace_Get_and_set_data_for_VL_7088 skip
14347 22:24:03.348241 arm64_za-ptrace_Set_VL_7104 pass
14348 22:24:03.348457 arm64_za-ptrace_Disabled_ZA_for_VL_7104 skip
14349 22:24:03.348664 arm64_za-ptrace_Get_and_set_data_for_VL_7104 skip
14350 22:24:03.348853 arm64_za-ptrace_Set_VL_7120 pass
14351 22:24:03.349108 arm64_za-ptrace_Disabled_ZA_for_VL_7120 skip
14352 22:24:03.349314 arm64_za-ptrace_Get_and_set_data_for_VL_7120 skip
14353 22:24:03.349519 arm64_za-ptrace_Set_VL_7136 pass
14354 22:24:03.349724 arm64_za-ptrace_Disabled_ZA_for_VL_7136 skip
14355 22:24:03.349932 arm64_za-ptrace_Get_and_set_data_for_VL_7136 skip
14356 22:24:03.350139 arm64_za-ptrace_Set_VL_7152 pass
14357 22:24:03.350314 arm64_za-ptrace_Disabled_ZA_for_VL_7152 skip
14358 22:24:03.350476 arm64_za-ptrace_Get_and_set_data_for_VL_7152 skip
14359 22:24:03.350638 arm64_za-ptrace_Set_VL_7168 pass
14360 22:24:03.350788 arm64_za-ptrace_Disabled_ZA_for_VL_7168 skip
14361 22:24:03.350941 arm64_za-ptrace_Get_and_set_data_for_VL_7168 skip
14362 22:24:03.351078 arm64_za-ptrace_Set_VL_7184 pass
14363 22:24:03.351194 arm64_za-ptrace_Disabled_ZA_for_VL_7184 skip
14364 22:24:03.351340 arm64_za-ptrace_Get_and_set_data_for_VL_7184 skip
14365 22:24:03.351460 arm64_za-ptrace_Set_VL_7200 pass
14366 22:24:03.351576 arm64_za-ptrace_Disabled_ZA_for_VL_7200 skip
14367 22:24:03.351690 arm64_za-ptrace_Get_and_set_data_for_VL_7200 skip
14368 22:24:03.351804 arm64_za-ptrace_Set_VL_7216 pass
14369 22:24:03.351917 arm64_za-ptrace_Disabled_ZA_for_VL_7216 skip
14370 22:24:03.352031 arm64_za-ptrace_Get_and_set_data_for_VL_7216 skip
14371 22:24:03.352145 arm64_za-ptrace_Set_VL_7232 pass
14372 22:24:03.352258 arm64_za-ptrace_Disabled_ZA_for_VL_7232 skip
14373 22:24:03.352371 arm64_za-ptrace_Get_and_set_data_for_VL_7232 skip
14374 22:24:03.352484 arm64_za-ptrace_Set_VL_7248 pass
14375 22:24:03.352595 arm64_za-ptrace_Disabled_ZA_for_VL_7248 skip
14376 22:24:03.352705 arm64_za-ptrace_Get_and_set_data_for_VL_7248 skip
14377 22:24:03.352815 arm64_za-ptrace_Set_VL_7264 pass
14378 22:24:03.352925 arm64_za-ptrace_Disabled_ZA_for_VL_7264 skip
14379 22:24:03.353035 arm64_za-ptrace_Get_and_set_data_for_VL_7264 skip
14380 22:24:03.353145 arm64_za-ptrace_Set_VL_7280 pass
14381 22:24:03.353255 arm64_za-ptrace_Disabled_ZA_for_VL_7280 skip
14382 22:24:03.355224 arm64_za-ptrace_Get_and_set_data_for_VL_7280 skip
14383 22:24:03.355707 arm64_za-ptrace_Set_VL_7296 pass
14384 22:24:03.355907 arm64_za-ptrace_Disabled_ZA_for_VL_7296 skip
14385 22:24:03.356147 arm64_za-ptrace_Get_and_set_data_for_VL_7296 skip
14386 22:24:03.356336 arm64_za-ptrace_Set_VL_7312 pass
14387 22:24:03.356505 arm64_za-ptrace_Disabled_ZA_for_VL_7312 skip
14388 22:24:03.356707 arm64_za-ptrace_Get_and_set_data_for_VL_7312 skip
14389 22:24:03.356880 arm64_za-ptrace_Set_VL_7328 pass
14390 22:24:03.357040 arm64_za-ptrace_Disabled_ZA_for_VL_7328 skip
14391 22:24:03.357202 arm64_za-ptrace_Get_and_set_data_for_VL_7328 skip
14392 22:24:03.357377 arm64_za-ptrace_Set_VL_7344 pass
14393 22:24:03.357565 arm64_za-ptrace_Disabled_ZA_for_VL_7344 skip
14394 22:24:03.357743 arm64_za-ptrace_Get_and_set_data_for_VL_7344 skip
14395 22:24:03.357928 arm64_za-ptrace_Set_VL_7360 pass
14396 22:24:03.358147 arm64_za-ptrace_Disabled_ZA_for_VL_7360 skip
14397 22:24:03.358333 arm64_za-ptrace_Get_and_set_data_for_VL_7360 skip
14398 22:24:03.358508 arm64_za-ptrace_Set_VL_7376 pass
14399 22:24:03.358755 arm64_za-ptrace_Disabled_ZA_for_VL_7376 skip
14400 22:24:03.358907 arm64_za-ptrace_Get_and_set_data_for_VL_7376 skip
14401 22:24:03.359074 arm64_za-ptrace_Set_VL_7392 pass
14402 22:24:03.359206 arm64_za-ptrace_Disabled_ZA_for_VL_7392 skip
14403 22:24:03.359323 arm64_za-ptrace_Get_and_set_data_for_VL_7392 skip
14404 22:24:03.359438 arm64_za-ptrace_Set_VL_7408 pass
14405 22:24:03.359551 arm64_za-ptrace_Disabled_ZA_for_VL_7408 skip
14406 22:24:03.359664 arm64_za-ptrace_Get_and_set_data_for_VL_7408 skip
14407 22:24:03.359778 arm64_za-ptrace_Set_VL_7424 pass
14408 22:24:03.359892 arm64_za-ptrace_Disabled_ZA_for_VL_7424 skip
14409 22:24:03.360006 arm64_za-ptrace_Get_and_set_data_for_VL_7424 skip
14410 22:24:03.360119 arm64_za-ptrace_Set_VL_7440 pass
14411 22:24:03.360234 arm64_za-ptrace_Disabled_ZA_for_VL_7440 skip
14412 22:24:03.360348 arm64_za-ptrace_Get_and_set_data_for_VL_7440 skip
14413 22:24:03.360462 arm64_za-ptrace_Set_VL_7456 pass
14414 22:24:03.360575 arm64_za-ptrace_Disabled_ZA_for_VL_7456 skip
14415 22:24:03.360690 arm64_za-ptrace_Get_and_set_data_for_VL_7456 skip
14416 22:24:03.360804 arm64_za-ptrace_Set_VL_7472 pass
14417 22:24:03.360919 arm64_za-ptrace_Disabled_ZA_for_VL_7472 skip
14418 22:24:03.361032 arm64_za-ptrace_Get_and_set_data_for_VL_7472 skip
14419 22:24:03.361174 arm64_za-ptrace_Set_VL_7488 pass
14420 22:24:03.361295 arm64_za-ptrace_Disabled_ZA_for_VL_7488 skip
14421 22:24:03.361411 arm64_za-ptrace_Get_and_set_data_for_VL_7488 skip
14422 22:24:03.363209 arm64_za-ptrace_Set_VL_7504 pass
14423 22:24:03.363693 arm64_za-ptrace_Disabled_ZA_for_VL_7504 skip
14424 22:24:03.363895 arm64_za-ptrace_Get_and_set_data_for_VL_7504 skip
14425 22:24:03.364069 arm64_za-ptrace_Set_VL_7520 pass
14426 22:24:03.364238 arm64_za-ptrace_Disabled_ZA_for_VL_7520 skip
14427 22:24:03.364457 arm64_za-ptrace_Get_and_set_data_for_VL_7520 skip
14428 22:24:03.364629 arm64_za-ptrace_Set_VL_7536 pass
14429 22:24:03.364796 arm64_za-ptrace_Disabled_ZA_for_VL_7536 skip
14430 22:24:03.364939 arm64_za-ptrace_Get_and_set_data_for_VL_7536 skip
14431 22:24:03.365085 arm64_za-ptrace_Set_VL_7552 pass
14432 22:24:03.365253 arm64_za-ptrace_Disabled_ZA_for_VL_7552 skip
14433 22:24:03.365451 arm64_za-ptrace_Get_and_set_data_for_VL_7552 skip
14434 22:24:03.365587 arm64_za-ptrace_Set_VL_7568 pass
14435 22:24:03.365751 arm64_za-ptrace_Disabled_ZA_for_VL_7568 skip
14436 22:24:03.365913 arm64_za-ptrace_Get_and_set_data_for_VL_7568 skip
14437 22:24:03.366073 arm64_za-ptrace_Set_VL_7584 pass
14438 22:24:03.366229 arm64_za-ptrace_Disabled_ZA_for_VL_7584 skip
14439 22:24:03.366353 arm64_za-ptrace_Get_and_set_data_for_VL_7584 skip
14440 22:24:03.366510 arm64_za-ptrace_Set_VL_7600 pass
14441 22:24:03.366683 arm64_za-ptrace_Disabled_ZA_for_VL_7600 skip
14442 22:24:03.366870 arm64_za-ptrace_Get_and_set_data_for_VL_7600 skip
14443 22:24:03.367151 arm64_za-ptrace_Set_VL_7616 pass
14444 22:24:03.367327 arm64_za-ptrace_Disabled_ZA_for_VL_7616 skip
14445 22:24:03.367489 arm64_za-ptrace_Get_and_set_data_for_VL_7616 skip
14446 22:24:03.367647 arm64_za-ptrace_Set_VL_7632 pass
14447 22:24:03.367804 arm64_za-ptrace_Disabled_ZA_for_VL_7632 skip
14448 22:24:03.367961 arm64_za-ptrace_Get_and_set_data_for_VL_7632 skip
14449 22:24:03.368121 arm64_za-ptrace_Set_VL_7648 pass
14450 22:24:03.368278 arm64_za-ptrace_Disabled_ZA_for_VL_7648 skip
14451 22:24:03.368436 arm64_za-ptrace_Get_and_set_data_for_VL_7648 skip
14452 22:24:03.368598 arm64_za-ptrace_Set_VL_7664 pass
14453 22:24:03.368740 arm64_za-ptrace_Disabled_ZA_for_VL_7664 skip
14454 22:24:03.368879 arm64_za-ptrace_Get_and_set_data_for_VL_7664 skip
14455 22:24:03.369020 arm64_za-ptrace_Set_VL_7680 pass
14456 22:24:03.369160 arm64_za-ptrace_Disabled_ZA_for_VL_7680 skip
14457 22:24:03.371222 arm64_za-ptrace_Get_and_set_data_for_VL_7680 skip
14458 22:24:03.371621 arm64_za-ptrace_Set_VL_7696 pass
14459 22:24:03.371762 arm64_za-ptrace_Disabled_ZA_for_VL_7696 skip
14460 22:24:03.394718 arm64_za-ptrace_Get_and_set_data_for_VL_7696 skip
14461 22:24:03.394940 arm64_za-ptrace_Set_VL_7712 pass
14462 22:24:03.395136 arm64_za-ptrace_Disabled_ZA_for_VL_7712 skip
14463 22:24:03.395584 arm64_za-ptrace_Get_and_set_data_for_VL_7712 skip
14464 22:24:03.395791 arm64_za-ptrace_Set_VL_7728 pass
14465 22:24:03.395999 arm64_za-ptrace_Disabled_ZA_for_VL_7728 skip
14466 22:24:03.396175 arm64_za-ptrace_Get_and_set_data_for_VL_7728 skip
14467 22:24:03.396335 arm64_za-ptrace_Set_VL_7744 pass
14468 22:24:03.396489 arm64_za-ptrace_Disabled_ZA_for_VL_7744 skip
14469 22:24:03.396665 arm64_za-ptrace_Get_and_set_data_for_VL_7744 skip
14470 22:24:03.396878 arm64_za-ptrace_Set_VL_7760 pass
14471 22:24:03.397034 arm64_za-ptrace_Disabled_ZA_for_VL_7760 skip
14472 22:24:03.397182 arm64_za-ptrace_Get_and_set_data_for_VL_7760 skip
14473 22:24:03.397319 arm64_za-ptrace_Set_VL_7776 pass
14474 22:24:03.397473 arm64_za-ptrace_Disabled_ZA_for_VL_7776 skip
14475 22:24:03.397681 arm64_za-ptrace_Get_and_set_data_for_VL_7776 skip
14476 22:24:03.397855 arm64_za-ptrace_Set_VL_7792 pass
14477 22:24:03.398019 arm64_za-ptrace_Disabled_ZA_for_VL_7792 skip
14478 22:24:03.398179 arm64_za-ptrace_Get_and_set_data_for_VL_7792 skip
14479 22:24:03.398341 arm64_za-ptrace_Set_VL_7808 pass
14480 22:24:03.398538 arm64_za-ptrace_Disabled_ZA_for_VL_7808 skip
14481 22:24:03.398741 arm64_za-ptrace_Get_and_set_data_for_VL_7808 skip
14482 22:24:03.399002 arm64_za-ptrace_Set_VL_7824 pass
14483 22:24:03.399159 arm64_za-ptrace_Disabled_ZA_for_VL_7824 skip
14484 22:24:03.399279 arm64_za-ptrace_Get_and_set_data_for_VL_7824 skip
14485 22:24:03.399395 arm64_za-ptrace_Set_VL_7840 pass
14486 22:24:03.399509 arm64_za-ptrace_Disabled_ZA_for_VL_7840 skip
14487 22:24:03.399622 arm64_za-ptrace_Get_and_set_data_for_VL_7840 skip
14488 22:24:03.399739 arm64_za-ptrace_Set_VL_7856 pass
14489 22:24:03.399851 arm64_za-ptrace_Disabled_ZA_for_VL_7856 skip
14490 22:24:03.399963 arm64_za-ptrace_Get_and_set_data_for_VL_7856 skip
14491 22:24:03.400077 arm64_za-ptrace_Set_VL_7872 pass
14492 22:24:03.400189 arm64_za-ptrace_Disabled_ZA_for_VL_7872 skip
14493 22:24:03.400302 arm64_za-ptrace_Get_and_set_data_for_VL_7872 skip
14494 22:24:03.400416 arm64_za-ptrace_Set_VL_7888 pass
14495 22:24:03.400529 arm64_za-ptrace_Disabled_ZA_for_VL_7888 skip
14496 22:24:03.400643 arm64_za-ptrace_Get_and_set_data_for_VL_7888 skip
14497 22:24:03.400756 arm64_za-ptrace_Set_VL_7904 pass
14498 22:24:03.400867 arm64_za-ptrace_Disabled_ZA_for_VL_7904 skip
14499 22:24:03.400980 arm64_za-ptrace_Get_and_set_data_for_VL_7904 skip
14500 22:24:03.401092 arm64_za-ptrace_Set_VL_7920 pass
14501 22:24:03.401204 arm64_za-ptrace_Disabled_ZA_for_VL_7920 skip
14502 22:24:03.401317 arm64_za-ptrace_Get_and_set_data_for_VL_7920 skip
14503 22:24:03.401430 arm64_za-ptrace_Set_VL_7936 pass
14504 22:24:03.401541 arm64_za-ptrace_Disabled_ZA_for_VL_7936 skip
14505 22:24:03.402434 arm64_za-ptrace_Get_and_set_data_for_VL_7936 skip
14506 22:24:03.402591 arm64_za-ptrace_Set_VL_7952 pass
14507 22:24:03.403321 arm64_za-ptrace_Disabled_ZA_for_VL_7952 skip
14508 22:24:03.403746 arm64_za-ptrace_Get_and_set_data_for_VL_7952 skip
14509 22:24:03.403952 arm64_za-ptrace_Set_VL_7968 pass
14510 22:24:03.404117 arm64_za-ptrace_Disabled_ZA_for_VL_7968 skip
14511 22:24:03.404345 arm64_za-ptrace_Get_and_set_data_for_VL_7968 skip
14512 22:24:03.404531 arm64_za-ptrace_Set_VL_7984 pass
14513 22:24:03.404696 arm64_za-ptrace_Disabled_ZA_for_VL_7984 skip
14514 22:24:03.404834 arm64_za-ptrace_Get_and_set_data_for_VL_7984 skip
14515 22:24:03.404960 arm64_za-ptrace_Set_VL_8000 pass
14516 22:24:03.405110 arm64_za-ptrace_Disabled_ZA_for_VL_8000 skip
14517 22:24:03.405268 arm64_za-ptrace_Get_and_set_data_for_VL_8000 skip
14518 22:24:03.405455 arm64_za-ptrace_Set_VL_8016 pass
14519 22:24:03.405618 arm64_za-ptrace_Disabled_ZA_for_VL_8016 skip
14520 22:24:03.405793 arm64_za-ptrace_Get_and_set_data_for_VL_8016 skip
14521 22:24:03.405934 arm64_za-ptrace_Set_VL_8032 pass
14522 22:24:03.406088 arm64_za-ptrace_Disabled_ZA_for_VL_8032 skip
14523 22:24:03.406297 arm64_za-ptrace_Get_and_set_data_for_VL_8032 skip
14524 22:24:03.406516 arm64_za-ptrace_Set_VL_8048 pass
14525 22:24:03.406707 arm64_za-ptrace_Disabled_ZA_for_VL_8048 skip
14526 22:24:03.406847 arm64_za-ptrace_Get_and_set_data_for_VL_8048 skip
14527 22:24:03.407029 arm64_za-ptrace_Set_VL_8064 pass
14528 22:24:03.407179 arm64_za-ptrace_Disabled_ZA_for_VL_8064 skip
14529 22:24:03.407339 arm64_za-ptrace_Get_and_set_data_for_VL_8064 skip
14530 22:24:03.407461 arm64_za-ptrace_Set_VL_8080 pass
14531 22:24:03.407576 arm64_za-ptrace_Disabled_ZA_for_VL_8080 skip
14532 22:24:03.407691 arm64_za-ptrace_Get_and_set_data_for_VL_8080 skip
14533 22:24:03.407806 arm64_za-ptrace_Set_VL_8096 pass
14534 22:24:03.407919 arm64_za-ptrace_Disabled_ZA_for_VL_8096 skip
14535 22:24:03.408032 arm64_za-ptrace_Get_and_set_data_for_VL_8096 skip
14536 22:24:03.408145 arm64_za-ptrace_Set_VL_8112 pass
14537 22:24:03.408258 arm64_za-ptrace_Disabled_ZA_for_VL_8112 skip
14538 22:24:03.408372 arm64_za-ptrace_Get_and_set_data_for_VL_8112 skip
14539 22:24:03.408486 arm64_za-ptrace_Set_VL_8128 pass
14540 22:24:03.408598 arm64_za-ptrace_Disabled_ZA_for_VL_8128 skip
14541 22:24:03.408712 arm64_za-ptrace_Get_and_set_data_for_VL_8128 skip
14542 22:24:03.408825 arm64_za-ptrace_Set_VL_8144 pass
14543 22:24:03.408938 arm64_za-ptrace_Disabled_ZA_for_VL_8144 skip
14544 22:24:03.409050 arm64_za-ptrace_Get_and_set_data_for_VL_8144 skip
14545 22:24:03.411296 arm64_za-ptrace_Set_VL_8160 pass
14546 22:24:03.411725 arm64_za-ptrace_Disabled_ZA_for_VL_8160 skip
14547 22:24:03.411892 arm64_za-ptrace_Get_and_set_data_for_VL_8160 skip
14548 22:24:03.412066 arm64_za-ptrace_Set_VL_8176 pass
14549 22:24:03.412282 arm64_za-ptrace_Disabled_ZA_for_VL_8176 skip
14550 22:24:03.412439 arm64_za-ptrace_Get_and_set_data_for_VL_8176 skip
14551 22:24:03.412603 arm64_za-ptrace_Set_VL_8192 pass
14552 22:24:03.412743 arm64_za-ptrace_Disabled_ZA_for_VL_8192 skip
14553 22:24:03.412906 arm64_za-ptrace_Get_and_set_data_for_VL_8192 skip
14554 22:24:03.413132 arm64_za-ptrace pass
14555 22:24:03.413331 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory pass
14556 22:24:03.413509 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory pass
14557 22:24:03.413750 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory pass
14558 22:24:03.413944 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory pass
14559 22:24:03.414205 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory fail
14560 22:24:03.414367 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory fail
14561 22:24:03.414507 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory pass
14562 22:24:03.414699 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory pass
14563 22:24:03.414878 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory pass
14564 22:24:03.415133 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory pass
14565 22:24:03.415288 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory fail
14566 22:24:03.419244 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory fail
14567 22:24:03.419695 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory pass
14568 22:24:03.419947 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory fail
14569 22:24:03.420140 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory fail
14570 22:24:03.420363 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory pass
14571 22:24:03.420526 arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory pass
14572 22:24:03.420707 arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory pass
14573 22:24:03.420871 arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory pass
14574 22:24:03.421044 arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory pass
14575 22:24:03.421203 arm64_check_buffer_fill fail
14576 22:24:03.421382 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory fail
14577 22:24:03.421569 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory fail
14578 22:24:03.421765 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory fail
14579 22:24:03.422213 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory fail
14580 22:24:03.422429 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory fail
14581 22:24:03.422623 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory fail
14582 22:24:03.422829 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory fail
14583 22:24:03.423049 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory fail
14584 22:24:03.427290 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory fail
14585 22:24:03.427725 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory fail
14586 22:24:03.427982 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory fail
14587 22:24:03.428192 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory fail
14588 22:24:03.428383 arm64_check_child_memory fail
14589 22:24:03.428536 arm64_check_gcr_el1_cswitch fail
14590 22:24:03.428712 arm64_check_ksm_options fail
14591 22:24:03.429109 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off pass
14592 22:24:03.429458 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off pass
14593 22:24:03.429745 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off pass
14594 22:24:03.430140 arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off pass
14595 22:24:03.430276 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14596 22:24:03.440379 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14597 22:24:03.440833 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14598 22:24:03.440936 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14599 22:24:03.441320 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14600 22:24:03.441722 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14601 22:24:03.441888 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14602 22:24:03.442048 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14603 22:24:03.442199 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14604 22:24:03.442449 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14605 22:24:03.442670 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14606 22:24:03.442888 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14607 22:24:03.443133 arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14608 22:24:03.447422 arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14609 22:24:03.447843 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14610 22:24:03.447997 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14611 22:24:03.448150 arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory fail
14612 22:24:03.448496 arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory fail
14613 22:24:03.448635 arm64_check_mmap_options fail
14614 22:24:03.448750 arm64_check_prctl_check_basic_read pass
14615 22:24:03.448882 arm64_check_prctl_NONE pass
14616 22:24:03.449001 arm64_check_prctl_SYNC pass
14617 22:24:03.449134 arm64_check_prctl_ASYNC pass
14618 22:24:03.449249 arm64_check_prctl_SYNC_ASYNC pass
14619 22:24:03.449361 arm64_check_prctl pass
14620 22:24:03.449490 arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode fail
14621 22:24:03.449624 arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode fail
14622 22:24:03.449773 arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode pass
14623 22:24:03.450108 arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode fail
14624 22:24:03.450225 arm64_check_tags_inclusion fail
14625 22:24:03.450328 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14626 22:24:03.450430 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14627 22:24:03.450878 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14628 22:24:03.451022 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14629 22:24:03.451357 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14630 22:24:03.451501 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14631 22:24:03.455667 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14632 22:24:03.456074 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14633 22:24:03.456182 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14634 22:24:03.456472 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14635 22:24:03.456762 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14636 22:24:03.456873 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14637 22:24:03.457156 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14638 22:24:03.457474 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14639 22:24:03.457755 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14640 22:24:03.457883 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14641 22:24:03.458169 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14642 22:24:03.458461 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14643 22:24:03.458746 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14644 22:24:03.459191 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14645 22:24:03.463415 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14646 22:24:03.463900 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14647 22:24:03.464040 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14648 22:24:03.465881 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14649 22:24:03.466012 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14650 22:24:03.466107 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14651 22:24:03.466199 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14652 22:24:03.466290 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14653 22:24:03.466382 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14654 22:24:03.466474 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14655 22:24:03.466560 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14656 22:24:03.466642 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14657 22:24:03.466719 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14658 22:24:03.466808 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14659 22:24:03.466905 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14660 22:24:03.467199 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14661 22:24:03.467298 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14662 22:24:03.467391 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14663 22:24:03.467482 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14664 22:24:03.467574 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14665 22:24:03.467665 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14666 22:24:03.471216 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14667 22:24:03.471522 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14668 22:24:03.471622 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14669 22:24:03.471731 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14670 22:24:03.471840 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14671 22:24:03.472151 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14672 22:24:03.472262 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14673 22:24:03.472371 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14674 22:24:03.472485 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14675 22:24:03.472773 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14676 22:24:03.472882 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14677 22:24:03.473186 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14678 22:24:03.473294 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14679 22:24:03.473401 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14680 22:24:03.473508 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14681 22:24:03.473990 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14682 22:24:03.474089 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14683 22:24:03.474195 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14684 22:24:03.474302 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14685 22:24:03.474409 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14686 22:24:03.474517 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14687 22:24:03.500569 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14688 22:24:03.501043 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14689 22:24:03.501157 arm64_check_user_mem pass
14690 22:24:03.501248 arm64_btitest_nohint_func_call_using_br_x0 pass
14691 22:24:03.501335 arm64_btitest_nohint_func_call_using_br_x16 pass
14692 22:24:03.501436 arm64_btitest_nohint_func_call_using_blr pass
14693 22:24:03.501524 arm64_btitest_bti_none_func_call_using_br_x0 pass
14694 22:24:03.501608 arm64_btitest_bti_none_func_call_using_br_x16 pass
14695 22:24:03.501721 arm64_btitest_bti_none_func_call_using_blr pass
14696 22:24:03.501808 arm64_btitest_bti_c_func_call_using_br_x0 pass
14697 22:24:03.502101 arm64_btitest_bti_c_func_call_using_br_x16 pass
14698 22:24:03.502191 arm64_btitest_bti_c_func_call_using_blr pass
14699 22:24:03.502275 arm64_btitest_bti_j_func_call_using_br_x0 pass
14700 22:24:03.502375 arm64_btitest_bti_j_func_call_using_br_x16 pass
14701 22:24:03.502461 arm64_btitest_bti_j_func_call_using_blr pass
14702 22:24:03.502560 arm64_btitest_bti_jc_func_call_using_br_x0 pass
14703 22:24:03.502845 arm64_btitest_bti_jc_func_call_using_br_x16 pass
14704 22:24:03.502939 arm64_btitest_bti_jc_func_call_using_blr pass
14705 22:24:03.503019 arm64_btitest_paciasp_func_call_using_br_x0 pass
14706 22:24:03.503115 arm64_btitest_paciasp_func_call_using_br_x16 pass
14707 22:24:03.507478 arm64_btitest_paciasp_func_call_using_blr pass
14708 22:24:03.507726 arm64_btitest pass
14709 22:24:03.508023 arm64_nobtitest_nohint_func_call_using_br_x0 pass
14710 22:24:03.508114 arm64_nobtitest_nohint_func_call_using_br_x16 pass
14711 22:24:03.508199 arm64_nobtitest_nohint_func_call_using_blr pass
14712 22:24:03.508283 arm64_nobtitest_bti_none_func_call_using_br_x0 pass
14713 22:24:03.508367 arm64_nobtitest_bti_none_func_call_using_br_x16 pass
14714 22:24:03.508469 arm64_nobtitest_bti_none_func_call_using_blr pass
14715 22:24:03.508555 arm64_nobtitest_bti_c_func_call_using_br_x0 pass
14716 22:24:03.508639 arm64_nobtitest_bti_c_func_call_using_br_x16 pass
14717 22:24:03.508737 arm64_nobtitest_bti_c_func_call_using_blr pass
14718 22:24:03.508836 arm64_nobtitest_bti_j_func_call_using_br_x0 pass
14719 22:24:03.509119 arm64_nobtitest_bti_j_func_call_using_br_x16 pass
14720 22:24:03.509209 arm64_nobtitest_bti_j_func_call_using_blr pass
14721 22:24:03.509293 arm64_nobtitest_bti_jc_func_call_using_br_x0 pass
14722 22:24:03.509391 arm64_nobtitest_bti_jc_func_call_using_br_x16 pass
14723 22:24:03.509490 arm64_nobtitest_bti_jc_func_call_using_blr pass
14724 22:24:03.509592 arm64_nobtitest_paciasp_func_call_using_br_x0 pass
14725 22:24:03.509894 arm64_nobtitest_paciasp_func_call_using_br_x16 pass
14726 22:24:03.510173 arm64_nobtitest_paciasp_func_call_using_blr pass
14727 22:24:03.510263 arm64_nobtitest pass
14728 22:24:03.510348 arm64_hwcap_cpuinfo_match_RNG pass
14729 22:24:03.510433 arm64_hwcap_sigill_RNG pass
14730 22:24:03.510517 arm64_hwcap_cpuinfo_match_SME pass
14731 22:24:03.510618 arm64_hwcap_sigill_SME pass
14732 22:24:03.510703 arm64_hwcap_cpuinfo_match_SVE pass
14733 22:24:03.510787 arm64_hwcap_sigill_SVE pass
14734 22:24:03.510872 arm64_hwcap_cpuinfo_match_SVE_2 pass
14735 22:24:03.510977 arm64_hwcap_sigill_SVE_2 pass
14736 22:24:03.511063 arm64_hwcap_cpuinfo_match_SVE_AES pass
14737 22:24:03.511146 arm64_hwcap_sigill_SVE_AES pass
14738 22:24:03.511244 arm64_hwcap_cpuinfo_match_SVE2_PMULL pass
14739 22:24:03.511330 arm64_hwcap_sigill_SVE2_PMULL pass
14740 22:24:03.511428 arm64_hwcap_cpuinfo_match_SVE2_BITPERM pass
14741 22:24:03.511515 arm64_hwcap_sigill_SVE2_BITPERM pass
14742 22:24:03.511614 arm64_hwcap_cpuinfo_match_SVE2_SHA3 pass
14743 22:24:03.511917 arm64_hwcap_sigill_SVE2_SHA3 pass
14744 22:24:03.512020 arm64_hwcap_cpuinfo_match_SVE2_SM4 pass
14745 22:24:03.519321 arm64_hwcap_sigill_SVE2_SM4 pass
14746 22:24:03.519565 arm64_hwcap_cpuinfo_match_SVE2_I8MM pass
14747 22:24:03.519859 arm64_hwcap_sigill_SVE2_I8MM pass
14748 22:24:03.519951 arm64_hwcap_cpuinfo_match_SVE2_F32MM pass
14749 22:24:03.520037 arm64_hwcap_sigill_SVE2_F32MM pass
14750 22:24:03.520122 arm64_hwcap_cpuinfo_match_SVE2_F64MM pass
14751 22:24:03.520223 arm64_hwcap_sigill_SVE2_F64MM pass
14752 22:24:03.520311 arm64_hwcap_cpuinfo_match_SVE2_BF16 pass
14753 22:24:03.520396 arm64_hwcap_sigill_SVE2_BF16 pass
14754 22:24:03.520479 arm64_hwcap_cpuinfo_match_SVE2_EBF16 pass
14755 22:24:03.520562 arm64_hwcap_sigill_SVE2_EBF16 skip
14756 22:24:03.520660 arm64_hwcap pass
14757 22:24:03.520745 arm64_ptrace_read_tpidr_one pass
14758 22:24:03.520830 arm64_ptrace_write_tpidr_one pass
14759 22:24:03.520918 arm64_ptrace_verify_tpidr_one pass
14760 22:24:03.521017 arm64_ptrace_count_tpidrs pass
14761 22:24:03.521105 arm64_ptrace_tpidr2_write pass
14762 22:24:03.521190 arm64_ptrace_tpidr2_read pass
14763 22:24:03.521292 arm64_ptrace_write_tpidr_only pass
14764 22:24:03.521380 arm64_ptrace pass
14765 22:24:03.521465 arm64_syscall-abi_getpid_FPSIMD pass
14766 22:24:03.521550 arm64_syscall-abi_getpid_SVE_VL_256 pass
14767 22:24:03.521655 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA pass
14768 22:24:03.521742 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM pass
14769 22:24:03.521841 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA pass
14770 22:24:03.522127 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA pass
14771 22:24:03.522219 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM pass
14772 22:24:03.522319 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA pass
14773 22:24:03.522420 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA pass
14774 22:24:03.522708 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM pass
14775 22:24:03.522801 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA pass
14776 22:24:03.522898 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA pass
14777 22:24:03.523034 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM pass
14778 22:24:03.523502 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA pass
14779 22:24:03.523597 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA pass
14780 22:24:03.523881 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM pass
14781 22:24:03.523975 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA pass
14782 22:24:03.524075 arm64_syscall-abi_getpid_SVE_VL_240 pass
14783 22:24:03.524159 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA pass
14784 22:24:03.524548 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM pass
14785 22:24:03.524965 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA pass
14786 22:24:03.525058 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA pass
14787 22:24:03.525143 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM pass
14788 22:24:03.525227 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA pass
14789 22:24:03.525325 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA pass
14790 22:24:03.525411 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM pass
14791 22:24:03.525493 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA pass
14792 22:24:03.525590 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA pass
14793 22:24:03.525697 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM pass
14794 22:24:03.525796 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA pass
14795 22:24:03.526078 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA pass
14796 22:24:03.526166 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM pass
14797 22:24:03.526265 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA pass
14798 22:24:03.526362 arm64_syscall-abi_getpid_SVE_VL_224 pass
14799 22:24:03.526643 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA pass
14800 22:24:03.526745 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM pass
14801 22:24:03.526842 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA pass
14802 22:24:03.527121 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA pass
14803 22:24:03.531254 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM pass
14804 22:24:03.531363 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA pass
14805 22:24:03.531674 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA pass
14806 22:24:03.531774 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM pass
14807 22:24:03.531875 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA pass
14808 22:24:03.531972 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA pass
14809 22:24:03.532270 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM pass
14810 22:24:03.532371 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA pass
14811 22:24:03.532471 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA pass
14812 22:24:03.532568 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM pass
14813 22:24:03.532667 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA pass
14814 22:24:03.532765 arm64_syscall-abi_getpid_SVE_VL_208 pass
14815 22:24:03.533076 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA pass
14816 22:24:03.533176 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM pass
14817 22:24:03.533275 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA pass
14818 22:24:03.533373 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA pass
14819 22:24:03.533677 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM pass
14820 22:24:03.533791 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA pass
14821 22:24:03.534083 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA pass
14822 22:24:03.534352 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM pass
14823 22:24:03.534452 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA pass
14824 22:24:03.534538 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA pass
14825 22:24:03.534634 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM pass
14826 22:24:03.534734 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA pass
14827 22:24:03.534853 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA pass
14828 22:24:03.534976 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM pass
14829 22:24:03.539186 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA pass
14830 22:24:03.539302 arm64_syscall-abi_getpid_SVE_VL_192 pass
14831 22:24:03.539593 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA pass
14832 22:24:03.539700 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM pass
14833 22:24:03.539786 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA pass
14834 22:24:03.539885 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA pass
14835 22:24:03.540230 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM pass
14836 22:24:03.540372 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA pass
14837 22:24:03.540692 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA pass
14838 22:24:03.540795 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM pass
14839 22:24:03.540880 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA pass
14840 22:24:03.541204 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA pass
14841 22:24:03.541319 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM pass
14842 22:24:03.541444 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA pass
14843 22:24:03.541570 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA pass
14844 22:24:03.541902 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM pass
14845 22:24:03.542004 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA pass
14846 22:24:03.542313 arm64_syscall-abi_getpid_SVE_VL_176 pass
14847 22:24:03.542414 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA pass
14848 22:24:03.542499 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM pass
14849 22:24:03.542797 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA pass
14850 22:24:03.542904 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA pass
14851 22:24:03.542994 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM pass
14852 22:24:03.543092 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA pass
14853 22:24:03.547253 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA pass
14854 22:24:03.547696 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM pass
14855 22:24:03.547811 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA pass
14856 22:24:03.548110 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA pass
14857 22:24:03.555080 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM pass
14858 22:24:03.555276 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA pass
14859 22:24:03.555432 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA pass
14860 22:24:03.555606 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM pass
14861 22:24:03.555767 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA pass
14862 22:24:03.555882 arm64_syscall-abi_getpid_SVE_VL_160 pass
14863 22:24:03.556025 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA pass
14864 22:24:03.556160 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM pass
14865 22:24:03.556269 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA pass
14866 22:24:03.556381 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA pass
14867 22:24:03.556773 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM pass
14868 22:24:03.556919 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA pass
14869 22:24:03.557054 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA pass
14870 22:24:03.557207 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM pass
14871 22:24:03.557336 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA pass
14872 22:24:03.557451 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA pass
14873 22:24:03.557580 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM pass
14874 22:24:03.557771 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA pass
14875 22:24:03.557904 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA pass
14876 22:24:03.558026 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM pass
14877 22:24:03.558128 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA pass
14878 22:24:03.558230 arm64_syscall-abi_getpid_SVE_VL_144 pass
14879 22:24:03.558370 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA pass
14880 22:24:03.558495 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM pass
14881 22:24:03.558615 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA pass
14882 22:24:03.558730 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA pass
14883 22:24:03.558875 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM pass
14884 22:24:03.558996 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA pass
14885 22:24:03.559088 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA pass
14886 22:24:03.559175 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM pass
14887 22:24:03.563184 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA pass
14888 22:24:03.563544 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA pass
14889 22:24:03.563691 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM pass
14890 22:24:03.563804 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA pass
14891 22:24:03.563931 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA pass
14892 22:24:03.564012 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM pass
14893 22:24:03.564106 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA pass
14894 22:24:03.564195 arm64_syscall-abi_getpid_SVE_VL_128 pass
14895 22:24:03.564262 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA pass
14896 22:24:03.564355 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM pass
14897 22:24:03.564634 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA pass
14898 22:24:03.564715 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA pass
14899 22:24:03.565294 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM pass
14900 22:24:03.565393 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA pass
14901 22:24:03.565474 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA pass
14902 22:24:03.565555 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM pass
14903 22:24:03.565634 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA pass
14904 22:24:03.565978 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA pass
14905 22:24:03.566186 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM pass
14906 22:24:03.566397 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA pass
14907 22:24:03.566588 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA pass
14908 22:24:03.566798 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM pass
14909 22:24:03.567016 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA pass
14910 22:24:03.567226 arm64_syscall-abi_getpid_SVE_VL_112 pass
14911 22:24:03.567365 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA pass
14912 22:24:03.567509 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM pass
14913 22:24:03.567656 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA pass
14914 22:24:03.567798 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA pass
14915 22:24:03.567939 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM pass
14916 22:24:03.568085 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA pass
14917 22:24:03.571259 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA pass
14918 22:24:03.571465 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM pass
14919 22:24:03.571853 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA pass
14920 22:24:03.572009 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA pass
14921 22:24:03.572205 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM pass
14922 22:24:03.572395 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA pass
14923 22:24:03.572601 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA pass
14924 22:24:03.572788 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM pass
14925 22:24:03.572949 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA pass
14926 22:24:03.573113 arm64_syscall-abi_getpid_SVE_VL_96 pass
14927 22:24:03.573276 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA pass
14928 22:24:03.573474 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM pass
14929 22:24:03.573645 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA pass
14930 22:24:03.573828 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA pass
14931 22:24:03.573971 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM pass
14932 22:24:03.574137 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA pass
14933 22:24:03.574309 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA pass
14934 22:24:03.574504 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM pass
14935 22:24:03.574655 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA pass
14936 22:24:03.574819 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA pass
14937 22:24:03.574963 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM pass
14938 22:24:03.575091 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA pass
14939 22:24:03.575206 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA pass
14940 22:24:03.575320 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM pass
14941 22:24:03.575458 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA pass
14942 22:24:03.575576 arm64_syscall-abi_getpid_SVE_VL_80 pass
14943 22:24:03.575691 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA pass
14944 22:24:03.575806 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM pass
14945 22:24:03.575919 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA pass
14946 22:24:03.579339 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA pass
14947 22:24:03.579462 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM pass
14948 22:24:03.579571 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA pass
14949 22:24:03.579679 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA pass
14950 22:24:03.579788 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM pass
14951 22:24:03.579887 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA pass
14952 22:24:03.580199 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA pass
14953 22:24:03.580303 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM pass
14954 22:24:03.580405 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA pass
14955 22:24:03.580495 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA pass
14956 22:24:03.580601 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM pass
14957 22:24:03.580687 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA pass
14958 22:24:03.580797 arm64_syscall-abi_getpid_SVE_VL_64 pass
14959 22:24:03.581087 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA pass
14960 22:24:03.581184 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM pass
14961 22:24:03.581276 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA pass
14962 22:24:03.581372 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA pass
14963 22:24:03.581671 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM pass
14964 22:24:03.581767 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA pass
14965 22:24:03.581854 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA pass
14966 22:24:03.581944 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM pass
14967 22:24:03.582038 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA pass
14968 22:24:03.582120 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA pass
14969 22:24:03.582405 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM pass
14970 22:24:03.582488 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA pass
14971 22:24:03.582590 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA pass
14972 22:24:03.582882 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM pass
14973 22:24:03.582970 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA pass
14974 22:24:03.583100 arm64_syscall-abi_getpid_SVE_VL_48 pass
14975 22:24:03.583180 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA pass
14976 22:24:03.587167 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM pass
14977 22:24:03.587618 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA pass
14978 22:24:03.587851 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA pass
14979 22:24:03.588071 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM pass
14980 22:24:03.588246 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA pass
14981 22:24:03.588409 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA pass
14982 22:24:03.588571 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM pass
14983 22:24:03.588788 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA pass
14984 22:24:03.589017 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA pass
14985 22:24:03.589191 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM pass
14986 22:24:03.589398 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA pass
14987 22:24:03.589597 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA pass
14988 22:24:03.589801 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM pass
14989 22:24:03.589974 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA pass
14990 22:24:03.590159 arm64_syscall-abi_getpid_SVE_VL_32 pass
14991 22:24:03.590427 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA pass
14992 22:24:03.590634 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM pass
14993 22:24:03.590826 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA pass
14994 22:24:03.590975 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA pass
14995 22:24:03.591094 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM pass
14996 22:24:03.591209 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA pass
14997 22:24:03.591323 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA pass
14998 22:24:03.591435 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM pass
14999 22:24:03.591575 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA pass
15000 22:24:03.591695 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA pass
15001 22:24:03.591809 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM pass
15002 22:24:03.591924 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA pass
15003 22:24:03.592036 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA pass
15004 22:24:03.592151 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM pass
15005 22:24:03.595171 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA pass
15006 22:24:03.595580 arm64_syscall-abi_getpid_SVE_VL_16 pass
15007 22:24:03.595736 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA pass
15008 22:24:03.595862 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM pass
15009 22:24:03.602334 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA pass
15010 22:24:03.602808 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA pass
15011 22:24:03.602996 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM pass
15012 22:24:03.603148 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA pass
15013 22:24:03.603328 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA pass
15014 22:24:03.603477 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM pass
15015 22:24:03.603618 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA pass
15016 22:24:03.603792 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA pass
15017 22:24:03.603960 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM pass
15018 22:24:03.604107 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA pass
15019 22:24:03.604266 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA pass
15020 22:24:03.604424 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM pass
15021 22:24:03.604584 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA pass
15022 22:24:03.604754 arm64_syscall-abi_sched_yield_FPSIMD pass
15023 22:24:03.604920 arm64_syscall-abi_sched_yield_SVE_VL_256 pass
15024 22:24:03.605121 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA pass
15025 22:24:03.605285 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM pass
15026 22:24:03.605473 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA pass
15027 22:24:03.605666 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA pass
15028 22:24:03.605838 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM pass
15029 22:24:03.606080 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA pass
15030 22:24:03.606273 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA pass
15031 22:24:03.606443 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM pass
15032 22:24:03.606583 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA pass
15033 22:24:03.606729 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA pass
15034 22:24:03.606869 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM pass
15035 22:24:03.607018 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA pass
15036 22:24:03.607166 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA pass
15037 22:24:03.607286 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM pass
15038 22:24:03.607401 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA pass
15039 22:24:03.607515 arm64_syscall-abi_sched_yield_SVE_VL_240 pass
15040 22:24:03.607696 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA pass
15041 22:24:03.607878 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM pass
15042 22:24:03.611185 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA pass
15043 22:24:03.611588 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA pass
15044 22:24:03.611696 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM pass
15045 22:24:03.611800 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA pass
15046 22:24:03.611902 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA pass
15047 22:24:03.612201 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM pass
15048 22:24:03.612302 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA pass
15049 22:24:03.612400 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA pass
15050 22:24:03.612501 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM pass
15051 22:24:03.612843 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA pass
15052 22:24:03.613069 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA pass
15053 22:24:03.613303 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM pass
15054 22:24:03.613501 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA pass
15055 22:24:03.613709 arm64_syscall-abi_sched_yield_SVE_VL_224 pass
15056 22:24:03.613941 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA pass
15057 22:24:03.614145 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM pass
15058 22:24:03.614335 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA pass
15059 22:24:03.614520 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA pass
15060 22:24:03.614735 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM pass
15061 22:24:03.614920 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA pass
15062 22:24:03.615093 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA pass
15063 22:24:03.615227 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM pass
15064 22:24:03.615369 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA pass
15065 22:24:03.615489 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA pass
15066 22:24:03.615655 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM pass
15067 22:24:03.619304 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA pass
15068 22:24:03.619858 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA pass
15069 22:24:03.620060 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM pass
15070 22:24:03.620225 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA pass
15071 22:24:03.620383 arm64_syscall-abi_sched_yield_SVE_VL_208 pass
15072 22:24:03.620527 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA pass
15073 22:24:03.620733 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM pass
15074 22:24:03.620945 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA pass
15075 22:24:03.621141 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA pass
15076 22:24:03.621311 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM pass
15077 22:24:03.621466 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA pass
15078 22:24:03.621632 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA pass
15079 22:24:03.621884 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM pass
15080 22:24:03.622075 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA pass
15081 22:24:03.622262 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA pass
15082 22:24:03.622425 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM pass
15083 22:24:03.622574 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA pass
15084 22:24:03.622736 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA pass
15085 22:24:03.622890 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM pass
15086 22:24:03.623025 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA pass
15087 22:24:03.623173 arm64_syscall-abi_sched_yield_SVE_VL_192 pass
15088 22:24:03.623295 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA pass
15089 22:24:03.623410 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM pass
15090 22:24:03.623524 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA pass
15091 22:24:03.623637 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA pass
15092 22:24:03.623750 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM pass
15093 22:24:03.623864 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA pass
15094 22:24:03.623978 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA pass
15095 22:24:03.624090 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM pass
15096 22:24:03.627260 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA pass
15097 22:24:03.627772 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA pass
15098 22:24:03.627970 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM pass
15099 22:24:03.628165 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA pass
15100 22:24:03.628400 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA pass
15101 22:24:03.628652 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM pass
15102 22:24:03.628839 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA pass
15103 22:24:03.629001 arm64_syscall-abi_sched_yield_SVE_VL_176 pass
15104 22:24:03.629168 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA pass
15105 22:24:03.629328 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM pass
15106 22:24:03.629485 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA pass
15107 22:24:03.629644 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA pass
15108 22:24:03.629838 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM pass
15109 22:24:03.630007 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA pass
15110 22:24:03.630171 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA pass
15111 22:24:03.630333 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM pass
15112 22:24:03.630496 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA pass
15113 22:24:03.630659 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA pass
15114 22:24:03.630822 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM pass
15115 22:24:03.631020 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA pass
15116 22:24:03.631157 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA pass
15117 22:24:03.631272 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM pass
15118 22:24:03.631387 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA pass
15119 22:24:03.631501 arm64_syscall-abi_sched_yield_SVE_VL_160 pass
15120 22:24:03.631623 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA pass
15121 22:24:03.631737 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM pass
15122 22:24:03.631852 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA pass
15123 22:24:03.631967 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA pass
15124 22:24:03.632106 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM pass
15125 22:24:03.635385 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA pass
15126 22:24:03.635522 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA pass
15127 22:24:03.635633 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM pass
15128 22:24:03.635944 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA pass
15129 22:24:03.636102 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA pass
15130 22:24:03.636447 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM pass
15131 22:24:03.636591 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA pass
15132 22:24:03.636771 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA pass
15133 22:24:03.636907 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM pass
15134 22:24:03.637028 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA pass
15135 22:24:03.637165 arm64_syscall-abi_sched_yield_SVE_VL_144 pass
15136 22:24:03.637298 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA pass
15137 22:24:03.637424 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM pass
15138 22:24:03.637553 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA pass
15139 22:24:03.637662 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA pass
15140 22:24:03.637814 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM pass
15141 22:24:03.637920 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA pass
15142 22:24:03.638035 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA pass
15143 22:24:03.638138 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM pass
15144 22:24:03.638228 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA pass
15145 22:24:03.638357 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA pass
15146 22:24:03.638449 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM pass
15147 22:24:03.638712 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA pass
15148 22:24:03.638805 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA pass
15149 22:24:03.649001 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM pass
15150 22:24:03.649370 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA pass
15151 22:24:03.649462 arm64_syscall-abi_sched_yield_SVE_VL_128 pass
15152 22:24:03.649555 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA pass
15153 22:24:03.649656 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM pass
15154 22:24:03.649750 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA pass
15155 22:24:03.649850 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA pass
15156 22:24:03.650240 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM pass
15157 22:24:03.650345 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA pass
15158 22:24:03.650447 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA pass
15159 22:24:03.650553 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM pass
15160 22:24:03.650672 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA pass
15161 22:24:03.650787 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA pass
15162 22:24:03.651104 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM pass
15163 22:24:03.651239 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA pass
15164 22:24:03.651540 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA pass
15165 22:24:03.651638 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM pass
15166 22:24:03.651739 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA pass
15167 22:24:03.651843 arm64_syscall-abi_sched_yield_SVE_VL_112 pass
15168 22:24:03.651939 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA pass
15169 22:24:03.652246 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM pass
15170 22:24:03.652409 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA pass
15171 22:24:03.652568 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA pass
15172 22:24:03.652723 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM pass
15173 22:24:03.652855 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA pass
15174 22:24:03.653010 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA pass
15175 22:24:03.653216 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM pass
15176 22:24:03.653383 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA pass
15177 22:24:03.653595 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA pass
15178 22:24:03.653805 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM pass
15179 22:24:03.654032 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA pass
15180 22:24:03.654204 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA pass
15181 22:24:03.654353 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM pass
15182 22:24:03.654514 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA pass
15183 22:24:03.654642 arm64_syscall-abi_sched_yield_SVE_VL_96 pass
15184 22:24:03.654774 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA pass
15185 22:24:03.654920 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM pass
15186 22:24:03.655053 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA pass
15187 22:24:03.655184 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA pass
15188 22:24:03.655292 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM pass
15189 22:24:03.659208 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA pass
15190 22:24:03.659557 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA pass
15191 22:24:03.659711 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM pass
15192 22:24:03.659850 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA pass
15193 22:24:03.660005 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA pass
15194 22:24:03.660155 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM pass
15195 22:24:03.660331 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA pass
15196 22:24:03.660545 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA pass
15197 22:24:03.660760 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM pass
15198 22:24:03.660936 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA pass
15199 22:24:03.661103 arm64_syscall-abi_sched_yield_SVE_VL_80 pass
15200 22:24:03.661286 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA pass
15201 22:24:03.661463 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM pass
15202 22:24:03.661608 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA pass
15203 22:24:03.661762 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA pass
15204 22:24:03.661896 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM pass
15205 22:24:03.662088 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA pass
15206 22:24:03.662243 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA pass
15207 22:24:03.662388 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM pass
15208 22:24:03.662542 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA pass
15209 22:24:03.662698 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA pass
15210 22:24:03.662880 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM pass
15211 22:24:03.663032 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA pass
15212 22:24:03.663161 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA pass
15213 22:24:03.663277 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM pass
15214 22:24:03.663391 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA pass
15215 22:24:03.663526 arm64_syscall-abi_sched_yield_SVE_VL_64 pass
15216 22:24:03.667191 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA pass
15217 22:24:03.667480 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM pass
15218 22:24:03.667569 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA pass
15219 22:24:03.667666 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA pass
15220 22:24:03.667941 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM pass
15221 22:24:03.668216 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA pass
15222 22:24:03.668287 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA pass
15223 22:24:03.668364 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM pass
15224 22:24:03.668615 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA pass
15225 22:24:03.668695 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA pass
15226 22:24:03.668771 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM pass
15227 22:24:03.669021 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA pass
15228 22:24:03.669278 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA pass
15229 22:24:03.669358 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM pass
15230 22:24:03.669608 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA pass
15231 22:24:03.669694 arm64_syscall-abi_sched_yield_SVE_VL_48 pass
15232 22:24:03.669956 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA pass
15233 22:24:03.670044 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM pass
15234 22:24:03.670136 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA pass
15235 22:24:03.670234 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA pass
15236 22:24:03.670548 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM pass
15237 22:24:03.670636 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA pass
15238 22:24:03.670729 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA pass
15239 22:24:03.671035 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM pass
15240 22:24:03.671144 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA pass
15241 22:24:03.675347 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA pass
15242 22:24:03.675468 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM pass
15243 22:24:03.675770 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA pass
15244 22:24:03.675889 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA pass
15245 22:24:03.675980 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM pass
15246 22:24:03.676081 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA pass
15247 22:24:03.676183 arm64_syscall-abi_sched_yield_SVE_VL_32 pass
15248 22:24:03.676283 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA pass
15249 22:24:03.676568 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM pass
15250 22:24:03.676673 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA pass
15251 22:24:03.676956 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA pass
15252 22:24:03.677061 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM pass
15253 22:24:03.677161 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA pass
15254 22:24:03.677447 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA pass
15255 22:24:03.677551 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM pass
15256 22:24:03.677657 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA pass
15257 22:24:03.677956 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA pass
15258 22:24:03.678059 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM pass
15259 22:24:03.678161 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA pass
15260 22:24:03.678266 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA pass
15261 22:24:03.678374 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM pass
15262 22:24:03.678715 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA pass
15263 22:24:03.678894 arm64_syscall-abi_sched_yield_SVE_VL_16 pass
15264 22:24:03.679049 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA pass
15265 22:24:03.679172 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM pass
15266 22:24:03.683438 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA pass
15267 22:24:03.683660 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA pass
15268 22:24:03.683868 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM pass
15269 22:24:03.684087 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA pass
15270 22:24:03.684247 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA pass
15271 22:24:03.684401 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM pass
15272 22:24:03.684531 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA pass
15273 22:24:03.684685 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA pass
15274 22:24:03.684860 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM pass
15275 22:24:03.685043 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA pass
15276 22:24:03.685251 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA pass
15277 22:24:03.685492 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM pass
15278 22:24:03.685707 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA pass
15279 22:24:03.685903 arm64_syscall-abi pass
15280 22:24:03.686050 arm64_tpidr2_default_value pass
15281 22:24:03.686226 arm64_tpidr2_write_read pass
15282 22:24:03.686363 arm64_tpidr2_write_sleep_read pass
15283 22:24:03.686505 arm64_tpidr2_write_fork_read pass
15284 22:24:03.686645 arm64_tpidr2_write_clone_read pass
15285 22:24:03.686786 arm64_tpidr2 pass
15286 22:24:03.706395 + ../../utils/send-to-lava.sh ./output/result.txt
15287 22:24:03.763306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tags_test RESULT=pass
15289 22:24:03.763911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tags_test RESULT=pass>
15290 22:24:03.795306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass
15292 22:24:03.795753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass>
15293 22:24:03.826234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass>
15294 22:24:03.826582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass
15296 22:24:03.856682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass
15298 22:24:03.857107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass>
15299 22:24:03.886943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass
15301 22:24:03.887440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass>
15302 22:24:03.917324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass>
15303 22:24:03.917677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass
15305 22:24:03.948148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass>
15306 22:24:03.948494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass
15308 22:24:03.978505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass>
15309 22:24:03.978854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass
15311 22:24:04.008746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=pass>
15312 22:24:04.009090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=pass
15314 22:24:04.039199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=pass
15316 22:24:04.039642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=pass>
15317 22:24:04.070266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass>
15318 22:24:04.070610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass
15320 22:24:04.101158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass>
15321 22:24:04.101502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass
15323 22:24:04.132131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass
15325 22:24:04.132547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass>
15326 22:24:04.162630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass>
15327 22:24:04.163020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass
15329 22:24:04.193516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass
15331 22:24:04.194028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass>
15332 22:24:04.224495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass
15334 22:24:04.224925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass>
15335 22:24:04.254641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass>
15336 22:24:04.254987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass
15338 22:24:04.285533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass>
15339 22:24:04.285907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass
15341 22:24:04.316967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=pass>
15342 22:24:04.317332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=pass
15344 22:24:04.347767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip
15346 22:24:04.348258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip>
15347 22:24:04.377845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_za RESULT=pass
15349 22:24:04.378331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_za RESULT=pass>
15350 22:24:04.407975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_vl RESULT=pass>
15351 22:24:04.408330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_vl RESULT=pass
15353 22:24:04.437956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ssve_regs RESULT=pass
15355 22:24:04.438377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ssve_regs RESULT=pass>
15356 22:24:04.468296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_regs RESULT=pass
15358 22:24:04.468603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_regs RESULT=pass>
15359 22:24:04.498817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_vl RESULT=pass
15361 22:24:04.499112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_vl RESULT=pass>
15362 22:24:04.529651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_no_regs RESULT=pass>
15363 22:24:04.529934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_no_regs RESULT=pass
15365 22:24:04.560834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_regs RESULT=pass
15367 22:24:04.561141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_regs RESULT=pass>
15368 22:24:04.593957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_corrupt_pac RESULT=pass>
15369 22:24:04.594349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_corrupt_pac RESULT=pass
15371 22:24:04.625056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop RESULT=pass>
15372 22:24:04.625407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop RESULT=pass
15374 22:24:04.657405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop_generic RESULT=pass>
15375 22:24:04.657758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop_generic RESULT=pass
15377 22:24:04.688369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_single_thread_different_keys RESULT=pass>
15378 22:24:04.688719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_single_thread_different_keys RESULT=pass
15380 22:24:04.718813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_exec_changed_keys RESULT=pass>
15381 22:24:04.719155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_exec_changed_keys RESULT=pass
15383 22:24:04.749988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys RESULT=pass>
15384 22:24:04.750337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys RESULT=pass
15386 22:24:04.781353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys_generic RESULT=pass>
15387 22:24:04.781684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys_generic RESULT=pass
15389 22:24:04.813413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac RESULT=pass
15391 22:24:04.813716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac RESULT=pass>
15392 22:24:04.845100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass
15394 22:24:04.845395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass>
15395 22:24:04.876436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-256-0 RESULT=pass>
15396 22:24:04.876780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-256-0 RESULT=pass
15398 22:24:04.907284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-240-0 RESULT=pass
15400 22:24:04.907586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-240-0 RESULT=pass>
15401 22:24:04.938517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-224-0 RESULT=pass>
15402 22:24:04.938800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-224-0 RESULT=pass
15404 22:24:04.970018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-208-0 RESULT=pass>
15405 22:24:04.970361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-208-0 RESULT=pass
15407 22:24:05.001154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-192-0 RESULT=pass>
15408 22:24:05.001501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-192-0 RESULT=pass
15410 22:24:05.032347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-176-0 RESULT=pass>
15411 22:24:05.032630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-176-0 RESULT=pass
15413 22:24:05.064275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-160-0 RESULT=pass>
15414 22:24:05.064552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-160-0 RESULT=pass
15416 22:24:05.095371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-144-0 RESULT=pass
15418 22:24:05.095664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-144-0 RESULT=pass>
15419 22:24:05.126529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-128-0 RESULT=pass
15421 22:24:05.126814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-128-0 RESULT=pass>
15422 22:24:05.157578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-112-0 RESULT=pass>
15423 22:24:05.157856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-112-0 RESULT=pass
15425 22:24:05.188670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-96-0 RESULT=pass
15427 22:24:05.188966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-96-0 RESULT=pass>
15428 22:24:05.219486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-80-0 RESULT=pass>
15429 22:24:05.219767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-80-0 RESULT=pass
15431 22:24:05.250278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-0 RESULT=pass>
15432 22:24:05.250624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-0 RESULT=pass
15434 22:24:05.280922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-48-0 RESULT=pass
15436 22:24:05.281486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-48-0 RESULT=pass>
15437 22:24:05.312327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-0 RESULT=pass>
15438 22:24:05.312740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-0 RESULT=pass
15440 22:24:05.344296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-0 RESULT=pass>
15441 22:24:05.344669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-0 RESULT=pass
15443 22:24:05.376306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-256-0 RESULT=pass>
15444 22:24:05.376669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-256-0 RESULT=pass
15446 22:24:05.409689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-256-0 RESULT=pass
15448 22:24:05.410177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-256-0 RESULT=pass>
15449 22:24:05.441823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-128-0 RESULT=pass
15451 22:24:05.442320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-128-0 RESULT=pass>
15452 22:24:05.474175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-128-0 RESULT=pass>
15453 22:24:05.474529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-128-0 RESULT=pass
15455 22:24:05.508324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-0 RESULT=pass
15457 22:24:05.508806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-0 RESULT=pass>
15458 22:24:05.540425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-0 RESULT=pass>
15459 22:24:05.540787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-0 RESULT=pass
15461 22:24:05.573198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-0 RESULT=pass>
15462 22:24:05.573545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-0 RESULT=pass
15464 22:24:05.606771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-0 RESULT=pass
15466 22:24:05.607230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-0 RESULT=pass>
15467 22:24:05.639859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-0 RESULT=pass>
15468 22:24:05.640204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-0 RESULT=pass
15470 22:24:05.672650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-0 RESULT=pass
15472 22:24:05.673072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-0 RESULT=pass>
15473 22:24:05.705712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress RESULT=pass
15475 22:24:05.706261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress RESULT=pass>
15476 22:24:05.739835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 RESULT=pass>
15477 22:24:05.740287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 RESULT=pass
15479 22:24:05.773236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state RESULT=pass
15481 22:24:05.773704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state RESULT=pass>
15482 22:24:05.807402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set RESULT=pass
15484 22:24:05.807876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set RESULT=pass>
15485 22:24:05.842343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass>
15486 22:24:05.842755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass
15488 22:24:05.875818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_16 RESULT=pass>
15489 22:24:05.876201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_16 RESULT=pass
15491 22:24:05.908739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 RESULT=pass>
15492 22:24:05.909197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 RESULT=pass
15494 22:24:05.942355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 RESULT=pass>
15495 22:24:05.942808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 RESULT=pass
15497 22:24:05.976379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 RESULT=pass>
15498 22:24:05.976836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 RESULT=pass
15500 22:24:06.009818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_32 RESULT=pass
15502 22:24:06.010357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_32 RESULT=pass>
15503 22:24:06.042993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 RESULT=pass>
15504 22:24:06.043440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 RESULT=pass
15506 22:24:06.076735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 RESULT=pass>
15507 22:24:06.077157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 RESULT=pass
15509 22:24:06.111921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 RESULT=pass>
15510 22:24:06.112337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 RESULT=pass
15512 22:24:06.144586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_48 RESULT=pass>
15513 22:24:06.144982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_48 RESULT=pass
15515 22:24:06.178863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 RESULT=pass>
15516 22:24:06.179350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 RESULT=pass
15518 22:24:06.212682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 RESULT=pass>
15519 22:24:06.213060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 RESULT=pass
15521 22:24:06.246157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 RESULT=pass
15523 22:24:06.246584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 RESULT=pass>
15524 22:24:06.279191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_64 RESULT=pass>
15525 22:24:06.279634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_64 RESULT=pass
15527 22:24:06.312390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 RESULT=pass>
15528 22:24:06.312863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 RESULT=pass
15530 22:24:06.345953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 RESULT=pass>
15531 22:24:06.346379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 RESULT=pass
15533 22:24:06.380473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 RESULT=pass>
15534 22:24:06.380919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 RESULT=pass
15536 22:24:06.414137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_80 RESULT=pass>
15537 22:24:06.414582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_80 RESULT=pass
15539 22:24:06.447536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 RESULT=pass
15541 22:24:06.448083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 RESULT=pass>
15542 22:24:06.480742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 RESULT=pass>
15543 22:24:06.481198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 RESULT=pass
15545 22:24:06.514202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 RESULT=pass
15547 22:24:06.514765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 RESULT=pass>
15548 22:24:06.547477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_96 RESULT=pass
15550 22:24:06.548073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_96 RESULT=pass>
15551 22:24:06.580775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 RESULT=pass>
15552 22:24:06.581196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 RESULT=pass
15554 22:24:06.612068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 RESULT=pass>
15555 22:24:06.612503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 RESULT=pass
15557 22:24:06.643900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 RESULT=pass>
15558 22:24:06.644311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 RESULT=pass
15560 22:24:06.674526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_112 RESULT=pass>
15561 22:24:06.674869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_112 RESULT=pass
15563 22:24:06.705886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 RESULT=pass>
15564 22:24:06.706275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 RESULT=pass
15566 22:24:06.738681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 RESULT=pass
15568 22:24:06.739326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 RESULT=pass>
15569 22:24:06.770634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 RESULT=pass>
15570 22:24:06.771097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 RESULT=pass
15572 22:24:06.802666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_128 RESULT=pass
15574 22:24:06.803292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_128 RESULT=pass>
15575 22:24:06.834751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 RESULT=pass
15577 22:24:06.835346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 RESULT=pass>
15578 22:24:06.865623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 RESULT=pass>
15579 22:24:06.865964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 RESULT=pass
15581 22:24:06.897975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 RESULT=pass>
15582 22:24:06.898314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 RESULT=pass
15584 22:24:06.929356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_144 RESULT=pass
15586 22:24:06.929934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_144 RESULT=pass>
15587 22:24:06.961089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 RESULT=pass
15589 22:24:06.961545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 RESULT=pass>
15590 22:24:06.994627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 RESULT=pass
15592 22:24:06.995095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 RESULT=pass>
15593 22:24:07.025829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 RESULT=pass>
15594 22:24:07.026209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 RESULT=pass
15596 22:24:07.056899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_160 RESULT=pass>
15597 22:24:07.057313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_160 RESULT=pass
15599 22:24:07.088482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 RESULT=pass>
15600 22:24:07.088999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 RESULT=pass
15602 22:24:07.120206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 RESULT=pass
15604 22:24:07.120843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 RESULT=pass>
15605 22:24:07.152028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 RESULT=pass>
15606 22:24:07.152415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 RESULT=pass
15608 22:24:07.182835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_176 RESULT=pass>
15609 22:24:07.183137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_176 RESULT=pass
15611 22:24:07.214358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 RESULT=pass
15613 22:24:07.214854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 RESULT=pass>
15614 22:24:07.245589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 RESULT=pass>
15615 22:24:07.245987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 RESULT=pass
15617 22:24:07.276793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 RESULT=pass>
15618 22:24:07.277191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 RESULT=pass
15620 22:24:07.308509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_192 RESULT=pass
15622 22:24:07.309012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_192 RESULT=pass>
15623 22:24:07.340179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 RESULT=pass>
15624 22:24:07.340583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 RESULT=pass
15626 22:24:07.371109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 RESULT=pass
15628 22:24:07.371592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 RESULT=pass>
15629 22:24:07.403438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 RESULT=pass
15631 22:24:07.403923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 RESULT=pass>
15632 22:24:07.434212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_208 RESULT=pass>
15633 22:24:07.434603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_208 RESULT=pass
15635 22:24:07.464837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 RESULT=pass>
15636 22:24:07.465177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 RESULT=pass
15638 22:24:07.496082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 RESULT=pass>
15639 22:24:07.496484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 RESULT=pass
15641 22:24:07.527062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 RESULT=pass>
15642 22:24:07.527473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 RESULT=pass
15644 22:24:07.557853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_224 RESULT=pass>
15645 22:24:07.558256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_224 RESULT=pass
15647 22:24:07.588785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 RESULT=pass>
15648 22:24:07.589171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 RESULT=pass
15650 22:24:07.620300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 RESULT=pass>
15651 22:24:07.620693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 RESULT=pass
15653 22:24:07.652069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 RESULT=pass>
15654 22:24:07.652475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 RESULT=pass
15656 22:24:07.683109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_240 RESULT=pass>
15657 22:24:07.683521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_240 RESULT=pass
15659 22:24:07.714739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 RESULT=pass>
15660 22:24:07.715152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 RESULT=pass
15662 22:24:07.746271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 RESULT=pass>
15663 22:24:07.746672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 RESULT=pass
15665 22:24:07.777877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 RESULT=pass>
15666 22:24:07.778336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 RESULT=pass
15668 22:24:07.809224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_256 RESULT=pass
15670 22:24:07.809719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_256 RESULT=pass>
15671 22:24:07.840611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 RESULT=pass>
15672 22:24:07.840999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 RESULT=pass
15674 22:24:07.871976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 RESULT=pass>
15675 22:24:07.872391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 RESULT=pass
15677 22:24:07.903870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 RESULT=pass>
15678 22:24:07.904282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 RESULT=pass
15680 22:24:07.934849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_272 RESULT=pass>
15681 22:24:07.935240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_272 RESULT=pass
15683 22:24:07.966037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip>
15684 22:24:07.966363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip
15686 22:24:07.996812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip>
15687 22:24:07.997211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip
15689 22:24:08.028487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip>
15690 22:24:08.028873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip
15692 22:24:08.059648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_288 RESULT=pass>
15693 22:24:08.060029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_288 RESULT=pass
15695 22:24:08.090238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip>
15696 22:24:08.090617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip
15698 22:24:08.121232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip>
15699 22:24:08.121588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip
15701 22:24:08.152841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip>
15702 22:24:08.153244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip
15704 22:24:08.184084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_304 RESULT=pass
15706 22:24:08.184600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_304 RESULT=pass>
15707 22:24:08.214733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip>
15708 22:24:08.215130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip
15710 22:24:08.246907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip>
15711 22:24:08.247289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip
15713 22:24:08.283438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip
15715 22:24:08.283937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip>
15716 22:24:08.316911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_320 RESULT=pass
15718 22:24:08.317397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_320 RESULT=pass>
15719 22:24:08.350305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip
15721 22:24:08.350779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip>
15722 22:24:08.384451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip>
15723 22:24:08.384979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip
15725 22:24:08.418421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip>
15726 22:24:08.418890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip
15728 22:24:08.454315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_336 RESULT=pass>
15729 22:24:08.454860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_336 RESULT=pass
15731 22:24:08.487524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip
15733 22:24:08.487995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip>
15734 22:24:08.522048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip>
15735 22:24:08.522460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip
15737 22:24:08.557027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip>
15738 22:24:08.557441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip
15740 22:24:08.591061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_352 RESULT=pass>
15741 22:24:08.591518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_352 RESULT=pass
15743 22:24:08.623742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip>
15744 22:24:08.624218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip
15746 22:24:08.658134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip>
15747 22:24:08.658611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip
15749 22:24:08.700945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip>
15750 22:24:08.701497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip
15752 22:24:08.734208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_368 RESULT=pass>
15753 22:24:08.734709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_368 RESULT=pass
15755 22:24:08.767072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip>
15756 22:24:08.767562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip
15758 22:24:08.800890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip>
15759 22:24:08.801439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip
15761 22:24:08.834351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip>
15762 22:24:08.834813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip
15764 22:24:08.868887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_384 RESULT=pass>
15765 22:24:08.869375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_384 RESULT=pass
15767 22:24:08.902298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip
15769 22:24:08.902955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip>
15770 22:24:08.935522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip
15772 22:24:08.935983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip>
15773 22:24:08.971082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip>
15774 22:24:08.971564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip
15776 22:24:09.003280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_400 RESULT=pass
15778 22:24:09.003807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_400 RESULT=pass>
15779 22:24:09.036253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip>
15780 22:24:09.036615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip
15782 22:24:09.068724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip
15784 22:24:09.069213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip>
15785 22:24:09.108219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip>
15786 22:24:09.108569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip
15788 22:24:09.140860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_416 RESULT=pass>
15789 22:24:09.141203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_416 RESULT=pass
15791 22:24:09.173042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip>
15792 22:24:09.173385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip
15794 22:24:09.205473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip>
15795 22:24:09.205811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip
15797 22:24:09.239995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip>
15798 22:24:09.240357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip
15800 22:24:09.272921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_432 RESULT=pass>
15801 22:24:09.273258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_432 RESULT=pass
15803 22:24:09.307084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip>
15804 22:24:09.307438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip
15806 22:24:09.341362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip>
15807 22:24:09.341690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip
15809 22:24:09.373604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip
15811 22:24:09.374101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip>
15812 22:24:09.405960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_448 RESULT=pass
15814 22:24:09.406419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_448 RESULT=pass>
15815 22:24:09.438501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip
15817 22:24:09.438953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip>
15818 22:24:09.473295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip
15820 22:24:09.473755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip>
15821 22:24:09.507445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip
15823 22:24:09.508008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip>
15824 22:24:09.540303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_464 RESULT=pass
15826 22:24:09.540708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_464 RESULT=pass>
15827 22:24:09.573009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip>
15828 22:24:09.573360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip
15830 22:24:09.606183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip>
15831 22:24:09.606640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip
15833 22:24:09.639072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip>
15834 22:24:09.639527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip
15836 22:24:09.677821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_480 RESULT=pass>
15837 22:24:09.678178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_480 RESULT=pass
15839 22:24:09.713032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip>
15840 22:24:09.713384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip
15842 22:24:09.750271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip>
15843 22:24:09.750617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip
15845 22:24:09.783754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip>
15846 22:24:09.784063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip
15848 22:24:09.815227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_496 RESULT=pass
15850 22:24:09.815606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_496 RESULT=pass>
15851 22:24:09.846439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip
15853 22:24:09.846939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip>
15854 22:24:09.878277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip
15856 22:24:09.878756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip>
15857 22:24:09.910467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip>
15858 22:24:09.910881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip
15860 22:24:09.942176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_512 RESULT=pass
15862 22:24:09.942629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_512 RESULT=pass>
15863 22:24:09.973337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip
15865 22:24:09.973795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip>
15866 22:24:10.004818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip>
15867 22:24:10.005245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip
15869 22:24:10.037155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip
15871 22:24:10.037605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip>
15872 22:24:10.070089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_528 RESULT=pass
15874 22:24:10.070537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_528 RESULT=pass>
15875 22:24:10.102701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip
15877 22:24:10.103328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip>
15878 22:24:10.134721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip
15880 22:24:10.135336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip>
15881 22:24:10.165719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip
15883 22:24:10.166275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip>
15884 22:24:10.197409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_544 RESULT=pass
15886 22:24:10.197990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_544 RESULT=pass>
15887 22:24:10.228917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip
15889 22:24:10.229502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip>
15890 22:24:10.260753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip
15892 22:24:10.261476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip>
15893 22:24:10.293547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip>
15894 22:24:10.293968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip
15896 22:24:10.325354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_560 RESULT=pass
15898 22:24:10.325959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_560 RESULT=pass>
15899 22:24:10.356689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip
15901 22:24:10.357239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip>
15902 22:24:10.388295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip>
15903 22:24:10.388767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip
15905 22:24:10.419994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip>
15906 22:24:10.420465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip
15908 22:24:10.451570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_576 RESULT=pass
15910 22:24:10.452154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_576 RESULT=pass>
15911 22:24:10.484120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip>
15912 22:24:10.484568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip
15914 22:24:10.517446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip>
15915 22:24:10.517916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip
15917 22:24:10.550046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip>
15918 22:24:10.550466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip
15920 22:24:10.581720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_592 RESULT=pass>
15921 22:24:10.582141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_592 RESULT=pass
15923 22:24:10.614241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip>
15924 22:24:10.614656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip
15926 22:24:10.645781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip>
15927 22:24:10.646086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip
15929 22:24:10.678383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip
15931 22:24:10.678744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip>
15932 22:24:10.710824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_608 RESULT=pass
15934 22:24:10.711249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_608 RESULT=pass>
15935 22:24:10.744060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip
15937 22:24:10.744461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip>
15938 22:24:10.776325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip
15940 22:24:10.776715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip>
15941 22:24:10.809268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip>
15942 22:24:10.809622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip
15944 22:24:10.841721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_624 RESULT=pass>
15945 22:24:10.842224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_624 RESULT=pass
15947 22:24:10.874548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip>
15948 22:24:10.875011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip
15950 22:24:10.906587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip
15952 22:24:10.907022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip>
15953 22:24:10.939596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip
15955 22:24:10.940015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip>
15956 22:24:10.971966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_640 RESULT=pass>
15957 22:24:10.972439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_640 RESULT=pass
15959 22:24:11.004942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip
15961 22:24:11.005430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip>
15962 22:24:11.038694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip>
15963 22:24:11.039066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip
15965 22:24:11.079123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip
15967 22:24:11.079600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip>
15968 22:24:11.114687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_656 RESULT=pass
15970 22:24:11.115106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_656 RESULT=pass>
15971 22:24:11.148328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip>
15972 22:24:11.148739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip
15974 22:24:11.181826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip
15976 22:24:11.182287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip>
15977 22:24:11.214531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip>
15978 22:24:11.214960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip
15980 22:24:11.246490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_672 RESULT=pass>
15981 22:24:11.246979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_672 RESULT=pass
15983 22:24:11.278613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip>
15984 22:24:11.278993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip
15986 22:24:11.310376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip
15988 22:24:11.310916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip>
15989 22:24:11.344268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip>
15990 22:24:11.344729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip
15992 22:24:11.377349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_688 RESULT=pass>
15993 22:24:11.377768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_688 RESULT=pass
15995 22:24:11.410992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip>
15996 22:24:11.411476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip
15998 22:24:11.444450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip
16000 22:24:11.444997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip>
16001 22:24:11.477376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip>
16002 22:24:11.477682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip
16004 22:24:11.510196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_704 RESULT=pass>
16005 22:24:11.510749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_704 RESULT=pass
16007 22:24:11.542679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip
16009 22:24:11.543158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip>
16010 22:24:11.574123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip
16012 22:24:11.574620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip>
16013 22:24:11.605879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip>
16014 22:24:11.606279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip
16016 22:24:11.637360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_720 RESULT=pass>
16017 22:24:11.637686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_720 RESULT=pass
16019 22:24:11.669025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip
16021 22:24:11.669478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip>
16022 22:24:11.701142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip>
16023 22:24:11.701512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip
16025 22:24:11.732501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip
16027 22:24:11.732919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip>
16028 22:24:11.764392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_736 RESULT=pass>
16029 22:24:11.764838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_736 RESULT=pass
16031 22:24:11.796222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip>
16032 22:24:11.796675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip
16034 22:24:11.827857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip
16036 22:24:11.828179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip>
16037 22:24:11.860017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip>
16038 22:24:11.860389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip
16040 22:24:11.890887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_752 RESULT=pass
16042 22:24:11.891342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_752 RESULT=pass>
16043 22:24:11.921670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip
16045 22:24:11.922228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip>
16046 22:24:11.952410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip>
16047 22:24:11.952828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip
16049 22:24:11.985453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip
16051 22:24:11.986142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip>
16052 22:24:12.021331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_768 RESULT=pass>
16053 22:24:12.021687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_768 RESULT=pass
16055 22:24:12.056645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip>
16056 22:24:12.057014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip
16058 22:24:12.090454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip>
16059 22:24:12.090862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip
16061 22:24:12.124533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip
16063 22:24:12.125022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip>
16064 22:24:12.156976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_784 RESULT=pass>
16065 22:24:12.157461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_784 RESULT=pass
16067 22:24:12.189776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip
16069 22:24:12.190209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip>
16070 22:24:12.221613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip
16072 22:24:12.222224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip>
16073 22:24:12.253738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip>
16074 22:24:12.254216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip
16076 22:24:12.285373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_800 RESULT=pass
16078 22:24:12.286012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_800 RESULT=pass>
16079 22:24:12.316569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip>
16080 22:24:12.316971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip
16082 22:24:12.347897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip>
16083 22:24:12.348341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip
16085 22:24:12.379238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip>
16086 22:24:12.379692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip
16088 22:24:12.410821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_816 RESULT=pass>
16089 22:24:12.411298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_816 RESULT=pass
16091 22:24:12.441718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip
16093 22:24:12.442291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip>
16094 22:24:12.472620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip
16096 22:24:12.473189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip>
16097 22:24:12.503501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip
16099 22:24:12.503949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip>
16100 22:24:12.536431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_832 RESULT=pass>
16101 22:24:12.536838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_832 RESULT=pass
16103 22:24:12.568216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip>
16104 22:24:12.568620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip
16106 22:24:12.599639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip
16108 22:24:12.600206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip>
16109 22:24:12.632496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip>
16110 22:24:12.632944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip
16112 22:24:12.663595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_848 RESULT=pass
16114 22:24:12.664136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_848 RESULT=pass>
16115 22:24:12.696686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip>
16116 22:24:12.697145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip
16118 22:24:12.728514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip>
16119 22:24:12.728926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip
16121 22:24:12.761551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip>
16122 22:24:12.762038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip
16124 22:24:12.792397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_864 RESULT=pass
16126 22:24:12.792941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_864 RESULT=pass>
16127 22:24:12.822711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip>
16128 22:24:12.823170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip
16130 22:24:12.852838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip>
16131 22:24:12.853301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip
16133 22:24:12.884006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip>
16134 22:24:12.884454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip
16136 22:24:12.914251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_880 RESULT=pass
16138 22:24:12.914821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_880 RESULT=pass>
16139 22:24:12.944446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip>
16140 22:24:12.944900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip
16142 22:24:12.974624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip>
16143 22:24:12.975077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip
16145 22:24:13.004706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip>
16146 22:24:13.005161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip
16148 22:24:13.035775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_896 RESULT=pass>
16149 22:24:13.036226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_896 RESULT=pass
16151 22:24:13.066233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip>
16152 22:24:13.066635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip
16154 22:24:13.096661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip>
16155 22:24:13.097064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip
16157 22:24:13.128177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip>
16158 22:24:13.128588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip
16160 22:24:13.158374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_912 RESULT=pass
16162 22:24:13.158917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_912 RESULT=pass>
16163 22:24:13.188358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip
16165 22:24:13.188958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip>
16166 22:24:13.218738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip
16168 22:24:13.219319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip>
16169 22:24:13.249386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip
16171 22:24:13.249966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip>
16172 22:24:13.280092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_928 RESULT=pass>
16173 22:24:13.280556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_928 RESULT=pass
16175 22:24:13.310561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip
16177 22:24:13.311143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip>
16178 22:24:13.340925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip>
16179 22:24:13.341381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip
16181 22:24:13.372413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip
16183 22:24:13.372956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip>
16184 22:24:13.402642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_944 RESULT=pass
16186 22:24:13.403081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_944 RESULT=pass>
16187 22:24:13.433377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip
16189 22:24:13.433948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip>
16190 22:24:13.463793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip>
16191 22:24:13.464257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip
16193 22:24:13.494207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip
16195 22:24:13.494752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip>
16196 22:24:13.526115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_960 RESULT=pass
16198 22:24:13.526657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_960 RESULT=pass>
16199 22:24:13.556650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip
16201 22:24:13.557198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip>
16202 22:24:13.587161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip>
16203 22:24:13.587623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip
16205 22:24:13.617810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip
16207 22:24:13.618425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip>
16208 22:24:13.648736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_976 RESULT=pass>
16209 22:24:13.649216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_976 RESULT=pass
16211 22:24:13.679709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip>
16212 22:24:13.680165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip
16214 22:24:13.710794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip>
16215 22:24:13.711277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip
16217 22:24:13.741994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip
16219 22:24:13.742443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip>
16220 22:24:13.773032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_992 RESULT=pass>
16221 22:24:13.773444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_992 RESULT=pass
16223 22:24:13.803729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip>
16224 22:24:13.804204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip
16226 22:24:13.833382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip>
16227 22:24:13.833752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip
16229 22:24:13.864254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip>
16230 22:24:13.864637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip
16232 22:24:13.895210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1008 RESULT=pass
16234 22:24:13.895757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1008 RESULT=pass>
16235 22:24:13.925183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip
16237 22:24:13.925769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip>
16238 22:24:13.955023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip
16240 22:24:13.955603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip>
16241 22:24:13.986053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip>
16242 22:24:13.986489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip
16244 22:24:14.016783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1024 RESULT=pass>
16245 22:24:14.017231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1024 RESULT=pass
16247 22:24:14.047935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip>
16248 22:24:14.048523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip
16250 22:24:14.078851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip>
16251 22:24:14.079327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip
16253 22:24:14.109666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip>
16254 22:24:14.110118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip
16256 22:24:14.139799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1040 RESULT=pass>
16257 22:24:14.140230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1040 RESULT=pass
16259 22:24:14.170136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip>
16260 22:24:14.170580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip
16262 22:24:14.200309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip>
16263 22:24:14.200754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip
16265 22:24:14.230376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip>
16266 22:24:14.230823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip
16268 22:24:14.260452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1056 RESULT=pass>
16269 22:24:14.260892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1056 RESULT=pass
16271 22:24:14.290847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip
16273 22:24:14.291384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip>
16274 22:24:14.321344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip>
16275 22:24:14.321785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip
16277 22:24:14.352220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip>
16278 22:24:14.352640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip
16280 22:24:14.384414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1072 RESULT=pass>
16281 22:24:14.384894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1072 RESULT=pass
16283 22:24:14.415499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip
16285 22:24:14.415967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip>
16286 22:24:14.445559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip>
16287 22:24:14.445880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip
16289 22:24:14.476549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip>
16290 22:24:14.476887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip
16292 22:24:14.507082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1088 RESULT=pass
16294 22:24:14.507437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1088 RESULT=pass>
16295 22:24:14.537086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip>
16296 22:24:14.537489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip
16298 22:24:14.567456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip
16300 22:24:14.568012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip>
16301 22:24:14.597779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip>
16302 22:24:14.598201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip
16304 22:24:14.629727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1104 RESULT=pass>
16305 22:24:14.630125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1104 RESULT=pass
16307 22:24:14.660955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip>
16308 22:24:14.661345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip
16310 22:24:14.691131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip>
16311 22:24:14.691510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip
16313 22:24:14.721425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip
16315 22:24:14.722090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip>
16316 22:24:14.751724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1120 RESULT=pass
16318 22:24:14.752327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1120 RESULT=pass>
16319 22:24:14.781797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip>
16320 22:24:14.782273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip
16322 22:24:14.812720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip>
16323 22:24:14.813167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip
16325 22:24:14.843056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip
16327 22:24:14.843619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip>
16328 22:24:14.873443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1136 RESULT=pass>
16329 22:24:14.873905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1136 RESULT=pass
16331 22:24:14.904458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip>
16332 22:24:14.904916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip
16334 22:24:14.934989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip>
16335 22:24:14.935447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip
16337 22:24:14.965732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip
16339 22:24:14.966341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip>
16340 22:24:14.996914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1152 RESULT=pass>
16341 22:24:14.997385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1152 RESULT=pass
16343 22:24:15.027836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip>
16344 22:24:15.028286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip
16346 22:24:15.060194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip>
16347 22:24:15.060626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip
16349 22:24:15.091395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip
16351 22:24:15.091975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip>
16352 22:24:15.122548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1168 RESULT=pass>
16353 22:24:15.123052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1168 RESULT=pass
16355 22:24:15.152950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip>
16356 22:24:15.153420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip
16358 22:24:15.182763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip>
16359 22:24:15.183221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip
16361 22:24:15.213308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip
16363 22:24:15.213891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip>
16364 22:24:15.242809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1184 RESULT=pass>
16365 22:24:15.243153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1184 RESULT=pass
16367 22:24:15.272808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip>
16368 22:24:15.273157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip
16370 22:24:15.302920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip>
16371 22:24:15.303260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip
16373 22:24:15.333057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip>
16374 22:24:15.333383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip
16376 22:24:15.364475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1200 RESULT=pass>
16377 22:24:15.364817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1200 RESULT=pass
16379 22:24:15.396117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip>
16380 22:24:15.396476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip
16382 22:24:15.426296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip>
16383 22:24:15.426773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip
16385 22:24:15.456930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip>
16386 22:24:15.457405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip
16388 22:24:15.487499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1216 RESULT=pass
16390 22:24:15.487926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1216 RESULT=pass>
16391 22:24:15.518826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip
16393 22:24:15.519285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip>
16394 22:24:15.550091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip>
16395 22:24:15.550546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip
16397 22:24:15.580849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip
16399 22:24:15.581392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip>
16400 22:24:15.612069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1232 RESULT=pass>
16401 22:24:15.612516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1232 RESULT=pass
16403 22:24:15.642605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip>
16404 22:24:15.643017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip
16406 22:24:15.673261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip>
16407 22:24:15.673665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip
16409 22:24:15.704380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip>
16410 22:24:15.704769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip
16412 22:24:15.734563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1248 RESULT=pass>
16413 22:24:15.735038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1248 RESULT=pass
16415 22:24:15.764936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip>
16416 22:24:15.765332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip
16418 22:24:15.794899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip>
16419 22:24:15.795243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip
16421 22:24:15.825175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip>
16422 22:24:15.825519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip
16424 22:24:15.856063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1264 RESULT=pass>
16425 22:24:15.856406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1264 RESULT=pass
16427 22:24:15.886364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip>
16428 22:24:15.886723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip
16430 22:24:15.916656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip
16432 22:24:15.917187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip>
16433 22:24:15.947130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip
16435 22:24:15.947621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip>
16436 22:24:15.977390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1280 RESULT=pass
16438 22:24:15.977829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1280 RESULT=pass>
16439 22:24:16.007497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip
16441 22:24:16.007951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip>
16442 22:24:16.039432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip
16444 22:24:16.039883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip>
16445 22:24:16.069920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip>
16446 22:24:16.070272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip
16448 22:24:16.100317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1296 RESULT=pass>
16449 22:24:16.100655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1296 RESULT=pass
16451 22:24:16.130506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip>
16452 22:24:16.130849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip
16454 22:24:16.160891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip>
16455 22:24:16.161254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip
16457 22:24:16.191380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip
16459 22:24:16.191882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip>
16460 22:24:16.221296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1312 RESULT=pass>
16461 22:24:16.221694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1312 RESULT=pass
16463 22:24:16.253030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip
16465 22:24:16.253625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip>
16466 22:24:16.283503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip
16468 22:24:16.283937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip>
16469 22:24:16.313583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip>
16470 22:24:16.313930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip
16472 22:24:16.344576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1328 RESULT=pass>
16473 22:24:16.344917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1328 RESULT=pass
16475 22:24:16.374780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip>
16476 22:24:16.375117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip
16478 22:24:16.404977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip>
16479 22:24:16.405318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip
16481 22:24:16.435964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip
16483 22:24:16.436492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip>
16484 22:24:16.465983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1344 RESULT=pass>
16485 22:24:16.466383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1344 RESULT=pass
16487 22:24:16.496382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip>
16488 22:24:16.496791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip
16490 22:24:16.527355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip
16492 22:24:16.527797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip>
16493 22:24:16.558134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip
16495 22:24:16.558578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip>
16496 22:24:16.588805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1360 RESULT=pass>
16497 22:24:16.589182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1360 RESULT=pass
16499 22:24:16.619778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip>
16500 22:24:16.620128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip
16502 22:24:16.650068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip>
16503 22:24:16.650410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip
16505 22:24:16.680597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip>
16506 22:24:16.681051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip
16508 22:24:16.710745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1376 RESULT=pass>
16509 22:24:16.711139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1376 RESULT=pass
16511 22:24:16.740805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip>
16512 22:24:16.741168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip
16514 22:24:16.770928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip>
16515 22:24:16.771280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip
16517 22:24:16.801365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip>
16518 22:24:16.801839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip
16520 22:24:16.832346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1392 RESULT=pass>
16521 22:24:16.832798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1392 RESULT=pass
16523 22:24:16.862881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip>
16524 22:24:16.863335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip
16526 22:24:16.893569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip
16528 22:24:16.894186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip>
16529 22:24:16.924142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip>
16530 22:24:16.924590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip
16532 22:24:16.954722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1408 RESULT=pass
16534 22:24:16.955300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1408 RESULT=pass>
16535 22:24:16.985706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip
16537 22:24:16.986268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip>
16538 22:24:17.017024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip>
16539 22:24:17.017419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip
16541 22:24:17.047755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip
16543 22:24:17.048317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip>
16544 22:24:17.078061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1424 RESULT=pass
16546 22:24:17.078491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1424 RESULT=pass>
16547 22:24:17.108559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip
16549 22:24:17.109097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip>
16550 22:24:17.139016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip>
16551 22:24:17.139447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip
16553 22:24:17.169625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip>
16554 22:24:17.170080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip
16556 22:24:17.200342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1440 RESULT=pass>
16557 22:24:17.200776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1440 RESULT=pass
16559 22:24:17.230448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip
16561 22:24:17.230974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip>
16562 22:24:17.261326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip>
16563 22:24:17.261779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip
16565 22:24:17.292267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip>
16566 22:24:17.292670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip
16568 22:24:17.323281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1456 RESULT=pass
16570 22:24:17.323725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1456 RESULT=pass>
16571 22:24:17.354798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip
16573 22:24:17.355234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip>
16574 22:24:17.385815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip>
16575 22:24:17.386223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip
16577 22:24:17.416456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip>
16578 22:24:17.416859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip
16580 22:24:17.446703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1472 RESULT=pass>
16581 22:24:17.447113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1472 RESULT=pass
16583 22:24:17.477206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip>
16584 22:24:17.477616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip
16586 22:24:17.508075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip>
16587 22:24:17.508482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip
16589 22:24:17.538812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip>
16590 22:24:17.539228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip
16592 22:24:17.570145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1488 RESULT=pass>
16593 22:24:17.570568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1488 RESULT=pass
16595 22:24:17.600920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip>
16596 22:24:17.601344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip
16598 22:24:17.631355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip
16600 22:24:17.631787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip>
16601 22:24:17.661721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip>
16602 22:24:17.662110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip
16604 22:24:17.692365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1504 RESULT=pass>
16605 22:24:17.692827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1504 RESULT=pass
16607 22:24:17.722739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip>
16608 22:24:17.723099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip
16610 22:24:17.753153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip>
16611 22:24:17.753507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip
16613 22:24:17.782976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip
16615 22:24:17.783406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip>
16616 22:24:17.813721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1520 RESULT=pass>
16617 22:24:17.814068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1520 RESULT=pass
16619 22:24:17.843771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip>
16620 22:24:17.844108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip
16622 22:24:17.874158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip>
16623 22:24:17.874528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip
16625 22:24:17.904079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip>
16626 22:24:17.904443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip
16628 22:24:17.933968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1536 RESULT=pass>
16629 22:24:17.934336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1536 RESULT=pass
16631 22:24:17.964170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip>
16632 22:24:17.964539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip
16634 22:24:17.994083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip>
16635 22:24:17.994450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip
16637 22:24:18.024478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip>
16638 22:24:18.024845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip
16640 22:24:18.054338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1552 RESULT=pass>
16641 22:24:18.054707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1552 RESULT=pass
16643 22:24:18.084453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip>
16644 22:24:18.084925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip
16646 22:24:18.115961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip
16648 22:24:18.116502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip>
16649 22:24:18.146584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip
16651 22:24:18.147117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip>
16652 22:24:18.176997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1568 RESULT=pass
16654 22:24:18.177520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1568 RESULT=pass>
16655 22:24:18.208262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip>
16656 22:24:18.208727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip
16658 22:24:18.238734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip>
16659 22:24:18.239191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip
16661 22:24:18.269455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip
16663 22:24:18.270019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip>
16664 22:24:18.308714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1584 RESULT=pass>
16665 22:24:18.309202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1584 RESULT=pass
16667 22:24:18.340056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip
16669 22:24:18.340524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip>
16670 22:24:18.370475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip
16672 22:24:18.370938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip>
16673 22:24:18.400758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip
16675 22:24:18.401220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip>
16676 22:24:18.430803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1600 RESULT=pass>
16677 22:24:18.431183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1600 RESULT=pass
16679 22:24:18.461393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip
16681 22:24:18.461852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip>
16682 22:24:18.492123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip>
16683 22:24:18.492594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip
16685 22:24:18.522353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip>
16686 22:24:18.522888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip
16688 22:24:18.553070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1616 RESULT=pass>
16689 22:24:18.553602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1616 RESULT=pass
16691 22:24:18.583851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip>
16692 22:24:18.584271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip
16694 22:24:18.614646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip
16696 22:24:18.615114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip>
16697 22:24:18.645225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip>
16698 22:24:18.645721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip
16700 22:24:18.676181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1632 RESULT=pass
16702 22:24:18.676716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1632 RESULT=pass>
16703 22:24:18.706557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip
16705 22:24:18.707207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip>
16706 22:24:18.737776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip>
16707 22:24:18.738213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip
16709 22:24:18.768634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip>
16710 22:24:18.769052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip
16712 22:24:18.800534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1648 RESULT=pass>
16713 22:24:18.800965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1648 RESULT=pass
16715 22:24:18.831459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip
16717 22:24:18.831915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip>
16718 22:24:18.862195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip>
16719 22:24:18.862755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip
16721 22:24:18.892509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip
16723 22:24:18.892955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip>
16724 22:24:18.922793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1664 RESULT=pass
16726 22:24:18.923258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1664 RESULT=pass>
16727 22:24:18.953191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip
16729 22:24:18.953860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip>
16730 22:24:18.986926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip>
16731 22:24:18.987429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip
16733 22:24:19.018526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip>
16734 22:24:19.018973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip
16736 22:24:19.049140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1680 RESULT=pass>
16737 22:24:19.049599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1680 RESULT=pass
16739 22:24:19.080606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip
16741 22:24:19.081184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip>
16742 22:24:19.111624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip
16744 22:24:19.112250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip>
16745 22:24:19.143016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip>
16746 22:24:19.143481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip
16748 22:24:19.173845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1696 RESULT=pass>
16749 22:24:19.174315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1696 RESULT=pass
16751 22:24:19.204622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip
16753 22:24:19.205059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip>
16754 22:24:19.236215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip
16756 22:24:19.236800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip>
16757 22:24:19.267263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip
16759 22:24:19.267808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip>
16760 22:24:19.298950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1712 RESULT=pass>
16761 22:24:19.299368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1712 RESULT=pass
16763 22:24:19.330134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip>
16764 22:24:19.330577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip
16766 22:24:19.360847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip
16768 22:24:19.361468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip>
16769 22:24:19.392507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip
16771 22:24:19.393136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip>
16772 22:24:19.422791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1728 RESULT=pass>
16773 22:24:19.423194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1728 RESULT=pass
16775 22:24:19.453684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip
16777 22:24:19.454264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip>
16778 22:24:19.484740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip>
16779 22:24:19.485188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip
16781 22:24:19.515449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip
16783 22:24:19.516017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip>
16784 22:24:19.549413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1744 RESULT=pass
16786 22:24:19.549871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1744 RESULT=pass>
16787 22:24:19.581913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip>
16788 22:24:19.582399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip
16790 22:24:19.614149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip>
16791 22:24:19.614624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip
16793 22:24:19.646240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip>
16794 22:24:19.646654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip
16796 22:24:19.677793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1760 RESULT=pass
16798 22:24:19.678241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1760 RESULT=pass>
16799 22:24:19.709121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip>
16800 22:24:19.709583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip
16802 22:24:19.740678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip>
16803 22:24:19.741133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip
16805 22:24:19.772116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip>
16806 22:24:19.772598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip
16808 22:24:19.804140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1776 RESULT=pass>
16809 22:24:19.804600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1776 RESULT=pass
16811 22:24:19.834529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip>
16812 22:24:19.834983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip
16814 22:24:19.865722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip>
16815 22:24:19.866172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip
16817 22:24:19.898133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip>
16818 22:24:19.898601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip
16820 22:24:19.929195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1792 RESULT=pass
16822 22:24:19.929829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1792 RESULT=pass>
16823 22:24:19.960362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip>
16824 22:24:19.960819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip
16826 22:24:19.991926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip
16828 22:24:19.992557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip>
16829 22:24:20.023187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip>
16830 22:24:20.023645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip
16832 22:24:20.054062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1808 RESULT=pass
16834 22:24:20.054605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1808 RESULT=pass>
16835 22:24:20.085276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip>
16836 22:24:20.085681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip
16838 22:24:20.116453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip>
16839 22:24:20.116927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip
16841 22:24:20.148453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip
16843 22:24:20.149002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip>
16844 22:24:20.178872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1824 RESULT=pass>
16845 22:24:20.179321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1824 RESULT=pass
16847 22:24:20.210230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip>
16848 22:24:20.210626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip
16850 22:24:20.241292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip>
16851 22:24:20.241762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip
16853 22:24:20.272291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip>
16854 22:24:20.272755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip
16856 22:24:20.307595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1840 RESULT=pass
16858 22:24:20.308166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1840 RESULT=pass>
16859 22:24:20.338830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip>
16860 22:24:20.339273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip
16862 22:24:20.369565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip>
16863 22:24:20.370114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip
16865 22:24:20.400457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip>
16866 22:24:20.400984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip
16868 22:24:20.430697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1856 RESULT=pass>
16869 22:24:20.431176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1856 RESULT=pass
16871 22:24:20.462242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip>
16872 22:24:20.462692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip
16874 22:24:20.493249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip
16876 22:24:20.493811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip>
16877 22:24:20.524552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip>
16878 22:24:20.525014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip
16880 22:24:20.556536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1872 RESULT=pass>
16881 22:24:20.557006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1872 RESULT=pass
16883 22:24:20.588260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip>
16884 22:24:20.588721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip
16886 22:24:20.619019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip>
16887 22:24:20.619474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip
16889 22:24:20.649907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip
16891 22:24:20.650525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip>
16892 22:24:20.680557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1888 RESULT=pass
16894 22:24:20.681091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1888 RESULT=pass>
16895 22:24:20.711677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip>
16896 22:24:20.712151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip
16898 22:24:20.742687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip>
16899 22:24:20.743131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip
16901 22:24:20.773694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip>
16902 22:24:20.774139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip
16904 22:24:20.805036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1904 RESULT=pass>
16905 22:24:20.805487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1904 RESULT=pass
16907 22:24:20.836651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip>
16908 22:24:20.837056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip
16910 22:24:20.867943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip>
16911 22:24:20.868381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip
16913 22:24:20.900385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip
16915 22:24:20.900932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip>
16916 22:24:20.933171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1920 RESULT=pass
16918 22:24:20.933734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1920 RESULT=pass>
16919 22:24:20.964859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip>
16920 22:24:20.965297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip
16922 22:24:20.997032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip>
16923 22:24:20.997463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip
16925 22:24:21.027835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip>
16926 22:24:21.028288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip
16928 22:24:21.058401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1936 RESULT=pass>
16929 22:24:21.058858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1936 RESULT=pass
16931 22:24:21.089456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip
16933 22:24:21.090080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip>
16934 22:24:21.123144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip
16936 22:24:21.123635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip>
16937 22:24:21.155774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip>
16938 22:24:21.156185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip
16940 22:24:21.186794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1952 RESULT=pass>
16941 22:24:21.187215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1952 RESULT=pass
16943 22:24:21.218049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip
16945 22:24:21.218698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip>
16946 22:24:21.249137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip>
16947 22:24:21.249582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip
16949 22:24:21.281250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip>
16950 22:24:21.281668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip
16952 22:24:21.315064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1968 RESULT=pass
16954 22:24:21.315627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1968 RESULT=pass>
16955 22:24:21.348665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip
16957 22:24:21.349237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip>
16958 22:24:21.381457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip
16960 22:24:21.382022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip>
16961 22:24:21.413223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip>
16962 22:24:21.413590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip
16964 22:24:21.444698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1984 RESULT=pass
16966 22:24:21.445268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1984 RESULT=pass>
16967 22:24:21.475446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip
16969 22:24:21.476011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip>
16970 22:24:21.506140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip>
16971 22:24:21.506585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip
16973 22:24:21.537201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip>
16974 22:24:21.537583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip
16976 22:24:21.570051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2000 RESULT=pass
16978 22:24:21.570531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2000 RESULT=pass>
16979 22:24:21.600698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip>
16980 22:24:21.601057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip
16982 22:24:21.630871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip>
16983 22:24:21.631225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip
16985 22:24:21.661638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip
16987 22:24:21.662207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip>
16988 22:24:21.692325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2016 RESULT=pass>
16989 22:24:21.692697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2016 RESULT=pass
16991 22:24:21.722347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip>
16992 22:24:21.722803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip
16994 22:24:21.753283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip>
16995 22:24:21.753630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip
16997 22:24:21.783789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip
16999 22:24:21.784217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip>
17000 22:24:21.814248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2032 RESULT=pass
17002 22:24:21.814682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2032 RESULT=pass>
17003 22:24:21.844538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip
17005 22:24:21.845070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip>
17006 22:24:21.874879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip>
17007 22:24:21.875262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip
17009 22:24:21.905098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip>
17010 22:24:21.905500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip
17012 22:24:21.935061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2048 RESULT=pass
17014 22:24:21.935581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2048 RESULT=pass>
17015 22:24:21.965210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip>
17016 22:24:21.965593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip
17018 22:24:21.998078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip>
17019 22:24:21.998508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip
17021 22:24:22.030094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip
17023 22:24:22.030871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip>
17024 22:24:22.062694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2064 RESULT=pass>
17025 22:24:22.063131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2064 RESULT=pass
17027 22:24:22.096470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip
17029 22:24:22.096918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip>
17030 22:24:22.129846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip>
17031 22:24:22.130292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip
17033 22:24:22.162814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip>
17034 22:24:22.163214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip
17036 22:24:22.194348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2080 RESULT=pass
17038 22:24:22.194789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2080 RESULT=pass>
17039 22:24:22.225937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip>
17040 22:24:22.226368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip
17042 22:24:22.256478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip>
17043 22:24:22.256803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip
17045 22:24:22.287174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip
17047 22:24:22.287589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip>
17048 22:24:22.318063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2096 RESULT=pass>
17049 22:24:22.318458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2096 RESULT=pass
17051 22:24:22.348362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip>
17052 22:24:22.348748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip
17054 22:24:22.378972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip>
17055 22:24:22.379355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip
17057 22:24:22.410085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip
17059 22:24:22.410545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip>
17060 22:24:22.440899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2112 RESULT=pass
17062 22:24:22.441428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2112 RESULT=pass>
17063 22:24:22.472239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip>
17064 22:24:22.472716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip
17066 22:24:22.503382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip
17068 22:24:22.503823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip>
17069 22:24:22.536052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip>
17070 22:24:22.536511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip
17072 22:24:22.568029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2128 RESULT=pass
17074 22:24:22.568576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2128 RESULT=pass>
17075 22:24:22.598937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip
17077 22:24:22.599402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip>
17078 22:24:22.629299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip>
17079 22:24:22.629658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip
17081 22:24:22.659758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip>
17082 22:24:22.660116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip
17084 22:24:22.690095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2144 RESULT=pass
17086 22:24:22.690592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2144 RESULT=pass>
17087 22:24:22.720389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip
17089 22:24:22.720840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip>
17090 22:24:22.750604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip>
17091 22:24:22.751046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip
17093 22:24:22.781093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip
17095 22:24:22.781664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip>
17096 22:24:22.811977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2160 RESULT=pass>
17097 22:24:22.812414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2160 RESULT=pass
17099 22:24:22.842222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip>
17100 22:24:22.842668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip
17102 22:24:22.872612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip
17104 22:24:22.873145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip>
17105 22:24:22.903097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip
17107 22:24:22.903580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip>
17108 22:24:22.933690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2176 RESULT=pass
17110 22:24:22.934316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2176 RESULT=pass>
17111 22:24:22.964511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip>
17112 22:24:22.964970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip
17114 22:24:22.996090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip
17116 22:24:22.996676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip>
17117 22:24:23.026669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip>
17118 22:24:23.027125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip
17120 22:24:23.058612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2192 RESULT=pass>
17121 22:24:23.059029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2192 RESULT=pass
17123 22:24:23.090542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip>
17124 22:24:23.090988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip
17126 22:24:23.122409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip
17128 22:24:23.122967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip>
17129 22:24:23.154884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip>
17130 22:24:23.155325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip
17132 22:24:23.185186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2208 RESULT=pass>
17133 22:24:23.185655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2208 RESULT=pass
17135 22:24:23.216361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip>
17136 22:24:23.216802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip
17138 22:24:23.246923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip
17140 22:24:23.247470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip>
17141 22:24:23.277273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip>
17142 22:24:23.277693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip
17144 22:24:23.308456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2224 RESULT=pass
17146 22:24:23.309030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2224 RESULT=pass>
17147 22:24:23.338779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip>
17148 22:24:23.339213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip
17150 22:24:23.369677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip
17152 22:24:23.370282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip>
17153 22:24:23.400861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip
17155 22:24:23.401675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip>
17156 22:24:23.434696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2240 RESULT=pass
17158 22:24:23.435320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2240 RESULT=pass>
17159 22:24:23.467853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip
17161 22:24:23.468411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip>
17162 22:24:23.501222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip>
17163 22:24:23.501633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip
17165 22:24:23.534697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip>
17166 22:24:23.535038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip
17168 22:24:23.568773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2256 RESULT=pass
17170 22:24:23.569135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2256 RESULT=pass>
17171 22:24:23.601417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip>
17172 22:24:23.601761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip
17174 22:24:23.634386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip
17176 22:24:23.634754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip>
17177 22:24:23.667856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip
17179 22:24:23.668481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip>
17180 22:24:23.701860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2272 RESULT=pass>
17181 22:24:23.702335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2272 RESULT=pass
17183 22:24:23.733210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip
17185 22:24:23.733712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip>
17186 22:24:23.763117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip>
17187 22:24:23.763461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip
17189 22:24:23.793267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip>
17190 22:24:23.793663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip
17192 22:24:23.824359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2288 RESULT=pass>
17193 22:24:23.824743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2288 RESULT=pass
17195 22:24:23.854833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip>
17196 22:24:23.855151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip
17198 22:24:23.885077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip>
17199 22:24:23.885410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip
17201 22:24:23.915109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip>
17202 22:24:23.915512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip
17204 22:24:23.945577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2304 RESULT=pass>
17205 22:24:23.945964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2304 RESULT=pass
17207 22:24:23.976146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip
17209 22:24:23.976532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip>
17210 22:24:24.006587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip
17212 22:24:24.006956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip>
17213 22:24:24.037530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip>
17214 22:24:24.038001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip
17216 22:24:24.068414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2320 RESULT=pass>
17217 22:24:24.068883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2320 RESULT=pass
17219 22:24:24.099276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip
17221 22:24:24.099846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip>
17222 22:24:24.130494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip
17224 22:24:24.131050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip>
17225 22:24:24.161874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip
17227 22:24:24.162426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip>
17228 22:24:24.192985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2336 RESULT=pass
17230 22:24:24.193565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2336 RESULT=pass>
17231 22:24:24.223868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip>
17232 22:24:24.224323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip
17234 22:24:24.254617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip>
17235 22:24:24.255085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip
17237 22:24:24.285261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip
17239 22:24:24.285817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip>
17240 22:24:24.316587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2352 RESULT=pass
17242 22:24:24.317141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2352 RESULT=pass>
17243 22:24:24.348633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip
17245 22:24:24.349191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip>
17246 22:24:24.383663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip
17248 22:24:24.384267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip>
17249 22:24:24.420776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip>
17250 22:24:24.421198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip
17252 22:24:24.455901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2368 RESULT=pass>
17253 22:24:24.456312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2368 RESULT=pass
17255 22:24:24.487428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip
17257 22:24:24.488029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip>
17258 22:24:24.518635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip>
17259 22:24:24.519090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip
17261 22:24:24.550060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip
17263 22:24:24.550612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip>
17264 22:24:24.581251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2384 RESULT=pass>
17265 22:24:24.581712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2384 RESULT=pass
17267 22:24:24.612394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip>
17268 22:24:24.612841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip
17270 22:24:24.643630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip
17272 22:24:24.644207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip>
17273 22:24:24.674621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip>
17274 22:24:24.675071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip
17276 22:24:24.704858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2400 RESULT=pass>
17277 22:24:24.705276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2400 RESULT=pass
17279 22:24:24.735987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip
17281 22:24:24.736611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip>
17282 22:24:24.766915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip>
17283 22:24:24.767391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip
17285 22:24:24.797441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip>
17286 22:24:24.797927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip
17288 22:24:24.829084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2416 RESULT=pass>
17289 22:24:24.829490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2416 RESULT=pass
17291 22:24:24.860612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip
17293 22:24:24.861248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip>
17294 22:24:24.892965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip
17296 22:24:24.893611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip>
17297 22:24:24.925963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip
17299 22:24:24.926421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip>
17300 22:24:24.958278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2432 RESULT=pass>
17301 22:24:24.958774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2432 RESULT=pass
17303 22:24:24.989990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip>
17304 22:24:24.990458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip
17306 22:24:25.022090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip
17308 22:24:25.022542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip>
17309 22:24:25.052942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip>
17310 22:24:25.053370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip
17312 22:24:25.085873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2448 RESULT=pass
17314 22:24:25.086324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2448 RESULT=pass>
17315 22:24:25.118559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip
17317 22:24:25.119019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip>
17318 22:24:25.152205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip
17320 22:24:25.152858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip>
17321 22:24:25.184570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip>
17322 22:24:25.185057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip
17324 22:24:25.216517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2464 RESULT=pass>
17325 22:24:25.217084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2464 RESULT=pass
17327 22:24:25.247973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip
17329 22:24:25.248704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip>
17330 22:24:25.278540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip>
17331 22:24:25.279018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip
17333 22:24:25.309621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip
17335 22:24:25.310223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip>
17336 22:24:25.341561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2480 RESULT=pass
17338 22:24:25.342240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2480 RESULT=pass>
17339 22:24:25.373087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip>
17340 22:24:25.373562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip
17342 22:24:25.404306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip
17344 22:24:25.404905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip>
17345 22:24:25.435061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip
17347 22:24:25.435615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip>
17348 22:24:25.466979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2496 RESULT=pass>
17349 22:24:25.467535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2496 RESULT=pass
17351 22:24:25.499180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip
17353 22:24:25.499751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip>
17354 22:24:25.530716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip>
17355 22:24:25.531203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip
17357 22:24:25.561893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip>
17358 22:24:25.562343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip
17360 22:24:25.593422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2512 RESULT=pass
17362 22:24:25.593879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2512 RESULT=pass>
17363 22:24:25.624647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip
17365 22:24:25.625275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip>
17366 22:24:25.655221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip>
17367 22:24:25.655662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip
17369 22:24:25.687688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip>
17370 22:24:25.688125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip
17372 22:24:25.720560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2528 RESULT=pass
17374 22:24:25.721117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2528 RESULT=pass>
17375 22:24:25.754291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip
17377 22:24:25.754904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip>
17378 22:24:25.785806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip>
17379 22:24:25.786163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip
17381 22:24:25.818259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip>
17382 22:24:25.818760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip
17384 22:24:25.850456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2544 RESULT=pass
17386 22:24:25.851011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2544 RESULT=pass>
17387 22:24:25.882570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip
17389 22:24:25.883012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip>
17390 22:24:25.914665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip>
17391 22:24:25.915076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip
17393 22:24:25.947166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip
17395 22:24:25.947810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip>
17396 22:24:25.980232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2560 RESULT=pass
17398 22:24:25.980799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2560 RESULT=pass>
17399 22:24:26.014375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip
17401 22:24:26.014827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip>
17402 22:24:26.046849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip
17404 22:24:26.047315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip>
17405 22:24:26.078374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip>
17406 22:24:26.078774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip
17408 22:24:26.109362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2576 RESULT=pass>
17409 22:24:26.109859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2576 RESULT=pass
17411 22:24:26.140768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip>
17412 22:24:26.141240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip
17414 22:24:26.172537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip>
17415 22:24:26.173005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip
17417 22:24:26.208435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip>
17418 22:24:26.208840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip
17420 22:24:26.242685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2592 RESULT=pass>
17421 22:24:26.243126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2592 RESULT=pass
17423 22:24:26.277689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip>
17424 22:24:26.278099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip
17426 22:24:26.311177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip>
17427 22:24:26.311725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip
17429 22:24:26.342870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip>
17430 22:24:26.343354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip
17432 22:24:26.375371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2608 RESULT=pass
17434 22:24:26.375849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2608 RESULT=pass>
17435 22:24:26.409054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip
17437 22:24:26.409422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip>
17438 22:24:26.444012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip
17440 22:24:26.444583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip>
17441 22:24:26.475459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip
17443 22:24:26.475955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip>
17444 22:24:26.507103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2624 RESULT=pass>
17445 22:24:26.507468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2624 RESULT=pass
17447 22:24:26.538104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip>
17448 22:24:26.538481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip
17450 22:24:26.572084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip
17452 22:24:26.572437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip>
17453 22:24:26.605446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip>
17454 22:24:26.605813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip
17456 22:24:26.639253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2640 RESULT=pass
17458 22:24:26.639787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2640 RESULT=pass>
17459 22:24:26.671985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip
17461 22:24:26.672571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip>
17462 22:24:26.703066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip>
17463 22:24:26.703450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip
17465 22:24:26.734945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip>
17466 22:24:26.735487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip
17468 22:24:26.768637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2656 RESULT=pass>
17469 22:24:26.769121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2656 RESULT=pass
17471 22:24:26.802869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip>
17472 22:24:26.803249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip
17474 22:24:26.834852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip>
17475 22:24:26.835201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip
17477 22:24:26.866613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip>
17478 22:24:26.866998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip
17480 22:24:26.898810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2672 RESULT=pass>
17481 22:24:26.899230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2672 RESULT=pass
17483 22:24:26.932214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip
17485 22:24:26.932785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip>
17486 22:24:26.964359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip
17488 22:24:26.965090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip>
17489 22:24:27.002629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip>
17490 22:24:27.003112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip
17492 22:24:27.044602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2688 RESULT=pass>
17493 22:24:27.045077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2688 RESULT=pass
17495 22:24:27.076746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip
17497 22:24:27.077289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip>
17498 22:24:27.125933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip>
17499 22:24:27.126384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip
17501 22:24:27.157610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip
17503 22:24:27.158165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip>
17504 22:24:27.188458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2704 RESULT=pass>
17505 22:24:27.188837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2704 RESULT=pass
17507 22:24:27.219133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip
17509 22:24:27.219687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip>
17510 22:24:27.258525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip>
17511 22:24:27.259039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip
17513 22:24:27.303116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip
17515 22:24:27.303687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip>
17516 22:24:27.335044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2720 RESULT=pass>
17517 22:24:27.335390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2720 RESULT=pass
17519 22:24:27.367077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip>
17520 22:24:27.367447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip
17522 22:24:27.400164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip
17524 22:24:27.400593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip>
17525 22:24:27.433007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip>
17526 22:24:27.433493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip
17528 22:24:27.466211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2736 RESULT=pass>
17529 22:24:27.466700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2736 RESULT=pass
17531 22:24:27.497744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip>
17532 22:24:27.498224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip
17534 22:24:27.529846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip>
17535 22:24:27.530326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip
17537 22:24:27.561165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip>
17538 22:24:27.561526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip
17540 22:24:27.594151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2752 RESULT=pass
17542 22:24:27.594634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2752 RESULT=pass>
17543 22:24:27.625190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip>
17544 22:24:27.625630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip
17546 22:24:27.656106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip>
17547 22:24:27.656473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip
17549 22:24:27.686787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip>
17550 22:24:27.687268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip
17552 22:24:27.721001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2768 RESULT=pass
17554 22:24:27.721717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2768 RESULT=pass>
17555 22:24:27.753801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip
17557 22:24:27.754406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip>
17558 22:24:27.785038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip>
17559 22:24:27.785499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip
17561 22:24:27.817836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip>
17562 22:24:27.818300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip
17564 22:24:27.848443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2784 RESULT=pass
17566 22:24:27.849006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2784 RESULT=pass>
17567 22:24:27.879821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip
17569 22:24:27.880383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip>
17570 22:24:27.910762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip
17572 22:24:27.911375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip>
17573 22:24:27.942316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip>
17574 22:24:27.942729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip
17576 22:24:27.974174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2800 RESULT=pass
17578 22:24:27.974784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2800 RESULT=pass>
17579 22:24:28.005317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip>
17580 22:24:28.005688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip
17582 22:24:28.036677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip>
17583 22:24:28.037134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip
17585 22:24:28.067940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip
17587 22:24:28.068451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip>
17588 22:24:28.098677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2816 RESULT=pass>
17589 22:24:28.099079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2816 RESULT=pass
17591 22:24:28.129836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip>
17592 22:24:28.130249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip
17594 22:24:28.162301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip>
17595 22:24:28.162708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip
17597 22:24:28.194006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip
17599 22:24:28.194591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip>
17600 22:24:28.225607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2832 RESULT=pass>
17601 22:24:28.226118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2832 RESULT=pass
17603 22:24:28.258391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip
17605 22:24:28.259047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip>
17606 22:24:28.289731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip>
17607 22:24:28.290214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip
17609 22:24:28.325202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip
17611 22:24:28.325780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip>
17612 22:24:28.357404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2848 RESULT=pass>
17613 22:24:28.357759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2848 RESULT=pass
17615 22:24:28.386959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip>
17616 22:24:28.387301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip
17618 22:24:28.416368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip>
17619 22:24:28.416714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip
17621 22:24:28.445575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip>
17622 22:24:28.445929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip
17624 22:24:28.475428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2864 RESULT=pass
17626 22:24:28.475847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2864 RESULT=pass>
17627 22:24:28.505182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip>
17628 22:24:28.505525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip
17630 22:24:28.534721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip>
17631 22:24:28.535086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip
17633 22:24:28.564371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip>
17634 22:24:28.564719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip
17636 22:24:28.593927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2880 RESULT=pass
17638 22:24:28.594345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2880 RESULT=pass>
17639 22:24:28.623817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip>
17640 22:24:28.624157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip
17642 22:24:28.656584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip
17644 22:24:28.657022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip>
17645 22:24:28.686613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip
17647 22:24:28.687075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip>
17648 22:24:28.716939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2896 RESULT=pass
17650 22:24:28.717410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2896 RESULT=pass>
17651 22:24:28.746942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip>
17652 22:24:28.747328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip
17654 22:24:28.777453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip>
17655 22:24:28.777821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip
17657 22:24:28.808155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip>
17658 22:24:28.808617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip
17660 22:24:28.838073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2912 RESULT=pass>
17661 22:24:28.838494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2912 RESULT=pass
17663 22:24:28.868502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip
17665 22:24:28.868926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip>
17666 22:24:28.898514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip>
17667 22:24:28.898886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip
17669 22:24:28.928260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip>
17670 22:24:28.928601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip
17672 22:24:28.958250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2928 RESULT=pass>
17673 22:24:28.958591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2928 RESULT=pass
17675 22:24:28.988273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip>
17676 22:24:28.988616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip
17678 22:24:29.018037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip>
17679 22:24:29.018422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip
17681 22:24:29.047867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip>
17682 22:24:29.048210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip
17684 22:24:29.077356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2944 RESULT=pass
17686 22:24:29.077877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2944 RESULT=pass>
17687 22:24:29.107942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip>
17688 22:24:29.108303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip
17690 22:24:29.138046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip>
17691 22:24:29.138381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip
17693 22:24:29.168028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip>
17694 22:24:29.168373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip
17696 22:24:29.197559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2960 RESULT=pass>
17697 22:24:29.197929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2960 RESULT=pass
17699 22:24:29.227832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip>
17700 22:24:29.228185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip
17702 22:24:29.257264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip>
17703 22:24:29.257617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip
17705 22:24:29.289757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip>
17706 22:24:29.290105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip
17708 22:24:29.322209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2976 RESULT=pass>
17709 22:24:29.322585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2976 RESULT=pass
17711 22:24:29.357814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip>
17712 22:24:29.358172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip
17714 22:24:29.392394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip
17716 22:24:29.392823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip>
17717 22:24:29.423816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip>
17718 22:24:29.424162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip
17720 22:24:29.455385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2992 RESULT=pass
17722 22:24:29.455965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2992 RESULT=pass>
17723 22:24:29.486790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip>
17724 22:24:29.487266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip
17726 22:24:29.518009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip>
17727 22:24:29.518488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip
17729 22:24:29.552619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip>
17730 22:24:29.553094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip
17732 22:24:29.585143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3008 RESULT=pass
17734 22:24:29.585900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3008 RESULT=pass>
17735 22:24:29.619426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip
17737 22:24:29.620034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip>
17738 22:24:29.652602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip
17740 22:24:29.653161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip>
17741 22:24:29.684246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip>
17742 22:24:29.684714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip
17744 22:24:29.717231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3024 RESULT=pass
17746 22:24:29.717866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3024 RESULT=pass>
17747 22:24:29.751571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip>
17748 22:24:29.751972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip
17750 22:24:29.781891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip
17752 22:24:29.782366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip>
17753 22:24:29.812340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip>
17754 22:24:29.812685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip
17756 22:24:29.844334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3040 RESULT=pass
17758 22:24:29.844757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3040 RESULT=pass>
17759 22:24:29.878026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip>
17760 22:24:29.878470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip
17762 22:24:29.909209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip
17764 22:24:29.909750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip>
17765 22:24:29.940386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip
17767 22:24:29.940920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip>
17768 22:24:29.971599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3056 RESULT=pass>
17769 22:24:29.972051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3056 RESULT=pass
17771 22:24:30.002365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip
17773 22:24:30.003011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip>
17774 22:24:30.045794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip
17776 22:24:30.046249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip>
17777 22:24:30.078444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip>
17778 22:24:30.078911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip
17780 22:24:30.110750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3072 RESULT=pass>
17781 22:24:30.111101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3072 RESULT=pass
17783 22:24:30.143023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip>
17784 22:24:30.143479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip
17786 22:24:30.175429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip
17788 22:24:30.175892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip>
17789 22:24:30.207117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip
17791 22:24:30.207569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip>
17792 22:24:30.239007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3088 RESULT=pass>
17793 22:24:30.239445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3088 RESULT=pass
17795 22:24:30.271919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip
17797 22:24:30.272371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip>
17798 22:24:30.303163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip
17800 22:24:30.303613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip>
17801 22:24:30.337363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip>
17802 22:24:30.337755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip
17804 22:24:30.368588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3104 RESULT=pass>
17805 22:24:30.369075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3104 RESULT=pass
17807 22:24:30.400235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip>
17808 22:24:30.400733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip
17810 22:24:30.432359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip
17812 22:24:30.432746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip>
17813 22:24:30.465492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip>
17814 22:24:30.465924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip
17816 22:24:30.500747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3120 RESULT=pass>
17817 22:24:30.501232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3120 RESULT=pass
17819 22:24:30.532903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip
17821 22:24:30.533486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip>
17822 22:24:30.565582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip>
17823 22:24:30.566002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip
17825 22:24:30.597811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip
17827 22:24:30.598264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip>
17828 22:24:30.629721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3136 RESULT=pass>
17829 22:24:30.630196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3136 RESULT=pass
17831 22:24:30.662840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip>
17832 22:24:30.663292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip
17834 22:24:30.694055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip
17836 22:24:30.694608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip>
17837 22:24:30.727596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip
17839 22:24:30.728319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip>
17840 22:24:30.762098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3152 RESULT=pass>
17841 22:24:30.762507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3152 RESULT=pass
17843 22:24:30.793620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip>
17844 22:24:30.794021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip
17846 22:24:30.825053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip>
17847 22:24:30.825433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip
17849 22:24:30.856327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip>
17850 22:24:30.856768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip
17852 22:24:30.886151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3168 RESULT=pass
17854 22:24:30.886772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3168 RESULT=pass>
17855 22:24:30.916539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip>
17856 22:24:30.916999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip
17858 22:24:30.947206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip
17860 22:24:30.947955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip>
17861 22:24:30.980089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip>
17862 22:24:30.980537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip
17864 22:24:31.012370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3184 RESULT=pass
17866 22:24:31.012806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3184 RESULT=pass>
17867 22:24:31.045065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip>
17868 22:24:31.045456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip
17870 22:24:31.079083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip
17872 22:24:31.079548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip>
17873 22:24:31.109982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip>
17874 22:24:31.110372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip
17876 22:24:31.140062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3200 RESULT=pass>
17877 22:24:31.140458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3200 RESULT=pass
17879 22:24:31.170401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip>
17880 22:24:31.170836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip
17882 22:24:31.201430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip>
17883 22:24:31.201899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip
17885 22:24:31.231976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip>
17886 22:24:31.232409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip
17888 22:24:31.261859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3216 RESULT=pass>
17889 22:24:31.262309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3216 RESULT=pass
17891 22:24:31.292485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip>
17892 22:24:31.292950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip
17894 22:24:31.323045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip
17896 22:24:31.323499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip>
17897 22:24:31.353605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip>
17898 22:24:31.354086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip
17900 22:24:31.384186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3232 RESULT=pass>
17901 22:24:31.384658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3232 RESULT=pass
17903 22:24:31.416148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip
17905 22:24:31.416719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip>
17906 22:24:31.446423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip>
17907 22:24:31.446833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip
17909 22:24:31.476854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip>
17910 22:24:31.477305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip
17912 22:24:31.508092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3248 RESULT=pass
17914 22:24:31.508640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3248 RESULT=pass>
17915 22:24:31.538319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip>
17916 22:24:31.538772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip
17918 22:24:31.568701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip>
17919 22:24:31.569110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip
17921 22:24:31.599585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip
17923 22:24:31.600195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip>
17924 22:24:31.629999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3264 RESULT=pass
17926 22:24:31.630611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3264 RESULT=pass>
17927 22:24:31.660444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip
17929 22:24:31.661014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip>
17930 22:24:31.690506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip>
17931 22:24:31.690909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip
17933 22:24:31.721616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip
17935 22:24:31.722175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip>
17936 22:24:31.756467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3280 RESULT=pass>
17937 22:24:31.756845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3280 RESULT=pass
17939 22:24:31.788125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip>
17940 22:24:31.788564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip
17942 22:24:31.821186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip>
17943 22:24:31.821494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip
17945 22:24:31.853875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip>
17946 22:24:31.854220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip
17948 22:24:31.885077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3296 RESULT=pass
17950 22:24:31.885670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3296 RESULT=pass>
17951 22:24:31.917457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip>
17952 22:24:31.918008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip
17954 22:24:31.950551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip>
17955 22:24:31.951043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip
17957 22:24:31.984132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip>
17958 22:24:31.984551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip
17960 22:24:32.019194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3312 RESULT=pass>
17961 22:24:32.019664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3312 RESULT=pass
17963 22:24:32.050532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip>
17964 22:24:32.050997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip
17966 22:24:32.082295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip
17968 22:24:32.082853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip>
17969 22:24:32.114278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip>
17970 22:24:32.114650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip
17972 22:24:32.145176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3328 RESULT=pass>
17973 22:24:32.145625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3328 RESULT=pass
17975 22:24:32.176542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip>
17976 22:24:32.176991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip
17978 22:24:32.208490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip>
17979 22:24:32.208856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip
17981 22:24:32.241241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip>
17982 22:24:32.241616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip
17984 22:24:32.272896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3344 RESULT=pass
17986 22:24:32.273159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3344 RESULT=pass>
17987 22:24:32.308699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip>
17988 22:24:32.309112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip
17990 22:24:32.343028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip
17992 22:24:32.343682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip>
17993 22:24:32.376369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip>
17994 22:24:32.376720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip
17996 22:24:32.407852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3360 RESULT=pass>
17997 22:24:32.408213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3360 RESULT=pass
17999 22:24:32.437966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip>
18000 22:24:32.438398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip
18002 22:24:32.471059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip>
18003 22:24:32.471529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip
18005 22:24:32.504011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip>
18006 22:24:32.504416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip
18008 22:24:32.535909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3376 RESULT=pass>
18009 22:24:32.536369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3376 RESULT=pass
18011 22:24:32.568309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip>
18012 22:24:32.568760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip
18014 22:24:32.600028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip>
18015 22:24:32.600496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip
18017 22:24:32.632767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip>
18018 22:24:32.633224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip
18020 22:24:32.664212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3392 RESULT=pass>
18021 22:24:32.664659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3392 RESULT=pass
18023 22:24:32.694637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip>
18024 22:24:32.695094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip
18026 22:24:32.726266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip>
18027 22:24:32.726783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip
18029 22:24:32.758942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip
18031 22:24:32.759669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip>
18032 22:24:32.790767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3408 RESULT=pass>
18033 22:24:32.791298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3408 RESULT=pass
18035 22:24:32.822498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip
18037 22:24:32.822955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip>
18038 22:24:32.853455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip>
18039 22:24:32.853871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip
18041 22:24:32.884103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip>
18042 22:24:32.884568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip
18044 22:24:32.914441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3424 RESULT=pass>
18045 22:24:32.914898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3424 RESULT=pass
18047 22:24:32.945250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip>
18048 22:24:32.945700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip
18050 22:24:32.976121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip>
18051 22:24:32.976492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip
18053 22:24:33.006561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip
18055 22:24:33.007119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip>
18056 22:24:33.037719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3440 RESULT=pass
18058 22:24:33.038258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3440 RESULT=pass>
18059 22:24:33.068443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip
18061 22:24:33.068987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip>
18062 22:24:33.099436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip
18064 22:24:33.100021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip>
18065 22:24:33.130327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip
18067 22:24:33.130760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip>
18068 22:24:33.160655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3456 RESULT=pass
18070 22:24:33.161195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3456 RESULT=pass>
18071 22:24:33.191165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip
18073 22:24:33.191704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip>
18074 22:24:33.222191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip>
18075 22:24:33.222629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip
18077 22:24:33.252448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip
18079 22:24:33.252968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip>
18080 22:24:33.282724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3472 RESULT=pass>
18081 22:24:33.283157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3472 RESULT=pass
18083 22:24:33.313639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip>
18084 22:24:33.314093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip
18086 22:24:33.344520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip>
18087 22:24:33.344972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip
18089 22:24:33.374471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip>
18090 22:24:33.374827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip
18092 22:24:33.404629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3488 RESULT=pass
18094 22:24:33.405083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3488 RESULT=pass>
18095 22:24:33.434876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip>
18096 22:24:33.435294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip
18098 22:24:33.465588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip>
18099 22:24:33.465991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip
18101 22:24:33.496311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip>
18102 22:24:33.496770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip
18104 22:24:33.527946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3504 RESULT=pass>
18105 22:24:33.528432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3504 RESULT=pass
18107 22:24:33.560641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip
18109 22:24:33.561245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip>
18110 22:24:33.594545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip>
18111 22:24:33.594986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip
18113 22:24:33.626106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip
18115 22:24:33.626740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip>
18116 22:24:33.657174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3520 RESULT=pass>
18117 22:24:33.657666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3520 RESULT=pass
18119 22:24:33.688037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip>
18120 22:24:33.688501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip
18122 22:24:33.718678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip>
18123 22:24:33.719079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip
18125 22:24:33.750029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip>
18126 22:24:33.750497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip
18128 22:24:33.782645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3536 RESULT=pass>
18129 22:24:33.783164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3536 RESULT=pass
18131 22:24:33.815129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip>
18132 22:24:33.815588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip
18134 22:24:33.846650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip>
18135 22:24:33.847121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip
18137 22:24:33.877627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip>
18138 22:24:33.878024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip
18140 22:24:33.908465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3552 RESULT=pass
18142 22:24:33.909004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3552 RESULT=pass>
18143 22:24:33.938961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip>
18144 22:24:33.939406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip
18146 22:24:33.970002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip>
18147 22:24:33.970443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip
18149 22:24:34.000652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip>
18150 22:24:34.001111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip
18152 22:24:34.032735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3568 RESULT=pass>
18153 22:24:34.033231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3568 RESULT=pass
18155 22:24:34.063933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip>
18156 22:24:34.064347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip
18158 22:24:34.094912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip>
18159 22:24:34.095432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip
18161 22:24:34.126333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip>
18162 22:24:34.126736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip
18164 22:24:34.157393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3584 RESULT=pass
18166 22:24:34.157846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3584 RESULT=pass>
18167 22:24:34.188419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip>
18168 22:24:34.188871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip
18170 22:24:34.220537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip>
18171 22:24:34.220914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip
18173 22:24:34.252019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip>
18174 22:24:34.252559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip
18176 22:24:34.283817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3600 RESULT=pass
18178 22:24:34.284362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3600 RESULT=pass>
18179 22:24:34.314745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip>
18180 22:24:34.315265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip
18182 22:24:34.346982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip>
18183 22:24:34.347336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip
18185 22:24:34.378507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip>
18186 22:24:34.378956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip
18188 22:24:34.409738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3616 RESULT=pass
18190 22:24:34.410450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3616 RESULT=pass>
18191 22:24:34.441822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip
18193 22:24:34.442439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip>
18194 22:24:34.474330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip
18196 22:24:34.474882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip>
18197 22:24:34.505980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip>
18198 22:24:34.506427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip
18200 22:24:34.537187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3632 RESULT=pass
18202 22:24:34.537763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3632 RESULT=pass>
18203 22:24:34.577236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip>
18204 22:24:34.577704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip
18206 22:24:34.617570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip>
18207 22:24:34.618039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip
18209 22:24:34.650940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip>
18210 22:24:34.651497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip
18212 22:24:34.685560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3648 RESULT=pass
18214 22:24:34.686020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3648 RESULT=pass>
18215 22:24:34.721095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip>
18216 22:24:34.721514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip
18218 22:24:34.755505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip
18220 22:24:34.756172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip>
18221 22:24:34.790758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip>
18222 22:24:34.791296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip
18224 22:24:34.837710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3664 RESULT=pass>
18225 22:24:34.838188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3664 RESULT=pass
18227 22:24:34.879013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip>
18228 22:24:34.879419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip
18230 22:24:34.919176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip>
18231 22:24:34.919591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip
18233 22:24:34.951805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip
18235 22:24:34.952274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip>
18236 22:24:34.982966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3680 RESULT=pass>
18237 22:24:34.983379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3680 RESULT=pass
18239 22:24:35.019412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip
18241 22:24:35.019884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip>
18242 22:24:35.052120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip>
18243 22:24:35.052569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip
18245 22:24:35.084422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip
18247 22:24:35.084870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip>
18248 22:24:35.117024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3696 RESULT=pass>
18249 22:24:35.117460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3696 RESULT=pass
18251 22:24:35.148562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip>
18252 22:24:35.149023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip
18254 22:24:35.179762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip>
18255 22:24:35.180149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip
18257 22:24:35.211471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip
18259 22:24:35.212036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip>
18260 22:24:35.243065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3712 RESULT=pass
18262 22:24:35.243647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3712 RESULT=pass>
18263 22:24:35.274749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip>
18264 22:24:35.275208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip
18266 22:24:35.306766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip
18268 22:24:35.307413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip>
18269 22:24:35.338062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip>
18270 22:24:35.338528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip
18272 22:24:35.380026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3728 RESULT=pass>
18273 22:24:35.380493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3728 RESULT=pass
18275 22:24:35.413522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip
18277 22:24:35.414094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip>
18278 22:24:35.445168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip
18280 22:24:35.445739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip>
18281 22:24:35.476910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip>
18282 22:24:35.477358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip
18284 22:24:35.508742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3744 RESULT=pass
18286 22:24:35.509298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3744 RESULT=pass>
18287 22:24:35.540605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip
18289 22:24:35.541148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip>
18290 22:24:35.572258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip>
18291 22:24:35.572689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip
18293 22:24:35.604143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip
18295 22:24:35.604678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip>
18296 22:24:35.636029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3760 RESULT=pass>
18297 22:24:35.636432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3760 RESULT=pass
18299 22:24:35.667056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip>
18300 22:24:35.667511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip
18302 22:24:35.698843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip>
18303 22:24:35.699302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip
18305 22:24:35.730734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip>
18306 22:24:35.731131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip
18308 22:24:35.761595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3776 RESULT=pass
18310 22:24:35.762040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3776 RESULT=pass>
18311 22:24:35.792994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip>
18312 22:24:35.793382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip
18314 22:24:35.825142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip
18316 22:24:35.825726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip>
18317 22:24:35.856595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip>
18318 22:24:35.856946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip
18320 22:24:35.891881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3792 RESULT=pass
18322 22:24:35.892226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3792 RESULT=pass>
18323 22:24:35.922852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip>
18324 22:24:35.923328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip
18326 22:24:35.953820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip>
18327 22:24:35.954261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip
18329 22:24:35.984465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip>
18330 22:24:35.984905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip
18332 22:24:36.015988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3808 RESULT=pass
18334 22:24:36.016534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3808 RESULT=pass>
18335 22:24:36.046568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip>
18336 22:24:36.047009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip
18338 22:24:36.077174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip>
18339 22:24:36.077605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip
18341 22:24:36.108488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip
18343 22:24:36.109016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip>
18344 22:24:36.139974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3824 RESULT=pass
18346 22:24:36.140424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3824 RESULT=pass>
18347 22:24:36.171080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip>
18348 22:24:36.171457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip
18350 22:24:36.201822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip>
18351 22:24:36.202173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip
18353 22:24:36.232604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip
18355 22:24:36.232995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip>
18356 22:24:36.263946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3840 RESULT=pass
18358 22:24:36.264336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3840 RESULT=pass>
18359 22:24:36.294810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip>
18360 22:24:36.295158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip
18362 22:24:36.326181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip>
18363 22:24:36.326528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip
18365 22:24:36.356882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip>
18366 22:24:36.357221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip
18368 22:24:36.387358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3856 RESULT=pass
18370 22:24:36.387830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3856 RESULT=pass>
18371 22:24:36.418969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip
18373 22:24:36.419432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip>
18374 22:24:36.450088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip>
18375 22:24:36.450536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip
18377 22:24:36.481620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip>
18378 22:24:36.482081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip
18380 22:24:36.513313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3872 RESULT=pass
18382 22:24:36.513785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3872 RESULT=pass>
18383 22:24:36.544480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip>
18384 22:24:36.544821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip
18386 22:24:36.575248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip>
18387 22:24:36.575589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip
18389 22:24:36.605971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip>
18390 22:24:36.606323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip
18392 22:24:36.637536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3888 RESULT=pass>
18393 22:24:36.637901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3888 RESULT=pass
18395 22:24:36.668187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip>
18396 22:24:36.668525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip
18398 22:24:36.698891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip>
18399 22:24:36.699230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip
18401 22:24:36.729447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip>
18402 22:24:36.729794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip
18404 22:24:36.760239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3904 RESULT=pass>
18405 22:24:36.760576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3904 RESULT=pass
18407 22:24:36.790794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip>
18408 22:24:36.791164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip
18410 22:24:36.821479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip>
18411 22:24:36.821845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip
18413 22:24:36.852619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip>
18414 22:24:36.852975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip
18416 22:24:36.883817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3920 RESULT=pass>
18417 22:24:36.884173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3920 RESULT=pass
18419 22:24:36.914696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip>
18420 22:24:36.915048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip
18422 22:24:36.945692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip
18424 22:24:36.946137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip>
18425 22:24:36.976739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip
18427 22:24:36.977178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip>
18428 22:24:37.007436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3936 RESULT=pass
18430 22:24:37.007872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3936 RESULT=pass>
18431 22:24:37.038178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip>
18432 22:24:37.038533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip
18434 22:24:37.078251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip
18436 22:24:37.078715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip>
18437 22:24:37.113273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip>
18438 22:24:37.113674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip
18440 22:24:37.143698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3952 RESULT=pass>
18441 22:24:37.144058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3952 RESULT=pass
18443 22:24:37.174163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip>
18444 22:24:37.174553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip
18446 22:24:37.206035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip>
18447 22:24:37.206469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip
18449 22:24:37.237898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip>
18450 22:24:37.238300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip
18452 22:24:37.269233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3968 RESULT=pass>
18453 22:24:37.269701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3968 RESULT=pass
18455 22:24:37.300436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip>
18456 22:24:37.300917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip
18458 22:24:37.332720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip>
18459 22:24:37.333213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip
18461 22:24:37.364564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip
18463 22:24:37.365113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip>
18464 22:24:37.395834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3984 RESULT=pass>
18465 22:24:37.396183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3984 RESULT=pass
18467 22:24:37.426950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip
18469 22:24:37.427353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip>
18470 22:24:37.458015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip>
18471 22:24:37.458325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip
18473 22:24:37.489362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip>
18474 22:24:37.489680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip
18476 22:24:37.520518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4000 RESULT=pass>
18477 22:24:37.520996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4000 RESULT=pass
18479 22:24:37.552379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip>
18480 22:24:37.552787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip
18482 22:24:37.584214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip>
18483 22:24:37.584644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip
18485 22:24:37.616018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip
18487 22:24:37.616618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip>
18488 22:24:37.647692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4016 RESULT=pass>
18489 22:24:37.648167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4016 RESULT=pass
18491 22:24:37.679246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip
18493 22:24:37.679707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip>
18494 22:24:37.710370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip>
18495 22:24:37.710830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip
18497 22:24:37.741111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip>
18498 22:24:37.741592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip
18500 22:24:37.772279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4032 RESULT=pass>
18501 22:24:37.772740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4032 RESULT=pass
18503 22:24:37.803058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip>
18504 22:24:37.803515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip
18506 22:24:37.834078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip>
18507 22:24:37.834542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip
18509 22:24:37.864751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip>
18510 22:24:37.865217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip
18512 22:24:37.896793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4048 RESULT=pass
18514 22:24:37.897347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4048 RESULT=pass>
18515 22:24:37.927822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip>
18516 22:24:37.928264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip
18518 22:24:37.958504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip>
18519 22:24:37.958963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip
18521 22:24:37.989692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip
18523 22:24:37.990238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip>
18524 22:24:38.020719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4064 RESULT=pass
18526 22:24:38.021275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4064 RESULT=pass>
18527 22:24:38.051442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip
18529 22:24:38.052044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip>
18530 22:24:38.083247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip
18532 22:24:38.083906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip>
18533 22:24:38.114904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip>
18534 22:24:38.115371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip
18536 22:24:38.162011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4080 RESULT=pass
18538 22:24:38.162739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4080 RESULT=pass>
18539 22:24:38.194780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip>
18540 22:24:38.195232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip
18542 22:24:38.225804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip>
18543 22:24:38.226253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip
18545 22:24:38.257222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip>
18546 22:24:38.257683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip
18548 22:24:38.288432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4096 RESULT=pass>
18549 22:24:38.288874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4096 RESULT=pass
18551 22:24:38.319544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip
18553 22:24:38.320084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip>
18554 22:24:38.351261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip>
18555 22:24:38.351707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip
18557 22:24:38.382374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip>
18558 22:24:38.382837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip
18560 22:24:38.412964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4112 RESULT=pass>
18561 22:24:38.413416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4112 RESULT=pass
18563 22:24:38.444029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip>
18564 22:24:38.444472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip
18566 22:24:38.474588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip>
18567 22:24:38.475041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip
18569 22:24:38.505689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip
18571 22:24:38.506233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip>
18572 22:24:38.536464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4128 RESULT=pass>
18573 22:24:38.536922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4128 RESULT=pass
18575 22:24:38.567481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip
18577 22:24:38.568025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip>
18578 22:24:38.598149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip>
18579 22:24:38.598589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip
18581 22:24:38.629000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip>
18582 22:24:38.629443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip
18584 22:24:38.660770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4144 RESULT=pass
18586 22:24:38.661308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4144 RESULT=pass>
18587 22:24:38.692163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip>
18588 22:24:38.692575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip
18590 22:24:38.723982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip>
18591 22:24:38.724387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip
18593 22:24:38.754686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip>
18594 22:24:38.755085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip
18596 22:24:38.785311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4160 RESULT=pass
18598 22:24:38.785764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4160 RESULT=pass>
18599 22:24:38.816484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip
18601 22:24:38.817058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip>
18602 22:24:38.847076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip>
18603 22:24:38.847519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip
18605 22:24:38.877725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip
18607 22:24:38.878273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip>
18608 22:24:38.908970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4176 RESULT=pass
18610 22:24:38.909517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4176 RESULT=pass>
18611 22:24:38.940390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip>
18612 22:24:38.940854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip
18614 22:24:38.971599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip
18616 22:24:38.972195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip>
18617 22:24:39.002998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip>
18618 22:24:39.003448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip
18620 22:24:39.034711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4192 RESULT=pass>
18621 22:24:39.035181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4192 RESULT=pass
18623 22:24:39.065879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip>
18624 22:24:39.066286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip
18626 22:24:39.096926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip
18628 22:24:39.097361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip>
18629 22:24:39.128471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip>
18630 22:24:39.128924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip
18632 22:24:39.159863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4208 RESULT=pass>
18633 22:24:39.160326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4208 RESULT=pass
18635 22:24:39.191491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip
18637 22:24:39.192029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip>
18638 22:24:39.222168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip>
18639 22:24:39.222626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip
18641 22:24:39.253074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip>
18642 22:24:39.253523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip
18644 22:24:39.284148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4224 RESULT=pass>
18645 22:24:39.284593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4224 RESULT=pass
18647 22:24:39.315076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip>
18648 22:24:39.315515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip
18650 22:24:39.346305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip>
18651 22:24:39.346766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip
18653 22:24:39.376809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip
18655 22:24:39.377240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip>
18656 22:24:39.407900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4240 RESULT=pass>
18657 22:24:39.408320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4240 RESULT=pass
18659 22:24:39.438759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip
18661 22:24:39.439336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip>
18662 22:24:39.468878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip>
18663 22:24:39.469234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip
18665 22:24:39.499048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip>
18666 22:24:39.499403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip
18668 22:24:39.528981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4256 RESULT=pass>
18669 22:24:39.529342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4256 RESULT=pass
18671 22:24:39.559546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip
18673 22:24:39.559984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip>
18674 22:24:39.589663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip>
18675 22:24:39.590024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip
18677 22:24:39.619964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip>
18678 22:24:39.620316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip
18680 22:24:39.650719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4272 RESULT=pass>
18681 22:24:39.651076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4272 RESULT=pass
18683 22:24:39.680647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip>
18684 22:24:39.681002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip
18686 22:24:39.710955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip
18688 22:24:39.711400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip>
18689 22:24:39.741252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip>
18690 22:24:39.741611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip
18692 22:24:39.771381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4288 RESULT=pass
18694 22:24:39.771834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4288 RESULT=pass>
18695 22:24:39.801516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip>
18696 22:24:39.801881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip
18698 22:24:39.831388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip
18700 22:24:39.831827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip>
18701 22:24:39.861439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip>
18702 22:24:39.861788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip
18704 22:24:39.891986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4304 RESULT=pass>
18705 22:24:39.892393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4304 RESULT=pass
18707 22:24:39.922493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip>
18708 22:24:39.922908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip
18710 22:24:39.952883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip>
18711 22:24:39.953211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip
18713 22:24:39.983028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip>
18714 22:24:39.983337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip
18716 22:24:40.013218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4320 RESULT=pass>
18717 22:24:40.013569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4320 RESULT=pass
18719 22:24:40.042989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip>
18720 22:24:40.043346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip
18722 22:24:40.073664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip>
18723 22:24:40.074020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip
18725 22:24:40.104203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip>
18726 22:24:40.104556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip
18728 22:24:40.134657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4336 RESULT=pass>
18729 22:24:40.135013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4336 RESULT=pass
18731 22:24:40.164827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip>
18732 22:24:40.165180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip
18734 22:24:40.195118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip>
18735 22:24:40.195474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip
18737 22:24:40.225552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip>
18738 22:24:40.225916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip
18740 22:24:40.255796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4352 RESULT=pass>
18741 22:24:40.256148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4352 RESULT=pass
18743 22:24:40.285840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip>
18744 22:24:40.286195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip
18746 22:24:40.316835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip>
18747 22:24:40.317190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip
18749 22:24:40.347123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip>
18750 22:24:40.347479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip
18752 22:24:40.377331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4368 RESULT=pass>
18753 22:24:40.377685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4368 RESULT=pass
18755 22:24:40.407434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip
18757 22:24:40.407877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip>
18758 22:24:40.437422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip>
18759 22:24:40.437774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip
18761 22:24:40.468170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip>
18762 22:24:40.468524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip
18764 22:24:40.520846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4384 RESULT=pass
18766 22:24:40.521322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4384 RESULT=pass>
18767 22:24:40.554849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip>
18768 22:24:40.555338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip
18770 22:24:40.585149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip>
18771 22:24:40.585606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip
18773 22:24:40.615465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip
18775 22:24:40.615991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip>
18776 22:24:40.646174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4400 RESULT=pass>
18777 22:24:40.646628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4400 RESULT=pass
18779 22:24:40.678305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip>
18780 22:24:40.678720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip
18782 22:24:40.712218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip>
18783 22:24:40.712754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip
18785 22:24:40.744978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip>
18786 22:24:40.745507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip
18788 22:24:40.778666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4416 RESULT=pass
18790 22:24:40.779119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4416 RESULT=pass>
18791 22:24:40.812948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip>
18792 22:24:40.813423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip
18794 22:24:40.846242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip
18796 22:24:40.846687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip>
18797 22:24:40.877079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip>
18798 22:24:40.877546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip
18800 22:24:40.909197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4432 RESULT=pass>
18801 22:24:40.909691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4432 RESULT=pass
18803 22:24:40.941188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip>
18804 22:24:40.941681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip
18806 22:24:40.971858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip>
18807 22:24:40.972343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip
18809 22:24:41.002726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip>
18810 22:24:41.003232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip
18812 22:24:41.033057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4448 RESULT=pass>
18813 22:24:41.033463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4448 RESULT=pass
18815 22:24:41.063020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip>
18816 22:24:41.063472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip
18818 22:24:41.094234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip>
18819 22:24:41.094802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip
18821 22:24:41.125227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip>
18822 22:24:41.125691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip
18824 22:24:41.156585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4464 RESULT=pass>
18825 22:24:41.157061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4464 RESULT=pass
18827 22:24:41.188369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip
18829 22:24:41.188882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip>
18830 22:24:41.219781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip>
18831 22:24:41.220188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip
18833 22:24:41.250803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip>
18834 22:24:41.251209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip
18836 22:24:41.282029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4480 RESULT=pass
18838 22:24:41.282563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4480 RESULT=pass>
18839 22:24:41.313022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip>
18840 22:24:41.313482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip
18842 22:24:41.344848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip
18844 22:24:41.345421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip>
18845 22:24:41.374681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip>
18846 22:24:41.375051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip
18848 22:24:41.405367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4496 RESULT=pass>
18849 22:24:41.405780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4496 RESULT=pass
18851 22:24:41.436154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip>
18852 22:24:41.436548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip
18854 22:24:41.467455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip
18856 22:24:41.468000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip>
18857 22:24:41.498380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip>
18858 22:24:41.498873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip
18860 22:24:41.529000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4512 RESULT=pass
18862 22:24:41.529541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4512 RESULT=pass>
18863 22:24:41.559360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip
18865 22:24:41.559876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip>
18866 22:24:41.589619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip>
18867 22:24:41.590053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip
18869 22:24:41.620591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip>
18870 22:24:41.621027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip
18872 22:24:41.652174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4528 RESULT=pass>
18873 22:24:41.652618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4528 RESULT=pass
18875 22:24:41.683374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip
18877 22:24:41.683799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip>
18878 22:24:41.714534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip
18880 22:24:41.714964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip>
18881 22:24:41.745495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip
18883 22:24:41.746058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip>
18884 22:24:41.775887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4544 RESULT=pass>
18885 22:24:41.776305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4544 RESULT=pass
18887 22:24:41.805986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip>
18888 22:24:41.806413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip
18890 22:24:41.836770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip
18892 22:24:41.837259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip>
18893 22:24:41.866938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip>
18894 22:24:41.867279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip
18896 22:24:41.898042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4560 RESULT=pass>
18897 22:24:41.898380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4560 RESULT=pass
18899 22:24:41.928976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip>
18900 22:24:41.929328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip
18902 22:24:41.959872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip>
18903 22:24:41.960220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip
18905 22:24:41.989401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip>
18906 22:24:41.989747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip
18908 22:24:42.019347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4576 RESULT=pass
18910 22:24:42.019927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4576 RESULT=pass>
18911 22:24:42.050335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip>
18912 22:24:42.050712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip
18914 22:24:42.081355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip
18916 22:24:42.081930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip>
18917 22:24:42.113065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip>
18918 22:24:42.113562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip
18920 22:24:42.146924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4592 RESULT=pass>
18921 22:24:42.147410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4592 RESULT=pass
18923 22:24:42.177930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip
18925 22:24:42.178403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip>
18926 22:24:42.208795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip>
18927 22:24:42.209079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip
18929 22:24:42.240187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip
18931 22:24:42.240639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip>
18932 22:24:42.271018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4608 RESULT=pass
18934 22:24:42.271494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4608 RESULT=pass>
18935 22:24:42.301842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip>
18936 22:24:42.302135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip
18938 22:24:42.333313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip>
18939 22:24:42.333593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip
18941 22:24:42.363903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip
18943 22:24:42.364313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip>
18944 22:24:42.394025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4624 RESULT=pass>
18945 22:24:42.394340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4624 RESULT=pass
18947 22:24:42.425711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip>
18948 22:24:42.426109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip
18950 22:24:42.457165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip
18952 22:24:42.457571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip>
18953 22:24:42.487920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip>
18954 22:24:42.488258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip
18956 22:24:42.518481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4640 RESULT=pass>
18957 22:24:42.518820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4640 RESULT=pass
18959 22:24:42.549338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip
18961 22:24:42.549764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip>
18962 22:24:42.581958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip>
18963 22:24:42.582324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip
18965 22:24:42.613608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip>
18966 22:24:42.613988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip
18968 22:24:42.645420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4656 RESULT=pass>
18969 22:24:42.645914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4656 RESULT=pass
18971 22:24:42.677378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip>
18972 22:24:42.677844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip
18974 22:24:42.708214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip>
18975 22:24:42.708609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip
18977 22:24:42.738485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip>
18978 22:24:42.738825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip
18980 22:24:42.768442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4672 RESULT=pass
18982 22:24:42.768862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4672 RESULT=pass>
18983 22:24:42.798433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip>
18984 22:24:42.798773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip
18986 22:24:42.828810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip>
18987 22:24:42.829161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip
18989 22:24:42.860045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip>
18990 22:24:42.860381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip
18992 22:24:42.891165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4688 RESULT=pass
18994 22:24:42.891577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4688 RESULT=pass>
18995 22:24:42.921553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip>
18996 22:24:42.921881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip
18998 22:24:42.951880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip>
18999 22:24:42.952219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip
19001 22:24:42.982538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip>
19002 22:24:42.982964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip
19004 22:24:43.013638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4704 RESULT=pass
19006 22:24:43.014086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4704 RESULT=pass>
19007 22:24:43.044290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip>
19008 22:24:43.044690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip
19010 22:24:43.075836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip
19012 22:24:43.076390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip>
19013 22:24:43.108504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip
19015 22:24:43.109059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip>
19016 22:24:43.141485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4720 RESULT=pass
19018 22:24:43.142128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4720 RESULT=pass>
19019 22:24:43.172649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip>
19020 22:24:43.173118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip
19022 22:24:43.204983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip
19024 22:24:43.205536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip>
19025 22:24:43.236370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip>
19026 22:24:43.236709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip
19028 22:24:43.269805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4736 RESULT=pass>
19029 22:24:43.270181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4736 RESULT=pass
19031 22:24:43.300264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip>
19032 22:24:43.300692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip
19034 22:24:43.332024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip>
19035 22:24:43.332426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip
19037 22:24:43.362491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip>
19038 22:24:43.362885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip
19040 22:24:43.393129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4752 RESULT=pass
19042 22:24:43.393716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4752 RESULT=pass>
19043 22:24:43.423888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip>
19044 22:24:43.424329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip
19046 22:24:43.454009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip>
19047 22:24:43.454556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip
19049 22:24:43.484476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip
19051 22:24:43.485022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip>
19052 22:24:43.514490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4768 RESULT=pass>
19053 22:24:43.514936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4768 RESULT=pass
19055 22:24:43.546117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip>
19056 22:24:43.546581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip
19058 22:24:43.580083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip>
19059 22:24:43.580504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip
19061 22:24:43.610805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip>
19062 22:24:43.611332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip
19064 22:24:43.642135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4784 RESULT=pass>
19065 22:24:43.642620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4784 RESULT=pass
19067 22:24:43.672790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip>
19068 22:24:43.673260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip
19070 22:24:43.703128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip>
19071 22:24:43.703576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip
19073 22:24:43.733984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip
19075 22:24:43.734597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip>
19076 22:24:43.764559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4800 RESULT=pass
19078 22:24:43.765122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4800 RESULT=pass>
19079 22:24:43.794376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip>
19080 22:24:43.794721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip
19082 22:24:43.824425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip>
19083 22:24:43.824866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip
19085 22:24:43.855373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip
19087 22:24:43.855891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip>
19088 22:24:43.886091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4816 RESULT=pass>
19089 22:24:43.886503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4816 RESULT=pass
19091 22:24:43.917167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip>
19092 22:24:43.917560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip
19094 22:24:43.947976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip
19096 22:24:43.948451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip>
19097 22:24:43.978605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip>
19098 22:24:43.978958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip
19100 22:24:44.008775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4832 RESULT=pass
19102 22:24:44.009217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4832 RESULT=pass>
19103 22:24:44.038495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip>
19104 22:24:44.038852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip
19106 22:24:44.068668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip>
19107 22:24:44.069021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip
19109 22:24:44.099505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip
19111 22:24:44.099965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip>
19112 22:24:44.139142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4848 RESULT=pass
19114 22:24:44.139743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4848 RESULT=pass>
19115 22:24:44.174437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip>
19116 22:24:44.174900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip
19118 22:24:44.208297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip
19120 22:24:44.208940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip>
19121 22:24:44.240741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip>
19122 22:24:44.241227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip
19124 22:24:44.275387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4864 RESULT=pass
19126 22:24:44.276130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4864 RESULT=pass>
19127 22:24:44.308434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip
19129 22:24:44.309009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip>
19130 22:24:44.340626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip>
19131 22:24:44.341015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip
19133 22:24:44.372267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip>
19134 22:24:44.372733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip
19136 22:24:44.404447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4880 RESULT=pass
19138 22:24:44.404896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4880 RESULT=pass>
19139 22:24:44.436563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip>
19140 22:24:44.436971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip
19142 22:24:44.468341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip>
19143 22:24:44.468754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip
19145 22:24:44.500615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip>
19146 22:24:44.501087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip
19148 22:24:44.531445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4896 RESULT=pass
19150 22:24:44.532055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4896 RESULT=pass>
19151 22:24:44.562215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip
19153 22:24:44.562929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip>
19154 22:24:44.593615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip
19156 22:24:44.594204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip>
19157 22:24:44.624521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip>
19158 22:24:44.624964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip
19160 22:24:44.657875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4912 RESULT=pass>
19161 22:24:44.658369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4912 RESULT=pass
19163 22:24:44.691058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip>
19164 22:24:44.691500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip
19166 22:24:44.724951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip>
19167 22:24:44.725360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip
19169 22:24:44.757841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip>
19170 22:24:44.758317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip
19172 22:24:44.790109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4928 RESULT=pass
19174 22:24:44.790739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4928 RESULT=pass>
19175 22:24:44.821218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip>
19176 22:24:44.821633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip
19178 22:24:44.851873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip>
19179 22:24:44.852267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip
19181 22:24:44.882781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip>
19182 22:24:44.883186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip
19184 22:24:44.914132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4944 RESULT=pass>
19185 22:24:44.914593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4944 RESULT=pass
19187 22:24:44.944081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip
19189 22:24:44.944514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip>
19190 22:24:44.974029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip
19192 22:24:44.974570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip>
19193 22:24:45.004306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip
19195 22:24:45.004818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip>
19196 22:24:45.034621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4960 RESULT=pass>
19197 22:24:45.035075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4960 RESULT=pass
19199 22:24:45.065724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip>
19200 22:24:45.066204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip
19202 22:24:45.100476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip
19204 22:24:45.101041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip>
19205 22:24:45.139517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip
19207 22:24:45.140152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip>
19208 22:24:45.173773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4976 RESULT=pass
19210 22:24:45.174327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4976 RESULT=pass>
19211 22:24:45.207063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip>
19212 22:24:45.207487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip
19214 22:24:45.240569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip>
19215 22:24:45.241020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip
19217 22:24:45.273323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip>
19218 22:24:45.273760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip
19220 22:24:45.305043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4992 RESULT=pass>
19221 22:24:45.305479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4992 RESULT=pass
19223 22:24:45.336071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip>
19224 22:24:45.336492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip
19226 22:24:45.368102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip>
19227 22:24:45.368540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip
19229 22:24:45.398964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip>
19230 22:24:45.399391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip
19232 22:24:45.429878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5008 RESULT=pass
19234 22:24:45.430405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5008 RESULT=pass>
19235 22:24:45.460813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip>
19236 22:24:45.461230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip
19238 22:24:45.491771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip>
19239 22:24:45.492179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip
19241 22:24:45.522846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip
19243 22:24:45.523307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip>
19244 22:24:45.553231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5024 RESULT=pass
19246 22:24:45.553666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5024 RESULT=pass>
19247 22:24:45.584070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip>
19248 22:24:45.584491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip
19250 22:24:45.628613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip>
19251 22:24:45.629004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip
19253 22:24:45.668020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip>
19254 22:24:45.668481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip
19256 22:24:45.700130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5040 RESULT=pass>
19257 22:24:45.700605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5040 RESULT=pass
19259 22:24:45.730877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip>
19260 22:24:45.731293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip
19262 22:24:45.763563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip
19264 22:24:45.764178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip>
19265 22:24:45.793996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip>
19266 22:24:45.794469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip
19268 22:24:45.824068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5056 RESULT=pass>
19269 22:24:45.824420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5056 RESULT=pass
19271 22:24:45.853800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip>
19272 22:24:45.854160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip
19274 22:24:45.884161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip
19276 22:24:45.884603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip>
19277 22:24:45.913874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip>
19278 22:24:45.914357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip
19280 22:24:45.945145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5072 RESULT=pass>
19281 22:24:45.945614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5072 RESULT=pass
19283 22:24:45.975910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip>
19284 22:24:45.976361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip
19286 22:24:46.006118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip>
19287 22:24:46.006565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip
19289 22:24:46.036548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip>
19290 22:24:46.036935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip
19292 22:24:46.066733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5088 RESULT=pass>
19293 22:24:46.067085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5088 RESULT=pass
19295 22:24:46.096385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip>
19296 22:24:46.096736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip
19298 22:24:46.127039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip>
19299 22:24:46.127505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip
19301 22:24:46.159196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip>
19302 22:24:46.159637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip
19304 22:24:46.193679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5104 RESULT=pass>
19305 22:24:46.194118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5104 RESULT=pass
19307 22:24:46.225814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip>
19308 22:24:46.226246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip
19310 22:24:46.257120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip
19312 22:24:46.257700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip>
19313 22:24:46.289113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip>
19314 22:24:46.289538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip
19316 22:24:46.321928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5120 RESULT=pass
19318 22:24:46.322459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5120 RESULT=pass>
19319 22:24:46.352546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip>
19320 22:24:46.352931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip
19322 22:24:46.384274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip>
19323 22:24:46.384708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip
19325 22:24:46.414917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip>
19326 22:24:46.415333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip
19328 22:24:46.445213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5136 RESULT=pass
19330 22:24:46.445678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5136 RESULT=pass>
19331 22:24:46.475849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip>
19332 22:24:46.476250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip
19334 22:24:46.506896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip>
19335 22:24:46.507375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip
19337 22:24:46.537703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip>
19338 22:24:46.538148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip
19340 22:24:46.568111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5152 RESULT=pass>
19341 22:24:46.568570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5152 RESULT=pass
19343 22:24:46.598585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip>
19344 22:24:46.598984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip
19346 22:24:46.629402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip>
19347 22:24:46.629815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip
19349 22:24:46.660534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip
19351 22:24:46.661083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip>
19352 22:24:46.691011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5168 RESULT=pass>
19353 22:24:46.691388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5168 RESULT=pass
19355 22:24:46.721596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip>
19356 22:24:46.722054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip
19358 22:24:46.752395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip>
19359 22:24:46.752830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip
19361 22:24:46.783130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip
19363 22:24:46.783671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip>
19364 22:24:46.814104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5184 RESULT=pass
19366 22:24:46.814624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5184 RESULT=pass>
19367 22:24:46.845183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip>
19368 22:24:46.845637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip
19370 22:24:46.876393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip>
19371 22:24:46.876844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip
19373 22:24:46.907415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip
19375 22:24:46.908020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip>
19376 22:24:46.938878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5200 RESULT=pass>
19377 22:24:46.939290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5200 RESULT=pass
19379 22:24:46.969705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip
19381 22:24:46.970134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip>
19382 22:24:47.000378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip>
19383 22:24:47.000789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip
19385 22:24:47.031373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip
19387 22:24:47.031907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip>
19388 22:24:47.062268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5216 RESULT=pass
19390 22:24:47.062836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5216 RESULT=pass>
19391 22:24:47.094812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip>
19392 22:24:47.095173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip
19394 22:24:47.128034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip
19396 22:24:47.128779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip>
19397 22:24:47.160804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip>
19398 22:24:47.161233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip
19400 22:24:47.194684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5232 RESULT=pass>
19401 22:24:47.195112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5232 RESULT=pass
19403 22:24:47.228130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip>
19404 22:24:47.228535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip
19406 22:24:47.260515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip>
19407 22:24:47.260920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip
19409 22:24:47.291806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip>
19410 22:24:47.292207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip
19412 22:24:47.322675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5248 RESULT=pass
19414 22:24:47.323229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5248 RESULT=pass>
19415 22:24:47.352913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip>
19416 22:24:47.353373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip
19418 22:24:47.384159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip>
19419 22:24:47.384541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip
19421 22:24:47.414750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip>
19422 22:24:47.415165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip
19424 22:24:47.445591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5264 RESULT=pass>
19425 22:24:47.446062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5264 RESULT=pass
19427 22:24:47.476395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip>
19428 22:24:47.476852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip
19430 22:24:47.506864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip>
19431 22:24:47.507323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip
19433 22:24:47.537431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip>
19434 22:24:47.537837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip
19436 22:24:47.568257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5280 RESULT=pass>
19437 22:24:47.568658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5280 RESULT=pass
19439 22:24:47.598708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip
19441 22:24:47.599258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip>
19442 22:24:47.628538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip
19444 22:24:47.628951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip>
19445 22:24:47.659022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip>
19446 22:24:47.659359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip
19448 22:24:47.689714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5296 RESULT=pass
19450 22:24:47.690159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5296 RESULT=pass>
19451 22:24:47.720544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip>
19452 22:24:47.720918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip
19454 22:24:47.750657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip>
19455 22:24:47.751009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip
19457 22:24:47.780996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip>
19458 22:24:47.781349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip
19460 22:24:47.810849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5312 RESULT=pass>
19461 22:24:47.811175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5312 RESULT=pass
19463 22:24:47.841091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip>
19464 22:24:47.841437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip
19466 22:24:47.871344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip
19468 22:24:47.871766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip>
19469 22:24:47.901580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip>
19470 22:24:47.901944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip
19472 22:24:47.932252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5328 RESULT=pass
19474 22:24:47.932697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5328 RESULT=pass>
19475 22:24:47.962019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip>
19476 22:24:47.962357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip
19478 22:24:47.992269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip>
19479 22:24:47.992618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip
19481 22:24:48.022590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip>
19482 22:24:48.022929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip
19484 22:24:48.052543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5344 RESULT=pass>
19485 22:24:48.052882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5344 RESULT=pass
19487 22:24:48.082359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip
19489 22:24:48.082776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip>
19490 22:24:48.112338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip>
19491 22:24:48.112685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip
19493 22:24:48.142842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip>
19494 22:24:48.143187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip
19496 22:24:48.173038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5360 RESULT=pass>
19497 22:24:48.173373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5360 RESULT=pass
19499 22:24:48.203021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip>
19500 22:24:48.203337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip
19502 22:24:48.233544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip>
19503 22:24:48.233912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip
19505 22:24:48.263953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip>
19506 22:24:48.264314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip
19508 22:24:48.294025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5376 RESULT=pass
19510 22:24:48.294466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5376 RESULT=pass>
19511 22:24:48.324384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip>
19512 22:24:48.324736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip
19514 22:24:48.355410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip
19516 22:24:48.355848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip>
19517 22:24:48.385535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip>
19518 22:24:48.385897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip
19520 22:24:48.415827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5392 RESULT=pass>
19521 22:24:48.416197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5392 RESULT=pass
19523 22:24:48.445674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip
19525 22:24:48.446114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip>
19526 22:24:48.476150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip
19528 22:24:48.476558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip>
19529 22:24:48.506142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip
19531 22:24:48.506548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip>
19532 22:24:48.536156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5408 RESULT=pass>
19533 22:24:48.536496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5408 RESULT=pass
19535 22:24:48.565993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip>
19536 22:24:48.566342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip
19538 22:24:48.596311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip>
19539 22:24:48.596669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip
19541 22:24:48.626722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip>
19542 22:24:48.627081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip
19544 22:24:48.657322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5424 RESULT=pass>
19545 22:24:48.657688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5424 RESULT=pass
19547 22:24:48.688116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip
19549 22:24:48.688645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip>
19550 22:24:48.718160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip
19552 22:24:48.718670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip>
19553 22:24:48.748451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip>
19554 22:24:48.748807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip
19556 22:24:48.778588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5440 RESULT=pass>
19557 22:24:48.778938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5440 RESULT=pass
19559 22:24:48.809263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip>
19560 22:24:48.809699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip
19562 22:24:48.839685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip>
19563 22:24:48.840183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip
19565 22:24:48.870380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip
19567 22:24:48.870957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip>
19568 22:24:48.901860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5456 RESULT=pass>
19569 22:24:48.902333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5456 RESULT=pass
19571 22:24:48.933045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip>
19572 22:24:48.933527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip
19574 22:24:48.964389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip>
19575 22:24:48.964759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip
19577 22:24:48.995323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip
19579 22:24:48.995775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip>
19580 22:24:49.025758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5472 RESULT=pass
19582 22:24:49.026274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5472 RESULT=pass>
19583 22:24:49.056198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip>
19584 22:24:49.056548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip
19586 22:24:49.086540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip>
19587 22:24:49.086853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip
19589 22:24:49.116648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip
19591 22:24:49.117052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip>
19592 22:24:49.147775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5488 RESULT=pass
19594 22:24:49.148157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5488 RESULT=pass>
19595 22:24:49.178008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip>
19596 22:24:49.178355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip
19598 22:24:49.209115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip>
19599 22:24:49.209614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip
19601 22:24:49.239914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip>
19602 22:24:49.240266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip
19604 22:24:49.270012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5504 RESULT=pass>
19605 22:24:49.270351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5504 RESULT=pass
19607 22:24:49.300406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip
19609 22:24:49.300823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip>
19610 22:24:49.331514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip
19612 22:24:49.331943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip>
19613 22:24:49.361852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip>
19614 22:24:49.362194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip
19616 22:24:49.392459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5520 RESULT=pass>
19617 22:24:49.392793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5520 RESULT=pass
19619 22:24:49.422661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip>
19620 22:24:49.423001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip
19622 22:24:49.453124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip>
19623 22:24:49.453454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip
19625 22:24:49.484058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip
19627 22:24:49.484481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip>
19628 22:24:49.514293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5536 RESULT=pass
19630 22:24:49.514702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5536 RESULT=pass>
19631 22:24:49.544415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip
19633 22:24:49.544831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip>
19634 22:24:49.574676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip>
19635 22:24:49.575018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip
19637 22:24:49.605244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip>
19638 22:24:49.605756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip
19640 22:24:49.636921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5552 RESULT=pass
19642 22:24:49.637494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5552 RESULT=pass>
19643 22:24:49.667446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip
19645 22:24:49.668003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip>
19646 22:24:49.697798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip>
19647 22:24:49.698142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip
19649 22:24:49.728288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip>
19650 22:24:49.728627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip
19652 22:24:49.758386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5568 RESULT=pass
19654 22:24:49.758791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5568 RESULT=pass>
19655 22:24:49.788485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip>
19656 22:24:49.788816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip
19658 22:24:49.818607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip>
19659 22:24:49.818943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip
19661 22:24:49.848930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip>
19662 22:24:49.849264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip
19664 22:24:49.880129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5584 RESULT=pass>
19665 22:24:49.880494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5584 RESULT=pass
19667 22:24:49.910700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip>
19668 22:24:49.911054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip
19670 22:24:49.941498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip
19672 22:24:49.941965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip>
19673 22:24:49.972561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip>
19674 22:24:49.972960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip
19676 22:24:50.003605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5600 RESULT=pass>
19677 22:24:50.004023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5600 RESULT=pass
19679 22:24:50.033953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip>
19680 22:24:50.034365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip
19682 22:24:50.064465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip>
19683 22:24:50.064874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip
19685 22:24:50.095352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip
19687 22:24:50.095902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip>
19688 22:24:50.128890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5616 RESULT=pass>
19689 22:24:50.129373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5616 RESULT=pass
19691 22:24:50.163378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip
19693 22:24:50.163865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip>
19694 22:24:50.197142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip>
19695 22:24:50.197538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip
19697 22:24:50.231206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip
19699 22:24:50.231699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip>
19700 22:24:50.263428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5632 RESULT=pass
19702 22:24:50.264139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5632 RESULT=pass>
19703 22:24:50.295080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip>
19704 22:24:50.295498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip
19706 22:24:50.328841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip
19708 22:24:50.329290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip>
19709 22:24:50.361925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip>
19710 22:24:50.362355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip
19712 22:24:50.395078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5648 RESULT=pass
19714 22:24:50.395538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5648 RESULT=pass>
19715 22:24:50.426065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip>
19716 22:24:50.426464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip
19718 22:24:50.457029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip
19720 22:24:50.457462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip>
19721 22:24:50.488573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip
19723 22:24:50.489023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip>
19724 22:24:50.520722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5664 RESULT=pass>
19725 22:24:50.521158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5664 RESULT=pass
19727 22:24:50.552294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip>
19728 22:24:50.552767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip
19730 22:24:50.583718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip>
19731 22:24:50.584164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip
19733 22:24:50.614415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip>
19734 22:24:50.614865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip
19736 22:24:50.654024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5680 RESULT=pass>
19737 22:24:50.654462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5680 RESULT=pass
19739 22:24:50.692748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip>
19740 22:24:50.693125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip
19742 22:24:50.725872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip>
19743 22:24:50.726216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip
19745 22:24:50.781538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip>
19746 22:24:50.781899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip
19748 22:24:50.812718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5696 RESULT=pass
19750 22:24:50.813205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5696 RESULT=pass>
19751 22:24:50.842699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip>
19752 22:24:50.843053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip
19754 22:24:50.872888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip>
19755 22:24:50.873247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip
19757 22:24:50.903394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip
19759 22:24:50.903840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip>
19760 22:24:50.933859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5712 RESULT=pass>
19761 22:24:50.934201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5712 RESULT=pass
19763 22:24:50.964355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip>
19764 22:24:50.964698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip
19766 22:24:50.994872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip>
19767 22:24:50.995343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip
19769 22:24:51.025347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip>
19770 22:24:51.025799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip
19772 22:24:51.055995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5728 RESULT=pass>
19773 22:24:51.056460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5728 RESULT=pass
19775 22:24:51.088144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip
19777 22:24:51.088708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip>
19778 22:24:51.118408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip>
19779 22:24:51.118759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip
19781 22:24:51.149206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip>
19782 22:24:51.149552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip
19784 22:24:51.181188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5744 RESULT=pass
19786 22:24:51.181639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5744 RESULT=pass>
19787 22:24:51.212601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip>
19788 22:24:51.213024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip
19790 22:24:51.244049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip
19792 22:24:51.244673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip>
19793 22:24:51.274673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip>
19794 22:24:51.275117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip
19796 22:24:51.305574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5760 RESULT=pass
19798 22:24:51.306112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5760 RESULT=pass>
19799 22:24:51.336484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip>
19800 22:24:51.336891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip
19802 22:24:51.368480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip>
19803 22:24:51.368933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip
19805 22:24:51.399587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip
19807 22:24:51.400118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip>
19808 22:24:51.430497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5776 RESULT=pass
19810 22:24:51.431014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5776 RESULT=pass>
19811 22:24:51.460799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip
19813 22:24:51.461354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip>
19814 22:24:51.491624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip>
19815 22:24:51.491969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip
19817 22:24:51.522170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip
19819 22:24:51.522586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip>
19820 22:24:51.552139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5792 RESULT=pass>
19821 22:24:51.552479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5792 RESULT=pass
19823 22:24:51.582042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip>
19824 22:24:51.582503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip
19826 22:24:51.612838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip>
19827 22:24:51.613295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip
19829 22:24:51.643533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip
19831 22:24:51.644046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip>
19832 22:24:51.673958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5808 RESULT=pass
19834 22:24:51.674434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5808 RESULT=pass>
19835 22:24:51.704235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip
19837 22:24:51.704846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip>
19838 22:24:51.734876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip>
19839 22:24:51.735351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip
19841 22:24:51.765245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip
19843 22:24:51.765730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip>
19844 22:24:51.794756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5824 RESULT=pass>
19845 22:24:51.795113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5824 RESULT=pass
19847 22:24:51.825375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip>
19848 22:24:51.825738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip
19850 22:24:51.855801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip
19852 22:24:51.856350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip>
19853 22:24:51.887390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip
19855 22:24:51.887948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip>
19856 22:24:51.919783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5840 RESULT=pass
19858 22:24:51.920231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5840 RESULT=pass>
19859 22:24:51.951004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip
19861 22:24:51.951461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip>
19862 22:24:51.982120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip>
19863 22:24:51.982633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip
19865 22:24:52.012995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip
19867 22:24:52.013563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip>
19868 22:24:52.044290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5856 RESULT=pass>
19869 22:24:52.044677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5856 RESULT=pass
19871 22:24:52.074343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip>
19872 22:24:52.074736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip
19874 22:24:52.106113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip>
19875 22:24:52.106593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip
19877 22:24:52.136833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip
19879 22:24:52.137386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip>
19880 22:24:52.168367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5872 RESULT=pass>
19881 22:24:52.168925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5872 RESULT=pass
19883 22:24:52.201710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip>
19884 22:24:52.202113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip
19886 22:24:52.235522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip
19888 22:24:52.236025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip>
19889 22:24:52.268986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip>
19890 22:24:52.269372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip
19892 22:24:52.300927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5888 RESULT=pass>
19893 22:24:52.301335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5888 RESULT=pass
19895 22:24:52.331328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip
19897 22:24:52.331681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip>
19898 22:24:52.362947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip>
19899 22:24:52.363272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip
19901 22:24:52.393517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip
19903 22:24:52.393760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip>
19904 22:24:52.423785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5904 RESULT=pass>
19905 22:24:52.424135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5904 RESULT=pass
19907 22:24:52.454791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip>
19908 22:24:52.455303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip
19910 22:24:52.485502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip>
19911 22:24:52.485856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip
19913 22:24:52.516077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip>
19914 22:24:52.516420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip
19916 22:24:52.546491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5920 RESULT=pass
19918 22:24:52.546916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5920 RESULT=pass>
19919 22:24:52.577155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip>
19920 22:24:52.577624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip
19922 22:24:52.608434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip>
19923 22:24:52.608854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip
19925 22:24:52.639141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip>
19926 22:24:52.639608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip
19928 22:24:52.670936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5936 RESULT=pass>
19929 22:24:52.671405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5936 RESULT=pass
19931 22:24:52.701449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip>
19932 22:24:52.701822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip
19934 22:24:52.731780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip>
19935 22:24:52.732249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip
19937 22:24:52.762297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip>
19938 22:24:52.762756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip
19940 22:24:52.792478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5952 RESULT=pass>
19941 22:24:52.792844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5952 RESULT=pass
19943 22:24:52.822723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip>
19944 22:24:52.823079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip
19946 22:24:52.852940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip>
19947 22:24:52.853292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip
19949 22:24:52.883002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip>
19950 22:24:52.883346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip
19952 22:24:52.913691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5968 RESULT=pass
19954 22:24:52.914090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5968 RESULT=pass>
19955 22:24:52.944079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip>
19956 22:24:52.944417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip
19958 22:24:52.973687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip>
19959 22:24:52.974025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip
19961 22:24:53.003825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip
19963 22:24:53.004261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip>
19964 22:24:53.033630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5984 RESULT=pass>
19965 22:24:53.033988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5984 RESULT=pass
19967 22:24:53.063828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip>
19968 22:24:53.064181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip
19970 22:24:53.093888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip>
19971 22:24:53.094246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip
19973 22:24:53.124140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip>
19974 22:24:53.124613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip
19976 22:24:53.154584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6000 RESULT=pass>
19977 22:24:53.155056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6000 RESULT=pass
19979 22:24:53.185388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip>
19980 22:24:53.185774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip
19982 22:24:53.215501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip
19984 22:24:53.215980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip>
19985 22:24:53.245483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip>
19986 22:24:53.245832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip
19988 22:24:53.276234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6016 RESULT=pass
19990 22:24:53.276667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6016 RESULT=pass>
19991 22:24:53.305801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip>
19992 22:24:53.306152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip
19994 22:24:53.336808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip>
19995 22:24:53.337164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip
19997 22:24:53.367880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip>
19998 22:24:53.368231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip
20000 22:24:53.398453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6032 RESULT=pass
20002 22:24:53.398984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6032 RESULT=pass>
20003 22:24:53.429907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip
20005 22:24:53.430407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip>
20006 22:24:53.461284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip>
20007 22:24:53.461692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip
20009 22:24:53.493404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip
20011 22:24:53.493961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip>
20012 22:24:53.523976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6048 RESULT=pass>
20013 22:24:53.524374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6048 RESULT=pass
20015 22:24:53.554559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip
20017 22:24:53.555096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip>
20018 22:24:53.585580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip>
20019 22:24:53.586024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip
20021 22:24:53.616452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip>
20022 22:24:53.616817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip
20024 22:24:53.647901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6064 RESULT=pass
20026 22:24:53.648389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6064 RESULT=pass>
20027 22:24:53.679467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip
20029 22:24:53.680029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip>
20030 22:24:53.709908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip>
20031 22:24:53.710328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip
20033 22:24:53.740569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip
20035 22:24:53.741019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip>
20036 22:24:53.770969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6080 RESULT=pass
20038 22:24:53.771431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6080 RESULT=pass>
20039 22:24:53.801354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip>
20040 22:24:53.801806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip
20042 22:24:53.832127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip
20044 22:24:53.832659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip>
20045 22:24:53.863034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip
20047 22:24:53.863593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip>
20048 22:24:53.894643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6096 RESULT=pass>
20049 22:24:53.894947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6096 RESULT=pass
20051 22:24:53.926326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip
20053 22:24:53.926778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip>
20054 22:24:53.956784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip>
20055 22:24:53.957147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip
20057 22:24:53.987163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip>
20058 22:24:53.987518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip
20060 22:24:54.017573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6112 RESULT=pass>
20061 22:24:54.017912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6112 RESULT=pass
20063 22:24:54.048076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip>
20064 22:24:54.048400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip
20066 22:24:54.078457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip>
20067 22:24:54.078801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip
20069 22:24:54.108523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip>
20070 22:24:54.108863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip
20072 22:24:54.139076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6128 RESULT=pass>
20073 22:24:54.139400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6128 RESULT=pass
20075 22:24:54.169694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip>
20076 22:24:54.170030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip
20078 22:24:54.200575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip>
20079 22:24:54.200908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip
20081 22:24:54.231536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip>
20082 22:24:54.231863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip
20084 22:24:54.261550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6144 RESULT=pass>
20085 22:24:54.261920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6144 RESULT=pass
20087 22:24:54.294948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip
20089 22:24:54.295493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip>
20090 22:24:54.327031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip
20092 22:24:54.327530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip>
20093 22:24:54.357397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip>
20094 22:24:54.357911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip
20096 22:24:54.388306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6160 RESULT=pass
20098 22:24:54.388848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6160 RESULT=pass>
20099 22:24:54.418813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip
20101 22:24:54.419355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip>
20102 22:24:54.449314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip>
20103 22:24:54.449763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip
20105 22:24:54.480323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip>
20106 22:24:54.480777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip
20108 22:24:54.510693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6176 RESULT=pass>
20109 22:24:54.511122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6176 RESULT=pass
20111 22:24:54.541590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip>
20112 22:24:54.542053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip
20114 22:24:54.572520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip
20116 22:24:54.573057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip>
20117 22:24:54.603004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip>
20118 22:24:54.603446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip
20120 22:24:54.634338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6192 RESULT=pass>
20121 22:24:54.634798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6192 RESULT=pass
20123 22:24:54.665034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip>
20124 22:24:54.665461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip
20126 22:24:54.696058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip>
20127 22:24:54.696496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip
20129 22:24:54.726809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip>
20130 22:24:54.727253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip
20132 22:24:54.757482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6208 RESULT=pass>
20133 22:24:54.757890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6208 RESULT=pass
20135 22:24:54.788281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip>
20136 22:24:54.788686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip
20138 22:24:54.818871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip>
20139 22:24:54.819293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip
20141 22:24:54.849417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip>
20142 22:24:54.849834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip
20144 22:24:54.880646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6224 RESULT=pass>
20145 22:24:54.881061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6224 RESULT=pass
20147 22:24:54.911513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip
20149 22:24:54.911950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip>
20150 22:24:54.942320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip>
20151 22:24:54.942743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip
20153 22:24:54.972935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip>
20154 22:24:54.973332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip
20156 22:24:55.003437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6240 RESULT=pass
20158 22:24:55.003914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6240 RESULT=pass>
20159 22:24:55.033366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip>
20160 22:24:55.033685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip
20162 22:24:55.063930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip>
20163 22:24:55.064276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip
20165 22:24:55.093320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip>
20166 22:24:55.093674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip
20168 22:24:55.124431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6256 RESULT=pass>
20169 22:24:55.124894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6256 RESULT=pass
20171 22:24:55.154554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip>
20172 22:24:55.154898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip
20174 22:24:55.184604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip>
20175 22:24:55.184946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip
20177 22:24:55.214831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip>
20178 22:24:55.215210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip
20180 22:24:55.246020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6272 RESULT=pass>
20181 22:24:55.246380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6272 RESULT=pass
20183 22:24:55.276499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip>
20184 22:24:55.276860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip
20186 22:24:55.306906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip>
20187 22:24:55.307272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip
20189 22:24:55.336786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip>
20190 22:24:55.337132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip
20192 22:24:55.367204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6288 RESULT=pass>
20193 22:24:55.367575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6288 RESULT=pass
20195 22:24:55.397191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip>
20196 22:24:55.397557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip
20198 22:24:55.427408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip
20200 22:24:55.427920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip>
20201 22:24:55.457728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip>
20202 22:24:55.458089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip
20204 22:24:55.487675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6304 RESULT=pass>
20205 22:24:55.488030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6304 RESULT=pass
20207 22:24:55.517153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip>
20208 22:24:55.517504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip
20210 22:24:55.547032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip>
20211 22:24:55.547380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip
20213 22:24:55.577588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip>
20214 22:24:55.577948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip
20216 22:24:55.608246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6320 RESULT=pass>
20217 22:24:55.608582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6320 RESULT=pass
20219 22:24:55.651037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip>
20220 22:24:55.651448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip
20222 22:24:55.688075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip
20224 22:24:55.688637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip>
20225 22:24:55.720754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip
20227 22:24:55.721397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip>
20228 22:24:55.752553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6336 RESULT=pass
20230 22:24:55.752898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6336 RESULT=pass>
20231 22:24:55.784509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip>
20232 22:24:55.784865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip
20234 22:24:55.816624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip>
20235 22:24:55.816972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip
20237 22:24:55.857727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip>
20238 22:24:55.858156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip
20240 22:24:55.913731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6352 RESULT=pass
20242 22:24:55.914329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6352 RESULT=pass>
20243 22:24:55.945992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip>
20244 22:24:55.946472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip
20246 22:24:55.977504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip
20248 22:24:55.978152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip>
20249 22:24:56.008237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip
20251 22:24:56.008684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip>
20252 22:24:56.040901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6368 RESULT=pass>
20253 22:24:56.041302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6368 RESULT=pass
20255 22:24:56.072879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip
20257 22:24:56.073353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip>
20258 22:24:56.104634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip>
20259 22:24:56.105046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip
20261 22:24:56.136167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip>
20262 22:24:56.136531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip
20264 22:24:56.169474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6384 RESULT=pass>
20265 22:24:56.170024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6384 RESULT=pass
20267 22:24:56.202582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip>
20268 22:24:56.203091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip
20270 22:24:56.236210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip>
20271 22:24:56.236670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip
20273 22:24:56.269121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip
20275 22:24:56.269697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip>
20276 22:24:56.301394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6400 RESULT=pass>
20277 22:24:56.301865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6400 RESULT=pass
20279 22:24:56.332633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip>
20280 22:24:56.333096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip
20282 22:24:56.364445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip
20284 22:24:56.364982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip>
20285 22:24:56.396194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip>
20286 22:24:56.396667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip
20288 22:24:56.427169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6416 RESULT=pass
20290 22:24:56.427622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6416 RESULT=pass>
20291 22:24:56.458707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip
20293 22:24:56.459258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip>
20294 22:24:56.489692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip>
20295 22:24:56.490172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip
20297 22:24:56.521975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip>
20298 22:24:56.522444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip
20300 22:24:56.552787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6432 RESULT=pass
20302 22:24:56.553225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6432 RESULT=pass>
20303 22:24:56.584470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip>
20304 22:24:56.584899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip
20306 22:24:56.618006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip
20308 22:24:56.618451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip>
20309 22:24:56.649578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip>
20310 22:24:56.650068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip
20312 22:24:56.680947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6448 RESULT=pass
20314 22:24:56.681378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6448 RESULT=pass>
20315 22:24:56.712568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip>
20316 22:24:56.712974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip
20318 22:24:56.744231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip
20320 22:24:56.744673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip>
20321 22:24:56.775042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip>
20322 22:24:56.775492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip
20324 22:24:56.806411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6464 RESULT=pass>
20325 22:24:56.806875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6464 RESULT=pass
20327 22:24:56.836988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip
20329 22:24:56.837417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip>
20330 22:24:56.868296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip>
20331 22:24:56.868755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip
20333 22:24:56.898929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip>
20334 22:24:56.899400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip
20336 22:24:56.930180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6480 RESULT=pass>
20337 22:24:56.930650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6480 RESULT=pass
20339 22:24:56.961410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip>
20340 22:24:56.961860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip
20342 22:24:56.992607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip>
20343 22:24:56.993050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip
20345 22:24:57.024151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip>
20346 22:24:57.024602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip
20348 22:24:57.055214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6496 RESULT=pass
20350 22:24:57.055760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6496 RESULT=pass>
20351 22:24:57.085668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip>
20352 22:24:57.086124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip
20354 22:24:57.119284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip>
20355 22:24:57.119740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip
20357 22:24:57.151795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip>
20358 22:24:57.152245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip
20360 22:24:57.183931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6512 RESULT=pass>
20361 22:24:57.184403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6512 RESULT=pass
20363 22:24:57.214901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip>
20364 22:24:57.215344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip
20366 22:24:57.246274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip
20368 22:24:57.246732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip>
20369 22:24:57.276553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip>
20370 22:24:57.276860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip
20372 22:24:57.307583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6528 RESULT=pass
20374 22:24:57.308105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6528 RESULT=pass>
20375 22:24:57.338399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip
20377 22:24:57.338957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip>
20378 22:24:57.370088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip
20380 22:24:57.370662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip>
20381 22:24:57.401267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip>
20382 22:24:57.401688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip
20384 22:24:57.432258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6544 RESULT=pass
20386 22:24:57.432838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6544 RESULT=pass>
20387 22:24:57.462734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip>
20388 22:24:57.463169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip
20390 22:24:57.493931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip>
20391 22:24:57.494381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip
20393 22:24:57.525331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip
20395 22:24:57.525894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip>
20396 22:24:57.556314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6560 RESULT=pass
20398 22:24:57.556843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6560 RESULT=pass>
20399 22:24:57.586626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip>
20400 22:24:57.587041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip
20402 22:24:57.616915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip>
20403 22:24:57.617272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip
20405 22:24:57.647644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip
20407 22:24:57.648086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip>
20408 22:24:57.677898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6576 RESULT=pass>
20409 22:24:57.678251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6576 RESULT=pass
20411 22:24:57.708403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip>
20412 22:24:57.708757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip
20414 22:24:57.739086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip
20416 22:24:57.739523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip>
20417 22:24:57.769400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip>
20418 22:24:57.769757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip
20420 22:24:57.799664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6592 RESULT=pass>
20421 22:24:57.800029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6592 RESULT=pass
20423 22:24:57.829827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip>
20424 22:24:57.830194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip
20426 22:24:57.860262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip>
20427 22:24:57.860630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip
20429 22:24:57.890453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip>
20430 22:24:57.890830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip
20432 22:24:57.923385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6608 RESULT=pass
20434 22:24:57.923824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6608 RESULT=pass>
20435 22:24:57.953427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip>
20436 22:24:57.953778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip
20438 22:24:57.984037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip>
20439 22:24:57.984391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip
20441 22:24:58.013553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip>
20442 22:24:58.013912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip
20444 22:24:58.043732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6624 RESULT=pass>
20445 22:24:58.044086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6624 RESULT=pass
20447 22:24:58.073498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip>
20448 22:24:58.073856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip
20450 22:24:58.103733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip>
20451 22:24:58.104090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip
20453 22:24:58.133928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip
20455 22:24:58.134390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip>
20456 22:24:58.164947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6640 RESULT=pass>
20457 22:24:58.165369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6640 RESULT=pass
20459 22:24:58.195724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip>
20460 22:24:58.196134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip
20462 22:24:58.225815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip>
20463 22:24:58.226229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip
20465 22:24:58.256375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip>
20466 22:24:58.256790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip
20468 22:24:58.287069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6656 RESULT=pass>
20469 22:24:58.287488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6656 RESULT=pass
20471 22:24:58.317461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip>
20472 22:24:58.317875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip
20474 22:24:58.348652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip>
20475 22:24:58.349077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip
20477 22:24:58.379402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip
20479 22:24:58.379845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip>
20480 22:24:58.409765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6672 RESULT=pass>
20481 22:24:58.410177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6672 RESULT=pass
20483 22:24:58.440379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip>
20484 22:24:58.440790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip
20486 22:24:58.470637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip>
20487 22:24:58.471063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip
20489 22:24:58.501715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip>
20490 22:24:58.502124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip
20492 22:24:58.532311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6688 RESULT=pass>
20493 22:24:58.532724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6688 RESULT=pass
20495 22:24:58.562673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip>
20496 22:24:58.563093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip
20498 22:24:58.593340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip>
20499 22:24:58.593756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip
20501 22:24:58.624838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip>
20502 22:24:58.625256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip
20504 22:24:58.655441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6704 RESULT=pass
20506 22:24:58.656024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6704 RESULT=pass>
20507 22:24:58.686850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip
20509 22:24:58.687501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip>
20510 22:24:58.718723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip
20512 22:24:58.719184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip>
20513 22:24:58.751028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip>
20514 22:24:58.751447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip
20516 22:24:58.783579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6720 RESULT=pass
20518 22:24:58.784021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6720 RESULT=pass>
20519 22:24:58.814997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip>
20520 22:24:58.815399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip
20522 22:24:58.845585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip>
20523 22:24:58.846023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip
20525 22:24:58.876300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip>
20526 22:24:58.876740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip
20528 22:24:58.906917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6736 RESULT=pass
20530 22:24:58.907334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6736 RESULT=pass>
20531 22:24:58.936907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip>
20532 22:24:58.937315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip
20534 22:24:58.966963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip>
20535 22:24:58.967384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip
20537 22:24:58.997705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip>
20538 22:24:58.998158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip
20540 22:24:59.028299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6752 RESULT=pass
20542 22:24:59.028837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6752 RESULT=pass>
20543 22:24:59.058774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip>
20544 22:24:59.059209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip
20546 22:24:59.089584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip>
20547 22:24:59.089952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip
20549 22:24:59.120537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip
20551 22:24:59.120978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip>
20552 22:24:59.152339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6768 RESULT=pass
20554 22:24:59.152816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6768 RESULT=pass>
20555 22:24:59.182347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip>
20556 22:24:59.182748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip
20558 22:24:59.212637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip>
20559 22:24:59.213004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip
20561 22:24:59.243487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip
20563 22:24:59.244047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip>
20564 22:24:59.273597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6784 RESULT=pass
20566 22:24:59.274137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6784 RESULT=pass>
20567 22:24:59.304192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip
20569 22:24:59.304643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip>
20570 22:24:59.334655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip>
20571 22:24:59.335008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip
20573 22:24:59.365356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip>
20574 22:24:59.365800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip
20576 22:24:59.396503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6800 RESULT=pass
20578 22:24:59.396894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6800 RESULT=pass>
20579 22:24:59.426972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip>
20580 22:24:59.427302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip
20582 22:24:59.458962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip>
20583 22:24:59.459390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip
20585 22:24:59.491202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip>
20586 22:24:59.491616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip
20588 22:24:59.522036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6816 RESULT=pass>
20589 22:24:59.522439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6816 RESULT=pass
20591 22:24:59.553995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip
20593 22:24:59.554544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip>
20594 22:24:59.584807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip>
20595 22:24:59.585195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip
20597 22:24:59.615493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip>
20598 22:24:59.615831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip
20600 22:24:59.645392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6832 RESULT=pass>
20601 22:24:59.645678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6832 RESULT=pass
20603 22:24:59.676018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip>
20604 22:24:59.676480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip
20606 22:24:59.706884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip>
20607 22:24:59.707325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip
20609 22:24:59.738311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip>
20610 22:24:59.738762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip
20612 22:24:59.769342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6848 RESULT=pass
20614 22:24:59.769977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6848 RESULT=pass>
20615 22:24:59.800429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip>
20616 22:24:59.800885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip
20618 22:24:59.831744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip>
20619 22:24:59.832211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip
20621 22:24:59.862280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip>
20622 22:24:59.862738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip
20624 22:24:59.893639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6864 RESULT=pass>
20625 22:24:59.894094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6864 RESULT=pass
20627 22:24:59.924578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip>
20628 22:24:59.925021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip
20630 22:24:59.955856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip>
20631 22:24:59.956326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip
20633 22:24:59.986630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip>
20634 22:24:59.987012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip
20636 22:25:00.016730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6880 RESULT=pass>
20637 22:25:00.017030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6880 RESULT=pass
20639 22:25:00.046835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip>
20640 22:25:00.047133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip
20642 22:25:00.077156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip>
20643 22:25:00.077518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip
20645 22:25:00.106927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip>
20646 22:25:00.107285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip
20648 22:25:00.137884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6896 RESULT=pass
20650 22:25:00.138299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6896 RESULT=pass>
20651 22:25:00.168185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip>
20652 22:25:00.168528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip
20654 22:25:00.198219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip
20656 22:25:00.198654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip>
20657 22:25:00.228876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip>
20658 22:25:00.229348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip
20660 22:25:00.259018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6912 RESULT=pass
20662 22:25:00.259513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6912 RESULT=pass>
20663 22:25:00.289030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip>
20664 22:25:00.289373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip
20666 22:25:00.319727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip>
20667 22:25:00.320178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip
20669 22:25:00.350324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip
20671 22:25:00.350867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip>
20672 22:25:00.380497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6928 RESULT=pass>
20673 22:25:00.380925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6928 RESULT=pass
20675 22:25:00.411004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip>
20676 22:25:00.411430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip
20678 22:25:00.441738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip>
20679 22:25:00.442183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip
20681 22:25:00.472621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip>
20682 22:25:00.473081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip
20684 22:25:00.502694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6944 RESULT=pass>
20685 22:25:00.503071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6944 RESULT=pass
20687 22:25:00.532831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip>
20688 22:25:00.533172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip
20690 22:25:00.563015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip>
20691 22:25:00.563354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip
20693 22:25:00.593046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip>
20694 22:25:00.593385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip
20696 22:25:00.622696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6960 RESULT=pass>
20697 22:25:00.623039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6960 RESULT=pass
20699 22:25:00.652608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip>
20700 22:25:00.652944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip
20702 22:25:00.682366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip>
20703 22:25:00.682702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip
20705 22:25:00.712371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip
20707 22:25:00.712785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip>
20708 22:25:00.742003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6976 RESULT=pass>
20709 22:25:00.742341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6976 RESULT=pass
20711 22:25:00.772230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip
20713 22:25:00.772823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip>
20714 22:25:00.801995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip>
20715 22:25:00.802439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip
20717 22:25:00.832137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip>
20718 22:25:00.832548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip
20720 22:25:00.862452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6992 RESULT=pass>
20721 22:25:00.862886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6992 RESULT=pass
20723 22:25:00.892462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip>
20724 22:25:00.892861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip
20726 22:25:00.923383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip
20728 22:25:00.923961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip>
20729 22:25:00.956198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip
20731 22:25:00.956641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip>
20732 22:25:01.012077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7008 RESULT=pass>
20733 22:25:01.012574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7008 RESULT=pass
20735 22:25:01.044202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip
20737 22:25:01.044845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip>
20738 22:25:01.074887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip>
20739 22:25:01.075306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip
20741 22:25:01.105710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip>
20742 22:25:01.106193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip
20744 22:25:01.137081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7024 RESULT=pass>
20745 22:25:01.137564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7024 RESULT=pass
20747 22:25:01.168428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip
20749 22:25:01.168960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip>
20750 22:25:01.199098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip>
20751 22:25:01.199478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip
20753 22:25:01.229691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip
20755 22:25:01.230122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip>
20756 22:25:01.260113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7040 RESULT=pass>
20757 22:25:01.260593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7040 RESULT=pass
20759 22:25:01.291571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip
20761 22:25:01.292172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip>
20762 22:25:01.323445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip
20764 22:25:01.324057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip>
20765 22:25:01.354338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip
20767 22:25:01.354871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip>
20768 22:25:01.385559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7056 RESULT=pass
20770 22:25:01.386113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7056 RESULT=pass>
20771 22:25:01.416412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip>
20772 22:25:01.416806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip
20774 22:25:01.447323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip
20776 22:25:01.447902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip>
20777 22:25:01.480105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip
20779 22:25:01.480655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip>
20780 22:25:01.511347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7072 RESULT=pass
20782 22:25:01.511912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7072 RESULT=pass>
20783 22:25:01.542779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip>
20784 22:25:01.543261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip
20786 22:25:01.573658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip>
20787 22:25:01.574107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip
20789 22:25:01.604882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip>
20790 22:25:01.605293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip
20792 22:25:01.635941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7088 RESULT=pass>
20793 22:25:01.636382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7088 RESULT=pass
20795 22:25:01.666652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip>
20796 22:25:01.667236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip
20798 22:25:01.705173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip
20800 22:25:01.705794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip>
20801 22:25:01.756607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip>
20802 22:25:01.757080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip
20804 22:25:01.805478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7104 RESULT=pass>
20805 22:25:01.805870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7104 RESULT=pass
20807 22:25:01.852078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip
20809 22:25:01.852596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip>
20810 22:25:01.885891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip>
20811 22:25:01.886240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip
20813 22:25:01.917939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip
20815 22:25:01.918395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip>
20816 22:25:01.953513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7120 RESULT=pass>
20817 22:25:01.953978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7120 RESULT=pass
20819 22:25:01.985148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip
20821 22:25:01.985612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip>
20822 22:25:02.016845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip>
20823 22:25:02.017316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip
20825 22:25:02.049893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip>
20826 22:25:02.050357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip
20828 22:25:02.082360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7136 RESULT=pass
20830 22:25:02.083092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7136 RESULT=pass>
20831 22:25:02.114510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip>
20832 22:25:02.114977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip
20834 22:25:02.147485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip
20836 22:25:02.148041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip>
20837 22:25:02.179805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip>
20838 22:25:02.180295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip
20840 22:25:02.214275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7152 RESULT=pass>
20841 22:25:02.214756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7152 RESULT=pass
20843 22:25:02.245520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip>
20844 22:25:02.245842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip
20846 22:25:02.276592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip>
20847 22:25:02.276868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip
20849 22:25:02.307359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip
20851 22:25:02.307665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip>
20852 22:25:02.338250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7168 RESULT=pass>
20853 22:25:02.338535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7168 RESULT=pass
20855 22:25:02.369223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip>
20856 22:25:02.369681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip
20858 22:25:02.400991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip>
20859 22:25:02.401383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip
20861 22:25:02.431906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip>
20862 22:25:02.432254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip
20864 22:25:02.462393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7184 RESULT=pass>
20865 22:25:02.462859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7184 RESULT=pass
20867 22:25:02.493271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip>
20868 22:25:02.493675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip
20870 22:25:02.524674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip>
20871 22:25:02.525130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip
20873 22:25:02.556179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip>
20874 22:25:02.556575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip
20876 22:25:02.586739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7200 RESULT=pass>
20877 22:25:02.587087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7200 RESULT=pass
20879 22:25:02.617274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip>
20880 22:25:02.617617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip
20882 22:25:02.648573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip
20884 22:25:02.648990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip>
20885 22:25:02.679117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip>
20886 22:25:02.679449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip
20888 22:25:02.709532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7216 RESULT=pass>
20889 22:25:02.710009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7216 RESULT=pass
20891 22:25:02.740606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip>
20892 22:25:02.741055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip
20894 22:25:02.771651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip>
20895 22:25:02.772108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip
20897 22:25:02.802721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip>
20898 22:25:02.803169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip
20900 22:25:02.833547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7232 RESULT=pass
20902 22:25:02.834106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7232 RESULT=pass>
20903 22:25:02.864443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip
20905 22:25:02.864996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip>
20906 22:25:02.894948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip
20908 22:25:02.895552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip>
20909 22:25:02.925790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip
20911 22:25:02.926328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip>
20912 22:25:02.957060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7248 RESULT=pass>
20913 22:25:02.957536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7248 RESULT=pass
20915 22:25:02.988128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip>
20916 22:25:02.988577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip
20918 22:25:03.018634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip>
20919 22:25:03.019079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip
20921 22:25:03.049357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip
20923 22:25:03.049772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip>
20924 22:25:03.080086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7264 RESULT=pass>
20925 22:25:03.080440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7264 RESULT=pass
20927 22:25:03.110963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip
20929 22:25:03.111506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip>
20930 22:25:03.141589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip
20932 22:25:03.142086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip>
20933 22:25:03.172524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip>
20934 22:25:03.172862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip
20936 22:25:03.205816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7280 RESULT=pass>
20937 22:25:03.206380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7280 RESULT=pass
20939 22:25:03.249019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip
20941 22:25:03.249453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip>
20942 22:25:03.292182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip>
20943 22:25:03.292645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip
20945 22:25:03.334688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip>
20946 22:25:03.335111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip
20948 22:25:03.368730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7296 RESULT=pass
20950 22:25:03.369189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7296 RESULT=pass>
20951 22:25:03.402295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip>
20952 22:25:03.402668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip
20954 22:25:03.436781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip>
20955 22:25:03.437165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip
20957 22:25:03.471026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip>
20958 22:25:03.471452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip
20960 22:25:03.504975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7312 RESULT=pass>
20961 22:25:03.505388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7312 RESULT=pass
20963 22:25:03.539607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip
20965 22:25:03.540210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip>
20966 22:25:03.573341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip>
20967 22:25:03.573806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip
20969 22:25:03.608173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip
20971 22:25:03.608702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip>
20972 22:25:03.641610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7328 RESULT=pass>
20973 22:25:03.642010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7328 RESULT=pass
20975 22:25:03.676058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip
20977 22:25:03.676677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip>
20978 22:25:03.709447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip>
20979 22:25:03.709814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip
20981 22:25:03.743117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip>
20982 22:25:03.743498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip
20984 22:25:03.774436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7344 RESULT=pass>
20985 22:25:03.774786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7344 RESULT=pass
20987 22:25:03.804928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip
20989 22:25:03.805341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip>
20990 22:25:03.835090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip>
20991 22:25:03.835427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip
20993 22:25:03.865772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip>
20994 22:25:03.866123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip
20996 22:25:03.896425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7360 RESULT=pass>
20997 22:25:03.896753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7360 RESULT=pass
20999 22:25:03.927019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip>
21000 22:25:03.927365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip
21002 22:25:03.957321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip>
21003 22:25:03.957674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip
21005 22:25:03.988047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip>
21006 22:25:03.988400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip
21008 22:25:04.018620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7376 RESULT=pass
21010 22:25:04.019239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7376 RESULT=pass>
21011 22:25:04.049913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip
21013 22:25:04.050461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip>
21014 22:25:04.080411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip>
21015 22:25:04.080852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip
21017 22:25:04.111558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip
21019 22:25:04.112110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip>
21020 22:25:04.142358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7392 RESULT=pass
21022 22:25:04.142769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7392 RESULT=pass>
21023 22:25:04.173571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip>
21024 22:25:04.174010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip
21026 22:25:04.205175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip>
21027 22:25:04.205547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip
21029 22:25:04.236521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip>
21030 22:25:04.236871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip
21032 22:25:04.268283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7408 RESULT=pass
21034 22:25:04.268853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7408 RESULT=pass>
21035 22:25:04.299989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip>
21036 22:25:04.300432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip
21038 22:25:04.331149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip>
21039 22:25:04.331585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip
21041 22:25:04.362661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip>
21042 22:25:04.363096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip
21044 22:25:04.393796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7424 RESULT=pass
21046 22:25:04.394313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7424 RESULT=pass>
21047 22:25:04.425361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip>
21048 22:25:04.425802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip
21050 22:25:04.457391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip>
21051 22:25:04.457829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip
21053 22:25:04.488963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip
21055 22:25:04.489422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip>
21056 22:25:04.520236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7440 RESULT=pass
21058 22:25:04.520628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7440 RESULT=pass>
21059 22:25:04.551080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip>
21060 22:25:04.551441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip
21062 22:25:04.582093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip>
21063 22:25:04.582452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip
21065 22:25:04.613770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip>
21066 22:25:04.614112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip
21068 22:25:04.644843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7456 RESULT=pass
21070 22:25:04.645246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7456 RESULT=pass>
21071 22:25:04.676039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip
21073 22:25:04.676457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip>
21074 22:25:04.706822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip>
21075 22:25:04.707167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip
21077 22:25:04.738055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip>
21078 22:25:04.738408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip
21080 22:25:04.768947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7472 RESULT=pass>
21081 22:25:04.769292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7472 RESULT=pass
21083 22:25:04.800408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip>
21084 22:25:04.800747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip
21086 22:25:04.831770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip
21088 22:25:04.832224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip>
21089 22:25:04.862818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip>
21090 22:25:04.863229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip
21092 22:25:04.893436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7488 RESULT=pass>
21093 22:25:04.893891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7488 RESULT=pass
21095 22:25:04.925918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip>
21096 22:25:04.926371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip
21098 22:25:04.956840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip>
21099 22:25:04.957260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip
21101 22:25:04.987650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip>
21102 22:25:04.988044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip
21104 22:25:05.018649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7504 RESULT=pass
21106 22:25:05.019250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7504 RESULT=pass>
21107 22:25:05.049243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip>
21108 22:25:05.049639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip
21110 22:25:05.080274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip>
21111 22:25:05.080666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip
21113 22:25:05.111015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip>
21114 22:25:05.111422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip
21116 22:25:05.142145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7520 RESULT=pass>
21117 22:25:05.142610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7520 RESULT=pass
21119 22:25:05.172542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip>
21120 22:25:05.172992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip
21122 22:25:05.203726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip
21124 22:25:05.204344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip>
21125 22:25:05.234662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip
21127 22:25:05.235282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip>
21128 22:25:05.266004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7536 RESULT=pass
21130 22:25:05.266599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7536 RESULT=pass>
21131 22:25:05.296597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip>
21132 22:25:05.297056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip
21134 22:25:05.327070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip
21136 22:25:05.327540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip>
21137 22:25:05.357451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip>
21138 22:25:05.357818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip
21140 22:25:05.387773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7552 RESULT=pass>
21141 22:25:05.388131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7552 RESULT=pass
21143 22:25:05.417680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip>
21144 22:25:05.418033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip
21146 22:25:05.448722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip>
21147 22:25:05.449073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip
21149 22:25:05.478759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip>
21150 22:25:05.479113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip
21152 22:25:05.509253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7568 RESULT=pass
21154 22:25:05.509713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7568 RESULT=pass>
21155 22:25:05.540175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip>
21156 22:25:05.540533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip
21158 22:25:05.570255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip>
21159 22:25:05.570606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip
21161 22:25:05.600922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip
21163 22:25:05.601366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip>
21164 22:25:05.631026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7584 RESULT=pass>
21165 22:25:05.631379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7584 RESULT=pass
21167 22:25:05.661131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip>
21168 22:25:05.661483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip
21170 22:25:05.691289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip
21172 22:25:05.691805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip>
21173 22:25:05.721542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip>
21174 22:25:05.721917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip
21176 22:25:05.752566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7600 RESULT=pass>
21177 22:25:05.753064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7600 RESULT=pass
21179 22:25:05.782494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip>
21180 22:25:05.782985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip
21182 22:25:05.813632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip
21184 22:25:05.814214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip>
21185 22:25:05.844848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip
21187 22:25:05.845302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip>
21188 22:25:05.875900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7616 RESULT=pass>
21189 22:25:05.876316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7616 RESULT=pass
21191 22:25:05.906630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip>
21192 22:25:05.907086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip
21194 22:25:05.937131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip
21196 22:25:05.937597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip>
21197 22:25:05.968141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip
21199 22:25:05.968606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip>
21200 22:25:05.999191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7632 RESULT=pass
21202 22:25:05.999633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7632 RESULT=pass>
21203 22:25:06.029824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip>
21204 22:25:06.030309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip
21206 22:25:06.060577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip>
21207 22:25:06.061037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip
21209 22:25:06.100644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip>
21210 22:25:06.101102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip
21212 22:25:06.148125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7648 RESULT=pass>
21213 22:25:06.148598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7648 RESULT=pass
21215 22:25:06.178538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip>
21216 22:25:06.178998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip
21218 22:25:06.210071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip
21220 22:25:06.210649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip>
21221 22:25:06.241079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip
21223 22:25:06.241634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip>
21224 22:25:06.272798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7664 RESULT=pass
21226 22:25:06.273434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7664 RESULT=pass>
21227 22:25:06.303802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip>
21228 22:25:06.304248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip
21230 22:25:06.334930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip>
21231 22:25:06.335376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip
21233 22:25:06.365714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip>
21234 22:25:06.366181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip
21236 22:25:06.396524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7680 RESULT=pass>
21237 22:25:06.396998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7680 RESULT=pass
21239 22:25:06.427443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip
21241 22:25:06.428073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip>
21242 22:25:06.458327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip>
21243 22:25:06.458775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip
21245 22:25:06.489007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip>
21246 22:25:06.489362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip
21248 22:25:06.519330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7696 RESULT=pass
21250 22:25:06.519752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7696 RESULT=pass>
21251 22:25:06.549689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip>
21252 22:25:06.550027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip
21254 22:25:06.580309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip>
21255 22:25:06.580664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip
21257 22:25:06.611125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip
21259 22:25:06.611766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip>
21260 22:25:06.641774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7712 RESULT=pass
21262 22:25:06.642290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7712 RESULT=pass>
21263 22:25:06.672405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip
21265 22:25:06.672941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip>
21266 22:25:06.702520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip
21268 22:25:06.702983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip>
21269 22:25:06.733296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip>
21270 22:25:06.733671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip
21272 22:25:06.763720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7728 RESULT=pass>
21273 22:25:06.764066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7728 RESULT=pass
21275 22:25:06.794370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip>
21276 22:25:06.794708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip
21278 22:25:06.824438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip>
21279 22:25:06.824807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip
21281 22:25:06.855179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip
21283 22:25:06.855662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip>
21284 22:25:06.885487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7744 RESULT=pass>
21285 22:25:06.885851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7744 RESULT=pass
21287 22:25:06.916201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip>
21288 22:25:06.916556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip
21290 22:25:06.946199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip>
21291 22:25:06.946599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip
21293 22:25:06.976445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip
21295 22:25:06.976998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip>
21296 22:25:07.007890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7760 RESULT=pass
21298 22:25:07.008359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7760 RESULT=pass>
21299 22:25:07.037577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip>
21300 22:25:07.037935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip
21302 22:25:07.067793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip>
21303 22:25:07.068136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip
21305 22:25:07.098228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip>
21306 22:25:07.098571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip
21308 22:25:07.128585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7776 RESULT=pass>
21309 22:25:07.128935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7776 RESULT=pass
21311 22:25:07.158437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip>
21312 22:25:07.158995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip
21314 22:25:07.189065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip>
21315 22:25:07.189500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip
21317 22:25:07.220146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip>
21318 22:25:07.220588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip
21320 22:25:07.251281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7792 RESULT=pass>
21321 22:25:07.251559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7792 RESULT=pass
21323 22:25:07.281505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip>
21324 22:25:07.281809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip
21326 22:25:07.312417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip>
21327 22:25:07.312854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip
21329 22:25:07.342567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip>
21330 22:25:07.342970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip
21332 22:25:07.372563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7808 RESULT=pass>
21333 22:25:07.372863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7808 RESULT=pass
21335 22:25:07.403468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip>
21336 22:25:07.403736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip
21338 22:25:07.434379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip>
21339 22:25:07.434646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip
21341 22:25:07.465008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip>
21342 22:25:07.465450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip
21344 22:25:07.494853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7824 RESULT=pass>
21345 22:25:07.495208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7824 RESULT=pass
21347 22:25:07.525723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip>
21348 22:25:07.526076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip
21350 22:25:07.556088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip>
21351 22:25:07.556565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip
21353 22:25:07.587107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip>
21354 22:25:07.587583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip
21356 22:25:07.617462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7840 RESULT=pass>
21357 22:25:07.617988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7840 RESULT=pass
21359 22:25:07.648392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip>
21360 22:25:07.648864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip
21362 22:25:07.678486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip>
21363 22:25:07.678953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip
21365 22:25:07.709273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip>
21366 22:25:07.709697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip
21368 22:25:07.740516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7856 RESULT=pass>
21369 22:25:07.740950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7856 RESULT=pass
21371 22:25:07.771076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip>
21372 22:25:07.771543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip
21374 22:25:07.802093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip
21376 22:25:07.802542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip>
21377 22:25:07.834239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip>
21378 22:25:07.834577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip
21380 22:25:07.864629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7872 RESULT=pass>
21381 22:25:07.864943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7872 RESULT=pass
21383 22:25:07.894644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip>
21384 22:25:07.894956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip
21386 22:25:07.925241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip>
21387 22:25:07.925551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip
21389 22:25:07.955220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip>
21390 22:25:07.955529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip
21392 22:25:07.985981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7888 RESULT=pass>
21393 22:25:07.986290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7888 RESULT=pass
21395 22:25:08.016580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip>
21396 22:25:08.016910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip
21398 22:25:08.047039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip>
21399 22:25:08.047348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip
21401 22:25:08.077143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip>
21402 22:25:08.077452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip
21404 22:25:08.106857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7904 RESULT=pass>
21405 22:25:08.107208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7904 RESULT=pass
21407 22:25:08.137447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip>
21408 22:25:08.137786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip
21410 22:25:08.168119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip>
21411 22:25:08.168455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip
21413 22:25:08.198022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip>
21414 22:25:08.198373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip
21416 22:25:08.228961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7920 RESULT=pass>
21417 22:25:08.229305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7920 RESULT=pass
21419 22:25:08.259598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip
21421 22:25:08.260057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip>
21422 22:25:08.290023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip>
21423 22:25:08.290442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip
21425 22:25:08.320670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip
21427 22:25:08.321231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip>
21428 22:25:08.351904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7936 RESULT=pass>
21429 22:25:08.352323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7936 RESULT=pass
21431 22:25:08.382125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip>
21432 22:25:08.382482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip
21434 22:25:08.412913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip>
21435 22:25:08.413255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip
21437 22:25:08.443217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip>
21438 22:25:08.443542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip
21440 22:25:08.473500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7952 RESULT=pass>
21441 22:25:08.473827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7952 RESULT=pass
21443 22:25:08.503462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip
21445 22:25:08.503872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip>
21446 22:25:08.533885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip>
21447 22:25:08.534234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip
21449 22:25:08.564967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip>
21450 22:25:08.565315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip
21452 22:25:08.594862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7968 RESULT=pass>
21453 22:25:08.595186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7968 RESULT=pass
21455 22:25:08.625226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip>
21456 22:25:08.625544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip
21458 22:25:08.655728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip>
21459 22:25:08.656068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip
21461 22:25:08.685527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip>
21462 22:25:08.685885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip
21464 22:25:08.715697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7984 RESULT=pass>
21465 22:25:08.716051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7984 RESULT=pass
21467 22:25:08.745828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip>
21468 22:25:08.746271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip
21470 22:25:08.778049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip
21472 22:25:08.778683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip>
21473 22:25:08.813080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip>
21474 22:25:08.813523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip
21476 22:25:08.855486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8000 RESULT=pass
21478 22:25:08.856043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8000 RESULT=pass>
21479 22:25:08.887743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip
21481 22:25:08.888273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip>
21482 22:25:08.921680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip>
21483 22:25:08.922053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip
21485 22:25:08.954757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip>
21486 22:25:08.955218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip
21488 22:25:08.989066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8016 RESULT=pass>
21489 22:25:08.989374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8016 RESULT=pass
21491 22:25:09.024541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip>
21492 22:25:09.024818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip
21494 22:25:09.068375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip>
21495 22:25:09.068720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip
21497 22:25:09.101620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip>
21498 22:25:09.102111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip
21500 22:25:09.134757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8032 RESULT=pass>
21501 22:25:09.135306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8032 RESULT=pass
21503 22:25:09.167125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip>
21504 22:25:09.167577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip
21506 22:25:09.200050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip
21508 22:25:09.200790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip>
21509 22:25:09.232427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip>
21510 22:25:09.232961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip
21512 22:25:09.265383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8048 RESULT=pass>
21513 22:25:09.265906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8048 RESULT=pass
21515 22:25:09.297795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip>
21516 22:25:09.298280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip
21518 22:25:09.332529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip>
21519 22:25:09.332984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip
21521 22:25:09.363471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip
21523 22:25:09.364027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip>
21524 22:25:09.393988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8064 RESULT=pass>
21525 22:25:09.394438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8064 RESULT=pass
21527 22:25:09.424510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip>
21528 22:25:09.424914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip
21530 22:25:09.456421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip>
21531 22:25:09.456825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip
21533 22:25:09.488105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip>
21534 22:25:09.488536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip
21536 22:25:09.520671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8080 RESULT=pass>
21537 22:25:09.521140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8080 RESULT=pass
21539 22:25:09.554665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip>
21540 22:25:09.555078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip
21542 22:25:09.587193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip
21544 22:25:09.587703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip>
21545 22:25:09.619213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip>
21546 22:25:09.619672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip
21548 22:25:09.652470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8096 RESULT=pass
21550 22:25:09.652917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8096 RESULT=pass>
21551 22:25:09.685553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip>
21552 22:25:09.685975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip
21554 22:25:09.717419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip>
21555 22:25:09.717867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip
21557 22:25:09.748588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip>
21558 22:25:09.748991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip
21560 22:25:09.783026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8112 RESULT=pass>
21561 22:25:09.783536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8112 RESULT=pass
21563 22:25:09.817418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip
21565 22:25:09.817884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip>
21566 22:25:09.850004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip
21568 22:25:09.850582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip>
21569 22:25:09.886837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip>
21570 22:25:09.887234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip
21572 22:25:09.920303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8128 RESULT=pass>
21573 22:25:09.920697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8128 RESULT=pass
21575 22:25:09.953431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip>
21576 22:25:09.953881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip
21578 22:25:09.986083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip>
21579 22:25:09.986564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip
21581 22:25:10.018840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip>
21582 22:25:10.019286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip
21584 22:25:10.050593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8144 RESULT=pass>
21585 22:25:10.050976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8144 RESULT=pass
21587 22:25:10.081368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip
21589 22:25:10.081940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip>
21590 22:25:10.112502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip
21592 22:25:10.112949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip>
21593 22:25:10.144171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip
21595 22:25:10.144613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip>
21596 22:25:10.178388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8160 RESULT=pass>
21597 22:25:10.178861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8160 RESULT=pass
21599 22:25:10.212988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip>
21600 22:25:10.213463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip
21602 22:25:10.253990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip>
21603 22:25:10.254519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip
21605 22:25:10.285865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip>
21606 22:25:10.286326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip
21608 22:25:10.317197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8176 RESULT=pass>
21609 22:25:10.317644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8176 RESULT=pass
21611 22:25:10.347486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip
21613 22:25:10.347941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip>
21614 22:25:10.377705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip>
21615 22:25:10.378045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip
21617 22:25:10.408236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip>
21618 22:25:10.408594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip
21620 22:25:10.438692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8192 RESULT=pass>
21621 22:25:10.439042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8192 RESULT=pass
21623 22:25:10.468841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip
21625 22:25:10.469251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip>
21626 22:25:10.499437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip
21628 22:25:10.499856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip>
21629 22:25:10.530163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip>
21630 22:25:10.530509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip
21632 22:25:10.560741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 RESULT=pass>
21633 22:25:10.561083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 RESULT=pass
21635 22:25:10.591029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state RESULT=pass>
21636 22:25:10.591368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state RESULT=pass
21638 22:25:10.621451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set RESULT=pass
21640 22:25:10.621861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set RESULT=pass>
21641 22:25:10.652398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass>
21642 22:25:10.652733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass
21644 22:25:10.681869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_16 RESULT=pass>
21645 22:25:10.682212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_16 RESULT=pass
21647 22:25:10.711792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 RESULT=pass>
21648 22:25:10.712147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 RESULT=pass
21650 22:25:10.742150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 RESULT=pass>
21651 22:25:10.742506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 RESULT=pass
21653 22:25:10.772540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 RESULT=pass
21655 22:25:10.772982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 RESULT=pass>
21656 22:25:10.801833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_32 RESULT=pass>
21657 22:25:10.802194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_32 RESULT=pass
21659 22:25:10.832029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 RESULT=pass>
21660 22:25:10.832385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 RESULT=pass
21662 22:25:10.861818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 RESULT=pass>
21663 22:25:10.862174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 RESULT=pass
21665 22:25:10.892076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 RESULT=pass>
21666 22:25:10.892433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 RESULT=pass
21668 22:25:10.921457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_48 RESULT=pass>
21669 22:25:10.921811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_48 RESULT=pass
21671 22:25:10.951617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip>
21672 22:25:10.951973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip
21674 22:25:10.981440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip>
21675 22:25:10.981922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip
21677 22:25:11.011761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip>
21678 22:25:11.012225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip
21680 22:25:11.042269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_64 RESULT=pass>
21681 22:25:11.042744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_64 RESULT=pass
21683 22:25:11.072473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 RESULT=pass
21685 22:25:11.072960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 RESULT=pass>
21686 22:25:11.102899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 RESULT=pass
21688 22:25:11.103369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 RESULT=pass>
21689 22:25:11.134310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 RESULT=pass>
21690 22:25:11.134763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 RESULT=pass
21692 22:25:11.165536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_80 RESULT=pass
21694 22:25:11.165986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_80 RESULT=pass>
21695 22:25:11.196488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip>
21696 22:25:11.196905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip
21698 22:25:11.254372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip>
21699 22:25:11.254844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip
21701 22:25:11.285283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip>
21702 22:25:11.285702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip
21704 22:25:11.316517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_96 RESULT=pass>
21705 22:25:11.316965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_96 RESULT=pass
21707 22:25:11.346879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip>
21708 22:25:11.347338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip
21710 22:25:11.378174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip>
21711 22:25:11.378620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip
21713 22:25:11.408528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip>
21714 22:25:11.408964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip
21716 22:25:11.439190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_112 RESULT=pass>
21717 22:25:11.439643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_112 RESULT=pass
21719 22:25:11.470613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip>
21720 22:25:11.471073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip
21722 22:25:11.502205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip>
21723 22:25:11.502641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip
21725 22:25:11.533870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip>
21726 22:25:11.534325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip
21728 22:25:11.565107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_128 RESULT=pass>
21729 22:25:11.565552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_128 RESULT=pass
21731 22:25:11.596484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 RESULT=pass>
21732 22:25:11.596928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 RESULT=pass
21734 22:25:11.627659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 RESULT=pass>
21735 22:25:11.628095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 RESULT=pass
21737 22:25:11.660015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 RESULT=pass>
21738 22:25:11.660466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 RESULT=pass
21740 22:25:11.691154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_144 RESULT=pass
21742 22:25:11.691687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_144 RESULT=pass>
21743 22:25:11.722417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip>
21744 22:25:11.722854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip
21746 22:25:11.753169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip>
21747 22:25:11.753597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip
21749 22:25:11.784863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip>
21750 22:25:11.785323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip
21752 22:25:11.816182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_160 RESULT=pass>
21753 22:25:11.816664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_160 RESULT=pass
21755 22:25:11.846992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip>
21756 22:25:11.847364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip
21758 22:25:11.878569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip>
21759 22:25:11.878930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip
21761 22:25:11.909406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip>
21762 22:25:11.909801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip
21764 22:25:11.940102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_176 RESULT=pass>
21765 22:25:11.940468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_176 RESULT=pass
21767 22:25:11.971795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip
21769 22:25:11.972322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip>
21770 22:25:12.002933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip>
21771 22:25:12.003311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip
21773 22:25:12.040842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip
21775 22:25:12.041330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip>
21776 22:25:12.072502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_192 RESULT=pass>
21777 22:25:12.072841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_192 RESULT=pass
21779 22:25:12.103075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip>
21780 22:25:12.103437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip
21782 22:25:12.133749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip>
21783 22:25:12.134103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip
21785 22:25:12.173171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip>
21786 22:25:12.173633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip
21788 22:25:12.204576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_208 RESULT=pass
21790 22:25:12.205113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_208 RESULT=pass>
21791 22:25:12.235144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip>
21792 22:25:12.235554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip
21794 22:25:12.266528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip>
21795 22:25:12.266956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip
21797 22:25:12.297451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip>
21798 22:25:12.297916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip
21800 22:25:12.329327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_224 RESULT=pass
21802 22:25:12.329886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_224 RESULT=pass>
21803 22:25:12.360846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip>
21804 22:25:12.361290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip
21806 22:25:12.392163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip>
21807 22:25:12.392605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip
21809 22:25:12.422817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip>
21810 22:25:12.423284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip
21812 22:25:12.453108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_240 RESULT=pass
21814 22:25:12.453550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_240 RESULT=pass>
21815 22:25:12.484027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip>
21816 22:25:12.484440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip
21818 22:25:12.515826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip>
21819 22:25:12.516278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip
21821 22:25:12.546594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip>
21822 22:25:12.547046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip
21824 22:25:12.577659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_256 RESULT=pass>
21825 22:25:12.578125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_256 RESULT=pass
21827 22:25:12.608683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 RESULT=pass>
21828 22:25:12.609140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 RESULT=pass
21830 22:25:12.640057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 RESULT=pass
21832 22:25:12.640597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 RESULT=pass>
21833 22:25:12.670656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 RESULT=pass>
21834 22:25:12.671011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 RESULT=pass
21836 22:25:12.700783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_272 RESULT=pass
21838 22:25:12.701243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_272 RESULT=pass>
21839 22:25:12.731868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip>
21840 22:25:12.732232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip
21842 22:25:12.762205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip>
21843 22:25:12.762557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip
21845 22:25:12.792315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip>
21846 22:25:12.792636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip
21848 22:25:12.822776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_288 RESULT=pass>
21849 22:25:12.823092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_288 RESULT=pass
21851 22:25:12.853710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip>
21852 22:25:12.854029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip
21854 22:25:12.884332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip>
21855 22:25:12.884676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip
21857 22:25:12.914674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip>
21858 22:25:12.915005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip
21860 22:25:12.945945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_304 RESULT=pass
21862 22:25:12.946337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_304 RESULT=pass>
21863 22:25:12.976555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip
21865 22:25:12.977129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip>
21866 22:25:13.008302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip
21868 22:25:13.008880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip>
21869 22:25:13.040168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip
21871 22:25:13.040694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip>
21872 22:25:13.071136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_320 RESULT=pass>
21873 22:25:13.071490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_320 RESULT=pass
21875 22:25:13.103978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip>
21876 22:25:13.104317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip
21878 22:25:13.134537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip>
21879 22:25:13.134876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip
21881 22:25:13.164640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip>
21882 22:25:13.164958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip
21884 22:25:13.194201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_336 RESULT=pass>
21885 22:25:13.194557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_336 RESULT=pass
21887 22:25:13.224304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip>
21888 22:25:13.224662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip
21890 22:25:13.254395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip>
21891 22:25:13.254750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip
21893 22:25:13.284165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip>
21894 22:25:13.284521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip
21896 22:25:13.314199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_352 RESULT=pass>
21897 22:25:13.314560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_352 RESULT=pass
21899 22:25:13.344707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip>
21900 22:25:13.345064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip
21902 22:25:13.374923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip>
21903 22:25:13.375278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip
21905 22:25:13.405638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip>
21906 22:25:13.406018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip
21908 22:25:13.436251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_368 RESULT=pass
21910 22:25:13.436681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_368 RESULT=pass>
21911 22:25:13.466345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip>
21912 22:25:13.466695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip
21914 22:25:13.497114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip>
21915 22:25:13.497467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip
21917 22:25:13.527346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip
21919 22:25:13.527802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip>
21920 22:25:13.557556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_384 RESULT=pass>
21921 22:25:13.557937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_384 RESULT=pass
21923 22:25:13.587104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip>
21924 22:25:13.587466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip
21926 22:25:13.617177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip>
21927 22:25:13.617536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip
21929 22:25:13.648303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip>
21930 22:25:13.648661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip
21932 22:25:13.678689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_400 RESULT=pass>
21933 22:25:13.679048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_400 RESULT=pass
21935 22:25:13.708705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip>
21936 22:25:13.709061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip
21938 22:25:13.738960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip>
21939 22:25:13.739318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip
21941 22:25:13.769397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip>
21942 22:25:13.769769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip
21944 22:25:13.798904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_416 RESULT=pass>
21945 22:25:13.799271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_416 RESULT=pass
21947 22:25:13.828689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip>
21948 22:25:13.829052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip
21950 22:25:13.859072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip>
21951 22:25:13.859439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip
21953 22:25:13.889175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip>
21954 22:25:13.889543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip
21956 22:25:13.922513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_432 RESULT=pass
21958 22:25:13.923148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_432 RESULT=pass>
21959 22:25:13.953146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip
21961 22:25:13.953790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip>
21962 22:25:13.983409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip
21964 22:25:13.984038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip>
21965 22:25:14.014451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip
21967 22:25:14.014992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip>
21968 22:25:14.045229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_448 RESULT=pass>
21969 22:25:14.045566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_448 RESULT=pass
21971 22:25:14.074977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip>
21972 22:25:14.075318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip
21974 22:25:14.105570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip>
21975 22:25:14.105900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip
21977 22:25:14.136056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip>
21978 22:25:14.136394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip
21980 22:25:14.165518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_464 RESULT=pass>
21981 22:25:14.165866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_464 RESULT=pass
21983 22:25:14.196038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip>
21984 22:25:14.196371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip
21986 22:25:14.226319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip>
21987 22:25:14.226662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip
21989 22:25:14.256720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip>
21990 22:25:14.257166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip
21992 22:25:14.288098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_480 RESULT=pass>
21993 22:25:14.288442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_480 RESULT=pass
21995 22:25:14.318473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip>
21996 22:25:14.318827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip
21998 22:25:14.348664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip>
21999 22:25:14.349010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip
22001 22:25:14.378544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip>
22002 22:25:14.378890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip
22004 22:25:14.408023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_496 RESULT=pass>
22005 22:25:14.408361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_496 RESULT=pass
22007 22:25:14.437283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip>
22008 22:25:14.437620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip
22010 22:25:14.467916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip>
22011 22:25:14.468251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip
22013 22:25:14.497332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip>
22014 22:25:14.497673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip
22016 22:25:14.527845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_512 RESULT=pass>
22017 22:25:14.528181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_512 RESULT=pass
22019 22:25:14.558301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip
22021 22:25:14.558702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip>
22022 22:25:14.588771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip>
22023 22:25:14.589106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip
22025 22:25:14.619283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip
22027 22:25:14.619975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip>
22028 22:25:14.649172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_528 RESULT=pass>
22029 22:25:14.649540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_528 RESULT=pass
22031 22:25:14.678817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip>
22032 22:25:14.679150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip
22034 22:25:14.708614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip>
22035 22:25:14.708956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip
22037 22:25:14.738302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip>
22038 22:25:14.738643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip
22040 22:25:14.768238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_544 RESULT=pass>
22041 22:25:14.768578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_544 RESULT=pass
22043 22:25:14.797642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip>
22044 22:25:14.797993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip
22046 22:25:14.828838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip>
22047 22:25:14.829187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip
22049 22:25:14.861077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip>
22050 22:25:14.861413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip
22052 22:25:14.891836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_560 RESULT=pass>
22053 22:25:14.892184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_560 RESULT=pass
22055 22:25:14.922437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip>
22056 22:25:14.922880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip
22058 22:25:14.954145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip
22060 22:25:14.954655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip>
22061 22:25:14.984242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip>
22062 22:25:14.984575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip
22064 22:25:15.014542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_576 RESULT=pass>
22065 22:25:15.014882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_576 RESULT=pass
22067 22:25:15.044323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip>
22068 22:25:15.044666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip
22070 22:25:15.074411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip
22072 22:25:15.074934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip>
22073 22:25:15.104593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip>
22074 22:25:15.105042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip
22076 22:25:15.134352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_592 RESULT=pass>
22077 22:25:15.134693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_592 RESULT=pass
22079 22:25:15.164351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip>
22080 22:25:15.164683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip
22082 22:25:15.194055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip>
22083 22:25:15.194396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip
22085 22:25:15.224110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip>
22086 22:25:15.224464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip
22088 22:25:15.254036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_608 RESULT=pass>
22089 22:25:15.254375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_608 RESULT=pass
22091 22:25:15.284486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip>
22092 22:25:15.284827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip
22094 22:25:15.314578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip
22096 22:25:15.314990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip>
22097 22:25:15.345288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip>
22098 22:25:15.345625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip
22100 22:25:15.375468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_624 RESULT=pass
22102 22:25:15.375888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_624 RESULT=pass>
22103 22:25:15.405208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip>
22104 22:25:15.405544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip
22106 22:25:15.435857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip>
22107 22:25:15.436188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip
22109 22:25:15.465710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip>
22110 22:25:15.466047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip
22112 22:25:15.496242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_640 RESULT=pass>
22113 22:25:15.496661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_640 RESULT=pass
22115 22:25:15.526754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip>
22116 22:25:15.527215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip
22118 22:25:15.556889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip>
22119 22:25:15.557339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip
22121 22:25:15.587919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip>
22122 22:25:15.588381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip
22124 22:25:15.617866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_656 RESULT=pass>
22125 22:25:15.618304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_656 RESULT=pass
22127 22:25:15.648314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip
22129 22:25:15.648927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip>
22130 22:25:15.678219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip>
22131 22:25:15.678683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip
22133 22:25:15.708573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip
22135 22:25:15.709065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip>
22136 22:25:15.738706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_672 RESULT=pass>
22137 22:25:15.739066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_672 RESULT=pass
22139 22:25:15.768979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip
22141 22:25:15.769517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip>
22142 22:25:15.798780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip>
22143 22:25:15.799233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip
22145 22:25:15.828963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip>
22146 22:25:15.829416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip
22148 22:25:15.858980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_688 RESULT=pass
22150 22:25:15.859454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_688 RESULT=pass>
22151 22:25:15.889355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip>
22152 22:25:15.889679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip
22154 22:25:15.919238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip
22156 22:25:15.919893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip>
22157 22:25:15.950044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip
22159 22:25:15.950667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip>
22160 22:25:15.980599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_704 RESULT=pass>
22161 22:25:15.981082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_704 RESULT=pass
22163 22:25:16.010639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip>
22164 22:25:16.011118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip
22166 22:25:16.040896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip>
22167 22:25:16.041284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip
22169 22:25:16.070893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip>
22170 22:25:16.071251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip
22172 22:25:16.101253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_720 RESULT=pass>
22173 22:25:16.101703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_720 RESULT=pass
22175 22:25:16.131573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip
22177 22:25:16.132062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip>
22178 22:25:16.161861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip>
22179 22:25:16.162316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip
22181 22:25:16.195912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip
22183 22:25:16.196636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip>
22184 22:25:16.229537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_736 RESULT=pass>
22185 22:25:16.229965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_736 RESULT=pass
22187 22:25:16.263928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip
22189 22:25:16.264472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip>
22190 22:25:16.297231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip>
22191 22:25:16.297571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip
22193 22:25:16.341039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip>
22194 22:25:16.341506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip
22196 22:25:16.385278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_752 RESULT=pass>
22197 22:25:16.385691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_752 RESULT=pass
22199 22:25:16.416263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip>
22200 22:25:16.416701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip
22202 22:25:16.447400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip
22204 22:25:16.447941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip>
22205 22:25:16.477874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip>
22206 22:25:16.478277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip
22208 22:25:16.508069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_768 RESULT=pass>
22209 22:25:16.508483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_768 RESULT=pass
22211 22:25:16.538608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip>
22212 22:25:16.539004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip
22214 22:25:16.569427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip>
22215 22:25:16.569842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip
22217 22:25:16.600882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip>
22218 22:25:16.601285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip
22220 22:25:16.630877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_784 RESULT=pass>
22221 22:25:16.631299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_784 RESULT=pass
22223 22:25:16.661499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip>
22224 22:25:16.661965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip
22226 22:25:16.692228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip>
22227 22:25:16.692676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip
22229 22:25:16.722745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip>
22230 22:25:16.723144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip
22232 22:25:16.753511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_800 RESULT=pass>
22233 22:25:16.753915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_800 RESULT=pass
22235 22:25:16.784446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip>
22236 22:25:16.784835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip
22238 22:25:16.814639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip>
22239 22:25:16.815097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip
22241 22:25:16.844804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip>
22242 22:25:16.845249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip
22244 22:25:16.875465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_816 RESULT=pass
22246 22:25:16.875994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_816 RESULT=pass>
22247 22:25:16.905234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip
22249 22:25:16.905708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip>
22250 22:25:16.935140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip
22252 22:25:16.935701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip>
22253 22:25:16.965355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip>
22254 22:25:16.965770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip
22256 22:25:16.996638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_832 RESULT=pass>
22257 22:25:16.997070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_832 RESULT=pass
22259 22:25:17.026877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip>
22260 22:25:17.027323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip
22262 22:25:17.057134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip>
22263 22:25:17.057587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip
22265 22:25:17.087469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip
22267 22:25:17.088004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip>
22268 22:25:17.117688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_848 RESULT=pass>
22269 22:25:17.118139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_848 RESULT=pass
22271 22:25:17.148134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip>
22272 22:25:17.148534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip
22274 22:25:17.181912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip>
22275 22:25:17.182373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip
22277 22:25:17.212270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip>
22278 22:25:17.212679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip
22280 22:25:17.242459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_864 RESULT=pass>
22281 22:25:17.242858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_864 RESULT=pass
22283 22:25:17.272462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip
22285 22:25:17.272963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip>
22286 22:25:17.302448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip>
22287 22:25:17.302857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip
22289 22:25:17.332619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip>
22290 22:25:17.333048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip
22292 22:25:17.363407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_880 RESULT=pass
22294 22:25:17.363983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_880 RESULT=pass>
22295 22:25:17.393954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip>
22296 22:25:17.394387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip
22298 22:25:17.425033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip>
22299 22:25:17.425430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip
22301 22:25:17.456116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip
22303 22:25:17.456547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip>
22304 22:25:17.486401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_896 RESULT=pass
22306 22:25:17.486829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_896 RESULT=pass>
22307 22:25:17.517155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip>
22308 22:25:17.517618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip
22310 22:25:17.547897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip>
22311 22:25:17.548353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip
22313 22:25:17.578712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip>
22314 22:25:17.579170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip
22316 22:25:17.608953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_912 RESULT=pass
22318 22:25:17.609511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_912 RESULT=pass>
22319 22:25:17.639141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip>
22320 22:25:17.639603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip
22322 22:25:17.669332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip>
22323 22:25:17.669782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip
22325 22:25:17.699968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip>
22326 22:25:17.700426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip
22328 22:25:17.729897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_928 RESULT=pass>
22329 22:25:17.730327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_928 RESULT=pass
22331 22:25:17.760465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip>
22332 22:25:17.760862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip
22334 22:25:17.790797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip>
22335 22:25:17.791201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip
22337 22:25:17.821524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip>
22338 22:25:17.821991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip
22340 22:25:17.851064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_944 RESULT=pass>
22341 22:25:17.851514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_944 RESULT=pass
22343 22:25:17.881414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip
22345 22:25:17.881981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip>
22346 22:25:17.911647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip>
22347 22:25:17.912045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip
22349 22:25:17.942304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip
22351 22:25:17.942863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip>
22352 22:25:17.972886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_960 RESULT=pass>
22353 22:25:17.973337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_960 RESULT=pass
22355 22:25:18.003367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip
22357 22:25:18.003913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip>
22358 22:25:18.033673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip>
22359 22:25:18.034127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip
22361 22:25:18.063981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip>
22362 22:25:18.064443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip
22364 22:25:18.093738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_976 RESULT=pass>
22365 22:25:18.094199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_976 RESULT=pass
22367 22:25:18.124499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip>
22368 22:25:18.124970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip
22370 22:25:18.154328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip>
22371 22:25:18.154683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip
22373 22:25:18.184333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip>
22374 22:25:18.184665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip
22376 22:25:18.214132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_992 RESULT=pass>
22377 22:25:18.214477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_992 RESULT=pass
22379 22:25:18.244046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip>
22380 22:25:18.244390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip
22382 22:25:18.273544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip>
22383 22:25:18.273889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip
22385 22:25:18.303757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip>
22386 22:25:18.304093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip
22388 22:25:18.333086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 RESULT=pass>
22389 22:25:18.333433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 RESULT=pass
22391 22:25:18.362658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip>
22392 22:25:18.362988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip
22394 22:25:18.393684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip>
22395 22:25:18.394010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip
22397 22:25:18.424083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip>
22398 22:25:18.424420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip
22400 22:25:18.453418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 RESULT=pass>
22401 22:25:18.453766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 RESULT=pass
22403 22:25:18.482988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip>
22404 22:25:18.483315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip
22406 22:25:18.512876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip>
22407 22:25:18.513213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip
22409 22:25:18.543526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip
22411 22:25:18.543958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip>
22412 22:25:18.573224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 RESULT=pass>
22413 22:25:18.573560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 RESULT=pass
22415 22:25:18.603214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip
22417 22:25:18.603652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip>
22418 22:25:18.633198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip>
22419 22:25:18.633535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip
22421 22:25:18.663061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip>
22422 22:25:18.663390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip
22424 22:25:18.692600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 RESULT=pass>
22425 22:25:18.692910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 RESULT=pass
22427 22:25:18.722369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip>
22428 22:25:18.722681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip
22430 22:25:18.753110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip>
22431 22:25:18.753590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip
22433 22:25:18.784423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip>
22434 22:25:18.784896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip
22436 22:25:18.816085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 RESULT=pass>
22437 22:25:18.816563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 RESULT=pass
22439 22:25:18.847062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip>
22440 22:25:18.847591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip
22442 22:25:18.878563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip>
22443 22:25:18.878928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip
22445 22:25:18.909958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip>
22446 22:25:18.910426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip
22448 22:25:18.941679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 RESULT=pass
22450 22:25:18.942201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 RESULT=pass>
22451 22:25:18.972512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip>
22452 22:25:18.972922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip
22454 22:25:19.004599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip>
22455 22:25:19.005062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip
22457 22:25:19.036218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip>
22458 22:25:19.036668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip
22460 22:25:19.067773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 RESULT=pass>
22461 22:25:19.068246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 RESULT=pass
22463 22:25:19.098832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip>
22464 22:25:19.099296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip
22466 22:25:19.129642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip
22468 22:25:19.130095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip>
22469 22:25:19.161249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip>
22470 22:25:19.161599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip
22472 22:25:19.192526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 RESULT=pass>
22473 22:25:19.192867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 RESULT=pass
22475 22:25:19.224383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip>
22476 22:25:19.224761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip
22478 22:25:19.254428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip>
22479 22:25:19.254775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip
22481 22:25:19.284234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip>
22482 22:25:19.284585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip
22484 22:25:19.314115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 RESULT=pass>
22485 22:25:19.314570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 RESULT=pass
22487 22:25:19.344356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip
22489 22:25:19.344878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip>
22490 22:25:19.374897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip>
22491 22:25:19.375307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip
22493 22:25:19.405274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip>
22494 22:25:19.405695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip
22496 22:25:19.435796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 RESULT=pass
22498 22:25:19.436249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 RESULT=pass>
22499 22:25:19.465591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip>
22500 22:25:19.465967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip
22502 22:25:19.496014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip>
22503 22:25:19.496365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip
22505 22:25:19.526467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip>
22506 22:25:19.526826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip
22508 22:25:19.556336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 RESULT=pass>
22509 22:25:19.556686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 RESULT=pass
22511 22:25:19.585956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip>
22512 22:25:19.586305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip
22514 22:25:19.615802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip>
22515 22:25:19.616152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip
22517 22:25:19.645345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip>
22518 22:25:19.645690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip
22520 22:25:19.675621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 RESULT=pass>
22521 22:25:19.675970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 RESULT=pass
22523 22:25:19.705193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip>
22524 22:25:19.705543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip
22526 22:25:19.735489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip
22528 22:25:19.735966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip>
22529 22:25:19.765367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip>
22530 22:25:19.765690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip
22532 22:25:19.794768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 RESULT=pass>
22533 22:25:19.795111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 RESULT=pass
22535 22:25:19.824972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip>
22536 22:25:19.825308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip
22538 22:25:19.854950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip>
22539 22:25:19.855292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip
22541 22:25:19.884781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip>
22542 22:25:19.885115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip
22544 22:25:19.915165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 RESULT=pass>
22545 22:25:19.915499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 RESULT=pass
22547 22:25:19.945420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip>
22548 22:25:19.945735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip
22550 22:25:19.975506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip
22552 22:25:19.975952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip>
22553 22:25:20.005391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip>
22554 22:25:20.005741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip
22556 22:25:20.035168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 RESULT=pass
22558 22:25:20.035600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 RESULT=pass>
22559 22:25:20.065323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip>
22560 22:25:20.065678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip
22562 22:25:20.095045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip>
22563 22:25:20.095408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip
22565 22:25:20.124848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip>
22566 22:25:20.125199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip
22568 22:25:20.155577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 RESULT=pass
22570 22:25:20.156151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 RESULT=pass>
22571 22:25:20.185926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip>
22572 22:25:20.186404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip
22574 22:25:20.216214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip>
22575 22:25:20.216685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip
22577 22:25:20.246318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip
22579 22:25:20.246884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip>
22580 22:25:20.276438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 RESULT=pass>
22581 22:25:20.276905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 RESULT=pass
22583 22:25:20.306745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip>
22584 22:25:20.307215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip
22586 22:25:20.337342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip>
22587 22:25:20.337828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip
22589 22:25:20.368326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip>
22590 22:25:20.368804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip
22592 22:25:20.398205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 RESULT=pass>
22593 22:25:20.398670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 RESULT=pass
22595 22:25:20.428533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip>
22596 22:25:20.428995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip
22598 22:25:20.458805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip>
22599 22:25:20.459275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip
22601 22:25:20.489354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip>
22602 22:25:20.489830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip
22604 22:25:20.519669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 RESULT=pass>
22605 22:25:20.520146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 RESULT=pass
22607 22:25:20.550351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip>
22608 22:25:20.550817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip
22610 22:25:20.580294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip>
22611 22:25:20.580648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip
22613 22:25:20.610005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip>
22614 22:25:20.610327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip
22616 22:25:20.639831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 RESULT=pass>
22617 22:25:20.640178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 RESULT=pass
22619 22:25:20.669471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip>
22620 22:25:20.669810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip
22622 22:25:20.699726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip>
22623 22:25:20.700062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip
22625 22:25:20.729398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip>
22626 22:25:20.729736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip
22628 22:25:20.759119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 RESULT=pass>
22629 22:25:20.759465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 RESULT=pass
22631 22:25:20.789018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip
22633 22:25:20.789595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip>
22634 22:25:20.819041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip>
22635 22:25:20.819508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip
22637 22:25:20.849082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip>
22638 22:25:20.849541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip
22640 22:25:20.879901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 RESULT=pass>
22641 22:25:20.880307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 RESULT=pass
22643 22:25:20.910290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip
22645 22:25:20.910733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip>
22646 22:25:20.940594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip
22648 22:25:20.941156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip>
22649 22:25:20.970523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip>
22650 22:25:20.970995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip
22652 22:25:21.000931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 RESULT=pass>
22653 22:25:21.001273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 RESULT=pass
22655 22:25:21.030943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip>
22656 22:25:21.031388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip
22658 22:25:21.061185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip>
22659 22:25:21.061536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip
22661 22:25:21.091199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip>
22662 22:25:21.091677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip
22664 22:25:21.122298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 RESULT=pass
22666 22:25:21.122866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 RESULT=pass>
22667 22:25:21.152504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip>
22668 22:25:21.152978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip
22670 22:25:21.182879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip>
22671 22:25:21.183357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip
22673 22:25:21.213357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip>
22674 22:25:21.213830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip
22676 22:25:21.244360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 RESULT=pass>
22677 22:25:21.244844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 RESULT=pass
22679 22:25:21.274223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip>
22680 22:25:21.274704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip
22682 22:25:21.305217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip>
22683 22:25:21.305699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip
22685 22:25:21.335433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip
22687 22:25:21.335998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip>
22688 22:25:21.365432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 RESULT=pass>
22689 22:25:21.365917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 RESULT=pass
22691 22:25:21.396035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip>
22692 22:25:21.396503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip
22694 22:25:21.426154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip>
22695 22:25:21.426620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip
22697 22:25:21.477389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip
22699 22:25:21.477998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip>
22700 22:25:21.511944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 RESULT=pass
22702 22:25:21.512494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 RESULT=pass>
22703 22:25:21.542511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip>
22704 22:25:21.542954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip
22706 22:25:21.573316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip>
22707 22:25:21.573755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip
22709 22:25:21.604202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip
22711 22:25:21.604734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip>
22712 22:25:21.634671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 RESULT=pass
22714 22:25:21.635255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 RESULT=pass>
22715 22:25:21.665730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip
22717 22:25:21.666269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip>
22718 22:25:21.696341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip
22720 22:25:21.696889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip>
22721 22:25:21.726515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip>
22722 22:25:21.726875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip
22724 22:25:21.756473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 RESULT=pass>
22725 22:25:21.756830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 RESULT=pass
22727 22:25:21.786697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip
22729 22:25:21.787121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip>
22730 22:25:21.816831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip
22732 22:25:21.817248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip>
22733 22:25:21.847025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip
22735 22:25:21.847434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip>
22736 22:25:21.877915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 RESULT=pass
22738 22:25:21.878350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 RESULT=pass>
22739 22:25:21.908664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip>
22740 22:25:21.909033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip
22742 22:25:21.938992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip>
22743 22:25:21.939334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip
22745 22:25:21.969001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip>
22746 22:25:21.969469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip
22748 22:25:21.999061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 RESULT=pass
22750 22:25:21.999619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 RESULT=pass>
22751 22:25:22.028907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip>
22752 22:25:22.029324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip
22754 22:25:22.059063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip
22756 22:25:22.059510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip>
22757 22:25:22.089435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip>
22758 22:25:22.089858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip
22760 22:25:22.120127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 RESULT=pass>
22761 22:25:22.120458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 RESULT=pass
22763 22:25:22.150120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip>
22764 22:25:22.150460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip
22766 22:25:22.180470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip>
22767 22:25:22.180879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip
22769 22:25:22.210664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip>
22770 22:25:22.211075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip
22772 22:25:22.241150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 RESULT=pass
22774 22:25:22.241695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 RESULT=pass>
22775 22:25:22.270976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip>
22776 22:25:22.271379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip
22778 22:25:22.302143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip>
22779 22:25:22.302611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip
22781 22:25:22.332511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip>
22782 22:25:22.332907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip
22784 22:25:22.362992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 RESULT=pass>
22785 22:25:22.363359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 RESULT=pass
22787 22:25:22.393038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip
22789 22:25:22.393618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip>
22790 22:25:22.422967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip>
22791 22:25:22.423422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip
22793 22:25:22.453918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip>
22794 22:25:22.454377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip
22796 22:25:22.484119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 RESULT=pass
22798 22:25:22.484555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 RESULT=pass>
22799 22:25:22.514561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip
22801 22:25:22.514989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip>
22802 22:25:22.544905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip>
22803 22:25:22.545299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip
22805 22:25:22.575625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip>
22806 22:25:22.576027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip
22808 22:25:22.605446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 RESULT=pass>
22809 22:25:22.605865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 RESULT=pass
22811 22:25:22.636534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip>
22812 22:25:22.636931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip
22814 22:25:22.666877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip>
22815 22:25:22.667282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip
22817 22:25:22.697496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip>
22818 22:25:22.697965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip
22820 22:25:22.728139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 RESULT=pass>
22821 22:25:22.728584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 RESULT=pass
22823 22:25:22.758408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip>
22824 22:25:22.758848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip
22826 22:25:22.788497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip>
22827 22:25:22.788947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip
22829 22:25:22.818796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip>
22830 22:25:22.819238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip
22832 22:25:22.849642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 RESULT=pass>
22833 22:25:22.850118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 RESULT=pass
22835 22:25:22.880088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip
22837 22:25:22.880589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip>
22838 22:25:22.910404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip>
22839 22:25:22.910858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip
22841 22:25:22.940765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip>
22842 22:25:22.941206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip
22844 22:25:22.970683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 RESULT=pass>
22845 22:25:22.971128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 RESULT=pass
22847 22:25:23.001047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip>
22848 22:25:23.001457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip
22850 22:25:23.031465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip
22852 22:25:23.031979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip>
22853 22:25:23.061592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip>
22854 22:25:23.062053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip
22856 22:25:23.092292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 RESULT=pass>
22857 22:25:23.092745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 RESULT=pass
22859 22:25:23.122600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip
22861 22:25:23.123134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip>
22862 22:25:23.152781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip>
22863 22:25:23.153217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip
22865 22:25:23.183137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip
22867 22:25:23.183698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip>
22868 22:25:23.213460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 RESULT=pass>
22869 22:25:23.213834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 RESULT=pass
22871 22:25:23.244336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip>
22872 22:25:23.244694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip
22874 22:25:23.275025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip>
22875 22:25:23.275371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip
22877 22:25:23.305630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip>
22878 22:25:23.305950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip
22880 22:25:23.336106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 RESULT=pass>
22881 22:25:23.336439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 RESULT=pass
22883 22:25:23.366322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip
22885 22:25:23.366862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip>
22886 22:25:23.396992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip>
22887 22:25:23.397377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip
22889 22:25:23.428160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip>
22890 22:25:23.428506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip
22892 22:25:23.458391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 RESULT=pass
22894 22:25:23.458949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 RESULT=pass>
22895 22:25:23.489029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip>
22896 22:25:23.489376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip
22898 22:25:23.520136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip>
22899 22:25:23.520602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip
22901 22:25:23.551180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip
22903 22:25:23.551743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip>
22904 22:25:23.581976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 RESULT=pass
22906 22:25:23.582537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 RESULT=pass>
22907 22:25:23.613221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip>
22908 22:25:23.613705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip
22910 22:25:23.646155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip>
22911 22:25:23.646605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip
22913 22:25:23.677460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip>
22914 22:25:23.677890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip
22916 22:25:23.708493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 RESULT=pass>
22917 22:25:23.708907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 RESULT=pass
22919 22:25:23.740117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip>
22920 22:25:23.740486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip
22922 22:25:23.770862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip>
22923 22:25:23.771201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip
22925 22:25:23.801697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip>
22926 22:25:23.802054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip
22928 22:25:23.832891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 RESULT=pass>
22929 22:25:23.833227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 RESULT=pass
22931 22:25:23.863589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip>
22932 22:25:23.863929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip
22934 22:25:23.894109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip
22936 22:25:23.894541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip>
22937 22:25:23.924616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip>
22938 22:25:23.924957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip
22940 22:25:23.955084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 RESULT=pass
22942 22:25:23.955509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 RESULT=pass>
22943 22:25:23.985588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip>
22944 22:25:23.985943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip
22946 22:25:24.016441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip>
22947 22:25:24.016779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip
22949 22:25:24.047420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip
22951 22:25:24.047830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip>
22952 22:25:24.078200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 RESULT=pass>
22953 22:25:24.078544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 RESULT=pass
22955 22:25:24.109095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip>
22956 22:25:24.109562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip
22958 22:25:24.140118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip>
22959 22:25:24.140556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip
22961 22:25:24.170751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip>
22962 22:25:24.171161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip
22964 22:25:24.201302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 RESULT=pass>
22965 22:25:24.201759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 RESULT=pass
22967 22:25:24.232350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip>
22968 22:25:24.232779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip
22970 22:25:24.263937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip>
22971 22:25:24.264392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip
22973 22:25:24.294507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip>
22974 22:25:24.294912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip
22976 22:25:24.325131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 RESULT=pass>
22977 22:25:24.325539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 RESULT=pass
22979 22:25:24.356114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip>
22980 22:25:24.356527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip
22982 22:25:24.386611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip>
22983 22:25:24.387020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip
22985 22:25:24.418312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip>
22986 22:25:24.418727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip
22988 22:25:24.449159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 RESULT=pass>
22989 22:25:24.449571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 RESULT=pass
22991 22:25:24.480209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip>
22992 22:25:24.480622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip
22994 22:25:24.510815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip
22996 22:25:24.511309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip>
22997 22:25:24.541836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip
22999 22:25:24.542462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip>
23000 22:25:24.572601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 RESULT=pass>
23001 22:25:24.573055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 RESULT=pass
23003 22:25:24.603783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip>
23004 22:25:24.604258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip
23006 22:25:24.634552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip
23008 22:25:24.635114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip>
23009 22:25:24.665258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip>
23010 22:25:24.665704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip
23012 22:25:24.696283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 RESULT=pass>
23013 22:25:24.696751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 RESULT=pass
23015 22:25:24.726941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip>
23016 22:25:24.727404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip
23018 22:25:24.758042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip>
23019 22:25:24.758508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip
23021 22:25:24.788887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip>
23022 22:25:24.789358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip
23024 22:25:24.820683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 RESULT=pass>
23025 22:25:24.821158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 RESULT=pass
23027 22:25:24.851660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip>
23028 22:25:24.852117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip
23030 22:25:24.882309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip>
23031 22:25:24.882776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip
23033 22:25:24.912903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip>
23034 22:25:24.913367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip
23036 22:25:24.943787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 RESULT=pass>
23037 22:25:24.944244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 RESULT=pass
23039 22:25:24.974369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip>
23040 22:25:24.974835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip
23042 22:25:25.005322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip>
23043 22:25:25.005793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip
23045 22:25:25.036603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip
23047 22:25:25.037164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip>
23048 22:25:25.068211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 RESULT=pass>
23049 22:25:25.068685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 RESULT=pass
23051 22:25:25.099158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip>
23052 22:25:25.099620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip
23054 22:25:25.130448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip>
23055 22:25:25.130911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip
23057 22:25:25.160868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip>
23058 22:25:25.161333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip
23060 22:25:25.191835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 RESULT=pass>
23061 22:25:25.192297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 RESULT=pass
23063 22:25:25.222354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip>
23064 22:25:25.222820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip
23066 22:25:25.253819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip>
23067 22:25:25.254291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip
23069 22:25:25.285333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip>
23070 22:25:25.285881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip
23072 22:25:25.321333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 RESULT=pass
23074 22:25:25.322066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 RESULT=pass>
23075 22:25:25.354020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip>
23076 22:25:25.354548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip
23078 22:25:25.387402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip
23080 22:25:25.387807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip>
23081 22:25:25.420615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip
23083 22:25:25.420913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip>
23084 22:25:25.452599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 RESULT=pass>
23085 22:25:25.452958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 RESULT=pass
23087 22:25:25.484446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip
23089 22:25:25.484988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip>
23090 22:25:25.514908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip>
23091 22:25:25.515255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip
23093 22:25:25.545209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip>
23094 22:25:25.545552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip
23096 22:25:25.575045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 RESULT=pass>
23097 22:25:25.575394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 RESULT=pass
23099 22:25:25.605184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip>
23100 22:25:25.605556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip
23102 22:25:25.635291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip
23104 22:25:25.635759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip>
23105 22:25:25.665388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip>
23106 22:25:25.665749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip
23108 22:25:25.695104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 RESULT=pass
23110 22:25:25.695527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 RESULT=pass>
23111 22:25:25.725205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip>
23112 22:25:25.725546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip
23114 22:25:25.755552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip>
23115 22:25:25.755894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip
23117 22:25:25.785680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip>
23118 22:25:25.786023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip
23120 22:25:25.816511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 RESULT=pass>
23121 22:25:25.816965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 RESULT=pass
23123 22:25:25.846953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip>
23124 22:25:25.847363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip
23126 22:25:25.877070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip>
23127 22:25:25.877441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip
23129 22:25:25.907056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip>
23130 22:25:25.907400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip
23132 22:25:25.937118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 RESULT=pass
23134 22:25:25.937533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 RESULT=pass>
23135 22:25:25.967027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip>
23136 22:25:25.967389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip
23138 22:25:25.997119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip>
23139 22:25:25.997482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip
23141 22:25:26.027060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip>
23142 22:25:26.027410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip
23144 22:25:26.057869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 RESULT=pass>
23145 22:25:26.058232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 RESULT=pass
23147 22:25:26.088228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip
23149 22:25:26.088686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip>
23150 22:25:26.117795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip>
23151 22:25:26.118147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip
23153 22:25:26.148288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip>
23154 22:25:26.148631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip
23156 22:25:26.178405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 RESULT=pass
23158 22:25:26.178810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 RESULT=pass>
23159 22:25:26.210623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip>
23160 22:25:26.210959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip
23162 22:25:26.245237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip>
23163 22:25:26.245753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip
23165 22:25:26.277529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip
23167 22:25:26.278093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip>
23168 22:25:26.308998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 RESULT=pass
23170 22:25:26.309600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 RESULT=pass>
23171 22:25:26.340337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip
23173 22:25:26.340889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip>
23174 22:25:26.370991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip>
23175 22:25:26.371357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip
23177 22:25:26.402776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip>
23178 22:25:26.403160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip
23180 22:25:26.433852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 RESULT=pass>
23181 22:25:26.434256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 RESULT=pass
23183 22:25:26.464868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip>
23184 22:25:26.465267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip
23186 22:25:26.496335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip>
23187 22:25:26.496726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip
23189 22:25:26.527737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip>
23190 22:25:26.528144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip
23192 22:25:26.557353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 RESULT=pass>
23193 22:25:26.557779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 RESULT=pass
23195 22:25:26.613625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip>
23196 22:25:26.614109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip
23198 22:25:26.646689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip>
23199 22:25:26.647040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip
23201 22:25:26.677923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip>
23202 22:25:26.678238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip
23204 22:25:26.708633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 RESULT=pass>
23205 22:25:26.709064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 RESULT=pass
23207 22:25:26.741067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip>
23208 22:25:26.741551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip
23210 22:25:26.774256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip>
23211 22:25:26.774736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip
23213 22:25:26.805627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip
23215 22:25:26.806132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip>
23216 22:25:26.836657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 RESULT=pass>
23217 22:25:26.837034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 RESULT=pass
23219 22:25:26.867005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip
23221 22:25:26.867477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip>
23222 22:25:26.896995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip>
23223 22:25:26.897325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip
23225 22:25:26.926855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip>
23226 22:25:26.927254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip
23228 22:25:26.956812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 RESULT=pass>
23229 22:25:26.957161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 RESULT=pass
23231 22:25:26.987210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip
23233 22:25:26.987660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip>
23234 22:25:27.019840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip>
23235 22:25:27.020253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip
23237 22:25:27.050697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip>
23238 22:25:27.051070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip
23240 22:25:27.082395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 RESULT=pass
23242 22:25:27.082850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 RESULT=pass>
23243 22:25:27.113630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip>
23244 22:25:27.114093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip
23246 22:25:27.146524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip>
23247 22:25:27.146982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip
23249 22:25:27.178429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip
23251 22:25:27.179010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip>
23252 22:25:27.209306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 RESULT=pass>
23253 22:25:27.209778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 RESULT=pass
23255 22:25:27.240483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip>
23256 22:25:27.240953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip
23258 22:25:27.272171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip>
23259 22:25:27.272650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip
23261 22:25:27.303986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip>
23262 22:25:27.304443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip
23264 22:25:27.335303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 RESULT=pass
23266 22:25:27.335853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 RESULT=pass>
23267 22:25:27.366800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip>
23268 22:25:27.367240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip
23270 22:25:27.398160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip
23272 22:25:27.398613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip>
23273 22:25:27.429668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip>
23274 22:25:27.430137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip
23276 22:25:27.460621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 RESULT=pass
23278 22:25:27.461182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 RESULT=pass>
23279 22:25:27.491153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip>
23280 22:25:27.491599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip
23282 22:25:27.522089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip>
23283 22:25:27.522524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip
23285 22:25:27.552322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip>
23286 22:25:27.552713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip
23288 22:25:27.582723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 RESULT=pass>
23289 22:25:27.583133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 RESULT=pass
23291 22:25:27.613140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip>
23292 22:25:27.613555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip
23294 22:25:27.644106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip>
23295 22:25:27.644568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip
23297 22:25:27.674878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip
23299 22:25:27.675427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip>
23300 22:25:27.705574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 RESULT=pass>
23301 22:25:27.705936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 RESULT=pass
23303 22:25:27.736467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip>
23304 22:25:27.736795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip
23306 22:25:27.766553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip>
23307 22:25:27.766900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip
23309 22:25:27.797050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip>
23310 22:25:27.797413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip
23312 22:25:27.828321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 RESULT=pass>
23313 22:25:27.828668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 RESULT=pass
23315 22:25:27.858595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip>
23316 22:25:27.858957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip
23318 22:25:27.888772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip>
23319 22:25:27.889126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip
23321 22:25:27.919018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip>
23322 22:25:27.919374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip
23324 22:25:27.949455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 RESULT=pass
23326 22:25:27.949876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 RESULT=pass>
23327 22:25:27.979962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip>
23328 22:25:27.980304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip
23330 22:25:28.010411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip>
23331 22:25:28.010753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip
23333 22:25:28.040464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip>
23334 22:25:28.040802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip
23336 22:25:28.070835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 RESULT=pass>
23337 22:25:28.071171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 RESULT=pass
23339 22:25:28.100834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip>
23340 22:25:28.101170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip
23342 22:25:28.130982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip>
23343 22:25:28.131317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip
23345 22:25:28.160889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip>
23346 22:25:28.161226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip
23348 22:25:28.191105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 RESULT=pass
23350 22:25:28.191522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 RESULT=pass>
23351 22:25:28.221663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip
23353 22:25:28.222068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip>
23354 22:25:28.252799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip>
23355 22:25:28.253141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip
23357 22:25:28.283458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip
23359 22:25:28.283868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip>
23360 22:25:28.297623 <47>[ 213.370515] systemd-journald[107]: Sent WATCHDOG=1 notification.
23361 22:25:28.318829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 RESULT=pass>
23362 22:25:28.319164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 RESULT=pass
23364 22:25:28.349171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip>
23365 22:25:28.349506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip
23367 22:25:28.379160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip
23369 22:25:28.379733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip>
23370 22:25:28.410632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip>
23371 22:25:28.411108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip
23373 22:25:28.441151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 RESULT=pass>
23374 22:25:28.441631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 RESULT=pass
23376 22:25:28.471781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip
23378 22:25:28.472226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip>
23379 22:25:28.502380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip>
23380 22:25:28.502803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip
23382 22:25:28.532663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip>
23383 22:25:28.533084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip
23385 22:25:28.563099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 RESULT=pass>
23386 22:25:28.563522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 RESULT=pass
23388 22:25:28.593759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip>
23389 22:25:28.594189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip
23391 22:25:28.624594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip>
23392 22:25:28.625018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip
23394 22:25:28.654988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip
23396 22:25:28.655451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip>
23397 22:25:28.685616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 RESULT=pass>
23398 22:25:28.686053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 RESULT=pass
23400 22:25:28.716283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip
23402 22:25:28.716854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip>
23403 22:25:28.747010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip>
23404 22:25:28.747491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip
23406 22:25:28.777186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip>
23407 22:25:28.777582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip
23409 22:25:28.809038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 RESULT=pass>
23410 22:25:28.809468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 RESULT=pass
23412 22:25:28.839238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip
23414 22:25:28.839791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip>
23415 22:25:28.869300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip>
23416 22:25:28.869636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip
23418 22:25:28.899525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip
23420 22:25:28.899955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip>
23421 22:25:28.929497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 RESULT=pass>
23422 22:25:28.929834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 RESULT=pass
23424 22:25:28.960023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip>
23425 22:25:28.960358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip
23427 22:25:28.989608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip>
23428 22:25:28.989950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip
23430 22:25:29.019167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip>
23431 22:25:29.019504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip
23433 22:25:29.049841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 RESULT=pass>
23434 22:25:29.050191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 RESULT=pass
23436 22:25:29.080287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip>
23437 22:25:29.080626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip
23439 22:25:29.109756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip>
23440 22:25:29.110097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip
23442 22:25:29.142066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip>
23443 22:25:29.142438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip
23445 22:25:29.172800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 RESULT=pass>
23446 22:25:29.173149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 RESULT=pass
23448 22:25:29.203703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip>
23449 22:25:29.204050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip
23451 22:25:29.234666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip>
23452 22:25:29.235010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip
23454 22:25:29.265697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip>
23455 22:25:29.266038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip
23457 22:25:29.296271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 RESULT=pass>
23458 22:25:29.296610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 RESULT=pass
23460 22:25:29.326046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip>
23461 22:25:29.326409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip
23463 22:25:29.356176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip>
23464 22:25:29.356544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip
23466 22:25:29.387022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip>
23467 22:25:29.387364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip
23469 22:25:29.416769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 RESULT=pass>
23470 22:25:29.417110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 RESULT=pass
23472 22:25:29.446955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip>
23473 22:25:29.447302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip
23475 22:25:29.477321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip>
23476 22:25:29.477679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip
23478 22:25:29.507185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip
23480 22:25:29.507718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip>
23481 22:25:29.537291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 RESULT=pass>
23482 22:25:29.537642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 RESULT=pass
23484 22:25:29.567420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip
23486 22:25:29.567865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip>
23487 22:25:29.598560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip
23489 22:25:29.598998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip>
23490 22:25:29.629304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip>
23491 22:25:29.629764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip
23493 22:25:29.661640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 RESULT=pass>
23494 22:25:29.662216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 RESULT=pass
23496 22:25:29.693488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip
23498 22:25:29.694052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip>
23499 22:25:29.724298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip>
23500 22:25:29.724708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip
23502 22:25:29.754678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip>
23503 22:25:29.755154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip
23505 22:25:29.785806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 RESULT=pass>
23506 22:25:29.786291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 RESULT=pass
23508 22:25:29.816559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip>
23509 22:25:29.817001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip
23511 22:25:29.847084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip>
23512 22:25:29.847515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip
23514 22:25:29.877813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip
23516 22:25:29.878350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip>
23517 22:25:29.908214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 RESULT=pass>
23518 22:25:29.908664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 RESULT=pass
23520 22:25:29.938885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip
23522 22:25:29.939473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip>
23523 22:25:29.969475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip>
23524 22:25:29.969928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip
23526 22:25:30.000491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip
23528 22:25:30.001062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip>
23529 22:25:30.031941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 RESULT=pass
23531 22:25:30.032497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 RESULT=pass>
23532 22:25:30.062519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip
23534 22:25:30.063079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip>
23535 22:25:30.093001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip>
23536 22:25:30.093451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip
23538 22:25:30.123378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip
23540 22:25:30.123938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip>
23541 22:25:30.154110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 RESULT=pass
23543 22:25:30.154635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 RESULT=pass>
23544 22:25:30.184325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip>
23545 22:25:30.184673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip
23547 22:25:30.215944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip>
23548 22:25:30.216288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip
23550 22:25:30.246041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip>
23551 22:25:30.246385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip
23553 22:25:30.276168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 RESULT=pass>
23554 22:25:30.276507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 RESULT=pass
23556 22:25:30.306633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip>
23557 22:25:30.306986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip
23559 22:25:30.337314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip>
23560 22:25:30.337667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip
23562 22:25:30.368292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip>
23563 22:25:30.368635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip
23565 22:25:30.398809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 RESULT=pass>
23566 22:25:30.399158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 RESULT=pass
23568 22:25:30.429719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip>
23569 22:25:30.430175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip
23571 22:25:30.460657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip>
23572 22:25:30.461115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip
23574 22:25:30.492017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip>
23575 22:25:30.492359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip
23577 22:25:30.522318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 RESULT=pass>
23578 22:25:30.522680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 RESULT=pass
23580 22:25:30.552330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip>
23581 22:25:30.552683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip
23583 22:25:30.582316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip>
23584 22:25:30.582660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip
23586 22:25:30.612730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip
23588 22:25:30.613182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip>
23589 22:25:30.643243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 RESULT=pass
23591 22:25:30.643695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 RESULT=pass>
23592 22:25:30.674280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip
23594 22:25:30.674712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip>
23595 22:25:30.705038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip>
23596 22:25:30.705446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip
23598 22:25:30.736084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip>
23599 22:25:30.736487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip
23601 22:25:30.767383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 RESULT=pass
23603 22:25:30.767820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 RESULT=pass>
23604 22:25:30.798390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip>
23605 22:25:30.798790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip
23607 22:25:30.829349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip>
23608 22:25:30.829823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip
23610 22:25:30.860043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip>
23611 22:25:30.860514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip
23613 22:25:30.892391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 RESULT=pass
23615 22:25:30.892962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 RESULT=pass>
23616 22:25:30.923538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip
23618 22:25:30.924097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip>
23619 22:25:30.954097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip>
23620 22:25:30.954537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip
23622 22:25:30.985216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip
23624 22:25:30.985775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip>
23625 22:25:31.016590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 RESULT=pass>
23626 22:25:31.017045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 RESULT=pass
23628 22:25:31.047026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip>
23629 22:25:31.047447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip
23631 22:25:31.080263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip>
23632 22:25:31.080743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip
23634 22:25:31.113463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip>
23635 22:25:31.113935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip
23637 22:25:31.144341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 RESULT=pass>
23638 22:25:31.144785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 RESULT=pass
23640 22:25:31.174500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip>
23641 22:25:31.174941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip
23643 22:25:31.206004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip>
23644 22:25:31.206479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip
23646 22:25:31.236433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip
23648 22:25:31.236930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip>
23649 22:25:31.266438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 RESULT=pass>
23650 22:25:31.266884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 RESULT=pass
23652 22:25:31.296925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip>
23653 22:25:31.297369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip
23655 22:25:31.327509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip
23657 22:25:31.328047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip>
23658 22:25:31.358728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip>
23659 22:25:31.359171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip
23661 22:25:31.389142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 RESULT=pass>
23662 22:25:31.389575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 RESULT=pass
23664 22:25:31.420213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip>
23665 22:25:31.420651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip
23667 22:25:31.450716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip>
23668 22:25:31.451155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip
23670 22:25:31.481334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip
23672 22:25:31.481871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip>
23673 22:25:31.512127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 RESULT=pass
23675 22:25:31.512723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 RESULT=pass>
23676 22:25:31.543008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip
23678 22:25:31.543541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip>
23679 22:25:31.573787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip>
23680 22:25:31.574210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip
23682 22:25:31.604124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip>
23683 22:25:31.604578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip
23685 22:25:31.634642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 RESULT=pass>
23686 22:25:31.635097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 RESULT=pass
23688 22:25:31.665847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip>
23689 22:25:31.666254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip
23691 22:25:31.717551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip>
23692 22:25:31.718014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip
23694 22:25:31.752202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip
23696 22:25:31.752753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip>
23697 22:25:31.783128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 RESULT=pass>
23698 22:25:31.783570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 RESULT=pass
23700 22:25:31.813816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip>
23701 22:25:31.814271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip
23703 22:25:31.844304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip>
23704 22:25:31.844662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip
23706 22:25:31.874398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip>
23707 22:25:31.874729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip
23709 22:25:31.904506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 RESULT=pass>
23710 22:25:31.904853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 RESULT=pass
23712 22:25:31.934788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip>
23713 22:25:31.935155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip
23715 22:25:31.965194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip>
23716 22:25:31.965543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip
23718 22:25:31.995517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip
23720 22:25:31.995941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip>
23721 22:25:32.026115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 RESULT=pass>
23722 22:25:32.026568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 RESULT=pass
23724 22:25:32.056553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip
23726 22:25:32.057084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip>
23727 22:25:32.087141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip>
23728 22:25:32.087581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip
23730 22:25:32.118175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip>
23731 22:25:32.118623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip
23733 22:25:32.149467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 RESULT=pass
23735 22:25:32.150031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 RESULT=pass>
23736 22:25:32.180572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip>
23737 22:25:32.181011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip
23739 22:25:32.212893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip
23741 22:25:32.213434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip>
23742 22:25:32.244243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip>
23743 22:25:32.244701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip
23745 22:25:32.275044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 RESULT=pass
23747 22:25:32.275549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 RESULT=pass>
23748 22:25:32.305336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip>
23749 22:25:32.305688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip
23751 22:25:32.336122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip>
23752 22:25:32.336557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip
23754 22:25:32.367497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip
23756 22:25:32.368061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip>
23757 22:25:32.398179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 RESULT=pass
23759 22:25:32.398721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 RESULT=pass>
23760 22:25:32.428419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip>
23761 22:25:32.428848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip
23763 22:25:32.458997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip>
23764 22:25:32.459471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip
23766 22:25:32.490013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip>
23767 22:25:32.490470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip
23769 22:25:32.520381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 RESULT=pass>
23770 22:25:32.520815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 RESULT=pass
23772 22:25:32.550576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip>
23773 22:25:32.550903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip
23775 22:25:32.581529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip>
23776 22:25:32.581866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip
23778 22:25:32.612356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip>
23779 22:25:32.612686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip
23781 22:25:32.642475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 RESULT=pass>
23782 22:25:32.642796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 RESULT=pass
23784 22:25:32.672839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip>
23785 22:25:32.673192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip
23787 22:25:32.703658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip>
23788 22:25:32.704115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip
23790 22:25:32.734339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip>
23791 22:25:32.734686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip
23793 22:25:32.765426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 RESULT=pass>
23794 22:25:32.765764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 RESULT=pass
23796 22:25:32.796540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip>
23797 22:25:32.797002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip
23799 22:25:32.827072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip
23801 22:25:32.827638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip>
23802 22:25:32.857418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip>
23803 22:25:32.857812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip
23805 22:25:32.888260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 RESULT=pass>
23806 22:25:32.888664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 RESULT=pass
23808 22:25:32.918900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip>
23809 22:25:32.919329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip
23811 22:25:32.949769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip>
23812 22:25:32.950185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip
23814 22:25:32.980922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip>
23815 22:25:32.981339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip
23817 22:25:33.012669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 RESULT=pass>
23818 22:25:33.013065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 RESULT=pass
23820 22:25:33.042679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip>
23821 22:25:33.043044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip
23823 22:25:33.072301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip>
23824 22:25:33.072663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip
23826 22:25:33.102438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip>
23827 22:25:33.102799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip
23829 22:25:33.132385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 RESULT=pass>
23830 22:25:33.132749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 RESULT=pass
23832 22:25:33.162019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip>
23833 22:25:33.162380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip
23835 22:25:33.193278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip>
23836 22:25:33.193644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip
23838 22:25:33.223721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip>
23839 22:25:33.224082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip
23841 22:25:33.253483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 RESULT=pass>
23842 22:25:33.253847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 RESULT=pass
23844 22:25:33.282966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip>
23845 22:25:33.283332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip
23847 22:25:33.313075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip>
23848 22:25:33.313438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip
23850 22:25:33.343847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip>
23851 22:25:33.344212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip
23853 22:25:33.373682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 RESULT=pass>
23854 22:25:33.374039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 RESULT=pass
23856 22:25:33.403771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip>
23857 22:25:33.404126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip
23859 22:25:33.433787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip>
23860 22:25:33.434162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip
23862 22:25:33.464003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip>
23863 22:25:33.464365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip
23865 22:25:33.493607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 RESULT=pass>
23866 22:25:33.493980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 RESULT=pass
23868 22:25:33.523810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip
23870 22:25:33.524257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip>
23871 22:25:33.553444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip>
23872 22:25:33.553798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip
23874 22:25:33.583734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip>
23875 22:25:33.584089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip
23877 22:25:33.613378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 RESULT=pass>
23878 22:25:33.613857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 RESULT=pass
23880 22:25:33.643393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip
23882 22:25:33.643864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip>
23883 22:25:33.673217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip>
23884 22:25:33.673578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip
23886 22:25:33.703033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip>
23887 22:25:33.703392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip
23889 22:25:33.733587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 RESULT=pass>
23890 22:25:33.733957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 RESULT=pass
23892 22:25:33.763876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip>
23893 22:25:33.764233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip
23895 22:25:33.793851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip>
23896 22:25:33.794206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip
23898 22:25:33.824392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip>
23899 22:25:33.824747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip
23901 22:25:33.854024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 RESULT=pass>
23902 22:25:33.854383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 RESULT=pass
23904 22:25:33.883882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip>
23905 22:25:33.884236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip
23907 22:25:33.913841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip>
23908 22:25:33.914210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip
23910 22:25:33.944255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip>
23911 22:25:33.944620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip
23913 22:25:33.974943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 RESULT=pass>
23914 22:25:33.975307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 RESULT=pass
23916 22:25:34.004827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip>
23917 22:25:34.005191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip
23919 22:25:34.035153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip
23921 22:25:34.035588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip>
23922 22:25:34.065199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip>
23923 22:25:34.065561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip
23925 22:25:34.095078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 RESULT=pass>
23926 22:25:34.095446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 RESULT=pass
23928 22:25:34.124903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip>
23929 22:25:34.125272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip
23931 22:25:34.156170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip>
23932 22:25:34.156535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip
23934 22:25:34.186083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip>
23935 22:25:34.186448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip
23937 22:25:34.216293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 RESULT=pass>
23938 22:25:34.216651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 RESULT=pass
23940 22:25:34.246235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip>
23941 22:25:34.246590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip
23943 22:25:34.276242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip>
23944 22:25:34.276605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip
23946 22:25:34.306556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip>
23947 22:25:34.306924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip
23949 22:25:34.341158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 RESULT=pass>
23950 22:25:34.341601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 RESULT=pass
23952 22:25:34.371918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip>
23953 22:25:34.372388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip
23955 22:25:34.403437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip
23957 22:25:34.404053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip>
23958 22:25:34.434857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip
23960 22:25:34.435423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip>
23961 22:25:34.465008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 RESULT=pass>
23962 22:25:34.465486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 RESULT=pass
23964 22:25:34.495184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip>
23965 22:25:34.495649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip
23967 22:25:34.525631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip>
23968 22:25:34.526122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip
23970 22:25:34.556146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip>
23971 22:25:34.556614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip
23973 22:25:34.586060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 RESULT=pass>
23974 22:25:34.586525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 RESULT=pass
23976 22:25:34.616720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip>
23977 22:25:34.617195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip
23979 22:25:34.646963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip>
23980 22:25:34.647316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip
23982 22:25:34.676890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip>
23983 22:25:34.677249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip
23985 22:25:34.708060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 RESULT=pass>
23986 22:25:34.708413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 RESULT=pass
23988 22:25:34.737679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip>
23989 22:25:34.738007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip
23991 22:25:34.768201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip>
23992 22:25:34.768542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip
23994 22:25:34.797744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip>
23995 22:25:34.798079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip
23997 22:25:34.827818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 RESULT=pass>
23998 22:25:34.828155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 RESULT=pass
24000 22:25:34.857169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip>
24001 22:25:34.857478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip
24003 22:25:34.887102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip>
24004 22:25:34.887437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip
24006 22:25:34.916784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip>
24007 22:25:34.917118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip
24009 22:25:34.946861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 RESULT=pass>
24010 22:25:34.947197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 RESULT=pass
24012 22:25:34.976622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip>
24013 22:25:34.976957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip
24015 22:25:35.006621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip>
24016 22:25:35.006955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip
24018 22:25:35.036309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip>
24019 22:25:35.036616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip
24021 22:25:35.066226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 RESULT=pass>
24022 22:25:35.066561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 RESULT=pass
24024 22:25:35.096002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip>
24025 22:25:35.096337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip
24027 22:25:35.126393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip>
24028 22:25:35.126729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip
24030 22:25:35.156273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip>
24031 22:25:35.156608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip
24033 22:25:35.185970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 RESULT=pass>
24034 22:25:35.186304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 RESULT=pass
24036 22:25:35.215829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip>
24037 22:25:35.216139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip
24039 22:25:35.245401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip>
24040 22:25:35.245742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip
24042 22:25:35.276133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip>
24043 22:25:35.276469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip
24045 22:25:35.312784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 RESULT=pass
24047 22:25:35.313328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 RESULT=pass>
24048 22:25:35.354789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip>
24049 22:25:35.355278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip
24051 22:25:35.388510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip>
24052 22:25:35.388954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip
24054 22:25:35.423430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip
24056 22:25:35.423917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip>
24057 22:25:35.456755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 RESULT=pass
24059 22:25:35.457228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 RESULT=pass>
24060 22:25:35.488856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip
24062 22:25:35.489316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip>
24063 22:25:35.519952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip>
24064 22:25:35.520349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip
24066 22:25:35.552355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip>
24067 22:25:35.552777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip
24069 22:25:35.582856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 RESULT=pass>
24070 22:25:35.583333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 RESULT=pass
24072 22:25:35.616944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip
24074 22:25:35.617700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip>
24075 22:25:35.649537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip>
24076 22:25:35.650101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip
24078 22:25:35.681377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip>
24079 22:25:35.681865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip
24081 22:25:35.713722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 RESULT=pass>
24082 22:25:35.714173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 RESULT=pass
24084 22:25:35.745204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip>
24085 22:25:35.745557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip
24087 22:25:35.776333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip>
24088 22:25:35.776770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip
24090 22:25:35.806593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip
24092 22:25:35.807193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip>
24093 22:25:35.836798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 RESULT=pass>
24094 22:25:35.837183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 RESULT=pass
24096 22:25:35.868451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip>
24097 22:25:35.868903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip
24099 22:25:35.899418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip
24101 22:25:35.900023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip>
24102 22:25:35.930789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip>
24103 22:25:35.931254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip
24105 22:25:35.962872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 RESULT=pass>
24106 22:25:35.963330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 RESULT=pass
24108 22:25:35.994817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip>
24109 22:25:35.995238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip
24111 22:25:36.026392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip>
24112 22:25:36.026799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip
24114 22:25:36.059452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip
24116 22:25:36.059906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip>
24117 22:25:36.092399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 RESULT=pass>
24118 22:25:36.092825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 RESULT=pass
24120 22:25:36.124123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip>
24121 22:25:36.124523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip
24123 22:25:36.156363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip>
24124 22:25:36.156768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip
24126 22:25:36.187154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip>
24127 22:25:36.187599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip
24129 22:25:36.217968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 RESULT=pass>
24130 22:25:36.218411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 RESULT=pass
24132 22:25:36.249722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip>
24133 22:25:36.250167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip
24135 22:25:36.283901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip>
24136 22:25:36.284363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip
24138 22:25:36.317486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip
24140 22:25:36.317951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip>
24141 22:25:36.349361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 RESULT=pass>
24142 22:25:36.349776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 RESULT=pass
24144 22:25:36.382049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip
24146 22:25:36.382504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip>
24147 22:25:36.414306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip>
24148 22:25:36.414785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip
24150 22:25:36.446206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip>
24151 22:25:36.446555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip
24153 22:25:36.478327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 RESULT=pass>
24154 22:25:36.478680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 RESULT=pass
24156 22:25:36.515946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip>
24157 22:25:36.516334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip
24159 22:25:36.546739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip
24161 22:25:36.547218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip>
24162 22:25:36.577728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip>
24163 22:25:36.578134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip
24165 22:25:36.608497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 RESULT=pass>
24166 22:25:36.609003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 RESULT=pass
24168 22:25:36.640303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip>
24169 22:25:36.640645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip
24171 22:25:36.673471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip
24173 22:25:36.673855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip>
24174 22:25:36.707505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip
24176 22:25:36.708135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip>
24177 22:25:36.741670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 RESULT=pass>
24178 22:25:36.742119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 RESULT=pass
24180 22:25:36.773872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip
24182 22:25:36.774421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip>
24183 22:25:36.805666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip>
24184 22:25:36.806047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip
24186 22:25:36.866990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip
24188 22:25:36.867427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip>
24189 22:25:36.898936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 RESULT=pass>
24190 22:25:36.899448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 RESULT=pass
24192 22:25:36.931011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip
24194 22:25:36.931553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip>
24195 22:25:36.962300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip>
24196 22:25:36.962724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip
24198 22:25:36.993386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip>
24199 22:25:36.993741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip
24201 22:25:37.024392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 RESULT=pass>
24202 22:25:37.024732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 RESULT=pass
24204 22:25:37.054436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip>
24205 22:25:37.054784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip
24207 22:25:37.084865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip>
24208 22:25:37.085233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip
24210 22:25:37.115754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip>
24211 22:25:37.116114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip
24213 22:25:37.146285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 RESULT=pass>
24214 22:25:37.146749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 RESULT=pass
24216 22:25:37.176846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip>
24217 22:25:37.177268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip
24219 22:25:37.208512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip
24221 22:25:37.209043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip>
24222 22:25:37.240047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip
24224 22:25:37.240581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip>
24225 22:25:37.269997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 RESULT=pass
24227 22:25:37.270577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 RESULT=pass>
24228 22:25:37.300236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip>
24229 22:25:37.300700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip
24231 22:25:37.330254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip>
24232 22:25:37.330560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip
24234 22:25:37.361245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip>
24235 22:25:37.361564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip
24237 22:25:37.392285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 RESULT=pass>
24238 22:25:37.392688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 RESULT=pass
24240 22:25:37.422742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip>
24241 22:25:37.423112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip
24243 22:25:37.453682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip>
24244 22:25:37.454024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip
24246 22:25:37.484520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip>
24247 22:25:37.484982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip
24249 22:25:37.515074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 RESULT=pass>
24250 22:25:37.515521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 RESULT=pass
24252 22:25:37.546080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip>
24253 22:25:37.546519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip
24255 22:25:37.576954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip>
24256 22:25:37.577398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip
24258 22:25:37.608439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip>
24259 22:25:37.608877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip
24261 22:25:37.638849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 RESULT=pass>
24262 22:25:37.639271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 RESULT=pass
24264 22:25:37.669531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip>
24265 22:25:37.669961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip
24267 22:25:37.700361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip>
24268 22:25:37.700739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip
24270 22:25:37.730988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip>
24271 22:25:37.731331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip
24273 22:25:37.761893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 RESULT=pass>
24274 22:25:37.762359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 RESULT=pass
24276 22:25:37.792783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip>
24277 22:25:37.793245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip
24279 22:25:37.823476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip
24281 22:25:37.824096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip>
24282 22:25:37.854362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip>
24283 22:25:37.854823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip
24285 22:25:37.884623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 RESULT=pass>
24286 22:25:37.885075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 RESULT=pass
24288 22:25:37.915843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip>
24289 22:25:37.916321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip
24291 22:25:37.946112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip>
24292 22:25:37.946499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip
24294 22:25:37.976625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip>
24295 22:25:37.977091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip
24297 22:25:38.010552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 RESULT=pass>
24298 22:25:38.011040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 RESULT=pass
24300 22:25:38.043813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip>
24301 22:25:38.044368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip
24303 22:25:38.075933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip>
24304 22:25:38.076407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip
24306 22:25:38.107069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip>
24307 22:25:38.107449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip
24309 22:25:38.140440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 RESULT=pass
24311 22:25:38.141013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 RESULT=pass>
24312 22:25:38.171755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip
24314 22:25:38.172329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip>
24315 22:25:38.205533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip
24317 22:25:38.206302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip>
24318 22:25:38.238342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip
24320 22:25:38.238921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip>
24321 22:25:38.269619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 RESULT=pass>
24322 22:25:38.270032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 RESULT=pass
24324 22:25:38.301274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip>
24325 22:25:38.301674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip
24327 22:25:38.332163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip>
24328 22:25:38.332528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip
24330 22:25:38.364297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip>
24331 22:25:38.364704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip
24333 22:25:38.395826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 RESULT=pass
24335 22:25:38.396290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 RESULT=pass>
24336 22:25:38.430776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip
24338 22:25:38.431340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip>
24339 22:25:38.462380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip
24341 22:25:38.462648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip>
24342 22:25:38.495325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip
24344 22:25:38.495892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip>
24345 22:25:38.531996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 RESULT=pass>
24346 22:25:38.532373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 RESULT=pass
24348 22:25:38.564714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip>
24349 22:25:38.565093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip
24351 22:25:38.595887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip>
24352 22:25:38.596261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip
24354 22:25:38.627103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip>
24355 22:25:38.627470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip
24357 22:25:38.657703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 RESULT=pass>
24358 22:25:38.658079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 RESULT=pass
24360 22:25:38.688415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip>
24361 22:25:38.688828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip
24363 22:25:38.719036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip>
24364 22:25:38.719495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip
24366 22:25:38.750312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip>
24367 22:25:38.750746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip
24369 22:25:38.780875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 RESULT=pass>
24370 22:25:38.781213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 RESULT=pass
24372 22:25:38.811417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip
24374 22:25:38.811843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip>
24375 22:25:38.841402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip>
24376 22:25:38.841754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip
24378 22:25:38.872083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip>
24379 22:25:38.872426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip
24381 22:25:38.902392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 RESULT=pass
24383 22:25:38.903048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 RESULT=pass>
24384 22:25:38.933040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip>
24385 22:25:38.933366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip
24387 22:25:38.963758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip>
24388 22:25:38.964123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip
24390 22:25:38.994263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip>
24391 22:25:38.994605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip
24393 22:25:39.025089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 RESULT=pass>
24394 22:25:39.025436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 RESULT=pass
24396 22:25:39.055413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip
24398 22:25:39.055848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip>
24399 22:25:39.085380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip>
24400 22:25:39.085858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip
24402 22:25:39.117687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip
24404 22:25:39.118310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip>
24405 22:25:39.148514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 RESULT=pass>
24406 22:25:39.148958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 RESULT=pass
24408 22:25:39.179068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip>
24409 22:25:39.179513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip
24411 22:25:39.210199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip>
24412 22:25:39.210609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip
24414 22:25:39.241076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip>
24415 22:25:39.241482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip
24417 22:25:39.272224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 RESULT=pass
24419 22:25:39.272656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 RESULT=pass>
24420 22:25:39.302663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip>
24421 22:25:39.303062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip
24423 22:25:39.333797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip>
24424 22:25:39.334242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip
24426 22:25:39.364968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip>
24427 22:25:39.365405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip
24429 22:25:39.394995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 RESULT=pass
24431 22:25:39.395503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 RESULT=pass>
24432 22:25:39.425876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip>
24433 22:25:39.426342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip
24435 22:25:39.456997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip>
24436 22:25:39.457443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip
24438 22:25:39.487452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip
24440 22:25:39.487997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip>
24441 22:25:39.518332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 RESULT=pass
24443 22:25:39.518891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 RESULT=pass>
24444 22:25:39.550576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip>
24445 22:25:39.550941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip
24447 22:25:39.583350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip
24449 22:25:39.583797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip>
24450 22:25:39.616675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip>
24451 22:25:39.617019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip
24453 22:25:39.648945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 RESULT=pass>
24454 22:25:39.649287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 RESULT=pass
24456 22:25:39.681244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip>
24457 22:25:39.681608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip
24459 22:25:39.713738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip
24461 22:25:39.714477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip>
24462 22:25:39.746572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip>
24463 22:25:39.746960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip
24465 22:25:39.779688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 RESULT=pass>
24466 22:25:39.780107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 RESULT=pass
24468 22:25:39.819018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip>
24469 22:25:39.819473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip
24471 22:25:39.853044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip>
24472 22:25:39.853430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip
24474 22:25:39.885707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip>
24475 22:25:39.886057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip
24477 22:25:39.919505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 RESULT=pass
24479 22:25:39.919984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 RESULT=pass>
24480 22:25:39.955024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip>
24481 22:25:39.955368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip
24483 22:25:39.987866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip
24485 22:25:39.988357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip>
24486 22:25:40.020109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip>
24487 22:25:40.020450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip
24489 22:25:40.052531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 RESULT=pass>
24490 22:25:40.052883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 RESULT=pass
24492 22:25:40.084734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip>
24493 22:25:40.085085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip
24495 22:25:40.116071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip>
24496 22:25:40.116428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip
24498 22:25:40.150327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip>
24499 22:25:40.150688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip
24501 22:25:40.181366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 RESULT=pass>
24502 22:25:40.181683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 RESULT=pass
24504 22:25:40.212250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip>
24505 22:25:40.212594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip
24507 22:25:40.242826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip
24509 22:25:40.243241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip>
24510 22:25:40.272947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip>
24511 22:25:40.273286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip
24513 22:25:40.303125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 RESULT=pass>
24514 22:25:40.303479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 RESULT=pass
24516 22:25:40.333088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip>
24517 22:25:40.333427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip
24519 22:25:40.363041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip>
24520 22:25:40.363387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip
24522 22:25:40.394060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip>
24523 22:25:40.394401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip
24525 22:25:40.424072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 RESULT=pass>
24526 22:25:40.424410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 RESULT=pass
24528 22:25:40.453989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip>
24529 22:25:40.454343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip
24531 22:25:40.484384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip
24533 22:25:40.484802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip>
24534 22:25:40.514843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip>
24535 22:25:40.515189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip
24537 22:25:40.545188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 RESULT=pass>
24538 22:25:40.545530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 RESULT=pass
24540 22:25:40.575968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip>
24541 22:25:40.576306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip
24543 22:25:40.606091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip>
24544 22:25:40.606435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip
24546 22:25:40.638445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip>
24547 22:25:40.638827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip
24549 22:25:40.670706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 RESULT=pass>
24550 22:25:40.671078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 RESULT=pass
24552 22:25:40.701283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip
24554 22:25:40.701785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip>
24555 22:25:40.732237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip
24557 22:25:40.732650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip>
24558 22:25:40.762245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip>
24559 22:25:40.762603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip
24561 22:25:40.792976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 RESULT=pass>
24562 22:25:40.793320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 RESULT=pass
24564 22:25:40.822995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip>
24565 22:25:40.823346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip
24567 22:25:40.853039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip>
24568 22:25:40.853404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip
24570 22:25:40.883414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip
24572 22:25:40.883840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip>
24573 22:25:40.913249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 RESULT=pass>
24574 22:25:40.913593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 RESULT=pass
24576 22:25:40.947426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip
24578 22:25:40.947959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip>
24579 22:25:40.980383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip>
24580 22:25:40.980743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip
24582 22:25:41.010831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip>
24583 22:25:41.011171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip
24585 22:25:41.041485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 RESULT=pass>
24586 22:25:41.041823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 RESULT=pass
24588 22:25:41.071593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip>
24589 22:25:41.071932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip
24591 22:25:41.101522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip>
24592 22:25:41.101872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip
24594 22:25:41.132203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip>
24595 22:25:41.132538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip
24597 22:25:41.162133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 RESULT=pass>
24598 22:25:41.162477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 RESULT=pass
24600 22:25:41.192284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip>
24601 22:25:41.192625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip
24603 22:25:41.222831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip>
24604 22:25:41.223169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip
24606 22:25:41.252880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip>
24607 22:25:41.253243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip
24609 22:25:41.282600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 RESULT=pass>
24610 22:25:41.282958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 RESULT=pass
24612 22:25:41.313731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip>
24613 22:25:41.314172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip
24615 22:25:41.344435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip>
24616 22:25:41.344786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip
24618 22:25:41.375158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip>
24619 22:25:41.375501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip
24621 22:25:41.405114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 RESULT=pass
24623 22:25:41.405535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 RESULT=pass>
24624 22:25:41.435959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip>
24625 22:25:41.436326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip
24627 22:25:41.466254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip>
24628 22:25:41.466601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip
24630 22:25:41.496734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip>
24631 22:25:41.497073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip
24633 22:25:41.530889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 RESULT=pass>
24634 22:25:41.531280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 RESULT=pass
24636 22:25:41.562627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip>
24637 22:25:41.562998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip
24639 22:25:41.593134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip>
24640 22:25:41.593477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip
24642 22:25:41.624053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip>
24643 22:25:41.624390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip
24645 22:25:41.653948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 RESULT=pass>
24646 22:25:41.654289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 RESULT=pass
24648 22:25:41.684486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip>
24649 22:25:41.684825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip
24651 22:25:41.714465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip
24653 22:25:41.714877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip>
24654 22:25:41.744953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip>
24655 22:25:41.745287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip
24657 22:25:41.779324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 RESULT=pass
24659 22:25:41.779812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 RESULT=pass>
24660 22:25:41.809955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip>
24661 22:25:41.810289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip
24663 22:25:41.840577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip>
24664 22:25:41.840906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip
24666 22:25:41.871290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip
24668 22:25:41.871906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip>
24669 22:25:41.901924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 RESULT=pass>
24670 22:25:41.902400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 RESULT=pass
24672 22:25:41.948712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip>
24673 22:25:41.949175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip
24675 22:25:41.989774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip
24677 22:25:41.990333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip>
24678 22:25:42.020496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip>
24679 22:25:42.020953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip
24681 22:25:42.051690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 RESULT=pass>
24682 22:25:42.052089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 RESULT=pass
24684 22:25:42.082054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip
24686 22:25:42.082486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip>
24687 22:25:42.112280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip>
24688 22:25:42.112683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip
24690 22:25:42.142789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip>
24691 22:25:42.143203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip
24693 22:25:42.173197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 RESULT=pass>
24694 22:25:42.173603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 RESULT=pass
24696 22:25:42.204144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip
24698 22:25:42.204578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip>
24699 22:25:42.234992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip
24701 22:25:42.235439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip>
24702 22:25:42.267879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip>
24703 22:25:42.268313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip
24705 22:25:42.298619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 RESULT=pass>
24706 22:25:42.299106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 RESULT=pass
24708 22:25:42.329459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip>
24709 22:25:42.329956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip
24711 22:25:42.359585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip
24713 22:25:42.360131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip>
24714 22:25:42.391838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip>
24715 22:25:42.392298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip
24717 22:25:42.422764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 RESULT=pass
24719 22:25:42.423320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 RESULT=pass>
24720 22:25:42.454770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip
24722 22:25:42.455318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip>
24723 22:25:42.486070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip>
24724 22:25:42.486455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip
24726 22:25:42.517011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip>
24727 22:25:42.517423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip
24729 22:25:42.547603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 RESULT=pass
24731 22:25:42.548142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 RESULT=pass>
24732 22:25:42.578470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip
24734 22:25:42.579076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip>
24735 22:25:42.609350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip>
24736 22:25:42.609740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip
24738 22:25:42.640203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip>
24739 22:25:42.640546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip
24741 22:25:42.671044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 RESULT=pass>
24742 22:25:42.671383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 RESULT=pass
24744 22:25:42.702416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip>
24745 22:25:42.702754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip
24747 22:25:42.733461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip>
24748 22:25:42.733890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip
24750 22:25:42.764398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip>
24751 22:25:42.764747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip
24753 22:25:42.797518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 RESULT=pass>
24754 22:25:42.797865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 RESULT=pass
24756 22:25:42.835768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip
24758 22:25:42.836252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip>
24759 22:25:42.867117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip>
24760 22:25:42.867564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip
24762 22:25:42.898882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip>
24763 22:25:42.899322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip
24765 22:25:42.929007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 RESULT=pass>
24766 22:25:42.929448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 RESULT=pass
24768 22:25:42.960338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip>
24769 22:25:42.960795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip
24771 22:25:42.990760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip>
24772 22:25:42.991222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip
24774 22:25:43.021473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip>
24775 22:25:43.021881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip
24777 22:25:43.052685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 RESULT=pass
24779 22:25:43.053123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 RESULT=pass>
24780 22:25:43.083922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip>
24781 22:25:43.084325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip
24783 22:25:43.114666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip>
24784 22:25:43.115069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip
24786 22:25:43.145587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip
24788 22:25:43.146038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip>
24789 22:25:43.176340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 RESULT=pass>
24790 22:25:43.176818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 RESULT=pass
24792 22:25:43.207886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip>
24793 22:25:43.208349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip
24795 22:25:43.238853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip>
24796 22:25:43.239340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip
24798 22:25:43.269802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip>
24799 22:25:43.270218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip
24801 22:25:43.300608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 RESULT=pass
24803 22:25:43.301175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 RESULT=pass>
24804 22:25:43.332302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip>
24805 22:25:43.332652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip
24807 22:25:43.363402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip
24809 22:25:43.363905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip>
24810 22:25:43.395299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip
24812 22:25:43.395749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip>
24813 22:25:43.426551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 RESULT=pass>
24814 22:25:43.426893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 RESULT=pass
24816 22:25:43.457799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip>
24817 22:25:43.458143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip
24819 22:25:43.491131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip>
24820 22:25:43.491492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip
24822 22:25:43.525532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip>
24823 22:25:43.526034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip
24825 22:25:43.559073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 RESULT=pass>
24826 22:25:43.559529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 RESULT=pass
24828 22:25:43.592893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip>
24829 22:25:43.593456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip
24831 22:25:43.627126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip
24833 22:25:43.627700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip>
24834 22:25:43.660590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip>
24835 22:25:43.661143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip
24837 22:25:43.695155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 RESULT=pass
24839 22:25:43.695957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 RESULT=pass>
24840 22:25:43.729478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip>
24841 22:25:43.729942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip
24843 22:25:43.760429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip>
24844 22:25:43.760840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip
24846 22:25:43.790719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip>
24847 22:25:43.791117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip
24849 22:25:43.822015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 RESULT=pass>
24850 22:25:43.822456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 RESULT=pass
24852 22:25:43.852564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip>
24853 22:25:43.852994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip
24855 22:25:43.883395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip
24857 22:25:43.883887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip>
24858 22:25:43.914318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip>
24859 22:25:43.914754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip
24861 22:25:43.944457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 RESULT=pass>
24862 22:25:43.944857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 RESULT=pass
24864 22:25:43.974569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip>
24865 22:25:43.974961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip
24867 22:25:44.005011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip>
24868 22:25:44.005420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip
24870 22:25:44.036547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip>
24871 22:25:44.037004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip
24873 22:25:44.068339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 RESULT=pass>
24874 22:25:44.068741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 RESULT=pass
24876 22:25:44.098181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip>
24877 22:25:44.098578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip
24879 22:25:44.128526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip>
24880 22:25:44.128974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip
24882 22:25:44.159341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip
24884 22:25:44.159832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip>
24885 22:25:44.190159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 RESULT=pass>
24886 22:25:44.190553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 RESULT=pass
24888 22:25:44.220572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip>
24889 22:25:44.221032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip
24891 22:25:44.252070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip>
24892 22:25:44.252527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip
24894 22:25:44.281967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip>
24895 22:25:44.282360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip
24897 22:25:44.312331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 RESULT=pass>
24898 22:25:44.312723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 RESULT=pass
24900 22:25:44.342543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip>
24901 22:25:44.342996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip
24903 22:25:44.372698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip>
24904 22:25:44.373096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip
24906 22:25:44.404344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip
24908 22:25:44.404841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip>
24909 22:25:44.434834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 RESULT=pass>
24910 22:25:44.435275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 RESULT=pass
24912 22:25:44.465367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip>
24913 22:25:44.465831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip
24915 22:25:44.495399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip
24917 22:25:44.495852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip>
24918 22:25:44.525310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip>
24919 22:25:44.525670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip
24921 22:25:44.555966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 RESULT=pass>
24922 22:25:44.556321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 RESULT=pass
24924 22:25:44.585974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip>
24925 22:25:44.586329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip
24927 22:25:44.616272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip>
24928 22:25:44.616631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip
24930 22:25:44.646239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip>
24931 22:25:44.646593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip
24933 22:25:44.676521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 RESULT=pass>
24934 22:25:44.676875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 RESULT=pass
24936 22:25:44.706285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip>
24937 22:25:44.706648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip
24939 22:25:44.736430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip>
24940 22:25:44.736792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip
24942 22:25:44.766550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip>
24943 22:25:44.766912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip
24945 22:25:44.797777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 RESULT=pass>
24946 22:25:44.798237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 RESULT=pass
24948 22:25:44.828416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip>
24949 22:25:44.828773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip
24951 22:25:44.858304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip
24953 22:25:44.858745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip>
24954 22:25:44.888339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip>
24955 22:25:44.888696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip
24957 22:25:44.917717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 RESULT=pass>
24958 22:25:44.918071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 RESULT=pass
24960 22:25:44.947817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip>
24961 22:25:44.948173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip
24963 22:25:44.977604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip>
24964 22:25:44.977965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip
24966 22:25:45.007462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip
24968 22:25:45.007915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip>
24969 22:25:45.037655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 RESULT=pass>
24970 22:25:45.038020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 RESULT=pass
24972 22:25:45.068084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip>
24973 22:25:45.068447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip
24975 22:25:45.097878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip>
24976 22:25:45.098246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip
24978 22:25:45.128082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip>
24979 22:25:45.128434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip
24981 22:25:45.158855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 RESULT=pass>
24982 22:25:45.159220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 RESULT=pass
24984 22:25:45.188801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip>
24985 22:25:45.189152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip
24987 22:25:45.219644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip>
24988 22:25:45.220000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip
24990 22:25:45.249593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip>
24991 22:25:45.249959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip
24993 22:25:45.279864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 RESULT=pass>
24994 22:25:45.280232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 RESULT=pass
24996 22:25:45.309158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip>
24997 22:25:45.309515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip
24999 22:25:45.338802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip>
25000 22:25:45.339160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip
25002 22:25:45.369304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip>
25003 22:25:45.369676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip
25005 22:25:45.399427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 RESULT=pass
25007 22:25:45.399936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 RESULT=pass>
25008 22:25:45.429902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip>
25009 22:25:45.430268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip
25011 22:25:45.460322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip>
25012 22:25:45.460684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip
25014 22:25:45.491188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip
25016 22:25:45.491797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip>
25017 22:25:45.521359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 RESULT=pass>
25018 22:25:45.521689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 RESULT=pass
25020 22:25:45.550942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip>
25021 22:25:45.551301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip
25023 22:25:45.581690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip
25025 22:25:45.582097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip>
25026 22:25:45.611827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip>
25027 22:25:45.612165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip
25029 22:25:45.641945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 RESULT=pass>
25030 22:25:45.642288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 RESULT=pass
25032 22:25:45.672441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip>
25033 22:25:45.672777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip
25035 22:25:45.702682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip>
25036 22:25:45.703019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip
25038 22:25:45.733485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip
25040 22:25:45.734226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip>
25041 22:25:45.765268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 RESULT=pass>
25042 22:25:45.765715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 RESULT=pass
25044 22:25:45.796366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip>
25045 22:25:45.796808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip
25047 22:25:45.826736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip>
25048 22:25:45.827094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip
25050 22:25:45.857382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip>
25051 22:25:45.857745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip
25053 22:25:45.888074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 RESULT=pass>
25054 22:25:45.888422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 RESULT=pass
25056 22:25:45.918673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip>
25057 22:25:45.919112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip
25059 22:25:45.949658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip>
25060 22:25:45.950141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip
25062 22:25:45.980406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip
25064 22:25:45.980947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip>
25065 22:25:46.011400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 RESULT=pass
25067 22:25:46.011899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 RESULT=pass>
25068 22:25:46.041564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip>
25069 22:25:46.041931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip
25071 22:25:46.072084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip
25073 22:25:46.072566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip>
25074 22:25:46.102382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip>
25075 22:25:46.102726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip
25077 22:25:46.132439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 RESULT=pass>
25078 22:25:46.132783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 RESULT=pass
25080 22:25:46.162473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip>
25081 22:25:46.162828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip
25083 22:25:46.193102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip>
25084 22:25:46.193464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip
25086 22:25:46.223837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip>
25087 22:25:46.224200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip
25089 22:25:46.254530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 RESULT=pass>
25090 22:25:46.255008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 RESULT=pass
25092 22:25:46.285321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip
25094 22:25:46.285864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip>
25095 22:25:46.315685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip>
25096 22:25:46.316047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip
25098 22:25:46.346045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip>
25099 22:25:46.346391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip
25101 22:25:46.376474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 RESULT=pass>
25102 22:25:46.376812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 RESULT=pass
25104 22:25:46.406591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip>
25105 22:25:46.406932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip
25107 22:25:46.436733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip>
25108 22:25:46.437075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip
25110 22:25:46.466716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip>
25111 22:25:46.467066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip
25113 22:25:46.496487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 RESULT=pass
25115 22:25:46.496914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 RESULT=pass>
25116 22:25:46.526876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip>
25117 22:25:46.527223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip
25119 22:25:46.556982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip>
25120 22:25:46.557327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip
25122 22:25:46.586930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip>
25123 22:25:46.587268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip
25125 22:25:46.617318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 RESULT=pass>
25126 22:25:46.617670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 RESULT=pass
25128 22:25:46.648153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip>
25129 22:25:46.648492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip
25131 22:25:46.678459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip>
25132 22:25:46.678806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip
25134 22:25:46.708809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip>
25135 22:25:46.709162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip
25137 22:25:46.740006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 RESULT=pass>
25138 22:25:46.740487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 RESULT=pass
25140 22:25:46.770569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip
25142 22:25:46.771078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip>
25143 22:25:46.800917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip>
25144 22:25:46.801344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip
25146 22:25:46.832789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip>
25147 22:25:46.833142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip
25149 22:25:46.865048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 RESULT=pass>
25150 22:25:46.865395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 RESULT=pass
25152 22:25:46.896286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip>
25153 22:25:46.896632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip
25155 22:25:46.926237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip>
25156 22:25:46.926580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip
25158 22:25:46.956599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip>
25159 22:25:46.956942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip
25161 22:25:46.987112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 RESULT=pass>
25162 22:25:46.987472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 RESULT=pass
25164 22:25:47.017290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip>
25165 22:25:47.017653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip
25167 22:25:47.057458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip
25169 22:25:47.057895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip>
25170 22:25:47.106157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip>
25171 22:25:47.106496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip
25173 22:25:47.136425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 RESULT=pass>
25174 22:25:47.136764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 RESULT=pass
25176 22:25:47.166373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip>
25177 22:25:47.166749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip
25179 22:25:47.197163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip>
25180 22:25:47.197504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip
25182 22:25:47.226874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip>
25183 22:25:47.227218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip
25185 22:25:47.256929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 RESULT=pass>
25186 22:25:47.257272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 RESULT=pass
25188 22:25:47.289424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip>
25189 22:25:47.289786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip
25191 22:25:47.321100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip>
25192 22:25:47.321436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip
25194 22:25:47.354457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip>
25195 22:25:47.354798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip
25197 22:25:47.386676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 RESULT=pass>
25198 22:25:47.387015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 RESULT=pass
25200 22:25:47.419921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip>
25201 22:25:47.420328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip
25203 22:25:47.454946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip>
25204 22:25:47.455300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip
25206 22:25:47.488065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip>
25207 22:25:47.488465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip
25209 22:25:47.518750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 RESULT=pass>
25210 22:25:47.519097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 RESULT=pass
25212 22:25:47.549477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip>
25213 22:25:47.549823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip
25215 22:25:47.580086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip>
25216 22:25:47.580426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip
25218 22:25:47.610048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip>
25219 22:25:47.610394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip
25221 22:25:47.640378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 RESULT=pass>
25222 22:25:47.640729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 RESULT=pass
25224 22:25:47.670959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip>
25225 22:25:47.671303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip
25227 22:25:47.701784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip>
25228 22:25:47.702127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip
25230 22:25:47.732307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip
25232 22:25:47.732719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip>
25233 22:25:47.764855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 RESULT=pass>
25234 22:25:47.765234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 RESULT=pass
25236 22:25:47.795119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip>
25237 22:25:47.795462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip
25239 22:25:47.825239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip>
25240 22:25:47.825575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip
25242 22:25:47.855740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip>
25243 22:25:47.856078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip
25245 22:25:47.885523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 RESULT=pass
25247 22:25:47.885948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 RESULT=pass>
25248 22:25:47.915771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip>
25249 22:25:47.916121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip
25251 22:25:47.945574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip>
25252 22:25:47.945935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip
25254 22:25:47.977871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip>
25255 22:25:47.978248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip
25257 22:25:48.008761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 RESULT=pass
25259 22:25:48.009237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 RESULT=pass>
25260 22:25:48.038845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip>
25261 22:25:48.039186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip
25263 22:25:48.068737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip>
25264 22:25:48.069076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip
25266 22:25:48.099053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip>
25267 22:25:48.099391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip
25269 22:25:48.128961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 RESULT=pass>
25270 22:25:48.129302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 RESULT=pass
25272 22:25:48.158936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip>
25273 22:25:48.159243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip
25275 22:25:48.189851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip>
25276 22:25:48.190197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip
25278 22:25:48.220122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip>
25279 22:25:48.220461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip
25281 22:25:48.249695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 RESULT=pass>
25282 22:25:48.250039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 RESULT=pass
25284 22:25:48.279991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip>
25285 22:25:48.280333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip
25287 22:25:48.310066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip>
25288 22:25:48.310416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip
25290 22:25:48.340878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip>
25291 22:25:48.341219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip
25293 22:25:48.370310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 RESULT=pass
25295 22:25:48.370807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 RESULT=pass>
25296 22:25:48.400200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip>
25297 22:25:48.400571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip
25299 22:25:48.430025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip
25301 22:25:48.430445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip>
25302 22:25:48.460204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip>
25303 22:25:48.460577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip
25305 22:25:48.489812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 RESULT=pass>
25306 22:25:48.490173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 RESULT=pass
25308 22:25:48.520018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip>
25309 22:25:48.520388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip
25311 22:25:48.549467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip>
25312 22:25:48.549857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip
25314 22:25:48.579764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip>
25315 22:25:48.580127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip
25317 22:25:48.609598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 RESULT=pass>
25318 22:25:48.609974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 RESULT=pass
25320 22:25:48.639685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip>
25321 22:25:48.640047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip
25323 22:25:48.669717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip>
25324 22:25:48.670073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip
25326 22:25:48.700341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip>
25327 22:25:48.700699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip
25329 22:25:48.730957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 RESULT=pass>
25330 22:25:48.731316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 RESULT=pass
25332 22:25:48.761031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip>
25333 22:25:48.761389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip
25335 22:25:48.790843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip>
25336 22:25:48.791210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip
25338 22:25:48.821458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip>
25339 22:25:48.821819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip
25341 22:25:48.851024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 RESULT=pass>
25342 22:25:48.851379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 RESULT=pass
25344 22:25:48.880791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip>
25345 22:25:48.881159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip
25347 22:25:48.910588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip>
25348 22:25:48.910948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip
25350 22:25:48.940614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip>
25351 22:25:48.940971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip
25353 22:25:48.970921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 RESULT=pass>
25354 22:25:48.971288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 RESULT=pass
25356 22:25:49.000790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip>
25357 22:25:49.001150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip
25359 22:25:49.030851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip>
25360 22:25:49.031213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip
25362 22:25:49.060734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip>
25363 22:25:49.061096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip
25365 22:25:49.090460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 RESULT=pass>
25366 22:25:49.090827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 RESULT=pass
25368 22:25:49.120735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip>
25369 22:25:49.121097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip
25371 22:25:49.151361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip
25373 22:25:49.151863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip>
25374 22:25:49.181413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip>
25375 22:25:49.181774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip
25377 22:25:49.211044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 RESULT=pass>
25378 22:25:49.211407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 RESULT=pass
25380 22:25:49.241311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip>
25381 22:25:49.241692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip
25383 22:25:49.271014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip>
25384 22:25:49.271382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip
25386 22:25:49.301450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip>
25387 22:25:49.301801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip
25389 22:25:49.331893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 RESULT=pass>
25390 22:25:49.332248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 RESULT=pass
25392 22:25:49.361719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip>
25393 22:25:49.362071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip
25395 22:25:49.391901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip>
25396 22:25:49.392257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip
25398 22:25:49.421581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip>
25399 22:25:49.421953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip
25401 22:25:49.451699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 RESULT=pass>
25402 22:25:49.452055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 RESULT=pass
25404 22:25:49.482030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip>
25405 22:25:49.482395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip
25407 22:25:49.512102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip>
25408 22:25:49.512461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip
25410 22:25:49.542246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip>
25411 22:25:49.542604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip
25413 22:25:49.572072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 RESULT=pass>
25414 22:25:49.572482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 RESULT=pass
25416 22:25:49.601934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip>
25417 22:25:49.602291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip
25419 22:25:49.632331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip>
25420 22:25:49.632693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip
25422 22:25:49.663312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip
25424 22:25:49.663955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip>
25425 22:25:49.694956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 RESULT=pass
25427 22:25:49.695673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 RESULT=pass>
25428 22:25:49.725999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip>
25429 22:25:49.726439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip
25431 22:25:49.756672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip>
25432 22:25:49.757145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip
25434 22:25:49.788022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip>
25435 22:25:49.788476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip
25437 22:25:49.819830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 RESULT=pass>
25438 22:25:49.820297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 RESULT=pass
25440 22:25:49.850279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip>
25441 22:25:49.850738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip
25443 22:25:49.880576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip
25445 22:25:49.881109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip>
25446 22:25:49.910921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip>
25447 22:25:49.911380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip
25449 22:25:49.942169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 RESULT=pass>
25450 22:25:49.942616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 RESULT=pass
25452 22:25:49.972541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip>
25453 22:25:49.972974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip
25455 22:25:50.002682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip>
25456 22:25:50.003099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip
25458 22:25:50.033199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip>
25459 22:25:50.033655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip
25461 22:25:50.064320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 RESULT=pass>
25462 22:25:50.064752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 RESULT=pass
25464 22:25:50.095514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip
25466 22:25:50.096056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip>
25467 22:25:50.126769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip>
25468 22:25:50.127209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip
25470 22:25:50.157186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip
25472 22:25:50.157725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip>
25473 22:25:50.187868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 RESULT=pass>
25474 22:25:50.188303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 RESULT=pass
25476 22:25:50.218061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip>
25477 22:25:50.218453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip
25479 22:25:50.248845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip
25481 22:25:50.249363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip>
25482 22:25:50.279519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip
25484 22:25:50.279943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip>
25485 22:25:50.309446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 RESULT=pass>
25486 22:25:50.309793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 RESULT=pass
25488 22:25:50.339360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip
25490 22:25:50.339799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip>
25491 22:25:50.369597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip>
25492 22:25:50.369965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip
25494 22:25:50.400023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip>
25495 22:25:50.400379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip
25497 22:25:50.429853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 RESULT=pass>
25498 22:25:50.430209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 RESULT=pass
25500 22:25:50.460061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip>
25501 22:25:50.460413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip
25503 22:25:50.490071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip>
25504 22:25:50.490440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip
25506 22:25:50.520030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip>
25507 22:25:50.520395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip
25509 22:25:50.549472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 RESULT=pass>
25510 22:25:50.549829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 RESULT=pass
25512 22:25:50.579511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip
25514 22:25:50.579961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip>
25515 22:25:50.609585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip>
25516 22:25:50.609953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip
25518 22:25:50.640290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip>
25519 22:25:50.640649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip
25521 22:25:50.670890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 RESULT=pass>
25522 22:25:50.671253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 RESULT=pass
25524 22:25:50.701075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip>
25525 22:25:50.701432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip
25527 22:25:50.731376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip
25529 22:25:50.731823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip>
25530 22:25:50.761501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip>
25531 22:25:50.761868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip
25533 22:25:50.791951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 RESULT=pass>
25534 22:25:50.792310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 RESULT=pass
25536 22:25:50.821693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip
25538 22:25:50.822140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip>
25539 22:25:50.852250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip>
25540 22:25:50.852606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip
25542 22:25:50.883894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip>
25543 22:25:50.884269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip
25545 22:25:50.916279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 RESULT=pass>
25546 22:25:50.916638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 RESULT=pass
25548 22:25:50.946948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip
25550 22:25:50.947370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip>
25551 22:25:50.978158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip
25553 22:25:50.978592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip>
25554 22:25:51.009021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip>
25555 22:25:51.009369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip
25557 22:25:51.040237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 RESULT=pass
25559 22:25:51.040706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 RESULT=pass>
25560 22:25:51.070572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip>
25561 22:25:51.070929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip
25563 22:25:51.102901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip>
25564 22:25:51.103323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip
25566 22:25:51.133855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip>
25567 22:25:51.134207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip
25569 22:25:51.164557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 RESULT=pass>
25570 22:25:51.164948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 RESULT=pass
25572 22:25:51.196088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip
25574 22:25:51.196601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip>
25575 22:25:51.227104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip
25577 22:25:51.227539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip>
25578 22:25:51.258640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip>
25579 22:25:51.258998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip
25581 22:25:51.289656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 RESULT=pass>
25582 22:25:51.290006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 RESULT=pass
25584 22:25:51.320712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip
25586 22:25:51.321150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip>
25587 22:25:51.351508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip
25589 22:25:51.351941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip>
25590 22:25:51.382265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip
25592 22:25:51.382706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip>
25593 22:25:51.413030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 RESULT=pass>
25594 22:25:51.413382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 RESULT=pass
25596 22:25:51.443838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip>
25597 22:25:51.444180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip
25599 22:25:51.474403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip>
25600 22:25:51.474736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip
25602 22:25:51.505331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip>
25603 22:25:51.505701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip
25605 22:25:51.536162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 RESULT=pass>
25606 22:25:51.536522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 RESULT=pass
25608 22:25:51.566490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip>
25609 22:25:51.566852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip
25611 22:25:51.597113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip>
25612 22:25:51.597465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip
25614 22:25:51.628365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip>
25615 22:25:51.628721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip
25617 22:25:51.659864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 RESULT=pass
25619 22:25:51.660272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 RESULT=pass>
25620 22:25:51.691013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip>
25621 22:25:51.691354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip
25623 22:25:51.722362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip
25625 22:25:51.722854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip>
25626 22:25:51.753424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip>
25627 22:25:51.753765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip
25629 22:25:51.784296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 RESULT=pass>
25630 22:25:51.784651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 RESULT=pass
25632 22:25:51.815018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip
25634 22:25:51.815620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip>
25635 22:25:51.845872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip>
25636 22:25:51.846218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip
25638 22:25:51.876582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip>
25639 22:25:51.876903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip
25641 22:25:51.908353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 RESULT=pass>
25642 22:25:51.908693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 RESULT=pass
25644 22:25:51.939331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip
25646 22:25:51.939727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip>
25647 22:25:51.970307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip>
25648 22:25:51.970641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip
25650 22:25:52.000933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip>
25651 22:25:52.001258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip
25653 22:25:52.032083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 RESULT=pass>
25654 22:25:52.032424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 RESULT=pass
25656 22:25:52.062536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip
25658 22:25:52.062949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip>
25659 22:25:52.094061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip>
25660 22:25:52.094381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip
25662 22:25:52.125070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip>
25663 22:25:52.125403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip
25665 22:25:52.155862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 RESULT=pass>
25666 22:25:52.156183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 RESULT=pass
25668 22:25:52.209961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip>
25669 22:25:52.210328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip
25671 22:25:52.241328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip>
25672 22:25:52.241687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip
25674 22:25:52.272791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip>
25675 22:25:52.273169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip
25677 22:25:52.303465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 RESULT=pass
25679 22:25:52.304059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 RESULT=pass>
25680 22:25:52.334964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip
25682 22:25:52.335493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip>
25683 22:25:52.366138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip>
25684 22:25:52.366579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip
25686 22:25:52.397153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip>
25687 22:25:52.397599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip
25689 22:25:52.428303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 RESULT=pass
25691 22:25:52.428766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 RESULT=pass>
25692 22:25:52.459495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip
25694 22:25:52.460000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip>
25695 22:25:52.490297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip>
25696 22:25:52.490690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip
25698 22:25:52.521884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip>
25699 22:25:52.522233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip
25701 22:25:52.552640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 RESULT=pass>
25702 22:25:52.552996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 RESULT=pass
25704 22:25:52.583551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip
25706 22:25:52.584001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip>
25707 22:25:52.614133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip>
25708 22:25:52.614528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip
25710 22:25:52.645183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip>
25711 22:25:52.645590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip
25713 22:25:52.676732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 RESULT=pass
25715 22:25:52.677166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 RESULT=pass>
25716 22:25:52.707889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip>
25717 22:25:52.708286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip
25719 22:25:52.738762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip>
25720 22:25:52.739166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip
25722 22:25:52.770540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip>
25723 22:25:52.771031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip
25725 22:25:52.801384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 RESULT=pass
25727 22:25:52.801964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 RESULT=pass>
25728 22:25:52.832853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip>
25729 22:25:52.833295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip
25731 22:25:52.864774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip>
25732 22:25:52.865243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip
25734 22:25:52.895445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip
25736 22:25:52.896093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip>
25737 22:25:52.927773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 RESULT=pass>
25738 22:25:52.928248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 RESULT=pass
25740 22:25:52.958791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip>
25741 22:25:52.959284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip
25743 22:25:52.989533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip>
25744 22:25:52.990008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip
25746 22:25:53.020395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip>
25747 22:25:53.020844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip
25749 22:25:53.050762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 RESULT=pass>
25750 22:25:53.051142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 RESULT=pass
25752 22:25:53.081187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip
25754 22:25:53.081609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip>
25755 22:25:53.112206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip>
25756 22:25:53.112546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip
25758 22:25:53.142407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip
25760 22:25:53.142818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip>
25761 22:25:53.172580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 RESULT=pass
25763 22:25:53.172988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 RESULT=pass>
25764 22:25:53.202573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip>
25765 22:25:53.202920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip
25767 22:25:53.232631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip>
25768 22:25:53.232963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip
25770 22:25:53.263942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip>
25771 22:25:53.264277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip
25773 22:25:53.293994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 RESULT=pass>
25774 22:25:53.294313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 RESULT=pass
25776 22:25:53.324835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip
25778 22:25:53.325339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip>
25779 22:25:53.355515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip>
25780 22:25:53.355882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip
25782 22:25:53.385999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip>
25783 22:25:53.386330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip
25785 22:25:53.416237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 RESULT=pass>
25786 22:25:53.416553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 RESULT=pass
25788 22:25:53.446420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip>
25789 22:25:53.446770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip
25791 22:25:53.477507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip>
25792 22:25:53.477842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip
25794 22:25:53.507975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip>
25795 22:25:53.508303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip
25797 22:25:53.537860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 RESULT=pass>
25798 22:25:53.538185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 RESULT=pass
25800 22:25:53.568140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip>
25801 22:25:53.568466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip
25803 22:25:53.598358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip>
25804 22:25:53.598684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip
25806 22:25:53.628272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip>
25807 22:25:53.628596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip
25809 22:25:53.658895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 RESULT=pass>
25810 22:25:53.659223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 RESULT=pass
25812 22:25:53.688780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip>
25813 22:25:53.689107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip
25815 22:25:53.718991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip>
25816 22:25:53.719315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip
25818 22:25:53.750226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip>
25819 22:25:53.750549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip
25821 22:25:53.781205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 RESULT=pass>
25822 22:25:53.781526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 RESULT=pass
25824 22:25:53.812286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip>
25825 22:25:53.812628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip
25827 22:25:53.842965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip>
25828 22:25:53.843333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip
25830 22:25:53.873698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip>
25831 22:25:53.874035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip
25833 22:25:53.905374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 RESULT=pass
25835 22:25:53.905795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 RESULT=pass>
25836 22:25:53.936531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip>
25837 22:25:53.936871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip
25839 22:25:53.967971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip>
25840 22:25:53.968308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip
25842 22:25:53.998504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip>
25843 22:25:53.998852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip
25845 22:25:54.029251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 RESULT=pass>
25846 22:25:54.029601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 RESULT=pass
25848 22:25:54.060253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip>
25849 22:25:54.060600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip
25851 22:25:54.091988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip>
25852 22:25:54.092335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip
25854 22:25:54.122934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip>
25855 22:25:54.123283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip
25857 22:25:54.153934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 RESULT=pass>
25858 22:25:54.154286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 RESULT=pass
25860 22:25:54.184586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip>
25861 22:25:54.184938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip
25863 22:25:54.216190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip
25865 22:25:54.216800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip>
25866 22:25:54.247946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip>
25867 22:25:54.248291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip
25869 22:25:54.278705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 RESULT=pass
25871 22:25:54.279132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 RESULT=pass>
25872 22:25:54.310127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip
25874 22:25:54.310604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip>
25875 22:25:54.341356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip>
25876 22:25:54.341686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip
25878 22:25:54.372495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip
25880 22:25:54.372922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip>
25881 22:25:54.403091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 RESULT=pass>
25882 22:25:54.403453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 RESULT=pass
25884 22:25:54.434127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip>
25885 22:25:54.434484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip
25887 22:25:54.465539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip>
25888 22:25:54.466005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip
25890 22:25:54.496764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip>
25891 22:25:54.497233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip
25893 22:25:54.528306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 RESULT=pass>
25894 22:25:54.528682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 RESULT=pass
25896 22:25:54.559023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip>
25897 22:25:54.559370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip
25899 22:25:54.590114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip>
25900 22:25:54.590463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip
25902 22:25:54.621142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip>
25903 22:25:54.621492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip
25905 22:25:54.652974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 RESULT=pass>
25906 22:25:54.653318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 RESULT=pass
25908 22:25:54.684156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip>
25909 22:25:54.684500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip
25911 22:25:54.714871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip>
25912 22:25:54.715207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip
25914 22:25:54.746382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip
25916 22:25:54.746933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip>
25917 22:25:54.777393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 RESULT=pass
25919 22:25:54.777945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 RESULT=pass>
25920 22:25:54.808620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip>
25921 22:25:54.809065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip
25923 22:25:54.840392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip>
25924 22:25:54.840845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip
25926 22:25:54.872032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip>
25927 22:25:54.872473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip
25929 22:25:54.903851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 RESULT=pass
25931 22:25:54.904418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 RESULT=pass>
25932 22:25:54.935083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip>
25933 22:25:54.935462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip
25935 22:25:54.965994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip>
25936 22:25:54.966334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip
25938 22:25:54.996329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip>
25939 22:25:54.996676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip
25941 22:25:55.026490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 RESULT=pass
25943 22:25:55.027130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 RESULT=pass>
25944 22:25:55.057154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip>
25945 22:25:55.057597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip
25947 22:25:55.088700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip
25949 22:25:55.089202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip>
25950 22:25:55.119364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip
25952 22:25:55.119827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip>
25953 22:25:55.150024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 RESULT=pass
25955 22:25:55.150431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 RESULT=pass>
25956 22:25:55.180653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip>
25957 22:25:55.181006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip
25959 22:25:55.210909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip>
25960 22:25:55.211248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip
25962 22:25:55.243361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip>
25963 22:25:55.243787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip
25965 22:25:55.276199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 RESULT=pass
25967 22:25:55.276749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 RESULT=pass>
25968 22:25:55.306475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip
25970 22:25:55.307019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip>
25971 22:25:55.337123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip>
25972 22:25:55.337497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip
25974 22:25:55.368066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip>
25975 22:25:55.368390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip
25977 22:25:55.397965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 RESULT=pass
25979 22:25:55.398389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 RESULT=pass>
25980 22:25:55.428376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip>
25981 22:25:55.428719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip
25983 22:25:55.458906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip>
25984 22:25:55.459243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip
25986 22:25:55.489874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip>
25987 22:25:55.490209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip
25989 22:25:55.520060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 RESULT=pass>
25990 22:25:55.520405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 RESULT=pass
25992 22:25:55.550154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip>
25993 22:25:55.550492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip
25995 22:25:55.580663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip>
25996 22:25:55.580983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip
25998 22:25:55.610537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip>
25999 22:25:55.610864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip
26001 22:25:55.641465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 RESULT=pass>
26002 22:25:55.641780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 RESULT=pass
26004 22:25:55.672237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip>
26005 22:25:55.672594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip
26007 22:25:55.702415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip>
26008 22:25:55.702757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip
26010 22:25:55.732479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip>
26011 22:25:55.732813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip
26013 22:25:55.762772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 RESULT=pass>
26014 22:25:55.763109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 RESULT=pass
26016 22:25:55.792826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip>
26017 22:25:55.793161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip
26019 22:25:55.823049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip>
26020 22:25:55.823383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip
26022 22:25:55.853191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip>
26023 22:25:55.853527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip
26025 22:25:55.884536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 RESULT=pass>
26026 22:25:55.884841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 RESULT=pass
26028 22:25:55.914541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip>
26029 22:25:55.914877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip
26031 22:25:55.945317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip>
26032 22:25:55.945666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip
26034 22:25:55.975809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip>
26035 22:25:55.976143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip
26037 22:25:56.005807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 RESULT=pass>
26038 22:25:56.006141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 RESULT=pass
26040 22:25:56.036203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip
26042 22:25:56.036603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip>
26043 22:25:56.067482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip
26045 22:25:56.067941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip>
26046 22:25:56.097746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip>
26047 22:25:56.098152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip
26049 22:25:56.128975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 RESULT=pass>
26050 22:25:56.129334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 RESULT=pass
26052 22:25:56.159766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip>
26053 22:25:56.160108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip
26055 22:25:56.190912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip>
26056 22:25:56.191356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip
26058 22:25:56.222163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip>
26059 22:25:56.222626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip
26061 22:25:56.252625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 RESULT=pass>
26062 22:25:56.253069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 RESULT=pass
26064 22:25:56.283808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip>
26065 22:25:56.284276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip
26067 22:25:56.314539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip>
26068 22:25:56.314975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip
26070 22:25:56.344528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip>
26071 22:25:56.344870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip
26073 22:25:56.374456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 RESULT=pass>
26074 22:25:56.374814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 RESULT=pass
26076 22:25:56.404448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip>
26077 22:25:56.404791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip
26079 22:25:56.434684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip
26081 22:25:56.435137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip>
26082 22:25:56.464938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip>
26083 22:25:56.465270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip
26085 22:25:56.494843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 RESULT=pass>
26086 22:25:56.495195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 RESULT=pass
26088 22:25:56.525320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip
26090 22:25:56.525747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip>
26091 22:25:56.555733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip>
26092 22:25:56.556074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip
26094 22:25:56.585602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip>
26095 22:25:56.585957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip
26097 22:25:56.616923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 RESULT=pass
26099 22:25:56.617329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 RESULT=pass>
26100 22:25:56.647290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip
26102 22:25:56.647813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip>
26103 22:25:56.677628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip>
26104 22:25:56.678046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip
26106 22:25:56.708017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip>
26107 22:25:56.708376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip
26109 22:25:56.737933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 RESULT=pass>
26110 22:25:56.738275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 RESULT=pass
26112 22:25:56.768235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip>
26113 22:25:56.768556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip
26115 22:25:56.798255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip>
26116 22:25:56.798597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip
26118 22:25:56.828358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip>
26119 22:25:56.828690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip
26121 22:25:56.858979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 RESULT=pass>
26122 22:25:56.859331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 RESULT=pass
26124 22:25:56.889388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip>
26125 22:25:56.889684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip
26127 22:25:56.920288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip>
26128 22:25:56.920617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip
26130 22:25:56.950112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip>
26131 22:25:56.950444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip
26133 22:25:56.980342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 RESULT=pass>
26134 22:25:56.980670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 RESULT=pass
26136 22:25:57.010353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip>
26137 22:25:57.010695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip
26139 22:25:57.041383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip>
26140 22:25:57.041731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip
26142 22:25:57.071578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip
26144 22:25:57.071959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip>
26145 22:25:57.101074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 RESULT=pass>
26146 22:25:57.101388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 RESULT=pass
26148 22:25:57.131044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip>
26149 22:25:57.131391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip
26151 22:25:57.161200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip>
26152 22:25:57.161585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip
26154 22:25:57.192031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip>
26155 22:25:57.192382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip
26157 22:25:57.221931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 RESULT=pass>
26158 22:25:57.222337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 RESULT=pass
26160 22:25:57.252278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip>
26161 22:25:57.252653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip
26163 22:25:57.282492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip>
26164 22:25:57.282892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip
26166 22:25:57.337710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip
26168 22:25:57.338310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip>
26169 22:25:57.370661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 RESULT=pass>
26170 22:25:57.371224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 RESULT=pass
26172 22:25:57.404339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip>
26173 22:25:57.404736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip
26175 22:25:57.437478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip
26177 22:25:57.437852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip>
26178 22:25:57.482208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip>
26179 22:25:57.482602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip
26181 22:25:57.513643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 RESULT=pass>
26182 22:25:57.514059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 RESULT=pass
26184 22:25:57.545426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip>
26185 22:25:57.545913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip
26187 22:25:57.578337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip>
26188 22:25:57.578800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip
26190 22:25:57.609153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip
26192 22:25:57.609706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip>
26193 22:25:57.640539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 RESULT=pass>
26194 22:25:57.640975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 RESULT=pass
26196 22:25:57.671647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip>
26197 22:25:57.672103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip
26199 22:25:57.702539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip>
26200 22:25:57.703006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip
26202 22:25:57.735064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip>
26203 22:25:57.735447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip
26205 22:25:57.766394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 RESULT=pass>
26206 22:25:57.766835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 RESULT=pass
26208 22:25:57.796932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip>
26209 22:25:57.797333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip
26211 22:25:57.828383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip>
26212 22:25:57.828835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip
26214 22:25:57.859695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip>
26215 22:25:57.860040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip
26217 22:25:57.892992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 RESULT=pass
26219 22:25:57.893427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 RESULT=pass>
26220 22:25:57.924841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip>
26221 22:25:57.925202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip
26223 22:25:57.956052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip>
26224 22:25:57.956392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip
26226 22:25:57.986513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip>
26227 22:25:57.986863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip
26229 22:25:58.016970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 RESULT=pass>
26230 22:25:58.017316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 RESULT=pass
26232 22:25:58.048218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip>
26233 22:25:58.048560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip
26235 22:25:58.079728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip>
26236 22:25:58.080068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip
26238 22:25:58.110205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip>
26239 22:25:58.110531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip
26241 22:25:58.141799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 RESULT=pass
26243 22:25:58.142214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 RESULT=pass>
26244 22:25:58.176004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip>
26245 22:25:58.176347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip
26247 22:25:58.208295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip>
26248 22:25:58.208667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip
26250 22:25:58.239545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip
26252 22:25:58.240099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip>
26253 22:25:58.270584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 RESULT=pass
26255 22:25:58.271190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 RESULT=pass>
26256 22:25:58.301720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip
26258 22:25:58.302276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip>
26259 22:25:58.332930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip
26261 22:25:58.333479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip>
26262 22:25:58.363939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip>
26263 22:25:58.364345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip
26265 22:25:58.395068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 RESULT=pass>
26266 22:25:58.395535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 RESULT=pass
26268 22:25:58.425939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip>
26269 22:25:58.426391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip
26271 22:25:58.456728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip>
26272 22:25:58.457111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip
26274 22:25:58.487947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip>
26275 22:25:58.488302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip
26277 22:25:58.518210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 RESULT=pass>
26278 22:25:58.518469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 RESULT=pass
26280 22:25:58.549090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip>
26281 22:25:58.549547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip
26283 22:25:58.580404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip>
26284 22:25:58.580853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip
26286 22:25:58.612154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip>
26287 22:25:58.612597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip
26289 22:25:58.642979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 RESULT=pass>
26290 22:25:58.643434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 RESULT=pass
26292 22:25:58.674256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip>
26293 22:25:58.674700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip
26295 22:25:58.705133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip>
26296 22:25:58.705575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip
26298 22:25:58.736329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip>
26299 22:25:58.736793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip
26301 22:25:58.766629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 RESULT=pass>
26302 22:25:58.767094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 RESULT=pass
26304 22:25:58.797480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip>
26305 22:25:58.797935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip
26307 22:25:58.828340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip>
26308 22:25:58.828740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip
26310 22:25:58.859357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip
26312 22:25:58.859801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip>
26313 22:25:58.891173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 RESULT=pass
26315 22:25:58.891636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 RESULT=pass>
26316 22:25:58.922347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip>
26317 22:25:58.922790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip
26319 22:25:58.953400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip>
26320 22:25:58.953863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip
26322 22:25:58.984771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip>
26323 22:25:58.985209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip
26325 22:25:59.015740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 RESULT=pass>
26326 22:25:59.016162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 RESULT=pass
26328 22:25:59.046529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip>
26329 22:25:59.046965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip
26331 22:25:59.078002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip>
26332 22:25:59.078432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip
26334 22:25:59.109420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip>
26335 22:25:59.109894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip
26337 22:25:59.140649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 RESULT=pass>
26338 22:25:59.141111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 RESULT=pass
26340 22:25:59.171076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip>
26341 22:25:59.171486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip
26343 22:25:59.202362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip>
26344 22:25:59.202768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip
26346 22:25:59.234002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip>
26347 22:25:59.234413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip
26349 22:25:59.264833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 RESULT=pass>
26350 22:25:59.265220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 RESULT=pass
26352 22:25:59.295888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip>
26353 22:25:59.296283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip
26355 22:25:59.327276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip
26357 22:25:59.327722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip>
26358 22:25:59.358583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip>
26359 22:25:59.358980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip
26361 22:25:59.389462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 RESULT=pass
26363 22:25:59.389907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 RESULT=pass>
26364 22:25:59.420584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip>
26365 22:25:59.421029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip
26367 22:25:59.452190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip
26369 22:25:59.452738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip>
26370 22:25:59.482989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip>
26371 22:25:59.483428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip
26373 22:25:59.514581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 RESULT=pass
26375 22:25:59.515188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 RESULT=pass>
26376 22:25:59.545197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip>
26377 22:25:59.545641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip
26379 22:25:59.576299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip>
26380 22:25:59.576771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip
26382 22:25:59.606893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip
26384 22:25:59.607460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip>
26385 22:25:59.638036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 RESULT=pass>
26386 22:25:59.638392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 RESULT=pass
26388 22:25:59.668315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip>
26389 22:25:59.668671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip
26391 22:25:59.698634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip>
26392 22:25:59.698985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip
26394 22:25:59.729533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip>
26395 22:25:59.729896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip
26397 22:25:59.760089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 RESULT=pass>
26398 22:25:59.760441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 RESULT=pass
26400 22:25:59.790045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip>
26401 22:25:59.790401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip
26403 22:25:59.820738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip>
26404 22:25:59.821093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip
26406 22:25:59.851406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip
26408 22:25:59.851851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip>
26409 22:25:59.882603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 RESULT=pass>
26410 22:25:59.882959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 RESULT=pass
26412 22:25:59.913744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip>
26413 22:25:59.914100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip
26415 22:25:59.944804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip>
26416 22:25:59.945158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip
26418 22:25:59.976297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip>
26419 22:25:59.976649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip
26421 22:26:00.006798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 RESULT=pass>
26422 22:26:00.007150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 RESULT=pass
26424 22:26:00.038092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip>
26425 22:26:00.038448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip
26427 22:26:00.070397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip>
26428 22:26:00.070782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip
26430 22:26:00.101456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip>
26431 22:26:00.101814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip
26433 22:26:00.132631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 RESULT=pass>
26434 22:26:00.133005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 RESULT=pass
26436 22:26:00.163325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip
26438 22:26:00.163837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip>
26439 22:26:00.194317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip>
26440 22:26:00.194738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip
26442 22:26:00.225692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip>
26443 22:26:00.226040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip
26445 22:26:00.257041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 RESULT=pass>
26446 22:26:00.257381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 RESULT=pass
26448 22:26:00.288417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip
26450 22:26:00.288963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip>
26451 22:26:00.319135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip>
26452 22:26:00.319557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip
26454 22:26:00.350474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip
26456 22:26:00.350975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip>
26457 22:26:00.381679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 RESULT=pass>
26458 22:26:00.382080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 RESULT=pass
26460 22:26:00.412292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip>
26461 22:26:00.412672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip
26463 22:26:00.443475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip
26465 22:26:00.443984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip>
26466 22:26:00.474707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip>
26467 22:26:00.475073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip
26469 22:26:00.505355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 RESULT=pass>
26470 22:26:00.505692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 RESULT=pass
26472 22:26:00.536111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip>
26473 22:26:00.536469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip
26475 22:26:00.567201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip>
26476 22:26:00.567555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip
26478 22:26:00.598274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip>
26479 22:26:00.598628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip
26481 22:26:00.629822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 RESULT=pass>
26482 22:26:00.630173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 RESULT=pass
26484 22:26:00.660724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip>
26485 22:26:00.661078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip
26487 22:26:00.691935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip>
26488 22:26:00.692288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip
26490 22:26:00.722873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip>
26491 22:26:00.723227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip
26493 22:26:00.753842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 RESULT=pass>
26494 22:26:00.754197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 RESULT=pass
26496 22:26:00.784477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip>
26497 22:26:00.784834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip
26499 22:26:00.815469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip
26501 22:26:00.815923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip>
26502 22:26:00.846550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip
26504 22:26:00.846991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip>
26505 22:26:00.878475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 RESULT=pass>
26506 22:26:00.878829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 RESULT=pass
26508 22:26:00.909389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip>
26509 22:26:00.909742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip
26511 22:26:00.940524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip>
26512 22:26:00.940881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip
26514 22:26:00.972035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip>
26515 22:26:00.972475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip
26517 22:26:01.003049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 RESULT=pass>
26518 22:26:01.003479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 RESULT=pass
26520 22:26:01.034090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip>
26521 22:26:01.034448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip
26523 22:26:01.066141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip
26525 22:26:01.066686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip>
26526 22:26:01.097283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip>
26527 22:26:01.097692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip
26529 22:26:01.128531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 RESULT=pass>
26530 22:26:01.128962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 RESULT=pass
26532 22:26:01.159809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip>
26533 22:26:01.160262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip
26535 22:26:01.191201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip>
26536 22:26:01.191624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip
26538 22:26:01.223273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip>
26539 22:26:01.223724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip
26541 22:26:01.254132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 RESULT=pass>
26542 22:26:01.254586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 RESULT=pass
26544 22:26:01.285583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip>
26545 22:26:01.286050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip
26547 22:26:01.316734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip>
26548 22:26:01.317139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip
26550 22:26:01.347990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip>
26551 22:26:01.348351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip
26553 22:26:01.378895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 RESULT=pass
26555 22:26:01.379331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 RESULT=pass>
26556 22:26:01.410346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip>
26557 22:26:01.410723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip
26559 22:26:01.440962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip>
26560 22:26:01.441341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip
26562 22:26:01.472512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip>
26563 22:26:01.472912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip
26565 22:26:01.504110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 RESULT=pass>
26566 22:26:01.504529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 RESULT=pass
26568 22:26:01.534909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip>
26569 22:26:01.535326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip
26571 22:26:01.565814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip>
26572 22:26:01.566225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip
26574 22:26:01.596722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip>
26575 22:26:01.597127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip
26577 22:26:01.629156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 RESULT=pass>
26578 22:26:01.629627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 RESULT=pass
26580 22:26:01.662904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip>
26581 22:26:01.663333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip
26583 22:26:01.694474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip
26585 22:26:01.695106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip>
26586 22:26:01.726020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip>
26587 22:26:01.726505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip
26589 22:26:01.757153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 RESULT=pass>
26590 22:26:01.757622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 RESULT=pass
26592 22:26:01.788763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip
26594 22:26:01.789303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip>
26595 22:26:01.820558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip>
26596 22:26:01.820957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip
26598 22:26:01.852621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip>
26599 22:26:01.853029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip
26601 22:26:01.884890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 RESULT=pass>
26602 22:26:01.885294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 RESULT=pass
26604 22:26:01.916498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip
26606 22:26:01.916941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip>
26607 22:26:01.947902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip>
26608 22:26:01.948367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip
26610 22:26:01.978299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip>
26611 22:26:01.978667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip
26613 22:26:02.008891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 RESULT=pass>
26614 22:26:02.009235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 RESULT=pass
26616 22:26:02.039732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip>
26617 22:26:02.040077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip
26619 22:26:02.070983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip>
26620 22:26:02.071327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip
26622 22:26:02.101660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip
26624 22:26:02.102073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip>
26625 22:26:02.132862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 RESULT=pass>
26626 22:26:02.133197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 RESULT=pass
26628 22:26:02.163772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip>
26629 22:26:02.164120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip
26631 22:26:02.194168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip>
26632 22:26:02.194502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip
26634 22:26:02.225362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip>
26635 22:26:02.225684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip
26637 22:26:02.256043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 RESULT=pass
26639 22:26:02.256450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 RESULT=pass>
26640 22:26:02.286019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip>
26641 22:26:02.286344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip
26643 22:26:02.317159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip
26645 22:26:02.317914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip>
26646 22:26:02.348242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip>
26647 22:26:02.348632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip
26649 22:26:02.378539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 RESULT=pass
26651 22:26:02.379199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 RESULT=pass>
26652 22:26:02.413313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip>
26653 22:26:02.413679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip
26655 22:26:02.463639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip>
26656 22:26:02.464113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip
26658 22:26:02.494846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip>
26659 22:26:02.495301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip
26661 22:26:02.525829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 RESULT=pass>
26662 22:26:02.526291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 RESULT=pass
26664 22:26:02.556557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip>
26665 22:26:02.557015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip
26667 22:26:02.587948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip>
26668 22:26:02.588394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip
26670 22:26:02.618364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip>
26671 22:26:02.618767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip
26673 22:26:02.650068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 RESULT=pass
26675 22:26:02.650613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 RESULT=pass>
26676 22:26:02.681193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip>
26677 22:26:02.681636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip
26679 22:26:02.712367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip>
26680 22:26:02.712806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip
26682 22:26:02.744465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip>
26683 22:26:02.744928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip
26685 22:26:02.775880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 RESULT=pass>
26686 22:26:02.776279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 RESULT=pass
26688 22:26:02.807121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip>
26689 22:26:02.807577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip
26691 22:26:02.838311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip>
26692 22:26:02.838779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip
26694 22:26:02.868884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip>
26695 22:26:02.869352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip
26697 22:26:02.900292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 RESULT=pass>
26698 22:26:02.900729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 RESULT=pass
26700 22:26:02.930490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip>
26701 22:26:02.930935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip
26703 22:26:02.961382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip>
26704 22:26:02.961853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip
26706 22:26:02.992495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip>
26707 22:26:02.992954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip
26709 22:26:03.023422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 RESULT=pass
26711 22:26:03.023981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 RESULT=pass>
26712 22:26:03.053663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip>
26713 22:26:03.054026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip
26715 22:26:03.085073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip>
26716 22:26:03.085419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip
26718 22:26:03.115714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip>
26719 22:26:03.116055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip
26721 22:26:03.145887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 RESULT=pass>
26722 22:26:03.146343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 RESULT=pass
26724 22:26:03.176566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip
26726 22:26:03.177059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip>
26727 22:26:03.206849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip>
26728 22:26:03.207192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip
26730 22:26:03.238159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip>
26731 22:26:03.238609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip
26733 22:26:03.269476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 RESULT=pass>
26734 22:26:03.269965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 RESULT=pass
26736 22:26:03.300995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip>
26737 22:26:03.301454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip
26739 22:26:03.333531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip>
26740 22:26:03.334017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip
26742 22:26:03.365552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip>
26743 22:26:03.366031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip
26745 22:26:03.396939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 RESULT=pass>
26746 22:26:03.397392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 RESULT=pass
26748 22:26:03.428103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip>
26749 22:26:03.428429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip
26751 22:26:03.459720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip>
26752 22:26:03.460045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip
26754 22:26:03.491941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip>
26755 22:26:03.492281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip
26757 22:26:03.526559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 RESULT=pass
26759 22:26:03.526971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 RESULT=pass>
26760 22:26:03.561960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip>
26761 22:26:03.562423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip
26763 22:26:03.596569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip>
26764 22:26:03.597023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip
26766 22:26:03.633611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip>
26767 22:26:03.634077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip
26769 22:26:03.672581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 RESULT=pass>
26770 22:26:03.673077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 RESULT=pass
26772 22:26:03.709184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip>
26773 22:26:03.709597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip
26775 22:26:03.745238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip>
26776 22:26:03.745676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip
26778 22:26:03.776571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip>
26779 22:26:03.777025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip
26781 22:26:03.807761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 RESULT=pass>
26782 22:26:03.808205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 RESULT=pass
26784 22:26:03.838198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip>
26785 22:26:03.838604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip
26787 22:26:03.869579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip>
26788 22:26:03.870046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip
26790 22:26:03.900649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip>
26791 22:26:03.901109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip
26793 22:26:03.932271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 RESULT=pass>
26794 22:26:03.932692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 RESULT=pass
26796 22:26:03.962562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip>
26797 22:26:03.963007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip
26799 22:26:03.993889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip>
26800 22:26:03.994347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip
26802 22:26:04.024604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip>
26803 22:26:04.025010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip
26805 22:26:04.054949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 RESULT=pass>
26806 22:26:04.055310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 RESULT=pass
26808 22:26:04.085795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip>
26809 22:26:04.086153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip
26811 22:26:04.116989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip>
26812 22:26:04.117349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip
26814 22:26:04.148178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip>
26815 22:26:04.148653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip
26817 22:26:04.178562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 RESULT=pass>
26818 22:26:04.178990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 RESULT=pass
26820 22:26:04.209895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip>
26821 22:26:04.210244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip
26823 22:26:04.240833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip>
26824 22:26:04.241191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip
26826 22:26:04.272393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip
26828 22:26:04.272829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip>
26829 22:26:04.302859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 RESULT=pass>
26830 22:26:04.303198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 RESULT=pass
26832 22:26:04.333471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip>
26833 22:26:04.333815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip
26835 22:26:04.364097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip
26837 22:26:04.364503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip>
26838 22:26:04.394224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip>
26839 22:26:04.394581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip
26841 22:26:04.424965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 RESULT=pass
26843 22:26:04.425398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 RESULT=pass>
26844 22:26:04.455902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip>
26845 22:26:04.456227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip
26847 22:26:04.486252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip>
26848 22:26:04.486576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip
26850 22:26:04.516643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip>
26851 22:26:04.517001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip
26853 22:26:04.546997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 RESULT=pass>
26854 22:26:04.547355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 RESULT=pass
26856 22:26:04.577657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip>
26857 22:26:04.578013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip
26859 22:26:04.608644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip>
26860 22:26:04.608998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip
26862 22:26:04.639011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip>
26863 22:26:04.639370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip
26865 22:26:04.669832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 RESULT=pass>
26866 22:26:04.670189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 RESULT=pass
26868 22:26:04.700488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip>
26869 22:26:04.700845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip
26871 22:26:04.730838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip>
26872 22:26:04.731196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip
26874 22:26:04.761335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip>
26875 22:26:04.761686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip
26877 22:26:04.792061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 RESULT=pass>
26878 22:26:04.792417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 RESULT=pass
26880 22:26:04.822489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip
26882 22:26:04.823029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip>
26883 22:26:04.852625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip>
26884 22:26:04.852983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip
26886 22:26:04.883127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip>
26887 22:26:04.883497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip
26889 22:26:04.914494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 RESULT=pass
26891 22:26:04.915098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 RESULT=pass>
26892 22:26:04.945556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip
26894 22:26:04.946339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip>
26895 22:26:04.976335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip
26897 22:26:04.976805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip>
26898 22:26:05.006975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip
26900 22:26:05.007418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip>
26901 22:26:05.037700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 RESULT=pass>
26902 22:26:05.038054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 RESULT=pass
26904 22:26:05.068462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip>
26905 22:26:05.068816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip
26907 22:26:05.099857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip>
26908 22:26:05.100305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip
26910 22:26:05.130821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip
26912 22:26:05.131403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip>
26913 22:26:05.161702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 RESULT=pass
26915 22:26:05.162180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 RESULT=pass>
26916 22:26:05.192976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip
26918 22:26:05.193409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip>
26919 22:26:05.223916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip>
26920 22:26:05.224263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip
26922 22:26:05.254758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip>
26923 22:26:05.255100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip
26925 22:26:05.285170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 RESULT=pass
26927 22:26:05.285608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 RESULT=pass>
26928 22:26:05.315524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip
26930 22:26:05.316156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip>
26931 22:26:05.346429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip>
26932 22:26:05.346895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip
26934 22:26:05.377577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip>
26935 22:26:05.378064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip
26937 22:26:05.408251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 RESULT=pass
26939 22:26:05.408854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 RESULT=pass>
26940 22:26:05.438784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip
26942 22:26:05.439260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip>
26943 22:26:05.469403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip
26945 22:26:05.469854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip>
26946 22:26:05.500324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip>
26947 22:26:05.500682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip
26949 22:26:05.530694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 RESULT=pass
26951 22:26:05.531112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 RESULT=pass>
26952 22:26:05.561992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip>
26953 22:26:05.562345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip
26955 22:26:05.594065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip>
26956 22:26:05.594440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip
26958 22:26:05.624999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip
26960 22:26:05.625434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip>
26961 22:26:05.656322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 RESULT=pass>
26962 22:26:05.656675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 RESULT=pass
26964 22:26:05.688513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip>
26965 22:26:05.688880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip
26967 22:26:05.734144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip>
26968 22:26:05.734629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip
26970 22:26:05.768380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip>
26971 22:26:05.768826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip
26973 22:26:05.798986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 RESULT=pass>
26974 22:26:05.799320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 RESULT=pass
26976 22:26:05.829980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip>
26977 22:26:05.830330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip
26979 22:26:05.861286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip>
26980 22:26:05.861633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip
26982 22:26:05.892918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip>
26983 22:26:05.893269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip
26985 22:26:05.925315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 RESULT=pass>
26986 22:26:05.925672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 RESULT=pass
26988 22:26:05.956847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip>
26989 22:26:05.957196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip
26991 22:26:05.988393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip>
26992 22:26:05.988855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip
26994 22:26:06.019794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip
26996 22:26:06.020326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip>
26997 22:26:06.051071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 RESULT=pass
26999 22:26:06.051600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 RESULT=pass>
27000 22:26:06.083005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip>
27001 22:26:06.083362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip
27003 22:26:06.114761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip>
27004 22:26:06.115119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip
27006 22:26:06.145990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip>
27007 22:26:06.146359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip
27009 22:26:06.177430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 RESULT=pass>
27010 22:26:06.177787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 RESULT=pass
27012 22:26:06.208515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip>
27013 22:26:06.208871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip
27015 22:26:06.239923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip>
27016 22:26:06.240278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip
27018 22:26:06.272531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip
27020 22:26:06.273325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip>
27021 22:26:06.303396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 RESULT=pass
27023 22:26:06.303862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 RESULT=pass>
27024 22:26:06.334872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip>
27025 22:26:06.335284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip
27027 22:26:06.366232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip>
27028 22:26:06.366636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip
27030 22:26:06.397471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip
27032 22:26:06.397916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip>
27033 22:26:06.428304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 RESULT=pass>
27034 22:26:06.428702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 RESULT=pass
27036 22:26:06.461727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip>
27037 22:26:06.462158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip
27039 22:26:06.493330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip>
27040 22:26:06.493793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip
27042 22:26:06.524514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip>
27043 22:26:06.524894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip
27045 22:26:06.554689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 RESULT=pass>
27046 22:26:06.555035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 RESULT=pass
27048 22:26:06.585791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip>
27049 22:26:06.586137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip
27051 22:26:06.616444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip>
27052 22:26:06.616786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip
27054 22:26:06.647751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip>
27055 22:26:06.648105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip
27057 22:26:06.679516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 RESULT=pass>
27058 22:26:06.679856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 RESULT=pass
27060 22:26:06.710758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip>
27061 22:26:06.711094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip
27063 22:26:06.744461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip>
27064 22:26:06.745000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip
27066 22:26:06.775884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip>
27067 22:26:06.776298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip
27069 22:26:06.814364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 RESULT=pass
27071 22:26:06.814785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 RESULT=pass>
27072 22:26:06.857251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip
27074 22:26:06.857698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip>
27075 22:26:06.889680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip>
27076 22:26:06.890089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip
27078 22:26:06.921643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip>
27079 22:26:06.921995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip
27081 22:26:06.953055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 RESULT=pass>
27082 22:26:06.953496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 RESULT=pass
27084 22:26:06.984516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip>
27085 22:26:06.984969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip
27087 22:26:07.015855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip>
27088 22:26:07.016312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip
27090 22:26:07.046811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip>
27091 22:26:07.047242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip
27093 22:26:07.077829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 RESULT=pass>
27094 22:26:07.078284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 RESULT=pass
27096 22:26:07.109690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip
27098 22:26:07.110263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip>
27099 22:26:07.141593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip>
27100 22:26:07.142044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip
27102 22:26:07.175022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip
27104 22:26:07.175601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip>
27105 22:26:07.208667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 RESULT=pass>
27106 22:26:07.209082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 RESULT=pass
27108 22:26:07.242863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip>
27109 22:26:07.243256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip
27111 22:26:07.277000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip
27113 22:26:07.277509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip>
27114 22:26:07.312035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip>
27115 22:26:07.312459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip
27117 22:26:07.356316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 RESULT=pass>
27118 22:26:07.356758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 RESULT=pass
27120 22:26:07.391439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip
27122 22:26:07.391910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip>
27123 22:26:07.428739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip
27125 22:26:07.429197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip>
27126 22:26:07.464717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip>
27127 22:26:07.465138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip
27129 22:26:07.500950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 RESULT=pass>
27130 22:26:07.501316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 RESULT=pass
27132 22:26:07.601799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip>
27133 22:26:07.602213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip
27135 22:26:07.638014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip
27137 22:26:07.638441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip>
27138 22:26:07.671982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip>
27139 22:26:07.672363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip
27141 22:26:07.706582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 RESULT=pass>
27142 22:26:07.706983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 RESULT=pass
27144 22:26:07.741576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip
27146 22:26:07.742163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip>
27147 22:26:07.774551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip>
27148 22:26:07.774931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip
27150 22:26:07.808665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip>
27151 22:26:07.809051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip
27153 22:26:07.842072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 RESULT=pass>
27154 22:26:07.842453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 RESULT=pass
27156 22:26:07.874625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip>
27157 22:26:07.875008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip
27159 22:26:07.907563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip
27161 22:26:07.908012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip>
27162 22:26:07.940098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip>
27163 22:26:07.940465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip
27165 22:26:07.971805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 RESULT=pass>
27166 22:26:07.972265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 RESULT=pass
27168 22:26:08.002816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip>
27169 22:26:08.003254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip
27171 22:26:08.034169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip
27173 22:26:08.034710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip>
27174 22:26:08.065463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip
27176 22:26:08.066010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip>
27177 22:26:08.097054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 RESULT=pass>
27178 22:26:08.097500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 RESULT=pass
27180 22:26:08.128766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip>
27181 22:26:08.129225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip
27183 22:26:08.160296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip>
27184 22:26:08.160735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip
27186 22:26:08.190988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip>
27187 22:26:08.191453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip
27189 22:26:08.221386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 RESULT=pass>
27190 22:26:08.221733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 RESULT=pass
27192 22:26:08.251999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip>
27193 22:26:08.252337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip
27195 22:26:08.283825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip>
27196 22:26:08.284161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip
27198 22:26:08.314556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip>
27199 22:26:08.314915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip
27201 22:26:08.345027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 RESULT=pass
27203 22:26:08.345449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 RESULT=pass>
27204 22:26:08.375737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip>
27205 22:26:08.376061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip
27207 22:26:08.405830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip>
27208 22:26:08.406280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip
27210 22:26:08.437272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip>
27211 22:26:08.437688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip
27213 22:26:08.468318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 RESULT=pass
27215 22:26:08.468854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 RESULT=pass>
27216 22:26:08.499381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip
27218 22:26:08.499903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip>
27219 22:26:08.530643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip>
27220 22:26:08.531086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip
27222 22:26:08.561701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip>
27223 22:26:08.562077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip
27225 22:26:08.592353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 RESULT=pass>
27226 22:26:08.592717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 RESULT=pass
27228 22:26:08.622747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip>
27229 22:26:08.623091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip
27231 22:26:08.653520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip>
27232 22:26:08.653974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip
27234 22:26:08.685286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip
27236 22:26:08.685834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip>
27237 22:26:08.716260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 RESULT=pass>
27238 22:26:08.716624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 RESULT=pass
27240 22:26:08.746934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip>
27241 22:26:08.747305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip
27243 22:26:08.777775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip>
27244 22:26:08.778166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip
27246 22:26:08.808766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip>
27247 22:26:08.809159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip
27249 22:26:08.839722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 RESULT=pass
27251 22:26:08.840298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 RESULT=pass>
27252 22:26:08.870296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip>
27253 22:26:08.870757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip
27255 22:26:08.901986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip
27257 22:26:08.902577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip>
27258 22:26:08.933121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip>
27259 22:26:08.933515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip
27261 22:26:08.964392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 RESULT=pass>
27262 22:26:08.964797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 RESULT=pass
27264 22:26:08.996159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip>
27265 22:26:08.996610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip
27267 22:26:09.027427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip
27269 22:26:09.027932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip>
27270 22:26:09.058811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip>
27271 22:26:09.059271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip
27273 22:26:09.090974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 RESULT=pass
27275 22:26:09.091601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 RESULT=pass>
27276 22:26:09.122341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip>
27277 22:26:09.122813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip
27279 22:26:09.153023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip>
27280 22:26:09.153445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip
27282 22:26:09.184054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip
27284 22:26:09.184420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip>
27285 22:26:09.214404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 RESULT=pass
27287 22:26:09.214879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 RESULT=pass>
27288 22:26:09.245190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip>
27289 22:26:09.245598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip
27291 22:26:09.279079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip>
27292 22:26:09.279495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip
27294 22:26:09.310546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip
27296 22:26:09.311074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip>
27297 22:26:09.341091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 RESULT=pass>
27298 22:26:09.341444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 RESULT=pass
27300 22:26:09.372203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip>
27301 22:26:09.372487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip
27303 22:26:09.402788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip>
27304 22:26:09.403138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip
27306 22:26:09.433831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip>
27307 22:26:09.434179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip
27309 22:26:09.464424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 RESULT=pass>
27310 22:26:09.464768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 RESULT=pass
27312 22:26:09.495662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip>
27313 22:26:09.496006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip
27315 22:26:09.526179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip>
27316 22:26:09.526519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip
27318 22:26:09.556717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip>
27319 22:26:09.557062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip
27321 22:26:09.587465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 RESULT=pass
27323 22:26:09.587882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 RESULT=pass>
27324 22:26:09.618212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip>
27325 22:26:09.618554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip
27327 22:26:09.648762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip>
27328 22:26:09.649123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip
27330 22:26:09.679606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip
27332 22:26:09.680128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip>
27333 22:26:09.710095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 RESULT=pass
27335 22:26:09.710610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 RESULT=pass>
27336 22:26:09.741046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip>
27337 22:26:09.741374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip
27339 22:26:09.772328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip>
27340 22:26:09.772652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip
27342 22:26:09.802887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip>
27343 22:26:09.803223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip
27345 22:26:09.834072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 RESULT=pass
27347 22:26:09.834474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 RESULT=pass>
27348 22:26:09.864641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip>
27349 22:26:09.864985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip
27351 22:26:09.895345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip
27353 22:26:09.895833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip>
27354 22:26:09.925996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip
27356 22:26:09.926403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip>
27357 22:26:09.956380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 RESULT=pass>
27358 22:26:09.956719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 RESULT=pass
27360 22:26:09.986651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip>
27361 22:26:09.987008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip
27363 22:26:10.017256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip>
27364 22:26:10.017614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip
27366 22:26:10.048264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip>
27367 22:26:10.048607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip
27369 22:26:10.079395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 RESULT=pass
27371 22:26:10.079818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 RESULT=pass>
27372 22:26:10.109631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip>
27373 22:26:10.109993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip
27375 22:26:10.140492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip>
27376 22:26:10.140906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip
27378 22:26:10.171613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip>
27379 22:26:10.172010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip
27381 22:26:10.202475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 RESULT=pass>
27382 22:26:10.202876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 RESULT=pass
27384 22:26:10.233547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip>
27385 22:26:10.233955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip
27387 22:26:10.265220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip>
27388 22:26:10.265620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip
27390 22:26:10.296310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip>
27391 22:26:10.296763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip
27393 22:26:10.326796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 RESULT=pass>
27394 22:26:10.327269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 RESULT=pass
27396 22:26:10.358040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip>
27397 22:26:10.358514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip
27399 22:26:10.388771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip>
27400 22:26:10.389245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip
27402 22:26:10.421097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip>
27403 22:26:10.421572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip
27405 22:26:10.453100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 RESULT=pass>
27406 22:26:10.453508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 RESULT=pass
27408 22:26:10.484870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip>
27409 22:26:10.485356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip
27411 22:26:10.516315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip
27413 22:26:10.516948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip>
27414 22:26:10.547839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip>
27415 22:26:10.548312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip
27417 22:26:10.578145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 RESULT=pass>
27418 22:26:10.578628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 RESULT=pass
27420 22:26:10.609449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip>
27421 22:26:10.610015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip
27423 22:26:10.641119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip>
27424 22:26:10.641616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip
27426 22:26:10.673389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip>
27427 22:26:10.673851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip
27429 22:26:10.704773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 RESULT=pass
27431 22:26:10.705412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 RESULT=pass>
27432 22:26:10.736234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip>
27433 22:26:10.736712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip
27435 22:26:10.768974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip>
27436 22:26:10.769386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip
27438 22:26:10.801601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip>
27439 22:26:10.802065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip
27441 22:26:10.833412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 RESULT=pass>
27442 22:26:10.833869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 RESULT=pass
27444 22:26:10.864691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip>
27445 22:26:10.865134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip
27447 22:26:10.895932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip>
27448 22:26:10.896395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip
27450 22:26:10.926773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip>
27451 22:26:10.927177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip
27453 22:26:10.958011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 RESULT=pass>
27454 22:26:10.958417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 RESULT=pass
27456 22:26:10.989243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip>
27457 22:26:10.989640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip
27459 22:26:11.020448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip>
27460 22:26:11.020904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip
27462 22:26:11.050790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip>
27463 22:26:11.051156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip
27465 22:26:11.082387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 RESULT=pass>
27466 22:26:11.082734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 RESULT=pass
27468 22:26:11.113121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip>
27469 22:26:11.113573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip
27471 22:26:11.143869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip
27473 22:26:11.144366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip>
27474 22:26:11.174524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip>
27475 22:26:11.174891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip
27477 22:26:11.204824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 RESULT=pass>
27478 22:26:11.205179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 RESULT=pass
27480 22:26:11.235442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip
27482 22:26:11.235918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip>
27483 22:26:11.266788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip>
27484 22:26:11.267148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip
27486 22:26:11.297873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip>
27487 22:26:11.298226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip
27489 22:26:11.328350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 RESULT=pass>
27490 22:26:11.328690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 RESULT=pass
27492 22:26:11.358902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip>
27493 22:26:11.359366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip
27495 22:26:11.390067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip>
27496 22:26:11.390530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip
27498 22:26:11.421612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip>
27499 22:26:11.422006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip
27501 22:26:11.452289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 RESULT=pass>
27502 22:26:11.452769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 RESULT=pass
27504 22:26:11.482883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip>
27505 22:26:11.483355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip
27507 22:26:11.513974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip>
27508 22:26:11.514421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip
27510 22:26:11.544452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip>
27511 22:26:11.544861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip
27513 22:26:11.575046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 RESULT=pass
27515 22:26:11.575495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 RESULT=pass>
27516 22:26:11.605951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip>
27517 22:26:11.606349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip
27519 22:26:11.636520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip>
27520 22:26:11.636910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip
27522 22:26:11.667752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip>
27523 22:26:11.668147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip
27525 22:26:11.698706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 RESULT=pass>
27526 22:26:11.699108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 RESULT=pass
27528 22:26:11.729924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip>
27529 22:26:11.730320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip
27531 22:26:11.761218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip>
27532 22:26:11.761619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip
27534 22:26:11.792694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip>
27535 22:26:11.793130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip
27537 22:26:11.825576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 RESULT=pass>
27538 22:26:11.825995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 RESULT=pass
27540 22:26:11.858295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip
27542 22:26:11.858849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip>
27543 22:26:11.890198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip>
27544 22:26:11.890680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip
27546 22:26:11.924534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip
27548 22:26:11.925085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip>
27549 22:26:11.956776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 RESULT=pass>
27550 22:26:11.957314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 RESULT=pass
27552 22:26:11.988703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip
27554 22:26:11.989428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip>
27555 22:26:12.020286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip>
27556 22:26:12.020700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip
27558 22:26:12.051947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip>
27559 22:26:12.052358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip
27561 22:26:12.084381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 RESULT=pass>
27562 22:26:12.084794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 RESULT=pass
27564 22:26:12.117601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip>
27565 22:26:12.118027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip
27567 22:26:12.150012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip>
27568 22:26:12.150486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip
27570 22:26:12.181491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip>
27571 22:26:12.181988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip
27573 22:26:12.213705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 RESULT=pass>
27574 22:26:12.214175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 RESULT=pass
27576 22:26:12.245275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip>
27577 22:26:12.245699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip
27579 22:26:12.277731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip>
27580 22:26:12.278191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip
27582 22:26:12.309000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip>
27583 22:26:12.309459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip
27585 22:26:12.339911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 RESULT=pass>
27586 22:26:12.340286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 RESULT=pass
27588 22:26:12.373327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip
27590 22:26:12.373868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip>
27591 22:26:12.406751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip
27593 22:26:12.407249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip>
27594 22:26:12.441688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip>
27595 22:26:12.442070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip
27597 22:26:12.475686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 RESULT=pass>
27598 22:26:12.476055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 RESULT=pass
27600 22:26:12.509556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip>
27601 22:26:12.509960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip
27603 22:26:12.546626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip
27605 22:26:12.547163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip>
27606 22:26:12.578298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip>
27607 22:26:12.578776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip
27609 22:26:12.609688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 RESULT=pass>
27610 22:26:12.610144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 RESULT=pass
27612 22:26:12.641213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip>
27613 22:26:12.641599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip
27615 22:26:12.692932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip
27617 22:26:12.693377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip>
27618 22:26:12.724962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip>
27619 22:26:12.725415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip
27621 22:26:12.757270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 RESULT=pass>
27622 22:26:12.757704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 RESULT=pass
27624 22:26:12.788516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip>
27625 22:26:12.788976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip
27627 22:26:12.820088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip>
27628 22:26:12.820532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip
27630 22:26:12.850929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip
27632 22:26:12.851468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip>
27633 22:26:12.882457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 RESULT=pass>
27634 22:26:12.882901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 RESULT=pass
27636 22:26:12.913437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip>
27637 22:26:12.913892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip
27639 22:26:12.944874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip>
27640 22:26:12.945324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip
27642 22:26:12.976101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip>
27643 22:26:12.976553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip
27645 22:26:13.006891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 RESULT=pass>
27646 22:26:13.007332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 RESULT=pass
27648 22:26:13.038826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip>
27649 22:26:13.039284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip
27651 22:26:13.069961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip>
27652 22:26:13.070408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip
27654 22:26:13.101340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip
27656 22:26:13.101898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip>
27657 22:26:13.133143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 RESULT=pass
27659 22:26:13.133600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 RESULT=pass>
27660 22:26:13.165673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip>
27661 22:26:13.166074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip
27663 22:26:13.196687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip>
27664 22:26:13.197148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip
27666 22:26:13.228116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip
27668 22:26:13.228674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip>
27669 22:26:13.259660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 RESULT=pass>
27670 22:26:13.260148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 RESULT=pass
27672 22:26:13.291944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip
27674 22:26:13.292570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip>
27675 22:26:13.323403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip
27677 22:26:13.323773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip>
27678 22:26:13.355162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip
27680 22:26:13.355709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip>
27681 22:26:13.386310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 RESULT=pass
27683 22:26:13.386760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 RESULT=pass>
27684 22:26:13.417318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip>
27685 22:26:13.417686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip
27687 22:26:13.448154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip>
27688 22:26:13.448535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip
27690 22:26:13.479889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip>
27691 22:26:13.480297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip
27693 22:26:13.510856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 RESULT=pass
27695 22:26:13.511337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 RESULT=pass>
27696 22:26:13.541847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip>
27697 22:26:13.542253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip
27699 22:26:13.573173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip>
27700 22:26:13.573628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip
27702 22:26:13.604311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip>
27703 22:26:13.604681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip
27705 22:26:13.635408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 RESULT=pass
27707 22:26:13.635923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 RESULT=pass>
27708 22:26:13.666452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip>
27709 22:26:13.666818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip
27711 22:26:13.697583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip>
27712 22:26:13.697993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip
27714 22:26:13.728546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip>
27715 22:26:13.728920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip
27717 22:26:13.759854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 RESULT=pass>
27718 22:26:13.760268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 RESULT=pass
27720 22:26:13.790718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip>
27721 22:26:13.791097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip
27723 22:26:13.821971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip>
27724 22:26:13.822391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip
27726 22:26:13.852510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip>
27727 22:26:13.852881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip
27729 22:26:13.885028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 RESULT=pass>
27730 22:26:13.885473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 RESULT=pass
27732 22:26:13.916382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip>
27733 22:26:13.916795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip
27735 22:26:13.946973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip>
27736 22:26:13.947379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip
27738 22:26:13.978001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip
27740 22:26:13.978536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip>
27741 22:26:14.009007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 RESULT=pass>
27742 22:26:14.009406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 RESULT=pass
27744 22:26:14.040453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip>
27745 22:26:14.040878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip
27747 22:26:14.071154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip>
27748 22:26:14.071549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip
27750 22:26:14.102151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip>
27751 22:26:14.102543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip
27753 22:26:14.133471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 RESULT=pass>
27754 22:26:14.133951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 RESULT=pass
27756 22:26:14.164969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip>
27757 22:26:14.165422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip
27759 22:26:14.196510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip>
27760 22:26:14.196920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip
27762 22:26:14.227437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip
27764 22:26:14.227976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip>
27765 22:26:14.258466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 RESULT=pass>
27766 22:26:14.258923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 RESULT=pass
27768 22:26:14.290032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip>
27769 22:26:14.290441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip
27771 22:26:14.321788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip
27773 22:26:14.322146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip>
27774 22:26:14.352547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip>
27775 22:26:14.352884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip
27777 22:26:14.384264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 RESULT=pass
27779 22:26:14.384612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 RESULT=pass>
27780 22:26:14.415574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip
27782 22:26:14.416121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip>
27783 22:26:14.446898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip>
27784 22:26:14.447312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip
27786 22:26:14.478594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip
27788 22:26:14.479133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip>
27789 22:26:14.509011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace RESULT=pass>
27790 22:26:14.509458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace RESULT=pass
27792 22:26:14.540428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_Enumerated_16_vector_lengths RESULT=pass>
27793 22:26:14.540822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_Enumerated_16_vector_lengths RESULT=pass
27795 22:26:14.570991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_All_vector_lengths_valid RESULT=pass
27797 22:26:14.571430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_All_vector_lengths_valid RESULT=pass>
27798 22:26:14.601466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls RESULT=pass>
27799 22:26:14.601909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls RESULT=pass
27801 22:26:14.632455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_default_vector_length_64 RESULT=pass>
27802 22:26:14.632776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_default_vector_length_64 RESULT=pass
27804 22:26:14.662703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_minimum_vector_length_16 RESULT=pass>
27805 22:26:14.663114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_minimum_vector_length_16 RESULT=pass
27807 22:26:14.693834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_maximum_vector_length_256 RESULT=pass>
27808 22:26:14.694265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_maximum_vector_length_256 RESULT=pass
27810 22:26:14.725044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_current_VL_is_64 RESULT=pass
27812 22:26:14.725573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_current_VL_is_64 RESULT=pass>
27813 22:26:14.756862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 RESULT=pass>
27814 22:26:14.757299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 RESULT=pass
27816 22:26:14.788511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_min_max RESULT=pass
27818 22:26:14.789088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_min_max RESULT=pass>
27819 22:26:14.820610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_used_default RESULT=pass>
27820 22:26:14.821066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_used_default RESULT=pass
27822 22:26:14.852488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_was_inherited RESULT=pass>
27823 22:26:14.852975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_was_inherited RESULT=pass
27825 22:26:14.884106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_set_on_exec RESULT=pass>
27826 22:26:14.884573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_set_on_exec RESULT=pass
27828 22:26:14.914896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors RESULT=pass>
27829 22:26:14.915384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors RESULT=pass
27831 22:26:14.946217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_default_vector_length_32 RESULT=pass>
27832 22:26:14.946682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_default_vector_length_32 RESULT=pass
27834 22:26:14.977261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_minimum_vector_length_16 RESULT=pass
27836 22:26:14.977702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_minimum_vector_length_16 RESULT=pass>
27837 22:26:15.008536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_maximum_vector_length_256 RESULT=pass>
27838 22:26:15.008956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_maximum_vector_length_256 RESULT=pass
27840 22:26:15.040165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_current_VL_is_32 RESULT=pass>
27841 22:26:15.040588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_current_VL_is_32 RESULT=pass
27843 22:26:15.072497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 RESULT=pass>
27844 22:26:15.072940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 RESULT=pass
27846 22:26:15.104002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_min_max RESULT=pass>
27847 22:26:15.104440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_min_max RESULT=pass
27849 22:26:15.135891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_used_default RESULT=pass>
27850 22:26:15.136347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_used_default RESULT=pass
27852 22:26:15.166897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_was_inherited RESULT=pass>
27853 22:26:15.167368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_was_inherited RESULT=pass
27855 22:26:15.198053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_set_on_exec RESULT=pass>
27856 22:26:15.198451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_set_on_exec RESULT=pass
27858 22:26:15.229576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors RESULT=pass
27860 22:26:15.230025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors RESULT=pass>
27861 22:26:15.260279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg RESULT=pass>
27862 22:26:15.260688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg RESULT=pass
27864 22:26:15.291363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork_fork_test RESULT=pass
27866 22:26:15.291798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork_fork_test RESULT=pass>
27867 22:26:15.322607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork RESULT=pass
27869 22:26:15.323052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork RESULT=pass>
27870 22:26:15.353640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_16 RESULT=pass>
27871 22:26:15.354106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_16 RESULT=pass
27873 22:26:15.384803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_16 RESULT=pass
27875 22:26:15.385380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_16 RESULT=pass>
27876 22:26:15.415467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_16 RESULT=pass
27878 22:26:15.416047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_16 RESULT=pass>
27879 22:26:15.445911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_32 RESULT=pass
27881 22:26:15.446261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_32 RESULT=pass>
27882 22:26:15.477155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_32 RESULT=pass>
27883 22:26:15.477513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_32 RESULT=pass
27885 22:26:15.507735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_32 RESULT=pass>
27886 22:26:15.508073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_32 RESULT=pass
27888 22:26:15.538270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_48 RESULT=pass
27890 22:26:15.538641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_48 RESULT=pass>
27891 22:26:15.568437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_48 RESULT=skip>
27892 22:26:15.568744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_48 RESULT=skip
27894 22:26:15.598911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_48 RESULT=skip>
27895 22:26:15.599300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_48 RESULT=skip
27897 22:26:15.629634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_64 RESULT=pass>
27898 22:26:15.630076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_64 RESULT=pass
27900 22:26:15.660336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_64 RESULT=pass
27902 22:26:15.660802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_64 RESULT=pass>
27903 22:26:15.690920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_64 RESULT=pass
27905 22:26:15.691392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_64 RESULT=pass>
27906 22:26:15.722618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_80 RESULT=pass
27908 22:26:15.723114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_80 RESULT=pass>
27909 22:26:15.754260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_80 RESULT=skip>
27910 22:26:15.754692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_80 RESULT=skip
27912 22:26:15.785682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_80 RESULT=skip
27914 22:26:15.786227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_80 RESULT=skip>
27915 22:26:15.816205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_96 RESULT=pass>
27916 22:26:15.816642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_96 RESULT=pass
27918 22:26:15.846834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_96 RESULT=skip>
27919 22:26:15.847266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_96 RESULT=skip
27921 22:26:15.878973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_96 RESULT=skip>
27922 22:26:15.879383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_96 RESULT=skip
27924 22:26:15.909834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_112 RESULT=pass
27926 22:26:15.910376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_112 RESULT=pass>
27927 22:26:15.940584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_112 RESULT=skip
27929 22:26:15.941193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_112 RESULT=skip>
27930 22:26:15.971126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_112 RESULT=skip
27932 22:26:15.971733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_112 RESULT=skip>
27933 22:26:16.002067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_128 RESULT=pass>
27934 22:26:16.002534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_128 RESULT=pass
27936 22:26:16.032920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_128 RESULT=pass
27938 22:26:16.033470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_128 RESULT=pass>
27939 22:26:16.064187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_128 RESULT=pass
27941 22:26:16.064720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_128 RESULT=pass>
27942 22:26:16.094372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_144 RESULT=pass>
27943 22:26:16.094831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_144 RESULT=pass
27945 22:26:16.126316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_144 RESULT=skip
27947 22:26:16.126739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_144 RESULT=skip>
27948 22:26:16.157793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_144 RESULT=skip>
27949 22:26:16.158245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_144 RESULT=skip
27951 22:26:16.188782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_160 RESULT=pass
27953 22:26:16.189320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_160 RESULT=pass>
27954 22:26:16.219769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_160 RESULT=skip
27956 22:26:16.220226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_160 RESULT=skip>
27957 22:26:16.250326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_160 RESULT=skip
27959 22:26:16.250797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_160 RESULT=skip>
27960 22:26:16.280529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_176 RESULT=pass>
27961 22:26:16.280964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_176 RESULT=pass
27963 22:26:16.312130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_176 RESULT=skip
27965 22:26:16.312627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_176 RESULT=skip>
27966 22:26:16.342996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_176 RESULT=skip
27968 22:26:16.343754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_176 RESULT=skip>
27969 22:26:16.374619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_192 RESULT=pass>
27970 22:26:16.375030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_192 RESULT=pass
27972 22:26:16.406193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_192 RESULT=skip
27974 22:26:16.406722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_192 RESULT=skip>
27975 22:26:16.437270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_192 RESULT=skip>
27976 22:26:16.437690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_192 RESULT=skip
27978 22:26:16.468991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_208 RESULT=pass>
27979 22:26:16.469464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_208 RESULT=pass
27981 22:26:16.500585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_208 RESULT=skip>
27982 22:26:16.501043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_208 RESULT=skip
27984 22:26:16.531256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_208 RESULT=skip
27986 22:26:16.531702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_208 RESULT=skip>
27987 22:26:16.562892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_224 RESULT=pass
27989 22:26:16.563354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_224 RESULT=pass>
27990 22:26:16.593439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_224 RESULT=skip
27992 22:26:16.593797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_224 RESULT=skip>
27993 22:26:16.624160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_224 RESULT=skip
27995 22:26:16.624636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_224 RESULT=skip>
27996 22:26:16.655593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_240 RESULT=pass>
27997 22:26:16.656019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_240 RESULT=pass
27999 22:26:16.688292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_240 RESULT=skip>
28000 22:26:16.688667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_240 RESULT=skip
28002 22:26:16.719104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_240 RESULT=skip
28004 22:26:16.719584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_240 RESULT=skip>
28005 22:26:16.749306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_256 RESULT=pass
28007 22:26:16.749865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_256 RESULT=pass>
28008 22:26:16.780189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_256 RESULT=pass>
28009 22:26:16.780555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_256 RESULT=pass
28011 22:26:16.810974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_256 RESULT=pass>
28012 22:26:16.811416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_256 RESULT=pass
28014 22:26:16.841475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_272 RESULT=pass>
28015 22:26:16.841858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_272 RESULT=pass
28017 22:26:16.873317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_272 RESULT=skip
28019 22:26:16.873827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_272 RESULT=skip>
28020 22:26:16.904551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_272 RESULT=skip>
28021 22:26:16.905004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_272 RESULT=skip
28023 22:26:16.935303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_288 RESULT=pass
28025 22:26:16.935806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_288 RESULT=pass>
28026 22:26:16.968623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_288 RESULT=skip>
28027 22:26:16.969041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_288 RESULT=skip
28029 22:26:17.000644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_288 RESULT=skip
28031 22:26:17.001098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_288 RESULT=skip>
28032 22:26:17.032072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_304 RESULT=pass>
28033 22:26:17.032479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_304 RESULT=pass
28035 22:26:17.062811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_304 RESULT=skip
28037 22:26:17.063172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_304 RESULT=skip>
28038 22:26:17.094373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_304 RESULT=skip
28040 22:26:17.094790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_304 RESULT=skip>
28041 22:26:17.125412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_320 RESULT=pass
28043 22:26:17.125774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_320 RESULT=pass>
28044 22:26:17.155978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_320 RESULT=skip
28046 22:26:17.156343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_320 RESULT=skip>
28047 22:26:17.186347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_320 RESULT=skip
28049 22:26:17.186882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_320 RESULT=skip>
28050 22:26:17.216940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_336 RESULT=pass
28052 22:26:17.217523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_336 RESULT=pass>
28053 22:26:17.247740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_336 RESULT=skip
28055 22:26:17.248272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_336 RESULT=skip>
28056 22:26:17.278315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_336 RESULT=skip>
28057 22:26:17.278722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_336 RESULT=skip
28059 22:26:17.309771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_352 RESULT=pass>
28060 22:26:17.310297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_352 RESULT=pass
28062 22:26:17.340601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_352 RESULT=skip>
28063 22:26:17.341086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_352 RESULT=skip
28065 22:26:17.373586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_352 RESULT=skip>
28066 22:26:17.374031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_352 RESULT=skip
28068 22:26:17.411267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_368 RESULT=pass
28070 22:26:17.411878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_368 RESULT=pass>
28071 22:26:17.442927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_368 RESULT=skip
28073 22:26:17.443471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_368 RESULT=skip>
28074 22:26:17.474806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_368 RESULT=skip>
28075 22:26:17.475246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_368 RESULT=skip
28077 22:26:17.506477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_384 RESULT=pass>
28078 22:26:17.506936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_384 RESULT=pass
28080 22:26:17.538371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_384 RESULT=skip>
28081 22:26:17.538821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_384 RESULT=skip
28083 22:26:17.569917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_384 RESULT=skip
28085 22:26:17.570457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_384 RESULT=skip>
28086 22:26:17.601383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_400 RESULT=pass>
28087 22:26:17.601835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_400 RESULT=pass
28089 22:26:17.633161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_400 RESULT=skip>
28090 22:26:17.633633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_400 RESULT=skip
28092 22:26:17.665181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_400 RESULT=skip>
28093 22:26:17.665680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_400 RESULT=skip
28095 22:26:17.697389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_416 RESULT=pass
28097 22:26:17.698071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_416 RESULT=pass>
28098 22:26:17.728771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_416 RESULT=skip
28100 22:26:17.729286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_416 RESULT=skip>
28101 22:26:17.759928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_416 RESULT=skip>
28102 22:26:17.760393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_416 RESULT=skip
28104 22:26:17.813860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_432 RESULT=pass>
28105 22:26:17.814324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_432 RESULT=pass
28107 22:26:17.845496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_432 RESULT=skip>
28108 22:26:17.845958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_432 RESULT=skip
28110 22:26:17.876161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_432 RESULT=skip>
28111 22:26:17.876604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_432 RESULT=skip
28113 22:26:17.910162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_448 RESULT=pass
28115 22:26:17.910612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_448 RESULT=pass>
28116 22:26:17.942159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_448 RESULT=skip>
28117 22:26:17.942610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_448 RESULT=skip
28119 22:26:17.973386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_448 RESULT=skip
28121 22:26:17.973942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_448 RESULT=skip>
28122 22:26:18.004219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_464 RESULT=pass>
28123 22:26:18.004668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_464 RESULT=pass
28125 22:26:18.035540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_464 RESULT=skip
28127 22:26:18.035946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_464 RESULT=skip>
28128 22:26:18.068151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_464 RESULT=skip>
28129 22:26:18.068500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_464 RESULT=skip
28131 22:26:18.098861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_480 RESULT=pass
28133 22:26:18.099412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_480 RESULT=pass>
28134 22:26:18.130351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_480 RESULT=skip
28136 22:26:18.130893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_480 RESULT=skip>
28137 22:26:18.161693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_480 RESULT=skip>
28138 22:26:18.162143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_480 RESULT=skip
28140 22:26:18.192548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_496 RESULT=pass>
28141 22:26:18.192997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_496 RESULT=pass
28143 22:26:18.224422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_496 RESULT=skip
28145 22:26:18.224863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_496 RESULT=skip>
28146 22:26:18.255268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_496 RESULT=skip
28148 22:26:18.255844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_496 RESULT=skip>
28149 22:26:18.286599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_512 RESULT=pass
28151 22:26:18.287030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_512 RESULT=pass>
28152 22:26:18.317558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_512 RESULT=skip
28154 22:26:18.318114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_512 RESULT=skip>
28155 22:26:18.349726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_512 RESULT=skip>
28156 22:26:18.350216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_512 RESULT=skip
28158 22:26:18.380711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_528 RESULT=pass>
28159 22:26:18.381086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_528 RESULT=pass
28161 22:26:18.412164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_528 RESULT=skip>
28162 22:26:18.412584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_528 RESULT=skip
28164 22:26:18.444234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_528 RESULT=skip
28166 22:26:18.444681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_528 RESULT=skip>
28167 22:26:18.475235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_544 RESULT=pass
28169 22:26:18.475847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_544 RESULT=pass>
28170 22:26:18.509282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_544 RESULT=skip
28172 22:26:18.509941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_544 RESULT=skip>
28173 22:26:18.542725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_544 RESULT=skip>
28174 22:26:18.543276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_544 RESULT=skip
28176 22:26:18.576545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_560 RESULT=pass>
28177 22:26:18.577036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_560 RESULT=pass
28179 22:26:18.610956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_560 RESULT=skip>
28180 22:26:18.611402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_560 RESULT=skip
28182 22:26:18.644346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_560 RESULT=skip>
28183 22:26:18.644759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_560 RESULT=skip
28185 22:26:18.681362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_576 RESULT=pass>
28186 22:26:18.681790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_576 RESULT=pass
28188 22:26:18.713017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_576 RESULT=skip>
28189 22:26:18.713488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_576 RESULT=skip
28191 22:26:18.744989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_576 RESULT=skip>
28192 22:26:18.745454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_576 RESULT=skip
28194 22:26:18.776112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_592 RESULT=pass>
28195 22:26:18.776592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_592 RESULT=pass
28197 22:26:18.808917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_592 RESULT=skip
28199 22:26:18.809362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_592 RESULT=skip>
28200 22:26:18.840736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_592 RESULT=skip
28202 22:26:18.841365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_592 RESULT=skip>
28203 22:26:18.872249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_608 RESULT=pass
28205 22:26:18.872868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_608 RESULT=pass>
28206 22:26:18.906996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_608 RESULT=skip>
28207 22:26:18.907477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_608 RESULT=skip
28209 22:26:18.940653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_608 RESULT=skip>
28210 22:26:18.941066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_608 RESULT=skip
28212 22:26:18.972923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_624 RESULT=pass
28214 22:26:18.973368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_624 RESULT=pass>
28215 22:26:19.004376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_624 RESULT=skip
28217 22:26:19.004997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_624 RESULT=skip>
28218 22:26:19.036367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_624 RESULT=skip>
28219 22:26:19.036828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_624 RESULT=skip
28221 22:26:19.066935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_640 RESULT=pass
28223 22:26:19.067352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_640 RESULT=pass>
28224 22:26:19.097262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_640 RESULT=skip>
28225 22:26:19.097601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_640 RESULT=skip
28227 22:26:19.128080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_640 RESULT=skip
28229 22:26:19.128519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_640 RESULT=skip>
28230 22:26:19.158699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_656 RESULT=pass>
28231 22:26:19.159041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_656 RESULT=pass
28233 22:26:19.190094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_656 RESULT=skip>
28234 22:26:19.190437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_656 RESULT=skip
28236 22:26:19.228933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_656 RESULT=skip>
28237 22:26:19.229390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_656 RESULT=skip
28239 22:26:19.260365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_672 RESULT=pass
28241 22:26:19.260911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_672 RESULT=pass>
28242 22:26:19.291158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_672 RESULT=skip>
28243 22:26:19.291613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_672 RESULT=skip
28245 22:26:19.322424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_672 RESULT=skip>
28246 22:26:19.322827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_672 RESULT=skip
28248 22:26:19.353329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_688 RESULT=pass>
28249 22:26:19.353680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_688 RESULT=pass
28251 22:26:19.384965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_688 RESULT=skip>
28252 22:26:19.385305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_688 RESULT=skip
28254 22:26:19.417410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_688 RESULT=skip
28256 22:26:19.417855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_688 RESULT=skip>
28257 22:26:19.448522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_704 RESULT=pass
28259 22:26:19.448932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_704 RESULT=pass>
28260 22:26:19.479678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_704 RESULT=skip>
28261 22:26:19.480030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_704 RESULT=skip
28263 22:26:19.510823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_704 RESULT=skip>
28264 22:26:19.511184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_704 RESULT=skip
28266 22:26:19.542270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_720 RESULT=pass>
28267 22:26:19.542627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_720 RESULT=pass
28269 22:26:19.573445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_720 RESULT=skip>
28270 22:26:19.573787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_720 RESULT=skip
28272 22:26:19.605202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_720 RESULT=skip
28274 22:26:19.605780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_720 RESULT=skip>
28275 22:26:19.637460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_736 RESULT=pass>
28276 22:26:19.637847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_736 RESULT=pass
28278 22:26:19.670468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_736 RESULT=skip>
28279 22:26:19.670882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_736 RESULT=skip
28281 22:26:19.702084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_736 RESULT=skip>
28282 22:26:19.702603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_736 RESULT=skip
28284 22:26:19.734755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_752 RESULT=pass>
28285 22:26:19.735132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_752 RESULT=pass
28287 22:26:19.768402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_752 RESULT=skip
28289 22:26:19.768822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_752 RESULT=skip>
28290 22:26:19.799886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_752 RESULT=skip
28292 22:26:19.800346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_752 RESULT=skip>
28293 22:26:19.830204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_768 RESULT=pass>
28294 22:26:19.830641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_768 RESULT=pass
28296 22:26:19.860374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_768 RESULT=skip>
28297 22:26:19.860809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_768 RESULT=skip
28299 22:26:19.890740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_768 RESULT=skip>
28300 22:26:19.891191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_768 RESULT=skip
28302 22:26:19.921092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_784 RESULT=pass>
28303 22:26:19.921551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_784 RESULT=pass
28305 22:26:19.952599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_784 RESULT=skip>
28306 22:26:19.953035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_784 RESULT=skip
28308 22:26:19.986039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_784 RESULT=skip>
28309 22:26:19.986485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_784 RESULT=skip
28311 22:26:20.016641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_800 RESULT=pass>
28312 22:26:20.017041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_800 RESULT=pass
28314 22:26:20.046661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_800 RESULT=skip>
28315 22:26:20.047021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_800 RESULT=skip
28317 22:26:20.077128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_800 RESULT=skip>
28318 22:26:20.077528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_800 RESULT=skip
28320 22:26:20.108372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_816 RESULT=pass>
28321 22:26:20.108782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_816 RESULT=pass
28323 22:26:20.138545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_816 RESULT=skip
28325 22:26:20.139210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_816 RESULT=skip>
28326 22:26:20.169219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_816 RESULT=skip>
28327 22:26:20.169594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_816 RESULT=skip
28329 22:26:20.200678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_832 RESULT=pass>
28330 22:26:20.201115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_832 RESULT=pass
28332 22:26:20.231332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_832 RESULT=skip
28334 22:26:20.231856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_832 RESULT=skip>
28335 22:26:20.262579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_832 RESULT=skip>
28336 22:26:20.263062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_832 RESULT=skip
28338 22:26:20.293197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_848 RESULT=pass>
28339 22:26:20.293614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_848 RESULT=pass
28341 22:26:20.324447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_848 RESULT=skip>
28342 22:26:20.324911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_848 RESULT=skip
28344 22:26:20.354949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_848 RESULT=skip>
28345 22:26:20.355385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_848 RESULT=skip
28347 22:26:20.386214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_864 RESULT=pass>
28348 22:26:20.386588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_864 RESULT=pass
28350 22:26:20.416378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_864 RESULT=skip>
28351 22:26:20.416805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_864 RESULT=skip
28353 22:26:20.447221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_864 RESULT=skip>
28354 22:26:20.447645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_864 RESULT=skip
28356 22:26:20.478886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_880 RESULT=pass>
28357 22:26:20.479332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_880 RESULT=pass
28359 22:26:20.510107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_880 RESULT=skip>
28360 22:26:20.510570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_880 RESULT=skip
28362 22:26:20.542209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_880 RESULT=skip>
28363 22:26:20.542644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_880 RESULT=skip
28365 22:26:20.572881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_896 RESULT=pass>
28366 22:26:20.573269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_896 RESULT=pass
28368 22:26:20.603764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_896 RESULT=skip
28370 22:26:20.604262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_896 RESULT=skip>
28371 22:26:20.634301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_896 RESULT=skip
28373 22:26:20.634912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_896 RESULT=skip>
28374 22:26:20.664779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_912 RESULT=pass>
28375 22:26:20.665169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_912 RESULT=pass
28377 22:26:20.696293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_912 RESULT=skip>
28378 22:26:20.696662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_912 RESULT=skip
28380 22:26:20.726982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_912 RESULT=skip
28382 22:26:20.727386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_912 RESULT=skip>
28383 22:26:20.757490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_928 RESULT=pass
28385 22:26:20.757905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_928 RESULT=pass>
28386 22:26:20.787797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_928 RESULT=skip>
28387 22:26:20.788136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_928 RESULT=skip
28389 22:26:20.818174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_928 RESULT=skip
28391 22:26:20.818581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_928 RESULT=skip>
28392 22:26:20.848507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_944 RESULT=pass>
28393 22:26:20.848847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_944 RESULT=pass
28395 22:26:20.879650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_944 RESULT=skip>
28396 22:26:20.879999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_944 RESULT=skip
28398 22:26:20.910317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_944 RESULT=skip
28400 22:26:20.910713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_944 RESULT=skip>
28401 22:26:20.941775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_960 RESULT=pass
28403 22:26:20.942164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_960 RESULT=pass>
28404 22:26:20.974594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_960 RESULT=skip
28406 22:26:20.975026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_960 RESULT=skip>
28407 22:26:21.005854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_960 RESULT=skip>
28408 22:26:21.006180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_960 RESULT=skip
28410 22:26:21.037446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_976 RESULT=pass>
28411 22:26:21.037844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_976 RESULT=pass
28413 22:26:21.068796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_976 RESULT=skip>
28414 22:26:21.069134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_976 RESULT=skip
28416 22:26:21.100982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_976 RESULT=skip>
28417 22:26:21.101347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_976 RESULT=skip
28419 22:26:21.131971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_992 RESULT=pass
28421 22:26:21.132419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_992 RESULT=pass>
28422 22:26:21.162785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_992 RESULT=skip>
28423 22:26:21.163128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_992 RESULT=skip
28425 22:26:21.193972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_992 RESULT=skip>
28426 22:26:21.194328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_992 RESULT=skip
28428 22:26:21.224719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1008 RESULT=pass>
28429 22:26:21.225074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1008 RESULT=pass
28431 22:26:21.255649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1008 RESULT=skip>
28432 22:26:21.255989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1008 RESULT=skip
28434 22:26:21.286097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1008 RESULT=skip>
28435 22:26:21.286514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1008 RESULT=skip
28437 22:26:21.317020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1024 RESULT=pass
28439 22:26:21.317455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1024 RESULT=pass>
28440 22:26:21.348284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1024 RESULT=skip>
28441 22:26:21.348703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1024 RESULT=skip
28443 22:26:21.380165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1024 RESULT=skip>
28444 22:26:21.380596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1024 RESULT=skip
28446 22:26:21.410881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1040 RESULT=pass>
28447 22:26:21.411302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1040 RESULT=pass
28449 22:26:21.441839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1040 RESULT=skip>
28450 22:26:21.442252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1040 RESULT=skip
28452 22:26:21.473016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1040 RESULT=skip>
28453 22:26:21.473438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1040 RESULT=skip
28455 22:26:21.504089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1056 RESULT=pass>
28456 22:26:21.504505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1056 RESULT=pass
28458 22:26:21.535912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1056 RESULT=skip>
28459 22:26:21.536338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1056 RESULT=skip
28461 22:26:21.566586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1056 RESULT=skip>
28462 22:26:21.567013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1056 RESULT=skip
28464 22:26:21.597522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1072 RESULT=pass
28466 22:26:21.597969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1072 RESULT=pass>
28467 22:26:21.628360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1072 RESULT=skip>
28468 22:26:21.628763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1072 RESULT=skip
28470 22:26:21.659169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1072 RESULT=skip>
28471 22:26:21.659589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1072 RESULT=skip
28473 22:26:21.690310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1088 RESULT=pass>
28474 22:26:21.690729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1088 RESULT=pass
28476 22:26:21.720995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1088 RESULT=skip
28478 22:26:21.721430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1088 RESULT=skip>
28479 22:26:21.752269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1088 RESULT=skip
28481 22:26:21.752834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1088 RESULT=skip>
28482 22:26:21.783403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1104 RESULT=pass
28484 22:26:21.784054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1104 RESULT=pass>
28485 22:26:21.814301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1104 RESULT=skip
28487 22:26:21.814926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1104 RESULT=skip>
28488 22:26:21.845098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1104 RESULT=skip
28490 22:26:21.845687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1104 RESULT=skip>
28491 22:26:21.875886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1120 RESULT=pass>
28492 22:26:21.876363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1120 RESULT=pass
28494 22:26:21.906294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1120 RESULT=skip
28496 22:26:21.906778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1120 RESULT=skip>
28497 22:26:21.937343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1120 RESULT=skip>
28498 22:26:21.937817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1120 RESULT=skip
28500 22:26:21.968372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1136 RESULT=pass>
28501 22:26:21.968824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1136 RESULT=pass
28503 22:26:22.000388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1136 RESULT=skip>
28504 22:26:22.000796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1136 RESULT=skip
28506 22:26:22.031767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1136 RESULT=skip>
28507 22:26:22.032171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1136 RESULT=skip
28509 22:26:22.064230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1152 RESULT=pass
28511 22:26:22.064690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1152 RESULT=pass>
28512 22:26:22.096206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1152 RESULT=skip>
28513 22:26:22.096610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1152 RESULT=skip
28515 22:26:22.127628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1152 RESULT=skip>
28516 22:26:22.128047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1152 RESULT=skip
28518 22:26:22.158536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1168 RESULT=pass>
28519 22:26:22.158955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1168 RESULT=pass
28521 22:26:22.190453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1168 RESULT=skip
28523 22:26:22.191049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1168 RESULT=skip>
28524 22:26:22.224732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1168 RESULT=skip>
28525 22:26:22.225149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1168 RESULT=skip
28527 22:26:22.256391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1184 RESULT=pass>
28528 22:26:22.256808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1184 RESULT=pass
28530 22:26:22.287882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1184 RESULT=skip>
28531 22:26:22.288337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1184 RESULT=skip
28533 22:26:22.318869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1184 RESULT=skip
28535 22:26:22.319425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1184 RESULT=skip>
28536 22:26:22.349844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1200 RESULT=pass
28538 22:26:22.350369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1200 RESULT=pass>
28539 22:26:22.383427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1200 RESULT=skip
28541 22:26:22.384019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1200 RESULT=skip>
28542 22:26:22.415795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1200 RESULT=skip>
28543 22:26:22.416273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1200 RESULT=skip
28545 22:26:22.448983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1216 RESULT=pass
28547 22:26:22.449774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1216 RESULT=pass>
28548 22:26:22.482228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1216 RESULT=skip>
28549 22:26:22.482683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1216 RESULT=skip
28551 22:26:22.514385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1216 RESULT=skip>
28552 22:26:22.514837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1216 RESULT=skip
28554 22:26:22.546246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1232 RESULT=pass>
28555 22:26:22.546723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1232 RESULT=pass
28557 22:26:22.577346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1232 RESULT=skip>
28558 22:26:22.577830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1232 RESULT=skip
28560 22:26:22.608695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1232 RESULT=skip>
28561 22:26:22.609164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1232 RESULT=skip
28563 22:26:22.640415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1248 RESULT=pass
28565 22:26:22.641019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1248 RESULT=pass>
28566 22:26:22.671579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1248 RESULT=skip
28568 22:26:22.672266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1248 RESULT=skip>
28569 22:26:22.703821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1248 RESULT=skip>
28570 22:26:22.704288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1248 RESULT=skip
28572 22:26:22.735094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1264 RESULT=pass>
28573 22:26:22.735534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1264 RESULT=pass
28575 22:26:22.766624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1264 RESULT=skip>
28576 22:26:22.767078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1264 RESULT=skip
28578 22:26:22.798179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1264 RESULT=skip
28580 22:26:22.798742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1264 RESULT=skip>
28581 22:26:22.829522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1280 RESULT=pass
28583 22:26:22.830069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1280 RESULT=pass>
28584 22:26:22.861217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1280 RESULT=skip>
28585 22:26:22.861607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1280 RESULT=skip
28587 22:26:22.908660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1280 RESULT=skip>
28588 22:26:22.909067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1280 RESULT=skip
28590 22:26:22.949391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1296 RESULT=pass
28592 22:26:22.950035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1296 RESULT=pass>
28593 22:26:22.981259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1296 RESULT=skip
28595 22:26:22.981819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1296 RESULT=skip>
28596 22:26:23.012422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1296 RESULT=skip
28598 22:26:23.012976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1296 RESULT=skip>
28599 22:26:23.042946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1312 RESULT=pass
28601 22:26:23.043482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1312 RESULT=pass>
28602 22:26:23.073768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1312 RESULT=skip
28604 22:26:23.074297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1312 RESULT=skip>
28605 22:26:23.105118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1312 RESULT=skip
28607 22:26:23.105560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1312 RESULT=skip>
28608 22:26:23.136328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1328 RESULT=pass>
28609 22:26:23.136777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1328 RESULT=pass
28611 22:26:23.167896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1328 RESULT=skip
28613 22:26:23.168517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1328 RESULT=skip>
28614 22:26:23.199101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1328 RESULT=skip>
28615 22:26:23.199551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1328 RESULT=skip
28617 22:26:23.232126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1344 RESULT=pass
28619 22:26:23.232675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1344 RESULT=pass>
28620 22:26:23.264293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1344 RESULT=skip>
28621 22:26:23.264781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1344 RESULT=skip
28623 22:26:23.295455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1344 RESULT=skip
28625 22:26:23.296008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1344 RESULT=skip>
28626 22:26:23.327049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1360 RESULT=pass
28628 22:26:23.327605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1360 RESULT=pass>
28629 22:26:23.358881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1360 RESULT=skip
28631 22:26:23.359430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1360 RESULT=skip>
28632 22:26:23.390566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1360 RESULT=skip
28634 22:26:23.391129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1360 RESULT=skip>
28635 22:26:23.422858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1376 RESULT=pass>
28636 22:26:23.423279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1376 RESULT=pass
28638 22:26:23.454709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1376 RESULT=skip>
28639 22:26:23.455116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1376 RESULT=skip
28641 22:26:23.486079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1376 RESULT=skip>
28642 22:26:23.486532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1376 RESULT=skip
28644 22:26:23.518833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1392 RESULT=pass>
28645 22:26:23.519333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1392 RESULT=pass
28647 22:26:23.554335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1392 RESULT=skip
28649 22:26:23.554993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1392 RESULT=skip>
28650 22:26:23.591207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1392 RESULT=skip
28652 22:26:23.591809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1392 RESULT=skip>
28653 22:26:23.627800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1408 RESULT=pass>
28654 22:26:23.628279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1408 RESULT=pass
28656 22:26:23.661962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1408 RESULT=skip
28658 22:26:23.662739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1408 RESULT=skip>
28659 22:26:23.698036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1408 RESULT=skip>
28660 22:26:23.698521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1408 RESULT=skip
28662 22:26:23.733037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1424 RESULT=pass>
28663 22:26:23.733502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1424 RESULT=pass
28665 22:26:23.766685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1424 RESULT=skip>
28666 22:26:23.767230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1424 RESULT=skip
28668 22:26:23.802224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1424 RESULT=skip>
28669 22:26:23.802687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1424 RESULT=skip
28671 22:26:23.838662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1440 RESULT=pass>
28672 22:26:23.839214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1440 RESULT=pass
28674 22:26:23.874516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1440 RESULT=skip>
28675 22:26:23.874966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1440 RESULT=skip
28677 22:26:23.905503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1440 RESULT=skip>
28678 22:26:23.905995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1440 RESULT=skip
28680 22:26:23.937580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1456 RESULT=pass>
28681 22:26:23.938014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1456 RESULT=pass
28683 22:26:23.968512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1456 RESULT=skip
28685 22:26:23.969068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1456 RESULT=skip>
28686 22:26:24.000430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1456 RESULT=skip>
28687 22:26:24.000895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1456 RESULT=skip
28689 22:26:24.032299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1472 RESULT=pass>
28690 22:26:24.032845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1472 RESULT=pass
28692 22:26:24.063026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1472 RESULT=skip>
28693 22:26:24.063496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1472 RESULT=skip
28695 22:26:24.096765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1472 RESULT=skip
28697 22:26:24.097555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1472 RESULT=skip>
28698 22:26:24.130011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1488 RESULT=pass>
28699 22:26:24.130498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1488 RESULT=pass
28701 22:26:24.162309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1488 RESULT=skip>
28702 22:26:24.162660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1488 RESULT=skip
28704 22:26:24.195162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1488 RESULT=skip
28706 22:26:24.195680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1488 RESULT=skip>
28707 22:26:24.228045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1504 RESULT=pass>
28708 22:26:24.228428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1504 RESULT=pass
28710 22:26:24.260911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1504 RESULT=skip>
28711 22:26:24.261358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1504 RESULT=skip
28713 22:26:24.292921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1504 RESULT=skip>
28714 22:26:24.293360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1504 RESULT=skip
28716 22:26:24.324169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1520 RESULT=pass>
28717 22:26:24.324520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1520 RESULT=pass
28719 22:26:24.356218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1520 RESULT=skip>
28720 22:26:24.356571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1520 RESULT=skip
28722 22:26:24.387899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1520 RESULT=skip>
28723 22:26:24.388292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1520 RESULT=skip
28725 22:26:24.418964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1536 RESULT=pass>
28726 22:26:24.419440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1536 RESULT=pass
28728 22:26:24.450254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1536 RESULT=skip>
28729 22:26:24.450665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1536 RESULT=skip
28731 22:26:24.482056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1536 RESULT=skip>
28732 22:26:24.482441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1536 RESULT=skip
28734 22:26:24.514326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1552 RESULT=pass>
28735 22:26:24.514708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1552 RESULT=pass
28737 22:26:24.546709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1552 RESULT=skip>
28738 22:26:24.547172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1552 RESULT=skip
28740 22:26:24.579368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1552 RESULT=skip
28742 22:26:24.579957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1552 RESULT=skip>
28743 22:26:24.611762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1568 RESULT=pass
28745 22:26:24.612307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1568 RESULT=pass>
28746 22:26:24.644086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1568 RESULT=skip
28748 22:26:24.644630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1568 RESULT=skip>
28749 22:26:24.675496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1568 RESULT=skip
28751 22:26:24.676043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1568 RESULT=skip>
28752 22:26:24.706930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1584 RESULT=pass>
28753 22:26:24.707419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1584 RESULT=pass
28755 22:26:24.738439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1584 RESULT=skip
28757 22:26:24.738873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1584 RESULT=skip>
28758 22:26:24.771501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1584 RESULT=skip
28760 22:26:24.772124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1584 RESULT=skip>
28761 22:26:24.803572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1600 RESULT=pass
28763 22:26:24.804191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1600 RESULT=pass>
28764 22:26:24.835604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1600 RESULT=skip
28766 22:26:24.836058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1600 RESULT=skip>
28767 22:26:24.867704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1600 RESULT=skip>
28768 22:26:24.868190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1600 RESULT=skip
28770 22:26:24.900167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1616 RESULT=pass>
28771 22:26:24.900648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1616 RESULT=pass
28773 22:26:24.931443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1616 RESULT=skip
28775 22:26:24.932085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1616 RESULT=skip>
28776 22:26:24.962488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1616 RESULT=skip>
28777 22:26:24.962894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1616 RESULT=skip
28779 22:26:24.993669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1632 RESULT=pass>
28780 22:26:24.994158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1632 RESULT=pass
28782 22:26:25.025208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1632 RESULT=skip>
28783 22:26:25.025685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1632 RESULT=skip
28785 22:26:25.057142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1632 RESULT=skip>
28786 22:26:25.057619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1632 RESULT=skip
28788 22:26:25.088306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1648 RESULT=pass
28790 22:26:25.088749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1648 RESULT=pass>
28791 22:26:25.119557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1648 RESULT=skip
28793 22:26:25.119997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1648 RESULT=skip>
28794 22:26:25.150914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1648 RESULT=skip
28796 22:26:25.151503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1648 RESULT=skip>
28797 22:26:25.181294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1664 RESULT=pass>
28798 22:26:25.181752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1664 RESULT=pass
28800 22:26:25.212448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1664 RESULT=skip>
28801 22:26:25.212910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1664 RESULT=skip
28803 22:26:25.244287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1664 RESULT=skip>
28804 22:26:25.244732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1664 RESULT=skip
28806 22:26:25.274824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1680 RESULT=pass>
28807 22:26:25.275269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1680 RESULT=pass
28809 22:26:25.306556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1680 RESULT=skip
28811 22:26:25.307112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1680 RESULT=skip>
28812 22:26:25.337440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1680 RESULT=skip>
28813 22:26:25.337914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1680 RESULT=skip
28815 22:26:25.368353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1696 RESULT=pass
28817 22:26:25.368799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1696 RESULT=pass>
28818 22:26:25.400543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1696 RESULT=skip
28820 22:26:25.401102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1696 RESULT=skip>
28821 22:26:25.432335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1696 RESULT=skip
28823 22:26:25.432878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1696 RESULT=skip>
28824 22:26:25.463259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1712 RESULT=pass
28826 22:26:25.463798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1712 RESULT=pass>
28827 22:26:25.495451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1712 RESULT=skip
28829 22:26:25.496065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1712 RESULT=skip>
28830 22:26:25.527444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1712 RESULT=skip
28832 22:26:25.527998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1712 RESULT=skip>
28833 22:26:25.558464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1728 RESULT=pass
28835 22:26:25.558967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1728 RESULT=pass>
28836 22:26:25.589342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1728 RESULT=skip
28838 22:26:25.589759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1728 RESULT=skip>
28839 22:26:25.621112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1728 RESULT=skip
28841 22:26:25.621551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1728 RESULT=skip>
28842 22:26:25.652717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1744 RESULT=pass
28844 22:26:25.653128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1744 RESULT=pass>
28845 22:26:25.684022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1744 RESULT=skip>
28846 22:26:25.684401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1744 RESULT=skip
28848 22:26:25.716553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1744 RESULT=skip>
28849 22:26:25.716986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1744 RESULT=skip
28851 22:26:25.749067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1760 RESULT=pass>
28852 22:26:25.749549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1760 RESULT=pass
28854 22:26:25.781186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1760 RESULT=skip
28856 22:26:25.781637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1760 RESULT=skip>
28857 22:26:25.813309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1760 RESULT=skip
28859 22:26:25.813884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1760 RESULT=skip>
28860 22:26:25.844644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1776 RESULT=pass
28862 22:26:25.845243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1776 RESULT=pass>
28863 22:26:25.875761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1776 RESULT=skip>
28864 22:26:25.876210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1776 RESULT=skip
28866 22:26:25.907123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1776 RESULT=skip
28868 22:26:25.907670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1776 RESULT=skip>
28869 22:26:25.938927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1792 RESULT=pass
28871 22:26:25.939656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1792 RESULT=pass>
28872 22:26:25.972339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1792 RESULT=skip>
28873 22:26:25.972796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1792 RESULT=skip
28875 22:26:26.004505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1792 RESULT=skip>
28876 22:26:26.004954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1792 RESULT=skip
28878 22:26:26.036960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1808 RESULT=pass>
28879 22:26:26.037403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1808 RESULT=pass
28881 22:26:26.069189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1808 RESULT=skip
28883 22:26:26.069743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1808 RESULT=skip>
28884 22:26:26.105063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1808 RESULT=skip>
28885 22:26:26.105516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1808 RESULT=skip
28887 22:26:26.144832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1824 RESULT=pass>
28888 22:26:26.145384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1824 RESULT=pass
28890 22:26:26.177252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1824 RESULT=skip
28892 22:26:26.177825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1824 RESULT=skip>
28893 22:26:26.210011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1824 RESULT=skip>
28894 22:26:26.210468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1824 RESULT=skip
28896 22:26:26.242228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1840 RESULT=pass
28898 22:26:26.242773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1840 RESULT=pass>
28899 22:26:26.276957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1840 RESULT=skip
28901 22:26:26.277414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1840 RESULT=skip>
28902 22:26:26.308401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1840 RESULT=skip>
28903 22:26:26.308878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1840 RESULT=skip
28905 22:26:26.341327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1856 RESULT=pass
28907 22:26:26.341671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1856 RESULT=pass>
28908 22:26:26.373978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1856 RESULT=skip>
28909 22:26:26.374378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1856 RESULT=skip
28911 22:26:26.407525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1856 RESULT=skip
28913 22:26:26.407991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1856 RESULT=skip>
28914 22:26:26.456170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1872 RESULT=pass
28916 22:26:26.456625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1872 RESULT=pass>
28917 22:26:26.489343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1872 RESULT=skip
28919 22:26:26.489892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1872 RESULT=skip>
28920 22:26:26.519441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1872 RESULT=skip
28922 22:26:26.519867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1872 RESULT=skip>
28923 22:26:26.550875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1888 RESULT=pass>
28924 22:26:26.551421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1888 RESULT=pass
28926 22:26:26.583416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1888 RESULT=skip
28928 22:26:26.584012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1888 RESULT=skip>
28929 22:26:26.614367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1888 RESULT=skip>
28930 22:26:26.614832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1888 RESULT=skip
28932 22:26:26.645973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1904 RESULT=pass
28934 22:26:26.646513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1904 RESULT=pass>
28935 22:26:26.676384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1904 RESULT=skip
28937 22:26:26.676855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1904 RESULT=skip>
28938 22:26:26.708435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1904 RESULT=skip
28940 22:26:26.709004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1904 RESULT=skip>
28941 22:26:26.738826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1920 RESULT=pass>
28942 22:26:26.739295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1920 RESULT=pass
28944 22:26:26.770138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1920 RESULT=skip
28946 22:26:26.770685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1920 RESULT=skip>
28947 22:26:26.800586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1920 RESULT=skip>
28948 22:26:26.801033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1920 RESULT=skip
28950 22:26:26.831198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1936 RESULT=pass
28952 22:26:26.831732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1936 RESULT=pass>
28953 22:26:26.862374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1936 RESULT=skip>
28954 22:26:26.862831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1936 RESULT=skip
28956 22:26:26.894251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1936 RESULT=skip>
28957 22:26:26.894703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1936 RESULT=skip
28959 22:26:26.924745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1952 RESULT=pass>
28960 22:26:26.925098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1952 RESULT=pass
28962 22:26:26.955826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1952 RESULT=skip>
28963 22:26:26.956304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1952 RESULT=skip
28965 22:26:26.986797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1952 RESULT=skip
28967 22:26:26.987253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1952 RESULT=skip>
28968 22:26:27.017306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1968 RESULT=pass>
28969 22:26:27.017773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1968 RESULT=pass
28971 22:26:27.048416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1968 RESULT=skip
28973 22:26:27.048948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1968 RESULT=skip>
28974 22:26:27.079485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1968 RESULT=skip
28976 22:26:27.080062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1968 RESULT=skip>
28977 22:26:27.110770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1984 RESULT=pass>
28978 22:26:27.111217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1984 RESULT=pass
28980 22:26:27.141727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1984 RESULT=skip
28982 22:26:27.142296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1984 RESULT=skip>
28983 22:26:27.172599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1984 RESULT=skip
28985 22:26:27.173242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1984 RESULT=skip>
28986 22:26:27.203062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2000 RESULT=pass>
28987 22:26:27.203520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2000 RESULT=pass
28989 22:26:27.234405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2000 RESULT=skip
28991 22:26:27.235050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2000 RESULT=skip>
28992 22:26:27.265885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2000 RESULT=skip
28994 22:26:27.266515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2000 RESULT=skip>
28995 22:26:27.297270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2016 RESULT=pass>
28996 22:26:27.297708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2016 RESULT=pass
28998 22:26:27.328231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2016 RESULT=skip>
28999 22:26:27.328696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2016 RESULT=skip
29001 22:26:27.359377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2016 RESULT=skip
29003 22:26:27.359979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2016 RESULT=skip>
29004 22:26:27.401234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2032 RESULT=pass>
29005 22:26:27.401677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2032 RESULT=pass
29007 22:26:27.438204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2032 RESULT=skip
29009 22:26:27.438760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2032 RESULT=skip>
29010 22:26:27.472372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2032 RESULT=skip
29012 22:26:27.473011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2032 RESULT=skip>
29013 22:26:27.517455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2048 RESULT=pass>
29014 22:26:27.517853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2048 RESULT=pass
29016 22:26:27.562283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2048 RESULT=skip>
29017 22:26:27.562719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2048 RESULT=skip
29019 22:26:27.597306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2048 RESULT=skip>
29020 22:26:27.597687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2048 RESULT=skip
29022 22:26:27.628112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2064 RESULT=pass>
29023 22:26:27.628505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2064 RESULT=pass
29025 22:26:27.659406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2064 RESULT=skip
29027 22:26:27.659902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2064 RESULT=skip>
29028 22:26:27.690141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2064 RESULT=skip>
29029 22:26:27.690499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2064 RESULT=skip
29031 22:26:27.720591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2080 RESULT=pass
29033 22:26:27.721047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2080 RESULT=pass>
29034 22:26:27.752019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2080 RESULT=skip>
29035 22:26:27.752479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2080 RESULT=skip
29037 22:26:27.783046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2080 RESULT=skip
29039 22:26:27.783591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2080 RESULT=skip>
29040 22:26:27.814463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2096 RESULT=pass
29042 22:26:27.814912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2096 RESULT=pass>
29043 22:26:27.845806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2096 RESULT=skip
29045 22:26:27.846243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2096 RESULT=skip>
29046 22:26:27.876724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2096 RESULT=skip>
29047 22:26:27.877188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2096 RESULT=skip
29049 22:26:27.907708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2112 RESULT=pass>
29050 22:26:27.908135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2112 RESULT=pass
29052 22:26:27.938604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2112 RESULT=skip>
29053 22:26:27.938998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2112 RESULT=skip
29055 22:26:27.969662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2112 RESULT=skip>
29056 22:26:27.970107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2112 RESULT=skip
29058 22:26:28.000939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2128 RESULT=pass>
29059 22:26:28.001389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2128 RESULT=pass
29061 22:26:28.057577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2128 RESULT=skip>
29062 22:26:28.058005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2128 RESULT=skip
29064 22:26:28.088648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2128 RESULT=skip
29066 22:26:28.089209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2128 RESULT=skip>
29067 22:26:28.119833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2144 RESULT=pass>
29068 22:26:28.120312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2144 RESULT=pass
29070 22:26:28.150963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2144 RESULT=skip
29072 22:26:28.151510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2144 RESULT=skip>
29073 22:26:28.182387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2144 RESULT=skip>
29074 22:26:28.182830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2144 RESULT=skip
29076 22:26:28.214728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2160 RESULT=pass
29078 22:26:28.215368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2160 RESULT=pass>
29079 22:26:28.247533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2160 RESULT=skip
29081 22:26:28.248250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2160 RESULT=skip>
29082 22:26:28.280607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2160 RESULT=skip>
29083 22:26:28.281071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2160 RESULT=skip
29085 22:26:28.320972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2176 RESULT=pass
29087 22:26:28.321557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2176 RESULT=pass>
29088 22:26:28.352140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2176 RESULT=skip>
29089 22:26:28.352579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2176 RESULT=skip
29091 22:26:28.383418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2176 RESULT=skip
29093 22:26:28.383991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2176 RESULT=skip>
29094 22:26:28.414922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2192 RESULT=pass
29096 22:26:28.415458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2192 RESULT=pass>
29097 22:26:28.446870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2192 RESULT=skip>
29098 22:26:28.447358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2192 RESULT=skip
29100 22:26:28.478521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2192 RESULT=skip>
29101 22:26:28.478975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2192 RESULT=skip
29103 22:26:28.509555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2208 RESULT=pass
29105 22:26:28.510015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2208 RESULT=pass>
29106 22:26:28.540901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2208 RESULT=skip
29108 22:26:28.541447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2208 RESULT=skip>
29109 22:26:28.572105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2208 RESULT=skip
29111 22:26:28.572641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2208 RESULT=skip>
29112 22:26:28.603355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2224 RESULT=pass
29114 22:26:28.603981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2224 RESULT=pass>
29115 22:26:28.635605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2224 RESULT=skip
29117 22:26:28.636166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2224 RESULT=skip>
29118 22:26:28.666554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2224 RESULT=skip>
29119 22:26:28.667025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2224 RESULT=skip
29121 22:26:28.698731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2240 RESULT=pass>
29122 22:26:28.699244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2240 RESULT=pass
29124 22:26:28.741259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2240 RESULT=skip>
29125 22:26:28.741630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2240 RESULT=skip
29127 22:26:28.773603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2240 RESULT=skip
29129 22:26:28.774060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2240 RESULT=skip>
29130 22:26:28.807877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2256 RESULT=pass
29132 22:26:28.808334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2256 RESULT=pass>
29133 22:26:28.840755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2256 RESULT=skip
29135 22:26:28.841212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2256 RESULT=skip>
29136 22:26:28.873907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2256 RESULT=skip>
29137 22:26:28.874334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2256 RESULT=skip
29139 22:26:28.906909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2272 RESULT=pass>
29140 22:26:28.907332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2272 RESULT=pass
29142 22:26:28.939934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2272 RESULT=skip
29144 22:26:28.940388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2272 RESULT=skip>
29145 22:26:28.973487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2272 RESULT=skip
29147 22:26:28.974039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2272 RESULT=skip>
29148 22:26:29.007863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2288 RESULT=pass>
29149 22:26:29.008322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2288 RESULT=pass
29151 22:26:29.038979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2288 RESULT=skip
29153 22:26:29.039553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2288 RESULT=skip>
29154 22:26:29.069925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2288 RESULT=skip>
29155 22:26:29.070375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2288 RESULT=skip
29157 22:26:29.100989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2304 RESULT=pass
29159 22:26:29.101538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2304 RESULT=pass>
29160 22:26:29.132605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2304 RESULT=skip
29162 22:26:29.133159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2304 RESULT=skip>
29163 22:26:29.164512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2304 RESULT=skip
29165 22:26:29.165082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2304 RESULT=skip>
29166 22:26:29.195947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2320 RESULT=pass
29168 22:26:29.196526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2320 RESULT=pass>
29169 22:26:29.228596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2320 RESULT=skip>
29170 22:26:29.229085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2320 RESULT=skip
29172 22:26:29.261017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2320 RESULT=skip>
29173 22:26:29.261501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2320 RESULT=skip
29175 22:26:29.293000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2336 RESULT=pass>
29176 22:26:29.293482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2336 RESULT=pass
29178 22:26:29.324473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2336 RESULT=skip>
29179 22:26:29.324926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2336 RESULT=skip
29181 22:26:29.355033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2336 RESULT=skip>
29182 22:26:29.355494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2336 RESULT=skip
29184 22:26:29.385644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2352 RESULT=pass>
29185 22:26:29.386041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2352 RESULT=pass
29187 22:26:29.416115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2352 RESULT=skip
29189 22:26:29.416633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2352 RESULT=skip>
29190 22:26:29.448553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2352 RESULT=skip
29192 22:26:29.449092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2352 RESULT=skip>
29193 22:26:29.481929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2368 RESULT=pass>
29194 22:26:29.482285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2368 RESULT=pass
29196 22:26:29.514668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2368 RESULT=skip
29198 22:26:29.515113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2368 RESULT=skip>
29199 22:26:29.546904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2368 RESULT=skip>
29200 22:26:29.547264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2368 RESULT=skip
29202 22:26:29.578959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2384 RESULT=pass
29204 22:26:29.579543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2384 RESULT=pass>
29205 22:26:29.610770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2384 RESULT=skip
29207 22:26:29.611375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2384 RESULT=skip>
29208 22:26:29.642505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2384 RESULT=skip
29210 22:26:29.643094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2384 RESULT=skip>
29211 22:26:29.676754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2400 RESULT=pass>
29212 22:26:29.677164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2400 RESULT=pass
29214 22:26:29.713144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2400 RESULT=skip>
29215 22:26:29.713543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2400 RESULT=skip
29217 22:26:29.744314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2400 RESULT=skip
29219 22:26:29.744751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2400 RESULT=skip>
29220 22:26:29.776510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2416 RESULT=pass
29222 22:26:29.777027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2416 RESULT=pass>
29223 22:26:29.808674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2416 RESULT=skip>
29224 22:26:29.809056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2416 RESULT=skip
29226 22:26:29.844182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2416 RESULT=skip
29228 22:26:29.844749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2416 RESULT=skip>
29229 22:26:29.876525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2432 RESULT=pass>
29230 22:26:29.876981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2432 RESULT=pass
29232 22:26:29.908589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2432 RESULT=skip>
29233 22:26:29.909049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2432 RESULT=skip
29235 22:26:29.945726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2432 RESULT=skip>
29236 22:26:29.946186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2432 RESULT=skip
29238 22:26:29.981705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2448 RESULT=pass
29240 22:26:29.982348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2448 RESULT=pass>
29241 22:26:30.017020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2448 RESULT=skip
29243 22:26:30.017451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2448 RESULT=skip>
29244 22:26:30.048141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2448 RESULT=skip>
29245 22:26:30.048461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2448 RESULT=skip
29247 22:26:30.079920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2464 RESULT=pass>
29248 22:26:30.080181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2464 RESULT=pass
29250 22:26:30.112030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2464 RESULT=skip
29252 22:26:30.112376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2464 RESULT=skip>
29253 22:26:30.145406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2464 RESULT=skip>
29254 22:26:30.145874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2464 RESULT=skip
29256 22:26:30.178036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2480 RESULT=pass>
29257 22:26:30.178451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2480 RESULT=pass
29259 22:26:30.209330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2480 RESULT=skip>
29260 22:26:30.209776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2480 RESULT=skip
29262 22:26:30.240557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2480 RESULT=skip
29264 22:26:30.241192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2480 RESULT=skip>
29265 22:26:30.272600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2496 RESULT=pass>
29266 22:26:30.272975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2496 RESULT=pass
29268 22:26:30.304591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2496 RESULT=skip>
29269 22:26:30.304951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2496 RESULT=skip
29271 22:26:30.336201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2496 RESULT=skip>
29272 22:26:30.336565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2496 RESULT=skip
29274 22:26:30.370589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2512 RESULT=pass>
29275 22:26:30.370961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2512 RESULT=pass
29277 22:26:30.402030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2512 RESULT=skip
29279 22:26:30.402534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2512 RESULT=skip>
29280 22:26:30.433458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2512 RESULT=skip>
29281 22:26:30.433939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2512 RESULT=skip
29283 22:26:30.464468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2528 RESULT=pass>
29284 22:26:30.464945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2528 RESULT=pass
29286 22:26:30.495079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2528 RESULT=skip
29288 22:26:30.495808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2528 RESULT=skip>
29289 22:26:30.528319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2528 RESULT=skip>
29290 22:26:30.528849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2528 RESULT=skip
29292 22:26:30.562278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2544 RESULT=pass>
29293 22:26:30.562741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2544 RESULT=pass
29295 22:26:30.600197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2544 RESULT=skip>
29296 22:26:30.600577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2544 RESULT=skip
29298 22:26:30.635086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2544 RESULT=skip>
29299 22:26:30.635568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2544 RESULT=skip
29301 22:26:30.668227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2560 RESULT=pass
29303 22:26:30.668789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2560 RESULT=pass>
29304 22:26:30.700934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2560 RESULT=skip>
29305 22:26:30.701381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2560 RESULT=skip
29307 22:26:30.733658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2560 RESULT=skip>
29308 22:26:30.734113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2560 RESULT=skip
29310 22:26:30.765951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2576 RESULT=pass>
29311 22:26:30.766497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2576 RESULT=pass
29313 22:26:30.798837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2576 RESULT=skip>
29314 22:26:30.799324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2576 RESULT=skip
29316 22:26:30.832100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2576 RESULT=skip>
29317 22:26:30.832573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2576 RESULT=skip
29319 22:26:30.864383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2592 RESULT=pass
29321 22:26:30.865012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2592 RESULT=pass>
29322 22:26:30.896466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2592 RESULT=skip
29324 22:26:30.897026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2592 RESULT=skip>
29325 22:26:30.928054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2592 RESULT=skip>
29326 22:26:30.928509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2592 RESULT=skip
29328 22:26:30.959111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2608 RESULT=pass
29330 22:26:30.959671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2608 RESULT=pass>
29331 22:26:30.990875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2608 RESULT=skip>
29332 22:26:30.991329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2608 RESULT=skip
29334 22:26:31.022427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2608 RESULT=skip>
29335 22:26:31.022870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2608 RESULT=skip
29337 22:26:31.053905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2624 RESULT=pass>
29338 22:26:31.054379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2624 RESULT=pass
29340 22:26:31.085956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2624 RESULT=skip>
29341 22:26:31.086411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2624 RESULT=skip
29343 22:26:31.120554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2624 RESULT=skip>
29344 22:26:31.120972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2624 RESULT=skip
29346 22:26:31.154630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2640 RESULT=pass
29348 22:26:31.155087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2640 RESULT=pass>
29349 22:26:31.188584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2640 RESULT=skip>
29350 22:26:31.188995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2640 RESULT=skip
29352 22:26:31.224419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2640 RESULT=skip>
29353 22:26:31.224847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2640 RESULT=skip
29355 22:26:31.262530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2656 RESULT=pass
29357 22:26:31.262998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2656 RESULT=pass>
29358 22:26:31.297045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2656 RESULT=skip>
29359 22:26:31.297490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2656 RESULT=skip
29361 22:26:31.331836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2656 RESULT=skip>
29362 22:26:31.332323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2656 RESULT=skip
29364 22:26:31.362752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2672 RESULT=pass>
29365 22:26:31.363100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2672 RESULT=pass
29367 22:26:31.394149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2672 RESULT=skip>
29368 22:26:31.394510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2672 RESULT=skip
29370 22:26:31.425079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2672 RESULT=skip>
29371 22:26:31.425450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2672 RESULT=skip
29373 22:26:31.456716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2688 RESULT=pass>
29374 22:26:31.457078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2688 RESULT=pass
29376 22:26:31.488969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2688 RESULT=skip
29378 22:26:31.489396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2688 RESULT=skip>
29379 22:26:31.530792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2688 RESULT=skip>
29380 22:26:31.531316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2688 RESULT=skip
29382 22:26:31.564445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2704 RESULT=pass>
29383 22:26:31.564918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2704 RESULT=pass
29385 22:26:31.597623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2704 RESULT=skip
29387 22:26:31.598272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2704 RESULT=skip>
29388 22:26:31.633043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2704 RESULT=skip>
29389 22:26:31.633512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2704 RESULT=skip
29391 22:26:31.666674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2720 RESULT=pass
29393 22:26:31.667091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2720 RESULT=pass>
29394 22:26:31.699277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2720 RESULT=skip
29396 22:26:31.699786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2720 RESULT=skip>
29397 22:26:31.732020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2720 RESULT=skip>
29398 22:26:31.732497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2720 RESULT=skip
29400 22:26:31.764672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2736 RESULT=pass
29402 22:26:31.765244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2736 RESULT=pass>
29403 22:26:31.800746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2736 RESULT=skip
29405 22:26:31.801457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2736 RESULT=skip>
29406 22:26:31.832563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2736 RESULT=skip
29408 22:26:31.832960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2736 RESULT=skip>
29409 22:26:31.865754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2752 RESULT=pass>
29410 22:26:31.866039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2752 RESULT=pass
29412 22:26:31.898324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2752 RESULT=skip>
29413 22:26:31.898787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2752 RESULT=skip
29415 22:26:31.931297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2752 RESULT=skip
29417 22:26:31.931862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2752 RESULT=skip>
29418 22:26:31.963729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2768 RESULT=pass
29420 22:26:31.964163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2768 RESULT=pass>
29421 22:26:31.996272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2768 RESULT=skip
29423 22:26:31.996725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2768 RESULT=skip>
29424 22:26:32.032731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2768 RESULT=skip
29426 22:26:32.033190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2768 RESULT=skip>
29427 22:26:32.066804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2784 RESULT=pass
29429 22:26:32.067273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2784 RESULT=pass>
29430 22:26:32.100256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2784 RESULT=skip
29432 22:26:32.100837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2784 RESULT=skip>
29433 22:26:32.132089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2784 RESULT=skip>
29434 22:26:32.132377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2784 RESULT=skip
29436 22:26:32.163474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2800 RESULT=pass
29438 22:26:32.163891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2800 RESULT=pass>
29439 22:26:32.195395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2800 RESULT=skip
29441 22:26:32.195890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2800 RESULT=skip>
29442 22:26:32.228524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2800 RESULT=skip
29444 22:26:32.228985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2800 RESULT=skip>
29445 22:26:32.262020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2816 RESULT=pass>
29446 22:26:32.262430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2816 RESULT=pass
29448 22:26:32.294086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2816 RESULT=skip
29450 22:26:32.294658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2816 RESULT=skip>
29451 22:26:32.327547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2816 RESULT=skip
29453 22:26:32.328117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2816 RESULT=skip>
29454 22:26:32.362271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2832 RESULT=pass>
29455 22:26:32.362773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2832 RESULT=pass
29457 22:26:32.402521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2832 RESULT=skip>
29458 22:26:32.402816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2832 RESULT=skip
29460 22:26:32.436958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2832 RESULT=skip>
29461 22:26:32.437239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2832 RESULT=skip
29463 22:26:32.472521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2848 RESULT=pass
29465 22:26:32.473082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2848 RESULT=pass>
29466 22:26:32.506517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2848 RESULT=skip
29468 22:26:32.506966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2848 RESULT=skip>
29469 22:26:32.540207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2848 RESULT=skip
29471 22:26:32.540771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2848 RESULT=skip>
29472 22:26:32.572273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2864 RESULT=pass>
29473 22:26:32.572757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2864 RESULT=pass
29475 22:26:32.603493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2864 RESULT=skip
29477 22:26:32.604104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2864 RESULT=skip>
29478 22:26:32.635084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2864 RESULT=skip>
29479 22:26:32.635546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2864 RESULT=skip
29481 22:26:32.668624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2880 RESULT=pass
29483 22:26:32.669083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2880 RESULT=pass>
29484 22:26:32.701293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2880 RESULT=skip
29486 22:26:32.701735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2880 RESULT=skip>
29487 22:26:32.733604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2880 RESULT=skip>
29488 22:26:32.734014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2880 RESULT=skip
29490 22:26:32.765389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2896 RESULT=pass>
29491 22:26:32.765797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2896 RESULT=pass
29493 22:26:32.798015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2896 RESULT=skip>
29494 22:26:32.798477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2896 RESULT=skip
29496 22:26:32.829878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2896 RESULT=skip
29498 22:26:32.830462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2896 RESULT=skip>
29499 22:26:32.861815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2912 RESULT=pass
29501 22:26:32.862245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2912 RESULT=pass>
29502 22:26:32.893626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2912 RESULT=skip>
29503 22:26:32.894086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2912 RESULT=skip
29505 22:26:32.925706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2912 RESULT=skip>
29506 22:26:32.926051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2912 RESULT=skip
29508 22:26:32.957535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2928 RESULT=pass
29510 22:26:32.958096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2928 RESULT=pass>
29511 22:26:32.988981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2928 RESULT=skip
29513 22:26:32.989549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2928 RESULT=skip>
29514 22:26:33.021357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2928 RESULT=skip>
29515 22:26:33.021780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2928 RESULT=skip
29517 22:26:33.053512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2944 RESULT=pass>
29518 22:26:33.053958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2944 RESULT=pass
29520 22:26:33.084777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2944 RESULT=skip>
29521 22:26:33.085216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2944 RESULT=skip
29523 22:26:33.116363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2944 RESULT=skip
29525 22:26:33.116854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2944 RESULT=skip>
29526 22:26:33.171658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2960 RESULT=pass>
29527 22:26:33.172046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2960 RESULT=pass
29529 22:26:33.203094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2960 RESULT=skip>
29530 22:26:33.203570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2960 RESULT=skip
29532 22:26:33.234310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2960 RESULT=skip>
29533 22:26:33.234783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2960 RESULT=skip
29535 22:26:33.265567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2976 RESULT=pass>
29536 22:26:33.266062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2976 RESULT=pass
29538 22:26:33.297289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2976 RESULT=skip>
29539 22:26:33.297768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2976 RESULT=skip
29541 22:26:33.328670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2976 RESULT=skip>
29542 22:26:33.329073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2976 RESULT=skip
29544 22:26:33.359653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2992 RESULT=pass>
29545 22:26:33.360022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2992 RESULT=pass
29547 22:26:33.390371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2992 RESULT=skip>
29548 22:26:33.390723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2992 RESULT=skip
29550 22:26:33.421282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2992 RESULT=skip>
29551 22:26:33.421639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2992 RESULT=skip
29553 22:26:33.453013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3008 RESULT=pass>
29554 22:26:33.453375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3008 RESULT=pass
29556 22:26:33.483827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3008 RESULT=skip>
29557 22:26:33.484185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3008 RESULT=skip
29559 22:26:33.514647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3008 RESULT=skip>
29560 22:26:33.515010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3008 RESULT=skip
29562 22:26:33.545372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3024 RESULT=pass>
29563 22:26:33.545735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3024 RESULT=pass
29565 22:26:33.576541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3024 RESULT=skip>
29566 22:26:33.576895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3024 RESULT=skip
29568 22:26:33.607093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3024 RESULT=skip>
29569 22:26:33.607447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3024 RESULT=skip
29571 22:26:33.638110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3040 RESULT=pass>
29572 22:26:33.638465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3040 RESULT=pass
29574 22:26:33.669264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3040 RESULT=skip>
29575 22:26:33.669616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3040 RESULT=skip
29577 22:26:33.700913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3040 RESULT=skip>
29578 22:26:33.701275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3040 RESULT=skip
29580 22:26:33.732190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3056 RESULT=pass>
29581 22:26:33.732551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3056 RESULT=pass
29583 22:26:33.764725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3056 RESULT=skip>
29584 22:26:33.765207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3056 RESULT=skip
29586 22:26:33.798975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3056 RESULT=skip>
29587 22:26:33.799388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3056 RESULT=skip
29589 22:26:33.832409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3072 RESULT=pass
29591 22:26:33.832887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3072 RESULT=pass>
29592 22:26:33.863347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3072 RESULT=skip
29594 22:26:33.863871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3072 RESULT=skip>
29595 22:26:33.896121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3072 RESULT=skip
29597 22:26:33.896631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3072 RESULT=skip>
29598 22:26:33.929855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3088 RESULT=pass>
29599 22:26:33.930335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3088 RESULT=pass
29601 22:26:33.962571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3088 RESULT=skip>
29602 22:26:33.962983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3088 RESULT=skip
29604 22:26:33.994330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3088 RESULT=skip
29606 22:26:33.994875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3088 RESULT=skip>
29607 22:26:34.026002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3104 RESULT=pass
29609 22:26:34.026425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3104 RESULT=pass>
29610 22:26:34.059056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3104 RESULT=skip>
29611 22:26:34.059447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3104 RESULT=skip
29613 22:26:34.090139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3104 RESULT=skip>
29614 22:26:34.090407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3104 RESULT=skip
29616 22:26:34.120622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3120 RESULT=pass>
29617 22:26:34.120982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3120 RESULT=pass
29619 22:26:34.151160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3120 RESULT=skip
29621 22:26:34.151582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3120 RESULT=skip>
29622 22:26:34.181714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3120 RESULT=skip>
29623 22:26:34.182062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3120 RESULT=skip
29625 22:26:34.212465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3136 RESULT=pass>
29626 22:26:34.212807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3136 RESULT=pass
29628 22:26:34.243109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3136 RESULT=skip>
29629 22:26:34.243447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3136 RESULT=skip
29631 22:26:34.274842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3136 RESULT=skip
29633 22:26:34.275406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3136 RESULT=skip>
29634 22:26:34.308240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3152 RESULT=pass>
29635 22:26:34.308721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3152 RESULT=pass
29637 22:26:34.340890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3152 RESULT=skip
29639 22:26:34.341445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3152 RESULT=skip>
29640 22:26:34.372992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3152 RESULT=skip>
29641 22:26:34.373481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3152 RESULT=skip
29643 22:26:34.403386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3168 RESULT=pass
29645 22:26:34.403799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3168 RESULT=pass>
29646 22:26:34.434072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3168 RESULT=skip>
29647 22:26:34.434409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3168 RESULT=skip
29649 22:26:34.465927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3168 RESULT=skip>
29650 22:26:34.466250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3168 RESULT=skip
29652 22:26:34.496810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3184 RESULT=pass>
29653 22:26:34.497247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3184 RESULT=pass
29655 22:26:34.528329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3184 RESULT=skip>
29656 22:26:34.528730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3184 RESULT=skip
29658 22:26:34.559644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3184 RESULT=skip>
29659 22:26:34.560067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3184 RESULT=skip
29661 22:26:34.590902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3200 RESULT=pass>
29662 22:26:34.591332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3200 RESULT=pass
29664 22:26:34.623095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3200 RESULT=skip
29666 22:26:34.623657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3200 RESULT=skip>
29667 22:26:34.654810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3200 RESULT=skip>
29668 22:26:34.655256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3200 RESULT=skip
29670 22:26:34.685825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3216 RESULT=pass
29672 22:26:34.686359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3216 RESULT=pass>
29673 22:26:34.717511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3216 RESULT=skip
29675 22:26:34.718055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3216 RESULT=skip>
29676 22:26:34.748432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3216 RESULT=skip>
29677 22:26:34.748870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3216 RESULT=skip
29679 22:26:34.779390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3232 RESULT=pass
29681 22:26:34.779938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3232 RESULT=pass>
29682 22:26:34.810763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3232 RESULT=skip
29684 22:26:34.811301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3232 RESULT=skip>
29685 22:26:34.843096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3232 RESULT=skip>
29686 22:26:34.843573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3232 RESULT=skip
29688 22:26:34.874664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3248 RESULT=pass>
29689 22:26:34.875205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3248 RESULT=pass
29691 22:26:34.906367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3248 RESULT=skip
29693 22:26:34.906902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3248 RESULT=skip>
29694 22:26:34.937091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3248 RESULT=skip
29696 22:26:34.937629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3248 RESULT=skip>
29697 22:26:34.967949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3264 RESULT=pass>
29698 22:26:34.968456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3264 RESULT=pass
29700 22:26:34.998824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3264 RESULT=skip>
29701 22:26:34.999311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3264 RESULT=skip
29703 22:26:35.030223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3264 RESULT=skip
29705 22:26:35.030769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3264 RESULT=skip>
29706 22:26:35.062767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3280 RESULT=pass
29708 22:26:35.063331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3280 RESULT=pass>
29709 22:26:35.095044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3280 RESULT=skip>
29710 22:26:35.095467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3280 RESULT=skip
29712 22:26:35.126268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3280 RESULT=skip>
29713 22:26:35.126732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3280 RESULT=skip
29715 22:26:35.157337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3296 RESULT=pass>
29716 22:26:35.157793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3296 RESULT=pass
29718 22:26:35.189013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3296 RESULT=skip
29720 22:26:35.189631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3296 RESULT=skip>
29721 22:26:35.220663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3296 RESULT=skip>
29722 22:26:35.221117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3296 RESULT=skip
29724 22:26:35.252202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3312 RESULT=pass>
29725 22:26:35.252663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3312 RESULT=pass
29727 22:26:35.283449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3312 RESULT=skip
29729 22:26:35.284055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3312 RESULT=skip>
29730 22:26:35.314882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3312 RESULT=skip>
29731 22:26:35.315367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3312 RESULT=skip
29733 22:26:35.346044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3328 RESULT=pass>
29734 22:26:35.346495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3328 RESULT=pass
29736 22:26:35.378235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3328 RESULT=skip>
29737 22:26:35.378716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3328 RESULT=skip
29739 22:26:35.410720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3328 RESULT=skip
29741 22:26:35.411345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3328 RESULT=skip>
29742 22:26:35.442156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3344 RESULT=pass
29744 22:26:35.442760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3344 RESULT=pass>
29745 22:26:35.473990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3344 RESULT=skip>
29746 22:26:35.474451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3344 RESULT=skip
29748 22:26:35.505328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3344 RESULT=skip>
29749 22:26:35.505803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3344 RESULT=skip
29751 22:26:35.536118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3360 RESULT=pass>
29752 22:26:35.536467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3360 RESULT=pass
29754 22:26:35.566577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3360 RESULT=skip>
29755 22:26:35.566920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3360 RESULT=skip
29757 22:26:35.597833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3360 RESULT=skip>
29758 22:26:35.598178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3360 RESULT=skip
29760 22:26:35.628649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3376 RESULT=pass>
29761 22:26:35.629006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3376 RESULT=pass
29763 22:26:35.659808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3376 RESULT=skip>
29764 22:26:35.660170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3376 RESULT=skip
29766 22:26:35.690584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3376 RESULT=skip>
29767 22:26:35.690940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3376 RESULT=skip
29769 22:26:35.722211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3392 RESULT=pass>
29770 22:26:35.722568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3392 RESULT=pass
29772 22:26:35.753429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3392 RESULT=skip>
29773 22:26:35.753784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3392 RESULT=skip
29775 22:26:35.784286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3392 RESULT=skip>
29776 22:26:35.784646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3392 RESULT=skip
29778 22:26:35.815696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3408 RESULT=pass>
29779 22:26:35.816050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3408 RESULT=pass
29781 22:26:35.848427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3408 RESULT=skip>
29782 22:26:35.848823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3408 RESULT=skip
29784 22:26:35.880042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3408 RESULT=skip>
29785 22:26:35.880403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3408 RESULT=skip
29787 22:26:35.911835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3424 RESULT=pass
29789 22:26:35.912267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3424 RESULT=pass>
29790 22:26:35.942697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3424 RESULT=skip>
29791 22:26:35.943064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3424 RESULT=skip
29793 22:26:35.974204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3424 RESULT=skip>
29794 22:26:35.974570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3424 RESULT=skip
29796 22:26:36.006407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3440 RESULT=pass
29798 22:26:36.006849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3440 RESULT=pass>
29799 22:26:36.037535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3440 RESULT=skip>
29800 22:26:36.037859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3440 RESULT=skip
29802 22:26:36.069100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3440 RESULT=skip>
29803 22:26:36.069412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3440 RESULT=skip
29805 22:26:36.100202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3456 RESULT=pass>
29806 22:26:36.100515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3456 RESULT=pass
29808 22:26:36.131387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3456 RESULT=skip>
29809 22:26:36.131696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3456 RESULT=skip
29811 22:26:36.161972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3456 RESULT=skip>
29812 22:26:36.162304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3456 RESULT=skip
29814 22:26:36.192734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3472 RESULT=pass>
29815 22:26:36.193078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3472 RESULT=pass
29817 22:26:36.223712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3472 RESULT=skip>
29818 22:26:36.224027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3472 RESULT=skip
29820 22:26:36.254613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3472 RESULT=skip>
29821 22:26:36.254952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3472 RESULT=skip
29823 22:26:36.284762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3488 RESULT=pass>
29824 22:26:36.285118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3488 RESULT=pass
29826 22:26:36.315731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3488 RESULT=skip
29828 22:26:36.316173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3488 RESULT=skip>
29829 22:26:36.345847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3488 RESULT=skip>
29830 22:26:36.346201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3488 RESULT=skip
29832 22:26:36.376173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3504 RESULT=pass>
29833 22:26:36.376527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3504 RESULT=pass
29835 22:26:36.406120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3504 RESULT=skip>
29836 22:26:36.406483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3504 RESULT=skip
29838 22:26:36.436877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3504 RESULT=skip>
29839 22:26:36.437245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3504 RESULT=skip
29841 22:26:36.468165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3520 RESULT=pass
29843 22:26:36.468727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3520 RESULT=pass>
29844 22:26:36.498551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3520 RESULT=skip>
29845 22:26:36.499017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3520 RESULT=skip
29847 22:26:36.529962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3520 RESULT=skip
29849 22:26:36.530514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3520 RESULT=skip>
29850 22:26:36.561274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3536 RESULT=pass>
29851 22:26:36.561695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3536 RESULT=pass
29853 22:26:36.592367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3536 RESULT=skip>
29854 22:26:36.592796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3536 RESULT=skip
29856 22:26:36.623729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3536 RESULT=skip>
29857 22:26:36.624153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3536 RESULT=skip
29859 22:26:36.654743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3552 RESULT=pass>
29860 22:26:36.655199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3552 RESULT=pass
29862 22:26:36.685828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3552 RESULT=skip>
29863 22:26:36.686248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3552 RESULT=skip
29865 22:26:36.717917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3552 RESULT=skip>
29866 22:26:36.718353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3552 RESULT=skip
29868 22:26:36.749470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3568 RESULT=pass>
29869 22:26:36.749939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3568 RESULT=pass
29871 22:26:36.780496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3568 RESULT=skip>
29872 22:26:36.780901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3568 RESULT=skip
29874 22:26:36.811965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3568 RESULT=skip>
29875 22:26:36.812414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3568 RESULT=skip
29877 22:26:36.843115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3584 RESULT=pass>
29878 22:26:36.843576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3584 RESULT=pass
29880 22:26:36.874347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3584 RESULT=skip>
29881 22:26:36.874759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3584 RESULT=skip
29883 22:26:36.907486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3584 RESULT=skip
29885 22:26:36.908037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3584 RESULT=skip>
29886 22:26:36.938537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3600 RESULT=pass>
29887 22:26:36.938986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3600 RESULT=pass
29889 22:26:36.969948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3600 RESULT=skip>
29890 22:26:36.970387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3600 RESULT=skip
29892 22:26:37.001139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3600 RESULT=skip>
29893 22:26:37.001576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3600 RESULT=skip
29895 22:26:37.032301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3616 RESULT=pass>
29896 22:26:37.032757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3616 RESULT=pass
29898 22:26:37.064529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3616 RESULT=skip>
29899 22:26:37.064989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3616 RESULT=skip
29901 22:26:37.095658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3616 RESULT=skip>
29902 22:26:37.096102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3616 RESULT=skip
29904 22:26:37.126318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3632 RESULT=pass>
29905 22:26:37.126764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3632 RESULT=pass
29907 22:26:37.157923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3632 RESULT=skip>
29908 22:26:37.158375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3632 RESULT=skip
29910 22:26:37.189143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3632 RESULT=skip>
29911 22:26:37.189557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3632 RESULT=skip
29913 22:26:37.220431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3648 RESULT=pass>
29914 22:26:37.220834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3648 RESULT=pass
29916 22:26:37.251202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3648 RESULT=skip>
29917 22:26:37.251636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3648 RESULT=skip
29919 22:26:37.282486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3648 RESULT=skip>
29920 22:26:37.282896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3648 RESULT=skip
29922 22:26:37.313340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3664 RESULT=pass>
29923 22:26:37.313792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3664 RESULT=pass
29925 22:26:37.344670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3664 RESULT=skip>
29926 22:26:37.345135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3664 RESULT=skip
29928 22:26:37.376331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3664 RESULT=skip>
29929 22:26:37.376809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3664 RESULT=skip
29931 22:26:37.408547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3680 RESULT=pass>
29932 22:26:37.409010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3680 RESULT=pass
29934 22:26:37.439570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3680 RESULT=skip>
29935 22:26:37.440013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3680 RESULT=skip
29937 22:26:37.471970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3680 RESULT=skip
29939 22:26:37.472506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3680 RESULT=skip>
29940 22:26:37.503259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3696 RESULT=pass
29942 22:26:37.503805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3696 RESULT=pass>
29943 22:26:37.534183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3696 RESULT=skip>
29944 22:26:37.534620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3696 RESULT=skip
29946 22:26:37.564751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3696 RESULT=skip>
29947 22:26:37.565232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3696 RESULT=skip
29949 22:26:37.595154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3712 RESULT=pass
29951 22:26:37.595702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3712 RESULT=pass>
29952 22:26:37.625635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3712 RESULT=skip
29954 22:26:37.626139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3712 RESULT=skip>
29955 22:26:37.656202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3712 RESULT=skip
29957 22:26:37.656660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3712 RESULT=skip>
29958 22:26:37.686592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3728 RESULT=pass>
29959 22:26:37.686934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3728 RESULT=pass
29961 22:26:37.717624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3728 RESULT=skip
29963 22:26:37.718182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3728 RESULT=skip>
29964 22:26:37.748530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3728 RESULT=skip
29966 22:26:37.749053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3728 RESULT=skip>
29967 22:26:37.779494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3744 RESULT=pass
29969 22:26:37.779944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3744 RESULT=pass>
29970 22:26:37.809896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3744 RESULT=skip
29972 22:26:37.810303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3744 RESULT=skip>
29973 22:26:37.840877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3744 RESULT=skip>
29974 22:26:37.841200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3744 RESULT=skip
29976 22:26:37.871638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3760 RESULT=pass>
29977 22:26:37.872008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3760 RESULT=pass
29979 22:26:37.902879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3760 RESULT=skip>
29980 22:26:37.903216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3760 RESULT=skip
29982 22:26:37.933352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3760 RESULT=skip>
29983 22:26:37.933682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3760 RESULT=skip
29985 22:26:37.964233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3776 RESULT=pass
29987 22:26:37.964617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3776 RESULT=pass>
29988 22:26:37.994813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3776 RESULT=skip
29990 22:26:37.995247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3776 RESULT=skip>
29991 22:26:38.025681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3776 RESULT=skip>
29992 22:26:38.026034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3776 RESULT=skip
29994 22:26:38.056779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3792 RESULT=pass>
29995 22:26:38.057133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3792 RESULT=pass
29997 22:26:38.087634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3792 RESULT=skip>
29998 22:26:38.087990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3792 RESULT=skip
30000 22:26:38.117764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3792 RESULT=skip>
30001 22:26:38.118116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3792 RESULT=skip
30003 22:26:38.148254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3808 RESULT=pass>
30004 22:26:38.148606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3808 RESULT=pass
30006 22:26:38.178330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3808 RESULT=skip>
30007 22:26:38.178681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3808 RESULT=skip
30009 22:26:38.208595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3808 RESULT=skip>
30010 22:26:38.208949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3808 RESULT=skip
30012 22:26:38.238660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3824 RESULT=pass>
30013 22:26:38.239014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3824 RESULT=pass
30015 22:26:38.304521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3824 RESULT=skip>
30016 22:26:38.304873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3824 RESULT=skip
30018 22:26:38.334697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3824 RESULT=skip>
30019 22:26:38.335047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3824 RESULT=skip
30021 22:26:38.365061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3840 RESULT=pass>
30022 22:26:38.365415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3840 RESULT=pass
30024 22:26:38.395090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3840 RESULT=skip>
30025 22:26:38.395440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3840 RESULT=skip
30027 22:26:38.425095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3840 RESULT=skip>
30028 22:26:38.425447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3840 RESULT=skip
30030 22:26:38.454889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3856 RESULT=pass>
30031 22:26:38.455244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3856 RESULT=pass
30033 22:26:38.485738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3856 RESULT=skip>
30034 22:26:38.486091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3856 RESULT=skip
30036 22:26:38.516334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3856 RESULT=skip>
30037 22:26:38.516685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3856 RESULT=skip
30039 22:26:38.546627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3872 RESULT=pass>
30040 22:26:38.546989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3872 RESULT=pass
30042 22:26:38.577187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3872 RESULT=skip>
30043 22:26:38.577547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3872 RESULT=skip
30045 22:26:38.607397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3872 RESULT=skip
30047 22:26:38.607838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3872 RESULT=skip>
30048 22:26:38.637233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3888 RESULT=pass>
30049 22:26:38.637587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3888 RESULT=pass
30051 22:26:38.667660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3888 RESULT=skip
30053 22:26:38.668095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3888 RESULT=skip>
30054 22:26:38.697457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3888 RESULT=skip
30056 22:26:38.697903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3888 RESULT=skip>
30057 22:26:38.728553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3904 RESULT=pass>
30058 22:26:38.728911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3904 RESULT=pass
30060 22:26:38.759385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3904 RESULT=skip
30062 22:26:38.759832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3904 RESULT=skip>
30063 22:26:38.790143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3904 RESULT=skip>
30064 22:26:38.790498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3904 RESULT=skip
30066 22:26:38.820496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3920 RESULT=pass>
30067 22:26:38.820849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3920 RESULT=pass
30069 22:26:38.850605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3920 RESULT=skip>
30070 22:26:38.850957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3920 RESULT=skip
30072 22:26:38.881397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3920 RESULT=skip>
30073 22:26:38.881757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3920 RESULT=skip
30075 22:26:38.912634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3936 RESULT=pass>
30076 22:26:38.912989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3936 RESULT=pass
30078 22:26:38.943839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3936 RESULT=skip>
30079 22:26:38.944208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3936 RESULT=skip
30081 22:26:38.974258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3936 RESULT=skip>
30082 22:26:38.974623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3936 RESULT=skip
30084 22:26:39.004209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3952 RESULT=pass>
30085 22:26:39.004564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3952 RESULT=pass
30087 22:26:39.034285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3952 RESULT=skip
30089 22:26:39.034725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3952 RESULT=skip>
30090 22:26:39.064776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3952 RESULT=skip>
30091 22:26:39.065140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3952 RESULT=skip
30093 22:26:39.095313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3968 RESULT=pass
30095 22:26:39.095752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3968 RESULT=pass>
30096 22:26:39.125302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3968 RESULT=skip>
30097 22:26:39.125786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3968 RESULT=skip
30099 22:26:39.156643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3968 RESULT=skip
30101 22:26:39.157187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3968 RESULT=skip>
30102 22:26:39.186739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3984 RESULT=pass>
30103 22:26:39.187198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3984 RESULT=pass
30105 22:26:39.217259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3984 RESULT=skip>
30106 22:26:39.217700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3984 RESULT=skip
30108 22:26:39.248332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3984 RESULT=skip>
30109 22:26:39.248791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3984 RESULT=skip
30111 22:26:39.278499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4000 RESULT=pass>
30112 22:26:39.278951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4000 RESULT=pass
30114 22:26:39.309750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4000 RESULT=skip>
30115 22:26:39.310212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4000 RESULT=skip
30117 22:26:39.340661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4000 RESULT=skip>
30118 22:26:39.341090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4000 RESULT=skip
30120 22:26:39.371240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4016 RESULT=pass>
30121 22:26:39.371672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4016 RESULT=pass
30123 22:26:39.401767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4016 RESULT=skip>
30124 22:26:39.402227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4016 RESULT=skip
30126 22:26:39.432224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4016 RESULT=skip>
30127 22:26:39.432665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4016 RESULT=skip
30129 22:26:39.463478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4032 RESULT=pass
30131 22:26:39.464005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4032 RESULT=pass>
30132 22:26:39.493906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4032 RESULT=skip>
30133 22:26:39.494340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4032 RESULT=skip
30135 22:26:39.524449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4032 RESULT=skip>
30136 22:26:39.524875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4032 RESULT=skip
30138 22:26:39.555715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4048 RESULT=pass>
30139 22:26:39.556154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4048 RESULT=pass
30141 22:26:39.586281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4048 RESULT=skip>
30142 22:26:39.586727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4048 RESULT=skip
30144 22:26:39.616763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4048 RESULT=skip
30146 22:26:39.617209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4048 RESULT=skip>
30147 22:26:39.647928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4064 RESULT=pass>
30148 22:26:39.648340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4064 RESULT=pass
30150 22:26:39.678320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4064 RESULT=skip>
30151 22:26:39.678726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4064 RESULT=skip
30153 22:26:39.710066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4064 RESULT=skip>
30154 22:26:39.710481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4064 RESULT=skip
30156 22:26:39.741160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4080 RESULT=pass>
30157 22:26:39.741568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4080 RESULT=pass
30159 22:26:39.772007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4080 RESULT=skip>
30160 22:26:39.772421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4080 RESULT=skip
30162 22:26:39.803159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4080 RESULT=skip>
30163 22:26:39.803575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4080 RESULT=skip
30165 22:26:39.834029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4096 RESULT=pass>
30166 22:26:39.834431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4096 RESULT=pass
30168 22:26:39.864615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4096 RESULT=skip>
30169 22:26:39.865024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4096 RESULT=skip
30171 22:26:39.895988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4096 RESULT=skip>
30172 22:26:39.896396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4096 RESULT=skip
30174 22:26:39.926443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4112 RESULT=pass>
30175 22:26:39.926852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4112 RESULT=pass
30177 22:26:39.957767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4112 RESULT=skip>
30178 22:26:39.958190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4112 RESULT=skip
30180 22:26:39.989045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4112 RESULT=skip>
30181 22:26:39.989454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4112 RESULT=skip
30183 22:26:40.019191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4128 RESULT=pass>
30184 22:26:40.019603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4128 RESULT=pass
30186 22:26:40.051884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4128 RESULT=skip>
30187 22:26:40.052350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4128 RESULT=skip
30189 22:26:40.083358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4128 RESULT=skip
30191 22:26:40.083922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4128 RESULT=skip>
30192 22:26:40.114659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4144 RESULT=pass>
30193 22:26:40.115051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4144 RESULT=pass
30195 22:26:40.145806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4144 RESULT=skip>
30196 22:26:40.146291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4144 RESULT=skip
30198 22:26:40.177034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4144 RESULT=skip>
30199 22:26:40.177428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4144 RESULT=skip
30201 22:26:40.207979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4160 RESULT=pass
30203 22:26:40.208390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4160 RESULT=pass>
30204 22:26:40.238859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4160 RESULT=skip>
30205 22:26:40.239315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4160 RESULT=skip
30207 22:26:40.269894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4160 RESULT=skip>
30208 22:26:40.270341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4160 RESULT=skip
30210 22:26:40.301602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4176 RESULT=pass>
30211 22:26:40.302025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4176 RESULT=pass
30213 22:26:40.332928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4176 RESULT=skip
30215 22:26:40.333467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4176 RESULT=skip>
30216 22:26:40.364783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4176 RESULT=skip>
30217 22:26:40.365200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4176 RESULT=skip
30219 22:26:40.396336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4192 RESULT=pass>
30220 22:26:40.396774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4192 RESULT=pass
30222 22:26:40.427735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4192 RESULT=skip
30224 22:26:40.428262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4192 RESULT=skip>
30225 22:26:40.459883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4192 RESULT=skip>
30226 22:26:40.460297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4192 RESULT=skip
30228 22:26:40.491189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4208 RESULT=pass
30230 22:26:40.491719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4208 RESULT=pass>
30231 22:26:40.522268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4208 RESULT=skip>
30232 22:26:40.522705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4208 RESULT=skip
30234 22:26:40.553588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4208 RESULT=skip>
30235 22:26:40.554016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4208 RESULT=skip
30237 22:26:40.584423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4224 RESULT=pass
30239 22:26:40.584848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4224 RESULT=pass>
30240 22:26:40.615094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4224 RESULT=skip>
30241 22:26:40.615450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4224 RESULT=skip
30243 22:26:40.645990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4224 RESULT=skip>
30244 22:26:40.646346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4224 RESULT=skip
30246 22:26:40.676356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4240 RESULT=pass>
30247 22:26:40.676712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4240 RESULT=pass
30249 22:26:40.706963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4240 RESULT=skip>
30250 22:26:40.707321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4240 RESULT=skip
30252 22:26:40.737208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4240 RESULT=skip>
30253 22:26:40.737568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4240 RESULT=skip
30255 22:26:40.766887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4256 RESULT=pass>
30256 22:26:40.767241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4256 RESULT=pass
30258 22:26:40.797357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4256 RESULT=skip>
30259 22:26:40.797688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4256 RESULT=skip
30261 22:26:40.828006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4256 RESULT=skip>
30262 22:26:40.828362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4256 RESULT=skip
30264 22:26:40.858253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4272 RESULT=pass>
30265 22:26:40.858609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4272 RESULT=pass
30267 22:26:40.889025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4272 RESULT=skip>
30268 22:26:40.889378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4272 RESULT=skip
30270 22:26:40.919720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4272 RESULT=skip>
30271 22:26:40.920074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4272 RESULT=skip
30273 22:26:40.949852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4288 RESULT=pass>
30274 22:26:40.950209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4288 RESULT=pass
30276 22:26:40.981860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4288 RESULT=skip>
30277 22:26:40.982217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4288 RESULT=skip
30279 22:26:41.017829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4288 RESULT=skip>
30280 22:26:41.018185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4288 RESULT=skip
30282 22:26:41.049169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4304 RESULT=pass>
30283 22:26:41.049527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4304 RESULT=pass
30285 22:26:41.079870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4304 RESULT=skip>
30286 22:26:41.080226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4304 RESULT=skip
30288 22:26:41.110401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4304 RESULT=skip>
30289 22:26:41.110755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4304 RESULT=skip
30291 22:26:41.147071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4320 RESULT=pass
30293 22:26:41.147596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4320 RESULT=pass>
30294 22:26:41.192986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4320 RESULT=skip>
30295 22:26:41.193343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4320 RESULT=skip
30297 22:26:41.224489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4320 RESULT=skip
30299 22:26:41.224956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4320 RESULT=skip>
30300 22:26:41.256313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4336 RESULT=pass>
30301 22:26:41.256690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4336 RESULT=pass
30303 22:26:41.286915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4336 RESULT=skip>
30304 22:26:41.287258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4336 RESULT=skip
30306 22:26:41.317588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4336 RESULT=skip>
30307 22:26:41.317946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4336 RESULT=skip
30309 22:26:41.348292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4352 RESULT=pass
30311 22:26:41.348702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4352 RESULT=pass>
30312 22:26:41.378332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4352 RESULT=skip
30314 22:26:41.378745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4352 RESULT=skip>
30315 22:26:41.408595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4352 RESULT=skip>
30316 22:26:41.408935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4352 RESULT=skip
30318 22:26:41.439174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4368 RESULT=pass
30320 22:26:41.439648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4368 RESULT=pass>
30321 22:26:41.470116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4368 RESULT=skip>
30322 22:26:41.470454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4368 RESULT=skip
30324 22:26:41.500571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4368 RESULT=skip
30326 22:26:41.500972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4368 RESULT=skip>
30327 22:26:41.532038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4384 RESULT=pass
30329 22:26:41.532436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4384 RESULT=pass>
30330 22:26:41.562233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4384 RESULT=skip
30332 22:26:41.562632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4384 RESULT=skip>
30333 22:26:41.592316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4384 RESULT=skip>
30334 22:26:41.592654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4384 RESULT=skip
30336 22:26:41.622900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4400 RESULT=pass
30338 22:26:41.623295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4400 RESULT=pass>
30339 22:26:41.653268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4400 RESULT=skip
30341 22:26:41.653680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4400 RESULT=skip>
30342 22:26:41.683836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4400 RESULT=skip>
30343 22:26:41.684179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4400 RESULT=skip
30345 22:26:41.714527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4416 RESULT=pass
30347 22:26:41.714925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4416 RESULT=pass>
30348 22:26:41.744982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4416 RESULT=skip>
30349 22:26:41.745316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4416 RESULT=skip
30351 22:26:41.775135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4416 RESULT=skip>
30352 22:26:41.775470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4416 RESULT=skip
30354 22:26:41.805397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4432 RESULT=pass
30356 22:26:41.805801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4432 RESULT=pass>
30357 22:26:41.836217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4432 RESULT=skip>
30358 22:26:41.836553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4432 RESULT=skip
30360 22:26:41.866239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4432 RESULT=skip>
30361 22:26:41.866575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4432 RESULT=skip
30363 22:26:41.897298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4448 RESULT=pass>
30364 22:26:41.897653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4448 RESULT=pass
30366 22:26:41.927835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4448 RESULT=skip>
30367 22:26:41.928187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4448 RESULT=skip
30369 22:26:41.959029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4448 RESULT=skip>
30370 22:26:41.959382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4448 RESULT=skip
30372 22:26:41.989361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4464 RESULT=pass>
30373 22:26:41.989690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4464 RESULT=pass
30375 22:26:42.019853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4464 RESULT=skip
30377 22:26:42.020289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4464 RESULT=skip>
30378 22:26:42.051055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4464 RESULT=skip
30380 22:26:42.051490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4464 RESULT=skip>
30381 22:26:42.081407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4480 RESULT=pass>
30382 22:26:42.081759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4480 RESULT=pass
30384 22:26:42.111870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4480 RESULT=skip>
30385 22:26:42.112224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4480 RESULT=skip
30387 22:26:42.142186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4480 RESULT=skip>
30388 22:26:42.142536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4480 RESULT=skip
30390 22:26:42.172204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4496 RESULT=pass>
30391 22:26:42.172558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4496 RESULT=pass
30393 22:26:42.202151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4496 RESULT=skip>
30394 22:26:42.202506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4496 RESULT=skip
30396 22:26:42.232536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4496 RESULT=skip>
30397 22:26:42.232890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4496 RESULT=skip
30399 22:26:42.262900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4512 RESULT=pass>
30400 22:26:42.263251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4512 RESULT=pass
30402 22:26:42.292909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4512 RESULT=skip>
30403 22:26:42.293260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4512 RESULT=skip
30405 22:26:42.323106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4512 RESULT=skip>
30406 22:26:42.323457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4512 RESULT=skip
30408 22:26:42.353144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4528 RESULT=pass>
30409 22:26:42.353496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4528 RESULT=pass
30411 22:26:42.383422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4528 RESULT=skip
30413 22:26:42.383857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4528 RESULT=skip>
30414 22:26:42.415800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4528 RESULT=skip>
30415 22:26:42.416176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4528 RESULT=skip
30417 22:26:42.452826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4544 RESULT=pass>
30418 22:26:42.453375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4544 RESULT=pass
30420 22:26:42.483672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4544 RESULT=skip>
30421 22:26:42.484179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4544 RESULT=skip
30423 22:26:42.514485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4544 RESULT=skip>
30424 22:26:42.514870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4544 RESULT=skip
30426 22:26:42.545379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4560 RESULT=pass>
30427 22:26:42.545727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4560 RESULT=pass
30429 22:26:42.576387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4560 RESULT=skip>
30430 22:26:42.576793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4560 RESULT=skip
30432 22:26:42.608247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4560 RESULT=skip
30434 22:26:42.608582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4560 RESULT=skip>
30435 22:26:42.640375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4576 RESULT=pass
30437 22:26:42.640825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4576 RESULT=pass>
30438 22:26:42.671506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4576 RESULT=skip
30440 22:26:42.672088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4576 RESULT=skip>
30441 22:26:42.703720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4576 RESULT=skip>
30442 22:26:42.704194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4576 RESULT=skip
30444 22:26:42.734836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4592 RESULT=pass
30446 22:26:42.735285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4592 RESULT=pass>
30447 22:26:42.765659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4592 RESULT=skip
30449 22:26:42.766220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4592 RESULT=skip>
30450 22:26:42.796347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4592 RESULT=skip>
30451 22:26:42.796687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4592 RESULT=skip
30453 22:26:42.826828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4608 RESULT=pass>
30454 22:26:42.827310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4608 RESULT=pass
30456 22:26:42.857911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4608 RESULT=skip>
30457 22:26:42.858305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4608 RESULT=skip
30459 22:26:42.888922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4608 RESULT=skip>
30460 22:26:42.889338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4608 RESULT=skip
30462 22:26:42.919708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4624 RESULT=pass
30464 22:26:42.920155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4624 RESULT=pass>
30465 22:26:42.949538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4624 RESULT=skip
30467 22:26:42.949978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4624 RESULT=skip>
30468 22:26:42.980282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4624 RESULT=skip>
30469 22:26:42.980622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4624 RESULT=skip
30471 22:26:43.010039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4640 RESULT=pass>
30472 22:26:43.010379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4640 RESULT=pass
30474 22:26:43.040801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4640 RESULT=skip>
30475 22:26:43.041141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4640 RESULT=skip
30477 22:26:43.070869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4640 RESULT=skip>
30478 22:26:43.071207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4640 RESULT=skip
30480 22:26:43.101214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4656 RESULT=pass
30482 22:26:43.101659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4656 RESULT=pass>
30483 22:26:43.131429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4656 RESULT=skip
30485 22:26:43.131851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4656 RESULT=skip>
30486 22:26:43.162130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4656 RESULT=skip
30488 22:26:43.162646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4656 RESULT=skip>
30489 22:26:43.192334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4672 RESULT=pass>
30490 22:26:43.192775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4672 RESULT=pass
30492 22:26:43.223673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4672 RESULT=skip>
30493 22:26:43.224011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4672 RESULT=skip
30495 22:26:43.254623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4672 RESULT=skip>
30496 22:26:43.254965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4672 RESULT=skip
30498 22:26:43.286685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4688 RESULT=pass>
30499 22:26:43.287012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4688 RESULT=pass
30501 22:26:43.318672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4688 RESULT=skip>
30502 22:26:43.319000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4688 RESULT=skip
30504 22:26:43.351853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4688 RESULT=skip>
30505 22:26:43.352316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4688 RESULT=skip
30507 22:26:43.402419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4704 RESULT=pass>
30508 22:26:43.402867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4704 RESULT=pass
30510 22:26:43.433262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4704 RESULT=skip>
30511 22:26:43.433698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4704 RESULT=skip
30513 22:26:43.464358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4704 RESULT=skip>
30514 22:26:43.464810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4704 RESULT=skip
30516 22:26:43.494667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4720 RESULT=pass
30518 22:26:43.495194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4720 RESULT=pass>
30519 22:26:43.525154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4720 RESULT=skip>
30520 22:26:43.525609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4720 RESULT=skip
30522 22:26:43.556042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4720 RESULT=skip>
30523 22:26:43.556550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4720 RESULT=skip
30525 22:26:43.586641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4736 RESULT=pass
30527 22:26:43.587160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4736 RESULT=pass>
30528 22:26:43.618174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4736 RESULT=skip>
30529 22:26:43.618747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4736 RESULT=skip
30531 22:26:43.648576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4736 RESULT=skip>
30532 22:26:43.649021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4736 RESULT=skip
30534 22:26:43.678665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4752 RESULT=pass
30536 22:26:43.679219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4752 RESULT=pass>
30537 22:26:43.710602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4752 RESULT=skip>
30538 22:26:43.711074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4752 RESULT=skip
30540 22:26:43.744594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4752 RESULT=skip>
30541 22:26:43.745068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4752 RESULT=skip
30543 22:26:43.775345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4768 RESULT=pass
30545 22:26:43.775920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4768 RESULT=pass>
30546 22:26:43.805818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4768 RESULT=skip
30548 22:26:43.806379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4768 RESULT=skip>
30549 22:26:43.836756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4768 RESULT=skip
30551 22:26:43.837296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4768 RESULT=skip>
30552 22:26:43.867072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4784 RESULT=pass
30554 22:26:43.867662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4784 RESULT=pass>
30555 22:26:43.901111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4784 RESULT=skip>
30556 22:26:43.901592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4784 RESULT=skip
30558 22:26:43.933983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4784 RESULT=skip>
30559 22:26:43.934452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4784 RESULT=skip
30561 22:26:43.965423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4800 RESULT=pass>
30562 22:26:43.965894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4800 RESULT=pass
30564 22:26:43.996333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4800 RESULT=skip>
30565 22:26:43.996805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4800 RESULT=skip
30567 22:26:44.026582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4800 RESULT=skip
30569 22:26:44.027146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4800 RESULT=skip>
30570 22:26:44.058225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4816 RESULT=pass
30572 22:26:44.058759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4816 RESULT=pass>
30573 22:26:44.088709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4816 RESULT=skip>
30574 22:26:44.089156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4816 RESULT=skip
30576 22:26:44.119411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4816 RESULT=skip
30578 22:26:44.120016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4816 RESULT=skip>
30579 22:26:44.149598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4832 RESULT=pass>
30580 22:26:44.150061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4832 RESULT=pass
30582 22:26:44.180306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4832 RESULT=skip
30584 22:26:44.180849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4832 RESULT=skip>
30585 22:26:44.210728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4832 RESULT=skip>
30586 22:26:44.211136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4832 RESULT=skip
30588 22:26:44.241487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4848 RESULT=pass
30590 22:26:44.242026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4848 RESULT=pass>
30591 22:26:44.272212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4848 RESULT=skip>
30592 22:26:44.272626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4848 RESULT=skip
30594 22:26:44.302293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4848 RESULT=skip>
30595 22:26:44.302733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4848 RESULT=skip
30597 22:26:44.333061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4864 RESULT=pass>
30598 22:26:44.333482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4864 RESULT=pass
30600 22:26:44.363922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4864 RESULT=skip
30602 22:26:44.364491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4864 RESULT=skip>
30603 22:26:44.394387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4864 RESULT=skip>
30604 22:26:44.394843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4864 RESULT=skip
30606 22:26:44.424487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4880 RESULT=pass>
30607 22:26:44.424943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4880 RESULT=pass
30609 22:26:44.455509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4880 RESULT=skip
30611 22:26:44.456113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4880 RESULT=skip>
30612 22:26:44.485529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4880 RESULT=skip>
30613 22:26:44.485999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4880 RESULT=skip
30615 22:26:44.516468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4896 RESULT=pass>
30616 22:26:44.516922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4896 RESULT=pass
30618 22:26:44.547190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4896 RESULT=skip>
30619 22:26:44.547655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4896 RESULT=skip
30621 22:26:44.578110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4896 RESULT=skip
30623 22:26:44.578711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4896 RESULT=skip>
30624 22:26:44.609012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4912 RESULT=pass>
30625 22:26:44.609470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4912 RESULT=pass
30627 22:26:44.639629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4912 RESULT=skip
30629 22:26:44.640170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4912 RESULT=skip>
30630 22:26:44.670792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4912 RESULT=skip>
30631 22:26:44.671268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4912 RESULT=skip
30633 22:26:44.701979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4928 RESULT=pass>
30634 22:26:44.702428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4928 RESULT=pass
30636 22:26:44.732983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4928 RESULT=skip>
30637 22:26:44.733435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4928 RESULT=skip
30639 22:26:44.764386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4928 RESULT=skip>
30640 22:26:44.764836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4928 RESULT=skip
30642 22:26:44.794715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4944 RESULT=pass>
30643 22:26:44.795152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4944 RESULT=pass
30645 22:26:44.825733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4944 RESULT=skip>
30646 22:26:44.826177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4944 RESULT=skip
30648 22:26:44.857260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4944 RESULT=skip>
30649 22:26:44.857668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4944 RESULT=skip
30651 22:26:44.888231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4960 RESULT=pass>
30652 22:26:44.888579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4960 RESULT=pass
30654 22:26:44.918069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4960 RESULT=skip>
30655 22:26:44.918415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4960 RESULT=skip
30657 22:26:44.948458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4960 RESULT=skip>
30658 22:26:44.948803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4960 RESULT=skip
30660 22:26:44.978354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4976 RESULT=pass>
30661 22:26:44.978706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4976 RESULT=pass
30663 22:26:45.008794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4976 RESULT=skip
30665 22:26:45.009236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4976 RESULT=skip>
30666 22:26:45.040849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4976 RESULT=skip
30668 22:26:45.041402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4976 RESULT=skip>
30669 22:26:45.070602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4992 RESULT=pass>
30670 22:26:45.070947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4992 RESULT=pass
30672 22:26:45.100729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4992 RESULT=skip>
30673 22:26:45.101077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4992 RESULT=skip
30675 22:26:45.130986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4992 RESULT=skip>
30676 22:26:45.131330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4992 RESULT=skip
30678 22:26:45.161145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5008 RESULT=pass
30680 22:26:45.161565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5008 RESULT=pass>
30681 22:26:45.191841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5008 RESULT=skip>
30682 22:26:45.192187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5008 RESULT=skip
30684 22:26:45.223405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5008 RESULT=skip
30686 22:26:45.223902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5008 RESULT=skip>
30687 22:26:45.254772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5024 RESULT=pass
30689 22:26:45.255269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5024 RESULT=pass>
30690 22:26:45.285292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5024 RESULT=skip>
30691 22:26:45.285661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5024 RESULT=skip
30693 22:26:45.315316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5024 RESULT=skip
30695 22:26:45.315833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5024 RESULT=skip>
30696 22:26:45.345388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5040 RESULT=pass>
30697 22:26:45.345744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5040 RESULT=pass
30699 22:26:45.376098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5040 RESULT=skip>
30700 22:26:45.376451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5040 RESULT=skip
30702 22:26:45.405849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5040 RESULT=skip>
30703 22:26:45.406199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5040 RESULT=skip
30705 22:26:45.436797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5056 RESULT=pass
30707 22:26:45.437229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5056 RESULT=pass>
30708 22:26:45.466775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5056 RESULT=skip>
30709 22:26:45.467148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5056 RESULT=skip
30711 22:26:45.497486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5056 RESULT=skip>
30712 22:26:45.497862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5056 RESULT=skip
30714 22:26:45.527120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5072 RESULT=pass>
30715 22:26:45.527484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5072 RESULT=pass
30717 22:26:45.557001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5072 RESULT=skip>
30718 22:26:45.557362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5072 RESULT=skip
30720 22:26:45.586883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5072 RESULT=skip>
30721 22:26:45.587247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5072 RESULT=skip
30723 22:26:45.617663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5088 RESULT=pass>
30724 22:26:45.618029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5088 RESULT=pass
30726 22:26:45.648125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5088 RESULT=skip>
30727 22:26:45.648491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5088 RESULT=skip
30729 22:26:45.678843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5088 RESULT=skip>
30730 22:26:45.679205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5088 RESULT=skip
30732 22:26:45.708884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5104 RESULT=pass>
30733 22:26:45.709249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5104 RESULT=pass
30735 22:26:45.739987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5104 RESULT=skip>
30736 22:26:45.740348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5104 RESULT=skip
30738 22:26:45.769731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5104 RESULT=skip>
30739 22:26:45.770096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5104 RESULT=skip
30741 22:26:45.800288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5120 RESULT=pass>
30742 22:26:45.800658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5120 RESULT=pass
30744 22:26:45.830042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5120 RESULT=skip>
30745 22:26:45.830402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5120 RESULT=skip
30747 22:26:45.860859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5120 RESULT=skip>
30748 22:26:45.861222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5120 RESULT=skip
30750 22:26:45.890962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5136 RESULT=pass>
30751 22:26:45.891324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5136 RESULT=pass
30753 22:26:45.921178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5136 RESULT=skip>
30754 22:26:45.921538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5136 RESULT=skip
30756 22:26:45.951416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5136 RESULT=skip
30758 22:26:45.951912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5136 RESULT=skip>
30759 22:26:45.981189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5152 RESULT=pass>
30760 22:26:45.981546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5152 RESULT=pass
30762 22:26:46.012194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5152 RESULT=skip>
30763 22:26:46.012554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5152 RESULT=skip
30765 22:26:46.044432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5152 RESULT=skip>
30766 22:26:46.044795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5152 RESULT=skip
30768 22:26:46.074800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5168 RESULT=pass
30770 22:26:46.075233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5168 RESULT=pass>
30771 22:26:46.104774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5168 RESULT=skip>
30772 22:26:46.105124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5168 RESULT=skip
30774 22:26:46.135044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5168 RESULT=skip>
30775 22:26:46.135393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5168 RESULT=skip
30777 22:26:46.165129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5184 RESULT=pass>
30778 22:26:46.165472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5184 RESULT=pass
30780 22:26:46.194964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5184 RESULT=skip>
30781 22:26:46.195302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5184 RESULT=skip
30783 22:26:46.225003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5184 RESULT=skip>
30784 22:26:46.225498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5184 RESULT=skip
30786 22:26:46.255345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5200 RESULT=pass
30788 22:26:46.255879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5200 RESULT=pass>
30789 22:26:46.287161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5200 RESULT=skip
30791 22:26:46.287687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5200 RESULT=skip>
30792 22:26:46.317424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5200 RESULT=skip>
30793 22:26:46.317866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5200 RESULT=skip
30795 22:26:46.349304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5216 RESULT=pass
30797 22:26:46.349755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5216 RESULT=pass>
30798 22:26:46.380153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5216 RESULT=skip>
30799 22:26:46.380572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5216 RESULT=skip
30801 22:26:46.411799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5216 RESULT=skip>
30802 22:26:46.412209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5216 RESULT=skip
30804 22:26:46.442772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5232 RESULT=pass
30806 22:26:46.443335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5232 RESULT=pass>
30807 22:26:46.473926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5232 RESULT=skip
30809 22:26:46.474564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5232 RESULT=skip>
30810 22:26:46.504591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5232 RESULT=skip>
30811 22:26:46.505046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5232 RESULT=skip
30813 22:26:46.535549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5248 RESULT=pass>
30814 22:26:46.536015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5248 RESULT=pass
30816 22:26:46.566716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5248 RESULT=skip
30818 22:26:46.567292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5248 RESULT=skip>
30819 22:26:46.596949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5248 RESULT=skip>
30820 22:26:46.597416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5248 RESULT=skip
30822 22:26:46.628097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5264 RESULT=pass
30824 22:26:46.628709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5264 RESULT=pass>
30825 22:26:46.658889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5264 RESULT=skip>
30826 22:26:46.659332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5264 RESULT=skip
30828 22:26:46.689452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5264 RESULT=skip>
30829 22:26:46.689900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5264 RESULT=skip
30831 22:26:46.720125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5280 RESULT=pass>
30832 22:26:46.720535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5280 RESULT=pass
30834 22:26:46.750641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5280 RESULT=skip>
30835 22:26:46.751100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5280 RESULT=skip
30837 22:26:46.781358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5280 RESULT=skip
30839 22:26:46.781914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5280 RESULT=skip>
30840 22:26:46.811389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5296 RESULT=pass
30842 22:26:46.811800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5296 RESULT=pass>
30843 22:26:46.842214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5296 RESULT=skip
30845 22:26:46.842652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5296 RESULT=skip>
30846 22:26:46.872916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5296 RESULT=skip>
30847 22:26:46.873285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5296 RESULT=skip
30849 22:26:46.903130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5312 RESULT=pass>
30850 22:26:46.903498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5312 RESULT=pass
30852 22:26:46.933596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5312 RESULT=skip>
30853 22:26:46.933949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5312 RESULT=skip
30855 22:26:46.964668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5312 RESULT=skip>
30856 22:26:46.965082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5312 RESULT=skip
30858 22:26:46.996169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5328 RESULT=pass
30860 22:26:46.996611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5328 RESULT=pass>
30861 22:26:47.027044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5328 RESULT=skip>
30862 22:26:47.027450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5328 RESULT=skip
30864 22:26:47.058230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5328 RESULT=skip>
30865 22:26:47.058626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5328 RESULT=skip
30867 22:26:47.088489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5344 RESULT=pass>
30868 22:26:47.088896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5344 RESULT=pass
30870 22:26:47.118801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5344 RESULT=skip>
30871 22:26:47.119214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5344 RESULT=skip
30873 22:26:47.149446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5344 RESULT=skip>
30874 22:26:47.149869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5344 RESULT=skip
30876 22:26:47.180340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5360 RESULT=pass>
30877 22:26:47.180762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5360 RESULT=pass
30879 22:26:47.210789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5360 RESULT=skip>
30880 22:26:47.211207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5360 RESULT=skip
30882 22:26:47.241615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5360 RESULT=skip>
30883 22:26:47.242033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5360 RESULT=skip
30885 22:26:47.272380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5376 RESULT=pass>
30886 22:26:47.272799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5376 RESULT=pass
30888 22:26:47.302785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5376 RESULT=skip>
30889 22:26:47.303241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5376 RESULT=skip
30891 22:26:47.333252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5376 RESULT=skip>
30892 22:26:47.333694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5376 RESULT=skip
30894 22:26:47.364327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5392 RESULT=pass>
30895 22:26:47.364811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5392 RESULT=pass
30897 22:26:47.396482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5392 RESULT=skip
30899 22:26:47.397034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5392 RESULT=skip>
30900 22:26:47.428080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5392 RESULT=skip
30902 22:26:47.428614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5392 RESULT=skip>
30903 22:26:47.459018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5408 RESULT=pass
30905 22:26:47.459541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5408 RESULT=pass>
30906 22:26:47.489951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5408 RESULT=skip>
30907 22:26:47.490388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5408 RESULT=skip
30909 22:26:47.520793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5408 RESULT=skip>
30910 22:26:47.521230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5408 RESULT=skip
30912 22:26:47.552120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5424 RESULT=pass
30914 22:26:47.552638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5424 RESULT=pass>
30915 22:26:47.583260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5424 RESULT=skip>
30916 22:26:47.583698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5424 RESULT=skip
30918 22:26:47.613931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5424 RESULT=skip
30920 22:26:47.614447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5424 RESULT=skip>
30921 22:26:47.645173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5440 RESULT=pass>
30922 22:26:47.645612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5440 RESULT=pass
30924 22:26:47.676478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5440 RESULT=skip>
30925 22:26:47.676922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5440 RESULT=skip
30927 22:26:47.707081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5440 RESULT=skip>
30928 22:26:47.707526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5440 RESULT=skip
30930 22:26:47.738018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5456 RESULT=pass
30932 22:26:47.738566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5456 RESULT=pass>
30933 22:26:47.768284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5456 RESULT=skip>
30934 22:26:47.768612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5456 RESULT=skip
30936 22:26:47.798758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5456 RESULT=skip
30938 22:26:47.799166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5456 RESULT=skip>
30939 22:26:47.829098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5472 RESULT=pass
30941 22:26:47.829501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5472 RESULT=pass>
30942 22:26:47.859481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5472 RESULT=skip
30944 22:26:47.860009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5472 RESULT=skip>
30945 22:26:47.889994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5472 RESULT=skip
30947 22:26:47.890528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5472 RESULT=skip>
30948 22:26:47.921137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5488 RESULT=pass>
30949 22:26:47.921598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5488 RESULT=pass
30951 22:26:47.952066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5488 RESULT=skip>
30952 22:26:47.952533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5488 RESULT=skip
30954 22:26:47.983305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5488 RESULT=skip
30956 22:26:47.983925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5488 RESULT=skip>
30957 22:26:48.013862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5504 RESULT=pass>
30958 22:26:48.014308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5504 RESULT=pass
30960 22:26:48.044956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5504 RESULT=skip
30962 22:26:48.045490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5504 RESULT=skip>
30963 22:26:48.075460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5504 RESULT=skip
30965 22:26:48.076056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5504 RESULT=skip>
30966 22:26:48.105942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5520 RESULT=pass>
30967 22:26:48.106395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5520 RESULT=pass
30969 22:26:48.136884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5520 RESULT=skip>
30970 22:26:48.137328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5520 RESULT=skip
30972 22:26:48.167153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5520 RESULT=skip>
30973 22:26:48.167496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5520 RESULT=skip
30975 22:26:48.197508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5536 RESULT=pass
30977 22:26:48.197937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5536 RESULT=pass>
30978 22:26:48.228071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5536 RESULT=skip>
30979 22:26:48.228413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5536 RESULT=skip
30981 22:26:48.258293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5536 RESULT=skip>
30982 22:26:48.258628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5536 RESULT=skip
30984 22:26:48.288580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5552 RESULT=pass>
30985 22:26:48.288908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5552 RESULT=pass
30987 22:26:48.318568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5552 RESULT=skip>
30988 22:26:48.318885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5552 RESULT=skip
30990 22:26:48.348846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5552 RESULT=skip>
30991 22:26:48.349156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5552 RESULT=skip
30993 22:26:48.380064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5568 RESULT=pass>
30994 22:26:48.380396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5568 RESULT=pass
30996 22:26:48.410442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5568 RESULT=skip
30998 22:26:48.410842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5568 RESULT=skip>
30999 22:26:48.440419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5568 RESULT=skip>
31000 22:26:48.440887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5568 RESULT=skip
31002 22:26:48.470868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5584 RESULT=pass>
31003 22:26:48.471212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5584 RESULT=pass
31005 22:26:48.521674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5584 RESULT=skip>
31006 22:26:48.522013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5584 RESULT=skip
31008 22:26:48.552227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5584 RESULT=skip>
31009 22:26:48.552561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5584 RESULT=skip
31011 22:26:48.582198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5600 RESULT=pass>
31012 22:26:48.582565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5600 RESULT=pass
31014 22:26:48.612592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5600 RESULT=skip>
31015 22:26:48.612931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5600 RESULT=skip
31017 22:26:48.643652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5600 RESULT=skip
31019 22:26:48.644102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5600 RESULT=skip>
31020 22:26:48.673762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5616 RESULT=pass>
31021 22:26:48.674101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5616 RESULT=pass
31023 22:26:48.704320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5616 RESULT=skip>
31024 22:26:48.704658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5616 RESULT=skip
31026 22:26:48.734533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5616 RESULT=skip
31028 22:26:48.734940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5616 RESULT=skip>
31029 22:26:48.764692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5632 RESULT=pass>
31030 22:26:48.765031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5632 RESULT=pass
31032 22:26:48.795432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5632 RESULT=skip
31034 22:26:48.795842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5632 RESULT=skip>
31035 22:26:48.826374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5632 RESULT=skip>
31036 22:26:48.826734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5632 RESULT=skip
31038 22:26:48.856919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5648 RESULT=pass>
31039 22:26:48.857379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5648 RESULT=pass
31041 22:26:48.887173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5648 RESULT=skip
31043 22:26:48.887744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5648 RESULT=skip>
31044 22:26:48.917582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5648 RESULT=skip>
31045 22:26:48.918072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5648 RESULT=skip
31047 22:26:48.948216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5664 RESULT=pass>
31048 22:26:48.948689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5664 RESULT=pass
31050 22:26:48.978888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5664 RESULT=skip>
31051 22:26:48.979362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5664 RESULT=skip
31053 22:26:49.009482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5664 RESULT=skip
31055 22:26:49.010131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5664 RESULT=skip>
31056 22:26:49.040301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5680 RESULT=pass>
31057 22:26:49.040778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5680 RESULT=pass
31059 22:26:49.070742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5680 RESULT=skip>
31060 22:26:49.071212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5680 RESULT=skip
31062 22:26:49.100770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5680 RESULT=skip>
31063 22:26:49.101236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5680 RESULT=skip
31065 22:26:49.130984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5696 RESULT=pass>
31066 22:26:49.131459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5696 RESULT=pass
31068 22:26:49.161664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5696 RESULT=skip>
31069 22:26:49.162128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5696 RESULT=skip
31071 22:26:49.192407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5696 RESULT=skip>
31072 22:26:49.192876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5696 RESULT=skip
31074 22:26:49.222760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5712 RESULT=pass>
31075 22:26:49.223237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5712 RESULT=pass
31077 22:26:49.253550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5712 RESULT=skip>
31078 22:26:49.254038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5712 RESULT=skip
31080 22:26:49.284309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5712 RESULT=skip>
31081 22:26:49.284779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5712 RESULT=skip
31083 22:26:49.314728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5728 RESULT=pass>
31084 22:26:49.315199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5728 RESULT=pass
31086 22:26:49.345250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5728 RESULT=skip>
31087 22:26:49.345690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5728 RESULT=skip
31089 22:26:49.376565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5728 RESULT=skip>
31090 22:26:49.377028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5728 RESULT=skip
31092 22:26:49.406249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5744 RESULT=pass>
31093 22:26:49.406589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5744 RESULT=pass
31095 22:26:49.436690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5744 RESULT=skip
31097 22:26:49.437108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5744 RESULT=skip>
31098 22:26:49.466938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5744 RESULT=skip>
31099 22:26:49.467279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5744 RESULT=skip
31101 22:26:49.496756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5760 RESULT=pass>
31102 22:26:49.497091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5760 RESULT=pass
31104 22:26:49.526734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5760 RESULT=skip>
31105 22:26:49.527083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5760 RESULT=skip
31107 22:26:49.557062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5760 RESULT=skip>
31108 22:26:49.557399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5760 RESULT=skip
31110 22:26:49.587164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5776 RESULT=pass>
31111 22:26:49.587501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5776 RESULT=pass
31113 22:26:49.618063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5776 RESULT=skip>
31114 22:26:49.618403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5776 RESULT=skip
31116 22:26:49.648496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5776 RESULT=skip>
31117 22:26:49.648833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5776 RESULT=skip
31119 22:26:49.678408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5792 RESULT=pass>
31120 22:26:49.678744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5792 RESULT=pass
31122 22:26:49.708597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5792 RESULT=skip>
31123 22:26:49.709027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5792 RESULT=skip
31125 22:26:49.738659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5792 RESULT=skip>
31126 22:26:49.739004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5792 RESULT=skip
31128 22:26:49.769274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5808 RESULT=pass>
31129 22:26:49.769609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5808 RESULT=pass
31131 22:26:49.800443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5808 RESULT=skip>
31132 22:26:49.800876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5808 RESULT=skip
31134 22:26:49.829967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5808 RESULT=skip>
31135 22:26:49.830307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5808 RESULT=skip
31137 22:26:49.860414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5824 RESULT=pass>
31138 22:26:49.860892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5824 RESULT=pass
31140 22:26:49.890606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5824 RESULT=skip>
31141 22:26:49.891080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5824 RESULT=skip
31143 22:26:49.920758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5824 RESULT=skip>
31144 22:26:49.921226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5824 RESULT=skip
31146 22:26:49.951948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5840 RESULT=pass>
31147 22:26:49.952419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5840 RESULT=pass
31149 22:26:49.982326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5840 RESULT=skip>
31150 22:26:49.982791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5840 RESULT=skip
31152 22:26:50.012821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5840 RESULT=skip>
31153 22:26:50.013285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5840 RESULT=skip
31155 22:26:50.042990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5856 RESULT=pass>
31156 22:26:50.043457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5856 RESULT=pass
31158 22:26:50.073694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5856 RESULT=skip>
31159 22:26:50.074117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5856 RESULT=skip
31161 22:26:50.104366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5856 RESULT=skip>
31162 22:26:50.104776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5856 RESULT=skip
31164 22:26:50.134654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5872 RESULT=pass>
31165 22:26:50.135067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5872 RESULT=pass
31167 22:26:50.165363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5872 RESULT=skip>
31168 22:26:50.165781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5872 RESULT=skip
31170 22:26:50.196172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5872 RESULT=skip>
31171 22:26:50.196581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5872 RESULT=skip
31173 22:26:50.226490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5888 RESULT=pass>
31174 22:26:50.226904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5888 RESULT=pass
31176 22:26:50.257214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5888 RESULT=skip>
31177 22:26:50.257635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5888 RESULT=skip
31179 22:26:50.288529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5888 RESULT=skip>
31180 22:26:50.288951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5888 RESULT=skip
31182 22:26:50.318856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5904 RESULT=pass>
31183 22:26:50.319281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5904 RESULT=pass
31185 22:26:50.350393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5904 RESULT=skip>
31186 22:26:50.350815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5904 RESULT=skip
31188 22:26:50.381163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5904 RESULT=skip>
31189 22:26:50.381583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5904 RESULT=skip
31191 22:26:50.412083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5920 RESULT=pass>
31192 22:26:50.412500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5920 RESULT=pass
31194 22:26:50.442156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5920 RESULT=skip>
31195 22:26:50.442574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5920 RESULT=skip
31197 22:26:50.473043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5920 RESULT=skip>
31198 22:26:50.473477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5920 RESULT=skip
31200 22:26:50.503680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5936 RESULT=pass>
31201 22:26:50.504089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5936 RESULT=pass
31203 22:26:50.534016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5936 RESULT=skip>
31204 22:26:50.534428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5936 RESULT=skip
31206 22:26:50.564688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5936 RESULT=skip>
31207 22:26:50.565104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5936 RESULT=skip
31209 22:26:50.596380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5952 RESULT=pass>
31210 22:26:50.596806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5952 RESULT=pass
31212 22:26:50.627206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5952 RESULT=skip>
31213 22:26:50.627626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5952 RESULT=skip
31215 22:26:50.658031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5952 RESULT=skip>
31216 22:26:50.658449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5952 RESULT=skip
31218 22:26:50.688774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5968 RESULT=pass>
31219 22:26:50.689192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5968 RESULT=pass
31221 22:26:50.719911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5968 RESULT=skip>
31222 22:26:50.720328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5968 RESULT=skip
31224 22:26:50.750331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5968 RESULT=skip>
31225 22:26:50.750744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5968 RESULT=skip
31227 22:26:50.781310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5984 RESULT=pass>
31228 22:26:50.781687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5984 RESULT=pass
31230 22:26:50.812340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5984 RESULT=skip>
31231 22:26:50.812755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5984 RESULT=skip
31233 22:26:50.842933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5984 RESULT=skip>
31234 22:26:50.843358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5984 RESULT=skip
31236 22:26:50.873214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6000 RESULT=pass>
31237 22:26:50.873626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6000 RESULT=pass
31239 22:26:50.904156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6000 RESULT=skip>
31240 22:26:50.904575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6000 RESULT=skip
31242 22:26:50.935085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6000 RESULT=skip>
31243 22:26:50.935510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6000 RESULT=skip
31245 22:26:50.965743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6016 RESULT=pass>
31246 22:26:50.966156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6016 RESULT=pass
31248 22:26:50.996373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6016 RESULT=skip>
31249 22:26:50.996791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6016 RESULT=skip
31251 22:26:51.026953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6016 RESULT=skip>
31252 22:26:51.027368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6016 RESULT=skip
31254 22:26:51.057759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6032 RESULT=pass>
31255 22:26:51.058173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6032 RESULT=pass
31257 22:26:51.088565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6032 RESULT=skip>
31258 22:26:51.088976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6032 RESULT=skip
31260 22:26:51.119068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6032 RESULT=skip>
31261 22:26:51.119489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6032 RESULT=skip
31263 22:26:51.150118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6048 RESULT=pass>
31264 22:26:51.150532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6048 RESULT=pass
31266 22:26:51.180549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6048 RESULT=skip>
31267 22:26:51.180961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6048 RESULT=skip
31269 22:26:51.211070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6048 RESULT=skip>
31270 22:26:51.211492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6048 RESULT=skip
31272 22:26:51.241845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6064 RESULT=pass>
31273 22:26:51.242266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6064 RESULT=pass
31275 22:26:51.272501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6064 RESULT=skip>
31276 22:26:51.272906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6064 RESULT=skip
31278 22:26:51.303391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6064 RESULT=skip
31280 22:26:51.303845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6064 RESULT=skip>
31281 22:26:51.334876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6080 RESULT=pass
31283 22:26:51.335321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6080 RESULT=pass>
31284 22:26:51.365434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6080 RESULT=skip>
31285 22:26:51.365849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6080 RESULT=skip
31287 22:26:51.396199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6080 RESULT=skip
31289 22:26:51.396625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6080 RESULT=skip>
31290 22:26:51.426464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6096 RESULT=pass>
31291 22:26:51.426876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6096 RESULT=pass
31293 22:26:51.457037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6096 RESULT=skip>
31294 22:26:51.457446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6096 RESULT=skip
31296 22:26:51.488249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6096 RESULT=skip>
31297 22:26:51.488664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6096 RESULT=skip
31299 22:26:51.518793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6112 RESULT=pass>
31300 22:26:51.519210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6112 RESULT=pass
31302 22:26:51.549708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6112 RESULT=skip>
31303 22:26:51.550117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6112 RESULT=skip
31305 22:26:51.581321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6112 RESULT=skip>
31306 22:26:51.581748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6112 RESULT=skip
31308 22:26:51.612181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6128 RESULT=pass>
31309 22:26:51.612591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6128 RESULT=pass
31311 22:26:51.642839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6128 RESULT=skip>
31312 22:26:51.643248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6128 RESULT=skip
31314 22:26:51.674070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6128 RESULT=skip>
31315 22:26:51.674486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6128 RESULT=skip
31317 22:26:51.704670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6144 RESULT=pass>
31318 22:26:51.705080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6144 RESULT=pass
31320 22:26:51.735535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6144 RESULT=skip
31322 22:26:51.735974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6144 RESULT=skip>
31323 22:26:51.767131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6144 RESULT=skip>
31324 22:26:51.767574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6144 RESULT=skip
31326 22:26:51.797875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6160 RESULT=pass>
31327 22:26:51.798320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6160 RESULT=pass
31329 22:26:51.828914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6160 RESULT=skip>
31330 22:26:51.829352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6160 RESULT=skip
31332 22:26:51.859822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6160 RESULT=skip>
31333 22:26:51.860264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6160 RESULT=skip
31335 22:26:51.890543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6176 RESULT=pass>
31336 22:26:51.891001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6176 RESULT=pass
31338 22:26:51.922376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6176 RESULT=skip>
31339 22:26:51.922817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6176 RESULT=skip
31341 22:26:51.953361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6176 RESULT=skip>
31342 22:26:51.953802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6176 RESULT=skip
31344 22:26:51.984194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6192 RESULT=pass>
31345 22:26:51.984634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6192 RESULT=pass
31347 22:26:52.014736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6192 RESULT=skip>
31348 22:26:52.015153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6192 RESULT=skip
31350 22:26:52.045424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6192 RESULT=skip>
31351 22:26:52.045879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6192 RESULT=skip
31353 22:26:52.076397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6208 RESULT=pass>
31354 22:26:52.076833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6208 RESULT=pass
31356 22:26:52.108271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6208 RESULT=skip>
31357 22:26:52.108715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6208 RESULT=skip
31359 22:26:52.139720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6208 RESULT=skip>
31360 22:26:52.140176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6208 RESULT=skip
31362 22:26:52.170125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6224 RESULT=pass>
31363 22:26:52.170548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6224 RESULT=pass
31365 22:26:52.201203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6224 RESULT=skip>
31366 22:26:52.201627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6224 RESULT=skip
31368 22:26:52.232627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6224 RESULT=skip
31370 22:26:52.233104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6224 RESULT=skip>
31371 22:26:52.263768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6240 RESULT=pass>
31372 22:26:52.264216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6240 RESULT=pass
31374 22:26:52.294677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6240 RESULT=skip>
31375 22:26:52.295173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6240 RESULT=skip
31377 22:26:52.326419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6240 RESULT=skip>
31378 22:26:52.326902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6240 RESULT=skip
31380 22:26:52.357431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6256 RESULT=pass>
31381 22:26:52.357936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6256 RESULT=pass
31383 22:26:52.389505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6256 RESULT=skip>
31384 22:26:52.389991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6256 RESULT=skip
31386 22:26:52.420636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6256 RESULT=skip>
31387 22:26:52.421132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6256 RESULT=skip
31389 22:26:52.454158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6272 RESULT=pass>
31390 22:26:52.454626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6272 RESULT=pass
31392 22:26:52.487409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6272 RESULT=skip
31394 22:26:52.487892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6272 RESULT=skip>
31395 22:26:52.522250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6272 RESULT=skip>
31396 22:26:52.522703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6272 RESULT=skip
31398 22:26:52.556677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6288 RESULT=pass>
31399 22:26:52.557128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6288 RESULT=pass
31401 22:26:52.592644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6288 RESULT=skip>
31402 22:26:52.593095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6288 RESULT=skip
31404 22:26:52.625854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6288 RESULT=skip>
31405 22:26:52.626283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6288 RESULT=skip
31407 22:26:52.657611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6304 RESULT=pass>
31408 22:26:52.658046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6304 RESULT=pass
31410 22:26:52.688815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6304 RESULT=skip>
31411 22:26:52.689242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6304 RESULT=skip
31413 22:26:52.720457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6304 RESULT=skip>
31414 22:26:52.720878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6304 RESULT=skip
31416 22:26:52.752500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6320 RESULT=pass>
31417 22:26:52.752944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6320 RESULT=pass
31419 22:26:52.785028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6320 RESULT=skip
31421 22:26:52.785496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6320 RESULT=skip>
31422 22:26:52.816741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6320 RESULT=skip>
31423 22:26:52.817195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6320 RESULT=skip
31425 22:26:52.848772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6336 RESULT=pass>
31426 22:26:52.849218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6336 RESULT=pass
31428 22:26:52.880878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6336 RESULT=skip>
31429 22:26:52.881329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6336 RESULT=skip
31431 22:26:52.914259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6336 RESULT=skip>
31432 22:26:52.914712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6336 RESULT=skip
31434 22:26:52.946547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6352 RESULT=pass>
31435 22:26:52.946972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6352 RESULT=pass
31437 22:26:52.978481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6352 RESULT=skip>
31438 22:26:52.978901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6352 RESULT=skip
31440 22:26:53.009721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6352 RESULT=skip>
31441 22:26:53.010145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6352 RESULT=skip
31443 22:26:53.040753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6368 RESULT=pass>
31444 22:26:53.041192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6368 RESULT=pass
31446 22:26:53.072926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6368 RESULT=skip>
31447 22:26:53.073384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6368 RESULT=skip
31449 22:26:53.104477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6368 RESULT=skip>
31450 22:26:53.104918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6368 RESULT=skip
31452 22:26:53.136264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6384 RESULT=pass>
31453 22:26:53.136713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6384 RESULT=pass
31455 22:26:53.168284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6384 RESULT=skip>
31456 22:26:53.168741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6384 RESULT=skip
31458 22:26:53.199997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6384 RESULT=skip>
31459 22:26:53.200446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6384 RESULT=skip
31461 22:26:53.231808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6400 RESULT=pass>
31462 22:26:53.232260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6400 RESULT=pass
31464 22:26:53.264344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6400 RESULT=skip>
31465 22:26:53.264755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6400 RESULT=skip
31467 22:26:53.295863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6400 RESULT=skip>
31468 22:26:53.296259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6400 RESULT=skip
31470 22:26:53.326944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6416 RESULT=pass
31472 22:26:53.327393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6416 RESULT=pass>
31473 22:26:53.359071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6416 RESULT=skip>
31474 22:26:53.359481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6416 RESULT=skip
31476 22:26:53.390012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6416 RESULT=skip>
31477 22:26:53.390423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6416 RESULT=skip
31479 22:26:53.420361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6432 RESULT=pass>
31480 22:26:53.420767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6432 RESULT=pass
31482 22:26:53.452131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6432 RESULT=skip
31484 22:26:53.452564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6432 RESULT=skip>
31485 22:26:53.483024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6432 RESULT=skip>
31486 22:26:53.483493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6432 RESULT=skip
31488 22:26:53.514407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6448 RESULT=pass
31490 22:26:53.514838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6448 RESULT=pass>
31491 22:26:53.545625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6448 RESULT=skip
31493 22:26:53.546069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6448 RESULT=skip>
31494 22:26:53.576557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6448 RESULT=skip>
31495 22:26:53.577011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6448 RESULT=skip
31497 22:26:53.620099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6464 RESULT=pass>
31498 22:26:53.620577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6464 RESULT=pass
31500 22:26:53.662727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6464 RESULT=skip
31502 22:26:53.663318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6464 RESULT=skip>
31503 22:26:53.693417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6464 RESULT=skip>
31504 22:26:53.693863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6464 RESULT=skip
31506 22:26:53.723850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6480 RESULT=pass>
31507 22:26:53.724196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6480 RESULT=pass
31509 22:26:53.754483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6480 RESULT=skip>
31510 22:26:53.754835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6480 RESULT=skip
31512 22:26:53.784802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6480 RESULT=skip>
31513 22:26:53.785276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6480 RESULT=skip
31515 22:26:53.816538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6496 RESULT=pass
31517 22:26:53.816988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6496 RESULT=pass>
31518 22:26:53.847422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6496 RESULT=skip
31520 22:26:53.847865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6496 RESULT=skip>
31521 22:26:53.879789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6496 RESULT=skip
31523 22:26:53.880344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6496 RESULT=skip>
31524 22:26:53.910647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6512 RESULT=pass>
31525 22:26:53.911105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6512 RESULT=pass
31527 22:26:53.941440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6512 RESULT=skip>
31528 22:26:53.941882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6512 RESULT=skip
31530 22:26:53.973158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6512 RESULT=skip>
31531 22:26:53.973588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6512 RESULT=skip
31533 22:26:54.003826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6528 RESULT=pass>
31534 22:26:54.004280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6528 RESULT=pass
31536 22:26:54.034873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6528 RESULT=skip>
31537 22:26:54.035337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6528 RESULT=skip
31539 22:26:54.065715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6528 RESULT=skip>
31540 22:26:54.066154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6528 RESULT=skip
31542 22:26:54.101525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6544 RESULT=pass
31544 22:26:54.102075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6544 RESULT=pass>
31545 22:26:54.132987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6544 RESULT=skip>
31546 22:26:54.133436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6544 RESULT=skip
31548 22:26:54.164237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6544 RESULT=skip
31550 22:26:54.164758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6544 RESULT=skip>
31551 22:26:54.194659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6560 RESULT=pass>
31552 22:26:54.195061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6560 RESULT=pass
31554 22:26:54.225378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6560 RESULT=skip>
31555 22:26:54.225811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6560 RESULT=skip
31557 22:26:54.256518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6560 RESULT=skip>
31558 22:26:54.256943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6560 RESULT=skip
31560 22:26:54.289238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6576 RESULT=pass
31562 22:26:54.289815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6576 RESULT=pass>
31563 22:26:54.321921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6576 RESULT=skip
31565 22:26:54.322455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6576 RESULT=skip>
31566 22:26:54.355770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6576 RESULT=skip>
31567 22:26:54.356263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6576 RESULT=skip
31569 22:26:54.388476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6592 RESULT=pass
31571 22:26:54.388919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6592 RESULT=pass>
31572 22:26:54.419097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6592 RESULT=skip>
31573 22:26:54.419439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6592 RESULT=skip
31575 22:26:54.449787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6592 RESULT=skip>
31576 22:26:54.450131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6592 RESULT=skip
31578 22:26:54.480044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6608 RESULT=pass>
31579 22:26:54.480384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6608 RESULT=pass
31581 22:26:54.510712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6608 RESULT=skip
31583 22:26:54.511283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6608 RESULT=skip>
31584 22:26:54.541379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6608 RESULT=skip>
31585 22:26:54.541855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6608 RESULT=skip
31587 22:26:54.572287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6624 RESULT=pass
31589 22:26:54.572814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6624 RESULT=pass>
31590 22:26:54.602974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6624 RESULT=skip
31592 22:26:54.603497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6624 RESULT=skip>
31593 22:26:54.634592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6624 RESULT=skip>
31594 22:26:54.635045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6624 RESULT=skip
31596 22:26:54.665246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6640 RESULT=pass
31598 22:26:54.665792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6640 RESULT=pass>
31599 22:26:54.696495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6640 RESULT=skip>
31600 22:26:54.697003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6640 RESULT=skip
31602 22:26:54.727766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6640 RESULT=skip>
31603 22:26:54.728189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6640 RESULT=skip
31605 22:26:54.758580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6656 RESULT=pass>
31606 22:26:54.758926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6656 RESULT=pass
31608 22:26:54.789162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6656 RESULT=skip>
31609 22:26:54.789620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6656 RESULT=skip
31611 22:26:54.821357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6656 RESULT=skip>
31612 22:26:54.821734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6656 RESULT=skip
31614 22:26:54.852411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6672 RESULT=pass>
31615 22:26:54.852861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6672 RESULT=pass
31617 22:26:54.883392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6672 RESULT=skip
31619 22:26:54.883862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6672 RESULT=skip>
31620 22:26:54.914362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6672 RESULT=skip
31622 22:26:54.914900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6672 RESULT=skip>
31623 22:26:54.944644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6688 RESULT=pass>
31624 22:26:54.944984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6688 RESULT=pass
31626 22:26:54.975984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6688 RESULT=skip
31628 22:26:54.976411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6688 RESULT=skip>
31629 22:26:55.006436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6688 RESULT=skip>
31630 22:26:55.006777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6688 RESULT=skip
31632 22:26:55.036482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6704 RESULT=pass
31634 22:26:55.036960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6704 RESULT=pass>
31635 22:26:55.067004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6704 RESULT=skip>
31636 22:26:55.067345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6704 RESULT=skip
31638 22:26:55.097173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6704 RESULT=skip>
31639 22:26:55.097531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6704 RESULT=skip
31641 22:26:55.127402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6720 RESULT=pass
31643 22:26:55.127819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6720 RESULT=pass>
31644 22:26:55.158134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6720 RESULT=skip>
31645 22:26:55.158573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6720 RESULT=skip
31647 22:26:55.188963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6720 RESULT=skip>
31648 22:26:55.189308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6720 RESULT=skip
31650 22:26:55.219264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6736 RESULT=pass
31652 22:26:55.219718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6736 RESULT=pass>
31653 22:26:55.249947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6736 RESULT=skip>
31654 22:26:55.250297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6736 RESULT=skip
31656 22:26:55.280690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6736 RESULT=skip>
31657 22:26:55.281058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6736 RESULT=skip
31659 22:26:55.310871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6752 RESULT=pass>
31660 22:26:55.311203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6752 RESULT=pass
31662 22:26:55.343376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6752 RESULT=skip
31664 22:26:55.343833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6752 RESULT=skip>
31665 22:26:55.376702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6752 RESULT=skip
31667 22:26:55.377278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6752 RESULT=skip>
31668 22:26:55.408104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6768 RESULT=pass
31670 22:26:55.408575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6768 RESULT=pass>
31671 22:26:55.440293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6768 RESULT=skip>
31672 22:26:55.440651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6768 RESULT=skip
31674 22:26:55.472304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6768 RESULT=skip
31676 22:26:55.472716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6768 RESULT=skip>
31677 22:26:55.503364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6784 RESULT=pass
31679 22:26:55.503797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6784 RESULT=pass>
31680 22:26:55.533517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6784 RESULT=skip>
31681 22:26:55.533869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6784 RESULT=skip
31683 22:26:55.566089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6784 RESULT=skip
31685 22:26:55.566539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6784 RESULT=skip>
31686 22:26:55.597353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6800 RESULT=pass>
31687 22:26:55.597688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6800 RESULT=pass
31689 22:26:55.628862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6800 RESULT=skip>
31690 22:26:55.629347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6800 RESULT=skip
31692 22:26:55.660260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6800 RESULT=skip
31694 22:26:55.660814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6800 RESULT=skip>
31695 22:26:55.691164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6816 RESULT=pass>
31696 22:26:55.691617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6816 RESULT=pass
31698 22:26:55.721525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6816 RESULT=skip>
31699 22:26:55.721917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6816 RESULT=skip
31701 22:26:55.752753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6816 RESULT=skip
31703 22:26:55.753329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6816 RESULT=skip>
31704 22:26:55.788194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6832 RESULT=pass>
31705 22:26:55.788657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6832 RESULT=pass
31707 22:26:55.820126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6832 RESULT=skip>
31708 22:26:55.820585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6832 RESULT=skip
31710 22:26:55.851071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6832 RESULT=skip>
31711 22:26:55.851541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6832 RESULT=skip
31713 22:26:55.882214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6848 RESULT=pass
31715 22:26:55.882803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6848 RESULT=pass>
31716 22:26:55.912713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6848 RESULT=skip>
31717 22:26:55.913149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6848 RESULT=skip
31719 22:26:55.943658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6848 RESULT=skip>
31720 22:26:55.944095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6848 RESULT=skip
31722 22:26:55.976202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6864 RESULT=pass
31724 22:26:55.976774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6864 RESULT=pass>
31725 22:26:56.008442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6864 RESULT=skip>
31726 22:26:56.008789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6864 RESULT=skip
31728 22:26:56.039463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6864 RESULT=skip
31730 22:26:56.039896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6864 RESULT=skip>
31731 22:26:56.069971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6880 RESULT=pass>
31732 22:26:56.070311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6880 RESULT=pass
31734 22:26:56.101004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6880 RESULT=skip>
31735 22:26:56.101478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6880 RESULT=skip
31737 22:26:56.131960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6880 RESULT=skip>
31738 22:26:56.132410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6880 RESULT=skip
31740 22:26:56.165913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6896 RESULT=pass
31742 22:26:56.166455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6896 RESULT=pass>
31743 22:26:56.204557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6896 RESULT=skip>
31744 22:26:56.204918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6896 RESULT=skip
31746 22:26:56.238836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6896 RESULT=skip
31748 22:26:56.239377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6896 RESULT=skip>
31749 22:26:56.273591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6912 RESULT=pass>
31750 22:26:56.273950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6912 RESULT=pass
31752 22:26:56.309547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6912 RESULT=skip>
31753 22:26:56.310042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6912 RESULT=skip
31755 22:26:56.340738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6912 RESULT=skip
31757 22:26:56.341317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6912 RESULT=skip>
31758 22:26:56.371852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6928 RESULT=pass>
31759 22:26:56.372332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6928 RESULT=pass
31761 22:26:56.404064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6928 RESULT=skip
31763 22:26:56.404537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6928 RESULT=skip>
31764 22:26:56.436083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6928 RESULT=skip
31766 22:26:56.436723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6928 RESULT=skip>
31767 22:26:56.467369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6944 RESULT=pass
31769 22:26:56.468026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6944 RESULT=pass>
31770 22:26:56.498993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6944 RESULT=skip
31772 22:26:56.499644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6944 RESULT=skip>
31773 22:26:56.530542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6944 RESULT=skip>
31774 22:26:56.531017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6944 RESULT=skip
31776 22:26:56.561276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6960 RESULT=pass>
31777 22:26:56.561699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6960 RESULT=pass
31779 22:26:56.592963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6960 RESULT=skip
31781 22:26:56.593498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6960 RESULT=skip>
31782 22:26:56.624260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6960 RESULT=skip
31784 22:26:56.624809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6960 RESULT=skip>
31785 22:26:56.656942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6976 RESULT=pass
31787 22:26:56.657524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6976 RESULT=pass>
31788 22:26:56.688319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6976 RESULT=skip>
31789 22:26:56.688750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6976 RESULT=skip
31791 22:26:56.720549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6976 RESULT=skip
31793 22:26:56.721017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6976 RESULT=skip>
31794 22:26:56.751952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6992 RESULT=pass>
31795 22:26:56.752378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6992 RESULT=pass
31797 22:26:56.783392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6992 RESULT=skip
31799 22:26:56.783854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6992 RESULT=skip>
31800 22:26:56.815848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6992 RESULT=skip>
31801 22:26:56.816354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6992 RESULT=skip
31803 22:26:56.848094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7008 RESULT=pass>
31804 22:26:56.848601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7008 RESULT=pass
31806 22:26:56.880311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7008 RESULT=skip
31808 22:26:56.881079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7008 RESULT=skip>
31809 22:26:56.912512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7008 RESULT=skip
31811 22:26:56.913139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7008 RESULT=skip>
31812 22:26:56.943924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7024 RESULT=pass>
31813 22:26:56.944437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7024 RESULT=pass
31815 22:26:56.975426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7024 RESULT=skip
31817 22:26:56.976027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7024 RESULT=skip>
31818 22:26:57.009697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7024 RESULT=skip>
31819 22:26:57.010171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7024 RESULT=skip
31821 22:26:57.041957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7040 RESULT=pass>
31822 22:26:57.042464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7040 RESULT=pass
31824 22:26:57.073322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7040 RESULT=skip>
31825 22:26:57.073818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7040 RESULT=skip
31827 22:26:57.104537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7040 RESULT=skip>
31828 22:26:57.105029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7040 RESULT=skip
31830 22:26:57.135868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7056 RESULT=pass>
31831 22:26:57.136373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7056 RESULT=pass
31833 22:26:57.166569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7056 RESULT=skip>
31834 22:26:57.167065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7056 RESULT=skip
31836 22:26:57.197149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7056 RESULT=skip>
31837 22:26:57.197660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7056 RESULT=skip
31839 22:26:57.228784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7072 RESULT=pass>
31840 22:26:57.229242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7072 RESULT=pass
31842 22:26:57.260751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7072 RESULT=skip>
31843 22:26:57.261236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7072 RESULT=skip
31845 22:26:57.292235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7072 RESULT=skip>
31846 22:26:57.292708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7072 RESULT=skip
31848 22:26:57.323974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7088 RESULT=pass>
31849 22:26:57.324452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7088 RESULT=pass
31851 22:26:57.354897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7088 RESULT=skip>
31852 22:26:57.355364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7088 RESULT=skip
31854 22:26:57.386203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7088 RESULT=skip
31856 22:26:57.386785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7088 RESULT=skip>
31857 22:26:57.417255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7104 RESULT=pass>
31858 22:26:57.417693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7104 RESULT=pass
31860 22:26:57.450506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7104 RESULT=skip
31862 22:26:57.451081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7104 RESULT=skip>
31863 22:26:57.485042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7104 RESULT=skip
31865 22:26:57.485638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7104 RESULT=skip>
31866 22:26:57.521975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7120 RESULT=pass>
31867 22:26:57.522497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7120 RESULT=pass
31869 22:26:57.560139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7120 RESULT=skip
31871 22:26:57.560712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7120 RESULT=skip>
31872 22:26:57.594540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7120 RESULT=skip>
31873 22:26:57.595041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7120 RESULT=skip
31875 22:26:57.628891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7136 RESULT=pass
31877 22:26:57.629527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7136 RESULT=pass>
31878 22:26:57.664217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7136 RESULT=skip>
31879 22:26:57.664797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7136 RESULT=skip
31881 22:26:57.697824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7136 RESULT=skip
31883 22:26:57.698312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7136 RESULT=skip>
31884 22:26:57.730865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7152 RESULT=pass>
31885 22:26:57.731332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7152 RESULT=pass
31887 22:26:57.763864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7152 RESULT=skip>
31888 22:26:57.764293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7152 RESULT=skip
31890 22:26:57.796712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7152 RESULT=skip
31892 22:26:57.797155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7152 RESULT=skip>
31893 22:26:57.829020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7168 RESULT=pass>
31894 22:26:57.829476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7168 RESULT=pass
31896 22:26:57.860674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7168 RESULT=skip>
31897 22:26:57.861132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7168 RESULT=skip
31899 22:26:57.892385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7168 RESULT=skip>
31900 22:26:57.892732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7168 RESULT=skip
31902 22:26:57.923805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7184 RESULT=pass>
31903 22:26:57.924129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7184 RESULT=pass
31905 22:26:57.956234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7184 RESULT=skip>
31906 22:26:57.956603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7184 RESULT=skip
31908 22:26:57.988707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7184 RESULT=skip>
31909 22:26:57.989048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7184 RESULT=skip
31911 22:26:58.021597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7200 RESULT=pass>
31912 22:26:58.021963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7200 RESULT=pass
31914 22:26:58.053671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7200 RESULT=skip
31916 22:26:58.054080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7200 RESULT=skip>
31917 22:26:58.084895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7200 RESULT=skip>
31918 22:26:58.085256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7200 RESULT=skip
31920 22:26:58.115980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7216 RESULT=pass>
31921 22:26:58.116332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7216 RESULT=pass
31923 22:26:58.146948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7216 RESULT=skip>
31924 22:26:58.147418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7216 RESULT=skip
31926 22:26:58.178512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7216 RESULT=skip
31928 22:26:58.178960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7216 RESULT=skip>
31929 22:26:58.213871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7232 RESULT=pass
31931 22:26:58.214356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7232 RESULT=pass>
31932 22:26:58.245404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7232 RESULT=skip
31934 22:26:58.245977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7232 RESULT=skip>
31935 22:26:58.277058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7232 RESULT=skip
31937 22:26:58.277621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7232 RESULT=skip>
31938 22:26:58.297284 <47>[ 303.370532] systemd-journald[107]: Sent WATCHDOG=1 notification.
31939 22:26:58.313468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7248 RESULT=pass>
31940 22:26:58.313919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7248 RESULT=pass
31942 22:26:58.345115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7248 RESULT=skip>
31943 22:26:58.345504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7248 RESULT=skip
31945 22:26:58.376448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7248 RESULT=skip>
31946 22:26:58.376798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7248 RESULT=skip
31948 22:26:58.408594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7264 RESULT=pass>
31949 22:26:58.409048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7264 RESULT=pass
31951 22:26:58.440905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7264 RESULT=skip>
31952 22:26:58.441261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7264 RESULT=skip
31954 22:26:58.472777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7264 RESULT=skip>
31955 22:26:58.473120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7264 RESULT=skip
31957 22:26:58.504070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7280 RESULT=pass>
31958 22:26:58.504410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7280 RESULT=pass
31960 22:26:58.534956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7280 RESULT=skip>
31961 22:26:58.535300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7280 RESULT=skip
31963 22:26:58.565904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7280 RESULT=skip>
31964 22:26:58.566250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7280 RESULT=skip
31966 22:26:58.596982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7296 RESULT=pass>
31967 22:26:58.597323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7296 RESULT=pass
31969 22:26:58.631109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7296 RESULT=skip>
31970 22:26:58.631449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7296 RESULT=skip
31972 22:26:58.662898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7296 RESULT=skip>
31973 22:26:58.663236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7296 RESULT=skip
31975 22:26:58.694129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7312 RESULT=pass>
31976 22:26:58.694467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7312 RESULT=pass
31978 22:26:58.725864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7312 RESULT=skip>
31979 22:26:58.726203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7312 RESULT=skip
31981 22:26:58.778395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7312 RESULT=skip>
31982 22:26:58.778744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7312 RESULT=skip
31984 22:26:58.809928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7328 RESULT=pass>
31985 22:26:58.810276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7328 RESULT=pass
31987 22:26:58.842210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7328 RESULT=skip
31989 22:26:58.842674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7328 RESULT=skip>
31990 22:26:58.872840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7328 RESULT=skip>
31991 22:26:58.873191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7328 RESULT=skip
31993 22:26:58.903296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7344 RESULT=pass
31995 22:26:58.903715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7344 RESULT=pass>
31996 22:26:58.934363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7344 RESULT=skip
31998 22:26:58.934768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7344 RESULT=skip>
31999 22:26:58.966981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7344 RESULT=skip>
32000 22:26:58.967319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7344 RESULT=skip
32002 22:26:58.997741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7360 RESULT=pass>
32003 22:26:58.998068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7360 RESULT=pass
32005 22:26:59.029361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7360 RESULT=skip
32007 22:26:59.029890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7360 RESULT=skip>
32008 22:26:59.061161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7360 RESULT=skip>
32009 22:26:59.061531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7360 RESULT=skip
32011 22:26:59.092093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7376 RESULT=pass
32013 22:26:59.092562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7376 RESULT=pass>
32014 22:26:59.122773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7376 RESULT=skip>
32015 22:26:59.123127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7376 RESULT=skip
32017 22:26:59.153642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7376 RESULT=skip>
32018 22:26:59.154115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7376 RESULT=skip
32020 22:26:59.184042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7392 RESULT=pass>
32021 22:26:59.184469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7392 RESULT=pass
32023 22:26:59.214669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7392 RESULT=skip
32025 22:26:59.215227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7392 RESULT=skip>
32026 22:26:59.247333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7392 RESULT=skip
32028 22:26:59.247935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7392 RESULT=skip>
32029 22:26:59.278473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7408 RESULT=pass
32031 22:26:59.279024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7408 RESULT=pass>
32032 22:26:59.309457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7408 RESULT=skip
32034 22:26:59.310007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7408 RESULT=skip>
32035 22:26:59.340438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7408 RESULT=skip>
32036 22:26:59.340884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7408 RESULT=skip
32038 22:26:59.371001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7424 RESULT=pass>
32039 22:26:59.371467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7424 RESULT=pass
32041 22:26:59.401883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7424 RESULT=skip
32043 22:26:59.402411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7424 RESULT=skip>
32044 22:26:59.433629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7424 RESULT=skip
32046 22:26:59.434173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7424 RESULT=skip>
32047 22:26:59.465237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7440 RESULT=pass
32049 22:26:59.465793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7440 RESULT=pass>
32050 22:26:59.496585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7440 RESULT=skip
32052 22:26:59.497095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7440 RESULT=skip>
32053 22:26:59.527400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7440 RESULT=skip
32055 22:26:59.527919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7440 RESULT=skip>
32056 22:26:59.557907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7456 RESULT=pass>
32057 22:26:59.558313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7456 RESULT=pass
32059 22:26:59.588391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7456 RESULT=skip>
32060 22:26:59.588815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7456 RESULT=skip
32062 22:26:59.619049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7456 RESULT=skip>
32063 22:26:59.619508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7456 RESULT=skip
32065 22:26:59.656047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7472 RESULT=pass
32067 22:26:59.656485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7472 RESULT=pass>
32068 22:26:59.686868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7472 RESULT=skip>
32069 22:26:59.687243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7472 RESULT=skip
32071 22:26:59.717509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7472 RESULT=skip>
32072 22:26:59.717862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7472 RESULT=skip
32074 22:26:59.748680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7488 RESULT=pass>
32075 22:26:59.749015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7488 RESULT=pass
32077 22:26:59.779335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7488 RESULT=skip
32079 22:26:59.779749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7488 RESULT=skip>
32080 22:26:59.809999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7488 RESULT=skip>
32081 22:26:59.810348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7488 RESULT=skip
32083 22:26:59.846043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7504 RESULT=pass
32085 22:26:59.846546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7504 RESULT=pass>
32086 22:26:59.876968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7504 RESULT=skip>
32087 22:26:59.877255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7504 RESULT=skip
32089 22:26:59.908116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7504 RESULT=skip>
32090 22:26:59.908469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7504 RESULT=skip
32092 22:26:59.940496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7520 RESULT=pass
32094 22:26:59.940934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7520 RESULT=pass>
32095 22:26:59.972881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7520 RESULT=skip
32097 22:26:59.973302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7520 RESULT=skip>
32098 22:27:00.004122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7520 RESULT=skip>
32099 22:27:00.004461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7520 RESULT=skip
32101 22:27:00.035939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7536 RESULT=pass>
32102 22:27:00.036337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7536 RESULT=pass
32104 22:27:00.068663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7536 RESULT=skip
32106 22:27:00.069229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7536 RESULT=skip>
32107 22:27:00.101513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7536 RESULT=skip>
32108 22:27:00.102004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7536 RESULT=skip
32110 22:27:00.133168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7552 RESULT=pass
32112 22:27:00.133741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7552 RESULT=pass>
32113 22:27:00.164322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7552 RESULT=skip
32115 22:27:00.164957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7552 RESULT=skip>
32116 22:27:00.196771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7552 RESULT=skip>
32117 22:27:00.197182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7552 RESULT=skip
32119 22:27:00.230570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7568 RESULT=pass
32121 22:27:00.231019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7568 RESULT=pass>
32122 22:27:00.269512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7568 RESULT=skip
32124 22:27:00.270070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7568 RESULT=skip>
32125 22:27:00.302532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7568 RESULT=skip>
32126 22:27:00.302874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7568 RESULT=skip
32128 22:27:00.333854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7584 RESULT=pass
32130 22:27:00.334294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7584 RESULT=pass>
32131 22:27:00.364784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7584 RESULT=skip>
32132 22:27:00.365180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7584 RESULT=skip
32134 22:27:00.396716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7584 RESULT=skip>
32135 22:27:00.397090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7584 RESULT=skip
32137 22:27:00.426977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7600 RESULT=pass>
32138 22:27:00.427318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7600 RESULT=pass
32140 22:27:00.459767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7600 RESULT=skip>
32141 22:27:00.460148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7600 RESULT=skip
32143 22:27:00.491236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7600 RESULT=skip
32145 22:27:00.491703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7600 RESULT=skip>
32146 22:27:00.522602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7616 RESULT=pass>
32147 22:27:00.523013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7616 RESULT=pass
32149 22:27:00.553429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7616 RESULT=skip
32151 22:27:00.553869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7616 RESULT=skip>
32152 22:27:00.584379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7616 RESULT=skip>
32153 22:27:00.584772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7616 RESULT=skip
32155 22:27:00.616066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7632 RESULT=pass
32157 22:27:00.616683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7632 RESULT=pass>
32158 22:27:00.646957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7632 RESULT=skip>
32159 22:27:00.647417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7632 RESULT=skip
32161 22:27:00.677716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7632 RESULT=skip>
32162 22:27:00.678161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7632 RESULT=skip
32164 22:27:00.708391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7648 RESULT=pass>
32165 22:27:00.708800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7648 RESULT=pass
32167 22:27:00.738755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7648 RESULT=skip>
32168 22:27:00.739109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7648 RESULT=skip
32170 22:27:00.769693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7648 RESULT=skip
32172 22:27:00.770106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7648 RESULT=skip>
32173 22:27:00.800205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7664 RESULT=pass>
32174 22:27:00.800573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7664 RESULT=pass
32176 22:27:00.830208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7664 RESULT=skip>
32177 22:27:00.830563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7664 RESULT=skip
32179 22:27:00.860785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7664 RESULT=skip
32181 22:27:00.861197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7664 RESULT=skip>
32182 22:27:00.891082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7680 RESULT=pass
32184 22:27:00.891486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7680 RESULT=pass>
32185 22:27:00.921187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7680 RESULT=skip>
32186 22:27:00.921529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7680 RESULT=skip
32188 22:27:00.952455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7680 RESULT=skip>
32189 22:27:00.952801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7680 RESULT=skip
32191 22:27:00.983735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7696 RESULT=pass>
32192 22:27:00.984080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7696 RESULT=pass
32194 22:27:01.016188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7696 RESULT=skip>
32195 22:27:01.016546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7696 RESULT=skip
32197 22:27:01.049829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7696 RESULT=skip>
32198 22:27:01.050177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7696 RESULT=skip
32200 22:27:01.080794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7712 RESULT=pass>
32201 22:27:01.081157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7712 RESULT=pass
32203 22:27:01.113165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7712 RESULT=skip
32205 22:27:01.113660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7712 RESULT=skip>
32206 22:27:01.144926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7712 RESULT=skip>
32207 22:27:01.145288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7712 RESULT=skip
32209 22:27:01.176325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7728 RESULT=pass
32211 22:27:01.176764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7728 RESULT=pass>
32212 22:27:01.208202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7728 RESULT=skip>
32213 22:27:01.208608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7728 RESULT=skip
32215 22:27:01.239347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7728 RESULT=skip
32217 22:27:01.239995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7728 RESULT=skip>
32218 22:27:01.270108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7744 RESULT=pass>
32219 22:27:01.270561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7744 RESULT=pass
32221 22:27:01.300675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7744 RESULT=skip>
32222 22:27:01.301141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7744 RESULT=skip
32224 22:27:01.331152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7744 RESULT=skip>
32225 22:27:01.331552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7744 RESULT=skip
32227 22:27:01.361808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7760 RESULT=pass>
32228 22:27:01.362222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7760 RESULT=pass
32230 22:27:01.392827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7760 RESULT=skip>
32231 22:27:01.393250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7760 RESULT=skip
32233 22:27:01.424425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7760 RESULT=skip>
32234 22:27:01.424825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7760 RESULT=skip
32236 22:27:01.455939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7776 RESULT=pass
32238 22:27:01.456370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7776 RESULT=pass>
32239 22:27:01.487589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7776 RESULT=skip
32241 22:27:01.488137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7776 RESULT=skip>
32242 22:27:01.518733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7776 RESULT=skip
32244 22:27:01.519241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7776 RESULT=skip>
32245 22:27:01.549104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7792 RESULT=pass>
32246 22:27:01.549520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7792 RESULT=pass
32248 22:27:01.579969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7792 RESULT=skip>
32249 22:27:01.580405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7792 RESULT=skip
32251 22:27:01.611418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7792 RESULT=skip
32253 22:27:01.611948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7792 RESULT=skip>
32254 22:27:01.642326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7808 RESULT=pass
32256 22:27:01.642872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7808 RESULT=pass>
32257 22:27:01.673558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7808 RESULT=skip>
32258 22:27:01.674014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7808 RESULT=skip
32260 22:27:01.704829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7808 RESULT=skip
32262 22:27:01.705394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7808 RESULT=skip>
32263 22:27:01.734796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7824 RESULT=pass
32265 22:27:01.735234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7824 RESULT=pass>
32266 22:27:01.765607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7824 RESULT=skip>
32267 22:27:01.765969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7824 RESULT=skip
32269 22:27:01.796114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7824 RESULT=skip>
32270 22:27:01.796458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7824 RESULT=skip
32272 22:27:01.826686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7840 RESULT=pass>
32273 22:27:01.827040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7840 RESULT=pass
32275 22:27:01.857213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7840 RESULT=skip>
32276 22:27:01.857555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7840 RESULT=skip
32278 22:27:01.887446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7840 RESULT=skip
32280 22:27:01.887882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7840 RESULT=skip>
32281 22:27:01.917716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7856 RESULT=pass>
32282 22:27:01.918060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7856 RESULT=pass
32284 22:27:01.948481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7856 RESULT=skip>
32285 22:27:01.948821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7856 RESULT=skip
32287 22:27:01.978923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7856 RESULT=skip>
32288 22:27:01.979278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7856 RESULT=skip
32290 22:27:02.009163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7872 RESULT=pass>
32291 22:27:02.009500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7872 RESULT=pass
32293 22:27:02.039436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7872 RESULT=skip
32295 22:27:02.039852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7872 RESULT=skip>
32296 22:27:02.069602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7872 RESULT=skip>
32297 22:27:02.069934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7872 RESULT=skip
32299 22:27:02.100449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7888 RESULT=pass>
32300 22:27:02.100770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7888 RESULT=pass
32302 22:27:02.130719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7888 RESULT=skip>
32303 22:27:02.131069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7888 RESULT=skip
32305 22:27:02.160475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7888 RESULT=skip>
32306 22:27:02.160814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7888 RESULT=skip
32308 22:27:02.190852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7904 RESULT=pass>
32309 22:27:02.191197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7904 RESULT=pass
32311 22:27:02.220656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7904 RESULT=skip>
32312 22:27:02.220991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7904 RESULT=skip
32314 22:27:02.250651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7904 RESULT=skip>
32315 22:27:02.250985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7904 RESULT=skip
32317 22:27:02.281007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7920 RESULT=pass>
32318 22:27:02.281340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7920 RESULT=pass
32320 22:27:02.311081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7920 RESULT=skip>
32321 22:27:02.311418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7920 RESULT=skip
32323 22:27:02.341498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7920 RESULT=skip>
32324 22:27:02.341841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7920 RESULT=skip
32326 22:27:02.371997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7936 RESULT=pass>
32327 22:27:02.372475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7936 RESULT=pass
32329 22:27:02.404066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7936 RESULT=skip>
32330 22:27:02.404496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7936 RESULT=skip
32332 22:27:02.436261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7936 RESULT=skip
32334 22:27:02.436861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7936 RESULT=skip>
32335 22:27:02.468092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7952 RESULT=pass
32337 22:27:02.468661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7952 RESULT=pass>
32338 22:27:02.500335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7952 RESULT=skip>
32339 22:27:02.500807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7952 RESULT=skip
32341 22:27:02.531304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7952 RESULT=skip
32343 22:27:02.531850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7952 RESULT=skip>
32344 22:27:02.561497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7968 RESULT=pass>
32345 22:27:02.561961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7968 RESULT=pass
32347 22:27:02.592346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7968 RESULT=skip>
32348 22:27:02.592731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7968 RESULT=skip
32350 22:27:02.623625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7968 RESULT=skip>
32351 22:27:02.624085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7968 RESULT=skip
32353 22:27:02.661139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7984 RESULT=pass>
32354 22:27:02.661574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7984 RESULT=pass
32356 22:27:02.693166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7984 RESULT=skip>
32357 22:27:02.693619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7984 RESULT=skip
32359 22:27:02.724740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7984 RESULT=skip>
32360 22:27:02.725106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7984 RESULT=skip
32362 22:27:02.755924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8000 RESULT=pass>
32363 22:27:02.756336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8000 RESULT=pass
32365 22:27:02.786818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8000 RESULT=skip>
32366 22:27:02.787253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8000 RESULT=skip
32368 22:27:02.817820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8000 RESULT=skip>
32369 22:27:02.818260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8000 RESULT=skip
32371 22:27:02.849059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8016 RESULT=pass
32373 22:27:02.849582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8016 RESULT=pass>
32374 22:27:02.880421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8016 RESULT=skip>
32375 22:27:02.880829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8016 RESULT=skip
32377 22:27:02.911382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8016 RESULT=skip
32379 22:27:02.911879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8016 RESULT=skip>
32380 22:27:02.942966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8032 RESULT=pass>
32381 22:27:02.943405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8032 RESULT=pass
32383 22:27:02.977546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8032 RESULT=skip>
32384 22:27:02.978004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8032 RESULT=skip
32386 22:27:03.008750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8032 RESULT=skip>
32387 22:27:03.009189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8032 RESULT=skip
32389 22:27:03.040017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8048 RESULT=pass>
32390 22:27:03.040467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8048 RESULT=pass
32392 22:27:03.070773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8048 RESULT=skip>
32393 22:27:03.071211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8048 RESULT=skip
32395 22:27:03.102143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8048 RESULT=skip>
32396 22:27:03.102548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8048 RESULT=skip
32398 22:27:03.133221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8064 RESULT=pass
32400 22:27:03.133740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8064 RESULT=pass>
32401 22:27:03.166114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8064 RESULT=skip
32403 22:27:03.166646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8064 RESULT=skip>
32404 22:27:03.200853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8064 RESULT=skip>
32405 22:27:03.201313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8064 RESULT=skip
32407 22:27:03.232293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8080 RESULT=pass>
32408 22:27:03.232726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8080 RESULT=pass
32410 22:27:03.263086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8080 RESULT=skip>
32411 22:27:03.263518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8080 RESULT=skip
32413 22:27:03.293783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8080 RESULT=skip>
32414 22:27:03.294202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8080 RESULT=skip
32416 22:27:03.324376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8096 RESULT=pass>
32417 22:27:03.324848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8096 RESULT=pass
32419 22:27:03.354681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8096 RESULT=skip>
32420 22:27:03.355041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8096 RESULT=skip
32422 22:27:03.385209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8096 RESULT=skip>
32423 22:27:03.385561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8096 RESULT=skip
32425 22:27:03.415829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8112 RESULT=pass
32427 22:27:03.416308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8112 RESULT=pass>
32428 22:27:03.446424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8112 RESULT=skip>
32429 22:27:03.446781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8112 RESULT=skip
32431 22:27:03.476588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8112 RESULT=skip>
32432 22:27:03.476934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8112 RESULT=skip
32434 22:27:03.506735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8128 RESULT=pass>
32435 22:27:03.507077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8128 RESULT=pass
32437 22:27:03.536911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8128 RESULT=skip
32439 22:27:03.537332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8128 RESULT=skip>
32440 22:27:03.570637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8128 RESULT=skip
32442 22:27:03.571050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8128 RESULT=skip>
32443 22:27:03.604135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8144 RESULT=pass>
32444 22:27:03.604472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8144 RESULT=pass
32446 22:27:03.637156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8144 RESULT=skip>
32447 22:27:03.637493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8144 RESULT=skip
32449 22:27:03.672883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8144 RESULT=skip>
32450 22:27:03.673357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8144 RESULT=skip
32452 22:27:03.704139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8160 RESULT=pass>
32453 22:27:03.704604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8160 RESULT=pass
32455 22:27:03.736200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8160 RESULT=skip>
32456 22:27:03.736653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8160 RESULT=skip
32458 22:27:03.767052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8160 RESULT=skip>
32459 22:27:03.767532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8160 RESULT=skip
32461 22:27:03.800066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8176 RESULT=pass
32463 22:27:03.800674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8176 RESULT=pass>
32464 22:27:03.830652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8176 RESULT=skip>
32465 22:27:03.831118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8176 RESULT=skip
32467 22:27:03.887391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8176 RESULT=skip
32469 22:27:03.887828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8176 RESULT=skip>
32470 22:27:03.918067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8192 RESULT=pass>
32471 22:27:03.918472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8192 RESULT=pass
32473 22:27:03.948498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8192 RESULT=skip>
32474 22:27:03.948890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8192 RESULT=skip
32476 22:27:03.980346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8192 RESULT=skip
32478 22:27:03.980784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8192 RESULT=skip>
32479 22:27:04.010555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace RESULT=pass>
32480 22:27:04.010979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace RESULT=pass
32482 22:27:04.042005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory RESULT=pass>
32483 22:27:04.042472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory RESULT=pass
32485 22:27:04.072532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory RESULT=pass>
32486 22:27:04.072891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory RESULT=pass
32488 22:27:04.103874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory RESULT=pass
32490 22:27:04.104310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory RESULT=pass>
32491 22:27:04.135580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory RESULT=pass
32493 22:27:04.136027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory RESULT=pass>
32494 22:27:04.166305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail
32496 22:27:04.166709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail>
32497 22:27:04.197130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail>
32498 22:27:04.197590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail
32500 22:27:04.228433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass>
32501 22:27:04.228897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass
32503 22:27:04.258745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass>
32504 22:27:04.259211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass
32506 22:27:04.289206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass>
32507 22:27:04.289653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass
32509 22:27:04.320276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass>
32510 22:27:04.320714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass
32512 22:27:04.351427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail
32514 22:27:04.352035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail>
32515 22:27:04.382744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail>
32516 22:27:04.383212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail
32518 22:27:04.414224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory RESULT=pass>
32519 22:27:04.414694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory RESULT=pass
32521 22:27:04.445106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory RESULT=fail
32523 22:27:04.445583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory RESULT=fail>
32524 22:27:04.475962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory RESULT=fail>
32525 22:27:04.476324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory RESULT=fail
32527 22:27:04.506725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory RESULT=pass>
32528 22:27:04.507154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory RESULT=pass
32530 22:27:04.538458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=pass>
32531 22:27:04.538866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=pass
32533 22:27:04.572385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
32534 22:27:04.572792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
32536 22:27:04.604475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory RESULT=pass>
32537 22:27:04.604966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory RESULT=pass
32539 22:27:04.635995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
32540 22:27:04.636442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
32542 22:27:04.666528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill RESULT=fail
32544 22:27:04.667060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill RESULT=fail>
32545 22:27:04.697160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail>
32546 22:27:04.697517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail
32548 22:27:04.728038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail>
32549 22:27:04.728383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail
32551 22:27:04.758967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32552 22:27:04.759330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32554 22:27:04.789971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32556 22:27:04.790389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32557 22:27:04.821299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32558 22:27:04.821741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32560 22:27:04.853060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32561 22:27:04.853415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32563 22:27:04.884197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail
32565 22:27:04.884618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail>
32566 22:27:04.915085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail>
32567 22:27:04.915431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail
32569 22:27:04.946202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32571 22:27:04.946614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32572 22:27:04.976517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32573 22:27:04.976835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32575 22:27:05.007252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32576 22:27:05.007565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32578 22:27:05.038086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32579 22:27:05.038402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32581 22:27:05.069144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory RESULT=fail>
32582 22:27:05.069501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory RESULT=fail
32584 22:27:05.098889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=fail>
32585 22:27:05.099247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=fail
32587 22:27:05.129033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_ksm_options RESULT=fail>
32588 22:27:05.129379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_ksm_options RESULT=fail
32590 22:27:05.159831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
32591 22:27:05.160167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass
32593 22:27:05.190107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass>
32594 22:27:05.190447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass
32596 22:27:05.221129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
32597 22:27:05.221465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass
32599 22:27:05.252411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass>
32600 22:27:05.252747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass
32602 22:27:05.282962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32603 22:27:05.283299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32605 22:27:05.313785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32606 22:27:05.314125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32608 22:27:05.344448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32609 22:27:05.344783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32611 22:27:05.376052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32613 22:27:05.376465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32614 22:27:05.406716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32615 22:27:05.407072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32617 22:27:05.437473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32618 22:27:05.437824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32620 22:27:05.468549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32621 22:27:05.468897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32623 22:27:05.499659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32624 22:27:05.500026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32626 22:27:05.530350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32627 22:27:05.530691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32629 22:27:05.562298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32631 22:27:05.562709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32632 22:27:05.593230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32633 22:27:05.593565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32635 22:27:05.624448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32636 22:27:05.624778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32638 22:27:05.655420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32640 22:27:05.655874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32641 22:27:05.686156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32642 22:27:05.686512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32644 22:27:05.717109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32645 22:27:05.717466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32647 22:27:05.748536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32649 22:27:05.748979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32650 22:27:05.779515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail
32652 22:27:05.779970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail>
32653 22:27:05.810528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=fail>
32654 22:27:05.810879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=fail
32656 22:27:05.840948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options RESULT=fail>
32657 22:27:05.841305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options RESULT=fail
32659 22:27:05.871034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass>
32660 22:27:05.871391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass
32662 22:27:05.900986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass>
32663 22:27:05.901325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass
32665 22:27:05.930706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=pass>
32666 22:27:05.931062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=pass
32668 22:27:05.960736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=pass>
32669 22:27:05.961087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=pass
32671 22:27:05.990607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=pass
32673 22:27:05.991054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=pass>
32674 22:27:06.020624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl RESULT=pass>
32675 22:27:06.020967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl RESULT=pass
32677 22:27:06.051562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode RESULT=fail
32679 22:27:06.051993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode RESULT=fail>
32680 22:27:06.082357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode RESULT=fail>
32681 22:27:06.082693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode RESULT=fail
32683 22:27:06.112693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode RESULT=pass>
32684 22:27:06.113031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode RESULT=pass
32686 22:27:06.143791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode RESULT=fail>
32687 22:27:06.144109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode RESULT=fail
32689 22:27:06.173454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion RESULT=fail>
32690 22:27:06.173765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion RESULT=fail
32692 22:27:06.204950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32693 22:27:06.205261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32695 22:27:06.235193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32696 22:27:06.235506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32698 22:27:06.265866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32699 22:27:06.266221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32701 22:27:06.296892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32702 22:27:06.297346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32704 22:27:06.328766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32705 22:27:06.329205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32707 22:27:06.359969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32708 22:27:06.360309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32710 22:27:06.391126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32711 22:27:06.391464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32713 22:27:06.421901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32714 22:27:06.422236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32716 22:27:06.452921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32717 22:27:06.453280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32719 22:27:06.483658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32720 22:27:06.484010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32722 22:27:06.514270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32723 22:27:06.514622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32725 22:27:06.545488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32726 22:27:06.545847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32728 22:27:06.576498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32729 22:27:06.576850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32731 22:27:06.607427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32733 22:27:06.607889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32734 22:27:06.638089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32736 22:27:06.638688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32737 22:27:06.668787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32738 22:27:06.669269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32740 22:27:06.699804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32742 22:27:06.700366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32743 22:27:06.730652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32744 22:27:06.731135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32746 22:27:06.761736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32747 22:27:06.762200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32749 22:27:06.793199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32750 22:27:06.793686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32752 22:27:06.824977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32753 22:27:06.825454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32755 22:27:06.856178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32756 22:27:06.856644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32758 22:27:06.886987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32759 22:27:06.887462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32761 22:27:06.917935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32762 22:27:06.918414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32764 22:27:06.948577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32765 22:27:06.949043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32767 22:27:06.979182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32768 22:27:06.979650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32770 22:27:07.010221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32772 22:27:07.010782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32773 22:27:07.041464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32774 22:27:07.041952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32776 22:27:07.072284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32777 22:27:07.072637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32779 22:27:07.102816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32780 22:27:07.103175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32782 22:27:07.133619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32783 22:27:07.133981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32785 22:27:07.164401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32786 22:27:07.164784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32788 22:27:07.196267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32790 22:27:07.196773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32791 22:27:07.226764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32793 22:27:07.227202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32794 22:27:07.257513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32795 22:27:07.258017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32797 22:27:07.288602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32798 22:27:07.289023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32800 22:27:07.319689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32801 22:27:07.320099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32803 22:27:07.350675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32804 22:27:07.351148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32806 22:27:07.381308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32807 22:27:07.381774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32809 22:27:07.412400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32810 22:27:07.412854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32812 22:27:07.443796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32813 22:27:07.444277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32815 22:27:07.474179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32816 22:27:07.474651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32818 22:27:07.505700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32819 22:27:07.506170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32821 22:27:07.537594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32822 22:27:07.538095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32824 22:27:07.568454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32825 22:27:07.568905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32827 22:27:07.599483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32829 22:27:07.600012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32830 22:27:07.630251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32831 22:27:07.630665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32833 22:27:07.661048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32835 22:27:07.661574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32836 22:27:07.692326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32837 22:27:07.692773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32839 22:27:07.723594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32841 22:27:07.724155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32842 22:27:07.754360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32843 22:27:07.754821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32845 22:27:07.785374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32846 22:27:07.785847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32848 22:27:07.817577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32849 22:27:07.818045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32851 22:27:07.849198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32852 22:27:07.849661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32854 22:27:07.880596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32855 22:27:07.881046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32857 22:27:07.911392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32859 22:27:07.911944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32860 22:27:07.942365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32861 22:27:07.942820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32863 22:27:07.973401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32864 22:27:07.973866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32866 22:27:08.004610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32868 22:27:08.005169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32869 22:27:08.036690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32871 22:27:08.037263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32872 22:27:08.067972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32873 22:27:08.068433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32875 22:27:08.098711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32876 22:27:08.099179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32878 22:27:08.129921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32879 22:27:08.130391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32881 22:27:08.160620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32882 22:27:08.161075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32884 22:27:08.192047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem RESULT=pass>
32885 22:27:08.192518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem RESULT=pass
32887 22:27:08.222809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=pass>
32888 22:27:08.223326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=pass
32890 22:27:08.253618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=pass
32892 22:27:08.254155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=pass>
32893 22:27:08.284464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=pass>
32894 22:27:08.284901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=pass
32896 22:27:08.314944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=pass>
32897 22:27:08.315351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=pass
32899 22:27:08.345155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=pass>
32900 22:27:08.345557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=pass
32902 22:27:08.375951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=pass>
32903 22:27:08.376405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=pass
32905 22:27:08.406695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=pass>
32906 22:27:08.407096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=pass
32908 22:27:08.437685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=pass>
32909 22:27:08.438081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=pass
32911 22:27:08.469356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=pass>
32912 22:27:08.469806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=pass
32914 22:27:08.500285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=pass>
32915 22:27:08.500687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=pass
32917 22:27:08.532371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=pass>
32918 22:27:08.532841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=pass
32920 22:27:08.563393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=pass
32922 22:27:08.563852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=pass>
32923 22:27:08.594206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=pass>
32924 22:27:08.594563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=pass
32926 22:27:08.624986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=pass>
32927 22:27:08.625346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=pass
32929 22:27:08.656062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=pass>
32930 22:27:08.656425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=pass
32932 22:27:08.686832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=pass>
32933 22:27:08.687188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=pass
32935 22:27:08.718205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=pass>
32936 22:27:08.718566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=pass
32938 22:27:08.748912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=pass>
32939 22:27:08.749267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=pass
32941 22:27:08.779483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest RESULT=pass
32943 22:27:08.779927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest RESULT=pass>
32944 22:27:08.810418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=pass>
32945 22:27:08.810773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=pass
32947 22:27:08.841265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=pass>
32948 22:27:08.841623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=pass
32950 22:27:08.872248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=pass>
32951 22:27:08.872602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=pass
32953 22:27:08.902917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=pass>
32954 22:27:08.903274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=pass
32956 22:27:08.933843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=pass>
32957 22:27:08.934202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=pass
32959 22:27:08.964376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=pass>
32960 22:27:08.964739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=pass
32962 22:27:09.033325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=pass>
32963 22:27:09.033684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=pass
32965 22:27:09.064560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=pass>
32966 22:27:09.064923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=pass
32968 22:27:09.094807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=pass>
32969 22:27:09.095163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=pass
32971 22:27:09.125020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=pass>
32972 22:27:09.125387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=pass
32974 22:27:09.155673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=pass
32976 22:27:09.156117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=pass>
32977 22:27:09.186674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=pass>
32978 22:27:09.187103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=pass
32980 22:27:09.218658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=pass>
32981 22:27:09.219089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=pass
32983 22:27:09.250077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=pass>
32984 22:27:09.250471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=pass
32986 22:27:09.280794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=pass>
32987 22:27:09.281261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=pass
32989 22:27:09.311540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=pass
32991 22:27:09.312076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=pass>
32992 22:27:09.342138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=pass>
32993 22:27:09.342546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=pass
32995 22:27:09.372853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=pass>
32996 22:27:09.373318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=pass
32998 22:27:09.403118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest RESULT=pass>
32999 22:27:09.403585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest RESULT=pass
33001 22:27:09.433639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass>
33002 22:27:09.434136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass
33004 22:27:09.463836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=pass>
33005 22:27:09.464190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=pass
33007 22:27:09.493433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass>
33008 22:27:09.493787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass
33010 22:27:09.523490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass
33012 22:27:09.523927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass>
33013 22:27:09.554762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass>
33014 22:27:09.555121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass
33016 22:27:09.584976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass>
33017 22:27:09.585338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass
33019 22:27:09.615072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass>
33020 22:27:09.615430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass
33022 22:27:09.645187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=pass>
33023 22:27:09.645549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=pass
33025 22:27:09.675766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass>
33026 22:27:09.676121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass
33028 22:27:09.706094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=pass>
33029 22:27:09.706455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=pass
33031 22:27:09.736678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass>
33032 22:27:09.737146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass
33034 22:27:09.767198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=pass
33036 22:27:09.767654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=pass>
33037 22:27:09.798011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass>
33038 22:27:09.798406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass
33040 22:27:09.829485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=pass
33042 22:27:09.830099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=pass>
33043 22:27:09.860407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass>
33044 22:27:09.860774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass
33046 22:27:09.890778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=pass
33048 22:27:09.891259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=pass>
33049 22:27:09.921505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass
33051 22:27:09.922137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass>
33052 22:27:09.952296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=pass>
33053 22:27:09.952749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=pass
33055 22:27:09.982951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass>
33056 22:27:09.983388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass
33058 22:27:10.014134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=pass>
33059 22:27:10.014573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=pass
33061 22:27:10.045963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass>
33062 22:27:10.046420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass
33064 22:27:10.077100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=pass
33066 22:27:10.077627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=pass>
33067 22:27:10.108251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass>
33068 22:27:10.108725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass
33070 22:27:10.139088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=pass>
33071 22:27:10.139532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=pass
33073 22:27:10.170226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass>
33074 22:27:10.170683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass
33076 22:27:10.201633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=pass
33078 22:27:10.202252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=pass>
33079 22:27:10.232530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass
33081 22:27:10.233075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass>
33082 22:27:10.264173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip>
33083 22:27:10.264634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip
33085 22:27:10.294914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap RESULT=pass
33087 22:27:10.295429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap RESULT=pass>
33088 22:27:10.326078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass>
33089 22:27:10.326507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass
33091 22:27:10.356493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass>
33092 22:27:10.356902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass
33094 22:27:10.387459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass
33096 22:27:10.388046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass>
33097 22:27:10.417596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass>
33098 22:27:10.418036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass
33100 22:27:10.448423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass
33102 22:27:10.448981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass>
33103 22:27:10.478451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass
33105 22:27:10.478861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass>
33106 22:27:10.508595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass>
33107 22:27:10.508917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass
33109 22:27:10.539916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace RESULT=pass>
33110 22:27:10.540272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace RESULT=pass
33112 22:27:10.570363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass>
33113 22:27:10.570717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass
33115 22:27:10.600450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256 RESULT=pass>
33116 22:27:10.600791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256 RESULT=pass
33118 22:27:10.630812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass
33120 22:27:10.631225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass>
33121 22:27:10.660974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM RESULT=pass>
33122 22:27:10.661316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM RESULT=pass
33124 22:27:10.691070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA RESULT=pass
33126 22:27:10.691507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA RESULT=pass>
33127 22:27:10.721187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass
33129 22:27:10.721635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass>
33130 22:27:10.751701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM RESULT=pass
33132 22:27:10.752186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM RESULT=pass>
33133 22:27:10.781757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA RESULT=pass
33135 22:27:10.782209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA RESULT=pass>
33136 22:27:10.813037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass
33138 22:27:10.813467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass>
33139 22:27:10.843887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM RESULT=pass>
33140 22:27:10.844228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM RESULT=pass
33142 22:27:10.874292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA RESULT=pass>
33143 22:27:10.874633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA RESULT=pass
33145 22:27:10.904490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass>
33146 22:27:10.904834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass
33148 22:27:10.934861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM RESULT=pass>
33149 22:27:10.935218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM RESULT=pass
33151 22:27:10.965277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA RESULT=pass>
33152 22:27:10.965617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA RESULT=pass
33154 22:27:10.995937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass>
33155 22:27:10.996271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass
33157 22:27:11.027147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM RESULT=pass>
33158 22:27:11.027484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM RESULT=pass
33160 22:27:11.057244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA RESULT=pass>
33161 22:27:11.057579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA RESULT=pass
33163 22:27:11.088279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240 RESULT=pass>
33164 22:27:11.088615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240 RESULT=pass
33166 22:27:11.118829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass>
33167 22:27:11.119180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass
33169 22:27:11.149385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM RESULT=pass>
33170 22:27:11.149861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM RESULT=pass
33172 22:27:11.180409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA RESULT=pass>
33173 22:27:11.180834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA RESULT=pass
33175 22:27:11.211016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass>
33176 22:27:11.211361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass
33178 22:27:11.241036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM RESULT=pass>
33179 22:27:11.241375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM RESULT=pass
33181 22:27:11.271521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA RESULT=pass
33183 22:27:11.272542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA RESULT=pass>
33184 22:27:11.303452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass
33186 22:27:11.303993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass>
33187 22:27:11.334110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM RESULT=pass>
33188 22:27:11.334561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM RESULT=pass
33190 22:27:11.364251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA RESULT=pass>
33191 22:27:11.364617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA RESULT=pass
33193 22:27:11.394678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass>
33194 22:27:11.395050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass
33196 22:27:11.424805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM RESULT=pass>
33197 22:27:11.425175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM RESULT=pass
33199 22:27:11.454676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA RESULT=pass>
33200 22:27:11.455023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA RESULT=pass
33202 22:27:11.484955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass>
33203 22:27:11.485293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass
33205 22:27:11.516140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM RESULT=pass>
33206 22:27:11.516475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM RESULT=pass
33208 22:27:11.546590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA RESULT=pass>
33209 22:27:11.546926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA RESULT=pass
33211 22:27:11.576285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224 RESULT=pass>
33212 22:27:11.576621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224 RESULT=pass
33214 22:27:11.606539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass>
33215 22:27:11.606885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass
33217 22:27:11.636582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM RESULT=pass>
33218 22:27:11.636916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM RESULT=pass
33220 22:27:11.666941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA RESULT=pass>
33221 22:27:11.667283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA RESULT=pass
33223 22:27:11.697253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass>
33224 22:27:11.697563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass
33226 22:27:11.727203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM RESULT=pass
33228 22:27:11.727623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM RESULT=pass>
33229 22:27:11.757340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA RESULT=pass>
33230 22:27:11.757684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA RESULT=pass
33232 22:27:11.788299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass>
33233 22:27:11.788639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass
33235 22:27:11.818755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM RESULT=pass>
33236 22:27:11.819069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM RESULT=pass
33238 22:27:11.848926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA RESULT=pass>
33239 22:27:11.849278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA RESULT=pass
33241 22:27:11.879016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass>
33242 22:27:11.879355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass
33244 22:27:11.908925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM RESULT=pass>
33245 22:27:11.909266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM RESULT=pass
33247 22:27:11.938829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA RESULT=pass>
33248 22:27:11.939166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA RESULT=pass
33250 22:27:11.968909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass>
33251 22:27:11.969244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass
33253 22:27:11.999795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM RESULT=pass>
33254 22:27:12.000134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM RESULT=pass
33256 22:27:12.029811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA RESULT=pass>
33257 22:27:12.030150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA RESULT=pass
33259 22:27:12.059822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208 RESULT=pass>
33260 22:27:12.060161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208 RESULT=pass
33262 22:27:12.089708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass>
33263 22:27:12.090085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass
33265 22:27:12.120347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM RESULT=pass>
33266 22:27:12.120827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM RESULT=pass
33268 22:27:12.151494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA RESULT=pass
33270 22:27:12.152059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA RESULT=pass>
33271 22:27:12.181857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass>
33272 22:27:12.182327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass
33274 22:27:12.212347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM RESULT=pass>
33275 22:27:12.212817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM RESULT=pass
33277 22:27:12.242651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA RESULT=pass
33279 22:27:12.243218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA RESULT=pass>
33280 22:27:12.273853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass
33282 22:27:12.274418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass>
33283 22:27:12.304802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM RESULT=pass>
33284 22:27:12.305267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM RESULT=pass
33286 22:27:12.335110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA RESULT=pass>
33287 22:27:12.335583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA RESULT=pass
33289 22:27:12.365412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass>
33290 22:27:12.365890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass
33292 22:27:12.395879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM RESULT=pass>
33293 22:27:12.396349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM RESULT=pass
33295 22:27:12.425840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA RESULT=pass>
33296 22:27:12.426321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA RESULT=pass
33298 22:27:12.456524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass>
33299 22:27:12.456992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass
33301 22:27:12.487861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM RESULT=pass>
33302 22:27:12.488330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM RESULT=pass
33304 22:27:12.518526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA RESULT=pass>
33305 22:27:12.519006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA RESULT=pass
33307 22:27:12.549392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192 RESULT=pass>
33308 22:27:12.549873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192 RESULT=pass
33310 22:27:12.580275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass>
33311 22:27:12.580727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass
33313 22:27:12.611067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM RESULT=pass
33315 22:27:12.611501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM RESULT=pass>
33316 22:27:12.641889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA RESULT=pass>
33317 22:27:12.642284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA RESULT=pass
33319 22:27:12.673327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass>
33320 22:27:12.673803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass
33322 22:27:12.704101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM RESULT=pass
33324 22:27:12.704522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM RESULT=pass>
33325 22:27:12.734531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA RESULT=pass
33327 22:27:12.734952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA RESULT=pass>
33328 22:27:12.765321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass>
33329 22:27:12.765605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass
33331 22:27:12.796321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM RESULT=pass
33333 22:27:12.796887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM RESULT=pass>
33334 22:27:12.827424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA RESULT=pass
33336 22:27:12.827985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA RESULT=pass>
33337 22:27:12.858249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass>
33338 22:27:12.858719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass
33340 22:27:12.888729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM RESULT=pass>
33341 22:27:12.889202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM RESULT=pass
33343 22:27:12.919029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA RESULT=pass>
33344 22:27:12.919465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA RESULT=pass
33346 22:27:12.949672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass
33348 22:27:12.950272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass>
33349 22:27:12.980885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM RESULT=pass>
33350 22:27:12.981337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM RESULT=pass
33352 22:27:13.011826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA RESULT=pass>
33353 22:27:13.012271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA RESULT=pass
33355 22:27:13.041971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176 RESULT=pass
33357 22:27:13.042567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176 RESULT=pass>
33358 22:27:13.072521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass>
33359 22:27:13.072974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass
33361 22:27:13.102596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM RESULT=pass>
33362 22:27:13.102943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM RESULT=pass
33364 22:27:13.133227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA RESULT=pass>
33365 22:27:13.133565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA RESULT=pass
33367 22:27:13.163805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass>
33368 22:27:13.164145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass
33370 22:27:13.193698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM RESULT=pass>
33371 22:27:13.194036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM RESULT=pass
33373 22:27:13.224053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA RESULT=pass>
33374 22:27:13.224405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA RESULT=pass
33376 22:27:13.254598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass>
33377 22:27:13.254951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass
33379 22:27:13.285129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM RESULT=pass>
33380 22:27:13.285489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM RESULT=pass
33382 22:27:13.315995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA RESULT=pass>
33383 22:27:13.316350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA RESULT=pass
33385 22:27:13.346233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass>
33386 22:27:13.346588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass
33388 22:27:13.376458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM RESULT=pass>
33389 22:27:13.376810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM RESULT=pass
33391 22:27:13.406548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA RESULT=pass>
33392 22:27:13.406899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA RESULT=pass
33394 22:27:13.436472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass>
33395 22:27:13.436825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass
33397 22:27:13.467392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM RESULT=pass
33399 22:27:13.467836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM RESULT=pass>
33400 22:27:13.497515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA RESULT=pass>
33401 22:27:13.497882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA RESULT=pass
33403 22:27:13.527706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160 RESULT=pass>
33404 22:27:13.528059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160 RESULT=pass
33406 22:27:13.557774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass>
33407 22:27:13.558129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass
33409 22:27:13.588297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM RESULT=pass>
33410 22:27:13.588649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM RESULT=pass
33412 22:27:13.618667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA RESULT=pass>
33413 22:27:13.619020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA RESULT=pass
33415 22:27:13.648916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass>
33416 22:27:13.649267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass
33418 22:27:13.679411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM RESULT=pass
33420 22:27:13.679854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM RESULT=pass>
33421 22:27:13.709758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA RESULT=pass>
33422 22:27:13.710110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA RESULT=pass
33424 22:27:13.740970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass>
33425 22:27:13.741326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass
33427 22:27:13.771057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM RESULT=pass>
33428 22:27:13.771414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM RESULT=pass
33430 22:27:13.801264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA RESULT=pass>
33431 22:27:13.801616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA RESULT=pass
33433 22:27:13.831689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass>
33434 22:27:13.832042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass
33436 22:27:13.864105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM RESULT=pass>
33437 22:27:13.864457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM RESULT=pass
33439 22:27:13.894594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA RESULT=pass>
33440 22:27:13.894945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA RESULT=pass
33442 22:27:13.924718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass>
33443 22:27:13.925071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass
33445 22:27:13.955374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM RESULT=pass
33447 22:27:13.955826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM RESULT=pass>
33448 22:27:13.985392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA RESULT=pass>
33449 22:27:13.985746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA RESULT=pass
33451 22:27:14.016256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144 RESULT=pass>
33452 22:27:14.016638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144 RESULT=pass
33454 22:27:14.046260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass>
33455 22:27:14.046614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass
33457 22:27:14.076371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM RESULT=pass>
33458 22:27:14.076725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM RESULT=pass
33460 22:27:14.134359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA RESULT=pass>
33461 22:27:14.134711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA RESULT=pass
33463 22:27:14.165353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass>
33464 22:27:14.165685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass
33466 22:27:14.198997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM RESULT=pass
33468 22:27:14.199561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM RESULT=pass>
33469 22:27:14.230607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA RESULT=pass>
33470 22:27:14.231070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA RESULT=pass
33472 22:27:14.261329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass>
33473 22:27:14.261785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass
33475 22:27:14.292204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM RESULT=pass>
33476 22:27:14.292652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM RESULT=pass
33478 22:27:14.322633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA RESULT=pass>
33479 22:27:14.323090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA RESULT=pass
33481 22:27:14.353475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass>
33482 22:27:14.353939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass
33484 22:27:14.384263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM RESULT=pass>
33485 22:27:14.384657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM RESULT=pass
33487 22:27:14.414522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA RESULT=pass>
33488 22:27:14.414990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA RESULT=pass
33490 22:27:14.445056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass>
33491 22:27:14.445452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass
33493 22:27:14.476107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM RESULT=pass>
33494 22:27:14.476462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM RESULT=pass
33496 22:27:14.506292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA RESULT=pass>
33497 22:27:14.506649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA RESULT=pass
33499 22:27:14.536457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128 RESULT=pass>
33500 22:27:14.536811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128 RESULT=pass
33502 22:27:14.566537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass>
33503 22:27:14.566896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass
33505 22:27:14.596391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM RESULT=pass>
33506 22:27:14.596744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM RESULT=pass
33508 22:27:14.626413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA RESULT=pass>
33509 22:27:14.626770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA RESULT=pass
33511 22:27:14.656651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass>
33512 22:27:14.657007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass
33514 22:27:14.687004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM RESULT=pass>
33515 22:27:14.687363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM RESULT=pass
33517 22:27:14.717753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA RESULT=pass>
33518 22:27:14.718107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA RESULT=pass
33520 22:27:14.748882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass>
33521 22:27:14.749237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass
33523 22:27:14.779638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM RESULT=pass>
33524 22:27:14.779995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM RESULT=pass
33526 22:27:14.809562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA RESULT=pass>
33527 22:27:14.809923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA RESULT=pass
33529 22:27:14.840467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass>
33530 22:27:14.840822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass
33532 22:27:14.870603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM RESULT=pass>
33533 22:27:14.870954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM RESULT=pass
33535 22:27:14.901177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA RESULT=pass>
33536 22:27:14.901528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA RESULT=pass
33538 22:27:14.931963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass>
33539 22:27:14.932319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass
33541 22:27:14.962377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM RESULT=pass>
33542 22:27:14.962737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM RESULT=pass
33544 22:27:14.992741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA RESULT=pass>
33545 22:27:14.993095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA RESULT=pass
33547 22:27:15.023018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112 RESULT=pass>
33548 22:27:15.023371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112 RESULT=pass
33550 22:27:15.053288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass>
33551 22:27:15.053643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass
33553 22:27:15.083864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM RESULT=pass>
33554 22:27:15.084221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM RESULT=pass
33556 22:27:15.114624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA RESULT=pass>
33557 22:27:15.114980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA RESULT=pass
33559 22:27:15.145025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass>
33560 22:27:15.145383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass
33562 22:27:15.175498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM RESULT=pass
33564 22:27:15.175953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM RESULT=pass>
33565 22:27:15.206902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA RESULT=pass>
33566 22:27:15.207350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA RESULT=pass
33568 22:27:15.237930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass
33570 22:27:15.238474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass>
33571 22:27:15.268845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM RESULT=pass>
33572 22:27:15.269279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM RESULT=pass
33574 22:27:15.299918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA RESULT=pass
33576 22:27:15.300503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA RESULT=pass>
33577 22:27:15.330465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass>
33578 22:27:15.330913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass
33580 22:27:15.361546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM RESULT=pass>
33581 22:27:15.362008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM RESULT=pass
33583 22:27:15.392473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA RESULT=pass>
33584 22:27:15.392925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA RESULT=pass
33586 22:27:15.423038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass>
33587 22:27:15.423482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass
33589 22:27:15.454980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM RESULT=pass>
33590 22:27:15.455437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM RESULT=pass
33592 22:27:15.485462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA RESULT=pass>
33593 22:27:15.485919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA RESULT=pass
33595 22:27:15.516257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96 RESULT=pass>
33596 22:27:15.516647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96 RESULT=pass
33598 22:27:15.546748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass>
33599 22:27:15.547106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass
33601 22:27:15.577328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM RESULT=pass>
33602 22:27:15.577682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM RESULT=pass
33604 22:27:15.608251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA RESULT=pass>
33605 22:27:15.608606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA RESULT=pass
33607 22:27:15.638770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass>
33608 22:27:15.639123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass
33610 22:27:15.669010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM RESULT=pass>
33611 22:27:15.669365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM RESULT=pass
33613 22:27:15.699486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA RESULT=pass
33615 22:27:15.699858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA RESULT=pass>
33616 22:27:15.732105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass>
33617 22:27:15.732467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass
33619 22:27:15.762759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM RESULT=pass>
33620 22:27:15.763167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM RESULT=pass
33622 22:27:15.793111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA RESULT=pass>
33623 22:27:15.793465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA RESULT=pass
33625 22:27:15.823263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass
33627 22:27:15.823715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass>
33628 22:27:15.854310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM RESULT=pass
33630 22:27:15.854746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM RESULT=pass>
33631 22:27:15.885189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA RESULT=pass>
33632 22:27:15.885550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA RESULT=pass
33634 22:27:15.916087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass>
33635 22:27:15.916445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass
33637 22:27:15.947826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM RESULT=pass>
33638 22:27:15.948188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM RESULT=pass
33640 22:27:15.978548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA RESULT=pass
33642 22:27:15.978991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA RESULT=pass>
33643 22:27:16.009021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80 RESULT=pass>
33644 22:27:16.009380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80 RESULT=pass
33646 22:27:16.039989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass>
33647 22:27:16.040349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass
33649 22:27:16.070888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM RESULT=pass>
33650 22:27:16.071248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM RESULT=pass
33652 22:27:16.102228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA RESULT=pass>
33653 22:27:16.102589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA RESULT=pass
33655 22:27:16.133152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass>
33656 22:27:16.133505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass
33658 22:27:16.164240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM RESULT=pass>
33659 22:27:16.164595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM RESULT=pass
33661 22:27:16.194884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA RESULT=pass>
33662 22:27:16.195245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA RESULT=pass
33664 22:27:16.225780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass>
33665 22:27:16.226141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass
33667 22:27:16.256751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM RESULT=pass
33669 22:27:16.257187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM RESULT=pass>
33670 22:27:16.288573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA RESULT=pass>
33671 22:27:16.288960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA RESULT=pass
33673 22:27:16.320454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass>
33674 22:27:16.320818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass
33676 22:27:16.351025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM RESULT=pass>
33677 22:27:16.351385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM RESULT=pass
33679 22:27:16.381796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA RESULT=pass>
33680 22:27:16.382159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA RESULT=pass
33682 22:27:16.412210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass>
33683 22:27:16.412572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass
33685 22:27:16.443746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM RESULT=pass>
33686 22:27:16.444106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM RESULT=pass
33688 22:27:16.474817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA RESULT=pass>
33689 22:27:16.475171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA RESULT=pass
33691 22:27:16.505164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64 RESULT=pass>
33692 22:27:16.505521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64 RESULT=pass
33694 22:27:16.536062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass>
33695 22:27:16.536423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass
33697 22:27:16.566802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM RESULT=pass
33699 22:27:16.567238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM RESULT=pass>
33700 22:27:16.597168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA RESULT=pass>
33701 22:27:16.597529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA RESULT=pass
33703 22:27:16.628023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass>
33704 22:27:16.628382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass
33706 22:27:16.657711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM RESULT=pass>
33707 22:27:16.658073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM RESULT=pass
33709 22:27:16.688490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA RESULT=pass>
33710 22:27:16.688852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA RESULT=pass
33712 22:27:16.720680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass>
33713 22:27:16.721069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass
33715 22:27:16.751004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM RESULT=pass>
33716 22:27:16.751366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM RESULT=pass
33718 22:27:16.780860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA RESULT=pass>
33719 22:27:16.781224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA RESULT=pass
33721 22:27:16.811390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass
33723 22:27:16.811873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass>
33724 22:27:16.841588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM RESULT=pass>
33725 22:27:16.841960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM RESULT=pass
33727 22:27:16.872672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA RESULT=pass>
33728 22:27:16.873037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA RESULT=pass
33730 22:27:16.904248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass>
33731 22:27:16.904618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass
33733 22:27:16.934973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM RESULT=pass>
33734 22:27:16.935337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM RESULT=pass
33736 22:27:16.964912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA RESULT=pass>
33737 22:27:16.965268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA RESULT=pass
33739 22:27:16.994988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48 RESULT=pass>
33740 22:27:16.995355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48 RESULT=pass
33742 22:27:17.025327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass>
33743 22:27:17.025692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass
33745 22:27:17.055848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM RESULT=pass>
33746 22:27:17.056210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM RESULT=pass
33748 22:27:17.086434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA RESULT=pass>
33749 22:27:17.086795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA RESULT=pass
33751 22:27:17.117153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass>
33752 22:27:17.117516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass
33754 22:27:17.148367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM RESULT=pass>
33755 22:27:17.148744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM RESULT=pass
33757 22:27:17.178796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA RESULT=pass>
33758 22:27:17.179151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA RESULT=pass
33760 22:27:17.210735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass>
33761 22:27:17.211224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass
33763 22:27:17.242969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM RESULT=pass
33765 22:27:17.243528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM RESULT=pass>
33766 22:27:17.273577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA RESULT=pass
33768 22:27:17.274108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA RESULT=pass>
33769 22:27:17.304248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass>
33770 22:27:17.304653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass
33772 22:27:17.334520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM RESULT=pass>
33773 22:27:17.334925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM RESULT=pass
33775 22:27:17.364922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA RESULT=pass>
33776 22:27:17.365391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA RESULT=pass
33778 22:27:17.395364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass
33780 22:27:17.395873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass>
33781 22:27:17.426620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM RESULT=pass>
33782 22:27:17.426984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM RESULT=pass
33784 22:27:17.456604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA RESULT=pass>
33785 22:27:17.456968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA RESULT=pass
33787 22:27:17.486472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32 RESULT=pass>
33788 22:27:17.486835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32 RESULT=pass
33790 22:27:17.516907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass>
33791 22:27:17.517280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass
33793 22:27:17.548712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM RESULT=pass>
33794 22:27:17.549086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM RESULT=pass
33796 22:27:17.580550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA RESULT=pass>
33797 22:27:17.580886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA RESULT=pass
33799 22:27:17.613695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass
33801 22:27:17.614111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass>
33802 22:27:17.646872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM RESULT=pass>
33803 22:27:17.647234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM RESULT=pass
33805 22:27:17.683999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA RESULT=pass
33807 22:27:17.684408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA RESULT=pass>
33808 22:27:17.717916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass
33810 22:27:17.718321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass>
33811 22:27:17.750880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM RESULT=pass>
33812 22:27:17.751311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM RESULT=pass
33814 22:27:17.782451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA RESULT=pass>
33815 22:27:17.782806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA RESULT=pass
33817 22:27:17.812789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass
33819 22:27:17.813229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass>
33820 22:27:17.843321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM RESULT=pass
33822 22:27:17.843740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM RESULT=pass>
33823 22:27:17.873873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA RESULT=pass>
33824 22:27:17.874215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA RESULT=pass
33826 22:27:17.904714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass>
33827 22:27:17.905060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass
33829 22:27:17.935951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM RESULT=pass>
33830 22:27:17.936293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM RESULT=pass
33832 22:27:17.966164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA RESULT=pass>
33833 22:27:17.966504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA RESULT=pass
33835 22:27:17.996336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16 RESULT=pass>
33836 22:27:17.996673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16 RESULT=pass
33838 22:27:18.026794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass
33840 22:27:18.027209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass>
33841 22:27:18.057510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM RESULT=pass>
33842 22:27:18.057883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM RESULT=pass
33844 22:27:18.088681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA RESULT=pass>
33845 22:27:18.089045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA RESULT=pass
33847 22:27:18.118748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass>
33848 22:27:18.119104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass
33850 22:27:18.149417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM RESULT=pass>
33851 22:27:18.149840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM RESULT=pass
33853 22:27:18.180163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA RESULT=pass>
33854 22:27:18.180551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA RESULT=pass
33856 22:27:18.210153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass>
33857 22:27:18.210508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass
33859 22:27:18.240219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM RESULT=pass>
33860 22:27:18.240576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM RESULT=pass
33862 22:27:18.270266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA RESULT=pass>
33863 22:27:18.270623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA RESULT=pass
33865 22:27:18.300347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass>
33866 22:27:18.300703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass
33868 22:27:18.330373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM RESULT=pass>
33869 22:27:18.330725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM RESULT=pass
33871 22:27:18.360796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA RESULT=pass>
33872 22:27:18.361148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA RESULT=pass
33874 22:27:18.390667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass>
33875 22:27:18.391025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass
33877 22:27:18.421684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM RESULT=pass>
33878 22:27:18.422039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM RESULT=pass
33880 22:27:18.452362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA RESULT=pass
33882 22:27:18.452804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA RESULT=pass>
33883 22:27:18.482695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass
33885 22:27:18.483128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass>
33886 22:27:18.513211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256 RESULT=pass
33888 22:27:18.513642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256 RESULT=pass>
33889 22:27:18.543717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass>
33890 22:27:18.544070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass
33892 22:27:18.574548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM RESULT=pass>
33893 22:27:18.574902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM RESULT=pass
33895 22:27:18.604875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA RESULT=pass>
33896 22:27:18.605230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA RESULT=pass
33898 22:27:18.636044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass>
33899 22:27:18.636402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass
33901 22:27:18.666077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM RESULT=pass>
33902 22:27:18.666447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM RESULT=pass
33904 22:27:18.697148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA RESULT=pass>
33905 22:27:18.697511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA RESULT=pass
33907 22:27:18.727459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass
33909 22:27:18.727901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass>
33910 22:27:18.757520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM RESULT=pass>
33911 22:27:18.757884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM RESULT=pass
33913 22:27:18.788322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA RESULT=pass>
33914 22:27:18.788680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA RESULT=pass
33916 22:27:18.818399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass>
33917 22:27:18.818758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass
33919 22:27:18.848348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM RESULT=pass>
33920 22:27:18.848705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM RESULT=pass
33922 22:27:18.879028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA RESULT=pass>
33923 22:27:18.879382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA RESULT=pass
33925 22:27:18.909921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass>
33926 22:27:18.910273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass
33928 22:27:18.940646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM RESULT=pass>
33929 22:27:18.941000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM RESULT=pass
33931 22:27:18.970648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA RESULT=pass>
33932 22:27:18.971004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA RESULT=pass
33934 22:27:19.001159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240 RESULT=pass
33936 22:27:19.001589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240 RESULT=pass>
33937 22:27:19.031452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass
33939 22:27:19.031886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass>
33940 22:27:19.062057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM RESULT=pass>
33941 22:27:19.062407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM RESULT=pass
33943 22:27:19.092802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA RESULT=pass>
33944 22:27:19.093166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA RESULT=pass
33946 22:27:19.123489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass
33948 22:27:19.123927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass>
33949 22:27:19.154207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM RESULT=pass
33951 22:27:19.154668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM RESULT=pass>
33952 22:27:19.185311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA RESULT=pass>
33953 22:27:19.185688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA RESULT=pass
33955 22:27:19.232632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass>
33956 22:27:19.233063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass
33958 22:27:19.270686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM RESULT=pass>
33959 22:27:19.271124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM RESULT=pass
33961 22:27:19.301903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA RESULT=pass>
33962 22:27:19.302324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA RESULT=pass
33964 22:27:19.332552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass>
33965 22:27:19.332963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass
33967 22:27:19.363388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM RESULT=pass
33969 22:27:19.363823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM RESULT=pass>
33970 22:27:19.394531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA RESULT=pass>
33971 22:27:19.394951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA RESULT=pass
33973 22:27:19.425804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass>
33974 22:27:19.426218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass
33976 22:27:19.456923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM RESULT=pass>
33977 22:27:19.457344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM RESULT=pass
33979 22:27:19.487896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA RESULT=pass>
33980 22:27:19.488303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA RESULT=pass
33982 22:27:19.518724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224 RESULT=pass>
33983 22:27:19.519146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224 RESULT=pass
33985 22:27:19.549711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass>
33986 22:27:19.550129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass
33988 22:27:19.580792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM RESULT=pass>
33989 22:27:19.581204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM RESULT=pass
33991 22:27:19.611506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA RESULT=pass
33993 22:27:19.611949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA RESULT=pass>
33994 22:27:19.642788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass>
33995 22:27:19.643213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass
33997 22:27:19.673473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM RESULT=pass>
33998 22:27:19.673882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM RESULT=pass
34000 22:27:19.708151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA RESULT=pass>
34001 22:27:19.708502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA RESULT=pass
34003 22:27:19.738389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass>
34004 22:27:19.738726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass
34006 22:27:19.768697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM RESULT=pass>
34007 22:27:19.769046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM RESULT=pass
34009 22:27:19.799012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA RESULT=pass>
34010 22:27:19.799354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA RESULT=pass
34012 22:27:19.829252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass>
34013 22:27:19.829587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass
34015 22:27:19.859720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM RESULT=pass>
34016 22:27:19.860059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM RESULT=pass
34018 22:27:19.889786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA RESULT=pass>
34019 22:27:19.890129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA RESULT=pass
34021 22:27:19.920915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass>
34022 22:27:19.921261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass
34024 22:27:19.950976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM RESULT=pass>
34025 22:27:19.951325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM RESULT=pass
34027 22:27:19.981050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA RESULT=pass
34029 22:27:19.981480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA RESULT=pass>
34030 22:27:20.012368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208 RESULT=pass>
34031 22:27:20.012836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208 RESULT=pass
34033 22:27:20.042242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass>
34034 22:27:20.042581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass
34036 22:27:20.072742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM RESULT=pass>
34037 22:27:20.073079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM RESULT=pass
34039 22:27:20.102750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA RESULT=pass>
34040 22:27:20.103087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA RESULT=pass
34042 22:27:20.132806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass>
34043 22:27:20.133143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass
34045 22:27:20.162452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM RESULT=pass>
34046 22:27:20.162790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM RESULT=pass
34048 22:27:20.192435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA RESULT=pass>
34049 22:27:20.192771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA RESULT=pass
34051 22:27:20.224373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass>
34052 22:27:20.224711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass
34054 22:27:20.254383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM RESULT=pass>
34055 22:27:20.254720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM RESULT=pass
34057 22:27:20.284402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA RESULT=pass
34059 22:27:20.284973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA RESULT=pass>
34060 22:27:20.315100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass>
34061 22:27:20.315573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass
34063 22:27:20.345106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM RESULT=pass>
34064 22:27:20.345587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM RESULT=pass
34066 22:27:20.376085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA RESULT=pass>
34067 22:27:20.376457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA RESULT=pass
34069 22:27:20.406390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass>
34070 22:27:20.406727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass
34072 22:27:20.436483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM RESULT=pass>
34073 22:27:20.436819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM RESULT=pass
34075 22:27:20.466454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA RESULT=pass
34077 22:27:20.466893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA RESULT=pass>
34078 22:27:20.496600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192 RESULT=pass>
34079 22:27:20.496936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192 RESULT=pass
34081 22:27:20.527737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass>
34082 22:27:20.528062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass
34084 22:27:20.557750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM RESULT=pass>
34085 22:27:20.558072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM RESULT=pass
34087 22:27:20.588171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA RESULT=pass>
34088 22:27:20.588492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA RESULT=pass
34090 22:27:20.618204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass>
34091 22:27:20.618544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass
34093 22:27:20.648501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM RESULT=pass>
34094 22:27:20.648824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM RESULT=pass
34096 22:27:20.679480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA RESULT=pass
34098 22:27:20.680009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA RESULT=pass>
34099 22:27:20.709943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass>
34100 22:27:20.710280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass
34102 22:27:20.740311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM RESULT=pass>
34103 22:27:20.740670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM RESULT=pass
34105 22:27:20.770523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA RESULT=pass>
34106 22:27:20.770872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA RESULT=pass
34108 22:27:20.800599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass>
34109 22:27:20.800912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass
34111 22:27:20.831143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM RESULT=pass>
34112 22:27:20.831479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM RESULT=pass
34114 22:27:20.861352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA RESULT=pass>
34115 22:27:20.861685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA RESULT=pass
34117 22:27:20.892425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass>
34118 22:27:20.892746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass
34120 22:27:20.922418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM RESULT=pass>
34121 22:27:20.922762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM RESULT=pass
34123 22:27:20.952492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA RESULT=pass>
34124 22:27:20.952841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA RESULT=pass
34126 22:27:20.982531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176 RESULT=pass>
34127 22:27:20.982879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176 RESULT=pass
34129 22:27:21.018271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass>
34130 22:27:21.018757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass
34132 22:27:21.050491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM RESULT=pass
34134 22:27:21.051062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM RESULT=pass>
34135 22:27:21.081471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA RESULT=pass>
34136 22:27:21.081869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA RESULT=pass
34138 22:27:21.112282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass>
34139 22:27:21.112627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass
34141 22:27:21.142781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM RESULT=pass>
34142 22:27:21.143122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM RESULT=pass
34144 22:27:21.173608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA RESULT=pass>
34145 22:27:21.174021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA RESULT=pass
34147 22:27:21.206458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass>
34148 22:27:21.206820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass
34150 22:27:21.238536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM RESULT=pass>
34151 22:27:21.239050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM RESULT=pass
34153 22:27:21.270518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA RESULT=pass>
34154 22:27:21.270991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA RESULT=pass
34156 22:27:21.301610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass>
34157 22:27:21.302040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass
34159 22:27:21.332524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM RESULT=pass
34161 22:27:21.333069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM RESULT=pass>
34162 22:27:21.363432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA RESULT=pass
34164 22:27:21.364001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA RESULT=pass>
34165 22:27:21.394735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass>
34166 22:27:21.395196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass
34168 22:27:21.425794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM RESULT=pass>
34169 22:27:21.426234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM RESULT=pass
34171 22:27:21.457477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA RESULT=pass>
34172 22:27:21.457952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA RESULT=pass
34174 22:27:21.489028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160 RESULT=pass>
34175 22:27:21.489481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160 RESULT=pass
34177 22:27:21.520353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass>
34178 22:27:21.520801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass
34180 22:27:21.551793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM RESULT=pass
34182 22:27:21.552362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM RESULT=pass>
34183 22:27:21.583137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA RESULT=pass>
34184 22:27:21.583539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA RESULT=pass
34186 22:27:21.614498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass>
34187 22:27:21.614965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass
34189 22:27:21.645340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM RESULT=pass>
34190 22:27:21.645800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM RESULT=pass
34192 22:27:21.677398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA RESULT=pass>
34193 22:27:21.677888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA RESULT=pass
34195 22:27:21.708911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass
34197 22:27:21.709404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass>
34198 22:27:21.739970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM RESULT=pass>
34199 22:27:21.740317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM RESULT=pass
34201 22:27:21.771050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA RESULT=pass>
34202 22:27:21.771406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA RESULT=pass
34204 22:27:21.801883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass>
34205 22:27:21.802242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass
34207 22:27:21.832568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM RESULT=pass>
34208 22:27:21.832986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM RESULT=pass
34210 22:27:21.865293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA RESULT=pass>
34211 22:27:21.865690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA RESULT=pass
34213 22:27:21.897775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass>
34214 22:27:21.898180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass
34216 22:27:21.928641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM RESULT=pass>
34217 22:27:21.929032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM RESULT=pass
34219 22:27:21.959751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA RESULT=pass>
34220 22:27:21.960147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA RESULT=pass
34222 22:27:21.990611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144 RESULT=pass>
34223 22:27:21.991012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144 RESULT=pass
34225 22:27:22.021721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass>
34226 22:27:22.022119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass
34228 22:27:22.053639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM RESULT=pass
34230 22:27:22.054215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM RESULT=pass>
34231 22:27:22.084436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA RESULT=pass
34233 22:27:22.084992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA RESULT=pass>
34234 22:27:22.115063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass>
34235 22:27:22.115525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass
34237 22:27:22.146611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM RESULT=pass>
34238 22:27:22.147051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM RESULT=pass
34240 22:27:22.177315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA RESULT=pass>
34241 22:27:22.177766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA RESULT=pass
34243 22:27:22.208542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass>
34244 22:27:22.208985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass
34246 22:27:22.240212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM RESULT=pass
34248 22:27:22.240745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM RESULT=pass>
34249 22:27:22.271565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA RESULT=pass
34251 22:27:22.272103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA RESULT=pass>
34252 22:27:22.302878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass>
34253 22:27:22.303294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass
34255 22:27:22.334222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM RESULT=pass>
34256 22:27:22.334621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM RESULT=pass
34258 22:27:22.365189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA RESULT=pass>
34259 22:27:22.365586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA RESULT=pass
34261 22:27:22.397214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass>
34262 22:27:22.397622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass
34264 22:27:22.428907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM RESULT=pass>
34265 22:27:22.429362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM RESULT=pass
34267 22:27:22.461630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA RESULT=pass
34269 22:27:22.462202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA RESULT=pass>
34270 22:27:22.492748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128 RESULT=pass
34272 22:27:22.493371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128 RESULT=pass>
34273 22:27:22.523901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass>
34274 22:27:22.524361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass
34276 22:27:22.557941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM RESULT=pass
34278 22:27:22.558493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM RESULT=pass>
34279 22:27:22.590169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA RESULT=pass>
34280 22:27:22.590602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA RESULT=pass
34282 22:27:22.622946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass>
34283 22:27:22.623395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass
34285 22:27:22.656178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM RESULT=pass>
34286 22:27:22.656605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM RESULT=pass
34288 22:27:22.689576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA RESULT=pass>
34289 22:27:22.690040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA RESULT=pass
34291 22:27:22.721092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass>
34292 22:27:22.721468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass
34294 22:27:22.752125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM RESULT=pass>
34295 22:27:22.752407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM RESULT=pass
34297 22:27:22.782608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA RESULT=pass>
34298 22:27:22.782953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA RESULT=pass
34300 22:27:22.813338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass>
34301 22:27:22.813684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass
34303 22:27:22.844186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM RESULT=pass
34305 22:27:22.844748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM RESULT=pass>
34306 22:27:22.874993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA RESULT=pass>
34307 22:27:22.875438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA RESULT=pass
34309 22:27:22.906609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass>
34310 22:27:22.907049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass
34312 22:27:22.937831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM RESULT=pass>
34313 22:27:22.938225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM RESULT=pass
34315 22:27:22.968785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA RESULT=pass>
34316 22:27:22.969184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA RESULT=pass
34318 22:27:22.999764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112 RESULT=pass>
34319 22:27:23.000162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112 RESULT=pass
34321 22:27:23.030795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass
34323 22:27:23.031246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass>
34324 22:27:23.062533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM RESULT=pass
34326 22:27:23.063145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM RESULT=pass>
34327 22:27:23.093643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA RESULT=pass>
34328 22:27:23.094117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA RESULT=pass
34330 22:27:23.125226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass>
34331 22:27:23.125705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass
34333 22:27:23.156218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM RESULT=pass>
34334 22:27:23.156689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM RESULT=pass
34336 22:27:23.187567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA RESULT=pass>
34337 22:27:23.188026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA RESULT=pass
34339 22:27:23.218831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass>
34340 22:27:23.219281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass
34342 22:27:23.249859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM RESULT=pass
34344 22:27:23.250417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM RESULT=pass>
34345 22:27:23.280607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA RESULT=pass
34347 22:27:23.281052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA RESULT=pass>
34348 22:27:23.312419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass>
34349 22:27:23.312870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass
34351 22:27:23.345031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM RESULT=pass>
34352 22:27:23.345466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM RESULT=pass
34354 22:27:23.376507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA RESULT=pass>
34355 22:27:23.376841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA RESULT=pass
34357 22:27:23.408057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass>
34358 22:27:23.408455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass
34360 22:27:23.439384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM RESULT=pass
34362 22:27:23.439825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM RESULT=pass>
34363 22:27:23.470398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA RESULT=pass
34365 22:27:23.470946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA RESULT=pass>
34366 22:27:23.500840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96 RESULT=pass>
34367 22:27:23.501281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96 RESULT=pass
34369 22:27:23.531794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass>
34370 22:27:23.532196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass
34372 22:27:23.563613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM RESULT=pass
34374 22:27:23.564397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM RESULT=pass>
34375 22:27:23.597511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA RESULT=pass>
34376 22:27:23.598083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA RESULT=pass
34378 22:27:23.630668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass>
34379 22:27:23.631047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass
34381 22:27:23.664254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM RESULT=pass>
34382 22:27:23.664596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM RESULT=pass
34384 22:27:23.698037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA RESULT=pass>
34385 22:27:23.698397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA RESULT=pass
34387 22:27:23.731754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass>
34388 22:27:23.732099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass
34390 22:27:23.762861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM RESULT=pass>
34391 22:27:23.763291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM RESULT=pass
34393 22:27:23.793962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA RESULT=pass>
34394 22:27:23.794370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA RESULT=pass
34396 22:27:23.824734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass
34398 22:27:23.825318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass>
34399 22:27:23.855951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM RESULT=pass
34401 22:27:23.856493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM RESULT=pass>
34402 22:27:23.886936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA RESULT=pass>
34403 22:27:23.887382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA RESULT=pass
34405 22:27:23.918514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass
34407 22:27:23.918951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass>
34408 22:27:23.950230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM RESULT=pass
34410 22:27:23.950812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM RESULT=pass>
34411 22:27:23.981312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA RESULT=pass
34413 22:27:23.981888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA RESULT=pass>
34414 22:27:24.012870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80 RESULT=pass
34416 22:27:24.013442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80 RESULT=pass>
34417 22:27:24.043941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass>
34418 22:27:24.044339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass
34420 22:27:24.076080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM RESULT=pass>
34421 22:27:24.076548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM RESULT=pass
34423 22:27:24.107059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA RESULT=pass
34425 22:27:24.107647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA RESULT=pass>
34426 22:27:24.138109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass>
34427 22:27:24.138504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass
34429 22:27:24.169030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM RESULT=pass>
34430 22:27:24.169483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM RESULT=pass
34432 22:27:24.200277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA RESULT=pass>
34433 22:27:24.200670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA RESULT=pass
34435 22:27:24.231681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass
34437 22:27:24.232111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass>
34438 22:27:24.263798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM RESULT=pass>
34439 22:27:24.264222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM RESULT=pass
34441 22:27:24.294847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA RESULT=pass>
34442 22:27:24.295261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA RESULT=pass
34444 22:27:24.325636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass>
34445 22:27:24.326119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass
34447 22:27:24.380077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM RESULT=pass>
34448 22:27:24.380432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM RESULT=pass
34450 22:27:24.410018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA RESULT=pass>
34451 22:27:24.410372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA RESULT=pass
34453 22:27:24.440760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass>
34454 22:27:24.441116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass
34456 22:27:24.471262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM RESULT=pass>
34457 22:27:24.471624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM RESULT=pass
34459 22:27:24.501548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA RESULT=pass>
34460 22:27:24.501912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA RESULT=pass
34462 22:27:24.531841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64 RESULT=pass>
34463 22:27:24.532305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64 RESULT=pass
34465 22:27:24.562500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass>
34466 22:27:24.562953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass
34468 22:27:24.593452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM RESULT=pass>
34469 22:27:24.593916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM RESULT=pass
34471 22:27:24.624149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA RESULT=pass>
34472 22:27:24.624563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA RESULT=pass
34474 22:27:24.654537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass>
34475 22:27:24.654931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass
34477 22:27:24.684735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM RESULT=pass>
34478 22:27:24.685089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM RESULT=pass
34480 22:27:24.716059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA RESULT=pass>
34481 22:27:24.716412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA RESULT=pass
34483 22:27:24.746599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass>
34484 22:27:24.746963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass
34486 22:27:24.776830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM RESULT=pass>
34487 22:27:24.777198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM RESULT=pass
34489 22:27:24.807364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA RESULT=pass
34491 22:27:24.807836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA RESULT=pass>
34492 22:27:24.837468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass>
34493 22:27:24.837821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass
34495 22:27:24.867783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM RESULT=pass
34497 22:27:24.868233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM RESULT=pass>
34498 22:27:24.898039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA RESULT=pass>
34499 22:27:24.898396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA RESULT=pass
34501 22:27:24.928982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass>
34502 22:27:24.929340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass
34504 22:27:24.959494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM RESULT=pass
34506 22:27:24.959953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM RESULT=pass>
34507 22:27:24.989628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA RESULT=pass>
34508 22:27:24.989998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA RESULT=pass
34510 22:27:25.020181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48 RESULT=pass
34512 22:27:25.020618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48 RESULT=pass>
34513 22:27:25.050145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass
34515 22:27:25.050581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass>
34516 22:27:25.080704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM RESULT=pass>
34517 22:27:25.081068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM RESULT=pass
34519 22:27:25.110959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA RESULT=pass>
34520 22:27:25.111314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA RESULT=pass
34522 22:27:25.141052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass>
34523 22:27:25.141392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass
34525 22:27:25.171116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM RESULT=pass
34527 22:27:25.171563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM RESULT=pass>
34528 22:27:25.201407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA RESULT=pass>
34529 22:27:25.201765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA RESULT=pass
34531 22:27:25.231676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass>
34532 22:27:25.232029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass
34534 22:27:25.261937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM RESULT=pass>
34535 22:27:25.262288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM RESULT=pass
34537 22:27:25.291979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA RESULT=pass>
34538 22:27:25.292335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA RESULT=pass
34540 22:27:25.322414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass
34542 22:27:25.322861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass>
34543 22:27:25.352984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM RESULT=pass>
34544 22:27:25.353326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM RESULT=pass
34546 22:27:25.383128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA RESULT=pass
34548 22:27:25.383573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA RESULT=pass>
34549 22:27:25.414492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass
34551 22:27:25.415035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass>
34552 22:27:25.444961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM RESULT=pass>
34553 22:27:25.445314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM RESULT=pass
34555 22:27:25.475499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA RESULT=pass
34557 22:27:25.475947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA RESULT=pass>
34558 22:27:25.505689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32 RESULT=pass
34560 22:27:25.506125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32 RESULT=pass>
34561 22:27:25.536325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass>
34562 22:27:25.536672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass
34564 22:27:25.566142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM RESULT=pass>
34565 22:27:25.566486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM RESULT=pass
34567 22:27:25.596261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA RESULT=pass>
34568 22:27:25.596605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA RESULT=pass
34570 22:27:25.626293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass>
34571 22:27:25.626635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass
34573 22:27:25.656410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM RESULT=pass>
34574 22:27:25.656761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM RESULT=pass
34576 22:27:25.686992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA RESULT=pass
34578 22:27:25.687409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA RESULT=pass>
34579 22:27:25.717235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass>
34580 22:27:25.717578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass
34582 22:27:25.747824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM RESULT=pass>
34583 22:27:25.748167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM RESULT=pass
34585 22:27:25.777685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA RESULT=pass>
34586 22:27:25.778044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA RESULT=pass
34588 22:27:25.807959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass>
34589 22:27:25.808304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass
34591 22:27:25.838135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM RESULT=pass>
34592 22:27:25.838480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM RESULT=pass
34594 22:27:25.868326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA RESULT=pass>
34595 22:27:25.868664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA RESULT=pass
34597 22:27:25.898758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass>
34598 22:27:25.899111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass
34600 22:27:25.929206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM RESULT=pass>
34601 22:27:25.929556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM RESULT=pass
34603 22:27:25.959514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA RESULT=pass
34605 22:27:25.959946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA RESULT=pass>
34606 22:27:25.989910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16 RESULT=pass>
34607 22:27:25.990266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16 RESULT=pass
34609 22:27:26.020167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass>
34610 22:27:26.020519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass
34612 22:27:26.051422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM RESULT=pass
34614 22:27:26.051862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM RESULT=pass>
34615 22:27:26.081407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA RESULT=pass>
34616 22:27:26.081759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA RESULT=pass
34618 22:27:26.112899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass>
34619 22:27:26.113333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass
34621 22:27:26.143606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM RESULT=pass>
34622 22:27:26.143950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM RESULT=pass
34624 22:27:26.174449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA RESULT=pass
34626 22:27:26.174940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA RESULT=pass>
34627 22:27:26.204894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass>
34628 22:27:26.205245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass
34630 22:27:26.235432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM RESULT=pass
34632 22:27:26.235922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM RESULT=pass>
34633 22:27:26.265578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA RESULT=pass>
34634 22:27:26.265936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA RESULT=pass
34636 22:27:26.296306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass>
34637 22:27:26.296623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass
34639 22:27:26.326816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM RESULT=pass>
34640 22:27:26.327305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM RESULT=pass
34642 22:27:26.357304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA RESULT=pass>
34643 22:27:26.357688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA RESULT=pass
34645 22:27:26.388140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass>
34646 22:27:26.388489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass
34648 22:27:26.418544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM RESULT=pass>
34649 22:27:26.418897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM RESULT=pass
34651 22:27:26.448697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA RESULT=pass>
34652 22:27:26.449058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA RESULT=pass
34654 22:27:26.478344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi RESULT=pass>
34655 22:27:26.478706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi RESULT=pass
34657 22:27:26.508896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_default_value RESULT=pass>
34658 22:27:26.509262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_default_value RESULT=pass
34660 22:27:26.538632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_read RESULT=pass
34662 22:27:26.539077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_read RESULT=pass>
34663 22:27:26.568594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_sleep_read RESULT=pass>
34664 22:27:26.568936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_sleep_read RESULT=pass
34666 22:27:26.598684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_fork_read RESULT=pass
34668 22:27:26.599117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_fork_read RESULT=pass>
34669 22:27:26.628458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_clone_read RESULT=pass>
34670 22:27:26.628796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_clone_read RESULT=pass
34672 22:27:26.659033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2 RESULT=pass
34674 22:27:26.659450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2 RESULT=pass>
34675 22:27:26.661710 + set +x
34676 22:27:26.661891 <LAVA_SIGNAL_ENDRUN 1_kselftest-arm64_qemu 559916_1.1.3.5>
34677 22:27:26.662206 Received signal: <ENDRUN> 1_kselftest-arm64_qemu 559916_1.1.3.5
34678 22:27:26.662342 Ending use of test pattern.
34679 22:27:26.662459 Ending test lava.1_kselftest-arm64_qemu (559916_1.1.3.5), duration 310.65
34681 22:27:26.664801 <LAVA_TEST_RUNNER EXIT>
34682 22:27:26.665138 ok: lava_test_shell seems to have completed
34683 22:27:26.749411 arm64_btitest: pass
arm64_btitest_bti_c_func_call_using_blr: pass
arm64_btitest_bti_c_func_call_using_br_x0: pass
arm64_btitest_bti_c_func_call_using_br_x16: pass
arm64_btitest_bti_j_func_call_using_blr: pass
arm64_btitest_bti_j_func_call_using_br_x0: pass
arm64_btitest_bti_j_func_call_using_br_x16: pass
arm64_btitest_bti_jc_func_call_using_blr: pass
arm64_btitest_bti_jc_func_call_using_br_x0: pass
arm64_btitest_bti_jc_func_call_using_br_x16: pass
arm64_btitest_bti_none_func_call_using_blr: pass
arm64_btitest_bti_none_func_call_using_br_x0: pass
arm64_btitest_bti_none_func_call_using_br_x16: pass
arm64_btitest_nohint_func_call_using_blr: pass
arm64_btitest_nohint_func_call_using_br_x0: pass
arm64_btitest_nohint_func_call_using_br_x16: pass
arm64_btitest_paciasp_func_call_using_blr: pass
arm64_btitest_paciasp_func_call_using_br_x0: pass
arm64_btitest_paciasp_func_call_using_br_x16: pass
arm64_check_buffer_fill: fail
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_child_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_gcr_el1_cswitch: fail
arm64_check_ksm_options: fail
arm64_check_mmap_options: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory: fail
arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_prctl: pass
arm64_check_prctl_ASYNC: pass
arm64_check_prctl_NONE: pass
arm64_check_prctl_SYNC: pass
arm64_check_prctl_SYNC_ASYNC: pass
arm64_check_prctl_check_basic_read: pass
arm64_check_tags_inclusion: fail
arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode: pass
arm64_check_user_mem: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_fake_sigreturn_bad_magic: pass
arm64_fake_sigreturn_bad_size: pass
arm64_fake_sigreturn_bad_size_for_magic0: pass
arm64_fake_sigreturn_duplicated_fpsimd: pass
arm64_fake_sigreturn_misaligned_sp: pass
arm64_fake_sigreturn_missing_fpsimd: pass
arm64_fake_sigreturn_sme_change_vl: pass
arm64_fake_sigreturn_sve_change_vl: pass
arm64_fp-stress: pass
arm64_fp-stress_FPSIMD-0-0: pass
arm64_fp-stress_SSVE-VL-128-0: pass
arm64_fp-stress_SSVE-VL-16-0: pass
arm64_fp-stress_SSVE-VL-256-0: pass
arm64_fp-stress_SSVE-VL-32-0: pass
arm64_fp-stress_SSVE-VL-64-0: pass
arm64_fp-stress_SVE-VL-112-0: pass
arm64_fp-stress_SVE-VL-128-0: pass
arm64_fp-stress_SVE-VL-144-0: pass
arm64_fp-stress_SVE-VL-16-0: pass
arm64_fp-stress_SVE-VL-160-0: pass
arm64_fp-stress_SVE-VL-176-0: pass
arm64_fp-stress_SVE-VL-192-0: pass
arm64_fp-stress_SVE-VL-208-0: pass
arm64_fp-stress_SVE-VL-224-0: pass
arm64_fp-stress_SVE-VL-240-0: pass
arm64_fp-stress_SVE-VL-256-0: pass
arm64_fp-stress_SVE-VL-32-0: pass
arm64_fp-stress_SVE-VL-48-0: pass
arm64_fp-stress_SVE-VL-64-0: pass
arm64_fp-stress_SVE-VL-80-0: pass
arm64_fp-stress_SVE-VL-96-0: pass
arm64_fp-stress_ZA-VL-128-0: pass
arm64_fp-stress_ZA-VL-16-0: pass
arm64_fp-stress_ZA-VL-256-0: pass
arm64_fp-stress_ZA-VL-32-0: pass
arm64_fp-stress_ZA-VL-64-0: pass
arm64_hwcap: pass
arm64_hwcap_cpuinfo_match_RNG: pass
arm64_hwcap_cpuinfo_match_SME: pass
arm64_hwcap_cpuinfo_match_SVE: pass
arm64_hwcap_cpuinfo_match_SVE2_BF16: pass
arm64_hwcap_cpuinfo_match_SVE2_BITPERM: pass
arm64_hwcap_cpuinfo_match_SVE2_EBF16: pass
arm64_hwcap_cpuinfo_match_SVE2_F32MM: pass
arm64_hwcap_cpuinfo_match_SVE2_F64MM: pass
arm64_hwcap_cpuinfo_match_SVE2_I8MM: pass
arm64_hwcap_cpuinfo_match_SVE2_PMULL: pass
arm64_hwcap_cpuinfo_match_SVE2_SHA3: pass
arm64_hwcap_cpuinfo_match_SVE2_SM4: pass
arm64_hwcap_cpuinfo_match_SVE_2: pass
arm64_hwcap_cpuinfo_match_SVE_AES: pass
arm64_hwcap_sigill_RNG: pass
arm64_hwcap_sigill_SME: pass
arm64_hwcap_sigill_SVE: pass
arm64_hwcap_sigill_SVE2_BF16: pass
arm64_hwcap_sigill_SVE2_BITPERM: pass
arm64_hwcap_sigill_SVE2_EBF16: skip
arm64_hwcap_sigill_SVE2_F32MM: pass
arm64_hwcap_sigill_SVE2_F64MM: pass
arm64_hwcap_sigill_SVE2_I8MM: pass
arm64_hwcap_sigill_SVE2_PMULL: pass
arm64_hwcap_sigill_SVE2_SHA3: pass
arm64_hwcap_sigill_SVE2_SM4: pass
arm64_hwcap_sigill_SVE_2: pass
arm64_hwcap_sigill_SVE_AES: pass
arm64_mangle_pstate_invalid_compat_toggle: pass
arm64_mangle_pstate_invalid_daif_bits: pass
arm64_mangle_pstate_invalid_mode_el1h: pass
arm64_mangle_pstate_invalid_mode_el1t: pass
arm64_mangle_pstate_invalid_mode_el2h: pass
arm64_mangle_pstate_invalid_mode_el2t: pass
arm64_mangle_pstate_invalid_mode_el3h: pass
arm64_mangle_pstate_invalid_mode_el3t: pass
arm64_nobtitest: pass
arm64_nobtitest_bti_c_func_call_using_blr: pass
arm64_nobtitest_bti_c_func_call_using_br_x0: pass
arm64_nobtitest_bti_c_func_call_using_br_x16: pass
arm64_nobtitest_bti_j_func_call_using_blr: pass
arm64_nobtitest_bti_j_func_call_using_br_x0: pass
arm64_nobtitest_bti_j_func_call_using_br_x16: pass
arm64_nobtitest_bti_jc_func_call_using_blr: pass
arm64_nobtitest_bti_jc_func_call_using_br_x0: pass
arm64_nobtitest_bti_jc_func_call_using_br_x16: pass
arm64_nobtitest_bti_none_func_call_using_blr: pass
arm64_nobtitest_bti_none_func_call_using_br_x0: pass
arm64_nobtitest_bti_none_func_call_using_br_x16: pass
arm64_nobtitest_nohint_func_call_using_blr: pass
arm64_nobtitest_nohint_func_call_using_br_x0: pass
arm64_nobtitest_nohint_func_call_using_br_x16: pass
arm64_nobtitest_paciasp_func_call_using_blr: pass
arm64_nobtitest_paciasp_func_call_using_br_x0: pass
arm64_nobtitest_paciasp_func_call_using_br_x16: pass
arm64_pac: pass
arm64_pac_global_context_switch_keep_keys: pass
arm64_pac_global_context_switch_keep_keys_generic: pass
arm64_pac_global_corrupt_pac: pass
arm64_pac_global_exec_changed_keys: pass
arm64_pac_global_pac_instructions_not_nop: pass
arm64_pac_global_pac_instructions_not_nop_generic: pass
arm64_pac_global_single_thread_different_keys: pass
arm64_ptrace: pass
arm64_ptrace_count_tpidrs: pass
arm64_ptrace_read_tpidr_one: pass
arm64_ptrace_tpidr2_read: pass
arm64_ptrace_tpidr2_write: pass
arm64_ptrace_verify_tpidr_one: pass
arm64_ptrace_write_tpidr_one: pass
arm64_ptrace_write_tpidr_only: pass
arm64_run_tags_test_sh: pass
arm64_sme_trap_no_sm: pass
arm64_sme_trap_non_streaming: skip
arm64_sme_trap_za: pass
arm64_sme_vl: pass
arm64_ssve_regs: pass
arm64_sve-probe-vls: pass
arm64_sve-probe-vls_All_vector_lengths_valid: pass
arm64_sve-probe-vls_Enumerated_16_vector_lengths: pass
arm64_sve-ptrace: pass
arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0: pass
arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared: pass
arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set: pass
arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state: pass
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992: skip
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_SVE_VL_1008: pass
arm64_sve-ptrace_Set_SVE_VL_1024: pass
arm64_sve-ptrace_Set_SVE_VL_1040: pass
arm64_sve-ptrace_Set_SVE_VL_1056: pass
arm64_sve-ptrace_Set_SVE_VL_1072: pass
arm64_sve-ptrace_Set_SVE_VL_1088: pass
arm64_sve-ptrace_Set_SVE_VL_1104: pass
arm64_sve-ptrace_Set_SVE_VL_112: pass
arm64_sve-ptrace_Set_SVE_VL_1120: pass
arm64_sve-ptrace_Set_SVE_VL_1136: pass
arm64_sve-ptrace_Set_SVE_VL_1152: pass
arm64_sve-ptrace_Set_SVE_VL_1168: pass
arm64_sve-ptrace_Set_SVE_VL_1184: pass
arm64_sve-ptrace_Set_SVE_VL_1200: pass
arm64_sve-ptrace_Set_SVE_VL_1216: pass
arm64_sve-ptrace_Set_SVE_VL_1232: pass
arm64_sve-ptrace_Set_SVE_VL_1248: pass
arm64_sve-ptrace_Set_SVE_VL_1264: pass
arm64_sve-ptrace_Set_SVE_VL_128: pass
arm64_sve-ptrace_Set_SVE_VL_1280: pass
arm64_sve-ptrace_Set_SVE_VL_1296: pass
arm64_sve-ptrace_Set_SVE_VL_1312: pass
arm64_sve-ptrace_Set_SVE_VL_1328: pass
arm64_sve-ptrace_Set_SVE_VL_1344: pass
arm64_sve-ptrace_Set_SVE_VL_1360: pass
arm64_sve-ptrace_Set_SVE_VL_1376: pass
arm64_sve-ptrace_Set_SVE_VL_1392: pass
arm64_sve-ptrace_Set_SVE_VL_1408: pass
arm64_sve-ptrace_Set_SVE_VL_1424: pass
arm64_sve-ptrace_Set_SVE_VL_144: pass
arm64_sve-ptrace_Set_SVE_VL_1440: pass
arm64_sve-ptrace_Set_SVE_VL_1456: pass
arm64_sve-ptrace_Set_SVE_VL_1472: pass
arm64_sve-ptrace_Set_SVE_VL_1488: pass
arm64_sve-ptrace_Set_SVE_VL_1504: pass
arm64_sve-ptrace_Set_SVE_VL_1520: pass
arm64_sve-ptrace_Set_SVE_VL_1536: pass
arm64_sve-ptrace_Set_SVE_VL_1552: pass
arm64_sve-ptrace_Set_SVE_VL_1568: pass
arm64_sve-ptrace_Set_SVE_VL_1584: pass
arm64_sve-ptrace_Set_SVE_VL_16: pass
arm64_sve-ptrace_Set_SVE_VL_160: pass
arm64_sve-ptrace_Set_SVE_VL_1600: pass
arm64_sve-ptrace_Set_SVE_VL_1616: pass
arm64_sve-ptrace_Set_SVE_VL_1632: pass
arm64_sve-ptrace_Set_SVE_VL_1648: pass
arm64_sve-ptrace_Set_SVE_VL_1664: pass
arm64_sve-ptrace_Set_SVE_VL_1680: pass
arm64_sve-ptrace_Set_SVE_VL_1696: pass
arm64_sve-ptrace_Set_SVE_VL_1712: pass
arm64_sve-ptrace_Set_SVE_VL_1728: pass
arm64_sve-ptrace_Set_SVE_VL_1744: pass
arm64_sve-ptrace_Set_SVE_VL_176: pass
arm64_sve-ptrace_Set_SVE_VL_1760: pass
arm64_sve-ptrace_Set_SVE_VL_1776: pass
arm64_sve-ptrace_Set_SVE_VL_1792: pass
arm64_sve-ptrace_Set_SVE_VL_1808: pass
arm64_sve-ptrace_Set_SVE_VL_1824: pass
arm64_sve-ptrace_Set_SVE_VL_1840: pass
arm64_sve-ptrace_Set_SVE_VL_1856: pass
arm64_sve-ptrace_Set_SVE_VL_1872: pass
arm64_sve-ptrace_Set_SVE_VL_1888: pass
arm64_sve-ptrace_Set_SVE_VL_1904: pass
arm64_sve-ptrace_Set_SVE_VL_192: pass
arm64_sve-ptrace_Set_SVE_VL_1920: pass
arm64_sve-ptrace_Set_SVE_VL_1936: pass
arm64_sve-ptrace_Set_SVE_VL_1952: pass
arm64_sve-ptrace_Set_SVE_VL_1968: pass
arm64_sve-ptrace_Set_SVE_VL_1984: pass
arm64_sve-ptrace_Set_SVE_VL_2000: pass
arm64_sve-ptrace_Set_SVE_VL_2016: pass
arm64_sve-ptrace_Set_SVE_VL_2032: pass
arm64_sve-ptrace_Set_SVE_VL_2048: pass
arm64_sve-ptrace_Set_SVE_VL_2064: pass
arm64_sve-ptrace_Set_SVE_VL_208: pass
arm64_sve-ptrace_Set_SVE_VL_2080: pass
arm64_sve-ptrace_Set_SVE_VL_2096: pass
arm64_sve-ptrace_Set_SVE_VL_2112: pass
arm64_sve-ptrace_Set_SVE_VL_2128: pass
arm64_sve-ptrace_Set_SVE_VL_2144: pass
arm64_sve-ptrace_Set_SVE_VL_2160: pass
arm64_sve-ptrace_Set_SVE_VL_2176: pass
arm64_sve-ptrace_Set_SVE_VL_2192: pass
arm64_sve-ptrace_Set_SVE_VL_2208: pass
arm64_sve-ptrace_Set_SVE_VL_2224: pass
arm64_sve-ptrace_Set_SVE_VL_224: pass
arm64_sve-ptrace_Set_SVE_VL_2240: pass
arm64_sve-ptrace_Set_SVE_VL_2256: pass
arm64_sve-ptrace_Set_SVE_VL_2272: pass
arm64_sve-ptrace_Set_SVE_VL_2288: pass
arm64_sve-ptrace_Set_SVE_VL_2304: pass
arm64_sve-ptrace_Set_SVE_VL_2320: pass
arm64_sve-ptrace_Set_SVE_VL_2336: pass
arm64_sve-ptrace_Set_SVE_VL_2352: pass
arm64_sve-ptrace_Set_SVE_VL_2368: pass
arm64_sve-ptrace_Set_SVE_VL_2384: pass
arm64_sve-ptrace_Set_SVE_VL_240: pass
arm64_sve-ptrace_Set_SVE_VL_2400: pass
arm64_sve-ptrace_Set_SVE_VL_2416: pass
arm64_sve-ptrace_Set_SVE_VL_2432: pass
arm64_sve-ptrace_Set_SVE_VL_2448: pass
arm64_sve-ptrace_Set_SVE_VL_2464: pass
arm64_sve-ptrace_Set_SVE_VL_2480: pass
arm64_sve-ptrace_Set_SVE_VL_2496: pass
arm64_sve-ptrace_Set_SVE_VL_2512: pass
arm64_sve-ptrace_Set_SVE_VL_2528: pass
arm64_sve-ptrace_Set_SVE_VL_2544: pass
arm64_sve-ptrace_Set_SVE_VL_256: pass
arm64_sve-ptrace_Set_SVE_VL_2560: pass
arm64_sve-ptrace_Set_SVE_VL_2576: pass
arm64_sve-ptrace_Set_SVE_VL_2592: pass
arm64_sve-ptrace_Set_SVE_VL_2608: pass
arm64_sve-ptrace_Set_SVE_VL_2624: pass
arm64_sve-ptrace_Set_SVE_VL_2640: pass
arm64_sve-ptrace_Set_SVE_VL_2656: pass
arm64_sve-ptrace_Set_SVE_VL_2672: pass
arm64_sve-ptrace_Set_SVE_VL_2688: pass
arm64_sve-ptrace_Set_SVE_VL_2704: pass
arm64_sve-ptrace_Set_SVE_VL_272: pass
arm64_sve-ptrace_Set_SVE_VL_2720: pass
arm64_sve-ptrace_Set_SVE_VL_2736: pass
arm64_sve-ptrace_Set_SVE_VL_2752: pass
arm64_sve-ptrace_Set_SVE_VL_2768: pass
arm64_sve-ptrace_Set_SVE_VL_2784: pass
arm64_sve-ptrace_Set_SVE_VL_2800: pass
arm64_sve-ptrace_Set_SVE_VL_2816: pass
arm64_sve-ptrace_Set_SVE_VL_2832: pass
arm64_sve-ptrace_Set_SVE_VL_2848: pass
arm64_sve-ptrace_Set_SVE_VL_2864: pass
arm64_sve-ptrace_Set_SVE_VL_288: pass
arm64_sve-ptrace_Set_SVE_VL_2880: pass
arm64_sve-ptrace_Set_SVE_VL_2896: pass
arm64_sve-ptrace_Set_SVE_VL_2912: pass
arm64_sve-ptrace_Set_SVE_VL_2928: pass
arm64_sve-ptrace_Set_SVE_VL_2944: pass
arm64_sve-ptrace_Set_SVE_VL_2960: pass
arm64_sve-ptrace_Set_SVE_VL_2976: pass
arm64_sve-ptrace_Set_SVE_VL_2992: pass
arm64_sve-ptrace_Set_SVE_VL_3008: pass
arm64_sve-ptrace_Set_SVE_VL_3024: pass
arm64_sve-ptrace_Set_SVE_VL_304: pass
arm64_sve-ptrace_Set_SVE_VL_3040: pass
arm64_sve-ptrace_Set_SVE_VL_3056: pass
arm64_sve-ptrace_Set_SVE_VL_3072: pass
arm64_sve-ptrace_Set_SVE_VL_3088: pass
arm64_sve-ptrace_Set_SVE_VL_3104: pass
arm64_sve-ptrace_Set_SVE_VL_3120: pass
arm64_sve-ptrace_Set_SVE_VL_3136: pass
arm64_sve-ptrace_Set_SVE_VL_3152: pass
arm64_sve-ptrace_Set_SVE_VL_3168: pass
arm64_sve-ptrace_Set_SVE_VL_3184: pass
arm64_sve-ptrace_Set_SVE_VL_32: pass
arm64_sve-ptrace_Set_SVE_VL_320: pass
arm64_sve-ptrace_Set_SVE_VL_3200: pass
arm64_sve-ptrace_Set_SVE_VL_3216: pass
arm64_sve-ptrace_Set_SVE_VL_3232: pass
arm64_sve-ptrace_Set_SVE_VL_3248: pass
arm64_sve-ptrace_Set_SVE_VL_3264: pass
arm64_sve-ptrace_Set_SVE_VL_3280: pass
arm64_sve-ptrace_Set_SVE_VL_3296: pass
arm64_sve-ptrace_Set_SVE_VL_3312: pass
arm64_sve-ptrace_Set_SVE_VL_3328: pass
arm64_sve-ptrace_Set_SVE_VL_3344: pass
arm64_sve-ptrace_Set_SVE_VL_336: pass
arm64_sve-ptrace_Set_SVE_VL_3360: pass
arm64_sve-ptrace_Set_SVE_VL_3376: pass
arm64_sve-ptrace_Set_SVE_VL_3392: pass
arm64_sve-ptrace_Set_SVE_VL_3408: pass
arm64_sve-ptrace_Set_SVE_VL_3424: pass
arm64_sve-ptrace_Set_SVE_VL_3440: pass
arm64_sve-ptrace_Set_SVE_VL_3456: pass
arm64_sve-ptrace_Set_SVE_VL_3472: pass
arm64_sve-ptrace_Set_SVE_VL_3488: pass
arm64_sve-ptrace_Set_SVE_VL_3504: pass
arm64_sve-ptrace_Set_SVE_VL_352: pass
arm64_sve-ptrace_Set_SVE_VL_3520: pass
arm64_sve-ptrace_Set_SVE_VL_3536: pass
arm64_sve-ptrace_Set_SVE_VL_3552: pass
arm64_sve-ptrace_Set_SVE_VL_3568: pass
arm64_sve-ptrace_Set_SVE_VL_3584: pass
arm64_sve-ptrace_Set_SVE_VL_3600: pass
arm64_sve-ptrace_Set_SVE_VL_3616: pass
arm64_sve-ptrace_Set_SVE_VL_3632: pass
arm64_sve-ptrace_Set_SVE_VL_3648: pass
arm64_sve-ptrace_Set_SVE_VL_3664: pass
arm64_sve-ptrace_Set_SVE_VL_368: pass
arm64_sve-ptrace_Set_SVE_VL_3680: pass
arm64_sve-ptrace_Set_SVE_VL_3696: pass
arm64_sve-ptrace_Set_SVE_VL_3712: pass
arm64_sve-ptrace_Set_SVE_VL_3728: pass
arm64_sve-ptrace_Set_SVE_VL_3744: pass
arm64_sve-ptrace_Set_SVE_VL_3760: pass
arm64_sve-ptrace_Set_SVE_VL_3776: pass
arm64_sve-ptrace_Set_SVE_VL_3792: pass
arm64_sve-ptrace_Set_SVE_VL_3808: pass
arm64_sve-ptrace_Set_SVE_VL_3824: pass
arm64_sve-ptrace_Set_SVE_VL_384: pass
arm64_sve-ptrace_Set_SVE_VL_3840: pass
arm64_sve-ptrace_Set_SVE_VL_3856: pass
arm64_sve-ptrace_Set_SVE_VL_3872: pass
arm64_sve-ptrace_Set_SVE_VL_3888: pass
arm64_sve-ptrace_Set_SVE_VL_3904: pass
arm64_sve-ptrace_Set_SVE_VL_3920: pass
arm64_sve-ptrace_Set_SVE_VL_3936: pass
arm64_sve-ptrace_Set_SVE_VL_3952: pass
arm64_sve-ptrace_Set_SVE_VL_3968: pass
arm64_sve-ptrace_Set_SVE_VL_3984: pass
arm64_sve-ptrace_Set_SVE_VL_400: pass
arm64_sve-ptrace_Set_SVE_VL_4000: pass
arm64_sve-ptrace_Set_SVE_VL_4016: pass
arm64_sve-ptrace_Set_SVE_VL_4032: pass
arm64_sve-ptrace_Set_SVE_VL_4048: pass
arm64_sve-ptrace_Set_SVE_VL_4064: pass
arm64_sve-ptrace_Set_SVE_VL_4080: pass
arm64_sve-ptrace_Set_SVE_VL_4096: pass
arm64_sve-ptrace_Set_SVE_VL_4112: pass
arm64_sve-ptrace_Set_SVE_VL_4128: pass
arm64_sve-ptrace_Set_SVE_VL_4144: pass
arm64_sve-ptrace_Set_SVE_VL_416: pass
arm64_sve-ptrace_Set_SVE_VL_4160: pass
arm64_sve-ptrace_Set_SVE_VL_4176: pass
arm64_sve-ptrace_Set_SVE_VL_4192: pass
arm64_sve-ptrace_Set_SVE_VL_4208: pass
arm64_sve-ptrace_Set_SVE_VL_4224: pass
arm64_sve-ptrace_Set_SVE_VL_4240: pass
arm64_sve-ptrace_Set_SVE_VL_4256: pass
arm64_sve-ptrace_Set_SVE_VL_4272: pass
arm64_sve-ptrace_Set_SVE_VL_4288: pass
arm64_sve-ptrace_Set_SVE_VL_4304: pass
arm64_sve-ptrace_Set_SVE_VL_432: pass
arm64_sve-ptrace_Set_SVE_VL_4320: pass
arm64_sve-ptrace_Set_SVE_VL_4336: pass
arm64_sve-ptrace_Set_SVE_VL_4352: pass
arm64_sve-ptrace_Set_SVE_VL_4368: pass
arm64_sve-ptrace_Set_SVE_VL_4384: pass
arm64_sve-ptrace_Set_SVE_VL_4400: pass
arm64_sve-ptrace_Set_SVE_VL_4416: pass
arm64_sve-ptrace_Set_SVE_VL_4432: pass
arm64_sve-ptrace_Set_SVE_VL_4448: pass
arm64_sve-ptrace_Set_SVE_VL_4464: pass
arm64_sve-ptrace_Set_SVE_VL_448: pass
arm64_sve-ptrace_Set_SVE_VL_4480: pass
arm64_sve-ptrace_Set_SVE_VL_4496: pass
arm64_sve-ptrace_Set_SVE_VL_4512: pass
arm64_sve-ptrace_Set_SVE_VL_4528: pass
arm64_sve-ptrace_Set_SVE_VL_4544: pass
arm64_sve-ptrace_Set_SVE_VL_4560: pass
arm64_sve-ptrace_Set_SVE_VL_4576: pass
arm64_sve-ptrace_Set_SVE_VL_4592: pass
arm64_sve-ptrace_Set_SVE_VL_4608: pass
arm64_sve-ptrace_Set_SVE_VL_4624: pass
arm64_sve-ptrace_Set_SVE_VL_464: pass
arm64_sve-ptrace_Set_SVE_VL_4640: pass
arm64_sve-ptrace_Set_SVE_VL_4656: pass
arm64_sve-ptrace_Set_SVE_VL_4672: pass
arm64_sve-ptrace_Set_SVE_VL_4688: pass
arm64_sve-ptrace_Set_SVE_VL_4704: pass
arm64_sve-ptrace_Set_SVE_VL_4720: pass
arm64_sve-ptrace_Set_SVE_VL_4736: pass
arm64_sve-ptrace_Set_SVE_VL_4752: pass
arm64_sve-ptrace_Set_SVE_VL_4768: pass
arm64_sve-ptrace_Set_SVE_VL_4784: pass
arm64_sve-ptrace_Set_SVE_VL_48: pass
arm64_sve-ptrace_Set_SVE_VL_480: pass
arm64_sve-ptrace_Set_SVE_VL_4800: pass
arm64_sve-ptrace_Set_SVE_VL_4816: pass
arm64_sve-ptrace_Set_SVE_VL_4832: pass
arm64_sve-ptrace_Set_SVE_VL_4848: pass
arm64_sve-ptrace_Set_SVE_VL_4864: pass
arm64_sve-ptrace_Set_SVE_VL_4880: pass
arm64_sve-ptrace_Set_SVE_VL_4896: pass
arm64_sve-ptrace_Set_SVE_VL_4912: pass
arm64_sve-ptrace_Set_SVE_VL_4928: pass
arm64_sve-ptrace_Set_SVE_VL_4944: pass
arm64_sve-ptrace_Set_SVE_VL_496: pass
arm64_sve-ptrace_Set_SVE_VL_4960: pass
arm64_sve-ptrace_Set_SVE_VL_4976: pass
arm64_sve-ptrace_Set_SVE_VL_4992: pass
arm64_sve-ptrace_Set_SVE_VL_5008: pass
arm64_sve-ptrace_Set_SVE_VL_5024: pass
arm64_sve-ptrace_Set_SVE_VL_5040: pass
arm64_sve-ptrace_Set_SVE_VL_5056: pass
arm64_sve-ptrace_Set_SVE_VL_5072: pass
arm64_sve-ptrace_Set_SVE_VL_5088: pass
arm64_sve-ptrace_Set_SVE_VL_5104: pass
arm64_sve-ptrace_Set_SVE_VL_512: pass
arm64_sve-ptrace_Set_SVE_VL_5120: pass
arm64_sve-ptrace_Set_SVE_VL_5136: pass
arm64_sve-ptrace_Set_SVE_VL_5152: pass
arm64_sve-ptrace_Set_SVE_VL_5168: pass
arm64_sve-ptrace_Set_SVE_VL_5184: pass
arm64_sve-ptrace_Set_SVE_VL_5200: pass
arm64_sve-ptrace_Set_SVE_VL_5216: pass
arm64_sve-ptrace_Set_SVE_VL_5232: pass
arm64_sve-ptrace_Set_SVE_VL_5248: pass
arm64_sve-ptrace_Set_SVE_VL_5264: pass
arm64_sve-ptrace_Set_SVE_VL_528: pass
arm64_sve-ptrace_Set_SVE_VL_5280: pass
arm64_sve-ptrace_Set_SVE_VL_5296: pass
arm64_sve-ptrace_Set_SVE_VL_5312: pass
arm64_sve-ptrace_Set_SVE_VL_5328: pass
arm64_sve-ptrace_Set_SVE_VL_5344: pass
arm64_sve-ptrace_Set_SVE_VL_5360: pass
arm64_sve-ptrace_Set_SVE_VL_5376: pass
arm64_sve-ptrace_Set_SVE_VL_5392: pass
arm64_sve-ptrace_Set_SVE_VL_5408: pass
arm64_sve-ptrace_Set_SVE_VL_5424: pass
arm64_sve-ptrace_Set_SVE_VL_544: pass
arm64_sve-ptrace_Set_SVE_VL_5440: pass
arm64_sve-ptrace_Set_SVE_VL_5456: pass
arm64_sve-ptrace_Set_SVE_VL_5472: pass
arm64_sve-ptrace_Set_SVE_VL_5488: pass
arm64_sve-ptrace_Set_SVE_VL_5504: pass
arm64_sve-ptrace_Set_SVE_VL_5520: pass
arm64_sve-ptrace_Set_SVE_VL_5536: pass
arm64_sve-ptrace_Set_SVE_VL_5552: pass
arm64_sve-ptrace_Set_SVE_VL_5568: pass
arm64_sve-ptrace_Set_SVE_VL_5584: pass
arm64_sve-ptrace_Set_SVE_VL_560: pass
arm64_sve-ptrace_Set_SVE_VL_5600: pass
arm64_sve-ptrace_Set_SVE_VL_5616: pass
arm64_sve-ptrace_Set_SVE_VL_5632: pass
arm64_sve-ptrace_Set_SVE_VL_5648: pass
arm64_sve-ptrace_Set_SVE_VL_5664: pass
arm64_sve-ptrace_Set_SVE_VL_5680: pass
arm64_sve-ptrace_Set_SVE_VL_5696: pass
arm64_sve-ptrace_Set_SVE_VL_5712: pass
arm64_sve-ptrace_Set_SVE_VL_5728: pass
arm64_sve-ptrace_Set_SVE_VL_5744: pass
arm64_sve-ptrace_Set_SVE_VL_576: pass
arm64_sve-ptrace_Set_SVE_VL_5760: pass
arm64_sve-ptrace_Set_SVE_VL_5776: pass
arm64_sve-ptrace_Set_SVE_VL_5792: pass
arm64_sve-ptrace_Set_SVE_VL_5808: pass
arm64_sve-ptrace_Set_SVE_VL_5824: pass
arm64_sve-ptrace_Set_SVE_VL_5840: pass
arm64_sve-ptrace_Set_SVE_VL_5856: pass
arm64_sve-ptrace_Set_SVE_VL_5872: pass
arm64_sve-ptrace_Set_SVE_VL_5888: pass
arm64_sve-ptrace_Set_SVE_VL_5904: pass
arm64_sve-ptrace_Set_SVE_VL_592: pass
arm64_sve-ptrace_Set_SVE_VL_5920: pass
arm64_sve-ptrace_Set_SVE_VL_5936: pass
arm64_sve-ptrace_Set_SVE_VL_5952: pass
arm64_sve-ptrace_Set_SVE_VL_5968: pass
arm64_sve-ptrace_Set_SVE_VL_5984: pass
arm64_sve-ptrace_Set_SVE_VL_6000: pass
arm64_sve-ptrace_Set_SVE_VL_6016: pass
arm64_sve-ptrace_Set_SVE_VL_6032: pass
arm64_sve-ptrace_Set_SVE_VL_6048: pass
arm64_sve-ptrace_Set_SVE_VL_6064: pass
arm64_sve-ptrace_Set_SVE_VL_608: pass
arm64_sve-ptrace_Set_SVE_VL_6080: pass
arm64_sve-ptrace_Set_SVE_VL_6096: pass
arm64_sve-ptrace_Set_SVE_VL_6112: pass
arm64_sve-ptrace_Set_SVE_VL_6128: pass
arm64_sve-ptrace_Set_SVE_VL_6144: pass
arm64_sve-ptrace_Set_SVE_VL_6160: pass
arm64_sve-ptrace_Set_SVE_VL_6176: pass
arm64_sve-ptrace_Set_SVE_VL_6192: pass
arm64_sve-ptrace_Set_SVE_VL_6208: pass
arm64_sve-ptrace_Set_SVE_VL_6224: pass
arm64_sve-ptrace_Set_SVE_VL_624: pass
arm64_sve-ptrace_Set_SVE_VL_6240: pass
arm64_sve-ptrace_Set_SVE_VL_6256: pass
arm64_sve-ptrace_Set_SVE_VL_6272: pass
arm64_sve-ptrace_Set_SVE_VL_6288: pass
arm64_sve-ptrace_Set_SVE_VL_6304: pass
arm64_sve-ptrace_Set_SVE_VL_6320: pass
arm64_sve-ptrace_Set_SVE_VL_6336: pass
arm64_sve-ptrace_Set_SVE_VL_6352: pass
arm64_sve-ptrace_Set_SVE_VL_6368: pass
arm64_sve-ptrace_Set_SVE_VL_6384: pass
arm64_sve-ptrace_Set_SVE_VL_64: pass
arm64_sve-ptrace_Set_SVE_VL_640: pass
arm64_sve-ptrace_Set_SVE_VL_6400: pass
arm64_sve-ptrace_Set_SVE_VL_6416: pass
arm64_sve-ptrace_Set_SVE_VL_6432: pass
arm64_sve-ptrace_Set_SVE_VL_6448: pass
arm64_sve-ptrace_Set_SVE_VL_6464: pass
arm64_sve-ptrace_Set_SVE_VL_6480: pass
arm64_sve-ptrace_Set_SVE_VL_6496: pass
arm64_sve-ptrace_Set_SVE_VL_6512: pass
arm64_sve-ptrace_Set_SVE_VL_6528: pass
arm64_sve-ptrace_Set_SVE_VL_6544: pass
arm64_sve-ptrace_Set_SVE_VL_656: pass
arm64_sve-ptrace_Set_SVE_VL_6560: pass
arm64_sve-ptrace_Set_SVE_VL_6576: pass
arm64_sve-ptrace_Set_SVE_VL_6592: pass
arm64_sve-ptrace_Set_SVE_VL_6608: pass
arm64_sve-ptrace_Set_SVE_VL_6624: pass
arm64_sve-ptrace_Set_SVE_VL_6640: pass
arm64_sve-ptrace_Set_SVE_VL_6656: pass
arm64_sve-ptrace_Set_SVE_VL_6672: pass
arm64_sve-ptrace_Set_SVE_VL_6688: pass
arm64_sve-ptrace_Set_SVE_VL_6704: pass
arm64_sve-ptrace_Set_SVE_VL_672: pass
arm64_sve-ptrace_Set_SVE_VL_6720: pass
arm64_sve-ptrace_Set_SVE_VL_6736: pass
arm64_sve-ptrace_Set_SVE_VL_6752: pass
arm64_sve-ptrace_Set_SVE_VL_6768: pass
arm64_sve-ptrace_Set_SVE_VL_6784: pass
arm64_sve-ptrace_Set_SVE_VL_6800: pass
arm64_sve-ptrace_Set_SVE_VL_6816: pass
arm64_sve-ptrace_Set_SVE_VL_6832: pass
arm64_sve-ptrace_Set_SVE_VL_6848: pass
arm64_sve-ptrace_Set_SVE_VL_6864: pass
arm64_sve-ptrace_Set_SVE_VL_688: pass
arm64_sve-ptrace_Set_SVE_VL_6880: pass
arm64_sve-ptrace_Set_SVE_VL_6896: pass
arm64_sve-ptrace_Set_SVE_VL_6912: pass
arm64_sve-ptrace_Set_SVE_VL_6928: pass
arm64_sve-ptrace_Set_SVE_VL_6944: pass
arm64_sve-ptrace_Set_SVE_VL_6960: pass
arm64_sve-ptrace_Set_SVE_VL_6976: pass
arm64_sve-ptrace_Set_SVE_VL_6992: pass
arm64_sve-ptrace_Set_SVE_VL_7008: pass
arm64_sve-ptrace_Set_SVE_VL_7024: pass
arm64_sve-ptrace_Set_SVE_VL_704: pass
arm64_sve-ptrace_Set_SVE_VL_7040: pass
arm64_sve-ptrace_Set_SVE_VL_7056: pass
arm64_sve-ptrace_Set_SVE_VL_7072: pass
arm64_sve-ptrace_Set_SVE_VL_7088: pass
arm64_sve-ptrace_Set_SVE_VL_7104: pass
arm64_sve-ptrace_Set_SVE_VL_7120: pass
arm64_sve-ptrace_Set_SVE_VL_7136: pass
arm64_sve-ptrace_Set_SVE_VL_7152: pass
arm64_sve-ptrace_Set_SVE_VL_7168: pass
arm64_sve-ptrace_Set_SVE_VL_7184: pass
arm64_sve-ptrace_Set_SVE_VL_720: pass
arm64_sve-ptrace_Set_SVE_VL_7200: pass
arm64_sve-ptrace_Set_SVE_VL_7216: pass
arm64_sve-ptrace_Set_SVE_VL_7232: pass
arm64_sve-ptrace_Set_SVE_VL_7248: pass
arm64_sve-ptrace_Set_SVE_VL_7264: pass
arm64_sve-ptrace_Set_SVE_VL_7280: pass
arm64_sve-ptrace_Set_SVE_VL_7296: pass
arm64_sve-ptrace_Set_SVE_VL_7312: pass
arm64_sve-ptrace_Set_SVE_VL_7328: pass
arm64_sve-ptrace_Set_SVE_VL_7344: pass
arm64_sve-ptrace_Set_SVE_VL_736: pass
arm64_sve-ptrace_Set_SVE_VL_7360: pass
arm64_sve-ptrace_Set_SVE_VL_7376: pass
arm64_sve-ptrace_Set_SVE_VL_7392: pass
arm64_sve-ptrace_Set_SVE_VL_7408: pass
arm64_sve-ptrace_Set_SVE_VL_7424: pass
arm64_sve-ptrace_Set_SVE_VL_7440: pass
arm64_sve-ptrace_Set_SVE_VL_7456: pass
arm64_sve-ptrace_Set_SVE_VL_7472: pass
arm64_sve-ptrace_Set_SVE_VL_7488: pass
arm64_sve-ptrace_Set_SVE_VL_7504: pass
arm64_sve-ptrace_Set_SVE_VL_752: pass
arm64_sve-ptrace_Set_SVE_VL_7520: pass
arm64_sve-ptrace_Set_SVE_VL_7536: pass
arm64_sve-ptrace_Set_SVE_VL_7552: pass
arm64_sve-ptrace_Set_SVE_VL_7568: pass
arm64_sve-ptrace_Set_SVE_VL_7584: pass
arm64_sve-ptrace_Set_SVE_VL_7600: pass
arm64_sve-ptrace_Set_SVE_VL_7616: pass
arm64_sve-ptrace_Set_SVE_VL_7632: pass
arm64_sve-ptrace_Set_SVE_VL_7648: pass
arm64_sve-ptrace_Set_SVE_VL_7664: pass
arm64_sve-ptrace_Set_SVE_VL_768: pass
arm64_sve-ptrace_Set_SVE_VL_7680: pass
arm64_sve-ptrace_Set_SVE_VL_7696: pass
arm64_sve-ptrace_Set_SVE_VL_7712: pass
arm64_sve-ptrace_Set_SVE_VL_7728: pass
arm64_sve-ptrace_Set_SVE_VL_7744: pass
arm64_sve-ptrace_Set_SVE_VL_7760: pass
arm64_sve-ptrace_Set_SVE_VL_7776: pass
arm64_sve-ptrace_Set_SVE_VL_7792: pass
arm64_sve-ptrace_Set_SVE_VL_7808: pass
arm64_sve-ptrace_Set_SVE_VL_7824: pass
arm64_sve-ptrace_Set_SVE_VL_784: pass
arm64_sve-ptrace_Set_SVE_VL_7840: pass
arm64_sve-ptrace_Set_SVE_VL_7856: pass
arm64_sve-ptrace_Set_SVE_VL_7872: pass
arm64_sve-ptrace_Set_SVE_VL_7888: pass
arm64_sve-ptrace_Set_SVE_VL_7904: pass
arm64_sve-ptrace_Set_SVE_VL_7920: pass
arm64_sve-ptrace_Set_SVE_VL_7936: pass
arm64_sve-ptrace_Set_SVE_VL_7952: pass
arm64_sve-ptrace_Set_SVE_VL_7968: pass
arm64_sve-ptrace_Set_SVE_VL_7984: pass
arm64_sve-ptrace_Set_SVE_VL_80: pass
arm64_sve-ptrace_Set_SVE_VL_800: pass
arm64_sve-ptrace_Set_SVE_VL_8000: pass
arm64_sve-ptrace_Set_SVE_VL_8016: pass
arm64_sve-ptrace_Set_SVE_VL_8032: pass
arm64_sve-ptrace_Set_SVE_VL_8048: pass
arm64_sve-ptrace_Set_SVE_VL_8064: pass
arm64_sve-ptrace_Set_SVE_VL_8080: pass
arm64_sve-ptrace_Set_SVE_VL_8096: pass
arm64_sve-ptrace_Set_SVE_VL_8112: pass
arm64_sve-ptrace_Set_SVE_VL_8128: pass
arm64_sve-ptrace_Set_SVE_VL_8144: pass
arm64_sve-ptrace_Set_SVE_VL_816: pass
arm64_sve-ptrace_Set_SVE_VL_8160: pass
arm64_sve-ptrace_Set_SVE_VL_8176: pass
arm64_sve-ptrace_Set_SVE_VL_8192: pass
arm64_sve-ptrace_Set_SVE_VL_832: pass
arm64_sve-ptrace_Set_SVE_VL_848: pass
arm64_sve-ptrace_Set_SVE_VL_864: pass
arm64_sve-ptrace_Set_SVE_VL_880: pass
arm64_sve-ptrace_Set_SVE_VL_896: pass
arm64_sve-ptrace_Set_SVE_VL_912: pass
arm64_sve-ptrace_Set_SVE_VL_928: pass
arm64_sve-ptrace_Set_SVE_VL_944: pass
arm64_sve-ptrace_Set_SVE_VL_96: pass
arm64_sve-ptrace_Set_SVE_VL_960: pass
arm64_sve-ptrace_Set_SVE_VL_976: pass
arm64_sve-ptrace_Set_SVE_VL_992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_48: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_80: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_96: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_992: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64: pass
arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0: pass
arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared: pass
arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set: pass
arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state: pass
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992: skip
arm64_sve_regs: pass
arm64_sve_vl: pass
arm64_syscall-abi: pass
arm64_syscall-abi_getpid_FPSIMD: pass
arm64_syscall-abi_getpid_SVE_VL_112: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16: pass
arm64_syscall-abi_getpid_SVE_VL_160: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_FPSIMD: pass
arm64_syscall-abi_sched_yield_SVE_VL_112: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16: pass
arm64_syscall-abi_sched_yield_SVE_VL_160: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA: pass
arm64_tags_test: pass
arm64_tpidr2: pass
arm64_tpidr2_default_value: pass
arm64_tpidr2_write_clone_read: pass
arm64_tpidr2_write_fork_read: pass
arm64_tpidr2_write_read: pass
arm64_tpidr2_write_sleep_read: pass
arm64_vec-syscfg: pass
arm64_vec-syscfg_SME_current_VL_is_32: pass
arm64_vec-syscfg_SME_default_vector_length_32: pass
arm64_vec-syscfg_SME_maximum_vector_length_256: pass
arm64_vec-syscfg_SME_minimum_vector_length_16: pass
arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors: pass
arm64_vec-syscfg_SME_prctl_set_min_max: pass
arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32: pass
arm64_vec-syscfg_SME_vector_length_set_on_exec: pass
arm64_vec-syscfg_SME_vector_length_used_default: pass
arm64_vec-syscfg_SME_vector_length_was_inherited: pass
arm64_vec-syscfg_SVE_current_VL_is_64: pass
arm64_vec-syscfg_SVE_default_vector_length_64: pass
arm64_vec-syscfg_SVE_maximum_vector_length_256: pass
arm64_vec-syscfg_SVE_minimum_vector_length_16: pass
arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors: pass
arm64_vec-syscfg_SVE_prctl_set_min_max: pass
arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64: pass
arm64_vec-syscfg_SVE_vector_length_set_on_exec: pass
arm64_vec-syscfg_SVE_vector_length_used_default: pass
arm64_vec-syscfg_SVE_vector_length_was_inherited: pass
arm64_za-fork: pass
arm64_za-fork_fork_test: pass
arm64_za-ptrace: pass
arm64_za-ptrace_Data_match_for_VL_128: pass
arm64_za-ptrace_Data_match_for_VL_16: pass
arm64_za-ptrace_Data_match_for_VL_256: pass
arm64_za-ptrace_Data_match_for_VL_32: pass
arm64_za-ptrace_Data_match_for_VL_64: pass
arm64_za-ptrace_Disabled_ZA_for_VL_1008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_128: pass
arm64_za-ptrace_Disabled_ZA_for_VL_1280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_16: pass
arm64_za-ptrace_Disabled_ZA_for_VL_160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_256: pass
arm64_za-ptrace_Disabled_ZA_for_VL_2560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_32: pass
arm64_za-ptrace_Disabled_ZA_for_VL_320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_48: skip
arm64_za-ptrace_Disabled_ZA_for_VL_480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_64: pass
arm64_za-ptrace_Disabled_ZA_for_VL_640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_80: skip
arm64_za-ptrace_Disabled_ZA_for_VL_800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_96: skip
arm64_za-ptrace_Disabled_ZA_for_VL_960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_48: skip
arm64_za-ptrace_Get_and_set_data_for_VL_480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_80: skip
arm64_za-ptrace_Get_and_set_data_for_VL_800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_96: skip
arm64_za-ptrace_Get_and_set_data_for_VL_960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_992: skip
arm64_za-ptrace_Set_VL_1008: pass
arm64_za-ptrace_Set_VL_1024: pass
arm64_za-ptrace_Set_VL_1040: pass
arm64_za-ptrace_Set_VL_1056: pass
arm64_za-ptrace_Set_VL_1072: pass
arm64_za-ptrace_Set_VL_1088: pass
arm64_za-ptrace_Set_VL_1104: pass
arm64_za-ptrace_Set_VL_112: pass
arm64_za-ptrace_Set_VL_1120: pass
arm64_za-ptrace_Set_VL_1136: pass
arm64_za-ptrace_Set_VL_1152: pass
arm64_za-ptrace_Set_VL_1168: pass
arm64_za-ptrace_Set_VL_1184: pass
arm64_za-ptrace_Set_VL_1200: pass
arm64_za-ptrace_Set_VL_1216: pass
arm64_za-ptrace_Set_VL_1232: pass
arm64_za-ptrace_Set_VL_1248: pass
arm64_za-ptrace_Set_VL_1264: pass
arm64_za-ptrace_Set_VL_128: pass
arm64_za-ptrace_Set_VL_1280: pass
arm64_za-ptrace_Set_VL_1296: pass
arm64_za-ptrace_Set_VL_1312: pass
arm64_za-ptrace_Set_VL_1328: pass
arm64_za-ptrace_Set_VL_1344: pass
arm64_za-ptrace_Set_VL_1360: pass
arm64_za-ptrace_Set_VL_1376: pass
arm64_za-ptrace_Set_VL_1392: pass
arm64_za-ptrace_Set_VL_1408: pass
arm64_za-ptrace_Set_VL_1424: pass
arm64_za-ptrace_Set_VL_144: pass
arm64_za-ptrace_Set_VL_1440: pass
arm64_za-ptrace_Set_VL_1456: pass
arm64_za-ptrace_Set_VL_1472: pass
arm64_za-ptrace_Set_VL_1488: pass
arm64_za-ptrace_Set_VL_1504: pass
arm64_za-ptrace_Set_VL_1520: pass
arm64_za-ptrace_Set_VL_1536: pass
arm64_za-ptrace_Set_VL_1552: pass
arm64_za-ptrace_Set_VL_1568: pass
arm64_za-ptrace_Set_VL_1584: pass
arm64_za-ptrace_Set_VL_16: pass
arm64_za-ptrace_Set_VL_160: pass
arm64_za-ptrace_Set_VL_1600: pass
arm64_za-ptrace_Set_VL_1616: pass
arm64_za-ptrace_Set_VL_1632: pass
arm64_za-ptrace_Set_VL_1648: pass
arm64_za-ptrace_Set_VL_1664: pass
arm64_za-ptrace_Set_VL_1680: pass
arm64_za-ptrace_Set_VL_1696: pass
arm64_za-ptrace_Set_VL_1712: pass
arm64_za-ptrace_Set_VL_1728: pass
arm64_za-ptrace_Set_VL_1744: pass
arm64_za-ptrace_Set_VL_176: pass
arm64_za-ptrace_Set_VL_1760: pass
arm64_za-ptrace_Set_VL_1776: pass
arm64_za-ptrace_Set_VL_1792: pass
arm64_za-ptrace_Set_VL_1808: pass
arm64_za-ptrace_Set_VL_1824: pass
arm64_za-ptrace_Set_VL_1840: pass
arm64_za-ptrace_Set_VL_1856: pass
arm64_za-ptrace_Set_VL_1872: pass
arm64_za-ptrace_Set_VL_1888: pass
arm64_za-ptrace_Set_VL_1904: pass
arm64_za-ptrace_Set_VL_192: pass
arm64_za-ptrace_Set_VL_1920: pass
arm64_za-ptrace_Set_VL_1936: pass
arm64_za-ptrace_Set_VL_1952: pass
arm64_za-ptrace_Set_VL_1968: pass
arm64_za-ptrace_Set_VL_1984: pass
arm64_za-ptrace_Set_VL_2000: pass
arm64_za-ptrace_Set_VL_2016: pass
arm64_za-ptrace_Set_VL_2032: pass
arm64_za-ptrace_Set_VL_2048: pass
arm64_za-ptrace_Set_VL_2064: pass
arm64_za-ptrace_Set_VL_208: pass
arm64_za-ptrace_Set_VL_2080: pass
arm64_za-ptrace_Set_VL_2096: pass
arm64_za-ptrace_Set_VL_2112: pass
arm64_za-ptrace_Set_VL_2128: pass
arm64_za-ptrace_Set_VL_2144: pass
arm64_za-ptrace_Set_VL_2160: pass
arm64_za-ptrace_Set_VL_2176: pass
arm64_za-ptrace_Set_VL_2192: pass
arm64_za-ptrace_Set_VL_2208: pass
arm64_za-ptrace_Set_VL_2224: pass
arm64_za-ptrace_Set_VL_224: pass
arm64_za-ptrace_Set_VL_2240: pass
arm64_za-ptrace_Set_VL_2256: pass
arm64_za-ptrace_Set_VL_2272: pass
arm64_za-ptrace_Set_VL_2288: pass
arm64_za-ptrace_Set_VL_2304: pass
arm64_za-ptrace_Set_VL_2320: pass
arm64_za-ptrace_Set_VL_2336: pass
arm64_za-ptrace_Set_VL_2352: pass
arm64_za-ptrace_Set_VL_2368: pass
arm64_za-ptrace_Set_VL_2384: pass
arm64_za-ptrace_Set_VL_240: pass
arm64_za-ptrace_Set_VL_2400: pass
arm64_za-ptrace_Set_VL_2416: pass
arm64_za-ptrace_Set_VL_2432: pass
arm64_za-ptrace_Set_VL_2448: pass
arm64_za-ptrace_Set_VL_2464: pass
arm64_za-ptrace_Set_VL_2480: pass
arm64_za-ptrace_Set_VL_2496: pass
arm64_za-ptrace_Set_VL_2512: pass
arm64_za-ptrace_Set_VL_2528: pass
arm64_za-ptrace_Set_VL_2544: pass
arm64_za-ptrace_Set_VL_256: pass
arm64_za-ptrace_Set_VL_2560: pass
arm64_za-ptrace_Set_VL_2576: pass
arm64_za-ptrace_Set_VL_2592: pass
arm64_za-ptrace_Set_VL_2608: pass
arm64_za-ptrace_Set_VL_2624: pass
arm64_za-ptrace_Set_VL_2640: pass
arm64_za-ptrace_Set_VL_2656: pass
arm64_za-ptrace_Set_VL_2672: pass
arm64_za-ptrace_Set_VL_2688: pass
arm64_za-ptrace_Set_VL_2704: pass
arm64_za-ptrace_Set_VL_272: pass
arm64_za-ptrace_Set_VL_2720: pass
arm64_za-ptrace_Set_VL_2736: pass
arm64_za-ptrace_Set_VL_2752: pass
arm64_za-ptrace_Set_VL_2768: pass
arm64_za-ptrace_Set_VL_2784: pass
arm64_za-ptrace_Set_VL_2800: pass
arm64_za-ptrace_Set_VL_2816: pass
arm64_za-ptrace_Set_VL_2832: pass
arm64_za-ptrace_Set_VL_2848: pass
arm64_za-ptrace_Set_VL_2864: pass
arm64_za-ptrace_Set_VL_288: pass
arm64_za-ptrace_Set_VL_2880: pass
arm64_za-ptrace_Set_VL_2896: pass
arm64_za-ptrace_Set_VL_2912: pass
arm64_za-ptrace_Set_VL_2928: pass
arm64_za-ptrace_Set_VL_2944: pass
arm64_za-ptrace_Set_VL_2960: pass
arm64_za-ptrace_Set_VL_2976: pass
arm64_za-ptrace_Set_VL_2992: pass
arm64_za-ptrace_Set_VL_3008: pass
arm64_za-ptrace_Set_VL_3024: pass
arm64_za-ptrace_Set_VL_304: pass
arm64_za-ptrace_Set_VL_3040: pass
arm64_za-ptrace_Set_VL_3056: pass
arm64_za-ptrace_Set_VL_3072: pass
arm64_za-ptrace_Set_VL_3088: pass
arm64_za-ptrace_Set_VL_3104: pass
arm64_za-ptrace_Set_VL_3120: pass
arm64_za-ptrace_Set_VL_3136: pass
arm64_za-ptrace_Set_VL_3152: pass
arm64_za-ptrace_Set_VL_3168: pass
arm64_za-ptrace_Set_VL_3184: pass
arm64_za-ptrace_Set_VL_32: pass
arm64_za-ptrace_Set_VL_320: pass
arm64_za-ptrace_Set_VL_3200: pass
arm64_za-ptrace_Set_VL_3216: pass
arm64_za-ptrace_Set_VL_3232: pass
arm64_za-ptrace_Set_VL_3248: pass
arm64_za-ptrace_Set_VL_3264: pass
arm64_za-ptrace_Set_VL_3280: pass
arm64_za-ptrace_Set_VL_3296: pass
arm64_za-ptrace_Set_VL_3312: pass
arm64_za-ptrace_Set_VL_3328: pass
arm64_za-ptrace_Set_VL_3344: pass
arm64_za-ptrace_Set_VL_336: pass
arm64_za-ptrace_Set_VL_3360: pass
arm64_za-ptrace_Set_VL_3376: pass
arm64_za-ptrace_Set_VL_3392: pass
arm64_za-ptrace_Set_VL_3408: pass
arm64_za-ptrace_Set_VL_3424: pass
arm64_za-ptrace_Set_VL_3440: pass
arm64_za-ptrace_Set_VL_3456: pass
arm64_za-ptrace_Set_VL_3472: pass
arm64_za-ptrace_Set_VL_3488: pass
arm64_za-ptrace_Set_VL_3504: pass
arm64_za-ptrace_Set_VL_352: pass
arm64_za-ptrace_Set_VL_3520: pass
arm64_za-ptrace_Set_VL_3536: pass
arm64_za-ptrace_Set_VL_3552: pass
arm64_za-ptrace_Set_VL_3568: pass
arm64_za-ptrace_Set_VL_3584: pass
arm64_za-ptrace_Set_VL_3600: pass
arm64_za-ptrace_Set_VL_3616: pass
arm64_za-ptrace_Set_VL_3632: pass
arm64_za-ptrace_Set_VL_3648: pass
arm64_za-ptrace_Set_VL_3664: pass
arm64_za-ptrace_Set_VL_368: pass
arm64_za-ptrace_Set_VL_3680: pass
arm64_za-ptrace_Set_VL_3696: pass
arm64_za-ptrace_Set_VL_3712: pass
arm64_za-ptrace_Set_VL_3728: pass
arm64_za-ptrace_Set_VL_3744: pass
arm64_za-ptrace_Set_VL_3760: pass
arm64_za-ptrace_Set_VL_3776: pass
arm64_za-ptrace_Set_VL_3792: pass
arm64_za-ptrace_Set_VL_3808: pass
arm64_za-ptrace_Set_VL_3824: pass
arm64_za-ptrace_Set_VL_384: pass
arm64_za-ptrace_Set_VL_3840: pass
arm64_za-ptrace_Set_VL_3856: pass
arm64_za-ptrace_Set_VL_3872: pass
arm64_za-ptrace_Set_VL_3888: pass
arm64_za-ptrace_Set_VL_3904: pass
arm64_za-ptrace_Set_VL_3920: pass
arm64_za-ptrace_Set_VL_3936: pass
arm64_za-ptrace_Set_VL_3952: pass
arm64_za-ptrace_Set_VL_3968: pass
arm64_za-ptrace_Set_VL_3984: pass
arm64_za-ptrace_Set_VL_400: pass
arm64_za-ptrace_Set_VL_4000: pass
arm64_za-ptrace_Set_VL_4016: pass
arm64_za-ptrace_Set_VL_4032: pass
arm64_za-ptrace_Set_VL_4048: pass
arm64_za-ptrace_Set_VL_4064: pass
arm64_za-ptrace_Set_VL_4080: pass
arm64_za-ptrace_Set_VL_4096: pass
arm64_za-ptrace_Set_VL_4112: pass
arm64_za-ptrace_Set_VL_4128: pass
arm64_za-ptrace_Set_VL_4144: pass
arm64_za-ptrace_Set_VL_416: pass
arm64_za-ptrace_Set_VL_4160: pass
arm64_za-ptrace_Set_VL_4176: pass
arm64_za-ptrace_Set_VL_4192: pass
arm64_za-ptrace_Set_VL_4208: pass
arm64_za-ptrace_Set_VL_4224: pass
arm64_za-ptrace_Set_VL_4240: pass
arm64_za-ptrace_Set_VL_4256: pass
arm64_za-ptrace_Set_VL_4272: pass
arm64_za-ptrace_Set_VL_4288: pass
arm64_za-ptrace_Set_VL_4304: pass
arm64_za-ptrace_Set_VL_432: pass
arm64_za-ptrace_Set_VL_4320: pass
arm64_za-ptrace_Set_VL_4336: pass
arm64_za-ptrace_Set_VL_4352: pass
arm64_za-ptrace_Set_VL_4368: pass
arm64_za-ptrace_Set_VL_4384: pass
arm64_za-ptrace_Set_VL_4400: pass
arm64_za-ptrace_Set_VL_4416: pass
arm64_za-ptrace_Set_VL_4432: pass
arm64_za-ptrace_Set_VL_4448: pass
arm64_za-ptrace_Set_VL_4464: pass
arm64_za-ptrace_Set_VL_448: pass
arm64_za-ptrace_Set_VL_4480: pass
arm64_za-ptrace_Set_VL_4496: pass
arm64_za-ptrace_Set_VL_4512: pass
arm64_za-ptrace_Set_VL_4528: pass
arm64_za-ptrace_Set_VL_4544: pass
arm64_za-ptrace_Set_VL_4560: pass
arm64_za-ptrace_Set_VL_4576: pass
arm64_za-ptrace_Set_VL_4592: pass
arm64_za-ptrace_Set_VL_4608: pass
arm64_za-ptrace_Set_VL_4624: pass
arm64_za-ptrace_Set_VL_464: pass
arm64_za-ptrace_Set_VL_4640: pass
arm64_za-ptrace_Set_VL_4656: pass
arm64_za-ptrace_Set_VL_4672: pass
arm64_za-ptrace_Set_VL_4688: pass
arm64_za-ptrace_Set_VL_4704: pass
arm64_za-ptrace_Set_VL_4720: pass
arm64_za-ptrace_Set_VL_4736: pass
arm64_za-ptrace_Set_VL_4752: pass
arm64_za-ptrace_Set_VL_4768: pass
arm64_za-ptrace_Set_VL_4784: pass
arm64_za-ptrace_Set_VL_48: pass
arm64_za-ptrace_Set_VL_480: pass
arm64_za-ptrace_Set_VL_4800: pass
arm64_za-ptrace_Set_VL_4816: pass
arm64_za-ptrace_Set_VL_4832: pass
arm64_za-ptrace_Set_VL_4848: pass
arm64_za-ptrace_Set_VL_4864: pass
arm64_za-ptrace_Set_VL_4880: pass
arm64_za-ptrace_Set_VL_4896: pass
arm64_za-ptrace_Set_VL_4912: pass
arm64_za-ptrace_Set_VL_4928: pass
arm64_za-ptrace_Set_VL_4944: pass
arm64_za-ptrace_Set_VL_496: pass
arm64_za-ptrace_Set_VL_4960: pass
arm64_za-ptrace_Set_VL_4976: pass
arm64_za-ptrace_Set_VL_4992: pass
arm64_za-ptrace_Set_VL_5008: pass
arm64_za-ptrace_Set_VL_5024: pass
arm64_za-ptrace_Set_VL_5040: pass
arm64_za-ptrace_Set_VL_5056: pass
arm64_za-ptrace_Set_VL_5072: pass
arm64_za-ptrace_Set_VL_5088: pass
arm64_za-ptrace_Set_VL_5104: pass
arm64_za-ptrace_Set_VL_512: pass
arm64_za-ptrace_Set_VL_5120: pass
arm64_za-ptrace_Set_VL_5136: pass
arm64_za-ptrace_Set_VL_5152: pass
arm64_za-ptrace_Set_VL_5168: pass
arm64_za-ptrace_Set_VL_5184: pass
arm64_za-ptrace_Set_VL_5200: pass
arm64_za-ptrace_Set_VL_5216: pass
arm64_za-ptrace_Set_VL_5232: pass
arm64_za-ptrace_Set_VL_5248: pass
arm64_za-ptrace_Set_VL_5264: pass
arm64_za-ptrace_Set_VL_528: pass
arm64_za-ptrace_Set_VL_5280: pass
arm64_za-ptrace_Set_VL_5296: pass
arm64_za-ptrace_Set_VL_5312: pass
arm64_za-ptrace_Set_VL_5328: pass
arm64_za-ptrace_Set_VL_5344: pass
arm64_za-ptrace_Set_VL_5360: pass
arm64_za-ptrace_Set_VL_5376: pass
arm64_za-ptrace_Set_VL_5392: pass
arm64_za-ptrace_Set_VL_5408: pass
arm64_za-ptrace_Set_VL_5424: pass
arm64_za-ptrace_Set_VL_544: pass
arm64_za-ptrace_Set_VL_5440: pass
arm64_za-ptrace_Set_VL_5456: pass
arm64_za-ptrace_Set_VL_5472: pass
arm64_za-ptrace_Set_VL_5488: pass
arm64_za-ptrace_Set_VL_5504: pass
arm64_za-ptrace_Set_VL_5520: pass
arm64_za-ptrace_Set_VL_5536: pass
arm64_za-ptrace_Set_VL_5552: pass
arm64_za-ptrace_Set_VL_5568: pass
arm64_za-ptrace_Set_VL_5584: pass
arm64_za-ptrace_Set_VL_560: pass
arm64_za-ptrace_Set_VL_5600: pass
arm64_za-ptrace_Set_VL_5616: pass
arm64_za-ptrace_Set_VL_5632: pass
arm64_za-ptrace_Set_VL_5648: pass
arm64_za-ptrace_Set_VL_5664: pass
arm64_za-ptrace_Set_VL_5680: pass
arm64_za-ptrace_Set_VL_5696: pass
arm64_za-ptrace_Set_VL_5712: pass
arm64_za-ptrace_Set_VL_5728: pass
arm64_za-ptrace_Set_VL_5744: pass
arm64_za-ptrace_Set_VL_576: pass
arm64_za-ptrace_Set_VL_5760: pass
arm64_za-ptrace_Set_VL_5776: pass
arm64_za-ptrace_Set_VL_5792: pass
arm64_za-ptrace_Set_VL_5808: pass
arm64_za-ptrace_Set_VL_5824: pass
arm64_za-ptrace_Set_VL_5840: pass
arm64_za-ptrace_Set_VL_5856: pass
arm64_za-ptrace_Set_VL_5872: pass
arm64_za-ptrace_Set_VL_5888: pass
arm64_za-ptrace_Set_VL_5904: pass
arm64_za-ptrace_Set_VL_592: pass
arm64_za-ptrace_Set_VL_5920: pass
arm64_za-ptrace_Set_VL_5936: pass
arm64_za-ptrace_Set_VL_5952: pass
arm64_za-ptrace_Set_VL_5968: pass
arm64_za-ptrace_Set_VL_5984: pass
arm64_za-ptrace_Set_VL_6000: pass
arm64_za-ptrace_Set_VL_6016: pass
arm64_za-ptrace_Set_VL_6032: pass
arm64_za-ptrace_Set_VL_6048: pass
arm64_za-ptrace_Set_VL_6064: pass
arm64_za-ptrace_Set_VL_608: pass
arm64_za-ptrace_Set_VL_6080: pass
arm64_za-ptrace_Set_VL_6096: pass
arm64_za-ptrace_Set_VL_6112: pass
arm64_za-ptrace_Set_VL_6128: pass
arm64_za-ptrace_Set_VL_6144: pass
arm64_za-ptrace_Set_VL_6160: pass
arm64_za-ptrace_Set_VL_6176: pass
arm64_za-ptrace_Set_VL_6192: pass
arm64_za-ptrace_Set_VL_6208: pass
arm64_za-ptrace_Set_VL_6224: pass
arm64_za-ptrace_Set_VL_624: pass
arm64_za-ptrace_Set_VL_6240: pass
arm64_za-ptrace_Set_VL_6256: pass
arm64_za-ptrace_Set_VL_6272: pass
arm64_za-ptrace_Set_VL_6288: pass
arm64_za-ptrace_Set_VL_6304: pass
arm64_za-ptrace_Set_VL_6320: pass
arm64_za-ptrace_Set_VL_6336: pass
arm64_za-ptrace_Set_VL_6352: pass
arm64_za-ptrace_Set_VL_6368: pass
arm64_za-ptrace_Set_VL_6384: pass
arm64_za-ptrace_Set_VL_64: pass
arm64_za-ptrace_Set_VL_640: pass
arm64_za-ptrace_Set_VL_6400: pass
arm64_za-ptrace_Set_VL_6416: pass
arm64_za-ptrace_Set_VL_6432: pass
arm64_za-ptrace_Set_VL_6448: pass
arm64_za-ptrace_Set_VL_6464: pass
arm64_za-ptrace_Set_VL_6480: pass
arm64_za-ptrace_Set_VL_6496: pass
arm64_za-ptrace_Set_VL_6512: pass
arm64_za-ptrace_Set_VL_6528: pass
arm64_za-ptrace_Set_VL_6544: pass
arm64_za-ptrace_Set_VL_656: pass
arm64_za-ptrace_Set_VL_6560: pass
arm64_za-ptrace_Set_VL_6576: pass
arm64_za-ptrace_Set_VL_6592: pass
arm64_za-ptrace_Set_VL_6608: pass
arm64_za-ptrace_Set_VL_6624: pass
arm64_za-ptrace_Set_VL_6640: pass
arm64_za-ptrace_Set_VL_6656: pass
arm64_za-ptrace_Set_VL_6672: pass
arm64_za-ptrace_Set_VL_6688: pass
arm64_za-ptrace_Set_VL_6704: pass
arm64_za-ptrace_Set_VL_672: pass
arm64_za-ptrace_Set_VL_6720: pass
arm64_za-ptrace_Set_VL_6736: pass
arm64_za-ptrace_Set_VL_6752: pass
arm64_za-ptrace_Set_VL_6768: pass
arm64_za-ptrace_Set_VL_6784: pass
arm64_za-ptrace_Set_VL_6800: pass
arm64_za-ptrace_Set_VL_6816: pass
arm64_za-ptrace_Set_VL_6832: pass
arm64_za-ptrace_Set_VL_6848: pass
arm64_za-ptrace_Set_VL_6864: pass
arm64_za-ptrace_Set_VL_688: pass
arm64_za-ptrace_Set_VL_6880: pass
arm64_za-ptrace_Set_VL_6896: pass
arm64_za-ptrace_Set_VL_6912: pass
arm64_za-ptrace_Set_VL_6928: pass
arm64_za-ptrace_Set_VL_6944: pass
arm64_za-ptrace_Set_VL_6960: pass
arm64_za-ptrace_Set_VL_6976: pass
arm64_za-ptrace_Set_VL_6992: pass
arm64_za-ptrace_Set_VL_7008: pass
arm64_za-ptrace_Set_VL_7024: pass
arm64_za-ptrace_Set_VL_704: pass
arm64_za-ptrace_Set_VL_7040: pass
arm64_za-ptrace_Set_VL_7056: pass
arm64_za-ptrace_Set_VL_7072: pass
arm64_za-ptrace_Set_VL_7088: pass
arm64_za-ptrace_Set_VL_7104: pass
arm64_za-ptrace_Set_VL_7120: pass
arm64_za-ptrace_Set_VL_7136: pass
arm64_za-ptrace_Set_VL_7152: pass
arm64_za-ptrace_Set_VL_7168: pass
arm64_za-ptrace_Set_VL_7184: pass
arm64_za-ptrace_Set_VL_720: pass
arm64_za-ptrace_Set_VL_7200: pass
arm64_za-ptrace_Set_VL_7216: pass
arm64_za-ptrace_Set_VL_7232: pass
arm64_za-ptrace_Set_VL_7248: pass
arm64_za-ptrace_Set_VL_7264: pass
arm64_za-ptrace_Set_VL_7280: pass
arm64_za-ptrace_Set_VL_7296: pass
arm64_za-ptrace_Set_VL_7312: pass
arm64_za-ptrace_Set_VL_7328: pass
arm64_za-ptrace_Set_VL_7344: pass
arm64_za-ptrace_Set_VL_736: pass
arm64_za-ptrace_Set_VL_7360: pass
arm64_za-ptrace_Set_VL_7376: pass
arm64_za-ptrace_Set_VL_7392: pass
arm64_za-ptrace_Set_VL_7408: pass
arm64_za-ptrace_Set_VL_7424: pass
arm64_za-ptrace_Set_VL_7440: pass
arm64_za-ptrace_Set_VL_7456: pass
arm64_za-ptrace_Set_VL_7472: pass
arm64_za-ptrace_Set_VL_7488: pass
arm64_za-ptrace_Set_VL_7504: pass
arm64_za-ptrace_Set_VL_752: pass
arm64_za-ptrace_Set_VL_7520: pass
arm64_za-ptrace_Set_VL_7536: pass
arm64_za-ptrace_Set_VL_7552: pass
arm64_za-ptrace_Set_VL_7568: pass
arm64_za-ptrace_Set_VL_7584: pass
arm64_za-ptrace_Set_VL_7600: pass
arm64_za-ptrace_Set_VL_7616: pass
arm64_za-ptrace_Set_VL_7632: pass
arm64_za-ptrace_Set_VL_7648: pass
arm64_za-ptrace_Set_VL_7664: pass
arm64_za-ptrace_Set_VL_768: pass
arm64_za-ptrace_Set_VL_7680: pass
arm64_za-ptrace_Set_VL_7696: pass
arm64_za-ptrace_Set_VL_7712: pass
arm64_za-ptrace_Set_VL_7728: pass
arm64_za-ptrace_Set_VL_7744: pass
arm64_za-ptrace_Set_VL_7760: pass
arm64_za-ptrace_Set_VL_7776: pass
arm64_za-ptrace_Set_VL_7792: pass
arm64_za-ptrace_Set_VL_7808: pass
arm64_za-ptrace_Set_VL_7824: pass
arm64_za-ptrace_Set_VL_784: pass
arm64_za-ptrace_Set_VL_7840: pass
arm64_za-ptrace_Set_VL_7856: pass
arm64_za-ptrace_Set_VL_7872: pass
arm64_za-ptrace_Set_VL_7888: pass
arm64_za-ptrace_Set_VL_7904: pass
arm64_za-ptrace_Set_VL_7920: pass
arm64_za-ptrace_Set_VL_7936: pass
arm64_za-ptrace_Set_VL_7952: pass
arm64_za-ptrace_Set_VL_7968: pass
arm64_za-ptrace_Set_VL_7984: pass
arm64_za-ptrace_Set_VL_80: pass
arm64_za-ptrace_Set_VL_800: pass
arm64_za-ptrace_Set_VL_8000: pass
arm64_za-ptrace_Set_VL_8016: pass
arm64_za-ptrace_Set_VL_8032: pass
arm64_za-ptrace_Set_VL_8048: pass
arm64_za-ptrace_Set_VL_8064: pass
arm64_za-ptrace_Set_VL_8080: pass
arm64_za-ptrace_Set_VL_8096: pass
arm64_za-ptrace_Set_VL_8112: pass
arm64_za-ptrace_Set_VL_8128: pass
arm64_za-ptrace_Set_VL_8144: pass
arm64_za-ptrace_Set_VL_816: pass
arm64_za-ptrace_Set_VL_8160: pass
arm64_za-ptrace_Set_VL_8176: pass
arm64_za-ptrace_Set_VL_8192: pass
arm64_za-ptrace_Set_VL_832: pass
arm64_za-ptrace_Set_VL_848: pass
arm64_za-ptrace_Set_VL_864: pass
arm64_za-ptrace_Set_VL_880: pass
arm64_za-ptrace_Set_VL_896: pass
arm64_za-ptrace_Set_VL_912: pass
arm64_za-ptrace_Set_VL_928: pass
arm64_za-ptrace_Set_VL_944: pass
arm64_za-ptrace_Set_VL_96: pass
arm64_za-ptrace_Set_VL_960: pass
arm64_za-ptrace_Set_VL_976: pass
arm64_za-ptrace_Set_VL_992: pass
arm64_za_no_regs: pass
arm64_za_regs: pass
34684 22:27:26.752482 end: 3.1 lava-test-shell (duration 00:05:12) [common]
34685 22:27:26.752574 end: 3 lava-test-retry (duration 00:05:12) [common]
34686 22:27:26.752663 start: 4 finalize (timeout 00:03:44) [common]
34687 22:27:26.752748 start: 4.1 power-off (timeout 00:00:30) [common]
34688 22:27:26.752829 end: 4.1 power-off (duration 00:00:00) [common]
34689 22:27:26.752908 start: 4.2 read-feedback (timeout 00:03:44) [common]
34690 22:27:26.753071 Listened to connection for namespace 'common' for up to 1s
34691 22:27:26.753340 Listened to connection for namespace 'common' for up to 1s
34692 22:27:27.758239 Finalising connection for namespace 'common'
34694 22:27:27.859236 / # poweroff
34695 22:27:27.859781 Already disconnected
34696 22:27:27.859952 poweroff
34697 22:27:27.960799 end: 4.2 read-feedback (duration 00:00:01) [common]
34698 22:27:27.961041 Already disconnected
34699 22:27:27.961167 end: 4 finalize (duration 00:00:01) [common]
34700 22:27:27.961297 Cleaning after the job
34701 22:27:27.961438 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/559916/deployimages-n_bp_9w0/kernel
34702 22:27:27.967383 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/559916/deployimages-n_bp_9w0/ramdisk
34703 22:27:27.980861 Stopping the qemu container lava-docker-qemu-559916-2.1.1-hga5kc4yto
34704 22:27:28.910295 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/559916
34705 22:27:29.002366 Job finished correctly