Boot log: qemu_arm64-virt-gicv3
- Errors: 0
- Kernel Errors: 0
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 4
1 22:57:01.401596 lava-dispatcher, installed at version: 2023.01
2 22:57:01.401867 start: 0 validate
3 22:57:01.401996 Start time: 2023-06-05 22:57:01.401988+00:00 (UTC)
4 22:57:01.403223 Validating that http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image exists
5 22:57:01.761409 Validating that http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230527.0/arm64/rootfs.cpio.gz exists
6 22:57:01.940785 cmd: ['docker', 'pull', 'kernelci/qemu']
7 22:57:01.941065 Calling: 'nice' 'docker' 'pull' 'kernelci/qemu'
8 22:57:02.079731 >> Using default tag: latest
9 22:57:03.183145 >> latest: Pulling from kernelci/qemu
10 22:57:03.215017 >> Digest: sha256:fc85786d1b429cf64a5683fdc5d697be0f1ce54a15ccbe3e596ab02286b2b909
11 22:57:03.215204 >> Status: Image is up to date for kernelci/qemu:latest
12 22:57:03.248279 >> docker.io/kernelci/qemu:latest
13 22:57:03.251618 Returned 0 in 1 seconds
14 22:57:03.381469 cmd: ['docker', 'run', '--rm', '--init', 'kernelci/qemu', 'qemu-system-aarch64', '--version']
15 22:57:03.381847 Calling: 'nice' 'docker' 'run' '--rm' '--init' 'kernelci/qemu' 'qemu-system-aarch64' '--version'
16 22:57:05.653915 >> QEMU emulator version 7.2.2 (Debian 1:7.2+dfsg-7~bpo11+1)
17 22:57:05.654290 >> Copyright (c) 2003-2022 Fabrice Bellard and the QEMU Project developers
18 22:57:06.783792 Returned 0 in 3 seconds
19 22:57:06.884957 validate duration: 5.48
21 22:57:06.885439 start: 1 deployimages (timeout 00:03:00) [common]
22 22:57:06.885579 start: 1.1 lava-overlay (timeout 00:03:00) [common]
23 22:57:06.885974 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f
24 22:57:06.886179 makedir: /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin
25 22:57:06.886347 makedir: /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/tests
26 22:57:06.886501 makedir: /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/results
27 22:57:06.886662 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-add-keys
28 22:57:06.886862 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-add-sources
29 22:57:06.887047 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-background-process-start
30 22:57:06.887232 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-background-process-stop
31 22:57:06.887411 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-common-functions
32 22:57:06.887587 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-echo-ipv4
33 22:57:06.887766 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-install-packages
34 22:57:06.887944 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-installed-packages
35 22:57:06.888123 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-os-build
36 22:57:06.888300 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-probe-channel
37 22:57:06.888480 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-probe-ip
38 22:57:06.888658 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-target-ip
39 22:57:06.888834 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-target-mac
40 22:57:06.889010 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-target-storage
41 22:57:06.889188 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-test-case
42 22:57:06.889365 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-test-event
43 22:57:06.889543 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-test-feedback
44 22:57:06.889729 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-test-raise
45 22:57:06.889910 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-test-reference
46 22:57:06.890085 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-test-runner
47 22:57:06.890261 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-test-set
48 22:57:06.890435 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-test-shell
49 22:57:06.890616 Updating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-install-packages (oe)
50 22:57:06.890837 Updating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/bin/lava-installed-packages (oe)
51 22:57:06.891042 Creating /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/environment
52 22:57:06.891205 LAVA metadata
53 22:57:06.891316 - LAVA_JOB_ID=566315
54 22:57:06.891419 - LAVA_DISPATCHER_IP=172.27.0.2
55 22:57:06.891571 start: 1.1.1 lava-vland-overlay (timeout 00:03:00) [common]
56 22:57:06.891678 skipped lava-vland-overlay
57 22:57:06.891792 end: 1.1.1 lava-vland-overlay (duration 00:00:00) [common]
58 22:57:06.891918 start: 1.1.2 lava-multinode-overlay (timeout 00:03:00) [common]
59 22:57:06.892017 skipped lava-multinode-overlay
60 22:57:06.892130 end: 1.1.2 lava-multinode-overlay (duration 00:00:00) [common]
61 22:57:06.892251 start: 1.1.3 test-definition (timeout 00:03:00) [common]
62 22:57:06.892367 Loading test definitions
63 22:57:06.892507 start: 1.1.3.1 inline-repo-action (timeout 00:03:00) [common]
64 22:57:06.892621 Using /lava-566315 at stage 0
65 22:57:06.893092 uuid=566315_1.1.3.1 testdef=None
66 22:57:06.893233 end: 1.1.3.1 inline-repo-action (duration 00:00:00) [common]
67 22:57:06.893359 start: 1.1.3.2 test-overlay (timeout 00:03:00) [common]
68 22:57:06.894068 end: 1.1.3.2 test-overlay (duration 00:00:00) [common]
70 22:57:06.894435 start: 1.1.3.3 test-install-overlay (timeout 00:03:00) [common]
71 22:57:06.895314 end: 1.1.3.3 test-install-overlay (duration 00:00:00) [common]
73 22:57:06.895692 start: 1.1.3.4 test-runscript-overlay (timeout 00:03:00) [common]
74 22:57:06.896527 runner path: /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/0/tests/0_timesync-off test_uuid 566315_1.1.3.1
75 22:57:06.896756 end: 1.1.3.4 test-runscript-overlay (duration 00:00:00) [common]
77 22:57:06.897125 start: 1.1.3.5 git-repo-action (timeout 00:03:00) [common]
78 22:57:06.897231 Using /lava-566315 at stage 0
79 22:57:06.897383 Fetching tests from https://github.com/kernelci/test-definitions.git
80 22:57:06.897503 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/0/tests/1_kselftest-arm64_qemu'
81 22:57:09.890994 Running '/usr/bin/git checkout kernelci.org
82 22:57:10.035149 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/0/tests/1_kselftest-arm64_qemu/automated/linux/kselftest/kselftest.yaml
83 22:57:10.035852 uuid=566315_1.1.3.5 testdef=None
84 22:57:10.035993 end: 1.1.3.5 git-repo-action (duration 00:00:03) [common]
86 22:57:10.036256 start: 1.1.3.6 test-overlay (timeout 00:02:57) [common]
87 22:57:10.037120 end: 1.1.3.6 test-overlay (duration 00:00:00) [common]
89 22:57:10.037407 start: 1.1.3.7 test-install-overlay (timeout 00:02:57) [common]
90 22:57:10.038600 end: 1.1.3.7 test-install-overlay (duration 00:00:00) [common]
92 22:57:10.038873 start: 1.1.3.8 test-runscript-overlay (timeout 00:02:57) [common]
93 22:57:10.039987 runner path: /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/0/tests/1_kselftest-arm64_qemu test_uuid 566315_1.1.3.5
94 22:57:10.040082 BOARD='qemu_arm64-virt-gicv3'
95 22:57:10.040148 BRANCH='cip'
96 22:57:10.040217 SKIPFILE='/dev/null'
97 22:57:10.040280 SKIP_INSTALL='True'
98 22:57:10.040341 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
99 22:57:10.040404 TST_CASENAME=''
100 22:57:10.040464 TST_CMDFILES='arm64'
101 22:57:10.040616 end: 1.1.3.8 test-runscript-overlay (duration 00:00:00) [common]
103 22:57:10.040853 Creating lava-test-runner.conf files
104 22:57:10.040926 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/566315/lava-overlay-sslbnh5f/lava-566315/0 for stage 0
105 22:57:10.041026 - 0_timesync-off
106 22:57:10.041098 - 1_kselftest-arm64_qemu
107 22:57:10.041196 end: 1.1.3 test-definition (duration 00:00:03) [common]
108 22:57:10.041303 start: 1.1.4 compress-overlay (timeout 00:02:57) [common]
109 22:57:18.834750 end: 1.1.4 compress-overlay (duration 00:00:09) [common]
110 22:57:18.834938 start: 1.1.5 persistent-nfs-overlay (timeout 00:02:48) [common]
111 22:57:18.835028 end: 1.1.5 persistent-nfs-overlay (duration 00:00:00) [common]
112 22:57:18.835134 end: 1.1 lava-overlay (duration 00:00:12) [common]
113 22:57:18.835224 start: 1.2 apply-overlay-guest (timeout 00:02:48) [common]
114 22:57:18.835302 Overlay: /var/lib/lava/dispatcher/tmp/566315/compress-overlay-6qy_k24s/overlay-1.1.4.tar.gz
115 22:57:34.001715 end: 1.2 apply-overlay-guest (duration 00:00:15) [common]
117 22:57:34.002533 start: 1.3 deploy-device-env (timeout 00:02:33) [common]
118 22:57:34.002704 end: 1.3 deploy-device-env (duration 00:00:00) [common]
119 22:57:34.002870 start: 1.4 download-retry (timeout 00:02:33) [common]
120 22:57:34.003047 start: 1.4.1 http-download (timeout 00:02:33) [common]
121 22:57:34.003374 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
122 22:57:34.003544 saving as /var/lib/lava/dispatcher/tmp/566315/deployimages-_2fpvrk7/kernel/Image
123 22:57:34.003677 total size: 45746688 (43MB)
124 22:57:34.003834 No compression specified
125 22:57:34.360524 progress 0% (0MB)
126 22:57:35.435915 progress 5% (2MB)
127 22:57:35.616744 progress 10% (4MB)
128 22:57:35.964263 progress 15% (6MB)
129 22:57:36.328393 progress 20% (8MB)
130 22:57:36.495797 progress 25% (10MB)
131 22:57:36.674780 progress 30% (13MB)
132 22:57:37.053388 progress 35% (15MB)
133 22:57:37.391553 progress 40% (17MB)
134 22:57:37.573731 progress 45% (19MB)
135 22:57:37.790927 progress 50% (21MB)
136 22:57:38.142613 progress 55% (24MB)
137 22:57:38.486332 progress 60% (26MB)
138 22:57:38.807012 progress 65% (28MB)
139 22:57:39.030171 progress 70% (30MB)
140 22:57:39.373968 progress 75% (32MB)
141 22:57:39.694822 progress 80% (34MB)
142 22:57:39.929847 progress 85% (37MB)
143 22:57:40.256396 progress 90% (39MB)
144 22:57:40.464233 progress 95% (41MB)
145 22:57:40.794551 progress 100% (43MB)
146 22:57:40.794796 43MB downloaded in 6.79s (6.42MB/s)
147 22:57:40.794995 end: 1.4.1 http-download (duration 00:00:07) [common]
149 22:57:40.795286 end: 1.4 download-retry (duration 00:00:07) [common]
150 22:57:40.795389 start: 1.5 download-retry (timeout 00:02:26) [common]
151 22:57:40.795486 start: 1.5.1 http-download (timeout 00:02:26) [common]
152 22:57:40.795652 Not decompressing ramdisk as can be used compressed.
153 22:57:40.795753 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230527.0/arm64/rootfs.cpio.gz
154 22:57:40.795827 saving as /var/lib/lava/dispatcher/tmp/566315/deployimages-_2fpvrk7/ramdisk/rootfs.cpio.gz
155 22:57:40.795905 total size: 88976554 (84MB)
156 22:57:40.795982 No compression specified
157 22:57:40.974946 progress 0% (0MB)
158 22:57:41.506684 progress 5% (4MB)
159 22:57:42.037062 progress 10% (8MB)
160 22:57:42.409487 progress 15% (12MB)
161 22:57:42.938420 progress 20% (17MB)
162 22:57:43.480699 progress 25% (21MB)
163 22:57:44.012750 progress 30% (25MB)
164 22:57:44.556160 progress 35% (29MB)
165 22:57:45.087368 progress 40% (33MB)
166 22:57:45.626691 progress 45% (38MB)
167 22:57:46.157790 progress 50% (42MB)
168 22:57:46.687870 progress 55% (46MB)
169 22:57:47.210044 progress 60% (50MB)
170 22:57:47.739517 progress 65% (55MB)
171 22:57:48.258271 progress 70% (59MB)
172 22:57:48.787756 progress 75% (63MB)
173 22:57:49.192802 progress 80% (67MB)
174 22:57:49.738193 progress 85% (72MB)
175 22:57:50.256242 progress 90% (76MB)
176 22:57:50.784042 progress 95% (80MB)
177 22:57:51.284088 progress 100% (84MB)
178 22:57:51.284481 84MB downloaded in 10.49s (8.09MB/s)
179 22:57:51.284760 end: 1.5.1 http-download (duration 00:00:10) [common]
181 22:57:51.285291 end: 1.5 download-retry (duration 00:00:10) [common]
182 22:57:51.285504 end: 1 deployimages (duration 00:00:44) [common]
183 22:57:51.285698 start: 2 boot-image-retry (timeout 00:05:00) [common]
184 22:57:51.285925 start: 2.1 boot-qemu-image (timeout 00:05:00) [common]
185 22:57:51.286104 start: 2.1.1 execute-qemu (timeout 00:05:00) [common]
186 22:57:51.286480 Extending command line for qcow2 test overlay
187 22:57:51.287123 Pulling docker image
188 22:57:51.287295 cmd: ['docker', 'pull', 'kernelci/qemu']
189 22:57:51.287437 Calling: 'nice' 'docker' 'pull' 'kernelci/qemu'
190 22:57:51.452975 >> Using default tag: latest
191 22:57:52.554884 >> latest: Pulling from kernelci/qemu
192 22:57:52.594415 >> Digest: sha256:fc85786d1b429cf64a5683fdc5d697be0f1ce54a15ccbe3e596ab02286b2b909
193 22:57:52.594673 >> Status: Image is up to date for kernelci/qemu:latest
194 22:57:52.627674 >> docker.io/kernelci/qemu:latest
195 22:57:52.630826 Returned 0 in 1 seconds
196 22:57:52.760068 Boot command: docker run --network=host --cap-add=NET_ADMIN --interactive --tty --rm --init --name=lava-docker-qemu-566315-2.1.1-0og6kndn0a --mount=type=bind,source=/var/lib/lava/dispatcher/tmp,destination=/var/lib/lava/dispatcher/tmp kernelci/qemu qemu-system-aarch64 -cpu max,pauth-impdef=on -machine virt,gic-version=3,mte=on,accel=tcg -nographic -net nic,model=virtio,macaddr=52:54:00:12:34:58 -net user -m 1g -monitor none -kernel /var/lib/lava/dispatcher/tmp/566315/deployimages-_2fpvrk7/kernel/Image -append "console=ttyAMA0,115200 root=/dev/ram0 debug verbose console_msg_format=syslog earlycon" -initrd /var/lib/lava/dispatcher/tmp/566315/deployimages-_2fpvrk7/ramdisk/rootfs.cpio.gz -drive format=qcow2,file=/var/lib/lava/dispatcher/tmp/566315/apply-overlay-guest-gu5fump_/lava-guest.qcow2,media=disk,if=virtio,id=lavatest
197 22:57:52.880919 started a shell command
198 22:57:52.881609 end: 2.1.1 execute-qemu (duration 00:00:02) [common]
199 22:57:52.881834 end: 2.1 boot-qemu-image (duration 00:00:02) [common]
200 22:57:52.882023 start: 2.2 auto-login-action (timeout 00:04:58) [common]
201 22:57:52.882211 Setting prompt string to ['Linux version [0-9]']
202 22:57:52.882361 auto-login-action: Wait for prompt ['Linux version [0-9]'] (timeout 00:05:00)
203 22:57:57.043741 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x000f0510]
204 22:57:57.044385 [ 0.000000] Linux version 6.1.31 (KernelCI@build-j1612582-arm64-gcc-10-defconfig-arm64-chromebook-7xwc5) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Mon Jun 5 22:41:02 UTC 2023
205 22:57:57.044773 start: 2.2.1 login-action (timeout 00:04:54) [common]
206 22:57:57.044896 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
207 22:57:57.045031 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
208 22:57:57.045154 Using line separator: #'\n'#
209 22:57:57.045257 No login prompt set.
210 22:57:57.045365 Parsing kernel messages
211 22:57:57.045457 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
212 22:57:57.045632 [login-action] Waiting for messages, (timeout 00:04:54)
213 22:57:57.046595 [ 0.000000] random: crng init done
214 22:57:57.046704 [ 0.000000] Machine model: linux,dummy-virt
215 22:57:57.046795 [ 0.000000] efi: UEFI not found.
216 22:57:57.046879 [ 0.000000] earlycon: pl11 at MMIO 0x0000000009000000 (options '')
217 22:57:57.046965 [ 0.000000] printk: bootconsole [pl11] enabled
218 22:57:57.048944 [ 0.000000] NUMA: No NUMA configuration found
219 22:57:57.049365 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000007fffffff]
220 22:57:57.050082 [ 0.000000] NUMA: NODE_DATA [mem 0x7fdf3a00-0x7fdf5fff]
221 22:57:57.052209 [ 0.000000] Zone ranges:
222 22:57:57.053182 [ 0.000000] DMA [mem 0x0000000040000000-0x000000007fffffff]
223 22:57:57.053418 [ 0.000000] DMA32 empty
224 22:57:57.053640 [ 0.000000] Normal empty
225 22:57:57.053855 [ 0.000000] Movable zone start for each node
226 22:57:57.054028 [ 0.000000] Early memory node ranges
227 22:57:57.054169 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000007fffffff]
228 22:57:57.054318 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000007fffffff]
229 22:57:57.069420 [ 0.000000] cma: Reserved 32 MiB at 0x000000007cc00000
230 22:57:57.070484 [ 0.000000] psci: probing for conduit method from DT.
231 22:57:57.070808 [ 0.000000] psci: PSCIv1.1 detected in firmware.
232 22:57:57.070913 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
233 22:57:57.071019 [ 0.000000] psci: Trusted OS migration not required
234 22:57:57.071108 [ 0.000000] psci: SMC Calling Convention v1.0
235 22:57:57.073350 [ 0.000000] percpu: Embedded 21 pages/cpu s45224 r8192 d32600 u86016
236 22:57:57.073948 [ 0.000000] pcpu-alloc: s45224 r8192 d32600 u86016 alloc=21*4096
237 22:57:57.074070 [ 0.000000] pcpu-alloc: [0] 0
238 22:57:57.075619 [ 0.000000] Detected PIPT I-cache on CPU0
239 22:57:57.080916 [ 0.000000] CPU features: detected: Address authentication (IMP DEF algorithm)
240 22:57:57.081508 [ 0.000000] CPU features: detected: GIC system register CPU interface
241 22:57:57.082041 [ 0.000000] CPU features: detected: Hardware dirty bit management
242 22:57:57.082209 [ 0.000000] CPU features: detected: Memory Tagging Extension
243 22:57:57.082371 [ 0.000000] CPU features: detected: Asymmetric MTE Tag Check Fault
244 22:57:57.082504 [ 0.000000] CPU features: detected: Spectre-v4
245 22:57:57.086339 [ 0.000000] alternatives: applying boot alternatives
246 22:57:57.089331 [ 0.000000] Fallback order for Node 0: 0
247 22:57:57.089462 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 258048
248 22:57:57.089559 [ 0.000000] Policy zone: DMA
249 22:57:57.090106 [ 0.000000] Kernel command line: console=ttyAMA0,115200 root=/dev/ram0 debug verbose console_msg_format=syslog earlycon
250 22:57:57.092703 <5>[ 0.000000] Unknown kernel command line parameters \"verbose\", will be passed to user space.
251 22:57:57.095662 <6>[ 0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
252 22:57:57.096097 <6>[ 0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
253 22:57:57.096532 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
254 22:57:57.106184 <6>[ 0.000000] Memory: 862480K/1048576K available (17984K kernel code, 4098K rwdata, 14068K rodata, 8384K init, 615K bss, 153328K reserved, 32768K cma-reserved)
255 22:57:57.111900 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
256 22:57:57.119283 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
257 22:57:57.119522 <6>[ 0.000000] rcu: RCU event tracing is enabled.
258 22:57:57.119640 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=1.
259 22:57:57.119766 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
260 22:57:57.119877 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
261 22:57:57.120452 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
262 22:57:57.120577 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
263 22:57:57.121659 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
264 22:57:57.128712 <6>[ 0.000000] GICv3: 224 SPIs implemented
265 22:57:57.129047 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
266 22:57:57.130453 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
267 22:57:57.130760 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
268 22:57:57.131555 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x00000000080a0000
269 22:57:57.136289 <6>[ 0.000000] ITS [mem 0x08080000-0x0809ffff]
270 22:57:57.137079 <6>[ 0.000000] ITS@0x0000000008080000: allocated 8192 Devices @43030000 (indirect, esz 8, psz 64K, shr 1)
271 22:57:57.137512 <6>[ 0.000000] ITS@0x0000000008080000: allocated 8192 Interrupt Collections @43040000 (flat, esz 8, psz 64K, shr 1)
272 22:57:57.138007 <6>[ 0.000000] GICv3: using LPI property table @0x0000000043050000
273 22:57:57.138551 <6>[ 0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000043060000
274 22:57:57.139962 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
275 22:57:57.148398 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 62.50MHz (virt).
276 22:57:57.148822 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0x1ffffffffffffff max_cycles: 0x1cd42e208c, max_idle_ns: 881590405314 ns
277 22:57:57.149562 <6>[ 0.000076] sched_clock: 57 bits at 63MHz, resolution 16ns, wraps every 4398046511096ns
278 22:57:57.167480 <6>[ 0.015398] Console: colour dummy device 80x25
279 22:57:57.171646 <6>[ 0.021620] Calibrating delay loop (skipped), value calculated using timer frequency.. 125.00 BogoMIPS (lpj=250000)
280 22:57:57.172054 <6>[ 0.022775] pid_max: default: 32768 minimum: 301
281 22:57:57.173307 <6>[ 0.024034] LSM: Security Framework initializing
282 22:57:57.177859 <6>[ 0.028393] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
283 22:57:57.178034 <6>[ 0.028655] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
284 22:57:57.211936 <4>[ 0.062396] cacheinfo: Unable to detect cache hierarchy for CPU 0
285 22:57:57.218205 <6>[ 0.068738] cblist_init_generic: Setting adjustable number of callback queues.
286 22:57:57.218395 <6>[ 0.069072] cblist_init_generic: Setting shift to 0 and lim to 1.
287 22:57:57.219073 <6>[ 0.069623] cblist_init_generic: Setting shift to 0 and lim to 1.
288 22:57:57.220837 <6>[ 0.071392] rcu: Hierarchical SRCU implementation.
289 22:57:57.220965 <6>[ 0.071577] rcu: Max phase no-delay instances is 1000.
290 22:57:57.225796 <6>[ 0.076312] Platform MSI: its@8080000 domain created
291 22:57:57.227528 <6>[ 0.077917] PCI/MSI: /intc@8000000/its@8080000 domain created
292 22:57:57.227892 <6>[ 0.078513] fsl-mc MSI: its@8080000 domain created
293 22:57:57.231066 <6>[ 0.081645] EFI services will not be available.
294 22:57:57.232112 <6>[ 0.082682] smp: Bringing up secondary CPUs ...
295 22:57:57.232237 <6>[ 0.082938] smp: Brought up 1 node, 1 CPU
296 22:57:57.232583 <6>[ 0.083096] SMP: Total of 1 processors activated.
297 22:57:57.232774 <6>[ 0.083475] CPU features: detected: Branch Target Identification
298 22:57:57.233144 <6>[ 0.083704] CPU features: detected: 32-bit EL0 Support
299 22:57:57.233255 <6>[ 0.083886] CPU features: detected: 32-bit EL1 Support
300 22:57:57.233361 <6>[ 0.084027] CPU features: detected: ARMv8.4 Translation Table Level
301 22:57:57.233694 <6>[ 0.084223] CPU features: detected: Data cache clean to the PoU not required for I/D coherence
302 22:57:57.234028 <6>[ 0.084525] CPU features: detected: Common not Private translations
303 22:57:57.234143 <6>[ 0.084703] CPU features: detected: CRC32 instructions
304 22:57:57.234253 <6>[ 0.084965] CPU features: detected: E0PD
305 22:57:57.234600 <6>[ 0.085169] CPU features: detected: Generic authentication (IMP DEF algorithm)
306 22:57:57.234721 <6>[ 0.085375] CPU features: detected: RCpc load-acquire (LDAPR)
307 22:57:57.235067 <6>[ 0.085577] CPU features: detected: LSE atomic instructions
308 22:57:57.235192 <6>[ 0.085789] CPU features: detected: Privileged Access Never
309 22:57:57.235306 <6>[ 0.085955] CPU features: detected: RAS Extension Support
310 22:57:57.235420 <6>[ 0.086111] CPU features: detected: Random Number Generator
311 22:57:57.235548 <6>[ 0.086275] CPU features: detected: Speculation barrier (SB)
312 22:57:57.235960 <6>[ 0.086461] CPU features: detected: Stage-2 Force Write-Back
313 22:57:57.236067 <6>[ 0.086652] CPU features: detected: TLB range maintenance instructions
314 22:57:57.236409 <6>[ 0.086900] CPU features: detected: Scalable Matrix Extension
315 22:57:57.236516 <6>[ 0.087115] CPU features: detected: FA64
316 22:57:57.236619 <6>[ 0.087260] CPU features: detected: Speculative Store Bypassing Safe (SSBS)
317 22:57:57.236963 <6>[ 0.087479] CPU features: detected: Scalable Vector Extension
318 22:57:57.249158 <6>[ 0.097244] SVE: maximum available vector length 256 bytes per vector
319 22:57:57.249867 <6>[ 0.100401] SVE: default vector length 64 bytes per vector
320 22:57:57.251904 <6>[ 0.102458] SME: minimum available vector length 16 bytes per vector
321 22:57:57.252035 <6>[ 0.102677] SME: maximum available vector length 256 bytes per vector
322 22:57:57.252150 <6>[ 0.102887] SME: default vector length 32 bytes per vector
323 22:57:57.252531 <6>[ 0.103337] CPU: All CPU(s) started at EL1
324 22:57:57.253213 <6>[ 0.103717] alternatives: applying system-wide alternatives
325 22:57:57.306928 <6>[ 0.157450] devtmpfs: initialized
326 22:57:57.327097 <6>[ 0.177514] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
327 22:57:57.328716 <6>[ 0.179160] futex hash table entries: 256 (order: 2, 16384 bytes, linear)
328 22:57:57.333671 <6>[ 0.184388] pinctrl core: initialized pinctrl subsystem
329 22:57:57.344992 <6>[ 0.195709] DMI not present or invalid.
330 22:57:57.354616 <6>[ 0.205031] NET: Registered PF_NETLINK/PF_ROUTE protocol family
331 22:57:57.366467 <6>[ 0.216712] DMA: preallocated 128 KiB GFP_KERNEL pool for atomic allocations
332 22:57:57.367173 <6>[ 0.217598] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
333 22:57:57.367625 <6>[ 0.218081] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
334 22:57:57.368066 <6>[ 0.218591] audit: initializing netlink subsys (disabled)
335 22:57:57.373495 <5>[ 0.223901] audit: type=2000 audit(0.184:1): state=initialized audit_enabled=0 res=1
336 22:57:57.376218 <6>[ 0.226703] thermal_sys: Registered thermal governor 'step_wise'
337 22:57:57.377052 <6>[ 0.226774] thermal_sys: Registered thermal governor 'power_allocator'
338 22:57:57.377227 <6>[ 0.227498] cpuidle: using governor menu
339 22:57:57.377895 <6>[ 0.228480] NET: Registered PF_QIPCRTR protocol family
340 22:57:57.380863 <6>[ 0.231347] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
341 22:57:57.381326 <6>[ 0.232064] ASID allocator initialised with 65536 entries
342 22:57:57.387157 <6>[ 0.237722] Serial: AMBA PL011 UART driver
343 22:57:57.434627 <6>[ 0.285064] 9000000.pl011: ttyAMA0 at MMIO 0x9000000 (irq = 13, base_baud = 0) is a PL011 rev1
344 22:57:57.436291 <6>[ 0.286694] printk: console [ttyAMA0] enabled
345 22:57:57.436457 <6>[ 0.286694] printk: console [ttyAMA0] enabled
346 22:57:57.436668 <6>[ 0.287237] printk: bootconsole [pl11] disabled
347 22:57:57.436836 <6>[ 0.287237] printk: bootconsole [pl11] disabled
348 22:57:57.447470 <6>[ 0.298231] KASLR enabled
349 22:57:57.481439 <6>[ 0.332085] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
350 22:57:57.481826 <6>[ 0.332342] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
351 22:57:57.481955 <6>[ 0.332588] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
352 22:57:57.482082 <6>[ 0.332806] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
353 22:57:57.482435 <6>[ 0.332997] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
354 22:57:57.482795 <6>[ 0.333366] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
355 22:57:57.482914 <6>[ 0.333549] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
356 22:57:57.483045 <6>[ 0.333742] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
357 22:57:57.492619 <6>[ 0.343316] ACPI: Interpreter disabled.
358 22:57:57.500874 <6>[ 0.351557] iommu: Default domain type: Translated
359 22:57:57.501246 <6>[ 0.351754] iommu: DMA domain TLB invalidation policy: strict mode
360 22:57:57.503175 <5>[ 0.353944] SCSI subsystem initialized
361 22:57:57.504080 <7>[ 0.354868] libata version 3.00 loaded.
362 22:57:57.505701 <6>[ 0.356249] usbcore: registered new interface driver usbfs
363 22:57:57.506062 <6>[ 0.356675] usbcore: registered new interface driver hub
364 22:57:57.506429 <6>[ 0.357009] usbcore: registered new device driver usb
365 22:57:57.509819 <6>[ 0.360395] pps_core: LinuxPPS API ver. 1 registered
366 22:57:57.509945 <6>[ 0.360571] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
367 22:57:57.510284 <6>[ 0.360951] PTP clock support registered
368 22:57:57.511067 <6>[ 0.361609] EDAC MC: Ver: 3.0.0
369 22:57:57.516748 <6>[ 0.367503] FPGA manager framework
370 22:57:57.517969 <6>[ 0.368363] Advanced Linux Sound Architecture Driver Initialized.
371 22:57:57.527053 <6>[ 0.377770] vgaarb: loaded
372 22:57:57.531188 <6>[ 0.381651] clocksource: Switched to clocksource arch_sys_counter
373 22:57:57.533704 <5>[ 0.384473] VFS: Disk quotas dquot_6.6.0
374 22:57:57.534309 <6>[ 0.384811] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
375 22:57:57.536514 <6>[ 0.387301] pnp: PnP ACPI: disabled
376 22:57:57.554470 <6>[ 0.405114] NET: Registered PF_INET protocol family
377 22:57:57.557028 <6>[ 0.407555] IP idents hash table entries: 16384 (order: 5, 131072 bytes, linear)
378 22:57:57.562241 <6>[ 0.412712] tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes, linear)
379 22:57:57.562445 <6>[ 0.413037] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
380 22:57:57.562803 <6>[ 0.413297] TCP established hash table entries: 8192 (order: 4, 65536 bytes, linear)
381 22:57:57.563150 <6>[ 0.413820] TCP bind hash table entries: 8192 (order: 6, 262144 bytes, linear)
382 22:57:57.563638 <6>[ 0.414370] TCP: Hash tables configured (established 8192 bind 8192)
383 22:57:57.564790 <6>[ 0.415497] UDP hash table entries: 512 (order: 2, 16384 bytes, linear)
384 22:57:57.565129 <6>[ 0.415854] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear)
385 22:57:57.566240 <6>[ 0.416987] NET: Registered PF_UNIX/PF_LOCAL protocol family
386 22:57:57.568549 <6>[ 0.419323] RPC: Registered named UNIX socket transport module.
387 22:57:57.568895 <6>[ 0.419508] RPC: Registered udp transport module.
388 22:57:57.568997 <6>[ 0.419626] RPC: Registered tcp transport module.
389 22:57:57.569106 <6>[ 0.419739] RPC: Registered tcp NFSv4.1 backchannel transport module.
390 22:57:57.569215 <6>[ 0.419972] PCI: CLS 0 bytes, default 64
391 22:57:57.573671 <6>[ 0.424436] Unpacking initramfs...
392 22:57:57.584746 <6>[ 0.435230] hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 counters available
393 22:57:57.585410 <6>[ 0.435982] kvm [1]: HYP mode not available
394 22:57:57.588793 <5>[ 0.439566] Initialise system trusted keyrings
395 22:57:57.595625 <6>[ 0.446292] workingset: timestamp_bits=42 max_order=18 bucket_order=0
396 22:57:57.630578 <6>[ 0.481211] squashfs: version 4.0 (2009/01/31) Phillip Lougher
397 22:57:57.640125 <5>[ 0.490804] NFS: Registering the id_resolver key type
398 22:57:57.640583 <5>[ 0.491221] Key type id_resolver registered
399 22:57:57.640710 <5>[ 0.491387] Key type id_legacy registered
400 22:57:57.641388 <6>[ 0.491920] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
401 22:57:57.641629 <6>[ 0.492207] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
402 22:57:57.643124 <6>[ 0.493651] 9p: Installing v9fs 9p2000 file system support
403 22:57:57.708556 <5>[ 0.559125] Key type asymmetric registered
404 22:57:57.709223 <5>[ 0.559374] Asymmetric key parser 'x509' registered
405 22:57:57.709444 <6>[ 0.559889] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
406 22:57:57.709694 <6>[ 0.560224] io scheduler mq-deadline registered
407 22:57:57.709889 <6>[ 0.560464] io scheduler kyber registered
408 22:57:57.787319 <6>[ 0.633280] pl061_gpio 9030000.pl061: PL061 GPIO chip registered
409 22:57:57.806681 <6>[ 0.656906] pci-host-generic 4010000000.pcie: host bridge /pcie@10000000 ranges:
410 22:57:57.812322 <6>[ 0.662557] pci-host-generic 4010000000.pcie: IO 0x003eff0000..0x003effffff -> 0x0000000000
411 22:57:57.813023 <6>[ 0.663607] pci-host-generic 4010000000.pcie: MEM 0x0010000000..0x003efeffff -> 0x0010000000
412 22:57:57.813611 <6>[ 0.664033] pci-host-generic 4010000000.pcie: MEM 0x8000000000..0xffffffffff -> 0x8000000000
413 22:57:57.814376 <4>[ 0.664955] pci-host-generic 4010000000.pcie: Memory resource size exceeds max for 32 bits
414 22:57:57.820125 <6>[ 0.670278] pci-host-generic 4010000000.pcie: ECAM at [mem 0x4010000000-0x401fffffff] for [bus 00-ff]
415 22:57:57.822095 <6>[ 0.672406] pci-host-generic 4010000000.pcie: PCI host bridge to bus 0000:00
416 22:57:57.822698 <6>[ 0.673245] pci_bus 0000:00: root bus resource [bus 00-ff]
417 22:57:57.827050 <6>[ 0.677525] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
418 22:57:57.827209 <6>[ 0.677836] pci_bus 0000:00: root bus resource [mem 0x10000000-0x3efeffff]
419 22:57:57.827587 <6>[ 0.678062] pci_bus 0000:00: root bus resource [mem 0x8000000000-0xffffffffff]
420 22:57:57.829616 <6>[ 0.680163] pci 0000:00:00.0: [1b36:0008] type 00 class 0x060000
421 22:57:57.843321 <6>[ 0.693783] pci 0000:00:01.0: [1af4:1000] type 00 class 0x020000
422 22:57:57.843686 <6>[ 0.694386] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x001f]
423 22:57:57.844015 <6>[ 0.694669] pci 0000:00:01.0: reg 0x14: [mem 0x00000000-0x00000fff]
424 22:57:57.844607 <6>[ 0.695010] pci 0000:00:01.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit pref]
425 22:57:57.844731 <6>[ 0.695384] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x0003ffff pref]
426 22:57:57.845846 <6>[ 0.696439] pci 0000:00:02.0: [1af4:1001] type 00 class 0x010000
427 22:57:57.846215 <6>[ 0.696724] pci 0000:00:02.0: reg 0x10: [io 0x0000-0x007f]
428 22:57:57.846539 <6>[ 0.696957] pci 0000:00:02.0: reg 0x14: [mem 0x00000000-0x00000fff]
429 22:57:57.846661 <6>[ 0.697243] pci 0000:00:02.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit pref]
430 22:57:57.859101 <6>[ 0.709634] pci 0000:00:01.0: BAR 6: assigned [mem 0x10000000-0x1003ffff pref]
431 22:57:57.859739 <6>[ 0.710331] pci 0000:00:01.0: BAR 4: assigned [mem 0x8000000000-0x8000003fff 64bit pref]
432 22:57:57.860304 <6>[ 0.710761] pci 0000:00:02.0: BAR 4: assigned [mem 0x8000004000-0x8000007fff 64bit pref]
433 22:57:57.860421 <6>[ 0.711108] pci 0000:00:01.0: BAR 1: assigned [mem 0x10040000-0x10040fff]
434 22:57:57.860964 <6>[ 0.711419] pci 0000:00:02.0: BAR 1: assigned [mem 0x10041000-0x10041fff]
435 22:57:57.861078 <6>[ 0.711691] pci 0000:00:02.0: BAR 0: assigned [io 0x1000-0x107f]
436 22:57:57.861412 <6>[ 0.711972] pci 0000:00:01.0: BAR 0: assigned [io 0x1080-0x109f]
437 22:57:57.879879 <6>[ 0.730648] EINJ: ACPI disabled.
438 22:57:57.975807 <6>[ 0.826282] virtio-pci 0000:00:01.0: enabling device (0000 -> 0003)
439 22:57:57.978635 <6>[ 0.829138] virtio-pci 0000:00:02.0: enabling device (0000 -> 0003)
440 22:57:58.013233 <6>[ 0.863779] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
441 22:57:58.028948 <6>[ 0.879611] SuperH (H)SCI(F) driver initialized
442 22:57:58.030323 <6>[ 0.881048] msm_serial: driver initialized
443 22:57:58.068294 <4>[ 0.918897] cacheinfo: Unable to detect cache hierarchy for CPU 0
444 22:57:58.097796 <6>[ 0.948471] loop: module loaded
445 22:57:58.103063 <6>[ 0.953557] virtio_blk virtio1: 1/0/0 default/read/poll queues
446 22:57:58.120382 <5>[ 0.970803] virtio_blk virtio1: [vda] 1048576 512-byte logical blocks (537 MB/512 MiB)
447 22:57:58.151953 <6>[ 1.002666] megasas: 07.719.03.00-rc1
448 22:57:58.167963 <5>[ 1.018402] physmap-flash 0.flash: physmap platform flash device: [mem 0x00000000-0x03ffffff]
449 22:57:58.169444 <6>[ 1.019915] 0.flash: Found 2 x16 devices at 0x0 in 32-bit bank. Manufacturer ID 0x000000 Chip ID 0x000000
450 22:57:58.169887 <6>[ 1.020570] Intel/Sharp Extended Query Table at 0x0031
451 22:57:58.174965 <6>[ 1.025505] Using buffer write method
452 22:57:58.175315 <7>[ 1.025976] erase region 0: offset=0x0,size=0x40000,blocks=256
453 22:57:58.175886 <5>[ 1.026366] physmap-flash 0.flash: physmap platform flash device: [mem 0x04000000-0x07ffffff]
454 22:57:58.176575 <6>[ 1.027039] 0.flash: Found 2 x16 devices at 0x0 in 32-bit bank. Manufacturer ID 0x000000 Chip ID 0x000000
455 22:57:58.176788 <6>[ 1.027383] Intel/Sharp Extended Query Table at 0x0031
456 22:57:58.177279 <6>[ 1.027945] Using buffer write method
457 22:57:58.177524 <7>[ 1.028093] erase region 0: offset=0x0,size=0x40000,blocks=256
458 22:57:58.177781 <5>[ 1.028346] Concatenating MTD devices:
459 22:57:58.177978 <5>[ 1.028497] (0): \"0.flash\"
460 22:57:58.178147 <5>[ 1.028620] (1): \"0.flash\"
461 22:57:58.178274 <5>[ 1.028727] into device \"0.flash\"
462 22:58:02.900552 <6>[ 5.751161] Freeing initrd memory: 86888K
463 22:58:03.017616 <6>[ 5.868222] tun: Universal TUN/TAP device driver, 1.6
464 22:58:03.027502 <6>[ 5.878175] thunder_xcv, ver 1.0
465 22:58:03.027935 <6>[ 5.878490] thunder_bgx, ver 1.0
466 22:58:03.028056 <6>[ 5.878750] nicpf, ver 1.0
467 22:58:03.031672 <6>[ 5.882200] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
468 22:58:03.031785 <6>[ 5.882413] hns3: Copyright (c) 2017 Huawei Corporation.
469 22:58:03.032147 <6>[ 5.882900] hclge is initializing
470 22:58:03.032504 <6>[ 5.883168] e1000: Intel(R) PRO/1000 Network Driver
471 22:58:03.032628 <6>[ 5.883344] e1000: Copyright (c) 1999-2006 Intel Corporation.
472 22:58:03.032978 <6>[ 5.883702] e1000e: Intel(R) PRO/1000 Network Driver
473 22:58:03.033311 <6>[ 5.883875] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
474 22:58:03.033681 <6>[ 5.884181] igb: Intel(R) Gigabit Ethernet Network Driver
475 22:58:03.033796 <6>[ 5.884388] igb: Copyright (c) 2007-2014 Intel Corporation.
476 22:58:03.034126 <6>[ 5.884705] igbvf: Intel(R) Gigabit Virtual Function Network Driver
477 22:58:03.034248 <6>[ 5.884942] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
478 22:58:03.035835 <6>[ 5.886356] sky2: driver version 1.30
479 22:58:03.040523 <6>[ 5.890984] VFIO - User Level meta-driver version: 0.3
480 22:58:03.049818 <6>[ 5.900289] usbcore: registered new interface driver usb-storage
481 22:58:03.050551 <6>[ 5.901057] usbcore: registered new device driver onboard-usb-hub
482 22:58:03.059426 <6>[ 5.910162] rtc-pl031 9010000.pl031: registered as rtc0
483 22:58:03.060604 <6>[ 5.910922] rtc-pl031 9010000.pl031: setting system clock to 2023-06-05T22:58:03 UTC (1686005883)
484 22:58:03.062678 <6>[ 5.913268] i2c_dev: i2c /dev entries driver
485 22:58:03.080076 <6>[ 5.930524] sdhci: Secure Digital Host Controller Interface driver
486 22:58:03.080307 <6>[ 5.930690] sdhci: Copyright(c) Pierre Ossman
487 22:58:03.082094 <6>[ 5.932554] Synopsys Designware Multimedia Card Interface Driver
488 22:58:03.084474 <6>[ 5.935050] sdhci-pltfm: SDHCI platform and OF driver helper
489 22:58:03.090033 <6>[ 5.940455] ledtrig-cpu: registered to indicate activity on CPUs
490 22:58:03.095665 <6>[ 5.946350] usbcore: registered new interface driver usbhid
491 22:58:03.096044 <6>[ 5.946520] usbhid: USB HID core driver
492 22:58:03.119808 <6>[ 5.970520] NET: Registered PF_PACKET protocol family
493 22:58:03.120958 <6>[ 5.971693] 9pnet: Installing 9P2000 support
494 22:58:03.121446 <5>[ 5.972078] Key type dns_resolver registered
495 22:58:03.122925 <6>[ 5.973488] registered taskstats version 1
496 22:58:03.123320 <5>[ 5.973866] Loading compiled-in X.509 certificates
497 22:58:03.144720 <6>[ 5.995154] input: gpio-keys as /devices/platform/gpio-keys/input/input0
498 22:58:03.151409 <6>[ 6.002171] ALSA device list:
499 22:58:03.151801 <6>[ 6.002343] No soundcards found.
500 22:58:03.154400 <6>[ 6.004933] uart-pl011 9000000.pl011: no DMA platform data
501 22:58:03.213139 <6>[ 6.063671] Freeing unused kernel memory: 8384K
502 22:58:03.214196 <6>[ 6.064872] Run /init as init process
503 22:58:03.214682 <7>[ 6.065053] with arguments:
504 22:58:03.214793 <7>[ 6.065182] /init
505 22:58:03.214881 <7>[ 6.065288] verbose
506 22:58:03.214984 <7>[ 6.065508] with environment:
507 22:58:03.215072 <7>[ 6.065633] HOME=/
508 22:58:03.215153 <7>[ 6.065714] TERM=linux
509 22:58:03.356170 <30>[ 6.206229] systemd[1]: systemd 247.3-7+deb11u2 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +ZSTD +SECCOMP +BLKID +ELFUTILS +KMOD +IDN2 -IDN +PCRE2 default-hierarchy=unified)
510 22:58:03.357028 <31>[ 6.207620] systemd[1]: No virtualization found in DMI
511 22:58:03.358108 <31>[ 6.208689] systemd[1]: UML virtualization not found in /proc/cpuinfo.
512 22:58:03.358470 <31>[ 6.209024] systemd[1]: No virtualization found in CPUID
513 22:58:03.358812 <31>[ 6.209326] systemd[1]: Virtualization XEN not found, /proc/xen does not exist
514 22:58:03.360143 <31>[ 6.210745] systemd[1]: Virtualization QEMU: \"fw-cfg\" present in /proc/device-tree/fw-cfg@9020000
515 22:58:03.360481 <31>[ 6.211142] systemd[1]: Found VM virtualization qemu
516 22:58:03.360840 <30>[ 6.211390] systemd[1]: Detected virtualization qemu.
517 22:58:03.360963 <30>[ 6.211724] systemd[1]: Detected architecture arm64.
518 22:58:03.361542 <31>[ 6.212078] systemd[1]: Detected initialized system, this is not the first boot.
519 22:58:03.365532
520 22:58:03.365984 Welcome to [1mDebian GNU/Linux 11 (bullseye)[0m!
521 22:58:03.366086
522 22:58:03.367943 <30>[ 6.218465] systemd[1]: Set hostname to <debian-bullseye-arm64>.
523 22:58:03.387665 <31>[ 6.237978] systemd[1]: Successfully added address 127.0.0.1 to loopback interface
524 22:58:03.388905 <31>[ 6.239381] systemd[1]: Failed to add address ::1 to loopback interface: Operation not supported
525 22:58:03.389397 <31>[ 6.239853] systemd[1]: Successfully brought loopback interface up
526 22:58:03.394225 <31>[ 6.244696] systemd[1]: Setting 'fs/file-max' to '9223372036854775807'.
527 22:58:03.406698 <31>[ 6.257119] systemd[1]: Found cgroup2 on /sys/fs/cgroup/, full unified hierarchy
528 22:58:03.407252 <31>[ 6.257686] systemd[1]: Unified cgroup hierarchy is located at /sys/fs/cgroup.
529 22:58:03.450683 <31>[ 6.301002] systemd[1]: Got EBADF when using BPF_F_ALLOW_MULTI, which indicates it is supported. Yay!
530 22:58:03.452128 <31>[ 6.302554] systemd[1]: Controller 'cpu' supported: yes
531 22:58:03.452344 <31>[ 6.302779] systemd[1]: Controller 'cpuacct' supported: no
532 22:58:03.452562 <31>[ 6.302974] systemd[1]: Controller 'cpuset' supported: yes
533 22:58:03.452738 <31>[ 6.303190] systemd[1]: Controller 'io' supported: yes
534 22:58:03.452938 <31>[ 6.303388] systemd[1]: Controller 'blkio' supported: no
535 22:58:03.453114 <31>[ 6.303605] systemd[1]: Controller 'memory' supported: yes
536 22:58:03.453312 <31>[ 6.303814] systemd[1]: Controller 'devices' supported: no
537 22:58:03.453492 <31>[ 6.304018] systemd[1]: Controller 'pids' supported: yes
538 22:58:03.453703 <31>[ 6.304214] systemd[1]: Controller 'bpf-firewall' supported: yes
539 22:58:03.453890 <31>[ 6.304505] systemd[1]: Controller 'bpf-devices' supported: yes
540 22:58:03.455502 <31>[ 6.305967] systemd[1]: Set up TFD_TIMER_CANCEL_ON_SET timerfd.
541 22:58:03.455732 <31>[ 6.306372] systemd[1]: Failed to stat /etc/localtime, ignoring: No such file or directory
542 22:58:03.456243 <31>[ 6.306919] systemd[1]: /etc/localtime doesn't exist yet, watching /etc instead.
543 22:58:03.463882 <31>[ 6.314352] systemd[1]: Enabling (yes) showing of status (commandline).
544 22:58:03.471774 <31>[ 6.322226] systemd[1]: Successfully forked off '(sd-executor)' as PID 98.
545 22:58:03.480886 <31>[ 6.331361] systemd[98]: Successfully forked off '(direxec)' as PID 99.
546 22:58:03.483681 <31>[ 6.334200] systemd[98]: Successfully forked off '(direxec)' as PID 100.
547 22:58:03.485609 <31>[ 6.336071] systemd[98]: Successfully forked off '(direxec)' as PID 101.
548 22:58:03.499476 <31>[ 6.350078] systemd[98]: Successfully forked off '(direxec)' as PID 102.
549 22:58:03.501477 <31>[ 6.351999] systemd[98]: Successfully forked off '(direxec)' as PID 103.
550 22:58:03.689020 <31>[ 6.539582] systemd-fstab-generator[100]: Parsing /etc/fstab...
551 22:58:03.692020 <31>[ 6.542447] systemd-bless-boot-generator[99]: Skipping generator, not an EFI boot.
552 22:58:03.703169 <31>[ 6.553790] systemd-getty-generator[101]: Automatically adding serial getty for /dev/ttyAMA0.
553 22:58:03.704601 <31>[ 6.555139] systemd-getty-generator[101]: SELinux enabled state cached to: disabled
554 22:58:03.707662 <31>[ 6.557958] systemd-fstab-generator[100]: Found entry what=/dev/disk/by-uuid/ffe0be16-960b-4f4f-abe2-c028c6995c76 where=/ type=ext4 makefs=no growfs=no noauto=no nofail=no
555 22:58:03.710183 <31>[ 6.560492] systemd-fstab-generator[100]: Checking was requested for /dev/disk/by-uuid/ffe0be16-960b-4f4f-abe2-c028c6995c76, but fsck.ext4 does not exist.
556 22:58:03.725568 <31>[ 6.575985] systemd-fstab-generator[100]: SELinux enabled state cached to: disabled
557 22:58:03.730756 <31>[ 6.581217] systemd[98]: /usr/lib/systemd/system-generators/systemd-run-generator succeeded.
558 22:58:03.731501 <31>[ 6.582044] systemd[98]: /usr/lib/systemd/system-generators/systemd-bless-boot-generator succeeded.
559 22:58:03.736510 <31>[ 6.586924] systemd[98]: /usr/lib/systemd/system-generators/systemd-fstab-generator succeeded.
560 22:58:03.736798 <31>[ 6.587425] systemd[98]: /usr/lib/systemd/system-generators/systemd-getty-generator succeeded.
561 22:58:03.737290 <31>[ 6.587867] systemd[98]: /usr/lib/systemd/system-generators/systemd-veritysetup-generator succeeded.
562 22:58:03.740939 <31>[ 6.591641] systemd[1]: (sd-executor) succeeded.
563 22:58:03.743631 <31>[ 6.594157] systemd[1]: Looking for unit files in (higher priority first):
564 22:58:03.743801 <31>[ 6.594469] systemd[1]: /etc/systemd/system.control
565 22:58:03.744170 <31>[ 6.594680] systemd[1]: /run/systemd/system.control
566 22:58:03.744298 <31>[ 6.594880] systemd[1]: /run/systemd/transient
567 22:58:03.744432 <31>[ 6.595060] systemd[1]: /run/systemd/generator.early
568 22:58:03.744542 <31>[ 6.595241] systemd[1]: /etc/systemd/system
569 22:58:03.745059 <31>[ 6.595414] systemd[1]: /etc/systemd/system.attached
570 22:58:03.745294 <31>[ 6.595622] systemd[1]: /run/systemd/system
571 22:58:03.745559 <31>[ 6.595795] systemd[1]: /run/systemd/system.attached
572 22:58:03.745811 <31>[ 6.595981] systemd[1]: /run/systemd/generator
573 22:58:03.746022 <31>[ 6.596152] systemd[1]: /usr/local/lib/systemd/system
574 22:58:03.746217 <31>[ 6.596367] systemd[1]: /lib/systemd/system
575 22:58:03.746354 <31>[ 6.596553] systemd[1]: /usr/lib/systemd/system
576 22:58:03.746474 <31>[ 6.596725] systemd[1]: /run/systemd/generator.late
577 22:58:03.782484 <31>[ 6.632897] systemd[1]: Modification times have changed, need to update cache.
578 22:58:03.784578 <31>[ 6.635085] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.network1.service → systemd-networkd.service
579 22:58:03.785766 <31>[ 6.636326] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.timesync1.service → systemd-timesyncd.service
580 22:58:03.786586 <31>[ 6.637044] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.resolve1.service → systemd-resolved.service
581 22:58:03.787634 <31>[ 6.638262] systemd[1]: unit_file_build_name_map: normal unit file: /run/systemd/generator/-.mount
582 22:58:03.788487 <31>[ 6.639086] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald@.service
583 22:58:03.789011 <31>[ 6.639410] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/console-getty.service
584 22:58:03.789209 <31>[ 6.639730] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/fstrim.timer
585 22:58:03.789480 <31>[ 6.640078] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-wall.path
586 22:58:03.790001 <31>[ 6.640390] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-rfkill.service
587 22:58:03.790183 <31>[ 6.640710] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/poweroff.target
588 22:58:03.790777 <31>[ 6.641121] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network-pre.target
589 22:58:03.791755 <31>[ 6.642238] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel4.target → multi-user.target
590 22:58:03.791990 <31>[ 6.642582] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/suspend-then-hibernate.target
591 22:58:03.792523 <31>[ 6.642941] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network.target
592 22:58:03.793069 <31>[ 6.643560] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel5.target → graphical.target
593 22:58:03.793292 <31>[ 6.643885] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald.service
594 22:58:03.793890 <31>[ 6.644156] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-update-utmp-runlevel.service
595 22:58:03.794101 <31>[ 6.644473] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-root-fs.target
596 22:58:03.794292 <31>[ 6.644790] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/slices.target
597 22:58:03.795497 <31>[ 6.645757] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/kmod.service → systemd-modules-load.service
598 22:58:03.795660 <31>[ 6.646106] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-update-utmp.service
599 22:58:03.796565 <31>[ 6.646802] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel1.target → rescue.target
600 22:58:03.796755 <31>[ 6.647177] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/cryptsetup-pre.target
601 22:58:03.796940 <31>[ 6.647520] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update-pre.target
602 22:58:03.797461 <31>[ 6.647851] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/machine.slice
603 22:58:03.797658 <31>[ 6.648223] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-fs-pre.target
604 22:58:03.798085 <31>[ 6.648521] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-clean.service
605 22:58:03.798502 <31>[ 6.649138] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel3.target → multi-user.target
606 22:58:03.799530 <31>[ 6.650133] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.timedate1.service → systemd-timedated.service
607 22:58:03.799883 <31>[ 6.650501] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dbus.service
608 22:58:03.800237 <31>[ 6.650759] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/reboot.target
609 22:58:03.800585 <31>[ 6.651151] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-audit.socket
610 22:58:03.800965 <31>[ 6.651424] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty@.service
611 22:58:03.801071 <31>[ 6.651650] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/kexec.target
612 22:58:03.801418 <31>[ 6.651888] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-systemd\x2dcryptsetup.slice
613 22:58:03.801754 <31>[ 6.652168] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-timedated.service
614 22:58:03.801865 <31>[ 6.652426] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-root-device.target
615 22:58:03.802216 <31>[ 6.652706] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-parse-etc.service
616 22:58:03.802322 <31>[ 6.652982] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd.target
617 22:58:03.802676 <31>[ 6.653226] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_all.timer
618 22:58:03.803125 <31>[ 6.653793] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-binfmt.service
619 22:58:03.803474 <31>[ 6.654067] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/local-fs-pre.target
620 22:58:03.803822 <31>[ 6.654298] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_all.service
621 22:58:03.803915 <31>[ 6.654539] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/paths.target
622 22:58:03.804258 <31>[ 6.654769] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/modprobe@.service
623 22:58:03.804854 <31>[ 6.655304] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/rc.service → /dev/null
624 22:58:03.805228 <31>[ 6.655596] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty-static.service
625 22:58:03.805614 <31>[ 6.656283] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel2.target → multi-user.target
626 22:58:03.805990 <31>[ 6.656533] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-modules-load.service
627 22:58:03.806369 <31>[ 6.656936] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/suspend.target
628 22:58:03.806741 <31>[ 6.657193] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sys-kernel-debug.mount
629 22:58:03.807102 <31>[ 6.657711] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-sysusers.service
630 22:58:03.808185 <31>[ 6.658455] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/default.target → graphical.target
631 22:58:03.810273 <31>[ 6.658891] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-poweroff.service
632 22:58:03.810392 <31>[ 6.659245] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-switch-root.target
633 22:58:03.810492 <31>[ 6.659578] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-sysctl.service
634 22:58:03.810591 <31>[ 6.660268] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/procps.service → systemd-sysctl.service
635 22:58:03.810686 <31>[ 6.660527] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-time-wait-sync.service
636 22:58:03.810779 <31>[ 6.660793] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user@.service
637 22:58:03.811570 <31>[ 6.661845] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/udev.service → systemd-udevd.service
638 22:58:03.811850 <31>[ 6.662220] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update-cleanup.service
639 22:58:03.812091 <31>[ 6.662591] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/nss-lookup.target
640 22:58:03.812743 <31>[ 6.662955] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/umount.target
641 22:58:03.812998 <31>[ 6.663338] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-udevadm-cleanup-db.service
642 22:58:03.813263 <31>[ 6.663746] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sys-kernel-tracing.mount
643 22:58:03.813510 <31>[ 6.664096] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-initctl.socket
644 22:58:03.814016 <31>[ 6.664424] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-timesyncd.service
645 22:58:03.814214 <31>[ 6.664729] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald.socket
646 22:58:03.814432 <31>[ 6.665003] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/printer.target
647 22:58:03.814888 <31>[ 6.665281] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network-online.target
648 22:58:03.815341 <31>[ 6.665848] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/usb-gadget.target
649 22:58:03.815795 <31>[ 6.666163] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hybrid-sleep.service
650 22:58:03.816003 <31>[ 6.666498] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-reboot.service
651 22:58:03.816203 <31>[ 6.666816] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/quotaon.service
652 22:58:03.816872 <31>[ 6.667422] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/bluetooth.target
653 22:58:03.817513 <31>[ 6.667784] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rescue.service
654 22:58:03.817915 <31>[ 6.668125] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-backlight@.service
655 22:58:03.818285 <31>[ 6.668763] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/cryptdisks-early.service → /dev/null
656 22:58:03.818675 <31>[ 6.669113] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dev-hugepages.mount
657 22:58:03.819355 <31>[ 6.669850] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-cryptsetup.target
658 22:58:03.819760 <31>[ 6.670211] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-pstore.service
659 22:58:03.820537 <31>[ 6.670783] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/x11-common.service → /dev/null
660 22:58:03.821094 <31>[ 6.671402] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.locale1.service → systemd-localed.service
661 22:58:03.821343 <31>[ 6.671804] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/timers.target
662 22:58:03.821598 <31>[ 6.672122] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/proc-sys-fs-binfmt_misc.automount
663 22:58:03.822138 <31>[ 6.672480] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-console.service
664 22:58:03.822265 <31>[ 6.672868] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-rfkill.socket
665 22:58:03.822742 <31>[ 6.673221] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user.slice
666 22:58:03.823343 <31>[ 6.673882] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-setup.service
667 22:58:03.823920 <31>[ 6.674244] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-fsck-root.service
668 22:58:03.824056 <31>[ 6.674598] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-quotacheck.service
669 22:58:03.824616 <31>[ 6.674931] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-kexec.service
670 22:58:03.824851 <31>[ 6.675320] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/graphical.target
671 22:58:03.825100 <31>[ 6.675647] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-clean.timer
672 22:58:03.825628 <31>[ 6.675977] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/exit.target
673 22:58:03.825852 <31>[ 6.676299] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-fs.target
674 22:58:03.826089 <31>[ 6.676644] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-boot-system-token.service
675 22:58:03.826845 <31>[ 6.677183] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-varlink@.socket
676 22:58:03.827317 <31>[ 6.677793] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd.service
677 22:58:03.827554 <31>[ 6.678137] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rpcbind.target
678 22:58:03.828395 <31>[ 6.678884] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.hostname1.service → systemd-hostnamed.service
679 22:58:03.828654 <31>[ 6.679239] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/syslog.socket
680 22:58:03.828919 <31>[ 6.679526] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-user-sessions.service
681 22:58:03.829415 <31>[ 6.679844] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-volatile-root.service
682 22:58:03.829548 <31>[ 6.680127] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user-runtime-dir@.service
683 22:58:03.829910 <31>[ 6.680436] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/kmod-static-nodes.service
684 22:58:03.830282 <31>[ 6.680777] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-logind.service
685 22:58:03.830692 <31>[ 6.681118] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd-control.socket
686 22:58:03.831335 <31>[ 6.681793] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-bless-boot.service
687 22:58:03.831773 <31>[ 6.682167] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd.service
688 22:58:03.831969 <31>[ 6.682512] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journal-flush.service
689 22:58:03.832493 <31>[ 6.682888] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty-pre.target
690 22:58:03.832619 <31>[ 6.683250] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty.target
691 22:58:03.833229 <31>[ 6.683562] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-network-generator.service
692 22:58:03.833349 <31>[ 6.683956] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update.target
693 22:58:03.833699 <31>[ 6.684280] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/multi-user.target
694 22:58:03.834069 <31>[ 6.684572] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-suspend.service
695 22:58:03.834193 <31>[ 6.684835] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-initctl.service
696 22:58:03.834625 <31>[ 6.685146] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-cleanup.service
697 22:58:03.835132 <31>[ 6.685662] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/basic.target
698 22:58:03.835788 <31>[ 6.686010] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/emergency.target
699 22:58:03.835987 <31>[ 6.686377] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-suspend-then-hibernate.service
700 22:58:03.836189 <31>[ 6.686764] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hibernate-resume@.service
701 22:58:03.836665 <31>[ 6.687167] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd-kernel.socket
702 22:58:03.837202 <31>[ 6.687524] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-dev-log.socket
703 22:58:03.837430 <31>[ 6.687887] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-machine-id-commit.service
704 22:58:03.837681 <31>[ 6.688183] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/serial-getty@.service
705 22:58:03.837904 <31>[ 6.688508] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-switch-root.service
706 22:58:03.838162 <31>[ 6.688805] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_reap.service
707 22:58:03.838662 <31>[ 6.689099] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sockets.target
708 22:58:03.839357 <31>[ 6.689718] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/cryptdisks.service → /dev/null
709 22:58:03.839732 <31>[ 6.690101] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/hybrid-sleep.target
710 22:58:03.840352 <31>[ 6.690830] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.login1.service → systemd-logind.service
711 22:58:03.840747 <31>[ 6.691242] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sleep.target
712 22:58:03.841133 <31>[ 6.691557] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hibernate.service
713 22:58:03.841509 <31>[ 6.691929] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-halt.service
714 22:58:03.841888 <31>[ 6.692363] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/halt.target
715 22:58:03.842277 <31>[ 6.692780] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sigpwr.target
716 22:58:03.842664 <31>[ 6.693173] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-setup-dev.service
717 22:58:03.843291 <31>[ 6.693724] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sound.target
718 22:58:03.843420 <31>[ 6.694034] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/time-set.target
719 22:58:03.843787 <31>[ 6.694393] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udev-settle.service
720 22:58:03.844185 <31>[ 6.694728] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dbus.socket
721 22:58:03.844566 <31>[ 6.695204] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/hwclock.service → /dev/null
722 22:58:03.845193 <31>[ 6.695672] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/rcS.service → /dev/null
723 22:58:03.845569 <31>[ 6.696001] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/hibernate.target
724 22:58:03.846005 <31>[ 6.696357] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-random-seed.service
725 22:58:03.846125 <31>[ 6.696722] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/cryptsetup.target
726 22:58:03.846470 <31>[ 6.697043] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/boot-complete.target
727 22:58:03.847138 <31>[ 6.697609] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/blockdev@.target
728 22:58:03.847512 <31>[ 6.697983] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd-wait-online.service
729 22:58:04.259684 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m.
730 22:58:04.264371 [[0;32m OK [0m] Created slice [0;1;39msystem-modprobe.slice[0m.
731 22:58:04.268005 [[0;32m OK [0m] Created slice [0;1;39msystem-serial\x2dgetty.slice[0m.
732 22:58:04.271758 [[0;32m OK [0m] Created slice [0;1;39mUser and Session Slice[0m.
733 22:58:04.275729 [[0;32m OK [0m] Started [0;1;39mDispatch Password …ts to Console Directory Watch[0m.
734 22:58:04.277268 [[0;32m OK [0m] Started [0;1;39mForward Password R…uests to Wall Directory Watch[0m.
735 22:58:04.280021 [[0;32m OK [0m] Reached target [0;1;39mLocal Encrypted Volumes[0m.
736 22:58:04.281174 [[0;32m OK [0m] Reached target [0;1;39mPaths[0m.
737 22:58:04.281805 [[0;32m OK [0m] Reached target [0;1;39mRemote File Systems[0m.
738 22:58:04.282856 [[0;32m OK [0m] Reached target [0;1;39mSlices[0m.
739 22:58:04.283952 [[0;32m OK [0m] Reached target [0;1;39mSwap[0m.
740 22:58:04.287778 [[0;32m OK [0m] Listening on [0;1;39minitctl Compatibility Named Pipe[0m.
741 22:58:04.292065 [[0;32m OK [0m] Listening on [0;1;39mJournal Audit Socket[0m.
742 22:58:04.294865 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket (/dev/log)[0m.
743 22:58:04.297176 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket[0m.
744 22:58:04.299895 [[0;32m OK [0m] Listening on [0;1;39mNetwork Service Netlink Socket[0m.
745 22:58:04.302384 [[0;32m OK [0m] Listening on [0;1;39mudev Control Socket[0m.
746 22:58:04.304686 [[0;32m OK [0m] Listening on [0;1;39mudev Kernel Socket[0m.
747 22:58:04.332414 Mounting [0;1;39mHuge Pages File System[0m...
748 22:58:04.355664 Mounting [0;1;39mPOSIX Message Queue File System[0m...
749 22:58:04.392015 Mounting [0;1;39mKernel Debug File System[0m...
750 22:58:04.444957 Starting [0;1;39mLoad Kernel Module configfs[0m...
751 22:58:04.492249 Starting [0;1;39mLoad Kernel Module drm[0m...
752 22:58:04.552407 Starting [0;1;39mJournal Service[0m...
753 22:58:04.584489 Starting [0;1;39mLoad Kernel Modules[0m...
754 22:58:04.624521 Starting [0;1;39mRemount Root and Kernel File Systems[0m...
755 22:58:04.664326 Starting [0;1;39mColdplug All udev Devices[0m...
756 22:58:04.770811 [[0;32m OK [0m] Mounted [0;1;39mHuge Pages File System[0m.
757 22:58:04.789330 [[0;32m OK [0m] Mounted [0;1;39mPOSIX Message Queue File System[0m.
758 22:58:04.801311 [[0;32m OK [0m] Mounted [0;1;39mKernel Debug File System[0m.
759 22:58:04.860333 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module configfs[0m.
760 22:58:04.907996 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module drm[0m.
761 22:58:04.927609 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Modules[0m.
762 22:58:05.000376 Mounting [0;1;39mKernel Configuration File System[0m...
763 22:58:05.128231 Starting [0;1;39mApply Kernel Variables[0m...
764 22:58:05.197200 [[0;32m OK [0m] Mounted [0;1;39mKernel Configuration File System[0m.
765 22:58:05.242091 <47>[ 8.092389] systemd-journald[109]: SELinux enabled state cached to: disabled
766 22:58:05.257106 <47>[ 8.107739] systemd-journald[109]: Auditing in kernel turned off.
767 22:58:05.274089 <47>[ 8.124432] systemd-journald[109]: Found cgroup2 on /sys/fs/cgroup/, full unified hierarchy
768 22:58:05.340274 <47>[ 8.190468] systemd-journald[109]: Journal effective settings seal=no keyed_hash=no compress=yes compress_threshold_bytes=512B
769 22:58:05.342837 <47>[ 8.193073] systemd-journald[109]: Fixed min_use=3.8M max_use=19.3M max_size=2.4M min_size=512.0K keep_free=9.6M n_max_files=100
770 22:58:05.356192 [[0;1;31mFAILED[0m] Failed to start [0;1;39mRemount Root and Kernel File Systems[0m.
771 22:58:05.358032 <47>[ 8.208421] systemd-journald[109]: Reserving 333 entries in field hash table.
772 22:58:05.359481 See 'systemctl status systemd-remount-fs.service' for details.
773 22:58:05.391620 <47>[ 8.242199] systemd-journald[109]: Reserving 4408 entries in data hash table.
774 22:58:05.393479 <47>[ 8.244199] systemd-journald[109]: Vacuuming...
775 22:58:05.394482 <47>[ 8.245035] systemd-journald[109]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
776 22:58:05.400700 Starting [0;1;39mLoad/Save Random Seed[0m...
777 22:58:05.411197 <47>[ 8.261885] systemd-journald[109]: Flushing /dev/kmsg...
778 22:58:05.460511 Starting [0;1;39mCreate System Users[0m...
779 22:58:05.491855 [[0;32m OK [0m] Finished [0;1;39mApply Kernel Variables[0m.
780 22:58:05.607608 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Random Seed[0m.
781 22:58:05.788920 [[0;32m OK [0m] Finished [0;1;39mCreate System Users[0m.
782 22:58:05.824635 Starting [0;1;39mCreate Static Device Nodes in /dev[0m...
783 22:58:05.957209 <47>[ 8.807771] systemd-journald[109]: systemd-journald running as PID 109 for the system.
784 22:58:05.971366 [[0;32m OK [0m] Started [0;1;39mJournal Service[0m.
785 22:58:05.978955 <47>[ 8.829597] systemd-journald[109]: Sent READY=1 notification.
786 22:58:05.979498 <47>[ 8.830079] systemd-journald[109]: Sent WATCHDOG=1 notification.
787 22:58:06.020672 Starting [0;1;39mFlush Journal to Persistent Storage[0m...
788 22:58:06.024591 <47>[ 8.875148] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
789 22:58:06.051212 <47>[ 8.901747] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
790 22:58:06.067154 <47>[ 8.917767] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
791 22:58:06.083174 <47>[ 8.933718] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
792 22:58:06.101269 <47>[ 8.951862] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
793 22:58:06.104290 [[0;32m OK [0m] Finished [0;1;39mCreate Static Device Nodes in /dev[0m.
794 22:58:06.108708 <47>[ 8.959060] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
795 22:58:06.123927 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems (Pre)[0m.
796 22:58:06.124892 <47>[ 8.975277] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
797 22:58:06.128110 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems[0m.
798 22:58:06.156032 <47>[ 9.006350] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
799 22:58:06.160969 <47>[ 9.011457] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
800 22:58:06.162488 <47>[ 9.013054] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
801 22:58:06.177210 <47>[ 9.027605] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
802 22:58:06.178779 <47>[ 9.029283] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
803 22:58:06.191481 <47>[ 9.042112] systemd-journald[109]: n/a: New incoming connection.
804 22:58:06.192079 <47>[ 9.042720] systemd-journald[109]: varlink-20: varlink: setting state idle-server
805 22:58:06.209309 <47>[ 9.059583] systemd-journald[109]: varlink-20: New incoming message: {\"method\":\"io.systemd.Journal.FlushToVar\",\"parameters\":{}}
806 22:58:06.220779 Starting [0;1;39mRule-based Manage…for Device Events and Files[0m...
807 22:58:06.221306 <47>[ 9.071930] systemd-journald[109]: varlink-20: varlink: changing state idle-server → processing-method
808 22:58:06.221668 <46>[ 9.072362] systemd-journald[109]: Received client request to flush runtime journal.
809 22:58:06.222327 <47>[ 9.072844] systemd-journald[109]: Journal effective settings seal=yes keyed_hash=no compress=yes compress_threshold_bytes=512B
810 22:58:06.235350 <47>[ 9.086001] systemd-journald[109]: Vacuuming...
811 22:58:06.236127 <47>[ 9.086536] systemd-journald[109]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
812 22:58:06.237406 <47>[ 9.087856] systemd-journald[109]: varlink-20: Sending message: {\"parameters\":{}}
813 22:58:06.237668 <47>[ 9.088139] systemd-journald[109]: varlink-20: varlink: changing state processing-method → processed-method
814 22:58:06.237889 <47>[ 9.088558] systemd-journald[109]: varlink-20: varlink: changing state processed-method → idle-server
815 22:58:06.255697 <47>[ 9.105840] systemd-journald[109]: varlink-20: varlink: changing state idle-server → pending-disconnect
816 22:58:06.256020 <47>[ 9.106265] systemd-journald[109]: varlink-20: varlink: changing state pending-disconnect → processing-disconnect
817 22:58:06.256247 <47>[ 9.106597] systemd-journald[109]: varlink-20: varlink: changing state processing-disconnect → disconnected
818 22:58:06.267122 <47>[ 9.117717] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
819 22:58:06.270377 <47>[ 9.120869] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
820 22:58:06.281109 [[0;32m OK [0m] Finished [0;1;39mFlush Journal to Persistent Storage[0m.
821 22:58:06.285004 <47>[ 9.135355] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
822 22:58:06.340358 Starting [0;1;39mCreate Volatile Files and Directories[0m...
823 22:58:06.353190 <47>[ 9.203564] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
824 22:58:06.804766 [[0;32m OK [0m] Started [0;1;39mRule-based Manager for Device Events and Files[0m.
825 22:58:06.880957 Starting [0;1;39mNetwork Service[0m...
826 22:58:06.913808 [[0;32m OK [0m] Finished [0;1;39mCreate Volatile Files and Directories[0m.
827 22:58:06.937906 <47>[ 9.788405] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
828 22:58:07.008536 Starting [0;1;39mNetwork Time Synchronization[0m...
829 22:58:07.045520 <47>[ 9.896066] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
830 22:58:07.076551 Starting [0;1;39mUpdate UTMP about System Boot/Shutdown[0m...
831 22:58:07.089141 <47>[ 9.939739] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
832 22:58:07.506174 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Boot/Shutdown[0m.
833 22:58:08.453007 <47>[ 11.303369] systemd-journald[109]: Data hash table of /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal has a fill level at 75.0 (3308 of 4408 items, 2539520 file size, 767 bytes per hash table item), suggesting rotation.
834 22:58:08.453563 <47>[ 11.303919] systemd-journald[109]: /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal: Journal header limits reached or header out-of-date, rotating.
835 22:58:08.453711 <47>[ 11.304325] systemd-journald[109]: Rotating...
836 22:58:08.454660 <47>[ 11.305194] systemd-journald[109]: Journal effective settings seal=no keyed_hash=no compress=yes compress_threshold_bytes=512B
837 22:58:08.473178 <47>[ 11.323477] systemd-journald[109]: Reserving 333 entries in field hash table.
838 22:58:08.480318 [[0;32m OK [0m] Started [0;1;39mNetwork Service[0m.
839 22:58:08.539418 <47>[ 11.390037] systemd-journald[109]: Reserving 4408 entries in data hash table.
840 22:58:08.542635 <47>[ 11.393109] systemd-journald[109]: Vacuuming...
841 22:58:08.576720 <47>[ 11.427052] systemd-journald[109]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
842 22:58:08.592547 Starting [0;1;39mNetwork Name Resolution[0m...
843 22:58:08.636697 <47>[ 11.487258] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
844 22:58:08.981447 [[0;32m OK [0m] Started [0;1;39mNetwork Time Synchronization[0m.
845 22:58:08.984049 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Set[0m.
846 22:58:08.995626 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Synchronized[0m.
847 22:58:09.560152 <47>[ 12.410664] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
848 22:58:10.715741 [[0;32m OK [0m] Started [0;1;39mNetwork Name Resolution[0m.
849 22:58:10.719506 [[0;32m OK [0m] Reached target [0;1;39mNetwork[0m.
850 22:58:10.722120 [[0;32m OK [0m] Reached target [0;1;39mHost and Network Name Lookups[0m.
851 22:58:10.741235 [[0;32m OK [0m] Finished [0;1;39mColdplug All udev Devices[0m.
852 22:58:10.753141 [[0;32m OK [0m] Reached target [0;1;39mSystem Initialization[0m.
853 22:58:10.769800 [[0;32m OK [0m] Started [0;1;39mPeriodic ext4 Onli…ata Check for All Filesystems[0m.
854 22:58:10.782788 [[0;32m OK [0m] Started [0;1;39mDiscard unused blocks once a week[0m.
855 22:58:10.790381 [[0;32m OK [0m] Started [0;1;39mDaily Cleanup of Temporary Directories[0m.
856 22:58:10.793109 [[0;32m OK [0m] Reached target [0;1;39mTimers[0m.
857 22:58:10.818039 [[0;32m OK [0m] Listening on [0;1;39mD-Bus System Message Bus Socket[0m.
858 22:58:10.824073 [[0;32m OK [0m] Reached target [0;1;39mSockets[0m.
859 22:58:10.828475 [[0;32m OK [0m] Reached target [0;1;39mBasic System[0m.
860 22:58:10.876530 [[0;32m OK [0m] Started [0;1;39mD-Bus System Message Bus[0m.
861 22:58:10.893278 <47>[ 13.743608] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
862 22:58:11.016113 <47>[ 13.866699] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
863 22:58:11.017403 Starting [0;1;39mRemove Stale Onli…t4 Metadata Check Snapshots[0m...
864 22:58:11.188353 Starting [0;1;39mUser Login Management[0m...
865 22:58:11.205537 <47>[ 14.055857] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
866 22:58:11.268105 Starting [0;1;39mPermit User Sessions[0m...
867 22:58:11.277183 <47>[ 14.127580] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
868 22:58:11.559781 [[0;32m OK [0m] Finished [0;1;39mPermit User Sessions[0m.
869 22:58:11.633632 [[0;32m OK [0m] Started [0;1;39mGetty on tty1[0m.
870 22:58:11.904653 [[0;32m OK [0m] Finished [0;1;39mRemove Stale Onli…ext4 Metadata Check Snapshots[0m.
871 22:58:12.328654 [[0;32m OK [0m] Started [0;1;39mUser Login Management[0m.
872 22:58:14.389666 [[0m[0;31m* [0m] A start job is running for /dev/ttyAMA0 (10s / 1min 30s)
873 22:58:14.757112 M[K[[0;32m OK [0m] Found device [0;1;39m/dev/ttyAMA0[0m.
874 22:58:14.849593 [K[[0;32m OK [0m] Started [0;1;39mSerial Getty on ttyAMA0[0m.
875 22:58:14.875650 [[0;32m OK [0m] Reached target [0;1;39mLogin Prompts[0m.
876 22:58:14.885734 [[0;32m OK [0m] Reached target [0;1;39mMulti-User System[0m.
877 22:58:14.899382 [[0;32m OK [0m] Reached target [0;1;39mGraphical Interface[0m.
878 22:58:14.955890 Starting [0;1;39mUpdate UTMP about System Runlevel Changes[0m...
879 22:58:14.966209 <47>[ 17.816614] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
880 22:58:15.172411 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Runlevel Changes[0m.
881 22:58:15.210418 <47>[ 18.060720] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
882 22:58:15.214392 <47>[ 18.064891] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
883 22:58:15.284773 <6>[ 18.135339] virtio_net virtio0 enp0s1: renamed from eth0
884 22:58:15.307193
885 22:58:15.307434 Debian GNU/Linux 11 debian-bullseye-arm64 ttyAMA0
886 22:58:15.307527
887 22:58:15.307885 debian-bullseye-arm64 login: root (automatic login)
888 22:58:15.307979
889 22:58:15.636948 Linux debian-bullseye-arm64 6.1.31 #1 SMP PREEMPT Mon Jun 5 22:41:02 UTC 2023 aarch64
890 22:58:15.637583
891 22:58:15.637776 The programs included with the Debian GNU/Linux system are free software;
892 22:58:15.637993 the exact distribution terms for each program are described in the
893 22:58:15.638141 individual files in /usr/share/doc/*/copyright.
894 22:58:15.638290
895 22:58:15.638438 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
896 22:58:15.638616 permitted by applicable law.
897 22:58:16.176523 <47>[ 19.026814] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
898 22:58:16.210578 <47>[ 19.060826] systemd-journald[109]: Data hash table of /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal has a fill level at 75.0 (3307 of 4408 items, 2539520 file size, 767 bytes per hash table item), suggesting rotation.
899 22:58:16.219382 <47>[ 19.069750] systemd-journald[109]: /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal: Journal header limits reached or header out-of-date, rotating.
900 22:58:16.219651 <47>[ 19.070200] systemd-journald[109]: Rotating...
901 22:58:16.221244 <47>[ 19.071691] systemd-journald[109]: Reserving 333 entries in field hash table.
902 22:58:16.246168 <47>[ 19.096552] systemd-journald[109]: Reserving 4408 entries in data hash table.
903 22:58:16.262791 <47>[ 19.113192] systemd-journald[109]: Vacuuming...
904 22:58:16.268301 <47>[ 19.118761] systemd-journald[109]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
905 22:58:16.502215 <47>[ 19.352794] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
906 22:58:18.251499 <47>[ 21.102007] systemd-journald[109]: Time jumped backwards, rotating.
907 22:58:18.252033 <47>[ 21.102278] systemd-journald[109]: Rotating...
908 22:58:18.253089 <47>[ 21.103633] systemd-journald[109]: Reserving 333 entries in field hash table.
909 22:58:18.287041 <47>[ 21.137293] systemd-journald[109]: Reserving 4408 entries in data hash table.
910 22:58:18.296103 <47>[ 21.146753] systemd-journald[109]: Vacuuming...
911 22:58:18.297582 <47>[ 21.148108] systemd-journald[109]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
912 22:58:18.323128 <47>[ 21.173710] systemd-journald[109]: Successfully sent stream file descriptor to service manager.
913 22:58:18.608409 Matched prompt #10: / #
915 22:58:18.608988 Setting prompt string to ['/ #']
916 22:58:18.609176 end: 2.2.1 login-action (duration 00:00:22) [common]
918 22:58:18.609668 end: 2.2 auto-login-action (duration 00:00:26) [common]
919 22:58:18.609861 start: 2.3 expect-shell-connection (timeout 00:04:33) [common]
920 22:58:18.610006 Setting prompt string to ['/ #']
921 22:58:18.610135 Forcing a shell prompt, looking for ['/ #']
923 22:58:18.660680 / #
924 22:58:18.660882 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
925 22:58:18.661103 Waiting using forced prompt support (timeout 00:02:30)
926 22:58:18.663645
927 22:58:18.672833 end: 2.3 expect-shell-connection (duration 00:00:00) [common]
928 22:58:18.673064 start: 2.4 export-device-env (timeout 00:04:33) [common]
929 22:58:18.673252 end: 2.4 export-device-env (duration 00:00:00) [common]
930 22:58:18.673422 end: 2 boot-image-retry (duration 00:00:27) [common]
931 22:58:18.673587 start: 3 lava-test-retry (timeout 00:08:48) [common]
932 22:58:18.673769 start: 3.1 lava-test-shell (timeout 00:08:48) [common]
933 22:58:18.673918 Using namespace: common
935 22:58:18.774743 / # #
936 22:58:18.774936 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
937 22:58:18.775449 #
939 22:58:18.883977 / # mkdir /lava-566315
940 22:58:18.884793 mkdir /lava-566315
942 22:58:19.015355 / # mount /dev/disk/by-uuid/4d41d862-bead-4bf8-bdfd-241380a7df32 -t ext2 /lava-566315
943 22:58:19.016135 mount /dev/disk/by-uuid/4d41d862-bead-4bf8-bdfd-241380a7df32 -t ext2 /lava-566315
944 22:58:19.056461 <4>[ 21.906564] ext2 filesystem being mounted at /lava-566315 supports timestamps until 2038 (0x7fffffff)
946 22:58:19.206520 / # ls -la /lava-566315/bin/lava-test-runner
947 22:58:19.207500 ls -la /lava-566315/bin/lava-test-runner
948 22:58:19.247661 -rwxr-xr-x 1 root root 1039 Jun 5 22:57 /lava-566315/bin/lava-test-runner
949 22:58:19.259591 Using /lava-566315
951 22:58:19.360429 / # export SHELL=/bin/sh
952 22:58:19.361282 export SHELL=/bin/sh
954 22:58:19.470446 / # . /lava-566315/environment
955 22:58:19.471537 . /lava-566315/environment
957 22:58:19.584385 / # /lava-566315/bin/lava-test-runner /lava-566315/0
958 22:58:19.584715 Test shell timeout: 10s (minimum of the action and connection timeout)
959 22:58:19.585558 /lava-566315/bin/lava-test-runner /lava-566315/0
960 22:58:19.767093 + export TESTRUN_ID=0_timesync-off
961 22:58:19.767531 + cd /lava-566315/0/tests/0_timesync-off
962 22:58:19.769430 + cat uuid
963 22:58:19.779403 + UUID=566315_1.1.3.1
964 22:58:19.779697 + set +x
965 22:58:19.780104 <LAVA_SIGNAL_STARTRUN 0_timesync-off 566315_1.1.3.1>
966 22:58:19.780311 + systemctl stop systemd-timesyncd
967 22:58:19.780685 Received signal: <STARTRUN> 0_timesync-off 566315_1.1.3.1
968 22:58:19.780849 Starting test lava.0_timesync-off (566315_1.1.3.1)
969 22:58:19.781051 Skipping test definition patterns.
970 22:58:20.087892 + set +x
971 22:58:20.088420 <LAVA_SIGNAL_ENDRUN 0_timesync-off 566315_1.1.3.1>
972 22:58:20.088792 Received signal: <ENDRUN> 0_timesync-off 566315_1.1.3.1
973 22:58:20.088973 Ending use of test pattern.
974 22:58:20.089118 Ending test lava.0_timesync-off (566315_1.1.3.1), duration 0.31
976 22:58:20.139822 + export TESTRUN_ID=1_kselftest-arm64_qemu
977 22:58:20.140271 + cd /lava-566315/0/tests/1_kselftest-arm64_qemu
978 22:58:20.142494 + cat uuid
979 22:58:20.152065 + UUID=566315_1.1.3.5
980 22:58:20.152537 + set +x
981 22:58:20.152648 <LAVA_SIGNAL_STARTRUN 1_kselftest-arm64_qemu 566315_1.1.3.5>
982 22:58:20.152930 Received signal: <STARTRUN> 1_kselftest-arm64_qemu 566315_1.1.3.5
983 22:58:20.153042 Starting test lava.1_kselftest-arm64_qemu (566315_1.1.3.5)
984 22:58:20.153165 Skipping test definition patterns.
985 22:58:20.153319 + cd ./automated/linux/kselftest/
986 22:58:20.159494 + ./kselftest.sh -c arm64 -T -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L -S /dev/null -b qemu_arm64-virt-gicv3 -g cip -e -p /opt/kselftests/mainline/ -n 1 -i 1
987 22:58:20.267187 INFO: install_deps skipped
988 22:58:20.304125 --2023-06-05 22:58:20-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz
989 22:58:20.429709 Resolving storage.kernelci.org (storage.kernelci.org)... 52.250.1.28
990 22:58:20.635269 Connecting to storage.kernelci.org (storage.kernelci.org)|52.250.1.28|:80... connected.
991 22:58:20.826511 HTTP request sent, awaiting response... 200 OK
992 22:58:20.828545 Length: 2703120 (2.6M) [application/octet-stream]
993 22:58:20.829686 Saving to: 'kselftest.tar.xz'
994 22:58:20.830740
995 22:58:22.093423 kselftest.tar.xz 0%[ ] 0 --.-KB/s kselftest.tar.xz 1%[ ] 50.15K 148KB/s kselftest.tar.xz 8%[> ] 219.84K 318KB/s kselftest.tar.xz 34%[=====> ] 898.59K 863KB/s kselftest.tar.xz 81%[===============> ] 2.10M 1.69MB/s kselftest.tar.xz 100%[===================>] 2.58M 2.05MB/s in 1.3s
996 22:58:22.093684
997 22:58:22.095567 2023-06-05 22:58:22 (2.05 MB/s) - 'kselftest.tar.xz' saved [2703120/2703120]
998 22:58:22.095730
999 22:58:25.679912 skiplist:
1000 22:58:25.680378 ========================================
1001 22:58:25.680682 ========================================
1002 22:58:25.738164 arm64:tags_test
1003 22:58:25.738410 arm64:run_tags_test.sh
1004 22:58:25.738501 arm64:fake_sigreturn_bad_magic
1005 22:58:25.738794 arm64:fake_sigreturn_bad_size
1006 22:58:25.738900 arm64:fake_sigreturn_bad_size_for_magic0
1007 22:58:25.738988 arm64:fake_sigreturn_duplicated_fpsimd
1008 22:58:25.739089 arm64:fake_sigreturn_misaligned_sp
1009 22:58:25.739177 arm64:fake_sigreturn_missing_fpsimd
1010 22:58:25.739277 arm64:fake_sigreturn_sme_change_vl
1011 22:58:25.739365 arm64:fake_sigreturn_sve_change_vl
1012 22:58:25.739464 arm64:mangle_pstate_invalid_compat_toggle
1013 22:58:25.739566 arm64:mangle_pstate_invalid_daif_bits
1014 22:58:25.739653 arm64:mangle_pstate_invalid_mode_el1h
1015 22:58:25.739738 arm64:mangle_pstate_invalid_mode_el1t
1016 22:58:25.739837 arm64:mangle_pstate_invalid_mode_el2h
1017 22:58:25.739926 arm64:mangle_pstate_invalid_mode_el2t
1018 22:58:25.740025 arm64:mangle_pstate_invalid_mode_el3h
1019 22:58:25.740115 arm64:mangle_pstate_invalid_mode_el3t
1020 22:58:25.740199 arm64:sme_trap_no_sm
1021 22:58:25.740282 arm64:sme_trap_non_streaming
1022 22:58:25.740382 arm64:sme_trap_za
1023 22:58:25.740468 arm64:sme_vl
1024 22:58:25.740552 arm64:ssve_regs
1025 22:58:25.740643 arm64:sve_regs
1026 22:58:25.740727 arm64:sve_vl
1027 22:58:25.740809 arm64:za_no_regs
1028 22:58:25.740892 arm64:za_regs
1029 22:58:25.740974 arm64:pac
1030 22:58:25.741075 arm64:fp-stress
1031 22:58:25.741159 arm64:sve-ptrace
1032 22:58:25.741241 arm64:sve-probe-vls
1033 22:58:25.741322 arm64:vec-syscfg
1034 22:58:25.741403 arm64:za-fork
1035 22:58:25.741481 arm64:za-ptrace
1036 22:58:25.741564 arm64:check_buffer_fill
1037 22:58:25.741657 arm64:check_child_memory
1038 22:58:25.741742 arm64:check_gcr_el1_cswitch
1039 22:58:25.741824 arm64:check_ksm_options
1040 22:58:25.741906 arm64:check_mmap_options
1041 22:58:25.741987 arm64:check_prctl
1042 22:58:25.742068 arm64:check_tags_inclusion
1043 22:58:25.742149 arm64:check_user_mem
1044 22:58:25.742230 arm64:btitest
1045 22:58:25.742330 arm64:nobtitest
1046 22:58:25.742414 arm64:hwcap
1047 22:58:25.742496 arm64:ptrace
1048 22:58:25.742577 arm64:syscall-abi
1049 22:58:25.742659 arm64:tpidr2
1050 22:58:25.753846 ============== Tests to run ===============
1051 22:58:25.759646 arm64:tags_test
1052 22:58:25.759888 arm64:run_tags_test.sh
1053 22:58:25.759975 arm64:fake_sigreturn_bad_magic
1054 22:58:25.760277 arm64:fake_sigreturn_bad_size
1055 22:58:25.760384 arm64:fake_sigreturn_bad_size_for_magic0
1056 22:58:25.760472 arm64:fake_sigreturn_duplicated_fpsimd
1057 22:58:25.760554 arm64:fake_sigreturn_misaligned_sp
1058 22:58:25.760636 arm64:fake_sigreturn_missing_fpsimd
1059 22:58:25.760719 arm64:fake_sigreturn_sme_change_vl
1060 22:58:25.760802 arm64:fake_sigreturn_sve_change_vl
1061 22:58:25.760883 arm64:mangle_pstate_invalid_compat_toggle
1062 22:58:25.760964 arm64:mangle_pstate_invalid_daif_bits
1063 22:58:25.761066 arm64:mangle_pstate_invalid_mode_el1h
1064 22:58:25.761151 arm64:mangle_pstate_invalid_mode_el1t
1065 22:58:25.761233 arm64:mangle_pstate_invalid_mode_el2h
1066 22:58:25.761315 arm64:mangle_pstate_invalid_mode_el2t
1067 22:58:25.761397 arm64:mangle_pstate_invalid_mode_el3h
1068 22:58:25.761477 arm64:mangle_pstate_invalid_mode_el3t
1069 22:58:25.761555 arm64:sme_trap_no_sm
1070 22:58:25.761638 arm64:sme_trap_non_streaming
1071 22:58:25.761731 arm64:sme_trap_za
1072 22:58:25.761814 arm64:sme_vl
1073 22:58:25.761895 arm64:ssve_regs
1074 22:58:25.761978 arm64:sve_regs
1075 22:58:25.762059 arm64:sve_vl
1076 22:58:25.762168 arm64:za_no_regs
1077 22:58:25.762252 arm64:za_regs
1078 22:58:25.762334 arm64:pac
1079 22:58:25.762415 arm64:fp-stress
1080 22:58:25.762496 arm64:sve-ptrace
1081 22:58:25.762577 arm64:sve-probe-vls
1082 22:58:25.762662 arm64:vec-syscfg
1083 22:58:25.762744 arm64:za-fork
1084 22:58:25.762824 arm64:za-ptrace
1085 22:58:25.762905 arm64:check_buffer_fill
1086 22:58:25.762986 arm64:check_child_memory
1087 22:58:25.763067 arm64:check_gcr_el1_cswitch
1088 22:58:25.763148 arm64:check_ksm_options
1089 22:58:25.763229 arm64:check_mmap_options
1090 22:58:25.763310 arm64:check_prctl
1091 22:58:25.763390 arm64:check_tags_inclusion
1092 22:58:25.763471 arm64:check_user_mem
1093 22:58:25.763552 arm64:btitest
1094 22:58:25.763633 arm64:nobtitest
1095 22:58:25.763714 arm64:hwcap
1096 22:58:25.763796 arm64:ptrace
1097 22:58:25.763876 arm64:syscall-abi
1098 22:58:25.763957 arm64:tpidr2
1099 22:58:25.764069 ===========End Tests to run ===============
1100 22:58:26.742719 <12>[ 29.593281] kselftest: Running tests in arm64
1101 22:58:26.773069 TAP version 13
1102 22:58:26.791152 1..48
1103 22:58:26.843218 # selftests: arm64: tags_test
1104 22:58:26.898175 ok 1 selftests: arm64: tags_test
1105 22:58:26.947160 # selftests: arm64: run_tags_test.sh
1106 22:58:27.003480 # --------------------
1107 22:58:27.003927 # running tags test
1108 22:58:27.004019 # --------------------
1109 22:58:27.004103 # [PASS]
1110 22:58:27.011178 ok 2 selftests: arm64: run_tags_test.sh
1111 22:58:27.061603 # selftests: arm64: fake_sigreturn_bad_magic
1112 22:58:27.115170 # Registered handlers for all signals.
1113 22:58:27.115406 # Detected MINSTKSIGSZ:10000
1114 22:58:27.115501 # Testcase initialized.
1115 22:58:27.115588 # uc context validated.
1116 22:58:27.115689 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1117 22:58:27.115776 # Handled SIG_COPYCTX
1118 22:58:27.115859 # Available space:3536
1119 22:58:27.115941 # Using badly built context - ERR: BAD MAGIC !
1120 22:58:27.116040 # SIG_OK -- SP:0xFFFFFABF8140 si_addr@:0xfffffabf8140 si_code:2 token@:0xfffffabf6ee0 offset:-4704
1121 22:58:27.116126 # ==>> completed. PASS(1)
1122 22:58:27.116224 # # FAKE_SIGRETURN_BAD_MAGIC :: Trigger a sigreturn with a sigframe with a bad magic
1123 22:58:27.116323 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFFABF6EE0
1124 22:58:27.125431 ok 3 selftests: arm64: fake_sigreturn_bad_magic
1125 22:58:27.173726 # selftests: arm64: fake_sigreturn_bad_size
1126 22:58:27.225810 # Registered handlers for all signals.
1127 22:58:27.226262 # Detected MINSTKSIGSZ:10000
1128 22:58:27.226370 # Testcase initialized.
1129 22:58:27.226456 # uc context validated.
1130 22:58:27.226539 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1131 22:58:27.226622 # Handled SIG_COPYCTX
1132 22:58:27.226704 # Available space:3536
1133 22:58:27.226785 # uc context validated.
1134 22:58:27.226867 # Using badly built context - ERR: Bad size for esr_context
1135 22:58:27.228167 # SIG_OK -- SP:0xFFFFF6752220 si_addr@:0xfffff6752220 si_code:2 token@:0xfffff6750fc0 offset:-4704
1136 22:58:27.228275 # ==>> completed. PASS(1)
1137 22:58:27.228562 # # FAKE_SIGRETURN_BAD_SIZE :: Triggers a sigreturn with a overrun __reserved area
1138 22:58:27.228666 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFF6750FC0
1139 22:58:27.235337 ok 4 selftests: arm64: fake_sigreturn_bad_size
1140 22:58:27.283344 # selftests: arm64: fake_sigreturn_bad_size_for_magic0
1141 22:58:27.335286 # Registered handlers for all signals.
1142 22:58:27.335800 # Detected MINSTKSIGSZ:10000
1143 22:58:27.335907 # Testcase initialized.
1144 22:58:27.335997 # uc context validated.
1145 22:58:27.336082 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1146 22:58:27.336165 # Handled SIG_COPYCTX
1147 22:58:27.336248 # Available space:3536
1148 22:58:27.336330 # Using badly built context - ERR: Bad size for terminator
1149 22:58:27.336429 # SIG_OK -- SP:0xFFFFF0351430 si_addr@:0xfffff0351430 si_code:2 token@:0xfffff03501d0 offset:-4704
1150 22:58:27.336516 # ==>> completed. PASS(1)
1151 22:58:27.336604 # # FAKE_SIGRETURN_BAD_SIZE_FOR_TERMINATOR :: Trigger a sigreturn using non-zero size terminator
1152 22:58:27.336703 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFF03501D0
1153 22:58:27.344702 ok 5 selftests: arm64: fake_sigreturn_bad_size_for_magic0
1154 22:58:27.392851 # selftests: arm64: fake_sigreturn_duplicated_fpsimd
1155 22:58:27.444530 # Registered handlers for all signals.
1156 22:58:27.444779 # Detected MINSTKSIGSZ:10000
1157 22:58:27.445081 # Testcase initialized.
1158 22:58:27.445184 # uc context validated.
1159 22:58:27.445273 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1160 22:58:27.445361 # Handled SIG_COPYCTX
1161 22:58:27.445444 # Available space:3536
1162 22:58:27.445525 # Using badly built context - ERR: Multiple FPSIMD_MAGIC
1163 22:58:27.445625 # SIG_OK -- SP:0xFFFFE9015C20 si_addr@:0xffffe9015c20 si_code:2 token@:0xffffe90149c0 offset:-4704
1164 22:58:27.445721 # ==>> completed. PASS(1)
1165 22:58:27.445803 # # FAKE_SIGRETURN_DUPLICATED_FPSIMD :: Triggers a sigreturn including two fpsimd_context
1166 22:58:27.445901 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFE90149C0
1167 22:58:27.453831 ok 6 selftests: arm64: fake_sigreturn_duplicated_fpsimd
1168 22:58:27.501517 # selftests: arm64: fake_sigreturn_misaligned_sp
1169 22:58:27.553118 # Registered handlers for all signals.
1170 22:58:27.553364 # Detected MINSTKSIGSZ:10000
1171 22:58:27.553669 # Testcase initialized.
1172 22:58:27.553764 # uc context validated.
1173 22:58:27.553853 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1174 22:58:27.553941 # Handled SIG_COPYCTX
1175 22:58:27.554049 # SIG_OK -- SP:0xFFFFE60718B3 si_addr@:0xffffe60718b3 si_code:2 token@:0xffffe60718b3 offset:0
1176 22:58:27.554139 # ==>> completed. PASS(1)
1177 22:58:27.554240 # # FAKE_SIGRETURN_MISALIGNED_SP :: Triggers a sigreturn with a misaligned sigframe
1178 22:58:27.554329 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFE60718B3
1179 22:58:27.562406 ok 7 selftests: arm64: fake_sigreturn_misaligned_sp
1180 22:58:27.610541 # selftests: arm64: fake_sigreturn_missing_fpsimd
1181 22:58:27.662467 # Registered handlers for all signals.
1182 22:58:27.662706 # Detected MINSTKSIGSZ:10000
1183 22:58:27.664508 # Testcase initialized.
1184 22:58:27.664617 # uc context validated.
1185 22:58:27.664893 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1186 22:58:27.664994 # Handled SIG_COPYCTX
1187 22:58:27.665073 # Mangling template header. Spare space:4096
1188 22:58:27.665161 # Using badly built context - ERR: Missing FPSIMD
1189 22:58:27.665448 # SIG_OK -- SP:0xFFFFC4A0E920 si_addr@:0xffffc4a0e920 si_code:2 token@:0xffffc4a0d6c0 offset:-4704
1190 22:58:27.665554 # ==>> completed. PASS(1)
1191 22:58:27.665660 # # FAKE_SIGRETURN_MISSING_FPSIMD :: Triggers a sigreturn with a missing fpsimd_context
1192 22:58:27.665744 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFC4A0D6C0
1193 22:58:27.672550 ok 8 selftests: arm64: fake_sigreturn_missing_fpsimd
1194 22:58:27.721123 # selftests: arm64: fake_sigreturn_sme_change_vl
1195 22:58:27.775185 # Registered handlers for all signals.
1196 22:58:27.775926 # Detected MINSTKSIGSZ:10000
1197 22:58:27.776083 # Required Features: [ SME ] supported
1198 22:58:27.776172 # Incompatible Features: [] absent
1199 22:58:27.776256 # Testcase initialized.
1200 22:58:27.776339 # uc context validated.
1201 22:58:27.776421 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1202 22:58:27.776504 # Handled SIG_COPYCTX
1203 22:58:27.776606 # Attempting to change VL from 16 to 256
1204 22:58:27.776693 # SIG_OK -- SP:0xFFFFE08102F0 si_addr@:0xffffe08102f0 si_code:2 token@:0xffffe080f090 offset:-4704
1205 22:58:27.776777 # ==>> completed. PASS(1)
1206 22:58:27.776859 # # FAKE_SIGRETURN_SSVE_CHANGE :: Attempt to change Streaming SVE VL
1207 22:58:27.776941 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFE080F090
1208 22:58:27.785557 ok 9 selftests: arm64: fake_sigreturn_sme_change_vl
1209 22:58:27.833446 # selftests: arm64: fake_sigreturn_sve_change_vl
1210 22:58:27.887295 # Registered handlers for all signals.
1211 22:58:27.887764 # Detected MINSTKSIGSZ:10000
1212 22:58:27.887870 # Required Features: [ SVE ] supported
1213 22:58:27.887960 # Incompatible Features: [] absent
1214 22:58:27.888047 # Testcase initialized.
1215 22:58:27.888133 # uc context validated.
1216 22:58:27.888218 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1217 22:58:27.888320 # Handled SIG_COPYCTX
1218 22:58:27.888575 # Attempting to change VL from 16 to 256
1219 22:58:27.888686 # SIG_OK -- SP:0xFFFFD0456F30 si_addr@:0xffffd0456f30 si_code:2 token@:0xffffd0455cd0 offset:-4704
1220 22:58:27.888775 # ==>> completed. PASS(1)
1221 22:58:27.888857 # # FAKE_SIGRETURN_SVE_CHANGE :: Attempt to change SVE VL
1222 22:58:27.888935 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFD0455CD0
1223 22:58:27.896649 ok 10 selftests: arm64: fake_sigreturn_sve_change_vl
1224 22:58:27.944903 # selftests: arm64: mangle_pstate_invalid_compat_toggle
1225 22:58:27.995347 # Registered handlers for all signals.
1226 22:58:27.995593 # Detected MINSTKSIGSZ:10000
1227 22:58:27.995688 # Testcase initialized.
1228 22:58:27.995989 # uc context validated.
1229 22:58:27.996091 # Handled SIG_TRIG
1230 22:58:27.996174 # SIG_OK -- SP:0xFFFFFE720040 si_addr@:0xfffffe720040 si_code:2 token@:(nil) offset:-281474950627392
1231 22:58:27.996255 # ==>> completed. PASS(1)
1232 22:58:27.996336 # # MANGLE_PSTATE_INVALID_STATE_TOGGLE :: Mangling uc_mcontext with INVALID STATE_TOGGLE
1233 22:58:28.003145 ok 11 selftests: arm64: mangle_pstate_invalid_compat_toggle
1234 22:58:28.051362 # selftests: arm64: mangle_pstate_invalid_daif_bits
1235 22:58:28.103448 # Registered handlers for all signals.
1236 22:58:28.103909 # Detected MINSTKSIGSZ:10000
1237 22:58:28.104006 # Testcase initialized.
1238 22:58:28.104097 # uc context validated.
1239 22:58:28.104181 # Handled SIG_TRIG
1240 22:58:28.104282 # SIG_OK -- SP:0xFFFFCD89EA80 si_addr@:0xffffcd89ea80 si_code:2 token@:(nil) offset:-281474130111104
1241 22:58:28.104372 # ==>> completed. PASS(1)
1242 22:58:28.104455 # # MANGLE_PSTATE_INVALID_DAIF_BITS :: Mangling uc_mcontext with INVALID DAIF_BITS
1243 22:58:28.112965 ok 12 selftests: arm64: mangle_pstate_invalid_daif_bits
1244 22:58:28.163408 # selftests: arm64: mangle_pstate_invalid_mode_el1h
1245 22:58:28.213940 # Registered handlers for all signals.
1246 22:58:28.214175 # Detected MINSTKSIGSZ:10000
1247 22:58:28.214256 # Testcase initialized.
1248 22:58:28.214538 # uc context validated.
1249 22:58:28.214632 # Handled SIG_TRIG
1250 22:58:28.214718 # SIG_OK -- SP:0xFFFFE1B26FF0 si_addr@:0xffffe1b26ff0 si_code:2 token@:(nil) offset:-281474468311024
1251 22:58:28.214806 # ==>> completed. PASS(1)
1252 22:58:28.214892 # # MANGLE_PSTATE_INVALID_MODE_EL1h :: Mangling uc_mcontext INVALID MODE EL1h
1253 22:58:28.222214 ok 13 selftests: arm64: mangle_pstate_invalid_mode_el1h
1254 22:58:28.270021 # selftests: arm64: mangle_pstate_invalid_mode_el1t
1255 22:58:28.319191 # Registered handlers for all signals.
1256 22:58:28.319432 # Detected MINSTKSIGSZ:10000
1257 22:58:28.319722 # Testcase initialized.
1258 22:58:28.319817 # uc context validated.
1259 22:58:28.319892 # Handled SIG_TRIG
1260 22:58:28.319965 # SIG_OK -- SP:0xFFFFECBF6DA0 si_addr@:0xffffecbf6da0 si_code:2 token@:(nil) offset:-281474653711776
1261 22:58:28.320056 # ==>> completed. PASS(1)
1262 22:58:28.320133 # # MANGLE_PSTATE_INVALID_MODE_EL1t :: Mangling uc_mcontext INVALID MODE EL1t
1263 22:58:28.329032 ok 14 selftests: arm64: mangle_pstate_invalid_mode_el1t
1264 22:58:28.375215 # selftests: arm64: mangle_pstate_invalid_mode_el2h
1265 22:58:28.425991 # Registered handlers for all signals.
1266 22:58:28.426221 # Detected MINSTKSIGSZ:10000
1267 22:58:28.426302 # Testcase initialized.
1268 22:58:28.426376 # uc context validated.
1269 22:58:28.426452 # Handled SIG_TRIG
1270 22:58:28.426541 # SIG_OK -- SP:0xFFFFC36C2C30 si_addr@:0xffffc36c2c30 si_code:2 token@:(nil) offset:-281473960389680
1271 22:58:28.426625 # ==>> completed. PASS(1)
1272 22:58:28.426702 # # MANGLE_PSTATE_INVALID_MODE_EL2h :: Mangling uc_mcontext INVALID MODE EL2h
1273 22:58:28.435284 ok 15 selftests: arm64: mangle_pstate_invalid_mode_el2h
1274 22:58:28.483204 # selftests: arm64: mangle_pstate_invalid_mode_el2t
1275 22:58:28.533678 # Registered handlers for all signals.
1276 22:58:28.534131 # Detected MINSTKSIGSZ:10000
1277 22:58:28.534229 # Testcase initialized.
1278 22:58:28.534318 # uc context validated.
1279 22:58:28.534404 # Handled SIG_TRIG
1280 22:58:28.534506 # SIG_OK -- SP:0xFFFFC8EF4FF0 si_addr@:0xffffc8ef4ff0 si_code:2 token@:(nil) offset:-281474052870128
1281 22:58:28.534596 # ==>> completed. PASS(1)
1282 22:58:28.534682 # # MANGLE_PSTATE_INVALID_MODE_EL2t :: Mangling uc_mcontext INVALID MODE EL2t
1283 22:58:28.542601 ok 16 selftests: arm64: mangle_pstate_invalid_mode_el2t
1284 22:58:28.590480 # selftests: arm64: mangle_pstate_invalid_mode_el3h
1285 22:58:28.640928 # Registered handlers for all signals.
1286 22:58:28.641164 # Detected MINSTKSIGSZ:10000
1287 22:58:28.641453 # Testcase initialized.
1288 22:58:28.641547 # uc context validated.
1289 22:58:28.641623 # Handled SIG_TRIG
1290 22:58:28.641705 # SIG_OK -- SP:0xFFFFF0FABF30 si_addr@:0xfffff0fabf30 si_code:2 token@:(nil) offset:-281474724708144
1291 22:58:28.641782 # ==>> completed. PASS(1)
1292 22:58:28.641872 # # MANGLE_PSTATE_INVALID_MODE_EL3h :: Mangling uc_mcontext INVALID MODE EL3h
1293 22:58:28.649563 ok 17 selftests: arm64: mangle_pstate_invalid_mode_el3h
1294 22:58:28.697391 # selftests: arm64: mangle_pstate_invalid_mode_el3t
1295 22:58:28.747062 # Registered handlers for all signals.
1296 22:58:28.747310 # Detected MINSTKSIGSZ:10000
1297 22:58:28.747400 # Testcase initialized.
1298 22:58:28.747693 # uc context validated.
1299 22:58:28.747784 # Handled SIG_TRIG
1300 22:58:28.747868 # SIG_OK -- SP:0xFFFFF4125590 si_addr@:0xfffff4125590 si_code:2 token@:(nil) offset:-281474776585616
1301 22:58:28.747953 # ==>> completed. PASS(1)
1302 22:58:28.748052 # # MANGLE_PSTATE_INVALID_MODE_EL3t :: Mangling uc_mcontext INVALID MODE EL3t
1303 22:58:28.756359 ok 18 selftests: arm64: mangle_pstate_invalid_mode_el3t
1304 22:58:28.803132 # selftests: arm64: sme_trap_no_sm
1305 22:58:28.924791 # Registered handlers for all signals.
1306 22:58:28.925376 # Detected MINSTKSIGSZ:10000
1307 22:58:28.925481 # Required Features: [ SME ] supported
1308 22:58:28.925577 # Incompatible Features: [] absent
1309 22:58:28.925674 # Testcase initialized.
1310 22:58:28.925760 # SIG_OK -- SP:0xFFFFC83F2C80 si_addr@:0xaaaadce92514 si_code:1 token@:(nil) offset:-187650827429140
1311 22:58:28.925846 # ==>> completed. PASS(1)
1312 22:58:28.925945 # # SME trap without SM :: Check that we get a SIGILL if we use streaming mode without enabling it
1313 22:58:28.940982 ok 19 selftests: arm64: sme_trap_no_sm
1314 22:58:29.047286 # selftests: arm64: sme_trap_non_streaming
1315 22:58:29.116499 # Registered handlers for all signals.
1316 22:58:29.116946 # Detected MINSTKSIGSZ:10000
1317 22:58:29.117039 # Required Features: [] NOT supported
1318 22:58:29.117117 # Incompatible Features: [] supported
1319 22:58:29.117190 # ==>> completed. SKIP.
1320 22:58:29.117283 # # SME SM trap unsupported instruction :: Check that we get a SIGILL if we use an unsupported instruction in streaming mode
1321 22:58:29.124571 ok 20 selftests: arm64: sme_trap_non_streaming # SKIP
1322 22:58:29.179252 # selftests: arm64: sme_trap_za
1323 22:58:29.232975 # Registered handlers for all signals.
1324 22:58:29.233320 # Detected MINSTKSIGSZ:10000
1325 22:58:29.233467 # Testcase initialized.
1326 22:58:29.233815 # SIG_OK -- SP:0xFFFFF9320470 si_addr@:0xaaaabe122510 si_code:1 token@:(nil) offset:-187650310022416
1327 22:58:29.233929 # ==>> completed. PASS(1)
1328 22:58:29.234023 # # SME ZA trap :: Check that we get a SIGILL if we access ZA without enabling
1329 22:58:29.239457 ok 21 selftests: arm64: sme_trap_za
1330 22:58:29.293327 # selftests: arm64: sme_vl
1331 22:58:29.348813 # Registered handlers for all signals.
1332 22:58:29.349151 # Detected MINSTKSIGSZ:10000
1333 22:58:29.349582 # Required Features: [ SME ] supported
1334 22:58:29.349759 # Incompatible Features: [] absent
1335 22:58:29.349935 # Testcase initialized.
1336 22:58:29.350084 # uc context validated.
1337 22:58:29.350227 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1338 22:58:29.350370 # Handled SIG_COPYCTX
1339 22:58:29.350512 # got expected VL 32
1340 22:58:29.350654 # ==>> completed. PASS(1)
1341 22:58:29.350797 # # SME VL :: Check that we get the right SME VL reported
1342 22:58:29.355491 ok 22 selftests: arm64: sme_vl
1343 22:58:29.410157 # selftests: arm64: ssve_regs
1344 22:58:29.666013 # Registered handlers for all signals.
1345 22:58:29.666268 # Detected MINSTKSIGSZ:10000
1346 22:58:29.666576 # Required Features: [ SME FA64 ] supported
1347 22:58:29.666743 # Incompatible Features: [] absent
1348 22:58:29.666919 # Testcase initialized.
1349 22:58:29.667071 # Testing VL 256
1350 22:58:29.667215 # Validating EXTRA...
1351 22:58:29.667357 # uc context validated.
1352 22:58:29.667499 # 9360 byte GOOD CONTEXT grabbed from sig_copyctx handler
1353 22:58:29.668337 # Handled SIG_COPYCTX
1354 22:58:29.668501 # Got expected size 8752 and VL 256
1355 22:58:29.668674 # Testing VL 128
1356 22:58:29.669018 # Validating EXTRA...
1357 22:58:29.669129 # uc context validated.
1358 22:58:29.669222 # 4992 byte GOOD CONTEXT grabbed from sig_copyctx handler
1359 22:58:29.669309 # Handled SIG_COPYCTX
1360 22:58:29.669393 # Got expected size 4384 and VL 128
1361 22:58:29.669480 # Testing VL 64
1362 22:58:29.669565 # uc context validated.
1363 22:58:29.669657 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1364 22:58:29.669743 # Handled SIG_COPYCTX
1365 22:58:29.669824 # Got expected size 2208 and VL 64
1366 22:58:29.669906 # Testing VL 32
1367 22:58:29.670008 # uc context validated.
1368 22:58:29.670090 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1369 22:58:29.670175 # Handled SIG_COPYCTX
1370 22:58:29.670259 # Got expected size 1120 and VL 32
1371 22:58:29.670339 # Testing VL 16
1372 22:58:29.670421 # uc context validated.
1373 22:58:29.670506 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1374 22:58:29.670591 # Handled SIG_COPYCTX
1375 22:58:29.670674 # Got expected size 576 and VL 16
1376 22:58:29.670757 # ==>> completed. PASS(1)
1377 22:58:29.670856 # # Streaming SVE registers :: Check that we get the right Streaming SVE registers reported
1378 22:58:29.677832 ok 23 selftests: arm64: ssve_regs
1379 22:58:29.736984 # selftests: arm64: sve_regs
1380 22:58:30.202508 # Registered handlers for all signals.
1381 22:58:30.202762 # Detected MINSTKSIGSZ:10000
1382 22:58:30.202861 # Required Features: [ SVE ] supported
1383 22:58:30.204329 # Incompatible Features: [] absent
1384 22:58:30.204661 # Testcase initialized.
1385 22:58:30.204772 # Testing VL 256
1386 22:58:30.204864 # Validating EXTRA...
1387 22:58:30.204951 # uc context validated.
1388 22:58:30.205038 # 9360 byte GOOD CONTEXT grabbed from sig_copyctx handler
1389 22:58:30.205140 # Handled SIG_COPYCTX
1390 22:58:30.205231 # Got expected size 8752 and VL 256
1391 22:58:30.205323 # Testing VL 240
1392 22:58:30.205409 # Validating EXTRA...
1393 22:58:30.205510 # uc context validated.
1394 22:58:30.205596 # 8816 byte GOOD CONTEXT grabbed from sig_copyctx handler
1395 22:58:30.205690 # Handled SIG_COPYCTX
1396 22:58:30.205777 # Got expected size 8208 and VL 240
1397 22:58:30.205863 # Testing VL 224
1398 22:58:30.205965 # Validating EXTRA...
1399 22:58:30.206053 # uc context validated.
1400 22:58:30.206139 # 8272 byte GOOD CONTEXT grabbed from sig_copyctx handler
1401 22:58:30.206225 # Handled SIG_COPYCTX
1402 22:58:30.206310 # Got expected size 7664 and VL 224
1403 22:58:30.206394 # Testing VL 208
1404 22:58:30.206498 # Validating EXTRA...
1405 22:58:30.206585 # uc context validated.
1406 22:58:30.206671 # 7728 byte GOOD CONTEXT grabbed from sig_copyctx handler
1407 22:58:30.206755 # Handled SIG_COPYCTX
1408 22:58:30.206838 # Got expected size 7120 and VL 208
1409 22:58:30.213784 # Testing VL 192
1410 22:58:30.214105 # Validating EXTRA...
1411 22:58:30.214526 # uc context validated.
1412 22:58:30.214705 # 7184 byte GOOD CONTEXT grabbed from sig_copyctx handler
1413 22:58:30.214877 # Handled SIG_COPYCTX
1414 22:58:30.215064 # Got expected size 6576 and VL 192
1415 22:58:30.215232 # Testing VL 176
1416 22:58:30.215395 # Validating EXTRA...
1417 22:58:30.215559 # uc context validated.
1418 22:58:30.215722 # 6640 byte GOOD CONTEXT grabbed from sig_copyctx handler
1419 22:58:30.215856 # Handled SIG_COPYCTX
1420 22:58:30.215998 # Got expected size 6032 and VL 176
1421 22:58:30.216193 # Testing VL 160
1422 22:58:30.216363 # Validating EXTRA...
1423 22:58:30.216530 # uc context validated.
1424 22:58:30.216695 # 6096 byte GOOD CONTEXT grabbed from sig_copyctx handler
1425 22:58:30.216839 # Handled SIG_COPYCTX
1426 22:58:30.216999 # Got expected size 5488 and VL 160
1427 22:58:30.217163 # Testing VL 144
1428 22:58:30.217358 # Validating EXTRA...
1429 22:58:30.217565 # uc context validated.
1430 22:58:30.218261 # 5552 byte GOOD CONTEXT grabbed from sig_copyctx handler
1431 22:58:30.218458 # Handled SIG_COPYCTX
1432 22:58:30.218637 # Got expected size 4944 and VL 144
1433 22:58:30.218790 # Testing VL 128
1434 22:58:30.218912 # Validating EXTRA...
1435 22:58:30.219031 # uc context validated.
1436 22:58:30.219148 # 4992 byte GOOD CONTEXT grabbed from sig_copyctx handler
1437 22:58:30.219266 # Handled SIG_COPYCTX
1438 22:58:30.219383 # Got expected size 4384 and VL 128
1439 22:58:30.219500 # Testing VL 112
1440 22:58:30.219657 # Validating EXTRA...
1441 22:58:30.219781 # uc context validated.
1442 22:58:30.219900 # 4448 byte GOOD CONTEXT grabbed from sig_copyctx handler
1443 22:58:30.220019 # Handled SIG_COPYCTX
1444 22:58:30.220138 # Got expected size 3840 and VL 112
1445 22:58:30.220254 # Testing VL 96
1446 22:58:30.220370 # uc context validated.
1447 22:58:30.220488 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1448 22:58:30.220605 # Handled SIG_COPYCTX
1449 22:58:30.220723 # Got expected size 3296 and VL 96
1450 22:58:30.220840 # Testing VL 80
1451 22:58:30.220955 # uc context validated.
1452 22:58:30.221074 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1453 22:58:30.221190 # Handled SIG_COPYCTX
1454 22:58:30.221339 # Got expected size 2752 and VL 80
1455 22:58:30.221490 # Testing VL 64
1456 22:58:30.221611 # uc context validated.
1457 22:58:30.221742 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1458 22:58:30.221860 # Handled SIG_COPYCTX
1459 22:58:30.221976 # Got expected size 2208 and VL 64
1460 22:58:30.222092 # Testing VL 48
1461 22:58:30.222207 # uc context validated.
1462 22:58:30.222323 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1463 22:58:30.222484 # Handled SIG_COPYCTX
1464 22:58:30.222631 # Got expected size 1664 and VL 48
1465 22:58:30.222752 # Testing VL 32
1466 22:58:30.222869 # uc context validated.
1467 22:58:30.225911 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1468 22:58:30.226136 # Handled SIG_COPYCTX
1469 22:58:30.226266 # Got expected size 1120 and VL 32
1470 22:58:30.226683 # Testing VL 16
1471 22:58:30.226841 # uc context validated.
1472 22:58:30.226966 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1473 22:58:30.227108 # Handled SIG_COPYCTX
1474 22:58:30.227245 # Got expected size 576 and VL 16
1475 22:58:30.227363 # ==>> completed. PASS(1)
1476 22:58:30.227480 # # SVE registers :: Check that we get the right SVE registers reported
1477 22:58:30.227622 ok 24 selftests: arm64: sve_regs
1478 22:58:30.271181 # selftests: arm64: sve_vl
1479 22:58:30.325585 # Registered handlers for all signals.
1480 22:58:30.325848 # Detected MINSTKSIGSZ:10000
1481 22:58:30.326157 # Required Features: [ SVE ] supported
1482 22:58:30.326263 # Incompatible Features: [] absent
1483 22:58:30.326353 # Testcase initialized.
1484 22:58:30.326447 # uc context validated.
1485 22:58:30.326552 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1486 22:58:30.326643 # Handled SIG_COPYCTX
1487 22:58:30.326730 # got expected VL 64
1488 22:58:30.326817 # ==>> completed. PASS(1)
1489 22:58:30.326904 # # SVE VL :: Check that we get the right SVE VL reported
1490 22:58:30.335431 ok 25 selftests: arm64: sve_vl
1491 22:58:30.384932 # selftests: arm64: za_no_regs
1492 22:58:30.448616 # Registered handlers for all signals.
1493 22:58:30.448943 # Detected MINSTKSIGSZ:10000
1494 22:58:30.449338 # Required Features: [ SME ] supported
1495 22:58:30.449447 # Incompatible Features: [] absent
1496 22:58:30.449558 # Testcase initialized.
1497 22:58:30.449669 # Testing VL 256
1498 22:58:30.449755 # uc context validated.
1499 22:58:30.449835 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1500 22:58:30.449924 # Handled SIG_COPYCTX
1501 22:58:30.450001 # Got expected size 16 and VL 256
1502 22:58:30.450086 # Testing VL 128
1503 22:58:30.450171 # uc context validated.
1504 22:58:30.450254 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1505 22:58:30.450355 # Handled SIG_COPYCTX
1506 22:58:30.450443 # Got expected size 16 and VL 128
1507 22:58:30.450522 # Testing VL 64
1508 22:58:30.450590 # uc context validated.
1509 22:58:30.450655 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1510 22:58:30.450719 # Handled SIG_COPYCTX
1511 22:58:30.450780 # Got expected size 16 and VL 64
1512 22:58:30.450841 # Testing VL 32
1513 22:58:30.450902 # uc context validated.
1514 22:58:30.450964 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1515 22:58:30.451027 # Handled SIG_COPYCTX
1516 22:58:30.451089 # Got expected size 16 and VL 32
1517 22:58:30.451151 # Testing VL 16
1518 22:58:30.451212 # uc context validated.
1519 22:58:30.451293 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1520 22:58:30.451357 # Handled SIG_COPYCTX
1521 22:58:30.458396 # Got expected size 16 and VL 16
1522 22:58:30.458624 # ==>> completed. PASS(1)
1523 22:58:30.458916 # # ZA registers - ZA disabled :: Check ZA context with ZA disabled
1524 22:58:30.459750 ok 26 selftests: arm64: za_no_regs
1525 22:58:30.507323 # selftests: arm64: za_regs
1526 22:58:30.675079 # Registered handlers for all signals.
1527 22:58:30.675330 # Detected MINSTKSIGSZ:10000
1528 22:58:30.675424 # Required Features: [ SME ] supported
1529 22:58:30.675739 # Incompatible Features: [] absent
1530 22:58:30.675909 # Testcase initialized.
1531 22:58:30.676097 # Testing VL 256
1532 22:58:30.676272 # Validating EXTRA...
1533 22:58:30.676417 # uc context validated.
1534 22:58:30.676550 # 66160 byte GOOD CONTEXT grabbed from sig_copyctx handler
1535 22:58:30.676686 # Handled SIG_COPYCTX
1536 22:58:30.676813 # Got expected size 65552 and VL 256
1537 22:58:30.676972 # Testing VL 128
1538 22:58:30.677111 # Validating EXTRA...
1539 22:58:30.677243 # uc context validated.
1540 22:58:30.677419 # 17008 byte GOOD CONTEXT grabbed from sig_copyctx handler
1541 22:58:30.677600 # Handled SIG_COPYCTX
1542 22:58:30.677787 # Got expected size 16400 and VL 128
1543 22:58:30.677937 # Testing VL 64
1544 22:58:30.678079 # Validating EXTRA...
1545 22:58:30.678221 # uc context validated.
1546 22:58:30.678363 # 4720 byte GOOD CONTEXT grabbed from sig_copyctx handler
1547 22:58:30.678509 # Handled SIG_COPYCTX
1548 22:58:30.678656 # Got expected size 4112 and VL 64
1549 22:58:30.678799 # Testing VL 32
1550 22:58:30.678941 # uc context validated.
1551 22:58:30.679083 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1552 22:58:30.679226 # Handled SIG_COPYCTX
1553 22:58:30.679367 # Got expected size 1040 and VL 32
1554 22:58:30.679558 # Testing VL 16
1555 22:58:30.679697 # uc context validated.
1556 22:58:30.679843 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1557 22:58:30.680022 # Handled SIG_COPYCTX
1558 22:58:30.680195 # Got expected size 272 and VL 16
1559 22:58:30.680340 # ==>> completed. PASS(1)
1560 22:58:30.680507 # # ZA register :: Check that we get the right ZA registers reported
1561 22:58:30.686391 ok 27 selftests: arm64: za_regs
1562 22:58:30.739342 # selftests: arm64: pac
1563 22:58:30.915495 # TAP version 13
1564 22:58:30.915744 # 1..7
1565 22:58:30.916056 # # Starting 7 tests from 1 test cases.
1566 22:58:30.916162 # # RUN global.corrupt_pac ...
1567 22:58:30.916254 # # OK global.corrupt_pac
1568 22:58:30.916341 # ok 1 global.corrupt_pac
1569 22:58:30.916431 # # RUN global.pac_instructions_not_nop ...
1570 22:58:30.916518 # # OK global.pac_instructions_not_nop
1571 22:58:30.916604 # ok 2 global.pac_instructions_not_nop
1572 22:58:30.916691 # # RUN global.pac_instructions_not_nop_generic ...
1573 22:58:30.916800 # # OK global.pac_instructions_not_nop_generic
1574 22:58:30.916895 # ok 3 global.pac_instructions_not_nop_generic
1575 22:58:30.916986 # # RUN global.single_thread_different_keys ...
1576 22:58:30.917071 # # OK global.single_thread_different_keys
1577 22:58:30.917156 # ok 4 global.single_thread_different_keys
1578 22:58:30.917240 # # RUN global.exec_changed_keys ...
1579 22:58:30.917343 # # OK global.exec_changed_keys
1580 22:58:30.917432 # ok 5 global.exec_changed_keys
1581 22:58:30.917518 # # RUN global.context_switch_keep_keys ...
1582 22:58:30.917604 # # OK global.context_switch_keep_keys
1583 22:58:30.917696 # ok 6 global.context_switch_keep_keys
1584 22:58:30.917796 # # RUN global.context_switch_keep_keys_generic ...
1585 22:58:30.917900 # # OK global.context_switch_keep_keys_generic
1586 22:58:30.917991 # ok 7 global.context_switch_keep_keys_generic
1587 22:58:30.918082 # # PASSED: 7 / 7 tests passed.
1588 22:58:30.918165 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
1589 22:58:30.927705 ok 28 selftests: arm64: pac
1590 22:58:30.976495 # selftests: arm64: fp-stress
1591 22:58:47.079261 # TAP version 13
1592 22:58:47.079763 # 1..27
1593 22:58:47.079874 # # 1 CPUs, 16 SVE VLs, 5 SME VLs
1594 22:58:47.079966 # # Will run for 10s
1595 22:58:47.080053 # # Started FPSIMD-0-0
1596 22:58:47.080136 # # Started SVE-VL-256-0
1597 22:58:47.080220 # # Started SVE-VL-240-0
1598 22:58:47.080302 # # Started SVE-VL-224-0
1599 22:58:47.080385 # # Started SVE-VL-208-0
1600 22:58:47.080488 # # Started SVE-VL-192-0
1601 22:58:47.080574 # # Started SVE-VL-176-0
1602 22:58:47.080658 # # Started SVE-VL-160-0
1603 22:58:47.080741 # # Started SVE-VL-144-0
1604 22:58:47.080823 # # Started SVE-VL-128-0
1605 22:58:47.080906 # # Started SVE-VL-112-0
1606 22:58:47.080989 # # Started SVE-VL-96-0
1607 22:58:47.081080 # # Started SVE-VL-80-0
1608 22:58:47.081163 # # Started SVE-VL-64-0
1609 22:58:47.081246 # # Started SVE-VL-48-0
1610 22:58:47.081329 # # Started SVE-VL-32-0
1611 22:58:47.081412 # # Started SVE-VL-16-0
1612 22:58:47.081494 # # Started SSVE-VL-256-0
1613 22:58:47.081577 # # Started ZA-VL-256-0
1614 22:58:47.081667 # # Started SSVE-VL-128-0
1615 22:58:47.081752 # # Started ZA-VL-128-0
1616 22:58:47.081859 # # Started SSVE-VL-64-0
1617 22:58:47.081946 # # Started ZA-VL-64-0
1618 22:58:47.082033 # # Started SSVE-VL-32-0
1619 22:58:47.082116 # # Started ZA-VL-32-0
1620 22:58:47.082198 # # Started SSVE-VL-16-0
1621 22:58:47.082281 # # Started ZA-VL-16-0
1622 22:58:47.082368 # # FPSIMD-0-0: Vector length: 128 bits
1623 22:58:47.082452 # # FPSIMD-0-0: PID: 912
1624 22:58:47.082535 # # SVE-VL-240-0: Vector length: 1920 bits
1625 22:58:47.082618 # # SVE-VL-240-0: PID: 914
1626 22:58:47.082700 # # SVE-VL-256-0: Vector length: 2048 bits
1627 22:58:47.082783 # # SVE-VL-256-0: PID: 913
1628 22:58:47.082866 # # SVE-VL-208-0: Vector length: 1664 bits
1629 22:58:47.082949 # # SVE-VL-208-0: PID: 916
1630 22:58:47.083034 # # SVE-VL-192-0: Vector length: 1536 bits
1631 22:58:47.083122 # # SVE-VL-192-0: PID: 917
1632 22:58:47.083204 # # SVE-VL-224-0: Vector length: 1792 bits
1633 22:58:47.083287 # # SVE-VL-224-0: PID: 915
1634 22:58:47.083370 # # SVE-VL-176-0: Vector length: 1408 bits
1635 22:58:47.084594 # # SVE-VL-176-0: PID: 918
1636 22:58:47.084704 # # SVE-VL-64-0: Vector length: 512 bits
1637 22:58:47.084791 # # SVE-VL-64-0: PID: 925
1638 22:58:47.084874 # # SVE-VL-128-0: Vector length: 1024 bits
1639 22:58:47.084957 # # SVE-VL-128-0: PID: 921
1640 22:58:47.085040 # # SVE-VL-112-0: Vector length: 896 bits
1641 22:58:47.085123 # # SVE-VL-112-0: PID: 922
1642 22:58:47.085206 # # SVE-VL-144-0: Vector length: 1152 bits
1643 22:58:47.085288 # # SVE-VL-160-0: Vector length: 1280 bits
1644 22:58:47.085370 # # SVE-VL-160-0: PID: 919
1645 22:58:47.085449 # # SVE-VL-144-0: PID: 920
1646 22:58:47.085528 # # SVE-VL-96-0: Vector length: 768 bits
1647 22:58:47.085611 # # SVE-VL-96-0: PID: 923
1648 22:58:47.085703 # # SVE-VL-80-0: Vector length: 640 bits
1649 22:58:47.085786 # # SVE-VL-80-0: PID: 924
1650 22:58:47.085868 # # SVE-VL-16-0: Vector length: 128 bits
1651 22:58:47.085951 # # SVE-VL-16-0: PID: 928
1652 22:58:47.086033 # # ZA-VL-256-0: Streaming mode vector length: 2048 bits
1653 22:58:47.086116 # # ZA-VL-16-0: Streaming mode vector length: 128 bits
1654 22:58:47.086199 # # ZA-VL-16-0: PID: 938
1655 22:58:47.086280 # # SVE-VL-48-0: Vector length: 384 bits
1656 22:58:47.086367 # # SVE-VL-48-0: PID: 926
1657 22:58:47.086449 # # SSVE-VL-16-0: Streaming mode Vector length: 128 bits
1658 22:58:47.091833 # # SSVE-VL-16-0: PID: 937
1659 22:58:47.092040 # # SSVE-VL-64-0: Streaming mode Vector length: 512 bits
1660 22:58:47.092428 # # SSVE-VL-64-0: PID: 933
1661 22:58:47.092533 # # SSVE-VL-128-0: Streaming mode Vector length: 1024 bits
1662 22:58:47.092620 # # SSVE-VL-128-0: PID: 931
1663 22:58:47.092704 # # ZA-VL-256-0: PID: 930
1664 22:58:47.094771 # # SSVE-VL-32-0: Streaming mode Vector length: 256 bits
1665 22:58:47.094897 # # SSVE-VL-32-0: PID: 935
1666 22:58:47.094986 # # SVE-VL-32-0: Vector length: 256 bits
1667 22:58:47.095077 # # SVE-VL-32-0: PID: 927
1668 22:58:47.095165 # # SSVE-VL-256-0: Streaming mode Vector length: 2048 bits
1669 22:58:47.095250 # # SSVE-VL-256-0: PID: 929
1670 22:58:47.095335 # # ZA-VL-64-0: Streaming mode vector length: 512 bits
1671 22:58:47.095421 # # ZA-VL-128-0: Streaming mode vector length: 1024 bits
1672 22:58:47.095506 # # ZA-VL-64-0: PID: 934
1673 22:58:47.095590 # # ZA-VL-128-0: PID: 932
1674 22:58:47.095673 # # ZA-VL-32-0: Streaming mode vector length: 256 bits
1675 22:58:47.095758 # # ZA-VL-32-0: PID: 936
1676 22:58:47.095842 # # Finishing up...
1677 22:58:47.095927 # ok 1 FPSIMD-0-0
1678 22:58:47.096011 # ok 2 SVE-VL-256-0
1679 22:58:47.096095 # ok 3 SVE-VL-240-0
1680 22:58:47.096178 # ok 4 SVE-VL-224-0
1681 22:58:47.096262 # ok 5 SVE-VL-208-0
1682 22:58:47.096345 # ok 6 SVE-VL-192-0
1683 22:58:47.096429 # ok 7 SVE-VL-176-0
1684 22:58:47.096512 # ok 8 SVE-VL-160-0
1685 22:58:47.096595 # ok 9 SVE-VL-144-0
1686 22:58:47.096679 # ok 10 SVE-VL-128-0
1687 22:58:47.096762 # ok 11 SVE-VL-112-0
1688 22:58:47.096845 # ok 12 SVE-VL-96-0
1689 22:58:47.096928 # ok 13 SVE-VL-80-0
1690 22:58:47.097011 # ok 14 SVE-VL-64-0
1691 22:58:47.097094 # ok 15 SVE-VL-48-0
1692 22:58:47.097177 # ok 16 SVE-VL-32-0
1693 22:58:47.097260 # ok 17 SVE-VL-16-0
1694 22:58:47.097343 # ok 18 SSVE-VL-256-0
1695 22:58:47.097427 # ok 19 ZA-VL-256-0
1696 22:58:47.097510 # ok 20 SSVE-VL-128-0
1697 22:58:47.097594 # ok 21 ZA-VL-128-0
1698 22:58:47.097686 # ok 22 SSVE-VL-64-0
1699 22:58:47.097771 # ok 23 ZA-VL-64-0
1700 22:58:47.097856 # ok 24 SSVE-VL-32-0
1701 22:58:47.097939 # ok 25 ZA-VL-32-0
1702 22:58:47.098025 # ok 26 SSVE-VL-16-0
1703 22:58:47.098109 # ok 27 ZA-VL-16-0
1704 22:58:47.098211 # # FPSIMD-0-0: Terminated by signal 15, no error, iterations=3753, signals=9
1705 22:58:47.098313 # # ZA-VL-16-0: Terminated by signal 15, no error, iterations=1833, signals=9
1706 22:58:47.098682 # # SSVE-VL-16-0: Terminated by signal 15, no error, iterations=11353, signals=9
1707 22:58:47.119914 # # SSVE-VL-32-0: Terminated by signal 15, no error, iterations=8852, signals=9
1708 22:58:47.120203 # # SVE-VL-32-0: Terminated by signal 15, no error, iterations=7772, signals=9
1709 22:58:47.120378 # # SVE-VL-240-0: Terminated by signal 15, no error, iterations=2576, signals=9
1710 22:58:47.120561 # # ZA-VL-256-0: Terminated by signal 15, no error, iterations=173, signals=9
1711 22:58:47.120708 # # SVE-VL-176-0: Terminated by signal 15, no error, iterations=2955, signals=9
1712 22:58:47.120855 # # SVE-VL-224-0: Terminated by signal 15, no error, iterations=2475, signals=9
1713 22:58:47.244470 # # SVE-VL-16-0: Terminated by signal 15, no error, iterations=11335, signals=9
1714 22:58:47.244805 # # ZA-VL-64-0: Terminated by signal 15, no error, iterations=839, signals=9
1715 22:58:47.245323 # # ZA-VL-128-0: Terminated by signal 15, no error, iterations=475, signals=9
1716 22:58:47.245540 # # SSVE-VL-256-0: Terminated by signal 15, no error, iterations=2089, signals=9
1717 22:58:47.245746 # # SVE-VL-128-0: Terminated by signal 15, no error, iterations=3815, signals=9
1718 22:58:47.245972 # # SSVE-VL-128-0: Terminated by signal 15, no error, iterations=3801, signals=9
1719 22:58:47.246188 # # SVE-VL-80-0: Terminated by signal 15, no error, iterations=4686, signals=9
1720 22:58:47.246358 # # SVE-VL-160-0: Terminated by signal 15, no error, iterations=3288, signals=9
1721 22:58:47.246522 # # SVE-VL-96-0: Terminated by signal 15, no error, iterations=4513, signals=9
1722 22:58:47.246680 # # SVE-VL-64-0: Terminated by signal 15, no error, iterations=6143, signals=9
1723 22:58:47.246815 # # SVE-VL-192-0: Terminated by signal 15, no error, iterations=2921, signals=9
1724 22:58:47.246961 # # SVE-VL-256-0: Terminated by signal 15, no error, iterations=2459, signals=9
1725 22:58:47.268630 # # SVE-VL-144-0: Terminated by signal 15, no error, iterations=3411, signals=9
1726 22:58:47.269061 # # SVE-VL-208-0: Terminated by signal 15, no error, iterations=2823, signals=9
1727 22:58:47.269200 # # SSVE-VL-64-0: Terminated by signal 15, no error, iterations=6162, signals=9
1728 22:58:47.269397 # # SVE-VL-48-0: Terminated by signal 15, no error, iterations=6853, signals=9
1729 22:58:47.269499 # # SVE-VL-112-0: Terminated by signal 15, no error, iterations=3533, signals=9
1730 22:58:47.269567 # # ZA-VL-32-0: Terminated by signal 15, no error, iterations=1110, signals=9
1731 22:58:47.269629 # # Totals: pass:27 fail:0 xfail:0 xpass:0 skip:0 error:0
1732 22:58:47.333320 ok 29 selftests: arm64: fp-stress
1733 22:58:47.492933 # selftests: arm64: sve-ptrace
1734 22:58:47.632111 # TAP version 13
1735 22:58:47.632364 # 1..4104
1736 22:58:47.632674 # # Parent is 955, child is 956
1737 22:58:47.632785 # ok 1 SVE FPSIMD set via SVE: 0
1738 22:58:47.632877 # ok 2 SVE get_fpsimd() gave same state
1739 22:58:47.632964 # ok 3 SVE SVE_PT_VL_INHERIT set
1740 22:58:47.633051 # ok 4 SVE SVE_PT_VL_INHERIT cleared
1741 22:58:47.633135 # ok 5 Set SVE VL 16
1742 22:58:47.633220 # ok 6 Set and get SVE data for VL 16
1743 22:58:47.633307 # ok 7 Set and get FPSIMD data for SVE VL 16
1744 22:58:47.633413 # ok 8 Set FPSIMD, read via SVE for SVE VL 16
1745 22:58:47.633504 # ok 9 Set SVE VL 32
1746 22:58:47.633588 # ok 10 Set and get SVE data for VL 32
1747 22:58:47.633691 # ok 11 Set and get FPSIMD data for SVE VL 32
1748 22:58:47.633778 # ok 12 Set FPSIMD, read via SVE for SVE VL 32
1749 22:58:47.633863 # ok 13 Set SVE VL 48
1750 22:58:47.633948 # ok 14 Set and get SVE data for VL 48
1751 22:58:47.634054 # ok 15 Set and get FPSIMD data for SVE VL 48
1752 22:58:47.634143 # ok 16 Set FPSIMD, read via SVE for SVE VL 48
1753 22:58:47.634230 # ok 17 Set SVE VL 64
1754 22:58:47.634315 # ok 18 Set and get SVE data for VL 64
1755 22:58:47.634398 # ok 19 Set and get FPSIMD data for SVE VL 64
1756 22:58:47.634496 # ok 20 Set FPSIMD, read via SVE for SVE VL 64
1757 22:58:47.634575 # ok 21 Set SVE VL 80
1758 22:58:47.634649 # ok 22 Set and get SVE data for VL 80
1759 22:58:47.637508 # ok 23 Set and get FPSIMD data for SVE VL 80
1760 22:58:47.637826 # ok 24 Set FPSIMD, read via SVE for SVE VL 80
1761 22:58:47.637920 # ok 25 Set SVE VL 96
1762 22:58:47.638008 # ok 26 Set and get SVE data for VL 96
1763 22:58:47.638113 # ok 27 Set and get FPSIMD data for SVE VL 96
1764 22:58:47.638201 # ok 28 Set FPSIMD, read via SVE for SVE VL 96
1765 22:58:47.638288 # ok 29 Set SVE VL 112
1766 22:58:47.638372 # ok 30 Set and get SVE data for VL 112
1767 22:58:47.638469 # ok 31 Set and get FPSIMD data for SVE VL 112
1768 22:58:47.638550 # ok 32 Set FPSIMD, read via SVE for SVE VL 112
1769 22:58:47.638627 # ok 33 Set SVE VL 128
1770 22:58:47.638966 # ok 34 Set and get SVE data for VL 128
1771 22:58:47.639252 # ok 35 Set and get FPSIMD data for SVE VL 128
1772 22:58:47.639345 # ok 36 Set FPSIMD, read via SVE for SVE VL 128
1773 22:58:47.639430 # ok 37 Set SVE VL 144
1774 22:58:47.639531 # ok 38 Set and get SVE data for VL 144
1775 22:58:47.639617 # ok 39 Set and get FPSIMD data for SVE VL 144
1776 22:58:47.639701 # ok 40 Set FPSIMD, read via SVE for SVE VL 144
1777 22:58:47.639800 # ok 41 Set SVE VL 160
1778 22:58:47.639887 # ok 42 Set and get SVE data for VL 160
1779 22:58:47.639992 # ok 43 Set and get FPSIMD data for SVE VL 160
1780 22:58:47.640098 # ok 44 Set FPSIMD, read via SVE for SVE VL 160
1781 22:58:47.640187 # ok 45 Set SVE VL 176
1782 22:58:47.640286 # ok 46 Set and get SVE data for VL 176
1783 22:58:47.640387 # ok 47 Set and get FPSIMD data for SVE VL 176
1784 22:58:47.640674 # ok 48 Set FPSIMD, read via SVE for SVE VL 176
1785 22:58:47.640766 # ok 49 Set SVE VL 192
1786 22:58:47.640853 # ok 50 Set and get SVE data for VL 192
1787 22:58:47.640956 # ok 51 Set and get FPSIMD data for SVE VL 192
1788 22:58:47.641046 # ok 52 Set FPSIMD, read via SVE for SVE VL 192
1789 22:58:47.641150 # ok 53 Set SVE VL 208
1790 22:58:47.641241 # ok 54 Set and get SVE data for VL 208
1791 22:58:47.641343 # ok 55 Set and get FPSIMD data for SVE VL 208
1792 22:58:47.641445 # ok 56 Set FPSIMD, read via SVE for SVE VL 208
1793 22:58:47.641547 # ok 57 Set SVE VL 224
1794 22:58:47.641655 # ok 58 Set and get SVE data for VL 224
1795 22:58:47.641758 # ok 59 Set and get FPSIMD data for SVE VL 224
1796 22:58:47.642033 # ok 60 Set FPSIMD, read via SVE for SVE VL 224
1797 22:58:47.642126 # ok 61 Set SVE VL 240
1798 22:58:47.642211 # ok 62 Set and get SVE data for VL 240
1799 22:58:47.642607 # ok 63 Set and get FPSIMD data for SVE VL 240
1800 22:58:47.642718 # ok 64 Set FPSIMD, read via SVE for SVE VL 240
1801 22:58:47.642811 # ok 65 Set SVE VL 256
1802 22:58:47.642896 # ok 66 Set and get SVE data for VL 256
1803 22:58:47.649381 # ok 67 Set and get FPSIMD data for SVE VL 256
1804 22:58:47.649600 # ok 68 Set FPSIMD, read via SVE for SVE VL 256
1805 22:58:47.649703 # ok 69 Set SVE VL 272
1806 22:58:47.650004 # ok 70 # SKIP SVE set SVE get SVE for VL 272
1807 22:58:47.650116 # ok 71 # SKIP SVE set SVE get FPSIMD for VL 272
1808 22:58:47.650207 # ok 72 # SKIP SVE set FPSIMD get SVE for VL 272
1809 22:58:47.650295 # ok 73 Set SVE VL 288
1810 22:58:47.650381 # ok 74 # SKIP SVE set SVE get SVE for VL 288
1811 22:58:47.650461 # ok 75 # SKIP SVE set SVE get FPSIMD for VL 288
1812 22:58:47.650538 # ok 76 # SKIP SVE set FPSIMD get SVE for VL 288
1813 22:58:47.650612 # ok 77 Set SVE VL 304
1814 22:58:47.650684 # ok 78 # SKIP SVE set SVE get SVE for VL 304
1815 22:58:47.650773 # ok 79 # SKIP SVE set SVE get FPSIMD for VL 304
1816 22:58:47.650850 # ok 80 # SKIP SVE set FPSIMD get SVE for VL 304
1817 22:58:47.650924 # ok 81 Set SVE VL 320
1818 22:58:47.651255 # ok 82 # SKIP SVE set SVE get SVE for VL 320
1819 22:58:47.651361 # ok 83 # SKIP SVE set SVE get FPSIMD for VL 320
1820 22:58:47.651465 # ok 84 # SKIP SVE set FPSIMD get SVE for VL 320
1821 22:58:47.651555 # ok 85 Set SVE VL 336
1822 22:58:47.651655 # ok 86 # SKIP SVE set SVE get SVE for VL 336
1823 22:58:47.651755 # ok 87 # SKIP SVE set SVE get FPSIMD for VL 336
1824 22:58:47.651857 # ok 88 # SKIP SVE set FPSIMD get SVE for VL 336
1825 22:58:47.651957 # ok 89 Set SVE VL 352
1826 22:58:47.652057 # ok 90 # SKIP SVE set SVE get SVE for VL 352
1827 22:58:47.652158 # ok 91 # SKIP SVE set SVE get FPSIMD for VL 352
1828 22:58:47.652441 # ok 92 # SKIP SVE set FPSIMD get SVE for VL 352
1829 22:58:47.652533 # ok 93 Set SVE VL 368
1830 22:58:47.652630 # ok 94 # SKIP SVE set SVE get SVE for VL 368
1831 22:58:47.652731 # ok 95 # SKIP SVE set SVE get FPSIMD for VL 368
1832 22:58:47.652832 # ok 96 # SKIP SVE set FPSIMD get SVE for VL 368
1833 22:58:47.652932 # ok 97 Set SVE VL 384
1834 22:58:47.653018 # ok 98 # SKIP SVE set SVE get SVE for VL 384
1835 22:58:47.653117 # ok 99 # SKIP SVE set SVE get FPSIMD for VL 384
1836 22:58:47.653411 # ok 100 # SKIP SVE set FPSIMD get SVE for VL 384
1837 22:58:47.653507 # ok 101 Set SVE VL 400
1838 22:58:47.654493 # ok 102 # SKIP SVE set SVE get SVE for VL 400
1839 22:58:47.663348 # ok 103 # SKIP SVE set SVE get FPSIMD for VL 400
1840 22:58:47.663557 # ok 104 # SKIP SVE set FPSIMD get SVE for VL 400
1841 22:58:47.663648 # ok 105 Set SVE VL 416
1842 22:58:47.663938 # ok 106 # SKIP SVE set SVE get SVE for VL 416
1843 22:58:47.664030 # ok 107 # SKIP SVE set SVE get FPSIMD for VL 416
1844 22:58:47.664122 # ok 108 # SKIP SVE set FPSIMD get SVE for VL 416
1845 22:58:47.664207 # ok 109 Set SVE VL 432
1846 22:58:47.664292 # ok 110 # SKIP SVE set SVE get SVE for VL 432
1847 22:58:47.664377 # ok 111 # SKIP SVE set SVE get FPSIMD for VL 432
1848 22:58:47.664479 # ok 112 # SKIP SVE set FPSIMD get SVE for VL 432
1849 22:58:47.664569 # ok 113 Set SVE VL 448
1850 22:58:47.664656 # ok 114 # SKIP SVE set SVE get SVE for VL 448
1851 22:58:47.664740 # ok 115 # SKIP SVE set SVE get FPSIMD for VL 448
1852 22:58:47.664839 # ok 116 # SKIP SVE set FPSIMD get SVE for VL 448
1853 22:58:47.664925 # ok 117 Set SVE VL 464
1854 22:58:47.665009 # ok 118 # SKIP SVE set SVE get SVE for VL 464
1855 22:58:47.665108 # ok 119 # SKIP SVE set SVE get FPSIMD for VL 464
1856 22:58:47.665194 # ok 120 # SKIP SVE set FPSIMD get SVE for VL 464
1857 22:58:47.665292 # ok 121 Set SVE VL 480
1858 22:58:47.665384 # ok 122 # SKIP SVE set SVE get SVE for VL 480
1859 22:58:47.665483 # ok 123 # SKIP SVE set SVE get FPSIMD for VL 480
1860 22:58:47.665801 # ok 124 # SKIP SVE set FPSIMD get SVE for VL 480
1861 22:58:47.665909 # ok 125 Set SVE VL 496
1862 22:58:47.666013 # ok 126 # SKIP SVE set SVE get SVE for VL 496
1863 22:58:47.666097 # ok 127 # SKIP SVE set SVE get FPSIMD for VL 496
1864 22:58:47.666194 # ok 128 # SKIP SVE set FPSIMD get SVE for VL 496
1865 22:58:47.666491 # ok 129 Set SVE VL 512
1866 22:58:47.666594 # ok 130 # SKIP SVE set SVE get SVE for VL 512
1867 22:58:47.666680 # ok 131 # SKIP SVE set SVE get FPSIMD for VL 512
1868 22:58:47.671635 # ok 132 # SKIP SVE set FPSIMD get SVE for VL 512
1869 22:58:47.671836 # ok 133 Set SVE VL 528
1870 22:58:47.672159 # ok 134 # SKIP SVE set SVE get SVE for VL 528
1871 22:58:47.672263 # ok 135 # SKIP SVE set SVE get FPSIMD for VL 528
1872 22:58:47.672349 # ok 136 # SKIP SVE set FPSIMD get SVE for VL 528
1873 22:58:47.672433 # ok 137 Set SVE VL 544
1874 22:58:47.672516 # ok 138 # SKIP SVE set SVE get SVE for VL 544
1875 22:58:47.672616 # ok 139 # SKIP SVE set SVE get FPSIMD for VL 544
1876 22:58:47.672699 # ok 140 # SKIP SVE set FPSIMD get SVE for VL 544
1877 22:58:47.672782 # ok 141 Set SVE VL 560
1878 22:58:47.673076 # ok 142 # SKIP SVE set SVE get SVE for VL 560
1879 22:58:47.673175 # ok 143 # SKIP SVE set SVE get FPSIMD for VL 560
1880 22:58:47.673306 # ok 144 # SKIP SVE set FPSIMD get SVE for VL 560
1881 22:58:47.673412 # ok 145 Set SVE VL 576
1882 22:58:47.673495 # ok 146 # SKIP SVE set SVE get SVE for VL 576
1883 22:58:47.673602 # ok 147 # SKIP SVE set SVE get FPSIMD for VL 576
1884 22:58:47.673694 # ok 148 # SKIP SVE set FPSIMD get SVE for VL 576
1885 22:58:47.673773 # ok 149 Set SVE VL 592
1886 22:58:47.673870 # ok 150 # SKIP SVE set SVE get SVE for VL 592
1887 22:58:47.673954 # ok 151 # SKIP SVE set SVE get FPSIMD for VL 592
1888 22:58:47.674044 # ok 152 # SKIP SVE set FPSIMD get SVE for VL 592
1889 22:58:47.674135 # ok 153 Set SVE VL 608
1890 22:58:47.674225 # ok 154 # SKIP SVE set SVE get SVE for VL 608
1891 22:58:47.674326 # ok 155 # SKIP SVE set SVE get FPSIMD for VL 608
1892 22:58:47.674406 # ok 156 # SKIP SVE set FPSIMD get SVE for VL 608
1893 22:58:47.674483 # ok 157 Set SVE VL 624
1894 22:58:47.681191 # ok 158 # SKIP SVE set SVE get SVE for VL 624
1895 22:58:47.681617 # ok 159 # SKIP SVE set SVE get FPSIMD for VL 624
1896 22:58:47.681733 # ok 160 # SKIP SVE set FPSIMD get SVE for VL 624
1897 22:58:47.681820 # ok 161 Set SVE VL 640
1898 22:58:47.681902 # ok 162 # SKIP SVE set SVE get SVE for VL 640
1899 22:58:47.682000 # ok 163 # SKIP SVE set SVE get FPSIMD for VL 640
1900 22:58:47.682087 # ok 164 # SKIP SVE set FPSIMD get SVE for VL 640
1901 22:58:47.682173 # ok 165 Set SVE VL 656
1902 22:58:47.682254 # ok 166 # SKIP SVE set SVE get SVE for VL 656
1903 22:58:47.682352 # ok 167 # SKIP SVE set SVE get FPSIMD for VL 656
1904 22:58:47.682436 # ok 168 # SKIP SVE set FPSIMD get SVE for VL 656
1905 22:58:47.682532 # ok 169 Set SVE VL 672
1906 22:58:47.682630 # ok 170 # SKIP SVE set SVE get SVE for VL 672
1907 22:58:47.683055 # ok 171 # SKIP SVE set SVE get FPSIMD for VL 672
1908 22:58:47.683365 # ok 172 # SKIP SVE set FPSIMD get SVE for VL 672
1909 22:58:47.683469 # ok 173 Set SVE VL 688
1910 22:58:47.683560 # ok 174 # SKIP SVE set SVE get SVE for VL 688
1911 22:58:47.683658 # ok 175 # SKIP SVE set SVE get FPSIMD for VL 688
1912 22:58:47.683746 # ok 176 # SKIP SVE set FPSIMD get SVE for VL 688
1913 22:58:47.683832 # ok 177 Set SVE VL 704
1914 22:58:47.683937 # ok 178 # SKIP SVE set SVE get SVE for VL 704
1915 22:58:47.684021 # ok 179 # SKIP SVE set SVE get FPSIMD for VL 704
1916 22:58:47.684118 # ok 180 # SKIP SVE set FPSIMD get SVE for VL 704
1917 22:58:47.684203 # ok 181 Set SVE VL 720
1918 22:58:47.684298 # ok 182 # SKIP SVE set SVE get SVE for VL 720
1919 22:58:47.684396 # ok 183 # SKIP SVE set SVE get FPSIMD for VL 720
1920 22:58:47.684495 # ok 184 # SKIP SVE set FPSIMD get SVE for VL 720
1921 22:58:47.684593 # ok 185 Set SVE VL 736
1922 22:58:47.684691 # ok 186 # SKIP SVE set SVE get SVE for VL 736
1923 22:58:47.685059 # ok 187 # SKIP SVE set SVE get FPSIMD for VL 736
1924 22:58:47.685163 # ok 188 # SKIP SVE set FPSIMD get SVE for VL 736
1925 22:58:47.685250 # ok 189 Set SVE VL 752
1926 22:58:47.685333 # ok 190 # SKIP SVE set SVE get SVE for VL 752
1927 22:58:47.685432 # ok 191 # SKIP SVE set SVE get FPSIMD for VL 752
1928 22:58:47.685518 # ok 192 # SKIP SVE set FPSIMD get SVE for VL 752
1929 22:58:47.685601 # ok 193 Set SVE VL 768
1930 22:58:47.685708 # ok 194 # SKIP SVE set SVE get SVE for VL 768
1931 22:58:47.685808 # ok 195 # SKIP SVE set SVE get FPSIMD for VL 768
1932 22:58:47.686105 # ok 196 # SKIP SVE set FPSIMD get SVE for VL 768
1933 22:58:47.686210 # ok 197 Set SVE VL 784
1934 22:58:47.686311 # ok 198 # SKIP SVE set SVE get SVE for VL 784
1935 22:58:47.686413 # ok 199 # SKIP SVE set SVE get FPSIMD for VL 784
1936 22:58:47.686514 # ok 200 # SKIP SVE set FPSIMD get SVE for VL 784
1937 22:58:47.695265 # ok 201 Set SVE VL 800
1938 22:58:47.695725 # ok 202 # SKIP SVE set SVE get SVE for VL 800
1939 22:58:47.695832 # ok 203 # SKIP SVE set SVE get FPSIMD for VL 800
1940 22:58:47.695923 # ok 204 # SKIP SVE set FPSIMD get SVE for VL 800
1941 22:58:47.696008 # ok 205 Set SVE VL 816
1942 22:58:47.696108 # ok 206 # SKIP SVE set SVE get SVE for VL 816
1943 22:58:47.696198 # ok 207 # SKIP SVE set SVE get FPSIMD for VL 816
1944 22:58:47.696280 # ok 208 # SKIP SVE set FPSIMD get SVE for VL 816
1945 22:58:47.696362 # ok 209 Set SVE VL 832
1946 22:58:47.696460 # ok 210 # SKIP SVE set SVE get SVE for VL 832
1947 22:58:47.696546 # ok 211 # SKIP SVE set SVE get FPSIMD for VL 832
1948 22:58:47.696629 # ok 212 # SKIP SVE set FPSIMD get SVE for VL 832
1949 22:58:47.696726 # ok 213 Set SVE VL 848
1950 22:58:47.696812 # ok 214 # SKIP SVE set SVE get SVE for VL 848
1951 22:58:47.696911 # ok 215 # SKIP SVE set SVE get FPSIMD for VL 848
1952 22:58:47.697010 # ok 216 # SKIP SVE set FPSIMD get SVE for VL 848
1953 22:58:47.697109 # ok 217 Set SVE VL 864
1954 22:58:47.697214 # ok 218 # SKIP SVE set SVE get SVE for VL 864
1955 22:58:47.697633 # ok 219 # SKIP SVE set SVE get FPSIMD for VL 864
1956 22:58:47.697766 # ok 220 # SKIP SVE set FPSIMD get SVE for VL 864
1957 22:58:47.697858 # ok 221 Set SVE VL 880
1958 22:58:47.701473 # ok 222 # SKIP SVE set SVE get SVE for VL 880
1959 22:58:47.701630 # ok 223 # SKIP SVE set SVE get FPSIMD for VL 880
1960 22:58:47.701733 # ok 224 # SKIP SVE set FPSIMD get SVE for VL 880
1961 22:58:47.701824 # ok 225 Set SVE VL 896
1962 22:58:47.701914 # ok 226 # SKIP SVE set SVE get SVE for VL 896
1963 22:58:47.702004 # ok 227 # SKIP SVE set SVE get FPSIMD for VL 896
1964 22:58:47.702094 # ok 228 # SKIP SVE set FPSIMD get SVE for VL 896
1965 22:58:47.702183 # ok 229 Set SVE VL 912
1966 22:58:47.702278 # ok 230 # SKIP SVE set SVE get SVE for VL 912
1967 22:58:47.703685 # ok 231 # SKIP SVE set SVE get FPSIMD for VL 912
1968 22:58:47.703991 # ok 232 # SKIP SVE set FPSIMD get SVE for VL 912
1969 22:58:47.704097 # ok 233 Set SVE VL 928
1970 22:58:47.704185 # ok 234 # SKIP SVE set SVE get SVE for VL 928
1971 22:58:47.704286 # ok 235 # SKIP SVE set SVE get FPSIMD for VL 928
1972 22:58:47.704373 # ok 236 # SKIP SVE set FPSIMD get SVE for VL 928
1973 22:58:47.704458 # ok 237 Set SVE VL 944
1974 22:58:47.704557 # ok 238 # SKIP SVE set SVE get SVE for VL 944
1975 22:58:47.704644 # ok 239 # SKIP SVE set SVE get FPSIMD for VL 944
1976 22:58:47.704742 # ok 240 # SKIP SVE set FPSIMD get SVE for VL 944
1977 22:58:47.704830 # ok 241 Set SVE VL 960
1978 22:58:47.704930 # ok 242 # SKIP SVE set SVE get SVE for VL 960
1979 22:58:47.705252 # ok 243 # SKIP SVE set SVE get FPSIMD for VL 960
1980 22:58:47.705404 # ok 244 # SKIP SVE set FPSIMD get SVE for VL 960
1981 22:58:47.705574 # ok 245 Set SVE VL 976
1982 22:58:47.705692 # ok 246 # SKIP SVE set SVE get SVE for VL 976
1983 22:58:47.705782 # ok 247 # SKIP SVE set SVE get FPSIMD for VL 976
1984 22:58:47.705883 # ok 248 # SKIP SVE set FPSIMD get SVE for VL 976
1985 22:58:47.705986 # ok 249 Set SVE VL 992
1986 22:58:47.706073 # ok 250 # SKIP SVE set SVE get SVE for VL 992
1987 22:58:47.706174 # ok 251 # SKIP SVE set SVE get FPSIMD for VL 992
1988 22:58:47.706460 # ok 252 # SKIP SVE set FPSIMD get SVE for VL 992
1989 22:58:47.706556 # ok 253 Set SVE VL 1008
1990 22:58:47.711104 # ok 254 # SKIP SVE set SVE get SVE for VL 1008
1991 22:58:47.711587 # ok 255 # SKIP SVE set SVE get FPSIMD for VL 1008
1992 22:58:47.711714 # ok 256 # SKIP SVE set FPSIMD get SVE for VL 1008
1993 22:58:47.711806 # ok 257 Set SVE VL 1024
1994 22:58:47.711909 # ok 258 # SKIP SVE set SVE get SVE for VL 1024
1995 22:58:47.711998 # ok 259 # SKIP SVE set SVE get FPSIMD for VL 1024
1996 22:58:47.712086 # ok 260 # SKIP SVE set FPSIMD get SVE for VL 1024
1997 22:58:47.712189 # ok 261 Set SVE VL 1040
1998 22:58:47.712276 # ok 262 # SKIP SVE set SVE get SVE for VL 1040
1999 22:58:47.712376 # ok 263 # SKIP SVE set SVE get FPSIMD for VL 1040
2000 22:58:47.712463 # ok 264 # SKIP SVE set FPSIMD get SVE for VL 1040
2001 22:58:47.712563 # ok 265 Set SVE VL 1056
2002 22:58:47.712649 # ok 266 # SKIP SVE set SVE get SVE for VL 1056
2003 22:58:47.712748 # ok 267 # SKIP SVE set SVE get FPSIMD for VL 1056
2004 22:58:47.713088 # ok 268 # SKIP SVE set FPSIMD get SVE for VL 1056
2005 22:58:47.713196 # ok 269 Set SVE VL 1072
2006 22:58:47.713302 # ok 270 # SKIP SVE set SVE get SVE for VL 1072
2007 22:58:47.713473 # ok 271 # SKIP SVE set SVE get FPSIMD for VL 1072
2008 22:58:47.713593 # ok 272 # SKIP SVE set FPSIMD get SVE for VL 1072
2009 22:58:47.713694 # ok 273 Set SVE VL 1088
2010 22:58:47.713798 # ok 274 # SKIP SVE set SVE get SVE for VL 1088
2011 22:58:47.713889 # ok 275 # SKIP SVE set SVE get FPSIMD for VL 1088
2012 22:58:47.713991 # ok 276 # SKIP SVE set FPSIMD get SVE for VL 1088
2013 22:58:47.714081 # ok 277 Set SVE VL 1104
2014 22:58:47.714187 # ok 278 # SKIP SVE set SVE get SVE for VL 1104
2015 22:58:47.714477 # ok 279 # SKIP SVE set SVE get FPSIMD for VL 1104
2016 22:58:47.714630 # ok 280 # SKIP SVE set FPSIMD get SVE for VL 1104
2017 22:58:47.714724 # ok 281 Set SVE VL 1120
2018 22:58:47.714802 # ok 282 # SKIP SVE set SVE get SVE for VL 1120
2019 22:58:47.720157 # ok 283 # SKIP SVE set SVE get FPSIMD for VL 1120
2020 22:58:47.720538 # ok 284 # SKIP SVE set FPSIMD get SVE for VL 1120
2021 22:58:47.720645 # ok 285 Set SVE VL 1136
2022 22:58:47.720733 # ok 286 # SKIP SVE set SVE get SVE for VL 1136
2023 22:58:47.720834 # ok 287 # SKIP SVE set SVE get FPSIMD for VL 1136
2024 22:58:47.720921 # ok 288 # SKIP SVE set FPSIMD get SVE for VL 1136
2025 22:58:47.721006 # ok 289 Set SVE VL 1152
2026 22:58:47.721104 # ok 290 # SKIP SVE set SVE get SVE for VL 1152
2027 22:58:47.721186 # ok 291 # SKIP SVE set SVE get FPSIMD for VL 1152
2028 22:58:47.721279 # ok 292 # SKIP SVE set FPSIMD get SVE for VL 1152
2029 22:58:47.731250 # ok 293 Set SVE VL 1168
2030 22:58:47.731715 # ok 294 # SKIP SVE set SVE get SVE for VL 1168
2031 22:58:47.731816 # ok 295 # SKIP SVE set SVE get FPSIMD for VL 1168
2032 22:58:47.731907 # ok 296 # SKIP SVE set FPSIMD get SVE for VL 1168
2033 22:58:47.731996 # ok 297 Set SVE VL 1184
2034 22:58:47.732085 # ok 298 # SKIP SVE set SVE get SVE for VL 1184
2035 22:58:47.732191 # ok 299 # SKIP SVE set SVE get FPSIMD for VL 1184
2036 22:58:47.732282 # ok 300 # SKIP SVE set FPSIMD get SVE for VL 1184
2037 22:58:47.732370 # ok 301 Set SVE VL 1200
2038 22:58:47.732457 # ok 302 # SKIP SVE set SVE get SVE for VL 1200
2039 22:58:47.732561 # ok 303 # SKIP SVE set SVE get FPSIMD for VL 1200
2040 22:58:47.732650 # ok 304 # SKIP SVE set FPSIMD get SVE for VL 1200
2041 22:58:47.732737 # ok 305 Set SVE VL 1216
2042 22:58:47.732841 # ok 306 # SKIP SVE set SVE get SVE for VL 1216
2043 22:58:47.732933 # ok 307 # SKIP SVE set SVE get FPSIMD for VL 1216
2044 22:58:47.733037 # ok 308 # SKIP SVE set FPSIMD get SVE for VL 1216
2045 22:58:47.733143 # ok 309 Set SVE VL 1232
2046 22:58:47.733234 # ok 310 # SKIP SVE set SVE get SVE for VL 1232
2047 22:58:47.733392 # ok 311 # SKIP SVE set SVE get FPSIMD for VL 1232
2048 22:58:47.733531 # ok 312 # SKIP SVE set FPSIMD get SVE for VL 1232
2049 22:58:47.733645 # ok 313 Set SVE VL 1248
2050 22:58:47.733761 # ok 314 # SKIP SVE set SVE get SVE for VL 1248
2051 22:58:47.733854 # ok 315 # SKIP SVE set SVE get FPSIMD for VL 1248
2052 22:58:47.733960 # ok 316 # SKIP SVE set FPSIMD get SVE for VL 1248
2053 22:58:47.734053 # ok 317 Set SVE VL 1264
2054 22:58:47.734157 # ok 318 # SKIP SVE set SVE get SVE for VL 1264
2055 22:58:47.734262 # ok 319 # SKIP SVE set SVE get FPSIMD for VL 1264
2056 22:58:47.734556 # ok 320 # SKIP SVE set FPSIMD get SVE for VL 1264
2057 22:58:47.734644 # ok 321 Set SVE VL 1280
2058 22:58:47.734733 # ok 322 # SKIP SVE set SVE get SVE for VL 1280
2059 22:58:47.739254 # ok 323 # SKIP SVE set SVE get FPSIMD for VL 1280
2060 22:58:47.739417 # ok 324 # SKIP SVE set FPSIMD get SVE for VL 1280
2061 22:58:47.739529 # ok 325 Set SVE VL 1296
2062 22:58:47.739619 # ok 326 # SKIP SVE set SVE get SVE for VL 1296
2063 22:58:47.739711 # ok 327 # SKIP SVE set SVE get FPSIMD for VL 1296
2064 22:58:47.739815 # ok 328 # SKIP SVE set FPSIMD get SVE for VL 1296
2065 22:58:47.739905 # ok 329 Set SVE VL 1312
2066 22:58:47.740003 # ok 330 # SKIP SVE set SVE get SVE for VL 1312
2067 22:58:47.740110 # ok 331 # SKIP SVE set SVE get FPSIMD for VL 1312
2068 22:58:47.740199 # ok 332 # SKIP SVE set FPSIMD get SVE for VL 1312
2069 22:58:47.740306 # ok 333 Set SVE VL 1328
2070 22:58:47.740410 # ok 334 # SKIP SVE set SVE get SVE for VL 1328
2071 22:58:47.740515 # ok 335 # SKIP SVE set SVE get FPSIMD for VL 1328
2072 22:58:47.740619 # ok 336 # SKIP SVE set FPSIMD get SVE for VL 1328
2073 22:58:47.740722 # ok 337 Set SVE VL 1344
2074 22:58:47.741109 # ok 338 # SKIP SVE set SVE get SVE for VL 1344
2075 22:58:47.741210 # ok 339 # SKIP SVE set SVE get FPSIMD for VL 1344
2076 22:58:47.741347 # ok 340 # SKIP SVE set FPSIMD get SVE for VL 1344
2077 22:58:47.741486 # ok 341 Set SVE VL 1360
2078 22:58:47.741599 # ok 342 # SKIP SVE set SVE get SVE for VL 1360
2079 22:58:47.741697 # ok 343 # SKIP SVE set SVE get FPSIMD for VL 1360
2080 22:58:47.741798 # ok 344 # SKIP SVE set FPSIMD get SVE for VL 1360
2081 22:58:47.742103 # ok 345 Set SVE VL 1376
2082 22:58:47.742205 # ok 346 # SKIP SVE set SVE get SVE for VL 1376
2083 22:58:47.742293 # ok 347 # SKIP SVE set SVE get FPSIMD for VL 1376
2084 22:58:47.742392 # ok 348 # SKIP SVE set FPSIMD get SVE for VL 1376
2085 22:58:47.742476 # ok 349 Set SVE VL 1392
2086 22:58:47.742570 # ok 350 # SKIP SVE set SVE get SVE for VL 1392
2087 22:58:47.742649 # ok 351 # SKIP SVE set SVE get FPSIMD for VL 1392
2088 22:58:47.747363 # ok 352 # SKIP SVE set FPSIMD get SVE for VL 1392
2089 22:58:47.747544 # ok 353 Set SVE VL 1408
2090 22:58:47.747632 # ok 354 # SKIP SVE set SVE get SVE for VL 1408
2091 22:58:47.747732 # ok 355 # SKIP SVE set SVE get FPSIMD for VL 1408
2092 22:58:47.747818 # ok 356 # SKIP SVE set FPSIMD get SVE for VL 1408
2093 22:58:47.747901 # ok 357 Set SVE VL 1424
2094 22:58:47.748001 # ok 358 # SKIP SVE set SVE get SVE for VL 1424
2095 22:58:47.748085 # ok 359 # SKIP SVE set SVE get FPSIMD for VL 1424
2096 22:58:47.748183 # ok 360 # SKIP SVE set FPSIMD get SVE for VL 1424
2097 22:58:47.748266 # ok 361 Set SVE VL 1440
2098 22:58:47.748364 # ok 362 # SKIP SVE set SVE get SVE for VL 1440
2099 22:58:47.748466 # ok 363 # SKIP SVE set SVE get FPSIMD for VL 1440
2100 22:58:47.748568 # ok 364 # SKIP SVE set FPSIMD get SVE for VL 1440
2101 22:58:47.748667 # ok 365 Set SVE VL 1456
2102 22:58:47.748766 # ok 366 # SKIP SVE set SVE get SVE for VL 1456
2103 22:58:47.749066 # ok 367 # SKIP SVE set SVE get FPSIMD for VL 1456
2104 22:58:47.749175 # ok 368 # SKIP SVE set FPSIMD get SVE for VL 1456
2105 22:58:47.749284 # ok 369 Set SVE VL 1472
2106 22:58:47.749391 # ok 370 # SKIP SVE set SVE get SVE for VL 1472
2107 22:58:47.749478 # ok 371 # SKIP SVE set SVE get FPSIMD for VL 1472
2108 22:58:47.749580 # ok 372 # SKIP SVE set FPSIMD get SVE for VL 1472
2109 22:58:47.749677 # ok 373 Set SVE VL 1488
2110 22:58:47.749965 # ok 374 # SKIP SVE set SVE get SVE for VL 1488
2111 22:58:47.750057 # ok 375 # SKIP SVE set SVE get FPSIMD for VL 1488
2112 22:58:47.750144 # ok 376 # SKIP SVE set FPSIMD get SVE for VL 1488
2113 22:58:47.750246 # ok 377 Set SVE VL 1504
2114 22:58:47.750333 # ok 378 # SKIP SVE set SVE get SVE for VL 1504
2115 22:58:47.750418 # ok 379 # SKIP SVE set SVE get FPSIMD for VL 1504
2116 22:58:47.750502 # ok 380 # SKIP SVE set FPSIMD get SVE for VL 1504
2117 22:58:47.750586 # ok 381 Set SVE VL 1520
2118 22:58:47.750670 # ok 382 # SKIP SVE set SVE get SVE for VL 1520
2119 22:58:47.750770 # ok 383 # SKIP SVE set SVE get FPSIMD for VL 1520
2120 22:58:47.750857 # ok 384 # SKIP SVE set FPSIMD get SVE for VL 1520
2121 22:58:47.750941 # ok 385 Set SVE VL 1536
2122 22:58:47.751024 # ok 386 # SKIP SVE set SVE get SVE for VL 1536
2123 22:58:47.755245 # ok 387 # SKIP SVE set SVE get FPSIMD for VL 1536
2124 22:58:47.755388 # ok 388 # SKIP SVE set FPSIMD get SVE for VL 1536
2125 22:58:47.755495 # ok 389 Set SVE VL 1552
2126 22:58:47.755583 # ok 390 # SKIP SVE set SVE get SVE for VL 1552
2127 22:58:47.755670 # ok 391 # SKIP SVE set SVE get FPSIMD for VL 1552
2128 22:58:47.755754 # ok 392 # SKIP SVE set FPSIMD get SVE for VL 1552
2129 22:58:47.755852 # ok 393 Set SVE VL 1568
2130 22:58:47.755979 # ok 394 # SKIP SVE set SVE get SVE for VL 1568
2131 22:58:47.756108 # ok 395 # SKIP SVE set SVE get FPSIMD for VL 1568
2132 22:58:47.756228 # ok 396 # SKIP SVE set FPSIMD get SVE for VL 1568
2133 22:58:47.756318 # ok 397 Set SVE VL 1584
2134 22:58:47.756403 # ok 398 # SKIP SVE set SVE get SVE for VL 1584
2135 22:58:47.756488 # ok 399 # SKIP SVE set SVE get FPSIMD for VL 1584
2136 22:58:47.756589 # ok 400 # SKIP SVE set FPSIMD get SVE for VL 1584
2137 22:58:47.756675 # ok 401 Set SVE VL 1600
2138 22:58:47.756759 # ok 402 # SKIP SVE set SVE get SVE for VL 1600
2139 22:58:47.756843 # ok 403 # SKIP SVE set SVE get FPSIMD for VL 1600
2140 22:58:47.756943 # ok 404 # SKIP SVE set FPSIMD get SVE for VL 1600
2141 22:58:47.757029 # ok 405 Set SVE VL 1616
2142 22:58:47.757113 # ok 406 # SKIP SVE set SVE get SVE for VL 1616
2143 22:58:47.757213 # ok 407 # SKIP SVE set SVE get FPSIMD for VL 1616
2144 22:58:47.757299 # ok 408 # SKIP SVE set FPSIMD get SVE for VL 1616
2145 22:58:47.757383 # ok 409 Set SVE VL 1632
2146 22:58:47.757466 # ok 410 # SKIP SVE set SVE get SVE for VL 1632
2147 22:58:47.757569 # ok 411 # SKIP SVE set SVE get FPSIMD for VL 1632
2148 22:58:47.757668 # ok 412 # SKIP SVE set FPSIMD get SVE for VL 1632
2149 22:58:47.757754 # ok 413 Set SVE VL 1648
2150 22:58:47.757838 # ok 414 # SKIP SVE set SVE get SVE for VL 1648
2151 22:58:47.757922 # ok 415 # SKIP SVE set SVE get FPSIMD for VL 1648
2152 22:58:47.758006 # ok 416 # SKIP SVE set FPSIMD get SVE for VL 1648
2153 22:58:47.758108 # ok 417 Set SVE VL 1664
2154 22:58:47.758194 # ok 418 # SKIP SVE set SVE get SVE for VL 1664
2155 22:58:47.758283 # ok 419 # SKIP SVE set SVE get FPSIMD for VL 1664
2156 22:58:47.758368 # ok 420 # SKIP SVE set FPSIMD get SVE for VL 1664
2157 22:58:47.758452 # ok 421 Set SVE VL 1680
2158 22:58:47.758551 # ok 422 # SKIP SVE set SVE get SVE for VL 1680
2159 22:58:47.758638 # ok 423 # SKIP SVE set SVE get FPSIMD for VL 1680
2160 22:58:47.758722 # ok 424 # SKIP SVE set FPSIMD get SVE for VL 1680
2161 22:58:47.758806 # ok 425 Set SVE VL 1696
2162 22:58:47.758889 # ok 426 # SKIP SVE set SVE get SVE for VL 1696
2163 22:58:47.762936 # ok 427 # SKIP SVE set SVE get FPSIMD for VL 1696
2164 22:58:47.763274 # ok 428 # SKIP SVE set FPSIMD get SVE for VL 1696
2165 22:58:47.763368 # ok 429 Set SVE VL 1712
2166 22:58:47.763455 # ok 430 # SKIP SVE set SVE get SVE for VL 1712
2167 22:58:47.763541 # ok 431 # SKIP SVE set SVE get FPSIMD for VL 1712
2168 22:58:47.763643 # ok 432 # SKIP SVE set FPSIMD get SVE for VL 1712
2169 22:58:47.763730 # ok 433 Set SVE VL 1728
2170 22:58:47.763815 # ok 434 # SKIP SVE set SVE get SVE for VL 1728
2171 22:58:47.763899 # ok 435 # SKIP SVE set SVE get FPSIMD for VL 1728
2172 22:58:47.764006 # ok 436 # SKIP SVE set FPSIMD get SVE for VL 1728
2173 22:58:47.764094 # ok 437 Set SVE VL 1744
2174 22:58:47.764177 # ok 438 # SKIP SVE set SVE get SVE for VL 1744
2175 22:58:47.764259 # ok 439 # SKIP SVE set SVE get FPSIMD for VL 1744
2176 22:58:47.764358 # ok 440 # SKIP SVE set FPSIMD get SVE for VL 1744
2177 22:58:47.764443 # ok 441 Set SVE VL 1760
2178 22:58:47.764528 # ok 442 # SKIP SVE set SVE get SVE for VL 1760
2179 22:58:47.764612 # ok 443 # SKIP SVE set SVE get FPSIMD for VL 1760
2180 22:58:47.764712 # ok 444 # SKIP SVE set FPSIMD get SVE for VL 1760
2181 22:58:47.764800 # ok 445 Set SVE VL 1776
2182 22:58:47.764898 # ok 446 # SKIP SVE set SVE get SVE for VL 1776
2183 22:58:47.764983 # ok 447 # SKIP SVE set SVE get FPSIMD for VL 1776
2184 22:58:47.765269 # ok 448 # SKIP SVE set FPSIMD get SVE for VL 1776
2185 22:58:47.765373 # ok 449 Set SVE VL 1792
2186 22:58:47.765474 # ok 450 # SKIP SVE set SVE get SVE for VL 1792
2187 22:58:47.765582 # ok 451 # SKIP SVE set SVE get FPSIMD for VL 1792
2188 22:58:47.765676 # ok 452 # SKIP SVE set FPSIMD get SVE for VL 1792
2189 22:58:47.765761 # ok 453 Set SVE VL 1808
2190 22:58:47.765858 # ok 454 # SKIP SVE set SVE get SVE for VL 1808
2191 22:58:47.765942 # ok 455 # SKIP SVE set SVE get FPSIMD for VL 1808
2192 22:58:47.766039 # ok 456 # SKIP SVE set FPSIMD get SVE for VL 1808
2193 22:58:47.766124 # ok 457 Set SVE VL 1824
2194 22:58:47.766221 # ok 458 # SKIP SVE set SVE get SVE for VL 1824
2195 22:58:47.766322 # ok 459 # SKIP SVE set SVE get FPSIMD for VL 1824
2196 22:58:47.766421 # ok 460 # SKIP SVE set FPSIMD get SVE for VL 1824
2197 22:58:47.770856 # ok 461 Set SVE VL 1840
2198 22:58:47.771214 # ok 462 # SKIP SVE set SVE get SVE for VL 1840
2199 22:58:47.771325 # ok 463 # SKIP SVE set SVE get FPSIMD for VL 1840
2200 22:58:47.771415 # ok 464 # SKIP SVE set FPSIMD get SVE for VL 1840
2201 22:58:47.771519 # ok 465 Set SVE VL 1856
2202 22:58:47.771605 # ok 466 # SKIP SVE set SVE get SVE for VL 1856
2203 22:58:47.771704 # ok 467 # SKIP SVE set SVE get FPSIMD for VL 1856
2204 22:58:47.771790 # ok 468 # SKIP SVE set FPSIMD get SVE for VL 1856
2205 22:58:47.771888 # ok 469 Set SVE VL 1872
2206 22:58:47.772058 # ok 470 # SKIP SVE set SVE get SVE for VL 1872
2207 22:58:47.772179 # ok 471 # SKIP SVE set SVE get FPSIMD for VL 1872
2208 22:58:47.772267 # ok 472 # SKIP SVE set FPSIMD get SVE for VL 1872
2209 22:58:47.772568 # ok 473 Set SVE VL 1888
2210 22:58:47.772671 # ok 474 # SKIP SVE set SVE get SVE for VL 1888
2211 22:58:47.772756 # ok 475 # SKIP SVE set SVE get FPSIMD for VL 1888
2212 22:58:47.772853 # ok 476 # SKIP SVE set FPSIMD get SVE for VL 1888
2213 22:58:47.773138 # ok 477 Set SVE VL 1904
2214 22:58:47.773231 # ok 478 # SKIP SVE set SVE get SVE for VL 1904
2215 22:58:47.773369 # ok 479 # SKIP SVE set SVE get FPSIMD for VL 1904
2216 22:58:47.779398 # ok 480 # SKIP SVE set FPSIMD get SVE for VL 1904
2217 22:58:47.779586 # ok 481 Set SVE VL 1920
2218 22:58:47.779676 # ok 482 # SKIP SVE set SVE get SVE for VL 1920
2219 22:58:47.779779 # ok 483 # SKIP SVE set SVE get FPSIMD for VL 1920
2220 22:58:47.779870 # ok 484 # SKIP SVE set FPSIMD get SVE for VL 1920
2221 22:58:47.780011 # ok 485 Set SVE VL 1936
2222 22:58:47.780155 # ok 486 # SKIP SVE set SVE get SVE for VL 1936
2223 22:58:47.780256 # ok 487 # SKIP SVE set SVE get FPSIMD for VL 1936
2224 22:58:47.780351 # ok 488 # SKIP SVE set FPSIMD get SVE for VL 1936
2225 22:58:47.780456 # ok 489 Set SVE VL 1952
2226 22:58:47.780544 # ok 490 # SKIP SVE set SVE get SVE for VL 1952
2227 22:58:47.780643 # ok 491 # SKIP SVE set SVE get FPSIMD for VL 1952
2228 22:58:47.780745 # ok 492 # SKIP SVE set FPSIMD get SVE for VL 1952
2229 22:58:47.780846 # ok 493 Set SVE VL 1968
2230 22:58:47.780944 # ok 494 # SKIP SVE set SVE get SVE for VL 1968
2231 22:58:47.781244 # ok 495 # SKIP SVE set SVE get FPSIMD for VL 1968
2232 22:58:47.781400 # ok 496 # SKIP SVE set FPSIMD get SVE for VL 1968
2233 22:58:47.781590 # ok 497 Set SVE VL 1984
2234 22:58:47.781692 # ok 498 # SKIP SVE set SVE get SVE for VL 1984
2235 22:58:47.781779 # ok 499 # SKIP SVE set SVE get FPSIMD for VL 1984
2236 22:58:47.781878 # ok 500 # SKIP SVE set FPSIMD get SVE for VL 1984
2237 22:58:47.781963 # ok 501 Set SVE VL 2000
2238 22:58:47.782060 # ok 502 # SKIP SVE set SVE get SVE for VL 2000
2239 22:58:47.782158 # ok 503 # SKIP SVE set SVE get FPSIMD for VL 2000
2240 22:58:47.782260 # ok 504 # SKIP SVE set FPSIMD get SVE for VL 2000
2241 22:58:47.782359 # ok 505 Set SVE VL 2016
2242 22:58:47.782457 # ok 506 # SKIP SVE set SVE get SVE for VL 2016
2243 22:58:47.786432 # ok 507 # SKIP SVE set SVE get FPSIMD for VL 2016
2244 22:58:47.787142 # ok 508 # SKIP SVE set FPSIMD get SVE for VL 2016
2245 22:58:47.787255 # ok 509 Set SVE VL 2032
2246 22:58:47.787537 # ok 510 # SKIP SVE set SVE get SVE for VL 2032
2247 22:58:47.787630 # ok 511 # SKIP SVE set SVE get FPSIMD for VL 2032
2248 22:58:47.787929 # ok 512 # SKIP SVE set FPSIMD get SVE for VL 2032
2249 22:58:47.788034 # ok 513 Set SVE VL 2048
2250 22:58:47.788119 # ok 514 # SKIP SVE set SVE get SVE for VL 2048
2251 22:58:47.788218 # ok 515 # SKIP SVE set SVE get FPSIMD for VL 2048
2252 22:58:47.788305 # ok 516 # SKIP SVE set FPSIMD get SVE for VL 2048
2253 22:58:47.788405 # ok 517 Set SVE VL 2064
2254 22:58:47.788506 # ok 518 # SKIP SVE set SVE get SVE for VL 2064
2255 22:58:47.788606 # ok 519 # SKIP SVE set SVE get FPSIMD for VL 2064
2256 22:58:47.788892 # ok 520 # SKIP SVE set FPSIMD get SVE for VL 2064
2257 22:58:47.788983 # ok 521 Set SVE VL 2080
2258 22:58:47.789083 # ok 522 # SKIP SVE set SVE get SVE for VL 2080
2259 22:58:47.789169 # ok 523 # SKIP SVE set SVE get FPSIMD for VL 2080
2260 22:58:47.789267 # ok 524 # SKIP SVE set FPSIMD get SVE for VL 2080
2261 22:58:47.789553 # ok 525 Set SVE VL 2096
2262 22:58:47.789687 # ok 526 # SKIP SVE set SVE get SVE for VL 2096
2263 22:58:47.789781 # ok 527 # SKIP SVE set SVE get FPSIMD for VL 2096
2264 22:58:47.789882 # ok 528 # SKIP SVE set FPSIMD get SVE for VL 2096
2265 22:58:47.789967 # ok 529 Set SVE VL 2112
2266 22:58:47.790064 # ok 530 # SKIP SVE set SVE get SVE for VL 2112
2267 22:58:47.790149 # ok 531 # SKIP SVE set SVE get FPSIMD for VL 2112
2268 22:58:47.790247 # ok 532 # SKIP SVE set FPSIMD get SVE for VL 2112
2269 22:58:47.790332 # ok 533 Set SVE VL 2128
2270 22:58:47.790434 # ok 534 # SKIP SVE set SVE get SVE for VL 2128
2271 22:58:47.790830 # ok 535 # SKIP SVE set SVE get FPSIMD for VL 2128
2272 22:58:47.790967 # ok 536 # SKIP SVE set FPSIMD get SVE for VL 2128
2273 22:58:47.791056 # ok 537 Set SVE VL 2144
2274 22:58:47.791155 # ok 538 # SKIP SVE set SVE get SVE for VL 2144
2275 22:58:47.791306 # ok 539 # SKIP SVE set SVE get FPSIMD for VL 2144
2276 22:58:47.791408 # ok 540 # SKIP SVE set FPSIMD get SVE for VL 2144
2277 22:58:47.791495 # ok 541 Set SVE VL 2160
2278 22:58:47.791579 # ok 542 # SKIP SVE set SVE get SVE for VL 2160
2279 22:58:47.791678 # ok 543 # SKIP SVE set SVE get FPSIMD for VL 2160
2280 22:58:47.791765 # ok 544 # SKIP SVE set FPSIMD get SVE for VL 2160
2281 22:58:47.791864 # ok 545 Set SVE VL 2176
2282 22:58:47.791964 # ok 546 # SKIP SVE set SVE get SVE for VL 2176
2283 22:58:47.792050 # ok 547 # SKIP SVE set SVE get FPSIMD for VL 2176
2284 22:58:47.792149 # ok 548 # SKIP SVE set FPSIMD get SVE for VL 2176
2285 22:58:47.792236 # ok 549 Set SVE VL 2192
2286 22:58:47.792335 # ok 550 # SKIP SVE set SVE get SVE for VL 2192
2287 22:58:47.792426 # ok 551 # SKIP SVE set SVE get FPSIMD for VL 2192
2288 22:58:47.792524 # ok 552 # SKIP SVE set FPSIMD get SVE for VL 2192
2289 22:58:47.792610 # ok 553 Set SVE VL 2208
2290 22:58:47.792708 # ok 554 # SKIP SVE set SVE get SVE for VL 2208
2291 22:58:47.792809 # ok 555 # SKIP SVE set SVE get FPSIMD for VL 2208
2292 22:58:47.792895 # ok 556 # SKIP SVE set FPSIMD get SVE for VL 2208
2293 22:58:47.792994 # ok 557 Set SVE VL 2224
2294 22:58:47.793081 # ok 558 # SKIP SVE set SVE get SVE for VL 2224
2295 22:58:47.793180 # ok 559 # SKIP SVE set SVE get FPSIMD for VL 2224
2296 22:58:47.793280 # ok 560 # SKIP SVE set FPSIMD get SVE for VL 2224
2297 22:58:47.793382 # ok 561 Set SVE VL 2240
2298 22:58:47.793474 # ok 562 # SKIP SVE set SVE get SVE for VL 2240
2299 22:58:47.793573 # ok 563 # SKIP SVE set SVE get FPSIMD for VL 2240
2300 22:58:47.793770 # ok 564 # SKIP SVE set FPSIMD get SVE for VL 2240
2301 22:58:47.793871 # ok 565 Set SVE VL 2256
2302 22:58:47.793956 # ok 566 # SKIP SVE set SVE get SVE for VL 2256
2303 22:58:47.794056 # ok 567 # SKIP SVE set SVE get FPSIMD for VL 2256
2304 22:58:47.794156 # ok 568 # SKIP SVE set FPSIMD get SVE for VL 2256
2305 22:58:47.794243 # ok 569 Set SVE VL 2272
2306 22:58:47.794341 # ok 570 # SKIP SVE set SVE get SVE for VL 2272
2307 22:58:47.794428 # ok 571 # SKIP SVE set SVE get FPSIMD for VL 2272
2308 22:58:47.794528 # ok 572 # SKIP SVE set FPSIMD get SVE for VL 2272
2309 22:58:47.794614 # ok 573 Set SVE VL 2288
2310 22:58:47.794712 # ok 574 # SKIP SVE set SVE get SVE for VL 2288
2311 22:58:47.794810 # ok 575 # SKIP SVE set SVE get FPSIMD for VL 2288
2312 22:58:47.794909 # ok 576 # SKIP SVE set FPSIMD get SVE for VL 2288
2313 22:58:47.795008 # ok 577 Set SVE VL 2304
2314 22:58:47.795107 # ok 578 # SKIP SVE set SVE get SVE for VL 2304
2315 22:58:47.795395 # ok 579 # SKIP SVE set SVE get FPSIMD for VL 2304
2316 22:58:47.795499 # ok 580 # SKIP SVE set FPSIMD get SVE for VL 2304
2317 22:58:47.795602 # ok 581 Set SVE VL 2320
2318 22:58:47.795688 # ok 582 # SKIP SVE set SVE get SVE for VL 2320
2319 22:58:47.795772 # ok 583 # SKIP SVE set SVE get FPSIMD for VL 2320
2320 22:58:47.795871 # ok 584 # SKIP SVE set FPSIMD get SVE for VL 2320
2321 22:58:47.795957 # ok 585 Set SVE VL 2336
2322 22:58:47.796041 # ok 586 # SKIP SVE set SVE get SVE for VL 2336
2323 22:58:47.796139 # ok 587 # SKIP SVE set SVE get FPSIMD for VL 2336
2324 22:58:47.796225 # ok 588 # SKIP SVE set FPSIMD get SVE for VL 2336
2325 22:58:47.796309 # ok 589 Set SVE VL 2352
2326 22:58:47.796408 # ok 590 # SKIP SVE set SVE get SVE for VL 2352
2327 22:58:47.796495 # ok 591 # SKIP SVE set SVE get FPSIMD for VL 2352
2328 22:58:47.796579 # ok 592 # SKIP SVE set FPSIMD get SVE for VL 2352
2329 22:58:47.796662 # ok 593 Set SVE VL 2368
2330 22:58:47.796761 # ok 594 # SKIP SVE set SVE get SVE for VL 2368
2331 22:58:47.796848 # ok 595 # SKIP SVE set SVE get FPSIMD for VL 2368
2332 22:58:47.796947 # ok 596 # SKIP SVE set FPSIMD get SVE for VL 2368
2333 22:58:47.797034 # ok 597 Set SVE VL 2384
2334 22:58:47.797117 # ok 598 # SKIP SVE set SVE get SVE for VL 2384
2335 22:58:47.797216 # ok 599 # SKIP SVE set SVE get FPSIMD for VL 2384
2336 22:58:47.797302 # ok 600 # SKIP SVE set FPSIMD get SVE for VL 2384
2337 22:58:47.797392 # ok 601 Set SVE VL 2400
2338 22:58:47.797477 # ok 602 # SKIP SVE set SVE get SVE for VL 2400
2339 22:58:47.797581 # ok 603 # SKIP SVE set SVE get FPSIMD for VL 2400
2340 22:58:47.797678 # ok 604 # SKIP SVE set FPSIMD get SVE for VL 2400
2341 22:58:47.797764 # ok 605 Set SVE VL 2416
2342 22:58:47.797863 # ok 606 # SKIP SVE set SVE get SVE for VL 2416
2343 22:58:47.797949 # ok 607 # SKIP SVE set SVE get FPSIMD for VL 2416
2344 22:58:47.798047 # ok 608 # SKIP SVE set FPSIMD get SVE for VL 2416
2345 22:58:47.798148 # ok 609 Set SVE VL 2432
2346 22:58:47.798234 # ok 610 # SKIP SVE set SVE get SVE for VL 2432
2347 22:58:47.798347 # ok 611 # SKIP SVE set SVE get FPSIMD for VL 2432
2348 22:58:47.798720 # ok 612 # SKIP SVE set FPSIMD get SVE for VL 2432
2349 22:58:47.798902 # ok 613 Set SVE VL 2448
2350 22:58:47.799011 # ok 614 # SKIP SVE set SVE get SVE for VL 2448
2351 22:58:47.799099 # ok 615 # SKIP SVE set SVE get FPSIMD for VL 2448
2352 22:58:47.799184 # ok 616 # SKIP SVE set FPSIMD get SVE for VL 2448
2353 22:58:47.799267 # ok 617 Set SVE VL 2464
2354 22:58:47.799367 # ok 618 # SKIP SVE set SVE get SVE for VL 2464
2355 22:58:47.799457 # ok 619 # SKIP SVE set SVE get FPSIMD for VL 2464
2356 22:58:47.799542 # ok 620 # SKIP SVE set FPSIMD get SVE for VL 2464
2357 22:58:47.799640 # ok 621 Set SVE VL 2480
2358 22:58:47.799726 # ok 622 # SKIP SVE set SVE get SVE for VL 2480
2359 22:58:47.799809 # ok 623 # SKIP SVE set SVE get FPSIMD for VL 2480
2360 22:58:47.799907 # ok 624 # SKIP SVE set FPSIMD get SVE for VL 2480
2361 22:58:47.799995 # ok 625 Set SVE VL 2496
2362 22:58:47.800080 # ok 626 # SKIP SVE set SVE get SVE for VL 2496
2363 22:58:47.800177 # ok 627 # SKIP SVE set SVE get FPSIMD for VL 2496
2364 22:58:47.800275 # ok 628 # SKIP SVE set FPSIMD get SVE for VL 2496
2365 22:58:47.800360 # ok 629 Set SVE VL 2512
2366 22:58:47.800456 # ok 630 # SKIP SVE set SVE get SVE for VL 2512
2367 22:58:47.800540 # ok 631 # SKIP SVE set SVE get FPSIMD for VL 2512
2368 22:58:47.800637 # ok 632 # SKIP SVE set FPSIMD get SVE for VL 2512
2369 22:58:47.800720 # ok 633 Set SVE VL 2528
2370 22:58:47.800802 # ok 634 # SKIP SVE set SVE get SVE for VL 2528
2371 22:58:47.800906 # ok 635 # SKIP SVE set SVE get FPSIMD for VL 2528
2372 22:58:47.801005 # ok 636 # SKIP SVE set FPSIMD get SVE for VL 2528
2373 22:58:47.801091 # ok 637 Set SVE VL 2544
2374 22:58:47.801188 # ok 638 # SKIP SVE set SVE get SVE for VL 2544
2375 22:58:47.801273 # ok 639 # SKIP SVE set SVE get FPSIMD for VL 2544
2376 22:58:47.801355 # ok 640 # SKIP SVE set FPSIMD get SVE for VL 2544
2377 22:58:47.801450 # ok 641 Set SVE VL 2560
2378 22:58:47.801535 # ok 642 # SKIP SVE set SVE get SVE for VL 2560
2379 22:58:47.801631 # ok 643 # SKIP SVE set SVE get FPSIMD for VL 2560
2380 22:58:47.801938 # ok 644 # SKIP SVE set FPSIMD get SVE for VL 2560
2381 22:58:47.802042 # ok 645 Set SVE VL 2576
2382 22:58:47.802128 # ok 646 # SKIP SVE set SVE get SVE for VL 2576
2383 22:58:47.802440 # ok 647 # SKIP SVE set SVE get FPSIMD for VL 2576
2384 22:58:47.802596 # ok 648 # SKIP SVE set FPSIMD get SVE for VL 2576
2385 22:58:47.802726 # ok 649 Set SVE VL 2592
2386 22:58:47.802848 # ok 650 # SKIP SVE set SVE get SVE for VL 2592
2387 22:58:47.802971 # ok 651 # SKIP SVE set SVE get FPSIMD for VL 2592
2388 22:58:47.803093 # ok 652 # SKIP SVE set FPSIMD get SVE for VL 2592
2389 22:58:47.803215 # ok 653 Set SVE VL 2608
2390 22:58:47.803366 # ok 654 # SKIP SVE set SVE get SVE for VL 2608
2391 22:58:47.803494 # ok 655 # SKIP SVE set SVE get FPSIMD for VL 2608
2392 22:58:47.803615 # ok 656 # SKIP SVE set FPSIMD get SVE for VL 2608
2393 22:58:47.803736 # ok 657 Set SVE VL 2624
2394 22:58:47.803855 # ok 658 # SKIP SVE set SVE get SVE for VL 2624
2395 22:58:47.803975 # ok 659 # SKIP SVE set SVE get FPSIMD for VL 2624
2396 22:58:47.804096 # ok 660 # SKIP SVE set FPSIMD get SVE for VL 2624
2397 22:58:47.804220 # ok 661 Set SVE VL 2640
2398 22:58:47.804341 # ok 662 # SKIP SVE set SVE get SVE for VL 2640
2399 22:58:47.804486 # ok 663 # SKIP SVE set SVE get FPSIMD for VL 2640
2400 22:58:47.804609 # ok 664 # SKIP SVE set FPSIMD get SVE for VL 2640
2401 22:58:47.804732 # ok 665 Set SVE VL 2656
2402 22:58:47.804852 # ok 666 # SKIP SVE set SVE get SVE for VL 2656
2403 22:58:47.815447 # ok 667 # SKIP SVE set SVE get FPSIMD for VL 2656
2404 22:58:47.815952 # ok 668 # SKIP SVE set FPSIMD get SVE for VL 2656
2405 22:58:47.816075 # ok 669 Set SVE VL 2672
2406 22:58:47.816163 # ok 670 # SKIP SVE set SVE get SVE for VL 2672
2407 22:58:47.816246 # ok 671 # SKIP SVE set SVE get FPSIMD for VL 2672
2408 22:58:47.816345 # ok 672 # SKIP SVE set FPSIMD get SVE for VL 2672
2409 22:58:47.816435 # ok 673 Set SVE VL 2688
2410 22:58:47.816516 # ok 674 # SKIP SVE set SVE get SVE for VL 2688
2411 22:58:47.816612 # ok 675 # SKIP SVE set SVE get FPSIMD for VL 2688
2412 22:58:47.816694 # ok 676 # SKIP SVE set FPSIMD get SVE for VL 2688
2413 22:58:47.817097 # ok 677 Set SVE VL 2704
2414 22:58:47.817197 # ok 678 # SKIP SVE set SVE get SVE for VL 2704
2415 22:58:47.817284 # ok 679 # SKIP SVE set SVE get FPSIMD for VL 2704
2416 22:58:47.817381 # ok 680 # SKIP SVE set FPSIMD get SVE for VL 2704
2417 22:58:47.817482 # ok 681 Set SVE VL 2720
2418 22:58:47.817567 # ok 682 # SKIP SVE set SVE get SVE for VL 2720
2419 22:58:47.817671 # ok 683 # SKIP SVE set SVE get FPSIMD for VL 2720
2420 22:58:47.817770 # ok 684 # SKIP SVE set FPSIMD get SVE for VL 2720
2421 22:58:47.817864 # ok 685 Set SVE VL 2736
2422 22:58:47.818465 # ok 686 # SKIP SVE set SVE get SVE for VL 2736
2423 22:58:47.818572 # ok 687 # SKIP SVE set SVE get FPSIMD for VL 2736
2424 22:58:47.818656 # ok 688 # SKIP SVE set FPSIMD get SVE for VL 2736
2425 22:58:47.818737 # ok 689 Set SVE VL 2752
2426 22:58:47.818819 # ok 690 # SKIP SVE set SVE get SVE for VL 2752
2427 22:58:47.818899 # ok 691 # SKIP SVE set SVE get FPSIMD for VL 2752
2428 22:58:47.819257 # ok 692 # SKIP SVE set FPSIMD get SVE for VL 2752
2429 22:58:47.819362 # ok 693 Set SVE VL 2768
2430 22:58:47.819452 # ok 694 # SKIP SVE set SVE get SVE for VL 2768
2431 22:58:47.819814 # ok 695 # SKIP SVE set SVE get FPSIMD for VL 2768
2432 22:58:47.820035 # ok 696 # SKIP SVE set FPSIMD get SVE for VL 2768
2433 22:58:47.820256 # ok 697 Set SVE VL 2784
2434 22:58:47.820348 # ok 698 # SKIP SVE set SVE get SVE for VL 2784
2435 22:58:47.820451 # ok 699 # SKIP SVE set SVE get FPSIMD for VL 2784
2436 22:58:47.820537 # ok 700 # SKIP SVE set FPSIMD get SVE for VL 2784
2437 22:58:47.820620 # ok 701 Set SVE VL 2800
2438 22:58:47.820702 # ok 702 # SKIP SVE set SVE get SVE for VL 2800
2439 22:58:47.820784 # ok 703 # SKIP SVE set SVE get FPSIMD for VL 2800
2440 22:58:47.820866 # ok 704 # SKIP SVE set FPSIMD get SVE for VL 2800
2441 22:58:47.820966 # ok 705 Set SVE VL 2816
2442 22:58:47.821050 # ok 706 # SKIP SVE set SVE get SVE for VL 2816
2443 22:58:47.821133 # ok 707 # SKIP SVE set SVE get FPSIMD for VL 2816
2444 22:58:47.821216 # ok 708 # SKIP SVE set FPSIMD get SVE for VL 2816
2445 22:58:47.821298 # ok 709 Set SVE VL 2832
2446 22:58:47.821400 # ok 710 # SKIP SVE set SVE get SVE for VL 2832
2447 22:58:47.821484 # ok 711 # SKIP SVE set SVE get FPSIMD for VL 2832
2448 22:58:47.821582 # ok 712 # SKIP SVE set FPSIMD get SVE for VL 2832
2449 22:58:47.821674 # ok 713 Set SVE VL 2848
2450 22:58:47.821773 # ok 714 # SKIP SVE set SVE get SVE for VL 2848
2451 22:58:47.821872 # ok 715 # SKIP SVE set SVE get FPSIMD for VL 2848
2452 22:58:47.821971 # ok 716 # SKIP SVE set FPSIMD get SVE for VL 2848
2453 22:58:47.822068 # ok 717 Set SVE VL 2864
2454 22:58:47.822156 # ok 718 # SKIP SVE set SVE get SVE for VL 2864
2455 22:58:47.822653 # ok 719 # SKIP SVE set SVE get FPSIMD for VL 2864
2456 22:58:47.822757 # ok 720 # SKIP SVE set FPSIMD get SVE for VL 2864
2457 22:58:47.822843 # ok 721 Set SVE VL 2880
2458 22:58:47.822927 # ok 722 # SKIP SVE set SVE get SVE for VL 2880
2459 22:58:47.823009 # ok 723 # SKIP SVE set SVE get FPSIMD for VL 2880
2460 22:58:47.823108 # ok 724 # SKIP SVE set FPSIMD get SVE for VL 2880
2461 22:58:47.823194 # ok 725 Set SVE VL 2896
2462 22:58:47.823277 # ok 726 # SKIP SVE set SVE get SVE for VL 2896
2463 22:58:47.823376 # ok 727 # SKIP SVE set SVE get FPSIMD for VL 2896
2464 22:58:47.823461 # ok 728 # SKIP SVE set FPSIMD get SVE for VL 2896
2465 22:58:47.823544 # ok 729 Set SVE VL 2912
2466 22:58:47.823625 # ok 730 # SKIP SVE set SVE get SVE for VL 2912
2467 22:58:47.823707 # ok 731 # SKIP SVE set SVE get FPSIMD for VL 2912
2468 22:58:47.823806 # ok 732 # SKIP SVE set FPSIMD get SVE for VL 2912
2469 22:58:47.823891 # ok 733 Set SVE VL 2928
2470 22:58:47.823974 # ok 734 # SKIP SVE set SVE get SVE for VL 2928
2471 22:58:47.824060 # ok 735 # SKIP SVE set SVE get FPSIMD for VL 2928
2472 22:58:47.824161 # ok 736 # SKIP SVE set FPSIMD get SVE for VL 2928
2473 22:58:47.824247 # ok 737 Set SVE VL 2944
2474 22:58:47.824329 # ok 738 # SKIP SVE set SVE get SVE for VL 2944
2475 22:58:47.824410 # ok 739 # SKIP SVE set SVE get FPSIMD for VL 2944
2476 22:58:47.824507 # ok 740 # SKIP SVE set FPSIMD get SVE for VL 2944
2477 22:58:47.824592 # ok 741 Set SVE VL 2960
2478 22:58:47.824674 # ok 742 # SKIP SVE set SVE get SVE for VL 2960
2479 22:58:47.824755 # ok 743 # SKIP SVE set SVE get FPSIMD for VL 2960
2480 22:58:47.824835 # ok 744 # SKIP SVE set FPSIMD get SVE for VL 2960
2481 22:58:47.824917 # ok 745 Set SVE VL 2976
2482 22:58:47.825015 # ok 746 # SKIP SVE set SVE get SVE for VL 2976
2483 22:58:47.825100 # ok 747 # SKIP SVE set SVE get FPSIMD for VL 2976
2484 22:58:47.825182 # ok 748 # SKIP SVE set FPSIMD get SVE for VL 2976
2485 22:58:47.825265 # ok 749 Set SVE VL 2992
2486 22:58:47.825347 # ok 750 # SKIP SVE set SVE get SVE for VL 2992
2487 22:58:47.825452 # ok 751 # SKIP SVE set SVE get FPSIMD for VL 2992
2488 22:58:47.825539 # ok 752 # SKIP SVE set FPSIMD get SVE for VL 2992
2489 22:58:47.825622 # ok 753 Set SVE VL 3008
2490 22:58:47.826237 # ok 754 # SKIP SVE set SVE get SVE for VL 3008
2491 22:58:47.826329 # ok 755 # SKIP SVE set SVE get FPSIMD for VL 3008
2492 22:58:47.826430 # ok 756 # SKIP SVE set FPSIMD get SVE for VL 3008
2493 22:58:47.826516 # ok 757 Set SVE VL 3024
2494 22:58:47.826600 # ok 758 # SKIP SVE set SVE get SVE for VL 3024
2495 22:58:47.826685 # ok 759 # SKIP SVE set SVE get FPSIMD for VL 3024
2496 22:58:47.826771 # ok 760 # SKIP SVE set FPSIMD get SVE for VL 3024
2497 22:58:47.826856 # ok 761 Set SVE VL 3040
2498 22:58:47.826939 # ok 762 # SKIP SVE set SVE get SVE for VL 3040
2499 22:58:47.827228 # ok 763 # SKIP SVE set SVE get FPSIMD for VL 3040
2500 22:58:47.827332 # ok 764 # SKIP SVE set FPSIMD get SVE for VL 3040
2501 22:58:47.827417 # ok 765 Set SVE VL 3056
2502 22:58:47.827498 # ok 766 # SKIP SVE set SVE get SVE for VL 3056
2503 22:58:47.827579 # ok 767 # SKIP SVE set SVE get FPSIMD for VL 3056
2504 22:58:47.827661 # ok 768 # SKIP SVE set FPSIMD get SVE for VL 3056
2505 22:58:47.827743 # ok 769 Set SVE VL 3072
2506 22:58:47.827824 # ok 770 # SKIP SVE set SVE get SVE for VL 3072
2507 22:58:47.827906 # ok 771 # SKIP SVE set SVE get FPSIMD for VL 3072
2508 22:58:47.827993 # ok 772 # SKIP SVE set FPSIMD get SVE for VL 3072
2509 22:58:47.828099 # ok 773 Set SVE VL 3088
2510 22:58:47.828184 # ok 774 # SKIP SVE set SVE get SVE for VL 3088
2511 22:58:47.828269 # ok 775 # SKIP SVE set SVE get FPSIMD for VL 3088
2512 22:58:47.828352 # ok 776 # SKIP SVE set FPSIMD get SVE for VL 3088
2513 22:58:47.828434 # ok 777 Set SVE VL 3104
2514 22:58:47.828513 # ok 778 # SKIP SVE set SVE get SVE for VL 3104
2515 22:58:47.828595 # ok 779 # SKIP SVE set SVE get FPSIMD for VL 3104
2516 22:58:47.828677 # ok 780 # SKIP SVE set FPSIMD get SVE for VL 3104
2517 22:58:47.828758 # ok 781 Set SVE VL 3120
2518 22:58:47.828859 # ok 782 # SKIP SVE set SVE get SVE for VL 3120
2519 22:58:47.828943 # ok 783 # SKIP SVE set SVE get FPSIMD for VL 3120
2520 22:58:47.829027 # ok 784 # SKIP SVE set FPSIMD get SVE for VL 3120
2521 22:58:47.829113 # ok 785 Set SVE VL 3136
2522 22:58:47.829199 # ok 786 # SKIP SVE set SVE get SVE for VL 3136
2523 22:58:47.829285 # ok 787 # SKIP SVE set SVE get FPSIMD for VL 3136
2524 22:58:47.829370 # ok 788 # SKIP SVE set FPSIMD get SVE for VL 3136
2525 22:58:47.829472 # ok 789 Set SVE VL 3152
2526 22:58:47.829558 # ok 790 # SKIP SVE set SVE get SVE for VL 3152
2527 22:58:47.829644 # ok 791 # SKIP SVE set SVE get FPSIMD for VL 3152
2528 22:58:47.829736 # ok 792 # SKIP SVE set FPSIMD get SVE for VL 3152
2529 22:58:47.829823 # ok 793 Set SVE VL 3168
2530 22:58:47.829907 # ok 794 # SKIP SVE set SVE get SVE for VL 3168
2531 22:58:47.830009 # ok 795 # SKIP SVE set SVE get FPSIMD for VL 3168
2532 22:58:47.830095 # ok 796 # SKIP SVE set FPSIMD get SVE for VL 3168
2533 22:58:47.830180 # ok 797 Set SVE VL 3184
2534 22:58:47.830267 # ok 798 # SKIP SVE set SVE get SVE for VL 3184
2535 22:58:47.830354 # ok 799 # SKIP SVE set SVE get FPSIMD for VL 3184
2536 22:58:47.830456 # ok 800 # SKIP SVE set FPSIMD get SVE for VL 3184
2537 22:58:47.830543 # ok 801 Set SVE VL 3200
2538 22:58:47.830625 # ok 802 # SKIP SVE set SVE get SVE for VL 3200
2539 22:58:47.830708 # ok 803 # SKIP SVE set SVE get FPSIMD for VL 3200
2540 22:58:47.830796 # ok 804 # SKIP SVE set FPSIMD get SVE for VL 3200
2541 22:58:47.830898 # ok 805 Set SVE VL 3216
2542 22:58:47.830986 # ok 806 # SKIP SVE set SVE get SVE for VL 3216
2543 22:58:47.831668 # ok 807 # SKIP SVE set SVE get FPSIMD for VL 3216
2544 22:58:47.831776 # ok 808 # SKIP SVE set FPSIMD get SVE for VL 3216
2545 22:58:47.831863 # ok 809 Set SVE VL 3232
2546 22:58:47.831945 # ok 810 # SKIP SVE set SVE get SVE for VL 3232
2547 22:58:47.832034 # ok 811 # SKIP SVE set SVE get FPSIMD for VL 3232
2548 22:58:47.832137 # ok 812 # SKIP SVE set FPSIMD get SVE for VL 3232
2549 22:58:47.832222 # ok 813 Set SVE VL 3248
2550 22:58:47.832301 # ok 814 # SKIP SVE set SVE get SVE for VL 3248
2551 22:58:47.832381 # ok 815 # SKIP SVE set SVE get FPSIMD for VL 3248
2552 22:58:47.832461 # ok 816 # SKIP SVE set FPSIMD get SVE for VL 3248
2553 22:58:47.832541 # ok 817 Set SVE VL 3264
2554 22:58:47.832637 # ok 818 # SKIP SVE set SVE get SVE for VL 3264
2555 22:58:47.832718 # ok 819 # SKIP SVE set SVE get FPSIMD for VL 3264
2556 22:58:47.832797 # ok 820 # SKIP SVE set FPSIMD get SVE for VL 3264
2557 22:58:47.832875 # ok 821 Set SVE VL 3280
2558 22:58:47.832968 # ok 822 # SKIP SVE set SVE get SVE for VL 3280
2559 22:58:47.833050 # ok 823 # SKIP SVE set SVE get FPSIMD for VL 3280
2560 22:58:47.833128 # ok 824 # SKIP SVE set FPSIMD get SVE for VL 3280
2561 22:58:47.833222 # ok 825 Set SVE VL 3296
2562 22:58:47.833304 # ok 826 # SKIP SVE set SVE get SVE for VL 3296
2563 22:58:47.833399 # ok 827 # SKIP SVE set SVE get FPSIMD for VL 3296
2564 22:58:47.833496 # ok 828 # SKIP SVE set FPSIMD get SVE for VL 3296
2565 22:58:47.833581 # ok 829 Set SVE VL 3312
2566 22:58:47.833680 # ok 830 # SKIP SVE set SVE get SVE for VL 3312
2567 22:58:47.834122 # ok 831 # SKIP SVE set SVE get FPSIMD for VL 3312
2568 22:58:47.834224 # ok 832 # SKIP SVE set FPSIMD get SVE for VL 3312
2569 22:58:47.834307 # ok 833 Set SVE VL 3328
2570 22:58:47.834391 # ok 834 # SKIP SVE set SVE get SVE for VL 3328
2571 22:58:47.834496 # ok 835 # SKIP SVE set SVE get FPSIMD for VL 3328
2572 22:58:47.834581 # ok 836 # SKIP SVE set FPSIMD get SVE for VL 3328
2573 22:58:47.834662 # ok 837 Set SVE VL 3344
2574 22:58:47.835199 # ok 838 # SKIP SVE set SVE get SVE for VL 3344
2575 22:58:47.835305 # ok 839 # SKIP SVE set SVE get FPSIMD for VL 3344
2576 22:58:47.835391 # ok 840 # SKIP SVE set FPSIMD get SVE for VL 3344
2577 22:58:47.835475 # ok 841 Set SVE VL 3360
2578 22:58:47.835558 # ok 842 # SKIP SVE set SVE get SVE for VL 3360
2579 22:58:47.835658 # ok 843 # SKIP SVE set SVE get FPSIMD for VL 3360
2580 22:58:47.835743 # ok 844 # SKIP SVE set FPSIMD get SVE for VL 3360
2581 22:58:47.835825 # ok 845 Set SVE VL 3376
2582 22:58:47.835904 # ok 846 # SKIP SVE set SVE get SVE for VL 3376
2583 22:58:47.836004 # ok 847 # SKIP SVE set SVE get FPSIMD for VL 3376
2584 22:58:47.836091 # ok 848 # SKIP SVE set FPSIMD get SVE for VL 3376
2585 22:58:47.836175 # ok 849 Set SVE VL 3392
2586 22:58:47.836257 # ok 850 # SKIP SVE set SVE get SVE for VL 3392
2587 22:58:47.836353 # ok 851 # SKIP SVE set SVE get FPSIMD for VL 3392
2588 22:58:47.836435 # ok 852 # SKIP SVE set FPSIMD get SVE for VL 3392
2589 22:58:47.836514 # ok 853 Set SVE VL 3408
2590 22:58:47.836593 # ok 854 # SKIP SVE set SVE get SVE for VL 3408
2591 22:58:47.842443 # ok 855 # SKIP SVE set SVE get FPSIMD for VL 3408
2592 22:58:47.842643 # ok 856 # SKIP SVE set FPSIMD get SVE for VL 3408
2593 22:58:47.842731 # ok 857 Set SVE VL 3424
2594 22:58:47.842815 # ok 858 # SKIP SVE set SVE get SVE for VL 3424
2595 22:58:47.842900 # ok 859 # SKIP SVE set SVE get FPSIMD for VL 3424
2596 22:58:47.843178 # ok 860 # SKIP SVE set FPSIMD get SVE for VL 3424
2597 22:58:47.843270 # ok 861 Set SVE VL 3440
2598 22:58:47.843354 # ok 862 # SKIP SVE set SVE get SVE for VL 3440
2599 22:58:47.843458 # ok 863 # SKIP SVE set SVE get FPSIMD for VL 3440
2600 22:58:47.843544 # ok 864 # SKIP SVE set FPSIMD get SVE for VL 3440
2601 22:58:47.843627 # ok 865 Set SVE VL 3456
2602 22:58:47.843726 # ok 866 # SKIP SVE set SVE get SVE for VL 3456
2603 22:58:47.843811 # ok 867 # SKIP SVE set SVE get FPSIMD for VL 3456
2604 22:58:47.843895 # ok 868 # SKIP SVE set FPSIMD get SVE for VL 3456
2605 22:58:47.843993 # ok 869 Set SVE VL 3472
2606 22:58:47.844077 # ok 870 # SKIP SVE set SVE get SVE for VL 3472
2607 22:58:47.844176 # ok 871 # SKIP SVE set SVE get FPSIMD for VL 3472
2608 22:58:47.844488 # ok 872 # SKIP SVE set FPSIMD get SVE for VL 3472
2609 22:58:47.844588 # ok 873 Set SVE VL 3488
2610 22:58:47.844669 # ok 874 # SKIP SVE set SVE get SVE for VL 3488
2611 22:58:47.844764 # ok 875 # SKIP SVE set SVE get FPSIMD for VL 3488
2612 22:58:47.844847 # ok 876 # SKIP SVE set FPSIMD get SVE for VL 3488
2613 22:58:47.844941 # ok 877 Set SVE VL 3504
2614 22:58:47.845226 # ok 878 # SKIP SVE set SVE get SVE for VL 3504
2615 22:58:47.845329 # ok 879 # SKIP SVE set SVE get FPSIMD for VL 3504
2616 22:58:47.845412 # ok 880 # SKIP SVE set FPSIMD get SVE for VL 3504
2617 22:58:47.845575 # ok 881 Set SVE VL 3520
2618 22:58:47.845769 # ok 882 # SKIP SVE set SVE get SVE for VL 3520
2619 22:58:47.845941 # ok 883 # SKIP SVE set SVE get FPSIMD for VL 3520
2620 22:58:47.846065 # ok 884 # SKIP SVE set FPSIMD get SVE for VL 3520
2621 22:58:47.846221 # ok 885 Set SVE VL 3536
2622 22:58:47.846406 # ok 886 # SKIP SVE set SVE get SVE for VL 3536
2623 22:58:47.846488 # ok 887 # SKIP SVE set SVE get FPSIMD for VL 3536
2624 22:58:47.846632 # ok 888 # SKIP SVE set FPSIMD get SVE for VL 3536
2625 22:58:47.846766 # ok 889 Set SVE VL 3552
2626 22:58:47.846868 # ok 890 # SKIP SVE set SVE get SVE for VL 3552
2627 22:58:47.847003 # ok 891 # SKIP SVE set SVE get FPSIMD for VL 3552
2628 22:58:47.847173 # ok 892 # SKIP SVE set FPSIMD get SVE for VL 3552
2629 22:58:47.847301 # ok 893 Set SVE VL 3568
2630 22:58:47.847383 # ok 894 # SKIP SVE set SVE get SVE for VL 3568
2631 22:58:47.847587 # ok 895 # SKIP SVE set SVE get FPSIMD for VL 3568
2632 22:58:47.847790 # ok 896 # SKIP SVE set FPSIMD get SVE for VL 3568
2633 22:58:47.848048 # ok 897 Set SVE VL 3584
2634 22:58:47.848240 # ok 898 # SKIP SVE set SVE get SVE for VL 3584
2635 22:58:47.848397 # ok 899 # SKIP SVE set SVE get FPSIMD for VL 3584
2636 22:58:47.848586 # ok 900 # SKIP SVE set FPSIMD get SVE for VL 3584
2637 22:58:47.848737 # ok 901 Set SVE VL 3600
2638 22:58:47.848831 # ok 902 # SKIP SVE set SVE get SVE for VL 3600
2639 22:58:47.848916 # ok 903 # SKIP SVE set SVE get FPSIMD for VL 3600
2640 22:58:47.849013 # ok 904 # SKIP SVE set FPSIMD get SVE for VL 3600
2641 22:58:47.849128 # ok 905 Set SVE VL 3616
2642 22:58:47.849315 # ok 906 # SKIP SVE set SVE get SVE for VL 3616
2643 22:58:47.849522 # ok 907 # SKIP SVE set SVE get FPSIMD for VL 3616
2644 22:58:47.849661 # ok 908 # SKIP SVE set FPSIMD get SVE for VL 3616
2645 22:58:47.849752 # ok 909 Set SVE VL 3632
2646 22:58:47.849837 # ok 910 # SKIP SVE set SVE get SVE for VL 3632
2647 22:58:47.849920 # ok 911 # SKIP SVE set SVE get FPSIMD for VL 3632
2648 22:58:47.850004 # ok 912 # SKIP SVE set FPSIMD get SVE for VL 3632
2649 22:58:47.850088 # ok 913 Set SVE VL 3648
2650 22:58:47.850172 # ok 914 # SKIP SVE set SVE get SVE for VL 3648
2651 22:58:47.850256 # ok 915 # SKIP SVE set SVE get FPSIMD for VL 3648
2652 22:58:47.850356 # ok 916 # SKIP SVE set FPSIMD get SVE for VL 3648
2653 22:58:47.850443 # ok 917 Set SVE VL 3664
2654 22:58:47.850540 # ok 918 # SKIP SVE set SVE get SVE for VL 3664
2655 22:58:47.850626 # ok 919 # SKIP SVE set SVE get FPSIMD for VL 3664
2656 22:58:47.850800 # ok 920 # SKIP SVE set FPSIMD get SVE for VL 3664
2657 22:58:47.851195 # ok 921 Set SVE VL 3680
2658 22:58:47.851422 # ok 922 # SKIP SVE set SVE get SVE for VL 3680
2659 22:58:47.851617 # ok 923 # SKIP SVE set SVE get FPSIMD for VL 3680
2660 22:58:47.851772 # ok 924 # SKIP SVE set FPSIMD get SVE for VL 3680
2661 22:58:47.851936 # ok 925 Set SVE VL 3696
2662 22:58:47.852021 # ok 926 # SKIP SVE set SVE get SVE for VL 3696
2663 22:58:47.852106 # ok 927 # SKIP SVE set SVE get FPSIMD for VL 3696
2664 22:58:47.852208 # ok 928 # SKIP SVE set FPSIMD get SVE for VL 3696
2665 22:58:47.852434 # ok 929 Set SVE VL 3712
2666 22:58:47.852521 # ok 930 # SKIP SVE set SVE get SVE for VL 3712
2667 22:58:47.852602 # ok 931 # SKIP SVE set SVE get FPSIMD for VL 3712
2668 22:58:47.852683 # ok 932 # SKIP SVE set FPSIMD get SVE for VL 3712
2669 22:58:47.852764 # ok 933 Set SVE VL 3728
2670 22:58:47.852941 # ok 934 # SKIP SVE set SVE get SVE for VL 3728
2671 22:58:47.853063 # ok 935 # SKIP SVE set SVE get FPSIMD for VL 3728
2672 22:58:47.853282 # ok 936 # SKIP SVE set FPSIMD get SVE for VL 3728
2673 22:58:47.853368 # ok 937 Set SVE VL 3744
2674 22:58:47.853449 # ok 938 # SKIP SVE set SVE get SVE for VL 3744
2675 22:58:47.853536 # ok 939 # SKIP SVE set SVE get FPSIMD for VL 3744
2676 22:58:47.853618 # ok 940 # SKIP SVE set FPSIMD get SVE for VL 3744
2677 22:58:47.853708 # ok 941 Set SVE VL 3760
2678 22:58:47.853790 # ok 942 # SKIP SVE set SVE get SVE for VL 3760
2679 22:58:47.853871 # ok 943 # SKIP SVE set SVE get FPSIMD for VL 3760
2680 22:58:47.853972 # ok 944 # SKIP SVE set FPSIMD get SVE for VL 3760
2681 22:58:47.854054 # ok 945 Set SVE VL 3776
2682 22:58:47.854134 # ok 946 # SKIP SVE set SVE get SVE for VL 3776
2683 22:58:47.854215 # ok 947 # SKIP SVE set SVE get FPSIMD for VL 3776
2684 22:58:47.854295 # ok 948 # SKIP SVE set FPSIMD get SVE for VL 3776
2685 22:58:47.854414 # ok 949 Set SVE VL 3792
2686 22:58:47.854532 # ok 950 # SKIP SVE set SVE get SVE for VL 3792
2687 22:58:47.854666 # ok 951 # SKIP SVE set SVE get FPSIMD for VL 3792
2688 22:58:47.854823 # ok 952 # SKIP SVE set FPSIMD get SVE for VL 3792
2689 22:58:47.854906 # ok 953 Set SVE VL 3808
2690 22:58:47.854988 # ok 954 # SKIP SVE set SVE get SVE for VL 3808
2691 22:58:47.855189 # ok 955 # SKIP SVE set SVE get FPSIMD for VL 3808
2692 22:58:47.855398 # ok 956 # SKIP SVE set FPSIMD get SVE for VL 3808
2693 22:58:47.855543 # ok 957 Set SVE VL 3824
2694 22:58:47.855627 # ok 958 # SKIP SVE set SVE get SVE for VL 3824
2695 22:58:47.855789 # ok 959 # SKIP SVE set SVE get FPSIMD for VL 3824
2696 22:58:47.855893 # ok 960 # SKIP SVE set FPSIMD get SVE for VL 3824
2697 22:58:47.855977 # ok 961 Set SVE VL 3840
2698 22:58:47.856783 # ok 962 # SKIP SVE set SVE get SVE for VL 3840
2699 22:58:47.857458 # ok 963 # SKIP SVE set SVE get FPSIMD for VL 3840
2700 22:58:47.857718 # ok 964 # SKIP SVE set FPSIMD get SVE for VL 3840
2701 22:58:47.858067 # ok 965 Set SVE VL 3856
2702 22:58:47.858372 # ok 966 # SKIP SVE set SVE get SVE for VL 3856
2703 22:58:47.858480 # ok 967 # SKIP SVE set SVE get FPSIMD for VL 3856
2704 22:58:47.858569 # ok 968 # SKIP SVE set FPSIMD get SVE for VL 3856
2705 22:58:47.858652 # ok 969 Set SVE VL 3872
2706 22:58:47.858740 # ok 970 # SKIP SVE set SVE get SVE for VL 3872
2707 22:58:47.858826 # ok 971 # SKIP SVE set SVE get FPSIMD for VL 3872
2708 22:58:47.858911 # ok 972 # SKIP SVE set FPSIMD get SVE for VL 3872
2709 22:58:47.859160 # ok 973 Set SVE VL 3888
2710 22:58:47.859338 # ok 974 # SKIP SVE set SVE get SVE for VL 3888
2711 22:58:47.859503 # ok 975 # SKIP SVE set SVE get FPSIMD for VL 3888
2712 22:58:47.859640 # ok 976 # SKIP SVE set FPSIMD get SVE for VL 3888
2713 22:58:47.859791 # ok 977 Set SVE VL 3904
2714 22:58:47.860036 # ok 978 # SKIP SVE set SVE get SVE for VL 3904
2715 22:58:47.860234 # ok 979 # SKIP SVE set SVE get FPSIMD for VL 3904
2716 22:58:47.860324 # ok 980 # SKIP SVE set FPSIMD get SVE for VL 3904
2717 22:58:47.860406 # ok 981 Set SVE VL 3920
2718 22:58:47.860549 # ok 982 # SKIP SVE set SVE get SVE for VL 3920
2719 22:58:47.860783 # ok 983 # SKIP SVE set SVE get FPSIMD for VL 3920
2720 22:58:47.860915 # ok 984 # SKIP SVE set FPSIMD get SVE for VL 3920
2721 22:58:47.861050 # ok 985 Set SVE VL 3936
2722 22:58:47.861135 # ok 986 # SKIP SVE set SVE get SVE for VL 3936
2723 22:58:47.861218 # ok 987 # SKIP SVE set SVE get FPSIMD for VL 3936
2724 22:58:47.861360 # ok 988 # SKIP SVE set FPSIMD get SVE for VL 3936
2725 22:58:47.861624 # ok 989 Set SVE VL 3952
2726 22:58:47.861736 # ok 990 # SKIP SVE set SVE get SVE for VL 3952
2727 22:58:47.861900 # ok 991 # SKIP SVE set SVE get FPSIMD for VL 3952
2728 22:58:47.862021 # ok 992 # SKIP SVE set FPSIMD get SVE for VL 3952
2729 22:58:47.862227 # ok 993 Set SVE VL 3968
2730 22:58:47.862312 # ok 994 # SKIP SVE set SVE get SVE for VL 3968
2731 22:58:47.862424 # ok 995 # SKIP SVE set SVE get FPSIMD for VL 3968
2732 22:58:47.862516 # ok 996 # SKIP SVE set FPSIMD get SVE for VL 3968
2733 22:58:47.862599 # ok 997 Set SVE VL 3984
2734 22:58:47.862682 # ok 998 # SKIP SVE set SVE get SVE for VL 3984
2735 22:58:47.862765 # ok 999 # SKIP SVE set SVE get FPSIMD for VL 3984
2736 22:58:47.862847 # ok 1000 # SKIP SVE set FPSIMD get SVE for VL 3984
2737 22:58:47.862931 # ok 1001 Set SVE VL 4000
2738 22:58:47.863014 # ok 1002 # SKIP SVE set SVE get SVE for VL 4000
2739 22:58:47.863096 # ok 1003 # SKIP SVE set SVE get FPSIMD for VL 4000
2740 22:58:47.863179 # ok 1004 # SKIP SVE set FPSIMD get SVE for VL 4000
2741 22:58:47.863262 # ok 1005 Set SVE VL 4016
2742 22:58:47.863345 # ok 1006 # SKIP SVE set SVE get SVE for VL 4016
2743 22:58:47.863428 # ok 1007 # SKIP SVE set SVE get FPSIMD for VL 4016
2744 22:58:47.863734 # ok 1008 # SKIP SVE set FPSIMD get SVE for VL 4016
2745 22:58:47.863825 # ok 1009 Set SVE VL 4032
2746 22:58:47.863908 # ok 1010 # SKIP SVE set SVE get SVE for VL 4032
2747 22:58:47.863990 # ok 1011 # SKIP SVE set SVE get FPSIMD for VL 4032
2748 22:58:47.864069 # ok 1012 # SKIP SVE set FPSIMD get SVE for VL 4032
2749 22:58:47.864150 # ok 1013 Set SVE VL 4048
2750 22:58:47.864230 # ok 1014 # SKIP SVE set SVE get SVE for VL 4048
2751 22:58:47.864312 # ok 1015 # SKIP SVE set SVE get FPSIMD for VL 4048
2752 22:58:47.864389 # ok 1016 # SKIP SVE set FPSIMD get SVE for VL 4048
2753 22:58:47.864469 # ok 1017 Set SVE VL 4064
2754 22:58:47.864547 # ok 1018 # SKIP SVE set SVE get SVE for VL 4064
2755 22:58:47.864626 # ok 1019 # SKIP SVE set SVE get FPSIMD for VL 4064
2756 22:58:47.864703 # ok 1020 # SKIP SVE set FPSIMD get SVE for VL 4064
2757 22:58:47.864782 # ok 1021 Set SVE VL 4080
2758 22:58:47.864861 # ok 1022 # SKIP SVE set SVE get SVE for VL 4080
2759 22:58:47.864939 # ok 1023 # SKIP SVE set SVE get FPSIMD for VL 4080
2760 22:58:47.865017 # ok 1024 # SKIP SVE set FPSIMD get SVE for VL 4080
2761 22:58:47.865096 # ok 1025 Set SVE VL 4096
2762 22:58:47.865174 # ok 1026 # SKIP SVE set SVE get SVE for VL 4096
2763 22:58:47.865257 # ok 1027 # SKIP SVE set SVE get FPSIMD for VL 4096
2764 22:58:47.865339 # ok 1028 # SKIP SVE set FPSIMD get SVE for VL 4096
2765 22:58:47.865421 # ok 1029 Set SVE VL 4112
2766 22:58:47.865502 # ok 1030 # SKIP SVE set SVE get SVE for VL 4112
2767 22:58:47.865582 # ok 1031 # SKIP SVE set SVE get FPSIMD for VL 4112
2768 22:58:47.865672 # ok 1032 # SKIP SVE set FPSIMD get SVE for VL 4112
2769 22:58:47.865753 # ok 1033 Set SVE VL 4128
2770 22:58:47.865831 # ok 1034 # SKIP SVE set SVE get SVE for VL 4128
2771 22:58:47.865911 # ok 1035 # SKIP SVE set SVE get FPSIMD for VL 4128
2772 22:58:47.865989 # ok 1036 # SKIP SVE set FPSIMD get SVE for VL 4128
2773 22:58:47.866068 # ok 1037 Set SVE VL 4144
2774 22:58:47.866149 # ok 1038 # SKIP SVE set SVE get SVE for VL 4144
2775 22:58:47.866229 # ok 1039 # SKIP SVE set SVE get FPSIMD for VL 4144
2776 22:58:47.866308 # ok 1040 # SKIP SVE set FPSIMD get SVE for VL 4144
2777 22:58:47.868798 # ok 1041 Set SVE VL 4160
2778 22:58:47.868948 # ok 1042 # SKIP SVE set SVE get SVE for VL 4160
2779 22:58:47.869451 # ok 1043 # SKIP SVE set SVE get FPSIMD for VL 4160
2780 22:58:47.869555 # ok 1044 # SKIP SVE set FPSIMD get SVE for VL 4160
2781 22:58:47.869660 # ok 1045 Set SVE VL 4176
2782 22:58:47.869745 # ok 1046 # SKIP SVE set SVE get SVE for VL 4176
2783 22:58:47.869828 # ok 1047 # SKIP SVE set SVE get FPSIMD for VL 4176
2784 22:58:47.869909 # ok 1048 # SKIP SVE set FPSIMD get SVE for VL 4176
2785 22:58:47.870008 # ok 1049 Set SVE VL 4192
2786 22:58:47.870093 # ok 1050 # SKIP SVE set SVE get SVE for VL 4192
2787 22:58:47.870175 # ok 1051 # SKIP SVE set SVE get FPSIMD for VL 4192
2788 22:58:47.870257 # ok 1052 # SKIP SVE set FPSIMD get SVE for VL 4192
2789 22:58:47.870337 # ok 1053 Set SVE VL 4208
2790 22:58:47.870419 # ok 1054 # SKIP SVE set SVE get SVE for VL 4208
2791 22:58:47.870516 # ok 1055 # SKIP SVE set SVE get FPSIMD for VL 4208
2792 22:58:47.870600 # ok 1056 # SKIP SVE set FPSIMD get SVE for VL 4208
2793 22:58:47.870681 # ok 1057 Set SVE VL 4224
2794 22:58:47.870762 # ok 1058 # SKIP SVE set SVE get SVE for VL 4224
2795 22:58:47.871094 # ok 1059 # SKIP SVE set SVE get FPSIMD for VL 4224
2796 22:58:47.871460 # ok 1060 # SKIP SVE set FPSIMD get SVE for VL 4224
2797 22:58:47.871694 # ok 1061 Set SVE VL 4240
2798 22:58:47.871837 # ok 1062 # SKIP SVE set SVE get SVE for VL 4240
2799 22:58:47.872042 # ok 1063 # SKIP SVE set SVE get FPSIMD for VL 4240
2800 22:58:47.872512 # ok 1064 # SKIP SVE set FPSIMD get SVE for VL 4240
2801 22:58:47.872606 # ok 1065 Set SVE VL 4256
2802 22:58:47.872871 # ok 1066 # SKIP SVE set SVE get SVE for VL 4256
2803 22:58:47.873060 # ok 1067 # SKIP SVE set SVE get FPSIMD for VL 4256
2804 22:58:47.873222 # ok 1068 # SKIP SVE set FPSIMD get SVE for VL 4256
2805 22:58:47.873420 # ok 1069 Set SVE VL 4272
2806 22:58:47.873508 # ok 1070 # SKIP SVE set SVE get SVE for VL 4272
2807 22:58:47.873588 # ok 1071 # SKIP SVE set SVE get FPSIMD for VL 4272
2808 22:58:47.873684 # ok 1072 # SKIP SVE set FPSIMD get SVE for VL 4272
2809 22:58:47.873767 # ok 1073 Set SVE VL 4288
2810 22:58:47.873870 # ok 1074 # SKIP SVE set SVE get SVE for VL 4288
2811 22:58:47.873954 # ok 1075 # SKIP SVE set SVE get FPSIMD for VL 4288
2812 22:58:47.874036 # ok 1076 # SKIP SVE set FPSIMD get SVE for VL 4288
2813 22:58:47.874120 # ok 1077 Set SVE VL 4304
2814 22:58:47.874203 # ok 1078 # SKIP SVE set SVE get SVE for VL 4304
2815 22:58:47.874282 # ok 1079 # SKIP SVE set SVE get FPSIMD for VL 4304
2816 22:58:47.874362 # ok 1080 # SKIP SVE set FPSIMD get SVE for VL 4304
2817 22:58:47.874447 # ok 1081 Set SVE VL 4320
2818 22:58:47.874534 # ok 1082 # SKIP SVE set SVE get SVE for VL 4320
2819 22:58:47.874617 # ok 1083 # SKIP SVE set SVE get FPSIMD for VL 4320
2820 22:58:47.874699 # ok 1084 # SKIP SVE set FPSIMD get SVE for VL 4320
2821 22:58:47.874799 # ok 1085 Set SVE VL 4336
2822 22:58:47.874882 # ok 1086 # SKIP SVE set SVE get SVE for VL 4336
2823 22:58:47.874963 # ok 1087 # SKIP SVE set SVE get FPSIMD for VL 4336
2824 22:58:47.875042 # ok 1088 # SKIP SVE set FPSIMD get SVE for VL 4336
2825 22:58:47.875122 # ok 1089 Set SVE VL 4352
2826 22:58:47.875201 # ok 1090 # SKIP SVE set SVE get SVE for VL 4352
2827 22:58:47.875295 # ok 1091 # SKIP SVE set SVE get FPSIMD for VL 4352
2828 22:58:47.875379 # ok 1092 # SKIP SVE set FPSIMD get SVE for VL 4352
2829 22:58:47.875459 # ok 1093 Set SVE VL 4368
2830 22:58:47.875537 # ok 1094 # SKIP SVE set SVE get SVE for VL 4368
2831 22:58:47.875622 # ok 1095 # SKIP SVE set SVE get FPSIMD for VL 4368
2832 22:58:47.875721 # ok 1096 # SKIP SVE set FPSIMD get SVE for VL 4368
2833 22:58:47.875805 # ok 1097 Set SVE VL 4384
2834 22:58:47.875887 # ok 1098 # SKIP SVE set SVE get SVE for VL 4384
2835 22:58:47.876031 # ok 1099 # SKIP SVE set SVE get FPSIMD for VL 4384
2836 22:58:47.876153 # ok 1100 # SKIP SVE set FPSIMD get SVE for VL 4384
2837 22:58:47.876276 # ok 1101 Set SVE VL 4400
2838 22:58:47.876615 # ok 1102 # SKIP SVE set SVE get SVE for VL 4400
2839 22:58:47.876758 # ok 1103 # SKIP SVE set SVE get FPSIMD for VL 4400
2840 22:58:47.876849 # ok 1104 # SKIP SVE set FPSIMD get SVE for VL 4400
2841 22:58:47.876961 # ok 1105 Set SVE VL 4416
2842 22:58:47.877431 # ok 1106 # SKIP SVE set SVE get SVE for VL 4416
2843 22:58:47.877838 # ok 1107 # SKIP SVE set SVE get FPSIMD for VL 4416
2844 22:58:47.877930 # ok 1108 # SKIP SVE set FPSIMD get SVE for VL 4416
2845 22:58:47.878014 # ok 1109 Set SVE VL 4432
2846 22:58:47.878096 # ok 1110 # SKIP SVE set SVE get SVE for VL 4432
2847 22:58:47.878178 # ok 1111 # SKIP SVE set SVE get FPSIMD for VL 4432
2848 22:58:47.878278 # ok 1112 # SKIP SVE set FPSIMD get SVE for VL 4432
2849 22:58:47.878363 # ok 1113 Set SVE VL 4448
2850 22:58:47.878446 # ok 1114 # SKIP SVE set SVE get SVE for VL 4448
2851 22:58:47.878741 # ok 1115 # SKIP SVE set SVE get FPSIMD for VL 4448
2852 22:58:47.878842 # ok 1116 # SKIP SVE set FPSIMD get SVE for VL 4448
2853 22:58:47.878926 # ok 1117 Set SVE VL 4464
2854 22:58:47.879008 # ok 1118 # SKIP SVE set SVE get SVE for VL 4464
2855 22:58:47.879091 # ok 1119 # SKIP SVE set SVE get FPSIMD for VL 4464
2856 22:58:47.879173 # ok 1120 # SKIP SVE set FPSIMD get SVE for VL 4464
2857 22:58:47.879256 # ok 1121 Set SVE VL 4480
2858 22:58:47.879339 # ok 1122 # SKIP SVE set SVE get SVE for VL 4480
2859 22:58:47.879624 # ok 1123 # SKIP SVE set SVE get FPSIMD for VL 4480
2860 22:58:47.879726 # ok 1124 # SKIP SVE set FPSIMD get SVE for VL 4480
2861 22:58:47.879810 # ok 1125 Set SVE VL 4496
2862 22:58:47.879893 # ok 1126 # SKIP SVE set SVE get SVE for VL 4496
2863 22:58:47.880022 # ok 1127 # SKIP SVE set SVE get FPSIMD for VL 4496
2864 22:58:47.880149 # ok 1128 # SKIP SVE set FPSIMD get SVE for VL 4496
2865 22:58:47.880235 # ok 1129 Set SVE VL 4512
2866 22:58:47.880314 # ok 1130 # SKIP SVE set SVE get SVE for VL 4512
2867 22:58:47.880414 # ok 1131 # SKIP SVE set SVE get FPSIMD for VL 4512
2868 22:58:47.880497 # ok 1132 # SKIP SVE set FPSIMD get SVE for VL 4512
2869 22:58:47.880579 # ok 1133 Set SVE VL 4528
2870 22:58:47.880659 # ok 1134 # SKIP SVE set SVE get SVE for VL 4528
2871 22:58:47.880742 # ok 1135 # SKIP SVE set SVE get FPSIMD for VL 4528
2872 22:58:47.880823 # ok 1136 # SKIP SVE set FPSIMD get SVE for VL 4528
2873 22:58:47.880904 # ok 1137 Set SVE VL 4544
2874 22:58:47.880987 # ok 1138 # SKIP SVE set SVE get SVE for VL 4544
2875 22:58:47.881086 # ok 1139 # SKIP SVE set SVE get FPSIMD for VL 4544
2876 22:58:47.881172 # ok 1140 # SKIP SVE set FPSIMD get SVE for VL 4544
2877 22:58:47.881255 # ok 1141 Set SVE VL 4560
2878 22:58:47.881338 # ok 1142 # SKIP SVE set SVE get SVE for VL 4560
2879 22:58:47.881419 # ok 1143 # SKIP SVE set SVE get FPSIMD for VL 4560
2880 22:58:47.881516 # ok 1144 # SKIP SVE set FPSIMD get SVE for VL 4560
2881 22:58:47.881602 # ok 1145 Set SVE VL 4576
2882 22:58:47.881691 # ok 1146 # SKIP SVE set SVE get SVE for VL 4576
2883 22:58:47.881772 # ok 1147 # SKIP SVE set SVE get FPSIMD for VL 4576
2884 22:58:47.881869 # ok 1148 # SKIP SVE set FPSIMD get SVE for VL 4576
2885 22:58:47.881953 # ok 1149 Set SVE VL 4592
2886 22:58:47.882034 # ok 1150 # SKIP SVE set SVE get SVE for VL 4592
2887 22:58:47.882128 # ok 1151 # SKIP SVE set SVE get FPSIMD for VL 4592
2888 22:58:47.882211 # ok 1152 # SKIP SVE set FPSIMD get SVE for VL 4592
2889 22:58:47.882305 # ok 1153 Set SVE VL 4608
2890 22:58:47.882390 # ok 1154 # SKIP SVE set SVE get SVE for VL 4608
2891 22:58:47.882487 # ok 1155 # SKIP SVE set SVE get FPSIMD for VL 4608
2892 22:58:47.882843 # ok 1156 # SKIP SVE set FPSIMD get SVE for VL 4608
2893 22:58:47.882941 # ok 1157 Set SVE VL 4624
2894 22:58:47.883024 # ok 1158 # SKIP SVE set SVE get SVE for VL 4624
2895 22:58:47.883122 # ok 1159 # SKIP SVE set SVE get FPSIMD for VL 4624
2896 22:58:47.883483 # ok 1160 # SKIP SVE set FPSIMD get SVE for VL 4624
2897 22:58:47.883586 # ok 1161 Set SVE VL 4640
2898 22:58:47.883669 # ok 1162 # SKIP SVE set SVE get SVE for VL 4640
2899 22:58:47.883765 # ok 1163 # SKIP SVE set SVE get FPSIMD for VL 4640
2900 22:58:47.883862 # ok 1164 # SKIP SVE set FPSIMD get SVE for VL 4640
2901 22:58:47.883994 # ok 1165 Set SVE VL 4656
2902 22:58:47.884165 # ok 1166 # SKIP SVE set SVE get SVE for VL 4656
2903 22:58:47.884327 # ok 1167 # SKIP SVE set SVE get FPSIMD for VL 4656
2904 22:58:47.884424 # ok 1168 # SKIP SVE set FPSIMD get SVE for VL 4656
2905 22:58:47.884586 # ok 1169 Set SVE VL 4672
2906 22:58:47.884775 # ok 1170 # SKIP SVE set SVE get SVE for VL 4672
2907 22:58:47.884900 # ok 1171 # SKIP SVE set SVE get FPSIMD for VL 4672
2908 22:58:47.885079 # ok 1172 # SKIP SVE set FPSIMD get SVE for VL 4672
2909 22:58:47.885204 # ok 1173 Set SVE VL 4688
2910 22:58:47.885358 # ok 1174 # SKIP SVE set SVE get SVE for VL 4688
2911 22:58:47.885478 # ok 1175 # SKIP SVE set SVE get FPSIMD for VL 4688
2912 22:58:47.885565 # ok 1176 # SKIP SVE set FPSIMD get SVE for VL 4688
2913 22:58:47.885653 # ok 1177 Set SVE VL 4704
2914 22:58:47.885755 # ok 1178 # SKIP SVE set SVE get SVE for VL 4704
2915 22:58:47.885854 # ok 1179 # SKIP SVE set SVE get FPSIMD for VL 4704
2916 22:58:47.885955 # ok 1180 # SKIP SVE set FPSIMD get SVE for VL 4704
2917 22:58:47.886045 # ok 1181 Set SVE VL 4720
2918 22:58:47.886127 # ok 1182 # SKIP SVE set SVE get SVE for VL 4720
2919 22:58:47.886224 # ok 1183 # SKIP SVE set SVE get FPSIMD for VL 4720
2920 22:58:47.886308 # ok 1184 # SKIP SVE set FPSIMD get SVE for VL 4720
2921 22:58:47.886391 # ok 1185 Set SVE VL 4736
2922 22:58:47.886469 # ok 1186 # SKIP SVE set SVE get SVE for VL 4736
2923 22:58:47.886563 # ok 1187 # SKIP SVE set SVE get FPSIMD for VL 4736
2924 22:58:47.886645 # ok 1188 # SKIP SVE set FPSIMD get SVE for VL 4736
2925 22:58:47.886725 # ok 1189 Set SVE VL 4752
2926 22:58:47.886820 # ok 1190 # SKIP SVE set SVE get SVE for VL 4752
2927 22:58:47.886905 # ok 1191 # SKIP SVE set SVE get FPSIMD for VL 4752
2928 22:58:47.886998 # ok 1192 # SKIP SVE set FPSIMD get SVE for VL 4752
2929 22:58:47.887082 # ok 1193 Set SVE VL 4768
2930 22:58:47.887177 # ok 1194 # SKIP SVE set SVE get SVE for VL 4768
2931 22:58:47.887690 # ok 1195 # SKIP SVE set SVE get FPSIMD for VL 4768
2932 22:58:47.887805 # ok 1196 # SKIP SVE set FPSIMD get SVE for VL 4768
2933 22:58:47.887893 # ok 1197 Set SVE VL 4784
2934 22:58:47.888177 # ok 1198 # SKIP SVE set SVE get SVE for VL 4784
2935 22:58:47.888267 # ok 1199 # SKIP SVE set SVE get FPSIMD for VL 4784
2936 22:58:47.888927 # ok 1200 # SKIP SVE set FPSIMD get SVE for VL 4784
2937 22:58:47.889045 # ok 1201 Set SVE VL 4800
2938 22:58:47.889277 # ok 1202 # SKIP SVE set SVE get SVE for VL 4800
2939 22:58:47.889472 # ok 1203 # SKIP SVE set SVE get FPSIMD for VL 4800
2940 22:58:47.889566 # ok 1204 # SKIP SVE set FPSIMD get SVE for VL 4800
2941 22:58:47.889662 # ok 1205 Set SVE VL 4816
2942 22:58:47.889745 # ok 1206 # SKIP SVE set SVE get SVE for VL 4816
2943 22:58:47.889827 # ok 1207 # SKIP SVE set SVE get FPSIMD for VL 4816
2944 22:58:47.889907 # ok 1208 # SKIP SVE set FPSIMD get SVE for VL 4816
2945 22:58:47.889989 # ok 1209 Set SVE VL 4832
2946 22:58:47.890071 # ok 1210 # SKIP SVE set SVE get SVE for VL 4832
2947 22:58:47.890153 # ok 1211 # SKIP SVE set SVE get FPSIMD for VL 4832
2948 22:58:47.890430 # ok 1212 # SKIP SVE set FPSIMD get SVE for VL 4832
2949 22:58:47.890523 # ok 1213 Set SVE VL 4848
2950 22:58:47.890605 # ok 1214 # SKIP SVE set SVE get SVE for VL 4848
2951 22:58:47.890688 # ok 1215 # SKIP SVE set SVE get FPSIMD for VL 4848
2952 22:58:47.890769 # ok 1216 # SKIP SVE set FPSIMD get SVE for VL 4848
2953 22:58:47.890853 # ok 1217 Set SVE VL 4864
2954 22:58:47.890935 # ok 1218 # SKIP SVE set SVE get SVE for VL 4864
2955 22:58:47.891016 # ok 1219 # SKIP SVE set SVE get FPSIMD for VL 4864
2956 22:58:47.891097 # ok 1220 # SKIP SVE set FPSIMD get SVE for VL 4864
2957 22:58:47.891180 # ok 1221 Set SVE VL 4880
2958 22:58:47.891262 # ok 1222 # SKIP SVE set SVE get SVE for VL 4880
2959 22:58:47.891346 # ok 1223 # SKIP SVE set SVE get FPSIMD for VL 4880
2960 22:58:47.898571 # ok 1224 # SKIP SVE set FPSIMD get SVE for VL 4880
2961 22:58:47.898799 # ok 1225 Set SVE VL 4896
2962 22:58:47.898887 # ok 1226 # SKIP SVE set SVE get SVE for VL 4896
2963 22:58:47.899313 # ok 1227 # SKIP SVE set SVE get FPSIMD for VL 4896
2964 22:58:47.899619 # ok 1228 # SKIP SVE set FPSIMD get SVE for VL 4896
2965 22:58:47.899725 # ok 1229 Set SVE VL 4912
2966 22:58:47.899822 # ok 1230 # SKIP SVE set SVE get SVE for VL 4912
2967 22:58:47.900211 # ok 1231 # SKIP SVE set SVE get FPSIMD for VL 4912
2968 22:58:47.900368 # ok 1232 # SKIP SVE set FPSIMD get SVE for VL 4912
2969 22:58:47.900506 # ok 1233 Set SVE VL 4928
2970 22:58:47.900765 # ok 1234 # SKIP SVE set SVE get SVE for VL 4928
2971 22:58:47.901971 # ok 1235 # SKIP SVE set SVE get FPSIMD for VL 4928
2972 22:58:47.902542 # ok 1236 # SKIP SVE set FPSIMD get SVE for VL 4928
2973 22:58:47.902639 # ok 1237 Set SVE VL 4944
2974 22:58:47.902727 # ok 1238 # SKIP SVE set SVE get SVE for VL 4944
2975 22:58:47.902810 # ok 1239 # SKIP SVE set SVE get FPSIMD for VL 4944
2976 22:58:47.902891 # ok 1240 # SKIP SVE set FPSIMD get SVE for VL 4944
2977 22:58:47.902973 # ok 1241 Set SVE VL 4960
2978 22:58:47.903054 # ok 1242 # SKIP SVE set SVE get SVE for VL 4960
2979 22:58:47.903134 # ok 1243 # SKIP SVE set SVE get FPSIMD for VL 4960
2980 22:58:47.905544 # ok 1244 # SKIP SVE set FPSIMD get SVE for VL 4960
2981 22:58:47.906516 # ok 1245 Set SVE VL 4976
2982 22:58:47.906835 # ok 1246 # SKIP SVE set SVE get SVE for VL 4976
2983 22:58:47.906942 # ok 1247 # SKIP SVE set SVE get FPSIMD for VL 4976
2984 22:58:47.909484 # ok 1248 # SKIP SVE set FPSIMD get SVE for VL 4976
2985 22:58:47.909591 # ok 1249 Set SVE VL 4992
2986 22:58:47.909686 # ok 1250 # SKIP SVE set SVE get SVE for VL 4992
2987 22:58:47.909771 # ok 1251 # SKIP SVE set SVE get FPSIMD for VL 4992
2988 22:58:47.909854 # ok 1252 # SKIP SVE set FPSIMD get SVE for VL 4992
2989 22:58:47.909939 # ok 1253 Set SVE VL 5008
2990 22:58:47.910023 # ok 1254 # SKIP SVE set SVE get SVE for VL 5008
2991 22:58:47.910104 # ok 1255 # SKIP SVE set SVE get FPSIMD for VL 5008
2992 22:58:47.910183 # ok 1256 # SKIP SVE set FPSIMD get SVE for VL 5008
2993 22:58:47.910264 # ok 1257 Set SVE VL 5024
2994 22:58:47.910345 # ok 1258 # SKIP SVE set SVE get SVE for VL 5024
2995 22:58:47.910424 # ok 1259 # SKIP SVE set SVE get FPSIMD for VL 5024
2996 22:58:47.910501 # ok 1260 # SKIP SVE set FPSIMD get SVE for VL 5024
2997 22:58:47.910583 # ok 1261 Set SVE VL 5040
2998 22:58:47.910664 # ok 1262 # SKIP SVE set SVE get SVE for VL 5040
2999 22:58:47.910742 # ok 1263 # SKIP SVE set SVE get FPSIMD for VL 5040
3000 22:58:47.910822 # ok 1264 # SKIP SVE set FPSIMD get SVE for VL 5040
3001 22:58:47.910902 # ok 1265 Set SVE VL 5056
3002 22:58:47.910981 # ok 1266 # SKIP SVE set SVE get SVE for VL 5056
3003 22:58:47.911061 # ok 1267 # SKIP SVE set SVE get FPSIMD for VL 5056
3004 22:58:47.911142 # ok 1268 # SKIP SVE set FPSIMD get SVE for VL 5056
3005 22:58:47.911224 # ok 1269 Set SVE VL 5072
3006 22:58:47.911305 # ok 1270 # SKIP SVE set SVE get SVE for VL 5072
3007 22:58:47.911386 # ok 1271 # SKIP SVE set SVE get FPSIMD for VL 5072
3008 22:58:47.911468 # ok 1272 # SKIP SVE set FPSIMD get SVE for VL 5072
3009 22:58:47.911550 # ok 1273 Set SVE VL 5088
3010 22:58:47.911632 # ok 1274 # SKIP SVE set SVE get SVE for VL 5088
3011 22:58:47.911720 # ok 1275 # SKIP SVE set SVE get FPSIMD for VL 5088
3012 22:58:47.911834 # ok 1276 # SKIP SVE set FPSIMD get SVE for VL 5088
3013 22:58:47.912173 # ok 1277 Set SVE VL 5104
3014 22:58:47.912272 # ok 1278 # SKIP SVE set SVE get SVE for VL 5104
3015 22:58:47.912355 # ok 1279 # SKIP SVE set SVE get FPSIMD for VL 5104
3016 22:58:47.912436 # ok 1280 # SKIP SVE set FPSIMD get SVE for VL 5104
3017 22:58:47.912518 # ok 1281 Set SVE VL 5120
3018 22:58:47.912600 # ok 1282 # SKIP SVE set SVE get SVE for VL 5120
3019 22:58:47.912678 # ok 1283 # SKIP SVE set SVE get FPSIMD for VL 5120
3020 22:58:47.912757 # ok 1284 # SKIP SVE set FPSIMD get SVE for VL 5120
3021 22:58:47.912838 # ok 1285 Set SVE VL 5136
3022 22:58:47.912918 # ok 1286 # SKIP SVE set SVE get SVE for VL 5136
3023 22:58:47.912999 # ok 1287 # SKIP SVE set SVE get FPSIMD for VL 5136
3024 22:58:47.913342 # ok 1288 # SKIP SVE set FPSIMD get SVE for VL 5136
3025 22:58:47.913445 # ok 1289 Set SVE VL 5152
3026 22:58:47.913529 # ok 1290 # SKIP SVE set SVE get SVE for VL 5152
3027 22:58:47.913612 # ok 1291 # SKIP SVE set SVE get FPSIMD for VL 5152
3028 22:58:47.913702 # ok 1292 # SKIP SVE set FPSIMD get SVE for VL 5152
3029 22:58:47.913784 # ok 1293 Set SVE VL 5168
3030 22:58:47.913866 # ok 1294 # SKIP SVE set SVE get SVE for VL 5168
3031 22:58:47.913948 # ok 1295 # SKIP SVE set SVE get FPSIMD for VL 5168
3032 22:58:47.914031 # ok 1296 # SKIP SVE set FPSIMD get SVE for VL 5168
3033 22:58:47.914111 # ok 1297 Set SVE VL 5184
3034 22:58:47.914193 # ok 1298 # SKIP SVE set SVE get SVE for VL 5184
3035 22:58:47.914275 # ok 1299 # SKIP SVE set SVE get FPSIMD for VL 5184
3036 22:58:47.914359 # ok 1300 # SKIP SVE set FPSIMD get SVE for VL 5184
3037 22:58:47.914443 # ok 1301 Set SVE VL 5200
3038 22:58:47.914526 # ok 1302 # SKIP SVE set SVE get SVE for VL 5200
3039 22:58:47.914610 # ok 1303 # SKIP SVE set SVE get FPSIMD for VL 5200
3040 22:58:47.914693 # ok 1304 # SKIP SVE set FPSIMD get SVE for VL 5200
3041 22:58:47.914778 # ok 1305 Set SVE VL 5216
3042 22:58:47.914863 # ok 1306 # SKIP SVE set SVE get SVE for VL 5216
3043 22:58:47.914946 # ok 1307 # SKIP SVE set SVE get FPSIMD for VL 5216
3044 22:58:47.915029 # ok 1308 # SKIP SVE set FPSIMD get SVE for VL 5216
3045 22:58:47.915112 # ok 1309 Set SVE VL 5232
3046 22:58:47.915194 # ok 1310 # SKIP SVE set SVE get SVE for VL 5232
3047 22:58:47.915276 # ok 1311 # SKIP SVE set SVE get FPSIMD for VL 5232
3048 22:58:47.915357 # ok 1312 # SKIP SVE set FPSIMD get SVE for VL 5232
3049 22:58:47.915438 # ok 1313 Set SVE VL 5248
3050 22:58:47.915520 # ok 1314 # SKIP SVE set SVE get SVE for VL 5248
3051 22:58:47.915600 # ok 1315 # SKIP SVE set SVE get FPSIMD for VL 5248
3052 22:58:47.915682 # ok 1316 # SKIP SVE set FPSIMD get SVE for VL 5248
3053 22:58:47.915761 # ok 1317 Set SVE VL 5264
3054 22:58:47.915844 # ok 1318 # SKIP SVE set SVE get SVE for VL 5264
3055 22:58:47.915962 # ok 1319 # SKIP SVE set SVE get FPSIMD for VL 5264
3056 22:58:47.916090 # ok 1320 # SKIP SVE set FPSIMD get SVE for VL 5264
3057 22:58:47.916186 # ok 1321 Set SVE VL 5280
3058 22:58:47.916271 # ok 1322 # SKIP SVE set SVE get SVE for VL 5280
3059 22:58:47.916352 # ok 1323 # SKIP SVE set SVE get FPSIMD for VL 5280
3060 22:58:47.916436 # ok 1324 # SKIP SVE set FPSIMD get SVE for VL 5280
3061 22:58:47.916520 # ok 1325 Set SVE VL 5296
3062 22:58:47.916603 # ok 1326 # SKIP SVE set SVE get SVE for VL 5296
3063 22:58:47.916689 # ok 1327 # SKIP SVE set SVE get FPSIMD for VL 5296
3064 22:58:47.916772 # ok 1328 # SKIP SVE set FPSIMD get SVE for VL 5296
3065 22:58:47.916854 # ok 1329 Set SVE VL 5312
3066 22:58:47.916936 # ok 1330 # SKIP SVE set SVE get SVE for VL 5312
3067 22:58:47.917244 # ok 1331 # SKIP SVE set SVE get FPSIMD for VL 5312
3068 22:58:47.917347 # ok 1332 # SKIP SVE set FPSIMD get SVE for VL 5312
3069 22:58:47.917432 # ok 1333 Set SVE VL 5328
3070 22:58:47.917516 # ok 1334 # SKIP SVE set SVE get SVE for VL 5328
3071 22:58:47.917599 # ok 1335 # SKIP SVE set SVE get FPSIMD for VL 5328
3072 22:58:47.917690 # ok 1336 # SKIP SVE set FPSIMD get SVE for VL 5328
3073 22:58:47.917773 # ok 1337 Set SVE VL 5344
3074 22:58:47.917855 # ok 1338 # SKIP SVE set SVE get SVE for VL 5344
3075 22:58:47.917937 # ok 1339 # SKIP SVE set SVE get FPSIMD for VL 5344
3076 22:58:47.918020 # ok 1340 # SKIP SVE set FPSIMD get SVE for VL 5344
3077 22:58:47.918102 # ok 1341 Set SVE VL 5360
3078 22:58:47.918184 # ok 1342 # SKIP SVE set SVE get SVE for VL 5360
3079 22:58:47.918266 # ok 1343 # SKIP SVE set SVE get FPSIMD for VL 5360
3080 22:58:47.918348 # ok 1344 # SKIP SVE set FPSIMD get SVE for VL 5360
3081 22:58:47.918431 # ok 1345 Set SVE VL 5376
3082 22:58:47.918513 # ok 1346 # SKIP SVE set SVE get SVE for VL 5376
3083 22:58:47.918595 # ok 1347 # SKIP SVE set SVE get FPSIMD for VL 5376
3084 22:58:47.918677 # ok 1348 # SKIP SVE set FPSIMD get SVE for VL 5376
3085 22:58:47.918760 # ok 1349 Set SVE VL 5392
3086 22:58:47.918842 # ok 1350 # SKIP SVE set SVE get SVE for VL 5392
3087 22:58:47.918925 # ok 1351 # SKIP SVE set SVE get FPSIMD for VL 5392
3088 22:58:47.919007 # ok 1352 # SKIP SVE set FPSIMD get SVE for VL 5392
3089 22:58:47.919090 # ok 1353 Set SVE VL 5408
3090 22:58:47.919171 # ok 1354 # SKIP SVE set SVE get SVE for VL 5408
3091 22:58:47.919254 # ok 1355 # SKIP SVE set SVE get FPSIMD for VL 5408
3092 22:58:47.919336 # ok 1356 # SKIP SVE set FPSIMD get SVE for VL 5408
3093 22:58:47.919418 # ok 1357 Set SVE VL 5424
3094 22:58:47.919500 # ok 1358 # SKIP SVE set SVE get SVE for VL 5424
3095 22:58:47.919582 # ok 1359 # SKIP SVE set SVE get FPSIMD for VL 5424
3096 22:58:47.919665 # ok 1360 # SKIP SVE set FPSIMD get SVE for VL 5424
3097 22:58:47.919746 # ok 1361 Set SVE VL 5440
3098 22:58:47.919828 # ok 1362 # SKIP SVE set SVE get SVE for VL 5440
3099 22:58:47.919910 # ok 1363 # SKIP SVE set SVE get FPSIMD for VL 5440
3100 22:58:47.920064 # ok 1364 # SKIP SVE set FPSIMD get SVE for VL 5440
3101 22:58:47.920169 # ok 1365 Set SVE VL 5456
3102 22:58:47.920255 # ok 1366 # SKIP SVE set SVE get SVE for VL 5456
3103 22:58:47.920337 # ok 1367 # SKIP SVE set SVE get FPSIMD for VL 5456
3104 22:58:47.920416 # ok 1368 # SKIP SVE set FPSIMD get SVE for VL 5456
3105 22:58:47.920497 # ok 1369 Set SVE VL 5472
3106 22:58:47.920596 # ok 1370 # SKIP SVE set SVE get SVE for VL 5472
3107 22:58:47.920682 # ok 1371 # SKIP SVE set SVE get FPSIMD for VL 5472
3108 22:58:47.920762 # ok 1372 # SKIP SVE set FPSIMD get SVE for VL 5472
3109 22:58:47.920842 # ok 1373 Set SVE VL 5488
3110 22:58:47.921196 # ok 1374 # SKIP SVE set SVE get SVE for VL 5488
3111 22:58:47.921380 # ok 1375 # SKIP SVE set SVE get FPSIMD for VL 5488
3112 22:58:47.921466 # ok 1376 # SKIP SVE set FPSIMD get SVE for VL 5488
3113 22:58:47.921547 # ok 1377 Set SVE VL 5504
3114 22:58:47.921627 # ok 1378 # SKIP SVE set SVE get SVE for VL 5504
3115 22:58:47.921798 # ok 1379 # SKIP SVE set SVE get FPSIMD for VL 5504
3116 22:58:47.921962 # ok 1380 # SKIP SVE set FPSIMD get SVE for VL 5504
3117 22:58:47.922045 # ok 1381 Set SVE VL 5520
3118 22:58:47.922126 # ok 1382 # SKIP SVE set SVE get SVE for VL 5520
3119 22:58:47.922205 # ok 1383 # SKIP SVE set SVE get FPSIMD for VL 5520
3120 22:58:47.922283 # ok 1384 # SKIP SVE set FPSIMD get SVE for VL 5520
3121 22:58:47.922363 # ok 1385 Set SVE VL 5536
3122 22:58:47.922443 # ok 1386 # SKIP SVE set SVE get SVE for VL 5536
3123 22:58:47.922523 # ok 1387 # SKIP SVE set SVE get FPSIMD for VL 5536
3124 22:58:47.922609 # ok 1388 # SKIP SVE set FPSIMD get SVE for VL 5536
3125 22:58:47.922690 # ok 1389 Set SVE VL 5552
3126 22:58:47.922769 # ok 1390 # SKIP SVE set SVE get SVE for VL 5552
3127 22:58:47.922849 # ok 1391 # SKIP SVE set SVE get FPSIMD for VL 5552
3128 22:58:47.922929 # ok 1392 # SKIP SVE set FPSIMD get SVE for VL 5552
3129 22:58:47.923010 # ok 1393 Set SVE VL 5568
3130 22:58:47.923090 # ok 1394 # SKIP SVE set SVE get SVE for VL 5568
3131 22:58:47.923172 # ok 1395 # SKIP SVE set SVE get FPSIMD for VL 5568
3132 22:58:47.923252 # ok 1396 # SKIP SVE set FPSIMD get SVE for VL 5568
3133 22:58:47.923333 # ok 1397 Set SVE VL 5584
3134 22:58:47.923415 # ok 1398 # SKIP SVE set SVE get SVE for VL 5584
3135 22:58:47.923532 # ok 1399 # SKIP SVE set SVE get FPSIMD for VL 5584
3136 22:58:47.923618 # ok 1400 # SKIP SVE set FPSIMD get SVE for VL 5584
3137 22:58:47.923699 # ok 1401 Set SVE VL 5600
3138 22:58:47.923780 # ok 1402 # SKIP SVE set SVE get SVE for VL 5600
3139 22:58:47.923860 # ok 1403 # SKIP SVE set SVE get FPSIMD for VL 5600
3140 22:58:47.923980 # ok 1404 # SKIP SVE set FPSIMD get SVE for VL 5600
3141 22:58:47.924106 # ok 1405 Set SVE VL 5616
3142 22:58:47.924200 # ok 1406 # SKIP SVE set SVE get SVE for VL 5616
3143 22:58:47.949608 # ok 1407 # SKIP SVE set SVE get FPSIMD for VL 5616
3144 22:58:47.950097 # ok 1408 # SKIP SVE set FPSIMD get SVE for VL 5616
3145 22:58:47.950207 # ok 1409 Set SVE VL 5632
3146 22:58:47.950297 # ok 1410 # SKIP SVE set SVE get SVE for VL 5632
3147 22:58:47.950384 # ok 1411 # SKIP SVE set SVE get FPSIMD for VL 5632
3148 22:58:47.950481 # ok 1412 # SKIP SVE set FPSIMD get SVE for VL 5632
3149 22:58:47.950604 # ok 1413 Set SVE VL 5648
3150 22:58:47.950698 # ok 1414 # SKIP SVE set SVE get SVE for VL 5648
3151 22:58:47.950774 # ok 1415 # SKIP SVE set SVE get FPSIMD for VL 5648
3152 22:58:47.960273 # ok 1416 # SKIP SVE set FPSIMD get SVE for VL 5648
3153 22:58:47.960551 # ok 1417 Set SVE VL 5664
3154 22:58:47.960646 # ok 1418 # SKIP SVE set SVE get SVE for VL 5664
3155 22:58:47.960734 # ok 1419 # SKIP SVE set SVE get FPSIMD for VL 5664
3156 22:58:47.961033 # ok 1420 # SKIP SVE set FPSIMD get SVE for VL 5664
3157 22:58:47.961139 # ok 1421 Set SVE VL 5680
3158 22:58:47.961227 # ok 1422 # SKIP SVE set SVE get SVE for VL 5680
3159 22:58:47.961313 # ok 1423 # SKIP SVE set SVE get FPSIMD for VL 5680
3160 22:58:47.961399 # ok 1424 # SKIP SVE set FPSIMD get SVE for VL 5680
3161 22:58:47.961483 # ok 1425 Set SVE VL 5696
3162 22:58:47.961582 # ok 1426 # SKIP SVE set SVE get SVE for VL 5696
3163 22:58:47.961676 # ok 1427 # SKIP SVE set SVE get FPSIMD for VL 5696
3164 22:58:47.961762 # ok 1428 # SKIP SVE set FPSIMD get SVE for VL 5696
3165 22:58:47.961844 # ok 1429 Set SVE VL 5712
3166 22:58:47.961942 # ok 1430 # SKIP SVE set SVE get SVE for VL 5712
3167 22:58:47.962028 # ok 1431 # SKIP SVE set SVE get FPSIMD for VL 5712
3168 22:58:47.962127 # ok 1432 # SKIP SVE set FPSIMD get SVE for VL 5712
3169 22:58:47.962415 # ok 1433 Set SVE VL 5728
3170 22:58:47.962519 # ok 1434 # SKIP SVE set SVE get SVE for VL 5728
3171 22:58:47.962601 # ok 1435 # SKIP SVE set SVE get FPSIMD for VL 5728
3172 22:58:47.962691 # ok 1436 # SKIP SVE set FPSIMD get SVE for VL 5728
3173 22:58:47.966059 # ok 1437 Set SVE VL 5744
3174 22:58:47.966199 # ok 1438 # SKIP SVE set SVE get SVE for VL 5744
3175 22:58:47.966509 # ok 1439 # SKIP SVE set SVE get FPSIMD for VL 5744
3176 22:58:47.966608 # ok 1440 # SKIP SVE set FPSIMD get SVE for VL 5744
3177 22:58:47.966676 # ok 1441 Set SVE VL 5760
3178 22:58:47.967641 # ok 1442 # SKIP SVE set SVE get SVE for VL 5760
3179 22:58:47.967933 # ok 1443 # SKIP SVE set SVE get FPSIMD for VL 5760
3180 22:58:47.968033 # ok 1444 # SKIP SVE set FPSIMD get SVE for VL 5760
3181 22:58:47.968150 # ok 1445 Set SVE VL 5776
3182 22:58:47.968272 # ok 1446 # SKIP SVE set SVE get SVE for VL 5776
3183 22:58:47.968615 # ok 1447 # SKIP SVE set SVE get FPSIMD for VL 5776
3184 22:58:47.968722 # ok 1448 # SKIP SVE set FPSIMD get SVE for VL 5776
3185 22:58:47.968814 # ok 1449 Set SVE VL 5792
3186 22:58:47.968906 # ok 1450 # SKIP SVE set SVE get SVE for VL 5792
3187 22:58:47.968989 # ok 1451 # SKIP SVE set SVE get FPSIMD for VL 5792
3188 22:58:47.969085 # ok 1452 # SKIP SVE set FPSIMD get SVE for VL 5792
3189 22:58:47.969171 # ok 1453 Set SVE VL 5808
3190 22:58:47.969273 # ok 1454 # SKIP SVE set SVE get SVE for VL 5808
3191 22:58:47.969372 # ok 1455 # SKIP SVE set SVE get FPSIMD for VL 5808
3192 22:58:47.969669 # ok 1456 # SKIP SVE set FPSIMD get SVE for VL 5808
3193 22:58:47.969755 # ok 1457 Set SVE VL 5824
3194 22:58:47.969868 # ok 1458 # SKIP SVE set SVE get SVE for VL 5824
3195 22:58:47.969956 # ok 1459 # SKIP SVE set SVE get FPSIMD for VL 5824
3196 22:58:47.970042 # ok 1460 # SKIP SVE set FPSIMD get SVE for VL 5824
3197 22:58:47.970127 # ok 1461 Set SVE VL 5840
3198 22:58:47.970410 # ok 1462 # SKIP SVE set SVE get SVE for VL 5840
3199 22:58:47.970500 # ok 1463 # SKIP SVE set SVE get FPSIMD for VL 5840
3200 22:58:47.974473 # ok 1464 # SKIP SVE set FPSIMD get SVE for VL 5840
3201 22:58:47.975807 # ok 1465 Set SVE VL 5856
3202 22:58:47.976141 # ok 1466 # SKIP SVE set SVE get SVE for VL 5856
3203 22:58:47.976258 # ok 1467 # SKIP SVE set SVE get FPSIMD for VL 5856
3204 22:58:47.976389 # ok 1468 # SKIP SVE set FPSIMD get SVE for VL 5856
3205 22:58:47.976528 # ok 1469 Set SVE VL 5872
3206 22:58:47.976698 # ok 1470 # SKIP SVE set SVE get SVE for VL 5872
3207 22:58:47.976815 # ok 1471 # SKIP SVE set SVE get FPSIMD for VL 5872
3208 22:58:47.976950 # ok 1472 # SKIP SVE set FPSIMD get SVE for VL 5872
3209 22:58:47.977054 # ok 1473 Set SVE VL 5888
3210 22:58:47.977187 # ok 1474 # SKIP SVE set SVE get SVE for VL 5888
3211 22:58:47.977291 # ok 1475 # SKIP SVE set SVE get FPSIMD for VL 5888
3212 22:58:47.977423 # ok 1476 # SKIP SVE set FPSIMD get SVE for VL 5888
3213 22:58:47.977527 # ok 1477 Set SVE VL 5904
3214 22:58:47.977668 # ok 1478 # SKIP SVE set SVE get SVE for VL 5904
3215 22:58:47.977777 # ok 1479 # SKIP SVE set SVE get FPSIMD for VL 5904
3216 22:58:47.977908 # ok 1480 # SKIP SVE set FPSIMD get SVE for VL 5904
3217 22:58:47.978013 # ok 1481 Set SVE VL 5920
3218 22:58:47.978143 # ok 1482 # SKIP SVE set SVE get SVE for VL 5920
3219 22:58:47.978301 # ok 1483 # SKIP SVE set SVE get FPSIMD for VL 5920
3220 22:58:47.978444 # ok 1484 # SKIP SVE set FPSIMD get SVE for VL 5920
3221 22:58:47.978550 # ok 1485 Set SVE VL 5936
3222 22:58:47.979409 # ok 1486 # SKIP SVE set SVE get SVE for VL 5936
3223 22:58:47.979708 # ok 1487 # SKIP SVE set SVE get FPSIMD for VL 5936
3224 22:58:47.979833 # ok 1488 # SKIP SVE set FPSIMD get SVE for VL 5936
3225 22:58:47.979939 # ok 1489 Set SVE VL 5952
3226 22:58:47.980072 # ok 1490 # SKIP SVE set SVE get SVE for VL 5952
3227 22:58:47.980176 # ok 1491 # SKIP SVE set SVE get FPSIMD for VL 5952
3228 22:58:47.980306 # ok 1492 # SKIP SVE set FPSIMD get SVE for VL 5952
3229 22:58:47.980432 # ok 1493 Set SVE VL 5968
3230 22:58:47.980557 # ok 1494 # SKIP SVE set SVE get SVE for VL 5968
3231 22:58:47.980683 # ok 1495 # SKIP SVE set SVE get FPSIMD for VL 5968
3232 22:58:47.980812 # ok 1496 # SKIP SVE set FPSIMD get SVE for VL 5968
3233 22:58:47.980919 # ok 1497 Set SVE VL 5984
3234 22:58:47.981050 # ok 1498 # SKIP SVE set SVE get SVE for VL 5984
3235 22:58:47.981176 # ok 1499 # SKIP SVE set SVE get FPSIMD for VL 5984
3236 22:58:47.981513 # ok 1500 # SKIP SVE set FPSIMD get SVE for VL 5984
3237 22:58:47.981638 # ok 1501 Set SVE VL 6000
3238 22:58:47.981767 # ok 1502 # SKIP SVE set SVE get SVE for VL 6000
3239 22:58:47.981864 # ok 1503 # SKIP SVE set SVE get FPSIMD for VL 6000
3240 22:58:47.981977 # ok 1504 # SKIP SVE set FPSIMD get SVE for VL 6000
3241 22:58:47.982073 # ok 1505 Set SVE VL 6016
3242 22:58:47.982185 # ok 1506 # SKIP SVE set SVE get SVE for VL 6016
3243 22:58:47.982281 # ok 1507 # SKIP SVE set SVE get FPSIMD for VL 6016
3244 22:58:47.982391 # ok 1508 # SKIP SVE set FPSIMD get SVE for VL 6016
3245 22:58:47.982505 # ok 1509 Set SVE VL 6032
3246 22:58:47.983755 # ok 1510 # SKIP SVE set SVE get SVE for VL 6032
3247 22:58:47.984053 # ok 1511 # SKIP SVE set SVE get FPSIMD for VL 6032
3248 22:58:47.984173 # ok 1512 # SKIP SVE set FPSIMD get SVE for VL 6032
3249 22:58:47.984273 # ok 1513 Set SVE VL 6048
3250 22:58:47.984384 # ok 1514 # SKIP SVE set SVE get SVE for VL 6048
3251 22:58:47.984496 # ok 1515 # SKIP SVE set SVE get FPSIMD for VL 6048
3252 22:58:47.984608 # ok 1516 # SKIP SVE set FPSIMD get SVE for VL 6048
3253 22:58:47.984720 # ok 1517 Set SVE VL 6064
3254 22:58:47.984850 # ok 1518 # SKIP SVE set SVE get SVE for VL 6064
3255 22:58:47.984993 # ok 1519 # SKIP SVE set SVE get FPSIMD for VL 6064
3256 22:58:47.985137 # ok 1520 # SKIP SVE set FPSIMD get SVE for VL 6064
3257 22:58:47.985281 # ok 1521 Set SVE VL 6080
3258 22:58:47.985423 # ok 1522 # SKIP SVE set SVE get SVE for VL 6080
3259 22:58:47.985566 # ok 1523 # SKIP SVE set SVE get FPSIMD for VL 6080
3260 22:58:47.985737 # ok 1524 # SKIP SVE set FPSIMD get SVE for VL 6080
3261 22:58:47.985864 # ok 1525 Set SVE VL 6096
3262 22:58:47.986005 # ok 1526 # SKIP SVE set SVE get SVE for VL 6096
3263 22:58:47.986129 # ok 1527 # SKIP SVE set SVE get FPSIMD for VL 6096
3264 22:58:47.986270 # ok 1528 # SKIP SVE set FPSIMD get SVE for VL 6096
3265 22:58:47.986394 # ok 1529 Set SVE VL 6112
3266 22:58:47.986518 # ok 1530 # SKIP SVE set SVE get SVE for VL 6112
3267 22:58:47.987293 # ok 1531 # SKIP SVE set SVE get FPSIMD for VL 6112
3268 22:58:47.987639 # ok 1532 # SKIP SVE set FPSIMD get SVE for VL 6112
3269 22:58:47.987750 # ok 1533 Set SVE VL 6128
3270 22:58:47.987847 # ok 1534 # SKIP SVE set SVE get SVE for VL 6128
3271 22:58:47.987954 # ok 1535 # SKIP SVE set SVE get FPSIMD for VL 6128
3272 22:58:47.988044 # ok 1536 # SKIP SVE set FPSIMD get SVE for VL 6128
3273 22:58:47.988144 # ok 1537 Set SVE VL 6144
3274 22:58:47.988229 # ok 1538 # SKIP SVE set SVE get SVE for VL 6144
3275 22:58:47.988327 # ok 1539 # SKIP SVE set SVE get FPSIMD for VL 6144
3276 22:58:47.988427 # ok 1540 # SKIP SVE set FPSIMD get SVE for VL 6144
3277 22:58:47.988525 # ok 1541 Set SVE VL 6160
3278 22:58:47.988623 # ok 1542 # SKIP SVE set SVE get SVE for VL 6160
3279 22:58:47.988922 # ok 1543 # SKIP SVE set SVE get FPSIMD for VL 6160
3280 22:58:47.989025 # ok 1544 # SKIP SVE set FPSIMD get SVE for VL 6160
3281 22:58:47.989125 # ok 1545 Set SVE VL 6176
3282 22:58:47.989223 # ok 1546 # SKIP SVE set SVE get SVE for VL 6176
3283 22:58:47.989326 # ok 1547 # SKIP SVE set SVE get FPSIMD for VL 6176
3284 22:58:47.989424 # ok 1548 # SKIP SVE set FPSIMD get SVE for VL 6176
3285 22:58:47.989522 # ok 1549 Set SVE VL 6192
3286 22:58:47.989819 # ok 1550 # SKIP SVE set SVE get SVE for VL 6192
3287 22:58:47.989924 # ok 1551 # SKIP SVE set SVE get FPSIMD for VL 6192
3288 22:58:47.990027 # ok 1552 # SKIP SVE set FPSIMD get SVE for VL 6192
3289 22:58:47.990113 # ok 1553 Set SVE VL 6208
3290 22:58:47.990210 # ok 1554 # SKIP SVE set SVE get SVE for VL 6208
3291 22:58:47.990308 # ok 1555 # SKIP SVE set SVE get FPSIMD for VL 6208
3292 22:58:47.990406 # ok 1556 # SKIP SVE set FPSIMD get SVE for VL 6208
3293 22:58:47.991366 # ok 1557 Set SVE VL 6224
3294 22:58:47.991666 # ok 1558 # SKIP SVE set SVE get SVE for VL 6224
3295 22:58:47.991773 # ok 1559 # SKIP SVE set SVE get FPSIMD for VL 6224
3296 22:58:47.991873 # ok 1560 # SKIP SVE set FPSIMD get SVE for VL 6224
3297 22:58:47.991971 # ok 1561 Set SVE VL 6240
3298 22:58:47.992070 # ok 1562 # SKIP SVE set SVE get SVE for VL 6240
3299 22:58:47.992168 # ok 1563 # SKIP SVE set SVE get FPSIMD for VL 6240
3300 22:58:47.992666 # ok 1564 # SKIP SVE set FPSIMD get SVE for VL 6240
3301 22:58:47.992774 # ok 1565 Set SVE VL 6256
3302 22:58:47.992859 # ok 1566 # SKIP SVE set SVE get SVE for VL 6256
3303 22:58:47.992957 # ok 1567 # SKIP SVE set SVE get FPSIMD for VL 6256
3304 22:58:47.993042 # ok 1568 # SKIP SVE set FPSIMD get SVE for VL 6256
3305 22:58:47.993125 # ok 1569 Set SVE VL 6272
3306 22:58:47.993222 # ok 1570 # SKIP SVE set SVE get SVE for VL 6272
3307 22:58:47.993307 # ok 1571 # SKIP SVE set SVE get FPSIMD for VL 6272
3308 22:58:47.993608 # ok 1572 # SKIP SVE set FPSIMD get SVE for VL 6272
3309 22:58:47.993721 # ok 1573 Set SVE VL 6288
3310 22:58:47.993827 # ok 1574 # SKIP SVE set SVE get SVE for VL 6288
3311 22:58:47.993912 # ok 1575 # SKIP SVE set SVE get FPSIMD for VL 6288
3312 22:58:47.994010 # ok 1576 # SKIP SVE set FPSIMD get SVE for VL 6288
3313 22:58:47.994094 # ok 1577 Set SVE VL 6304
3314 22:58:47.994176 # ok 1578 # SKIP SVE set SVE get SVE for VL 6304
3315 22:58:47.994273 # ok 1579 # SKIP SVE set SVE get FPSIMD for VL 6304
3316 22:58:47.994371 # ok 1580 # SKIP SVE set FPSIMD get SVE for VL 6304
3317 22:58:47.994468 # ok 1581 Set SVE VL 6320
3318 22:58:47.995182 # ok 1582 # SKIP SVE set SVE get SVE for VL 6320
3319 22:58:47.995510 # ok 1583 # SKIP SVE set SVE get FPSIMD for VL 6320
3320 22:58:47.995627 # ok 1584 # SKIP SVE set FPSIMD get SVE for VL 6320
3321 22:58:47.995743 # ok 1585 Set SVE VL 6336
3322 22:58:47.995879 # ok 1586 # SKIP SVE set SVE get SVE for VL 6336
3323 22:58:47.996053 # ok 1587 # SKIP SVE set SVE get FPSIMD for VL 6336
3324 22:58:47.996196 # ok 1588 # SKIP SVE set FPSIMD get SVE for VL 6336
3325 22:58:47.996293 # ok 1589 Set SVE VL 6352
3326 22:58:48.000030 # ok 1590 # SKIP SVE set SVE get SVE for VL 6352
3327 22:58:48.000347 # ok 1591 # SKIP SVE set SVE get FPSIMD for VL 6352
3328 22:58:48.000478 # ok 1592 # SKIP SVE set FPSIMD get SVE for VL 6352
3329 22:58:48.000571 # ok 1593 Set SVE VL 6368
3330 22:58:48.000659 # ok 1594 # SKIP SVE set SVE get SVE for VL 6368
3331 22:58:48.000742 # ok 1595 # SKIP SVE set SVE get FPSIMD for VL 6368
3332 22:58:48.000840 # ok 1596 # SKIP SVE set FPSIMD get SVE for VL 6368
3333 22:58:48.000925 # ok 1597 Set SVE VL 6384
3334 22:58:48.001008 # ok 1598 # SKIP SVE set SVE get SVE for VL 6384
3335 22:58:48.001105 # ok 1599 # SKIP SVE set SVE get FPSIMD for VL 6384
3336 22:58:48.001190 # ok 1600 # SKIP SVE set FPSIMD get SVE for VL 6384
3337 22:58:48.001287 # ok 1601 Set SVE VL 6400
3338 22:58:48.001371 # ok 1602 # SKIP SVE set SVE get SVE for VL 6400
3339 22:58:48.001696 # ok 1603 # SKIP SVE set SVE get FPSIMD for VL 6400
3340 22:58:48.001805 # ok 1604 # SKIP SVE set FPSIMD get SVE for VL 6400
3341 22:58:48.001891 # ok 1605 Set SVE VL 6416
3342 22:58:48.001988 # ok 1606 # SKIP SVE set SVE get SVE for VL 6416
3343 22:58:48.002072 # ok 1607 # SKIP SVE set SVE get FPSIMD for VL 6416
3344 22:58:48.002169 # ok 1608 # SKIP SVE set FPSIMD get SVE for VL 6416
3345 22:58:48.002253 # ok 1609 Set SVE VL 6432
3346 22:58:48.002349 # ok 1610 # SKIP SVE set SVE get SVE for VL 6432
3347 22:58:48.002446 # ok 1611 # SKIP SVE set SVE get FPSIMD for VL 6432
3348 22:58:48.003356 # ok 1612 # SKIP SVE set FPSIMD get SVE for VL 6432
3349 22:58:48.003657 # ok 1613 Set SVE VL 6448
3350 22:58:48.003799 # ok 1614 # SKIP SVE set SVE get SVE for VL 6448
3351 22:58:48.003929 # ok 1615 # SKIP SVE set SVE get FPSIMD for VL 6448
3352 22:58:48.004018 # ok 1616 # SKIP SVE set FPSIMD get SVE for VL 6448
3353 22:58:48.004116 # ok 1617 Set SVE VL 6464
3354 22:58:48.004214 # ok 1618 # SKIP SVE set SVE get SVE for VL 6464
3355 22:58:48.004312 # ok 1619 # SKIP SVE set SVE get FPSIMD for VL 6464
3356 22:58:48.004611 # ok 1620 # SKIP SVE set FPSIMD get SVE for VL 6464
3357 22:58:48.004716 # ok 1621 Set SVE VL 6480
3358 22:58:48.004817 # ok 1622 # SKIP SVE set SVE get SVE for VL 6480
3359 22:58:48.004902 # ok 1623 # SKIP SVE set SVE get FPSIMD for VL 6480
3360 22:58:48.004985 # ok 1624 # SKIP SVE set FPSIMD get SVE for VL 6480
3361 22:58:48.005082 # ok 1625 Set SVE VL 6496
3362 22:58:48.005166 # ok 1626 # SKIP SVE set SVE get SVE for VL 6496
3363 22:58:48.005262 # ok 1627 # SKIP SVE set SVE get FPSIMD for VL 6496
3364 22:58:48.005360 # ok 1628 # SKIP SVE set FPSIMD get SVE for VL 6496
3365 22:58:48.005653 # ok 1629 Set SVE VL 6512
3366 22:58:48.005759 # ok 1630 # SKIP SVE set SVE get SVE for VL 6512
3367 22:58:48.005860 # ok 1631 # SKIP SVE set SVE get FPSIMD for VL 6512
3368 22:58:48.005947 # ok 1632 # SKIP SVE set FPSIMD get SVE for VL 6512
3369 22:58:48.006047 # ok 1633 Set SVE VL 6528
3370 22:58:48.006133 # ok 1634 # SKIP SVE set SVE get SVE for VL 6528
3371 22:58:48.006232 # ok 1635 # SKIP SVE set SVE get FPSIMD for VL 6528
3372 22:58:48.006517 # ok 1636 # SKIP SVE set FPSIMD get SVE for VL 6528
3373 22:58:48.006608 # ok 1637 Set SVE VL 6544
3374 22:58:48.006707 # ok 1638 # SKIP SVE set SVE get SVE for VL 6544
3375 22:58:48.007009 # ok 1639 # SKIP SVE set SVE get FPSIMD for VL 6544
3376 22:58:48.007126 # ok 1640 # SKIP SVE set FPSIMD get SVE for VL 6544
3377 22:58:48.007212 # ok 1641 Set SVE VL 6560
3378 22:58:48.007308 # ok 1642 # SKIP SVE set SVE get SVE for VL 6560
3379 22:58:48.007406 # ok 1643 # SKIP SVE set SVE get FPSIMD for VL 6560
3380 22:58:48.007503 # ok 1644 # SKIP SVE set FPSIMD get SVE for VL 6560
3381 22:58:48.007599 # ok 1645 Set SVE VL 6576
3382 22:58:48.007893 # ok 1646 # SKIP SVE set SVE get SVE for VL 6576
3383 22:58:48.008201 # ok 1647 # SKIP SVE set SVE get FPSIMD for VL 6576
3384 22:58:48.008304 # ok 1648 # SKIP SVE set FPSIMD get SVE for VL 6576
3385 22:58:48.008389 # ok 1649 Set SVE VL 6592
3386 22:58:48.008485 # ok 1650 # SKIP SVE set SVE get SVE for VL 6592
3387 22:58:48.008570 # ok 1651 # SKIP SVE set SVE get FPSIMD for VL 6592
3388 22:58:48.008666 # ok 1652 # SKIP SVE set FPSIMD get SVE for VL 6592
3389 22:58:48.008767 # ok 1653 Set SVE VL 6608
3390 22:58:48.008864 # ok 1654 # SKIP SVE set SVE get SVE for VL 6608
3391 22:58:48.008961 # ok 1655 # SKIP SVE set SVE get FPSIMD for VL 6608
3392 22:58:48.009246 # ok 1656 # SKIP SVE set FPSIMD get SVE for VL 6608
3393 22:58:48.009349 # ok 1657 Set SVE VL 6624
3394 22:58:48.009448 # ok 1658 # SKIP SVE set SVE get SVE for VL 6624
3395 22:58:48.009548 # ok 1659 # SKIP SVE set SVE get FPSIMD for VL 6624
3396 22:58:48.009749 # ok 1660 # SKIP SVE set FPSIMD get SVE for VL 6624
3397 22:58:48.009856 # ok 1661 Set SVE VL 6640
3398 22:58:48.009959 # ok 1662 # SKIP SVE set SVE get SVE for VL 6640
3399 22:58:48.010045 # ok 1663 # SKIP SVE set SVE get FPSIMD for VL 6640
3400 22:58:48.010143 # ok 1664 # SKIP SVE set FPSIMD get SVE for VL 6640
3401 22:58:48.010227 # ok 1665 Set SVE VL 6656
3402 22:58:48.010323 # ok 1666 # SKIP SVE set SVE get SVE for VL 6656
3403 22:58:48.010420 # ok 1667 # SKIP SVE set SVE get FPSIMD for VL 6656
3404 22:58:48.010760 # ok 1668 # SKIP SVE set FPSIMD get SVE for VL 6656
3405 22:58:48.010898 # ok 1669 Set SVE VL 6672
3406 22:58:48.010998 # ok 1670 # SKIP SVE set SVE get SVE for VL 6672
3407 22:58:48.011094 # ok 1671 # SKIP SVE set SVE get FPSIMD for VL 6672
3408 22:58:48.011289 # ok 1672 # SKIP SVE set FPSIMD get SVE for VL 6672
3409 22:58:48.011408 # ok 1673 Set SVE VL 6688
3410 22:58:48.011507 # ok 1674 # SKIP SVE set SVE get SVE for VL 6688
3411 22:58:48.011604 # ok 1675 # SKIP SVE set SVE get FPSIMD for VL 6688
3412 22:58:48.011904 # ok 1676 # SKIP SVE set FPSIMD get SVE for VL 6688
3413 22:58:48.012063 # ok 1677 Set SVE VL 6704
3414 22:58:48.012255 # ok 1678 # SKIP SVE set SVE get SVE for VL 6704
3415 22:58:48.012507 # ok 1679 # SKIP SVE set SVE get FPSIMD for VL 6704
3416 22:58:48.012727 # ok 1680 # SKIP SVE set FPSIMD get SVE for VL 6704
3417 22:58:48.012882 # ok 1681 Set SVE VL 6720
3418 22:58:48.013060 # ok 1682 # SKIP SVE set SVE get SVE for VL 6720
3419 22:58:48.013321 # ok 1683 # SKIP SVE set SVE get FPSIMD for VL 6720
3420 22:58:48.013484 # ok 1684 # SKIP SVE set FPSIMD get SVE for VL 6720
3421 22:58:48.013654 # ok 1685 Set SVE VL 6736
3422 22:58:48.013747 # ok 1686 # SKIP SVE set SVE get SVE for VL 6736
3423 22:58:48.013830 # ok 1687 # SKIP SVE set SVE get FPSIMD for VL 6736
3424 22:58:48.013912 # ok 1688 # SKIP SVE set FPSIMD get SVE for VL 6736
3425 22:58:48.014012 # ok 1689 Set SVE VL 6752
3426 22:58:48.014097 # ok 1690 # SKIP SVE set SVE get SVE for VL 6752
3427 22:58:48.014180 # ok 1691 # SKIP SVE set SVE get FPSIMD for VL 6752
3428 22:58:48.014262 # ok 1692 # SKIP SVE set FPSIMD get SVE for VL 6752
3429 22:58:48.014343 # ok 1693 Set SVE VL 6768
3430 22:58:48.014425 # ok 1694 # SKIP SVE set SVE get SVE for VL 6768
3431 22:58:48.014523 # ok 1695 # SKIP SVE set SVE get FPSIMD for VL 6768
3432 22:58:48.014607 # ok 1696 # SKIP SVE set FPSIMD get SVE for VL 6768
3433 22:58:48.014689 # ok 1697 Set SVE VL 6784
3434 22:58:48.014790 # ok 1698 # SKIP SVE set SVE get SVE for VL 6784
3435 22:58:48.014874 # ok 1699 # SKIP SVE set SVE get FPSIMD for VL 6784
3436 22:58:48.014969 # ok 1700 # SKIP SVE set FPSIMD get SVE for VL 6784
3437 22:58:48.015067 # ok 1701 Set SVE VL 6800
3438 22:58:48.015165 # ok 1702 # SKIP SVE set SVE get SVE for VL 6800
3439 22:58:48.015487 # ok 1703 # SKIP SVE set SVE get FPSIMD for VL 6800
3440 22:58:48.015649 # ok 1704 # SKIP SVE set FPSIMD get SVE for VL 6800
3441 22:58:48.016740 # ok 1705 Set SVE VL 6816
3442 22:58:48.016858 # ok 1706 # SKIP SVE set SVE get SVE for VL 6816
3443 22:58:48.016952 # ok 1707 # SKIP SVE set SVE get FPSIMD for VL 6816
3444 22:58:48.017073 # ok 1708 # SKIP SVE set FPSIMD get SVE for VL 6816
3445 22:58:48.017194 # ok 1709 Set SVE VL 6832
3446 22:58:48.017304 # ok 1710 # SKIP SVE set SVE get SVE for VL 6832
3447 22:58:48.017444 # ok 1711 # SKIP SVE set SVE get FPSIMD for VL 6832
3448 22:58:48.017559 # ok 1712 # SKIP SVE set FPSIMD get SVE for VL 6832
3449 22:58:48.017668 # ok 1713 Set SVE VL 6848
3450 22:58:48.017774 # ok 1714 # SKIP SVE set SVE get SVE for VL 6848
3451 22:58:48.018027 # ok 1715 # SKIP SVE set SVE get FPSIMD for VL 6848
3452 22:58:48.018099 # ok 1716 # SKIP SVE set FPSIMD get SVE for VL 6848
3453 22:58:48.018165 # ok 1717 Set SVE VL 6864
3454 22:58:48.018231 # ok 1718 # SKIP SVE set SVE get SVE for VL 6864
3455 22:58:48.018310 # ok 1719 # SKIP SVE set SVE get FPSIMD for VL 6864
3456 22:58:48.018391 # ok 1720 # SKIP SVE set FPSIMD get SVE for VL 6864
3457 22:58:48.018470 # ok 1721 Set SVE VL 6880
3458 22:58:48.018534 # ok 1722 # SKIP SVE set SVE get SVE for VL 6880
3459 22:58:48.018609 # ok 1723 # SKIP SVE set SVE get FPSIMD for VL 6880
3460 22:58:48.018689 # ok 1724 # SKIP SVE set FPSIMD get SVE for VL 6880
3461 22:58:48.018771 # ok 1725 Set SVE VL 6896
3462 22:58:48.018871 # ok 1726 # SKIP SVE set SVE get SVE for VL 6896
3463 22:58:48.018957 # ok 1727 # SKIP SVE set SVE get FPSIMD for VL 6896
3464 22:58:48.019024 # ok 1728 # SKIP SVE set FPSIMD get SVE for VL 6896
3465 22:58:48.019085 # ok 1729 Set SVE VL 6912
3466 22:58:48.019148 # ok 1730 # SKIP SVE set SVE get SVE for VL 6912
3467 22:58:48.019226 # ok 1731 # SKIP SVE set SVE get FPSIMD for VL 6912
3468 22:58:48.019293 # ok 1732 # SKIP SVE set FPSIMD get SVE for VL 6912
3469 22:58:48.019365 # ok 1733 Set SVE VL 6928
3470 22:58:48.019461 # ok 1734 # SKIP SVE set SVE get SVE for VL 6928
3471 22:58:48.019548 # ok 1735 # SKIP SVE set SVE get FPSIMD for VL 6928
3472 22:58:48.019646 # ok 1736 # SKIP SVE set FPSIMD get SVE for VL 6928
3473 22:58:48.020012 # ok 1737 Set SVE VL 6944
3474 22:58:48.020174 # ok 1738 # SKIP SVE set SVE get SVE for VL 6944
3475 22:58:48.020331 # ok 1739 # SKIP SVE set SVE get FPSIMD for VL 6944
3476 22:58:48.020475 # ok 1740 # SKIP SVE set FPSIMD get SVE for VL 6944
3477 22:58:48.020784 # ok 1741 Set SVE VL 6960
3478 22:58:48.020980 # ok 1742 # SKIP SVE set SVE get SVE for VL 6960
3479 22:58:48.021119 # ok 1743 # SKIP SVE set SVE get FPSIMD for VL 6960
3480 22:58:48.021233 # ok 1744 # SKIP SVE set FPSIMD get SVE for VL 6960
3481 22:58:48.021322 # ok 1745 Set SVE VL 6976
3482 22:58:48.021414 # ok 1746 # SKIP SVE set SVE get SVE for VL 6976
3483 22:58:48.021518 # ok 1747 # SKIP SVE set SVE get FPSIMD for VL 6976
3484 22:58:48.021591 # ok 1748 # SKIP SVE set FPSIMD get SVE for VL 6976
3485 22:58:48.021666 # ok 1749 Set SVE VL 6992
3486 22:58:48.021730 # ok 1750 # SKIP SVE set SVE get SVE for VL 6992
3487 22:58:48.021796 # ok 1751 # SKIP SVE set SVE get FPSIMD for VL 6992
3488 22:58:48.021893 # ok 1752 # SKIP SVE set FPSIMD get SVE for VL 6992
3489 22:58:48.021973 # ok 1753 Set SVE VL 7008
3490 22:58:48.022046 # ok 1754 # SKIP SVE set SVE get SVE for VL 7008
3491 22:58:48.022138 # ok 1755 # SKIP SVE set SVE get FPSIMD for VL 7008
3492 22:58:48.022215 # ok 1756 # SKIP SVE set FPSIMD get SVE for VL 7008
3493 22:58:48.022300 # ok 1757 Set SVE VL 7024
3494 22:58:48.022382 # ok 1758 # SKIP SVE set SVE get SVE for VL 7024
3495 22:58:48.022679 # ok 1759 # SKIP SVE set SVE get FPSIMD for VL 7024
3496 22:58:48.022795 # ok 1760 # SKIP SVE set FPSIMD get SVE for VL 7024
3497 22:58:48.022867 # ok 1761 Set SVE VL 7040
3498 22:58:48.023139 # ok 1762 # SKIP SVE set SVE get SVE for VL 7040
3499 22:58:48.023222 # ok 1763 # SKIP SVE set SVE get FPSIMD for VL 7040
3500 22:58:48.023307 # ok 1764 # SKIP SVE set FPSIMD get SVE for VL 7040
3501 22:58:48.023387 # ok 1765 Set SVE VL 7056
3502 22:58:48.023476 # ok 1766 # SKIP SVE set SVE get SVE for VL 7056
3503 22:58:48.023744 # ok 1767 # SKIP SVE set SVE get FPSIMD for VL 7056
3504 22:58:48.023849 # ok 1768 # SKIP SVE set FPSIMD get SVE for VL 7056
3505 22:58:48.023953 # ok 1769 Set SVE VL 7072
3506 22:58:48.024038 # ok 1770 # SKIP SVE set SVE get SVE for VL 7072
3507 22:58:48.024134 # ok 1771 # SKIP SVE set SVE get FPSIMD for VL 7072
3508 22:58:48.024231 # ok 1772 # SKIP SVE set FPSIMD get SVE for VL 7072
3509 22:58:48.028060 # ok 1773 Set SVE VL 7088
3510 22:58:48.028258 # ok 1774 # SKIP SVE set SVE get SVE for VL 7088
3511 22:58:48.028348 # ok 1775 # SKIP SVE set SVE get FPSIMD for VL 7088
3512 22:58:48.028448 # ok 1776 # SKIP SVE set FPSIMD get SVE for VL 7088
3513 22:58:48.028537 # ok 1777 Set SVE VL 7104
3514 22:58:48.028634 # ok 1778 # SKIP SVE set SVE get SVE for VL 7104
3515 22:58:48.028719 # ok 1779 # SKIP SVE set SVE get FPSIMD for VL 7104
3516 22:58:48.028815 # ok 1780 # SKIP SVE set FPSIMD get SVE for VL 7104
3517 22:58:48.028921 # ok 1781 Set SVE VL 7120
3518 22:58:48.029020 # ok 1782 # SKIP SVE set SVE get SVE for VL 7120
3519 22:58:48.029354 # ok 1783 # SKIP SVE set SVE get FPSIMD for VL 7120
3520 22:58:48.029464 # ok 1784 # SKIP SVE set FPSIMD get SVE for VL 7120
3521 22:58:48.029573 # ok 1785 Set SVE VL 7136
3522 22:58:48.029707 # ok 1786 # SKIP SVE set SVE get SVE for VL 7136
3523 22:58:48.029795 # ok 1787 # SKIP SVE set SVE get FPSIMD for VL 7136
3524 22:58:48.030080 # ok 1788 # SKIP SVE set FPSIMD get SVE for VL 7136
3525 22:58:48.030176 # ok 1789 Set SVE VL 7152
3526 22:58:48.030245 # ok 1790 # SKIP SVE set SVE get SVE for VL 7152
3527 22:58:48.030322 # ok 1791 # SKIP SVE set SVE get FPSIMD for VL 7152
3528 22:58:48.030399 # ok 1792 # SKIP SVE set FPSIMD get SVE for VL 7152
3529 22:58:48.030465 # ok 1793 Set SVE VL 7168
3530 22:58:48.030707 # ok 1794 # SKIP SVE set SVE get SVE for VL 7168
3531 22:58:48.031431 # ok 1795 # SKIP SVE set SVE get FPSIMD for VL 7168
3532 22:58:48.031502 # ok 1796 # SKIP SVE set FPSIMD get SVE for VL 7168
3533 22:58:48.031567 # ok 1797 Set SVE VL 7184
3534 22:58:48.031840 # ok 1798 # SKIP SVE set SVE get SVE for VL 7184
3535 22:58:48.031940 # ok 1799 # SKIP SVE set SVE get FPSIMD for VL 7184
3536 22:58:48.032049 # ok 1800 # SKIP SVE set FPSIMD get SVE for VL 7184
3537 22:58:48.032129 # ok 1801 Set SVE VL 7200
3538 22:58:48.032225 # ok 1802 # SKIP SVE set SVE get SVE for VL 7200
3539 22:58:48.032331 # ok 1803 # SKIP SVE set SVE get FPSIMD for VL 7200
3540 22:58:48.032413 # ok 1804 # SKIP SVE set FPSIMD get SVE for VL 7200
3541 22:58:48.032492 # ok 1805 Set SVE VL 7216
3542 22:58:48.032579 # ok 1806 # SKIP SVE set SVE get SVE for VL 7216
3543 22:58:48.032858 # ok 1807 # SKIP SVE set SVE get FPSIMD for VL 7216
3544 22:58:48.032958 # ok 1808 # SKIP SVE set FPSIMD get SVE for VL 7216
3545 22:58:48.033054 # ok 1809 Set SVE VL 7232
3546 22:58:48.033126 # ok 1810 # SKIP SVE set SVE get SVE for VL 7232
3547 22:58:48.033210 # ok 1811 # SKIP SVE set SVE get FPSIMD for VL 7232
3548 22:58:48.033478 # ok 1812 # SKIP SVE set FPSIMD get SVE for VL 7232
3549 22:58:48.033558 # ok 1813 Set SVE VL 7248
3550 22:58:48.033641 # ok 1814 # SKIP SVE set SVE get SVE for VL 7248
3551 22:58:48.033730 # ok 1815 # SKIP SVE set SVE get FPSIMD for VL 7248
3552 22:58:48.033830 # ok 1816 # SKIP SVE set FPSIMD get SVE for VL 7248
3553 22:58:48.033908 # ok 1817 Set SVE VL 7264
3554 22:58:48.033994 # ok 1818 # SKIP SVE set SVE get SVE for VL 7264
3555 22:58:48.034252 # ok 1819 # SKIP SVE set SVE get FPSIMD for VL 7264
3556 22:58:48.034334 # ok 1820 # SKIP SVE set FPSIMD get SVE for VL 7264
3557 22:58:48.034411 # ok 1821 Set SVE VL 7280
3558 22:58:48.034487 # ok 1822 # SKIP SVE set SVE get SVE for VL 7280
3559 22:58:48.034914 # ok 1823 # SKIP SVE set SVE get FPSIMD for VL 7280
3560 22:58:48.035020 # ok 1824 # SKIP SVE set FPSIMD get SVE for VL 7280
3561 22:58:48.035108 # ok 1825 Set SVE VL 7296
3562 22:58:48.035206 # ok 1826 # SKIP SVE set SVE get SVE for VL 7296
3563 22:58:48.035291 # ok 1827 # SKIP SVE set SVE get FPSIMD for VL 7296
3564 22:58:48.035387 # ok 1828 # SKIP SVE set FPSIMD get SVE for VL 7296
3565 22:58:48.035485 # ok 1829 Set SVE VL 7312
3566 22:58:48.035583 # ok 1830 # SKIP SVE set SVE get SVE for VL 7312
3567 22:58:48.035679 # ok 1831 # SKIP SVE set SVE get FPSIMD for VL 7312
3568 22:58:48.035776 # ok 1832 # SKIP SVE set FPSIMD get SVE for VL 7312
3569 22:58:48.035874 # ok 1833 Set SVE VL 7328
3570 22:58:48.036154 # ok 1834 # SKIP SVE set SVE get SVE for VL 7328
3571 22:58:48.036237 # ok 1835 # SKIP SVE set SVE get FPSIMD for VL 7328
3572 22:58:48.036503 # ok 1836 # SKIP SVE set FPSIMD get SVE for VL 7328
3573 22:58:48.036600 # ok 1837 Set SVE VL 7344
3574 22:58:48.036701 # ok 1838 # SKIP SVE set SVE get SVE for VL 7344
3575 22:58:48.036778 # ok 1839 # SKIP SVE set SVE get FPSIMD for VL 7344
3576 22:58:48.036865 # ok 1840 # SKIP SVE set FPSIMD get SVE for VL 7344
3577 22:58:48.037112 # ok 1841 Set SVE VL 7360
3578 22:58:48.037184 # ok 1842 # SKIP SVE set SVE get SVE for VL 7360
3579 22:58:48.037260 # ok 1843 # SKIP SVE set SVE get FPSIMD for VL 7360
3580 22:58:48.037572 # ok 1844 # SKIP SVE set FPSIMD get SVE for VL 7360
3581 22:58:48.037693 # ok 1845 Set SVE VL 7376
3582 22:58:48.037793 # ok 1846 # SKIP SVE set SVE get SVE for VL 7376
3583 22:58:48.037893 # ok 1847 # SKIP SVE set SVE get FPSIMD for VL 7376
3584 22:58:48.037979 # ok 1848 # SKIP SVE set FPSIMD get SVE for VL 7376
3585 22:58:48.038077 # ok 1849 Set SVE VL 7392
3586 22:58:48.038160 # ok 1850 # SKIP SVE set SVE get SVE for VL 7392
3587 22:58:48.038256 # ok 1851 # SKIP SVE set SVE get FPSIMD for VL 7392
3588 22:58:48.038513 # ok 1852 # SKIP SVE set FPSIMD get SVE for VL 7392
3589 22:58:48.038618 # ok 1853 Set SVE VL 7408
3590 22:58:48.040802 # ok 1854 # SKIP SVE set SVE get SVE for VL 7408
3591 22:58:48.041179 # ok 1855 # SKIP SVE set SVE get FPSIMD for VL 7408
3592 22:58:48.041294 # ok 1856 # SKIP SVE set FPSIMD get SVE for VL 7408
3593 22:58:48.041397 # ok 1857 Set SVE VL 7424
3594 22:58:48.041480 # ok 1858 # SKIP SVE set SVE get SVE for VL 7424
3595 22:58:48.041582 # ok 1859 # SKIP SVE set SVE get FPSIMD for VL 7424
3596 22:58:48.041672 # ok 1860 # SKIP SVE set FPSIMD get SVE for VL 7424
3597 22:58:48.041775 # ok 1861 Set SVE VL 7440
3598 22:58:48.041906 # ok 1862 # SKIP SVE set SVE get SVE for VL 7440
3599 22:58:48.042033 # ok 1863 # SKIP SVE set SVE get FPSIMD for VL 7440
3600 22:58:48.045727 # ok 1864 # SKIP SVE set FPSIMD get SVE for VL 7440
3601 22:58:48.045869 # ok 1865 Set SVE VL 7456
3602 22:58:48.045954 # ok 1866 # SKIP SVE set SVE get SVE for VL 7456
3603 22:58:48.046034 # ok 1867 # SKIP SVE set SVE get FPSIMD for VL 7456
3604 22:58:48.046114 # ok 1868 # SKIP SVE set FPSIMD get SVE for VL 7456
3605 22:58:48.046193 # ok 1869 Set SVE VL 7472
3606 22:58:48.046272 # ok 1870 # SKIP SVE set SVE get SVE for VL 7472
3607 22:58:48.046351 # ok 1871 # SKIP SVE set SVE get FPSIMD for VL 7472
3608 22:58:48.046430 # ok 1872 # SKIP SVE set FPSIMD get SVE for VL 7472
3609 22:58:48.046510 # ok 1873 Set SVE VL 7488
3610 22:58:48.046589 # ok 1874 # SKIP SVE set SVE get SVE for VL 7488
3611 22:58:48.046668 # ok 1875 # SKIP SVE set SVE get FPSIMD for VL 7488
3612 22:58:48.046748 # ok 1876 # SKIP SVE set FPSIMD get SVE for VL 7488
3613 22:58:48.046827 # ok 1877 Set SVE VL 7504
3614 22:58:48.046908 # ok 1878 # SKIP SVE set SVE get SVE for VL 7504
3615 22:58:48.046994 # ok 1879 # SKIP SVE set SVE get FPSIMD for VL 7504
3616 22:58:48.047074 # ok 1880 # SKIP SVE set FPSIMD get SVE for VL 7504
3617 22:58:48.047154 # ok 1881 Set SVE VL 7520
3618 22:58:48.047234 # ok 1882 # SKIP SVE set SVE get SVE for VL 7520
3619 22:58:48.047313 # ok 1883 # SKIP SVE set SVE get FPSIMD for VL 7520
3620 22:58:48.047394 # ok 1884 # SKIP SVE set FPSIMD get SVE for VL 7520
3621 22:58:48.047474 # ok 1885 Set SVE VL 7536
3622 22:58:48.047553 # ok 1886 # SKIP SVE set SVE get SVE for VL 7536
3623 22:58:48.047653 # ok 1887 # SKIP SVE set SVE get FPSIMD for VL 7536
3624 22:58:48.047737 # ok 1888 # SKIP SVE set FPSIMD get SVE for VL 7536
3625 22:58:48.047817 # ok 1889 Set SVE VL 7552
3626 22:58:48.047898 # ok 1890 # SKIP SVE set SVE get SVE for VL 7552
3627 22:58:48.048031 # ok 1891 # SKIP SVE set SVE get FPSIMD for VL 7552
3628 22:58:48.048122 # ok 1892 # SKIP SVE set FPSIMD get SVE for VL 7552
3629 22:58:48.048202 # ok 1893 Set SVE VL 7568
3630 22:58:48.048280 # ok 1894 # SKIP SVE set SVE get SVE for VL 7568
3631 22:58:48.048358 # ok 1895 # SKIP SVE set SVE get FPSIMD for VL 7568
3632 22:58:48.048438 # ok 1896 # SKIP SVE set FPSIMD get SVE for VL 7568
3633 22:58:48.048518 # ok 1897 Set SVE VL 7584
3634 22:58:48.048598 # ok 1898 # SKIP SVE set SVE get SVE for VL 7584
3635 22:58:48.048677 # ok 1899 # SKIP SVE set SVE get FPSIMD for VL 7584
3636 22:58:48.048756 # ok 1900 # SKIP SVE set FPSIMD get SVE for VL 7584
3637 22:58:48.048836 # ok 1901 Set SVE VL 7600
3638 22:58:48.048934 # ok 1902 # SKIP SVE set SVE get SVE for VL 7600
3639 22:58:48.049018 # ok 1903 # SKIP SVE set SVE get FPSIMD for VL 7600
3640 22:58:48.049098 # ok 1904 # SKIP SVE set FPSIMD get SVE for VL 7600
3641 22:58:48.049174 # ok 1905 Set SVE VL 7616
3642 22:58:48.049248 # ok 1906 # SKIP SVE set SVE get SVE for VL 7616
3643 22:58:48.049572 # ok 1907 # SKIP SVE set SVE get FPSIMD for VL 7616
3644 22:58:48.049675 # ok 1908 # SKIP SVE set FPSIMD get SVE for VL 7616
3645 22:58:48.049753 # ok 1909 Set SVE VL 7632
3646 22:58:48.049830 # ok 1910 # SKIP SVE set SVE get SVE for VL 7632
3647 22:58:48.049912 # ok 1911 # SKIP SVE set SVE get FPSIMD for VL 7632
3648 22:58:48.050000 # ok 1912 # SKIP SVE set FPSIMD get SVE for VL 7632
3649 22:58:48.050088 # ok 1913 Set SVE VL 7648
3650 22:58:48.050159 # ok 1914 # SKIP SVE set SVE get SVE for VL 7648
3651 22:58:48.050227 # ok 1915 # SKIP SVE set SVE get FPSIMD for VL 7648
3652 22:58:48.050305 # ok 1916 # SKIP SVE set FPSIMD get SVE for VL 7648
3653 22:58:48.050409 # ok 1917 Set SVE VL 7664
3654 22:58:48.050500 # ok 1918 # SKIP SVE set SVE get SVE for VL 7664
3655 22:58:48.050587 # ok 1919 # SKIP SVE set SVE get FPSIMD for VL 7664
3656 22:58:48.050676 # ok 1920 # SKIP SVE set FPSIMD get SVE for VL 7664
3657 22:58:48.050762 # ok 1921 Set SVE VL 7680
3658 22:58:48.050851 # ok 1922 # SKIP SVE set SVE get SVE for VL 7680
3659 22:58:48.050948 # ok 1923 # SKIP SVE set SVE get FPSIMD for VL 7680
3660 22:58:48.051063 # ok 1924 # SKIP SVE set FPSIMD get SVE for VL 7680
3661 22:58:48.051168 # ok 1925 Set SVE VL 7696
3662 22:58:48.051271 # ok 1926 # SKIP SVE set SVE get SVE for VL 7696
3663 22:58:48.051368 # ok 1927 # SKIP SVE set SVE get FPSIMD for VL 7696
3664 22:58:48.051476 # ok 1928 # SKIP SVE set FPSIMD get SVE for VL 7696
3665 22:58:48.051567 # ok 1929 Set SVE VL 7712
3666 22:58:48.051650 # ok 1930 # SKIP SVE set SVE get SVE for VL 7712
3667 22:58:48.051732 # ok 1931 # SKIP SVE set SVE get FPSIMD for VL 7712
3668 22:58:48.051834 # ok 1932 # SKIP SVE set FPSIMD get SVE for VL 7712
3669 22:58:48.051925 # ok 1933 Set SVE VL 7728
3670 22:58:48.052012 # ok 1934 # SKIP SVE set SVE get SVE for VL 7728
3671 22:58:48.052116 # ok 1935 # SKIP SVE set SVE get FPSIMD for VL 7728
3672 22:58:48.052202 # ok 1936 # SKIP SVE set FPSIMD get SVE for VL 7728
3673 22:58:48.052301 # ok 1937 Set SVE VL 7744
3674 22:58:48.052403 # ok 1938 # SKIP SVE set SVE get SVE for VL 7744
3675 22:58:48.052697 # ok 1939 # SKIP SVE set SVE get FPSIMD for VL 7744
3676 22:58:48.052794 # ok 1940 # SKIP SVE set FPSIMD get SVE for VL 7744
3677 22:58:48.052884 # ok 1941 Set SVE VL 7760
3678 22:58:48.052979 # ok 1942 # SKIP SVE set SVE get SVE for VL 7760
3679 22:58:48.053067 # ok 1943 # SKIP SVE set SVE get FPSIMD for VL 7760
3680 22:58:48.053172 # ok 1944 # SKIP SVE set FPSIMD get SVE for VL 7760
3681 22:58:48.053250 # ok 1945 Set SVE VL 7776
3682 22:58:48.053332 # ok 1946 # SKIP SVE set SVE get SVE for VL 7776
3683 22:58:48.053420 # ok 1947 # SKIP SVE set SVE get FPSIMD for VL 7776
3684 22:58:48.053508 # ok 1948 # SKIP SVE set FPSIMD get SVE for VL 7776
3685 22:58:48.053625 # ok 1949 Set SVE VL 7792
3686 22:58:48.053738 # ok 1950 # SKIP SVE set SVE get SVE for VL 7792
3687 22:58:48.053839 # ok 1951 # SKIP SVE set SVE get FPSIMD for VL 7792
3688 22:58:48.053969 # ok 1952 # SKIP SVE set FPSIMD get SVE for VL 7792
3689 22:58:48.054093 # ok 1953 Set SVE VL 7808
3690 22:58:48.054224 # ok 1954 # SKIP SVE set SVE get SVE for VL 7808
3691 22:58:48.054333 # ok 1955 # SKIP SVE set SVE get FPSIMD for VL 7808
3692 22:58:48.057998 # ok 1956 # SKIP SVE set FPSIMD get SVE for VL 7808
3693 22:58:48.058178 # ok 1957 Set SVE VL 7824
3694 22:58:48.058255 # ok 1958 # SKIP SVE set SVE get SVE for VL 7824
3695 22:58:48.058368 # ok 1959 # SKIP SVE set SVE get FPSIMD for VL 7824
3696 22:58:48.058459 # ok 1960 # SKIP SVE set FPSIMD get SVE for VL 7824
3697 22:58:48.058546 # ok 1961 Set SVE VL 7840
3698 22:58:48.058631 # ok 1962 # SKIP SVE set SVE get SVE for VL 7840
3699 22:58:48.059267 # ok 1963 # SKIP SVE set SVE get FPSIMD for VL 7840
3700 22:58:48.059552 # ok 1964 # SKIP SVE set FPSIMD get SVE for VL 7840
3701 22:58:48.059638 # ok 1965 Set SVE VL 7856
3702 22:58:48.059731 # ok 1966 # SKIP SVE set SVE get SVE for VL 7856
3703 22:58:48.059825 # ok 1967 # SKIP SVE set SVE get FPSIMD for VL 7856
3704 22:58:48.059919 # ok 1968 # SKIP SVE set FPSIMD get SVE for VL 7856
3705 22:58:48.060034 # ok 1969 Set SVE VL 7872
3706 22:58:48.060126 # ok 1970 # SKIP SVE set SVE get SVE for VL 7872
3707 22:58:48.060218 # ok 1971 # SKIP SVE set SVE get FPSIMD for VL 7872
3708 22:58:48.060484 # ok 1972 # SKIP SVE set FPSIMD get SVE for VL 7872
3709 22:58:48.060568 # ok 1973 Set SVE VL 7888
3710 22:58:48.060687 # ok 1974 # SKIP SVE set SVE get SVE for VL 7888
3711 22:58:48.060782 # ok 1975 # SKIP SVE set SVE get FPSIMD for VL 7888
3712 22:58:48.060882 # ok 1976 # SKIP SVE set FPSIMD get SVE for VL 7888
3713 22:58:48.060982 # ok 1977 Set SVE VL 7904
3714 22:58:48.061287 # ok 1978 # SKIP SVE set SVE get SVE for VL 7904
3715 22:58:48.061798 # ok 1979 # SKIP SVE set SVE get FPSIMD for VL 7904
3716 22:58:48.061942 # ok 1980 # SKIP SVE set FPSIMD get SVE for VL 7904
3717 22:58:48.062085 # ok 1981 Set SVE VL 7920
3718 22:58:48.062212 # ok 1982 # SKIP SVE set SVE get SVE for VL 7920
3719 22:58:48.062378 # ok 1983 # SKIP SVE set SVE get FPSIMD for VL 7920
3720 22:58:48.062732 # ok 1984 # SKIP SVE set FPSIMD get SVE for VL 7920
3721 22:58:48.062873 # ok 1985 Set SVE VL 7936
3722 22:58:48.063000 # ok 1986 # SKIP SVE set SVE get SVE for VL 7936
3723 22:58:48.063151 # ok 1987 # SKIP SVE set SVE get FPSIMD for VL 7936
3724 22:58:48.063279 # ok 1988 # SKIP SVE set FPSIMD get SVE for VL 7936
3725 22:58:48.063416 # ok 1989 Set SVE VL 7952
3726 22:58:48.063576 # ok 1990 # SKIP SVE set SVE get SVE for VL 7952
3727 22:58:48.063726 # ok 1991 # SKIP SVE set SVE get FPSIMD for VL 7952
3728 22:58:48.063866 # ok 1992 # SKIP SVE set FPSIMD get SVE for VL 7952
3729 22:58:48.064017 # ok 1993 Set SVE VL 7968
3730 22:58:48.064156 # ok 1994 # SKIP SVE set SVE get SVE for VL 7968
3731 22:58:48.064309 # ok 1995 # SKIP SVE set SVE get FPSIMD for VL 7968
3732 22:58:48.064446 # ok 1996 # SKIP SVE set FPSIMD get SVE for VL 7968
3733 22:58:48.064607 # ok 1997 Set SVE VL 7984
3734 22:58:48.064771 # ok 1998 # SKIP SVE set SVE get SVE for VL 7984
3735 22:58:48.064898 # ok 1999 # SKIP SVE set SVE get FPSIMD for VL 7984
3736 22:58:48.065036 # ok 2000 # SKIP SVE set FPSIMD get SVE for VL 7984
3737 22:58:48.065185 # ok 2001 Set SVE VL 8000
3738 22:58:48.065385 # ok 2002 # SKIP SVE set SVE get SVE for VL 8000
3739 22:58:48.065541 # ok 2003 # SKIP SVE set SVE get FPSIMD for VL 8000
3740 22:58:48.065700 # ok 2004 # SKIP SVE set FPSIMD get SVE for VL 8000
3741 22:58:48.065840 # ok 2005 Set SVE VL 8016
3742 22:58:48.066025 # ok 2006 # SKIP SVE set SVE get SVE for VL 8016
3743 22:58:48.066166 # ok 2007 # SKIP SVE set SVE get FPSIMD for VL 8016
3744 22:58:48.066315 # ok 2008 # SKIP SVE set FPSIMD get SVE for VL 8016
3745 22:58:48.066453 # ok 2009 Set SVE VL 8032
3746 22:58:48.066579 # ok 2010 # SKIP SVE set SVE get SVE for VL 8032
3747 22:58:48.066694 # ok 2011 # SKIP SVE set SVE get FPSIMD for VL 8032
3748 22:58:48.066835 # ok 2012 # SKIP SVE set FPSIMD get SVE for VL 8032
3749 22:58:48.066975 # ok 2013 Set SVE VL 8048
3750 22:58:48.067099 # ok 2014 # SKIP SVE set SVE get SVE for VL 8048
3751 22:58:48.067236 # ok 2015 # SKIP SVE set SVE get FPSIMD for VL 8048
3752 22:58:48.067374 # ok 2016 # SKIP SVE set FPSIMD get SVE for VL 8048
3753 22:58:48.067537 # ok 2017 Set SVE VL 8064
3754 22:58:48.067677 # ok 2018 # SKIP SVE set SVE get SVE for VL 8064
3755 22:58:48.067825 # ok 2019 # SKIP SVE set SVE get FPSIMD for VL 8064
3756 22:58:48.067949 # ok 2020 # SKIP SVE set FPSIMD get SVE for VL 8064
3757 22:58:48.068101 # ok 2021 Set SVE VL 8080
3758 22:58:48.068226 # ok 2022 # SKIP SVE set SVE get SVE for VL 8080
3759 22:58:48.068389 # ok 2023 # SKIP SVE set SVE get FPSIMD for VL 8080
3760 22:58:48.068531 # ok 2024 # SKIP SVE set FPSIMD get SVE for VL 8080
3761 22:58:48.068670 # ok 2025 Set SVE VL 8096
3762 22:58:48.068793 # ok 2026 # SKIP SVE set SVE get SVE for VL 8096
3763 22:58:48.069259 # ok 2027 # SKIP SVE set SVE get FPSIMD for VL 8096
3764 22:58:48.069449 # ok 2028 # SKIP SVE set FPSIMD get SVE for VL 8096
3765 22:58:48.069606 # ok 2029 Set SVE VL 8112
3766 22:58:48.069767 # ok 2030 # SKIP SVE set SVE get SVE for VL 8112
3767 22:58:48.069901 # ok 2031 # SKIP SVE set SVE get FPSIMD for VL 8112
3768 22:58:48.070039 # ok 2032 # SKIP SVE set FPSIMD get SVE for VL 8112
3769 22:58:48.070172 # ok 2033 Set SVE VL 8128
3770 22:58:48.070313 # ok 2034 # SKIP SVE set SVE get SVE for VL 8128
3771 22:58:48.070450 # ok 2035 # SKIP SVE set SVE get FPSIMD for VL 8128
3772 22:58:48.070604 # ok 2036 # SKIP SVE set FPSIMD get SVE for VL 8128
3773 22:58:48.070730 # ok 2037 Set SVE VL 8144
3774 22:58:48.070835 # ok 2038 # SKIP SVE set SVE get SVE for VL 8144
3775 22:58:48.070975 # ok 2039 # SKIP SVE set SVE get FPSIMD for VL 8144
3776 22:58:48.071113 # ok 2040 # SKIP SVE set FPSIMD get SVE for VL 8144
3777 22:58:48.071250 # ok 2041 Set SVE VL 8160
3778 22:58:48.071433 # ok 2042 # SKIP SVE set SVE get SVE for VL 8160
3779 22:58:48.071561 # ok 2043 # SKIP SVE set SVE get FPSIMD for VL 8160
3780 22:58:48.071714 # ok 2044 # SKIP SVE set FPSIMD get SVE for VL 8160
3781 22:58:48.071852 # ok 2045 Set SVE VL 8176
3782 22:58:48.071982 # ok 2046 # SKIP SVE set SVE get SVE for VL 8176
3783 22:58:48.072134 # ok 2047 # SKIP SVE set SVE get FPSIMD for VL 8176
3784 22:58:48.072270 # ok 2048 # SKIP SVE set FPSIMD get SVE for VL 8176
3785 22:58:48.072407 # ok 2049 Set SVE VL 8192
3786 22:58:48.072560 # ok 2050 # SKIP SVE set SVE get SVE for VL 8192
3787 22:58:48.072719 # ok 2051 # SKIP SVE set SVE get FPSIMD for VL 8192
3788 22:58:48.072845 # ok 2052 # SKIP SVE set FPSIMD get SVE for VL 8192
3789 22:58:48.073438 # ok 2053 Streaming SVE FPSIMD set via SVE: 0
3790 22:58:48.073574 # ok 2054 Streaming SVE get_fpsimd() gave same state
3791 22:58:48.074030 # ok 2055 Streaming SVE SVE_PT_VL_INHERIT set
3792 22:58:48.074199 # ok 2056 Streaming SVE SVE_PT_VL_INHERIT cleared
3793 22:58:48.074384 # ok 2057 Set Streaming SVE VL 16
3794 22:58:48.074547 # ok 2058 Set and get Streaming SVE data for VL 16
3795 22:58:48.074724 # ok 2059 Set and get FPSIMD data for Streaming SVE VL 16
3796 22:58:48.075253 # ok 2060 Set FPSIMD, read via SVE for Streaming SVE VL 16
3797 22:58:48.075633 # ok 2061 Set Streaming SVE VL 32
3798 22:58:48.076203 # ok 2062 Set and get Streaming SVE data for VL 32
3799 22:58:48.076454 # ok 2063 Set and get FPSIMD data for Streaming SVE VL 32
3800 22:58:48.076603 # ok 2064 Set FPSIMD, read via SVE for Streaming SVE VL 32
3801 22:58:48.076740 # ok 2065 Set Streaming SVE VL 48
3802 22:58:48.076877 # ok 2066 # SKIP Streaming SVE set SVE get SVE for VL 48
3803 22:58:48.077064 # ok 2067 # SKIP Streaming SVE set SVE get FPSIMD for VL 48
3804 22:58:48.077213 # ok 2068 # SKIP Streaming SVE set FPSIMD get SVE for VL 48
3805 22:58:48.077378 # ok 2069 Set Streaming SVE VL 64
3806 22:58:48.077502 # ok 2070 Set and get Streaming SVE data for VL 64
3807 22:58:48.077677 # ok 2071 Set and get FPSIMD data for Streaming SVE VL 64
3808 22:58:48.077804 # ok 2072 Set FPSIMD, read via SVE for Streaming SVE VL 64
3809 22:58:48.077943 # ok 2073 Set Streaming SVE VL 80
3810 22:58:48.078105 # ok 2074 # SKIP Streaming SVE set SVE get SVE for VL 80
3811 22:58:48.078231 # ok 2075 # SKIP Streaming SVE set SVE get FPSIMD for VL 80
3812 22:58:48.078391 # ok 2076 # SKIP Streaming SVE set FPSIMD get SVE for VL 80
3813 22:58:48.078528 # ok 2077 Set Streaming SVE VL 96
3814 22:58:48.078666 # ok 2078 # SKIP Streaming SVE set SVE get SVE for VL 96
3815 22:58:48.078804 # ok 2079 # SKIP Streaming SVE set SVE get FPSIMD for VL 96
3816 22:58:48.078941 # ok 2080 # SKIP Streaming SVE set FPSIMD get SVE for VL 96
3817 22:58:48.079073 # ok 2081 Set Streaming SVE VL 112
3818 22:58:48.079236 # ok 2082 # SKIP Streaming SVE set SVE get SVE for VL 112
3819 22:58:48.079376 # ok 2083 # SKIP Streaming SVE set SVE get FPSIMD for VL 112
3820 22:58:48.079517 # ok 2084 # SKIP Streaming SVE set FPSIMD get SVE for VL 112
3821 22:58:48.079698 # ok 2085 Set Streaming SVE VL 128
3822 22:58:48.079824 # ok 2086 Set and get Streaming SVE data for VL 128
3823 22:58:48.079976 # ok 2087 Set and get FPSIMD data for Streaming SVE VL 128
3824 22:58:48.080117 # ok 2088 Set FPSIMD, read via SVE for Streaming SVE VL 128
3825 22:58:48.080253 # ok 2089 Set Streaming SVE VL 144
3826 22:58:48.080391 # ok 2090 # SKIP Streaming SVE set SVE get SVE for VL 144
3827 22:58:48.080529 # ok 2091 # SKIP Streaming SVE set SVE get FPSIMD for VL 144
3828 22:58:48.080853 # ok 2092 # SKIP Streaming SVE set FPSIMD get SVE for VL 144
3829 22:58:48.081018 # ok 2093 Set Streaming SVE VL 160
3830 22:58:48.081156 # ok 2094 # SKIP Streaming SVE set SVE get SVE for VL 160
3831 22:58:48.081281 # ok 2095 # SKIP Streaming SVE set SVE get FPSIMD for VL 160
3832 22:58:48.081427 # ok 2096 # SKIP Streaming SVE set FPSIMD get SVE for VL 160
3833 22:58:48.081563 # ok 2097 Set Streaming SVE VL 176
3834 22:58:48.081703 # ok 2098 # SKIP Streaming SVE set SVE get SVE for VL 176
3835 22:58:48.081839 # ok 2099 # SKIP Streaming SVE set SVE get FPSIMD for VL 176
3836 22:58:48.081979 # ok 2100 # SKIP Streaming SVE set FPSIMD get SVE for VL 176
3837 22:58:48.082141 # ok 2101 Set Streaming SVE VL 192
3838 22:58:48.082288 # ok 2102 # SKIP Streaming SVE set SVE get SVE for VL 192
3839 22:58:48.082423 # ok 2103 # SKIP Streaming SVE set SVE get FPSIMD for VL 192
3840 22:58:48.082546 # ok 2104 # SKIP Streaming SVE set FPSIMD get SVE for VL 192
3841 22:58:48.082683 # ok 2105 Set Streaming SVE VL 208
3842 22:58:48.082859 # ok 2106 # SKIP Streaming SVE set SVE get SVE for VL 208
3843 22:58:48.083000 # ok 2107 # SKIP Streaming SVE set SVE get FPSIMD for VL 208
3844 22:58:48.083139 # ok 2108 # SKIP Streaming SVE set FPSIMD get SVE for VL 208
3845 22:58:48.083265 # ok 2109 Set Streaming SVE VL 224
3846 22:58:48.083402 # ok 2110 # SKIP Streaming SVE set SVE get SVE for VL 224
3847 22:58:48.083541 # ok 2111 # SKIP Streaming SVE set SVE get FPSIMD for VL 224
3848 22:58:48.083667 # ok 2112 # SKIP Streaming SVE set FPSIMD get SVE for VL 224
3849 22:58:48.083834 # ok 2113 Set Streaming SVE VL 240
3850 22:58:48.083997 # ok 2114 # SKIP Streaming SVE set SVE get SVE for VL 240
3851 22:58:48.084148 # ok 2115 # SKIP Streaming SVE set SVE get FPSIMD for VL 240
3852 22:58:48.084289 # ok 2116 # SKIP Streaming SVE set FPSIMD get SVE for VL 240
3853 22:58:48.084444 # ok 2117 Set Streaming SVE VL 256
3854 22:58:48.084586 # ok 2118 Set and get Streaming SVE data for VL 256
3855 22:58:48.084769 # ok 2119 Set and get FPSIMD data for Streaming SVE VL 256
3856 22:58:48.084924 # ok 2120 Set FPSIMD, read via SVE for Streaming SVE VL 256
3857 22:58:48.085080 # ok 2121 Set Streaming SVE VL 272
3858 22:58:48.085392 # ok 2122 # SKIP Streaming SVE set SVE get SVE for VL 272
3859 22:58:48.085749 # ok 2123 # SKIP Streaming SVE set SVE get FPSIMD for VL 272
3860 22:58:48.085921 # ok 2124 # SKIP Streaming SVE set FPSIMD get SVE for VL 272
3861 22:58:48.086101 # ok 2125 Set Streaming SVE VL 288
3862 22:58:48.091698 # ok 2126 # SKIP Streaming SVE set SVE get SVE for VL 288
3863 22:58:48.091969 # ok 2127 # SKIP Streaming SVE set SVE get FPSIMD for VL 288
3864 22:58:48.092063 # ok 2128 # SKIP Streaming SVE set FPSIMD get SVE for VL 288
3865 22:58:48.092149 # ok 2129 Set Streaming SVE VL 304
3866 22:58:48.092249 # ok 2130 # SKIP Streaming SVE set SVE get SVE for VL 304
3867 22:58:48.092335 # ok 2131 # SKIP Streaming SVE set SVE get FPSIMD for VL 304
3868 22:58:48.092432 # ok 2132 # SKIP Streaming SVE set FPSIMD get SVE for VL 304
3869 22:58:48.092532 # ok 2133 Set Streaming SVE VL 320
3870 22:58:48.092631 # ok 2134 # SKIP Streaming SVE set SVE get SVE for VL 320
3871 22:58:48.092921 # ok 2135 # SKIP Streaming SVE set SVE get FPSIMD for VL 320
3872 22:58:48.093012 # ok 2136 # SKIP Streaming SVE set FPSIMD get SVE for VL 320
3873 22:58:48.093109 # ok 2137 Set Streaming SVE VL 336
3874 22:58:48.093207 # ok 2138 # SKIP Streaming SVE set SVE get SVE for VL 336
3875 22:58:48.093554 # ok 2139 # SKIP Streaming SVE set SVE get FPSIMD for VL 336
3876 22:58:48.093868 # ok 2140 # SKIP Streaming SVE set FPSIMD get SVE for VL 336
3877 22:58:48.094071 # ok 2141 Set Streaming SVE VL 352
3878 22:58:48.094303 # ok 2142 # SKIP Streaming SVE set SVE get SVE for VL 352
3879 22:58:48.094407 # ok 2143 # SKIP Streaming SVE set SVE get FPSIMD for VL 352
3880 22:58:48.094573 # ok 2144 # SKIP Streaming SVE set FPSIMD get SVE for VL 352
3881 22:58:48.094658 # ok 2145 Set Streaming SVE VL 368
3882 22:58:48.094740 # ok 2146 # SKIP Streaming SVE set SVE get SVE for VL 368
3883 22:58:48.094949 # ok 2147 # SKIP Streaming SVE set SVE get FPSIMD for VL 368
3884 22:58:48.095138 # ok 2148 # SKIP Streaming SVE set FPSIMD get SVE for VL 368
3885 22:58:48.095231 # ok 2149 Set Streaming SVE VL 384
3886 22:58:48.095329 # ok 2150 # SKIP Streaming SVE set SVE get SVE for VL 384
3887 22:58:48.095746 # ok 2151 # SKIP Streaming SVE set SVE get FPSIMD for VL 384
3888 22:58:48.095884 # ok 2152 # SKIP Streaming SVE set FPSIMD get SVE for VL 384
3889 22:58:48.096073 # ok 2153 Set Streaming SVE VL 400
3890 22:58:48.096236 # ok 2154 # SKIP Streaming SVE set SVE get SVE for VL 400
3891 22:58:48.096522 # ok 2155 # SKIP Streaming SVE set SVE get FPSIMD for VL 400
3892 22:58:48.096611 # ok 2156 # SKIP Streaming SVE set FPSIMD get SVE for VL 400
3893 22:58:48.096771 # ok 2157 Set Streaming SVE VL 416
3894 22:58:48.096968 # ok 2158 # SKIP Streaming SVE set SVE get SVE for VL 416
3895 22:58:48.097245 # ok 2159 # SKIP Streaming SVE set SVE get FPSIMD for VL 416
3896 22:58:48.097378 # ok 2160 # SKIP Streaming SVE set FPSIMD get SVE for VL 416
3897 22:58:48.097571 # ok 2161 Set Streaming SVE VL 432
3898 22:58:48.097800 # ok 2162 # SKIP Streaming SVE set SVE get SVE for VL 432
3899 22:58:48.098130 # ok 2163 # SKIP Streaming SVE set SVE get FPSIMD for VL 432
3900 22:58:48.098358 # ok 2164 # SKIP Streaming SVE set FPSIMD get SVE for VL 432
3901 22:58:48.098492 # ok 2165 Set Streaming SVE VL 448
3902 22:58:48.098587 # ok 2166 # SKIP Streaming SVE set SVE get SVE for VL 448
3903 22:58:48.098670 # ok 2167 # SKIP Streaming SVE set SVE get FPSIMD for VL 448
3904 22:58:48.098843 # ok 2168 # SKIP Streaming SVE set FPSIMD get SVE for VL 448
3905 22:58:48.099058 # ok 2169 Set Streaming SVE VL 464
3906 22:58:48.099241 # ok 2170 # SKIP Streaming SVE set SVE get SVE for VL 464
3907 22:58:48.099399 # ok 2171 # SKIP Streaming SVE set SVE get FPSIMD for VL 464
3908 22:58:48.099653 # ok 2172 # SKIP Streaming SVE set FPSIMD get SVE for VL 464
3909 22:58:48.099860 # ok 2173 Set Streaming SVE VL 480
3910 22:58:48.099951 # ok 2174 # SKIP Streaming SVE set SVE get SVE for VL 480
3911 22:58:48.100073 # ok 2175 # SKIP Streaming SVE set SVE get FPSIMD for VL 480
3912 22:58:48.100158 # ok 2176 # SKIP Streaming SVE set FPSIMD get SVE for VL 480
3913 22:58:48.100240 # ok 2177 Set Streaming SVE VL 496
3914 22:58:48.100322 # ok 2178 # SKIP Streaming SVE set SVE get SVE for VL 496
3915 22:58:48.100517 # ok 2179 # SKIP Streaming SVE set SVE get FPSIMD for VL 496
3916 22:58:48.100717 # ok 2180 # SKIP Streaming SVE set FPSIMD get SVE for VL 496
3917 22:58:48.100820 # ok 2181 Set Streaming SVE VL 512
3918 22:58:48.100903 # ok 2182 # SKIP Streaming SVE set SVE get SVE for VL 512
3919 22:58:48.101001 # ok 2183 # SKIP Streaming SVE set SVE get FPSIMD for VL 512
3920 22:58:48.101099 # ok 2184 # SKIP Streaming SVE set FPSIMD get SVE for VL 512
3921 22:58:48.101182 # ok 2185 Set Streaming SVE VL 528
3922 22:58:48.101283 # ok 2186 # SKIP Streaming SVE set SVE get SVE for VL 528
3923 22:58:48.101638 # ok 2187 # SKIP Streaming SVE set SVE get FPSIMD for VL 528
3924 22:58:48.101745 # ok 2188 # SKIP Streaming SVE set FPSIMD get SVE for VL 528
3925 22:58:48.101830 # ok 2189 Set Streaming SVE VL 544
3926 22:58:48.101913 # ok 2190 # SKIP Streaming SVE set SVE get SVE for VL 544
3927 22:58:48.102116 # ok 2191 # SKIP Streaming SVE set SVE get FPSIMD for VL 544
3928 22:58:48.102299 # ok 2192 # SKIP Streaming SVE set FPSIMD get SVE for VL 544
3929 22:58:48.102439 # ok 2193 Set Streaming SVE VL 560
3930 22:58:48.102539 # ok 2194 # SKIP Streaming SVE set SVE get SVE for VL 560
3931 22:58:48.102624 # ok 2195 # SKIP Streaming SVE set SVE get FPSIMD for VL 560
3932 22:58:48.102920 # ok 2196 # SKIP Streaming SVE set FPSIMD get SVE for VL 560
3933 22:58:48.103013 # ok 2197 Set Streaming SVE VL 576
3934 22:58:48.103119 # ok 2198 # SKIP Streaming SVE set SVE get SVE for VL 576
3935 22:58:48.103219 # ok 2199 # SKIP Streaming SVE set SVE get FPSIMD for VL 576
3936 22:58:48.103496 # ok 2200 # SKIP Streaming SVE set FPSIMD get SVE for VL 576
3937 22:58:48.103585 # ok 2201 Set Streaming SVE VL 592
3938 22:58:48.103841 # ok 2202 # SKIP Streaming SVE set SVE get SVE for VL 592
3939 22:58:48.104045 # ok 2203 # SKIP Streaming SVE set SVE get FPSIMD for VL 592
3940 22:58:48.104194 # ok 2204 # SKIP Streaming SVE set FPSIMD get SVE for VL 592
3941 22:58:48.104296 # ok 2205 Set Streaming SVE VL 608
3942 22:58:48.105777 # ok 2206 # SKIP Streaming SVE set SVE get SVE for VL 608
3943 22:58:48.105996 # ok 2207 # SKIP Streaming SVE set SVE get FPSIMD for VL 608
3944 22:58:48.106235 # ok 2208 # SKIP Streaming SVE set FPSIMD get SVE for VL 608
3945 22:58:48.106416 # ok 2209 Set Streaming SVE VL 624
3946 22:58:48.106501 # ok 2210 # SKIP Streaming SVE set SVE get SVE for VL 624
3947 22:58:48.106584 # ok 2211 # SKIP Streaming SVE set SVE get FPSIMD for VL 624
3948 22:58:48.106737 # ok 2212 # SKIP Streaming SVE set FPSIMD get SVE for VL 624
3949 22:58:48.106823 # ok 2213 Set Streaming SVE VL 640
3950 22:58:48.106906 # ok 2214 # SKIP Streaming SVE set SVE get SVE for VL 640
3951 22:58:48.106992 # ok 2215 # SKIP Streaming SVE set SVE get FPSIMD for VL 640
3952 22:58:48.107164 # ok 2216 # SKIP Streaming SVE set FPSIMD get SVE for VL 640
3953 22:58:48.107509 # ok 2217 Set Streaming SVE VL 656
3954 22:58:48.107710 # ok 2218 # SKIP Streaming SVE set SVE get SVE for VL 656
3955 22:58:48.107880 # ok 2219 # SKIP Streaming SVE set SVE get FPSIMD for VL 656
3956 22:58:48.108020 # ok 2220 # SKIP Streaming SVE set FPSIMD get SVE for VL 656
3957 22:58:48.108189 # ok 2221 Set Streaming SVE VL 672
3958 22:58:48.108274 # ok 2222 # SKIP Streaming SVE set SVE get SVE for VL 672
3959 22:58:48.108389 # ok 2223 # SKIP Streaming SVE set SVE get FPSIMD for VL 672
3960 22:58:48.108614 # ok 2224 # SKIP Streaming SVE set FPSIMD get SVE for VL 672
3961 22:58:48.108912 # ok 2225 Set Streaming SVE VL 688
3962 22:58:48.109128 # ok 2226 # SKIP Streaming SVE set SVE get SVE for VL 688
3963 22:58:48.109431 # ok 2227 # SKIP Streaming SVE set SVE get FPSIMD for VL 688
3964 22:58:48.109519 # ok 2228 # SKIP Streaming SVE set FPSIMD get SVE for VL 688
3965 22:58:48.109600 # ok 2229 Set Streaming SVE VL 704
3966 22:58:48.109695 # ok 2230 # SKIP Streaming SVE set SVE get SVE for VL 704
3967 22:58:48.109779 # ok 2231 # SKIP Streaming SVE set SVE get FPSIMD for VL 704
3968 22:58:48.109862 # ok 2232 # SKIP Streaming SVE set FPSIMD get SVE for VL 704
3969 22:58:48.109944 # ok 2233 Set Streaming SVE VL 720
3970 22:58:48.110027 # ok 2234 # SKIP Streaming SVE set SVE get SVE for VL 720
3971 22:58:48.110116 # ok 2235 # SKIP Streaming SVE set SVE get FPSIMD for VL 720
3972 22:58:48.110198 # ok 2236 # SKIP Streaming SVE set FPSIMD get SVE for VL 720
3973 22:58:48.110303 # ok 2237 Set Streaming SVE VL 736
3974 22:58:48.110389 # ok 2238 # SKIP Streaming SVE set SVE get SVE for VL 736
3975 22:58:48.110475 # ok 2239 # SKIP Streaming SVE set SVE get FPSIMD for VL 736
3976 22:58:48.110558 # ok 2240 # SKIP Streaming SVE set FPSIMD get SVE for VL 736
3977 22:58:48.110640 # ok 2241 Set Streaming SVE VL 752
3978 22:58:48.110738 # ok 2242 # SKIP Streaming SVE set SVE get SVE for VL 752
3979 22:58:48.111358 # ok 2243 # SKIP Streaming SVE set SVE get FPSIMD for VL 752
3980 22:58:48.111868 # ok 2244 # SKIP Streaming SVE set FPSIMD get SVE for VL 752
3981 22:58:48.112020 # ok 2245 Set Streaming SVE VL 768
3982 22:58:48.112161 # ok 2246 # SKIP Streaming SVE set SVE get SVE for VL 768
3983 22:58:48.112319 # ok 2247 # SKIP Streaming SVE set SVE get FPSIMD for VL 768
3984 22:58:48.112460 # ok 2248 # SKIP Streaming SVE set FPSIMD get SVE for VL 768
3985 22:58:48.112618 # ok 2249 Set Streaming SVE VL 784
3986 22:58:48.112774 # ok 2250 # SKIP Streaming SVE set SVE get SVE for VL 784
3987 22:58:48.113632 # ok 2251 # SKIP Streaming SVE set SVE get FPSIMD for VL 784
3988 22:58:48.114496 # ok 2252 # SKIP Streaming SVE set FPSIMD get SVE for VL 784
3989 22:58:48.114618 # ok 2253 Set Streaming SVE VL 800
3990 22:58:48.114922 # ok 2254 # SKIP Streaming SVE set SVE get SVE for VL 800
3991 22:58:48.115166 # ok 2255 # SKIP Streaming SVE set SVE get FPSIMD for VL 800
3992 22:58:48.115349 # ok 2256 # SKIP Streaming SVE set FPSIMD get SVE for VL 800
3993 22:58:48.115537 # ok 2257 Set Streaming SVE VL 816
3994 22:58:48.115675 # ok 2258 # SKIP Streaming SVE set SVE get SVE for VL 816
3995 22:58:48.115945 # ok 2259 # SKIP Streaming SVE set SVE get FPSIMD for VL 816
3996 22:58:48.116100 # ok 2260 # SKIP Streaming SVE set FPSIMD get SVE for VL 816
3997 22:58:48.116261 # ok 2261 Set Streaming SVE VL 832
3998 22:58:48.116597 # ok 2262 # SKIP Streaming SVE set SVE get SVE for VL 832
3999 22:58:48.116758 # ok 2263 # SKIP Streaming SVE set SVE get FPSIMD for VL 832
4000 22:58:48.116898 # ok 2264 # SKIP Streaming SVE set FPSIMD get SVE for VL 832
4001 22:58:48.117076 # ok 2265 Set Streaming SVE VL 848
4002 22:58:48.117202 # ok 2266 # SKIP Streaming SVE set SVE get SVE for VL 848
4003 22:58:48.117352 # ok 2267 # SKIP Streaming SVE set SVE get FPSIMD for VL 848
4004 22:58:48.117478 # ok 2268 # SKIP Streaming SVE set FPSIMD get SVE for VL 848
4005 22:58:48.117575 # ok 2269 Set Streaming SVE VL 864
4006 22:58:48.117672 # ok 2270 # SKIP Streaming SVE set SVE get SVE for VL 864
4007 22:58:48.117775 # ok 2271 # SKIP Streaming SVE set SVE get FPSIMD for VL 864
4008 22:58:48.117864 # ok 2272 # SKIP Streaming SVE set FPSIMD get SVE for VL 864
4009 22:58:48.117962 # ok 2273 Set Streaming SVE VL 880
4010 22:58:48.118048 # ok 2274 # SKIP Streaming SVE set SVE get SVE for VL 880
4011 22:58:48.118146 # ok 2275 # SKIP Streaming SVE set SVE get FPSIMD for VL 880
4012 22:58:48.118245 # ok 2276 # SKIP Streaming SVE set FPSIMD get SVE for VL 880
4013 22:58:48.118342 # ok 2277 Set Streaming SVE VL 896
4014 22:58:48.118817 # ok 2278 # SKIP Streaming SVE set SVE get SVE for VL 896
4015 22:58:48.122422 # ok 2279 # SKIP Streaming SVE set SVE get FPSIMD for VL 896
4016 22:58:48.122707 # ok 2280 # SKIP Streaming SVE set FPSIMD get SVE for VL 896
4017 22:58:48.122823 # ok 2281 Set Streaming SVE VL 912
4018 22:58:48.123350 # ok 2282 # SKIP Streaming SVE set SVE get SVE for VL 912
4019 22:58:48.123695 # ok 2283 # SKIP Streaming SVE set SVE get FPSIMD for VL 912
4020 22:58:48.123861 # ok 2284 # SKIP Streaming SVE set FPSIMD get SVE for VL 912
4021 22:58:48.124001 # ok 2285 Set Streaming SVE VL 928
4022 22:58:48.124238 # ok 2286 # SKIP Streaming SVE set SVE get SVE for VL 928
4023 22:58:48.124418 # ok 2287 # SKIP Streaming SVE set SVE get FPSIMD for VL 928
4024 22:58:48.124682 # ok 2288 # SKIP Streaming SVE set FPSIMD get SVE for VL 928
4025 22:58:48.125047 # ok 2289 Set Streaming SVE VL 944
4026 22:58:48.125344 # ok 2290 # SKIP Streaming SVE set SVE get SVE for VL 944
4027 22:58:48.125755 # ok 2291 # SKIP Streaming SVE set SVE get FPSIMD for VL 944
4028 22:58:48.125879 # ok 2292 # SKIP Streaming SVE set FPSIMD get SVE for VL 944
4029 22:58:48.126033 # ok 2293 Set Streaming SVE VL 960
4030 22:58:48.126172 # ok 2294 # SKIP Streaming SVE set SVE get SVE for VL 960
4031 22:58:48.126305 # ok 2295 # SKIP Streaming SVE set SVE get FPSIMD for VL 960
4032 22:58:48.126444 # ok 2296 # SKIP Streaming SVE set FPSIMD get SVE for VL 960
4033 22:58:48.126569 # ok 2297 Set Streaming SVE VL 976
4034 22:58:48.126662 # ok 2298 # SKIP Streaming SVE set SVE get SVE for VL 976
4035 22:58:48.126819 # ok 2299 # SKIP Streaming SVE set SVE get FPSIMD for VL 976
4036 22:58:48.126956 # ok 2300 # SKIP Streaming SVE set FPSIMD get SVE for VL 976
4037 22:58:48.127077 # ok 2301 Set Streaming SVE VL 992
4038 22:58:48.127212 # ok 2302 # SKIP Streaming SVE set SVE get SVE for VL 992
4039 22:58:48.127345 # ok 2303 # SKIP Streaming SVE set SVE get FPSIMD for VL 992
4040 22:58:48.127515 # ok 2304 # SKIP Streaming SVE set FPSIMD get SVE for VL 992
4041 22:58:48.127652 # ok 2305 Set Streaming SVE VL 1008
4042 22:58:48.127786 # ok 2306 # SKIP Streaming SVE set SVE get SVE for VL 1008
4043 22:58:48.127925 # ok 2307 # SKIP Streaming SVE set SVE get FPSIMD for VL 1008
4044 22:58:48.128087 # ok 2308 # SKIP Streaming SVE set FPSIMD get SVE for VL 1008
4045 22:58:48.128238 # ok 2309 Set Streaming SVE VL 1024
4046 22:58:48.128363 # ok 2310 # SKIP Streaming SVE set SVE get SVE for VL 1024
4047 22:58:48.128497 # ok 2311 # SKIP Streaming SVE set SVE get FPSIMD for VL 1024
4048 22:58:48.128656 # ok 2312 # SKIP Streaming SVE set FPSIMD get SVE for VL 1024
4049 22:58:48.128794 # ok 2313 Set Streaming SVE VL 1040
4050 22:58:48.128929 # ok 2314 # SKIP Streaming SVE set SVE get SVE for VL 1040
4051 22:58:48.129083 # ok 2315 # SKIP Streaming SVE set SVE get FPSIMD for VL 1040
4052 22:58:48.129255 # ok 2316 # SKIP Streaming SVE set FPSIMD get SVE for VL 1040
4053 22:58:48.129390 # ok 2317 Set Streaming SVE VL 1056
4054 22:58:48.129859 # ok 2318 # SKIP Streaming SVE set SVE get SVE for VL 1056
4055 22:58:48.129990 # ok 2319 # SKIP Streaming SVE set SVE get FPSIMD for VL 1056
4056 22:58:48.130127 # ok 2320 # SKIP Streaming SVE set FPSIMD get SVE for VL 1056
4057 22:58:48.130282 # ok 2321 Set Streaming SVE VL 1072
4058 22:58:48.130404 # ok 2322 # SKIP Streaming SVE set SVE get SVE for VL 1072
4059 22:58:48.130574 # ok 2323 # SKIP Streaming SVE set SVE get FPSIMD for VL 1072
4060 22:58:48.130708 # ok 2324 # SKIP Streaming SVE set FPSIMD get SVE for VL 1072
4061 22:58:48.130848 # ok 2325 Set Streaming SVE VL 1088
4062 22:58:48.131007 # ok 2326 # SKIP Streaming SVE set SVE get SVE for VL 1088
4063 22:58:48.131165 # ok 2327 # SKIP Streaming SVE set SVE get FPSIMD for VL 1088
4064 22:58:48.131303 # ok 2328 # SKIP Streaming SVE set FPSIMD get SVE for VL 1088
4065 22:58:48.131439 # ok 2329 Set Streaming SVE VL 1104
4066 22:58:48.131627 # ok 2330 # SKIP Streaming SVE set SVE get SVE for VL 1104
4067 22:58:48.131779 # ok 2331 # SKIP Streaming SVE set SVE get FPSIMD for VL 1104
4068 22:58:48.131906 # ok 2332 # SKIP Streaming SVE set FPSIMD get SVE for VL 1104
4069 22:58:48.132043 # ok 2333 Set Streaming SVE VL 1120
4070 22:58:48.132226 # ok 2334 # SKIP Streaming SVE set SVE get SVE for VL 1120
4071 22:58:48.132363 # ok 2335 # SKIP Streaming SVE set SVE get FPSIMD for VL 1120
4072 22:58:48.132488 # ok 2336 # SKIP Streaming SVE set FPSIMD get SVE for VL 1120
4073 22:58:48.132651 # ok 2337 Set Streaming SVE VL 1136
4074 22:58:48.132790 # ok 2338 # SKIP Streaming SVE set SVE get SVE for VL 1136
4075 22:58:48.132942 # ok 2339 # SKIP Streaming SVE set SVE get FPSIMD for VL 1136
4076 22:58:48.133103 # ok 2340 # SKIP Streaming SVE set FPSIMD get SVE for VL 1136
4077 22:58:48.133240 # ok 2341 Set Streaming SVE VL 1152
4078 22:58:48.133382 # ok 2342 # SKIP Streaming SVE set SVE get SVE for VL 1152
4079 22:58:48.133483 # ok 2343 # SKIP Streaming SVE set SVE get FPSIMD for VL 1152
4080 22:58:48.133553 # ok 2344 # SKIP Streaming SVE set FPSIMD get SVE for VL 1152
4081 22:58:48.133615 # ok 2345 Set Streaming SVE VL 1168
4082 22:58:48.133701 # ok 2346 # SKIP Streaming SVE set SVE get SVE for VL 1168
4083 22:58:48.133975 # ok 2347 # SKIP Streaming SVE set SVE get FPSIMD for VL 1168
4084 22:58:48.134050 # ok 2348 # SKIP Streaming SVE set FPSIMD get SVE for VL 1168
4085 22:58:48.134132 # ok 2349 Set Streaming SVE VL 1184
4086 22:58:48.134222 # ok 2350 # SKIP Streaming SVE set SVE get SVE for VL 1184
4087 22:58:48.134490 # ok 2351 # SKIP Streaming SVE set SVE get FPSIMD for VL 1184
4088 22:58:48.134787 # ok 2352 # SKIP Streaming SVE set FPSIMD get SVE for VL 1184
4089 22:58:48.135069 # ok 2353 Set Streaming SVE VL 1200
4090 22:58:48.135178 # ok 2354 # SKIP Streaming SVE set SVE get SVE for VL 1200
4091 22:58:48.135271 # ok 2355 # SKIP Streaming SVE set SVE get FPSIMD for VL 1200
4092 22:58:48.135544 # ok 2356 # SKIP Streaming SVE set FPSIMD get SVE for VL 1200
4093 22:58:48.135615 # ok 2357 Set Streaming SVE VL 1216
4094 22:58:48.135697 # ok 2358 # SKIP Streaming SVE set SVE get SVE for VL 1216
4095 22:58:48.135983 # ok 2359 # SKIP Streaming SVE set SVE get FPSIMD for VL 1216
4096 22:58:48.136095 # ok 2360 # SKIP Streaming SVE set FPSIMD get SVE for VL 1216
4097 22:58:48.136181 # ok 2361 Set Streaming SVE VL 1232
4098 22:58:48.136265 # ok 2362 # SKIP Streaming SVE set SVE get SVE for VL 1232
4099 22:58:48.136527 # ok 2363 # SKIP Streaming SVE set SVE get FPSIMD for VL 1232
4100 22:58:48.136609 # ok 2364 # SKIP Streaming SVE set FPSIMD get SVE for VL 1232
4101 22:58:48.136693 # ok 2365 Set Streaming SVE VL 1248
4102 22:58:48.136938 # ok 2366 # SKIP Streaming SVE set SVE get SVE for VL 1248
4103 22:58:48.137047 # ok 2367 # SKIP Streaming SVE set SVE get FPSIMD for VL 1248
4104 22:58:48.137334 # ok 2368 # SKIP Streaming SVE set FPSIMD get SVE for VL 1248
4105 22:58:48.137425 # ok 2369 Set Streaming SVE VL 1264
4106 22:58:48.137527 # ok 2370 # SKIP Streaming SVE set SVE get SVE for VL 1264
4107 22:58:48.137622 # ok 2371 # SKIP Streaming SVE set SVE get FPSIMD for VL 1264
4108 22:58:48.137893 # ok 2372 # SKIP Streaming SVE set FPSIMD get SVE for VL 1264
4109 22:58:48.137969 # ok 2373 Set Streaming SVE VL 1280
4110 22:58:48.138054 # ok 2374 # SKIP Streaming SVE set SVE get SVE for VL 1280
4111 22:58:48.138314 # ok 2375 # SKIP Streaming SVE set SVE get FPSIMD for VL 1280
4112 22:58:48.138395 # ok 2376 # SKIP Streaming SVE set FPSIMD get SVE for VL 1280
4113 22:58:48.138659 # ok 2377 Set Streaming SVE VL 1296
4114 22:58:48.139078 # ok 2378 # SKIP Streaming SVE set SVE get SVE for VL 1296
4115 22:58:48.139518 # ok 2379 # SKIP Streaming SVE set SVE get FPSIMD for VL 1296
4116 22:58:48.139725 # ok 2380 # SKIP Streaming SVE set FPSIMD get SVE for VL 1296
4117 22:58:48.139835 # ok 2381 Set Streaming SVE VL 1312
4118 22:58:48.139922 # ok 2382 # SKIP Streaming SVE set SVE get SVE for VL 1312
4119 22:58:48.140005 # ok 2383 # SKIP Streaming SVE set SVE get FPSIMD for VL 1312
4120 22:58:48.140107 # ok 2384 # SKIP Streaming SVE set FPSIMD get SVE for VL 1312
4121 22:58:48.140193 # ok 2385 Set Streaming SVE VL 1328
4122 22:58:48.140274 # ok 2386 # SKIP Streaming SVE set SVE get SVE for VL 1328
4123 22:58:48.140377 # ok 2387 # SKIP Streaming SVE set SVE get FPSIMD for VL 1328
4124 22:58:48.140471 # ok 2388 # SKIP Streaming SVE set FPSIMD get SVE for VL 1328
4125 22:58:48.140897 # ok 2389 Set Streaming SVE VL 1344
4126 22:58:48.141129 # ok 2390 # SKIP Streaming SVE set SVE get SVE for VL 1344
4127 22:58:48.141689 # ok 2391 # SKIP Streaming SVE set SVE get FPSIMD for VL 1344
4128 22:58:48.141851 # ok 2392 # SKIP Streaming SVE set FPSIMD get SVE for VL 1344
4129 22:58:48.141999 # ok 2393 Set Streaming SVE VL 1360
4130 22:58:48.142121 # ok 2394 # SKIP Streaming SVE set SVE get SVE for VL 1360
4131 22:58:48.142251 # ok 2395 # SKIP Streaming SVE set SVE get FPSIMD for VL 1360
4132 22:58:48.142367 # ok 2396 # SKIP Streaming SVE set FPSIMD get SVE for VL 1360
4133 22:58:48.142511 # ok 2397 Set Streaming SVE VL 1376
4134 22:58:48.142662 # ok 2398 # SKIP Streaming SVE set SVE get SVE for VL 1376
4135 22:58:48.142777 # ok 2399 # SKIP Streaming SVE set SVE get FPSIMD for VL 1376
4136 22:58:48.142929 # ok 2400 # SKIP Streaming SVE set FPSIMD get SVE for VL 1376
4137 22:58:48.143104 # ok 2401 Set Streaming SVE VL 1392
4138 22:58:48.143253 # ok 2402 # SKIP Streaming SVE set SVE get SVE for VL 1392
4139 22:58:48.143727 # ok 2403 # SKIP Streaming SVE set SVE get FPSIMD for VL 1392
4140 22:58:48.177794 # ok 2404 # SKIP Streaming SVE set FPSIMD get SVE for VL 1392
4141 22:58:48.178015 # ok 2405 Set Streaming SVE VL 1408
4142 22:58:48.178102 # ok 2406 # SKIP Streaming SVE set SVE get SVE for VL 1408
4143 22:58:48.178186 # ok 2407 # SKIP Streaming SVE set SVE get FPSIMD for VL 1408
4144 22:58:48.178262 # ok 2408 # SKIP Streaming SVE set FPSIMD get SVE for VL 1408
4145 22:58:48.178337 # ok 2409 Set Streaming SVE VL 1424
4146 22:58:48.178422 # ok 2410 # SKIP Streaming SVE set SVE get SVE for VL 1424
4147 22:58:48.178500 # ok 2411 # SKIP Streaming SVE set SVE get FPSIMD for VL 1424
4148 22:58:48.178576 # ok 2412 # SKIP Streaming SVE set FPSIMD get SVE for VL 1424
4149 22:58:48.178652 # ok 2413 Set Streaming SVE VL 1440
4150 22:58:48.178728 # ok 2414 # SKIP Streaming SVE set SVE get SVE for VL 1440
4151 22:58:48.178803 # ok 2415 # SKIP Streaming SVE set SVE get FPSIMD for VL 1440
4152 22:58:48.178879 # ok 2416 # SKIP Streaming SVE set FPSIMD get SVE for VL 1440
4153 22:58:48.178953 # ok 2417 Set Streaming SVE VL 1456
4154 22:58:48.179025 # ok 2418 # SKIP Streaming SVE set SVE get SVE for VL 1456
4155 22:58:48.179096 # ok 2419 # SKIP Streaming SVE set SVE get FPSIMD for VL 1456
4156 22:58:48.179171 # ok 2420 # SKIP Streaming SVE set FPSIMD get SVE for VL 1456
4157 22:58:48.179245 # ok 2421 Set Streaming SVE VL 1472
4158 22:58:48.179317 # ok 2422 # SKIP Streaming SVE set SVE get SVE for VL 1472
4159 22:58:48.179389 # ok 2423 # SKIP Streaming SVE set SVE get FPSIMD for VL 1472
4160 22:58:48.179462 # ok 2424 # SKIP Streaming SVE set FPSIMD get SVE for VL 1472
4161 22:58:48.179534 # ok 2425 Set Streaming SVE VL 1488
4162 22:58:48.179609 # ok 2426 # SKIP Streaming SVE set SVE get SVE for VL 1488
4163 22:58:48.179679 # ok 2427 # SKIP Streaming SVE set SVE get FPSIMD for VL 1488
4164 22:58:48.179753 # ok 2428 # SKIP Streaming SVE set FPSIMD get SVE for VL 1488
4165 22:58:48.179827 # ok 2429 Set Streaming SVE VL 1504
4166 22:58:48.179899 # ok 2430 # SKIP Streaming SVE set SVE get SVE for VL 1504
4167 22:58:48.179973 # ok 2431 # SKIP Streaming SVE set SVE get FPSIMD for VL 1504
4168 22:58:48.180046 # ok 2432 # SKIP Streaming SVE set FPSIMD get SVE for VL 1504
4169 22:58:48.180154 # ok 2433 Set Streaming SVE VL 1520
4170 22:58:48.180243 # ok 2434 # SKIP Streaming SVE set SVE get SVE for VL 1520
4171 22:58:48.180318 # ok 2435 # SKIP Streaming SVE set SVE get FPSIMD for VL 1520
4172 22:58:48.180389 # ok 2436 # SKIP Streaming SVE set FPSIMD get SVE for VL 1520
4173 22:58:48.180459 # ok 2437 Set Streaming SVE VL 1536
4174 22:58:48.180808 # ok 2438 # SKIP Streaming SVE set SVE get SVE for VL 1536
4175 22:58:48.180898 # ok 2439 # SKIP Streaming SVE set SVE get FPSIMD for VL 1536
4176 22:58:48.180965 # ok 2440 # SKIP Streaming SVE set FPSIMD get SVE for VL 1536
4177 22:58:48.181027 # ok 2441 Set Streaming SVE VL 1552
4178 22:58:48.181091 # ok 2442 # SKIP Streaming SVE set SVE get SVE for VL 1552
4179 22:58:48.181152 # ok 2443 # SKIP Streaming SVE set SVE get FPSIMD for VL 1552
4180 22:58:48.181213 # ok 2444 # SKIP Streaming SVE set FPSIMD get SVE for VL 1552
4181 22:58:48.181273 # ok 2445 Set Streaming SVE VL 1568
4182 22:58:48.181334 # ok 2446 # SKIP Streaming SVE set SVE get SVE for VL 1568
4183 22:58:48.181395 # ok 2447 # SKIP Streaming SVE set SVE get FPSIMD for VL 1568
4184 22:58:48.181455 # ok 2448 # SKIP Streaming SVE set FPSIMD get SVE for VL 1568
4185 22:58:48.181516 # ok 2449 Set Streaming SVE VL 1584
4186 22:58:48.181577 # ok 2450 # SKIP Streaming SVE set SVE get SVE for VL 1584
4187 22:58:48.181637 # ok 2451 # SKIP Streaming SVE set SVE get FPSIMD for VL 1584
4188 22:58:48.181725 # ok 2452 # SKIP Streaming SVE set FPSIMD get SVE for VL 1584
4189 22:58:48.181806 # ok 2453 Set Streaming SVE VL 1600
4190 22:58:48.181884 # ok 2454 # SKIP Streaming SVE set SVE get SVE for VL 1600
4191 22:58:48.181966 # ok 2455 # SKIP Streaming SVE set SVE get FPSIMD for VL 1600
4192 22:58:48.182046 # ok 2456 # SKIP Streaming SVE set FPSIMD get SVE for VL 1600
4193 22:58:48.182139 # ok 2457 Set Streaming SVE VL 1616
4194 22:58:48.182244 # ok 2458 # SKIP Streaming SVE set SVE get SVE for VL 1616
4195 22:58:48.182346 # ok 2459 # SKIP Streaming SVE set SVE get FPSIMD for VL 1616
4196 22:58:48.182448 # ok 2460 # SKIP Streaming SVE set FPSIMD get SVE for VL 1616
4197 22:58:48.182552 # ok 2461 Set Streaming SVE VL 1632
4198 22:58:48.182645 # ok 2462 # SKIP Streaming SVE set SVE get SVE for VL 1632
4199 22:58:48.182722 # ok 2463 # SKIP Streaming SVE set SVE get FPSIMD for VL 1632
4200 22:58:48.182784 # ok 2464 # SKIP Streaming SVE set FPSIMD get SVE for VL 1632
4201 22:58:48.182844 # ok 2465 Set Streaming SVE VL 1648
4202 22:58:48.182902 # ok 2466 # SKIP Streaming SVE set SVE get SVE for VL 1648
4203 22:58:48.182960 # ok 2467 # SKIP Streaming SVE set SVE get FPSIMD for VL 1648
4204 22:58:48.183019 # ok 2468 # SKIP Streaming SVE set FPSIMD get SVE for VL 1648
4205 22:58:48.183113 # ok 2469 Set Streaming SVE VL 1664
4206 22:58:48.183218 # ok 2470 # SKIP Streaming SVE set SVE get SVE for VL 1664
4207 22:58:48.183330 # ok 2471 # SKIP Streaming SVE set SVE get FPSIMD for VL 1664
4208 22:58:48.183444 # ok 2472 # SKIP Streaming SVE set FPSIMD get SVE for VL 1664
4209 22:58:48.183546 # ok 2473 Set Streaming SVE VL 1680
4210 22:58:48.184054 # ok 2474 # SKIP Streaming SVE set SVE get SVE for VL 1680
4211 22:58:48.184161 # ok 2475 # SKIP Streaming SVE set SVE get FPSIMD for VL 1680
4212 22:58:48.184257 # ok 2476 # SKIP Streaming SVE set FPSIMD get SVE for VL 1680
4213 22:58:48.184348 # ok 2477 Set Streaming SVE VL 1696
4214 22:58:48.184448 # ok 2478 # SKIP Streaming SVE set SVE get SVE for VL 1696
4215 22:58:48.184548 # ok 2479 # SKIP Streaming SVE set SVE get FPSIMD for VL 1696
4216 22:58:48.184645 # ok 2480 # SKIP Streaming SVE set FPSIMD get SVE for VL 1696
4217 22:58:48.184743 # ok 2481 Set Streaming SVE VL 1712
4218 22:58:48.184851 # ok 2482 # SKIP Streaming SVE set SVE get SVE for VL 1712
4219 22:58:48.184956 # ok 2483 # SKIP Streaming SVE set SVE get FPSIMD for VL 1712
4220 22:58:48.185038 # ok 2484 # SKIP Streaming SVE set FPSIMD get SVE for VL 1712
4221 22:58:48.185124 # ok 2485 Set Streaming SVE VL 1728
4222 22:58:48.185209 # ok 2486 # SKIP Streaming SVE set SVE get SVE for VL 1728
4223 22:58:48.185289 # ok 2487 # SKIP Streaming SVE set SVE get FPSIMD for VL 1728
4224 22:58:48.185370 # ok 2488 # SKIP Streaming SVE set FPSIMD get SVE for VL 1728
4225 22:58:48.185451 # ok 2489 Set Streaming SVE VL 1744
4226 22:58:48.185527 # ok 2490 # SKIP Streaming SVE set SVE get SVE for VL 1744
4227 22:58:48.185606 # ok 2491 # SKIP Streaming SVE set SVE get FPSIMD for VL 1744
4228 22:58:48.185689 # ok 2492 # SKIP Streaming SVE set FPSIMD get SVE for VL 1744
4229 22:58:48.185770 # ok 2493 Set Streaming SVE VL 1760
4230 22:58:48.185851 # ok 2494 # SKIP Streaming SVE set SVE get SVE for VL 1760
4231 22:58:48.185933 # ok 2495 # SKIP Streaming SVE set SVE get FPSIMD for VL 1760
4232 22:58:48.186015 # ok 2496 # SKIP Streaming SVE set FPSIMD get SVE for VL 1760
4233 22:58:48.186098 # ok 2497 Set Streaming SVE VL 1776
4234 22:58:48.186177 # ok 2498 # SKIP Streaming SVE set SVE get SVE for VL 1776
4235 22:58:48.186259 # ok 2499 # SKIP Streaming SVE set SVE get FPSIMD for VL 1776
4236 22:58:48.186339 # ok 2500 # SKIP Streaming SVE set FPSIMD get SVE for VL 1776
4237 22:58:48.186440 # ok 2501 Set Streaming SVE VL 1792
4238 22:58:48.186536 # ok 2502 # SKIP Streaming SVE set SVE get SVE for VL 1792
4239 22:58:48.186643 # ok 2503 # SKIP Streaming SVE set SVE get FPSIMD for VL 1792
4240 22:58:48.186748 # ok 2504 # SKIP Streaming SVE set FPSIMD get SVE for VL 1792
4241 22:58:48.186856 # ok 2505 Set Streaming SVE VL 1808
4242 22:58:48.186954 # ok 2506 # SKIP Streaming SVE set SVE get SVE for VL 1808
4243 22:58:48.187053 # ok 2507 # SKIP Streaming SVE set SVE get FPSIMD for VL 1808
4244 22:58:48.187163 # ok 2508 # SKIP Streaming SVE set FPSIMD get SVE for VL 1808
4245 22:58:48.188017 # ok 2509 Set Streaming SVE VL 1824
4246 22:58:48.188121 # ok 2510 # SKIP Streaming SVE set SVE get SVE for VL 1824
4247 22:58:48.188204 # ok 2511 # SKIP Streaming SVE set SVE get FPSIMD for VL 1824
4248 22:58:48.188288 # ok 2512 # SKIP Streaming SVE set FPSIMD get SVE for VL 1824
4249 22:58:48.188372 # ok 2513 Set Streaming SVE VL 1840
4250 22:58:48.188476 # ok 2514 # SKIP Streaming SVE set SVE get SVE for VL 1840
4251 22:58:48.188585 # ok 2515 # SKIP Streaming SVE set SVE get FPSIMD for VL 1840
4252 22:58:48.188691 # ok 2516 # SKIP Streaming SVE set FPSIMD get SVE for VL 1840
4253 22:58:48.188797 # ok 2517 Set Streaming SVE VL 1856
4254 22:58:48.188907 # ok 2518 # SKIP Streaming SVE set SVE get SVE for VL 1856
4255 22:58:48.189012 # ok 2519 # SKIP Streaming SVE set SVE get FPSIMD for VL 1856
4256 22:58:48.189118 # ok 2520 # SKIP Streaming SVE set FPSIMD get SVE for VL 1856
4257 22:58:48.189230 # ok 2521 Set Streaming SVE VL 1872
4258 22:58:48.189335 # ok 2522 # SKIP Streaming SVE set SVE get SVE for VL 1872
4259 22:58:48.189434 # ok 2523 # SKIP Streaming SVE set SVE get FPSIMD for VL 1872
4260 22:58:48.189537 # ok 2524 # SKIP Streaming SVE set FPSIMD get SVE for VL 1872
4261 22:58:48.189637 # ok 2525 Set Streaming SVE VL 1888
4262 22:58:48.189734 # ok 2526 # SKIP Streaming SVE set SVE get SVE for VL 1888
4263 22:58:48.189815 # ok 2527 # SKIP Streaming SVE set SVE get FPSIMD for VL 1888
4264 22:58:48.189911 # ok 2528 # SKIP Streaming SVE set FPSIMD get SVE for VL 1888
4265 22:58:48.190021 # ok 2529 Set Streaming SVE VL 1904
4266 22:58:48.190126 # ok 2530 # SKIP Streaming SVE set SVE get SVE for VL 1904
4267 22:58:48.190231 # ok 2531 # SKIP Streaming SVE set SVE get FPSIMD for VL 1904
4268 22:58:48.190332 # ok 2532 # SKIP Streaming SVE set FPSIMD get SVE for VL 1904
4269 22:58:48.190427 # ok 2533 Set Streaming SVE VL 1920
4270 22:58:48.190531 # ok 2534 # SKIP Streaming SVE set SVE get SVE for VL 1920
4271 22:58:48.190624 # ok 2535 # SKIP Streaming SVE set SVE get FPSIMD for VL 1920
4272 22:58:48.190737 # ok 2536 # SKIP Streaming SVE set FPSIMD get SVE for VL 1920
4273 22:58:48.190835 # ok 2537 Set Streaming SVE VL 1936
4274 22:58:48.190921 # ok 2538 # SKIP Streaming SVE set SVE get SVE for VL 1936
4275 22:58:48.191008 # ok 2539 # SKIP Streaming SVE set SVE get FPSIMD for VL 1936
4276 22:58:48.191111 # ok 2540 # SKIP Streaming SVE set FPSIMD get SVE for VL 1936
4277 22:58:48.191227 # ok 2541 Set Streaming SVE VL 1952
4278 22:58:48.191329 # ok 2542 # SKIP Streaming SVE set SVE get SVE for VL 1952
4279 22:58:48.191422 # ok 2543 # SKIP Streaming SVE set SVE get FPSIMD for VL 1952
4280 22:58:48.191919 # ok 2544 # SKIP Streaming SVE set FPSIMD get SVE for VL 1952
4281 22:58:48.192038 # ok 2545 Set Streaming SVE VL 1968
4282 22:58:48.192144 # ok 2546 # SKIP Streaming SVE set SVE get SVE for VL 1968
4283 22:58:48.192246 # ok 2547 # SKIP Streaming SVE set SVE get FPSIMD for VL 1968
4284 22:58:48.192347 # ok 2548 # SKIP Streaming SVE set FPSIMD get SVE for VL 1968
4285 22:58:48.192453 # ok 2549 Set Streaming SVE VL 1984
4286 22:58:48.192552 # ok 2550 # SKIP Streaming SVE set SVE get SVE for VL 1984
4287 22:58:48.192637 # ok 2551 # SKIP Streaming SVE set SVE get FPSIMD for VL 1984
4288 22:58:48.192725 # ok 2552 # SKIP Streaming SVE set FPSIMD get SVE for VL 1984
4289 22:58:48.192835 # ok 2553 Set Streaming SVE VL 2000
4290 22:58:48.192952 # ok 2554 # SKIP Streaming SVE set SVE get SVE for VL 2000
4291 22:58:48.193055 # ok 2555 # SKIP Streaming SVE set SVE get FPSIMD for VL 2000
4292 22:58:48.193148 # ok 2556 # SKIP Streaming SVE set FPSIMD get SVE for VL 2000
4293 22:58:48.193232 # ok 2557 Set Streaming SVE VL 2016
4294 22:58:48.193314 # ok 2558 # SKIP Streaming SVE set SVE get SVE for VL 2016
4295 22:58:48.193406 # ok 2559 # SKIP Streaming SVE set SVE get FPSIMD for VL 2016
4296 22:58:48.193489 # ok 2560 # SKIP Streaming SVE set FPSIMD get SVE for VL 2016
4297 22:58:48.193594 # ok 2561 Set Streaming SVE VL 2032
4298 22:58:48.193694 # ok 2562 # SKIP Streaming SVE set SVE get SVE for VL 2032
4299 22:58:48.193800 # ok 2563 # SKIP Streaming SVE set SVE get FPSIMD for VL 2032
4300 22:58:48.193904 # ok 2564 # SKIP Streaming SVE set FPSIMD get SVE for VL 2032
4301 22:58:48.194012 # ok 2565 Set Streaming SVE VL 2048
4302 22:58:48.194118 # ok 2566 # SKIP Streaming SVE set SVE get SVE for VL 2048
4303 22:58:48.194208 # ok 2567 # SKIP Streaming SVE set SVE get FPSIMD for VL 2048
4304 22:58:48.194306 # ok 2568 # SKIP Streaming SVE set FPSIMD get SVE for VL 2048
4305 22:58:48.194407 # ok 2569 Set Streaming SVE VL 2064
4306 22:58:48.194519 # ok 2570 # SKIP Streaming SVE set SVE get SVE for VL 2064
4307 22:58:48.194615 # ok 2571 # SKIP Streaming SVE set SVE get FPSIMD for VL 2064
4308 22:58:48.194718 # ok 2572 # SKIP Streaming SVE set FPSIMD get SVE for VL 2064
4309 22:58:48.194809 # ok 2573 Set Streaming SVE VL 2080
4310 22:58:48.194890 # ok 2574 # SKIP Streaming SVE set SVE get SVE for VL 2080
4311 22:58:48.194972 # ok 2575 # SKIP Streaming SVE set SVE get FPSIMD for VL 2080
4312 22:58:48.195053 # ok 2576 # SKIP Streaming SVE set FPSIMD get SVE for VL 2080
4313 22:58:48.195130 # ok 2577 Set Streaming SVE VL 2096
4314 22:58:48.195231 # ok 2578 # SKIP Streaming SVE set SVE get SVE for VL 2096
4315 22:58:48.196186 # ok 2579 # SKIP Streaming SVE set SVE get FPSIMD for VL 2096
4316 22:58:48.196298 # ok 2580 # SKIP Streaming SVE set FPSIMD get SVE for VL 2096
4317 22:58:48.196410 # ok 2581 Set Streaming SVE VL 2112
4318 22:58:48.196508 # ok 2582 # SKIP Streaming SVE set SVE get SVE for VL 2112
4319 22:58:48.196613 # ok 2583 # SKIP Streaming SVE set SVE get FPSIMD for VL 2112
4320 22:58:48.196713 # ok 2584 # SKIP Streaming SVE set FPSIMD get SVE for VL 2112
4321 22:58:48.196818 # ok 2585 Set Streaming SVE VL 2128
4322 22:58:48.196916 # ok 2586 # SKIP Streaming SVE set SVE get SVE for VL 2128
4323 22:58:48.197007 # ok 2587 # SKIP Streaming SVE set SVE get FPSIMD for VL 2128
4324 22:58:48.197110 # ok 2588 # SKIP Streaming SVE set FPSIMD get SVE for VL 2128
4325 22:58:48.197207 # ok 2589 Set Streaming SVE VL 2144
4326 22:58:48.197306 # ok 2590 # SKIP Streaming SVE set SVE get SVE for VL 2144
4327 22:58:48.197390 # ok 2591 # SKIP Streaming SVE set SVE get FPSIMD for VL 2144
4328 22:58:48.197477 # ok 2592 # SKIP Streaming SVE set FPSIMD get SVE for VL 2144
4329 22:58:48.197562 # ok 2593 Set Streaming SVE VL 2160
4330 22:58:48.197665 # ok 2594 # SKIP Streaming SVE set SVE get SVE for VL 2160
4331 22:58:48.197755 # ok 2595 # SKIP Streaming SVE set SVE get FPSIMD for VL 2160
4332 22:58:48.197836 # ok 2596 # SKIP Streaming SVE set FPSIMD get SVE for VL 2160
4333 22:58:48.197911 # ok 2597 Set Streaming SVE VL 2176
4334 22:58:48.197973 # ok 2598 # SKIP Streaming SVE set SVE get SVE for VL 2176
4335 22:58:48.198040 # ok 2599 # SKIP Streaming SVE set SVE get FPSIMD for VL 2176
4336 22:58:48.198130 # ok 2600 # SKIP Streaming SVE set FPSIMD get SVE for VL 2176
4337 22:58:48.198234 # ok 2601 Set Streaming SVE VL 2192
4338 22:58:48.198336 # ok 2602 # SKIP Streaming SVE set SVE get SVE for VL 2192
4339 22:58:48.198443 # ok 2603 # SKIP Streaming SVE set SVE get FPSIMD for VL 2192
4340 22:58:48.198552 # ok 2604 # SKIP Streaming SVE set FPSIMD get SVE for VL 2192
4341 22:58:48.198638 # ok 2605 Set Streaming SVE VL 2208
4342 22:58:48.198720 # ok 2606 # SKIP Streaming SVE set SVE get SVE for VL 2208
4343 22:58:48.198782 # ok 2607 # SKIP Streaming SVE set SVE get FPSIMD for VL 2208
4344 22:58:48.198842 # ok 2608 # SKIP Streaming SVE set FPSIMD get SVE for VL 2208
4345 22:58:48.198900 # ok 2609 Set Streaming SVE VL 2224
4346 22:58:48.198957 # ok 2610 # SKIP Streaming SVE set SVE get SVE for VL 2224
4347 22:58:48.199015 # ok 2611 # SKIP Streaming SVE set SVE get FPSIMD for VL 2224
4348 22:58:48.199073 # ok 2612 # SKIP Streaming SVE set FPSIMD get SVE for VL 2224
4349 22:58:48.199131 # ok 2613 Set Streaming SVE VL 2240
4350 22:58:48.199424 # ok 2614 # SKIP Streaming SVE set SVE get SVE for VL 2240
4351 22:58:48.199565 # ok 2615 # SKIP Streaming SVE set SVE get FPSIMD for VL 2240
4352 22:58:48.199663 # ok 2616 # SKIP Streaming SVE set FPSIMD get SVE for VL 2240
4353 22:58:48.199758 # ok 2617 Set Streaming SVE VL 2256
4354 22:58:48.199853 # ok 2618 # SKIP Streaming SVE set SVE get SVE for VL 2256
4355 22:58:48.199939 # ok 2619 # SKIP Streaming SVE set SVE get FPSIMD for VL 2256
4356 22:58:48.200021 # ok 2620 # SKIP Streaming SVE set FPSIMD get SVE for VL 2256
4357 22:58:48.200099 # ok 2621 Set Streaming SVE VL 2272
4358 22:58:48.200179 # ok 2622 # SKIP Streaming SVE set SVE get SVE for VL 2272
4359 22:58:48.200260 # ok 2623 # SKIP Streaming SVE set SVE get FPSIMD for VL 2272
4360 22:58:48.200342 # ok 2624 # SKIP Streaming SVE set FPSIMD get SVE for VL 2272
4361 22:58:48.200422 # ok 2625 Set Streaming SVE VL 2288
4362 22:58:48.200501 # ok 2626 # SKIP Streaming SVE set SVE get SVE for VL 2288
4363 22:58:48.200580 # ok 2627 # SKIP Streaming SVE set SVE get FPSIMD for VL 2288
4364 22:58:48.200661 # ok 2628 # SKIP Streaming SVE set FPSIMD get SVE for VL 2288
4365 22:58:48.200744 # ok 2629 Set Streaming SVE VL 2304
4366 22:58:48.200828 # ok 2630 # SKIP Streaming SVE set SVE get SVE for VL 2304
4367 22:58:48.200915 # ok 2631 # SKIP Streaming SVE set SVE get FPSIMD for VL 2304
4368 22:58:48.201005 # ok 2632 # SKIP Streaming SVE set FPSIMD get SVE for VL 2304
4369 22:58:48.201095 # ok 2633 Set Streaming SVE VL 2320
4370 22:58:48.201185 # ok 2634 # SKIP Streaming SVE set SVE get SVE for VL 2320
4371 22:58:48.201284 # ok 2635 # SKIP Streaming SVE set SVE get FPSIMD for VL 2320
4372 22:58:48.201370 # ok 2636 # SKIP Streaming SVE set FPSIMD get SVE for VL 2320
4373 22:58:48.201451 # ok 2637 Set Streaming SVE VL 2336
4374 22:58:48.201535 # ok 2638 # SKIP Streaming SVE set SVE get SVE for VL 2336
4375 22:58:48.201617 # ok 2639 # SKIP Streaming SVE set SVE get FPSIMD for VL 2336
4376 22:58:48.201717 # ok 2640 # SKIP Streaming SVE set FPSIMD get SVE for VL 2336
4377 22:58:48.201809 # ok 2641 Set Streaming SVE VL 2352
4378 22:58:48.201900 # ok 2642 # SKIP Streaming SVE set SVE get SVE for VL 2352
4379 22:58:48.201990 # ok 2643 # SKIP Streaming SVE set SVE get FPSIMD for VL 2352
4380 22:58:48.202081 # ok 2644 # SKIP Streaming SVE set FPSIMD get SVE for VL 2352
4381 22:58:48.202172 # ok 2645 Set Streaming SVE VL 2368
4382 22:58:48.202262 # ok 2646 # SKIP Streaming SVE set SVE get SVE for VL 2368
4383 22:58:48.202352 # ok 2647 # SKIP Streaming SVE set SVE get FPSIMD for VL 2368
4384 22:58:48.202442 # ok 2648 # SKIP Streaming SVE set FPSIMD get SVE for VL 2368
4385 22:58:48.202532 # ok 2649 Set Streaming SVE VL 2384
4386 22:58:48.202846 # ok 2650 # SKIP Streaming SVE set SVE get SVE for VL 2384
4387 22:58:48.202932 # ok 2651 # SKIP Streaming SVE set SVE get FPSIMD for VL 2384
4388 22:58:48.202996 # ok 2652 # SKIP Streaming SVE set FPSIMD get SVE for VL 2384
4389 22:58:48.203089 # ok 2653 Set Streaming SVE VL 2400
4390 22:58:48.203179 # ok 2654 # SKIP Streaming SVE set SVE get SVE for VL 2400
4391 22:58:48.203274 # ok 2655 # SKIP Streaming SVE set SVE get FPSIMD for VL 2400
4392 22:58:48.203378 # ok 2656 # SKIP Streaming SVE set FPSIMD get SVE for VL 2400
4393 22:58:48.203481 # ok 2657 Set Streaming SVE VL 2416
4394 22:58:48.203581 # ok 2658 # SKIP Streaming SVE set SVE get SVE for VL 2416
4395 22:58:48.203680 # ok 2659 # SKIP Streaming SVE set SVE get FPSIMD for VL 2416
4396 22:58:48.203778 # ok 2660 # SKIP Streaming SVE set FPSIMD get SVE for VL 2416
4397 22:58:48.203874 # ok 2661 Set Streaming SVE VL 2432
4398 22:58:48.203973 # ok 2662 # SKIP Streaming SVE set SVE get SVE for VL 2432
4399 22:58:48.204071 # ok 2663 # SKIP Streaming SVE set SVE get FPSIMD for VL 2432
4400 22:58:48.204163 # ok 2664 # SKIP Streaming SVE set FPSIMD get SVE for VL 2432
4401 22:58:48.204239 # ok 2665 Set Streaming SVE VL 2448
4402 22:58:48.204313 # ok 2666 # SKIP Streaming SVE set SVE get SVE for VL 2448
4403 22:58:48.204386 # ok 2667 # SKIP Streaming SVE set SVE get FPSIMD for VL 2448
4404 22:58:48.204459 # ok 2668 # SKIP Streaming SVE set FPSIMD get SVE for VL 2448
4405 22:58:48.204533 # ok 2669 Set Streaming SVE VL 2464
4406 22:58:48.204605 # ok 2670 # SKIP Streaming SVE set SVE get SVE for VL 2464
4407 22:58:48.204678 # ok 2671 # SKIP Streaming SVE set SVE get FPSIMD for VL 2464
4408 22:58:48.204752 # ok 2672 # SKIP Streaming SVE set FPSIMD get SVE for VL 2464
4409 22:58:48.204825 # ok 2673 Set Streaming SVE VL 2480
4410 22:58:48.204898 # ok 2674 # SKIP Streaming SVE set SVE get SVE for VL 2480
4411 22:58:48.204971 # ok 2675 # SKIP Streaming SVE set SVE get FPSIMD for VL 2480
4412 22:58:48.205044 # ok 2676 # SKIP Streaming SVE set FPSIMD get SVE for VL 2480
4413 22:58:48.205122 # ok 2677 Set Streaming SVE VL 2496
4414 22:58:48.205195 # ok 2678 # SKIP Streaming SVE set SVE get SVE for VL 2496
4415 22:58:48.205272 # ok 2679 # SKIP Streaming SVE set SVE get FPSIMD for VL 2496
4416 22:58:48.205346 # ok 2680 # SKIP Streaming SVE set FPSIMD get SVE for VL 2496
4417 22:58:48.205420 # ok 2681 Set Streaming SVE VL 2512
4418 22:58:48.205493 # ok 2682 # SKIP Streaming SVE set SVE get SVE for VL 2512
4419 22:58:48.205566 # ok 2683 # SKIP Streaming SVE set SVE get FPSIMD for VL 2512
4420 22:58:48.205640 # ok 2684 # SKIP Streaming SVE set FPSIMD get SVE for VL 2512
4421 22:58:48.205948 # ok 2685 Set Streaming SVE VL 2528
4422 22:58:48.206020 # ok 2686 # SKIP Streaming SVE set SVE get SVE for VL 2528
4423 22:58:48.206096 # ok 2687 # SKIP Streaming SVE set SVE get FPSIMD for VL 2528
4424 22:58:48.206173 # ok 2688 # SKIP Streaming SVE set FPSIMD get SVE for VL 2528
4425 22:58:48.206251 # ok 2689 Set Streaming SVE VL 2544
4426 22:58:48.206325 # ok 2690 # SKIP Streaming SVE set SVE get SVE for VL 2544
4427 22:58:48.206399 # ok 2691 # SKIP Streaming SVE set SVE get FPSIMD for VL 2544
4428 22:58:48.206473 # ok 2692 # SKIP Streaming SVE set FPSIMD get SVE for VL 2544
4429 22:58:48.206547 # ok 2693 Set Streaming SVE VL 2560
4430 22:58:48.206621 # ok 2694 # SKIP Streaming SVE set SVE get SVE for VL 2560
4431 22:58:48.206694 # ok 2695 # SKIP Streaming SVE set SVE get FPSIMD for VL 2560
4432 22:58:48.206768 # ok 2696 # SKIP Streaming SVE set FPSIMD get SVE for VL 2560
4433 22:58:48.206842 # ok 2697 Set Streaming SVE VL 2576
4434 22:58:48.206916 # ok 2698 # SKIP Streaming SVE set SVE get SVE for VL 2576
4435 22:58:48.206990 # ok 2699 # SKIP Streaming SVE set SVE get FPSIMD for VL 2576
4436 22:58:48.207064 # ok 2700 # SKIP Streaming SVE set FPSIMD get SVE for VL 2576
4437 22:58:48.207156 # ok 2701 Set Streaming SVE VL 2592
4438 22:58:48.207269 # ok 2702 # SKIP Streaming SVE set SVE get SVE for VL 2592
4439 22:58:48.207386 # ok 2703 # SKIP Streaming SVE set SVE get FPSIMD for VL 2592
4440 22:58:48.207497 # ok 2704 # SKIP Streaming SVE set FPSIMD get SVE for VL 2592
4441 22:58:48.207598 # ok 2705 Set Streaming SVE VL 2608
4442 22:58:48.207717 # ok 2706 # SKIP Streaming SVE set SVE get SVE for VL 2608
4443 22:58:48.207818 # ok 2707 # SKIP Streaming SVE set SVE get FPSIMD for VL 2608
4444 22:58:48.207912 # ok 2708 # SKIP Streaming SVE set FPSIMD get SVE for VL 2608
4445 22:58:48.208000 # ok 2709 Set Streaming SVE VL 2624
4446 22:58:48.208083 # ok 2710 # SKIP Streaming SVE set SVE get SVE for VL 2624
4447 22:58:48.208162 # ok 2711 # SKIP Streaming SVE set SVE get FPSIMD for VL 2624
4448 22:58:48.208252 # ok 2712 # SKIP Streaming SVE set FPSIMD get SVE for VL 2624
4449 22:58:48.208336 # ok 2713 Set Streaming SVE VL 2640
4450 22:58:48.208407 # ok 2714 # SKIP Streaming SVE set SVE get SVE for VL 2640
4451 22:58:48.208475 # ok 2715 # SKIP Streaming SVE set SVE get FPSIMD for VL 2640
4452 22:58:48.208551 # ok 2716 # SKIP Streaming SVE set FPSIMD get SVE for VL 2640
4453 22:58:48.208621 # ok 2717 Set Streaming SVE VL 2656
4454 22:58:48.208697 # ok 2718 # SKIP Streaming SVE set SVE get SVE for VL 2656
4455 22:58:48.208768 # ok 2719 # SKIP Streaming SVE set SVE get FPSIMD for VL 2656
4456 22:58:48.209066 # ok 2720 # SKIP Streaming SVE set FPSIMD get SVE for VL 2656
4457 22:58:48.209170 # ok 2721 Set Streaming SVE VL 2672
4458 22:58:48.209252 # ok 2722 # SKIP Streaming SVE set SVE get SVE for VL 2672
4459 22:58:48.209333 # ok 2723 # SKIP Streaming SVE set SVE get FPSIMD for VL 2672
4460 22:58:48.209409 # ok 2724 # SKIP Streaming SVE set FPSIMD get SVE for VL 2672
4461 22:58:48.209486 # ok 2725 Set Streaming SVE VL 2688
4462 22:58:48.209565 # ok 2726 # SKIP Streaming SVE set SVE get SVE for VL 2688
4463 22:58:48.209638 # ok 2727 # SKIP Streaming SVE set SVE get FPSIMD for VL 2688
4464 22:58:48.209745 # ok 2728 # SKIP Streaming SVE set FPSIMD get SVE for VL 2688
4465 22:58:48.209819 # ok 2729 Set Streaming SVE VL 2704
4466 22:58:48.209894 # ok 2730 # SKIP Streaming SVE set SVE get SVE for VL 2704
4467 22:58:48.209977 # ok 2731 # SKIP Streaming SVE set SVE get FPSIMD for VL 2704
4468 22:58:48.210062 # ok 2732 # SKIP Streaming SVE set FPSIMD get SVE for VL 2704
4469 22:58:48.210146 # ok 2733 Set Streaming SVE VL 2720
4470 22:58:48.210230 # ok 2734 # SKIP Streaming SVE set SVE get SVE for VL 2720
4471 22:58:48.210313 # ok 2735 # SKIP Streaming SVE set SVE get FPSIMD for VL 2720
4472 22:58:48.210403 # ok 2736 # SKIP Streaming SVE set FPSIMD get SVE for VL 2720
4473 22:58:48.210488 # ok 2737 Set Streaming SVE VL 2736
4474 22:58:48.210571 # ok 2738 # SKIP Streaming SVE set SVE get SVE for VL 2736
4475 22:58:48.210656 # ok 2739 # SKIP Streaming SVE set SVE get FPSIMD for VL 2736
4476 22:58:48.210739 # ok 2740 # SKIP Streaming SVE set FPSIMD get SVE for VL 2736
4477 22:58:48.210824 # ok 2741 Set Streaming SVE VL 2752
4478 22:58:48.210935 # ok 2742 # SKIP Streaming SVE set SVE get SVE for VL 2752
4479 22:58:48.211022 # ok 2743 # SKIP Streaming SVE set SVE get FPSIMD for VL 2752
4480 22:58:48.211107 # ok 2744 # SKIP Streaming SVE set FPSIMD get SVE for VL 2752
4481 22:58:48.211192 # ok 2745 Set Streaming SVE VL 2768
4482 22:58:48.211275 # ok 2746 # SKIP Streaming SVE set SVE get SVE for VL 2768
4483 22:58:48.211358 # ok 2747 # SKIP Streaming SVE set SVE get FPSIMD for VL 2768
4484 22:58:48.211432 # ok 2748 # SKIP Streaming SVE set FPSIMD get SVE for VL 2768
4485 22:58:48.211505 # ok 2749 Set Streaming SVE VL 2784
4486 22:58:48.211576 # ok 2750 # SKIP Streaming SVE set SVE get SVE for VL 2784
4487 22:58:48.211647 # ok 2751 # SKIP Streaming SVE set SVE get FPSIMD for VL 2784
4488 22:58:48.211717 # ok 2752 # SKIP Streaming SVE set FPSIMD get SVE for VL 2784
4489 22:58:48.211804 # ok 2753 Set Streaming SVE VL 2800
4490 22:58:48.211879 # ok 2754 # SKIP Streaming SVE set SVE get SVE for VL 2800
4491 22:58:48.212357 # ok 2755 # SKIP Streaming SVE set SVE get FPSIMD for VL 2800
4492 22:58:48.212456 # ok 2756 # SKIP Streaming SVE set FPSIMD get SVE for VL 2800
4493 22:58:48.212531 # ok 2757 Set Streaming SVE VL 2816
4494 22:58:48.212601 # ok 2758 # SKIP Streaming SVE set SVE get SVE for VL 2816
4495 22:58:48.212673 # ok 2759 # SKIP Streaming SVE set SVE get FPSIMD for VL 2816
4496 22:58:48.212744 # ok 2760 # SKIP Streaming SVE set FPSIMD get SVE for VL 2816
4497 22:58:48.212821 # ok 2761 Set Streaming SVE VL 2832
4498 22:58:48.212896 # ok 2762 # SKIP Streaming SVE set SVE get SVE for VL 2832
4499 22:58:48.212984 # ok 2763 # SKIP Streaming SVE set SVE get FPSIMD for VL 2832
4500 22:58:48.213058 # ok 2764 # SKIP Streaming SVE set FPSIMD get SVE for VL 2832
4501 22:58:48.213129 # ok 2765 Set Streaming SVE VL 2848
4502 22:58:48.213204 # ok 2766 # SKIP Streaming SVE set SVE get SVE for VL 2848
4503 22:58:48.213291 # ok 2767 # SKIP Streaming SVE set SVE get FPSIMD for VL 2848
4504 22:58:48.213366 # ok 2768 # SKIP Streaming SVE set FPSIMD get SVE for VL 2848
4505 22:58:48.213439 # ok 2769 Set Streaming SVE VL 2864
4506 22:58:48.213526 # ok 2770 # SKIP Streaming SVE set SVE get SVE for VL 2864
4507 22:58:48.213616 # ok 2771 # SKIP Streaming SVE set SVE get FPSIMD for VL 2864
4508 22:58:48.213921 # ok 2772 # SKIP Streaming SVE set FPSIMD get SVE for VL 2864
4509 22:58:48.214031 # ok 2773 Set Streaming SVE VL 2880
4510 22:58:48.214139 # ok 2774 # SKIP Streaming SVE set SVE get SVE for VL 2880
4511 22:58:48.214440 # ok 2775 # SKIP Streaming SVE set SVE get FPSIMD for VL 2880
4512 22:58:48.214553 # ok 2776 # SKIP Streaming SVE set FPSIMD get SVE for VL 2880
4513 22:58:48.214649 # ok 2777 Set Streaming SVE VL 2896
4514 22:58:48.214759 # ok 2778 # SKIP Streaming SVE set SVE get SVE for VL 2896
4515 22:58:48.214873 # ok 2779 # SKIP Streaming SVE set SVE get FPSIMD for VL 2896
4516 22:58:48.215180 # ok 2780 # SKIP Streaming SVE set FPSIMD get SVE for VL 2896
4517 22:58:48.215289 # ok 2781 Set Streaming SVE VL 2912
4518 22:58:48.215394 # ok 2782 # SKIP Streaming SVE set SVE get SVE for VL 2912
4519 22:58:48.215492 # ok 2783 # SKIP Streaming SVE set SVE get FPSIMD for VL 2912
4520 22:58:48.215591 # ok 2784 # SKIP Streaming SVE set FPSIMD get SVE for VL 2912
4521 22:58:48.215686 # ok 2785 Set Streaming SVE VL 2928
4522 22:58:48.216005 # ok 2786 # SKIP Streaming SVE set SVE get SVE for VL 2928
4523 22:58:48.216107 # ok 2787 # SKIP Streaming SVE set SVE get FPSIMD for VL 2928
4524 22:58:48.216208 # ok 2788 # SKIP Streaming SVE set FPSIMD get SVE for VL 2928
4525 22:58:48.216313 # ok 2789 Set Streaming SVE VL 2944
4526 22:58:48.216602 # ok 2790 # SKIP Streaming SVE set SVE get SVE for VL 2944
4527 22:58:48.216709 # ok 2791 # SKIP Streaming SVE set SVE get FPSIMD for VL 2944
4528 22:58:48.216817 # ok 2792 # SKIP Streaming SVE set FPSIMD get SVE for VL 2944
4529 22:58:48.216924 # ok 2793 Set Streaming SVE VL 2960
4530 22:58:48.217032 # ok 2794 # SKIP Streaming SVE set SVE get SVE for VL 2960
4531 22:58:48.217335 # ok 2795 # SKIP Streaming SVE set SVE get FPSIMD for VL 2960
4532 22:58:48.217449 # ok 2796 # SKIP Streaming SVE set FPSIMD get SVE for VL 2960
4533 22:58:48.217536 # ok 2797 Set Streaming SVE VL 2976
4534 22:58:48.217641 # ok 2798 # SKIP Streaming SVE set SVE get SVE for VL 2976
4535 22:58:48.217766 # ok 2799 # SKIP Streaming SVE set SVE get FPSIMD for VL 2976
4536 22:58:48.218075 # ok 2800 # SKIP Streaming SVE set FPSIMD get SVE for VL 2976
4537 22:58:48.218203 # ok 2801 Set Streaming SVE VL 2992
4538 22:58:48.218316 # ok 2802 # SKIP Streaming SVE set SVE get SVE for VL 2992
4539 22:58:48.218615 # ok 2803 # SKIP Streaming SVE set SVE get FPSIMD for VL 2992
4540 22:58:48.218925 # ok 2804 # SKIP Streaming SVE set FPSIMD get SVE for VL 2992
4541 22:58:48.219010 # ok 2805 Set Streaming SVE VL 3008
4542 22:58:48.219271 # ok 2806 # SKIP Streaming SVE set SVE get SVE for VL 3008
4543 22:58:48.219407 # ok 2807 # SKIP Streaming SVE set SVE get FPSIMD for VL 3008
4544 22:58:48.219514 # ok 2808 # SKIP Streaming SVE set FPSIMD get SVE for VL 3008
4545 22:58:48.219597 # ok 2809 Set Streaming SVE VL 3024
4546 22:58:48.219698 # ok 2810 # SKIP Streaming SVE set SVE get SVE for VL 3024
4547 22:58:48.219999 # ok 2811 # SKIP Streaming SVE set SVE get FPSIMD for VL 3024
4548 22:58:48.220113 # ok 2812 # SKIP Streaming SVE set FPSIMD get SVE for VL 3024
4549 22:58:48.220214 # ok 2813 Set Streaming SVE VL 3040
4550 22:58:48.220477 # ok 2814 # SKIP Streaming SVE set SVE get SVE for VL 3040
4551 22:58:48.220569 # ok 2815 # SKIP Streaming SVE set SVE get FPSIMD for VL 3040
4552 22:58:48.220672 # ok 2816 # SKIP Streaming SVE set FPSIMD get SVE for VL 3040
4553 22:58:48.220758 # ok 2817 Set Streaming SVE VL 3056
4554 22:58:48.221027 # ok 2818 # SKIP Streaming SVE set SVE get SVE for VL 3056
4555 22:58:48.221315 # ok 2819 # SKIP Streaming SVE set SVE get FPSIMD for VL 3056
4556 22:58:48.221423 # ok 2820 # SKIP Streaming SVE set FPSIMD get SVE for VL 3056
4557 22:58:48.221523 # ok 2821 Set Streaming SVE VL 3072
4558 22:58:48.221639 # ok 2822 # SKIP Streaming SVE set SVE get SVE for VL 3072
4559 22:58:48.221753 # ok 2823 # SKIP Streaming SVE set SVE get FPSIMD for VL 3072
4560 22:58:48.222044 # ok 2824 # SKIP Streaming SVE set FPSIMD get SVE for VL 3072
4561 22:58:48.222123 # ok 2825 Set Streaming SVE VL 3088
4562 22:58:48.222222 # ok 2826 # SKIP Streaming SVE set SVE get SVE for VL 3088
4563 22:58:48.222318 # ok 2827 # SKIP Streaming SVE set SVE get FPSIMD for VL 3088
4564 22:58:48.222628 # ok 2828 # SKIP Streaming SVE set FPSIMD get SVE for VL 3088
4565 22:58:48.222720 # ok 2829 Set Streaming SVE VL 3104
4566 22:58:48.223038 # ok 2830 # SKIP Streaming SVE set SVE get SVE for VL 3104
4567 22:58:48.223285 # ok 2831 # SKIP Streaming SVE set SVE get FPSIMD for VL 3104
4568 22:58:48.223387 # ok 2832 # SKIP Streaming SVE set FPSIMD get SVE for VL 3104
4569 22:58:48.223456 # ok 2833 Set Streaming SVE VL 3120
4570 22:58:48.223559 # ok 2834 # SKIP Streaming SVE set SVE get SVE for VL 3120
4571 22:58:48.223841 # ok 2835 # SKIP Streaming SVE set SVE get FPSIMD for VL 3120
4572 22:58:48.224137 # ok 2836 # SKIP Streaming SVE set FPSIMD get SVE for VL 3120
4573 22:58:48.224245 # ok 2837 Set Streaming SVE VL 3136
4574 22:58:48.224345 # ok 2838 # SKIP Streaming SVE set SVE get SVE for VL 3136
4575 22:58:48.224430 # ok 2839 # SKIP Streaming SVE set SVE get FPSIMD for VL 3136
4576 22:58:48.224548 # ok 2840 # SKIP Streaming SVE set FPSIMD get SVE for VL 3136
4577 22:58:48.224637 # ok 2841 Set Streaming SVE VL 3152
4578 22:58:48.224926 # ok 2842 # SKIP Streaming SVE set SVE get SVE for VL 3152
4579 22:58:48.225039 # ok 2843 # SKIP Streaming SVE set SVE get FPSIMD for VL 3152
4580 22:58:48.225404 # ok 2844 # SKIP Streaming SVE set FPSIMD get SVE for VL 3152
4581 22:58:48.225518 # ok 2845 Set Streaming SVE VL 3168
4582 22:58:48.225609 # ok 2846 # SKIP Streaming SVE set SVE get SVE for VL 3168
4583 22:58:48.225723 # ok 2847 # SKIP Streaming SVE set SVE get FPSIMD for VL 3168
4584 22:58:48.225810 # ok 2848 # SKIP Streaming SVE set FPSIMD get SVE for VL 3168
4585 22:58:48.225894 # ok 2849 Set Streaming SVE VL 3184
4586 22:58:48.225996 # ok 2850 # SKIP Streaming SVE set SVE get SVE for VL 3184
4587 22:58:48.226098 # ok 2851 # SKIP Streaming SVE set SVE get FPSIMD for VL 3184
4588 22:58:48.226405 # ok 2852 # SKIP Streaming SVE set FPSIMD get SVE for VL 3184
4589 22:58:48.226508 # ok 2853 Set Streaming SVE VL 3200
4590 22:58:48.226623 # ok 2854 # SKIP Streaming SVE set SVE get SVE for VL 3200
4591 22:58:48.226725 # ok 2855 # SKIP Streaming SVE set SVE get FPSIMD for VL 3200
4592 22:58:48.226974 # ok 2856 # SKIP Streaming SVE set FPSIMD get SVE for VL 3200
4593 22:58:48.227089 # ok 2857 Set Streaming SVE VL 3216
4594 22:58:48.227397 # ok 2858 # SKIP Streaming SVE set SVE get SVE for VL 3216
4595 22:58:48.227486 # ok 2859 # SKIP Streaming SVE set SVE get FPSIMD for VL 3216
4596 22:58:48.227719 # ok 2860 # SKIP Streaming SVE set FPSIMD get SVE for VL 3216
4597 22:58:48.227813 # ok 2861 Set Streaming SVE VL 3232
4598 22:58:48.228087 # ok 2862 # SKIP Streaming SVE set SVE get SVE for VL 3232
4599 22:58:48.228170 # ok 2863 # SKIP Streaming SVE set SVE get FPSIMD for VL 3232
4600 22:58:48.228254 # ok 2864 # SKIP Streaming SVE set FPSIMD get SVE for VL 3232
4601 22:58:48.228317 # ok 2865 Set Streaming SVE VL 3248
4602 22:58:48.228558 # ok 2866 # SKIP Streaming SVE set SVE get SVE for VL 3248
4603 22:58:48.229680 # ok 2867 # SKIP Streaming SVE set SVE get FPSIMD for VL 3248
4604 22:58:48.229982 # ok 2868 # SKIP Streaming SVE set FPSIMD get SVE for VL 3248
4605 22:58:48.230073 # ok 2869 Set Streaming SVE VL 3264
4606 22:58:48.230158 # ok 2870 # SKIP Streaming SVE set SVE get SVE for VL 3264
4607 22:58:48.230242 # ok 2871 # SKIP Streaming SVE set SVE get FPSIMD for VL 3264
4608 22:58:48.230327 # ok 2872 # SKIP Streaming SVE set FPSIMD get SVE for VL 3264
4609 22:58:48.230410 # ok 2873 Set Streaming SVE VL 3280
4610 22:58:48.230493 # ok 2874 # SKIP Streaming SVE set SVE get SVE for VL 3280
4611 22:58:48.230576 # ok 2875 # SKIP Streaming SVE set SVE get FPSIMD for VL 3280
4612 22:58:48.230676 # ok 2876 # SKIP Streaming SVE set FPSIMD get SVE for VL 3280
4613 22:58:48.230762 # ok 2877 Set Streaming SVE VL 3296
4614 22:58:48.236354 # ok 2878 # SKIP Streaming SVE set SVE get SVE for VL 3296
4615 22:58:48.236542 # ok 2879 # SKIP Streaming SVE set SVE get FPSIMD for VL 3296
4616 22:58:48.236633 # ok 2880 # SKIP Streaming SVE set FPSIMD get SVE for VL 3296
4617 22:58:48.236709 # ok 2881 Set Streaming SVE VL 3312
4618 22:58:48.237040 # ok 2882 # SKIP Streaming SVE set SVE get SVE for VL 3312
4619 22:58:48.240077 # ok 2883 # SKIP Streaming SVE set SVE get FPSIMD for VL 3312
4620 22:58:48.240468 # ok 2884 # SKIP Streaming SVE set FPSIMD get SVE for VL 3312
4621 22:58:48.240544 # ok 2885 Set Streaming SVE VL 3328
4622 22:58:48.240614 # ok 2886 # SKIP Streaming SVE set SVE get SVE for VL 3328
4623 22:58:48.240691 # ok 2887 # SKIP Streaming SVE set SVE get FPSIMD for VL 3328
4624 22:58:48.240753 # ok 2888 # SKIP Streaming SVE set FPSIMD get SVE for VL 3328
4625 22:58:48.240813 # ok 2889 Set Streaming SVE VL 3344
4626 22:58:48.240875 # ok 2890 # SKIP Streaming SVE set SVE get SVE for VL 3344
4627 22:58:48.240935 # ok 2891 # SKIP Streaming SVE set SVE get FPSIMD for VL 3344
4628 22:58:48.241015 # ok 2892 # SKIP Streaming SVE set FPSIMD get SVE for VL 3344
4629 22:58:48.241282 # ok 2893 Set Streaming SVE VL 3360
4630 22:58:48.241375 # ok 2894 # SKIP Streaming SVE set SVE get SVE for VL 3360
4631 22:58:48.241446 # ok 2895 # SKIP Streaming SVE set SVE get FPSIMD for VL 3360
4632 22:58:48.241508 # ok 2896 # SKIP Streaming SVE set FPSIMD get SVE for VL 3360
4633 22:58:48.241568 # ok 2897 Set Streaming SVE VL 3376
4634 22:58:48.241640 # ok 2898 # SKIP Streaming SVE set SVE get SVE for VL 3376
4635 22:58:48.241725 # ok 2899 # SKIP Streaming SVE set SVE get FPSIMD for VL 3376
4636 22:58:48.241788 # ok 2900 # SKIP Streaming SVE set FPSIMD get SVE for VL 3376
4637 22:58:48.241859 # ok 2901 Set Streaming SVE VL 3392
4638 22:58:48.242106 # ok 2902 # SKIP Streaming SVE set SVE get SVE for VL 3392
4639 22:58:48.242351 # ok 2903 # SKIP Streaming SVE set SVE get FPSIMD for VL 3392
4640 22:58:48.242439 # ok 2904 # SKIP Streaming SVE set FPSIMD get SVE for VL 3392
4641 22:58:48.242519 # ok 2905 Set Streaming SVE VL 3408
4642 22:58:48.250600 # ok 2906 # SKIP Streaming SVE set SVE get SVE for VL 3408
4643 22:58:48.252250 # ok 2907 # SKIP Streaming SVE set SVE get FPSIMD for VL 3408
4644 22:58:48.252389 # ok 2908 # SKIP Streaming SVE set FPSIMD get SVE for VL 3408
4645 22:58:48.252483 # ok 2909 Set Streaming SVE VL 3424
4646 22:58:48.252571 # ok 2910 # SKIP Streaming SVE set SVE get SVE for VL 3424
4647 22:58:48.252844 # ok 2911 # SKIP Streaming SVE set SVE get FPSIMD for VL 3424
4648 22:58:48.252925 # ok 2912 # SKIP Streaming SVE set FPSIMD get SVE for VL 3424
4649 22:58:48.253014 # ok 2913 Set Streaming SVE VL 3440
4650 22:58:48.253290 # ok 2914 # SKIP Streaming SVE set SVE get SVE for VL 3440
4651 22:58:48.253573 # ok 2915 # SKIP Streaming SVE set SVE get FPSIMD for VL 3440
4652 22:58:48.253662 # ok 2916 # SKIP Streaming SVE set FPSIMD get SVE for VL 3440
4653 22:58:48.253751 # ok 2917 Set Streaming SVE VL 3456
4654 22:58:48.253851 # ok 2918 # SKIP Streaming SVE set SVE get SVE for VL 3456
4655 22:58:48.254128 # ok 2919 # SKIP Streaming SVE set SVE get FPSIMD for VL 3456
4656 22:58:48.254416 # ok 2920 # SKIP Streaming SVE set FPSIMD get SVE for VL 3456
4657 22:58:48.254514 # ok 2921 Set Streaming SVE VL 3472
4658 22:58:48.254598 # ok 2922 # SKIP Streaming SVE set SVE get SVE for VL 3472
4659 22:58:48.264115 # ok 2923 # SKIP Streaming SVE set SVE get FPSIMD for VL 3472
4660 22:58:48.264349 # ok 2924 # SKIP Streaming SVE set FPSIMD get SVE for VL 3472
4661 22:58:48.264635 # ok 2925 Set Streaming SVE VL 3488
4662 22:58:48.264730 # ok 2926 # SKIP Streaming SVE set SVE get SVE for VL 3488
4663 22:58:48.264807 # ok 2927 # SKIP Streaming SVE set SVE get FPSIMD for VL 3488
4664 22:58:48.264907 # ok 2928 # SKIP Streaming SVE set FPSIMD get SVE for VL 3488
4665 22:58:48.264986 # ok 2929 Set Streaming SVE VL 3504
4666 22:58:48.265065 # ok 2930 # SKIP Streaming SVE set SVE get SVE for VL 3504
4667 22:58:48.265164 # ok 2931 # SKIP Streaming SVE set SVE get FPSIMD for VL 3504
4668 22:58:48.265473 # ok 2932 # SKIP Streaming SVE set FPSIMD get SVE for VL 3504
4669 22:58:48.265563 # ok 2933 Set Streaming SVE VL 3520
4670 22:58:48.266499 # ok 2934 # SKIP Streaming SVE set SVE get SVE for VL 3520
4671 22:58:48.266597 # ok 2935 # SKIP Streaming SVE set SVE get FPSIMD for VL 3520
4672 22:58:48.266867 # ok 2936 # SKIP Streaming SVE set FPSIMD get SVE for VL 3520
4673 22:58:48.266961 # ok 2937 Set Streaming SVE VL 3536
4674 22:58:48.267047 # ok 2938 # SKIP Streaming SVE set SVE get SVE for VL 3536
4675 22:58:48.267131 # ok 2939 # SKIP Streaming SVE set SVE get FPSIMD for VL 3536
4676 22:58:48.273749 # ok 2940 # SKIP Streaming SVE set FPSIMD get SVE for VL 3536
4677 22:58:48.274214 # ok 2941 Set Streaming SVE VL 3552
4678 22:58:48.274317 # ok 2942 # SKIP Streaming SVE set SVE get SVE for VL 3552
4679 22:58:48.274408 # ok 2943 # SKIP Streaming SVE set SVE get FPSIMD for VL 3552
4680 22:58:48.274510 # ok 2944 # SKIP Streaming SVE set FPSIMD get SVE for VL 3552
4681 22:58:48.274597 # ok 2945 Set Streaming SVE VL 3568
4682 22:58:48.284284 # ok 2946 # SKIP Streaming SVE set SVE get SVE for VL 3568
4683 22:58:48.284749 # ok 2947 # SKIP Streaming SVE set SVE get FPSIMD for VL 3568
4684 22:58:48.284850 # ok 2948 # SKIP Streaming SVE set FPSIMD get SVE for VL 3568
4685 22:58:48.284936 # ok 2949 Set Streaming SVE VL 3584
4686 22:58:48.285035 # ok 2950 # SKIP Streaming SVE set SVE get SVE for VL 3584
4687 22:58:48.285310 # ok 2951 # SKIP Streaming SVE set SVE get FPSIMD for VL 3584
4688 22:58:48.285414 # ok 2952 # SKIP Streaming SVE set FPSIMD get SVE for VL 3584
4689 22:58:48.285529 # ok 2953 Set Streaming SVE VL 3600
4690 22:58:48.285633 # ok 2954 # SKIP Streaming SVE set SVE get SVE for VL 3600
4691 22:58:48.285744 # ok 2955 # SKIP Streaming SVE set SVE get FPSIMD for VL 3600
4692 22:58:48.286048 # ok 2956 # SKIP Streaming SVE set FPSIMD get SVE for VL 3600
4693 22:58:48.286150 # ok 2957 Set Streaming SVE VL 3616
4694 22:58:48.286251 # ok 2958 # SKIP Streaming SVE set SVE get SVE for VL 3616
4695 22:58:48.286352 # ok 2959 # SKIP Streaming SVE set SVE get FPSIMD for VL 3616
4696 22:58:48.286452 # ok 2960 # SKIP Streaming SVE set FPSIMD get SVE for VL 3616
4697 22:58:48.289245 # ok 2961 Set Streaming SVE VL 3632
4698 22:58:48.289677 # ok 2962 # SKIP Streaming SVE set SVE get SVE for VL 3632
4699 22:58:48.289783 # ok 2963 # SKIP Streaming SVE set SVE get FPSIMD for VL 3632
4700 22:58:48.289874 # ok 2964 # SKIP Streaming SVE set FPSIMD get SVE for VL 3632
4701 22:58:48.289981 # ok 2965 Set Streaming SVE VL 3648
4702 22:58:48.290074 # ok 2966 # SKIP Streaming SVE set SVE get SVE for VL 3648
4703 22:58:48.290183 # ok 2967 # SKIP Streaming SVE set SVE get FPSIMD for VL 3648
4704 22:58:48.290292 # ok 2968 # SKIP Streaming SVE set FPSIMD get SVE for VL 3648
4705 22:58:48.290404 # ok 2969 Set Streaming SVE VL 3664
4706 22:58:48.299758 # ok 2970 # SKIP Streaming SVE set SVE get SVE for VL 3664
4707 22:58:48.300290 # ok 2971 # SKIP Streaming SVE set SVE get FPSIMD for VL 3664
4708 22:58:48.300436 # ok 2972 # SKIP Streaming SVE set FPSIMD get SVE for VL 3664
4709 22:58:48.300533 # ok 2973 Set Streaming SVE VL 3680
4710 22:58:48.300618 # ok 2974 # SKIP Streaming SVE set SVE get SVE for VL 3680
4711 22:58:48.300709 # ok 2975 # SKIP Streaming SVE set SVE get FPSIMD for VL 3680
4712 22:58:48.300780 # ok 2976 # SKIP Streaming SVE set FPSIMD get SVE for VL 3680
4713 22:58:48.300844 # ok 2977 Set Streaming SVE VL 3696
4714 22:58:48.300928 # ok 2978 # SKIP Streaming SVE set SVE get SVE for VL 3696
4715 22:58:48.301011 # ok 2979 # SKIP Streaming SVE set SVE get FPSIMD for VL 3696
4716 22:58:48.301296 # ok 2980 # SKIP Streaming SVE set FPSIMD get SVE for VL 3696
4717 22:58:48.301411 # ok 2981 Set Streaming SVE VL 3712
4718 22:58:48.301794 # ok 2982 # SKIP Streaming SVE set SVE get SVE for VL 3712
4719 22:58:48.301897 # ok 2983 # SKIP Streaming SVE set SVE get FPSIMD for VL 3712
4720 22:58:48.302007 # ok 2984 # SKIP Streaming SVE set FPSIMD get SVE for VL 3712
4721 22:58:48.302103 # ok 2985 Set Streaming SVE VL 3728
4722 22:58:48.302174 # ok 2986 # SKIP Streaming SVE set SVE get SVE for VL 3728
4723 22:58:48.302266 # ok 2987 # SKIP Streaming SVE set SVE get FPSIMD for VL 3728
4724 22:58:48.302337 # ok 2988 # SKIP Streaming SVE set FPSIMD get SVE for VL 3728
4725 22:58:48.302446 # ok 2989 Set Streaming SVE VL 3744
4726 22:58:48.308790 # ok 2990 # SKIP Streaming SVE set SVE get SVE for VL 3744
4727 22:58:48.309235 # ok 2991 # SKIP Streaming SVE set SVE get FPSIMD for VL 3744
4728 22:58:48.309393 # ok 2992 # SKIP Streaming SVE set FPSIMD get SVE for VL 3744
4729 22:58:48.309514 # ok 2993 Set Streaming SVE VL 3760
4730 22:58:48.309662 # ok 2994 # SKIP Streaming SVE set SVE get SVE for VL 3760
4731 22:58:48.309774 # ok 2995 # SKIP Streaming SVE set SVE get FPSIMD for VL 3760
4732 22:58:48.309866 # ok 2996 # SKIP Streaming SVE set FPSIMD get SVE for VL 3760
4733 22:58:48.309968 # ok 2997 Set Streaming SVE VL 3776
4734 22:58:48.310080 # ok 2998 # SKIP Streaming SVE set SVE get SVE for VL 3776
4735 22:58:48.310208 # ok 2999 # SKIP Streaming SVE set SVE get FPSIMD for VL 3776
4736 22:58:48.310349 # ok 3000 # SKIP Streaming SVE set FPSIMD get SVE for VL 3776
4737 22:58:48.310493 # ok 3001 Set Streaming SVE VL 3792
4738 22:58:48.310602 # ok 3002 # SKIP Streaming SVE set SVE get SVE for VL 3792
4739 22:58:48.315804 # ok 3003 # SKIP Streaming SVE set SVE get FPSIMD for VL 3792
4740 22:58:48.316205 # ok 3004 # SKIP Streaming SVE set FPSIMD get SVE for VL 3792
4741 22:58:48.316340 # ok 3005 Set Streaming SVE VL 3808
4742 22:58:48.316458 # ok 3006 # SKIP Streaming SVE set SVE get SVE for VL 3808
4743 22:58:48.316549 # ok 3007 # SKIP Streaming SVE set SVE get FPSIMD for VL 3808
4744 22:58:48.316632 # ok 3008 # SKIP Streaming SVE set FPSIMD get SVE for VL 3808
4745 22:58:48.317882 # ok 3009 Set Streaming SVE VL 3824
4746 22:58:48.318203 # ok 3010 # SKIP Streaming SVE set SVE get SVE for VL 3824
4747 22:58:48.318303 # ok 3011 # SKIP Streaming SVE set SVE get FPSIMD for VL 3824
4748 22:58:48.318436 # ok 3012 # SKIP Streaming SVE set FPSIMD get SVE for VL 3824
4749 22:58:48.318559 # ok 3013 Set Streaming SVE VL 3840
4750 22:58:48.319428 # ok 3014 # SKIP Streaming SVE set SVE get SVE for VL 3840
4751 22:58:48.319727 # ok 3015 # SKIP Streaming SVE set SVE get FPSIMD for VL 3840
4752 22:58:48.319831 # ok 3016 # SKIP Streaming SVE set FPSIMD get SVE for VL 3840
4753 22:58:48.320185 # ok 3017 Set Streaming SVE VL 3856
4754 22:58:48.320296 # ok 3018 # SKIP Streaming SVE set SVE get SVE for VL 3856
4755 22:58:48.320410 # ok 3019 # SKIP Streaming SVE set SVE get FPSIMD for VL 3856
4756 22:58:48.320503 # ok 3020 # SKIP Streaming SVE set FPSIMD get SVE for VL 3856
4757 22:58:48.320792 # ok 3021 Set Streaming SVE VL 3872
4758 22:58:48.320892 # ok 3022 # SKIP Streaming SVE set SVE get SVE for VL 3872
4759 22:58:48.320969 # ok 3023 # SKIP Streaming SVE set SVE get FPSIMD for VL 3872
4760 22:58:48.321058 # ok 3024 # SKIP Streaming SVE set FPSIMD get SVE for VL 3872
4761 22:58:48.321156 # ok 3025 Set Streaming SVE VL 3888
4762 22:58:48.321237 # ok 3026 # SKIP Streaming SVE set SVE get SVE for VL 3888
4763 22:58:48.327920 # ok 3027 # SKIP Streaming SVE set SVE get FPSIMD for VL 3888
4764 22:58:48.328458 # ok 3028 # SKIP Streaming SVE set FPSIMD get SVE for VL 3888
4765 22:58:48.328551 # ok 3029 Set Streaming SVE VL 3904
4766 22:58:48.328630 # ok 3030 # SKIP Streaming SVE set SVE get SVE for VL 3904
4767 22:58:48.328706 # ok 3031 # SKIP Streaming SVE set SVE get FPSIMD for VL 3904
4768 22:58:48.328792 # ok 3032 # SKIP Streaming SVE set FPSIMD get SVE for VL 3904
4769 22:58:48.328864 # ok 3033 Set Streaming SVE VL 3920
4770 22:58:48.328935 # ok 3034 # SKIP Streaming SVE set SVE get SVE for VL 3920
4771 22:58:48.329018 # ok 3035 # SKIP Streaming SVE set SVE get FPSIMD for VL 3920
4772 22:58:48.329109 # ok 3036 # SKIP Streaming SVE set FPSIMD get SVE for VL 3920
4773 22:58:48.329427 # ok 3037 Set Streaming SVE VL 3936
4774 22:58:48.329519 # ok 3038 # SKIP Streaming SVE set SVE get SVE for VL 3936
4775 22:58:48.329604 # ok 3039 # SKIP Streaming SVE set SVE get FPSIMD for VL 3936
4776 22:58:48.329898 # ok 3040 # SKIP Streaming SVE set FPSIMD get SVE for VL 3936
4777 22:58:48.329992 # ok 3041 Set Streaming SVE VL 3952
4778 22:58:48.330079 # ok 3042 # SKIP Streaming SVE set SVE get SVE for VL 3952
4779 22:58:48.330156 # ok 3043 # SKIP Streaming SVE set SVE get FPSIMD for VL 3952
4780 22:58:48.330445 # ok 3044 # SKIP Streaming SVE set FPSIMD get SVE for VL 3952
4781 22:58:48.330554 # ok 3045 Set Streaming SVE VL 3968
4782 22:58:48.336179 # ok 3046 # SKIP Streaming SVE set SVE get SVE for VL 3968
4783 22:58:48.336650 # ok 3047 # SKIP Streaming SVE set SVE get FPSIMD for VL 3968
4784 22:58:48.336762 # ok 3048 # SKIP Streaming SVE set FPSIMD get SVE for VL 3968
4785 22:58:48.336852 # ok 3049 Set Streaming SVE VL 3984
4786 22:58:48.336937 # ok 3050 # SKIP Streaming SVE set SVE get SVE for VL 3984
4787 22:58:48.337039 # ok 3051 # SKIP Streaming SVE set SVE get FPSIMD for VL 3984
4788 22:58:48.337124 # ok 3052 # SKIP Streaming SVE set FPSIMD get SVE for VL 3984
4789 22:58:48.337207 # ok 3053 Set Streaming SVE VL 4000
4790 22:58:48.337304 # ok 3054 # SKIP Streaming SVE set SVE get SVE for VL 4000
4791 22:58:48.337401 # ok 3055 # SKIP Streaming SVE set SVE get FPSIMD for VL 4000
4792 22:58:48.337495 # ok 3056 # SKIP Streaming SVE set FPSIMD get SVE for VL 4000
4793 22:58:48.337591 # ok 3057 Set Streaming SVE VL 4016
4794 22:58:48.337695 # ok 3058 # SKIP Streaming SVE set SVE get SVE for VL 4016
4795 22:58:48.338205 # ok 3059 # SKIP Streaming SVE set SVE get FPSIMD for VL 4016
4796 22:58:48.338301 # ok 3060 # SKIP Streaming SVE set FPSIMD get SVE for VL 4016
4797 22:58:48.338382 # ok 3061 Set Streaming SVE VL 4032
4798 22:58:48.338632 # ok 3062 # SKIP Streaming SVE set SVE get SVE for VL 4032
4799 22:58:48.338699 # ok 3063 # SKIP Streaming SVE set SVE get FPSIMD for VL 4032
4800 22:58:48.343895 # ok 3064 # SKIP Streaming SVE set FPSIMD get SVE for VL 4032
4801 22:58:48.344317 # ok 3065 Set Streaming SVE VL 4048
4802 22:58:48.344416 # ok 3066 # SKIP Streaming SVE set SVE get SVE for VL 4048
4803 22:58:48.344540 # ok 3067 # SKIP Streaming SVE set SVE get FPSIMD for VL 4048
4804 22:58:48.344682 # ok 3068 # SKIP Streaming SVE set FPSIMD get SVE for VL 4048
4805 22:58:48.344805 # ok 3069 Set Streaming SVE VL 4064
4806 22:58:48.344949 # ok 3070 # SKIP Streaming SVE set SVE get SVE for VL 4064
4807 22:58:48.345098 # ok 3071 # SKIP Streaming SVE set SVE get FPSIMD for VL 4064
4808 22:58:48.345330 # ok 3072 # SKIP Streaming SVE set FPSIMD get SVE for VL 4064
4809 22:58:48.345506 # ok 3073 Set Streaming SVE VL 4080
4810 22:58:48.345631 # ok 3074 # SKIP Streaming SVE set SVE get SVE for VL 4080
4811 22:58:48.345789 # ok 3075 # SKIP Streaming SVE set SVE get FPSIMD for VL 4080
4812 22:58:48.345916 # ok 3076 # SKIP Streaming SVE set FPSIMD get SVE for VL 4080
4813 22:58:48.346085 # ok 3077 Set Streaming SVE VL 4096
4814 22:58:48.346211 # ok 3078 # SKIP Streaming SVE set SVE get SVE for VL 4096
4815 22:58:48.346328 # ok 3079 # SKIP Streaming SVE set SVE get FPSIMD for VL 4096
4816 22:58:48.346470 # ok 3080 # SKIP Streaming SVE set FPSIMD get SVE for VL 4096
4817 22:58:48.346591 # ok 3081 Set Streaming SVE VL 4112
4818 22:58:48.346707 # ok 3082 # SKIP Streaming SVE set SVE get SVE for VL 4112
4819 22:58:48.352060 # ok 3083 # SKIP Streaming SVE set SVE get FPSIMD for VL 4112
4820 22:58:48.352408 # ok 3084 # SKIP Streaming SVE set FPSIMD get SVE for VL 4112
4821 22:58:48.352544 # ok 3085 Set Streaming SVE VL 4128
4822 22:58:48.352692 # ok 3086 # SKIP Streaming SVE set SVE get SVE for VL 4128
4823 22:58:48.353079 # ok 3087 # SKIP Streaming SVE set SVE get FPSIMD for VL 4128
4824 22:58:48.353254 # ok 3088 # SKIP Streaming SVE set FPSIMD get SVE for VL 4128
4825 22:58:48.353408 # ok 3089 Set Streaming SVE VL 4144
4826 22:58:48.353555 # ok 3090 # SKIP Streaming SVE set SVE get SVE for VL 4144
4827 22:58:48.353933 # ok 3091 # SKIP Streaming SVE set SVE get FPSIMD for VL 4144
4828 22:58:48.354055 # ok 3092 # SKIP Streaming SVE set FPSIMD get SVE for VL 4144
4829 22:58:48.354339 # ok 3093 Set Streaming SVE VL 4160
4830 22:58:48.354433 # ok 3094 # SKIP Streaming SVE set SVE get SVE for VL 4160
4831 22:58:48.354533 # ok 3095 # SKIP Streaming SVE set SVE get FPSIMD for VL 4160
4832 22:58:48.359581 # ok 3096 # SKIP Streaming SVE set FPSIMD get SVE for VL 4160
4833 22:58:48.360036 # ok 3097 Set Streaming SVE VL 4176
4834 22:58:48.360142 # ok 3098 # SKIP Streaming SVE set SVE get SVE for VL 4176
4835 22:58:48.360232 # ok 3099 # SKIP Streaming SVE set SVE get FPSIMD for VL 4176
4836 22:58:48.360319 # ok 3100 # SKIP Streaming SVE set FPSIMD get SVE for VL 4176
4837 22:58:48.360421 # ok 3101 Set Streaming SVE VL 4192
4838 22:58:48.360509 # ok 3102 # SKIP Streaming SVE set SVE get SVE for VL 4192
4839 22:58:48.360594 # ok 3103 # SKIP Streaming SVE set SVE get FPSIMD for VL 4192
4840 22:58:48.360694 # ok 3104 # SKIP Streaming SVE set FPSIMD get SVE for VL 4192
4841 22:58:48.360780 # ok 3105 Set Streaming SVE VL 4208
4842 22:58:48.360879 # ok 3106 # SKIP Streaming SVE set SVE get SVE for VL 4208
4843 22:58:48.360966 # ok 3107 # SKIP Streaming SVE set SVE get FPSIMD for VL 4208
4844 22:58:48.361066 # ok 3108 # SKIP Streaming SVE set FPSIMD get SVE for VL 4208
4845 22:58:48.361151 # ok 3109 Set Streaming SVE VL 4224
4846 22:58:48.361434 # ok 3110 # SKIP Streaming SVE set SVE get SVE for VL 4224
4847 22:58:48.361697 # ok 3111 # SKIP Streaming SVE set SVE get FPSIMD for VL 4224
4848 22:58:48.361800 # ok 3112 # SKIP Streaming SVE set FPSIMD get SVE for VL 4224
4849 22:58:48.361886 # ok 3113 Set Streaming SVE VL 4240
4850 22:58:48.361970 # ok 3114 # SKIP Streaming SVE set SVE get SVE for VL 4240
4851 22:58:48.362054 # ok 3115 # SKIP Streaming SVE set SVE get FPSIMD for VL 4240
4852 22:58:48.362154 # ok 3116 # SKIP Streaming SVE set FPSIMD get SVE for VL 4240
4853 22:58:48.362240 # ok 3117 Set Streaming SVE VL 4256
4854 22:58:48.362324 # ok 3118 # SKIP Streaming SVE set SVE get SVE for VL 4256
4855 22:58:48.362412 # ok 3119 # SKIP Streaming SVE set SVE get FPSIMD for VL 4256
4856 22:58:48.362513 # ok 3120 # SKIP Streaming SVE set FPSIMD get SVE for VL 4256
4857 22:58:48.362597 # ok 3121 Set Streaming SVE VL 4272
4858 22:58:48.362679 # ok 3122 # SKIP Streaming SVE set SVE get SVE for VL 4272
4859 22:58:48.364338 # ok 3123 # SKIP Streaming SVE set SVE get FPSIMD for VL 4272
4860 22:58:48.364470 # ok 3124 # SKIP Streaming SVE set FPSIMD get SVE for VL 4272
4861 22:58:48.364759 # ok 3125 Set Streaming SVE VL 4288
4862 22:58:48.364862 # ok 3126 # SKIP Streaming SVE set SVE get SVE for VL 4288
4863 22:58:48.364948 # ok 3127 # SKIP Streaming SVE set SVE get FPSIMD for VL 4288
4864 22:58:48.365049 # ok 3128 # SKIP Streaming SVE set FPSIMD get SVE for VL 4288
4865 22:58:48.365136 # ok 3129 Set Streaming SVE VL 4304
4866 22:58:48.365220 # ok 3130 # SKIP Streaming SVE set SVE get SVE for VL 4304
4867 22:58:48.365320 # ok 3131 # SKIP Streaming SVE set SVE get FPSIMD for VL 4304
4868 22:58:48.365418 # ok 3132 # SKIP Streaming SVE set FPSIMD get SVE for VL 4304
4869 22:58:48.365503 # ok 3133 Set Streaming SVE VL 4320
4870 22:58:48.365602 # ok 3134 # SKIP Streaming SVE set SVE get SVE for VL 4320
4871 22:58:48.365701 # ok 3135 # SKIP Streaming SVE set SVE get FPSIMD for VL 4320
4872 22:58:48.365786 # ok 3136 # SKIP Streaming SVE set FPSIMD get SVE for VL 4320
4873 22:58:48.365884 # ok 3137 Set Streaming SVE VL 4336
4874 22:58:48.365969 # ok 3138 # SKIP Streaming SVE set SVE get SVE for VL 4336
4875 22:58:48.366066 # ok 3139 # SKIP Streaming SVE set SVE get FPSIMD for VL 4336
4876 22:58:48.366164 # ok 3140 # SKIP Streaming SVE set FPSIMD get SVE for VL 4336
4877 22:58:48.366261 # ok 3141 Set Streaming SVE VL 4352
4878 22:58:48.366359 # ok 3142 # SKIP Streaming SVE set SVE get SVE for VL 4352
4879 22:58:48.371347 # ok 3143 # SKIP Streaming SVE set SVE get FPSIMD for VL 4352
4880 22:58:48.371806 # ok 3144 # SKIP Streaming SVE set FPSIMD get SVE for VL 4352
4881 22:58:48.371910 # ok 3145 Set Streaming SVE VL 4368
4882 22:58:48.371999 # ok 3146 # SKIP Streaming SVE set SVE get SVE for VL 4368
4883 22:58:48.372081 # ok 3147 # SKIP Streaming SVE set SVE get FPSIMD for VL 4368
4884 22:58:48.372181 # ok 3148 # SKIP Streaming SVE set FPSIMD get SVE for VL 4368
4885 22:58:48.372265 # ok 3149 Set Streaming SVE VL 4384
4886 22:58:48.372364 # ok 3150 # SKIP Streaming SVE set SVE get SVE for VL 4384
4887 22:58:48.372462 # ok 3151 # SKIP Streaming SVE set SVE get FPSIMD for VL 4384
4888 22:58:48.372561 # ok 3152 # SKIP Streaming SVE set FPSIMD get SVE for VL 4384
4889 22:58:48.372953 # ok 3153 Set Streaming SVE VL 4400
4890 22:58:48.373061 # ok 3154 # SKIP Streaming SVE set SVE get SVE for VL 4400
4891 22:58:48.373343 # ok 3155 # SKIP Streaming SVE set SVE get FPSIMD for VL 4400
4892 22:58:48.373460 # ok 3156 # SKIP Streaming SVE set FPSIMD get SVE for VL 4400
4893 22:58:48.373547 # ok 3157 Set Streaming SVE VL 4416
4894 22:58:48.373643 # ok 3158 # SKIP Streaming SVE set SVE get SVE for VL 4416
4895 22:58:48.373753 # ok 3159 # SKIP Streaming SVE set SVE get FPSIMD for VL 4416
4896 22:58:48.373974 # ok 3160 # SKIP Streaming SVE set FPSIMD get SVE for VL 4416
4897 22:58:48.374094 # ok 3161 Set Streaming SVE VL 4432
4898 22:58:48.374396 # ok 3162 # SKIP Streaming SVE set SVE get SVE for VL 4432
4899 22:58:48.374497 # ok 3163 # SKIP Streaming SVE set SVE get FPSIMD for VL 4432
4900 22:58:48.379661 # ok 3164 # SKIP Streaming SVE set FPSIMD get SVE for VL 4432
4901 22:58:48.379902 # ok 3165 Set Streaming SVE VL 4448
4902 22:58:48.380203 # ok 3166 # SKIP Streaming SVE set SVE get SVE for VL 4448
4903 22:58:48.380305 # ok 3167 # SKIP Streaming SVE set SVE get FPSIMD for VL 4448
4904 22:58:48.380393 # ok 3168 # SKIP Streaming SVE set FPSIMD get SVE for VL 4448
4905 22:58:48.380478 # ok 3169 Set Streaming SVE VL 4464
4906 22:58:48.380579 # ok 3170 # SKIP Streaming SVE set SVE get SVE for VL 4464
4907 22:58:48.380667 # ok 3171 # SKIP Streaming SVE set SVE get FPSIMD for VL 4464
4908 22:58:48.380766 # ok 3172 # SKIP Streaming SVE set FPSIMD get SVE for VL 4464
4909 22:58:48.380853 # ok 3173 Set Streaming SVE VL 4480
4910 22:58:48.381195 # ok 3174 # SKIP Streaming SVE set SVE get SVE for VL 4480
4911 22:58:48.381319 # ok 3175 # SKIP Streaming SVE set SVE get FPSIMD for VL 4480
4912 22:58:48.381410 # ok 3176 # SKIP Streaming SVE set FPSIMD get SVE for VL 4480
4913 22:58:48.382585 # ok 3177 Set Streaming SVE VL 4496
4914 22:58:48.387527 # ok 3178 # SKIP Streaming SVE set SVE get SVE for VL 4496
4915 22:58:48.388014 # ok 3179 # SKIP Streaming SVE set SVE get FPSIMD for VL 4496
4916 22:58:48.388116 # ok 3180 # SKIP Streaming SVE set FPSIMD get SVE for VL 4496
4917 22:58:48.388206 # ok 3181 Set Streaming SVE VL 4512
4918 22:58:48.388294 # ok 3182 # SKIP Streaming SVE set SVE get SVE for VL 4512
4919 22:58:48.388378 # ok 3183 # SKIP Streaming SVE set SVE get FPSIMD for VL 4512
4920 22:58:48.388482 # ok 3184 # SKIP Streaming SVE set FPSIMD get SVE for VL 4512
4921 22:58:48.388571 # ok 3185 Set Streaming SVE VL 4528
4922 22:58:48.388658 # ok 3186 # SKIP Streaming SVE set SVE get SVE for VL 4528
4923 22:58:48.388745 # ok 3187 # SKIP Streaming SVE set SVE get FPSIMD for VL 4528
4924 22:58:48.388849 # ok 3188 # SKIP Streaming SVE set FPSIMD get SVE for VL 4528
4925 22:58:48.388938 # ok 3189 Set Streaming SVE VL 4544
4926 22:58:48.389024 # ok 3190 # SKIP Streaming SVE set SVE get SVE for VL 4544
4927 22:58:48.389127 # ok 3191 # SKIP Streaming SVE set SVE get FPSIMD for VL 4544
4928 22:58:48.389216 # ok 3192 # SKIP Streaming SVE set FPSIMD get SVE for VL 4544
4929 22:58:48.389303 # ok 3193 Set Streaming SVE VL 4560
4930 22:58:48.389390 # ok 3194 # SKIP Streaming SVE set SVE get SVE for VL 4560
4931 22:58:48.389492 # ok 3195 # SKIP Streaming SVE set SVE get FPSIMD for VL 4560
4932 22:58:48.389595 # ok 3196 # SKIP Streaming SVE set FPSIMD get SVE for VL 4560
4933 22:58:48.389693 # ok 3197 Set Streaming SVE VL 4576
4934 22:58:48.389799 # ok 3198 # SKIP Streaming SVE set SVE get SVE for VL 4576
4935 22:58:48.389887 # ok 3199 # SKIP Streaming SVE set SVE get FPSIMD for VL 4576
4936 22:58:48.389988 # ok 3200 # SKIP Streaming SVE set FPSIMD get SVE for VL 4576
4937 22:58:48.390074 # ok 3201 Set Streaming SVE VL 4592
4938 22:58:48.390177 # ok 3202 # SKIP Streaming SVE set SVE get SVE for VL 4592
4939 22:58:48.390261 # ok 3203 # SKIP Streaming SVE set SVE get FPSIMD for VL 4592
4940 22:58:48.390357 # ok 3204 # SKIP Streaming SVE set FPSIMD get SVE for VL 4592
4941 22:58:48.390441 # ok 3205 Set Streaming SVE VL 4608
4942 22:58:48.390536 # ok 3206 # SKIP Streaming SVE set SVE get SVE for VL 4608
4943 22:58:48.390621 # ok 3207 # SKIP Streaming SVE set SVE get FPSIMD for VL 4608
4944 22:58:48.395892 # ok 3208 # SKIP Streaming SVE set FPSIMD get SVE for VL 4608
4945 22:58:48.396363 # ok 3209 Set Streaming SVE VL 4624
4946 22:58:48.396469 # ok 3210 # SKIP Streaming SVE set SVE get SVE for VL 4624
4947 22:58:48.396558 # ok 3211 # SKIP Streaming SVE set SVE get FPSIMD for VL 4624
4948 22:58:48.396644 # ok 3212 # SKIP Streaming SVE set FPSIMD get SVE for VL 4624
4949 22:58:48.396745 # ok 3213 Set Streaming SVE VL 4640
4950 22:58:48.396831 # ok 3214 # SKIP Streaming SVE set SVE get SVE for VL 4640
4951 22:58:48.396932 # ok 3215 # SKIP Streaming SVE set SVE get FPSIMD for VL 4640
4952 22:58:48.397021 # ok 3216 # SKIP Streaming SVE set FPSIMD get SVE for VL 4640
4953 22:58:48.397119 # ok 3217 Set Streaming SVE VL 4656
4954 22:58:48.397219 # ok 3218 # SKIP Streaming SVE set SVE get SVE for VL 4656
4955 22:58:48.397318 # ok 3219 # SKIP Streaming SVE set SVE get FPSIMD for VL 4656
4956 22:58:48.397427 # ok 3220 # SKIP Streaming SVE set FPSIMD get SVE for VL 4656
4957 22:58:48.397538 # ok 3221 Set Streaming SVE VL 4672
4958 22:58:48.397639 # ok 3222 # SKIP Streaming SVE set SVE get SVE for VL 4672
4959 22:58:48.397748 # ok 3223 # SKIP Streaming SVE set SVE get FPSIMD for VL 4672
4960 22:58:48.398035 # ok 3224 # SKIP Streaming SVE set FPSIMD get SVE for VL 4672
4961 22:58:48.398139 # ok 3225 Set Streaming SVE VL 4688
4962 22:58:48.398239 # ok 3226 # SKIP Streaming SVE set SVE get SVE for VL 4688
4963 22:58:48.398327 # ok 3227 # SKIP Streaming SVE set SVE get FPSIMD for VL 4688
4964 22:58:48.398613 # ok 3228 # SKIP Streaming SVE set FPSIMD get SVE for VL 4688
4965 22:58:48.398716 # ok 3229 Set Streaming SVE VL 4704
4966 22:58:48.405125 # ok 3230 # SKIP Streaming SVE set SVE get SVE for VL 4704
4967 22:58:48.405573 # ok 3231 # SKIP Streaming SVE set SVE get FPSIMD for VL 4704
4968 22:58:48.405706 # ok 3232 # SKIP Streaming SVE set FPSIMD get SVE for VL 4704
4969 22:58:48.405797 # ok 3233 Set Streaming SVE VL 4720
4970 22:58:48.405884 # ok 3234 # SKIP Streaming SVE set SVE get SVE for VL 4720
4971 22:58:48.405987 # ok 3235 # SKIP Streaming SVE set SVE get FPSIMD for VL 4720
4972 22:58:48.406075 # ok 3236 # SKIP Streaming SVE set FPSIMD get SVE for VL 4720
4973 22:58:48.406160 # ok 3237 Set Streaming SVE VL 4736
4974 22:58:48.406262 # ok 3238 # SKIP Streaming SVE set SVE get SVE for VL 4736
4975 22:58:48.406350 # ok 3239 # SKIP Streaming SVE set SVE get FPSIMD for VL 4736
4976 22:58:48.411488 # ok 3240 # SKIP Streaming SVE set FPSIMD get SVE for VL 4736
4977 22:58:48.411727 # ok 3241 Set Streaming SVE VL 4752
4978 22:58:48.412033 # ok 3242 # SKIP Streaming SVE set SVE get SVE for VL 4752
4979 22:58:48.412135 # ok 3243 # SKIP Streaming SVE set SVE get FPSIMD for VL 4752
4980 22:58:48.412225 # ok 3244 # SKIP Streaming SVE set FPSIMD get SVE for VL 4752
4981 22:58:48.412312 # ok 3245 Set Streaming SVE VL 4768
4982 22:58:48.412414 # ok 3246 # SKIP Streaming SVE set SVE get SVE for VL 4768
4983 22:58:48.412503 # ok 3247 # SKIP Streaming SVE set SVE get FPSIMD for VL 4768
4984 22:58:48.412610 # ok 3248 # SKIP Streaming SVE set FPSIMD get SVE for VL 4768
4985 22:58:48.412699 # ok 3249 Set Streaming SVE VL 4784
4986 22:58:48.412799 # ok 3250 # SKIP Streaming SVE set SVE get SVE for VL 4784
4987 22:58:48.413101 # ok 3251 # SKIP Streaming SVE set SVE get FPSIMD for VL 4784
4988 22:58:48.413221 # ok 3252 # SKIP Streaming SVE set FPSIMD get SVE for VL 4784
4989 22:58:48.413520 # ok 3253 Set Streaming SVE VL 4800
4990 22:58:48.413639 # ok 3254 # SKIP Streaming SVE set SVE get SVE for VL 4800
4991 22:58:48.413738 # ok 3255 # SKIP Streaming SVE set SVE get FPSIMD for VL 4800
4992 22:58:48.413838 # ok 3256 # SKIP Streaming SVE set FPSIMD get SVE for VL 4800
4993 22:58:48.413924 # ok 3257 Set Streaming SVE VL 4816
4994 22:58:48.414021 # ok 3258 # SKIP Streaming SVE set SVE get SVE for VL 4816
4995 22:58:48.414119 # ok 3259 # SKIP Streaming SVE set SVE get FPSIMD for VL 4816
4996 22:58:48.414420 # ok 3260 # SKIP Streaming SVE set FPSIMD get SVE for VL 4816
4997 22:58:48.414529 # ok 3261 Set Streaming SVE VL 4832
4998 22:58:48.419561 # ok 3262 # SKIP Streaming SVE set SVE get SVE for VL 4832
4999 22:58:48.419796 # ok 3263 # SKIP Streaming SVE set SVE get FPSIMD for VL 4832
5000 22:58:48.420126 # ok 3264 # SKIP Streaming SVE set FPSIMD get SVE for VL 4832
5001 22:58:48.420232 # ok 3265 Set Streaming SVE VL 4848
5002 22:58:48.420316 # ok 3266 # SKIP Streaming SVE set SVE get SVE for VL 4848
5003 22:58:48.420397 # ok 3267 # SKIP Streaming SVE set SVE get FPSIMD for VL 4848
5004 22:58:48.420495 # ok 3268 # SKIP Streaming SVE set FPSIMD get SVE for VL 4848
5005 22:58:48.420578 # ok 3269 Set Streaming SVE VL 4864
5006 22:58:48.420656 # ok 3270 # SKIP Streaming SVE set SVE get SVE for VL 4864
5007 22:58:48.420737 # ok 3271 # SKIP Streaming SVE set SVE get FPSIMD for VL 4864
5008 22:58:48.420834 # ok 3272 # SKIP Streaming SVE set FPSIMD get SVE for VL 4864
5009 22:58:48.420917 # ok 3273 Set Streaming SVE VL 4880
5010 22:58:48.420999 # ok 3274 # SKIP Streaming SVE set SVE get SVE for VL 4880
5011 22:58:48.421096 # ok 3275 # SKIP Streaming SVE set SVE get FPSIMD for VL 4880
5012 22:58:48.421425 # ok 3276 # SKIP Streaming SVE set FPSIMD get SVE for VL 4880
5013 22:58:48.421528 # ok 3277 Set Streaming SVE VL 4896
5014 22:58:48.421616 # ok 3278 # SKIP Streaming SVE set SVE get SVE for VL 4896
5015 22:58:48.421723 # ok 3279 # SKIP Streaming SVE set SVE get FPSIMD for VL 4896
5016 22:58:48.421807 # ok 3280 # SKIP Streaming SVE set FPSIMD get SVE for VL 4896
5017 22:58:48.421904 # ok 3281 Set Streaming SVE VL 4912
5018 22:58:48.421986 # ok 3282 # SKIP Streaming SVE set SVE get SVE for VL 4912
5019 22:58:48.422083 # ok 3283 # SKIP Streaming SVE set SVE get FPSIMD for VL 4912
5020 22:58:48.422180 # ok 3284 # SKIP Streaming SVE set FPSIMD get SVE for VL 4912
5021 22:58:48.422263 # ok 3285 Set Streaming SVE VL 4928
5022 22:58:48.422359 # ok 3286 # SKIP Streaming SVE set SVE get SVE for VL 4928
5023 22:58:48.422456 # ok 3287 # SKIP Streaming SVE set SVE get FPSIMD for VL 4928
5024 22:58:48.431676 # ok 3288 # SKIP Streaming SVE set FPSIMD get SVE for VL 4928
5025 22:58:48.431930 # ok 3289 Set Streaming SVE VL 4944
5026 22:58:48.432242 # ok 3290 # SKIP Streaming SVE set SVE get SVE for VL 4944
5027 22:58:48.432348 # ok 3291 # SKIP Streaming SVE set SVE get FPSIMD for VL 4944
5028 22:58:48.432436 # ok 3292 # SKIP Streaming SVE set FPSIMD get SVE for VL 4944
5029 22:58:48.432537 # ok 3293 Set Streaming SVE VL 4960
5030 22:58:48.432624 # ok 3294 # SKIP Streaming SVE set SVE get SVE for VL 4960
5031 22:58:48.432915 # ok 3295 # SKIP Streaming SVE set SVE get FPSIMD for VL 4960
5032 22:58:48.433020 # ok 3296 # SKIP Streaming SVE set FPSIMD get SVE for VL 4960
5033 22:58:48.433111 # ok 3297 Set Streaming SVE VL 4976
5034 22:58:48.433210 # ok 3298 # SKIP Streaming SVE set SVE get SVE for VL 4976
5035 22:58:48.433295 # ok 3299 # SKIP Streaming SVE set SVE get FPSIMD for VL 4976
5036 22:58:48.433379 # ok 3300 # SKIP Streaming SVE set FPSIMD get SVE for VL 4976
5037 22:58:48.433575 # ok 3301 Set Streaming SVE VL 4992
5038 22:58:48.433683 # ok 3302 # SKIP Streaming SVE set SVE get SVE for VL 4992
5039 22:58:48.433784 # ok 3303 # SKIP Streaming SVE set SVE get FPSIMD for VL 4992
5040 22:58:48.433883 # ok 3304 # SKIP Streaming SVE set FPSIMD get SVE for VL 4992
5041 22:58:48.433982 # ok 3305 Set Streaming SVE VL 5008
5042 22:58:48.434082 # ok 3306 # SKIP Streaming SVE set SVE get SVE for VL 5008
5043 22:58:48.434189 # ok 3307 # SKIP Streaming SVE set SVE get FPSIMD for VL 5008
5044 22:58:48.434494 # ok 3308 # SKIP Streaming SVE set FPSIMD get SVE for VL 5008
5045 22:58:48.434604 # ok 3309 Set Streaming SVE VL 5024
5046 22:58:48.447524 # ok 3310 # SKIP Streaming SVE set SVE get SVE for VL 5024
5047 22:58:48.447981 # ok 3311 # SKIP Streaming SVE set SVE get FPSIMD for VL 5024
5048 22:58:48.448085 # ok 3312 # SKIP Streaming SVE set FPSIMD get SVE for VL 5024
5049 22:58:48.448172 # ok 3313 Set Streaming SVE VL 5040
5050 22:58:48.448258 # ok 3314 # SKIP Streaming SVE set SVE get SVE for VL 5040
5051 22:58:48.448343 # ok 3315 # SKIP Streaming SVE set SVE get FPSIMD for VL 5040
5052 22:58:48.448445 # ok 3316 # SKIP Streaming SVE set FPSIMD get SVE for VL 5040
5053 22:58:48.448532 # ok 3317 Set Streaming SVE VL 5056
5054 22:58:48.448617 # ok 3318 # SKIP Streaming SVE set SVE get SVE for VL 5056
5055 22:58:48.448702 # ok 3319 # SKIP Streaming SVE set SVE get FPSIMD for VL 5056
5056 22:58:48.448802 # ok 3320 # SKIP Streaming SVE set FPSIMD get SVE for VL 5056
5057 22:58:48.448889 # ok 3321 Set Streaming SVE VL 5072
5058 22:58:48.448973 # ok 3322 # SKIP Streaming SVE set SVE get SVE for VL 5072
5059 22:58:48.449073 # ok 3323 # SKIP Streaming SVE set SVE get FPSIMD for VL 5072
5060 22:58:48.449160 # ok 3324 # SKIP Streaming SVE set FPSIMD get SVE for VL 5072
5061 22:58:48.449245 # ok 3325 Set Streaming SVE VL 5088
5062 22:58:48.449344 # ok 3326 # SKIP Streaming SVE set SVE get SVE for VL 5088
5063 22:58:48.450232 # ok 3327 # SKIP Streaming SVE set SVE get FPSIMD for VL 5088
5064 22:58:48.450539 # ok 3328 # SKIP Streaming SVE set FPSIMD get SVE for VL 5088
5065 22:58:48.450651 # ok 3329 Set Streaming SVE VL 5104
5066 22:58:48.467656 # ok 3330 # SKIP Streaming SVE set SVE get SVE for VL 5104
5067 22:58:48.467908 # ok 3331 # SKIP Streaming SVE set SVE get FPSIMD for VL 5104
5068 22:58:48.468149 # ok 3332 # SKIP Streaming SVE set FPSIMD get SVE for VL 5104
5069 22:58:48.468455 # ok 3333 Set Streaming SVE VL 5120
5070 22:58:48.468561 # ok 3334 # SKIP Streaming SVE set SVE get SVE for VL 5120
5071 22:58:48.468648 # ok 3335 # SKIP Streaming SVE set SVE get FPSIMD for VL 5120
5072 22:58:48.468735 # ok 3336 # SKIP Streaming SVE set FPSIMD get SVE for VL 5120
5073 22:58:48.468822 # ok 3337 Set Streaming SVE VL 5136
5074 22:58:48.468909 # ok 3338 # SKIP Streaming SVE set SVE get SVE for VL 5136
5075 22:58:48.469015 # ok 3339 # SKIP Streaming SVE set SVE get FPSIMD for VL 5136
5076 22:58:48.469106 # ok 3340 # SKIP Streaming SVE set FPSIMD get SVE for VL 5136
5077 22:58:48.469194 # ok 3341 Set Streaming SVE VL 5152
5078 22:58:48.469281 # ok 3342 # SKIP Streaming SVE set SVE get SVE for VL 5152
5079 22:58:48.469391 # ok 3343 # SKIP Streaming SVE set SVE get FPSIMD for VL 5152
5080 22:58:48.469481 # ok 3344 # SKIP Streaming SVE set FPSIMD get SVE for VL 5152
5081 22:58:48.469586 # ok 3345 Set Streaming SVE VL 5168
5082 22:58:48.469702 # ok 3346 # SKIP Streaming SVE set SVE get SVE for VL 5168
5083 22:58:48.469809 # ok 3347 # SKIP Streaming SVE set SVE get FPSIMD for VL 5168
5084 22:58:48.470120 # ok 3348 # SKIP Streaming SVE set FPSIMD get SVE for VL 5168
5085 22:58:48.470228 # ok 3349 Set Streaming SVE VL 5184
5086 22:58:48.470331 # ok 3350 # SKIP Streaming SVE set SVE get SVE for VL 5184
5087 22:58:48.470431 # ok 3351 # SKIP Streaming SVE set SVE get FPSIMD for VL 5184
5088 22:58:48.482562 # ok 3352 # SKIP Streaming SVE set FPSIMD get SVE for VL 5184
5089 22:58:48.482798 # ok 3353 Set Streaming SVE VL 5200
5090 22:58:48.483886 # ok 3354 # SKIP Streaming SVE set SVE get SVE for VL 5200
5091 22:58:48.484200 # ok 3355 # SKIP Streaming SVE set SVE get FPSIMD for VL 5200
5092 22:58:48.484304 # ok 3356 # SKIP Streaming SVE set FPSIMD get SVE for VL 5200
5093 22:58:48.484390 # ok 3357 Set Streaming SVE VL 5216
5094 22:58:48.484490 # ok 3358 # SKIP Streaming SVE set SVE get SVE for VL 5216
5095 22:58:48.484577 # ok 3359 # SKIP Streaming SVE set SVE get FPSIMD for VL 5216
5096 22:58:48.484677 # ok 3360 # SKIP Streaming SVE set FPSIMD get SVE for VL 5216
5097 22:58:48.484775 # ok 3361 Set Streaming SVE VL 5232
5098 22:58:48.485098 # ok 3362 # SKIP Streaming SVE set SVE get SVE for VL 5232
5099 22:58:48.485237 # ok 3363 # SKIP Streaming SVE set SVE get FPSIMD for VL 5232
5100 22:58:48.485346 # ok 3364 # SKIP Streaming SVE set FPSIMD get SVE for VL 5232
5101 22:58:48.485446 # ok 3365 Set Streaming SVE VL 5248
5102 22:58:48.485544 # ok 3366 # SKIP Streaming SVE set SVE get SVE for VL 5248
5103 22:58:48.485663 # ok 3367 # SKIP Streaming SVE set SVE get FPSIMD for VL 5248
5104 22:58:48.485961 # ok 3368 # SKIP Streaming SVE set FPSIMD get SVE for VL 5248
5105 22:58:48.486065 # ok 3369 Set Streaming SVE VL 5264
5106 22:58:48.486166 # ok 3370 # SKIP Streaming SVE set SVE get SVE for VL 5264
5107 22:58:48.486267 # ok 3371 # SKIP Streaming SVE set SVE get FPSIMD for VL 5264
5108 22:58:48.486553 # ok 3372 # SKIP Streaming SVE set FPSIMD get SVE for VL 5264
5109 22:58:48.486645 # ok 3373 Set Streaming SVE VL 5280
5110 22:58:48.493656 # ok 3374 # SKIP Streaming SVE set SVE get SVE for VL 5280
5111 22:58:48.494126 # ok 3375 # SKIP Streaming SVE set SVE get FPSIMD for VL 5280
5112 22:58:48.494235 # ok 3376 # SKIP Streaming SVE set FPSIMD get SVE for VL 5280
5113 22:58:48.494323 # ok 3377 Set Streaming SVE VL 5296
5114 22:58:48.494407 # ok 3378 # SKIP Streaming SVE set SVE get SVE for VL 5296
5115 22:58:48.494507 # ok 3379 # SKIP Streaming SVE set SVE get FPSIMD for VL 5296
5116 22:58:48.494593 # ok 3380 # SKIP Streaming SVE set FPSIMD get SVE for VL 5296
5117 22:58:48.494683 # ok 3381 Set Streaming SVE VL 5312
5118 22:58:48.499578 # ok 3382 # SKIP Streaming SVE set SVE get SVE for VL 5312
5119 22:58:48.500019 # ok 3383 # SKIP Streaming SVE set SVE get FPSIMD for VL 5312
5120 22:58:48.500130 # ok 3384 # SKIP Streaming SVE set FPSIMD get SVE for VL 5312
5121 22:58:48.500216 # ok 3385 Set Streaming SVE VL 5328
5122 22:58:48.500299 # ok 3386 # SKIP Streaming SVE set SVE get SVE for VL 5328
5123 22:58:48.500398 # ok 3387 # SKIP Streaming SVE set SVE get FPSIMD for VL 5328
5124 22:58:48.500484 # ok 3388 # SKIP Streaming SVE set FPSIMD get SVE for VL 5328
5125 22:58:48.500769 # ok 3389 Set Streaming SVE VL 5344
5126 22:58:48.500873 # ok 3390 # SKIP Streaming SVE set SVE get SVE for VL 5344
5127 22:58:48.500975 # ok 3391 # SKIP Streaming SVE set SVE get FPSIMD for VL 5344
5128 22:58:48.501060 # ok 3392 # SKIP Streaming SVE set FPSIMD get SVE for VL 5344
5129 22:58:48.501143 # ok 3393 Set Streaming SVE VL 5360
5130 22:58:48.501240 # ok 3394 # SKIP Streaming SVE set SVE get SVE for VL 5360
5131 22:58:48.501342 # ok 3395 # SKIP Streaming SVE set SVE get FPSIMD for VL 5360
5132 22:58:48.501715 # ok 3396 # SKIP Streaming SVE set FPSIMD get SVE for VL 5360
5133 22:58:48.501819 # ok 3397 Set Streaming SVE VL 5376
5134 22:58:48.501904 # ok 3398 # SKIP Streaming SVE set SVE get SVE for VL 5376
5135 22:58:48.502005 # ok 3399 # SKIP Streaming SVE set SVE get FPSIMD for VL 5376
5136 22:58:48.502104 # ok 3400 # SKIP Streaming SVE set FPSIMD get SVE for VL 5376
5137 22:58:48.502203 # ok 3401 Set Streaming SVE VL 5392
5138 22:58:48.502303 # ok 3402 # SKIP Streaming SVE set SVE get SVE for VL 5392
5139 22:58:48.502408 # ok 3403 # SKIP Streaming SVE set SVE get FPSIMD for VL 5392
5140 22:58:48.507867 # ok 3404 # SKIP Streaming SVE set FPSIMD get SVE for VL 5392
5141 22:58:48.508106 # ok 3405 Set Streaming SVE VL 5408
5142 22:58:48.508404 # ok 3406 # SKIP Streaming SVE set SVE get SVE for VL 5408
5143 22:58:48.508497 # ok 3407 # SKIP Streaming SVE set SVE get FPSIMD for VL 5408
5144 22:58:48.508584 # ok 3408 # SKIP Streaming SVE set FPSIMD get SVE for VL 5408
5145 22:58:48.508670 # ok 3409 Set Streaming SVE VL 5424
5146 22:58:48.508754 # ok 3410 # SKIP Streaming SVE set SVE get SVE for VL 5424
5147 22:58:48.508856 # ok 3411 # SKIP Streaming SVE set SVE get FPSIMD for VL 5424
5148 22:58:48.508943 # ok 3412 # SKIP Streaming SVE set FPSIMD get SVE for VL 5424
5149 22:58:48.509027 # ok 3413 Set Streaming SVE VL 5440
5150 22:58:48.509112 # ok 3414 # SKIP Streaming SVE set SVE get SVE for VL 5440
5151 22:58:48.509212 # ok 3415 # SKIP Streaming SVE set SVE get FPSIMD for VL 5440
5152 22:58:48.509299 # ok 3416 # SKIP Streaming SVE set FPSIMD get SVE for VL 5440
5153 22:58:48.509384 # ok 3417 Set Streaming SVE VL 5456
5154 22:58:48.509480 # ok 3418 # SKIP Streaming SVE set SVE get SVE for VL 5456
5155 22:58:48.509565 # ok 3419 # SKIP Streaming SVE set SVE get FPSIMD for VL 5456
5156 22:58:48.509880 # ok 3420 # SKIP Streaming SVE set FPSIMD get SVE for VL 5456
5157 22:58:48.509990 # ok 3421 Set Streaming SVE VL 5472
5158 22:58:48.510090 # ok 3422 # SKIP Streaming SVE set SVE get SVE for VL 5472
5159 22:58:48.510178 # ok 3423 # SKIP Streaming SVE set SVE get FPSIMD for VL 5472
5160 22:58:48.510277 # ok 3424 # SKIP Streaming SVE set FPSIMD get SVE for VL 5472
5161 22:58:48.510377 # ok 3425 Set Streaming SVE VL 5488
5162 22:58:48.510477 # ok 3426 # SKIP Streaming SVE set SVE get SVE for VL 5488
5163 22:58:48.510577 # ok 3427 # SKIP Streaming SVE set SVE get FPSIMD for VL 5488
5164 22:58:48.513495 # ok 3428 # SKIP Streaming SVE set FPSIMD get SVE for VL 5488
5165 22:58:48.513688 # ok 3429 Set Streaming SVE VL 5504
5166 22:58:48.513798 # ok 3430 # SKIP Streaming SVE set SVE get SVE for VL 5504
5167 22:58:48.513888 # ok 3431 # SKIP Streaming SVE set SVE get FPSIMD for VL 5504
5168 22:58:48.514203 # ok 3432 # SKIP Streaming SVE set FPSIMD get SVE for VL 5504
5169 22:58:48.514296 # ok 3433 Set Streaming SVE VL 5520
5170 22:58:48.514574 # ok 3434 # SKIP Streaming SVE set SVE get SVE for VL 5520
5171 22:58:48.514659 # ok 3435 # SKIP Streaming SVE set SVE get FPSIMD for VL 5520
5172 22:58:48.514738 # ok 3436 # SKIP Streaming SVE set FPSIMD get SVE for VL 5520
5173 22:58:48.518501 # ok 3437 Set Streaming SVE VL 5536
5174 22:58:48.518887 # ok 3438 # SKIP Streaming SVE set SVE get SVE for VL 5536
5175 22:58:48.523858 # ok 3439 # SKIP Streaming SVE set SVE get FPSIMD for VL 5536
5176 22:58:48.524081 # ok 3440 # SKIP Streaming SVE set FPSIMD get SVE for VL 5536
5177 22:58:48.524186 # ok 3441 Set Streaming SVE VL 5552
5178 22:58:48.524274 # ok 3442 # SKIP Streaming SVE set SVE get SVE for VL 5552
5179 22:58:48.524359 # ok 3443 # SKIP Streaming SVE set SVE get FPSIMD for VL 5552
5180 22:58:48.524459 # ok 3444 # SKIP Streaming SVE set FPSIMD get SVE for VL 5552
5181 22:58:48.524546 # ok 3445 Set Streaming SVE VL 5568
5182 22:58:48.524645 # ok 3446 # SKIP Streaming SVE set SVE get SVE for VL 5568
5183 22:58:48.524747 # ok 3447 # SKIP Streaming SVE set SVE get FPSIMD for VL 5568
5184 22:58:48.524846 # ok 3448 # SKIP Streaming SVE set FPSIMD get SVE for VL 5568
5185 22:58:48.524948 # ok 3449 Set Streaming SVE VL 5584
5186 22:58:48.525035 # ok 3450 # SKIP Streaming SVE set SVE get SVE for VL 5584
5187 22:58:48.525133 # ok 3451 # SKIP Streaming SVE set SVE get FPSIMD for VL 5584
5188 22:58:48.525433 # ok 3452 # SKIP Streaming SVE set FPSIMD get SVE for VL 5584
5189 22:58:48.525572 # ok 3453 Set Streaming SVE VL 5600
5190 22:58:48.525689 # ok 3454 # SKIP Streaming SVE set SVE get SVE for VL 5600
5191 22:58:48.525779 # ok 3455 # SKIP Streaming SVE set SVE get FPSIMD for VL 5600
5192 22:58:48.525878 # ok 3456 # SKIP Streaming SVE set FPSIMD get SVE for VL 5600
5193 22:58:48.525963 # ok 3457 Set Streaming SVE VL 5616
5194 22:58:48.526044 # ok 3458 # SKIP Streaming SVE set SVE get SVE for VL 5616
5195 22:58:48.526141 # ok 3459 # SKIP Streaming SVE set SVE get FPSIMD for VL 5616
5196 22:58:48.526241 # ok 3460 # SKIP Streaming SVE set FPSIMD get SVE for VL 5616
5197 22:58:48.526340 # ok 3461 Set Streaming SVE VL 5632
5198 22:58:48.526620 # ok 3462 # SKIP Streaming SVE set SVE get SVE for VL 5632
5199 22:58:48.531814 # ok 3463 # SKIP Streaming SVE set SVE get FPSIMD for VL 5632
5200 22:58:48.532282 # ok 3464 # SKIP Streaming SVE set FPSIMD get SVE for VL 5632
5201 22:58:48.532385 # ok 3465 Set Streaming SVE VL 5648
5202 22:58:48.532474 # ok 3466 # SKIP Streaming SVE set SVE get SVE for VL 5648
5203 22:58:48.532575 # ok 3467 # SKIP Streaming SVE set SVE get FPSIMD for VL 5648
5204 22:58:48.532661 # ok 3468 # SKIP Streaming SVE set FPSIMD get SVE for VL 5648
5205 22:58:48.532746 # ok 3469 Set Streaming SVE VL 5664
5206 22:58:48.532846 # ok 3470 # SKIP Streaming SVE set SVE get SVE for VL 5664
5207 22:58:48.532933 # ok 3471 # SKIP Streaming SVE set SVE get FPSIMD for VL 5664
5208 22:58:48.533034 # ok 3472 # SKIP Streaming SVE set FPSIMD get SVE for VL 5664
5209 22:58:48.533320 # ok 3473 Set Streaming SVE VL 5680
5210 22:58:48.533410 # ok 3474 # SKIP Streaming SVE set SVE get SVE for VL 5680
5211 22:58:48.533502 # ok 3475 # SKIP Streaming SVE set SVE get FPSIMD for VL 5680
5212 22:58:48.539572 # ok 3476 # SKIP Streaming SVE set FPSIMD get SVE for VL 5680
5213 22:58:48.539816 # ok 3477 Set Streaming SVE VL 5696
5214 22:58:48.540120 # ok 3478 # SKIP Streaming SVE set SVE get SVE for VL 5696
5215 22:58:48.540222 # ok 3479 # SKIP Streaming SVE set SVE get FPSIMD for VL 5696
5216 22:58:48.540307 # ok 3480 # SKIP Streaming SVE set FPSIMD get SVE for VL 5696
5217 22:58:48.540391 # ok 3481 Set Streaming SVE VL 5712
5218 22:58:48.540490 # ok 3482 # SKIP Streaming SVE set SVE get SVE for VL 5712
5219 22:58:48.540578 # ok 3483 # SKIP Streaming SVE set SVE get FPSIMD for VL 5712
5220 22:58:48.540679 # ok 3484 # SKIP Streaming SVE set FPSIMD get SVE for VL 5712
5221 22:58:48.540764 # ok 3485 Set Streaming SVE VL 5728
5222 22:58:48.540861 # ok 3486 # SKIP Streaming SVE set SVE get SVE for VL 5728
5223 22:58:48.540961 # ok 3487 # SKIP Streaming SVE set SVE get FPSIMD for VL 5728
5224 22:58:48.541265 # ok 3488 # SKIP Streaming SVE set FPSIMD get SVE for VL 5728
5225 22:58:48.541370 # ok 3489 Set Streaming SVE VL 5744
5226 22:58:48.541470 # ok 3490 # SKIP Streaming SVE set SVE get SVE for VL 5744
5227 22:58:48.541576 # ok 3491 # SKIP Streaming SVE set SVE get FPSIMD for VL 5744
5228 22:58:48.541673 # ok 3492 # SKIP Streaming SVE set FPSIMD get SVE for VL 5744
5229 22:58:48.541777 # ok 3493 Set Streaming SVE VL 5760
5230 22:58:48.541875 # ok 3494 # SKIP Streaming SVE set SVE get SVE for VL 5760
5231 22:58:48.541978 # ok 3495 # SKIP Streaming SVE set SVE get FPSIMD for VL 5760
5232 22:58:48.542345 # ok 3496 # SKIP Streaming SVE set FPSIMD get SVE for VL 5760
5233 22:58:48.542482 # ok 3497 Set Streaming SVE VL 5776
5234 22:58:48.548294 # ok 3498 # SKIP Streaming SVE set SVE get SVE for VL 5776
5235 22:58:48.548724 # ok 3499 # SKIP Streaming SVE set SVE get FPSIMD for VL 5776
5236 22:58:48.548823 # ok 3500 # SKIP Streaming SVE set FPSIMD get SVE for VL 5776
5237 22:58:48.548910 # ok 3501 Set Streaming SVE VL 5792
5238 22:58:48.549014 # ok 3502 # SKIP Streaming SVE set SVE get SVE for VL 5792
5239 22:58:48.549099 # ok 3503 # SKIP Streaming SVE set SVE get FPSIMD for VL 5792
5240 22:58:48.549198 # ok 3504 # SKIP Streaming SVE set FPSIMD get SVE for VL 5792
5241 22:58:48.549297 # ok 3505 Set Streaming SVE VL 5808
5242 22:58:48.549600 # ok 3506 # SKIP Streaming SVE set SVE get SVE for VL 5808
5243 22:58:48.549715 # ok 3507 # SKIP Streaming SVE set SVE get FPSIMD for VL 5808
5244 22:58:48.549818 # ok 3508 # SKIP Streaming SVE set FPSIMD get SVE for VL 5808
5245 22:58:48.549906 # ok 3509 Set Streaming SVE VL 5824
5246 22:58:48.550004 # ok 3510 # SKIP Streaming SVE set SVE get SVE for VL 5824
5247 22:58:48.550125 # ok 3511 # SKIP Streaming SVE set SVE get FPSIMD for VL 5824
5248 22:58:48.550413 # ok 3512 # SKIP Streaming SVE set FPSIMD get SVE for VL 5824
5249 22:58:48.550518 # ok 3513 Set Streaming SVE VL 5840
5250 22:58:48.551394 # ok 3514 # SKIP Streaming SVE set SVE get SVE for VL 5840
5251 22:58:48.551501 # ok 3515 # SKIP Streaming SVE set SVE get FPSIMD for VL 5840
5252 22:58:48.551787 # ok 3516 # SKIP Streaming SVE set FPSIMD get SVE for VL 5840
5253 22:58:48.551884 # ok 3517 Set Streaming SVE VL 5856
5254 22:58:48.551987 # ok 3518 # SKIP Streaming SVE set SVE get SVE for VL 5856
5255 22:58:48.552090 # ok 3519 # SKIP Streaming SVE set SVE get FPSIMD for VL 5856
5256 22:58:48.552387 # ok 3520 # SKIP Streaming SVE set FPSIMD get SVE for VL 5856
5257 22:58:48.552491 # ok 3521 Set Streaming SVE VL 5872
5258 22:58:48.552593 # ok 3522 # SKIP Streaming SVE set SVE get SVE for VL 5872
5259 22:58:48.552693 # ok 3523 # SKIP Streaming SVE set SVE get FPSIMD for VL 5872
5260 22:58:48.552986 # ok 3524 # SKIP Streaming SVE set FPSIMD get SVE for VL 5872
5261 22:58:48.553077 # ok 3525 Set Streaming SVE VL 5888
5262 22:58:48.553176 # ok 3526 # SKIP Streaming SVE set SVE get SVE for VL 5888
5263 22:58:48.553263 # ok 3527 # SKIP Streaming SVE set SVE get FPSIMD for VL 5888
5264 22:58:48.553362 # ok 3528 # SKIP Streaming SVE set FPSIMD get SVE for VL 5888
5265 22:58:48.553653 # ok 3529 Set Streaming SVE VL 5904
5266 22:58:48.553760 # ok 3530 # SKIP Streaming SVE set SVE get SVE for VL 5904
5267 22:58:48.553861 # ok 3531 # SKIP Streaming SVE set SVE get FPSIMD for VL 5904
5268 22:58:48.553962 # ok 3532 # SKIP Streaming SVE set FPSIMD get SVE for VL 5904
5269 22:58:48.554062 # ok 3533 Set Streaming SVE VL 5920
5270 22:58:48.554337 # ok 3534 # SKIP Streaming SVE set SVE get SVE for VL 5920
5271 22:58:48.554428 # ok 3535 # SKIP Streaming SVE set SVE get FPSIMD for VL 5920
5272 22:58:48.554711 # ok 3536 # SKIP Streaming SVE set FPSIMD get SVE for VL 5920
5273 22:58:48.562513 # ok 3537 Set Streaming SVE VL 5936
5274 22:58:48.562934 # ok 3538 # SKIP Streaming SVE set SVE get SVE for VL 5936
5275 22:58:48.563870 # ok 3539 # SKIP Streaming SVE set SVE get FPSIMD for VL 5936
5276 22:58:48.564127 # ok 3540 # SKIP Streaming SVE set FPSIMD get SVE for VL 5936
5277 22:58:48.564309 # ok 3541 Set Streaming SVE VL 5952
5278 22:58:48.564511 # ok 3542 # SKIP Streaming SVE set SVE get SVE for VL 5952
5279 22:58:48.564686 # ok 3543 # SKIP Streaming SVE set SVE get FPSIMD for VL 5952
5280 22:58:48.564848 # ok 3544 # SKIP Streaming SVE set FPSIMD get SVE for VL 5952
5281 22:58:48.565019 # ok 3545 Set Streaming SVE VL 5968
5282 22:58:48.565142 # ok 3546 # SKIP Streaming SVE set SVE get SVE for VL 5968
5283 22:58:48.565258 # ok 3547 # SKIP Streaming SVE set SVE get FPSIMD for VL 5968
5284 22:58:48.565440 # ok 3548 # SKIP Streaming SVE set FPSIMD get SVE for VL 5968
5285 22:58:48.565592 # ok 3549 Set Streaming SVE VL 5984
5286 22:58:48.565799 # ok 3550 # SKIP Streaming SVE set SVE get SVE for VL 5984
5287 22:58:48.565947 # ok 3551 # SKIP Streaming SVE set SVE get FPSIMD for VL 5984
5288 22:58:48.566069 # ok 3552 # SKIP Streaming SVE set FPSIMD get SVE for VL 5984
5289 22:58:48.566210 # ok 3553 Set Streaming SVE VL 6000
5290 22:58:48.566331 # ok 3554 # SKIP Streaming SVE set SVE get SVE for VL 6000
5291 22:58:48.566447 # ok 3555 # SKIP Streaming SVE set SVE get FPSIMD for VL 6000
5292 22:58:48.566585 # ok 3556 # SKIP Streaming SVE set FPSIMD get SVE for VL 6000
5293 22:58:48.566706 # ok 3557 Set Streaming SVE VL 6016
5294 22:58:48.571724 # ok 3558 # SKIP Streaming SVE set SVE get SVE for VL 6016
5295 22:58:48.572298 # ok 3559 # SKIP Streaming SVE set SVE get FPSIMD for VL 6016
5296 22:58:48.572529 # ok 3560 # SKIP Streaming SVE set FPSIMD get SVE for VL 6016
5297 22:58:48.572723 # ok 3561 Set Streaming SVE VL 6032
5298 22:58:48.572901 # ok 3562 # SKIP Streaming SVE set SVE get SVE for VL 6032
5299 22:58:48.573143 # ok 3563 # SKIP Streaming SVE set SVE get FPSIMD for VL 6032
5300 22:58:48.573318 # ok 3564 # SKIP Streaming SVE set FPSIMD get SVE for VL 6032
5301 22:58:48.573516 # ok 3565 Set Streaming SVE VL 6048
5302 22:58:48.573719 # ok 3566 # SKIP Streaming SVE set SVE get SVE for VL 6048
5303 22:58:48.573859 # ok 3567 # SKIP Streaming SVE set SVE get FPSIMD for VL 6048
5304 22:58:48.574007 # ok 3568 # SKIP Streaming SVE set FPSIMD get SVE for VL 6048
5305 22:58:48.574174 # ok 3569 Set Streaming SVE VL 6064
5306 22:58:48.574322 # ok 3570 # SKIP Streaming SVE set SVE get SVE for VL 6064
5307 22:58:48.574468 # ok 3571 # SKIP Streaming SVE set SVE get FPSIMD for VL 6064
5308 22:58:48.574604 # ok 3572 # SKIP Streaming SVE set FPSIMD get SVE for VL 6064
5309 22:58:48.574721 # ok 3573 Set Streaming SVE VL 6080
5310 22:58:48.574836 # ok 3574 # SKIP Streaming SVE set SVE get SVE for VL 6080
5311 22:58:48.574976 # ok 3575 # SKIP Streaming SVE set SVE get FPSIMD for VL 6080
5312 22:58:48.575096 # ok 3576 # SKIP Streaming SVE set FPSIMD get SVE for VL 6080
5313 22:58:48.575211 # ok 3577 Set Streaming SVE VL 6096
5314 22:58:48.576535 # ok 3578 # SKIP Streaming SVE set SVE get SVE for VL 6096
5315 22:58:48.576965 # ok 3579 # SKIP Streaming SVE set SVE get FPSIMD for VL 6096
5316 22:58:48.577157 # ok 3580 # SKIP Streaming SVE set FPSIMD get SVE for VL 6096
5317 22:58:48.577318 # ok 3581 Set Streaming SVE VL 6112
5318 22:58:48.577568 # ok 3582 # SKIP Streaming SVE set SVE get SVE for VL 6112
5319 22:58:48.577780 # ok 3583 # SKIP Streaming SVE set SVE get FPSIMD for VL 6112
5320 22:58:48.577961 # ok 3584 # SKIP Streaming SVE set FPSIMD get SVE for VL 6112
5321 22:58:48.578118 # ok 3585 Set Streaming SVE VL 6128
5322 22:58:48.578290 # ok 3586 # SKIP Streaming SVE set SVE get SVE for VL 6128
5323 22:58:48.578424 # ok 3587 # SKIP Streaming SVE set SVE get FPSIMD for VL 6128
5324 22:58:48.578597 # ok 3588 # SKIP Streaming SVE set FPSIMD get SVE for VL 6128
5325 22:58:48.578742 # ok 3589 Set Streaming SVE VL 6144
5326 22:58:48.578920 # ok 3590 # SKIP Streaming SVE set SVE get SVE for VL 6144
5327 22:58:48.586343 # ok 3591 # SKIP Streaming SVE set SVE get FPSIMD for VL 6144
5328 22:58:48.586881 # ok 3592 # SKIP Streaming SVE set FPSIMD get SVE for VL 6144
5329 22:58:48.587038 # ok 3593 Set Streaming SVE VL 6160
5330 22:58:48.587819 # ok 3594 # SKIP Streaming SVE set SVE get SVE for VL 6160
5331 22:58:48.588381 # ok 3595 # SKIP Streaming SVE set SVE get FPSIMD for VL 6160
5332 22:58:48.588580 # ok 3596 # SKIP Streaming SVE set FPSIMD get SVE for VL 6160
5333 22:58:48.588754 # ok 3597 Set Streaming SVE VL 6176
5334 22:58:48.588955 # ok 3598 # SKIP Streaming SVE set SVE get SVE for VL 6176
5335 22:58:48.589124 # ok 3599 # SKIP Streaming SVE set SVE get FPSIMD for VL 6176
5336 22:58:48.589288 # ok 3600 # SKIP Streaming SVE set FPSIMD get SVE for VL 6176
5337 22:58:48.589553 # ok 3601 Set Streaming SVE VL 6192
5338 22:58:48.589779 # ok 3602 # SKIP Streaming SVE set SVE get SVE for VL 6192
5339 22:58:48.589950 # ok 3603 # SKIP Streaming SVE set SVE get FPSIMD for VL 6192
5340 22:58:48.590110 # ok 3604 # SKIP Streaming SVE set FPSIMD get SVE for VL 6192
5341 22:58:48.590266 # ok 3605 Set Streaming SVE VL 6208
5342 22:58:48.590450 # ok 3606 # SKIP Streaming SVE set SVE get SVE for VL 6208
5343 22:58:48.590604 # ok 3607 # SKIP Streaming SVE set SVE get FPSIMD for VL 6208
5344 22:58:48.590723 # ok 3608 # SKIP Streaming SVE set FPSIMD get SVE for VL 6208
5345 22:58:48.590837 # ok 3609 Set Streaming SVE VL 6224
5346 22:58:48.590951 # ok 3610 # SKIP Streaming SVE set SVE get SVE for VL 6224
5347 22:58:48.591063 # ok 3611 # SKIP Streaming SVE set SVE get FPSIMD for VL 6224
5348 22:58:48.591198 # ok 3612 # SKIP Streaming SVE set FPSIMD get SVE for VL 6224
5349 22:58:48.595708 # ok 3613 Set Streaming SVE VL 6240
5350 22:58:48.596219 # ok 3614 # SKIP Streaming SVE set SVE get SVE for VL 6240
5351 22:58:48.596326 # ok 3615 # SKIP Streaming SVE set SVE get FPSIMD for VL 6240
5352 22:58:48.596413 # ok 3616 # SKIP Streaming SVE set FPSIMD get SVE for VL 6240
5353 22:58:48.596512 # ok 3617 Set Streaming SVE VL 6256
5354 22:58:48.596598 # ok 3618 # SKIP Streaming SVE set SVE get SVE for VL 6256
5355 22:58:48.596696 # ok 3619 # SKIP Streaming SVE set SVE get FPSIMD for VL 6256
5356 22:58:48.596803 # ok 3620 # SKIP Streaming SVE set FPSIMD get SVE for VL 6256
5357 22:58:48.596906 # ok 3621 Set Streaming SVE VL 6272
5358 22:58:48.597203 # ok 3622 # SKIP Streaming SVE set SVE get SVE for VL 6272
5359 22:58:48.597395 # ok 3623 # SKIP Streaming SVE set SVE get FPSIMD for VL 6272
5360 22:58:48.597526 # ok 3624 # SKIP Streaming SVE set FPSIMD get SVE for VL 6272
5361 22:58:48.597643 # ok 3625 Set Streaming SVE VL 6288
5362 22:58:48.602394 # ok 3626 # SKIP Streaming SVE set SVE get SVE for VL 6288
5363 22:58:48.602608 # ok 3627 # SKIP Streaming SVE set SVE get FPSIMD for VL 6288
5364 22:58:48.603205 # ok 3628 # SKIP Streaming SVE set FPSIMD get SVE for VL 6288
5365 22:58:48.603710 # ok 3629 Set Streaming SVE VL 6304
5366 22:58:48.603914 # ok 3630 # SKIP Streaming SVE set SVE get SVE for VL 6304
5367 22:58:48.604090 # ok 3631 # SKIP Streaming SVE set SVE get FPSIMD for VL 6304
5368 22:58:48.604264 # ok 3632 # SKIP Streaming SVE set FPSIMD get SVE for VL 6304
5369 22:58:48.604477 # ok 3633 Set Streaming SVE VL 6320
5370 22:58:48.604665 # ok 3634 # SKIP Streaming SVE set SVE get SVE for VL 6320
5371 22:58:48.604864 # ok 3635 # SKIP Streaming SVE set SVE get FPSIMD for VL 6320
5372 22:58:48.605014 # ok 3636 # SKIP Streaming SVE set FPSIMD get SVE for VL 6320
5373 22:58:48.605175 # ok 3637 Set Streaming SVE VL 6336
5374 22:58:48.605316 # ok 3638 # SKIP Streaming SVE set SVE get SVE for VL 6336
5375 22:58:48.605471 # ok 3639 # SKIP Streaming SVE set SVE get FPSIMD for VL 6336
5376 22:58:48.605678 # ok 3640 # SKIP Streaming SVE set FPSIMD get SVE for VL 6336
5377 22:58:48.605886 # ok 3641 Set Streaming SVE VL 6352
5378 22:58:48.606076 # ok 3642 # SKIP Streaming SVE set SVE get SVE for VL 6352
5379 22:58:48.606241 # ok 3643 # SKIP Streaming SVE set SVE get FPSIMD for VL 6352
5380 22:58:48.606386 # ok 3644 # SKIP Streaming SVE set FPSIMD get SVE for VL 6352
5381 22:58:48.606528 # ok 3645 Set Streaming SVE VL 6368
5382 22:58:48.606709 # ok 3646 # SKIP Streaming SVE set SVE get SVE for VL 6368
5383 22:58:48.606847 # ok 3647 # SKIP Streaming SVE set SVE get FPSIMD for VL 6368
5384 22:58:48.606990 # ok 3648 # SKIP Streaming SVE set FPSIMD get SVE for VL 6368
5385 22:58:48.607134 # ok 3649 Set Streaming SVE VL 6384
5386 22:58:48.607276 # ok 3650 # SKIP Streaming SVE set SVE get SVE for VL 6384
5387 22:58:48.611476 # ok 3651 # SKIP Streaming SVE set SVE get FPSIMD for VL 6384
5388 22:58:48.611976 # ok 3652 # SKIP Streaming SVE set FPSIMD get SVE for VL 6384
5389 22:58:48.612186 # ok 3653 Set Streaming SVE VL 6400
5390 22:58:48.612391 # ok 3654 # SKIP Streaming SVE set SVE get SVE for VL 6400
5391 22:58:48.612636 # ok 3655 # SKIP Streaming SVE set SVE get FPSIMD for VL 6400
5392 22:58:48.612917 # ok 3656 # SKIP Streaming SVE set FPSIMD get SVE for VL 6400
5393 22:58:48.613108 # ok 3657 Set Streaming SVE VL 6416
5394 22:58:48.613318 # ok 3658 # SKIP Streaming SVE set SVE get SVE for VL 6416
5395 22:58:48.613519 # ok 3659 # SKIP Streaming SVE set SVE get FPSIMD for VL 6416
5396 22:58:48.613733 # ok 3660 # SKIP Streaming SVE set FPSIMD get SVE for VL 6416
5397 22:58:48.613913 # ok 3661 Set Streaming SVE VL 6432
5398 22:58:48.614114 # ok 3662 # SKIP Streaming SVE set SVE get SVE for VL 6432
5399 22:58:48.614321 # ok 3663 # SKIP Streaming SVE set SVE get FPSIMD for VL 6432
5400 22:58:48.614498 # ok 3664 # SKIP Streaming SVE set FPSIMD get SVE for VL 6432
5401 22:58:48.614627 # ok 3665 Set Streaming SVE VL 6448
5402 22:58:48.614743 # ok 3666 # SKIP Streaming SVE set SVE get SVE for VL 6448
5403 22:58:48.614857 # ok 3667 # SKIP Streaming SVE set SVE get FPSIMD for VL 6448
5404 22:58:48.614971 # ok 3668 # SKIP Streaming SVE set FPSIMD get SVE for VL 6448
5405 22:58:48.615085 # ok 3669 Set Streaming SVE VL 6464
5406 22:58:48.615226 # ok 3670 # SKIP Streaming SVE set SVE get SVE for VL 6464
5407 22:58:48.615346 # ok 3671 # SKIP Streaming SVE set SVE get FPSIMD for VL 6464
5408 22:58:48.625644 # ok 3672 # SKIP Streaming SVE set FPSIMD get SVE for VL 6464
5409 22:58:48.625888 # ok 3673 Set Streaming SVE VL 6480
5410 22:58:48.626253 # ok 3674 # SKIP Streaming SVE set SVE get SVE for VL 6480
5411 22:58:48.626359 # ok 3675 # SKIP Streaming SVE set SVE get FPSIMD for VL 6480
5412 22:58:48.626446 # ok 3676 # SKIP Streaming SVE set FPSIMD get SVE for VL 6480
5413 22:58:48.626547 # ok 3677 Set Streaming SVE VL 6496
5414 22:58:48.626634 # ok 3678 # SKIP Streaming SVE set SVE get SVE for VL 6496
5415 22:58:48.629004 # ok 3679 # SKIP Streaming SVE set SVE get FPSIMD for VL 6496
5416 22:58:48.629382 # ok 3680 # SKIP Streaming SVE set FPSIMD get SVE for VL 6496
5417 22:58:48.629483 # ok 3681 Set Streaming SVE VL 6512
5418 22:58:48.629581 # ok 3682 # SKIP Streaming SVE set SVE get SVE for VL 6512
5419 22:58:48.629956 # ok 3683 # SKIP Streaming SVE set SVE get FPSIMD for VL 6512
5420 22:58:48.630065 # ok 3684 # SKIP Streaming SVE set FPSIMD get SVE for VL 6512
5421 22:58:48.630151 # ok 3685 Set Streaming SVE VL 6528
5422 22:58:48.630435 # ok 3686 # SKIP Streaming SVE set SVE get SVE for VL 6528
5423 22:58:48.630554 # ok 3687 # SKIP Streaming SVE set SVE get FPSIMD for VL 6528
5424 22:58:48.630641 # ok 3688 # SKIP Streaming SVE set FPSIMD get SVE for VL 6528
5425 22:58:48.635295 # ok 3689 Set Streaming SVE VL 6544
5426 22:58:48.635723 # ok 3690 # SKIP Streaming SVE set SVE get SVE for VL 6544
5427 22:58:48.635828 # ok 3691 # SKIP Streaming SVE set SVE get FPSIMD for VL 6544
5428 22:58:48.635913 # ok 3692 # SKIP Streaming SVE set FPSIMD get SVE for VL 6544
5429 22:58:48.636016 # ok 3693 Set Streaming SVE VL 6560
5430 22:58:48.636100 # ok 3694 # SKIP Streaming SVE set SVE get SVE for VL 6560
5431 22:58:48.636198 # ok 3695 # SKIP Streaming SVE set SVE get FPSIMD for VL 6560
5432 22:58:48.636496 # ok 3696 # SKIP Streaming SVE set FPSIMD get SVE for VL 6560
5433 22:58:48.636599 # ok 3697 Set Streaming SVE VL 6576
5434 22:58:48.636895 # ok 3698 # SKIP Streaming SVE set SVE get SVE for VL 6576
5435 22:58:48.637000 # ok 3699 # SKIP Streaming SVE set SVE get FPSIMD for VL 6576
5436 22:58:48.637099 # ok 3700 # SKIP Streaming SVE set FPSIMD get SVE for VL 6576
5437 22:58:48.637183 # ok 3701 Set Streaming SVE VL 6592
5438 22:58:48.637301 # ok 3702 # SKIP Streaming SVE set SVE get SVE for VL 6592
5439 22:58:48.637471 # ok 3703 # SKIP Streaming SVE set SVE get FPSIMD for VL 6592
5440 22:58:48.637803 # ok 3704 # SKIP Streaming SVE set FPSIMD get SVE for VL 6592
5441 22:58:48.638053 # ok 3705 Set Streaming SVE VL 6608
5442 22:58:48.638263 # ok 3706 # SKIP Streaming SVE set SVE get SVE for VL 6608
5443 22:58:48.638403 # ok 3707 # SKIP Streaming SVE set SVE get FPSIMD for VL 6608
5444 22:58:48.638547 # ok 3708 # SKIP Streaming SVE set FPSIMD get SVE for VL 6608
5445 22:58:48.638721 # ok 3709 Set Streaming SVE VL 6624
5446 22:58:48.638858 # ok 3710 # SKIP Streaming SVE set SVE get SVE for VL 6624
5447 22:58:48.646638 # ok 3711 # SKIP Streaming SVE set SVE get FPSIMD for VL 6624
5448 22:58:48.647396 # ok 3712 # SKIP Streaming SVE set FPSIMD get SVE for VL 6624
5449 22:58:48.647590 # ok 3713 Set Streaming SVE VL 6640
5450 22:58:48.647779 # ok 3714 # SKIP Streaming SVE set SVE get SVE for VL 6640
5451 22:58:48.647926 # ok 3715 # SKIP Streaming SVE set SVE get FPSIMD for VL 6640
5452 22:58:48.648167 # ok 3716 # SKIP Streaming SVE set FPSIMD get SVE for VL 6640
5453 22:58:48.648350 # ok 3717 Set Streaming SVE VL 6656
5454 22:58:48.648510 # ok 3718 # SKIP Streaming SVE set SVE get SVE for VL 6656
5455 22:58:48.648670 # ok 3719 # SKIP Streaming SVE set SVE get FPSIMD for VL 6656
5456 22:58:48.648828 # ok 3720 # SKIP Streaming SVE set FPSIMD get SVE for VL 6656
5457 22:58:48.648992 # ok 3721 Set Streaming SVE VL 6672
5458 22:58:48.649211 # ok 3722 # SKIP Streaming SVE set SVE get SVE for VL 6672
5459 22:58:48.649412 # ok 3723 # SKIP Streaming SVE set SVE get FPSIMD for VL 6672
5460 22:58:48.649607 # ok 3724 # SKIP Streaming SVE set FPSIMD get SVE for VL 6672
5461 22:58:48.649820 # ok 3725 Set Streaming SVE VL 6688
5462 22:58:48.650021 # ok 3726 # SKIP Streaming SVE set SVE get SVE for VL 6688
5463 22:58:48.650204 # ok 3727 # SKIP Streaming SVE set SVE get FPSIMD for VL 6688
5464 22:58:48.650342 # ok 3728 # SKIP Streaming SVE set FPSIMD get SVE for VL 6688
5465 22:58:48.650486 # ok 3729 Set Streaming SVE VL 6704
5466 22:58:48.650628 # ok 3730 # SKIP Streaming SVE set SVE get SVE for VL 6704
5467 22:58:48.650771 # ok 3731 # SKIP Streaming SVE set SVE get FPSIMD for VL 6704
5468 22:58:48.650912 # ok 3732 # SKIP Streaming SVE set FPSIMD get SVE for VL 6704
5469 22:58:48.651053 # ok 3733 Set Streaming SVE VL 6720
5470 22:58:48.651242 # ok 3734 # SKIP Streaming SVE set SVE get SVE for VL 6720
5471 22:58:48.651378 # ok 3735 # SKIP Streaming SVE set SVE get FPSIMD for VL 6720
5472 22:58:48.659754 # ok 3736 # SKIP Streaming SVE set FPSIMD get SVE for VL 6720
5473 22:58:48.660339 # ok 3737 Set Streaming SVE VL 6736
5474 22:58:48.660532 # ok 3738 # SKIP Streaming SVE set SVE get SVE for VL 6736
5475 22:58:48.660751 # ok 3739 # SKIP Streaming SVE set SVE get FPSIMD for VL 6736
5476 22:58:48.660926 # ok 3740 # SKIP Streaming SVE set FPSIMD get SVE for VL 6736
5477 22:58:48.661507 # ok 3741 Set Streaming SVE VL 6752
5478 22:58:48.661714 # ok 3742 # SKIP Streaming SVE set SVE get SVE for VL 6752
5479 22:58:48.661894 # ok 3743 # SKIP Streaming SVE set SVE get FPSIMD for VL 6752
5480 22:58:48.662061 # ok 3744 # SKIP Streaming SVE set FPSIMD get SVE for VL 6752
5481 22:58:48.662291 # ok 3745 Set Streaming SVE VL 6768
5482 22:58:48.662449 # ok 3746 # SKIP Streaming SVE set SVE get SVE for VL 6768
5483 22:58:48.662592 # ok 3747 # SKIP Streaming SVE set SVE get FPSIMD for VL 6768
5484 22:58:48.662734 # ok 3748 # SKIP Streaming SVE set FPSIMD get SVE for VL 6768
5485 22:58:48.662914 # ok 3749 Set Streaming SVE VL 6784
5486 22:58:48.663056 # ok 3750 # SKIP Streaming SVE set SVE get SVE for VL 6784
5487 22:58:48.663199 # ok 3751 # SKIP Streaming SVE set SVE get FPSIMD for VL 6784
5488 22:58:48.663342 # ok 3752 # SKIP Streaming SVE set FPSIMD get SVE for VL 6784
5489 22:58:48.663484 # ok 3753 Set Streaming SVE VL 6800
5490 22:58:48.663626 # ok 3754 # SKIP Streaming SVE set SVE get SVE for VL 6800
5491 22:58:48.663768 # ok 3755 # SKIP Streaming SVE set SVE get FPSIMD for VL 6800
5492 22:58:48.676143 # ok 3756 # SKIP Streaming SVE set FPSIMD get SVE for VL 6800
5493 22:58:48.676501 # ok 3757 Set Streaming SVE VL 6816
5494 22:58:48.676907 # ok 3758 # SKIP Streaming SVE set SVE get SVE for VL 6816
5495 22:58:48.677076 # ok 3759 # SKIP Streaming SVE set SVE get FPSIMD for VL 6816
5496 22:58:48.677290 # ok 3760 # SKIP Streaming SVE set FPSIMD get SVE for VL 6816
5497 22:58:48.677534 # ok 3761 Set Streaming SVE VL 6832
5498 22:58:48.677771 # ok 3762 # SKIP Streaming SVE set SVE get SVE for VL 6832
5499 22:58:48.678001 # ok 3763 # SKIP Streaming SVE set SVE get FPSIMD for VL 6832
5500 22:58:48.678241 # ok 3764 # SKIP Streaming SVE set FPSIMD get SVE for VL 6832
5501 22:58:48.678445 # ok 3765 Set Streaming SVE VL 6848
5502 22:58:48.678586 # ok 3766 # SKIP Streaming SVE set SVE get SVE for VL 6848
5503 22:58:48.678703 # ok 3767 # SKIP Streaming SVE set SVE get FPSIMD for VL 6848
5504 22:58:48.678817 # ok 3768 # SKIP Streaming SVE set FPSIMD get SVE for VL 6848
5505 22:58:48.678931 # ok 3769 Set Streaming SVE VL 6864
5506 22:58:48.679046 # ok 3770 # SKIP Streaming SVE set SVE get SVE for VL 6864
5507 22:58:48.679158 # ok 3771 # SKIP Streaming SVE set SVE get FPSIMD for VL 6864
5508 22:58:48.679299 # ok 3772 # SKIP Streaming SVE set FPSIMD get SVE for VL 6864
5509 22:58:48.679419 # ok 3773 Set Streaming SVE VL 6880
5510 22:58:48.679534 # ok 3774 # SKIP Streaming SVE set SVE get SVE for VL 6880
5511 22:58:48.685143 # ok 3775 # SKIP Streaming SVE set SVE get FPSIMD for VL 6880
5512 22:58:48.686164 # ok 3776 # SKIP Streaming SVE set FPSIMD get SVE for VL 6880
5513 22:58:48.686331 # ok 3777 Set Streaming SVE VL 6896
5514 22:58:48.686505 # ok 3778 # SKIP Streaming SVE set SVE get SVE for VL 6896
5515 22:58:48.686651 # ok 3779 # SKIP Streaming SVE set SVE get FPSIMD for VL 6896
5516 22:58:48.686794 # ok 3780 # SKIP Streaming SVE set FPSIMD get SVE for VL 6896
5517 22:58:48.686938 # ok 3781 Set Streaming SVE VL 6912
5518 22:58:48.687079 # ok 3782 # SKIP Streaming SVE set SVE get SVE for VL 6912
5519 22:58:48.687257 # ok 3783 # SKIP Streaming SVE set SVE get FPSIMD for VL 6912
5520 22:58:48.687395 # ok 3784 # SKIP Streaming SVE set FPSIMD get SVE for VL 6912
5521 22:58:48.687538 # ok 3785 Set Streaming SVE VL 6928
5522 22:58:48.695910 # ok 3786 # SKIP Streaming SVE set SVE get SVE for VL 6928
5523 22:58:48.696143 # ok 3787 # SKIP Streaming SVE set SVE get FPSIMD for VL 6928
5524 22:58:48.696362 # ok 3788 # SKIP Streaming SVE set FPSIMD get SVE for VL 6928
5525 22:58:48.696457 # ok 3789 Set Streaming SVE VL 6944
5526 22:58:48.696540 # ok 3790 # SKIP Streaming SVE set SVE get SVE for VL 6944
5527 22:58:48.696798 # ok 3791 # SKIP Streaming SVE set SVE get FPSIMD for VL 6944
5528 22:58:48.696900 # ok 3792 # SKIP Streaming SVE set FPSIMD get SVE for VL 6944
5529 22:58:48.696989 # ok 3793 Set Streaming SVE VL 6960
5530 22:58:48.697094 # ok 3794 # SKIP Streaming SVE set SVE get SVE for VL 6960
5531 22:58:48.697181 # ok 3795 # SKIP Streaming SVE set SVE get FPSIMD for VL 6960
5532 22:58:48.697280 # ok 3796 # SKIP Streaming SVE set FPSIMD get SVE for VL 6960
5533 22:58:48.697386 # ok 3797 Set Streaming SVE VL 6976
5534 22:58:48.697722 # ok 3798 # SKIP Streaming SVE set SVE get SVE for VL 6976
5535 22:58:48.697909 # ok 3799 # SKIP Streaming SVE set SVE get FPSIMD for VL 6976
5536 22:58:48.698150 # ok 3800 # SKIP Streaming SVE set FPSIMD get SVE for VL 6976
5537 22:58:48.698361 # ok 3801 Set Streaming SVE VL 6992
5538 22:58:48.698520 # ok 3802 # SKIP Streaming SVE set SVE get SVE for VL 6992
5539 22:58:48.698670 # ok 3803 # SKIP Streaming SVE set SVE get FPSIMD for VL 6992
5540 22:58:48.698792 # ok 3804 # SKIP Streaming SVE set FPSIMD get SVE for VL 6992
5541 22:58:48.698910 # ok 3805 Set Streaming SVE VL 7008
5542 22:58:48.711656 # ok 3806 # SKIP Streaming SVE set SVE get SVE for VL 7008
5543 22:58:48.711992 # ok 3807 # SKIP Streaming SVE set SVE get FPSIMD for VL 7008
5544 22:58:48.712719 # ok 3808 # SKIP Streaming SVE set FPSIMD get SVE for VL 7008
5545 22:58:48.712922 # ok 3809 Set Streaming SVE VL 7024
5546 22:58:48.713090 # ok 3810 # SKIP Streaming SVE set SVE get SVE for VL 7024
5547 22:58:48.713211 # ok 3811 # SKIP Streaming SVE set SVE get FPSIMD for VL 7024
5548 22:58:48.713496 # ok 3812 # SKIP Streaming SVE set FPSIMD get SVE for VL 7024
5549 22:58:48.713642 # ok 3813 Set Streaming SVE VL 7040
5550 22:58:48.713780 # ok 3814 # SKIP Streaming SVE set SVE get SVE for VL 7040
5551 22:58:48.713904 # ok 3815 # SKIP Streaming SVE set SVE get FPSIMD for VL 7040
5552 22:58:48.714056 # ok 3816 # SKIP Streaming SVE set FPSIMD get SVE for VL 7040
5553 22:58:48.714150 # ok 3817 Set Streaming SVE VL 7056
5554 22:58:48.714232 # ok 3818 # SKIP Streaming SVE set SVE get SVE for VL 7056
5555 22:58:48.714314 # ok 3819 # SKIP Streaming SVE set SVE get FPSIMD for VL 7056
5556 22:58:48.714395 # ok 3820 # SKIP Streaming SVE set FPSIMD get SVE for VL 7056
5557 22:58:48.714477 # ok 3821 Set Streaming SVE VL 7072
5558 22:58:48.714557 # ok 3822 # SKIP Streaming SVE set SVE get SVE for VL 7072
5559 22:58:48.714637 # ok 3823 # SKIP Streaming SVE set SVE get FPSIMD for VL 7072
5560 22:58:48.714718 # ok 3824 # SKIP Streaming SVE set FPSIMD get SVE for VL 7072
5561 22:58:48.714817 # ok 3825 Set Streaming SVE VL 7088
5562 22:58:48.714898 # ok 3826 # SKIP Streaming SVE set SVE get SVE for VL 7088
5563 22:58:48.714976 # ok 3827 # SKIP Streaming SVE set SVE get FPSIMD for VL 7088
5564 22:58:48.715058 # ok 3828 # SKIP Streaming SVE set FPSIMD get SVE for VL 7088
5565 22:58:48.723577 # ok 3829 Set Streaming SVE VL 7104
5566 22:58:48.724044 # ok 3830 # SKIP Streaming SVE set SVE get SVE for VL 7104
5567 22:58:48.724155 # ok 3831 # SKIP Streaming SVE set SVE get FPSIMD for VL 7104
5568 22:58:48.724245 # ok 3832 # SKIP Streaming SVE set FPSIMD get SVE for VL 7104
5569 22:58:48.724331 # ok 3833 Set Streaming SVE VL 7120
5570 22:58:48.724416 # ok 3834 # SKIP Streaming SVE set SVE get SVE for VL 7120
5571 22:58:48.724516 # ok 3835 # SKIP Streaming SVE set SVE get FPSIMD for VL 7120
5572 22:58:48.724604 # ok 3836 # SKIP Streaming SVE set FPSIMD get SVE for VL 7120
5573 22:58:48.724691 # ok 3837 Set Streaming SVE VL 7136
5574 22:58:48.724796 # ok 3838 # SKIP Streaming SVE set SVE get SVE for VL 7136
5575 22:58:48.724901 # ok 3839 # SKIP Streaming SVE set SVE get FPSIMD for VL 7136
5576 22:58:48.725006 # ok 3840 # SKIP Streaming SVE set FPSIMD get SVE for VL 7136
5577 22:58:48.725106 # ok 3841 Set Streaming SVE VL 7152
5578 22:58:48.725224 # ok 3842 # SKIP Streaming SVE set SVE get SVE for VL 7152
5579 22:58:48.725525 # ok 3843 # SKIP Streaming SVE set SVE get FPSIMD for VL 7152
5580 22:58:48.725633 # ok 3844 # SKIP Streaming SVE set FPSIMD get SVE for VL 7152
5581 22:58:48.725750 # ok 3845 Set Streaming SVE VL 7168
5582 22:58:48.726044 # ok 3846 # SKIP Streaming SVE set SVE get SVE for VL 7168
5583 22:58:48.726154 # ok 3847 # SKIP Streaming SVE set SVE get FPSIMD for VL 7168
5584 22:58:48.726246 # ok 3848 # SKIP Streaming SVE set FPSIMD get SVE for VL 7168
5585 22:58:48.726348 # ok 3849 Set Streaming SVE VL 7184
5586 22:58:48.726434 # ok 3850 # SKIP Streaming SVE set SVE get SVE for VL 7184
5587 22:58:48.726537 # ok 3851 # SKIP Streaming SVE set SVE get FPSIMD for VL 7184
5588 22:58:48.735520 # ok 3852 # SKIP Streaming SVE set FPSIMD get SVE for VL 7184
5589 22:58:48.735772 # ok 3853 Set Streaming SVE VL 7200
5590 22:58:48.736084 # ok 3854 # SKIP Streaming SVE set SVE get SVE for VL 7200
5591 22:58:48.736185 # ok 3855 # SKIP Streaming SVE set SVE get FPSIMD for VL 7200
5592 22:58:48.736273 # ok 3856 # SKIP Streaming SVE set FPSIMD get SVE for VL 7200
5593 22:58:48.736356 # ok 3857 Set Streaming SVE VL 7216
5594 22:58:48.736436 # ok 3858 # SKIP Streaming SVE set SVE get SVE for VL 7216
5595 22:58:48.736532 # ok 3859 # SKIP Streaming SVE set SVE get FPSIMD for VL 7216
5596 22:58:48.736615 # ok 3860 # SKIP Streaming SVE set FPSIMD get SVE for VL 7216
5597 22:58:48.736710 # ok 3861 Set Streaming SVE VL 7232
5598 22:58:48.736807 # ok 3862 # SKIP Streaming SVE set SVE get SVE for VL 7232
5599 22:58:48.737103 # ok 3863 # SKIP Streaming SVE set SVE get FPSIMD for VL 7232
5600 22:58:48.737220 # ok 3864 # SKIP Streaming SVE set FPSIMD get SVE for VL 7232
5601 22:58:48.737312 # ok 3865 Set Streaming SVE VL 7248
5602 22:58:48.737410 # ok 3866 # SKIP Streaming SVE set SVE get SVE for VL 7248
5603 22:58:48.737709 # ok 3867 # SKIP Streaming SVE set SVE get FPSIMD for VL 7248
5604 22:58:48.738006 # ok 3868 # SKIP Streaming SVE set FPSIMD get SVE for VL 7248
5605 22:58:48.738107 # ok 3869 Set Streaming SVE VL 7264
5606 22:58:48.738211 # ok 3870 # SKIP Streaming SVE set SVE get SVE for VL 7264
5607 22:58:48.738295 # ok 3871 # SKIP Streaming SVE set SVE get FPSIMD for VL 7264
5608 22:58:48.738392 # ok 3872 # SKIP Streaming SVE set FPSIMD get SVE for VL 7264
5609 22:58:48.738490 # ok 3873 Set Streaming SVE VL 7280
5610 22:58:48.745748 # ok 3874 # SKIP Streaming SVE set SVE get SVE for VL 7280
5611 22:58:48.746196 # ok 3875 # SKIP Streaming SVE set SVE get FPSIMD for VL 7280
5612 22:58:48.746288 # ok 3876 # SKIP Streaming SVE set FPSIMD get SVE for VL 7280
5613 22:58:48.746373 # ok 3877 Set Streaming SVE VL 7296
5614 22:58:48.746456 # ok 3878 # SKIP Streaming SVE set SVE get SVE for VL 7296
5615 22:58:48.746556 # ok 3879 # SKIP Streaming SVE set SVE get FPSIMD for VL 7296
5616 22:58:48.751586 # ok 3880 # SKIP Streaming SVE set FPSIMD get SVE for VL 7296
5617 22:58:48.752044 # ok 3881 Set Streaming SVE VL 7312
5618 22:58:48.752151 # ok 3882 # SKIP Streaming SVE set SVE get SVE for VL 7312
5619 22:58:48.752445 # ok 3883 # SKIP Streaming SVE set SVE get FPSIMD for VL 7312
5620 22:58:48.752545 # ok 3884 # SKIP Streaming SVE set FPSIMD get SVE for VL 7312
5621 22:58:48.752631 # ok 3885 Set Streaming SVE VL 7328
5622 22:58:48.752714 # ok 3886 # SKIP Streaming SVE set SVE get SVE for VL 7328
5623 22:58:48.752797 # ok 3887 # SKIP Streaming SVE set SVE get FPSIMD for VL 7328
5624 22:58:48.753101 # ok 3888 # SKIP Streaming SVE set FPSIMD get SVE for VL 7328
5625 22:58:48.753204 # ok 3889 Set Streaming SVE VL 7344
5626 22:58:48.753290 # ok 3890 # SKIP Streaming SVE set SVE get SVE for VL 7344
5627 22:58:48.753371 # ok 3891 # SKIP Streaming SVE set SVE get FPSIMD for VL 7344
5628 22:58:48.753450 # ok 3892 # SKIP Streaming SVE set FPSIMD get SVE for VL 7344
5629 22:58:48.753531 # ok 3893 Set Streaming SVE VL 7360
5630 22:58:48.753613 # ok 3894 # SKIP Streaming SVE set SVE get SVE for VL 7360
5631 22:58:48.753722 # ok 3895 # SKIP Streaming SVE set SVE get FPSIMD for VL 7360
5632 22:58:48.753808 # ok 3896 # SKIP Streaming SVE set FPSIMD get SVE for VL 7360
5633 22:58:48.753889 # ok 3897 Set Streaming SVE VL 7376
5634 22:58:48.754179 # ok 3898 # SKIP Streaming SVE set SVE get SVE for VL 7376
5635 22:58:48.754280 # ok 3899 # SKIP Streaming SVE set SVE get FPSIMD for VL 7376
5636 22:58:48.754364 # ok 3900 # SKIP Streaming SVE set FPSIMD get SVE for VL 7376
5637 22:58:48.754447 # ok 3901 Set Streaming SVE VL 7392
5638 22:58:48.754528 # ok 3902 # SKIP Streaming SVE set SVE get SVE for VL 7392
5639 22:58:48.754610 # ok 3903 # SKIP Streaming SVE set SVE get FPSIMD for VL 7392
5640 22:58:48.754691 # ok 3904 # SKIP Streaming SVE set FPSIMD get SVE for VL 7392
5641 22:58:48.754772 # ok 3905 Set Streaming SVE VL 7408
5642 22:58:48.754872 # ok 3906 # SKIP Streaming SVE set SVE get SVE for VL 7408
5643 22:58:48.754956 # ok 3907 # SKIP Streaming SVE set SVE get FPSIMD for VL 7408
5644 22:58:48.755039 # ok 3908 # SKIP Streaming SVE set FPSIMD get SVE for VL 7408
5645 22:58:48.755121 # ok 3909 Set Streaming SVE VL 7424
5646 22:58:48.755202 # ok 3910 # SKIP Streaming SVE set SVE get SVE for VL 7424
5647 22:58:48.755283 # ok 3911 # SKIP Streaming SVE set SVE get FPSIMD for VL 7424
5648 22:58:48.755381 # ok 3912 # SKIP Streaming SVE set FPSIMD get SVE for VL 7424
5649 22:58:48.755465 # ok 3913 Set Streaming SVE VL 7440
5650 22:58:48.759845 # ok 3914 # SKIP Streaming SVE set SVE get SVE for VL 7440
5651 22:58:48.760364 # ok 3915 # SKIP Streaming SVE set SVE get FPSIMD for VL 7440
5652 22:58:48.760468 # ok 3916 # SKIP Streaming SVE set FPSIMD get SVE for VL 7440
5653 22:58:48.760554 # ok 3917 Set Streaming SVE VL 7456
5654 22:58:48.760637 # ok 3918 # SKIP Streaming SVE set SVE get SVE for VL 7456
5655 22:58:48.760736 # ok 3919 # SKIP Streaming SVE set SVE get FPSIMD for VL 7456
5656 22:58:48.760821 # ok 3920 # SKIP Streaming SVE set FPSIMD get SVE for VL 7456
5657 22:58:48.760904 # ok 3921 Set Streaming SVE VL 7472
5658 22:58:48.761006 # ok 3922 # SKIP Streaming SVE set SVE get SVE for VL 7472
5659 22:58:48.761091 # ok 3923 # SKIP Streaming SVE set SVE get FPSIMD for VL 7472
5660 22:58:48.761174 # ok 3924 # SKIP Streaming SVE set FPSIMD get SVE for VL 7472
5661 22:58:48.761853 # ok 3925 Set Streaming SVE VL 7488
5662 22:58:48.762135 # ok 3926 # SKIP Streaming SVE set SVE get SVE for VL 7488
5663 22:58:48.762225 # ok 3927 # SKIP Streaming SVE set SVE get FPSIMD for VL 7488
5664 22:58:48.762322 # ok 3928 # SKIP Streaming SVE set FPSIMD get SVE for VL 7488
5665 22:58:48.762407 # ok 3929 Set Streaming SVE VL 7504
5666 22:58:48.762505 # ok 3930 # SKIP Streaming SVE set SVE get SVE for VL 7504
5667 22:58:48.762589 # ok 3931 # SKIP Streaming SVE set SVE get FPSIMD for VL 7504
5668 22:58:48.767554 # ok 3932 # SKIP Streaming SVE set FPSIMD get SVE for VL 7504
5669 22:58:48.767808 # ok 3933 Set Streaming SVE VL 7520
5670 22:58:48.768103 # ok 3934 # SKIP Streaming SVE set SVE get SVE for VL 7520
5671 22:58:48.768205 # ok 3935 # SKIP Streaming SVE set SVE get FPSIMD for VL 7520
5672 22:58:48.768290 # ok 3936 # SKIP Streaming SVE set FPSIMD get SVE for VL 7520
5673 22:58:48.768372 # ok 3937 Set Streaming SVE VL 7536
5674 22:58:48.768455 # ok 3938 # SKIP Streaming SVE set SVE get SVE for VL 7536
5675 22:58:48.768553 # ok 3939 # SKIP Streaming SVE set SVE get FPSIMD for VL 7536
5676 22:58:48.768638 # ok 3940 # SKIP Streaming SVE set FPSIMD get SVE for VL 7536
5677 22:58:48.768736 # ok 3941 Set Streaming SVE VL 7552
5678 22:58:48.768821 # ok 3942 # SKIP Streaming SVE set SVE get SVE for VL 7552
5679 22:58:48.768918 # ok 3943 # SKIP Streaming SVE set SVE get FPSIMD for VL 7552
5680 22:58:48.769003 # ok 3944 # SKIP Streaming SVE set FPSIMD get SVE for VL 7552
5681 22:58:48.769101 # ok 3945 Set Streaming SVE VL 7568
5682 22:58:48.769185 # ok 3946 # SKIP Streaming SVE set SVE get SVE for VL 7568
5683 22:58:48.769283 # ok 3947 # SKIP Streaming SVE set SVE get FPSIMD for VL 7568
5684 22:58:48.769383 # ok 3948 # SKIP Streaming SVE set FPSIMD get SVE for VL 7568
5685 22:58:48.769477 # ok 3949 Set Streaming SVE VL 7584
5686 22:58:48.769577 # ok 3950 # SKIP Streaming SVE set SVE get SVE for VL 7584
5687 22:58:48.769922 # ok 3951 # SKIP Streaming SVE set SVE get FPSIMD for VL 7584
5688 22:58:48.770023 # ok 3952 # SKIP Streaming SVE set FPSIMD get SVE for VL 7584
5689 22:58:48.770108 # ok 3953 Set Streaming SVE VL 7600
5690 22:58:48.770393 # ok 3954 # SKIP Streaming SVE set SVE get SVE for VL 7600
5691 22:58:48.770496 # ok 3955 # SKIP Streaming SVE set SVE get FPSIMD for VL 7600
5692 22:58:48.770577 # ok 3956 # SKIP Streaming SVE set FPSIMD get SVE for VL 7600
5693 22:58:48.770652 # ok 3957 Set Streaming SVE VL 7616
5694 22:58:48.778638 # ok 3958 # SKIP Streaming SVE set SVE get SVE for VL 7616
5695 22:58:48.788477 # ok 3959 # SKIP Streaming SVE set SVE get FPSIMD for VL 7616
5696 22:58:48.788715 # ok 3960 # SKIP Streaming SVE set FPSIMD get SVE for VL 7616
5697 22:58:48.788999 # ok 3961 Set Streaming SVE VL 7632
5698 22:58:48.789091 # ok 3962 # SKIP Streaming SVE set SVE get SVE for VL 7632
5699 22:58:48.789779 # ok 3963 # SKIP Streaming SVE set SVE get FPSIMD for VL 7632
5700 22:58:48.789897 # ok 3964 # SKIP Streaming SVE set FPSIMD get SVE for VL 7632
5701 22:58:48.789998 # ok 3965 Set Streaming SVE VL 7648
5702 22:58:48.790295 # ok 3966 # SKIP Streaming SVE set SVE get SVE for VL 7648
5703 22:58:48.790394 # ok 3967 # SKIP Streaming SVE set SVE get FPSIMD for VL 7648
5704 22:58:48.790494 # ok 3968 # SKIP Streaming SVE set FPSIMD get SVE for VL 7648
5705 22:58:48.791131 # ok 3969 Set Streaming SVE VL 7664
5706 22:58:48.791461 # ok 3970 # SKIP Streaming SVE set SVE get SVE for VL 7664
5707 22:58:48.791608 # ok 3971 # SKIP Streaming SVE set SVE get FPSIMD for VL 7664
5708 22:58:48.791718 # ok 3972 # SKIP Streaming SVE set FPSIMD get SVE for VL 7664
5709 22:58:48.791806 # ok 3973 Set Streaming SVE VL 7680
5710 22:58:48.791907 # ok 3974 # SKIP Streaming SVE set SVE get SVE for VL 7680
5711 22:58:48.792234 # ok 3975 # SKIP Streaming SVE set SVE get FPSIMD for VL 7680
5712 22:58:48.792386 # ok 3976 # SKIP Streaming SVE set FPSIMD get SVE for VL 7680
5713 22:58:48.792490 # ok 3977 Set Streaming SVE VL 7696
5714 22:58:48.792575 # ok 3978 # SKIP Streaming SVE set SVE get SVE for VL 7696
5715 22:58:48.792673 # ok 3979 # SKIP Streaming SVE set SVE get FPSIMD for VL 7696
5716 22:58:48.792955 # ok 3980 # SKIP Streaming SVE set FPSIMD get SVE for VL 7696
5717 22:58:48.793057 # ok 3981 Set Streaming SVE VL 7712
5718 22:58:48.793156 # ok 3982 # SKIP Streaming SVE set SVE get SVE for VL 7712
5719 22:58:48.793474 # ok 3983 # SKIP Streaming SVE set SVE get FPSIMD for VL 7712
5720 22:58:48.793580 # ok 3984 # SKIP Streaming SVE set FPSIMD get SVE for VL 7712
5721 22:58:48.793688 # ok 3985 Set Streaming SVE VL 7728
5722 22:58:48.793788 # ok 3986 # SKIP Streaming SVE set SVE get SVE for VL 7728
5723 22:58:48.794111 # ok 3987 # SKIP Streaming SVE set SVE get FPSIMD for VL 7728
5724 22:58:48.794213 # ok 3988 # SKIP Streaming SVE set FPSIMD get SVE for VL 7728
5725 22:58:48.794312 # ok 3989 Set Streaming SVE VL 7744
5726 22:58:48.794408 # ok 3990 # SKIP Streaming SVE set SVE get SVE for VL 7744
5727 22:58:48.799732 # ok 3991 # SKIP Streaming SVE set SVE get FPSIMD for VL 7744
5728 22:58:48.800365 # ok 3992 # SKIP Streaming SVE set FPSIMD get SVE for VL 7744
5729 22:58:48.800470 # ok 3993 Set Streaming SVE VL 7760
5730 22:58:48.800575 # ok 3994 # SKIP Streaming SVE set SVE get SVE for VL 7760
5731 22:58:48.800874 # ok 3995 # SKIP Streaming SVE set SVE get FPSIMD for VL 7760
5732 22:58:48.800975 # ok 3996 # SKIP Streaming SVE set FPSIMD get SVE for VL 7760
5733 22:58:48.801077 # ok 3997 Set Streaming SVE VL 7776
5734 22:58:48.801177 # ok 3998 # SKIP Streaming SVE set SVE get SVE for VL 7776
5735 22:58:48.801479 # ok 3999 # SKIP Streaming SVE set SVE get FPSIMD for VL 7776
5736 22:58:48.802294 # ok 4000 # SKIP Streaming SVE set FPSIMD get SVE for VL 7776
5737 22:58:48.802402 # ok 4001 Set Streaming SVE VL 7792
5738 22:58:48.802504 # ok 4002 # SKIP Streaming SVE set SVE get SVE for VL 7792
5739 22:58:48.807798 # ok 4003 # SKIP Streaming SVE set SVE get FPSIMD for VL 7792
5740 22:58:48.808643 # ok 4004 # SKIP Streaming SVE set FPSIMD get SVE for VL 7792
5741 22:58:48.808748 # ok 4005 Set Streaming SVE VL 7808
5742 22:58:48.808850 # ok 4006 # SKIP Streaming SVE set SVE get SVE for VL 7808
5743 22:58:48.809158 # ok 4007 # SKIP Streaming SVE set SVE get FPSIMD for VL 7808
5744 22:58:48.809252 # ok 4008 # SKIP Streaming SVE set FPSIMD get SVE for VL 7808
5745 22:58:48.809386 # ok 4009 Set Streaming SVE VL 7824
5746 22:58:48.809530 # ok 4010 # SKIP Streaming SVE set SVE get SVE for VL 7824
5747 22:58:48.809644 # ok 4011 # SKIP Streaming SVE set SVE get FPSIMD for VL 7824
5748 22:58:48.809743 # ok 4012 # SKIP Streaming SVE set FPSIMD get SVE for VL 7824
5749 22:58:48.809843 # ok 4013 Set Streaming SVE VL 7840
5750 22:58:48.809928 # ok 4014 # SKIP Streaming SVE set SVE get SVE for VL 7840
5751 22:58:48.810026 # ok 4015 # SKIP Streaming SVE set SVE get FPSIMD for VL 7840
5752 22:58:48.810125 # ok 4016 # SKIP Streaming SVE set FPSIMD get SVE for VL 7840
5753 22:58:48.810224 # ok 4017 Set Streaming SVE VL 7856
5754 22:58:48.810324 # ok 4018 # SKIP Streaming SVE set SVE get SVE for VL 7856
5755 22:58:48.810421 # ok 4019 # SKIP Streaming SVE set SVE get FPSIMD for VL 7856
5756 22:58:48.816467 # ok 4020 # SKIP Streaming SVE set FPSIMD get SVE for VL 7856
5757 22:58:48.817260 # ok 4021 Set Streaming SVE VL 7872
5758 22:58:48.817385 # ok 4022 # SKIP Streaming SVE set SVE get SVE for VL 7872
5759 22:58:48.817493 # ok 4023 # SKIP Streaming SVE set SVE get FPSIMD for VL 7872
5760 22:58:48.817791 # ok 4024 # SKIP Streaming SVE set FPSIMD get SVE for VL 7872
5761 22:58:48.817886 # ok 4025 Set Streaming SVE VL 7888
5762 22:58:48.817990 # ok 4026 # SKIP Streaming SVE set SVE get SVE for VL 7888
5763 22:58:48.818081 # ok 4027 # SKIP Streaming SVE set SVE get FPSIMD for VL 7888
5764 22:58:48.818379 # ok 4028 # SKIP Streaming SVE set FPSIMD get SVE for VL 7888
5765 22:58:48.818479 # ok 4029 Set Streaming SVE VL 7904
5766 22:58:48.818575 # ok 4030 # SKIP Streaming SVE set SVE get SVE for VL 7904
5767 22:58:48.827842 # ok 4031 # SKIP Streaming SVE set SVE get FPSIMD for VL 7904
5768 22:58:48.828532 # ok 4032 # SKIP Streaming SVE set FPSIMD get SVE for VL 7904
5769 22:58:48.828641 # ok 4033 Set Streaming SVE VL 7920
5770 22:58:48.828745 # ok 4034 # SKIP Streaming SVE set SVE get SVE for VL 7920
5771 22:58:48.828844 # ok 4035 # SKIP Streaming SVE set SVE get FPSIMD for VL 7920
5772 22:58:48.829143 # ok 4036 # SKIP Streaming SVE set FPSIMD get SVE for VL 7920
5773 22:58:48.829686 # ok 4037 Set Streaming SVE VL 7936
5774 22:58:48.830119 # ok 4038 # SKIP Streaming SVE set SVE get SVE for VL 7936
5775 22:58:48.830277 # ok 4039 # SKIP Streaming SVE set SVE get FPSIMD for VL 7936
5776 22:58:48.830460 # ok 4040 # SKIP Streaming SVE set FPSIMD get SVE for VL 7936
5777 22:58:48.830560 # ok 4041 Set Streaming SVE VL 7952
5778 22:58:48.830646 # ok 4042 # SKIP Streaming SVE set SVE get SVE for VL 7952
5779 22:58:48.834801 # ok 4043 # SKIP Streaming SVE set SVE get FPSIMD for VL 7952
5780 22:58:48.835128 # ok 4044 # SKIP Streaming SVE set FPSIMD get SVE for VL 7952
5781 22:58:48.835233 # ok 4045 Set Streaming SVE VL 7968
5782 22:58:48.835319 # ok 4046 # SKIP Streaming SVE set SVE get SVE for VL 7968
5783 22:58:48.835417 # ok 4047 # SKIP Streaming SVE set SVE get FPSIMD for VL 7968
5784 22:58:48.835517 # ok 4048 # SKIP Streaming SVE set FPSIMD get SVE for VL 7968
5785 22:58:48.835615 # ok 4049 Set Streaming SVE VL 7984
5786 22:58:48.835987 # ok 4050 # SKIP Streaming SVE set SVE get SVE for VL 7984
5787 22:58:48.836093 # ok 4051 # SKIP Streaming SVE set SVE get FPSIMD for VL 7984
5788 22:58:48.836195 # ok 4052 # SKIP Streaming SVE set FPSIMD get SVE for VL 7984
5789 22:58:48.836281 # ok 4053 Set Streaming SVE VL 8000
5790 22:58:48.836385 # ok 4054 # SKIP Streaming SVE set SVE get SVE for VL 8000
5791 22:58:48.836690 # ok 4055 # SKIP Streaming SVE set SVE get FPSIMD for VL 8000
5792 22:58:48.836993 # ok 4056 # SKIP Streaming SVE set FPSIMD get SVE for VL 8000
5793 22:58:48.837103 # ok 4057 Set Streaming SVE VL 8016
5794 22:58:48.837523 # ok 4058 # SKIP Streaming SVE set SVE get SVE for VL 8016
5795 22:58:48.837627 # ok 4059 # SKIP Streaming SVE set SVE get FPSIMD for VL 8016
5796 22:58:48.837722 # ok 4060 # SKIP Streaming SVE set FPSIMD get SVE for VL 8016
5797 22:58:48.837806 # ok 4061 Set Streaming SVE VL 8032
5798 22:58:48.837902 # ok 4062 # SKIP Streaming SVE set SVE get SVE for VL 8032
5799 22:58:48.837986 # ok 4063 # SKIP Streaming SVE set SVE get FPSIMD for VL 8032
5800 22:58:48.838084 # ok 4064 # SKIP Streaming SVE set FPSIMD get SVE for VL 8032
5801 22:58:48.838183 # ok 4065 Set Streaming SVE VL 8048
5802 22:58:48.838474 # ok 4066 # SKIP Streaming SVE set SVE get SVE for VL 8048
5803 22:58:48.843215 # ok 4067 # SKIP Streaming SVE set SVE get FPSIMD for VL 8048
5804 22:58:48.843731 # ok 4068 # SKIP Streaming SVE set FPSIMD get SVE for VL 8048
5805 22:58:48.843838 # ok 4069 Set Streaming SVE VL 8064
5806 22:58:48.844002 # ok 4070 # SKIP Streaming SVE set SVE get SVE for VL 8064
5807 22:58:48.844174 # ok 4071 # SKIP Streaming SVE set SVE get FPSIMD for VL 8064
5808 22:58:48.844285 # ok 4072 # SKIP Streaming SVE set FPSIMD get SVE for VL 8064
5809 22:58:48.844370 # ok 4073 Set Streaming SVE VL 8080
5810 22:58:48.844452 # ok 4074 # SKIP Streaming SVE set SVE get SVE for VL 8080
5811 22:58:48.865356 # ok 4075 # SKIP Streaming SVE set SVE get FPSIMD for VL 8080
5812 22:58:48.865820 # ok 4076 # SKIP Streaming SVE set FPSIMD get SVE for VL 8080
5813 22:58:48.865930 # ok 4077 Set Streaming SVE VL 8096
5814 22:58:48.866017 # ok 4078 # SKIP Streaming SVE set SVE get SVE for VL 8096
5815 22:58:48.866120 # ok 4079 # SKIP Streaming SVE set SVE get FPSIMD for VL 8096
5816 22:58:48.866212 # ok 4080 # SKIP Streaming SVE set FPSIMD get SVE for VL 8096
5817 22:58:48.866316 # ok 4081 Set Streaming SVE VL 8112
5818 22:58:48.866418 # ok 4082 # SKIP Streaming SVE set SVE get SVE for VL 8112
5819 22:58:48.869216 # ok 4083 # SKIP Streaming SVE set SVE get FPSIMD for VL 8112
5820 22:58:48.869567 # ok 4084 # SKIP Streaming SVE set FPSIMD get SVE for VL 8112
5821 22:58:48.869678 # ok 4085 Set Streaming SVE VL 8128
5822 22:58:48.869778 # ok 4086 # SKIP Streaming SVE set SVE get SVE for VL 8128
5823 22:58:48.869878 # ok 4087 # SKIP Streaming SVE set SVE get FPSIMD for VL 8128
5824 22:58:48.869977 # ok 4088 # SKIP Streaming SVE set FPSIMD get SVE for VL 8128
5825 22:58:48.870074 # ok 4089 Set Streaming SVE VL 8144
5826 22:58:48.870214 # ok 4090 # SKIP Streaming SVE set SVE get SVE for VL 8144
5827 22:58:48.870559 # ok 4091 # SKIP Streaming SVE set SVE get FPSIMD for VL 8144
5828 22:58:48.880528 # ok 4092 # SKIP Streaming SVE set FPSIMD get SVE for VL 8144
5829 22:58:48.880777 # ok 4093 Set Streaming SVE VL 8160
5830 22:58:48.881080 # ok 4094 # SKIP Streaming SVE set SVE get SVE for VL 8160
5831 22:58:48.881186 # ok 4095 # SKIP Streaming SVE set SVE get FPSIMD for VL 8160
5832 22:58:48.881271 # ok 4096 # SKIP Streaming SVE set FPSIMD get SVE for VL 8160
5833 22:58:48.881355 # ok 4097 Set Streaming SVE VL 8176
5834 22:58:48.881452 # ok 4098 # SKIP Streaming SVE set SVE get SVE for VL 8176
5835 22:58:48.881551 # ok 4099 # SKIP Streaming SVE set SVE get FPSIMD for VL 8176
5836 22:58:48.881659 # ok 4100 # SKIP Streaming SVE set FPSIMD get SVE for VL 8176
5837 22:58:48.881761 # ok 4101 Set Streaming SVE VL 8192
5838 22:58:48.881846 # ok 4102 # SKIP Streaming SVE set SVE get SVE for VL 8192
5839 22:58:48.881942 # ok 4103 # SKIP Streaming SVE set SVE get FPSIMD for VL 8192
5840 22:58:48.882298 # ok 4104 # SKIP Streaming SVE set FPSIMD get SVE for VL 8192
5841 22:58:48.882406 # # Totals: pass:1095 fail:0 xfail:0 xpass:0 skip:3009 error:0
5842 22:58:48.882686 ok 30 selftests: arm64: sve-ptrace
5843 22:58:48.882783 # selftests: arm64: sve-probe-vls
5844 22:58:48.896001 # TAP version 13
5845 22:58:48.896244 # 1..2
5846 22:58:48.896561 # ok 1 Enumerated 16 vector lengths
5847 22:58:48.896700 # ok 2 All vector lengths valid
5848 22:58:48.896789 # # 16
5849 22:58:48.896873 # # 32
5850 22:58:48.896956 # # 48
5851 22:58:48.897040 # # 64
5852 22:58:48.897123 # # 80
5853 22:58:48.897206 # # 96
5854 22:58:48.897289 # # 112
5855 22:58:48.897372 # # 128
5856 22:58:48.897452 # # 144
5857 22:58:48.897536 # # 160
5858 22:58:48.897619 # # 176
5859 22:58:48.897712 # # 192
5860 22:58:48.897795 # # 208
5861 22:58:48.897879 # # 224
5862 22:58:48.897961 # # 240
5863 22:58:48.898045 # # 256
5864 22:58:48.898149 # # Totals: pass:2 fail:0 xfail:0 xpass:0 skip:0 error:0
5865 22:58:48.908966 ok 31 selftests: arm64: sve-probe-vls
5866 22:58:49.048365 # selftests: arm64: vec-syscfg
5867 22:58:50.012707 # TAP version 13
5868 22:58:50.013141 # 1..20
5869 22:58:50.013239 # ok 1 SVE default vector length 64
5870 22:58:50.013330 # ok 2 SVE minimum vector length 16
5871 22:58:50.013412 # ok 3 SVE maximum vector length 256
5872 22:58:50.013493 # ok 4 SVE current VL is 64
5873 22:58:50.013595 # ok 5 SVE set VL 64 and have VL 64
5874 22:58:50.013689 # ok 6 SVE prctl() set min/max
5875 22:58:50.013775 # ok 7 SVE vector length used default
5876 22:58:50.013859 # ok 8 SVE vector length was inherited
5877 22:58:50.013943 # ok 9 SVE vector length set on exec
5878 22:58:50.014043 # ok 10 SVE prctl() set all VLs, 0 errors
5879 22:58:50.014129 # ok 11 SME default vector length 32
5880 22:58:50.014214 # ok 12 SME minimum vector length 16
5881 22:58:50.014298 # ok 13 SME maximum vector length 256
5882 22:58:50.014381 # ok 14 SME current VL is 32
5883 22:58:50.014464 # ok 15 SME set VL 32 and have VL 32
5884 22:58:50.014563 # ok 16 SME prctl() set min/max
5885 22:58:50.014649 # ok 17 SME vector length used default
5886 22:58:50.014732 # ok 18 SME vector length was inherited
5887 22:58:50.014815 # ok 19 SME vector length set on exec
5888 22:58:50.014899 # ok 20 SME prctl() set all VLs, 0 errors
5889 22:58:50.033087 # # Totals: pass:20 fail:0 xfail:0 xpass:0 skip:0 error:0
5890 22:58:50.040423 ok 32 selftests: arm64: vec-syscfg
5891 22:58:50.134085 # selftests: arm64: za-fork
5892 22:58:50.301030 # TAP version 13
5893 22:58:50.301279 # 1..1
5894 22:58:50.301371 # # PID: 1019
5895 22:58:50.301455 # ok 1 fork_test
5896 22:58:50.301540 # # Totals: pass:1 fail:0 xfail:0 xpass:0 skip:0 error:0
5897 22:58:50.324492 ok 33 selftests: arm64: za-fork
5898 22:58:50.477363 # selftests: arm64: za-ptrace
5899 22:58:50.648743 # TAP version 13
5900 22:58:50.649003 # 1..1536
5901 22:58:50.649095 # # Parent is 1037, child is 1038
5902 22:58:50.649398 # ok 1 Set VL 16
5903 22:58:50.649507 # ok 2 Disabled ZA for VL 16
5904 22:58:50.649597 # ok 3 Data match for VL 16
5905 22:58:50.649689 # ok 4 Set VL 32
5906 22:58:50.649775 # ok 5 Disabled ZA for VL 32
5907 22:58:50.649857 # ok 6 Data match for VL 32
5908 22:58:50.649942 # ok 7 Set VL 48
5909 22:58:50.650027 # ok 8 # SKIP Disabled ZA for VL 48
5910 22:58:50.650111 # ok 9 # SKIP Get and set data for VL 48
5911 22:58:50.650191 # ok 10 Set VL 64
5912 22:58:50.650294 # ok 11 Disabled ZA for VL 64
5913 22:58:50.650380 # ok 12 Data match for VL 64
5914 22:58:50.650462 # ok 13 Set VL 80
5915 22:58:50.650543 # ok 14 # SKIP Disabled ZA for VL 80
5916 22:58:50.650624 # ok 15 # SKIP Get and set data for VL 80
5917 22:58:50.650705 # ok 16 Set VL 96
5918 22:58:50.650789 # ok 17 # SKIP Disabled ZA for VL 96
5919 22:58:50.650872 # ok 18 # SKIP Get and set data for VL 96
5920 22:58:50.650955 # ok 19 Set VL 112
5921 22:58:50.651033 # ok 20 # SKIP Disabled ZA for VL 112
5922 22:58:50.651111 # ok 21 # SKIP Get and set data for VL 112
5923 22:58:50.651210 # ok 22 Set VL 128
5924 22:58:50.651294 # ok 23 Disabled ZA for VL 128
5925 22:58:50.651375 # ok 24 Data match for VL 128
5926 22:58:50.651951 # ok 25 Set VL 144
5927 22:58:50.652256 # ok 26 # SKIP Disabled ZA for VL 144
5928 22:58:50.652351 # ok 27 # SKIP Get and set data for VL 144
5929 22:58:50.652454 # ok 28 Set VL 160
5930 22:58:50.652541 # ok 29 # SKIP Disabled ZA for VL 160
5931 22:58:50.652628 # ok 30 # SKIP Get and set data for VL 160
5932 22:58:50.652710 # ok 31 Set VL 176
5933 22:58:50.652814 # ok 32 # SKIP Disabled ZA for VL 176
5934 22:58:50.652898 # ok 33 # SKIP Get and set data for VL 176
5935 22:58:50.652981 # ok 34 Set VL 192
5936 22:58:50.653063 # ok 35 # SKIP Disabled ZA for VL 192
5937 22:58:50.653145 # ok 36 # SKIP Get and set data for VL 192
5938 22:58:50.653226 # ok 37 Set VL 208
5939 22:58:50.653324 # ok 38 # SKIP Disabled ZA for VL 208
5940 22:58:50.653408 # ok 39 # SKIP Get and set data for VL 208
5941 22:58:50.653489 # ok 40 Set VL 224
5942 22:58:50.653572 # ok 41 # SKIP Disabled ZA for VL 224
5943 22:58:50.653662 # ok 42 # SKIP Get and set data for VL 224
5944 22:58:50.653746 # ok 43 Set VL 240
5945 22:58:50.653833 # ok 44 # SKIP Disabled ZA for VL 240
5946 22:58:50.653933 # ok 45 # SKIP Get and set data for VL 240
5947 22:58:50.654018 # ok 46 Set VL 256
5948 22:58:50.654100 # ok 47 Disabled ZA for VL 256
5949 22:58:50.654183 # ok 48 Data match for VL 256
5950 22:58:50.654265 # ok 49 Set VL 272
5951 22:58:50.654347 # ok 50 # SKIP Disabled ZA for VL 272
5952 22:58:50.654429 # ok 51 # SKIP Get and set data for VL 272
5953 22:58:50.654511 # ok 52 Set VL 288
5954 22:58:50.654611 # ok 53 # SKIP Disabled ZA for VL 288
5955 22:58:50.654696 # ok 54 # SKIP Get and set data for VL 288
5956 22:58:50.654778 # ok 55 Set VL 304
5957 22:58:50.654860 # ok 56 # SKIP Disabled ZA for VL 304
5958 22:58:50.654941 # ok 57 # SKIP Get and set data for VL 304
5959 22:58:50.655023 # ok 58 Set VL 320
5960 22:58:50.655105 # ok 59 # SKIP Disabled ZA for VL 320
5961 22:58:50.655187 # ok 60 # SKIP Get and set data for VL 320
5962 22:58:50.655269 # ok 61 Set VL 336
5963 22:58:50.655351 # ok 62 # SKIP Disabled ZA for VL 336
5964 22:58:50.655433 # ok 63 # SKIP Get and set data for VL 336
5965 22:58:50.655533 # ok 64 Set VL 352
5966 22:58:50.655617 # ok 65 # SKIP Disabled ZA for VL 352
5967 22:58:50.655700 # ok 66 # SKIP Get and set data for VL 352
5968 22:58:50.655781 # ok 67 Set VL 368
5969 22:58:50.655863 # ok 68 # SKIP Disabled ZA for VL 368
5970 22:58:50.655945 # ok 69 # SKIP Get and set data for VL 368
5971 22:58:50.656029 # ok 70 Set VL 384
5972 22:58:50.656129 # ok 71 # SKIP Disabled ZA for VL 384
5973 22:58:50.656213 # ok 72 # SKIP Get and set data for VL 384
5974 22:58:50.656296 # ok 73 Set VL 400
5975 22:58:50.656377 # ok 74 # SKIP Disabled ZA for VL 400
5976 22:58:50.656459 # ok 75 # SKIP Get and set data for VL 400
5977 22:58:50.656541 # ok 76 Set VL 416
5978 22:58:50.656623 # ok 77 # SKIP Disabled ZA for VL 416
5979 22:58:50.656705 # ok 78 # SKIP Get and set data for VL 416
5980 22:58:50.656792 # ok 79 Set VL 432
5981 22:58:50.656888 # ok 80 # SKIP Disabled ZA for VL 432
5982 22:58:50.656973 # ok 81 # SKIP Get and set data for VL 432
5983 22:58:50.657055 # ok 82 Set VL 448
5984 22:58:50.657347 # ok 83 # SKIP Disabled ZA for VL 448
5985 22:58:50.657457 # ok 84 # SKIP Get and set data for VL 448
5986 22:58:50.657548 # ok 85 Set VL 464
5987 22:58:50.657634 # ok 86 # SKIP Disabled ZA for VL 464
5988 22:58:50.657728 # ok 87 # SKIP Get and set data for VL 464
5989 22:58:50.657813 # ok 88 Set VL 480
5990 22:58:50.657896 # ok 89 # SKIP Disabled ZA for VL 480
5991 22:58:50.657980 # ok 90 # SKIP Get and set data for VL 480
5992 22:58:50.658068 # ok 91 Set VL 496
5993 22:58:50.658155 # ok 92 # SKIP Disabled ZA for VL 496
5994 22:58:50.658242 # ok 93 # SKIP Get and set data for VL 496
5995 22:58:50.658329 # ok 94 Set VL 512
5996 22:58:50.658413 # ok 95 # SKIP Disabled ZA for VL 512
5997 22:58:50.658513 # ok 96 # SKIP Get and set data for VL 512
5998 22:58:50.658595 # ok 97 Set VL 528
5999 22:58:50.658670 # ok 98 # SKIP Disabled ZA for VL 528
6000 22:58:50.658745 # ok 99 # SKIP Get and set data for VL 528
6001 22:58:50.658818 # ok 100 Set VL 544
6002 22:58:50.658892 # ok 101 # SKIP Disabled ZA for VL 544
6003 22:58:50.658966 # ok 102 # SKIP Get and set data for VL 544
6004 22:58:50.659038 # ok 103 Set VL 560
6005 22:58:50.659112 # ok 104 # SKIP Disabled ZA for VL 560
6006 22:58:50.659188 # ok 105 # SKIP Get and set data for VL 560
6007 22:58:50.659264 # ok 106 Set VL 576
6008 22:58:50.669724 # ok 107 # SKIP Disabled ZA for VL 576
6009 22:58:50.669927 # ok 108 # SKIP Get and set data for VL 576
6010 22:58:50.670018 # ok 109 Set VL 592
6011 22:58:50.670122 # ok 110 # SKIP Disabled ZA for VL 592
6012 22:58:50.670209 # ok 111 # SKIP Get and set data for VL 592
6013 22:58:50.670291 # ok 112 Set VL 608
6014 22:58:50.670374 # ok 113 # SKIP Disabled ZA for VL 608
6015 22:58:50.670476 # ok 114 # SKIP Get and set data for VL 608
6016 22:58:50.670561 # ok 115 Set VL 624
6017 22:58:50.670641 # ok 116 # SKIP Disabled ZA for VL 624
6018 22:58:50.670736 # ok 117 # SKIP Get and set data for VL 624
6019 22:58:50.671171 # ok 118 Set VL 640
6020 22:58:50.671486 # ok 119 # SKIP Disabled ZA for VL 640
6021 22:58:50.671589 # ok 120 # SKIP Get and set data for VL 640
6022 22:58:50.671677 # ok 121 Set VL 656
6023 22:58:50.671963 # ok 122 # SKIP Disabled ZA for VL 656
6024 22:58:50.672066 # ok 123 # SKIP Get and set data for VL 656
6025 22:58:50.672152 # ok 124 Set VL 672
6026 22:58:50.684381 # ok 125 # SKIP Disabled ZA for VL 672
6027 22:58:50.684624 # ok 126 # SKIP Get and set data for VL 672
6028 22:58:50.684717 # ok 127 Set VL 688
6029 22:58:50.684806 # ok 128 # SKIP Disabled ZA for VL 688
6030 22:58:50.685109 # ok 129 # SKIP Get and set data for VL 688
6031 22:58:50.685212 # ok 130 Set VL 704
6032 22:58:50.685303 # ok 131 # SKIP Disabled ZA for VL 704
6033 22:58:50.685390 # ok 132 # SKIP Get and set data for VL 704
6034 22:58:50.685475 # ok 133 Set VL 720
6035 22:58:50.685558 # ok 134 # SKIP Disabled ZA for VL 720
6036 22:58:50.685641 # ok 135 # SKIP Get and set data for VL 720
6037 22:58:50.685734 # ok 136 Set VL 736
6038 22:58:50.685840 # ok 137 # SKIP Disabled ZA for VL 736
6039 22:58:50.685929 # ok 138 # SKIP Get and set data for VL 736
6040 22:58:50.686013 # ok 139 Set VL 752
6041 22:58:50.686095 # ok 140 # SKIP Disabled ZA for VL 752
6042 22:58:50.686179 # ok 141 # SKIP Get and set data for VL 752
6043 22:58:50.686630 # ok 142 Set VL 768
6044 22:58:50.686725 # ok 143 # SKIP Disabled ZA for VL 768
6045 22:58:50.686802 # ok 144 # SKIP Get and set data for VL 768
6046 22:58:50.686876 # ok 145 Set VL 784
6047 22:58:50.686948 # ok 146 # SKIP Disabled ZA for VL 784
6048 22:58:50.687022 # ok 147 # SKIP Get and set data for VL 784
6049 22:58:50.687095 # ok 148 Set VL 800
6050 22:58:50.687170 # ok 149 # SKIP Disabled ZA for VL 800
6051 22:58:50.687248 # ok 150 # SKIP Get and set data for VL 800
6052 22:58:50.694055 # ok 151 Set VL 816
6053 22:58:50.694279 # ok 152 # SKIP Disabled ZA for VL 816
6054 22:58:50.694535 # ok 153 # SKIP Get and set data for VL 816
6055 22:58:50.694632 # ok 154 Set VL 832
6056 22:58:50.694709 # ok 155 # SKIP Disabled ZA for VL 832
6057 22:58:50.694783 # ok 156 # SKIP Get and set data for VL 832
6058 22:58:50.694856 # ok 157 Set VL 848
6059 22:58:50.695273 # ok 158 # SKIP Disabled ZA for VL 848
6060 22:58:50.695578 # ok 159 # SKIP Get and set data for VL 848
6061 22:58:50.695686 # ok 160 Set VL 864
6062 22:58:50.695942 # ok 161 # SKIP Disabled ZA for VL 864
6063 22:58:50.696047 # ok 162 # SKIP Get and set data for VL 864
6064 22:58:50.696136 # ok 163 Set VL 880
6065 22:58:50.696223 # ok 164 # SKIP Disabled ZA for VL 880
6066 22:58:50.696308 # ok 165 # SKIP Get and set data for VL 880
6067 22:58:50.696411 # ok 166 Set VL 896
6068 22:58:50.696498 # ok 167 # SKIP Disabled ZA for VL 896
6069 22:58:50.696582 # ok 168 # SKIP Get and set data for VL 896
6070 22:58:50.696667 # ok 169 Set VL 912
6071 22:58:50.696751 # ok 170 # SKIP Disabled ZA for VL 912
6072 22:58:50.696851 # ok 171 # SKIP Get and set data for VL 912
6073 22:58:50.696938 # ok 172 Set VL 928
6074 22:58:50.697022 # ok 173 # SKIP Disabled ZA for VL 928
6075 22:58:50.697109 # ok 174 # SKIP Get and set data for VL 928
6076 22:58:50.697191 # ok 175 Set VL 944
6077 22:58:50.697273 # ok 176 # SKIP Disabled ZA for VL 944
6078 22:58:50.697370 # ok 177 # SKIP Get and set data for VL 944
6079 22:58:50.697453 # ok 178 Set VL 960
6080 22:58:50.697535 # ok 179 # SKIP Disabled ZA for VL 960
6081 22:58:50.697618 # ok 180 # SKIP Get and set data for VL 960
6082 22:58:50.697710 # ok 181 Set VL 976
6083 22:58:50.697792 # ok 182 # SKIP Disabled ZA for VL 976
6084 22:58:50.697882 # ok 183 # SKIP Get and set data for VL 976
6085 22:58:50.697985 # ok 184 Set VL 992
6086 22:58:50.698073 # ok 185 # SKIP Disabled ZA for VL 992
6087 22:58:50.698158 # ok 186 # SKIP Get and set data for VL 992
6088 22:58:50.698243 # ok 187 Set VL 1008
6089 22:58:50.698326 # ok 188 # SKIP Disabled ZA for VL 1008
6090 22:58:50.698410 # ok 189 # SKIP Get and set data for VL 1008
6091 22:58:50.698493 # ok 190 Set VL 1024
6092 22:58:50.698595 # ok 191 # SKIP Disabled ZA for VL 1024
6093 22:58:50.698683 # ok 192 # SKIP Get and set data for VL 1024
6094 22:58:50.698768 # ok 193 Set VL 1040
6095 22:58:50.698852 # ok 194 # SKIP Disabled ZA for VL 1040
6096 22:58:50.698936 # ok 195 # SKIP Get and set data for VL 1040
6097 22:58:50.699019 # ok 196 Set VL 1056
6098 22:58:50.699103 # ok 197 # SKIP Disabled ZA for VL 1056
6099 22:58:50.705803 # ok 198 # SKIP Get and set data for VL 1056
6100 22:58:50.706018 # ok 199 Set VL 1072
6101 22:58:50.706315 # ok 200 # SKIP Disabled ZA for VL 1072
6102 22:58:50.706408 # ok 201 # SKIP Get and set data for VL 1072
6103 22:58:50.706495 # ok 202 Set VL 1088
6104 22:58:50.706579 # ok 203 # SKIP Disabled ZA for VL 1088
6105 22:58:50.706664 # ok 204 # SKIP Get and set data for VL 1088
6106 22:58:50.706749 # ok 205 Set VL 1104
6107 22:58:50.706832 # ok 206 # SKIP Disabled ZA for VL 1104
6108 22:58:50.706921 # ok 207 # SKIP Get and set data for VL 1104
6109 22:58:50.707022 # ok 208 Set VL 1120
6110 22:58:50.707108 # ok 209 # SKIP Disabled ZA for VL 1120
6111 22:58:50.707192 # ok 210 # SKIP Get and set data for VL 1120
6112 22:58:50.707276 # ok 211 Set VL 1136
6113 22:58:50.707377 # ok 212 # SKIP Disabled ZA for VL 1136
6114 22:58:50.707463 # ok 213 # SKIP Get and set data for VL 1136
6115 22:58:50.707548 # ok 214 Set VL 1152
6116 22:58:50.707631 # ok 215 # SKIP Disabled ZA for VL 1152
6117 22:58:50.707733 # ok 216 # SKIP Get and set data for VL 1152
6118 22:58:50.707820 # ok 217 Set VL 1168
6119 22:58:50.707904 # ok 218 # SKIP Disabled ZA for VL 1168
6120 22:58:50.707987 # ok 219 # SKIP Get and set data for VL 1168
6121 22:58:50.708071 # ok 220 Set VL 1184
6122 22:58:50.708154 # ok 221 # SKIP Disabled ZA for VL 1184
6123 22:58:50.708255 # ok 222 # SKIP Get and set data for VL 1184
6124 22:58:50.708342 # ok 223 Set VL 1200
6125 22:58:50.708425 # ok 224 # SKIP Disabled ZA for VL 1200
6126 22:58:50.708509 # ok 225 # SKIP Get and set data for VL 1200
6127 22:58:50.708592 # ok 226 Set VL 1216
6128 22:58:50.708693 # ok 227 # SKIP Disabled ZA for VL 1216
6129 22:58:50.708780 # ok 228 # SKIP Get and set data for VL 1216
6130 22:58:50.708864 # ok 229 Set VL 1232
6131 22:58:50.708948 # ok 230 # SKIP Disabled ZA for VL 1232
6132 22:58:50.709031 # ok 231 # SKIP Get and set data for VL 1232
6133 22:58:50.709115 # ok 232 Set VL 1248
6134 22:58:50.709216 # ok 233 # SKIP Disabled ZA for VL 1248
6135 22:58:50.709305 # ok 234 # SKIP Get and set data for VL 1248
6136 22:58:50.709387 # ok 235 Set VL 1264
6137 22:58:50.709467 # ok 236 # SKIP Disabled ZA for VL 1264
6138 22:58:50.709550 # ok 237 # SKIP Get and set data for VL 1264
6139 22:58:50.709629 # ok 238 Set VL 1280
6140 22:58:50.709718 # ok 239 # SKIP Disabled ZA for VL 1280
6141 22:58:50.709819 # ok 240 # SKIP Get and set data for VL 1280
6142 22:58:50.709904 # ok 241 Set VL 1296
6143 22:58:50.709986 # ok 242 # SKIP Disabled ZA for VL 1296
6144 22:58:50.710069 # ok 243 # SKIP Get and set data for VL 1296
6145 22:58:50.710151 # ok 244 Set VL 1312
6146 22:58:50.710233 # ok 245 # SKIP Disabled ZA for VL 1312
6147 22:58:50.710314 # ok 246 # SKIP Get and set data for VL 1312
6148 22:58:50.710413 # ok 247 Set VL 1328
6149 22:58:50.710498 # ok 248 # SKIP Disabled ZA for VL 1328
6150 22:58:50.710580 # ok 249 # SKIP Get and set data for VL 1328
6151 22:58:50.710662 # ok 250 Set VL 1344
6152 22:58:50.710744 # ok 251 # SKIP Disabled ZA for VL 1344
6153 22:58:50.710825 # ok 252 # SKIP Get and set data for VL 1344
6154 22:58:50.710912 # ok 253 Set VL 1360
6155 22:58:50.711206 # ok 254 # SKIP Disabled ZA for VL 1360
6156 22:58:50.711314 # ok 255 # SKIP Get and set data for VL 1360
6157 22:58:50.717780 # ok 256 Set VL 1376
6158 22:58:50.718231 # ok 257 # SKIP Disabled ZA for VL 1376
6159 22:58:50.718339 # ok 258 # SKIP Get and set data for VL 1376
6160 22:58:50.718441 # ok 259 Set VL 1392
6161 22:58:50.718527 # ok 260 # SKIP Disabled ZA for VL 1392
6162 22:58:50.718603 # ok 261 # SKIP Get and set data for VL 1392
6163 22:58:50.718675 # ok 262 Set VL 1408
6164 22:58:50.718761 # ok 263 # SKIP Disabled ZA for VL 1408
6165 22:58:50.719256 # ok 264 # SKIP Get and set data for VL 1408
6166 22:58:50.719565 # ok 265 Set VL 1424
6167 22:58:50.719671 # ok 266 # SKIP Disabled ZA for VL 1424
6168 22:58:50.719758 # ok 267 # SKIP Get and set data for VL 1424
6169 22:58:50.719844 # ok 268 Set VL 1440
6170 22:58:50.719953 # ok 269 # SKIP Disabled ZA for VL 1440
6171 22:58:50.720038 # ok 270 # SKIP Get and set data for VL 1440
6172 22:58:50.720122 # ok 271 Set VL 1456
6173 22:58:50.720203 # ok 272 # SKIP Disabled ZA for VL 1456
6174 22:58:50.720302 # ok 273 # SKIP Get and set data for VL 1456
6175 22:58:50.720387 # ok 274 Set VL 1472
6176 22:58:50.720485 # ok 275 # SKIP Disabled ZA for VL 1472
6177 22:58:50.720569 # ok 276 # SKIP Get and set data for VL 1472
6178 22:58:50.720650 # ok 277 Set VL 1488
6179 22:58:50.720749 # ok 278 # SKIP Disabled ZA for VL 1488
6180 22:58:50.720847 # ok 279 # SKIP Get and set data for VL 1488
6181 22:58:50.720932 # ok 280 Set VL 1504
6182 22:58:50.721029 # ok 281 # SKIP Disabled ZA for VL 1504
6183 22:58:50.721128 # ok 282 # SKIP Get and set data for VL 1504
6184 22:58:50.721214 # ok 283 Set VL 1520
6185 22:58:50.721309 # ok 284 # SKIP Disabled ZA for VL 1520
6186 22:58:50.721601 # ok 285 # SKIP Get and set data for VL 1520
6187 22:58:50.721718 # ok 286 Set VL 1536
6188 22:58:50.721808 # ok 287 # SKIP Disabled ZA for VL 1536
6189 22:58:50.725487 # ok 288 # SKIP Get and set data for VL 1536
6190 22:58:50.725688 # ok 289 Set VL 1552
6191 22:58:50.725778 # ok 290 # SKIP Disabled ZA for VL 1552
6192 22:58:50.725867 # ok 291 # SKIP Get and set data for VL 1552
6193 22:58:50.725957 # ok 292 Set VL 1568
6194 22:58:50.726042 # ok 293 # SKIP Disabled ZA for VL 1568
6195 22:58:50.726127 # ok 294 # SKIP Get and set data for VL 1568
6196 22:58:50.726210 # ok 295 Set VL 1584
6197 22:58:50.726294 # ok 296 # SKIP Disabled ZA for VL 1584
6198 22:58:50.730373 # ok 297 # SKIP Get and set data for VL 1584
6199 22:58:50.730813 # ok 298 Set VL 1600
6200 22:58:50.731490 # ok 299 # SKIP Disabled ZA for VL 1600
6201 22:58:50.731800 # ok 300 # SKIP Get and set data for VL 1600
6202 22:58:50.731910 # ok 301 Set VL 1616
6203 22:58:50.732003 # ok 302 # SKIP Disabled ZA for VL 1616
6204 22:58:50.732106 # ok 303 # SKIP Get and set data for VL 1616
6205 22:58:50.732194 # ok 304 Set VL 1632
6206 22:58:50.732292 # ok 305 # SKIP Disabled ZA for VL 1632
6207 22:58:50.732377 # ok 306 # SKIP Get and set data for VL 1632
6208 22:58:50.732475 # ok 307 Set VL 1648
6209 22:58:50.732559 # ok 308 # SKIP Disabled ZA for VL 1648
6210 22:58:50.732656 # ok 309 # SKIP Get and set data for VL 1648
6211 22:58:50.732756 # ok 310 Set VL 1664
6212 22:58:50.733117 # ok 311 # SKIP Disabled ZA for VL 1664
6213 22:58:50.733221 # ok 312 # SKIP Get and set data for VL 1664
6214 22:58:50.733306 # ok 313 Set VL 1680
6215 22:58:50.733388 # ok 314 # SKIP Disabled ZA for VL 1680
6216 22:58:50.733486 # ok 315 # SKIP Get and set data for VL 1680
6217 22:58:50.733571 # ok 316 Set VL 1696
6218 22:58:50.733660 # ok 317 # SKIP Disabled ZA for VL 1696
6219 22:58:50.733757 # ok 318 # SKIP Get and set data for VL 1696
6220 22:58:50.733841 # ok 319 Set VL 1712
6221 22:58:50.733922 # ok 320 # SKIP Disabled ZA for VL 1712
6222 22:58:50.734020 # ok 321 # SKIP Get and set data for VL 1712
6223 22:58:50.734105 # ok 322 Set VL 1728
6224 22:58:50.734202 # ok 323 # SKIP Disabled ZA for VL 1728
6225 22:58:50.734286 # ok 324 # SKIP Get and set data for VL 1728
6226 22:58:50.734367 # ok 325 Set VL 1744
6227 22:58:50.734464 # ok 326 # SKIP Disabled ZA for VL 1744
6228 22:58:50.734550 # ok 327 # SKIP Get and set data for VL 1744
6229 22:58:50.788753 # ok 328 Set VL 1760
6230 22:58:50.789001 # ok 329 # SKIP Disabled ZA for VL 1760
6231 22:58:50.789321 # ok 330 # SKIP Get and set data for VL 1760
6232 22:58:50.789424 # ok 331 Set VL 1776
6233 22:58:50.789513 # ok 332 # SKIP Disabled ZA for VL 1776
6234 22:58:50.789600 # ok 333 # SKIP Get and set data for VL 1776
6235 22:58:50.789695 # ok 334 Set VL 1792
6236 22:58:50.789781 # ok 335 # SKIP Disabled ZA for VL 1792
6237 22:58:50.789884 # ok 336 # SKIP Get and set data for VL 1792
6238 22:58:50.789972 # ok 337 Set VL 1808
6239 22:58:50.790058 # ok 338 # SKIP Disabled ZA for VL 1808
6240 22:58:50.790142 # ok 339 # SKIP Get and set data for VL 1808
6241 22:58:50.790226 # ok 340 Set VL 1824
6242 22:58:50.790310 # ok 341 # SKIP Disabled ZA for VL 1824
6243 22:58:50.790412 # ok 342 # SKIP Get and set data for VL 1824
6244 22:58:50.790499 # ok 343 Set VL 1840
6245 22:58:50.790583 # ok 344 # SKIP Disabled ZA for VL 1840
6246 22:58:50.790684 # ok 345 # SKIP Get and set data for VL 1840
6247 22:58:50.790770 # ok 346 Set VL 1856
6248 22:58:50.790853 # ok 347 # SKIP Disabled ZA for VL 1856
6249 22:58:50.809224 # ok 348 # SKIP Get and set data for VL 1856
6250 22:58:50.809478 # ok 349 Set VL 1872
6251 22:58:50.809564 # ok 350 # SKIP Disabled ZA for VL 1872
6252 22:58:50.809874 # ok 351 # SKIP Get and set data for VL 1872
6253 22:58:50.809979 # ok 352 Set VL 1888
6254 22:58:50.810066 # ok 353 # SKIP Disabled ZA for VL 1888
6255 22:58:50.810152 # ok 354 # SKIP Get and set data for VL 1888
6256 22:58:50.810237 # ok 355 Set VL 1904
6257 22:58:50.810320 # ok 356 # SKIP Disabled ZA for VL 1904
6258 22:58:50.810404 # ok 357 # SKIP Get and set data for VL 1904
6259 22:58:50.810488 # ok 358 Set VL 1920
6260 22:58:50.829383 # ok 359 # SKIP Disabled ZA for VL 1920
6261 22:58:50.829855 # ok 360 # SKIP Get and set data for VL 1920
6262 22:58:50.829962 # ok 361 Set VL 1936
6263 22:58:50.830049 # ok 362 # SKIP Disabled ZA for VL 1936
6264 22:58:50.830138 # ok 363 # SKIP Get and set data for VL 1936
6265 22:58:50.830221 # ok 364 Set VL 1952
6266 22:58:50.830303 # ok 365 # SKIP Disabled ZA for VL 1952
6267 22:58:50.830405 # ok 366 # SKIP Get and set data for VL 1952
6268 22:58:50.830489 # ok 367 Set VL 1968
6269 22:58:50.830572 # ok 368 # SKIP Disabled ZA for VL 1968
6270 22:58:50.830653 # ok 369 # SKIP Get and set data for VL 1968
6271 22:58:50.830737 # ok 370 Set VL 1984
6272 22:58:50.830835 # ok 371 # SKIP Disabled ZA for VL 1984
6273 22:58:50.833505 # ok 372 # SKIP Get and set data for VL 1984
6274 22:58:50.833947 # ok 373 Set VL 2000
6275 22:58:50.834053 # ok 374 # SKIP Disabled ZA for VL 2000
6276 22:58:50.834148 # ok 375 # SKIP Get and set data for VL 2000
6277 22:58:50.834234 # ok 376 Set VL 2016
6278 22:58:50.834318 # ok 377 # SKIP Disabled ZA for VL 2016
6279 22:58:50.834425 # ok 378 # SKIP Get and set data for VL 2016
6280 22:58:50.834508 # ok 379 Set VL 2032
6281 22:58:50.834583 # ok 380 # SKIP Disabled ZA for VL 2032
6282 22:58:50.834671 # ok 381 # SKIP Get and set data for VL 2032
6283 22:58:50.839855 # ok 382 Set VL 2048
6284 22:58:50.840318 # ok 383 # SKIP Disabled ZA for VL 2048
6285 22:58:50.840419 # ok 384 # SKIP Get and set data for VL 2048
6286 22:58:50.840508 # ok 385 Set VL 2064
6287 22:58:50.840593 # ok 386 # SKIP Disabled ZA for VL 2064
6288 22:58:50.840679 # ok 387 # SKIP Get and set data for VL 2064
6289 22:58:50.840764 # ok 388 Set VL 2080
6290 22:58:50.840869 # ok 389 # SKIP Disabled ZA for VL 2080
6291 22:58:50.840957 # ok 390 # SKIP Get and set data for VL 2080
6292 22:58:50.841042 # ok 391 Set VL 2096
6293 22:58:50.841126 # ok 392 # SKIP Disabled ZA for VL 2096
6294 22:58:50.841210 # ok 393 # SKIP Get and set data for VL 2096
6295 22:58:50.841312 # ok 394 Set VL 2112
6296 22:58:50.841399 # ok 395 # SKIP Disabled ZA for VL 2112
6297 22:58:50.841485 # ok 396 # SKIP Get and set data for VL 2112
6298 22:58:50.841568 # ok 397 Set VL 2128
6299 22:58:50.841676 # ok 398 # SKIP Disabled ZA for VL 2128
6300 22:58:50.841765 # ok 399 # SKIP Get and set data for VL 2128
6301 22:58:50.841851 # ok 400 Set VL 2144
6302 22:58:50.841935 # ok 401 # SKIP Disabled ZA for VL 2144
6303 22:58:50.842034 # ok 402 # SKIP Get and set data for VL 2144
6304 22:58:50.842121 # ok 403 Set VL 2160
6305 22:58:50.842206 # ok 404 # SKIP Disabled ZA for VL 2160
6306 22:58:50.842306 # ok 405 # SKIP Get and set data for VL 2160
6307 22:58:50.842390 # ok 406 Set VL 2176
6308 22:58:50.842470 # ok 407 # SKIP Disabled ZA for VL 2176
6309 22:58:50.847869 # ok 408 # SKIP Get and set data for VL 2176
6310 22:58:50.848111 # ok 409 Set VL 2192
6311 22:58:50.848422 # ok 410 # SKIP Disabled ZA for VL 2192
6312 22:58:50.848528 # ok 411 # SKIP Get and set data for VL 2192
6313 22:58:50.848616 # ok 412 Set VL 2208
6314 22:58:50.848699 # ok 413 # SKIP Disabled ZA for VL 2208
6315 22:58:50.848782 # ok 414 # SKIP Get and set data for VL 2208
6316 22:58:50.848864 # ok 415 Set VL 2224
6317 22:58:50.848963 # ok 416 # SKIP Disabled ZA for VL 2224
6318 22:58:50.849050 # ok 417 # SKIP Get and set data for VL 2224
6319 22:58:50.849134 # ok 418 Set VL 2240
6320 22:58:50.849221 # ok 419 # SKIP Disabled ZA for VL 2240
6321 22:58:50.849303 # ok 420 # SKIP Get and set data for VL 2240
6322 22:58:50.849672 # ok 421 Set VL 2256
6323 22:58:50.849767 # ok 422 # SKIP Disabled ZA for VL 2256
6324 22:58:50.849854 # ok 423 # SKIP Get and set data for VL 2256
6325 22:58:50.849937 # ok 424 Set VL 2272
6326 22:58:50.850020 # ok 425 # SKIP Disabled ZA for VL 2272
6327 22:58:50.850101 # ok 426 # SKIP Get and set data for VL 2272
6328 22:58:50.850184 # ok 427 Set VL 2288
6329 22:58:50.850282 # ok 428 # SKIP Disabled ZA for VL 2288
6330 22:58:50.850366 # ok 429 # SKIP Get and set data for VL 2288
6331 22:58:50.850449 # ok 430 Set VL 2304
6332 22:58:50.850530 # ok 431 # SKIP Disabled ZA for VL 2304
6333 22:58:50.850612 # ok 432 # SKIP Get and set data for VL 2304
6334 22:58:50.850693 # ok 433 Set VL 2320
6335 22:58:50.850792 # ok 434 # SKIP Disabled ZA for VL 2320
6336 22:58:50.850877 # ok 435 # SKIP Get and set data for VL 2320
6337 22:58:50.850960 # ok 436 Set VL 2336
6338 22:58:50.856202 # ok 437 # SKIP Disabled ZA for VL 2336
6339 22:58:50.856673 # ok 438 # SKIP Get and set data for VL 2336
6340 22:58:50.856810 # ok 439 Set VL 2352
6341 22:58:50.856910 # ok 440 # SKIP Disabled ZA for VL 2352
6342 22:58:50.856996 # ok 441 # SKIP Get and set data for VL 2352
6343 22:58:50.857080 # ok 442 Set VL 2368
6344 22:58:50.857184 # ok 443 # SKIP Disabled ZA for VL 2368
6345 22:58:50.857274 # ok 444 # SKIP Get and set data for VL 2368
6346 22:58:50.857360 # ok 445 Set VL 2384
6347 22:58:50.857441 # ok 446 # SKIP Disabled ZA for VL 2384
6348 22:58:50.857542 # ok 447 # SKIP Get and set data for VL 2384
6349 22:58:50.857627 # ok 448 Set VL 2400
6350 22:58:50.857720 # ok 449 # SKIP Disabled ZA for VL 2400
6351 22:58:50.857805 # ok 450 # SKIP Get and set data for VL 2400
6352 22:58:50.857904 # ok 451 Set VL 2416
6353 22:58:50.857990 # ok 452 # SKIP Disabled ZA for VL 2416
6354 22:58:50.858090 # ok 453 # SKIP Get and set data for VL 2416
6355 22:58:50.858177 # ok 454 Set VL 2432
6356 22:58:50.858262 # ok 455 # SKIP Disabled ZA for VL 2432
6357 22:58:50.858362 # ok 456 # SKIP Get and set data for VL 2432
6358 22:58:50.858446 # ok 457 Set VL 2448
6359 22:58:50.858541 # ok 458 # SKIP Disabled ZA for VL 2448
6360 22:58:50.864049 # ok 459 # SKIP Get and set data for VL 2448
6361 22:58:50.864297 # ok 460 Set VL 2464
6362 22:58:50.864384 # ok 461 # SKIP Disabled ZA for VL 2464
6363 22:58:50.864695 # ok 462 # SKIP Get and set data for VL 2464
6364 22:58:50.864830 # ok 463 Set VL 2480
6365 22:58:50.864923 # ok 464 # SKIP Disabled ZA for VL 2480
6366 22:58:50.865007 # ok 465 # SKIP Get and set data for VL 2480
6367 22:58:50.865089 # ok 466 Set VL 2496
6368 22:58:50.865175 # ok 467 # SKIP Disabled ZA for VL 2496
6369 22:58:50.865276 # ok 468 # SKIP Get and set data for VL 2496
6370 22:58:50.865367 # ok 469 Set VL 2512
6371 22:58:50.865450 # ok 470 # SKIP Disabled ZA for VL 2512
6372 22:58:50.865530 # ok 471 # SKIP Get and set data for VL 2512
6373 22:58:50.865613 # ok 472 Set VL 2528
6374 22:58:50.865705 # ok 473 # SKIP Disabled ZA for VL 2528
6375 22:58:50.865807 # ok 474 # SKIP Get and set data for VL 2528
6376 22:58:50.865893 # ok 475 Set VL 2544
6377 22:58:50.865975 # ok 476 # SKIP Disabled ZA for VL 2544
6378 22:58:50.866057 # ok 477 # SKIP Get and set data for VL 2544
6379 22:58:50.866139 # ok 478 Set VL 2560
6380 22:58:50.866220 # ok 479 # SKIP Disabled ZA for VL 2560
6381 22:58:50.866321 # ok 480 # SKIP Get and set data for VL 2560
6382 22:58:50.866407 # ok 481 Set VL 2576
6383 22:58:50.866489 # ok 482 # SKIP Disabled ZA for VL 2576
6384 22:58:50.866572 # ok 483 # SKIP Get and set data for VL 2576
6385 22:58:50.866654 # ok 484 Set VL 2592
6386 22:58:50.866736 # ok 485 # SKIP Disabled ZA for VL 2592
6387 22:58:50.866817 # ok 486 # SKIP Get and set data for VL 2592
6388 22:58:50.866899 # ok 487 Set VL 2608
6389 22:58:50.866998 # ok 488 # SKIP Disabled ZA for VL 2608
6390 22:58:50.867083 # ok 489 # SKIP Get and set data for VL 2608
6391 22:58:50.870477 # ok 490 Set VL 2624
6392 22:58:50.870882 # ok 491 # SKIP Disabled ZA for VL 2624
6393 22:58:50.876684 # ok 492 # SKIP Get and set data for VL 2624
6394 22:58:50.877160 # ok 493 Set VL 2640
6395 22:58:50.877274 # ok 494 # SKIP Disabled ZA for VL 2640
6396 22:58:50.877364 # ok 495 # SKIP Get and set data for VL 2640
6397 22:58:50.877447 # ok 496 Set VL 2656
6398 22:58:50.877529 # ok 497 # SKIP Disabled ZA for VL 2656
6399 22:58:50.877610 # ok 498 # SKIP Get and set data for VL 2656
6400 22:58:50.877723 # ok 499 Set VL 2672
6401 22:58:50.877811 # ok 500 # SKIP Disabled ZA for VL 2672
6402 22:58:50.877896 # ok 501 # SKIP Get and set data for VL 2672
6403 22:58:50.877976 # ok 502 Set VL 2688
6404 22:58:50.878059 # ok 503 # SKIP Disabled ZA for VL 2688
6405 22:58:50.878141 # ok 504 # SKIP Get and set data for VL 2688
6406 22:58:50.878229 # ok 505 Set VL 2704
6407 22:58:50.878330 # ok 506 # SKIP Disabled ZA for VL 2704
6408 22:58:50.878415 # ok 507 # SKIP Get and set data for VL 2704
6409 22:58:50.878495 # ok 508 Set VL 2720
6410 22:58:50.878577 # ok 509 # SKIP Disabled ZA for VL 2720
6411 22:58:50.878658 # ok 510 # SKIP Get and set data for VL 2720
6412 22:58:50.878738 # ok 511 Set VL 2736
6413 22:58:50.878818 # ok 512 # SKIP Disabled ZA for VL 2736
6414 22:58:50.878917 # ok 513 # SKIP Get and set data for VL 2736
6415 22:58:50.879002 # ok 514 Set VL 2752
6416 22:58:50.879085 # ok 515 # SKIP Disabled ZA for VL 2752
6417 22:58:50.883902 # ok 516 # SKIP Get and set data for VL 2752
6418 22:58:50.884147 # ok 517 Set VL 2768
6419 22:58:50.884486 # ok 518 # SKIP Disabled ZA for VL 2768
6420 22:58:50.884613 # ok 519 # SKIP Get and set data for VL 2768
6421 22:58:50.884777 # ok 520 Set VL 2784
6422 22:58:50.884939 # ok 521 # SKIP Disabled ZA for VL 2784
6423 22:58:50.885033 # ok 522 # SKIP Get and set data for VL 2784
6424 22:58:50.885137 # ok 523 Set VL 2800
6425 22:58:50.885224 # ok 524 # SKIP Disabled ZA for VL 2800
6426 22:58:50.885307 # ok 525 # SKIP Get and set data for VL 2800
6427 22:58:50.885536 # ok 526 Set VL 2816
6428 22:58:50.885625 # ok 527 # SKIP Disabled ZA for VL 2816
6429 22:58:50.885717 # ok 528 # SKIP Get and set data for VL 2816
6430 22:58:50.885803 # ok 529 Set VL 2832
6431 22:58:50.885906 # ok 530 # SKIP Disabled ZA for VL 2832
6432 22:58:50.885994 # ok 531 # SKIP Get and set data for VL 2832
6433 22:58:50.886080 # ok 532 Set VL 2848
6434 22:58:50.886164 # ok 533 # SKIP Disabled ZA for VL 2848
6435 22:58:50.886265 # ok 534 # SKIP Get and set data for VL 2848
6436 22:58:50.886351 # ok 535 Set VL 2864
6437 22:58:50.886432 # ok 536 # SKIP Disabled ZA for VL 2864
6438 22:58:50.886508 # ok 537 # SKIP Get and set data for VL 2864
6439 22:58:50.886581 # ok 538 Set VL 2880
6440 22:58:50.886667 # ok 539 # SKIP Disabled ZA for VL 2880
6441 22:58:50.891870 # ok 540 # SKIP Get and set data for VL 2880
6442 22:58:50.892358 # ok 541 Set VL 2896
6443 22:58:50.892463 # ok 542 # SKIP Disabled ZA for VL 2896
6444 22:58:50.892549 # ok 543 # SKIP Get and set data for VL 2896
6445 22:58:50.892636 # ok 544 Set VL 2912
6446 22:58:50.892721 # ok 545 # SKIP Disabled ZA for VL 2912
6447 22:58:50.892806 # ok 546 # SKIP Get and set data for VL 2912
6448 22:58:50.892890 # ok 547 Set VL 2928
6449 22:58:50.892990 # ok 548 # SKIP Disabled ZA for VL 2928
6450 22:58:50.893077 # ok 549 # SKIP Get and set data for VL 2928
6451 22:58:50.893159 # ok 550 Set VL 2944
6452 22:58:50.893242 # ok 551 # SKIP Disabled ZA for VL 2944
6453 22:58:50.893328 # ok 552 # SKIP Get and set data for VL 2944
6454 22:58:50.893415 # ok 553 Set VL 2960
6455 22:58:50.893498 # ok 554 # SKIP Disabled ZA for VL 2960
6456 22:58:50.893601 # ok 555 # SKIP Get and set data for VL 2960
6457 22:58:50.893698 # ok 556 Set VL 2976
6458 22:58:50.893803 # ok 557 # SKIP Disabled ZA for VL 2976
6459 22:58:50.893909 # ok 558 # SKIP Get and set data for VL 2976
6460 22:58:50.893995 # ok 559 Set VL 2992
6461 22:58:50.894080 # ok 560 # SKIP Disabled ZA for VL 2992
6462 22:58:50.894182 # ok 561 # SKIP Get and set data for VL 2992
6463 22:58:50.894275 # ok 562 Set VL 3008
6464 22:58:50.894359 # ok 563 # SKIP Disabled ZA for VL 3008
6465 22:58:50.894444 # ok 564 # SKIP Get and set data for VL 3008
6466 22:58:50.894530 # ok 565 Set VL 3024
6467 22:58:50.894613 # ok 566 # SKIP Disabled ZA for VL 3024
6468 22:58:50.894713 # ok 567 # SKIP Get and set data for VL 3024
6469 22:58:50.894803 # ok 568 Set VL 3040
6470 22:58:50.894887 # ok 569 # SKIP Disabled ZA for VL 3040
6471 22:58:50.900832 # ok 570 # SKIP Get and set data for VL 3040
6472 22:58:50.901074 # ok 571 Set VL 3056
6473 22:58:50.901402 # ok 572 # SKIP Disabled ZA for VL 3056
6474 22:58:50.901540 # ok 573 # SKIP Get and set data for VL 3056
6475 22:58:50.901708 # ok 574 Set VL 3072
6476 22:58:50.901796 # ok 575 # SKIP Disabled ZA for VL 3072
6477 22:58:50.901880 # ok 576 # SKIP Get and set data for VL 3072
6478 22:58:50.901964 # ok 577 Set VL 3088
6479 22:58:50.902063 # ok 578 # SKIP Disabled ZA for VL 3088
6480 22:58:50.902149 # ok 579 # SKIP Get and set data for VL 3088
6481 22:58:50.902232 # ok 580 Set VL 3104
6482 22:58:50.902313 # ok 581 # SKIP Disabled ZA for VL 3104
6483 22:58:50.902395 # ok 582 # SKIP Get and set data for VL 3104
6484 22:58:50.902477 # ok 583 Set VL 3120
6485 22:58:50.902576 # ok 584 # SKIP Disabled ZA for VL 3120
6486 22:58:50.902659 # ok 585 # SKIP Get and set data for VL 3120
6487 22:58:50.902743 # ok 586 Set VL 3136
6488 22:58:50.902824 # ok 587 # SKIP Disabled ZA for VL 3136
6489 22:58:50.903348 # ok 588 # SKIP Get and set data for VL 3136
6490 22:58:50.903455 # ok 589 Set VL 3152
6491 22:58:50.905190 # ok 590 # SKIP Disabled ZA for VL 3152
6492 22:58:50.905639 # ok 591 # SKIP Get and set data for VL 3152
6493 22:58:50.905837 # ok 592 Set VL 3168
6494 22:58:50.906009 # ok 593 # SKIP Disabled ZA for VL 3168
6495 22:58:50.906147 # ok 594 # SKIP Get and set data for VL 3168
6496 22:58:50.906304 # ok 595 Set VL 3184
6497 22:58:50.906437 # ok 596 # SKIP Disabled ZA for VL 3184
6498 22:58:50.906560 # ok 597 # SKIP Get and set data for VL 3184
6499 22:58:50.906677 # ok 598 Set VL 3200
6500 22:58:50.906792 # ok 599 # SKIP Disabled ZA for VL 3200
6501 22:58:50.906910 # ok 600 # SKIP Get and set data for VL 3200
6502 22:58:50.907026 # ok 601 Set VL 3216
6503 22:58:50.907167 # ok 602 # SKIP Disabled ZA for VL 3216
6504 22:58:50.916439 # ok 603 # SKIP Get and set data for VL 3216
6505 22:58:50.917069 # ok 604 Set VL 3232
6506 22:58:50.917304 # ok 605 # SKIP Disabled ZA for VL 3232
6507 22:58:50.917703 # ok 606 # SKIP Get and set data for VL 3232
6508 22:58:50.917888 # ok 607 Set VL 3248
6509 22:58:50.918050 # ok 608 # SKIP Disabled ZA for VL 3248
6510 22:58:50.918207 # ok 609 # SKIP Get and set data for VL 3248
6511 22:58:50.918362 # ok 610 Set VL 3264
6512 22:58:50.918586 # ok 611 # SKIP Disabled ZA for VL 3264
6513 22:58:50.918738 # ok 612 # SKIP Get and set data for VL 3264
6514 22:58:50.918858 # ok 613 Set VL 3280
6515 22:58:50.918971 # ok 614 # SKIP Disabled ZA for VL 3280
6516 22:58:50.919083 # ok 615 # SKIP Get and set data for VL 3280
6517 22:58:50.919195 # ok 616 Set VL 3296
6518 22:58:50.919308 # ok 617 # SKIP Disabled ZA for VL 3296
6519 22:58:50.919418 # ok 618 # SKIP Get and set data for VL 3296
6520 22:58:50.919529 # ok 619 Set VL 3312
6521 22:58:50.919638 # ok 620 # SKIP Disabled ZA for VL 3312
6522 22:58:50.919748 # ok 621 # SKIP Get and set data for VL 3312
6523 22:58:50.919858 # ok 622 Set VL 3328
6524 22:58:50.919977 # ok 623 # SKIP Disabled ZA for VL 3328
6525 22:58:50.924489 # ok 624 # SKIP Get and set data for VL 3328
6526 22:58:50.924726 # ok 625 Set VL 3344
6527 22:58:50.925104 # ok 626 # SKIP Disabled ZA for VL 3344
6528 22:58:50.925213 # ok 627 # SKIP Get and set data for VL 3344
6529 22:58:50.925304 # ok 628 Set VL 3360
6530 22:58:50.925388 # ok 629 # SKIP Disabled ZA for VL 3360
6531 22:58:50.925472 # ok 630 # SKIP Get and set data for VL 3360
6532 22:58:50.925557 # ok 631 Set VL 3376
6533 22:58:50.925665 # ok 632 # SKIP Disabled ZA for VL 3376
6534 22:58:50.925754 # ok 633 # SKIP Get and set data for VL 3376
6535 22:58:50.925838 # ok 634 Set VL 3392
6536 22:58:50.925940 # ok 635 # SKIP Disabled ZA for VL 3392
6537 22:58:50.926028 # ok 636 # SKIP Get and set data for VL 3392
6538 22:58:50.926112 # ok 637 Set VL 3408
6539 22:58:50.926195 # ok 638 # SKIP Disabled ZA for VL 3408
6540 22:58:50.926295 # ok 639 # SKIP Get and set data for VL 3408
6541 22:58:50.926383 # ok 640 Set VL 3424
6542 22:58:50.926465 # ok 641 # SKIP Disabled ZA for VL 3424
6543 22:58:50.926566 # ok 642 # SKIP Get and set data for VL 3424
6544 22:58:50.926652 # ok 643 Set VL 3440
6545 22:58:50.926736 # ok 644 # SKIP Disabled ZA for VL 3440
6546 22:58:50.933101 # ok 645 # SKIP Get and set data for VL 3440
6547 22:58:50.933705 # ok 646 Set VL 3456
6548 22:58:50.933898 # ok 647 # SKIP Disabled ZA for VL 3456
6549 22:58:50.934058 # ok 648 # SKIP Get and set data for VL 3456
6550 22:58:50.934225 # ok 649 Set VL 3472
6551 22:58:50.934368 # ok 650 # SKIP Disabled ZA for VL 3472
6552 22:58:50.934509 # ok 651 # SKIP Get and set data for VL 3472
6553 22:58:50.934688 # ok 652 Set VL 3488
6554 22:58:50.934825 # ok 653 # SKIP Disabled ZA for VL 3488
6555 22:58:50.934968 # ok 654 # SKIP Get and set data for VL 3488
6556 22:58:50.935110 # ok 655 Set VL 3504
6557 22:58:50.935253 # ok 656 # SKIP Disabled ZA for VL 3504
6558 22:58:50.935396 # ok 657 # SKIP Get and set data for VL 3504
6559 22:58:50.935537 # ok 658 Set VL 3520
6560 22:58:50.935678 # ok 659 # SKIP Disabled ZA for VL 3520
6561 22:58:50.935819 # ok 660 # SKIP Get and set data for VL 3520
6562 22:58:50.935995 # ok 661 Set VL 3536
6563 22:58:50.936159 # ok 662 # SKIP Disabled ZA for VL 3536
6564 22:58:50.936327 # ok 663 # SKIP Get and set data for VL 3536
6565 22:58:50.936465 # ok 664 Set VL 3552
6566 22:58:50.936641 # ok 665 # SKIP Disabled ZA for VL 3552
6567 22:58:50.936776 # ok 666 # SKIP Get and set data for VL 3552
6568 22:58:50.936919 # ok 667 Set VL 3568
6569 22:58:50.937094 # ok 668 # SKIP Disabled ZA for VL 3568
6570 22:58:50.937230 # ok 669 # SKIP Get and set data for VL 3568
6571 22:58:50.937402 # ok 670 Set VL 3584
6572 22:58:50.937576 # ok 671 # SKIP Disabled ZA for VL 3584
6573 22:58:50.937794 # ok 672 # SKIP Get and set data for VL 3584
6574 22:58:50.938020 # ok 673 Set VL 3600
6575 22:58:50.938221 # ok 674 # SKIP Disabled ZA for VL 3600
6576 22:58:50.938419 # ok 675 # SKIP Get and set data for VL 3600
6577 22:58:50.938614 # ok 676 Set VL 3616
6578 22:58:50.938789 # ok 677 # SKIP Disabled ZA for VL 3616
6579 22:58:50.938923 # ok 678 # SKIP Get and set data for VL 3616
6580 22:58:50.939042 # ok 679 Set VL 3632
6581 22:58:50.939159 # ok 680 # SKIP Disabled ZA for VL 3632
6582 22:58:50.939277 # ok 681 # SKIP Get and set data for VL 3632
6583 22:58:50.939421 # ok 682 Set VL 3648
6584 22:58:50.939545 # ok 683 # SKIP Disabled ZA for VL 3648
6585 22:58:50.939662 # ok 684 # SKIP Get and set data for VL 3648
6586 22:58:50.939778 # ok 685 Set VL 3664
6587 22:58:50.939894 # ok 686 # SKIP Disabled ZA for VL 3664
6588 22:58:50.940010 # ok 687 # SKIP Get and set data for VL 3664
6589 22:58:50.946218 # ok 688 Set VL 3680
6590 22:58:50.946666 # ok 689 # SKIP Disabled ZA for VL 3680
6591 22:58:50.946775 # ok 690 # SKIP Get and set data for VL 3680
6592 22:58:50.946862 # ok 691 Set VL 3696
6593 22:58:50.956774 # ok 692 # SKIP Disabled ZA for VL 3696
6594 22:58:50.957054 # ok 693 # SKIP Get and set data for VL 3696
6595 22:58:50.957411 # ok 694 Set VL 3712
6596 22:58:50.957550 # ok 695 # SKIP Disabled ZA for VL 3712
6597 22:58:50.957654 # ok 696 # SKIP Get and set data for VL 3712
6598 22:58:50.957742 # ok 697 Set VL 3728
6599 22:58:50.957825 # ok 698 # SKIP Disabled ZA for VL 3728
6600 22:58:50.957906 # ok 699 # SKIP Get and set data for VL 3728
6601 22:58:50.957987 # ok 700 Set VL 3744
6602 22:58:50.958085 # ok 701 # SKIP Disabled ZA for VL 3744
6603 22:58:50.958171 # ok 702 # SKIP Get and set data for VL 3744
6604 22:58:50.958252 # ok 703 Set VL 3760
6605 22:58:50.958334 # ok 704 # SKIP Disabled ZA for VL 3760
6606 22:58:50.958417 # ok 705 # SKIP Get and set data for VL 3760
6607 22:58:50.958500 # ok 706 Set VL 3776
6608 22:58:50.958601 # ok 707 # SKIP Disabled ZA for VL 3776
6609 22:58:50.958687 # ok 708 # SKIP Get and set data for VL 3776
6610 22:58:50.958771 # ok 709 Set VL 3792
6611 22:58:50.962162 # ok 710 # SKIP Disabled ZA for VL 3792
6612 22:58:50.962567 # ok 711 # SKIP Get and set data for VL 3792
6613 22:58:50.962662 # ok 712 Set VL 3808
6614 22:58:50.962748 # ok 713 # SKIP Disabled ZA for VL 3808
6615 22:58:50.962830 # ok 714 # SKIP Get and set data for VL 3808
6616 22:58:50.962926 # ok 715 Set VL 3824
6617 22:58:50.964854 # ok 716 # SKIP Disabled ZA for VL 3824
6618 22:58:50.964967 # ok 717 # SKIP Get and set data for VL 3824
6619 22:58:50.965051 # ok 718 Set VL 3840
6620 22:58:50.965133 # ok 719 # SKIP Disabled ZA for VL 3840
6621 22:58:50.965213 # ok 720 # SKIP Get and set data for VL 3840
6622 22:58:50.965487 # ok 721 Set VL 3856
6623 22:58:50.965579 # ok 722 # SKIP Disabled ZA for VL 3856
6624 22:58:50.965674 # ok 723 # SKIP Get and set data for VL 3856
6625 22:58:50.965759 # ok 724 Set VL 3872
6626 22:58:50.965840 # ok 725 # SKIP Disabled ZA for VL 3872
6627 22:58:50.965922 # ok 726 # SKIP Get and set data for VL 3872
6628 22:58:50.966003 # ok 727 Set VL 3888
6629 22:58:50.966098 # ok 728 # SKIP Disabled ZA for VL 3888
6630 22:58:50.966183 # ok 729 # SKIP Get and set data for VL 3888
6631 22:58:50.966266 # ok 730 Set VL 3904
6632 22:58:50.966353 # ok 731 # SKIP Disabled ZA for VL 3904
6633 22:58:50.966441 # ok 732 # SKIP Get and set data for VL 3904
6634 22:58:50.966523 # ok 733 Set VL 3920
6635 22:58:50.966624 # ok 734 # SKIP Disabled ZA for VL 3920
6636 22:58:50.966709 # ok 735 # SKIP Get and set data for VL 3920
6637 22:58:50.966791 # ok 736 Set VL 3936
6638 22:58:50.966873 # ok 737 # SKIP Disabled ZA for VL 3936
6639 22:58:50.967599 # ok 738 # SKIP Get and set data for VL 3936
6640 22:58:50.967695 # ok 739 Set VL 3952
6641 22:58:50.967999 # ok 740 # SKIP Disabled ZA for VL 3952
6642 22:58:50.968165 # ok 741 # SKIP Get and set data for VL 3952
6643 22:58:50.968298 # ok 742 Set VL 3968
6644 22:58:50.968423 # ok 743 # SKIP Disabled ZA for VL 3968
6645 22:58:50.968574 # ok 744 # SKIP Get and set data for VL 3968
6646 22:58:50.968702 # ok 745 Set VL 3984
6647 22:58:50.968826 # ok 746 # SKIP Disabled ZA for VL 3984
6648 22:58:50.968948 # ok 747 # SKIP Get and set data for VL 3984
6649 22:58:50.969061 # ok 748 Set VL 4000
6650 22:58:50.969206 # ok 749 # SKIP Disabled ZA for VL 4000
6651 22:58:50.969354 # ok 750 # SKIP Get and set data for VL 4000
6652 22:58:50.969516 # ok 751 Set VL 4016
6653 22:58:50.969637 # ok 752 # SKIP Disabled ZA for VL 4016
6654 22:58:50.969817 # ok 753 # SKIP Get and set data for VL 4016
6655 22:58:50.969951 # ok 754 Set VL 4032
6656 22:58:50.970075 # ok 755 # SKIP Disabled ZA for VL 4032
6657 22:58:50.970229 # ok 756 # SKIP Get and set data for VL 4032
6658 22:58:50.970360 # ok 757 Set VL 4048
6659 22:58:50.970483 # ok 758 # SKIP Disabled ZA for VL 4048
6660 22:58:50.970605 # ok 759 # SKIP Get and set data for VL 4048
6661 22:58:50.970722 # ok 760 Set VL 4064
6662 22:58:50.970834 # ok 761 # SKIP Disabled ZA for VL 4064
6663 22:58:50.970947 # ok 762 # SKIP Get and set data for VL 4064
6664 22:58:50.971059 # ok 763 Set VL 4080
6665 22:58:50.971171 # ok 764 # SKIP Disabled ZA for VL 4080
6666 22:58:50.971308 # ok 765 # SKIP Get and set data for VL 4080
6667 22:58:50.971425 # ok 766 Set VL 4096
6668 22:58:50.971536 # ok 767 # SKIP Disabled ZA for VL 4096
6669 22:58:50.979801 # ok 768 # SKIP Get and set data for VL 4096
6670 22:58:50.980073 # ok 769 Set VL 4112
6671 22:58:50.980414 # ok 770 # SKIP Disabled ZA for VL 4112
6672 22:58:50.982495 # ok 771 # SKIP Get and set data for VL 4112
6673 22:58:50.982654 # ok 772 Set VL 4128
6674 22:58:50.982748 # ok 773 # SKIP Disabled ZA for VL 4128
6675 22:58:50.982834 # ok 774 # SKIP Get and set data for VL 4128
6676 22:58:50.982918 # ok 775 Set VL 4144
6677 22:58:50.983000 # ok 776 # SKIP Disabled ZA for VL 4144
6678 22:58:50.983085 # ok 777 # SKIP Get and set data for VL 4144
6679 22:58:50.983169 # ok 778 Set VL 4160
6680 22:58:50.983251 # ok 779 # SKIP Disabled ZA for VL 4160
6681 22:58:50.983335 # ok 780 # SKIP Get and set data for VL 4160
6682 22:58:50.983420 # ok 781 Set VL 4176
6683 22:58:50.983505 # ok 782 # SKIP Disabled ZA for VL 4176
6684 22:58:50.983589 # ok 783 # SKIP Get and set data for VL 4176
6685 22:58:50.983672 # ok 784 Set VL 4192
6686 22:58:50.983754 # ok 785 # SKIP Disabled ZA for VL 4192
6687 22:58:50.983837 # ok 786 # SKIP Get and set data for VL 4192
6688 22:58:50.983927 # ok 787 Set VL 4208
6689 22:58:50.984009 # ok 788 # SKIP Disabled ZA for VL 4208
6690 22:58:50.984090 # ok 789 # SKIP Get and set data for VL 4208
6691 22:58:50.984172 # ok 790 Set VL 4224
6692 22:58:50.984252 # ok 791 # SKIP Disabled ZA for VL 4224
6693 22:58:50.984335 # ok 792 # SKIP Get and set data for VL 4224
6694 22:58:50.984415 # ok 793 Set VL 4240
6695 22:58:50.984495 # ok 794 # SKIP Disabled ZA for VL 4240
6696 22:58:50.984574 # ok 795 # SKIP Get and set data for VL 4240
6697 22:58:50.984654 # ok 796 Set VL 4256
6698 22:58:50.984735 # ok 797 # SKIP Disabled ZA for VL 4256
6699 22:58:50.984815 # ok 798 # SKIP Get and set data for VL 4256
6700 22:58:50.991662 # ok 799 Set VL 4272
6701 22:58:50.992102 # ok 800 # SKIP Disabled ZA for VL 4272
6702 22:58:50.992206 # ok 801 # SKIP Get and set data for VL 4272
6703 22:58:50.992291 # ok 802 Set VL 4288
6704 22:58:50.992377 # ok 803 # SKIP Disabled ZA for VL 4288
6705 22:58:50.992461 # ok 804 # SKIP Get and set data for VL 4288
6706 22:58:50.992751 # ok 805 Set VL 4304
6707 22:58:50.992849 # ok 806 # SKIP Disabled ZA for VL 4304
6708 22:58:50.992934 # ok 807 # SKIP Get and set data for VL 4304
6709 22:58:50.993016 # ok 808 Set VL 4320
6710 22:58:50.993099 # ok 809 # SKIP Disabled ZA for VL 4320
6711 22:58:50.993182 # ok 810 # SKIP Get and set data for VL 4320
6712 22:58:50.993263 # ok 811 Set VL 4336
6713 22:58:50.993409 # ok 812 # SKIP Disabled ZA for VL 4336
6714 22:58:50.993557 # ok 813 # SKIP Get and set data for VL 4336
6715 22:58:50.993661 # ok 814 Set VL 4352
6716 22:58:50.993745 # ok 815 # SKIP Disabled ZA for VL 4352
6717 22:58:50.993829 # ok 816 # SKIP Get and set data for VL 4352
6718 22:58:50.993910 # ok 817 Set VL 4368
6719 22:58:50.994007 # ok 818 # SKIP Disabled ZA for VL 4368
6720 22:58:50.994091 # ok 819 # SKIP Get and set data for VL 4368
6721 22:58:50.994174 # ok 820 Set VL 4384
6722 22:58:50.994255 # ok 821 # SKIP Disabled ZA for VL 4384
6723 22:58:51.008420 # ok 822 # SKIP Get and set data for VL 4384
6724 22:58:51.008648 # ok 823 Set VL 4400
6725 22:58:51.008727 # ok 824 # SKIP Disabled ZA for VL 4400
6726 22:58:51.008799 # ok 825 # SKIP Get and set data for VL 4400
6727 22:58:51.008888 # ok 826 Set VL 4416
6728 22:58:51.008965 # ok 827 # SKIP Disabled ZA for VL 4416
6729 22:58:51.009037 # ok 828 # SKIP Get and set data for VL 4416
6730 22:58:51.009107 # ok 829 Set VL 4432
6731 22:58:51.009177 # ok 830 # SKIP Disabled ZA for VL 4432
6732 22:58:51.009247 # ok 831 # SKIP Get and set data for VL 4432
6733 22:58:51.009338 # ok 832 Set VL 4448
6734 22:58:51.009412 # ok 833 # SKIP Disabled ZA for VL 4448
6735 22:58:51.009488 # ok 834 # SKIP Get and set data for VL 4448
6736 22:58:51.009572 # ok 835 Set VL 4464
6737 22:58:51.009643 # ok 836 # SKIP Disabled ZA for VL 4464
6738 22:58:51.009724 # ok 837 # SKIP Get and set data for VL 4464
6739 22:58:51.009793 # ok 838 Set VL 4480
6740 22:58:51.009864 # ok 839 # SKIP Disabled ZA for VL 4480
6741 22:58:51.009948 # ok 840 # SKIP Get and set data for VL 4480
6742 22:58:51.010019 # ok 841 Set VL 4496
6743 22:58:51.010088 # ok 842 # SKIP Disabled ZA for VL 4496
6744 22:58:51.010157 # ok 843 # SKIP Get and set data for VL 4496
6745 22:58:51.010244 # ok 844 Set VL 4512
6746 22:58:51.010324 # ok 845 # SKIP Disabled ZA for VL 4512
6747 22:58:51.010408 # ok 846 # SKIP Get and set data for VL 4512
6748 22:58:51.010491 # ok 847 Set VL 4528
6749 22:58:51.010574 # ok 848 # SKIP Disabled ZA for VL 4528
6750 22:58:51.010677 # ok 849 # SKIP Get and set data for VL 4528
6751 22:58:51.010764 # ok 850 Set VL 4544
6752 22:58:51.010848 # ok 851 # SKIP Disabled ZA for VL 4544
6753 22:58:51.010931 # ok 852 # SKIP Get and set data for VL 4544
6754 22:58:51.025324 # ok 853 Set VL 4560
6755 22:58:51.025573 # ok 854 # SKIP Disabled ZA for VL 4560
6756 22:58:51.025906 # ok 855 # SKIP Get and set data for VL 4560
6757 22:58:51.026009 # ok 856 Set VL 4576
6758 22:58:51.026096 # ok 857 # SKIP Disabled ZA for VL 4576
6759 22:58:51.026180 # ok 858 # SKIP Get and set data for VL 4576
6760 22:58:51.026264 # ok 859 Set VL 4592
6761 22:58:51.026348 # ok 860 # SKIP Disabled ZA for VL 4592
6762 22:58:51.026432 # ok 861 # SKIP Get and set data for VL 4592
6763 22:58:51.026538 # ok 862 Set VL 4608
6764 22:58:51.026624 # ok 863 # SKIP Disabled ZA for VL 4608
6765 22:58:51.026709 # ok 864 # SKIP Get and set data for VL 4608
6766 22:58:51.026792 # ok 865 Set VL 4624
6767 22:58:51.026875 # ok 866 # SKIP Disabled ZA for VL 4624
6768 22:58:51.040017 # ok 867 # SKIP Get and set data for VL 4624
6769 22:58:51.040284 # ok 868 Set VL 4640
6770 22:58:51.040604 # ok 869 # SKIP Disabled ZA for VL 4640
6771 22:58:51.040703 # ok 870 # SKIP Get and set data for VL 4640
6772 22:58:51.040787 # ok 871 Set VL 4656
6773 22:58:51.040869 # ok 872 # SKIP Disabled ZA for VL 4656
6774 22:58:51.040949 # ok 873 # SKIP Get and set data for VL 4656
6775 22:58:51.041028 # ok 874 Set VL 4672
6776 22:58:51.041106 # ok 875 # SKIP Disabled ZA for VL 4672
6777 22:58:51.041205 # ok 876 # SKIP Get and set data for VL 4672
6778 22:58:51.041298 # ok 877 Set VL 4688
6779 22:58:51.041380 # ok 878 # SKIP Disabled ZA for VL 4688
6780 22:58:51.041459 # ok 879 # SKIP Get and set data for VL 4688
6781 22:58:51.041563 # ok 880 Set VL 4704
6782 22:58:51.041657 # ok 881 # SKIP Disabled ZA for VL 4704
6783 22:58:51.041743 # ok 882 # SKIP Get and set data for VL 4704
6784 22:58:51.041838 # ok 883 Set VL 4720
6785 22:58:51.041920 # ok 884 # SKIP Disabled ZA for VL 4720
6786 22:58:51.042002 # ok 885 # SKIP Get and set data for VL 4720
6787 22:58:51.042080 # ok 886 Set VL 4736
6788 22:58:51.042174 # ok 887 # SKIP Disabled ZA for VL 4736
6789 22:58:51.042269 # ok 888 # SKIP Get and set data for VL 4736
6790 22:58:51.042354 # ok 889 Set VL 4752
6791 22:58:51.042457 # ok 890 # SKIP Disabled ZA for VL 4752
6792 22:58:51.042547 # ok 891 # SKIP Get and set data for VL 4752
6793 22:58:51.042643 # ok 892 Set VL 4768
6794 22:58:51.055933 # ok 893 # SKIP Disabled ZA for VL 4768
6795 22:58:51.056196 # ok 894 # SKIP Get and set data for VL 4768
6796 22:58:51.056286 # ok 895 Set VL 4784
6797 22:58:51.056592 # ok 896 # SKIP Disabled ZA for VL 4784
6798 22:58:51.056701 # ok 897 # SKIP Get and set data for VL 4784
6799 22:58:51.056785 # ok 898 Set VL 4800
6800 22:58:51.056864 # ok 899 # SKIP Disabled ZA for VL 4800
6801 22:58:51.056944 # ok 900 # SKIP Get and set data for VL 4800
6802 22:58:51.057023 # ok 901 Set VL 4816
6803 22:58:51.057100 # ok 902 # SKIP Disabled ZA for VL 4816
6804 22:58:51.057196 # ok 903 # SKIP Get and set data for VL 4816
6805 22:58:51.057288 # ok 904 Set VL 4832
6806 22:58:51.057370 # ok 905 # SKIP Disabled ZA for VL 4832
6807 22:58:51.057449 # ok 906 # SKIP Get and set data for VL 4832
6808 22:58:51.057530 # ok 907 Set VL 4848
6809 22:58:51.057625 # ok 908 # SKIP Disabled ZA for VL 4848
6810 22:58:51.057718 # ok 909 # SKIP Get and set data for VL 4848
6811 22:58:51.057796 # ok 910 Set VL 4864
6812 22:58:51.057875 # ok 911 # SKIP Disabled ZA for VL 4864
6813 22:58:51.057968 # ok 912 # SKIP Get and set data for VL 4864
6814 22:58:51.058048 # ok 913 Set VL 4880
6815 22:58:51.058120 # ok 914 # SKIP Disabled ZA for VL 4880
6816 22:58:51.058211 # ok 915 # SKIP Get and set data for VL 4880
6817 22:58:51.058288 # ok 916 Set VL 4896
6818 22:58:51.058383 # ok 917 # SKIP Disabled ZA for VL 4896
6819 22:58:51.058473 # ok 918 # SKIP Get and set data for VL 4896
6820 22:58:51.058549 # ok 919 Set VL 4912
6821 22:58:51.058635 # ok 920 # SKIP Disabled ZA for VL 4912
6822 22:58:51.058727 # ok 921 # SKIP Get and set data for VL 4912
6823 22:58:51.058816 # ok 922 Set VL 4928
6824 22:58:51.059127 # ok 923 # SKIP Disabled ZA for VL 4928
6825 22:58:51.071834 # ok 924 # SKIP Get and set data for VL 4928
6826 22:58:51.072303 # ok 925 Set VL 4944
6827 22:58:51.072415 # ok 926 # SKIP Disabled ZA for VL 4944
6828 22:58:51.072511 # ok 927 # SKIP Get and set data for VL 4944
6829 22:58:51.072604 # ok 928 Set VL 4960
6830 22:58:51.072692 # ok 929 # SKIP Disabled ZA for VL 4960
6831 22:58:51.072796 # ok 930 # SKIP Get and set data for VL 4960
6832 22:58:51.072888 # ok 931 Set VL 4976
6833 22:58:51.072981 # ok 932 # SKIP Disabled ZA for VL 4976
6834 22:58:51.073074 # ok 933 # SKIP Get and set data for VL 4976
6835 22:58:51.073167 # ok 934 Set VL 4992
6836 22:58:51.073277 # ok 935 # SKIP Disabled ZA for VL 4992
6837 22:58:51.073372 # ok 936 # SKIP Get and set data for VL 4992
6838 22:58:51.073466 # ok 937 Set VL 5008
6839 22:58:51.073575 # ok 938 # SKIP Disabled ZA for VL 5008
6840 22:58:51.073692 # ok 939 # SKIP Get and set data for VL 5008
6841 22:58:51.073788 # ok 940 Set VL 5024
6842 22:58:51.073896 # ok 941 # SKIP Disabled ZA for VL 5024
6843 22:58:51.073990 # ok 942 # SKIP Get and set data for VL 5024
6844 22:58:51.074100 # ok 943 Set VL 5040
6845 22:58:51.074194 # ok 944 # SKIP Disabled ZA for VL 5040
6846 22:58:51.074286 # ok 945 # SKIP Get and set data for VL 5040
6847 22:58:51.074395 # ok 946 Set VL 5056
6848 22:58:51.074489 # ok 947 # SKIP Disabled ZA for VL 5056
6849 22:58:51.074597 # ok 948 # SKIP Get and set data for VL 5056
6850 22:58:51.074690 # ok 949 Set VL 5072
6851 22:58:51.092532 # ok 950 # SKIP Disabled ZA for VL 5072
6852 22:58:51.092745 # ok 951 # SKIP Get and set data for VL 5072
6853 22:58:51.092823 # ok 952 Set VL 5088
6854 22:58:51.092896 # ok 953 # SKIP Disabled ZA for VL 5088
6855 22:58:51.093170 # ok 954 # SKIP Get and set data for VL 5088
6856 22:58:51.093256 # ok 955 Set VL 5104
6857 22:58:51.093341 # ok 956 # SKIP Disabled ZA for VL 5104
6858 22:58:51.093425 # ok 957 # SKIP Get and set data for VL 5104
6859 22:58:51.093509 # ok 958 Set VL 5120
6860 22:58:51.093593 # ok 959 # SKIP Disabled ZA for VL 5120
6861 22:58:51.093713 # ok 960 # SKIP Get and set data for VL 5120
6862 22:58:51.093801 # ok 961 Set VL 5136
6863 22:58:51.093888 # ok 962 # SKIP Disabled ZA for VL 5136
6864 22:58:51.093974 # ok 963 # SKIP Get and set data for VL 5136
6865 22:58:51.094062 # ok 964 Set VL 5152
6866 22:58:51.094167 # ok 965 # SKIP Disabled ZA for VL 5152
6867 22:58:51.094254 # ok 966 # SKIP Get and set data for VL 5152
6868 22:58:51.094341 # ok 967 Set VL 5168
6869 22:58:51.094428 # ok 968 # SKIP Disabled ZA for VL 5168
6870 22:58:51.094532 # ok 969 # SKIP Get and set data for VL 5168
6871 22:58:51.094622 # ok 970 Set VL 5184
6872 22:58:51.094707 # ok 971 # SKIP Disabled ZA for VL 5184
6873 22:58:51.094792 # ok 972 # SKIP Get and set data for VL 5184
6874 22:58:51.105739 # ok 973 Set VL 5200
6875 22:58:51.106201 # ok 974 # SKIP Disabled ZA for VL 5200
6876 22:58:51.106309 # ok 975 # SKIP Get and set data for VL 5200
6877 22:58:51.106400 # ok 976 Set VL 5216
6878 22:58:51.106487 # ok 977 # SKIP Disabled ZA for VL 5216
6879 22:58:51.106574 # ok 978 # SKIP Get and set data for VL 5216
6880 22:58:51.106677 # ok 979 Set VL 5232
6881 22:58:51.106765 # ok 980 # SKIP Disabled ZA for VL 5232
6882 22:58:51.112438 # ok 981 # SKIP Get and set data for VL 5232
6883 22:58:51.112655 # ok 982 Set VL 5248
6884 22:58:51.112947 # ok 983 # SKIP Disabled ZA for VL 5248
6885 22:58:51.113042 # ok 984 # SKIP Get and set data for VL 5248
6886 22:58:51.113121 # ok 985 Set VL 5264
6887 22:58:51.113196 # ok 986 # SKIP Disabled ZA for VL 5264
6888 22:58:51.113285 # ok 987 # SKIP Get and set data for VL 5264
6889 22:58:51.113365 # ok 988 Set VL 5280
6890 22:58:51.113441 # ok 989 # SKIP Disabled ZA for VL 5280
6891 22:58:51.113519 # ok 990 # SKIP Get and set data for VL 5280
6892 22:58:51.113609 # ok 991 Set VL 5296
6893 22:58:51.113708 # ok 992 # SKIP Disabled ZA for VL 5296
6894 22:58:51.113784 # ok 993 # SKIP Get and set data for VL 5296
6895 22:58:51.113871 # ok 994 Set VL 5312
6896 22:58:51.113945 # ok 995 # SKIP Disabled ZA for VL 5312
6897 22:58:51.114034 # ok 996 # SKIP Get and set data for VL 5312
6898 22:58:51.114112 # ok 997 Set VL 5328
6899 22:58:51.114212 # ok 998 # SKIP Disabled ZA for VL 5328
6900 22:58:51.114314 # ok 999 # SKIP Get and set data for VL 5328
6901 22:58:51.114415 # ok 1000 Set VL 5344
6902 22:58:51.114516 # ok 1001 # SKIP Disabled ZA for VL 5344
6903 22:58:51.117060 # ok 1002 # SKIP Get and set data for VL 5344
6904 22:58:51.117412 # ok 1003 Set VL 5360
6905 22:58:51.117526 # ok 1004 # SKIP Disabled ZA for VL 5360
6906 22:58:51.117631 # ok 1005 # SKIP Get and set data for VL 5360
6907 22:58:51.117774 # ok 1006 Set VL 5376
6908 22:58:51.117881 # ok 1007 # SKIP Disabled ZA for VL 5376
6909 22:58:51.117992 # ok 1008 # SKIP Get and set data for VL 5376
6910 22:58:51.118094 # ok 1009 Set VL 5392
6911 22:58:51.118225 # ok 1010 # SKIP Disabled ZA for VL 5392
6912 22:58:51.118335 # ok 1011 # SKIP Get and set data for VL 5392
6913 22:58:51.118455 # ok 1012 Set VL 5408
6914 22:58:51.118562 # ok 1013 # SKIP Disabled ZA for VL 5408
6915 22:58:51.118664 # ok 1014 # SKIP Get and set data for VL 5408
6916 22:58:51.118735 # ok 1015 Set VL 5424
6917 22:58:51.118797 # ok 1016 # SKIP Disabled ZA for VL 5424
6918 22:58:51.126261 # ok 1017 # SKIP Get and set data for VL 5424
6919 22:58:51.126749 # ok 1018 Set VL 5440
6920 22:58:51.126866 # ok 1019 # SKIP Disabled ZA for VL 5440
6921 22:58:51.128430 # ok 1020 # SKIP Get and set data for VL 5440
6922 22:58:51.128809 # ok 1021 Set VL 5456
6923 22:58:51.128921 # ok 1022 # SKIP Disabled ZA for VL 5456
6924 22:58:51.129016 # ok 1023 # SKIP Get and set data for VL 5456
6925 22:58:51.129107 # ok 1024 Set VL 5472
6926 22:58:51.129216 # ok 1025 # SKIP Disabled ZA for VL 5472
6927 22:58:51.129309 # ok 1026 # SKIP Get and set data for VL 5472
6928 22:58:51.129392 # ok 1027 Set VL 5488
6929 22:58:51.129488 # ok 1028 # SKIP Disabled ZA for VL 5488
6930 22:58:51.129573 # ok 1029 # SKIP Get and set data for VL 5488
6931 22:58:51.129693 # ok 1030 Set VL 5504
6932 22:58:51.129785 # ok 1031 # SKIP Disabled ZA for VL 5504
6933 22:58:51.129885 # ok 1032 # SKIP Get and set data for VL 5504
6934 22:58:51.129970 # ok 1033 Set VL 5520
6935 22:58:51.130048 # ok 1034 # SKIP Disabled ZA for VL 5520
6936 22:58:51.130143 # ok 1035 # SKIP Get and set data for VL 5520
6937 22:58:51.130240 # ok 1036 Set VL 5536
6938 22:58:51.130336 # ok 1037 # SKIP Disabled ZA for VL 5536
6939 22:58:51.130658 # ok 1038 # SKIP Get and set data for VL 5536
6940 22:58:51.130820 # ok 1039 Set VL 5552
6941 22:58:51.132326 # ok 1040 # SKIP Disabled ZA for VL 5552
6942 22:58:51.132764 # ok 1041 # SKIP Get and set data for VL 5552
6943 22:58:51.132923 # ok 1042 Set VL 5568
6944 22:58:51.133047 # ok 1043 # SKIP Disabled ZA for VL 5568
6945 22:58:51.133166 # ok 1044 # SKIP Get and set data for VL 5568
6946 22:58:51.133307 # ok 1045 Set VL 5584
6947 22:58:51.133675 # ok 1046 # SKIP Disabled ZA for VL 5584
6948 22:58:51.133832 # ok 1047 # SKIP Get and set data for VL 5584
6949 22:58:51.133955 # ok 1048 Set VL 5600
6950 22:58:51.134072 # ok 1049 # SKIP Disabled ZA for VL 5600
6951 22:58:51.134188 # ok 1050 # SKIP Get and set data for VL 5600
6952 22:58:51.134306 # ok 1051 Set VL 5616
6953 22:58:51.134458 # ok 1052 # SKIP Disabled ZA for VL 5616
6954 22:58:51.142212 # ok 1053 # SKIP Get and set data for VL 5616
6955 22:58:51.142519 # ok 1054 Set VL 5632
6956 22:58:51.142655 # ok 1055 # SKIP Disabled ZA for VL 5632
6957 22:58:51.142805 # ok 1056 # SKIP Get and set data for VL 5632
6958 22:58:51.142927 # ok 1057 Set VL 5648
6959 22:58:51.143043 # ok 1058 # SKIP Disabled ZA for VL 5648
6960 22:58:51.143157 # ok 1059 # SKIP Get and set data for VL 5648
6961 22:58:51.143270 # ok 1060 Set VL 5664
6962 22:58:51.143706 # ok 1061 # SKIP Disabled ZA for VL 5664
6963 22:58:51.144175 # ok 1062 # SKIP Get and set data for VL 5664
6964 22:58:51.144368 # ok 1063 Set VL 5680
6965 22:58:51.144540 # ok 1064 # SKIP Disabled ZA for VL 5680
6966 22:58:51.144712 # ok 1065 # SKIP Get and set data for VL 5680
6967 22:58:51.144877 # ok 1066 Set VL 5696
6968 22:58:51.145076 # ok 1067 # SKIP Disabled ZA for VL 5696
6969 22:58:51.145239 # ok 1068 # SKIP Get and set data for VL 5696
6970 22:58:51.145398 # ok 1069 Set VL 5712
6971 22:58:51.145551 # ok 1070 # SKIP Disabled ZA for VL 5712
6972 22:58:51.145732 # ok 1071 # SKIP Get and set data for VL 5712
6973 22:58:51.145887 # ok 1072 Set VL 5728
6974 22:58:51.146040 # ok 1073 # SKIP Disabled ZA for VL 5728
6975 22:58:51.146194 # ok 1074 # SKIP Get and set data for VL 5728
6976 22:58:51.146350 # ok 1075 Set VL 5744
6977 22:58:51.146495 # ok 1076 # SKIP Disabled ZA for VL 5744
6978 22:58:51.146615 # ok 1077 # SKIP Get and set data for VL 5744
6979 22:58:51.146733 # ok 1078 Set VL 5760
6980 22:58:51.146886 # ok 1079 # SKIP Disabled ZA for VL 5760
6981 22:58:51.147008 # ok 1080 # SKIP Get and set data for VL 5760
6982 22:58:51.147123 # ok 1081 Set VL 5776
6983 22:58:51.147238 # ok 1082 # SKIP Disabled ZA for VL 5776
6984 22:58:51.147355 # ok 1083 # SKIP Get and set data for VL 5776
6985 22:58:51.147469 # ok 1084 Set VL 5792
6986 22:58:51.147582 # ok 1085 # SKIP Disabled ZA for VL 5792
6987 22:58:51.147697 # ok 1086 # SKIP Get and set data for VL 5792
6988 22:58:51.147813 # ok 1087 Set VL 5808
6989 22:58:51.147928 # ok 1088 # SKIP Disabled ZA for VL 5808
6990 22:58:51.148042 # ok 1089 # SKIP Get and set data for VL 5808
6991 22:58:51.148156 # ok 1090 Set VL 5824
6992 22:58:51.148270 # ok 1091 # SKIP Disabled ZA for VL 5824
6993 22:58:51.148382 # ok 1092 # SKIP Get and set data for VL 5824
6994 22:58:51.148497 # ok 1093 Set VL 5840
6995 22:58:51.148611 # ok 1094 # SKIP Disabled ZA for VL 5840
6996 22:58:51.148728 # ok 1095 # SKIP Get and set data for VL 5840
6997 22:58:51.148842 # ok 1096 Set VL 5856
6998 22:58:51.148955 # ok 1097 # SKIP Disabled ZA for VL 5856
6999 22:58:51.149068 # ok 1098 # SKIP Get and set data for VL 5856
7000 22:58:51.149182 # ok 1099 Set VL 5872
7001 22:58:51.149297 # ok 1100 # SKIP Disabled ZA for VL 5872
7002 22:58:51.151759 # ok 1101 # SKIP Get and set data for VL 5872
7003 22:58:51.151886 # ok 1102 Set VL 5888
7004 22:58:51.151979 # ok 1103 # SKIP Disabled ZA for VL 5888
7005 22:58:51.152275 # ok 1104 # SKIP Get and set data for VL 5888
7006 22:58:51.152385 # ok 1105 Set VL 5904
7007 22:58:51.152478 # ok 1106 # SKIP Disabled ZA for VL 5904
7008 22:58:51.152568 # ok 1107 # SKIP Get and set data for VL 5904
7009 22:58:51.152659 # ok 1108 Set VL 5920
7010 22:58:51.152767 # ok 1109 # SKIP Disabled ZA for VL 5920
7011 22:58:51.152861 # ok 1110 # SKIP Get and set data for VL 5920
7012 22:58:51.152951 # ok 1111 Set VL 5936
7013 22:58:51.153040 # ok 1112 # SKIP Disabled ZA for VL 5936
7014 22:58:51.153129 # ok 1113 # SKIP Get and set data for VL 5936
7015 22:58:51.153219 # ok 1114 Set VL 5952
7016 22:58:51.153314 # ok 1115 # SKIP Disabled ZA for VL 5952
7017 22:58:51.153435 # ok 1116 # SKIP Get and set data for VL 5952
7018 22:58:51.153523 # ok 1117 Set VL 5968
7019 22:58:51.153609 # ok 1118 # SKIP Disabled ZA for VL 5968
7020 22:58:51.153707 # ok 1119 # SKIP Get and set data for VL 5968
7021 22:58:51.153786 # ok 1120 Set VL 5984
7022 22:58:51.153864 # ok 1121 # SKIP Disabled ZA for VL 5984
7023 22:58:51.153944 # ok 1122 # SKIP Get and set data for VL 5984
7024 22:58:51.154023 # ok 1123 Set VL 6000
7025 22:58:51.154102 # ok 1124 # SKIP Disabled ZA for VL 6000
7026 22:58:51.154200 # ok 1125 # SKIP Get and set data for VL 6000
7027 22:58:51.154283 # ok 1126 Set VL 6016
7028 22:58:51.154363 # ok 1127 # SKIP Disabled ZA for VL 6016
7029 22:58:51.154863 # ok 1128 # SKIP Get and set data for VL 6016
7030 22:58:51.154952 # ok 1129 Set VL 6032
7031 22:58:51.155037 # ok 1130 # SKIP Disabled ZA for VL 6032
7032 22:58:51.155121 # ok 1131 # SKIP Get and set data for VL 6032
7033 22:58:51.155202 # ok 1132 Set VL 6048
7034 22:58:51.155303 # ok 1133 # SKIP Disabled ZA for VL 6048
7035 22:58:51.155389 # ok 1134 # SKIP Get and set data for VL 6048
7036 22:58:51.155474 # ok 1135 Set VL 6064
7037 22:58:51.155559 # ok 1136 # SKIP Disabled ZA for VL 6064
7038 22:58:51.160427 # ok 1137 # SKIP Get and set data for VL 6064
7039 22:58:51.160889 # ok 1138 Set VL 6080
7040 22:58:51.160997 # ok 1139 # SKIP Disabled ZA for VL 6080
7041 22:58:51.161092 # ok 1140 # SKIP Get and set data for VL 6080
7042 22:58:51.161188 # ok 1141 Set VL 6096
7043 22:58:51.161294 # ok 1142 # SKIP Disabled ZA for VL 6096
7044 22:58:51.161378 # ok 1143 # SKIP Get and set data for VL 6096
7045 22:58:51.161459 # ok 1144 Set VL 6112
7046 22:58:51.161542 # ok 1145 # SKIP Disabled ZA for VL 6112
7047 22:58:51.161642 # ok 1146 # SKIP Get and set data for VL 6112
7048 22:58:51.161737 # ok 1147 Set VL 6128
7049 22:58:51.161819 # ok 1148 # SKIP Disabled ZA for VL 6128
7050 22:58:51.161918 # ok 1149 # SKIP Get and set data for VL 6128
7051 22:58:51.162006 # ok 1150 Set VL 6144
7052 22:58:51.162094 # ok 1151 # SKIP Disabled ZA for VL 6144
7053 22:58:51.162184 # ok 1152 # SKIP Get and set data for VL 6144
7054 22:58:51.162291 # ok 1153 Set VL 6160
7055 22:58:51.162382 # ok 1154 # SKIP Disabled ZA for VL 6160
7056 22:58:51.162471 # ok 1155 # SKIP Get and set data for VL 6160
7057 22:58:51.162576 # ok 1156 Set VL 6176
7058 22:58:51.162668 # ok 1157 # SKIP Disabled ZA for VL 6176
7059 22:58:51.162759 # ok 1158 # SKIP Get and set data for VL 6176
7060 22:58:51.163441 # ok 1159 Set VL 6192
7061 22:58:51.163846 # ok 1160 # SKIP Disabled ZA for VL 6192
7062 22:58:51.164009 # ok 1161 # SKIP Get and set data for VL 6192
7063 22:58:51.164166 # ok 1162 Set VL 6208
7064 22:58:51.164354 # ok 1163 # SKIP Disabled ZA for VL 6208
7065 22:58:51.164524 # ok 1164 # SKIP Get and set data for VL 6208
7066 22:58:51.164656 # ok 1165 Set VL 6224
7067 22:58:51.164806 # ok 1166 # SKIP Disabled ZA for VL 6224
7068 22:58:51.164977 # ok 1167 # SKIP Get and set data for VL 6224
7069 22:58:51.165122 # ok 1168 Set VL 6240
7070 22:58:51.165284 # ok 1169 # SKIP Disabled ZA for VL 6240
7071 22:58:51.165454 # ok 1170 # SKIP Get and set data for VL 6240
7072 22:58:51.165623 # ok 1171 Set VL 6256
7073 22:58:51.165804 # ok 1172 # SKIP Disabled ZA for VL 6256
7074 22:58:51.166005 # ok 1173 # SKIP Get and set data for VL 6256
7075 22:58:51.166168 # ok 1174 Set VL 6272
7076 22:58:51.166324 # ok 1175 # SKIP Disabled ZA for VL 6272
7077 22:58:51.166511 # ok 1176 # SKIP Get and set data for VL 6272
7078 22:58:51.166710 # ok 1177 Set VL 6288
7079 22:58:51.166850 # ok 1178 # SKIP Disabled ZA for VL 6288
7080 22:58:51.166968 # ok 1179 # SKIP Get and set data for VL 6288
7081 22:58:51.167083 # ok 1180 Set VL 6304
7082 22:58:51.167196 # ok 1181 # SKIP Disabled ZA for VL 6304
7083 22:58:51.167342 # ok 1182 # SKIP Get and set data for VL 6304
7084 22:58:51.167465 # ok 1183 Set VL 6320
7085 22:58:51.167582 # ok 1184 # SKIP Disabled ZA for VL 6320
7086 22:58:51.167698 # ok 1185 # SKIP Get and set data for VL 6320
7087 22:58:51.167816 # ok 1186 Set VL 6336
7088 22:58:51.167929 # ok 1187 # SKIP Disabled ZA for VL 6336
7089 22:58:51.168043 # ok 1188 # SKIP Get and set data for VL 6336
7090 22:58:51.168158 # ok 1189 Set VL 6352
7091 22:58:51.176398 # ok 1190 # SKIP Disabled ZA for VL 6352
7092 22:58:51.176941 # ok 1191 # SKIP Get and set data for VL 6352
7093 22:58:51.177053 # ok 1192 Set VL 6368
7094 22:58:51.177147 # ok 1193 # SKIP Disabled ZA for VL 6368
7095 22:58:51.177234 # ok 1194 # SKIP Get and set data for VL 6368
7096 22:58:51.177315 # ok 1195 Set VL 6384
7097 22:58:51.177395 # ok 1196 # SKIP Disabled ZA for VL 6384
7098 22:58:51.177493 # ok 1197 # SKIP Get and set data for VL 6384
7099 22:58:51.177575 # ok 1198 Set VL 6400
7100 22:58:51.177662 # ok 1199 # SKIP Disabled ZA for VL 6400
7101 22:58:51.177746 # ok 1200 # SKIP Get and set data for VL 6400
7102 22:58:51.177830 # ok 1201 Set VL 6416
7103 22:58:51.177929 # ok 1202 # SKIP Disabled ZA for VL 6416
7104 22:58:51.178011 # ok 1203 # SKIP Get and set data for VL 6416
7105 22:58:51.178093 # ok 1204 Set VL 6432
7106 22:58:51.178174 # ok 1205 # SKIP Disabled ZA for VL 6432
7107 22:58:51.178274 # ok 1206 # SKIP Get and set data for VL 6432
7108 22:58:51.178360 # ok 1207 Set VL 6448
7109 22:58:51.178447 # ok 1208 # SKIP Disabled ZA for VL 6448
7110 22:58:51.178554 # ok 1209 # SKIP Get and set data for VL 6448
7111 22:58:51.178647 # ok 1210 Set VL 6464
7112 22:58:51.184490 # ok 1211 # SKIP Disabled ZA for VL 6464
7113 22:58:51.185089 # ok 1212 # SKIP Get and set data for VL 6464
7114 22:58:51.185291 # ok 1213 Set VL 6480
7115 22:58:51.185473 # ok 1214 # SKIP Disabled ZA for VL 6480
7116 22:58:51.185634 # ok 1215 # SKIP Get and set data for VL 6480
7117 22:58:51.185812 # ok 1216 Set VL 6496
7118 22:58:51.185972 # ok 1217 # SKIP Disabled ZA for VL 6496
7119 22:58:51.186167 # ok 1218 # SKIP Get and set data for VL 6496
7120 22:58:51.186333 # ok 1219 Set VL 6512
7121 22:58:51.186525 # ok 1220 # SKIP Disabled ZA for VL 6512
7122 22:58:51.186734 # ok 1221 # SKIP Get and set data for VL 6512
7123 22:58:51.186883 # ok 1222 Set VL 6528
7124 22:58:51.187001 # ok 1223 # SKIP Disabled ZA for VL 6528
7125 22:58:51.187117 # ok 1224 # SKIP Get and set data for VL 6528
7126 22:58:51.187257 # ok 1225 Set VL 6544
7127 22:58:51.187399 # ok 1226 # SKIP Disabled ZA for VL 6544
7128 22:58:51.187517 # ok 1227 # SKIP Get and set data for VL 6544
7129 22:58:51.187661 # ok 1228 Set VL 6560
7130 22:58:51.187784 # ok 1229 # SKIP Disabled ZA for VL 6560
7131 22:58:51.187899 # ok 1230 # SKIP Get and set data for VL 6560
7132 22:58:51.188014 # ok 1231 Set VL 6576
7133 22:58:51.188128 # ok 1232 # SKIP Disabled ZA for VL 6576
7134 22:58:51.191839 # ok 1233 # SKIP Get and set data for VL 6576
7135 22:58:51.192254 # ok 1234 Set VL 6592
7136 22:58:51.192375 # ok 1235 # SKIP Disabled ZA for VL 6592
7137 22:58:51.192460 # ok 1236 # SKIP Get and set data for VL 6592
7138 22:58:51.192550 # ok 1237 Set VL 6608
7139 22:58:51.192655 # ok 1238 # SKIP Disabled ZA for VL 6608
7140 22:58:51.192744 # ok 1239 # SKIP Get and set data for VL 6608
7141 22:58:51.192833 # ok 1240 Set VL 6624
7142 22:58:51.192915 # ok 1241 # SKIP Disabled ZA for VL 6624
7143 22:58:51.193011 # ok 1242 # SKIP Get and set data for VL 6624
7144 22:58:51.193100 # ok 1243 Set VL 6640
7145 22:58:51.193185 # ok 1244 # SKIP Disabled ZA for VL 6640
7146 22:58:51.193271 # ok 1245 # SKIP Get and set data for VL 6640
7147 22:58:51.193368 # ok 1246 Set VL 6656
7148 22:58:51.193450 # ok 1247 # SKIP Disabled ZA for VL 6656
7149 22:58:51.193534 # ok 1248 # SKIP Get and set data for VL 6656
7150 22:58:51.193632 # ok 1249 Set VL 6672
7151 22:58:51.193727 # ok 1250 # SKIP Disabled ZA for VL 6672
7152 22:58:51.193830 # ok 1251 # SKIP Get and set data for VL 6672
7153 22:58:51.193921 # ok 1252 Set VL 6688
7154 22:58:51.194022 # ok 1253 # SKIP Disabled ZA for VL 6688
7155 22:58:51.194110 # ok 1254 # SKIP Get and set data for VL 6688
7156 22:58:51.194195 # ok 1255 Set VL 6704
7157 22:58:51.194299 # ok 1256 # SKIP Disabled ZA for VL 6704
7158 22:58:51.194390 # ok 1257 # SKIP Get and set data for VL 6704
7159 22:58:51.194492 # ok 1258 Set VL 6720
7160 22:58:51.194578 # ok 1259 # SKIP Disabled ZA for VL 6720
7161 22:58:51.200410 # ok 1260 # SKIP Get and set data for VL 6720
7162 22:58:51.200800 # ok 1261 Set VL 6736
7163 22:58:51.201219 # ok 1262 # SKIP Disabled ZA for VL 6736
7164 22:58:51.201428 # ok 1263 # SKIP Get and set data for VL 6736
7165 22:58:51.201607 # ok 1264 Set VL 6752
7166 22:58:51.201825 # ok 1265 # SKIP Disabled ZA for VL 6752
7167 22:58:51.201984 # ok 1266 # SKIP Get and set data for VL 6752
7168 22:58:51.202112 # ok 1267 Set VL 6768
7169 22:58:51.202230 # ok 1268 # SKIP Disabled ZA for VL 6768
7170 22:58:51.202344 # ok 1269 # SKIP Get and set data for VL 6768
7171 22:58:51.202540 # ok 1270 Set VL 6784
7172 22:58:51.202672 # ok 1271 # SKIP Disabled ZA for VL 6784
7173 22:58:51.202790 # ok 1272 # SKIP Get and set data for VL 6784
7174 22:58:51.202908 # ok 1273 Set VL 6800
7175 22:58:51.203037 # ok 1274 # SKIP Disabled ZA for VL 6800
7176 22:58:51.203155 # ok 1275 # SKIP Get and set data for VL 6800
7177 22:58:51.203270 # ok 1276 Set VL 6816
7178 22:58:51.203385 # ok 1277 # SKIP Disabled ZA for VL 6816
7179 22:58:51.213768 # ok 1278 # SKIP Get and set data for VL 6816
7180 22:58:51.214046 # ok 1279 Set VL 6832
7181 22:58:51.214229 # ok 1280 # SKIP Disabled ZA for VL 6832
7182 22:58:51.214385 # ok 1281 # SKIP Get and set data for VL 6832
7183 22:58:51.214560 # ok 1282 Set VL 6848
7184 22:58:51.214718 # ok 1283 # SKIP Disabled ZA for VL 6848
7185 22:58:51.214813 # ok 1284 # SKIP Get and set data for VL 6848
7186 22:58:51.214902 # ok 1285 Set VL 6864
7187 22:58:51.214989 # ok 1286 # SKIP Disabled ZA for VL 6864
7188 22:58:51.215083 # ok 1287 # SKIP Get and set data for VL 6864
7189 22:58:51.215164 # ok 1288 Set VL 6880
7190 22:58:51.216969 # ok 1289 # SKIP Disabled ZA for VL 6880
7191 22:58:51.217406 # ok 1290 # SKIP Get and set data for VL 6880
7192 22:58:51.217604 # ok 1291 Set VL 6896
7193 22:58:51.217819 # ok 1292 # SKIP Disabled ZA for VL 6896
7194 22:58:51.218017 # ok 1293 # SKIP Get and set data for VL 6896
7195 22:58:51.218258 # ok 1294 Set VL 6912
7196 22:58:51.218451 # ok 1295 # SKIP Disabled ZA for VL 6912
7197 22:58:51.218643 # ok 1296 # SKIP Get and set data for VL 6912
7198 22:58:51.218815 # ok 1297 Set VL 6928
7199 22:58:51.218961 # ok 1298 # SKIP Disabled ZA for VL 6928
7200 22:58:51.219141 # ok 1299 # SKIP Get and set data for VL 6928
7201 22:58:51.219280 # ok 1300 Set VL 6944
7202 22:58:51.219424 # ok 1301 # SKIP Disabled ZA for VL 6944
7203 22:58:51.219566 # ok 1302 # SKIP Get and set data for VL 6944
7204 22:58:51.219709 # ok 1303 Set VL 6960
7205 22:58:51.219852 # ok 1304 # SKIP Disabled ZA for VL 6960
7206 22:58:51.228558 # ok 1305 # SKIP Get and set data for VL 6960
7207 22:58:51.228911 # ok 1306 Set VL 6976
7208 22:58:51.229144 # ok 1307 # SKIP Disabled ZA for VL 6976
7209 22:58:51.229635 # ok 1308 # SKIP Get and set data for VL 6976
7210 22:58:51.229853 # ok 1309 Set VL 6992
7211 22:58:51.230026 # ok 1310 # SKIP Disabled ZA for VL 6992
7212 22:58:51.230192 # ok 1311 # SKIP Get and set data for VL 6992
7213 22:58:51.230352 # ok 1312 Set VL 7008
7214 22:58:51.230492 # ok 1313 # SKIP Disabled ZA for VL 7008
7215 22:58:51.230609 # ok 1314 # SKIP Get and set data for VL 7008
7216 22:58:51.230723 # ok 1315 Set VL 7024
7217 22:58:51.230837 # ok 1316 # SKIP Disabled ZA for VL 7024
7218 22:58:51.230979 # ok 1317 # SKIP Get and set data for VL 7024
7219 22:58:51.231100 # ok 1318 Set VL 7040
7220 22:58:51.231215 # ok 1319 # SKIP Disabled ZA for VL 7040
7221 22:58:51.231329 # ok 1320 # SKIP Get and set data for VL 7040
7222 22:58:51.231490 # ok 1321 Set VL 7056
7223 22:58:51.231649 # ok 1322 # SKIP Disabled ZA for VL 7056
7224 22:58:51.231832 # ok 1323 # SKIP Get and set data for VL 7056
7225 22:58:51.232052 # ok 1324 Set VL 7072
7226 22:58:51.232248 # ok 1325 # SKIP Disabled ZA for VL 7072
7227 22:58:51.232441 # ok 1326 # SKIP Get and set data for VL 7072
7228 22:58:51.232607 # ok 1327 Set VL 7088
7229 22:58:51.232775 # ok 1328 # SKIP Disabled ZA for VL 7088
7230 22:58:51.232939 # ok 1329 # SKIP Get and set data for VL 7088
7231 22:58:51.233100 # ok 1330 Set VL 7104
7232 22:58:51.233262 # ok 1331 # SKIP Disabled ZA for VL 7104
7233 22:58:51.233426 # ok 1332 # SKIP Get and set data for VL 7104
7234 22:58:51.233588 # ok 1333 Set VL 7120
7235 22:58:51.234570 # ok 1334 # SKIP Disabled ZA for VL 7120
7236 22:58:51.234712 # ok 1335 # SKIP Get and set data for VL 7120
7237 22:58:51.234833 # ok 1336 Set VL 7136
7238 22:58:51.234954 # ok 1337 # SKIP Disabled ZA for VL 7136
7239 22:58:51.235070 # ok 1338 # SKIP Get and set data for VL 7136
7240 22:58:51.235188 # ok 1339 Set VL 7152
7241 22:58:51.235302 # ok 1340 # SKIP Disabled ZA for VL 7152
7242 22:58:51.235458 # ok 1341 # SKIP Get and set data for VL 7152
7243 22:58:51.235594 # ok 1342 Set VL 7168
7244 22:58:51.235713 # ok 1343 # SKIP Disabled ZA for VL 7168
7245 22:58:51.235829 # ok 1344 # SKIP Get and set data for VL 7168
7246 22:58:51.235967 # ok 1345 Set VL 7184
7247 22:58:51.236121 # ok 1346 # SKIP Disabled ZA for VL 7184
7248 22:58:51.236243 # ok 1347 # SKIP Get and set data for VL 7184
7249 22:58:51.236381 # ok 1348 Set VL 7200
7250 22:58:51.236526 # ok 1349 # SKIP Disabled ZA for VL 7200
7251 22:58:51.236644 # ok 1350 # SKIP Get and set data for VL 7200
7252 22:58:51.236761 # ok 1351 Set VL 7216
7253 22:58:51.236875 # ok 1352 # SKIP Disabled ZA for VL 7216
7254 22:58:51.237025 # ok 1353 # SKIP Get and set data for VL 7216
7255 22:58:51.239816 # ok 1354 Set VL 7232
7256 22:58:51.240108 # ok 1355 # SKIP Disabled ZA for VL 7232
7257 22:58:51.240518 # ok 1356 # SKIP Get and set data for VL 7232
7258 22:58:51.240694 # ok 1357 Set VL 7248
7259 22:58:51.240857 # ok 1358 # SKIP Disabled ZA for VL 7248
7260 22:58:51.241020 # ok 1359 # SKIP Get and set data for VL 7248
7261 22:58:51.241182 # ok 1360 Set VL 7264
7262 22:58:51.241345 # ok 1361 # SKIP Disabled ZA for VL 7264
7263 22:58:51.241503 # ok 1362 # SKIP Get and set data for VL 7264
7264 22:58:51.241721 # ok 1363 Set VL 7280
7265 22:58:51.241883 # ok 1364 # SKIP Disabled ZA for VL 7280
7266 22:58:51.242006 # ok 1365 # SKIP Get and set data for VL 7280
7267 22:58:51.242128 # ok 1366 Set VL 7296
7268 22:58:51.242249 # ok 1367 # SKIP Disabled ZA for VL 7296
7269 22:58:51.242370 # ok 1368 # SKIP Get and set data for VL 7296
7270 22:58:51.242492 # ok 1369 Set VL 7312
7271 22:58:51.242613 # ok 1370 # SKIP Disabled ZA for VL 7312
7272 22:58:51.242734 # ok 1371 # SKIP Get and set data for VL 7312
7273 22:58:51.242855 # ok 1372 Set VL 7328
7274 22:58:51.242980 # ok 1373 # SKIP Disabled ZA for VL 7328
7275 22:58:51.243100 # ok 1374 # SKIP Get and set data for VL 7328
7276 22:58:51.243221 # ok 1375 Set VL 7344
7277 22:58:51.243341 # ok 1376 # SKIP Disabled ZA for VL 7344
7278 22:58:51.243462 # ok 1377 # SKIP Get and set data for VL 7344
7279 22:58:51.243583 # ok 1378 Set VL 7360
7280 22:58:51.243704 # ok 1379 # SKIP Disabled ZA for VL 7360
7281 22:58:51.243826 # ok 1380 # SKIP Get and set data for VL 7360
7282 22:58:51.243951 # ok 1381 Set VL 7376
7283 22:58:51.244107 # ok 1382 # SKIP Disabled ZA for VL 7376
7284 22:58:51.244233 # ok 1383 # SKIP Get and set data for VL 7376
7285 22:58:51.244356 # ok 1384 Set VL 7392
7286 22:58:51.244477 # ok 1385 # SKIP Disabled ZA for VL 7392
7287 22:58:51.244598 # ok 1386 # SKIP Get and set data for VL 7392
7288 22:58:51.244721 # ok 1387 Set VL 7408
7289 22:58:51.244842 # ok 1388 # SKIP Disabled ZA for VL 7408
7290 22:58:51.244968 # ok 1389 # SKIP Get and set data for VL 7408
7291 22:58:51.245089 # ok 1390 Set VL 7424
7292 22:58:51.245211 # ok 1391 # SKIP Disabled ZA for VL 7424
7293 22:58:51.245335 # ok 1392 # SKIP Get and set data for VL 7424
7294 22:58:51.246124 # ok 1393 Set VL 7440
7295 22:58:51.246413 # ok 1394 # SKIP Disabled ZA for VL 7440
7296 22:58:51.246504 # ok 1395 # SKIP Get and set data for VL 7440
7297 22:58:51.246589 # ok 1396 Set VL 7456
7298 22:58:51.246674 # ok 1397 # SKIP Disabled ZA for VL 7456
7299 22:58:51.246773 # ok 1398 # SKIP Get and set data for VL 7456
7300 22:58:51.246860 # ok 1399 Set VL 7472
7301 22:58:51.247319 # ok 1400 # SKIP Disabled ZA for VL 7472
7302 22:58:51.247601 # ok 1401 # SKIP Get and set data for VL 7472
7303 22:58:51.247691 # ok 1402 Set VL 7488
7304 22:58:51.247775 # ok 1403 # SKIP Disabled ZA for VL 7488
7305 22:58:51.247858 # ok 1404 # SKIP Get and set data for VL 7488
7306 22:58:51.247950 # ok 1405 Set VL 7504
7307 22:58:51.248035 # ok 1406 # SKIP Disabled ZA for VL 7504
7308 22:58:51.248135 # ok 1407 # SKIP Get and set data for VL 7504
7309 22:58:51.248221 # ok 1408 Set VL 7520
7310 22:58:51.248305 # ok 1409 # SKIP Disabled ZA for VL 7520
7311 22:58:51.248388 # ok 1410 # SKIP Get and set data for VL 7520
7312 22:58:51.248472 # ok 1411 Set VL 7536
7313 22:58:51.248555 # ok 1412 # SKIP Disabled ZA for VL 7536
7314 22:58:51.248639 # ok 1413 # SKIP Get and set data for VL 7536
7315 22:58:51.248740 # ok 1414 Set VL 7552
7316 22:58:51.248827 # ok 1415 # SKIP Disabled ZA for VL 7552
7317 22:58:51.248912 # ok 1416 # SKIP Get and set data for VL 7552
7318 22:58:51.248998 # ok 1417 Set VL 7568
7319 22:58:51.249082 # ok 1418 # SKIP Disabled ZA for VL 7568
7320 22:58:51.249166 # ok 1419 # SKIP Get and set data for VL 7568
7321 22:58:51.249250 # ok 1420 Set VL 7584
7322 22:58:51.249334 # ok 1421 # SKIP Disabled ZA for VL 7584
7323 22:58:51.249416 # ok 1422 # SKIP Get and set data for VL 7584
7324 22:58:51.249516 # ok 1423 Set VL 7600
7325 22:58:51.249602 # ok 1424 # SKIP Disabled ZA for VL 7600
7326 22:58:51.249695 # ok 1425 # SKIP Get and set data for VL 7600
7327 22:58:51.249780 # ok 1426 Set VL 7616
7328 22:58:51.249863 # ok 1427 # SKIP Disabled ZA for VL 7616
7329 22:58:51.249951 # ok 1428 # SKIP Get and set data for VL 7616
7330 22:58:51.250034 # ok 1429 Set VL 7632
7331 22:58:51.250117 # ok 1430 # SKIP Disabled ZA for VL 7632
7332 22:58:51.250200 # ok 1431 # SKIP Get and set data for VL 7632
7333 22:58:51.250283 # ok 1432 Set VL 7648
7334 22:58:51.250387 # ok 1433 # SKIP Disabled ZA for VL 7648
7335 22:58:51.250474 # ok 1434 # SKIP Get and set data for VL 7648
7336 22:58:51.250558 # ok 1435 Set VL 7664
7337 22:58:51.250642 # ok 1436 # SKIP Disabled ZA for VL 7664
7338 22:58:51.250724 # ok 1437 # SKIP Get and set data for VL 7664
7339 22:58:51.250808 # ok 1438 Set VL 7680
7340 22:58:51.250895 # ok 1439 # SKIP Disabled ZA for VL 7680
7341 22:58:51.250979 # ok 1440 # SKIP Get and set data for VL 7680
7342 22:58:51.251062 # ok 1441 Set VL 7696
7343 22:58:51.251145 # ok 1442 # SKIP Disabled ZA for VL 7696
7344 22:58:51.251228 # ok 1443 # SKIP Get and set data for VL 7696
7345 22:58:51.251328 # ok 1444 Set VL 7712
7346 22:58:51.251414 # ok 1445 # SKIP Disabled ZA for VL 7712
7347 22:58:51.251497 # ok 1446 # SKIP Get and set data for VL 7712
7348 22:58:51.255293 # ok 1447 Set VL 7728
7349 22:58:51.255507 # ok 1448 # SKIP Disabled ZA for VL 7728
7350 22:58:51.255827 # ok 1449 # SKIP Get and set data for VL 7728
7351 22:58:51.255945 # ok 1450 Set VL 7744
7352 22:58:51.256039 # ok 1451 # SKIP Disabled ZA for VL 7744
7353 22:58:51.256125 # ok 1452 # SKIP Get and set data for VL 7744
7354 22:58:51.256210 # ok 1453 Set VL 7760
7355 22:58:51.256297 # ok 1454 # SKIP Disabled ZA for VL 7760
7356 22:58:51.256400 # ok 1455 # SKIP Get and set data for VL 7760
7357 22:58:51.256488 # ok 1456 Set VL 7776
7358 22:58:51.256572 # ok 1457 # SKIP Disabled ZA for VL 7776
7359 22:58:51.256658 # ok 1458 # SKIP Get and set data for VL 7776
7360 22:58:51.256762 # ok 1459 Set VL 7792
7361 22:58:51.256851 # ok 1460 # SKIP Disabled ZA for VL 7792
7362 22:58:51.256942 # ok 1461 # SKIP Get and set data for VL 7792
7363 22:58:51.257027 # ok 1462 Set VL 7808
7364 22:58:51.257124 # ok 1463 # SKIP Disabled ZA for VL 7808
7365 22:58:51.257211 # ok 1464 # SKIP Get and set data for VL 7808
7366 22:58:51.257296 # ok 1465 Set VL 7824
7367 22:58:51.257394 # ok 1466 # SKIP Disabled ZA for VL 7824
7368 22:58:51.257483 # ok 1467 # SKIP Get and set data for VL 7824
7369 22:58:51.257582 # ok 1468 Set VL 7840
7370 22:58:51.257680 # ok 1469 # SKIP Disabled ZA for VL 7840
7371 22:58:51.257782 # ok 1470 # SKIP Get and set data for VL 7840
7372 22:58:51.257870 # ok 1471 Set VL 7856
7373 22:58:51.257972 # ok 1472 # SKIP Disabled ZA for VL 7856
7374 22:58:51.258074 # ok 1473 # SKIP Get and set data for VL 7856
7375 22:58:51.258176 # ok 1474 Set VL 7872
7376 22:58:51.258277 # ok 1475 # SKIP Disabled ZA for VL 7872
7377 22:58:51.258380 # ok 1476 # SKIP Get and set data for VL 7872
7378 22:58:51.258476 # ok 1477 Set VL 7888
7379 22:58:51.268595 # ok 1478 # SKIP Disabled ZA for VL 7888
7380 22:58:51.268840 # ok 1479 # SKIP Get and set data for VL 7888
7381 22:58:51.268931 # ok 1480 Set VL 7904
7382 22:58:51.269018 # ok 1481 # SKIP Disabled ZA for VL 7904
7383 22:58:51.269317 # ok 1482 # SKIP Get and set data for VL 7904
7384 22:58:51.269418 # ok 1483 Set VL 7920
7385 22:58:51.269506 # ok 1484 # SKIP Disabled ZA for VL 7920
7386 22:58:51.269590 # ok 1485 # SKIP Get and set data for VL 7920
7387 22:58:51.269682 # ok 1486 Set VL 7936
7388 22:58:51.269767 # ok 1487 # SKIP Disabled ZA for VL 7936
7389 22:58:51.269869 # ok 1488 # SKIP Get and set data for VL 7936
7390 22:58:51.269957 # ok 1489 Set VL 7952
7391 22:58:51.270040 # ok 1490 # SKIP Disabled ZA for VL 7952
7392 22:58:51.270124 # ok 1491 # SKIP Get and set data for VL 7952
7393 22:58:51.270208 # ok 1492 Set VL 7968
7394 22:58:51.270292 # ok 1493 # SKIP Disabled ZA for VL 7968
7395 22:58:51.270374 # ok 1494 # SKIP Get and set data for VL 7968
7396 22:58:51.270474 # ok 1495 Set VL 7984
7397 22:58:51.270557 # ok 1496 # SKIP Disabled ZA for VL 7984
7398 22:58:51.270632 # ok 1497 # SKIP Get and set data for VL 7984
7399 22:58:51.270705 # ok 1498 Set VL 8000
7400 22:58:51.270778 # ok 1499 # SKIP Disabled ZA for VL 8000
7401 22:58:51.270864 # ok 1500 # SKIP Get and set data for VL 8000
7402 22:58:51.276638 # ok 1501 Set VL 8016
7403 22:58:51.276872 # ok 1502 # SKIP Disabled ZA for VL 8016
7404 22:58:51.277746 # ok 1503 # SKIP Get and set data for VL 8016
7405 22:58:51.277851 # ok 1504 Set VL 8032
7406 22:58:51.277939 # ok 1505 # SKIP Disabled ZA for VL 8032
7407 22:58:51.278229 # ok 1506 # SKIP Get and set data for VL 8032
7408 22:58:51.278338 # ok 1507 Set VL 8048
7409 22:58:51.278427 # ok 1508 # SKIP Disabled ZA for VL 8048
7410 22:58:51.278515 # ok 1509 # SKIP Get and set data for VL 8048
7411 22:58:51.278599 # ok 1510 Set VL 8064
7412 22:58:51.278698 # ok 1511 # SKIP Disabled ZA for VL 8064
7413 22:58:51.278784 # ok 1512 # SKIP Get and set data for VL 8064
7414 22:58:51.278866 # ok 1513 Set VL 8080
7415 22:58:51.287818 # ok 1514 # SKIP Disabled ZA for VL 8080
7416 22:58:51.288332 # ok 1515 # SKIP Get and set data for VL 8080
7417 22:58:51.288435 # ok 1516 Set VL 8096
7418 22:58:51.288521 # ok 1517 # SKIP Disabled ZA for VL 8096
7419 22:58:51.288604 # ok 1518 # SKIP Get and set data for VL 8096
7420 22:58:51.288687 # ok 1519 Set VL 8112
7421 22:58:51.288768 # ok 1520 # SKIP Disabled ZA for VL 8112
7422 22:58:51.288867 # ok 1521 # SKIP Get and set data for VL 8112
7423 22:58:51.288951 # ok 1522 Set VL 8128
7424 22:58:51.289034 # ok 1523 # SKIP Disabled ZA for VL 8128
7425 22:58:51.289117 # ok 1524 # SKIP Get and set data for VL 8128
7426 22:58:51.289199 # ok 1525 Set VL 8144
7427 22:58:51.289298 # ok 1526 # SKIP Disabled ZA for VL 8144
7428 22:58:51.289388 # ok 1527 # SKIP Get and set data for VL 8144
7429 22:58:51.289471 # ok 1528 Set VL 8160
7430 22:58:51.289553 # ok 1529 # SKIP Disabled ZA for VL 8160
7431 22:58:51.289633 # ok 1530 # SKIP Get and set data for VL 8160
7432 22:58:51.289740 # ok 1531 Set VL 8176
7433 22:58:51.289826 # ok 1532 # SKIP Disabled ZA for VL 8176
7434 22:58:51.289911 # ok 1533 # SKIP Get and set data for VL 8176
7435 22:58:51.289994 # ok 1534 Set VL 8192
7436 22:58:51.290094 # ok 1535 # SKIP Disabled ZA for VL 8192
7437 22:58:51.290180 # ok 1536 # SKIP Get and set data for VL 8192
7438 22:58:51.290282 # # Totals: pass:522 fail:0 xfail:0 xpass:0 skip:1014 error:0
7439 22:58:51.290370 ok 34 selftests: arm64: za-ptrace
7440 22:58:51.290470 # selftests: arm64: check_buffer_fill
7441 22:58:51.828271 # 1..20
7442 22:58:51.828738 # ok 1 Check buffer correctness by byte with sync err mode and mmap memory
7443 22:58:51.828846 # ok 2 Check buffer correctness by byte with async err mode and mmap memory
7444 22:58:51.828934 # ok 3 Check buffer correctness by byte with sync err mode and mmap/mprotect memory
7445 22:58:51.829035 # ok 4 Check buffer correctness by byte with async err mode and mmap/mprotect memory
7446 22:58:51.829336 # not ok 5 Check buffer write underflow by byte with sync mode and mmap memory
7447 22:58:51.829438 # not ok 6 Check buffer write underflow by byte with async mode and mmap memory
7448 22:58:51.829694 # ok 7 Check buffer write underflow by byte with tag check fault ignore and mmap memory
7449 22:58:51.830014 # ok 8 Check buffer write underflow by byte with sync mode and mmap memory
7450 22:58:51.830352 # ok 9 Check buffer write underflow by byte with async mode and mmap memory
7451 22:58:51.830465 # ok 10 Check buffer write underflow by byte with tag check fault ignore and mmap memory
7452 22:58:51.836694 # not ok 11 Check buffer write overflow by byte with sync mode and mmap memory
7453 22:58:51.837152 # not ok 12 Check buffer write overflow by byte with async mode and mmap memory
7454 22:58:51.837259 # ok 13 Check buffer write overflow by byte with tag fault ignore mode and mmap memory
7455 22:58:51.837382 # not ok 14 Check buffer write correctness by block with sync mode and mmap memory
7456 22:58:51.837488 # not ok 15 Check buffer write correctness by block with async mode and mmap memory
7457 22:58:51.837576 # ok 16 Check buffer write correctness by block with tag fault ignore and mmap memory
7458 22:58:51.837685 # ok 17 Check initial tags with private mapping, sync error mode and mmap memory
7459 22:58:51.837786 # ok 18 Check initial tags with private mapping, sync error mode and mmap/mprotect memory
7460 22:58:51.838073 # ok 19 Check initial tags with shared mapping, sync error mode and mmap memory
7461 22:58:51.838180 # ok 20 Check initial tags with shared mapping, sync error mode and mmap/mprotect memory
7462 22:58:51.838268 # # Totals: pass:14 fail:6 xfail:0 xpass:0 skip:0 error:0
7463 22:58:51.862128 not ok 35 selftests: arm64: check_buffer_fill # exit=1
7464 22:58:52.008163 # selftests: arm64: check_child_memory
7465 22:58:52.543999 # 1..12
7466 22:58:52.544471 # not ok 1 Check child anonymous memory with private mapping, precise mode and mmap memory
7467 22:58:52.544578 # not ok 2 Check child anonymous memory with shared mapping, precise mode and mmap memory
7468 22:58:52.544667 # not ok 3 Check child anonymous memory with private mapping, imprecise mode and mmap memory
7469 22:58:52.544767 # not ok 4 Check child anonymous memory with shared mapping, imprecise mode and mmap memory
7470 22:58:52.545049 # not ok 5 Check child anonymous memory with private mapping, precise mode and mmap/mprotect memory
7471 22:58:52.545160 # not ok 6 Check child anonymous memory with shared mapping, precise mode and mmap/mprotect memory
7472 22:58:52.545260 # not ok 7 Check child file memory with private mapping, precise mode and mmap memory
7473 22:58:52.545367 # not ok 8 Check child file memory with shared mapping, precise mode and mmap memory
7474 22:58:52.545471 # not ok 9 Check child file memory with private mapping, imprecise mode and mmap memory
7475 22:58:52.545582 # not ok 10 Check child file memory with shared mapping, imprecise mode and mmap memory
7476 22:58:52.545890 # not ok 11 Check child file memory with private mapping, precise mode and mmap/mprotect memory
7477 22:58:52.546006 # not ok 12 Check child file memory with shared mapping, precise mode and mmap/mprotect memory
7478 22:58:52.546107 # # Totals: pass:0 fail:12 xfail:0 xpass:0 skip:0 error:0
7479 22:58:52.574431 not ok 36 selftests: arm64: check_child_memory # exit=1
7480 22:58:52.721500 # selftests: arm64: check_gcr_el1_cswitch
7481 22:59:37.923067 <47>[ 100.771795] systemd-journald[109]: Sent WATCHDOG=1 notification.
7482 22:59:39.585029 # 1..1
7483 22:59:39.585387 # 1..1
7484 22:59:39.585589 # 1..1
7485 22:59:39.585812 # 1..1
7486 22:59:39.585967 # 1..1
7487 22:59:39.586117 # 1..1
7488 22:59:39.586535 # 1..1
7489 22:59:39.586715 # 1..1
7490 22:59:39.586863 # 1..1
7491 22:59:39.587008 # 1..1
7492 22:59:39.587152 # 1..1
7493 22:59:39.587297 # 1..1
7494 22:59:39.587441 # 1..1
7495 22:59:39.587589 # 1..1
7496 22:59:39.587733 # 1..1
7497 22:59:39.587876 # 1..1
7498 22:59:39.588019 # 1..1
7499 22:59:39.588162 # 1..1
7500 22:59:39.588304 # 1..1
7501 22:59:39.588447 # 1..1
7502 22:59:39.588589 # 1..1
7503 22:59:39.588732 # 1..1
7504 22:59:39.588876 # 1..1
7505 22:59:39.589019 # 1..1
7506 22:59:39.589161 # 1..1
7507 22:59:39.589303 # 1..1
7508 22:59:39.589445 # 1..1
7509 22:59:39.589588 # 1..1
7510 22:59:39.589745 # 1..1
7511 22:59:39.589887 # 1..1
7512 22:59:39.590031 # 1..1
7513 22:59:39.590174 # 1..1
7514 22:59:39.590317 # 1..1
7515 22:59:39.590461 # 1..1
7516 22:59:39.590604 # 1..1
7517 22:59:39.590748 # 1..1
7518 22:59:39.590891 # 1..1
7519 22:59:39.591034 # 1..1
7520 22:59:39.591178 # 1..1
7521 22:59:39.591321 # 1..1
7522 22:59:39.591464 # 1..1
7523 22:59:39.591610 # 1..1
7524 22:59:39.591752 # 1..1
7525 22:59:39.591895 # 1..1
7526 22:59:39.592037 # 1..1
7527 22:59:39.592180 # 1..1
7528 22:59:39.592323 # 1..1
7529 22:59:39.592466 # 1..1
7530 22:59:39.592608 # 1..1
7531 22:59:39.592750 # 1..1
7532 22:59:39.592891 # 1..1
7533 22:59:39.593033 # 1..1
7534 22:59:39.593174 # 1..1
7535 22:59:39.593317 # 1..1
7536 22:59:39.593459 # 1..1
7537 22:59:39.593600 # 1..1
7538 22:59:39.593754 # 1..1
7539 22:59:39.593896 # 1..1
7540 22:59:39.594039 # 1..1
7541 22:59:39.594181 # 1..1
7542 22:59:39.594323 # 1..1
7543 22:59:39.594464 # 1..1
7544 22:59:39.641046 # 1..1
7545 22:59:39.641278 # 1..1
7546 22:59:39.641513 # 1..1
7547 22:59:39.641997 # 1..1
7548 22:59:39.642217 # 1..1
7549 22:59:39.642424 # 1..1
7550 22:59:39.642633 # 1..1
7551 22:59:39.642841 # 1..1
7552 22:59:39.643043 # 1..1
7553 22:59:39.643241 # 1..1
7554 22:59:39.643414 # 1..1
7555 22:59:39.643594 # 1..1
7556 22:59:39.643772 # 1..1
7557 22:59:39.643909 # 1..1
7558 22:59:39.644030 # 1..1
7559 22:59:39.644183 # 1..1
7560 22:59:39.644321 # 1..1
7561 22:59:39.644450 # 1..1
7562 22:59:39.644594 # 1..1
7563 22:59:39.644755 # 1..1
7564 22:59:39.644954 # 1..1
7565 22:59:39.645116 # 1..1
7566 22:59:39.645261 # 1..1
7567 22:59:39.645443 # 1..1
7568 22:59:39.645628 # 1..1
7569 22:59:39.646325 # 1..1
7570 22:59:39.646496 # 1..1
7571 22:59:39.646642 # 1..1
7572 22:59:39.646763 # 1..1
7573 22:59:39.646920 # 1..1
7574 22:59:39.647047 # 1..1
7575 22:59:39.647165 # 1..1
7576 22:59:39.647280 # 1..1
7577 22:59:39.647395 # 1..1
7578 22:59:39.647532 # 1..1
7579 22:59:39.647691 # 1..1
7580 22:59:39.647815 # 1..1
7581 22:59:39.647931 # 1..1
7582 22:59:39.648045 # 1..1
7583 22:59:39.648187 # 1..1
7584 22:59:39.648328 # 1..1
7585 22:59:39.648446 # 1..1
7586 22:59:39.648608 # 1..1
7587 22:59:39.648734 # 1..1
7588 22:59:39.648851 # 1..1
7589 22:59:39.648968 # 1..1
7590 22:59:39.649084 # 1..1
7591 22:59:39.649202 # 1..1
7592 22:59:39.649316 # 1..1
7593 22:59:39.649432 # 1..1
7594 22:59:39.649547 # 1..1
7595 22:59:39.649671 # 1..1
7596 22:59:39.649788 # 1..1
7597 22:59:39.649904 # 1..1
7598 22:59:39.650019 # 1..1
7599 22:59:39.650134 # 1..1
7600 22:59:39.650250 # 1..1
7601 22:59:39.650368 # 1..1
7602 22:59:39.650536 # 1..1
7603 22:59:39.650663 # 1..1
7604 22:59:39.650813 # 1..1
7605 22:59:39.650961 # 1..1
7606 22:59:39.651081 # 1..1
7607 22:59:39.651200 # 1..1
7608 22:59:39.651316 # 1..1
7609 22:59:39.651432 # 1..1
7610 22:59:39.651596 # 1..1
7611 22:59:39.651734 # 1..1
7612 22:59:39.651852 # 1..1
7613 22:59:39.651969 # 1..1
7614 22:59:39.652085 # 1..1
7615 22:59:39.652201 # 1..1
7616 22:59:39.652316 # 1..1
7617 22:59:39.652432 # 1..1
7618 22:59:39.652548 # 1..1
7619 22:59:39.652666 # 1..1
7620 22:59:39.652784 # 1..1
7621 22:59:39.652900 # 1..1
7622 22:59:39.653016 # 1..1
7623 22:59:39.653131 # 1..1
7624 22:59:39.653248 # 1..1
7625 22:59:39.653363 # 1..1
7626 22:59:39.653479 # 1..1
7627 22:59:39.653595 # 1..1
7628 22:59:39.653723 # 1..1
7629 22:59:39.653838 # 1..1
7630 22:59:39.653953 # 1..1
7631 22:59:39.654070 # 1..1
7632 22:59:39.654184 # 1..1
7633 22:59:39.654301 # 1..1
7634 22:59:39.654444 # 1..1
7635 22:59:39.654586 # 1..1
7636 22:59:39.654707 # 1..1
7637 22:59:39.654836 # 1..1
7638 22:59:39.654956 # 1..1
7639 22:59:39.655072 # 1..1
7640 22:59:39.655188 # 1..1
7641 22:59:39.655302 # 1..1
7642 22:59:39.655417 # 1..1
7643 22:59:39.655579 # 1..1
7644 22:59:39.655716 # 1..1
7645 22:59:39.655835 # 1..1
7646 22:59:39.655970 # 1..1
7647 22:59:39.656114 # 1..1
7648 22:59:39.656231 # 1..1
7649 22:59:39.656347 # 1..1
7650 22:59:39.656462 # 1..1
7651 22:59:39.656577 # 1..1
7652 22:59:39.656692 # 1..1
7653 22:59:39.656808 # 1..1
7654 22:59:39.656923 # 1..1
7655 22:59:39.657039 # 1..1
7656 22:59:39.657154 # 1..1
7657 22:59:39.657268 # 1..1
7658 22:59:39.657385 # 1..1
7659 22:59:39.657501 # 1..1
7660 22:59:39.657617 # 1..1
7661 22:59:39.657745 # 1..1
7662 22:59:39.657861 # 1..1
7663 22:59:39.657976 # 1..1
7664 22:59:39.658091 # 1..1
7665 22:59:39.658207 # 1..1
7666 22:59:39.658322 # 1..1
7667 22:59:39.658482 # 1..1
7668 22:59:39.658615 # 1..1
7669 22:59:39.658734 # 1..1
7670 22:59:39.658866 # 1..1
7671 22:59:39.658983 # 1..1
7672 22:59:39.659097 # 1..1
7673 22:59:39.659213 # 1..1
7674 22:59:39.659329 # 1..1
7675 22:59:39.659444 # 1..1
7676 22:59:39.659613 # 1..1
7677 22:59:39.659744 # 1..1
7678 22:59:39.659862 # 1..1
7679 22:59:39.659980 # 1..1
7680 22:59:39.660096 # 1..1
7681 22:59:39.660212 # 1..1
7682 22:59:39.660328 # 1..1
7683 22:59:39.660443 # 1..1
7684 22:59:39.660558 # 1..1
7685 22:59:39.660674 # 1..1
7686 22:59:39.660792 # 1..1
7687 22:59:39.660908 # 1..1
7688 22:59:39.661024 # 1..1
7689 22:59:39.661139 # 1..1
7690 22:59:39.661255 # 1..1
7691 22:59:39.661370 # 1..1
7692 22:59:39.661486 # 1..1
7693 22:59:39.661601 # 1..1
7694 22:59:39.661730 # 1..1
7695 22:59:39.661847 # 1..1
7696 22:59:39.661963 # 1..1
7697 22:59:39.662078 # 1..1
7698 22:59:39.662193 # 1..1
7699 22:59:39.662308 # 1..1
7700 22:59:39.662462 # 1..1
7701 22:59:39.662600 # 1..1
7702 22:59:39.662718 # 1..1
7703 22:59:39.662834 # 1..1
7704 22:59:39.662962 # 1..1
7705 22:59:39.663081 # 1..1
7706 22:59:39.663197 # 1..1
7707 22:59:39.663313 # 1..1
7708 22:59:39.663429 # 1..1
7709 22:59:39.663593 # 1..1
7710 22:59:39.663729 # 1..1
7711 22:59:39.663846 # 1..1
7712 22:59:39.663962 # 1..1
7713 22:59:39.664078 # 1..1
7714 22:59:39.664194 # 1..1
7715 22:59:39.664310 # 1..1
7716 22:59:39.664426 # 1..1
7717 22:59:39.664542 # 1..1
7718 22:59:39.664659 # 1..1
7719 22:59:39.664774 # 1..1
7720 22:59:39.664888 # 1..1
7721 22:59:39.665003 # 1..1
7722 22:59:39.665120 # 1..1
7723 22:59:39.665233 # 1..1
7724 22:59:39.665348 # 1..1
7725 22:59:39.665463 # 1..1
7726 22:59:39.665576 # 1..1
7727 22:59:39.665701 # 1..1
7728 22:59:39.665816 # 1..1
7729 22:59:39.691498 # 1..1
7730 22:59:39.691735 # 1..1
7731 22:59:39.691941 # 1..1
7732 22:59:39.692092 # 1..1
7733 22:59:39.692237 # 1..1
7734 22:59:39.692412 # 1..1
7735 22:59:39.692837 # 1..1
7736 22:59:39.693047 # 1..1
7737 22:59:39.693258 # 1..1
7738 22:59:39.693440 # 1..1
7739 22:59:39.693593 # 1..1
7740 22:59:39.693748 # 1..1
7741 22:59:39.693959 # 1..1
7742 22:59:39.694162 # 1..1
7743 22:59:39.694325 # 1..1
7744 22:59:39.694496 # 1..1
7745 22:59:39.694660 # 1..1
7746 22:59:39.694789 # 1..1
7747 22:59:39.694905 # 1..1
7748 22:59:39.695017 # 1..1
7749 22:59:39.695128 # 1..1
7750 22:59:39.695238 # 1..1
7751 22:59:39.695349 # 1..1
7752 22:59:39.695459 # 1..1
7753 22:59:39.695568 # 1..1
7754 22:59:39.695679 # 1..1
7755 22:59:39.695792 # 1..1
7756 22:59:39.695904 # 1..1
7757 22:59:39.696014 # 1..1
7758 22:59:39.696124 # 1..1
7759 22:59:39.696234 # 1..1
7760 22:59:39.696344 # 1..1
7761 22:59:39.696454 # 1..1
7762 22:59:39.696563 # 1..1
7763 22:59:39.696673 # 1..1
7764 22:59:39.696783 # 1..1
7765 22:59:39.696893 # 1..1
7766 22:59:39.697003 # 1..1
7767 22:59:39.697113 # 1..1
7768 22:59:39.697223 # 1..1
7769 22:59:39.697334 # 1..1
7770 22:59:39.697444 # 1..1
7771 22:59:39.697554 # 1..1
7772 22:59:39.697717 # 1..1
7773 22:59:39.697926 # 1..1
7774 22:59:39.698109 # 1..1
7775 22:59:39.698291 # 1..1
7776 22:59:39.698481 # 1..1
7777 22:59:39.698664 # 1..1
7778 22:59:39.698848 # 1..1
7779 22:59:39.699029 # 1..1
7780 22:59:39.699241 # 1..1
7781 22:59:39.699379 # 1..1
7782 22:59:39.699523 # 1..1
7783 22:59:39.699665 # 1..1
7784 22:59:39.699808 # 1..1
7785 22:59:39.699949 # 1..1
7786 22:59:39.700091 # 1..1
7787 22:59:39.700231 # 1..1
7788 22:59:39.700371 # 1..1
7789 22:59:39.700512 # 1..1
7790 22:59:39.700653 # 1..1
7791 22:59:39.700795 # 1..1
7792 22:59:39.700939 # 1..1
7793 22:59:39.701080 # 1..1
7794 22:59:39.701223 # 1..1
7795 22:59:39.701365 # 1..1
7796 22:59:39.701507 # 1..1
7797 22:59:39.701656 # 1..1
7798 22:59:39.701806 # 1..1
7799 22:59:39.701947 # 1..1
7800 22:59:39.702088 # 1..1
7801 22:59:39.702229 # 1..1
7802 22:59:39.702371 # 1..1
7803 22:59:39.702511 # 1..1
7804 22:59:39.702653 # 1..1
7805 22:59:39.702793 # 1..1
7806 22:59:39.702936 # 1..1
7807 22:59:39.703079 # 1..1
7808 22:59:39.703220 # 1..1
7809 22:59:39.703361 # 1..1
7810 22:59:39.703501 # 1..1
7811 22:59:39.703642 # 1..1
7812 22:59:39.703784 # 1..1
7813 22:59:39.703925 # 1..1
7814 22:59:39.704067 # 1..1
7815 22:59:39.704210 # 1..1
7816 22:59:39.704353 # 1..1
7817 22:59:39.704495 # 1..1
7818 22:59:39.704636 # 1..1
7819 22:59:39.704779 # 1..1
7820 22:59:39.704921 # 1..1
7821 22:59:39.705062 # 1..1
7822 22:59:39.705204 # 1..1
7823 22:59:39.705346 # 1..1
7824 22:59:39.705487 # 1..1
7825 22:59:39.705629 # 1..1
7826 22:59:39.705782 # 1..1
7827 22:59:39.705923 # 1..1
7828 22:59:39.706064 # 1..1
7829 22:59:39.706205 # 1..1
7830 22:59:39.706346 # 1..1
7831 22:59:39.706487 # 1..1
7832 22:59:39.706628 # 1..1
7833 22:59:39.706769 # 1..1
7834 22:59:39.706911 # 1..1
7835 22:59:39.707052 # 1..1
7836 22:59:39.707193 # 1..1
7837 22:59:39.707335 # 1..1
7838 22:59:39.707475 # 1..1
7839 22:59:39.707616 # 1..1
7840 22:59:39.707759 # 1..1
7841 22:59:39.707901 # 1..1
7842 22:59:39.711703 # 1..1
7843 22:59:39.711910 # 1..1
7844 22:59:39.712076 # 1..1
7845 22:59:39.712223 # 1..1
7846 22:59:39.712573 # 1..1
7847 22:59:39.712720 # 1..1
7848 22:59:39.712875 # 1..1
7849 22:59:39.713039 # 1..1
7850 22:59:39.713207 # 1..1
7851 22:59:39.713363 # 1..1
7852 22:59:39.713509 # 1..1
7853 22:59:39.713684 # 1..1
7854 22:59:39.713916 # 1..1
7855 22:59:39.714111 # 1..1
7856 22:59:39.714272 # 1..1
7857 22:59:39.714453 # 1..1
7858 22:59:39.714599 # 1..1
7859 22:59:39.714716 # 1..1
7860 22:59:39.714855 # 1..1
7861 22:59:39.714998 # 1..1
7862 22:59:39.715114 # 1..1
7863 22:59:39.715226 # 1..1
7864 22:59:39.715340 # 1..1
7865 22:59:39.715454 # 1..1
7866 22:59:39.715566 # 1..1
7867 22:59:39.715681 # 1..1
7868 22:59:39.715795 # 1..1
7869 22:59:39.715908 # 1..1
7870 22:59:39.716021 # 1..1
7871 22:59:39.716135 # 1..1
7872 22:59:39.716247 # 1..1
7873 22:59:39.716394 # 1..1
7874 22:59:39.716514 # 1..1
7875 22:59:39.716628 # 1..1
7876 22:59:39.716742 # 1..1
7877 22:59:39.716855 # 1..1
7878 22:59:39.716967 # 1..1
7879 22:59:39.717081 # 1..1
7880 22:59:39.717194 # 1..1
7881 22:59:39.717307 # 1..1
7882 22:59:39.717420 # 1..1
7883 22:59:39.717534 # 1..1
7884 22:59:39.717676 # 1..1
7885 22:59:39.717895 # 1..1
7886 22:59:39.718082 # 1..1
7887 22:59:39.718263 # 1..1
7888 22:59:39.718453 # 1..1
7889 22:59:39.718636 # 1..1
7890 22:59:39.718816 # 1..1
7891 22:59:39.718975 # 1..1
7892 22:59:39.719117 # 1..1
7893 22:59:39.719258 # 1..1
7894 22:59:39.719398 # 1..1
7895 22:59:39.719539 # 1..1
7896 22:59:39.719680 # 1..1
7897 22:59:39.719822 # 1..1
7898 22:59:39.719964 # 1..1
7899 22:59:39.720104 # 1..1
7900 22:59:39.720244 # 1..1
7901 22:59:39.720384 # 1..1
7902 22:59:39.720525 # 1..1
7903 22:59:39.720665 # 1..1
7904 22:59:39.720807 # 1..1
7905 22:59:39.720948 # 1..1
7906 22:59:39.721088 # 1..1
7907 22:59:39.721228 # 1..1
7908 22:59:39.721369 # 1..1
7909 22:59:39.721510 # 1..1
7910 22:59:39.721655 # 1..1
7911 22:59:39.721800 # 1..1
7912 22:59:39.721940 # 1..1
7913 22:59:39.722081 # 1..1
7914 22:59:39.722221 # 1..1
7915 22:59:39.722361 # 1..1
7916 22:59:39.722502 # 1..1
7917 22:59:39.722642 # 1..1
7918 22:59:39.722782 # 1..1
7919 22:59:39.722923 # 1..1
7920 22:59:39.723064 # 1..1
7921 22:59:39.723204 # 1..1
7922 22:59:39.723344 # 1..1
7923 22:59:39.723485 # 1..1
7924 22:59:39.723626 # 1..1
7925 22:59:39.723765 # 1..1
7926 22:59:39.723909 # 1..1
7927 22:59:39.724049 # 1..1
7928 22:59:39.724190 # 1..1
7929 22:59:39.724331 # 1..1
7930 22:59:39.724471 # 1..1
7931 22:59:39.724611 # 1..1
7932 22:59:39.724751 # 1..1
7933 22:59:39.724892 # 1..1
7934 22:59:39.725034 # 1..1
7935 22:59:39.734667 # 1..1
7936 22:59:39.734832 # 1..1
7937 22:59:39.735573 # 1..1
7938 22:59:39.735769 # 1..1
7939 22:59:39.735922 # 1..1
7940 22:59:39.736042 # 1..1
7941 22:59:39.736159 # 1..1
7942 22:59:39.736484 # 1..1
7943 22:59:39.736627 # 1..1
7944 22:59:39.736774 # 1..1
7945 22:59:39.736896 # 1..1
7946 22:59:39.737012 # 1..1
7947 22:59:39.737126 # 1..1
7948 22:59:39.737241 # 1..1
7949 22:59:39.737355 # 1..1
7950 22:59:39.737471 # 1..1
7951 22:59:39.737585 # 1..1
7952 22:59:39.737714 # 1..1
7953 22:59:39.737831 # 1..1
7954 22:59:39.737943 # 1..1
7955 22:59:39.738079 #
7956 22:59:39.738197 not ok 37 selftests: arm64: check_gcr_el1_cswitch # TIMEOUT 45 seconds
7957 22:59:40.037401 # selftests: arm64: check_ksm_options
7958 22:59:40.415898 # 1..4
7959 22:59:40.416144 # # Invalid MTE synchronous exception caught!
7960 22:59:40.463482 not ok 38 selftests: arm64: check_ksm_options # exit=1
7961 22:59:40.755992 # selftests: arm64: check_mmap_options
7962 22:59:41.625712 # 1..22
7963 22:59:41.626304 # ok 1 Check anonymous memory with private mapping, sync error mode, mmap memory and tag check off
7964 22:59:41.626491 # ok 2 Check file memory with private mapping, sync error mode, mmap/mprotect memory and tag check off
7965 22:59:41.626627 # ok 3 Check anonymous memory with private mapping, no error mode, mmap memory and tag check off
7966 22:59:41.626775 # ok 4 Check file memory with private mapping, no error mode, mmap/mprotect memory and tag check off
7967 22:59:41.641223 # not ok 5 Check anonymous memory with private mapping, sync error mode, mmap memory and tag check on
7968 22:59:41.641473 # not ok 6 Check anonymous memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
7969 22:59:41.641769 # not ok 7 Check anonymous memory with shared mapping, sync error mode, mmap memory and tag check on
7970 22:59:41.642081 # not ok 8 Check anonymous memory with shared mapping, sync error mode, mmap/mprotect memory and tag check on
7971 22:59:41.642198 # not ok 9 Check anonymous memory with private mapping, async error mode, mmap memory and tag check on
7972 22:59:41.642495 # not ok 10 Check anonymous memory with private mapping, async error mode, mmap/mprotect memory and tag check on
7973 22:59:41.677953 # not ok 11 Check anonymous memory with shared mapping, async error mode, mmap memory and tag check on
7974 22:59:41.678286 # not ok 12 Check anonymous memory with shared mapping, async error mode, mmap/mprotect memory and tag check on
7975 22:59:41.678703 # not ok 13 Check file memory with private mapping, sync error mode, mmap memory and tag check on
7976 22:59:41.678910 # not ok 14 Check file memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
7977 22:59:41.679308 # not ok 15 Check file memory with shared mapping, sync error mode, mmap memory and tag check on
7978 22:59:41.679633 # not ok 16 Check file memory with shared mapping, sync error mode, mmap/mprotect memory and tag check on
7979 22:59:41.679754 # not ok 17 Check file memory with private mapping, async error mode, mmap memory and tag check on
7980 22:59:41.680229 # not ok 18 Check file memory with private mapping, async error mode, mmap/mprotect memory and tag check on
7981 22:59:41.680611 # not ok 19 Check file memory with shared mapping, async error mode, mmap memory and tag check on
7982 22:59:41.680765 # not ok 20 Check file memory with shared mapping, async error mode, mmap/mprotect memory and tag check on
7983 22:59:41.681123 # not ok 21 Check clear PROT_MTE flags with private mapping, sync error mode and mmap memory
7984 22:59:41.681303 # not ok 22 Check clear PROT_MTE flags with private mapping and sync error mode and mmap/mprotect memory
7985 22:59:41.681458 # # Totals: pass:4 fail:18 xfail:0 xpass:0 skip:0 error:0
7986 22:59:41.712031 not ok 39 selftests: arm64: check_mmap_options # exit=1
7987 22:59:41.987621 # selftests: arm64: check_prctl
7988 22:59:42.306531 # TAP version 13
7989 22:59:42.306817 # 1..5
7990 22:59:42.306955 # ok 1 check_basic_read
7991 22:59:42.307083 # ok 2 NONE
7992 22:59:42.307207 # ok 3 SYNC
7993 22:59:42.307553 # ok 4 ASYNC
7994 22:59:42.316498 # ok 5 SYNC+ASYNC
7995 22:59:42.316674 # # Totals: pass:5 fail:0 xfail:0 xpass:0 skip:0 error:0
7996 22:59:42.347457 ok 40 selftests: arm64: check_prctl
7997 22:59:42.689318 # selftests: arm64: check_tags_inclusion
7998 22:59:43.050523 # 1..4
7999 22:59:43.051035 # # Unexpected fault recorded for 0xa00ffffbef8d000-0xa00ffffbef8d050 in mode 1
8000 22:59:43.051294 # not ok 1 Check an included tag value with sync mode
8001 22:59:43.051519 # # Unexpected fault recorded for 0xc00ffffbef8d000-0xc00ffffbef8d050 in mode 1
8002 22:59:43.051754 # not ok 2 Check different included tags value with sync mode
8003 22:59:43.051932 # ok 3 Check none included tags value with sync mode
8004 22:59:43.052126 # # Unexpected fault recorded for 0xe00ffffbef8d000-0xe00ffffbef8d050 in mode 1
8005 22:59:43.052261 # not ok 4 Check all included tags value with sync mode
8006 22:59:43.052380 # # Totals: pass:1 fail:3 xfail:0 xpass:0 skip:0 error:0
8007 22:59:43.112528 not ok 41 selftests: arm64: check_tags_inclusion # exit=1
8008 22:59:43.422477 # selftests: arm64: check_user_mem
8009 22:59:51.862533 # 1..64
8010 22:59:51.863068 # ok 1 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8011 22:59:51.863728 # ok 2 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8012 22:59:51.864139 # ok 3 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8013 22:59:51.864309 # ok 4 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8014 22:59:51.864469 # ok 5 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8015 22:59:51.864602 # ok 6 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8016 22:59:51.864753 # ok 7 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8017 22:59:51.864886 # ok 8 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8018 22:59:51.865014 # ok 9 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8019 22:59:51.865163 # ok 10 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8020 22:59:51.865318 # ok 11 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8021 22:59:51.865446 # ok 12 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8022 22:59:51.865573 # ok 13 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8023 22:59:51.865741 # ok 14 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8024 22:59:51.865876 # ok 15 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8025 22:59:51.866026 # ok 16 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8026 22:59:51.866156 # ok 17 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8027 22:59:51.866280 # ok 18 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8028 22:59:51.866433 # ok 19 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8029 22:59:51.866561 # ok 20 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8030 22:59:51.872376 # ok 21 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8031 22:59:51.872853 # ok 22 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8032 22:59:51.872991 # ok 23 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8033 22:59:51.873135 # ok 24 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8034 22:59:51.873259 # ok 25 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8035 22:59:51.873625 # ok 26 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8036 22:59:51.873771 # ok 27 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8037 22:59:51.873896 # ok 28 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8038 22:59:51.874217 # ok 29 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8039 22:59:51.874345 # ok 30 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8040 22:59:51.874537 # ok 31 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8041 22:59:51.874748 # ok 32 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8042 22:59:51.874913 # ok 33 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8043 22:59:51.875049 # ok 34 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8044 22:59:51.875170 # ok 35 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8045 22:59:51.875554 # ok 36 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8046 22:59:51.875901 # ok 37 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8047 22:59:51.876029 # ok 38 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8048 22:59:51.876149 # ok 39 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8049 22:59:51.876289 # ok 40 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8050 22:59:51.876472 # ok 41 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8051 22:59:51.876661 # ok 42 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8052 22:59:51.876860 # ok 43 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8053 22:59:51.877007 # ok 44 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8054 22:59:51.877149 # ok 45 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8055 22:59:51.877291 # ok 46 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8056 22:59:51.877436 # ok 47 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8057 22:59:51.877829 # ok 48 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8058 22:59:51.878022 # ok 49 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8059 22:59:51.878193 # ok 50 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8060 22:59:51.878330 # ok 51 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8061 22:59:53.448494 # ok 52 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8062 22:59:53.448873 # ok 53 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8063 22:59:53.449060 # ok 54 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8064 22:59:53.449234 # ok 55 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8065 22:59:53.449467 # ok 56 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8066 22:59:53.449661 # ok 57 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8067 22:59:53.449843 # ok 58 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8068 22:59:53.450276 # ok 59 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8069 22:59:53.450475 # ok 60 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8070 22:59:53.450638 # ok 61 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8071 22:59:53.450795 # ok 62 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8072 22:59:53.450951 # ok 63 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8073 22:59:53.451099 # ok 64 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8074 22:59:53.451257 # # Totals: pass:64 fail:0 xfail:0 xpass:0 skip:0 error:0
8075 22:59:53.470561 ok 42 selftests: arm64: check_user_mem
8076 22:59:53.576072 # selftests: arm64: btitest
8077 22:59:53.681311 # TAP version 13
8078 22:59:53.681556 # 1..18
8079 22:59:53.681659 # # HWCAP_PACA present
8080 22:59:53.681984 # # HWCAP2_BTI present
8081 22:59:53.682147 # # Test binary built for BTI
8082 22:59:53.682274 # # [SIGILL in nohint_func/call_using_br_x0, BTYPE=11 (expected)]
8083 22:59:53.682399 # ok 1 nohint_func/call_using_br_x0
8084 22:59:53.682542 # # [SIGILL in nohint_func/call_using_br_x16, BTYPE=01 (expected)]
8085 22:59:53.682665 # ok 2 nohint_func/call_using_br_x16
8086 22:59:53.682788 # # [SIGILL in nohint_func/call_using_blr, BTYPE=10 (expected)]
8087 22:59:53.682905 # ok 3 nohint_func/call_using_blr
8088 22:59:53.683022 # # [SIGILL in bti_none_func/call_using_br_x0, BTYPE=11 (expected)]
8089 22:59:53.683701 # ok 4 bti_none_func/call_using_br_x0
8090 22:59:53.684038 # # [SIGILL in bti_none_func/call_using_br_x16, BTYPE=01 (expected)]
8091 22:59:53.684175 # ok 5 bti_none_func/call_using_br_x16
8092 22:59:53.684320 # # [SIGILL in bti_none_func/call_using_blr, BTYPE=10 (expected)]
8093 22:59:53.684441 # ok 6 bti_none_func/call_using_blr
8094 22:59:53.684558 # # [SIGILL in bti_c_func/call_using_br_x0, BTYPE=11 (expected)]
8095 22:59:53.684713 # ok 7 bti_c_func/call_using_br_x0
8096 22:59:53.684837 # ok 8 bti_c_func/call_using_br_x16
8097 22:59:53.684971 # ok 9 bti_c_func/call_using_blr
8098 22:59:53.685112 # ok 10 bti_j_func/call_using_br_x0
8099 22:59:53.685256 # ok 11 bti_j_func/call_using_br_x16
8100 22:59:53.685440 # # [SIGILL in bti_j_func/call_using_blr, BTYPE=10 (expected)]
8101 22:59:53.685579 # ok 12 bti_j_func/call_using_blr
8102 22:59:53.685712 # ok 13 bti_jc_func/call_using_br_x0
8103 22:59:53.685829 # ok 14 bti_jc_func/call_using_br_x16
8104 22:59:53.685944 # ok 15 bti_jc_func/call_using_blr
8105 22:59:53.686058 # # [SIGILL in paciasp_func/call_using_br_x0, BTYPE=11 (expected)]
8106 22:59:53.686173 # ok 16 paciasp_func/call_using_br_x0
8107 22:59:53.686288 # ok 17 paciasp_func/call_using_br_x16
8108 22:59:53.686405 # ok 18 paciasp_func/call_using_blr
8109 22:59:53.686544 # # Totals: pass:18 fail:0 xfail:0 xpass:0 skip:0 error:0
8110 22:59:53.705606 ok 43 selftests: arm64: btitest
8111 22:59:53.804960 # selftests: arm64: nobtitest
8112 22:59:53.899652 # TAP version 13
8113 22:59:53.899957 # 1..18
8114 22:59:53.900124 # # HWCAP_PACA present
8115 22:59:53.900472 # # HWCAP2_BTI present
8116 22:59:53.900636 # # Test binary not built for BTI
8117 22:59:53.900781 # ok 1 nohint_func/call_using_br_x0
8118 22:59:53.900921 # ok 2 nohint_func/call_using_br_x16
8119 22:59:53.901073 # ok 3 nohint_func/call_using_blr
8120 22:59:53.901234 # ok 4 bti_none_func/call_using_br_x0
8121 22:59:53.901365 # ok 5 bti_none_func/call_using_br_x16
8122 22:59:53.901482 # ok 6 bti_none_func/call_using_blr
8123 22:59:53.901597 # ok 7 bti_c_func/call_using_br_x0
8124 22:59:53.901779 # ok 8 bti_c_func/call_using_br_x16
8125 22:59:53.902016 # ok 9 bti_c_func/call_using_blr
8126 22:59:53.902156 # ok 10 bti_j_func/call_using_br_x0
8127 22:59:53.902299 # ok 11 bti_j_func/call_using_br_x16
8128 22:59:53.902445 # ok 12 bti_j_func/call_using_blr
8129 22:59:53.902588 # ok 13 bti_jc_func/call_using_br_x0
8130 22:59:53.902730 # ok 14 bti_jc_func/call_using_br_x16
8131 22:59:53.902873 # ok 15 bti_jc_func/call_using_blr
8132 22:59:53.903015 # ok 16 paciasp_func/call_using_br_x0
8133 22:59:53.903158 # ok 17 paciasp_func/call_using_br_x16
8134 22:59:53.903300 # ok 18 paciasp_func/call_using_blr
8135 22:59:53.903444 # # Totals: pass:18 fail:0 xfail:0 xpass:0 skip:0 error:0
8136 22:59:53.916105 ok 44 selftests: arm64: nobtitest
8137 22:59:54.024331 # selftests: arm64: hwcap
8138 22:59:54.196577 # TAP version 13
8139 22:59:54.197125 # 1..28
8140 22:59:54.197290 # # RNG present
8141 22:59:54.197440 # ok 1 cpuinfo_match_RNG
8142 22:59:54.197592 # ok 2 sigill_RNG
8143 22:59:54.197764 # # SME present
8144 22:59:54.197920 # ok 3 cpuinfo_match_SME
8145 22:59:54.198075 # ok 4 sigill_SME
8146 22:59:54.198217 # # SVE present
8147 22:59:54.198358 # ok 5 cpuinfo_match_SVE
8148 22:59:54.198506 # ok 6 sigill_SVE
8149 22:59:54.198629 # # SVE 2 present
8150 22:59:54.198801 # ok 7 cpuinfo_match_SVE 2
8151 22:59:54.198999 # ok 8 sigill_SVE 2
8152 22:59:54.199184 # # SVE AES present
8153 22:59:54.199345 # ok 9 cpuinfo_match_SVE AES
8154 22:59:54.199482 # ok 10 sigill_SVE AES
8155 22:59:54.199664 # # SVE2 PMULL present
8156 22:59:54.199850 # ok 11 cpuinfo_match_SVE2 PMULL
8157 22:59:54.200030 # ok 12 sigill_SVE2 PMULL
8158 22:59:54.200198 # # SVE2 BITPERM present
8159 22:59:54.200322 # ok 13 cpuinfo_match_SVE2 BITPERM
8160 22:59:54.200440 # ok 14 sigill_SVE2 BITPERM
8161 22:59:54.200554 # # SVE2 SHA3 present
8162 22:59:54.200671 # ok 15 cpuinfo_match_SVE2 SHA3
8163 22:59:54.200787 # ok 16 sigill_SVE2 SHA3
8164 22:59:54.200904 # # SVE2 SM4 present
8165 22:59:54.201021 # ok 17 cpuinfo_match_SVE2 SM4
8166 22:59:54.201140 # ok 18 sigill_SVE2 SM4
8167 22:59:54.201277 # # SVE2 I8MM present
8168 22:59:54.201417 # ok 19 cpuinfo_match_SVE2 I8MM
8169 22:59:54.201567 # ok 20 sigill_SVE2 I8MM
8170 22:59:54.201763 # # SVE2 F32MM present
8171 22:59:54.201918 # ok 21 cpuinfo_match_SVE2 F32MM
8172 22:59:54.202062 # ok 22 sigill_SVE2 F32MM
8173 22:59:54.202204 # # SVE2 F64MM present
8174 22:59:54.202388 # ok 23 cpuinfo_match_SVE2 F64MM
8175 22:59:54.202523 # ok 24 sigill_SVE2 F64MM
8176 22:59:54.202667 # # SVE2 BF16 present
8177 22:59:54.202809 # ok 25 cpuinfo_match_SVE2 BF16
8178 22:59:54.202953 # ok 26 sigill_SVE2 BF16
8179 22:59:54.203094 # ok 27 cpuinfo_match_SVE2 EBF16
8180 22:59:54.203235 # ok 28 # SKIP sigill_SVE2 EBF16
8181 22:59:54.203377 # # Totals: pass:27 fail:0 xfail:0 xpass:0 skip:1 error:0
8182 22:59:54.217644 ok 45 selftests: arm64: hwcap
8183 22:59:54.392692 # selftests: arm64: ptrace
8184 22:59:54.551883 # TAP version 13
8185 22:59:54.552126 # 1..7
8186 22:59:54.552219 # # Parent is 4110, child is 4111
8187 22:59:54.552302 # ok 1 read_tpidr_one
8188 22:59:54.552381 # ok 2 write_tpidr_one
8189 22:59:54.552662 # ok 3 verify_tpidr_one
8190 22:59:54.552750 # ok 4 count_tpidrs
8191 22:59:54.552833 # ok 5 tpidr2_write
8192 22:59:54.552910 # ok 6 tpidr2_read
8193 22:59:54.552985 # ok 7 write_tpidr_only
8194 22:59:54.553061 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
8195 22:59:54.576263 ok 46 selftests: arm64: ptrace
8196 22:59:54.692952 # selftests: arm64: syscall-abi
8197 22:59:57.280052 # TAP version 13
8198 22:59:57.280512 # 1..514
8199 22:59:57.280717 # # SME with FA64
8200 22:59:57.280914 # ok 1 getpid() FPSIMD
8201 22:59:57.281072 # ok 2 getpid() SVE VL 256
8202 22:59:57.281232 # ok 3 getpid() SVE VL 256/SME VL 256 SM+ZA
8203 22:59:57.281407 # ok 4 getpid() SVE VL 256/SME VL 256 SM
8204 22:59:57.281644 # ok 5 getpid() SVE VL 256/SME VL 256 ZA
8205 22:59:57.281829 # ok 6 getpid() SVE VL 256/SME VL 128 SM+ZA
8206 22:59:57.282016 # ok 7 getpid() SVE VL 256/SME VL 128 SM
8207 22:59:57.282192 # ok 8 getpid() SVE VL 256/SME VL 128 ZA
8208 22:59:57.282366 # ok 9 getpid() SVE VL 256/SME VL 64 SM+ZA
8209 22:59:57.282551 # ok 10 getpid() SVE VL 256/SME VL 64 SM
8210 22:59:57.282684 # ok 11 getpid() SVE VL 256/SME VL 64 ZA
8211 22:59:57.282804 # ok 12 getpid() SVE VL 256/SME VL 32 SM+ZA
8212 22:59:57.282921 # ok 13 getpid() SVE VL 256/SME VL 32 SM
8213 22:59:57.283037 # ok 14 getpid() SVE VL 256/SME VL 32 ZA
8214 22:59:57.283156 # ok 15 getpid() SVE VL 256/SME VL 16 SM+ZA
8215 22:59:57.283274 # ok 16 getpid() SVE VL 256/SME VL 16 SM
8216 22:59:57.283390 # ok 17 getpid() SVE VL 256/SME VL 16 ZA
8217 22:59:57.283538 # ok 18 getpid() SVE VL 240
8218 22:59:57.283665 # ok 19 getpid() SVE VL 240/SME VL 256 SM+ZA
8219 22:59:57.283783 # ok 20 getpid() SVE VL 240/SME VL 256 SM
8220 22:59:57.283899 # ok 21 getpid() SVE VL 240/SME VL 256 ZA
8221 22:59:57.284017 # ok 22 getpid() SVE VL 240/SME VL 128 SM+ZA
8222 22:59:57.284135 # ok 23 getpid() SVE VL 240/SME VL 128 SM
8223 22:59:57.284252 # ok 24 getpid() SVE VL 240/SME VL 128 ZA
8224 22:59:57.288292 # ok 25 getpid() SVE VL 240/SME VL 64 SM+ZA
8225 22:59:57.288719 # ok 26 getpid() SVE VL 240/SME VL 64 SM
8226 22:59:57.288927 # ok 27 getpid() SVE VL 240/SME VL 64 ZA
8227 22:59:57.289102 # ok 28 getpid() SVE VL 240/SME VL 32 SM+ZA
8228 22:59:57.289296 # ok 29 getpid() SVE VL 240/SME VL 32 SM
8229 22:59:57.289511 # ok 30 getpid() SVE VL 240/SME VL 32 ZA
8230 22:59:57.289708 # ok 31 getpid() SVE VL 240/SME VL 16 SM+ZA
8231 22:59:57.289903 # ok 32 getpid() SVE VL 240/SME VL 16 SM
8232 22:59:57.290100 # ok 33 getpid() SVE VL 240/SME VL 16 ZA
8233 22:59:57.290292 # ok 34 getpid() SVE VL 224
8234 22:59:57.290468 # ok 35 getpid() SVE VL 224/SME VL 256 SM+ZA
8235 22:59:57.290615 # ok 36 getpid() SVE VL 224/SME VL 256 SM
8236 22:59:57.290801 # ok 37 getpid() SVE VL 224/SME VL 256 ZA
8237 22:59:57.290940 # ok 38 getpid() SVE VL 224/SME VL 128 SM+ZA
8238 22:59:57.291083 # ok 39 getpid() SVE VL 224/SME VL 128 SM
8239 22:59:57.291225 # ok 40 getpid() SVE VL 224/SME VL 128 ZA
8240 22:59:57.291367 # ok 41 getpid() SVE VL 224/SME VL 64 SM+ZA
8241 22:59:57.291509 # ok 42 getpid() SVE VL 224/SME VL 64 SM
8242 22:59:57.291649 # ok 43 getpid() SVE VL 224/SME VL 64 ZA
8243 22:59:57.291791 # ok 44 getpid() SVE VL 224/SME VL 32 SM+ZA
8244 22:59:57.291933 # ok 45 getpid() SVE VL 224/SME VL 32 SM
8245 22:59:57.292075 # ok 46 getpid() SVE VL 224/SME VL 32 ZA
8246 22:59:57.292220 # ok 47 getpid() SVE VL 224/SME VL 16 SM+ZA
8247 22:59:57.294875 # ok 48 getpid() SVE VL 224/SME VL 16 SM
8248 22:59:57.295247 # ok 49 getpid() SVE VL 224/SME VL 16 ZA
8249 22:59:57.295369 # ok 50 getpid() SVE VL 208
8250 22:59:57.295475 # ok 51 getpid() SVE VL 208/SME VL 256 SM+ZA
8251 22:59:57.295576 # ok 52 getpid() SVE VL 208/SME VL 256 SM
8252 22:59:57.295678 # ok 53 getpid() SVE VL 208/SME VL 256 ZA
8253 22:59:57.295782 # ok 54 getpid() SVE VL 208/SME VL 128 SM+ZA
8254 22:59:57.295890 # ok 55 getpid() SVE VL 208/SME VL 128 SM
8255 22:59:57.296229 # ok 56 getpid() SVE VL 208/SME VL 128 ZA
8256 22:59:57.296430 # ok 57 getpid() SVE VL 208/SME VL 64 SM+ZA
8257 22:59:57.296624 # ok 58 getpid() SVE VL 208/SME VL 64 SM
8258 22:59:57.296787 # ok 59 getpid() SVE VL 208/SME VL 64 ZA
8259 22:59:57.296953 # ok 60 getpid() SVE VL 208/SME VL 32 SM+ZA
8260 22:59:57.297092 # ok 61 getpid() SVE VL 208/SME VL 32 SM
8261 22:59:57.297288 # ok 62 getpid() SVE VL 208/SME VL 32 ZA
8262 22:59:57.297455 # ok 63 getpid() SVE VL 208/SME VL 16 SM+ZA
8263 22:59:57.297616 # ok 64 getpid() SVE VL 208/SME VL 16 SM
8264 22:59:57.297790 # ok 65 getpid() SVE VL 208/SME VL 16 ZA
8265 22:59:57.297954 # ok 66 getpid() SVE VL 192
8266 22:59:57.298114 # ok 67 getpid() SVE VL 192/SME VL 256 SM+ZA
8267 22:59:57.298310 # ok 68 getpid() SVE VL 192/SME VL 256 SM
8268 22:59:57.298469 # ok 69 getpid() SVE VL 192/SME VL 256 ZA
8269 22:59:57.298596 # ok 70 getpid() SVE VL 192/SME VL 128 SM+ZA
8270 22:59:57.298714 # ok 71 getpid() SVE VL 192/SME VL 128 SM
8271 22:59:57.298827 # ok 72 getpid() SVE VL 192/SME VL 128 ZA
8272 22:59:57.298941 # ok 73 getpid() SVE VL 192/SME VL 64 SM+ZA
8273 22:59:57.299055 # ok 74 getpid() SVE VL 192/SME VL 64 SM
8274 22:59:57.299169 # ok 75 getpid() SVE VL 192/SME VL 64 ZA
8275 22:59:57.299285 # ok 76 getpid() SVE VL 192/SME VL 32 SM+ZA
8276 22:59:57.299424 # ok 77 getpid() SVE VL 192/SME VL 32 SM
8277 22:59:57.302895 # ok 78 getpid() SVE VL 192/SME VL 32 ZA
8278 22:59:57.303384 # ok 79 getpid() SVE VL 192/SME VL 16 SM+ZA
8279 22:59:57.303584 # ok 80 getpid() SVE VL 192/SME VL 16 SM
8280 22:59:57.303749 # ok 81 getpid() SVE VL 192/SME VL 16 ZA
8281 22:59:57.303909 # ok 82 getpid() SVE VL 176
8282 22:59:57.304072 # ok 83 getpid() SVE VL 176/SME VL 256 SM+ZA
8283 22:59:57.304266 # ok 84 getpid() SVE VL 176/SME VL 256 SM
8284 22:59:57.304429 # ok 85 getpid() SVE VL 176/SME VL 256 ZA
8285 22:59:57.304590 # ok 86 getpid() SVE VL 176/SME VL 128 SM+ZA
8286 22:59:57.304746 # ok 87 getpid() SVE VL 176/SME VL 128 SM
8287 22:59:57.304907 # ok 88 getpid() SVE VL 176/SME VL 128 ZA
8288 22:59:57.305051 # ok 89 getpid() SVE VL 176/SME VL 64 SM+ZA
8289 22:59:57.305168 # ok 90 getpid() SVE VL 176/SME VL 64 SM
8290 22:59:57.305281 # ok 91 getpid() SVE VL 176/SME VL 64 ZA
8291 22:59:57.305419 # ok 92 getpid() SVE VL 176/SME VL 32 SM+ZA
8292 22:59:57.305537 # ok 93 getpid() SVE VL 176/SME VL 32 SM
8293 22:59:57.305659 # ok 94 getpid() SVE VL 176/SME VL 32 ZA
8294 22:59:57.305863 # ok 95 getpid() SVE VL 176/SME VL 16 SM+ZA
8295 22:59:57.306056 # ok 96 getpid() SVE VL 176/SME VL 16 SM
8296 22:59:57.306243 # ok 97 getpid() SVE VL 176/SME VL 16 ZA
8297 22:59:57.306398 # ok 98 getpid() SVE VL 160
8298 22:59:59.751984 # ok 99 getpid() SVE VL 160/SME VL 256 SM+ZA
8299 22:59:59.752493 # ok 100 getpid() SVE VL 160/SME VL 256 SM
8300 22:59:59.752604 # ok 101 getpid() SVE VL 160/SME VL 256 ZA
8301 22:59:59.752697 # ok 102 getpid() SVE VL 160/SME VL 128 SM+ZA
8302 22:59:59.752785 # ok 103 getpid() SVE VL 160/SME VL 128 SM
8303 22:59:59.752873 # ok 104 getpid() SVE VL 160/SME VL 128 ZA
8304 22:59:59.752978 # ok 105 getpid() SVE VL 160/SME VL 64 SM+ZA
8305 22:59:59.753069 # ok 106 getpid() SVE VL 160/SME VL 64 SM
8306 22:59:59.753158 # ok 107 getpid() SVE VL 160/SME VL 64 ZA
8307 22:59:59.753247 # ok 108 getpid() SVE VL 160/SME VL 32 SM+ZA
8308 22:59:59.753334 # ok 109 getpid() SVE VL 160/SME VL 32 SM
8309 22:59:59.753438 # ok 110 getpid() SVE VL 160/SME VL 32 ZA
8310 22:59:59.753527 # ok 111 getpid() SVE VL 160/SME VL 16 SM+ZA
8311 22:59:59.753614 # ok 112 getpid() SVE VL 160/SME VL 16 SM
8312 22:59:59.753729 # ok 113 getpid() SVE VL 160/SME VL 16 ZA
8313 22:59:59.753821 # ok 114 getpid() SVE VL 144
8314 22:59:59.753924 # ok 115 getpid() SVE VL 144/SME VL 256 SM+ZA
8315 22:59:59.754014 # ok 116 getpid() SVE VL 144/SME VL 256 SM
8316 22:59:59.754101 # ok 117 getpid() SVE VL 144/SME VL 256 ZA
8317 22:59:59.754205 # ok 118 getpid() SVE VL 144/SME VL 128 SM+ZA
8318 22:59:59.754292 # ok 119 getpid() SVE VL 144/SME VL 128 SM
8319 22:59:59.754375 # ok 120 getpid() SVE VL 144/SME VL 128 ZA
8320 22:59:59.754475 # ok 121 getpid() SVE VL 144/SME VL 64 SM+ZA
8321 22:59:59.754560 # ok 122 getpid() SVE VL 144/SME VL 64 SM
8322 22:59:59.754642 # ok 123 getpid() SVE VL 144/SME VL 64 ZA
8323 22:59:59.754724 # ok 124 getpid() SVE VL 144/SME VL 32 SM+ZA
8324 22:59:59.758980 # ok 125 getpid() SVE VL 144/SME VL 32 SM
8325 22:59:59.759413 # ok 126 getpid() SVE VL 144/SME VL 32 ZA
8326 22:59:59.759626 # ok 127 getpid() SVE VL 144/SME VL 16 SM+ZA
8327 22:59:59.759814 # ok 128 getpid() SVE VL 144/SME VL 16 SM
8328 22:59:59.760000 # ok 129 getpid() SVE VL 144/SME VL 16 ZA
8329 22:59:59.760183 # ok 130 getpid() SVE VL 128
8330 22:59:59.760405 # ok 131 getpid() SVE VL 128/SME VL 256 SM+ZA
8331 22:59:59.760585 # ok 132 getpid() SVE VL 128/SME VL 256 SM
8332 22:59:59.760760 # ok 133 getpid() SVE VL 128/SME VL 256 ZA
8333 22:59:59.760923 # ok 134 getpid() SVE VL 128/SME VL 128 SM+ZA
8334 22:59:59.761097 # ok 135 getpid() SVE VL 128/SME VL 128 SM
8335 22:59:59.761267 # ok 136 getpid() SVE VL 128/SME VL 128 ZA
8336 22:59:59.761447 # ok 137 getpid() SVE VL 128/SME VL 64 SM+ZA
8337 22:59:59.761640 # ok 138 getpid() SVE VL 128/SME VL 64 SM
8338 22:59:59.761819 # ok 139 getpid() SVE VL 128/SME VL 64 ZA
8339 22:59:59.761966 # ok 140 getpid() SVE VL 128/SME VL 32 SM+ZA
8340 22:59:59.762159 # ok 141 getpid() SVE VL 128/SME VL 32 SM
8341 22:59:59.762288 # ok 142 getpid() SVE VL 128/SME VL 32 ZA
8342 22:59:59.762452 # ok 143 getpid() SVE VL 128/SME VL 16 SM+ZA
8343 22:59:59.762584 # ok 144 getpid() SVE VL 128/SME VL 16 SM
8344 22:59:59.762716 # ok 145 getpid() SVE VL 128/SME VL 16 ZA
8345 22:59:59.762893 # ok 146 getpid() SVE VL 112
8346 22:59:59.763044 # ok 147 getpid() SVE VL 112/SME VL 256 SM+ZA
8347 22:59:59.763194 # ok 148 getpid() SVE VL 112/SME VL 256 SM
8348 22:59:59.763347 # ok 149 getpid() SVE VL 112/SME VL 256 ZA
8349 22:59:59.763497 # ok 150 getpid() SVE VL 112/SME VL 128 SM+ZA
8350 22:59:59.763658 # ok 151 getpid() SVE VL 112/SME VL 128 SM
8351 22:59:59.763795 # ok 152 getpid() SVE VL 112/SME VL 128 ZA
8352 22:59:59.763910 # ok 153 getpid() SVE VL 112/SME VL 64 SM+ZA
8353 22:59:59.764023 # ok 154 getpid() SVE VL 112/SME VL 64 SM
8354 22:59:59.764134 # ok 155 getpid() SVE VL 112/SME VL 64 ZA
8355 22:59:59.764246 # ok 156 getpid() SVE VL 112/SME VL 32 SM+ZA
8356 22:59:59.764357 # ok 157 getpid() SVE VL 112/SME VL 32 SM
8357 22:59:59.764470 # ok 158 getpid() SVE VL 112/SME VL 32 ZA
8358 22:59:59.764581 # ok 159 getpid() SVE VL 112/SME VL 16 SM+ZA
8359 22:59:59.764691 # ok 160 getpid() SVE VL 112/SME VL 16 SM
8360 22:59:59.764834 # ok 161 getpid() SVE VL 112/SME VL 16 ZA
8361 22:59:59.764955 # ok 162 getpid() SVE VL 96
8362 22:59:59.765067 # ok 163 getpid() SVE VL 96/SME VL 256 SM+ZA
8363 22:59:59.766844 # ok 164 getpid() SVE VL 96/SME VL 256 SM
8364 22:59:59.767361 # ok 165 getpid() SVE VL 96/SME VL 256 ZA
8365 22:59:59.767539 # ok 166 getpid() SVE VL 96/SME VL 128 SM+ZA
8366 22:59:59.767702 # ok 167 getpid() SVE VL 96/SME VL 128 SM
8367 22:59:59.767866 # ok 168 getpid() SVE VL 96/SME VL 128 ZA
8368 22:59:59.768023 # ok 169 getpid() SVE VL 96/SME VL 64 SM+ZA
8369 22:59:59.768190 # ok 170 getpid() SVE VL 96/SME VL 64 SM
8370 22:59:59.768382 # ok 171 getpid() SVE VL 96/SME VL 64 ZA
8371 22:59:59.768530 # ok 172 getpid() SVE VL 96/SME VL 32 SM+ZA
8372 22:59:59.768668 # ok 173 getpid() SVE VL 96/SME VL 32 SM
8373 22:59:59.768799 # ok 174 getpid() SVE VL 96/SME VL 32 ZA
8374 22:59:59.768941 # ok 175 getpid() SVE VL 96/SME VL 16 SM+ZA
8375 22:59:59.769093 # ok 176 getpid() SVE VL 96/SME VL 16 SM
8376 22:59:59.769234 # ok 177 getpid() SVE VL 96/SME VL 16 ZA
8377 22:59:59.769392 # ok 178 getpid() SVE VL 80
8378 22:59:59.769538 # ok 179 getpid() SVE VL 80/SME VL 256 SM+ZA
8379 22:59:59.769812 # ok 180 getpid() SVE VL 80/SME VL 256 SM
8380 22:59:59.770009 # ok 181 getpid() SVE VL 80/SME VL 256 ZA
8381 22:59:59.770142 # ok 182 getpid() SVE VL 80/SME VL 128 SM+ZA
8382 22:59:59.770258 # ok 183 getpid() SVE VL 80/SME VL 128 SM
8383 22:59:59.770371 # ok 184 getpid() SVE VL 80/SME VL 128 ZA
8384 22:59:59.770485 # ok 185 getpid() SVE VL 80/SME VL 64 SM+ZA
8385 22:59:59.770597 # ok 186 getpid() SVE VL 80/SME VL 64 SM
8386 22:59:59.770710 # ok 187 getpid() SVE VL 80/SME VL 64 ZA
8387 22:59:59.770825 # ok 188 getpid() SVE VL 80/SME VL 32 SM+ZA
8388 22:59:59.770938 # ok 189 getpid() SVE VL 80/SME VL 32 SM
8389 22:59:59.771050 # ok 190 getpid() SVE VL 80/SME VL 32 ZA
8390 22:59:59.771162 # ok 191 getpid() SVE VL 80/SME VL 16 SM+ZA
8391 22:59:59.771275 # ok 192 getpid() SVE VL 80/SME VL 16 SM
8392 22:59:59.771386 # ok 193 getpid() SVE VL 80/SME VL 16 ZA
8393 22:59:59.771526 # ok 194 getpid() SVE VL 64
8394 22:59:59.771646 # ok 195 getpid() SVE VL 64/SME VL 256 SM+ZA
8395 23:00:02.077186 # ok 196 getpid() SVE VL 64/SME VL 256 SM
8396 23:00:02.077621 # ok 197 getpid() SVE VL 64/SME VL 256 ZA
8397 23:00:02.077739 # ok 198 getpid() SVE VL 64/SME VL 128 SM+ZA
8398 23:00:02.077847 # ok 199 getpid() SVE VL 64/SME VL 128 SM
8399 23:00:02.077937 # ok 200 getpid() SVE VL 64/SME VL 128 ZA
8400 23:00:02.078040 # ok 201 getpid() SVE VL 64/SME VL 64 SM+ZA
8401 23:00:02.078143 # ok 202 getpid() SVE VL 64/SME VL 64 SM
8402 23:00:02.078251 # ok 203 getpid() SVE VL 64/SME VL 64 ZA
8403 23:00:02.078355 # ok 204 getpid() SVE VL 64/SME VL 32 SM+ZA
8404 23:00:02.078455 # ok 205 getpid() SVE VL 64/SME VL 32 SM
8405 23:00:02.079286 # ok 206 getpid() SVE VL 64/SME VL 32 ZA
8406 23:00:02.079395 # ok 207 getpid() SVE VL 64/SME VL 16 SM+ZA
8407 23:00:02.079683 # ok 208 getpid() SVE VL 64/SME VL 16 SM
8408 23:00:02.079787 # ok 209 getpid() SVE VL 64/SME VL 16 ZA
8409 23:00:02.079879 # ok 210 getpid() SVE VL 48
8410 23:00:02.079968 # ok 211 getpid() SVE VL 48/SME VL 256 SM+ZA
8411 23:00:02.080074 # ok 212 getpid() SVE VL 48/SME VL 256 SM
8412 23:00:02.080164 # ok 213 getpid() SVE VL 48/SME VL 256 ZA
8413 23:00:02.080273 # ok 214 getpid() SVE VL 48/SME VL 128 SM+ZA
8414 23:00:02.080364 # ok 215 getpid() SVE VL 48/SME VL 128 SM
8415 23:00:02.080466 # ok 216 getpid() SVE VL 48/SME VL 128 ZA
8416 23:00:02.080553 # ok 217 getpid() SVE VL 48/SME VL 64 SM+ZA
8417 23:00:02.080657 # ok 218 getpid() SVE VL 48/SME VL 64 SM
8418 23:00:02.080760 # ok 219 getpid() SVE VL 48/SME VL 64 ZA
8419 23:00:02.081188 # ok 220 getpid() SVE VL 48/SME VL 32 SM+ZA
8420 23:00:02.081296 # ok 221 getpid() SVE VL 48/SME VL 32 SM
8421 23:00:02.081387 # ok 222 getpid() SVE VL 48/SME VL 32 ZA
8422 23:00:02.081473 # ok 223 getpid() SVE VL 48/SME VL 16 SM+ZA
8423 23:00:02.081573 # ok 224 getpid() SVE VL 48/SME VL 16 SM
8424 23:00:02.081669 # ok 225 getpid() SVE VL 48/SME VL 16 ZA
8425 23:00:02.081756 # ok 226 getpid() SVE VL 32
8426 23:00:02.081859 # ok 227 getpid() SVE VL 32/SME VL 256 SM+ZA
8427 23:00:02.081964 # ok 228 getpid() SVE VL 32/SME VL 256 SM
8428 23:00:02.082338 # ok 229 getpid() SVE VL 32/SME VL 256 ZA
8429 23:00:02.082453 # ok 230 getpid() SVE VL 32/SME VL 128 SM+ZA
8430 23:00:02.082546 # ok 231 getpid() SVE VL 32/SME VL 128 SM
8431 23:00:02.082649 # ok 232 getpid() SVE VL 32/SME VL 128 ZA
8432 23:00:02.082753 # ok 233 getpid() SVE VL 32/SME VL 64 SM+ZA
8433 23:00:02.082845 # ok 234 getpid() SVE VL 32/SME VL 64 SM
8434 23:00:02.082947 # ok 235 getpid() SVE VL 32/SME VL 64 ZA
8435 23:00:02.083054 # ok 236 getpid() SVE VL 32/SME VL 32 SM+ZA
8436 23:00:02.083346 # ok 237 getpid() SVE VL 32/SME VL 32 SM
8437 23:00:02.083449 # ok 238 getpid() SVE VL 32/SME VL 32 ZA
8438 23:00:02.090839 # ok 239 getpid() SVE VL 32/SME VL 16 SM+ZA
8439 23:00:02.091240 # ok 240 getpid() SVE VL 32/SME VL 16 SM
8440 23:00:02.091356 # ok 241 getpid() SVE VL 32/SME VL 16 ZA
8441 23:00:02.091475 # ok 242 getpid() SVE VL 16
8442 23:00:02.091582 # ok 243 getpid() SVE VL 16/SME VL 256 SM+ZA
8443 23:00:02.091672 # ok 244 getpid() SVE VL 16/SME VL 256 SM
8444 23:00:02.091758 # ok 245 getpid() SVE VL 16/SME VL 256 ZA
8445 23:00:02.092246 # ok 246 getpid() SVE VL 16/SME VL 128 SM+ZA
8446 23:00:02.092348 # ok 247 getpid() SVE VL 16/SME VL 128 SM
8447 23:00:02.092445 # ok 248 getpid() SVE VL 16/SME VL 128 ZA
8448 23:00:02.092759 # ok 249 getpid() SVE VL 16/SME VL 64 SM+ZA
8449 23:00:02.092933 # ok 250 getpid() SVE VL 16/SME VL 64 SM
8450 23:00:02.093069 # ok 251 getpid() SVE VL 16/SME VL 64 ZA
8451 23:00:02.093443 # ok 252 getpid() SVE VL 16/SME VL 32 SM+ZA
8452 23:00:02.093599 # ok 253 getpid() SVE VL 16/SME VL 32 SM
8453 23:00:02.093746 # ok 254 getpid() SVE VL 16/SME VL 32 ZA
8454 23:00:02.093880 # ok 255 getpid() SVE VL 16/SME VL 16 SM+ZA
8455 23:00:02.094016 # ok 256 getpid() SVE VL 16/SME VL 16 SM
8456 23:00:02.094145 # ok 257 getpid() SVE VL 16/SME VL 16 ZA
8457 23:00:02.094304 # ok 258 sched_yield() FPSIMD
8458 23:00:02.094462 # ok 259 sched_yield() SVE VL 256
8459 23:00:02.094576 # ok 260 sched_yield() SVE VL 256/SME VL 256 SM+ZA
8460 23:00:02.094667 # ok 261 sched_yield() SVE VL 256/SME VL 256 SM
8461 23:00:02.094754 # ok 262 sched_yield() SVE VL 256/SME VL 256 ZA
8462 23:00:02.094841 # ok 263 sched_yield() SVE VL 256/SME VL 128 SM+ZA
8463 23:00:02.094947 # ok 264 sched_yield() SVE VL 256/SME VL 128 SM
8464 23:00:02.103022 # ok 265 sched_yield() SVE VL 256/SME VL 128 ZA
8465 23:00:02.103690 # ok 266 sched_yield() SVE VL 256/SME VL 64 SM+ZA
8466 23:00:02.103914 # ok 267 sched_yield() SVE VL 256/SME VL 64 SM
8467 23:00:02.104112 # ok 268 sched_yield() SVE VL 256/SME VL 64 ZA
8468 23:00:02.104318 # ok 269 sched_yield() SVE VL 256/SME VL 32 SM+ZA
8469 23:00:02.104491 # ok 270 sched_yield() SVE VL 256/SME VL 32 SM
8470 23:00:02.104659 # ok 271 sched_yield() SVE VL 256/SME VL 32 ZA
8471 23:00:02.104852 # ok 272 sched_yield() SVE VL 256/SME VL 16 SM+ZA
8472 23:00:02.105067 # ok 273 sched_yield() SVE VL 256/SME VL 16 SM
8473 23:00:02.105272 # ok 274 sched_yield() SVE VL 256/SME VL 16 ZA
8474 23:00:02.105482 # ok 275 sched_yield() SVE VL 240
8475 23:00:02.105698 # ok 276 sched_yield() SVE VL 240/SME VL 256 SM+ZA
8476 23:00:02.105933 # ok 277 sched_yield() SVE VL 240/SME VL 256 SM
8477 23:00:02.106075 # ok 278 sched_yield() SVE VL 240/SME VL 256 ZA
8478 23:00:02.106208 # ok 279 sched_yield() SVE VL 240/SME VL 128 SM+ZA
8479 23:00:02.106336 # ok 280 sched_yield() SVE VL 240/SME VL 128 SM
8480 23:00:02.106754 # ok 281 sched_yield() SVE VL 240/SME VL 128 ZA
8481 23:00:02.106910 # ok 282 sched_yield() SVE VL 240/SME VL 64 SM+ZA
8482 23:00:02.107036 # ok 283 sched_yield() SVE VL 240/SME VL 64 SM
8483 23:00:02.107199 # ok 284 sched_yield() SVE VL 240/SME VL 64 ZA
8484 23:00:02.107301 # ok 285 sched_yield() SVE VL 240/SME VL 32 SM+ZA
8485 23:00:02.107391 # ok 286 sched_yield() SVE VL 240/SME VL 32 SM
8486 23:00:02.107479 # ok 287 sched_yield() SVE VL 240/SME VL 32 ZA
8487 23:00:02.107567 # ok 288 sched_yield() SVE VL 240/SME VL 16 SM+ZA
8488 23:00:02.107655 # ok 289 sched_yield() SVE VL 240/SME VL 16 SM
8489 23:00:04.245792 # ok 290 sched_yield() SVE VL 240/SME VL 16 ZA
8490 23:00:04.246190 # ok 291 sched_yield() SVE VL 224
8491 23:00:04.246295 # ok 292 sched_yield() SVE VL 224/SME VL 256 SM+ZA
8492 23:00:04.246436 # ok 293 sched_yield() SVE VL 224/SME VL 256 SM
8493 23:00:04.246541 # ok 294 sched_yield() SVE VL 224/SME VL 256 ZA
8494 23:00:04.255220 # ok 295 sched_yield() SVE VL 224/SME VL 128 SM+ZA
8495 23:00:04.255804 # ok 296 sched_yield() SVE VL 224/SME VL 128 SM
8496 23:00:04.255920 # ok 297 sched_yield() SVE VL 224/SME VL 128 ZA
8497 23:00:04.256015 # ok 298 sched_yield() SVE VL 224/SME VL 64 SM+ZA
8498 23:00:04.256105 # ok 299 sched_yield() SVE VL 224/SME VL 64 SM
8499 23:00:04.256194 # ok 300 sched_yield() SVE VL 224/SME VL 64 ZA
8500 23:00:04.256283 # ok 301 sched_yield() SVE VL 224/SME VL 32 SM+ZA
8501 23:00:04.256390 # ok 302 sched_yield() SVE VL 224/SME VL 32 SM
8502 23:00:04.256478 # ok 303 sched_yield() SVE VL 224/SME VL 32 ZA
8503 23:00:04.256565 # ok 304 sched_yield() SVE VL 224/SME VL 16 SM+ZA
8504 23:00:04.256650 # ok 305 sched_yield() SVE VL 224/SME VL 16 SM
8505 23:00:04.256737 # ok 306 sched_yield() SVE VL 224/SME VL 16 ZA
8506 23:00:04.256843 # ok 307 sched_yield() SVE VL 208
8507 23:00:04.256930 # ok 308 sched_yield() SVE VL 208/SME VL 256 SM+ZA
8508 23:00:04.257017 # ok 309 sched_yield() SVE VL 208/SME VL 256 SM
8509 23:00:04.257102 # ok 310 sched_yield() SVE VL 208/SME VL 256 ZA
8510 23:00:04.257186 # ok 311 sched_yield() SVE VL 208/SME VL 128 SM+ZA
8511 23:00:04.257272 # ok 312 sched_yield() SVE VL 208/SME VL 128 SM
8512 23:00:04.257359 # ok 313 sched_yield() SVE VL 208/SME VL 128 ZA
8513 23:00:04.257436 # ok 314 sched_yield() SVE VL 208/SME VL 64 SM+ZA
8514 23:00:04.257539 # ok 315 sched_yield() SVE VL 208/SME VL 64 SM
8515 23:00:04.257628 # ok 316 sched_yield() SVE VL 208/SME VL 64 ZA
8516 23:00:04.257721 # ok 317 sched_yield() SVE VL 208/SME VL 32 SM+ZA
8517 23:00:04.257806 # ok 318 sched_yield() SVE VL 208/SME VL 32 SM
8518 23:00:04.257889 # ok 319 sched_yield() SVE VL 208/SME VL 32 ZA
8519 23:00:04.257971 # ok 320 sched_yield() SVE VL 208/SME VL 16 SM+ZA
8520 23:00:04.258070 # ok 321 sched_yield() SVE VL 208/SME VL 16 SM
8521 23:00:04.258157 # ok 322 sched_yield() SVE VL 208/SME VL 16 ZA
8522 23:00:04.258242 # ok 323 sched_yield() SVE VL 192
8523 23:00:04.258332 # ok 324 sched_yield() SVE VL 192/SME VL 256 SM+ZA
8524 23:00:04.258420 # ok 325 sched_yield() SVE VL 192/SME VL 256 SM
8525 23:00:04.258528 # ok 326 sched_yield() SVE VL 192/SME VL 256 ZA
8526 23:00:04.258618 # ok 327 sched_yield() SVE VL 192/SME VL 128 SM+ZA
8527 23:00:04.258708 # ok 328 sched_yield() SVE VL 192/SME VL 128 SM
8528 23:00:04.259368 # ok 329 sched_yield() SVE VL 192/SME VL 128 ZA
8529 23:00:04.259663 # ok 330 sched_yield() SVE VL 192/SME VL 64 SM+ZA
8530 23:00:04.259762 # ok 331 sched_yield() SVE VL 192/SME VL 64 SM
8531 23:00:04.259868 # ok 332 sched_yield() SVE VL 192/SME VL 64 ZA
8532 23:00:04.260179 # ok 333 sched_yield() SVE VL 192/SME VL 32 SM+ZA
8533 23:00:04.260463 # ok 334 sched_yield() SVE VL 192/SME VL 32 SM
8534 23:00:04.260550 # ok 335 sched_yield() SVE VL 192/SME VL 32 ZA
8535 23:00:04.260647 # ok 336 sched_yield() SVE VL 192/SME VL 16 SM+ZA
8536 23:00:04.260744 # ok 337 sched_yield() SVE VL 192/SME VL 16 SM
8537 23:00:04.260848 # ok 338 sched_yield() SVE VL 192/SME VL 16 ZA
8538 23:00:04.260949 # ok 339 sched_yield() SVE VL 176
8539 23:00:04.261247 # ok 340 sched_yield() SVE VL 176/SME VL 256 SM+ZA
8540 23:00:04.261372 # ok 341 sched_yield() SVE VL 176/SME VL 256 SM
8541 23:00:04.261468 # ok 342 sched_yield() SVE VL 176/SME VL 256 ZA
8542 23:00:04.261567 # ok 343 sched_yield() SVE VL 176/SME VL 128 SM+ZA
8543 23:00:04.261676 # ok 344 sched_yield() SVE VL 176/SME VL 128 SM
8544 23:00:04.261778 # ok 345 sched_yield() SVE VL 176/SME VL 128 ZA
8545 23:00:04.261935 # ok 346 sched_yield() SVE VL 176/SME VL 64 SM+ZA
8546 23:00:04.262174 # ok 347 sched_yield() SVE VL 176/SME VL 64 SM
8547 23:00:04.262323 # ok 348 sched_yield() SVE VL 176/SME VL 64 ZA
8548 23:00:04.262479 # ok 349 sched_yield() SVE VL 176/SME VL 32 SM+ZA
8549 23:00:04.262607 # ok 350 sched_yield() SVE VL 176/SME VL 32 SM
8550 23:00:04.267878 # ok 351 sched_yield() SVE VL 176/SME VL 32 ZA
8551 23:00:04.268305 # ok 352 sched_yield() SVE VL 176/SME VL 16 SM+ZA
8552 23:00:04.268423 # ok 353 sched_yield() SVE VL 176/SME VL 16 SM
8553 23:00:04.268516 # ok 354 sched_yield() SVE VL 176/SME VL 16 ZA
8554 23:00:04.268603 # ok 355 sched_yield() SVE VL 160
8555 23:00:04.268706 # ok 356 sched_yield() SVE VL 160/SME VL 256 SM+ZA
8556 23:00:04.268810 # ok 357 sched_yield() SVE VL 160/SME VL 256 SM
8557 23:00:04.268897 # ok 358 sched_yield() SVE VL 160/SME VL 256 ZA
8558 23:00:04.269313 # ok 359 sched_yield() SVE VL 160/SME VL 128 SM+ZA
8559 23:00:04.269427 # ok 360 sched_yield() SVE VL 160/SME VL 128 SM
8560 23:00:04.269513 # ok 361 sched_yield() SVE VL 160/SME VL 128 ZA
8561 23:00:04.269598 # ok 362 sched_yield() SVE VL 160/SME VL 64 SM+ZA
8562 23:00:04.269691 # ok 363 sched_yield() SVE VL 160/SME VL 64 SM
8563 23:00:04.269775 # ok 364 sched_yield() SVE VL 160/SME VL 64 ZA
8564 23:00:04.269857 # ok 365 sched_yield() SVE VL 160/SME VL 32 SM+ZA
8565 23:00:04.269940 # ok 366 sched_yield() SVE VL 160/SME VL 32 SM
8566 23:00:04.270042 # ok 367 sched_yield() SVE VL 160/SME VL 32 ZA
8567 23:00:04.270127 # ok 368 sched_yield() SVE VL 160/SME VL 16 SM+ZA
8568 23:00:04.270211 # ok 369 sched_yield() SVE VL 160/SME VL 16 SM
8569 23:00:04.270293 # ok 370 sched_yield() SVE VL 160/SME VL 16 ZA
8570 23:00:04.270377 # ok 371 sched_yield() SVE VL 144
8571 23:00:04.270460 # ok 372 sched_yield() SVE VL 144/SME VL 256 SM+ZA
8572 23:00:04.270544 # ok 373 sched_yield() SVE VL 144/SME VL 256 SM
8573 23:00:04.270649 # ok 374 sched_yield() SVE VL 144/SME VL 256 ZA
8574 23:00:04.270738 # ok 375 sched_yield() SVE VL 144/SME VL 128 SM+ZA
8575 23:00:04.270822 # ok 376 sched_yield() SVE VL 144/SME VL 128 SM
8576 23:00:06.532581 # ok 377 sched_yield() SVE VL 144/SME VL 128 ZA
8577 23:00:06.533097 # ok 378 sched_yield() SVE VL 144/SME VL 64 SM+ZA
8578 23:00:06.533209 # ok 379 sched_yield() SVE VL 144/SME VL 64 SM
8579 23:00:06.533313 # ok 380 sched_yield() SVE VL 144/SME VL 64 ZA
8580 23:00:06.533406 # ok 381 sched_yield() SVE VL 144/SME VL 32 SM+ZA
8581 23:00:06.533511 # ok 382 sched_yield() SVE VL 144/SME VL 32 SM
8582 23:00:06.533638 # ok 383 sched_yield() SVE VL 144/SME VL 32 ZA
8583 23:00:06.533775 # ok 384 sched_yield() SVE VL 144/SME VL 16 SM+ZA
8584 23:00:06.533876 # ok 385 sched_yield() SVE VL 144/SME VL 16 SM
8585 23:00:06.533969 # ok 386 sched_yield() SVE VL 144/SME VL 16 ZA
8586 23:00:06.534060 # ok 387 sched_yield() SVE VL 128
8587 23:00:06.534153 # ok 388 sched_yield() SVE VL 128/SME VL 256 SM+ZA
8588 23:00:06.534266 # ok 389 sched_yield() SVE VL 128/SME VL 256 SM
8589 23:00:06.534367 # ok 390 sched_yield() SVE VL 128/SME VL 256 ZA
8590 23:00:06.534466 # ok 391 sched_yield() SVE VL 128/SME VL 128 SM+ZA
8591 23:00:06.534540 # ok 392 sched_yield() SVE VL 128/SME VL 128 SM
8592 23:00:06.534602 # ok 393 sched_yield() SVE VL 128/SME VL 128 ZA
8593 23:00:06.534683 # ok 394 sched_yield() SVE VL 128/SME VL 64 SM+ZA
8594 23:00:06.534748 # ok 395 sched_yield() SVE VL 128/SME VL 64 SM
8595 23:00:06.543138 # ok 396 sched_yield() SVE VL 128/SME VL 64 ZA
8596 23:00:06.543602 # ok 397 sched_yield() SVE VL 128/SME VL 32 SM+ZA
8597 23:00:06.543711 # ok 398 sched_yield() SVE VL 128/SME VL 32 SM
8598 23:00:06.543805 # ok 399 sched_yield() SVE VL 128/SME VL 32 ZA
8599 23:00:06.543913 # ok 400 sched_yield() SVE VL 128/SME VL 16 SM+ZA
8600 23:00:06.544038 # ok 401 sched_yield() SVE VL 128/SME VL 16 SM
8601 23:00:06.545022 # ok 402 sched_yield() SVE VL 128/SME VL 16 ZA
8602 23:00:06.545139 # ok 403 sched_yield() SVE VL 112
8603 23:00:06.545240 # ok 404 sched_yield() SVE VL 112/SME VL 256 SM+ZA
8604 23:00:06.545316 # ok 405 sched_yield() SVE VL 112/SME VL 256 SM
8605 23:00:06.545379 # ok 406 sched_yield() SVE VL 112/SME VL 256 ZA
8606 23:00:06.545441 # ok 407 sched_yield() SVE VL 112/SME VL 128 SM+ZA
8607 23:00:06.545500 # ok 408 sched_yield() SVE VL 112/SME VL 128 SM
8608 23:00:06.545573 # ok 409 sched_yield() SVE VL 112/SME VL 128 ZA
8609 23:00:06.545713 # ok 410 sched_yield() SVE VL 112/SME VL 64 SM+ZA
8610 23:00:06.545823 # ok 411 sched_yield() SVE VL 112/SME VL 64 SM
8611 23:00:06.545927 # ok 412 sched_yield() SVE VL 112/SME VL 64 ZA
8612 23:00:06.546034 # ok 413 sched_yield() SVE VL 112/SME VL 32 SM+ZA
8613 23:00:06.546132 # ok 414 sched_yield() SVE VL 112/SME VL 32 SM
8614 23:00:06.546202 # ok 415 sched_yield() SVE VL 112/SME VL 32 ZA
8615 23:00:06.546465 # ok 416 sched_yield() SVE VL 112/SME VL 16 SM+ZA
8616 23:00:06.546553 # ok 417 sched_yield() SVE VL 112/SME VL 16 SM
8617 23:00:06.546623 # ok 418 sched_yield() SVE VL 112/SME VL 16 ZA
8618 23:00:06.546687 # ok 419 sched_yield() SVE VL 96
8619 23:00:06.546746 # ok 420 sched_yield() SVE VL 96/SME VL 256 SM+ZA
8620 23:00:06.546806 # ok 421 sched_yield() SVE VL 96/SME VL 256 SM
8621 23:00:06.546865 # ok 422 sched_yield() SVE VL 96/SME VL 256 ZA
8622 23:00:06.546923 # ok 423 sched_yield() SVE VL 96/SME VL 128 SM+ZA
8623 23:00:06.546981 # ok 424 sched_yield() SVE VL 96/SME VL 128 SM
8624 23:00:06.547040 # ok 425 sched_yield() SVE VL 96/SME VL 128 ZA
8625 23:00:06.547099 # ok 426 sched_yield() SVE VL 96/SME VL 64 SM+ZA
8626 23:00:06.547158 # ok 427 sched_yield() SVE VL 96/SME VL 64 SM
8627 23:00:06.547217 # ok 428 sched_yield() SVE VL 96/SME VL 64 ZA
8628 23:00:06.547290 # ok 429 sched_yield() SVE VL 96/SME VL 32 SM+ZA
8629 23:00:06.552549 # ok 430 sched_yield() SVE VL 96/SME VL 32 SM
8630 23:00:06.552803 # ok 431 sched_yield() SVE VL 96/SME VL 32 ZA
8631 23:00:06.552929 # ok 432 sched_yield() SVE VL 96/SME VL 16 SM+ZA
8632 23:00:06.553039 # ok 433 sched_yield() SVE VL 96/SME VL 16 SM
8633 23:00:06.553137 # ok 434 sched_yield() SVE VL 96/SME VL 16 ZA
8634 23:00:06.553232 # ok 435 sched_yield() SVE VL 80
8635 23:00:06.553344 # ok 436 sched_yield() SVE VL 80/SME VL 256 SM+ZA
8636 23:00:06.553441 # ok 437 sched_yield() SVE VL 80/SME VL 256 SM
8637 23:00:06.553552 # ok 438 sched_yield() SVE VL 80/SME VL 256 ZA
8638 23:00:06.553656 # ok 439 sched_yield() SVE VL 80/SME VL 128 SM+ZA
8639 23:00:06.553752 # ok 440 sched_yield() SVE VL 80/SME VL 128 SM
8640 23:00:06.553863 # ok 441 sched_yield() SVE VL 80/SME VL 128 ZA
8641 23:00:06.553958 # ok 442 sched_yield() SVE VL 80/SME VL 64 SM+ZA
8642 23:00:06.554069 # ok 443 sched_yield() SVE VL 80/SME VL 64 SM
8643 23:00:06.554496 # ok 444 sched_yield() SVE VL 80/SME VL 64 ZA
8644 23:00:06.554606 # ok 445 sched_yield() SVE VL 80/SME VL 32 SM+ZA
8645 23:00:06.554698 # ok 446 sched_yield() SVE VL 80/SME VL 32 SM
8646 23:00:06.554792 # ok 447 sched_yield() SVE VL 80/SME VL 32 ZA
8647 23:00:06.556603 # ok 448 sched_yield() SVE VL 80/SME VL 16 SM+ZA
8648 23:00:06.556744 # ok 449 sched_yield() SVE VL 80/SME VL 16 SM
8649 23:00:06.557076 # ok 450 sched_yield() SVE VL 80/SME VL 16 ZA
8650 23:00:06.557191 # ok 451 sched_yield() SVE VL 64
8651 23:00:06.557289 # ok 452 sched_yield() SVE VL 64/SME VL 256 SM+ZA
8652 23:00:06.557409 # ok 453 sched_yield() SVE VL 64/SME VL 256 SM
8653 23:00:06.557517 # ok 454 sched_yield() SVE VL 64/SME VL 256 ZA
8654 23:00:06.557607 # ok 455 sched_yield() SVE VL 64/SME VL 128 SM+ZA
8655 23:00:06.557727 # ok 456 sched_yield() SVE VL 64/SME VL 128 SM
8656 23:00:06.557819 # ok 457 sched_yield() SVE VL 64/SME VL 128 ZA
8657 23:00:06.557904 # ok 458 sched_yield() SVE VL 64/SME VL 64 SM+ZA
8658 23:00:06.557992 # ok 459 sched_yield() SVE VL 64/SME VL 64 SM
8659 23:00:06.558076 # ok 460 sched_yield() SVE VL 64/SME VL 64 ZA
8660 23:00:06.558169 # ok 461 sched_yield() SVE VL 64/SME VL 32 SM+ZA
8661 23:00:06.558284 # ok 462 sched_yield() SVE VL 64/SME VL 32 SM
8662 23:00:06.558379 # ok 463 sched_yield() SVE VL 64/SME VL 32 ZA
8663 23:00:07.273899 # ok 464 sched_yield() SVE VL 64/SME VL 16 SM+ZA
8664 23:00:07.274208 # ok 465 sched_yield() SVE VL 64/SME VL 16 SM
8665 23:00:07.274609 # ok 466 sched_yield() SVE VL 64/SME VL 16 ZA
8666 23:00:07.274721 # ok 467 sched_yield() SVE VL 48
8667 23:00:07.274814 # ok 468 sched_yield() SVE VL 48/SME VL 256 SM+ZA
8668 23:00:07.274904 # ok 469 sched_yield() SVE VL 48/SME VL 256 SM
8669 23:00:07.274991 # ok 470 sched_yield() SVE VL 48/SME VL 256 ZA
8670 23:00:07.276747 # ok 471 sched_yield() SVE VL 48/SME VL 128 SM+ZA
8671 23:00:07.277064 # ok 472 sched_yield() SVE VL 48/SME VL 128 SM
8672 23:00:07.277172 # ok 473 sched_yield() SVE VL 48/SME VL 128 ZA
8673 23:00:07.277261 # ok 474 sched_yield() SVE VL 48/SME VL 64 SM+ZA
8674 23:00:07.277361 # ok 475 sched_yield() SVE VL 48/SME VL 64 SM
8675 23:00:07.277464 # ok 476 sched_yield() SVE VL 48/SME VL 64 ZA
8676 23:00:07.277568 # ok 477 sched_yield() SVE VL 48/SME VL 32 SM+ZA
8677 23:00:07.277681 # ok 478 sched_yield() SVE VL 48/SME VL 32 SM
8678 23:00:07.277785 # ok 479 sched_yield() SVE VL 48/SME VL 32 ZA
8679 23:00:07.277888 # ok 480 sched_yield() SVE VL 48/SME VL 16 SM+ZA
8680 23:00:07.278189 # ok 481 sched_yield() SVE VL 48/SME VL 16 SM
8681 23:00:07.278294 # ok 482 sched_yield() SVE VL 48/SME VL 16 ZA
8682 23:00:07.278395 # ok 483 sched_yield() SVE VL 32
8683 23:00:07.278509 # ok 484 sched_yield() SVE VL 32/SME VL 256 SM+ZA
8684 23:00:07.285565 # ok 485 sched_yield() SVE VL 32/SME VL 256 SM
8685 23:00:07.285927 # ok 486 sched_yield() SVE VL 32/SME VL 256 ZA
8686 23:00:07.286454 # ok 487 sched_yield() SVE VL 32/SME VL 128 SM+ZA
8687 23:00:07.286677 # ok 488 sched_yield() SVE VL 32/SME VL 128 SM
8688 23:00:07.286836 # ok 489 sched_yield() SVE VL 32/SME VL 128 ZA
8689 23:00:07.287040 # ok 490 sched_yield() SVE VL 32/SME VL 64 SM+ZA
8690 23:00:07.287263 # ok 491 sched_yield() SVE VL 32/SME VL 64 SM
8691 23:00:07.287511 # ok 492 sched_yield() SVE VL 32/SME VL 64 ZA
8692 23:00:07.287715 # ok 493 sched_yield() SVE VL 32/SME VL 32 SM+ZA
8693 23:00:07.287930 # ok 494 sched_yield() SVE VL 32/SME VL 32 SM
8694 23:00:07.288122 # ok 495 sched_yield() SVE VL 32/SME VL 32 ZA
8695 23:00:07.288301 # ok 496 sched_yield() SVE VL 32/SME VL 16 SM+ZA
8696 23:00:07.288473 # ok 497 sched_yield() SVE VL 32/SME VL 16 SM
8697 23:00:07.288679 # ok 498 sched_yield() SVE VL 32/SME VL 16 ZA
8698 23:00:07.288888 # ok 499 sched_yield() SVE VL 16
8699 23:00:07.289072 # ok 500 sched_yield() SVE VL 16/SME VL 256 SM+ZA
8700 23:00:07.289246 # ok 501 sched_yield() SVE VL 16/SME VL 256 SM
8701 23:00:07.289414 # ok 502 sched_yield() SVE VL 16/SME VL 256 ZA
8702 23:00:07.289576 # ok 503 sched_yield() SVE VL 16/SME VL 128 SM+ZA
8703 23:00:07.290110 # ok 504 sched_yield() SVE VL 16/SME VL 128 SM
8704 23:00:07.290292 # ok 505 sched_yield() SVE VL 16/SME VL 128 ZA
8705 23:00:07.290485 # ok 506 sched_yield() SVE VL 16/SME VL 64 SM+ZA
8706 23:00:07.290623 # ok 507 sched_yield() SVE VL 16/SME VL 64 SM
8707 23:00:07.290767 # ok 508 sched_yield() SVE VL 16/SME VL 64 ZA
8708 23:00:07.290911 # ok 509 sched_yield() SVE VL 16/SME VL 32 SM+ZA
8709 23:00:07.291054 # ok 510 sched_yield() SVE VL 16/SME VL 32 SM
8710 23:00:07.291197 # ok 511 sched_yield() SVE VL 16/SME VL 32 ZA
8711 23:00:07.291338 # ok 512 sched_yield() SVE VL 16/SME VL 16 SM+ZA
8712 23:00:07.291479 # ok 513 sched_yield() SVE VL 16/SME VL 16 SM
8713 23:00:07.291621 # ok 514 sched_yield() SVE VL 16/SME VL 16 ZA
8714 23:00:07.291762 # # Totals: pass:514 fail:0 xfail:0 xpass:0 skip:0 error:0
8715 23:00:07.295018 ok 47 selftests: arm64: syscall-abi
8716 23:00:07.340841 # selftests: arm64: tpidr2
8717 23:00:07.495278 # TAP version 13
8718 23:00:07.495624 # 1..5
8719 23:00:07.496043 # # PID: 4145
8720 23:00:07.496234 # ok 1 default_value
8721 23:00:07.496402 # ok 2 write_read
8722 23:00:07.496574 # ok 3 write_sleep_read
8723 23:00:07.496735 # ok 4 write_fork_read
8724 23:00:07.496896 # ok 5 write_clone_read
8725 23:00:07.497056 # # Totals: pass:5 fail:0 xfail:0 xpass:0 skip:0 error:0
8726 23:00:07.507623 ok 48 selftests: arm64: tpidr2
8727 23:00:08.036991 arm64_tags_test pass
8728 23:00:08.037574 arm64_run_tags_test_sh pass
8729 23:00:08.037786 arm64_fake_sigreturn_bad_magic pass
8730 23:00:08.037958 arm64_fake_sigreturn_bad_size pass
8731 23:00:08.038126 arm64_fake_sigreturn_bad_size_for_magic0 pass
8732 23:00:08.038271 arm64_fake_sigreturn_duplicated_fpsimd pass
8733 23:00:08.038413 arm64_fake_sigreturn_misaligned_sp pass
8734 23:00:08.038566 arm64_fake_sigreturn_missing_fpsimd pass
8735 23:00:08.038717 arm64_fake_sigreturn_sme_change_vl pass
8736 23:00:08.038850 arm64_fake_sigreturn_sve_change_vl pass
8737 23:00:08.039043 arm64_mangle_pstate_invalid_compat_toggle pass
8738 23:00:08.039212 arm64_mangle_pstate_invalid_daif_bits pass
8739 23:00:08.039377 arm64_mangle_pstate_invalid_mode_el1h pass
8740 23:00:08.039539 arm64_mangle_pstate_invalid_mode_el1t pass
8741 23:00:08.039704 arm64_mangle_pstate_invalid_mode_el2h pass
8742 23:00:08.039868 arm64_mangle_pstate_invalid_mode_el2t pass
8743 23:00:08.040003 arm64_mangle_pstate_invalid_mode_el3h pass
8744 23:00:08.040157 arm64_mangle_pstate_invalid_mode_el3t pass
8745 23:00:08.040313 arm64_sme_trap_no_sm pass
8746 23:00:08.040473 arm64_sme_trap_non_streaming skip
8747 23:00:08.040630 arm64_sme_trap_za pass
8748 23:00:08.040823 arm64_sme_vl pass
8749 23:00:08.040986 arm64_ssve_regs pass
8750 23:00:08.041133 arm64_sve_regs pass
8751 23:00:08.041285 arm64_sve_vl pass
8752 23:00:08.041425 arm64_za_no_regs pass
8753 23:00:08.041575 arm64_za_regs pass
8754 23:00:08.041742 arm64_pac_global_corrupt_pac pass
8755 23:00:08.041900 arm64_pac_global_pac_instructions_not_nop pass
8756 23:00:08.042057 arm64_pac_global_pac_instructions_not_nop_generic pass
8757 23:00:08.042222 arm64_pac_global_single_thread_different_keys pass
8758 23:00:08.042381 arm64_pac_global_exec_changed_keys pass
8759 23:00:08.042689 arm64_pac_global_context_switch_keep_keys pass
8760 23:00:08.042834 arm64_pac_global_context_switch_keep_keys_generic pass
8761 23:00:08.042953 arm64_pac pass
8762 23:00:08.043069 arm64_fp-stress_FPSIMD-0-0 pass
8763 23:00:08.043184 arm64_fp-stress_SVE-VL-256-0 pass
8764 23:00:08.043298 arm64_fp-stress_SVE-VL-240-0 pass
8765 23:00:08.043411 arm64_fp-stress_SVE-VL-224-0 pass
8766 23:00:08.043526 arm64_fp-stress_SVE-VL-208-0 pass
8767 23:00:08.043640 arm64_fp-stress_SVE-VL-192-0 pass
8768 23:00:08.043803 arm64_fp-stress_SVE-VL-176-0 pass
8769 23:00:08.043932 arm64_fp-stress_SVE-VL-160-0 pass
8770 23:00:08.044048 arm64_fp-stress_SVE-VL-144-0 pass
8771 23:00:08.044163 arm64_fp-stress_SVE-VL-128-0 pass
8772 23:00:08.044276 arm64_fp-stress_SVE-VL-112-0 pass
8773 23:00:08.044390 arm64_fp-stress_SVE-VL-96-0 pass
8774 23:00:08.044507 arm64_fp-stress_SVE-VL-80-0 pass
8775 23:00:08.044652 arm64_fp-stress_SVE-VL-64-0 pass
8776 23:00:08.044775 arm64_fp-stress_SVE-VL-48-0 pass
8777 23:00:08.044891 arm64_fp-stress_SVE-VL-32-0 pass
8778 23:00:08.045007 arm64_fp-stress_SVE-VL-16-0 pass
8779 23:00:08.045121 arm64_fp-stress_SSVE-VL-256-0 pass
8780 23:00:08.045236 arm64_fp-stress_ZA-VL-256-0 pass
8781 23:00:08.045348 arm64_fp-stress_SSVE-VL-128-0 pass
8782 23:00:08.045691 arm64_fp-stress_ZA-VL-128-0 pass
8783 23:00:08.045821 arm64_fp-stress_SSVE-VL-64-0 pass
8784 23:00:08.045937 arm64_fp-stress_ZA-VL-64-0 pass
8785 23:00:08.046052 arm64_fp-stress_SSVE-VL-32-0 pass
8786 23:00:08.046167 arm64_fp-stress_ZA-VL-32-0 pass
8787 23:00:08.046280 arm64_fp-stress_SSVE-VL-16-0 pass
8788 23:00:08.046418 arm64_fp-stress_ZA-VL-16-0 pass
8789 23:00:08.046578 arm64_fp-stress pass
8790 23:00:08.046771 arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 pass
8791 23:00:08.046944 arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state pass
8792 23:00:08.047105 arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set pass
8793 23:00:08.047260 arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared pass
8794 23:00:08.047427 arm64_sve-ptrace_Set_SVE_VL_16 pass
8795 23:00:08.047593 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 pass
8796 23:00:08.047799 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 pass
8797 23:00:08.047975 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 pass
8798 23:00:08.048144 arm64_sve-ptrace_Set_SVE_VL_32 pass
8799 23:00:08.048311 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 pass
8800 23:00:08.048477 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 pass
8801 23:00:08.048644 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 pass
8802 23:00:08.048810 arm64_sve-ptrace_Set_SVE_VL_48 pass
8803 23:00:08.048975 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 pass
8804 23:00:08.049176 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 pass
8805 23:00:08.049354 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 pass
8806 23:00:08.049525 arm64_sve-ptrace_Set_SVE_VL_64 pass
8807 23:00:08.049745 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 pass
8808 23:00:08.049917 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 pass
8809 23:00:08.050083 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 pass
8810 23:00:08.050247 arm64_sve-ptrace_Set_SVE_VL_80 pass
8811 23:00:08.050419 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 pass
8812 23:00:08.050613 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 pass
8813 23:00:08.050745 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 pass
8814 23:00:08.050859 arm64_sve-ptrace_Set_SVE_VL_96 pass
8815 23:00:08.050970 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 pass
8816 23:00:08.051082 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 pass
8817 23:00:08.051194 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 pass
8818 23:00:08.051306 arm64_sve-ptrace_Set_SVE_VL_112 pass
8819 23:00:08.051470 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 pass
8820 23:00:08.051653 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 pass
8821 23:00:08.051799 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 pass
8822 23:00:08.052171 arm64_sve-ptrace_Set_SVE_VL_128 pass
8823 23:00:08.052382 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 pass
8824 23:00:08.052540 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 pass
8825 23:00:08.052672 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 pass
8826 23:00:08.052800 arm64_sve-ptrace_Set_SVE_VL_144 pass
8827 23:00:08.052927 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 pass
8828 23:00:08.053055 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 pass
8829 23:00:08.053184 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 pass
8830 23:00:08.053311 arm64_sve-ptrace_Set_SVE_VL_160 pass
8831 23:00:08.053442 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 pass
8832 23:00:08.053570 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 pass
8833 23:00:08.054881 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 pass
8834 23:00:08.054998 arm64_sve-ptrace_Set_SVE_VL_176 pass
8835 23:00:08.055086 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 pass
8836 23:00:08.055363 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 pass
8837 23:00:08.055459 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 pass
8838 23:00:08.055551 arm64_sve-ptrace_Set_SVE_VL_192 pass
8839 23:00:08.055636 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 pass
8840 23:00:08.055721 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 pass
8841 23:00:08.055823 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 pass
8842 23:00:08.055909 arm64_sve-ptrace_Set_SVE_VL_208 pass
8843 23:00:08.055991 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 pass
8844 23:00:08.056090 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 pass
8845 23:00:08.056175 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 pass
8846 23:00:08.056257 arm64_sve-ptrace_Set_SVE_VL_224 pass
8847 23:00:08.056356 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 pass
8848 23:00:08.056444 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 pass
8849 23:00:08.056527 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 pass
8850 23:00:08.056609 arm64_sve-ptrace_Set_SVE_VL_240 pass
8851 23:00:08.056708 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 pass
8852 23:00:08.056792 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 pass
8853 23:00:08.056887 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 pass
8854 23:00:08.057459 arm64_sve-ptrace_Set_SVE_VL_256 pass
8855 23:00:08.057668 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 pass
8856 23:00:08.057841 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 pass
8857 23:00:08.058008 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 pass
8858 23:00:08.058173 arm64_sve-ptrace_Set_SVE_VL_272 pass
8859 23:00:08.058337 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 skip
8860 23:00:08.058515 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 skip
8861 23:00:08.058684 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 skip
8862 23:00:08.058851 arm64_sve-ptrace_Set_SVE_VL_288 pass
8863 23:00:08.059269 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 skip
8864 23:00:08.059479 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 skip
8865 23:00:08.059658 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 skip
8866 23:00:08.059828 arm64_sve-ptrace_Set_SVE_VL_304 pass
8867 23:00:08.059997 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 skip
8868 23:00:08.060162 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 skip
8869 23:00:08.060328 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 skip
8870 23:00:08.060493 arm64_sve-ptrace_Set_SVE_VL_320 pass
8871 23:00:08.060661 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 skip
8872 23:00:08.060826 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 skip
8873 23:00:08.060990 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 skip
8874 23:00:08.061153 arm64_sve-ptrace_Set_SVE_VL_336 pass
8875 23:00:08.061315 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 skip
8876 23:00:08.061474 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 skip
8877 23:00:08.061638 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 skip
8878 23:00:08.061821 arm64_sve-ptrace_Set_SVE_VL_352 pass
8879 23:00:08.066999 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 skip
8880 23:00:08.067200 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 skip
8881 23:00:08.067326 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 skip
8882 23:00:08.067562 arm64_sve-ptrace_Set_SVE_VL_368 pass
8883 23:00:08.067716 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 skip
8884 23:00:08.067859 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 skip
8885 23:00:08.067981 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 skip
8886 23:00:08.068325 arm64_sve-ptrace_Set_SVE_VL_384 pass
8887 23:00:08.068478 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 skip
8888 23:00:08.068601 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 skip
8889 23:00:08.068739 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 skip
8890 23:00:08.068858 arm64_sve-ptrace_Set_SVE_VL_400 pass
8891 23:00:08.068974 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 skip
8892 23:00:08.069110 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 skip
8893 23:00:08.069229 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 skip
8894 23:00:08.069345 arm64_sve-ptrace_Set_SVE_VL_416 pass
8895 23:00:08.069479 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 skip
8896 23:00:08.069598 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 skip
8897 23:00:08.069748 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 skip
8898 23:00:08.069866 arm64_sve-ptrace_Set_SVE_VL_432 pass
8899 23:00:08.070000 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 skip
8900 23:00:08.070119 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 skip
8901 23:00:08.070254 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 skip
8902 23:00:08.070373 arm64_sve-ptrace_Set_SVE_VL_448 pass
8903 23:00:08.070571 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 skip
8904 23:00:08.077692 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 skip
8905 23:00:08.104164 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 skip
8906 23:00:08.104363 arm64_sve-ptrace_Set_SVE_VL_464 pass
8907 23:00:08.104632 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 skip
8908 23:00:08.104707 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 skip
8909 23:00:08.104775 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 skip
8910 23:00:08.104840 arm64_sve-ptrace_Set_SVE_VL_480 pass
8911 23:00:08.105101 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 skip
8912 23:00:08.105190 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 skip
8913 23:00:08.105255 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 skip
8914 23:00:08.105325 arm64_sve-ptrace_Set_SVE_VL_496 pass
8915 23:00:08.105388 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 skip
8916 23:00:08.105450 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 skip
8917 23:00:08.105529 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 skip
8918 23:00:08.105614 arm64_sve-ptrace_Set_SVE_VL_512 pass
8919 23:00:08.105689 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 skip
8920 23:00:08.105766 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 skip
8921 23:00:08.105833 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 skip
8922 23:00:08.105896 arm64_sve-ptrace_Set_SVE_VL_528 pass
8923 23:00:08.106126 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 skip
8924 23:00:08.106210 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 skip
8925 23:00:08.106280 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 skip
8926 23:00:08.106355 arm64_sve-ptrace_Set_SVE_VL_544 pass
8927 23:00:08.106451 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 skip
8928 23:00:08.106557 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 skip
8929 23:00:08.106634 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 skip
8930 23:00:08.106697 arm64_sve-ptrace_Set_SVE_VL_560 pass
8931 23:00:08.110742 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 skip
8932 23:00:08.111135 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 skip
8933 23:00:08.111269 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 skip
8934 23:00:08.111364 arm64_sve-ptrace_Set_SVE_VL_576 pass
8935 23:00:08.111478 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 skip
8936 23:00:08.111565 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 skip
8937 23:00:08.111667 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 skip
8938 23:00:08.111737 arm64_sve-ptrace_Set_SVE_VL_592 pass
8939 23:00:08.111821 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 skip
8940 23:00:08.111903 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 skip
8941 23:00:08.111979 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 skip
8942 23:00:08.112055 arm64_sve-ptrace_Set_SVE_VL_608 pass
8943 23:00:08.112328 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 skip
8944 23:00:08.112435 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 skip
8945 23:00:08.112521 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 skip
8946 23:00:08.112800 arm64_sve-ptrace_Set_SVE_VL_624 pass
8947 23:00:08.112891 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 skip
8948 23:00:08.113186 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 skip
8949 23:00:08.113279 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 skip
8950 23:00:08.113370 arm64_sve-ptrace_Set_SVE_VL_640 pass
8951 23:00:08.113465 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 skip
8952 23:00:08.113550 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 skip
8953 23:00:08.113665 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 skip
8954 23:00:08.113785 arm64_sve-ptrace_Set_SVE_VL_656 pass
8955 23:00:08.113894 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 skip
8956 23:00:08.113992 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 skip
8957 23:00:08.114092 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 skip
8958 23:00:08.114192 arm64_sve-ptrace_Set_SVE_VL_672 pass
8959 23:00:08.114290 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 skip
8960 23:00:08.114390 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 skip
8961 23:00:08.118612 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 skip
8962 23:00:08.118905 arm64_sve-ptrace_Set_SVE_VL_688 pass
8963 23:00:08.119002 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 skip
8964 23:00:08.119080 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 skip
8965 23:00:08.119153 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 skip
8966 23:00:08.119226 arm64_sve-ptrace_Set_SVE_VL_704 pass
8967 23:00:08.119299 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 skip
8968 23:00:08.119567 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 skip
8969 23:00:08.119692 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 skip
8970 23:00:08.119783 arm64_sve-ptrace_Set_SVE_VL_720 pass
8971 23:00:08.119881 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 skip
8972 23:00:08.119964 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 skip
8973 23:00:08.120061 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 skip
8974 23:00:08.120165 arm64_sve-ptrace_Set_SVE_VL_736 pass
8975 23:00:08.120266 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 skip
8976 23:00:08.120365 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 skip
8977 23:00:08.120656 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 skip
8978 23:00:08.120757 arm64_sve-ptrace_Set_SVE_VL_752 pass
8979 23:00:08.120872 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 skip
8980 23:00:08.120977 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 skip
8981 23:00:08.121109 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 skip
8982 23:00:08.121231 arm64_sve-ptrace_Set_SVE_VL_768 pass
8983 23:00:08.121331 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 skip
8984 23:00:08.121421 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 skip
8985 23:00:08.121508 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 skip
8986 23:00:08.121605 arm64_sve-ptrace_Set_SVE_VL_784 pass
8987 23:00:08.121699 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 skip
8988 23:00:08.121787 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 skip
8989 23:00:08.122056 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 skip
8990 23:00:08.122166 arm64_sve-ptrace_Set_SVE_VL_800 pass
8991 23:00:08.122273 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 skip
8992 23:00:08.122397 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 skip
8993 23:00:08.122493 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 skip
8994 23:00:08.122583 arm64_sve-ptrace_Set_SVE_VL_816 pass
8995 23:00:08.126665 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 skip
8996 23:00:08.126959 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 skip
8997 23:00:08.127047 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 skip
8998 23:00:08.127131 arm64_sve-ptrace_Set_SVE_VL_832 pass
8999 23:00:08.127246 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 skip
9000 23:00:08.127354 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 skip
9001 23:00:08.127452 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 skip
9002 23:00:08.127575 arm64_sve-ptrace_Set_SVE_VL_848 pass
9003 23:00:08.127702 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 skip
9004 23:00:08.127830 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 skip
9005 23:00:08.127952 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 skip
9006 23:00:08.128085 arm64_sve-ptrace_Set_SVE_VL_864 pass
9007 23:00:08.128215 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 skip
9008 23:00:08.128343 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 skip
9009 23:00:08.128467 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 skip
9010 23:00:08.128598 arm64_sve-ptrace_Set_SVE_VL_880 pass
9011 23:00:08.128731 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 skip
9012 23:00:08.128857 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 skip
9013 23:00:08.128998 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 skip
9014 23:00:08.129117 arm64_sve-ptrace_Set_SVE_VL_896 pass
9015 23:00:08.129229 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 skip
9016 23:00:08.129851 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 skip
9017 23:00:08.129953 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 skip
9018 23:00:08.130040 arm64_sve-ptrace_Set_SVE_VL_912 pass
9019 23:00:08.130121 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 skip
9020 23:00:08.130219 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 skip
9021 23:00:08.130304 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 skip
9022 23:00:08.130391 arm64_sve-ptrace_Set_SVE_VL_928 pass
9023 23:00:08.130499 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 skip
9024 23:00:08.130627 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 skip
9025 23:00:08.130724 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 skip
9026 23:00:08.130827 arm64_sve-ptrace_Set_SVE_VL_944 pass
9027 23:00:08.134721 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 skip
9028 23:00:08.135021 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 skip
9029 23:00:08.135142 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 skip
9030 23:00:08.135242 arm64_sve-ptrace_Set_SVE_VL_960 pass
9031 23:00:08.135346 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 skip
9032 23:00:08.135615 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 skip
9033 23:00:08.135741 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 skip
9034 23:00:08.135841 arm64_sve-ptrace_Set_SVE_VL_976 pass
9035 23:00:08.135944 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 skip
9036 23:00:08.136038 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 skip
9037 23:00:08.136335 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 skip
9038 23:00:08.136443 arm64_sve-ptrace_Set_SVE_VL_992 pass
9039 23:00:08.136552 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 skip
9040 23:00:08.136666 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 skip
9041 23:00:08.136766 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 skip
9042 23:00:08.136864 arm64_sve-ptrace_Set_SVE_VL_1008 pass
9043 23:00:08.136968 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 skip
9044 23:00:08.137268 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 skip
9045 23:00:08.137578 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 skip
9046 23:00:08.137690 arm64_sve-ptrace_Set_SVE_VL_1024 pass
9047 23:00:08.137789 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 skip
9048 23:00:08.137895 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 skip
9049 23:00:08.137981 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 skip
9050 23:00:08.138080 arm64_sve-ptrace_Set_SVE_VL_1040 pass
9051 23:00:08.138362 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 skip
9052 23:00:08.138446 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 skip
9053 23:00:08.138711 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 skip
9054 23:00:08.142757 arm64_sve-ptrace_Set_SVE_VL_1056 pass
9055 23:00:08.142867 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 skip
9056 23:00:08.143193 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 skip
9057 23:00:08.143300 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 skip
9058 23:00:08.143389 arm64_sve-ptrace_Set_SVE_VL_1072 pass
9059 23:00:08.143509 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 skip
9060 23:00:08.143595 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 skip
9061 23:00:08.143700 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 skip
9062 23:00:08.143796 arm64_sve-ptrace_Set_SVE_VL_1088 pass
9063 23:00:08.143903 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 skip
9064 23:00:08.144000 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 skip
9065 23:00:08.144105 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 skip
9066 23:00:08.144219 arm64_sve-ptrace_Set_SVE_VL_1104 pass
9067 23:00:08.160174 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 skip
9068 23:00:08.160618 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 skip
9069 23:00:08.160725 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 skip
9070 23:00:08.160811 arm64_sve-ptrace_Set_SVE_VL_1120 pass
9071 23:00:08.161765 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 skip
9072 23:00:08.161873 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 skip
9073 23:00:08.161966 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 skip
9074 23:00:08.162050 arm64_sve-ptrace_Set_SVE_VL_1136 pass
9075 23:00:08.162129 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 skip
9076 23:00:08.162208 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 skip
9077 23:00:08.162290 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 skip
9078 23:00:08.162375 arm64_sve-ptrace_Set_SVE_VL_1152 pass
9079 23:00:08.162473 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 skip
9080 23:00:08.162556 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 skip
9081 23:00:08.162656 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 skip
9082 23:00:08.162745 arm64_sve-ptrace_Set_SVE_VL_1168 pass
9083 23:00:08.163022 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 skip
9084 23:00:08.163128 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 skip
9085 23:00:08.163214 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 skip
9086 23:00:08.163282 arm64_sve-ptrace_Set_SVE_VL_1184 pass
9087 23:00:08.163356 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 skip
9088 23:00:08.163438 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 skip
9089 23:00:08.163522 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 skip
9090 23:00:08.163602 arm64_sve-ptrace_Set_SVE_VL_1200 pass
9091 23:00:08.163670 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 skip
9092 23:00:08.163769 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 skip
9093 23:00:08.163846 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 skip
9094 23:00:08.163929 arm64_sve-ptrace_Set_SVE_VL_1216 pass
9095 23:00:08.164010 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 skip
9096 23:00:08.164095 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 skip
9097 23:00:08.164193 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 skip
9098 23:00:08.164280 arm64_sve-ptrace_Set_SVE_VL_1232 pass
9099 23:00:08.164580 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 skip
9100 23:00:08.164681 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 skip
9101 23:00:08.164767 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 skip
9102 23:00:08.164851 arm64_sve-ptrace_Set_SVE_VL_1248 pass
9103 23:00:08.164934 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 skip
9104 23:00:08.165019 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 skip
9105 23:00:08.165100 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 skip
9106 23:00:08.165179 arm64_sve-ptrace_Set_SVE_VL_1264 pass
9107 23:00:08.165274 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 skip
9108 23:00:08.165355 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 skip
9109 23:00:08.165429 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 skip
9110 23:00:08.166660 arm64_sve-ptrace_Set_SVE_VL_1280 pass
9111 23:00:08.166741 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 skip
9112 23:00:08.166811 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 skip
9113 23:00:08.166873 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 skip
9114 23:00:08.166934 arm64_sve-ptrace_Set_SVE_VL_1296 pass
9115 23:00:08.166994 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 skip
9116 23:00:08.167054 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 skip
9117 23:00:08.167114 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 skip
9118 23:00:08.167173 arm64_sve-ptrace_Set_SVE_VL_1312 pass
9119 23:00:08.167233 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 skip
9120 23:00:08.167293 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 skip
9121 23:00:08.170656 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 skip
9122 23:00:08.170999 arm64_sve-ptrace_Set_SVE_VL_1328 pass
9123 23:00:08.171100 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 skip
9124 23:00:08.171205 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 skip
9125 23:00:08.171312 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 skip
9126 23:00:08.171394 arm64_sve-ptrace_Set_SVE_VL_1344 pass
9127 23:00:08.171501 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 skip
9128 23:00:08.171589 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 skip
9129 23:00:08.171901 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 skip
9130 23:00:08.172006 arm64_sve-ptrace_Set_SVE_VL_1360 pass
9131 23:00:08.172100 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 skip
9132 23:00:08.172205 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 skip
9133 23:00:08.172311 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 skip
9134 23:00:08.172412 arm64_sve-ptrace_Set_SVE_VL_1376 pass
9135 23:00:08.172513 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 skip
9136 23:00:08.172875 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 skip
9137 23:00:08.172996 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 skip
9138 23:00:08.173126 arm64_sve-ptrace_Set_SVE_VL_1392 pass
9139 23:00:08.173233 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 skip
9140 23:00:08.173551 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 skip
9141 23:00:08.173672 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 skip
9142 23:00:08.173787 arm64_sve-ptrace_Set_SVE_VL_1408 pass
9143 23:00:08.173907 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 skip
9144 23:00:08.174011 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 skip
9145 23:00:08.174133 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 skip
9146 23:00:08.174225 arm64_sve-ptrace_Set_SVE_VL_1424 pass
9147 23:00:08.174346 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 skip
9148 23:00:08.174456 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 skip
9149 23:00:08.178606 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 skip
9150 23:00:08.178915 arm64_sve-ptrace_Set_SVE_VL_1440 pass
9151 23:00:08.179023 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 skip
9152 23:00:08.179127 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 skip
9153 23:00:08.179232 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 skip
9154 23:00:08.179336 arm64_sve-ptrace_Set_SVE_VL_1456 pass
9155 23:00:08.179637 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 skip
9156 23:00:08.179764 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 skip
9157 23:00:08.179905 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 skip
9158 23:00:08.180027 arm64_sve-ptrace_Set_SVE_VL_1472 pass
9159 23:00:08.180135 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 skip
9160 23:00:08.180247 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 skip
9161 23:00:08.180373 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 skip
9162 23:00:08.180499 arm64_sve-ptrace_Set_SVE_VL_1488 pass
9163 23:00:08.180809 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 skip
9164 23:00:08.180913 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 skip
9165 23:00:08.181021 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 skip
9166 23:00:08.181108 arm64_sve-ptrace_Set_SVE_VL_1504 pass
9167 23:00:08.181209 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 skip
9168 23:00:08.181297 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 skip
9169 23:00:08.181585 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 skip
9170 23:00:08.181695 arm64_sve-ptrace_Set_SVE_VL_1520 pass
9171 23:00:08.181784 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 skip
9172 23:00:08.181890 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 skip
9173 23:00:08.181997 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 skip
9174 23:00:08.182090 arm64_sve-ptrace_Set_SVE_VL_1536 pass
9175 23:00:08.182617 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 skip
9176 23:00:08.182711 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 skip
9177 23:00:08.182822 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 skip
9178 23:00:08.182918 arm64_sve-ptrace_Set_SVE_VL_1552 pass
9179 23:00:08.186617 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 skip
9180 23:00:08.186920 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 skip
9181 23:00:08.187024 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 skip
9182 23:00:08.187122 arm64_sve-ptrace_Set_SVE_VL_1568 pass
9183 23:00:08.187220 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 skip
9184 23:00:08.187340 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 skip
9185 23:00:08.187465 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 skip
9186 23:00:08.187585 arm64_sve-ptrace_Set_SVE_VL_1584 pass
9187 23:00:08.187921 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 skip
9188 23:00:08.188024 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 skip
9189 23:00:08.188120 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 skip
9190 23:00:08.188233 arm64_sve-ptrace_Set_SVE_VL_1600 pass
9191 23:00:08.188535 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 skip
9192 23:00:08.188630 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 skip
9193 23:00:08.188756 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 skip
9194 23:00:08.188853 arm64_sve-ptrace_Set_SVE_VL_1616 pass
9195 23:00:08.188932 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 skip
9196 23:00:08.189020 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 skip
9197 23:00:08.189106 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 skip
9198 23:00:08.189195 arm64_sve-ptrace_Set_SVE_VL_1632 pass
9199 23:00:08.189291 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 skip
9200 23:00:08.189392 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 skip
9201 23:00:08.189696 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 skip
9202 23:00:08.189806 arm64_sve-ptrace_Set_SVE_VL_1648 pass
9203 23:00:08.189908 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 skip
9204 23:00:08.190009 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 skip
9205 23:00:08.190122 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 skip
9206 23:00:08.190236 arm64_sve-ptrace_Set_SVE_VL_1664 pass
9207 23:00:08.190334 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 skip
9208 23:00:08.190430 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 skip
9209 23:00:08.198674 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 skip
9210 23:00:08.199091 arm64_sve-ptrace_Set_SVE_VL_1680 pass
9211 23:00:08.199211 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 skip
9212 23:00:08.199315 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 skip
9213 23:00:08.199421 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 skip
9214 23:00:08.199576 arm64_sve-ptrace_Set_SVE_VL_1696 pass
9215 23:00:08.199669 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 skip
9216 23:00:08.199785 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 skip
9217 23:00:08.199896 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 skip
9218 23:00:08.200003 arm64_sve-ptrace_Set_SVE_VL_1712 pass
9219 23:00:08.200100 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 skip
9220 23:00:08.200202 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 skip
9221 23:00:08.200499 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 skip
9222 23:00:08.200602 arm64_sve-ptrace_Set_SVE_VL_1728 pass
9223 23:00:08.200714 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 skip
9224 23:00:08.200840 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 skip
9225 23:00:08.200917 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 skip
9226 23:00:08.200981 arm64_sve-ptrace_Set_SVE_VL_1744 pass
9227 23:00:08.215510 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 skip
9228 23:00:08.215741 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 skip
9229 23:00:08.216067 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 skip
9230 23:00:08.216211 arm64_sve-ptrace_Set_SVE_VL_1760 pass
9231 23:00:08.216342 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 skip
9232 23:00:08.216439 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 skip
9233 23:00:08.216542 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 skip
9234 23:00:08.216631 arm64_sve-ptrace_Set_SVE_VL_1776 pass
9235 23:00:08.216716 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 skip
9236 23:00:08.216823 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 skip
9237 23:00:08.216911 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 skip
9238 23:00:08.216997 arm64_sve-ptrace_Set_SVE_VL_1792 pass
9239 23:00:08.217101 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 skip
9240 23:00:08.217211 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 skip
9241 23:00:08.217316 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 skip
9242 23:00:08.217417 arm64_sve-ptrace_Set_SVE_VL_1808 pass
9243 23:00:08.217520 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 skip
9244 23:00:08.217623 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 skip
9245 23:00:08.217737 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 skip
9246 23:00:08.217843 arm64_sve-ptrace_Set_SVE_VL_1824 pass
9247 23:00:08.217952 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 skip
9248 23:00:08.218395 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 skip
9249 23:00:08.218506 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 skip
9250 23:00:08.218593 arm64_sve-ptrace_Set_SVE_VL_1840 pass
9251 23:00:08.223446 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 skip
9252 23:00:08.223603 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 skip
9253 23:00:08.223697 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 skip
9254 23:00:08.223794 arm64_sve-ptrace_Set_SVE_VL_1856 pass
9255 23:00:08.223892 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 skip
9256 23:00:08.223987 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 skip
9257 23:00:08.224070 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 skip
9258 23:00:08.224154 arm64_sve-ptrace_Set_SVE_VL_1872 pass
9259 23:00:08.227509 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 skip
9260 23:00:08.227640 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 skip
9261 23:00:08.227740 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 skip
9262 23:00:08.227835 arm64_sve-ptrace_Set_SVE_VL_1888 pass
9263 23:00:08.227927 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 skip
9264 23:00:08.228017 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 skip
9265 23:00:08.228109 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 skip
9266 23:00:08.228203 arm64_sve-ptrace_Set_SVE_VL_1904 pass
9267 23:00:08.228297 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 skip
9268 23:00:08.228390 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 skip
9269 23:00:08.228483 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 skip
9270 23:00:08.228577 arm64_sve-ptrace_Set_SVE_VL_1920 pass
9271 23:00:08.228671 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 skip
9272 23:00:08.228768 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 skip
9273 23:00:08.228863 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 skip
9274 23:00:08.228957 arm64_sve-ptrace_Set_SVE_VL_1936 pass
9275 23:00:08.229051 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 skip
9276 23:00:08.229144 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 skip
9277 23:00:08.229237 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 skip
9278 23:00:08.229332 arm64_sve-ptrace_Set_SVE_VL_1952 pass
9279 23:00:08.229421 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 skip
9280 23:00:08.229510 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 skip
9281 23:00:08.229603 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 skip
9282 23:00:08.230729 arm64_sve-ptrace_Set_SVE_VL_1968 pass
9283 23:00:08.231043 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 skip
9284 23:00:08.231185 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 skip
9285 23:00:08.231315 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 skip
9286 23:00:08.231429 arm64_sve-ptrace_Set_SVE_VL_1984 pass
9287 23:00:08.231625 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 skip
9288 23:00:08.231782 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 skip
9289 23:00:08.231912 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 skip
9290 23:00:08.232036 arm64_sve-ptrace_Set_SVE_VL_2000 pass
9291 23:00:08.232142 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 skip
9292 23:00:08.232277 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 skip
9293 23:00:08.232399 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 skip
9294 23:00:08.232503 arm64_sve-ptrace_Set_SVE_VL_2016 pass
9295 23:00:08.232608 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 skip
9296 23:00:08.232722 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 skip
9297 23:00:08.232814 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 skip
9298 23:00:08.232908 arm64_sve-ptrace_Set_SVE_VL_2032 pass
9299 23:00:08.232996 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 skip
9300 23:00:08.233084 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 skip
9301 23:00:08.233172 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 skip
9302 23:00:08.233279 arm64_sve-ptrace_Set_SVE_VL_2048 pass
9303 23:00:08.233372 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 skip
9304 23:00:08.233461 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 skip
9305 23:00:08.233549 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 skip
9306 23:00:08.233636 arm64_sve-ptrace_Set_SVE_VL_2064 pass
9307 23:00:08.233756 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 skip
9308 23:00:08.233838 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 skip
9309 23:00:08.233901 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 skip
9310 23:00:08.233962 arm64_sve-ptrace_Set_SVE_VL_2080 pass
9311 23:00:08.234022 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 skip
9312 23:00:08.234096 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 skip
9313 23:00:08.234159 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 skip
9314 23:00:08.234219 arm64_sve-ptrace_Set_SVE_VL_2096 pass
9315 23:00:08.234291 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 skip
9316 23:00:08.234354 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 skip
9317 23:00:08.234455 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 skip
9318 23:00:08.234524 arm64_sve-ptrace_Set_SVE_VL_2112 pass
9319 23:00:08.238708 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 skip
9320 23:00:08.239017 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 skip
9321 23:00:08.239101 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 skip
9322 23:00:08.239170 arm64_sve-ptrace_Set_SVE_VL_2128 pass
9323 23:00:08.239247 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 skip
9324 23:00:08.239327 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 skip
9325 23:00:08.239423 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 skip
9326 23:00:08.239524 arm64_sve-ptrace_Set_SVE_VL_2144 pass
9327 23:00:08.239809 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 skip
9328 23:00:08.239909 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 skip
9329 23:00:08.239998 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 skip
9330 23:00:08.240095 arm64_sve-ptrace_Set_SVE_VL_2160 pass
9331 23:00:08.240180 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 skip
9332 23:00:08.240281 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 skip
9333 23:00:08.240363 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 skip
9334 23:00:08.240447 arm64_sve-ptrace_Set_SVE_VL_2176 pass
9335 23:00:08.240742 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 skip
9336 23:00:08.240855 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 skip
9337 23:00:08.240945 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 skip
9338 23:00:08.241034 arm64_sve-ptrace_Set_SVE_VL_2192 pass
9339 23:00:08.241138 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 skip
9340 23:00:08.241232 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 skip
9341 23:00:08.241318 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 skip
9342 23:00:08.241419 arm64_sve-ptrace_Set_SVE_VL_2208 pass
9343 23:00:08.241505 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 skip
9344 23:00:08.241606 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 skip
9345 23:00:08.241730 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 skip
9346 23:00:08.241834 arm64_sve-ptrace_Set_SVE_VL_2224 pass
9347 23:00:08.242160 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 skip
9348 23:00:08.242274 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 skip
9349 23:00:08.242573 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 skip
9350 23:00:08.246667 arm64_sve-ptrace_Set_SVE_VL_2240 pass
9351 23:00:08.246985 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 skip
9352 23:00:08.247079 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 skip
9353 23:00:08.247181 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 skip
9354 23:00:08.247267 arm64_sve-ptrace_Set_SVE_VL_2256 pass
9355 23:00:08.247368 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 skip
9356 23:00:08.247467 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 skip
9357 23:00:08.247766 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 skip
9358 23:00:08.247868 arm64_sve-ptrace_Set_SVE_VL_2272 pass
9359 23:00:08.247955 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 skip
9360 23:00:08.248055 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 skip
9361 23:00:08.248155 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 skip
9362 23:00:08.248488 arm64_sve-ptrace_Set_SVE_VL_2288 pass
9363 23:00:08.248593 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 skip
9364 23:00:08.251503 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 skip
9365 23:00:08.251623 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 skip
9366 23:00:08.251716 arm64_sve-ptrace_Set_SVE_VL_2304 pass
9367 23:00:08.251792 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 skip
9368 23:00:08.251869 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 skip
9369 23:00:08.251947 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 skip
9370 23:00:08.252021 arm64_sve-ptrace_Set_SVE_VL_2320 pass
9371 23:00:08.252095 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 skip
9372 23:00:08.252169 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 skip
9373 23:00:08.252243 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 skip
9374 23:00:08.252316 arm64_sve-ptrace_Set_SVE_VL_2336 pass
9375 23:00:08.252390 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 skip
9376 23:00:08.252463 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 skip
9377 23:00:08.252537 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 skip
9378 23:00:08.252610 arm64_sve-ptrace_Set_SVE_VL_2352 pass
9379 23:00:08.252684 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 skip
9380 23:00:08.254765 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 skip
9381 23:00:08.255087 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 skip
9382 23:00:08.255185 arm64_sve-ptrace_Set_SVE_VL_2368 pass
9383 23:00:08.255499 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 skip
9384 23:00:08.255619 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 skip
9385 23:00:08.255711 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 skip
9386 23:00:08.255811 arm64_sve-ptrace_Set_SVE_VL_2384 pass
9387 23:00:08.280370 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 skip
9388 23:00:08.280770 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 skip
9389 23:00:08.280895 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 skip
9390 23:00:08.281002 arm64_sve-ptrace_Set_SVE_VL_2400 pass
9391 23:00:08.281125 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 skip
9392 23:00:08.281228 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 skip
9393 23:00:08.281329 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 skip
9394 23:00:08.281445 arm64_sve-ptrace_Set_SVE_VL_2416 pass
9395 23:00:08.281546 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 skip
9396 23:00:08.281654 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 skip
9397 23:00:08.281771 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 skip
9398 23:00:08.281874 arm64_sve-ptrace_Set_SVE_VL_2432 pass
9399 23:00:08.281990 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 skip
9400 23:00:08.282110 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 skip
9401 23:00:08.282224 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 skip
9402 23:00:08.282334 arm64_sve-ptrace_Set_SVE_VL_2448 pass
9403 23:00:08.282448 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 skip
9404 23:00:08.282808 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 skip
9405 23:00:08.283118 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 skip
9406 23:00:08.283227 arm64_sve-ptrace_Set_SVE_VL_2464 pass
9407 23:00:08.283328 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 skip
9408 23:00:08.283445 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 skip
9409 23:00:08.283572 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 skip
9410 23:00:08.283677 arm64_sve-ptrace_Set_SVE_VL_2480 pass
9411 23:00:08.283796 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 skip
9412 23:00:08.283912 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 skip
9413 23:00:08.284016 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 skip
9414 23:00:08.284128 arm64_sve-ptrace_Set_SVE_VL_2496 pass
9415 23:00:08.284429 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 skip
9416 23:00:08.284542 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 skip
9417 23:00:08.284660 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 skip
9418 23:00:08.284761 arm64_sve-ptrace_Set_SVE_VL_2512 pass
9419 23:00:08.284877 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 skip
9420 23:00:08.284982 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 skip
9421 23:00:08.285098 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 skip
9422 23:00:08.285214 arm64_sve-ptrace_Set_SVE_VL_2528 pass
9423 23:00:08.285326 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 skip
9424 23:00:08.285640 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 skip
9425 23:00:08.285754 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 skip
9426 23:00:08.285871 arm64_sve-ptrace_Set_SVE_VL_2544 pass
9427 23:00:08.285988 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 skip
9428 23:00:08.286298 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 skip
9429 23:00:08.286405 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 skip
9430 23:00:08.286500 arm64_sve-ptrace_Set_SVE_VL_2560 pass
9431 23:00:08.286609 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 skip
9432 23:00:08.290742 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 skip
9433 23:00:08.291071 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 skip
9434 23:00:08.291174 arm64_sve-ptrace_Set_SVE_VL_2576 pass
9435 23:00:08.291268 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 skip
9436 23:00:08.291379 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 skip
9437 23:00:08.291486 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 skip
9438 23:00:08.291596 arm64_sve-ptrace_Set_SVE_VL_2592 pass
9439 23:00:08.291706 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 skip
9440 23:00:08.291815 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 skip
9441 23:00:08.292111 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 skip
9442 23:00:08.292203 arm64_sve-ptrace_Set_SVE_VL_2608 pass
9443 23:00:08.292310 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 skip
9444 23:00:08.292419 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 skip
9445 23:00:08.292717 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 skip
9446 23:00:08.292818 arm64_sve-ptrace_Set_SVE_VL_2624 pass
9447 23:00:08.292911 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 skip
9448 23:00:08.293018 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 skip
9449 23:00:08.293132 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 skip
9450 23:00:08.293231 arm64_sve-ptrace_Set_SVE_VL_2640 pass
9451 23:00:08.293345 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 skip
9452 23:00:08.293459 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 skip
9453 23:00:08.293574 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 skip
9454 23:00:08.293689 arm64_sve-ptrace_Set_SVE_VL_2656 pass
9455 23:00:08.293804 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 skip
9456 23:00:08.294111 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 skip
9457 23:00:08.294215 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 skip
9458 23:00:08.294339 arm64_sve-ptrace_Set_SVE_VL_2672 pass
9459 23:00:08.294453 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 skip
9460 23:00:08.294552 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 skip
9461 23:00:08.298919 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 skip
9462 23:00:08.299054 arm64_sve-ptrace_Set_SVE_VL_2688 pass
9463 23:00:08.299157 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 skip
9464 23:00:08.299276 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 skip
9465 23:00:08.299379 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 skip
9466 23:00:08.299480 arm64_sve-ptrace_Set_SVE_VL_2704 pass
9467 23:00:08.299594 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 skip
9468 23:00:08.299693 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 skip
9469 23:00:08.299809 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 skip
9470 23:00:08.299901 arm64_sve-ptrace_Set_SVE_VL_2720 pass
9471 23:00:08.300003 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 skip
9472 23:00:08.300119 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 skip
9473 23:00:08.300217 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 skip
9474 23:00:08.300309 arm64_sve-ptrace_Set_SVE_VL_2736 pass
9475 23:00:08.300405 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 skip
9476 23:00:08.300520 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 skip
9477 23:00:08.300617 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 skip
9478 23:00:08.300713 arm64_sve-ptrace_Set_SVE_VL_2752 pass
9479 23:00:08.300809 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 skip
9480 23:00:08.300923 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 skip
9481 23:00:08.301027 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 skip
9482 23:00:08.301124 arm64_sve-ptrace_Set_SVE_VL_2768 pass
9483 23:00:08.301214 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 skip
9484 23:00:08.301327 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 skip
9485 23:00:08.301418 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 skip
9486 23:00:08.301512 arm64_sve-ptrace_Set_SVE_VL_2784 pass
9487 23:00:08.301609 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 skip
9488 23:00:08.301716 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 skip
9489 23:00:08.301830 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 skip
9490 23:00:08.301929 arm64_sve-ptrace_Set_SVE_VL_2800 pass
9491 23:00:08.302030 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 skip
9492 23:00:08.302127 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 skip
9493 23:00:08.302219 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 skip
9494 23:00:08.302314 arm64_sve-ptrace_Set_SVE_VL_2816 pass
9495 23:00:08.302411 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 skip
9496 23:00:08.302526 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 skip
9497 23:00:08.302622 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 skip
9498 23:00:08.302717 arm64_sve-ptrace_Set_SVE_VL_2832 pass
9499 23:00:08.303005 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 skip
9500 23:00:08.303087 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 skip
9501 23:00:08.303150 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 skip
9502 23:00:08.303209 arm64_sve-ptrace_Set_SVE_VL_2848 pass
9503 23:00:08.306781 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 skip
9504 23:00:08.306878 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 skip
9505 23:00:08.307123 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 skip
9506 23:00:08.307190 arm64_sve-ptrace_Set_SVE_VL_2864 pass
9507 23:00:08.307272 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 skip
9508 23:00:08.307357 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 skip
9509 23:00:08.307439 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 skip
9510 23:00:08.307537 arm64_sve-ptrace_Set_SVE_VL_2880 pass
9511 23:00:08.307622 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 skip
9512 23:00:08.307705 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 skip
9513 23:00:08.307994 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 skip
9514 23:00:08.308086 arm64_sve-ptrace_Set_SVE_VL_2896 pass
9515 23:00:08.308170 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 skip
9516 23:00:08.308252 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 skip
9517 23:00:08.308351 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 skip
9518 23:00:08.308441 arm64_sve-ptrace_Set_SVE_VL_2912 pass
9519 23:00:08.308527 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 skip
9520 23:00:08.308626 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 skip
9521 23:00:08.308715 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 skip
9522 23:00:08.308802 arm64_sve-ptrace_Set_SVE_VL_2928 pass
9523 23:00:08.308902 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 skip
9524 23:00:08.308987 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 skip
9525 23:00:08.309080 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 skip
9526 23:00:08.309164 arm64_sve-ptrace_Set_SVE_VL_2944 pass
9527 23:00:08.309264 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 skip
9528 23:00:08.309350 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 skip
9529 23:00:08.309461 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 skip
9530 23:00:08.309550 arm64_sve-ptrace_Set_SVE_VL_2960 pass
9531 23:00:08.309636 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 skip
9532 23:00:08.309747 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 skip
9533 23:00:08.309830 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 skip
9534 23:00:08.309912 arm64_sve-ptrace_Set_SVE_VL_2976 pass
9535 23:00:08.310010 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 skip
9536 23:00:08.310100 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 skip
9537 23:00:08.310182 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 skip
9538 23:00:08.310265 arm64_sve-ptrace_Set_SVE_VL_2992 pass
9539 23:00:08.310379 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 skip
9540 23:00:08.310459 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 skip
9541 23:00:08.310536 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 skip
9542 23:00:08.310611 arm64_sve-ptrace_Set_SVE_VL_3008 pass
9543 23:00:08.310699 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 skip
9544 23:00:08.315085 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 skip
9545 23:00:08.315239 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 skip
9546 23:00:08.315308 arm64_sve-ptrace_Set_SVE_VL_3024 pass
9547 23:00:08.340864 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 skip
9548 23:00:08.341336 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 skip
9549 23:00:08.341449 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 skip
9550 23:00:08.341552 arm64_sve-ptrace_Set_SVE_VL_3040 pass
9551 23:00:08.341662 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 skip
9552 23:00:08.341755 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 skip
9553 23:00:08.341849 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 skip
9554 23:00:08.341963 arm64_sve-ptrace_Set_SVE_VL_3056 pass
9555 23:00:08.342053 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 skip
9556 23:00:08.342139 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 skip
9557 23:00:08.342234 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 skip
9558 23:00:08.342331 arm64_sve-ptrace_Set_SVE_VL_3072 pass
9559 23:00:08.342453 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 skip
9560 23:00:08.342559 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 skip
9561 23:00:08.342652 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 skip
9562 23:00:08.342752 arm64_sve-ptrace_Set_SVE_VL_3088 pass
9563 23:00:08.342862 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 skip
9564 23:00:08.342973 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 skip
9565 23:00:08.343081 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 skip
9566 23:00:08.343185 arm64_sve-ptrace_Set_SVE_VL_3104 pass
9567 23:00:08.343285 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 skip
9568 23:00:08.343623 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 skip
9569 23:00:08.343782 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 skip
9570 23:00:08.343875 arm64_sve-ptrace_Set_SVE_VL_3120 pass
9571 23:00:08.343978 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 skip
9572 23:00:08.344082 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 skip
9573 23:00:08.344409 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 skip
9574 23:00:08.344519 arm64_sve-ptrace_Set_SVE_VL_3136 pass
9575 23:00:08.345574 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 skip
9576 23:00:08.345695 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 skip
9577 23:00:08.345778 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 skip
9578 23:00:08.345856 arm64_sve-ptrace_Set_SVE_VL_3152 pass
9579 23:00:08.345932 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 skip
9580 23:00:08.346008 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 skip
9581 23:00:08.346085 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 skip
9582 23:00:08.346170 arm64_sve-ptrace_Set_SVE_VL_3168 pass
9583 23:00:08.346246 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 skip
9584 23:00:08.346327 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 skip
9585 23:00:08.346403 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 skip
9586 23:00:08.346479 arm64_sve-ptrace_Set_SVE_VL_3184 pass
9587 23:00:08.346763 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 skip
9588 23:00:08.346898 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 skip
9589 23:00:08.347030 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 skip
9590 23:00:08.347159 arm64_sve-ptrace_Set_SVE_VL_3200 pass
9591 23:00:08.347292 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 skip
9592 23:00:08.347426 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 skip
9593 23:00:08.350832 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 skip
9594 23:00:08.351167 arm64_sve-ptrace_Set_SVE_VL_3216 pass
9595 23:00:08.351270 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 skip
9596 23:00:08.351364 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 skip
9597 23:00:08.351478 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 skip
9598 23:00:08.351589 arm64_sve-ptrace_Set_SVE_VL_3232 pass
9599 23:00:08.351684 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 skip
9600 23:00:08.351792 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 skip
9601 23:00:08.351900 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 skip
9602 23:00:08.351994 arm64_sve-ptrace_Set_SVE_VL_3248 pass
9603 23:00:08.352101 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 skip
9604 23:00:08.352210 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 skip
9605 23:00:08.352330 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 skip
9606 23:00:08.352450 arm64_sve-ptrace_Set_SVE_VL_3264 pass
9607 23:00:08.352566 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 skip
9608 23:00:08.352875 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 skip
9609 23:00:08.353176 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 skip
9610 23:00:08.353281 arm64_sve-ptrace_Set_SVE_VL_3280 pass
9611 23:00:08.353385 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 skip
9612 23:00:08.353480 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 skip
9613 23:00:08.353598 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 skip
9614 23:00:08.353710 arm64_sve-ptrace_Set_SVE_VL_3296 pass
9615 23:00:08.353822 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 skip
9616 23:00:08.353930 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 skip
9617 23:00:08.354232 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 skip
9618 23:00:08.354328 arm64_sve-ptrace_Set_SVE_VL_3312 pass
9619 23:00:08.354431 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 skip
9620 23:00:08.354517 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 skip
9621 23:00:08.358860 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 skip
9622 23:00:08.359326 arm64_sve-ptrace_Set_SVE_VL_3328 pass
9623 23:00:08.359430 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 skip
9624 23:00:08.359519 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 skip
9625 23:00:08.359613 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 skip
9626 23:00:08.359700 arm64_sve-ptrace_Set_SVE_VL_3344 pass
9627 23:00:08.359810 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 skip
9628 23:00:08.359899 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 skip
9629 23:00:08.360186 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 skip
9630 23:00:08.360282 arm64_sve-ptrace_Set_SVE_VL_3360 pass
9631 23:00:08.360367 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 skip
9632 23:00:08.360456 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 skip
9633 23:00:08.360565 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 skip
9634 23:00:08.360653 arm64_sve-ptrace_Set_SVE_VL_3376 pass
9635 23:00:08.360744 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 skip
9636 23:00:08.360827 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 skip
9637 23:00:08.360922 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 skip
9638 23:00:08.361001 arm64_sve-ptrace_Set_SVE_VL_3392 pass
9639 23:00:08.361081 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 skip
9640 23:00:08.361159 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 skip
9641 23:00:08.361257 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 skip
9642 23:00:08.361342 arm64_sve-ptrace_Set_SVE_VL_3408 pass
9643 23:00:08.361426 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 skip
9644 23:00:08.361505 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 skip
9645 23:00:08.361611 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 skip
9646 23:00:08.361724 arm64_sve-ptrace_Set_SVE_VL_3424 pass
9647 23:00:08.361812 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 skip
9648 23:00:08.361903 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 skip
9649 23:00:08.362011 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 skip
9650 23:00:08.362104 arm64_sve-ptrace_Set_SVE_VL_3440 pass
9651 23:00:08.362194 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 skip
9652 23:00:08.362278 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 skip
9653 23:00:08.362389 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 skip
9654 23:00:08.362477 arm64_sve-ptrace_Set_SVE_VL_3456 pass
9655 23:00:08.362570 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 skip
9656 23:00:08.362675 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 skip
9657 23:00:08.362767 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 skip
9658 23:00:08.362856 arm64_sve-ptrace_Set_SVE_VL_3472 pass
9659 23:00:08.366908 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 skip
9660 23:00:08.367077 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 skip
9661 23:00:08.367373 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 skip
9662 23:00:08.367472 arm64_sve-ptrace_Set_SVE_VL_3488 pass
9663 23:00:08.367548 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 skip
9664 23:00:08.367619 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 skip
9665 23:00:08.367696 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 skip
9666 23:00:08.367780 arm64_sve-ptrace_Set_SVE_VL_3504 pass
9667 23:00:08.367883 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 skip
9668 23:00:08.367969 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 skip
9669 23:00:08.368052 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 skip
9670 23:00:08.368135 arm64_sve-ptrace_Set_SVE_VL_3520 pass
9671 23:00:08.368235 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 skip
9672 23:00:08.368321 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 skip
9673 23:00:08.368404 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 skip
9674 23:00:08.368485 arm64_sve-ptrace_Set_SVE_VL_3536 pass
9675 23:00:08.368583 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 skip
9676 23:00:08.368667 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 skip
9677 23:00:08.368767 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 skip
9678 23:00:08.368851 arm64_sve-ptrace_Set_SVE_VL_3552 pass
9679 23:00:08.368933 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 skip
9680 23:00:08.369035 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 skip
9681 23:00:08.369127 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 skip
9682 23:00:08.369211 arm64_sve-ptrace_Set_SVE_VL_3568 pass
9683 23:00:08.369312 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 skip
9684 23:00:08.369399 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 skip
9685 23:00:08.369482 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 skip
9686 23:00:08.369581 arm64_sve-ptrace_Set_SVE_VL_3584 pass
9687 23:00:08.369694 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 skip
9688 23:00:08.369781 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 skip
9689 23:00:08.369880 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 skip
9690 23:00:08.369966 arm64_sve-ptrace_Set_SVE_VL_3600 pass
9691 23:00:08.370257 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 skip
9692 23:00:08.370359 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 skip
9693 23:00:08.370447 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 skip
9694 23:00:08.370530 arm64_sve-ptrace_Set_SVE_VL_3616 pass
9695 23:00:08.370613 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 skip
9696 23:00:08.370713 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 skip
9697 23:00:08.370799 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 skip
9698 23:00:08.374774 arm64_sve-ptrace_Set_SVE_VL_3632 pass
9699 23:00:08.375144 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 skip
9700 23:00:08.375241 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 skip
9701 23:00:08.375330 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 skip
9702 23:00:08.375757 arm64_sve-ptrace_Set_SVE_VL_3648 pass
9703 23:00:08.375860 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 skip
9704 23:00:08.375949 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 skip
9705 23:00:08.376033 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 skip
9706 23:00:08.376120 arm64_sve-ptrace_Set_SVE_VL_3664 pass
9707 23:00:08.400262 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 skip
9708 23:00:08.400512 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 skip
9709 23:00:08.400823 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 skip
9710 23:00:08.400923 arm64_sve-ptrace_Set_SVE_VL_3680 pass
9711 23:00:08.401013 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 skip
9712 23:00:08.401098 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 skip
9713 23:00:08.401199 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 skip
9714 23:00:08.401287 arm64_sve-ptrace_Set_SVE_VL_3696 pass
9715 23:00:08.401374 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 skip
9716 23:00:08.401460 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 skip
9717 23:00:08.401559 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 skip
9718 23:00:08.401645 arm64_sve-ptrace_Set_SVE_VL_3712 pass
9719 23:00:08.401741 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 skip
9720 23:00:08.401842 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 skip
9721 23:00:08.401928 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 skip
9722 23:00:08.402029 arm64_sve-ptrace_Set_SVE_VL_3728 pass
9723 23:00:08.402325 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 skip
9724 23:00:08.402417 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 skip
9725 23:00:08.402518 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 skip
9726 23:00:08.402847 arm64_sve-ptrace_Set_SVE_VL_3744 pass
9727 23:00:08.403155 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 skip
9728 23:00:08.403264 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 skip
9729 23:00:08.403366 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 skip
9730 23:00:08.403670 arm64_sve-ptrace_Set_SVE_VL_3760 pass
9731 23:00:08.403784 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 skip
9732 23:00:08.403906 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 skip
9733 23:00:08.404017 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 skip
9734 23:00:08.404133 arm64_sve-ptrace_Set_SVE_VL_3776 pass
9735 23:00:08.404223 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 skip
9736 23:00:08.404337 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 skip
9737 23:00:08.404434 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 skip
9738 23:00:08.404553 arm64_sve-ptrace_Set_SVE_VL_3792 pass
9739 23:00:08.404646 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 skip
9740 23:00:08.404746 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 skip
9741 23:00:08.404846 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 skip
9742 23:00:08.404944 arm64_sve-ptrace_Set_SVE_VL_3808 pass
9743 23:00:08.405236 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 skip
9744 23:00:08.405326 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 skip
9745 23:00:08.405412 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 skip
9746 23:00:08.405490 arm64_sve-ptrace_Set_SVE_VL_3824 pass
9747 23:00:08.405574 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 skip
9748 23:00:08.405707 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 skip
9749 23:00:08.406041 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 skip
9750 23:00:08.406133 arm64_sve-ptrace_Set_SVE_VL_3840 pass
9751 23:00:08.406209 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 skip
9752 23:00:08.406304 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 skip
9753 23:00:08.406393 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 skip
9754 23:00:08.406490 arm64_sve-ptrace_Set_SVE_VL_3856 pass
9755 23:00:08.410821 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 skip
9756 23:00:08.411130 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 skip
9757 23:00:08.411234 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 skip
9758 23:00:08.411347 arm64_sve-ptrace_Set_SVE_VL_3872 pass
9759 23:00:08.411472 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 skip
9760 23:00:08.411577 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 skip
9761 23:00:08.411678 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 skip
9762 23:00:08.411774 arm64_sve-ptrace_Set_SVE_VL_3888 pass
9763 23:00:08.412066 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 skip
9764 23:00:08.412366 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 skip
9765 23:00:08.412449 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 skip
9766 23:00:08.412544 arm64_sve-ptrace_Set_SVE_VL_3904 pass
9767 23:00:08.412628 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 skip
9768 23:00:08.412719 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 skip
9769 23:00:08.412812 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 skip
9770 23:00:08.412897 arm64_sve-ptrace_Set_SVE_VL_3920 pass
9771 23:00:08.413187 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 skip
9772 23:00:08.413294 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 skip
9773 23:00:08.413395 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 skip
9774 23:00:08.413495 arm64_sve-ptrace_Set_SVE_VL_3936 pass
9775 23:00:08.413799 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 skip
9776 23:00:08.413893 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 skip
9777 23:00:08.413989 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 skip
9778 23:00:08.414087 arm64_sve-ptrace_Set_SVE_VL_3952 pass
9779 23:00:08.414326 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 skip
9780 23:00:08.414432 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 skip
9781 23:00:08.418857 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 skip
9782 23:00:08.418961 arm64_sve-ptrace_Set_SVE_VL_3968 pass
9783 23:00:08.419242 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 skip
9784 23:00:08.419331 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 skip
9785 23:00:08.419427 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 skip
9786 23:00:08.419551 arm64_sve-ptrace_Set_SVE_VL_3984 pass
9787 23:00:08.419659 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 skip
9788 23:00:08.419784 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 skip
9789 23:00:08.419879 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 skip
9790 23:00:08.419980 arm64_sve-ptrace_Set_SVE_VL_4000 pass
9791 23:00:08.420079 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 skip
9792 23:00:08.420406 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 skip
9793 23:00:08.420506 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 skip
9794 23:00:08.420593 arm64_sve-ptrace_Set_SVE_VL_4016 pass
9795 23:00:08.420693 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 skip
9796 23:00:08.420779 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 skip
9797 23:00:08.420879 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 skip
9798 23:00:08.420965 arm64_sve-ptrace_Set_SVE_VL_4032 pass
9799 23:00:08.421063 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 skip
9800 23:00:08.421383 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 skip
9801 23:00:08.421508 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 skip
9802 23:00:08.421621 arm64_sve-ptrace_Set_SVE_VL_4048 pass
9803 23:00:08.421715 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 skip
9804 23:00:08.421815 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 skip
9805 23:00:08.422113 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 skip
9806 23:00:08.422233 arm64_sve-ptrace_Set_SVE_VL_4064 pass
9807 23:00:08.422320 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 skip
9808 23:00:08.422457 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 skip
9809 23:00:08.430687 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 skip
9810 23:00:08.431069 arm64_sve-ptrace_Set_SVE_VL_4080 pass
9811 23:00:08.431154 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 skip
9812 23:00:08.431249 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 skip
9813 23:00:08.431374 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 skip
9814 23:00:08.431476 arm64_sve-ptrace_Set_SVE_VL_4096 pass
9815 23:00:08.431566 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 skip
9816 23:00:08.431673 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 skip
9817 23:00:08.431746 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 skip
9818 23:00:08.431811 arm64_sve-ptrace_Set_SVE_VL_4112 pass
9819 23:00:08.431902 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 skip
9820 23:00:08.432000 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 skip
9821 23:00:08.432105 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 skip
9822 23:00:08.432205 arm64_sve-ptrace_Set_SVE_VL_4128 pass
9823 23:00:08.432489 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 skip
9824 23:00:08.432570 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 skip
9825 23:00:08.432653 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 skip
9826 23:00:08.432743 arm64_sve-ptrace_Set_SVE_VL_4144 pass
9827 23:00:08.433026 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 skip
9828 23:00:08.433141 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 skip
9829 23:00:08.433249 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 skip
9830 23:00:08.433362 arm64_sve-ptrace_Set_SVE_VL_4160 pass
9831 23:00:08.433669 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 skip
9832 23:00:08.433778 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 skip
9833 23:00:08.433903 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 skip
9834 23:00:08.434017 arm64_sve-ptrace_Set_SVE_VL_4176 pass
9835 23:00:08.434133 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 skip
9836 23:00:08.434275 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 skip
9837 23:00:08.434568 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 skip
9838 23:00:08.438732 arm64_sve-ptrace_Set_SVE_VL_4192 pass
9839 23:00:08.439047 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 skip
9840 23:00:08.439161 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 skip
9841 23:00:08.439283 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 skip
9842 23:00:08.439388 arm64_sve-ptrace_Set_SVE_VL_4208 pass
9843 23:00:08.439515 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 skip
9844 23:00:08.439615 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 skip
9845 23:00:08.439726 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 skip
9846 23:00:08.439859 arm64_sve-ptrace_Set_SVE_VL_4224 pass
9847 23:00:08.440167 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 skip
9848 23:00:08.440273 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 skip
9849 23:00:08.440377 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 skip
9850 23:00:08.440480 arm64_sve-ptrace_Set_SVE_VL_4240 pass
9851 23:00:08.440577 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 skip
9852 23:00:08.440878 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 skip
9853 23:00:08.441010 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 skip
9854 23:00:08.441125 arm64_sve-ptrace_Set_SVE_VL_4256 pass
9855 23:00:08.441256 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 skip
9856 23:00:08.441383 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 skip
9857 23:00:08.441551 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 skip
9858 23:00:08.441675 arm64_sve-ptrace_Set_SVE_VL_4272 pass
9859 23:00:08.441774 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 skip
9860 23:00:08.442074 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 skip
9861 23:00:08.442167 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 skip
9862 23:00:08.442273 arm64_sve-ptrace_Set_SVE_VL_4288 pass
9863 23:00:08.442395 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 skip
9864 23:00:08.446828 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 skip
9865 23:00:08.447223 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 skip
9866 23:00:08.447312 arm64_sve-ptrace_Set_SVE_VL_4304 pass
9867 23:00:08.463269 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 skip
9868 23:00:08.463703 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 skip
9869 23:00:08.463802 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 skip
9870 23:00:08.463884 arm64_sve-ptrace_Set_SVE_VL_4320 pass
9871 23:00:08.463958 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 skip
9872 23:00:08.464033 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 skip
9873 23:00:08.464110 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 skip
9874 23:00:08.464185 arm64_sve-ptrace_Set_SVE_VL_4336 pass
9875 23:00:08.464288 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 skip
9876 23:00:08.464390 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 skip
9877 23:00:08.464501 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 skip
9878 23:00:08.464604 arm64_sve-ptrace_Set_SVE_VL_4352 pass
9879 23:00:08.464695 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 skip
9880 23:00:08.465006 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 skip
9881 23:00:08.465093 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 skip
9882 23:00:08.465175 arm64_sve-ptrace_Set_SVE_VL_4368 pass
9883 23:00:08.465252 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 skip
9884 23:00:08.465525 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 skip
9885 23:00:08.465605 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 skip
9886 23:00:08.465690 arm64_sve-ptrace_Set_SVE_VL_4384 pass
9887 23:00:08.465945 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 skip
9888 23:00:08.466012 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 skip
9889 23:00:08.466086 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 skip
9890 23:00:08.466159 arm64_sve-ptrace_Set_SVE_VL_4400 pass
9891 23:00:08.466249 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 skip
9892 23:00:08.466340 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 skip
9893 23:00:08.466634 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 skip
9894 23:00:08.470821 arm64_sve-ptrace_Set_SVE_VL_4416 pass
9895 23:00:08.471262 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 skip
9896 23:00:08.471358 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 skip
9897 23:00:08.471472 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 skip
9898 23:00:08.471603 arm64_sve-ptrace_Set_SVE_VL_4432 pass
9899 23:00:08.471709 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 skip
9900 23:00:08.471813 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 skip
9901 23:00:08.471940 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 skip
9902 23:00:08.472043 arm64_sve-ptrace_Set_SVE_VL_4448 pass
9903 23:00:08.472166 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 skip
9904 23:00:08.472258 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 skip
9905 23:00:08.472355 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 skip
9906 23:00:08.472454 arm64_sve-ptrace_Set_SVE_VL_4464 pass
9907 23:00:08.472749 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 skip
9908 23:00:08.472848 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 skip
9909 23:00:08.472967 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 skip
9910 23:00:08.473084 arm64_sve-ptrace_Set_SVE_VL_4480 pass
9911 23:00:08.473209 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 skip
9912 23:00:08.473524 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 skip
9913 23:00:08.473832 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 skip
9914 23:00:08.473938 arm64_sve-ptrace_Set_SVE_VL_4496 pass
9915 23:00:08.474040 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 skip
9916 23:00:08.474126 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 skip
9917 23:00:08.474224 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 skip
9918 23:00:08.474330 arm64_sve-ptrace_Set_SVE_VL_4512 pass
9919 23:00:08.474630 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 skip
9920 23:00:08.478778 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 skip
9921 23:00:08.479104 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 skip
9922 23:00:08.479184 arm64_sve-ptrace_Set_SVE_VL_4528 pass
9923 23:00:08.479260 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 skip
9924 23:00:08.479375 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 skip
9925 23:00:08.479504 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 skip
9926 23:00:08.479809 arm64_sve-ptrace_Set_SVE_VL_4544 pass
9927 23:00:08.479916 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 skip
9928 23:00:08.480221 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 skip
9929 23:00:08.480328 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 skip
9930 23:00:08.480679 arm64_sve-ptrace_Set_SVE_VL_4560 pass
9931 23:00:08.480781 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 skip
9932 23:00:08.480868 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 skip
9933 23:00:08.480970 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 skip
9934 23:00:08.481058 arm64_sve-ptrace_Set_SVE_VL_4576 pass
9935 23:00:08.481158 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 skip
9936 23:00:08.481455 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 skip
9937 23:00:08.481560 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 skip
9938 23:00:08.481671 arm64_sve-ptrace_Set_SVE_VL_4592 pass
9939 23:00:08.482161 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 skip
9940 23:00:08.482436 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 skip
9941 23:00:08.482613 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 skip
9942 23:00:08.482910 arm64_sve-ptrace_Set_SVE_VL_4608 pass
9943 23:00:08.483011 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 skip
9944 23:00:08.483098 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 skip
9945 23:00:08.483181 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 skip
9946 23:00:08.486913 arm64_sve-ptrace_Set_SVE_VL_4624 pass
9947 23:00:08.487357 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 skip
9948 23:00:08.487461 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 skip
9949 23:00:08.487566 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 skip
9950 23:00:08.487669 arm64_sve-ptrace_Set_SVE_VL_4640 pass
9951 23:00:08.487769 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 skip
9952 23:00:08.487873 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 skip
9953 23:00:08.488240 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 skip
9954 23:00:08.488346 arm64_sve-ptrace_Set_SVE_VL_4656 pass
9955 23:00:08.488451 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 skip
9956 23:00:08.488554 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 skip
9957 23:00:08.488657 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 skip
9958 23:00:08.488759 arm64_sve-ptrace_Set_SVE_VL_4672 pass
9959 23:00:08.489058 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 skip
9960 23:00:08.489163 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 skip
9961 23:00:08.489268 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 skip
9962 23:00:08.489632 arm64_sve-ptrace_Set_SVE_VL_4688 pass
9963 23:00:08.489752 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 skip
9964 23:00:08.489838 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 skip
9965 23:00:08.490122 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 skip
9966 23:00:08.490225 arm64_sve-ptrace_Set_SVE_VL_4704 pass
9967 23:00:08.490312 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 skip
9968 23:00:08.490394 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 skip
9969 23:00:08.490494 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 skip
9970 23:00:08.490578 arm64_sve-ptrace_Set_SVE_VL_4720 pass
9971 23:00:08.494895 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 skip
9972 23:00:08.495291 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 skip
9973 23:00:08.495390 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 skip
9974 23:00:08.495478 arm64_sve-ptrace_Set_SVE_VL_4736 pass
9975 23:00:08.495561 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 skip
9976 23:00:08.495644 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 skip
9977 23:00:08.495745 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 skip
9978 23:00:08.495832 arm64_sve-ptrace_Set_SVE_VL_4752 pass
9979 23:00:08.495915 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 skip
9980 23:00:08.496015 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 skip
9981 23:00:08.497846 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 skip
9982 23:00:08.497957 arm64_sve-ptrace_Set_SVE_VL_4768 pass
9983 23:00:08.498048 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 skip
9984 23:00:08.498135 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 skip
9985 23:00:08.498219 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 skip
9986 23:00:08.498301 arm64_sve-ptrace_Set_SVE_VL_4784 pass
9987 23:00:08.498394 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 skip
9988 23:00:08.498480 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 skip
9989 23:00:08.498563 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 skip
9990 23:00:08.498647 arm64_sve-ptrace_Set_SVE_VL_4800 pass
9991 23:00:08.498733 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 skip
9992 23:00:08.498818 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 skip
9993 23:00:08.498905 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 skip
9994 23:00:08.498990 arm64_sve-ptrace_Set_SVE_VL_4816 pass
9995 23:00:08.499075 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 skip
9996 23:00:08.499161 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 skip
9997 23:00:08.499246 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 skip
9998 23:00:08.499331 arm64_sve-ptrace_Set_SVE_VL_4832 pass
9999 23:00:08.499421 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 skip
10000 23:00:08.499508 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 skip
10001 23:00:08.499803 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 skip
10002 23:00:08.499906 arm64_sve-ptrace_Set_SVE_VL_4848 pass
10003 23:00:08.499991 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 skip
10004 23:00:08.500077 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 skip
10005 23:00:08.500163 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 skip
10006 23:00:08.502880 arm64_sve-ptrace_Set_SVE_VL_4864 pass
10007 23:00:08.502986 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 skip
10008 23:00:08.503091 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 skip
10009 23:00:08.503177 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 skip
10010 23:00:08.503278 arm64_sve-ptrace_Set_SVE_VL_4880 pass
10011 23:00:08.503384 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 skip
10012 23:00:08.503684 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 skip
10013 23:00:08.503788 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 skip
10014 23:00:08.503892 arm64_sve-ptrace_Set_SVE_VL_4896 pass
10015 23:00:08.503982 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 skip
10016 23:00:08.504084 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 skip
10017 23:00:08.504171 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 skip
10018 23:00:08.504273 arm64_sve-ptrace_Set_SVE_VL_4912 pass
10019 23:00:08.504364 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 skip
10020 23:00:08.504449 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 skip
10021 23:00:08.504548 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 skip
10022 23:00:08.504634 arm64_sve-ptrace_Set_SVE_VL_4928 pass
10023 23:00:08.504733 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 skip
10024 23:00:08.504814 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 skip
10025 23:00:08.504908 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 skip
10026 23:00:08.504993 arm64_sve-ptrace_Set_SVE_VL_4944 pass
10027 23:00:08.523964 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 skip
10028 23:00:08.524206 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 skip
10029 23:00:08.524512 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 skip
10030 23:00:08.524607 arm64_sve-ptrace_Set_SVE_VL_4960 pass
10031 23:00:08.524697 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 skip
10032 23:00:08.524783 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 skip
10033 23:00:08.524869 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 skip
10034 23:00:08.524955 arm64_sve-ptrace_Set_SVE_VL_4976 pass
10035 23:00:08.525042 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 skip
10036 23:00:08.525147 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 skip
10037 23:00:08.525236 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 skip
10038 23:00:08.525323 arm64_sve-ptrace_Set_SVE_VL_4992 pass
10039 23:00:08.525409 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 skip
10040 23:00:08.525495 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 skip
10041 23:00:08.525580 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 skip
10042 23:00:08.525673 arm64_sve-ptrace_Set_SVE_VL_5008 pass
10043 23:00:08.525779 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 skip
10044 23:00:08.525867 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 skip
10045 23:00:08.525954 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 skip
10046 23:00:08.526039 arm64_sve-ptrace_Set_SVE_VL_5024 pass
10047 23:00:08.526124 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 skip
10048 23:00:08.526210 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 skip
10049 23:00:08.526315 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 skip
10050 23:00:08.526405 arm64_sve-ptrace_Set_SVE_VL_5040 pass
10051 23:00:08.526493 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 skip
10052 23:00:08.526576 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 skip
10053 23:00:08.526659 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 skip
10054 23:00:08.526759 arm64_sve-ptrace_Set_SVE_VL_5056 pass
10055 23:00:08.530661 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 skip
10056 23:00:08.531028 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 skip
10057 23:00:08.531136 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 skip
10058 23:00:08.531229 arm64_sve-ptrace_Set_SVE_VL_5072 pass
10059 23:00:08.531336 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 skip
10060 23:00:08.531425 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 skip
10061 23:00:08.531527 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 skip
10062 23:00:08.531629 arm64_sve-ptrace_Set_SVE_VL_5088 pass
10063 23:00:08.531730 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 skip
10064 23:00:08.532082 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 skip
10065 23:00:08.532202 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 skip
10066 23:00:08.532292 arm64_sve-ptrace_Set_SVE_VL_5104 pass
10067 23:00:08.532394 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 skip
10068 23:00:08.532698 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 skip
10069 23:00:08.532814 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 skip
10070 23:00:08.532913 arm64_sve-ptrace_Set_SVE_VL_5120 pass
10071 23:00:08.533009 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 skip
10072 23:00:08.533302 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 skip
10073 23:00:08.533404 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 skip
10074 23:00:08.533507 arm64_sve-ptrace_Set_SVE_VL_5136 pass
10075 23:00:08.533604 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 skip
10076 23:00:08.533811 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 skip
10077 23:00:08.533930 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 skip
10078 23:00:08.534033 arm64_sve-ptrace_Set_SVE_VL_5152 pass
10079 23:00:08.534368 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 skip
10080 23:00:08.534499 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 skip
10081 23:00:08.538666 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 skip
10082 23:00:08.539016 arm64_sve-ptrace_Set_SVE_VL_5168 pass
10083 23:00:08.539121 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 skip
10084 23:00:08.539247 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 skip
10085 23:00:08.539341 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 skip
10086 23:00:08.539441 arm64_sve-ptrace_Set_SVE_VL_5184 pass
10087 23:00:08.539542 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 skip
10088 23:00:08.539854 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 skip
10089 23:00:08.539967 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 skip
10090 23:00:08.540061 arm64_sve-ptrace_Set_SVE_VL_5200 pass
10091 23:00:08.540152 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 skip
10092 23:00:08.540260 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 skip
10093 23:00:08.540571 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 skip
10094 23:00:08.540670 arm64_sve-ptrace_Set_SVE_VL_5216 pass
10095 23:00:08.540797 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 skip
10096 23:00:08.540903 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 skip
10097 23:00:08.541005 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 skip
10098 23:00:08.541099 arm64_sve-ptrace_Set_SVE_VL_5232 pass
10099 23:00:08.541402 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 skip
10100 23:00:08.541503 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 skip
10101 23:00:08.541597 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 skip
10102 23:00:08.541689 arm64_sve-ptrace_Set_SVE_VL_5248 pass
10103 23:00:08.541777 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 skip
10104 23:00:08.541875 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 skip
10105 23:00:08.542204 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 skip
10106 23:00:08.542308 arm64_sve-ptrace_Set_SVE_VL_5264 pass
10107 23:00:08.542405 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 skip
10108 23:00:08.542483 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 skip
10109 23:00:08.546813 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 skip
10110 23:00:08.546931 arm64_sve-ptrace_Set_SVE_VL_5280 pass
10111 23:00:08.547051 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 skip
10112 23:00:08.547170 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 skip
10113 23:00:08.547306 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 skip
10114 23:00:08.547430 arm64_sve-ptrace_Set_SVE_VL_5296 pass
10115 23:00:08.547556 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 skip
10116 23:00:08.547686 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 skip
10117 23:00:08.547836 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 skip
10118 23:00:08.547967 arm64_sve-ptrace_Set_SVE_VL_5312 pass
10119 23:00:08.548074 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 skip
10120 23:00:08.548372 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 skip
10121 23:00:08.548508 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 skip
10122 23:00:08.548611 arm64_sve-ptrace_Set_SVE_VL_5328 pass
10123 23:00:08.548707 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 skip
10124 23:00:08.549031 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 skip
10125 23:00:08.549127 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 skip
10126 23:00:08.549409 arm64_sve-ptrace_Set_SVE_VL_5344 pass
10127 23:00:08.549494 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 skip
10128 23:00:08.549558 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 skip
10129 23:00:08.549824 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 skip
10130 23:00:08.549931 arm64_sve-ptrace_Set_SVE_VL_5360 pass
10131 23:00:08.550041 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 skip
10132 23:00:08.550136 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 skip
10133 23:00:08.550259 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 skip
10134 23:00:08.550353 arm64_sve-ptrace_Set_SVE_VL_5376 pass
10135 23:00:08.550447 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 skip
10136 23:00:08.550559 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 skip
10137 23:00:08.550660 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 skip
10138 23:00:08.550767 arm64_sve-ptrace_Set_SVE_VL_5392 pass
10139 23:00:08.550856 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 skip
10140 23:00:08.550956 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 skip
10141 23:00:08.551059 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 skip
10142 23:00:08.551190 arm64_sve-ptrace_Set_SVE_VL_5408 pass
10143 23:00:08.551317 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 skip
10144 23:00:08.551448 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 skip
10145 23:00:08.551574 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 skip
10146 23:00:08.551695 arm64_sve-ptrace_Set_SVE_VL_5424 pass
10147 23:00:08.558818 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 skip
10148 23:00:08.559279 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 skip
10149 23:00:08.559373 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 skip
10150 23:00:08.559481 arm64_sve-ptrace_Set_SVE_VL_5440 pass
10151 23:00:08.559588 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 skip
10152 23:00:08.559705 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 skip
10153 23:00:08.559810 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 skip
10154 23:00:08.559895 arm64_sve-ptrace_Set_SVE_VL_5456 pass
10155 23:00:08.559994 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 skip
10156 23:00:08.560077 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 skip
10157 23:00:08.560160 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 skip
10158 23:00:08.560248 arm64_sve-ptrace_Set_SVE_VL_5472 pass
10159 23:00:08.560319 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 skip
10160 23:00:08.560431 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 skip
10161 23:00:08.560547 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 skip
10162 23:00:08.560633 arm64_sve-ptrace_Set_SVE_VL_5488 pass
10163 23:00:08.560899 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 skip
10164 23:00:08.561002 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 skip
10165 23:00:08.561087 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 skip
10166 23:00:08.561261 arm64_sve-ptrace_Set_SVE_VL_5504 pass
10167 23:00:08.561351 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 skip
10168 23:00:08.561437 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 skip
10169 23:00:08.561538 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 skip
10170 23:00:08.561624 arm64_sve-ptrace_Set_SVE_VL_5520 pass
10171 23:00:08.561830 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 skip
10172 23:00:08.561960 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 skip
10173 23:00:08.562023 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 skip
10174 23:00:08.562095 arm64_sve-ptrace_Set_SVE_VL_5536 pass
10175 23:00:08.562158 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 skip
10176 23:00:08.562229 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 skip
10177 23:00:08.562292 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 skip
10178 23:00:08.562362 arm64_sve-ptrace_Set_SVE_VL_5552 pass
10179 23:00:08.562603 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 skip
10180 23:00:08.562677 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 skip
10181 23:00:08.562920 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 skip
10182 23:00:08.562988 arm64_sve-ptrace_Set_SVE_VL_5568 pass
10183 23:00:08.563048 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 skip
10184 23:00:08.563125 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 skip
10185 23:00:08.563189 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 skip
10186 23:00:08.563263 arm64_sve-ptrace_Set_SVE_VL_5584 pass
10187 23:00:08.582597 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 skip
10188 23:00:08.582811 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 skip
10189 23:00:08.582903 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 skip
10190 23:00:08.582990 arm64_sve-ptrace_Set_SVE_VL_5600 pass
10191 23:00:08.583075 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 skip
10192 23:00:08.583160 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 skip
10193 23:00:08.583449 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 skip
10194 23:00:08.583546 arm64_sve-ptrace_Set_SVE_VL_5616 pass
10195 23:00:08.583631 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 skip
10196 23:00:08.583730 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 skip
10197 23:00:08.583814 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 skip
10198 23:00:08.583898 arm64_sve-ptrace_Set_SVE_VL_5632 pass
10199 23:00:08.584000 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 skip
10200 23:00:08.584087 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 skip
10201 23:00:08.584172 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 skip
10202 23:00:08.584273 arm64_sve-ptrace_Set_SVE_VL_5648 pass
10203 23:00:08.584360 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 skip
10204 23:00:08.584464 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 skip
10205 23:00:08.584566 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 skip
10206 23:00:08.584666 arm64_sve-ptrace_Set_SVE_VL_5664 pass
10207 23:00:08.584954 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 skip
10208 23:00:08.585047 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 skip
10209 23:00:08.585146 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 skip
10210 23:00:08.585232 arm64_sve-ptrace_Set_SVE_VL_5680 pass
10211 23:00:08.585331 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 skip
10212 23:00:08.585430 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 skip
10213 23:00:08.585530 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 skip
10214 23:00:08.585630 arm64_sve-ptrace_Set_SVE_VL_5696 pass
10215 23:00:08.585935 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 skip
10216 23:00:08.586028 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 skip
10217 23:00:08.586128 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 skip
10218 23:00:08.586230 arm64_sve-ptrace_Set_SVE_VL_5712 pass
10219 23:00:08.586329 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 skip
10220 23:00:08.586430 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 skip
10221 23:00:08.586721 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 skip
10222 23:00:08.591063 arm64_sve-ptrace_Set_SVE_VL_5728 pass
10223 23:00:08.591259 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 skip
10224 23:00:08.591563 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 skip
10225 23:00:08.591669 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 skip
10226 23:00:08.591756 arm64_sve-ptrace_Set_SVE_VL_5744 pass
10227 23:00:08.591840 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 skip
10228 23:00:08.591941 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 skip
10229 23:00:08.592027 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 skip
10230 23:00:08.592109 arm64_sve-ptrace_Set_SVE_VL_5760 pass
10231 23:00:08.592194 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 skip
10232 23:00:08.592297 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 skip
10233 23:00:08.592384 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 skip
10234 23:00:08.592484 arm64_sve-ptrace_Set_SVE_VL_5776 pass
10235 23:00:08.592589 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 skip
10236 23:00:08.592688 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 skip
10237 23:00:08.594189 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 skip
10238 23:00:08.594300 arm64_sve-ptrace_Set_SVE_VL_5792 pass
10239 23:00:08.594389 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 skip
10240 23:00:08.594480 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 skip
10241 23:00:08.594568 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 skip
10242 23:00:08.594658 arm64_sve-ptrace_Set_SVE_VL_5808 pass
10243 23:00:08.594745 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 skip
10244 23:00:08.594832 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 skip
10245 23:00:08.594919 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 skip
10246 23:00:08.595006 arm64_sve-ptrace_Set_SVE_VL_5824 pass
10247 23:00:08.595091 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 skip
10248 23:00:08.595195 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 skip
10249 23:00:08.595282 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 skip
10250 23:00:08.595365 arm64_sve-ptrace_Set_SVE_VL_5840 pass
10251 23:00:08.595449 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 skip
10252 23:00:08.595535 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 skip
10253 23:00:08.595619 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 skip
10254 23:00:08.595704 arm64_sve-ptrace_Set_SVE_VL_5856 pass
10255 23:00:08.595806 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 skip
10256 23:00:08.595893 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 skip
10257 23:00:08.595977 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 skip
10258 23:00:08.596062 arm64_sve-ptrace_Set_SVE_VL_5872 pass
10259 23:00:08.596146 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 skip
10260 23:00:08.596245 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 skip
10261 23:00:08.596331 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 skip
10262 23:00:08.596414 arm64_sve-ptrace_Set_SVE_VL_5888 pass
10263 23:00:08.596512 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 skip
10264 23:00:08.596619 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 skip
10265 23:00:08.596719 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 skip
10266 23:00:08.596818 arm64_sve-ptrace_Set_SVE_VL_5904 pass
10267 23:00:08.597108 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 skip
10268 23:00:08.597211 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 skip
10269 23:00:08.597310 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 skip
10270 23:00:08.597410 arm64_sve-ptrace_Set_SVE_VL_5920 pass
10271 23:00:08.597509 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 skip
10272 23:00:08.597614 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 skip
10273 23:00:08.597922 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 skip
10274 23:00:08.598024 arm64_sve-ptrace_Set_SVE_VL_5936 pass
10275 23:00:08.598124 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 skip
10276 23:00:08.598583 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 skip
10277 23:00:08.598675 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 skip
10278 23:00:08.598761 arm64_sve-ptrace_Set_SVE_VL_5952 pass
10279 23:00:08.598860 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 skip
10280 23:00:08.598946 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 skip
10281 23:00:08.599045 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 skip
10282 23:00:08.599131 arm64_sve-ptrace_Set_SVE_VL_5968 pass
10283 23:00:08.599229 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 skip
10284 23:00:08.599331 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 skip
10285 23:00:08.599433 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 skip
10286 23:00:08.599536 arm64_sve-ptrace_Set_SVE_VL_5984 pass
10287 23:00:08.599643 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 skip
10288 23:00:08.599750 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 skip
10289 23:00:08.600039 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 skip
10290 23:00:08.600130 arm64_sve-ptrace_Set_SVE_VL_6000 pass
10291 23:00:08.600232 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 skip
10292 23:00:08.600320 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 skip
10293 23:00:08.600422 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 skip
10294 23:00:08.600524 arm64_sve-ptrace_Set_SVE_VL_6016 pass
10295 23:00:08.600630 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 skip
10296 23:00:08.600739 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 skip
10297 23:00:08.601021 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 skip
10298 23:00:08.601125 arm64_sve-ptrace_Set_SVE_VL_6032 pass
10299 23:00:08.601225 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 skip
10300 23:00:08.601323 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 skip
10301 23:00:08.601423 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 skip
10302 23:00:08.601681 arm64_sve-ptrace_Set_SVE_VL_6048 pass
10303 23:00:08.601779 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 skip
10304 23:00:08.614844 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 skip
10305 23:00:08.615063 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 skip
10306 23:00:08.615340 arm64_sve-ptrace_Set_SVE_VL_6064 pass
10307 23:00:08.615449 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 skip
10308 23:00:08.615552 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 skip
10309 23:00:08.615671 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 skip
10310 23:00:08.615767 arm64_sve-ptrace_Set_SVE_VL_6080 pass
10311 23:00:08.615859 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 skip
10312 23:00:08.615973 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 skip
10313 23:00:08.616068 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 skip
10314 23:00:08.616167 arm64_sve-ptrace_Set_SVE_VL_6096 pass
10315 23:00:08.616265 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 skip
10316 23:00:08.616378 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 skip
10317 23:00:08.616470 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 skip
10318 23:00:08.616564 arm64_sve-ptrace_Set_SVE_VL_6112 pass
10319 23:00:08.616681 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 skip
10320 23:00:08.616779 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 skip
10321 23:00:08.616870 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 skip
10322 23:00:08.616965 arm64_sve-ptrace_Set_SVE_VL_6128 pass
10323 23:00:08.617080 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 skip
10324 23:00:08.617170 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 skip
10325 23:00:08.617254 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 skip
10326 23:00:08.617359 arm64_sve-ptrace_Set_SVE_VL_6144 pass
10327 23:00:08.617446 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 skip
10328 23:00:08.617556 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 skip
10329 23:00:08.617670 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 skip
10330 23:00:08.617773 arm64_sve-ptrace_Set_SVE_VL_6160 pass
10331 23:00:08.618073 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 skip
10332 23:00:08.618190 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 skip
10333 23:00:08.618274 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 skip
10334 23:00:08.618352 arm64_sve-ptrace_Set_SVE_VL_6176 pass
10335 23:00:08.618442 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 skip
10336 23:00:08.618520 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 skip
10337 23:00:08.623230 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 skip
10338 23:00:08.623447 arm64_sve-ptrace_Set_SVE_VL_6192 pass
10339 23:00:08.623534 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 skip
10340 23:00:08.623611 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 skip
10341 23:00:08.623899 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 skip
10342 23:00:08.623998 arm64_sve-ptrace_Set_SVE_VL_6208 pass
10343 23:00:08.624076 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 skip
10344 23:00:08.624153 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 skip
10345 23:00:08.624233 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 skip
10346 23:00:08.624312 arm64_sve-ptrace_Set_SVE_VL_6224 pass
10347 23:00:08.643629 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 skip
10348 23:00:08.643891 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 skip
10349 23:00:08.644193 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 skip
10350 23:00:08.644278 arm64_sve-ptrace_Set_SVE_VL_6240 pass
10351 23:00:08.644346 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 skip
10352 23:00:08.644412 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 skip
10353 23:00:08.644481 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 skip
10354 23:00:08.644583 arm64_sve-ptrace_Set_SVE_VL_6256 pass
10355 23:00:08.644701 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 skip
10356 23:00:08.644776 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 skip
10357 23:00:08.644841 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 skip
10358 23:00:08.644904 arm64_sve-ptrace_Set_SVE_VL_6272 pass
10359 23:00:08.644968 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 skip
10360 23:00:08.645046 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 skip
10361 23:00:08.645110 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 skip
10362 23:00:08.645197 arm64_sve-ptrace_Set_SVE_VL_6288 pass
10363 23:00:08.645288 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 skip
10364 23:00:08.645404 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 skip
10365 23:00:08.645514 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 skip
10366 23:00:08.645603 arm64_sve-ptrace_Set_SVE_VL_6304 pass
10367 23:00:08.645729 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 skip
10368 23:00:08.645840 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 skip
10369 23:00:08.645932 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 skip
10370 23:00:08.646047 arm64_sve-ptrace_Set_SVE_VL_6320 pass
10371 23:00:08.646137 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 skip
10372 23:00:08.646252 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 skip
10373 23:00:08.646346 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 skip
10374 23:00:08.646467 arm64_sve-ptrace_Set_SVE_VL_6336 pass
10375 23:00:08.646555 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 skip
10376 23:00:08.650672 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 skip
10377 23:00:08.650960 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 skip
10378 23:00:08.651046 arm64_sve-ptrace_Set_SVE_VL_6352 pass
10379 23:00:08.651145 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 skip
10380 23:00:08.651262 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 skip
10381 23:00:08.651355 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 skip
10382 23:00:08.651450 arm64_sve-ptrace_Set_SVE_VL_6368 pass
10383 23:00:08.651573 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 skip
10384 23:00:08.651679 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 skip
10385 23:00:08.651777 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 skip
10386 23:00:08.651887 arm64_sve-ptrace_Set_SVE_VL_6384 pass
10387 23:00:08.651964 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 skip
10388 23:00:08.652032 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 skip
10389 23:00:08.652152 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 skip
10390 23:00:08.652251 arm64_sve-ptrace_Set_SVE_VL_6400 pass
10391 23:00:08.652364 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 skip
10392 23:00:08.652460 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 skip
10393 23:00:08.652556 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 skip
10394 23:00:08.652647 arm64_sve-ptrace_Set_SVE_VL_6416 pass
10395 23:00:08.652732 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 skip
10396 23:00:08.652851 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 skip
10397 23:00:08.652940 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 skip
10398 23:00:08.653017 arm64_sve-ptrace_Set_SVE_VL_6432 pass
10399 23:00:08.653275 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 skip
10400 23:00:08.653344 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 skip
10401 23:00:08.653419 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 skip
10402 23:00:08.653494 arm64_sve-ptrace_Set_SVE_VL_6448 pass
10403 23:00:08.653569 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 skip
10404 23:00:08.653699 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 skip
10405 23:00:08.653808 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 skip
10406 23:00:08.653914 arm64_sve-ptrace_Set_SVE_VL_6464 pass
10407 23:00:08.654000 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 skip
10408 23:00:08.654077 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 skip
10409 23:00:08.654167 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 skip
10410 23:00:08.654425 arm64_sve-ptrace_Set_SVE_VL_6480 pass
10411 23:00:08.654495 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 skip
10412 23:00:08.658653 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 skip
10413 23:00:08.658921 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 skip
10414 23:00:08.659030 arm64_sve-ptrace_Set_SVE_VL_6496 pass
10415 23:00:08.659135 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 skip
10416 23:00:08.659223 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 skip
10417 23:00:08.659323 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 skip
10418 23:00:08.659611 arm64_sve-ptrace_Set_SVE_VL_6512 pass
10419 23:00:08.659701 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 skip
10420 23:00:08.659801 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 skip
10421 23:00:08.659901 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 skip
10422 23:00:08.660000 arm64_sve-ptrace_Set_SVE_VL_6528 pass
10423 23:00:08.660099 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 skip
10424 23:00:08.660382 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 skip
10425 23:00:08.660473 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 skip
10426 23:00:08.660574 arm64_sve-ptrace_Set_SVE_VL_6544 pass
10427 23:00:08.660673 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 skip
10428 23:00:08.660964 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 skip
10429 23:00:08.661069 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 skip
10430 23:00:08.661155 arm64_sve-ptrace_Set_SVE_VL_6560 pass
10431 23:00:08.661253 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 skip
10432 23:00:08.661360 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 skip
10433 23:00:08.661665 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 skip
10434 23:00:08.661758 arm64_sve-ptrace_Set_SVE_VL_6576 pass
10435 23:00:08.661857 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 skip
10436 23:00:08.661957 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 skip
10437 23:00:08.662240 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 skip
10438 23:00:08.662330 arm64_sve-ptrace_Set_SVE_VL_6592 pass
10439 23:00:08.662430 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 skip
10440 23:00:08.662534 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 skip
10441 23:00:08.666817 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 skip
10442 23:00:08.666924 arm64_sve-ptrace_Set_SVE_VL_6608 pass
10443 23:00:08.667024 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 skip
10444 23:00:08.667123 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 skip
10445 23:00:08.667421 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 skip
10446 23:00:08.667523 arm64_sve-ptrace_Set_SVE_VL_6624 pass
10447 23:00:08.667622 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 skip
10448 23:00:08.667722 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 skip
10449 23:00:08.668007 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 skip
10450 23:00:08.668098 arm64_sve-ptrace_Set_SVE_VL_6640 pass
10451 23:00:08.668196 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 skip
10452 23:00:08.668294 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 skip
10453 23:00:08.668577 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 skip
10454 23:00:08.668666 arm64_sve-ptrace_Set_SVE_VL_6656 pass
10455 23:00:08.668765 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 skip
10456 23:00:08.668850 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 skip
10457 23:00:08.668957 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 skip
10458 23:00:08.669057 arm64_sve-ptrace_Set_SVE_VL_6672 pass
10459 23:00:08.669341 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 skip
10460 23:00:08.669431 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 skip
10461 23:00:08.669530 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 skip
10462 23:00:08.669628 arm64_sve-ptrace_Set_SVE_VL_6688 pass
10463 23:00:08.669741 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 skip
10464 23:00:08.670024 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 skip
10465 23:00:08.670129 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 skip
10466 23:00:08.670231 arm64_sve-ptrace_Set_SVE_VL_6704 pass
10467 23:00:08.670332 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 skip
10468 23:00:08.674670 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 skip
10469 23:00:08.674968 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 skip
10470 23:00:08.675060 arm64_sve-ptrace_Set_SVE_VL_6720 pass
10471 23:00:08.675143 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 skip
10472 23:00:08.675243 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 skip
10473 23:00:08.675330 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 skip
10474 23:00:08.675429 arm64_sve-ptrace_Set_SVE_VL_6736 pass
10475 23:00:08.675529 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 skip
10476 23:00:08.675813 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 skip
10477 23:00:08.675902 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 skip
10478 23:00:08.676002 arm64_sve-ptrace_Set_SVE_VL_6752 pass
10479 23:00:08.676101 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 skip
10480 23:00:08.676201 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 skip
10481 23:00:08.676486 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 skip
10482 23:00:08.676576 arm64_sve-ptrace_Set_SVE_VL_6768 pass
10483 23:00:08.676677 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 skip
10484 23:00:08.676777 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 skip
10485 23:00:08.676877 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 skip
10486 23:00:08.676977 arm64_sve-ptrace_Set_SVE_VL_6784 pass
10487 23:00:08.677266 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 skip
10488 23:00:08.677369 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 skip
10489 23:00:08.677468 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 skip
10490 23:00:08.677567 arm64_sve-ptrace_Set_SVE_VL_6800 pass
10491 23:00:08.677855 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 skip
10492 23:00:08.677947 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 skip
10493 23:00:08.678046 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 skip
10494 23:00:08.678145 arm64_sve-ptrace_Set_SVE_VL_6816 pass
10495 23:00:08.678426 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 skip
10496 23:00:08.678522 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 skip
10497 23:00:08.682659 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 skip
10498 23:00:08.682972 arm64_sve-ptrace_Set_SVE_VL_6832 pass
10499 23:00:08.683065 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 skip
10500 23:00:08.683150 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 skip
10501 23:00:08.683249 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 skip
10502 23:00:08.683336 arm64_sve-ptrace_Set_SVE_VL_6848 pass
10503 23:00:08.683434 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 skip
10504 23:00:08.683534 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 skip
10505 23:00:08.683820 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 skip
10506 23:00:08.683912 arm64_sve-ptrace_Set_SVE_VL_6864 pass
10507 23:00:08.700104 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 skip
10508 23:00:08.700559 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 skip
10509 23:00:08.700673 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 skip
10510 23:00:08.700774 arm64_sve-ptrace_Set_SVE_VL_6880 pass
10511 23:00:08.700865 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 skip
10512 23:00:08.700958 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 skip
10513 23:00:08.701076 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 skip
10514 23:00:08.701167 arm64_sve-ptrace_Set_SVE_VL_6896 pass
10515 23:00:08.701257 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 skip
10516 23:00:08.701369 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 skip
10517 23:00:08.701463 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 skip
10518 23:00:08.701558 arm64_sve-ptrace_Set_SVE_VL_6912 pass
10519 23:00:08.701681 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 skip
10520 23:00:08.701784 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 skip
10521 23:00:08.701904 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 skip
10522 23:00:08.702004 arm64_sve-ptrace_Set_SVE_VL_6928 pass
10523 23:00:08.702119 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 skip
10524 23:00:08.702228 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 skip
10525 23:00:08.702343 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 skip
10526 23:00:08.702458 arm64_sve-ptrace_Set_SVE_VL_6944 pass
10527 23:00:08.702773 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 skip
10528 23:00:08.702887 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 skip
10529 23:00:08.702991 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 skip
10530 23:00:08.703090 arm64_sve-ptrace_Set_SVE_VL_6960 pass
10531 23:00:08.703280 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 skip
10532 23:00:08.703398 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 skip
10533 23:00:08.703706 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 skip
10534 23:00:08.703830 arm64_sve-ptrace_Set_SVE_VL_6976 pass
10535 23:00:08.703938 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 skip
10536 23:00:08.704276 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 skip
10537 23:00:08.704379 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 skip
10538 23:00:08.704462 arm64_sve-ptrace_Set_SVE_VL_6992 pass
10539 23:00:08.704552 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 skip
10540 23:00:08.704625 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 skip
10541 23:00:08.704692 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 skip
10542 23:00:08.704774 arm64_sve-ptrace_Set_SVE_VL_7008 pass
10543 23:00:08.704861 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 skip
10544 23:00:08.704949 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 skip
10545 23:00:08.705255 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 skip
10546 23:00:08.705349 arm64_sve-ptrace_Set_SVE_VL_7024 pass
10547 23:00:08.705460 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 skip
10548 23:00:08.705584 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 skip
10549 23:00:08.705725 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 skip
10550 23:00:08.705853 arm64_sve-ptrace_Set_SVE_VL_7040 pass
10551 23:00:08.705973 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 skip
10552 23:00:08.706097 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 skip
10553 23:00:08.706227 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 skip
10554 23:00:08.706316 arm64_sve-ptrace_Set_SVE_VL_7056 pass
10555 23:00:08.706419 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 skip
10556 23:00:08.706508 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 skip
10557 23:00:08.710695 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 skip
10558 23:00:08.710800 arm64_sve-ptrace_Set_SVE_VL_7072 pass
10559 23:00:08.711067 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 skip
10560 23:00:08.711172 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 skip
10561 23:00:08.711275 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 skip
10562 23:00:08.711367 arm64_sve-ptrace_Set_SVE_VL_7088 pass
10563 23:00:08.711468 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 skip
10564 23:00:08.711769 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 skip
10565 23:00:08.711871 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 skip
10566 23:00:08.711956 arm64_sve-ptrace_Set_SVE_VL_7104 pass
10567 23:00:08.712054 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 skip
10568 23:00:08.712154 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 skip
10569 23:00:08.712467 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 skip
10570 23:00:08.712572 arm64_sve-ptrace_Set_SVE_VL_7120 pass
10571 23:00:08.712675 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 skip
10572 23:00:08.712761 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 skip
10573 23:00:08.712966 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 skip
10574 23:00:08.713086 arm64_sve-ptrace_Set_SVE_VL_7136 pass
10575 23:00:08.713188 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 skip
10576 23:00:08.713491 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 skip
10577 23:00:08.713594 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 skip
10578 23:00:08.713701 arm64_sve-ptrace_Set_SVE_VL_7152 pass
10579 23:00:08.713802 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 skip
10580 23:00:08.714089 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 skip
10581 23:00:08.714229 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 skip
10582 23:00:08.714387 arm64_sve-ptrace_Set_SVE_VL_7168 pass
10583 23:00:08.714508 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 skip
10584 23:00:08.722872 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 skip
10585 23:00:08.723326 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 skip
10586 23:00:08.723432 arm64_sve-ptrace_Set_SVE_VL_7184 pass
10587 23:00:08.723523 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 skip
10588 23:00:08.723630 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 skip
10589 23:00:08.723728 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 skip
10590 23:00:08.723847 arm64_sve-ptrace_Set_SVE_VL_7200 pass
10591 23:00:08.723940 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 skip
10592 23:00:08.724048 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 skip
10593 23:00:08.724154 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 skip
10594 23:00:08.724487 arm64_sve-ptrace_Set_SVE_VL_7216 pass
10595 23:00:08.724589 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 skip
10596 23:00:08.724698 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 skip
10597 23:00:08.725685 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 skip
10598 23:00:08.725786 arm64_sve-ptrace_Set_SVE_VL_7232 pass
10599 23:00:08.725867 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 skip
10600 23:00:08.725944 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 skip
10601 23:00:08.726022 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 skip
10602 23:00:08.726099 arm64_sve-ptrace_Set_SVE_VL_7248 pass
10603 23:00:08.726174 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 skip
10604 23:00:08.726441 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 skip
10605 23:00:08.726524 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 skip
10606 23:00:08.726601 arm64_sve-ptrace_Set_SVE_VL_7264 pass
10607 23:00:08.726676 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 skip
10608 23:00:08.726756 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 skip
10609 23:00:08.737901 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 skip
10610 23:00:08.738145 arm64_sve-ptrace_Set_SVE_VL_7280 pass
10611 23:00:08.738225 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 skip
10612 23:00:08.738303 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 skip
10613 23:00:08.738377 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 skip
10614 23:00:08.738452 arm64_sve-ptrace_Set_SVE_VL_7296 pass
10615 23:00:08.738535 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 skip
10616 23:00:08.738610 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 skip
10617 23:00:08.738682 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 skip
10618 23:00:08.738767 arm64_sve-ptrace_Set_SVE_VL_7312 pass
10619 23:00:08.738862 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 skip
10620 23:00:08.738942 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 skip
10621 23:00:08.739015 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 skip
10622 23:00:08.739094 arm64_sve-ptrace_Set_SVE_VL_7328 pass
10623 23:00:08.739165 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 skip
10624 23:00:08.739240 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 skip
10625 23:00:08.739316 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 skip
10626 23:00:08.739416 arm64_sve-ptrace_Set_SVE_VL_7344 pass
10627 23:00:08.739525 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 skip
10628 23:00:08.739622 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 skip
10629 23:00:08.739717 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 skip
10630 23:00:08.739816 arm64_sve-ptrace_Set_SVE_VL_7360 pass
10631 23:00:08.739907 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 skip
10632 23:00:08.739999 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 skip
10633 23:00:08.740076 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 skip
10634 23:00:08.740142 arm64_sve-ptrace_Set_SVE_VL_7376 pass
10635 23:00:08.740417 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 skip
10636 23:00:08.740487 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 skip
10637 23:00:08.740552 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 skip
10638 23:00:08.740613 arm64_sve-ptrace_Set_SVE_VL_7392 pass
10639 23:00:08.740675 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 skip
10640 23:00:08.740736 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 skip
10641 23:00:08.740798 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 skip
10642 23:00:08.740859 arm64_sve-ptrace_Set_SVE_VL_7408 pass
10643 23:00:08.740922 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 skip
10644 23:00:08.740983 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 skip
10645 23:00:08.741045 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 skip
10646 23:00:08.741122 arm64_sve-ptrace_Set_SVE_VL_7424 pass
10647 23:00:08.741188 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 skip
10648 23:00:08.741249 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 skip
10649 23:00:08.741310 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 skip
10650 23:00:08.741372 arm64_sve-ptrace_Set_SVE_VL_7440 pass
10651 23:00:08.741448 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 skip
10652 23:00:08.741513 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 skip
10653 23:00:08.741585 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 skip
10654 23:00:08.741689 arm64_sve-ptrace_Set_SVE_VL_7456 pass
10655 23:00:08.741947 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 skip
10656 23:00:08.742214 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 skip
10657 23:00:08.742301 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 skip
10658 23:00:08.742408 arm64_sve-ptrace_Set_SVE_VL_7472 pass
10659 23:00:08.746784 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 skip
10660 23:00:08.747129 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 skip
10661 23:00:08.747253 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 skip
10662 23:00:08.747364 arm64_sve-ptrace_Set_SVE_VL_7488 pass
10663 23:00:08.747479 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 skip
10664 23:00:08.747587 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 skip
10665 23:00:08.747702 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 skip
10666 23:00:08.749738 arm64_sve-ptrace_Set_SVE_VL_7504 pass
10667 23:00:08.771715 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 skip
10668 23:00:08.771964 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 skip
10669 23:00:08.772264 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 skip
10670 23:00:08.772366 arm64_sve-ptrace_Set_SVE_VL_7520 pass
10671 23:00:08.772451 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 skip
10672 23:00:08.772544 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 skip
10673 23:00:08.772646 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 skip
10674 23:00:08.772741 arm64_sve-ptrace_Set_SVE_VL_7536 pass
10675 23:00:08.773035 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 skip
10676 23:00:08.773135 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 skip
10677 23:00:08.773421 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 skip
10678 23:00:08.773529 arm64_sve-ptrace_Set_SVE_VL_7552 pass
10679 23:00:08.773608 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 skip
10680 23:00:08.773911 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 skip
10681 23:00:08.774011 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 skip
10682 23:00:08.774099 arm64_sve-ptrace_Set_SVE_VL_7568 pass
10683 23:00:08.774208 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 skip
10684 23:00:08.774298 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 skip
10685 23:00:08.774397 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 skip
10686 23:00:08.774676 arm64_sve-ptrace_Set_SVE_VL_7584 pass
10687 23:00:08.779305 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 skip
10688 23:00:08.779652 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 skip
10689 23:00:08.779751 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 skip
10690 23:00:08.780055 arm64_sve-ptrace_Set_SVE_VL_7600 pass
10691 23:00:08.780154 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 skip
10692 23:00:08.780220 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 skip
10693 23:00:08.780281 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 skip
10694 23:00:08.780341 arm64_sve-ptrace_Set_SVE_VL_7616 pass
10695 23:00:08.780413 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 skip
10696 23:00:08.780681 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 skip
10697 23:00:08.780823 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 skip
10698 23:00:08.780948 arm64_sve-ptrace_Set_SVE_VL_7632 pass
10699 23:00:08.781057 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 skip
10700 23:00:08.781147 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 skip
10701 23:00:08.781234 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 skip
10702 23:00:08.781348 arm64_sve-ptrace_Set_SVE_VL_7648 pass
10703 23:00:08.781459 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 skip
10704 23:00:08.781587 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 skip
10705 23:00:08.781720 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 skip
10706 23:00:08.781829 arm64_sve-ptrace_Set_SVE_VL_7664 pass
10707 23:00:08.781935 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 skip
10708 23:00:08.782312 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 skip
10709 23:00:08.782419 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 skip
10710 23:00:08.782522 arm64_sve-ptrace_Set_SVE_VL_7680 pass
10711 23:00:08.787668 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 skip
10712 23:00:08.787896 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 skip
10713 23:00:08.787997 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 skip
10714 23:00:08.788106 arm64_sve-ptrace_Set_SVE_VL_7696 pass
10715 23:00:08.788215 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 skip
10716 23:00:08.788324 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 skip
10717 23:00:08.788429 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 skip
10718 23:00:08.789207 arm64_sve-ptrace_Set_SVE_VL_7712 pass
10719 23:00:08.789322 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 skip
10720 23:00:08.789425 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 skip
10721 23:00:08.789538 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 skip
10722 23:00:08.789642 arm64_sve-ptrace_Set_SVE_VL_7728 pass
10723 23:00:08.789767 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 skip
10724 23:00:08.789881 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 skip
10725 23:00:08.789977 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 skip
10726 23:00:08.790065 arm64_sve-ptrace_Set_SVE_VL_7744 pass
10727 23:00:08.790141 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 skip
10728 23:00:08.790225 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 skip
10729 23:00:08.790330 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 skip
10730 23:00:08.790429 arm64_sve-ptrace_Set_SVE_VL_7760 pass
10731 23:00:08.790521 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 skip
10732 23:00:08.790619 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 skip
10733 23:00:08.790713 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 skip
10734 23:00:08.790779 arm64_sve-ptrace_Set_SVE_VL_7776 pass
10735 23:00:08.790857 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 skip
10736 23:00:08.790959 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 skip
10737 23:00:08.794745 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 skip
10738 23:00:08.795088 arm64_sve-ptrace_Set_SVE_VL_7792 pass
10739 23:00:08.795217 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 skip
10740 23:00:08.795349 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 skip
10741 23:00:08.795459 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 skip
10742 23:00:08.795574 arm64_sve-ptrace_Set_SVE_VL_7808 pass
10743 23:00:08.795675 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 skip
10744 23:00:08.795788 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 skip
10745 23:00:08.795916 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 skip
10746 23:00:08.796035 arm64_sve-ptrace_Set_SVE_VL_7824 pass
10747 23:00:08.796340 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 skip
10748 23:00:08.796456 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 skip
10749 23:00:08.796563 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 skip
10750 23:00:08.796670 arm64_sve-ptrace_Set_SVE_VL_7840 pass
10751 23:00:08.796986 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 skip
10752 23:00:08.797095 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 skip
10753 23:00:08.797396 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 skip
10754 23:00:08.797512 arm64_sve-ptrace_Set_SVE_VL_7856 pass
10755 23:00:08.797599 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 skip
10756 23:00:08.797707 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 skip
10757 23:00:08.797792 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 skip
10758 23:00:08.797911 arm64_sve-ptrace_Set_SVE_VL_7872 pass
10759 23:00:08.797991 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 skip
10760 23:00:08.798086 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 skip
10761 23:00:08.798405 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 skip
10762 23:00:08.798497 arm64_sve-ptrace_Set_SVE_VL_7888 pass
10763 23:00:08.798602 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 skip
10764 23:00:08.802814 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 skip
10765 23:00:08.802937 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 skip
10766 23:00:08.803072 arm64_sve-ptrace_Set_SVE_VL_7904 pass
10767 23:00:08.803398 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 skip
10768 23:00:08.803525 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 skip
10769 23:00:08.803656 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 skip
10770 23:00:08.803745 arm64_sve-ptrace_Set_SVE_VL_7920 pass
10771 23:00:08.803846 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 skip
10772 23:00:08.804151 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 skip
10773 23:00:08.804256 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 skip
10774 23:00:08.804382 arm64_sve-ptrace_Set_SVE_VL_7936 pass
10775 23:00:08.804486 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 skip
10776 23:00:08.804591 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 skip
10777 23:00:08.804711 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 skip
10778 23:00:08.804825 arm64_sve-ptrace_Set_SVE_VL_7952 pass
10779 23:00:08.805165 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 skip
10780 23:00:08.805275 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 skip
10781 23:00:08.805381 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 skip
10782 23:00:08.805485 arm64_sve-ptrace_Set_SVE_VL_7968 pass
10783 23:00:08.805783 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 skip
10784 23:00:08.805887 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 skip
10785 23:00:08.805996 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 skip
10786 23:00:08.806099 arm64_sve-ptrace_Set_SVE_VL_7984 pass
10787 23:00:08.806404 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 skip
10788 23:00:08.806505 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 skip
10789 23:00:08.810621 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 skip
10790 23:00:08.810948 arm64_sve-ptrace_Set_SVE_VL_8000 pass
10791 23:00:08.811058 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 skip
10792 23:00:08.811176 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 skip
10793 23:00:08.811286 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 skip
10794 23:00:08.811392 arm64_sve-ptrace_Set_SVE_VL_8016 pass
10795 23:00:08.811502 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 skip
10796 23:00:08.811836 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 skip
10797 23:00:08.811942 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 skip
10798 23:00:08.812057 arm64_sve-ptrace_Set_SVE_VL_8032 pass
10799 23:00:08.812277 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 skip
10800 23:00:08.812399 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 skip
10801 23:00:08.812519 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 skip
10802 23:00:08.812647 arm64_sve-ptrace_Set_SVE_VL_8048 pass
10803 23:00:08.812779 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 skip
10804 23:00:08.812877 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 skip
10805 23:00:08.812984 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 skip
10806 23:00:08.813283 arm64_sve-ptrace_Set_SVE_VL_8064 pass
10807 23:00:08.813384 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 skip
10808 23:00:08.813486 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 skip
10809 23:00:08.813600 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 skip
10810 23:00:08.813724 arm64_sve-ptrace_Set_SVE_VL_8080 pass
10811 23:00:08.813838 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 skip
10812 23:00:08.813970 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 skip
10813 23:00:08.814283 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 skip
10814 23:00:08.814385 arm64_sve-ptrace_Set_SVE_VL_8096 pass
10815 23:00:08.814479 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 skip
10816 23:00:08.818595 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 skip
10817 23:00:08.818845 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 skip
10818 23:00:08.818975 arm64_sve-ptrace_Set_SVE_VL_8112 pass
10819 23:00:08.819230 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 skip
10820 23:00:08.819339 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 skip
10821 23:00:08.819445 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 skip
10822 23:00:08.819535 arm64_sve-ptrace_Set_SVE_VL_8128 pass
10823 23:00:08.819636 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 skip
10824 23:00:08.819737 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 skip
10825 23:00:08.820038 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 skip
10826 23:00:08.820140 arm64_sve-ptrace_Set_SVE_VL_8144 pass
10827 23:00:08.831850 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 skip
10828 23:00:08.832061 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 skip
10829 23:00:08.832335 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 skip
10830 23:00:08.832418 arm64_sve-ptrace_Set_SVE_VL_8160 pass
10831 23:00:08.832490 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 skip
10832 23:00:08.832577 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 skip
10833 23:00:08.832673 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 skip
10834 23:00:08.832762 arm64_sve-ptrace_Set_SVE_VL_8176 pass
10835 23:00:08.832846 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 skip
10836 23:00:08.832946 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 skip
10837 23:00:08.833029 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 skip
10838 23:00:08.833297 arm64_sve-ptrace_Set_SVE_VL_8192 pass
10839 23:00:08.833379 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 skip
10840 23:00:08.833473 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 skip
10841 23:00:08.833750 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 skip
10842 23:00:08.833831 arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 pass
10843 23:00:08.833924 arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state pass
10844 23:00:08.834015 arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set pass
10845 23:00:08.834109 arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared pass
10846 23:00:08.834198 arm64_sve-ptrace_Set_Streaming_SVE_VL_16 pass
10847 23:00:08.834483 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 pass
10848 23:00:08.838647 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 pass
10849 23:00:08.838979 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 pass
10850 23:00:08.839087 arm64_sve-ptrace_Set_Streaming_SVE_VL_32 pass
10851 23:00:08.839204 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 pass
10852 23:00:08.839317 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 pass
10853 23:00:08.839416 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 pass
10854 23:00:08.839543 arm64_sve-ptrace_Set_Streaming_SVE_VL_48 pass
10855 23:00:08.839630 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 skip
10856 23:00:08.839727 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 skip
10857 23:00:08.839794 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 skip
10858 23:00:08.839867 arm64_sve-ptrace_Set_Streaming_SVE_VL_64 pass
10859 23:00:08.840124 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 pass
10860 23:00:08.840233 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 pass
10861 23:00:08.840321 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 pass
10862 23:00:08.840401 arm64_sve-ptrace_Set_Streaming_SVE_VL_80 pass
10863 23:00:08.840486 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 skip
10864 23:00:08.840568 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 skip
10865 23:00:08.840847 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 skip
10866 23:00:08.840944 arm64_sve-ptrace_Set_Streaming_SVE_VL_96 pass
10867 23:00:08.841040 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 skip
10868 23:00:08.841141 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 skip
10869 23:00:08.841239 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 skip
10870 23:00:08.841529 arm64_sve-ptrace_Set_Streaming_SVE_VL_112 pass
10871 23:00:08.841644 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 skip
10872 23:00:08.841762 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 skip
10873 23:00:08.842039 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 skip
10874 23:00:08.842132 arm64_sve-ptrace_Set_Streaming_SVE_VL_128 pass
10875 23:00:08.842244 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 pass
10876 23:00:08.842375 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 pass
10877 23:00:08.846629 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 pass
10878 23:00:08.846928 arm64_sve-ptrace_Set_Streaming_SVE_VL_144 pass
10879 23:00:08.847055 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 skip
10880 23:00:08.847153 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 skip
10881 23:00:08.847235 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 skip
10882 23:00:08.847505 arm64_sve-ptrace_Set_Streaming_SVE_VL_160 pass
10883 23:00:08.847597 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 skip
10884 23:00:08.847663 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 skip
10885 23:00:08.847751 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 skip
10886 23:00:08.848020 arm64_sve-ptrace_Set_Streaming_SVE_VL_176 pass
10887 23:00:08.848116 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 skip
10888 23:00:08.848214 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 skip
10889 23:00:08.848313 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 skip
10890 23:00:08.848410 arm64_sve-ptrace_Set_Streaming_SVE_VL_192 pass
10891 23:00:08.848507 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 skip
10892 23:00:08.848804 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 skip
10893 23:00:08.848936 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 skip
10894 23:00:08.849040 arm64_sve-ptrace_Set_Streaming_SVE_VL_208 pass
10895 23:00:08.849304 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 skip
10896 23:00:08.849399 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 skip
10897 23:00:08.849691 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 skip
10898 23:00:08.849816 arm64_sve-ptrace_Set_Streaming_SVE_VL_224 pass
10899 23:00:08.849911 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 skip
10900 23:00:08.850014 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 skip
10901 23:00:08.850115 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 skip
10902 23:00:08.850260 arm64_sve-ptrace_Set_Streaming_SVE_VL_240 pass
10903 23:00:08.850387 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 skip
10904 23:00:08.854627 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 skip
10905 23:00:08.854936 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 skip
10906 23:00:08.855047 arm64_sve-ptrace_Set_Streaming_SVE_VL_256 pass
10907 23:00:08.855153 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 pass
10908 23:00:08.855270 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 pass
10909 23:00:08.855569 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 pass
10910 23:00:08.855716 arm64_sve-ptrace_Set_Streaming_SVE_VL_272 pass
10911 23:00:08.855897 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 skip
10912 23:00:08.856027 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 skip
10913 23:00:08.856146 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 skip
10914 23:00:08.856276 arm64_sve-ptrace_Set_Streaming_SVE_VL_288 pass
10915 23:00:08.856406 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 skip
10916 23:00:08.856707 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 skip
10917 23:00:08.856830 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 skip
10918 23:00:08.856934 arm64_sve-ptrace_Set_Streaming_SVE_VL_304 pass
10919 23:00:08.857248 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 skip
10920 23:00:08.857354 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 skip
10921 23:00:08.857654 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 skip
10922 23:00:08.857760 arm64_sve-ptrace_Set_Streaming_SVE_VL_320 pass
10923 23:00:08.858054 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 skip
10924 23:00:08.858160 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 skip
10925 23:00:08.858262 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 skip
10926 23:00:08.858328 arm64_sve-ptrace_Set_Streaming_SVE_VL_336 pass
10927 23:00:08.859412 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 skip
10928 23:00:08.862690 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 skip
10929 23:00:08.863022 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 skip
10930 23:00:08.863130 arm64_sve-ptrace_Set_Streaming_SVE_VL_352 pass
10931 23:00:08.863233 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 skip
10932 23:00:08.863568 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 skip
10933 23:00:08.863663 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 skip
10934 23:00:08.863768 arm64_sve-ptrace_Set_Streaming_SVE_VL_368 pass
10935 23:00:08.863875 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 skip
10936 23:00:08.864189 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 skip
10937 23:00:08.864380 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 skip
10938 23:00:08.864549 arm64_sve-ptrace_Set_Streaming_SVE_VL_384 pass
10939 23:00:08.864722 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 skip
10940 23:00:08.864857 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 skip
10941 23:00:08.864998 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 skip
10942 23:00:08.865119 arm64_sve-ptrace_Set_Streaming_SVE_VL_400 pass
10943 23:00:08.865261 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 skip
10944 23:00:08.865417 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 skip
10945 23:00:08.865589 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 skip
10946 23:00:08.865767 arm64_sve-ptrace_Set_Streaming_SVE_VL_416 pass
10947 23:00:08.865920 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 skip
10948 23:00:08.866078 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 skip
10949 23:00:08.866239 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 skip
10950 23:00:08.866396 arm64_sve-ptrace_Set_Streaming_SVE_VL_432 pass
10951 23:00:08.866532 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 skip
10952 23:00:08.870654 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 skip
10953 23:00:08.871034 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 skip
10954 23:00:08.871201 arm64_sve-ptrace_Set_Streaming_SVE_VL_448 pass
10955 23:00:08.871365 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 skip
10956 23:00:08.871545 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 skip
10957 23:00:08.871701 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 skip
10958 23:00:08.871841 arm64_sve-ptrace_Set_Streaming_SVE_VL_464 pass
10959 23:00:08.872030 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 skip
10960 23:00:08.872190 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 skip
10961 23:00:08.872350 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 skip
10962 23:00:08.872533 arm64_sve-ptrace_Set_Streaming_SVE_VL_480 pass
10963 23:00:08.872656 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 skip
10964 23:00:08.885365 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 skip
10965 23:00:08.885725 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 skip
10966 23:00:08.885851 arm64_sve-ptrace_Set_Streaming_SVE_VL_496 pass
10967 23:00:08.886173 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 skip
10968 23:00:08.886334 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 skip
10969 23:00:08.886469 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 skip
10970 23:00:08.886616 arm64_sve-ptrace_Set_Streaming_SVE_VL_512 pass
10971 23:00:08.886780 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 skip
10972 23:00:08.886938 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 skip
10973 23:00:08.887102 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 skip
10974 23:00:08.887275 arm64_sve-ptrace_Set_Streaming_SVE_VL_528 pass
10975 23:00:08.887409 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 skip
10976 23:00:08.887537 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 skip
10977 23:00:08.887686 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 skip
10978 23:00:08.887818 arm64_sve-ptrace_Set_Streaming_SVE_VL_544 pass
10979 23:00:08.887978 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 skip
10980 23:00:08.888110 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 skip
10981 23:00:08.888259 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 skip
10982 23:00:08.888388 arm64_sve-ptrace_Set_Streaming_SVE_VL_560 pass
10983 23:00:08.888537 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 skip
10984 23:00:08.888685 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 skip
10985 23:00:08.888837 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 skip
10986 23:00:08.888967 arm64_sve-ptrace_Set_Streaming_SVE_VL_576 pass
10987 23:00:08.889119 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 skip
10988 23:00:08.889250 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 skip
10989 23:00:08.889400 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 skip
10990 23:00:08.889548 arm64_sve-ptrace_Set_Streaming_SVE_VL_592 pass
10991 23:00:08.890376 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 skip
10992 23:00:08.890523 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 skip
10993 23:00:08.890625 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 skip
10994 23:00:08.890715 arm64_sve-ptrace_Set_Streaming_SVE_VL_608 pass
10995 23:00:08.890802 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 skip
10996 23:00:08.894624 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 skip
10997 23:00:08.894978 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 skip
10998 23:00:08.895083 arm64_sve-ptrace_Set_Streaming_SVE_VL_624 pass
10999 23:00:08.895210 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 skip
11000 23:00:08.895304 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 skip
11001 23:00:08.895597 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 skip
11002 23:00:08.895705 arm64_sve-ptrace_Set_Streaming_SVE_VL_640 pass
11003 23:00:08.895809 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 skip
11004 23:00:08.896136 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 skip
11005 23:00:08.896289 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 skip
11006 23:00:08.896478 arm64_sve-ptrace_Set_Streaming_SVE_VL_656 pass
11007 23:00:08.896649 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 skip
11008 23:00:08.896839 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 skip
11009 23:00:08.896983 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 skip
11010 23:00:08.897122 arm64_sve-ptrace_Set_Streaming_SVE_VL_672 pass
11011 23:00:08.897273 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 skip
11012 23:00:08.897404 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 skip
11013 23:00:08.897553 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 skip
11014 23:00:08.897693 arm64_sve-ptrace_Set_Streaming_SVE_VL_688 pass
11015 23:00:08.897840 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 skip
11016 23:00:08.897990 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 skip
11017 23:00:08.898139 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 skip
11018 23:00:08.898278 arm64_sve-ptrace_Set_Streaming_SVE_VL_704 pass
11019 23:00:08.898421 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 skip
11020 23:00:08.902702 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 skip
11021 23:00:08.903094 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 skip
11022 23:00:08.903203 arm64_sve-ptrace_Set_Streaming_SVE_VL_720 pass
11023 23:00:08.903292 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 skip
11024 23:00:08.903388 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 skip
11025 23:00:08.903700 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 skip
11026 23:00:08.903804 arm64_sve-ptrace_Set_Streaming_SVE_VL_736 pass
11027 23:00:08.903927 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 skip
11028 23:00:08.904059 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 skip
11029 23:00:08.904179 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 skip
11030 23:00:08.904307 arm64_sve-ptrace_Set_Streaming_SVE_VL_752 pass
11031 23:00:08.904652 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 skip
11032 23:00:08.904957 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 skip
11033 23:00:08.905064 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 skip
11034 23:00:08.905177 arm64_sve-ptrace_Set_Streaming_SVE_VL_768 pass
11035 23:00:08.905288 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 skip
11036 23:00:08.905362 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 skip
11037 23:00:08.905453 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 skip
11038 23:00:08.905751 arm64_sve-ptrace_Set_Streaming_SVE_VL_784 pass
11039 23:00:08.905841 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 skip
11040 23:00:08.906596 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 skip
11041 23:00:08.906680 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 skip
11042 23:00:08.906744 arm64_sve-ptrace_Set_Streaming_SVE_VL_800 pass
11043 23:00:08.906805 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 skip
11044 23:00:08.907046 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 skip
11045 23:00:08.907112 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 skip
11046 23:00:08.910669 arm64_sve-ptrace_Set_Streaming_SVE_VL_816 pass
11047 23:00:08.911154 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 skip
11048 23:00:08.911247 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 skip
11049 23:00:08.911345 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 skip
11050 23:00:08.911451 arm64_sve-ptrace_Set_Streaming_SVE_VL_832 pass
11051 23:00:08.911551 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 skip
11052 23:00:08.911626 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 skip
11053 23:00:08.911733 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 skip
11054 23:00:08.911824 arm64_sve-ptrace_Set_Streaming_SVE_VL_848 pass
11055 23:00:08.911930 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 skip
11056 23:00:08.912030 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 skip
11057 23:00:08.912137 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 skip
11058 23:00:08.912251 arm64_sve-ptrace_Set_Streaming_SVE_VL_864 pass
11059 23:00:08.912380 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 skip
11060 23:00:08.912708 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 skip
11061 23:00:08.913018 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 skip
11062 23:00:08.913122 arm64_sve-ptrace_Set_Streaming_SVE_VL_880 pass
11063 23:00:08.913208 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 skip
11064 23:00:08.913299 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 skip
11065 23:00:08.913403 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 skip
11066 23:00:08.913538 arm64_sve-ptrace_Set_Streaming_SVE_VL_896 pass
11067 23:00:08.913676 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 skip
11068 23:00:08.913804 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 skip
11069 23:00:08.914119 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 skip
11070 23:00:08.914238 arm64_sve-ptrace_Set_Streaming_SVE_VL_912 pass
11071 23:00:08.914360 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 skip
11072 23:00:08.914468 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 skip
11073 23:00:08.918674 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 skip
11074 23:00:08.919035 arm64_sve-ptrace_Set_Streaming_SVE_VL_928 pass
11075 23:00:08.919153 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 skip
11076 23:00:08.919253 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 skip
11077 23:00:08.919351 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 skip
11078 23:00:08.919674 arm64_sve-ptrace_Set_Streaming_SVE_VL_944 pass
11079 23:00:08.919773 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 skip
11080 23:00:08.919880 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 skip
11081 23:00:08.920179 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 skip
11082 23:00:08.920286 arm64_sve-ptrace_Set_Streaming_SVE_VL_960 pass
11083 23:00:08.920407 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 skip
11084 23:00:08.920741 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 skip
11085 23:00:08.920892 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 skip
11086 23:00:08.921042 arm64_sve-ptrace_Set_Streaming_SVE_VL_976 pass
11087 23:00:08.921194 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 skip
11088 23:00:08.921346 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 skip
11089 23:00:08.921718 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 skip
11090 23:00:08.921874 arm64_sve-ptrace_Set_Streaming_SVE_VL_992 pass
11091 23:00:08.922031 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 skip
11092 23:00:08.922178 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 skip
11093 23:00:08.922349 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 skip
11094 23:00:08.922486 arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 pass
11095 23:00:08.926662 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 skip
11096 23:00:08.926958 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 skip
11097 23:00:08.927078 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 skip
11098 23:00:08.927374 arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 pass
11099 23:00:08.927475 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 skip
11100 23:00:08.940393 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 skip
11101 23:00:08.940860 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 skip
11102 23:00:08.940966 arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 pass
11103 23:00:08.941057 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 skip
11104 23:00:08.941328 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 skip
11105 23:00:08.941429 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 skip
11106 23:00:08.941515 arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 pass
11107 23:00:08.941617 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 skip
11108 23:00:08.941715 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 skip
11109 23:00:08.941818 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 skip
11110 23:00:08.941920 arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 pass
11111 23:00:08.942224 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 skip
11112 23:00:08.942523 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 skip
11113 23:00:08.942618 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 skip
11114 23:00:08.942955 arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 pass
11115 23:00:08.943063 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 skip
11116 23:00:08.943204 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 skip
11117 23:00:08.943326 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 skip
11118 23:00:08.943449 arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 pass
11119 23:00:08.943572 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 skip
11120 23:00:08.943823 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 skip
11121 23:00:08.943942 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 skip
11122 23:00:08.944300 arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 pass
11123 23:00:08.944402 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 skip
11124 23:00:08.944515 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 skip
11125 23:00:08.944846 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 skip
11126 23:00:08.944955 arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 pass
11127 23:00:08.945189 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 skip
11128 23:00:08.945294 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 skip
11129 23:00:08.945403 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 skip
11130 23:00:08.945510 arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 pass
11131 23:00:08.945612 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 skip
11132 23:00:08.945922 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 skip
11133 23:00:08.946027 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 skip
11134 23:00:08.946130 arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 pass
11135 23:00:08.946242 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 skip
11136 23:00:08.950709 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 skip
11137 23:00:08.951078 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 skip
11138 23:00:08.951187 arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 pass
11139 23:00:08.951563 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 skip
11140 23:00:08.951650 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 skip
11141 23:00:08.951750 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 skip
11142 23:00:08.951887 arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 pass
11143 23:00:08.952002 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 skip
11144 23:00:08.952129 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 skip
11145 23:00:08.952253 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 skip
11146 23:00:08.952581 arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 pass
11147 23:00:08.952698 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 skip
11148 23:00:08.952820 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 skip
11149 23:00:08.952914 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 skip
11150 23:00:08.953014 arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 pass
11151 23:00:08.953127 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 skip
11152 23:00:08.953257 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 skip
11153 23:00:08.953392 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 skip
11154 23:00:08.953517 arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 pass
11155 23:00:08.953905 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 skip
11156 23:00:08.954044 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 skip
11157 23:00:08.954155 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 skip
11158 23:00:08.954283 arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 pass
11159 23:00:08.954420 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 skip
11160 23:00:08.954536 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 skip
11161 23:00:08.958652 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 skip
11162 23:00:08.958989 arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 pass
11163 23:00:08.959115 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 skip
11164 23:00:08.959247 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 skip
11165 23:00:08.959371 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 skip
11166 23:00:08.959500 arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 pass
11167 23:00:08.959662 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 skip
11168 23:00:08.959985 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 skip
11169 23:00:08.960101 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 skip
11170 23:00:08.960238 arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 pass
11171 23:00:08.960365 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 skip
11172 23:00:08.960691 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 skip
11173 23:00:08.960793 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 skip
11174 23:00:08.960903 arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 pass
11175 23:00:08.961222 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 skip
11176 23:00:08.961324 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 skip
11177 23:00:08.961426 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 skip
11178 23:00:08.961530 arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 pass
11179 23:00:08.961631 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 skip
11180 23:00:08.961972 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 skip
11181 23:00:08.962064 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 skip
11182 23:00:08.962365 arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 pass
11183 23:00:08.962467 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 skip
11184 23:00:08.962565 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 skip
11185 23:00:08.970665 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 skip
11186 23:00:08.970970 arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 pass
11187 23:00:08.971079 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 skip
11188 23:00:08.971180 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 skip
11189 23:00:08.971268 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 skip
11190 23:00:08.971363 arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 pass
11191 23:00:08.971655 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 skip
11192 23:00:08.971751 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 skip
11193 23:00:08.971869 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 skip
11194 23:00:08.971970 arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 pass
11195 23:00:08.972263 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 skip
11196 23:00:08.972346 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 skip
11197 23:00:08.972432 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 skip
11198 23:00:08.972688 arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 pass
11199 23:00:08.972755 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 skip
11200 23:00:08.972995 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 skip
11201 23:00:08.973061 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 skip
11202 23:00:08.973132 arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 pass
11203 23:00:08.973195 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 skip
11204 23:00:08.973265 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 skip
11205 23:00:08.973352 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 skip
11206 23:00:08.973444 arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 pass
11207 23:00:08.973543 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 skip
11208 23:00:08.973674 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 skip
11209 23:00:08.973987 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 skip
11210 23:00:08.974087 arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 pass
11211 23:00:08.974183 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 skip
11212 23:00:08.974282 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 skip
11213 23:00:08.974380 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 skip
11214 23:00:08.978696 arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 pass
11215 23:00:08.978999 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 skip
11216 23:00:08.979107 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 skip
11217 23:00:08.979410 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 skip
11218 23:00:08.979509 arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 pass
11219 23:00:08.979618 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 skip
11220 23:00:08.979728 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 skip
11221 23:00:08.979817 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 skip
11222 23:00:08.979916 arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 pass
11223 23:00:08.980014 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 skip
11224 23:00:08.980297 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 skip
11225 23:00:08.980397 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 skip
11226 23:00:08.980499 arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 pass
11227 23:00:08.980589 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 skip
11228 23:00:08.980710 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 skip
11229 23:00:08.980856 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 skip
11230 23:00:08.981172 arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 pass
11231 23:00:08.981279 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 skip
11232 23:00:08.981377 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 skip
11233 23:00:08.981460 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 skip
11234 23:00:08.993935 arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 pass
11235 23:00:08.994272 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 skip
11236 23:00:08.994376 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 skip
11237 23:00:08.994460 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 skip
11238 23:00:08.994544 arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 pass
11239 23:00:08.994629 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 skip
11240 23:00:08.994928 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 skip
11241 23:00:08.995246 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 skip
11242 23:00:08.995361 arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 pass
11243 23:00:08.995465 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 skip
11244 23:00:08.995550 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 skip
11245 23:00:08.995649 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 skip
11246 23:00:08.995771 arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 pass
11247 23:00:08.995874 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 skip
11248 23:00:08.996119 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 skip
11249 23:00:08.996423 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 skip
11250 23:00:08.996525 arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 pass
11251 23:00:08.996615 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 skip
11252 23:00:08.996716 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 skip
11253 23:00:08.996825 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 skip
11254 23:00:08.997122 arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 pass
11255 23:00:08.997240 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 skip
11256 23:00:08.997357 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 skip
11257 23:00:08.997701 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 skip
11258 23:00:08.997810 arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 pass
11259 23:00:08.997936 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 skip
11260 23:00:08.998056 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 skip
11261 23:00:08.998184 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 skip
11262 23:00:08.998296 arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 pass
11263 23:00:08.998408 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 skip
11264 23:00:09.002629 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 skip
11265 23:00:09.002935 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 skip
11266 23:00:09.003248 arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 pass
11267 23:00:09.003371 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 skip
11268 23:00:09.003494 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 skip
11269 23:00:09.003593 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 skip
11270 23:00:09.003686 arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 pass
11271 23:00:09.003974 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 skip
11272 23:00:09.004086 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 skip
11273 23:00:09.004384 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 skip
11274 23:00:09.004487 arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 pass
11275 23:00:09.004615 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 skip
11276 23:00:09.004914 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 skip
11277 23:00:09.005037 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 skip
11278 23:00:09.005157 arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 pass
11279 23:00:09.005458 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 skip
11280 23:00:09.005758 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 skip
11281 23:00:09.005864 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 skip
11282 23:00:09.005953 arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 pass
11283 23:00:09.006054 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 skip
11284 23:00:09.006155 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 skip
11285 23:00:09.006265 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 skip
11286 23:00:09.006568 arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 pass
11287 23:00:09.010656 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 skip
11288 23:00:09.011036 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 skip
11289 23:00:09.011142 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 skip
11290 23:00:09.011518 arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 pass
11291 23:00:09.011716 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 skip
11292 23:00:09.011878 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 skip
11293 23:00:09.012064 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 skip
11294 23:00:09.012221 arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 pass
11295 23:00:09.012358 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 skip
11296 23:00:09.012503 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 skip
11297 23:00:09.012632 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 skip
11298 23:00:09.012761 arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 pass
11299 23:00:09.012908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 skip
11300 23:00:09.013028 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 skip
11301 23:00:09.013153 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 skip
11302 23:00:09.013302 arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 pass
11303 23:00:09.013431 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 skip
11304 23:00:09.013576 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 skip
11305 23:00:09.013720 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 skip
11306 23:00:09.013865 arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 pass
11307 23:00:09.013990 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 skip
11308 23:00:09.014180 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 skip
11309 23:00:09.014330 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 skip
11310 23:00:09.014480 arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 pass
11311 23:00:09.014595 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 skip
11312 23:00:09.021797 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 skip
11313 23:00:09.022033 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 skip
11314 23:00:09.022114 arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 pass
11315 23:00:09.022189 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 skip
11316 23:00:09.022262 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 skip
11317 23:00:09.022335 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 skip
11318 23:00:09.022410 arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 pass
11319 23:00:09.022483 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 skip
11320 23:00:09.022555 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 skip
11321 23:00:09.022627 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 skip
11322 23:00:09.022698 arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 pass
11323 23:00:09.022769 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 skip
11324 23:00:09.022841 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 skip
11325 23:00:09.022913 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 skip
11326 23:00:09.022984 arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 pass
11327 23:00:09.023055 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 skip
11328 23:00:09.023126 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 skip
11329 23:00:09.023197 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 skip
11330 23:00:09.023268 arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 pass
11331 23:00:09.023339 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 skip
11332 23:00:09.023624 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 skip
11333 23:00:09.023716 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 skip
11334 23:00:09.023809 arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 pass
11335 23:00:09.023887 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 skip
11336 23:00:09.026778 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 skip
11337 23:00:09.027103 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 skip
11338 23:00:09.027218 arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 pass
11339 23:00:09.027365 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 skip
11340 23:00:09.027480 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 skip
11341 23:00:09.027821 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 skip
11342 23:00:09.027949 arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 pass
11343 23:00:09.028058 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 skip
11344 23:00:09.028357 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 skip
11345 23:00:09.028453 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 skip
11346 23:00:09.028556 arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 pass
11347 23:00:09.028834 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 skip
11348 23:00:09.028925 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 skip
11349 23:00:09.029024 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 skip
11350 23:00:09.029124 arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 pass
11351 23:00:09.029409 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 skip
11352 23:00:09.029685 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 skip
11353 23:00:09.029776 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 skip
11354 23:00:09.029873 arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 pass
11355 23:00:09.029970 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 skip
11356 23:00:09.030254 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 skip
11357 23:00:09.030360 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 skip
11358 23:00:09.030469 arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 pass
11359 23:00:09.034846 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 skip
11360 23:00:09.035214 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 skip
11361 23:00:09.035310 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 skip
11362 23:00:09.035413 arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 pass
11363 23:00:09.035505 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 skip
11364 23:00:09.035606 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 skip
11365 23:00:09.035709 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 skip
11366 23:00:09.035819 arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 pass
11367 23:00:09.036111 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 skip
11368 23:00:09.050261 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 skip
11369 23:00:09.050511 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 skip
11370 23:00:09.050822 arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 pass
11371 23:00:09.050931 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 skip
11372 23:00:09.051039 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 skip
11373 23:00:09.051127 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 skip
11374 23:00:09.051210 arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 pass
11375 23:00:09.051307 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 skip
11376 23:00:09.051390 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 skip
11377 23:00:09.052183 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 skip
11378 23:00:09.052295 arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 pass
11379 23:00:09.052380 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 skip
11380 23:00:09.052463 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 skip
11381 23:00:09.052548 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 skip
11382 23:00:09.052657 arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 pass
11383 23:00:09.052986 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 skip
11384 23:00:09.053093 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 skip
11385 23:00:09.053182 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 skip
11386 23:00:09.053267 arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 pass
11387 23:00:09.053353 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 skip
11388 23:00:09.053442 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 skip
11389 23:00:09.053526 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 skip
11390 23:00:09.053609 arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 pass
11391 23:00:09.053698 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 skip
11392 23:00:09.053799 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 skip
11393 23:00:09.053885 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 skip
11394 23:00:09.053967 arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 pass
11395 23:00:09.054048 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 skip
11396 23:00:09.054130 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 skip
11397 23:00:09.054236 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 skip
11398 23:00:09.054321 arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 pass
11399 23:00:09.054404 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 skip
11400 23:00:09.054485 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 skip
11401 23:00:09.054590 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 skip
11402 23:00:09.054676 arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 pass
11403 23:00:09.059176 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 skip
11404 23:00:09.059368 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 skip
11405 23:00:09.059462 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 skip
11406 23:00:09.059551 arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 pass
11407 23:00:09.059638 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 skip
11408 23:00:09.059935 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 skip
11409 23:00:09.060040 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 skip
11410 23:00:09.060131 arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 pass
11411 23:00:09.060218 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 skip
11412 23:00:09.060323 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 skip
11413 23:00:09.060416 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 skip
11414 23:00:09.060501 arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 pass
11415 23:00:09.060603 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 skip
11416 23:00:09.060689 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 skip
11417 23:00:09.060795 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 skip
11418 23:00:09.060901 arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 pass
11419 23:00:09.061195 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 skip
11420 23:00:09.061288 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 skip
11421 23:00:09.061388 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 skip
11422 23:00:09.061489 arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 pass
11423 23:00:09.061590 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 skip
11424 23:00:09.061898 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 skip
11425 23:00:09.062006 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 skip
11426 23:00:09.062111 arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 pass
11427 23:00:09.062401 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 skip
11428 23:00:09.062508 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 skip
11429 23:00:09.066664 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 skip
11430 23:00:09.066972 arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 pass
11431 23:00:09.067048 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 skip
11432 23:00:09.067127 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 skip
11433 23:00:09.067417 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 skip
11434 23:00:09.067520 arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 pass
11435 23:00:09.067629 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 skip
11436 23:00:09.067908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 skip
11437 23:00:09.068003 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 skip
11438 23:00:09.068259 arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 pass
11439 23:00:09.068340 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 skip
11440 23:00:09.068596 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 skip
11441 23:00:09.068677 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 skip
11442 23:00:09.068929 arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 pass
11443 23:00:09.069001 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 skip
11444 23:00:09.069252 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 skip
11445 23:00:09.069509 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 skip
11446 23:00:09.069579 arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 pass
11447 23:00:09.069841 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 skip
11448 23:00:09.069912 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 skip
11449 23:00:09.069994 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 skip
11450 23:00:09.070246 arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 pass
11451 23:00:09.070327 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 skip
11452 23:00:09.070402 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 skip
11453 23:00:09.074669 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 skip
11454 23:00:09.074977 arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 pass
11455 23:00:09.075052 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 skip
11456 23:00:09.075130 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 skip
11457 23:00:09.075405 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 skip
11458 23:00:09.075520 arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 pass
11459 23:00:09.075813 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 skip
11460 23:00:09.075908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 skip
11461 23:00:09.076174 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 skip
11462 23:00:09.076247 arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 pass
11463 23:00:09.076340 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 skip
11464 23:00:09.076616 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 skip
11465 23:00:09.076701 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 skip
11466 23:00:09.076787 arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 pass
11467 23:00:09.077050 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 skip
11468 23:00:09.077135 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 skip
11469 23:00:09.077398 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 skip
11470 23:00:09.077670 arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 pass
11471 23:00:09.077743 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 skip
11472 23:00:09.077842 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 skip
11473 23:00:09.078105 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 skip
11474 23:00:09.078176 arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 pass
11475 23:00:09.078268 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 skip
11476 23:00:09.078539 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 skip
11477 23:00:09.086872 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 skip
11478 23:00:09.087113 arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 pass
11479 23:00:09.087212 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 skip
11480 23:00:09.087308 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 skip
11481 23:00:09.087388 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 skip
11482 23:00:09.087470 arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 pass
11483 23:00:09.087550 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 skip
11484 23:00:09.087626 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 skip
11485 23:00:09.087706 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 skip
11486 23:00:09.087787 arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 pass
11487 23:00:09.088085 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 skip
11488 23:00:09.088187 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 skip
11489 23:00:09.088275 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 skip
11490 23:00:09.088362 arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 pass
11491 23:00:09.088451 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 skip
11492 23:00:09.088539 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 skip
11493 23:00:09.088644 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 skip
11494 23:00:09.088733 arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 pass
11495 23:00:09.088821 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 skip
11496 23:00:09.088909 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 skip
11497 23:00:09.088995 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 skip
11498 23:00:09.089081 arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 pass
11499 23:00:09.089184 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 skip
11500 23:00:09.089273 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 skip
11501 23:00:09.089375 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 skip
11502 23:00:09.105554 arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 pass
11503 23:00:09.105944 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 skip
11504 23:00:09.106021 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 skip
11505 23:00:09.106101 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 skip
11506 23:00:09.106180 arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 pass
11507 23:00:09.106412 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 skip
11508 23:00:09.106729 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 skip
11509 23:00:09.106848 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 skip
11510 23:00:09.106972 arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 pass
11511 23:00:09.107267 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 skip
11512 23:00:09.107383 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 skip
11513 23:00:09.107492 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 skip
11514 23:00:09.107600 arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 pass
11515 23:00:09.107907 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 skip
11516 23:00:09.108219 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 skip
11517 23:00:09.108318 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 skip
11518 23:00:09.108425 arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 pass
11519 23:00:09.108722 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 skip
11520 23:00:09.108832 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 skip
11521 23:00:09.108943 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 skip
11522 23:00:09.109055 arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 pass
11523 23:00:09.109347 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 skip
11524 23:00:09.109642 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 skip
11525 23:00:09.109792 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 skip
11526 23:00:09.109896 arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 pass
11527 23:00:09.110001 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 skip
11528 23:00:09.110280 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 skip
11529 23:00:09.110581 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 skip
11530 23:00:09.114676 arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 pass
11531 23:00:09.114970 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 skip
11532 23:00:09.115060 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 skip
11533 23:00:09.115335 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 skip
11534 23:00:09.115449 arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 pass
11535 23:00:09.115567 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 skip
11536 23:00:09.115847 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 skip
11537 23:00:09.115970 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 skip
11538 23:00:09.116081 arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 pass
11539 23:00:09.116373 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 skip
11540 23:00:09.116481 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 skip
11541 23:00:09.116784 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 skip
11542 23:00:09.116894 arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 pass
11543 23:00:09.116996 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 skip
11544 23:00:09.117288 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 skip
11545 23:00:09.117395 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 skip
11546 23:00:09.117700 arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 pass
11547 23:00:09.117823 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 skip
11548 23:00:09.117929 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 skip
11549 23:00:09.118222 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 skip
11550 23:00:09.118336 arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 pass
11551 23:00:09.122670 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 skip
11552 23:00:09.123033 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 skip
11553 23:00:09.123135 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 skip
11554 23:00:09.123247 arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 pass
11555 23:00:09.123358 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 skip
11556 23:00:09.123667 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 skip
11557 23:00:09.123787 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 skip
11558 23:00:09.123892 arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 pass
11559 23:00:09.124213 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 skip
11560 23:00:09.124325 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 skip
11561 23:00:09.124619 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 skip
11562 23:00:09.124718 arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 pass
11563 23:00:09.124826 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 skip
11564 23:00:09.125120 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 skip
11565 23:00:09.125251 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 skip
11566 23:00:09.125537 arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 pass
11567 23:00:09.125631 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 skip
11568 23:00:09.125755 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 skip
11569 23:00:09.126049 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 skip
11570 23:00:09.126156 arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 pass
11571 23:00:09.126454 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 skip
11572 23:00:09.130650 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 skip
11573 23:00:09.130986 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 skip
11574 23:00:09.131076 arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 pass
11575 23:00:09.131356 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 skip
11576 23:00:09.131456 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 skip
11577 23:00:09.131734 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 skip
11578 23:00:09.131815 arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 pass
11579 23:00:09.131890 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 skip
11580 23:00:09.132151 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 skip
11581 23:00:09.132241 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 skip
11582 23:00:09.132491 arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 pass
11583 23:00:09.132567 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 skip
11584 23:00:09.132831 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 skip
11585 23:00:09.132922 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 skip
11586 23:00:09.133171 arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 pass
11587 23:00:09.133419 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 skip
11588 23:00:09.133505 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 skip
11589 23:00:09.133755 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 skip
11590 23:00:09.133832 arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 pass
11591 23:00:09.134080 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 skip
11592 23:00:09.134156 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 skip
11593 23:00:09.134428 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 skip
11594 23:00:09.138653 arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 pass
11595 23:00:09.138962 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 skip
11596 23:00:09.139042 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 skip
11597 23:00:09.139314 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 skip
11598 23:00:09.139404 arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 pass
11599 23:00:09.139500 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 skip
11600 23:00:09.139779 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 skip
11601 23:00:09.139868 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 skip
11602 23:00:09.140117 arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 pass
11603 23:00:09.140369 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 skip
11604 23:00:09.140444 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 skip
11605 23:00:09.140707 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 skip
11606 23:00:09.140782 arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 pass
11607 23:00:09.141038 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 skip
11608 23:00:09.141288 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 skip
11609 23:00:09.141365 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 skip
11610 23:00:09.141610 arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 pass
11611 23:00:09.141899 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 skip
11612 23:00:09.142018 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 skip
11613 23:00:09.142119 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 skip
11614 23:00:09.142415 arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 pass
11615 23:00:09.142718 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 skip
11616 23:00:09.146788 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 skip
11617 23:00:09.147367 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 skip
11618 23:00:09.147669 arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 pass
11619 23:00:09.147773 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 skip
11620 23:00:09.147861 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 skip
11621 23:00:09.147947 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 skip
11622 23:00:09.148230 arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 pass
11623 23:00:09.148324 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 skip
11624 23:00:09.148411 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 skip
11625 23:00:09.148497 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 skip
11626 23:00:09.148582 arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 pass
11627 23:00:09.148692 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 skip
11628 23:00:09.148781 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 skip
11629 23:00:09.148883 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 skip
11630 23:00:09.148969 arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 pass
11631 23:00:09.149071 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 skip
11632 23:00:09.149160 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 skip
11633 23:00:09.149258 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 skip
11634 23:00:09.149359 arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 pass
11635 23:00:09.149459 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 skip
11636 23:00:09.163211 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 skip
11637 23:00:09.163474 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 skip
11638 23:00:09.163778 arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 pass
11639 23:00:09.163861 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 skip
11640 23:00:09.163930 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 skip
11641 23:00:09.164007 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 skip
11642 23:00:09.164073 arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 pass
11643 23:00:09.164341 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 skip
11644 23:00:09.164435 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 skip
11645 23:00:09.164686 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 skip
11646 23:00:09.164935 arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 pass
11647 23:00:09.165012 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 skip
11648 23:00:09.165114 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 skip
11649 23:00:09.165376 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 skip
11650 23:00:09.165450 arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 pass
11651 23:00:09.165676 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 skip
11652 23:00:09.165952 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 skip
11653 23:00:09.166044 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 skip
11654 23:00:09.166135 arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 pass
11655 23:00:09.166389 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 skip
11656 23:00:09.170850 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 skip
11657 23:00:09.171176 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 skip
11658 23:00:09.171262 arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 pass
11659 23:00:09.171372 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 skip
11660 23:00:09.171447 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 skip
11661 23:00:09.171740 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 skip
11662 23:00:09.171828 arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 pass
11663 23:00:09.171908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 skip
11664 23:00:09.172325 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 skip
11665 23:00:09.172391 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 skip
11666 23:00:09.172636 arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 pass
11667 23:00:09.172716 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 skip
11668 23:00:09.172962 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 skip
11669 23:00:09.173225 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 skip
11670 23:00:09.173301 arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 pass
11671 23:00:09.173544 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 skip
11672 23:00:09.173794 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 skip
11673 23:00:09.174045 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 skip
11674 23:00:09.174111 arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 pass
11675 23:00:09.174183 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 skip
11676 23:00:09.174429 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 skip
11677 23:00:09.178803 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 skip
11678 23:00:09.179181 arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 pass
11679 23:00:09.179268 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 skip
11680 23:00:09.179366 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 skip
11681 23:00:09.179470 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 skip
11682 23:00:09.179586 arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 pass
11683 23:00:09.179690 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 skip
11684 23:00:09.179800 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 skip
11685 23:00:09.180098 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 skip
11686 23:00:09.180209 arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 pass
11687 23:00:09.180309 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 skip
11688 23:00:09.180594 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 skip
11689 23:00:09.180702 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 skip
11690 23:00:09.180983 arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 pass
11691 23:00:09.181097 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 skip
11692 23:00:09.181196 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 skip
11693 23:00:09.181283 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 skip
11694 23:00:09.181543 arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 pass
11695 23:00:09.181804 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 skip
11696 23:00:09.181909 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 skip
11697 23:00:09.182228 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 skip
11698 23:00:09.182332 arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 pass
11699 23:00:09.182426 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 skip
11700 23:00:09.182530 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 skip
11701 23:00:09.186866 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 skip
11702 23:00:09.187024 arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 pass
11703 23:00:09.187516 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 skip
11704 23:00:09.187611 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 skip
11705 23:00:09.187676 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 skip
11706 23:00:09.187750 arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 pass
11707 23:00:09.187813 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 skip
11708 23:00:09.188065 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 skip
11709 23:00:09.188148 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 skip
11710 23:00:09.188413 arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 pass
11711 23:00:09.188659 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 skip
11712 23:00:09.188735 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 skip
11713 23:00:09.188983 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 skip
11714 23:00:09.189050 arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 pass
11715 23:00:09.189308 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 skip
11716 23:00:09.189558 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 skip
11717 23:00:09.189623 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 skip
11718 23:00:09.189715 arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 pass
11719 23:00:09.189962 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 skip
11720 23:00:09.190211 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 skip
11721 23:00:09.190285 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 skip
11722 23:00:09.190532 arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 pass
11723 23:00:09.194850 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 skip
11724 23:00:09.195332 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 skip
11725 23:00:09.195439 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 skip
11726 23:00:09.195530 arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 pass
11727 23:00:09.195633 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 skip
11728 23:00:09.195728 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 skip
11729 23:00:09.195830 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 skip
11730 23:00:09.195927 arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 pass
11731 23:00:09.196023 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 skip
11732 23:00:09.196290 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 skip
11733 23:00:09.196389 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 skip
11734 23:00:09.196505 arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 pass
11735 23:00:09.196611 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 skip
11736 23:00:09.196914 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 skip
11737 23:00:09.197024 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 skip
11738 23:00:09.197125 arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 pass
11739 23:00:09.197217 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 skip
11740 23:00:09.197326 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 skip
11741 23:00:09.197584 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 skip
11742 23:00:09.197750 arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 pass
11743 23:00:09.197839 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 skip
11744 23:00:09.197936 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 skip
11745 23:00:09.198035 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 skip
11746 23:00:09.198330 arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 pass
11747 23:00:09.198491 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 skip
11748 23:00:09.198583 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 skip
11749 23:00:09.202924 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 skip
11750 23:00:09.203454 arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 pass
11751 23:00:09.203558 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 skip
11752 23:00:09.203645 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 skip
11753 23:00:09.203774 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 skip
11754 23:00:09.203868 arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 pass
11755 23:00:09.203969 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 skip
11756 23:00:09.204072 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 skip
11757 23:00:09.204175 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 skip
11758 23:00:09.204279 arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 pass
11759 23:00:09.204380 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 skip
11760 23:00:09.204685 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 skip
11761 23:00:09.204808 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 skip
11762 23:00:09.204906 arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 pass
11763 23:00:09.205196 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 skip
11764 23:00:09.205311 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 skip
11765 23:00:09.205405 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 skip
11766 23:00:09.205497 arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 pass
11767 23:00:09.205786 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 skip
11768 23:00:09.206062 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 skip
11769 23:00:09.206157 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 skip
11770 23:00:09.221774 arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 pass
11771 23:00:09.222022 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 skip
11772 23:00:09.222291 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 skip
11773 23:00:09.222396 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 skip
11774 23:00:09.222484 arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 pass
11775 23:00:09.222570 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 skip
11776 23:00:09.222670 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 skip
11777 23:00:09.223002 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 skip
11778 23:00:09.223084 arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 pass
11779 23:00:09.223354 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 skip
11780 23:00:09.223476 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 skip
11781 23:00:09.223580 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 skip
11782 23:00:09.223684 arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 pass
11783 23:00:09.223775 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 skip
11784 23:00:09.223888 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 skip
11785 23:00:09.224197 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 skip
11786 23:00:09.224310 arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 pass
11787 23:00:09.224411 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 skip
11788 23:00:09.224757 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 skip
11789 23:00:09.224865 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 skip
11790 23:00:09.224962 arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 pass
11791 23:00:09.225058 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 skip
11792 23:00:09.225344 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 skip
11793 23:00:09.225439 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 skip
11794 23:00:09.225701 arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 pass
11795 23:00:09.225799 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 skip
11796 23:00:09.225897 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 skip
11797 23:00:09.225988 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 skip
11798 23:00:09.226080 arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 pass
11799 23:00:09.226171 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 skip
11800 23:00:09.226449 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 skip
11801 23:00:09.226539 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 skip
11802 23:00:09.226641 arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 pass
11803 23:00:09.230984 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 skip
11804 23:00:09.231149 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 skip
11805 23:00:09.231243 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 skip
11806 23:00:09.231521 arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 pass
11807 23:00:09.231623 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 skip
11808 23:00:09.231726 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 skip
11809 23:00:09.232027 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 skip
11810 23:00:09.232130 arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 pass
11811 23:00:09.232235 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 skip
11812 23:00:09.232338 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 skip
11813 23:00:09.232442 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 skip
11814 23:00:09.232752 arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 pass
11815 23:00:09.232860 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 skip
11816 23:00:09.233119 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 skip
11817 23:00:09.233232 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 skip
11818 23:00:09.233325 arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 pass
11819 23:00:09.233611 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 skip
11820 23:00:09.233715 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 skip
11821 23:00:09.234164 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 skip
11822 23:00:09.234247 arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 pass
11823 23:00:09.234341 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 skip
11824 23:00:09.234461 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 skip
11825 23:00:09.238848 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 skip
11826 23:00:09.239209 arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 pass
11827 23:00:09.239302 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 skip
11828 23:00:09.239407 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 skip
11829 23:00:09.239523 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 skip
11830 23:00:09.239612 arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 pass
11831 23:00:09.239701 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 skip
11832 23:00:09.239950 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 skip
11833 23:00:09.240201 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 skip
11834 23:00:09.240267 arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 pass
11835 23:00:09.240525 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 skip
11836 23:00:09.241024 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 skip
11837 23:00:09.241121 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 skip
11838 23:00:09.241204 arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 pass
11839 23:00:09.241473 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 skip
11840 23:00:09.241565 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 skip
11841 23:00:09.241676 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 skip
11842 23:00:09.241783 arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 pass
11843 23:00:09.241886 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 skip
11844 23:00:09.241987 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 skip
11845 23:00:09.242444 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 skip
11846 23:00:09.242548 arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 pass
11847 23:00:09.242630 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 skip
11848 23:00:09.246801 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 skip
11849 23:00:09.247137 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 skip
11850 23:00:09.247206 arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 pass
11851 23:00:09.247294 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 skip
11852 23:00:09.247406 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 skip
11853 23:00:09.247508 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 skip
11854 23:00:09.247799 arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 pass
11855 23:00:09.247915 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 skip
11856 23:00:09.248013 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 skip
11857 23:00:09.248303 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 skip
11858 23:00:09.248395 arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 pass
11859 23:00:09.248679 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 skip
11860 23:00:09.248783 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 skip
11861 23:00:09.248879 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 skip
11862 23:00:09.249166 arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 pass
11863 23:00:09.249258 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 skip
11864 23:00:09.249359 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 skip
11865 23:00:09.249661 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 skip
11866 23:00:09.249756 arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 pass
11867 23:00:09.249856 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 skip
11868 23:00:09.250129 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 skip
11869 23:00:09.250249 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 skip
11870 23:00:09.250354 arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 pass
11871 23:00:09.254663 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 skip
11872 23:00:09.254986 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 skip
11873 23:00:09.255065 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 skip
11874 23:00:09.255140 arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 pass
11875 23:00:09.255221 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 skip
11876 23:00:09.255522 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 skip
11877 23:00:09.255647 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 skip
11878 23:00:09.255751 arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 pass
11879 23:00:09.255866 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 skip
11880 23:00:09.256158 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 skip
11881 23:00:09.256270 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 skip
11882 23:00:09.256378 arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 pass
11883 23:00:09.256480 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 skip
11884 23:00:09.256789 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 skip
11885 23:00:09.257077 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 skip
11886 23:00:09.257172 arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 pass
11887 23:00:09.257275 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 skip
11888 23:00:09.257369 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 skip
11889 23:00:09.257491 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 skip
11890 23:00:09.257796 arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 pass
11891 23:00:09.257902 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 skip
11892 23:00:09.258193 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 skip
11893 23:00:09.258285 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 skip
11894 23:00:09.258386 arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 pass
11895 23:00:09.258489 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 skip
11896 23:00:09.263050 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 skip
11897 23:00:09.263284 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 skip
11898 23:00:09.263379 arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 pass
11899 23:00:09.263488 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 skip
11900 23:00:09.263576 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 skip
11901 23:00:09.263675 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 skip
11902 23:00:09.263783 arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 pass
11903 23:00:09.264082 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 skip
11904 23:00:09.277637 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 skip
11905 23:00:09.278070 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 skip
11906 23:00:09.278177 arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 pass
11907 23:00:09.278265 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 skip
11908 23:00:09.278356 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 skip
11909 23:00:09.278470 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 skip
11910 23:00:09.278575 arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 pass
11911 23:00:09.278884 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 skip
11912 23:00:09.278985 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 skip
11913 23:00:09.279273 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 skip
11914 23:00:09.279354 arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 pass
11915 23:00:09.279672 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 skip
11916 23:00:09.279817 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 skip
11917 23:00:09.279966 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 skip
11918 23:00:09.280064 arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 pass
11919 23:00:09.280170 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 skip
11920 23:00:09.280276 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 skip
11921 23:00:09.280581 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 skip
11922 23:00:09.280674 arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 pass
11923 23:00:09.280780 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 skip
11924 23:00:09.281070 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 skip
11925 23:00:09.281178 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 skip
11926 23:00:09.281279 arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 pass
11927 23:00:09.281573 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 skip
11928 23:00:09.281699 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 skip
11929 23:00:09.281987 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 skip
11930 23:00:09.282076 arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 pass
11931 23:00:09.282370 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 skip
11932 23:00:09.282474 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 skip
11933 23:00:09.286680 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 skip
11934 23:00:09.287088 arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 pass
11935 23:00:09.287176 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 skip
11936 23:00:09.287277 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 skip
11937 23:00:09.287388 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 skip
11938 23:00:09.287468 arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 pass
11939 23:00:09.287567 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 skip
11940 23:00:09.287658 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 skip
11941 23:00:09.287925 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 skip
11942 23:00:09.288028 arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 pass
11943 23:00:09.288128 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 skip
11944 23:00:09.288410 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 skip
11945 23:00:09.288517 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 skip
11946 23:00:09.288630 arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 pass
11947 23:00:09.288917 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 skip
11948 23:00:09.289018 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 skip
11949 23:00:09.289133 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 skip
11950 23:00:09.289244 arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 pass
11951 23:00:09.289367 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 skip
11952 23:00:09.289670 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 skip
11953 23:00:09.289773 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 skip
11954 23:00:09.289886 arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 pass
11955 23:00:09.290003 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 skip
11956 23:00:09.290299 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 skip
11957 23:00:09.290405 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 skip
11958 23:00:09.294634 arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 pass
11959 23:00:09.294998 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 skip
11960 23:00:09.295089 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 skip
11961 23:00:09.295200 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 skip
11962 23:00:09.295325 arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 pass
11963 23:00:09.295618 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 skip
11964 23:00:09.297149 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 skip
11965 23:00:09.297233 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 skip
11966 23:00:09.297330 arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 pass
11967 23:00:09.297417 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 skip
11968 23:00:09.297497 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 skip
11969 23:00:09.297577 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 skip
11970 23:00:09.297679 arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 pass
11971 23:00:09.297763 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 skip
11972 23:00:09.297846 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 skip
11973 23:00:09.297937 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 skip
11974 23:00:09.298009 arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 pass
11975 23:00:09.298076 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 skip
11976 23:00:09.298172 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 skip
11977 23:00:09.298246 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 skip
11978 23:00:09.298307 arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 pass
11979 23:00:09.298370 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 skip
11980 23:00:09.298686 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 skip
11981 23:00:09.298789 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 skip
11982 23:00:09.298868 arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 pass
11983 23:00:09.298947 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 skip
11984 23:00:09.299022 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 skip
11985 23:00:09.299097 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 skip
11986 23:00:09.299176 arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 pass
11987 23:00:09.299256 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 skip
11988 23:00:09.299336 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 skip
11989 23:00:09.299432 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 skip
11990 23:00:09.299513 arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 pass
11991 23:00:09.299590 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 skip
11992 23:00:09.300090 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 skip
11993 23:00:09.300178 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 skip
11994 23:00:09.300244 arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 pass
11995 23:00:09.300346 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 skip
11996 23:00:09.300440 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 skip
11997 23:00:09.300522 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 skip
11998 23:00:09.300601 arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 pass
11999 23:00:09.300682 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 skip
12000 23:00:09.306637 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 skip
12001 23:00:09.307037 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 skip
12002 23:00:09.307135 arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 pass
12003 23:00:09.307223 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 skip
12004 23:00:09.307327 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 skip
12005 23:00:09.307429 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 skip
12006 23:00:09.307736 arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 pass
12007 23:00:09.307843 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 skip
12008 23:00:09.307956 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 skip
12009 23:00:09.308250 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 skip
12010 23:00:09.308346 arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 pass
12011 23:00:09.308448 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 skip
12012 23:00:09.308553 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 skip
12013 23:00:09.308850 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 skip
12014 23:00:09.308962 arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 pass
12015 23:00:09.309066 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 skip
12016 23:00:09.309365 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 skip
12017 23:00:09.309485 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 skip
12018 23:00:09.309790 arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 pass
12019 23:00:09.309895 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 skip
12020 23:00:09.310001 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 skip
12021 23:00:09.310296 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 skip
12022 23:00:09.310398 arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 pass
12023 23:00:09.310502 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 skip
12024 23:00:09.314807 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 skip
12025 23:00:09.314938 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 skip
12026 23:00:09.315020 arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 pass
12027 23:00:09.315293 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 skip
12028 23:00:09.315406 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 skip
12029 23:00:09.315506 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 skip
12030 23:00:09.315604 arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 pass
12031 23:00:09.315887 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 skip
12032 23:00:09.315989 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 skip
12033 23:00:09.316080 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 skip
12034 23:00:09.316176 arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 pass
12035 23:00:09.316439 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 skip
12036 23:00:09.316525 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 skip
12037 23:00:09.316789 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 skip
12038 23:00:09.330381 arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 pass
12039 23:00:09.330782 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 skip
12040 23:00:09.330877 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 skip
12041 23:00:09.331154 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 skip
12042 23:00:09.331241 arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 pass
12043 23:00:09.331372 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 skip
12044 23:00:09.331553 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 skip
12045 23:00:09.331673 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 skip
12046 23:00:09.331777 arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 pass
12047 23:00:09.331878 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 skip
12048 23:00:09.332163 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 skip
12049 23:00:09.332256 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 skip
12050 23:00:09.332336 arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 pass
12051 23:00:09.332602 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 skip
12052 23:00:09.332694 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 skip
12053 23:00:09.332944 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 skip
12054 23:00:09.333012 arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 pass
12055 23:00:09.333259 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 skip
12056 23:00:09.333329 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 skip
12057 23:00:09.333404 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 skip
12058 23:00:09.333694 arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 pass
12059 23:00:09.333785 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 skip
12060 23:00:09.334035 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 skip
12061 23:00:09.334111 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 skip
12062 23:00:09.334185 arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 pass
12063 23:00:09.334432 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 skip
12064 23:00:09.338645 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 skip
12065 23:00:09.338942 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 skip
12066 23:00:09.339047 arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 pass
12067 23:00:09.339149 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 skip
12068 23:00:09.339436 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 skip
12069 23:00:09.339528 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 skip
12070 23:00:09.339793 arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 pass
12071 23:00:09.339867 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 skip
12072 23:00:09.339946 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 skip
12073 23:00:09.340198 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 skip
12074 23:00:09.340281 arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 pass
12075 23:00:09.340357 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 skip
12076 23:00:09.340611 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 skip
12077 23:00:09.340867 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 skip
12078 23:00:09.340941 arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 pass
12079 23:00:09.341019 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 skip
12080 23:00:09.341274 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 skip
12081 23:00:09.341374 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 skip
12082 23:00:09.341481 arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 pass
12083 23:00:09.341759 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 skip
12084 23:00:09.341843 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 skip
12085 23:00:09.342110 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 skip
12086 23:00:09.342201 arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 pass
12087 23:00:09.342278 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 skip
12088 23:00:09.342526 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 skip
12089 23:00:09.346953 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 skip
12090 23:00:09.347162 arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 pass
12091 23:00:09.347272 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 skip
12092 23:00:09.347385 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 skip
12093 23:00:09.347686 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 skip
12094 23:00:09.347995 arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 pass
12095 23:00:09.348106 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 skip
12096 23:00:09.348581 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 skip
12097 23:00:09.348672 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 skip
12098 23:00:09.348930 arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 pass
12099 23:00:09.349190 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 skip
12100 23:00:09.349447 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 skip
12101 23:00:09.349682 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 skip
12102 23:00:09.350105 arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 pass
12103 23:00:09.350353 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 skip
12104 23:00:09.350421 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 skip
12105 23:00:09.354696 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 skip
12106 23:00:09.355033 arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 pass
12107 23:00:09.355106 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 skip
12108 23:00:09.355185 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 skip
12109 23:00:09.355303 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 skip
12110 23:00:09.355604 arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 pass
12111 23:00:09.355699 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 skip
12112 23:00:09.355956 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 skip
12113 23:00:09.356208 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 skip
12114 23:00:09.356274 arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 pass
12115 23:00:09.356520 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 skip
12116 23:00:09.356586 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 skip
12117 23:00:09.356843 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 skip
12118 23:00:09.356919 arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 pass
12119 23:00:09.357167 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 skip
12120 23:00:09.357244 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 skip
12121 23:00:09.357490 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 skip
12122 23:00:09.357566 arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 pass
12123 23:00:09.357815 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 skip
12124 23:00:09.358067 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 skip
12125 23:00:09.358134 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 skip
12126 23:00:09.358206 arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 pass
12127 23:00:09.358280 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 skip
12128 23:00:09.362709 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 skip
12129 23:00:09.363040 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 skip
12130 23:00:09.363116 arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 pass
12131 23:00:09.363198 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 skip
12132 23:00:09.363319 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 skip
12133 23:00:09.363624 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 skip
12134 23:00:09.363743 arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 pass
12135 23:00:09.363849 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 skip
12136 23:00:09.364140 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 skip
12137 23:00:09.364247 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 skip
12138 23:00:09.364350 arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 pass
12139 23:00:09.364639 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 skip
12140 23:00:09.364732 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 skip
12141 23:00:09.364834 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 skip
12142 23:00:09.364944 arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 pass
12143 23:00:09.365240 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 skip
12144 23:00:09.365348 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 skip
12145 23:00:09.365640 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 skip
12146 23:00:09.365745 arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 pass
12147 23:00:09.365848 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 skip
12148 23:00:09.365950 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 skip
12149 23:00:09.366245 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 skip
12150 23:00:09.366339 arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 pass
12151 23:00:09.366441 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 skip
12152 23:00:09.370699 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 skip
12153 23:00:09.371054 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 skip
12154 23:00:09.371135 arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 pass
12155 23:00:09.371214 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 skip
12156 23:00:09.371355 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 skip
12157 23:00:09.371663 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 skip
12158 23:00:09.371751 arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 pass
12159 23:00:09.371830 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 skip
12160 23:00:09.372083 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 skip
12161 23:00:09.372332 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 skip
12162 23:00:09.372401 arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 pass
12163 23:00:09.372477 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 skip
12164 23:00:09.372730 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 skip
12165 23:00:09.372810 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 skip
12166 23:00:09.372898 arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 pass
12167 23:00:09.373156 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 skip
12168 23:00:09.373234 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 skip
12169 23:00:09.373491 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 skip
12170 23:00:09.373560 arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 pass
12171 23:00:09.373634 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 skip
12172 23:00:09.386971 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 skip
12173 23:00:09.387433 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 skip
12174 23:00:09.387542 arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 pass
12175 23:00:09.387635 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 skip
12176 23:00:09.387742 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 skip
12177 23:00:09.387835 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 skip
12178 23:00:09.387938 arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 pass
12179 23:00:09.388044 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 skip
12180 23:00:09.388146 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 skip
12181 23:00:09.388455 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 skip
12182 23:00:09.388564 arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 pass
12183 23:00:09.388844 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 skip
12184 23:00:09.388937 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 skip
12185 23:00:09.389049 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 skip
12186 23:00:09.389347 arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 pass
12187 23:00:09.389441 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 skip
12188 23:00:09.389544 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 skip
12189 23:00:09.389830 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 skip
12190 23:00:09.389922 arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 pass
12191 23:00:09.390024 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 skip
12192 23:00:09.390124 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 skip
12193 23:00:09.390405 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 skip
12194 23:00:09.390501 arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 pass
12195 23:00:09.394729 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 skip
12196 23:00:09.395051 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 skip
12197 23:00:09.395134 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 skip
12198 23:00:09.395234 arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 pass
12199 23:00:09.395512 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 skip
12200 23:00:09.395598 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 skip
12201 23:00:09.395674 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 skip
12202 23:00:09.395926 arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 pass
12203 23:00:09.396003 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 skip
12204 23:00:09.396081 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 skip
12205 23:00:09.396343 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 skip
12206 23:00:09.396655 arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 pass
12207 23:00:09.396750 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 skip
12208 23:00:09.396830 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 skip
12209 23:00:09.396938 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 skip
12210 23:00:09.397046 arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 pass
12211 23:00:09.397350 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 skip
12212 23:00:09.397461 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 skip
12213 23:00:09.397765 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 skip
12214 23:00:09.397855 arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 pass
12215 23:00:09.397926 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 skip
12216 23:00:09.398014 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 skip
12217 23:00:09.398101 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 skip
12218 23:00:09.398225 arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 pass
12219 23:00:09.398349 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 skip
12220 23:00:09.398470 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 skip
12221 23:00:09.402951 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 skip
12222 23:00:09.403321 arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 pass
12223 23:00:09.403652 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 skip
12224 23:00:09.403755 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 skip
12225 23:00:09.403842 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 skip
12226 23:00:09.403926 arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 pass
12227 23:00:09.404009 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 skip
12228 23:00:09.404115 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 skip
12229 23:00:09.404202 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 skip
12230 23:00:09.404288 arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 pass
12231 23:00:09.404370 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 skip
12232 23:00:09.404467 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 skip
12233 23:00:09.404551 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 skip
12234 23:00:09.404647 arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 pass
12235 23:00:09.404962 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 skip
12236 23:00:09.405059 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 skip
12237 23:00:09.405145 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 skip
12238 23:00:09.405243 arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 pass
12239 23:00:09.405328 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 skip
12240 23:00:09.405428 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 skip
12241 23:00:09.405528 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 skip
12242 23:00:09.405629 arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 pass
12243 23:00:09.405740 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 skip
12244 23:00:09.406035 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 skip
12245 23:00:09.406143 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 skip
12246 23:00:09.406244 arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 pass
12247 23:00:09.406329 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 skip
12248 23:00:09.406584 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 skip
12249 23:00:09.410948 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 skip
12250 23:00:09.411264 arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 pass
12251 23:00:09.411586 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 skip
12252 23:00:09.411690 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 skip
12253 23:00:09.411774 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 skip
12254 23:00:09.411852 arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 pass
12255 23:00:09.411931 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 skip
12256 23:00:09.412029 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 skip
12257 23:00:09.412111 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 skip
12258 23:00:09.412195 arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 pass
12259 23:00:09.412277 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 skip
12260 23:00:09.412361 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 skip
12261 23:00:09.412460 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 skip
12262 23:00:09.412544 arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 pass
12263 23:00:09.412626 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 skip
12264 23:00:09.412724 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 skip
12265 23:00:09.412807 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 skip
12266 23:00:09.412906 arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 pass
12267 23:00:09.413005 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 skip
12268 23:00:09.413447 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 skip
12269 23:00:09.413555 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 skip
12270 23:00:09.413642 arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 pass
12271 23:00:09.413786 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 skip
12272 23:00:09.413892 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 skip
12273 23:00:09.413978 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 skip
12274 23:00:09.414058 arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 pass
12275 23:00:09.414162 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 skip
12276 23:00:09.414244 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 skip
12277 23:00:09.414340 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 skip
12278 23:00:09.414424 arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 pass
12279 23:00:09.414521 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 skip
12280 23:00:09.418944 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 skip
12281 23:00:09.419348 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 skip
12282 23:00:09.419687 arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 pass
12283 23:00:09.419785 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 skip
12284 23:00:09.419886 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 skip
12285 23:00:09.419983 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 skip
12286 23:00:09.420056 arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 pass
12287 23:00:09.420158 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 skip
12288 23:00:09.420273 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 skip
12289 23:00:09.420365 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 skip
12290 23:00:09.420464 arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 pass
12291 23:00:09.420560 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 skip
12292 23:00:09.420678 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 skip
12293 23:00:09.420769 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 skip
12294 23:00:09.420869 arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 pass
12295 23:00:09.420988 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 skip
12296 23:00:09.421077 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 skip
12297 23:00:09.421199 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 skip
12298 23:00:09.421312 arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 pass
12299 23:00:09.421453 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 skip
12300 23:00:09.421759 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 skip
12301 23:00:09.421862 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 skip
12302 23:00:09.421972 arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 pass
12303 23:00:09.422087 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 skip
12304 23:00:09.422211 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 skip
12305 23:00:09.422543 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 skip
12306 23:00:09.440223 arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 pass
12307 23:00:09.440508 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 skip
12308 23:00:09.440811 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 skip
12309 23:00:09.440910 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 skip
12310 23:00:09.440987 arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 pass
12311 23:00:09.441061 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 skip
12312 23:00:09.441148 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 skip
12313 23:00:09.441223 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 skip
12314 23:00:09.441297 arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 pass
12315 23:00:09.441383 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 skip
12316 23:00:09.441457 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 skip
12317 23:00:09.441684 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 skip
12318 23:00:09.441776 arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 pass
12319 23:00:09.441863 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 skip
12320 23:00:09.442149 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 skip
12321 23:00:09.442243 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 skip
12322 23:00:09.442333 arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 pass
12323 23:00:09.442794 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 skip
12324 23:00:09.442898 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 skip
12325 23:00:09.442985 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 skip
12326 23:00:09.443262 arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 pass
12327 23:00:09.443355 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 skip
12328 23:00:09.443444 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 skip
12329 23:00:09.443745 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 skip
12330 23:00:09.443824 arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 pass
12331 23:00:09.444080 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 skip
12332 23:00:09.444168 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 skip
12333 23:00:09.444242 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 skip
12334 23:00:09.444331 arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 pass
12335 23:00:09.444597 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 skip
12336 23:00:09.444674 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 skip
12337 23:00:09.444760 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 skip
12338 23:00:09.444872 arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 pass
12339 23:00:09.445168 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 skip
12340 23:00:09.445462 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 skip
12341 23:00:09.445547 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 skip
12342 23:00:09.445636 arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 pass
12343 23:00:09.445739 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 skip
12344 23:00:09.445837 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 skip
12345 23:00:09.446109 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 skip
12346 23:00:09.446195 arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 pass
12347 23:00:09.446485 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 skip
12348 23:00:09.450849 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 skip
12349 23:00:09.451300 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 skip
12350 23:00:09.451391 arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 pass
12351 23:00:09.451464 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 skip
12352 23:00:09.451549 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 skip
12353 23:00:09.451622 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 skip
12354 23:00:09.451706 arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 pass
12355 23:00:09.451779 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 skip
12356 23:00:09.452067 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 skip
12357 23:00:09.452161 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 skip
12358 23:00:09.452251 arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 pass
12359 23:00:09.452529 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 skip
12360 23:00:09.452633 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 skip
12361 23:00:09.452708 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 skip
12362 23:00:09.452792 arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 pass
12363 23:00:09.452876 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 skip
12364 23:00:09.453493 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 skip
12365 23:00:09.454585 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 skip
12366 23:00:09.454743 arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 pass
12367 23:00:09.454840 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 skip
12368 23:00:09.454927 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 skip
12369 23:00:09.455015 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 skip
12370 23:00:09.455105 arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 pass
12371 23:00:09.455193 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 skip
12372 23:00:09.455280 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 skip
12373 23:00:09.455364 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 skip
12374 23:00:09.462704 arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 pass
12375 23:00:09.463226 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 skip
12376 23:00:09.463328 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 skip
12377 23:00:09.463413 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 skip
12378 23:00:09.463498 arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 pass
12379 23:00:09.463594 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 skip
12380 23:00:09.463680 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 skip
12381 23:00:09.463779 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 skip
12382 23:00:09.463877 arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 pass
12383 23:00:09.463976 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 skip
12384 23:00:09.464268 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 skip
12385 23:00:09.464371 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 skip
12386 23:00:09.464456 arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 pass
12387 23:00:09.464553 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 skip
12388 23:00:09.464651 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 skip
12389 23:00:09.464934 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 skip
12390 23:00:09.465024 arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 pass
12391 23:00:09.465120 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 skip
12392 23:00:09.465219 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 skip
12393 23:00:09.465489 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 skip
12394 23:00:09.465569 arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 pass
12395 23:00:09.465671 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 skip
12396 23:00:09.465832 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 skip
12397 23:00:09.465932 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 skip
12398 23:00:09.466026 arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 pass
12399 23:00:09.466121 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 skip
12400 23:00:09.466400 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 skip
12401 23:00:09.466499 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 skip
12402 23:00:09.470722 arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 pass
12403 23:00:09.471198 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 skip
12404 23:00:09.471302 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 skip
12405 23:00:09.471382 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 skip
12406 23:00:09.471476 arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 pass
12407 23:00:09.471567 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 skip
12408 23:00:09.471645 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 skip
12409 23:00:09.471768 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 skip
12410 23:00:09.471854 arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 pass
12411 23:00:09.471942 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 skip
12412 23:00:09.472033 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 skip
12413 23:00:09.472329 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 skip
12414 23:00:09.472435 arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 pass
12415 23:00:09.472540 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 skip
12416 23:00:09.472638 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 skip
12417 23:00:09.472734 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 skip
12418 23:00:09.473037 arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 pass
12419 23:00:09.473142 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 skip
12420 23:00:09.473248 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 skip
12421 23:00:09.473430 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 skip
12422 23:00:09.473817 arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 pass
12423 23:00:09.473921 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 skip
12424 23:00:09.474007 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 skip
12425 23:00:09.474096 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 skip
12426 23:00:09.474203 arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 pass
12427 23:00:09.474301 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 skip
12428 23:00:09.474394 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 skip
12429 23:00:09.474498 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 skip
12430 23:00:09.478790 arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 pass
12431 23:00:09.478986 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 skip
12432 23:00:09.479292 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 skip
12433 23:00:09.479385 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 skip
12434 23:00:09.479495 arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 pass
12435 23:00:09.479598 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 skip
12436 23:00:09.479900 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 skip
12437 23:00:09.479989 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 skip
12438 23:00:09.480107 arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 pass
12439 23:00:09.480217 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 skip
12440 23:00:09.494144 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 skip
12441 23:00:09.494623 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 skip
12442 23:00:09.494731 arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 pass
12443 23:00:09.494826 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 skip
12444 23:00:09.494940 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 skip
12445 23:00:09.495449 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 skip
12446 23:00:09.495576 arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 pass
12447 23:00:09.495887 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 skip
12448 23:00:09.496082 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 skip
12449 23:00:09.496389 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 skip
12450 23:00:09.496511 arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 pass
12451 23:00:09.496615 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 skip
12452 23:00:09.496938 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 skip
12453 23:00:09.497061 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 skip
12454 23:00:09.497163 arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 pass
12455 23:00:09.497264 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 skip
12456 23:00:09.497567 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 skip
12457 23:00:09.497700 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 skip
12458 23:00:09.497804 arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 pass
12459 23:00:09.498015 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 skip
12460 23:00:09.498140 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 skip
12461 23:00:09.498454 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 skip
12462 23:00:09.498559 arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 pass
12463 23:00:09.502703 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 skip
12464 23:00:09.503820 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 skip
12465 23:00:09.504004 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 skip
12466 23:00:09.504105 arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 pass
12467 23:00:09.504193 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 skip
12468 23:00:09.504280 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 skip
12469 23:00:09.504365 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 skip
12470 23:00:09.504449 arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 pass
12471 23:00:09.504533 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 skip
12472 23:00:09.504639 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 skip
12473 23:00:09.504727 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 skip
12474 23:00:09.504813 arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 pass
12475 23:00:09.504898 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 skip
12476 23:00:09.504982 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 skip
12477 23:00:09.505084 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 skip
12478 23:00:09.505172 arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 pass
12479 23:00:09.505555 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 skip
12480 23:00:09.505661 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 skip
12481 23:00:09.505728 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 skip
12482 23:00:09.505790 arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 pass
12483 23:00:09.505848 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 skip
12484 23:00:09.505919 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 skip
12485 23:00:09.505981 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 skip
12486 23:00:09.506051 arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 pass
12487 23:00:09.506359 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 skip
12488 23:00:09.506463 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 skip
12489 23:00:09.506573 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 skip
12490 23:00:09.510647 arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 pass
12491 23:00:09.511055 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 skip
12492 23:00:09.511154 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 skip
12493 23:00:09.511268 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 skip
12494 23:00:09.511356 arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 pass
12495 23:00:09.511452 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 skip
12496 23:00:09.511561 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 skip
12497 23:00:09.512249 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 skip
12498 23:00:09.512359 arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 pass
12499 23:00:09.512429 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 skip
12500 23:00:09.512498 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 skip
12501 23:00:09.512582 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 skip
12502 23:00:09.512650 arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 pass
12503 23:00:09.512752 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 skip
12504 23:00:09.513051 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 skip
12505 23:00:09.513169 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 skip
12506 23:00:09.513266 arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 pass
12507 23:00:09.513380 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 skip
12508 23:00:09.513478 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 skip
12509 23:00:09.513573 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 skip
12510 23:00:09.513696 arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 pass
12511 23:00:09.513792 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 skip
12512 23:00:09.513897 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 skip
12513 23:00:09.514008 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 skip
12514 23:00:09.514116 arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 pass
12515 23:00:09.514228 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 skip
12516 23:00:09.514339 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 skip
12517 23:00:09.518667 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 skip
12518 23:00:09.519131 arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 pass
12519 23:00:09.519249 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 skip
12520 23:00:09.519360 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 skip
12521 23:00:09.519483 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 skip
12522 23:00:09.519584 arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 pass
12523 23:00:09.519679 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 skip
12524 23:00:09.519800 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 skip
12525 23:00:09.519895 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 skip
12526 23:00:09.519979 arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 pass
12527 23:00:09.520086 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 skip
12528 23:00:09.520188 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 skip
12529 23:00:09.520287 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 skip
12530 23:00:09.520583 arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 pass
12531 23:00:09.520693 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 skip
12532 23:00:09.520809 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 skip
12533 23:00:09.520904 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 skip
12534 23:00:09.521223 arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 pass
12535 23:00:09.521313 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 skip
12536 23:00:09.521405 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 skip
12537 23:00:09.521700 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 skip
12538 23:00:09.521817 arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 pass
12539 23:00:09.521923 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 skip
12540 23:00:09.522049 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 skip
12541 23:00:09.522145 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 skip
12542 23:00:09.522247 arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 pass
12543 23:00:09.522389 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 skip
12544 23:00:09.522475 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 skip
12545 23:00:09.522546 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 skip
12546 23:00:09.526739 arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 pass
12547 23:00:09.527198 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 skip
12548 23:00:09.527310 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 skip
12549 23:00:09.527401 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 skip
12550 23:00:09.527490 arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 pass
12551 23:00:09.527792 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 skip
12552 23:00:09.527898 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 skip
12553 23:00:09.527988 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 skip
12554 23:00:09.528270 arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 pass
12555 23:00:09.528379 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 skip
12556 23:00:09.528469 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 skip
12557 23:00:09.528563 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 skip
12558 23:00:09.528647 arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 pass
12559 23:00:09.528748 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 skip
12560 23:00:09.528851 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 skip
12561 23:00:09.529133 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 skip
12562 23:00:09.529223 arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 pass
12563 23:00:09.529513 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 skip
12564 23:00:09.529621 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 skip
12565 23:00:09.529760 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 skip
12566 23:00:09.529844 arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 pass
12567 23:00:09.529935 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 skip
12568 23:00:09.530204 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 skip
12569 23:00:09.530316 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 skip
12570 23:00:09.530398 arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 pass
12571 23:00:09.530495 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 skip
12572 23:00:09.534642 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 skip
12573 23:00:09.535046 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 skip
12574 23:00:09.546449 arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 pass
12575 23:00:09.546548 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 skip
12576 23:00:09.546808 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 skip
12577 23:00:09.546910 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 skip
12578 23:00:09.546998 arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 pass
12579 23:00:09.547289 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 skip
12580 23:00:09.547406 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 skip
12581 23:00:09.547512 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 skip
12582 23:00:09.547616 arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 pass
12583 23:00:09.547920 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 skip
12584 23:00:09.548013 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 skip
12585 23:00:09.548109 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 skip
12586 23:00:09.548408 arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 pass
12587 23:00:09.548510 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 skip
12588 23:00:09.548609 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 skip
12589 23:00:09.548704 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 skip
12590 23:00:09.548800 arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 pass
12591 23:00:09.549096 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 skip
12592 23:00:09.549529 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 skip
12593 23:00:09.549764 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 skip
12594 23:00:09.549856 arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 pass
12595 23:00:09.550154 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 skip
12596 23:00:09.550252 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 skip
12597 23:00:09.550757 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 skip
12598 23:00:09.550880 arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 pass
12599 23:00:09.550982 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 skip
12600 23:00:09.551079 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 skip
12601 23:00:09.551177 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 skip
12602 23:00:09.551280 arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 pass
12603 23:00:09.554902 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 skip
12604 23:00:09.555044 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 skip
12605 23:00:09.555322 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 skip
12606 23:00:09.555411 arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 pass
12607 23:00:09.555505 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 skip
12608 23:00:09.555813 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 skip
12609 23:00:09.555903 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 skip
12610 23:00:09.556008 arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 pass
12611 23:00:09.556115 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 skip
12612 23:00:09.556220 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 skip
12613 23:00:09.556529 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 skip
12614 23:00:09.556623 arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 pass
12615 23:00:09.556724 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 skip
12616 23:00:09.557025 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 skip
12617 23:00:09.557146 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 skip
12618 23:00:09.557258 arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 pass
12619 23:00:09.557376 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 skip
12620 23:00:09.557714 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 skip
12621 23:00:09.557806 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 skip
12622 23:00:09.558116 arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 pass
12623 23:00:09.558223 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 skip
12624 23:00:09.558328 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 skip
12625 23:00:09.558442 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 skip
12626 23:00:09.558551 arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 pass
12627 23:00:09.562743 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 skip
12628 23:00:09.563125 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 skip
12629 23:00:09.563232 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 skip
12630 23:00:09.563320 arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 pass
12631 23:00:09.563425 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 skip
12632 23:00:09.563716 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 skip
12633 23:00:09.564019 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 skip
12634 23:00:09.564125 arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 pass
12635 23:00:09.564215 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 skip
12636 23:00:09.564302 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 skip
12637 23:00:09.564404 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 skip
12638 23:00:09.564490 arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 pass
12639 23:00:09.564593 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 skip
12640 23:00:09.564695 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 skip
12641 23:00:09.565001 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 skip
12642 23:00:09.565108 arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 pass
12643 23:00:09.565280 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 skip
12644 23:00:09.565723 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 skip
12645 23:00:09.565830 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 skip
12646 23:00:09.565922 arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 pass
12647 23:00:09.566223 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 skip
12648 23:00:09.566326 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 skip
12649 23:00:09.566414 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 skip
12650 23:00:09.566703 arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 pass
12651 23:00:09.566805 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 skip
12652 23:00:09.573911 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 skip
12653 23:00:09.574078 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 skip
12654 23:00:09.574170 arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 pass
12655 23:00:09.574257 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 skip
12656 23:00:09.574344 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 skip
12657 23:00:09.574429 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 skip
12658 23:00:09.574518 arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 pass
12659 23:00:09.574605 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 skip
12660 23:00:09.574691 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 skip
12661 23:00:09.574776 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 skip
12662 23:00:09.574867 arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 pass
12663 23:00:09.574955 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 skip
12664 23:00:09.575041 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 skip
12665 23:00:09.575129 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 skip
12666 23:00:09.575225 arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 pass
12667 23:00:09.575319 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 skip
12668 23:00:09.575407 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 skip
12669 23:00:09.575496 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 skip
12670 23:00:09.575589 arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 pass
12671 23:00:09.575679 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 skip
12672 23:00:09.575769 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 skip
12673 23:00:09.576075 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 skip
12674 23:00:09.576176 arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 pass
12675 23:00:09.576267 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 skip
12676 23:00:09.578848 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 skip
12677 23:00:09.578957 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 skip
12678 23:00:09.579233 arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 pass
12679 23:00:09.579321 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 skip
12680 23:00:09.579426 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 skip
12681 23:00:09.579511 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 skip
12682 23:00:09.579609 arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 pass
12683 23:00:09.579694 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 skip
12684 23:00:09.579793 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 skip
12685 23:00:09.580077 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 skip
12686 23:00:09.580181 arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 pass
12687 23:00:09.580279 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 skip
12688 23:00:09.580574 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 skip
12689 23:00:09.580877 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 skip
12690 23:00:09.580970 arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 pass
12691 23:00:09.581049 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 skip
12692 23:00:09.581150 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 skip
12693 23:00:09.581251 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 skip
12694 23:00:09.581351 arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 pass
12695 23:00:09.581434 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 skip
12696 23:00:09.581511 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 skip
12697 23:00:09.581759 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 skip
12698 23:00:09.581836 arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 pass
12699 23:00:09.581915 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 skip
12700 23:00:09.582013 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 skip
12701 23:00:09.582100 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 skip
12702 23:00:09.582168 arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 pass
12703 23:00:09.582268 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 skip
12704 23:00:09.582603 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 skip
12705 23:00:09.586676 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 skip
12706 23:00:09.587104 arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 pass
12707 23:00:09.587212 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 skip
12708 23:00:09.601112 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 skip
12709 23:00:09.601587 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 skip
12710 23:00:09.601708 arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 pass
12711 23:00:09.601808 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 skip
12712 23:00:09.601926 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 skip
12713 23:00:09.602023 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 skip
12714 23:00:09.602120 arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 pass
12715 23:00:09.602234 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 skip
12716 23:00:09.602330 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 skip
12717 23:00:09.602441 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 skip
12718 23:00:09.602552 arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 pass
12719 23:00:09.602670 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 skip
12720 23:00:09.602780 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 skip
12721 23:00:09.603095 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 skip
12722 23:00:09.603203 arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 pass
12723 23:00:09.603311 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 skip
12724 23:00:09.603419 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 skip
12725 23:00:09.603530 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 skip
12726 23:00:09.603828 arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 pass
12727 23:00:09.603937 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 skip
12728 23:00:09.604049 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 skip
12729 23:00:09.604147 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 skip
12730 23:00:09.604257 arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 pass
12731 23:00:09.604369 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 skip
12732 23:00:09.604485 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 skip
12733 23:00:09.607038 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 skip
12734 23:00:09.607304 arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 pass
12735 23:00:09.607453 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 skip
12736 23:00:09.607596 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 skip
12737 23:00:09.607740 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 skip
12738 23:00:09.607881 arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 pass
12739 23:00:09.608020 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 skip
12740 23:00:09.608160 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 skip
12741 23:00:09.608300 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 skip
12742 23:00:09.608440 arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 pass
12743 23:00:09.608583 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 skip
12744 23:00:09.608723 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 skip
12745 23:00:09.608863 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 skip
12746 23:00:09.608999 arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 pass
12747 23:00:09.609108 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 skip
12748 23:00:09.609215 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 skip
12749 23:00:09.610691 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 skip
12750 23:00:09.610950 arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 pass
12751 23:00:09.611066 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 skip
12752 23:00:09.611176 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 skip
12753 23:00:09.611283 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 skip
12754 23:00:09.611376 arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 pass
12755 23:00:09.611695 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 skip
12756 23:00:09.611810 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 skip
12757 23:00:09.611910 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 skip
12758 23:00:09.612225 arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 pass
12759 23:00:09.612336 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 skip
12760 23:00:09.612434 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 skip
12761 23:00:09.612533 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 skip
12762 23:00:09.612621 arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 pass
12763 23:00:09.612904 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 skip
12764 23:00:09.613008 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 skip
12765 23:00:09.613120 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 skip
12766 23:00:09.613238 arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 pass
12767 23:00:09.613565 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 skip
12768 23:00:09.613666 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 skip
12769 23:00:09.613942 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 skip
12770 23:00:09.614028 arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 pass
12771 23:00:09.614114 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 skip
12772 23:00:09.614223 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 skip
12773 23:00:09.614313 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 skip
12774 23:00:09.614401 arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 pass
12775 23:00:09.618670 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 skip
12776 23:00:09.619015 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 skip
12777 23:00:09.619163 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 skip
12778 23:00:09.619302 arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 pass
12779 23:00:09.619393 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 skip
12780 23:00:09.619476 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 skip
12781 23:00:09.619764 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 skip
12782 23:00:09.619871 arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 pass
12783 23:00:09.620198 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 skip
12784 23:00:09.620295 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 skip
12785 23:00:09.620383 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 skip
12786 23:00:09.620484 arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 pass
12787 23:00:09.620777 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 skip
12788 23:00:09.620886 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 skip
12789 23:00:09.620955 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 skip
12790 23:00:09.621164 arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 pass
12791 23:00:09.621257 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 skip
12792 23:00:09.621388 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 skip
12793 23:00:09.621508 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 skip
12794 23:00:09.621616 arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 pass
12795 23:00:09.621726 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 skip
12796 23:00:09.622025 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 skip
12797 23:00:09.622155 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 skip
12798 23:00:09.622242 arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 pass
12799 23:00:09.622362 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 skip
12800 23:00:09.622671 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 skip
12801 23:00:09.626857 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 skip
12802 23:00:09.626975 arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 pass
12803 23:00:09.627078 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 skip
12804 23:00:09.627376 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 skip
12805 23:00:09.627482 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 skip
12806 23:00:09.627586 arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 pass
12807 23:00:09.627900 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 skip
12808 23:00:09.628017 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 skip
12809 23:00:09.628137 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 skip
12810 23:00:09.628419 arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 pass
12811 23:00:09.628533 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 skip
12812 23:00:09.628651 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 skip
12813 23:00:09.628991 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 skip
12814 23:00:09.629181 arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 pass
12815 23:00:09.629338 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 skip
12816 23:00:09.629462 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 skip
12817 23:00:09.629894 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 skip
12818 23:00:09.630098 arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 pass
12819 23:00:09.630299 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 skip
12820 23:00:09.630524 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 skip
12821 23:00:09.630669 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 skip
12822 23:00:09.630788 arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 pass
12823 23:00:09.630928 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 skip
12824 23:00:09.631048 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 skip
12825 23:00:09.631164 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 skip
12826 23:00:09.631279 arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 pass
12827 23:00:09.634933 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 skip
12828 23:00:09.635184 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 skip
12829 23:00:09.635376 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 skip
12830 23:00:09.635579 arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 pass
12831 23:00:09.635755 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 skip
12832 23:00:09.635967 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 skip
12833 23:00:09.636146 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 skip
12834 23:00:09.636317 arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 pass
12835 23:00:09.636517 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 skip
12836 23:00:09.636686 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 skip
12837 23:00:09.636858 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 skip
12838 23:00:09.637066 arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 pass
12839 23:00:09.637201 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 skip
12840 23:00:09.637316 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 skip
12841 23:00:09.637494 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 skip
12842 23:00:09.658327 arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 pass
12843 23:00:09.658863 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 skip
12844 23:00:09.658970 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 skip
12845 23:00:09.659055 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 skip
12846 23:00:09.659135 arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 pass
12847 23:00:09.659234 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 skip
12848 23:00:09.659317 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 skip
12849 23:00:09.659405 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 skip
12850 23:00:09.659489 arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 pass
12851 23:00:09.659582 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 skip
12852 23:00:09.659934 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 skip
12853 23:00:09.660048 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 skip
12854 23:00:09.660135 arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 pass
12855 23:00:09.660418 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 skip
12856 23:00:09.660505 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 skip
12857 23:00:09.660797 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 skip
12858 23:00:09.660919 arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 pass
12859 23:00:09.661130 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 skip
12860 23:00:09.661308 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 skip
12861 23:00:09.661415 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 skip
12862 23:00:09.661522 arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 pass
12863 23:00:09.661615 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 skip
12864 23:00:09.661715 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 skip
12865 23:00:09.662035 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 skip
12866 23:00:09.662136 arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 pass
12867 23:00:09.662219 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 skip
12868 23:00:09.662510 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 skip
12869 23:00:09.662599 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 skip
12870 23:00:09.662674 arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 pass
12871 23:00:09.666649 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 skip
12872 23:00:09.666989 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 skip
12873 23:00:09.667181 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 skip
12874 23:00:09.667387 arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 pass
12875 23:00:09.667565 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 skip
12876 23:00:09.667777 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 skip
12877 23:00:09.667953 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 skip
12878 23:00:09.668109 arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 pass
12879 23:00:09.668302 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 skip
12880 23:00:09.668482 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 skip
12881 23:00:09.668662 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 skip
12882 23:00:09.668828 arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 pass
12883 23:00:09.669035 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 skip
12884 23:00:09.669218 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 skip
12885 23:00:09.669396 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 skip
12886 23:00:09.669571 arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 pass
12887 23:00:09.669765 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 skip
12888 23:00:09.669978 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 skip
12889 23:00:09.670159 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 skip
12890 23:00:09.670327 arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 pass
12891 23:00:09.670488 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 skip
12892 23:00:09.670630 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 skip
12893 23:00:09.670749 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 skip
12894 23:00:09.670893 arm64_sve-ptrace pass
12895 23:00:09.671015 arm64_sve-probe-vls_Enumerated_16_vector_lengths pass
12896 23:00:09.671134 arm64_sve-probe-vls_All_vector_lengths_valid pass
12897 23:00:09.671252 arm64_sve-probe-vls pass
12898 23:00:09.671368 arm64_vec-syscfg_SVE_default_vector_length_64 pass
12899 23:00:09.674675 arm64_vec-syscfg_SVE_minimum_vector_length_16 pass
12900 23:00:09.675098 arm64_vec-syscfg_SVE_maximum_vector_length_256 pass
12901 23:00:09.675269 arm64_vec-syscfg_SVE_current_VL_is_64 pass
12902 23:00:09.675398 arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 pass
12903 23:00:09.675518 arm64_vec-syscfg_SVE_prctl_set_min_max pass
12904 23:00:09.675715 arm64_vec-syscfg_SVE_vector_length_used_default pass
12905 23:00:09.675892 arm64_vec-syscfg_SVE_vector_length_was_inherited pass
12906 23:00:09.676085 arm64_vec-syscfg_SVE_vector_length_set_on_exec pass
12907 23:00:09.676262 arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors pass
12908 23:00:09.676436 arm64_vec-syscfg_SME_default_vector_length_32 pass
12909 23:00:09.676594 arm64_vec-syscfg_SME_minimum_vector_length_16 pass
12910 23:00:09.676808 arm64_vec-syscfg_SME_maximum_vector_length_256 pass
12911 23:00:09.677009 arm64_vec-syscfg_SME_current_VL_is_32 pass
12912 23:00:09.677194 arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 pass
12913 23:00:09.677375 arm64_vec-syscfg_SME_prctl_set_min_max pass
12914 23:00:09.677576 arm64_vec-syscfg_SME_vector_length_used_default pass
12915 23:00:09.677776 arm64_vec-syscfg_SME_vector_length_was_inherited pass
12916 23:00:09.677921 arm64_vec-syscfg_SME_vector_length_set_on_exec pass
12917 23:00:09.678057 arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors pass
12918 23:00:09.678184 arm64_vec-syscfg pass
12919 23:00:09.678332 arm64_za-fork_fork_test pass
12920 23:00:09.678474 arm64_za-fork pass
12921 23:00:09.678599 arm64_za-ptrace_Set_VL_16 pass
12922 23:00:09.678749 arm64_za-ptrace_Disabled_ZA_for_VL_16 pass
12923 23:00:09.678871 arm64_za-ptrace_Data_match_for_VL_16 pass
12924 23:00:09.678987 arm64_za-ptrace_Set_VL_32 pass
12925 23:00:09.679102 arm64_za-ptrace_Disabled_ZA_for_VL_32 pass
12926 23:00:09.679216 arm64_za-ptrace_Data_match_for_VL_32 pass
12927 23:00:09.679329 arm64_za-ptrace_Set_VL_48 pass
12928 23:00:09.679443 arm64_za-ptrace_Disabled_ZA_for_VL_48 skip
12929 23:00:09.679557 arm64_za-ptrace_Get_and_set_data_for_VL_48 skip
12930 23:00:09.679672 arm64_za-ptrace_Set_VL_64 pass
12931 23:00:09.679785 arm64_za-ptrace_Disabled_ZA_for_VL_64 pass
12932 23:00:09.679900 arm64_za-ptrace_Data_match_for_VL_64 pass
12933 23:00:09.680012 arm64_za-ptrace_Set_VL_80 pass
12934 23:00:09.680126 arm64_za-ptrace_Disabled_ZA_for_VL_80 skip
12935 23:00:09.680241 arm64_za-ptrace_Get_and_set_data_for_VL_80 skip
12936 23:00:09.680353 arm64_za-ptrace_Set_VL_96 pass
12937 23:00:09.680466 arm64_za-ptrace_Disabled_ZA_for_VL_96 skip
12938 23:00:09.680579 arm64_za-ptrace_Get_and_set_data_for_VL_96 skip
12939 23:00:09.680695 arm64_za-ptrace_Set_VL_112 pass
12940 23:00:09.682687 arm64_za-ptrace_Disabled_ZA_for_VL_112 skip
12941 23:00:09.683107 arm64_za-ptrace_Get_and_set_data_for_VL_112 skip
12942 23:00:09.683297 arm64_za-ptrace_Set_VL_128 pass
12943 23:00:09.683498 arm64_za-ptrace_Disabled_ZA_for_VL_128 pass
12944 23:00:09.683717 arm64_za-ptrace_Data_match_for_VL_128 pass
12945 23:00:09.683912 arm64_za-ptrace_Set_VL_144 pass
12946 23:00:09.684082 arm64_za-ptrace_Disabled_ZA_for_VL_144 skip
12947 23:00:09.684219 arm64_za-ptrace_Get_and_set_data_for_VL_144 skip
12948 23:00:09.684387 arm64_za-ptrace_Set_VL_160 pass
12949 23:00:09.684554 arm64_za-ptrace_Disabled_ZA_for_VL_160 skip
12950 23:00:09.684725 arm64_za-ptrace_Get_and_set_data_for_VL_160 skip
12951 23:00:09.684893 arm64_za-ptrace_Set_VL_176 pass
12952 23:00:09.685059 arm64_za-ptrace_Disabled_ZA_for_VL_176 skip
12953 23:00:09.685213 arm64_za-ptrace_Get_and_set_data_for_VL_176 skip
12954 23:00:09.685354 arm64_za-ptrace_Set_VL_192 pass
12955 23:00:09.685504 arm64_za-ptrace_Disabled_ZA_for_VL_192 skip
12956 23:00:09.685637 arm64_za-ptrace_Get_and_set_data_for_VL_192 skip
12957 23:00:09.685815 arm64_za-ptrace_Set_VL_208 pass
12958 23:00:09.685943 arm64_za-ptrace_Disabled_ZA_for_VL_208 skip
12959 23:00:09.686075 arm64_za-ptrace_Get_and_set_data_for_VL_208 skip
12960 23:00:09.686192 arm64_za-ptrace_Set_VL_224 pass
12961 23:00:09.686338 arm64_za-ptrace_Disabled_ZA_for_VL_224 skip
12962 23:00:09.686462 arm64_za-ptrace_Get_and_set_data_for_VL_224 skip
12963 23:00:09.686579 arm64_za-ptrace_Set_VL_240 pass
12964 23:00:09.686699 arm64_za-ptrace_Disabled_ZA_for_VL_240 skip
12965 23:00:09.686814 arm64_za-ptrace_Get_and_set_data_for_VL_240 skip
12966 23:00:09.686930 arm64_za-ptrace_Set_VL_256 pass
12967 23:00:09.687046 arm64_za-ptrace_Disabled_ZA_for_VL_256 pass
12968 23:00:09.687163 arm64_za-ptrace_Data_match_for_VL_256 pass
12969 23:00:09.687280 arm64_za-ptrace_Set_VL_272 pass
12970 23:00:09.687396 arm64_za-ptrace_Disabled_ZA_for_VL_272 skip
12971 23:00:09.687511 arm64_za-ptrace_Get_and_set_data_for_VL_272 skip
12972 23:00:09.687660 arm64_za-ptrace_Set_VL_288 pass
12973 23:00:09.687784 arm64_za-ptrace_Disabled_ZA_for_VL_288 skip
12974 23:00:09.687901 arm64_za-ptrace_Get_and_set_data_for_VL_288 skip
12975 23:00:09.688018 arm64_za-ptrace_Set_VL_304 pass
12976 23:00:09.688134 arm64_za-ptrace_Disabled_ZA_for_VL_304 skip
12977 23:00:09.688250 arm64_za-ptrace_Get_and_set_data_for_VL_304 skip
12978 23:00:09.688367 arm64_za-ptrace_Set_VL_320 pass
12979 23:00:09.688483 arm64_za-ptrace_Disabled_ZA_for_VL_320 skip
12980 23:00:09.688601 arm64_za-ptrace_Get_and_set_data_for_VL_320 skip
12981 23:00:09.688716 arm64_za-ptrace_Set_VL_336 pass
12982 23:00:09.688831 arm64_za-ptrace_Disabled_ZA_for_VL_336 skip
12983 23:00:09.688946 arm64_za-ptrace_Get_and_set_data_for_VL_336 skip
12984 23:00:09.689061 arm64_za-ptrace_Set_VL_352 pass
12985 23:00:09.690712 arm64_za-ptrace_Disabled_ZA_for_VL_352 skip
12986 23:00:09.691054 arm64_za-ptrace_Get_and_set_data_for_VL_352 skip
12987 23:00:09.691203 arm64_za-ptrace_Set_VL_368 pass
12988 23:00:09.691353 arm64_za-ptrace_Disabled_ZA_for_VL_368 skip
12989 23:00:09.691499 arm64_za-ptrace_Get_and_set_data_for_VL_368 skip
12990 23:00:09.691664 arm64_za-ptrace_Set_VL_384 pass
12991 23:00:09.691819 arm64_za-ptrace_Disabled_ZA_for_VL_384 skip
12992 23:00:09.691942 arm64_za-ptrace_Get_and_set_data_for_VL_384 skip
12993 23:00:09.692062 arm64_za-ptrace_Set_VL_400 pass
12994 23:00:09.692193 arm64_za-ptrace_Disabled_ZA_for_VL_400 skip
12995 23:00:09.692423 arm64_za-ptrace_Get_and_set_data_for_VL_400 skip
12996 23:00:09.692624 arm64_za-ptrace_Set_VL_416 pass
12997 23:00:09.692802 arm64_za-ptrace_Disabled_ZA_for_VL_416 skip
12998 23:00:09.692929 arm64_za-ptrace_Get_and_set_data_for_VL_416 skip
12999 23:00:09.693046 arm64_za-ptrace_Set_VL_432 pass
13000 23:00:09.693163 arm64_za-ptrace_Disabled_ZA_for_VL_432 skip
13001 23:00:09.693294 arm64_za-ptrace_Get_and_set_data_for_VL_432 skip
13002 23:00:09.693412 arm64_za-ptrace_Set_VL_448 pass
13003 23:00:09.693527 arm64_za-ptrace_Disabled_ZA_for_VL_448 skip
13004 23:00:09.693658 arm64_za-ptrace_Get_and_set_data_for_VL_448 skip
13005 23:00:09.693777 arm64_za-ptrace_Set_VL_464 pass
13006 23:00:09.693891 arm64_za-ptrace_Disabled_ZA_for_VL_464 skip
13007 23:00:09.694005 arm64_za-ptrace_Get_and_set_data_for_VL_464 skip
13008 23:00:09.694118 arm64_za-ptrace_Set_VL_480 pass
13009 23:00:09.694258 arm64_za-ptrace_Disabled_ZA_for_VL_480 skip
13010 23:00:09.694378 arm64_za-ptrace_Get_and_set_data_for_VL_480 skip
13011 23:00:09.694493 arm64_za-ptrace_Set_VL_496 pass
13012 23:00:09.694611 arm64_za-ptrace_Disabled_ZA_for_VL_496 skip
13013 23:00:09.715043 arm64_za-ptrace_Get_and_set_data_for_VL_496 skip
13014 23:00:09.715193 arm64_za-ptrace_Set_VL_512 pass
13015 23:00:09.715482 arm64_za-ptrace_Disabled_ZA_for_VL_512 skip
13016 23:00:09.715591 arm64_za-ptrace_Get_and_set_data_for_VL_512 skip
13017 23:00:09.715686 arm64_za-ptrace_Set_VL_528 pass
13018 23:00:09.715770 arm64_za-ptrace_Disabled_ZA_for_VL_528 skip
13019 23:00:09.715871 arm64_za-ptrace_Get_and_set_data_for_VL_528 skip
13020 23:00:09.715955 arm64_za-ptrace_Set_VL_544 pass
13021 23:00:09.716056 arm64_za-ptrace_Disabled_ZA_for_VL_544 skip
13022 23:00:09.716155 arm64_za-ptrace_Get_and_set_data_for_VL_544 skip
13023 23:00:09.716256 arm64_za-ptrace_Set_VL_560 pass
13024 23:00:09.716356 arm64_za-ptrace_Disabled_ZA_for_VL_560 skip
13025 23:00:09.716464 arm64_za-ptrace_Get_and_set_data_for_VL_560 skip
13026 23:00:09.716565 arm64_za-ptrace_Set_VL_576 pass
13027 23:00:09.716670 arm64_za-ptrace_Disabled_ZA_for_VL_576 skip
13028 23:00:09.716769 arm64_za-ptrace_Get_and_set_data_for_VL_576 skip
13029 23:00:09.717119 arm64_za-ptrace_Set_VL_592 pass
13030 23:00:09.717221 arm64_za-ptrace_Disabled_ZA_for_VL_592 skip
13031 23:00:09.717320 arm64_za-ptrace_Get_and_set_data_for_VL_592 skip
13032 23:00:09.717407 arm64_za-ptrace_Set_VL_608 pass
13033 23:00:09.717503 arm64_za-ptrace_Disabled_ZA_for_VL_608 skip
13034 23:00:09.717601 arm64_za-ptrace_Get_and_set_data_for_VL_608 skip
13035 23:00:09.717714 arm64_za-ptrace_Set_VL_624 pass
13036 23:00:09.718009 arm64_za-ptrace_Disabled_ZA_for_VL_624 skip
13037 23:00:09.718110 arm64_za-ptrace_Get_and_set_data_for_VL_624 skip
13038 23:00:09.718212 arm64_za-ptrace_Set_VL_640 pass
13039 23:00:09.718299 arm64_za-ptrace_Disabled_ZA_for_VL_640 skip
13040 23:00:09.718421 arm64_za-ptrace_Get_and_set_data_for_VL_640 skip
13041 23:00:09.718529 arm64_za-ptrace_Set_VL_656 pass
13042 23:00:09.722653 arm64_za-ptrace_Disabled_ZA_for_VL_656 skip
13043 23:00:09.723004 arm64_za-ptrace_Get_and_set_data_for_VL_656 skip
13044 23:00:09.723199 arm64_za-ptrace_Set_VL_672 pass
13045 23:00:09.723391 arm64_za-ptrace_Disabled_ZA_for_VL_672 skip
13046 23:00:09.723614 arm64_za-ptrace_Get_and_set_data_for_VL_672 skip
13047 23:00:09.723822 arm64_za-ptrace_Set_VL_688 pass
13048 23:00:09.724048 arm64_za-ptrace_Disabled_ZA_for_VL_688 skip
13049 23:00:09.724255 arm64_za-ptrace_Get_and_set_data_for_VL_688 skip
13050 23:00:09.724480 arm64_za-ptrace_Set_VL_704 pass
13051 23:00:09.724689 arm64_za-ptrace_Disabled_ZA_for_VL_704 skip
13052 23:00:09.724917 arm64_za-ptrace_Get_and_set_data_for_VL_704 skip
13053 23:00:09.725097 arm64_za-ptrace_Set_VL_720 pass
13054 23:00:09.725708 arm64_za-ptrace_Disabled_ZA_for_VL_720 skip
13055 23:00:09.725905 arm64_za-ptrace_Get_and_set_data_for_VL_720 skip
13056 23:00:09.726089 arm64_za-ptrace_Set_VL_736 pass
13057 23:00:09.726270 arm64_za-ptrace_Disabled_ZA_for_VL_736 skip
13058 23:00:09.726445 arm64_za-ptrace_Get_and_set_data_for_VL_736 skip
13059 23:00:09.726631 arm64_za-ptrace_Set_VL_752 pass
13060 23:00:09.726836 arm64_za-ptrace_Disabled_ZA_for_VL_752 skip
13061 23:00:09.727037 arm64_za-ptrace_Get_and_set_data_for_VL_752 skip
13062 23:00:09.727216 arm64_za-ptrace_Set_VL_768 pass
13063 23:00:09.727440 arm64_za-ptrace_Disabled_ZA_for_VL_768 skip
13064 23:00:09.727634 arm64_za-ptrace_Get_and_set_data_for_VL_768 skip
13065 23:00:09.727841 arm64_za-ptrace_Set_VL_784 pass
13066 23:00:09.728031 arm64_za-ptrace_Disabled_ZA_for_VL_784 skip
13067 23:00:09.728175 arm64_za-ptrace_Get_and_set_data_for_VL_784 skip
13068 23:00:09.728296 arm64_za-ptrace_Set_VL_800 pass
13069 23:00:09.728411 arm64_za-ptrace_Disabled_ZA_for_VL_800 skip
13070 23:00:09.728525 arm64_za-ptrace_Get_and_set_data_for_VL_800 skip
13071 23:00:09.728639 arm64_za-ptrace_Set_VL_816 pass
13072 23:00:09.728753 arm64_za-ptrace_Disabled_ZA_for_VL_816 skip
13073 23:00:09.728867 arm64_za-ptrace_Get_and_set_data_for_VL_816 skip
13074 23:00:09.728983 arm64_za-ptrace_Set_VL_832 pass
13075 23:00:09.729096 arm64_za-ptrace_Disabled_ZA_for_VL_832 skip
13076 23:00:09.729211 arm64_za-ptrace_Get_and_set_data_for_VL_832 skip
13077 23:00:09.730891 arm64_za-ptrace_Set_VL_848 pass
13078 23:00:09.731127 arm64_za-ptrace_Disabled_ZA_for_VL_848 skip
13079 23:00:09.731436 arm64_za-ptrace_Get_and_set_data_for_VL_848 skip
13080 23:00:09.731542 arm64_za-ptrace_Set_VL_864 pass
13081 23:00:09.731631 arm64_za-ptrace_Disabled_ZA_for_VL_864 skip
13082 23:00:09.731716 arm64_za-ptrace_Get_and_set_data_for_VL_864 skip
13083 23:00:09.731802 arm64_za-ptrace_Set_VL_880 pass
13084 23:00:09.731886 arm64_za-ptrace_Disabled_ZA_for_VL_880 skip
13085 23:00:09.731991 arm64_za-ptrace_Get_and_set_data_for_VL_880 skip
13086 23:00:09.732079 arm64_za-ptrace_Set_VL_896 pass
13087 23:00:09.732166 arm64_za-ptrace_Disabled_ZA_for_VL_896 skip
13088 23:00:09.732254 arm64_za-ptrace_Get_and_set_data_for_VL_896 skip
13089 23:00:09.732338 arm64_za-ptrace_Set_VL_912 pass
13090 23:00:09.732440 arm64_za-ptrace_Disabled_ZA_for_VL_912 skip
13091 23:00:09.732525 arm64_za-ptrace_Get_and_set_data_for_VL_912 skip
13092 23:00:09.732610 arm64_za-ptrace_Set_VL_928 pass
13093 23:00:09.732699 arm64_za-ptrace_Disabled_ZA_for_VL_928 skip
13094 23:00:09.732801 arm64_za-ptrace_Get_and_set_data_for_VL_928 skip
13095 23:00:09.732892 arm64_za-ptrace_Set_VL_944 pass
13096 23:00:09.732978 arm64_za-ptrace_Disabled_ZA_for_VL_944 skip
13097 23:00:09.733065 arm64_za-ptrace_Get_and_set_data_for_VL_944 skip
13098 23:00:09.733170 arm64_za-ptrace_Set_VL_960 pass
13099 23:00:09.733259 arm64_za-ptrace_Disabled_ZA_for_VL_960 skip
13100 23:00:09.733351 arm64_za-ptrace_Get_and_set_data_for_VL_960 skip
13101 23:00:09.733455 arm64_za-ptrace_Set_VL_976 pass
13102 23:00:09.733545 arm64_za-ptrace_Disabled_ZA_for_VL_976 skip
13103 23:00:09.733657 arm64_za-ptrace_Get_and_set_data_for_VL_976 skip
13104 23:00:09.733750 arm64_za-ptrace_Set_VL_992 pass
13105 23:00:09.733852 arm64_za-ptrace_Disabled_ZA_for_VL_992 skip
13106 23:00:09.733953 arm64_za-ptrace_Get_and_set_data_for_VL_992 skip
13107 23:00:09.734040 arm64_za-ptrace_Set_VL_1008 pass
13108 23:00:09.734133 arm64_za-ptrace_Disabled_ZA_for_VL_1008 skip
13109 23:00:09.734220 arm64_za-ptrace_Get_and_set_data_for_VL_1008 skip
13110 23:00:09.734323 arm64_za-ptrace_Set_VL_1024 pass
13111 23:00:09.734411 arm64_za-ptrace_Disabled_ZA_for_VL_1024 skip
13112 23:00:09.734510 arm64_za-ptrace_Get_and_set_data_for_VL_1024 skip
13113 23:00:09.738714 arm64_za-ptrace_Set_VL_1040 pass
13114 23:00:09.739080 arm64_za-ptrace_Disabled_ZA_for_VL_1040 skip
13115 23:00:09.739178 arm64_za-ptrace_Get_and_set_data_for_VL_1040 skip
13116 23:00:09.739265 arm64_za-ptrace_Set_VL_1056 pass
13117 23:00:09.739352 arm64_za-ptrace_Disabled_ZA_for_VL_1056 skip
13118 23:00:09.739451 arm64_za-ptrace_Get_and_set_data_for_VL_1056 skip
13119 23:00:09.739539 arm64_za-ptrace_Set_VL_1072 pass
13120 23:00:09.739622 arm64_za-ptrace_Disabled_ZA_for_VL_1072 skip
13121 23:00:09.739730 arm64_za-ptrace_Get_and_set_data_for_VL_1072 skip
13122 23:00:09.739818 arm64_za-ptrace_Set_VL_1088 pass
13123 23:00:09.739903 arm64_za-ptrace_Disabled_ZA_for_VL_1088 skip
13124 23:00:09.740005 arm64_za-ptrace_Get_and_set_data_for_VL_1088 skip
13125 23:00:09.740094 arm64_za-ptrace_Set_VL_1104 pass
13126 23:00:09.740191 arm64_za-ptrace_Disabled_ZA_for_VL_1104 skip
13127 23:00:09.740292 arm64_za-ptrace_Get_and_set_data_for_VL_1104 skip
13128 23:00:09.740375 arm64_za-ptrace_Set_VL_1120 pass
13129 23:00:09.740474 arm64_za-ptrace_Disabled_ZA_for_VL_1120 skip
13130 23:00:09.740555 arm64_za-ptrace_Get_and_set_data_for_VL_1120 skip
13131 23:00:09.740651 arm64_za-ptrace_Set_VL_1136 pass
13132 23:00:09.740750 arm64_za-ptrace_Disabled_ZA_for_VL_1136 skip
13133 23:00:09.740837 arm64_za-ptrace_Get_and_set_data_for_VL_1136 skip
13134 23:00:09.740935 arm64_za-ptrace_Set_VL_1152 pass
13135 23:00:09.741258 arm64_za-ptrace_Disabled_ZA_for_VL_1152 skip
13136 23:00:09.741562 arm64_za-ptrace_Get_and_set_data_for_VL_1152 skip
13137 23:00:09.741674 arm64_za-ptrace_Set_VL_1168 pass
13138 23:00:09.741767 arm64_za-ptrace_Disabled_ZA_for_VL_1168 skip
13139 23:00:09.741856 arm64_za-ptrace_Get_and_set_data_for_VL_1168 skip
13140 23:00:09.741945 arm64_za-ptrace_Set_VL_1184 pass
13141 23:00:09.742052 arm64_za-ptrace_Disabled_ZA_for_VL_1184 skip
13142 23:00:09.742143 arm64_za-ptrace_Get_and_set_data_for_VL_1184 skip
13143 23:00:09.742231 arm64_za-ptrace_Set_VL_1200 pass
13144 23:00:09.742316 arm64_za-ptrace_Disabled_ZA_for_VL_1200 skip
13145 23:00:09.742407 arm64_za-ptrace_Get_and_set_data_for_VL_1200 skip
13146 23:00:09.742507 arm64_za-ptrace_Set_VL_1216 pass
13147 23:00:09.742606 arm64_za-ptrace_Disabled_ZA_for_VL_1216 skip
13148 23:00:09.742692 arm64_za-ptrace_Get_and_set_data_for_VL_1216 skip
13149 23:00:09.742776 arm64_za-ptrace_Set_VL_1232 pass
13150 23:00:09.746943 arm64_za-ptrace_Disabled_ZA_for_VL_1232 skip
13151 23:00:09.747284 arm64_za-ptrace_Get_and_set_data_for_VL_1232 skip
13152 23:00:09.747556 arm64_za-ptrace_Set_VL_1248 pass
13153 23:00:09.747643 arm64_za-ptrace_Disabled_ZA_for_VL_1248 skip
13154 23:00:09.747716 arm64_za-ptrace_Get_and_set_data_for_VL_1248 skip
13155 23:00:09.747782 arm64_za-ptrace_Set_VL_1264 pass
13156 23:00:09.747852 arm64_za-ptrace_Disabled_ZA_for_VL_1264 skip
13157 23:00:09.747936 arm64_za-ptrace_Get_and_set_data_for_VL_1264 skip
13158 23:00:09.748004 arm64_za-ptrace_Set_VL_1280 pass
13159 23:00:09.748099 arm64_za-ptrace_Disabled_ZA_for_VL_1280 skip
13160 23:00:09.748204 arm64_za-ptrace_Get_and_set_data_for_VL_1280 skip
13161 23:00:09.748288 arm64_za-ptrace_Set_VL_1296 pass
13162 23:00:09.748371 arm64_za-ptrace_Disabled_ZA_for_VL_1296 skip
13163 23:00:09.748434 arm64_za-ptrace_Get_and_set_data_for_VL_1296 skip
13164 23:00:09.748524 arm64_za-ptrace_Set_VL_1312 pass
13165 23:00:09.748606 arm64_za-ptrace_Disabled_ZA_for_VL_1312 skip
13166 23:00:09.748687 arm64_za-ptrace_Get_and_set_data_for_VL_1312 skip
13167 23:00:09.748766 arm64_za-ptrace_Set_VL_1328 pass
13168 23:00:09.748847 arm64_za-ptrace_Disabled_ZA_for_VL_1328 skip
13169 23:00:09.748917 arm64_za-ptrace_Get_and_set_data_for_VL_1328 skip
13170 23:00:09.748988 arm64_za-ptrace_Set_VL_1344 pass
13171 23:00:09.749069 arm64_za-ptrace_Disabled_ZA_for_VL_1344 skip
13172 23:00:09.749140 arm64_za-ptrace_Get_and_set_data_for_VL_1344 skip
13173 23:00:09.749221 arm64_za-ptrace_Set_VL_1360 pass
13174 23:00:09.749504 arm64_za-ptrace_Disabled_ZA_for_VL_1360 skip
13175 23:00:09.749628 arm64_za-ptrace_Get_and_set_data_for_VL_1360 skip
13176 23:00:09.749730 arm64_za-ptrace_Set_VL_1376 pass
13177 23:00:09.749831 arm64_za-ptrace_Disabled_ZA_for_VL_1376 skip
13178 23:00:09.749920 arm64_za-ptrace_Get_and_set_data_for_VL_1376 skip
13179 23:00:09.750024 arm64_za-ptrace_Set_VL_1392 pass
13180 23:00:09.750127 arm64_za-ptrace_Disabled_ZA_for_VL_1392 skip
13181 23:00:09.750218 arm64_za-ptrace_Get_and_set_data_for_VL_1392 skip
13182 23:00:09.750320 arm64_za-ptrace_Set_VL_1408 pass
13183 23:00:09.750424 arm64_za-ptrace_Disabled_ZA_for_VL_1408 skip
13184 23:00:09.750511 arm64_za-ptrace_Get_and_set_data_for_VL_1408 skip
13185 23:00:09.754770 arm64_za-ptrace_Set_VL_1424 pass
13186 23:00:09.755250 arm64_za-ptrace_Disabled_ZA_for_VL_1424 skip
13187 23:00:09.755359 arm64_za-ptrace_Get_and_set_data_for_VL_1424 skip
13188 23:00:09.755468 arm64_za-ptrace_Set_VL_1440 pass
13189 23:00:09.755590 arm64_za-ptrace_Disabled_ZA_for_VL_1440 skip
13190 23:00:09.755698 arm64_za-ptrace_Get_and_set_data_for_VL_1440 skip
13191 23:00:09.755833 arm64_za-ptrace_Set_VL_1456 pass
13192 23:00:09.755937 arm64_za-ptrace_Disabled_ZA_for_VL_1456 skip
13193 23:00:09.756029 arm64_za-ptrace_Get_and_set_data_for_VL_1456 skip
13194 23:00:09.756108 arm64_za-ptrace_Set_VL_1472 pass
13195 23:00:09.756203 arm64_za-ptrace_Disabled_ZA_for_VL_1472 skip
13196 23:00:09.756275 arm64_za-ptrace_Get_and_set_data_for_VL_1472 skip
13197 23:00:09.756350 arm64_za-ptrace_Set_VL_1488 pass
13198 23:00:09.756423 arm64_za-ptrace_Disabled_ZA_for_VL_1488 skip
13199 23:00:09.756497 arm64_za-ptrace_Get_and_set_data_for_VL_1488 skip
13200 23:00:09.756571 arm64_za-ptrace_Set_VL_1504 pass
13201 23:00:09.756663 arm64_za-ptrace_Disabled_ZA_for_VL_1504 skip
13202 23:00:09.756733 arm64_za-ptrace_Get_and_set_data_for_VL_1504 skip
13203 23:00:09.756807 arm64_za-ptrace_Set_VL_1520 pass
13204 23:00:09.756880 arm64_za-ptrace_Disabled_ZA_for_VL_1520 skip
13205 23:00:09.756971 arm64_za-ptrace_Get_and_set_data_for_VL_1520 skip
13206 23:00:09.757041 arm64_za-ptrace_Set_VL_1536 pass
13207 23:00:09.757131 arm64_za-ptrace_Disabled_ZA_for_VL_1536 skip
13208 23:00:09.775955 arm64_za-ptrace_Get_and_set_data_for_VL_1536 skip
13209 23:00:09.776379 arm64_za-ptrace_Set_VL_1552 pass
13210 23:00:09.776476 arm64_za-ptrace_Disabled_ZA_for_VL_1552 skip
13211 23:00:09.776558 arm64_za-ptrace_Get_and_set_data_for_VL_1552 skip
13212 23:00:09.776637 arm64_za-ptrace_Set_VL_1568 pass
13213 23:00:09.776717 arm64_za-ptrace_Disabled_ZA_for_VL_1568 skip
13214 23:00:09.776814 arm64_za-ptrace_Get_and_set_data_for_VL_1568 skip
13215 23:00:09.776893 arm64_za-ptrace_Set_VL_1584 pass
13216 23:00:09.776969 arm64_za-ptrace_Disabled_ZA_for_VL_1584 skip
13217 23:00:09.777046 arm64_za-ptrace_Get_and_set_data_for_VL_1584 skip
13218 23:00:09.777124 arm64_za-ptrace_Set_VL_1600 pass
13219 23:00:09.777422 arm64_za-ptrace_Disabled_ZA_for_VL_1600 skip
13220 23:00:09.777521 arm64_za-ptrace_Get_and_set_data_for_VL_1600 skip
13221 23:00:09.777604 arm64_za-ptrace_Set_VL_1616 pass
13222 23:00:09.777714 arm64_za-ptrace_Disabled_ZA_for_VL_1616 skip
13223 23:00:09.777814 arm64_za-ptrace_Get_and_set_data_for_VL_1616 skip
13224 23:00:09.777914 arm64_za-ptrace_Set_VL_1632 pass
13225 23:00:09.778006 arm64_za-ptrace_Disabled_ZA_for_VL_1632 skip
13226 23:00:09.778102 arm64_za-ptrace_Get_and_set_data_for_VL_1632 skip
13227 23:00:09.778215 arm64_za-ptrace_Set_VL_1648 pass
13228 23:00:09.778320 arm64_za-ptrace_Disabled_ZA_for_VL_1648 skip
13229 23:00:09.778415 arm64_za-ptrace_Get_and_set_data_for_VL_1648 skip
13230 23:00:09.778498 arm64_za-ptrace_Set_VL_1664 pass
13231 23:00:09.778589 arm64_za-ptrace_Disabled_ZA_for_VL_1664 skip
13232 23:00:09.778687 arm64_za-ptrace_Get_and_set_data_for_VL_1664 skip
13233 23:00:09.778786 arm64_za-ptrace_Set_VL_1680 pass
13234 23:00:09.778908 arm64_za-ptrace_Disabled_ZA_for_VL_1680 skip
13235 23:00:09.779011 arm64_za-ptrace_Get_and_set_data_for_VL_1680 skip
13236 23:00:09.779112 arm64_za-ptrace_Set_VL_1696 pass
13237 23:00:09.779208 arm64_za-ptrace_Disabled_ZA_for_VL_1696 skip
13238 23:00:09.779335 arm64_za-ptrace_Get_and_set_data_for_VL_1696 skip
13239 23:00:09.779427 arm64_za-ptrace_Set_VL_1712 pass
13240 23:00:09.779532 arm64_za-ptrace_Disabled_ZA_for_VL_1712 skip
13241 23:00:09.779623 arm64_za-ptrace_Get_and_set_data_for_VL_1712 skip
13242 23:00:09.779702 arm64_za-ptrace_Set_VL_1728 pass
13243 23:00:09.779784 arm64_za-ptrace_Disabled_ZA_for_VL_1728 skip
13244 23:00:09.779851 arm64_za-ptrace_Get_and_set_data_for_VL_1728 skip
13245 23:00:09.779916 arm64_za-ptrace_Set_VL_1744 pass
13246 23:00:09.779992 arm64_za-ptrace_Disabled_ZA_for_VL_1744 skip
13247 23:00:09.780057 arm64_za-ptrace_Get_and_set_data_for_VL_1744 skip
13248 23:00:09.780118 arm64_za-ptrace_Set_VL_1760 pass
13249 23:00:09.780193 arm64_za-ptrace_Disabled_ZA_for_VL_1760 skip
13250 23:00:09.780270 arm64_za-ptrace_Get_and_set_data_for_VL_1760 skip
13251 23:00:09.780529 arm64_za-ptrace_Set_VL_1776 pass
13252 23:00:09.780602 arm64_za-ptrace_Disabled_ZA_for_VL_1776 skip
13253 23:00:09.780678 arm64_za-ptrace_Get_and_set_data_for_VL_1776 skip
13254 23:00:09.780754 arm64_za-ptrace_Set_VL_1792 pass
13255 23:00:09.780831 arm64_za-ptrace_Disabled_ZA_for_VL_1792 skip
13256 23:00:09.781083 arm64_za-ptrace_Get_and_set_data_for_VL_1792 skip
13257 23:00:09.781153 arm64_za-ptrace_Set_VL_1808 pass
13258 23:00:09.781229 arm64_za-ptrace_Disabled_ZA_for_VL_1808 skip
13259 23:00:09.781306 arm64_za-ptrace_Get_and_set_data_for_VL_1808 skip
13260 23:00:09.781555 arm64_za-ptrace_Set_VL_1824 pass
13261 23:00:09.781626 arm64_za-ptrace_Disabled_ZA_for_VL_1824 skip
13262 23:00:09.781712 arm64_za-ptrace_Get_and_set_data_for_VL_1824 skip
13263 23:00:09.781788 arm64_za-ptrace_Set_VL_1840 pass
13264 23:00:09.781866 arm64_za-ptrace_Disabled_ZA_for_VL_1840 skip
13265 23:00:09.781949 arm64_za-ptrace_Get_and_set_data_for_VL_1840 skip
13266 23:00:09.782200 arm64_za-ptrace_Set_VL_1856 pass
13267 23:00:09.782308 arm64_za-ptrace_Disabled_ZA_for_VL_1856 skip
13268 23:00:09.782415 arm64_za-ptrace_Get_and_set_data_for_VL_1856 skip
13269 23:00:09.782500 arm64_za-ptrace_Set_VL_1872 pass
13270 23:00:09.786688 arm64_za-ptrace_Disabled_ZA_for_VL_1872 skip
13271 23:00:09.787101 arm64_za-ptrace_Get_and_set_data_for_VL_1872 skip
13272 23:00:09.787216 arm64_za-ptrace_Set_VL_1888 pass
13273 23:00:09.787323 arm64_za-ptrace_Disabled_ZA_for_VL_1888 skip
13274 23:00:09.787428 arm64_za-ptrace_Get_and_set_data_for_VL_1888 skip
13275 23:00:09.787542 arm64_za-ptrace_Set_VL_1904 pass
13276 23:00:09.787631 arm64_za-ptrace_Disabled_ZA_for_VL_1904 skip
13277 23:00:09.787730 arm64_za-ptrace_Get_and_set_data_for_VL_1904 skip
13278 23:00:09.787815 arm64_za-ptrace_Set_VL_1920 pass
13279 23:00:09.787899 arm64_za-ptrace_Disabled_ZA_for_VL_1920 skip
13280 23:00:09.787983 arm64_za-ptrace_Get_and_set_data_for_VL_1920 skip
13281 23:00:09.788083 arm64_za-ptrace_Set_VL_1936 pass
13282 23:00:09.788168 arm64_za-ptrace_Disabled_ZA_for_VL_1936 skip
13283 23:00:09.788252 arm64_za-ptrace_Get_and_set_data_for_VL_1936 skip
13284 23:00:09.788333 arm64_za-ptrace_Set_VL_1952 pass
13285 23:00:09.788429 arm64_za-ptrace_Disabled_ZA_for_VL_1952 skip
13286 23:00:09.788521 arm64_za-ptrace_Get_and_set_data_for_VL_1952 skip
13287 23:00:09.788593 arm64_za-ptrace_Set_VL_1968 pass
13288 23:00:09.788685 arm64_za-ptrace_Disabled_ZA_for_VL_1968 skip
13289 23:00:09.788766 arm64_za-ptrace_Get_and_set_data_for_VL_1968 skip
13290 23:00:09.788841 arm64_za-ptrace_Set_VL_1984 pass
13291 23:00:09.788935 arm64_za-ptrace_Disabled_ZA_for_VL_1984 skip
13292 23:00:09.789013 arm64_za-ptrace_Get_and_set_data_for_VL_1984 skip
13293 23:00:09.789099 arm64_za-ptrace_Set_VL_2000 pass
13294 23:00:09.789170 arm64_za-ptrace_Disabled_ZA_for_VL_2000 skip
13295 23:00:09.789253 arm64_za-ptrace_Get_and_set_data_for_VL_2000 skip
13296 23:00:09.789339 arm64_za-ptrace_Set_VL_2016 pass
13297 23:00:09.789460 arm64_za-ptrace_Disabled_ZA_for_VL_2016 skip
13298 23:00:09.789596 arm64_za-ptrace_Get_and_set_data_for_VL_2016 skip
13299 23:00:09.789718 arm64_za-ptrace_Set_VL_2032 pass
13300 23:00:09.789840 arm64_za-ptrace_Disabled_ZA_for_VL_2032 skip
13301 23:00:09.790141 arm64_za-ptrace_Get_and_set_data_for_VL_2032 skip
13302 23:00:09.790215 arm64_za-ptrace_Set_VL_2048 pass
13303 23:00:09.790291 arm64_za-ptrace_Disabled_ZA_for_VL_2048 skip
13304 23:00:09.790381 arm64_za-ptrace_Get_and_set_data_for_VL_2048 skip
13305 23:00:09.790452 arm64_za-ptrace_Set_VL_2064 pass
13306 23:00:09.798632 arm64_za-ptrace_Disabled_ZA_for_VL_2064 skip
13307 23:00:09.799041 arm64_za-ptrace_Get_and_set_data_for_VL_2064 skip
13308 23:00:09.799121 arm64_za-ptrace_Set_VL_2080 pass
13309 23:00:09.799222 arm64_za-ptrace_Disabled_ZA_for_VL_2080 skip
13310 23:00:09.799332 arm64_za-ptrace_Get_and_set_data_for_VL_2080 skip
13311 23:00:09.799464 arm64_za-ptrace_Set_VL_2096 pass
13312 23:00:09.799559 arm64_za-ptrace_Disabled_ZA_for_VL_2096 skip
13313 23:00:09.799647 arm64_za-ptrace_Get_and_set_data_for_VL_2096 skip
13314 23:00:09.799731 arm64_za-ptrace_Set_VL_2112 pass
13315 23:00:09.799835 arm64_za-ptrace_Disabled_ZA_for_VL_2112 skip
13316 23:00:09.799921 arm64_za-ptrace_Get_and_set_data_for_VL_2112 skip
13317 23:00:09.800007 arm64_za-ptrace_Set_VL_2128 pass
13318 23:00:09.800110 arm64_za-ptrace_Disabled_ZA_for_VL_2128 skip
13319 23:00:09.800198 arm64_za-ptrace_Get_and_set_data_for_VL_2128 skip
13320 23:00:09.800302 arm64_za-ptrace_Set_VL_2144 pass
13321 23:00:09.800388 arm64_za-ptrace_Disabled_ZA_for_VL_2144 skip
13322 23:00:09.800485 arm64_za-ptrace_Get_and_set_data_for_VL_2144 skip
13323 23:00:09.800585 arm64_za-ptrace_Set_VL_2160 pass
13324 23:00:09.800683 arm64_za-ptrace_Disabled_ZA_for_VL_2160 skip
13325 23:00:09.800783 arm64_za-ptrace_Get_and_set_data_for_VL_2160 skip
13326 23:00:09.801087 arm64_za-ptrace_Set_VL_2176 pass
13327 23:00:09.801176 arm64_za-ptrace_Disabled_ZA_for_VL_2176 skip
13328 23:00:09.801245 arm64_za-ptrace_Get_and_set_data_for_VL_2176 skip
13329 23:00:09.801320 arm64_za-ptrace_Set_VL_2192 pass
13330 23:00:09.801388 arm64_za-ptrace_Disabled_ZA_for_VL_2192 skip
13331 23:00:09.801463 arm64_za-ptrace_Get_and_set_data_for_VL_2192 skip
13332 23:00:09.801528 arm64_za-ptrace_Set_VL_2208 pass
13333 23:00:09.801603 arm64_za-ptrace_Disabled_ZA_for_VL_2208 skip
13334 23:00:09.801729 arm64_za-ptrace_Get_and_set_data_for_VL_2208 skip
13335 23:00:09.801831 arm64_za-ptrace_Set_VL_2224 pass
13336 23:00:09.801920 arm64_za-ptrace_Disabled_ZA_for_VL_2224 skip
13337 23:00:09.802179 arm64_za-ptrace_Get_and_set_data_for_VL_2224 skip
13338 23:00:09.802259 arm64_za-ptrace_Set_VL_2240 pass
13339 23:00:09.802336 arm64_za-ptrace_Disabled_ZA_for_VL_2240 skip
13340 23:00:09.806654 arm64_za-ptrace_Get_and_set_data_for_VL_2240 skip
13341 23:00:09.806993 arm64_za-ptrace_Set_VL_2256 pass
13342 23:00:09.807077 arm64_za-ptrace_Disabled_ZA_for_VL_2256 skip
13343 23:00:09.807184 arm64_za-ptrace_Get_and_set_data_for_VL_2256 skip
13344 23:00:09.807277 arm64_za-ptrace_Set_VL_2272 pass
13345 23:00:09.807369 arm64_za-ptrace_Disabled_ZA_for_VL_2272 skip
13346 23:00:09.807457 arm64_za-ptrace_Get_and_set_data_for_VL_2272 skip
13347 23:00:09.807554 arm64_za-ptrace_Set_VL_2288 pass
13348 23:00:09.807650 arm64_za-ptrace_Disabled_ZA_for_VL_2288 skip
13349 23:00:09.807733 arm64_za-ptrace_Get_and_set_data_for_VL_2288 skip
13350 23:00:09.807821 arm64_za-ptrace_Set_VL_2304 pass
13351 23:00:09.807903 arm64_za-ptrace_Disabled_ZA_for_VL_2304 skip
13352 23:00:09.808169 arm64_za-ptrace_Get_and_set_data_for_VL_2304 skip
13353 23:00:09.808256 arm64_za-ptrace_Set_VL_2320 pass
13354 23:00:09.808363 arm64_za-ptrace_Disabled_ZA_for_VL_2320 skip
13355 23:00:09.808450 arm64_za-ptrace_Get_and_set_data_for_VL_2320 skip
13356 23:00:09.808715 arm64_za-ptrace_Set_VL_2336 pass
13357 23:00:09.808786 arm64_za-ptrace_Disabled_ZA_for_VL_2336 skip
13358 23:00:09.808878 arm64_za-ptrace_Get_and_set_data_for_VL_2336 skip
13359 23:00:09.808949 arm64_za-ptrace_Set_VL_2352 pass
13360 23:00:09.809038 arm64_za-ptrace_Disabled_ZA_for_VL_2352 skip
13361 23:00:09.809109 arm64_za-ptrace_Get_and_set_data_for_VL_2352 skip
13362 23:00:09.809198 arm64_za-ptrace_Set_VL_2368 pass
13363 23:00:09.809284 arm64_za-ptrace_Disabled_ZA_for_VL_2368 skip
13364 23:00:09.809379 arm64_za-ptrace_Get_and_set_data_for_VL_2368 skip
13365 23:00:09.809640 arm64_za-ptrace_Set_VL_2384 pass
13366 23:00:09.809721 arm64_za-ptrace_Disabled_ZA_for_VL_2384 skip
13367 23:00:09.809812 arm64_za-ptrace_Get_and_set_data_for_VL_2384 skip
13368 23:00:09.809898 arm64_za-ptrace_Set_VL_2400 pass
13369 23:00:09.810161 arm64_za-ptrace_Disabled_ZA_for_VL_2400 skip
13370 23:00:09.810232 arm64_za-ptrace_Get_and_set_data_for_VL_2400 skip
13371 23:00:09.810322 arm64_za-ptrace_Set_VL_2416 pass
13372 23:00:09.810428 arm64_za-ptrace_Disabled_ZA_for_VL_2416 skip
13373 23:00:09.814641 arm64_za-ptrace_Get_and_set_data_for_VL_2416 skip
13374 23:00:09.814998 arm64_za-ptrace_Set_VL_2432 pass
13375 23:00:09.815095 arm64_za-ptrace_Disabled_ZA_for_VL_2432 skip
13376 23:00:09.815185 arm64_za-ptrace_Get_and_set_data_for_VL_2432 skip
13377 23:00:09.815292 arm64_za-ptrace_Set_VL_2448 pass
13378 23:00:09.815375 arm64_za-ptrace_Disabled_ZA_for_VL_2448 skip
13379 23:00:09.815451 arm64_za-ptrace_Get_and_set_data_for_VL_2448 skip
13380 23:00:09.815546 arm64_za-ptrace_Set_VL_2464 pass
13381 23:00:09.815618 arm64_za-ptrace_Disabled_ZA_for_VL_2464 skip
13382 23:00:09.815708 arm64_za-ptrace_Get_and_set_data_for_VL_2464 skip
13383 23:00:09.815794 arm64_za-ptrace_Set_VL_2480 pass
13384 23:00:09.815870 arm64_za-ptrace_Disabled_ZA_for_VL_2480 skip
13385 23:00:09.815959 arm64_za-ptrace_Get_and_set_data_for_VL_2480 skip
13386 23:00:09.816044 arm64_za-ptrace_Set_VL_2496 pass
13387 23:00:09.816301 arm64_za-ptrace_Disabled_ZA_for_VL_2496 skip
13388 23:00:09.816372 arm64_za-ptrace_Get_and_set_data_for_VL_2496 skip
13389 23:00:09.816464 arm64_za-ptrace_Set_VL_2512 pass
13390 23:00:09.816534 arm64_za-ptrace_Disabled_ZA_for_VL_2512 skip
13391 23:00:09.816623 arm64_za-ptrace_Get_and_set_data_for_VL_2512 skip
13392 23:00:09.816877 arm64_za-ptrace_Set_VL_2528 pass
13393 23:00:09.816952 arm64_za-ptrace_Disabled_ZA_for_VL_2528 skip
13394 23:00:09.817043 arm64_za-ptrace_Get_and_set_data_for_VL_2528 skip
13395 23:00:09.817114 arm64_za-ptrace_Set_VL_2544 pass
13396 23:00:09.817203 arm64_za-ptrace_Disabled_ZA_for_VL_2544 skip
13397 23:00:09.817309 arm64_za-ptrace_Get_and_set_data_for_VL_2544 skip
13398 23:00:09.817399 arm64_za-ptrace_Set_VL_2560 pass
13399 23:00:09.817671 arm64_za-ptrace_Disabled_ZA_for_VL_2560 skip
13400 23:00:09.817982 arm64_za-ptrace_Get_and_set_data_for_VL_2560 skip
13401 23:00:09.835748 arm64_za-ptrace_Set_VL_2576 pass
13402 23:00:09.836226 arm64_za-ptrace_Disabled_ZA_for_VL_2576 skip
13403 23:00:09.836327 arm64_za-ptrace_Get_and_set_data_for_VL_2576 skip
13404 23:00:09.836438 arm64_za-ptrace_Set_VL_2592 pass
13405 23:00:09.836540 arm64_za-ptrace_Disabled_ZA_for_VL_2592 skip
13406 23:00:09.836667 arm64_za-ptrace_Get_and_set_data_for_VL_2592 skip
13407 23:00:09.836779 arm64_za-ptrace_Set_VL_2608 pass
13408 23:00:09.836885 arm64_za-ptrace_Disabled_ZA_for_VL_2608 skip
13409 23:00:09.836977 arm64_za-ptrace_Get_and_set_data_for_VL_2608 skip
13410 23:00:09.837079 arm64_za-ptrace_Set_VL_2624 pass
13411 23:00:09.837187 arm64_za-ptrace_Disabled_ZA_for_VL_2624 skip
13412 23:00:09.837282 arm64_za-ptrace_Get_and_set_data_for_VL_2624 skip
13413 23:00:09.837359 arm64_za-ptrace_Set_VL_2640 pass
13414 23:00:09.837424 arm64_za-ptrace_Disabled_ZA_for_VL_2640 skip
13415 23:00:09.837501 arm64_za-ptrace_Get_and_set_data_for_VL_2640 skip
13416 23:00:09.837568 arm64_za-ptrace_Set_VL_2656 pass
13417 23:00:09.837645 arm64_za-ptrace_Disabled_ZA_for_VL_2656 skip
13418 23:00:09.837720 arm64_za-ptrace_Get_and_set_data_for_VL_2656 skip
13419 23:00:09.837797 arm64_za-ptrace_Set_VL_2672 pass
13420 23:00:09.837878 arm64_za-ptrace_Disabled_ZA_for_VL_2672 skip
13421 23:00:09.837962 arm64_za-ptrace_Get_and_set_data_for_VL_2672 skip
13422 23:00:09.838219 arm64_za-ptrace_Set_VL_2688 pass
13423 23:00:09.838290 arm64_za-ptrace_Disabled_ZA_for_VL_2688 skip
13424 23:00:09.838368 arm64_za-ptrace_Get_and_set_data_for_VL_2688 skip
13425 23:00:09.838471 arm64_za-ptrace_Set_VL_2704 pass
13426 23:00:09.842657 arm64_za-ptrace_Disabled_ZA_for_VL_2704 skip
13427 23:00:09.842937 arm64_za-ptrace_Get_and_set_data_for_VL_2704 skip
13428 23:00:09.843016 arm64_za-ptrace_Set_VL_2720 pass
13429 23:00:09.843095 arm64_za-ptrace_Disabled_ZA_for_VL_2720 skip
13430 23:00:09.843194 arm64_za-ptrace_Get_and_set_data_for_VL_2720 skip
13431 23:00:09.843306 arm64_za-ptrace_Set_VL_2736 pass
13432 23:00:09.843467 arm64_za-ptrace_Disabled_ZA_for_VL_2736 skip
13433 23:00:09.843758 arm64_za-ptrace_Get_and_set_data_for_VL_2736 skip
13434 23:00:09.843846 arm64_za-ptrace_Set_VL_2752 pass
13435 23:00:09.843946 arm64_za-ptrace_Disabled_ZA_for_VL_2752 skip
13436 23:00:09.844028 arm64_za-ptrace_Get_and_set_data_for_VL_2752 skip
13437 23:00:09.844122 arm64_za-ptrace_Set_VL_2768 pass
13438 23:00:09.844193 arm64_za-ptrace_Disabled_ZA_for_VL_2768 skip
13439 23:00:09.844271 arm64_za-ptrace_Get_and_set_data_for_VL_2768 skip
13440 23:00:09.844340 arm64_za-ptrace_Set_VL_2784 pass
13441 23:00:09.844416 arm64_za-ptrace_Disabled_ZA_for_VL_2784 skip
13442 23:00:09.844509 arm64_za-ptrace_Get_and_set_data_for_VL_2784 skip
13443 23:00:09.844628 arm64_za-ptrace_Set_VL_2800 pass
13444 23:00:09.844727 arm64_za-ptrace_Disabled_ZA_for_VL_2800 skip
13445 23:00:09.844828 arm64_za-ptrace_Get_and_set_data_for_VL_2800 skip
13446 23:00:09.844907 arm64_za-ptrace_Set_VL_2816 pass
13447 23:00:09.845007 arm64_za-ptrace_Disabled_ZA_for_VL_2816 skip
13448 23:00:09.845122 arm64_za-ptrace_Get_and_set_data_for_VL_2816 skip
13449 23:00:09.845226 arm64_za-ptrace_Set_VL_2832 pass
13450 23:00:09.845321 arm64_za-ptrace_Disabled_ZA_for_VL_2832 skip
13451 23:00:09.845410 arm64_za-ptrace_Get_and_set_data_for_VL_2832 skip
13452 23:00:09.845490 arm64_za-ptrace_Set_VL_2848 pass
13453 23:00:09.845567 arm64_za-ptrace_Disabled_ZA_for_VL_2848 skip
13454 23:00:09.845631 arm64_za-ptrace_Get_and_set_data_for_VL_2848 skip
13455 23:00:09.845715 arm64_za-ptrace_Set_VL_2864 pass
13456 23:00:09.846021 arm64_za-ptrace_Disabled_ZA_for_VL_2864 skip
13457 23:00:09.846229 arm64_za-ptrace_Get_and_set_data_for_VL_2864 skip
13458 23:00:09.846465 arm64_za-ptrace_Set_VL_2880 pass
13459 23:00:09.846618 arm64_za-ptrace_Disabled_ZA_for_VL_2880 skip
13460 23:00:09.846764 arm64_za-ptrace_Get_and_set_data_for_VL_2880 skip
13461 23:00:09.846886 arm64_za-ptrace_Set_VL_2896 pass
13462 23:00:09.847004 arm64_za-ptrace_Disabled_ZA_for_VL_2896 skip
13463 23:00:09.847118 arm64_za-ptrace_Get_and_set_data_for_VL_2896 skip
13464 23:00:09.847304 arm64_za-ptrace_Set_VL_2912 pass
13465 23:00:09.850874 arm64_za-ptrace_Disabled_ZA_for_VL_2912 skip
13466 23:00:09.851008 arm64_za-ptrace_Get_and_set_data_for_VL_2912 skip
13467 23:00:09.851128 arm64_za-ptrace_Set_VL_2928 pass
13468 23:00:09.851230 arm64_za-ptrace_Disabled_ZA_for_VL_2928 skip
13469 23:00:09.851325 arm64_za-ptrace_Get_and_set_data_for_VL_2928 skip
13470 23:00:09.851453 arm64_za-ptrace_Set_VL_2944 pass
13471 23:00:09.851558 arm64_za-ptrace_Disabled_ZA_for_VL_2944 skip
13472 23:00:09.851670 arm64_za-ptrace_Get_and_set_data_for_VL_2944 skip
13473 23:00:09.851767 arm64_za-ptrace_Set_VL_2960 pass
13474 23:00:09.851873 arm64_za-ptrace_Disabled_ZA_for_VL_2960 skip
13475 23:00:09.851957 arm64_za-ptrace_Get_and_set_data_for_VL_2960 skip
13476 23:00:09.852043 arm64_za-ptrace_Set_VL_2976 pass
13477 23:00:09.852125 arm64_za-ptrace_Disabled_ZA_for_VL_2976 skip
13478 23:00:09.852220 arm64_za-ptrace_Get_and_set_data_for_VL_2976 skip
13479 23:00:09.852289 arm64_za-ptrace_Set_VL_2992 pass
13480 23:00:09.852372 arm64_za-ptrace_Disabled_ZA_for_VL_2992 skip
13481 23:00:09.852482 arm64_za-ptrace_Get_and_set_data_for_VL_2992 skip
13482 23:00:09.852567 arm64_za-ptrace_Set_VL_3008 pass
13483 23:00:09.852645 arm64_za-ptrace_Disabled_ZA_for_VL_3008 skip
13484 23:00:09.852712 arm64_za-ptrace_Get_and_set_data_for_VL_3008 skip
13485 23:00:09.852776 arm64_za-ptrace_Set_VL_3024 pass
13486 23:00:09.852850 arm64_za-ptrace_Disabled_ZA_for_VL_3024 skip
13487 23:00:09.852927 arm64_za-ptrace_Get_and_set_data_for_VL_3024 skip
13488 23:00:09.853004 arm64_za-ptrace_Set_VL_3040 pass
13489 23:00:09.853102 arm64_za-ptrace_Disabled_ZA_for_VL_3040 skip
13490 23:00:09.853217 arm64_za-ptrace_Get_and_set_data_for_VL_3040 skip
13491 23:00:09.853316 arm64_za-ptrace_Set_VL_3056 pass
13492 23:00:09.853407 arm64_za-ptrace_Disabled_ZA_for_VL_3056 skip
13493 23:00:09.853698 arm64_za-ptrace_Get_and_set_data_for_VL_3056 skip
13494 23:00:09.853807 arm64_za-ptrace_Set_VL_3072 pass
13495 23:00:09.853918 arm64_za-ptrace_Disabled_ZA_for_VL_3072 skip
13496 23:00:09.854019 arm64_za-ptrace_Get_and_set_data_for_VL_3072 skip
13497 23:00:09.854129 arm64_za-ptrace_Set_VL_3088 pass
13498 23:00:09.854222 arm64_za-ptrace_Disabled_ZA_for_VL_3088 skip
13499 23:00:09.854297 arm64_za-ptrace_Get_and_set_data_for_VL_3088 skip
13500 23:00:09.854358 arm64_za-ptrace_Set_VL_3104 pass
13501 23:00:09.854464 arm64_za-ptrace_Disabled_ZA_for_VL_3104 skip
13502 23:00:09.858656 arm64_za-ptrace_Get_and_set_data_for_VL_3104 skip
13503 23:00:09.859009 arm64_za-ptrace_Set_VL_3120 pass
13504 23:00:09.859115 arm64_za-ptrace_Disabled_ZA_for_VL_3120 skip
13505 23:00:09.859226 arm64_za-ptrace_Get_and_set_data_for_VL_3120 skip
13506 23:00:09.859368 arm64_za-ptrace_Set_VL_3136 pass
13507 23:00:09.859449 arm64_za-ptrace_Disabled_ZA_for_VL_3136 skip
13508 23:00:09.859528 arm64_za-ptrace_Get_and_set_data_for_VL_3136 skip
13509 23:00:09.859629 arm64_za-ptrace_Set_VL_3152 pass
13510 23:00:09.859737 arm64_za-ptrace_Disabled_ZA_for_VL_3152 skip
13511 23:00:09.859856 arm64_za-ptrace_Get_and_set_data_for_VL_3152 skip
13512 23:00:09.860066 arm64_za-ptrace_Set_VL_3168 pass
13513 23:00:09.860158 arm64_za-ptrace_Disabled_ZA_for_VL_3168 skip
13514 23:00:09.860226 arm64_za-ptrace_Get_and_set_data_for_VL_3168 skip
13515 23:00:09.860332 arm64_za-ptrace_Set_VL_3184 pass
13516 23:00:09.860424 arm64_za-ptrace_Disabled_ZA_for_VL_3184 skip
13517 23:00:09.860531 arm64_za-ptrace_Get_and_set_data_for_VL_3184 skip
13518 23:00:09.860653 arm64_za-ptrace_Set_VL_3200 pass
13519 23:00:09.860751 arm64_za-ptrace_Disabled_ZA_for_VL_3200 skip
13520 23:00:09.860879 arm64_za-ptrace_Get_and_set_data_for_VL_3200 skip
13521 23:00:09.860991 arm64_za-ptrace_Set_VL_3216 pass
13522 23:00:09.861090 arm64_za-ptrace_Disabled_ZA_for_VL_3216 skip
13523 23:00:09.861195 arm64_za-ptrace_Get_and_set_data_for_VL_3216 skip
13524 23:00:09.861306 arm64_za-ptrace_Set_VL_3232 pass
13525 23:00:09.861418 arm64_za-ptrace_Disabled_ZA_for_VL_3232 skip
13526 23:00:09.861510 arm64_za-ptrace_Get_and_set_data_for_VL_3232 skip
13527 23:00:09.861610 arm64_za-ptrace_Set_VL_3248 pass
13528 23:00:09.861730 arm64_za-ptrace_Disabled_ZA_for_VL_3248 skip
13529 23:00:09.861837 arm64_za-ptrace_Get_and_set_data_for_VL_3248 skip
13530 23:00:09.861942 arm64_za-ptrace_Set_VL_3264 pass
13531 23:00:09.862060 arm64_za-ptrace_Disabled_ZA_for_VL_3264 skip
13532 23:00:09.862151 arm64_za-ptrace_Get_and_set_data_for_VL_3264 skip
13533 23:00:09.862234 arm64_za-ptrace_Set_VL_3280 pass
13534 23:00:09.862316 arm64_za-ptrace_Disabled_ZA_for_VL_3280 skip
13535 23:00:09.862396 arm64_za-ptrace_Get_and_set_data_for_VL_3280 skip
13536 23:00:09.862472 arm64_za-ptrace_Set_VL_3296 pass
13537 23:00:09.862540 arm64_za-ptrace_Disabled_ZA_for_VL_3296 skip
13538 23:00:09.862614 arm64_za-ptrace_Get_and_set_data_for_VL_3296 skip
13539 23:00:09.862676 arm64_za-ptrace_Set_VL_3312 pass
13540 23:00:09.862734 arm64_za-ptrace_Disabled_ZA_for_VL_3312 skip
13541 23:00:09.862793 arm64_za-ptrace_Get_and_set_data_for_VL_3312 skip
13542 23:00:09.866685 arm64_za-ptrace_Set_VL_3328 pass
13543 23:00:09.867133 arm64_za-ptrace_Disabled_ZA_for_VL_3328 skip
13544 23:00:09.867337 arm64_za-ptrace_Get_and_set_data_for_VL_3328 skip
13545 23:00:09.867523 arm64_za-ptrace_Set_VL_3344 pass
13546 23:00:09.867734 arm64_za-ptrace_Disabled_ZA_for_VL_3344 skip
13547 23:00:09.867917 arm64_za-ptrace_Get_and_set_data_for_VL_3344 skip
13548 23:00:09.868070 arm64_za-ptrace_Set_VL_3360 pass
13549 23:00:09.868196 arm64_za-ptrace_Disabled_ZA_for_VL_3360 skip
13550 23:00:09.868317 arm64_za-ptrace_Get_and_set_data_for_VL_3360 skip
13551 23:00:09.868437 arm64_za-ptrace_Set_VL_3376 pass
13552 23:00:09.868554 arm64_za-ptrace_Disabled_ZA_for_VL_3376 skip
13553 23:00:09.868673 arm64_za-ptrace_Get_and_set_data_for_VL_3376 skip
13554 23:00:09.868792 arm64_za-ptrace_Set_VL_3392 pass
13555 23:00:09.868910 arm64_za-ptrace_Disabled_ZA_for_VL_3392 skip
13556 23:00:09.869033 arm64_za-ptrace_Get_and_set_data_for_VL_3392 skip
13557 23:00:09.869152 arm64_za-ptrace_Set_VL_3408 pass
13558 23:00:09.869304 arm64_za-ptrace_Disabled_ZA_for_VL_3408 skip
13559 23:00:09.869430 arm64_za-ptrace_Get_and_set_data_for_VL_3408 skip
13560 23:00:09.869552 arm64_za-ptrace_Set_VL_3424 pass
13561 23:00:09.869689 arm64_za-ptrace_Disabled_ZA_for_VL_3424 skip
13562 23:00:09.869817 arm64_za-ptrace_Get_and_set_data_for_VL_3424 skip
13563 23:00:09.869937 arm64_za-ptrace_Set_VL_3440 pass
13564 23:00:09.870032 arm64_za-ptrace_Disabled_ZA_for_VL_3440 skip
13565 23:00:09.870115 arm64_za-ptrace_Get_and_set_data_for_VL_3440 skip
13566 23:00:09.870197 arm64_za-ptrace_Set_VL_3456 pass
13567 23:00:09.870279 arm64_za-ptrace_Disabled_ZA_for_VL_3456 skip
13568 23:00:09.870364 arm64_za-ptrace_Get_and_set_data_for_VL_3456 skip
13569 23:00:09.870447 arm64_za-ptrace_Set_VL_3472 pass
13570 23:00:09.870526 arm64_za-ptrace_Disabled_ZA_for_VL_3472 skip
13571 23:00:09.870609 arm64_za-ptrace_Get_and_set_data_for_VL_3472 skip
13572 23:00:09.870705 arm64_za-ptrace_Set_VL_3488 pass
13573 23:00:09.870770 arm64_za-ptrace_Disabled_ZA_for_VL_3488 skip
13574 23:00:09.870829 arm64_za-ptrace_Get_and_set_data_for_VL_3488 skip
13575 23:00:09.870888 arm64_za-ptrace_Set_VL_3504 pass
13576 23:00:09.870947 arm64_za-ptrace_Disabled_ZA_for_VL_3504 skip
13577 23:00:09.871011 arm64_za-ptrace_Get_and_set_data_for_VL_3504 skip
13578 23:00:09.871069 arm64_za-ptrace_Set_VL_3520 pass
13579 23:00:09.871128 arm64_za-ptrace_Disabled_ZA_for_VL_3520 skip
13580 23:00:09.871208 arm64_za-ptrace_Get_and_set_data_for_VL_3520 skip
13581 23:00:09.871293 arm64_za-ptrace_Set_VL_3536 pass
13582 23:00:09.871375 arm64_za-ptrace_Disabled_ZA_for_VL_3536 skip
13583 23:00:09.871459 arm64_za-ptrace_Get_and_set_data_for_VL_3536 skip
13584 23:00:09.871540 arm64_za-ptrace_Set_VL_3552 pass
13585 23:00:09.874663 arm64_za-ptrace_Disabled_ZA_for_VL_3552 skip
13586 23:00:09.874989 arm64_za-ptrace_Get_and_set_data_for_VL_3552 skip
13587 23:00:09.875071 arm64_za-ptrace_Set_VL_3568 pass
13588 23:00:09.875147 arm64_za-ptrace_Disabled_ZA_for_VL_3568 skip
13589 23:00:09.875258 arm64_za-ptrace_Get_and_set_data_for_VL_3568 skip
13590 23:00:09.875347 arm64_za-ptrace_Set_VL_3584 pass
13591 23:00:09.875440 arm64_za-ptrace_Disabled_ZA_for_VL_3584 skip
13592 23:00:09.875518 arm64_za-ptrace_Get_and_set_data_for_VL_3584 skip
13593 23:00:09.897779 arm64_za-ptrace_Set_VL_3600 pass
13594 23:00:09.898034 arm64_za-ptrace_Disabled_ZA_for_VL_3600 skip
13595 23:00:09.898111 arm64_za-ptrace_Get_and_set_data_for_VL_3600 skip
13596 23:00:09.898183 arm64_za-ptrace_Set_VL_3616 pass
13597 23:00:09.898458 arm64_za-ptrace_Disabled_ZA_for_VL_3616 skip
13598 23:00:09.898549 arm64_za-ptrace_Get_and_set_data_for_VL_3616 skip
13599 23:00:09.898617 arm64_za-ptrace_Set_VL_3632 pass
13600 23:00:09.898712 arm64_za-ptrace_Disabled_ZA_for_VL_3632 skip
13601 23:00:09.898791 arm64_za-ptrace_Get_and_set_data_for_VL_3632 skip
13602 23:00:09.898856 arm64_za-ptrace_Set_VL_3648 pass
13603 23:00:09.898932 arm64_za-ptrace_Disabled_ZA_for_VL_3648 skip
13604 23:00:09.898996 arm64_za-ptrace_Get_and_set_data_for_VL_3648 skip
13605 23:00:09.899071 arm64_za-ptrace_Set_VL_3664 pass
13606 23:00:09.899158 arm64_za-ptrace_Disabled_ZA_for_VL_3664 skip
13607 23:00:09.899267 arm64_za-ptrace_Get_and_set_data_for_VL_3664 skip
13608 23:00:09.899549 arm64_za-ptrace_Set_VL_3680 pass
13609 23:00:09.899663 arm64_za-ptrace_Disabled_ZA_for_VL_3680 skip
13610 23:00:09.899779 arm64_za-ptrace_Get_and_set_data_for_VL_3680 skip
13611 23:00:09.899881 arm64_za-ptrace_Set_VL_3696 pass
13612 23:00:09.899990 arm64_za-ptrace_Disabled_ZA_for_VL_3696 skip
13613 23:00:09.900111 arm64_za-ptrace_Get_and_set_data_for_VL_3696 skip
13614 23:00:09.900194 arm64_za-ptrace_Set_VL_3712 pass
13615 23:00:09.900278 arm64_za-ptrace_Disabled_ZA_for_VL_3712 skip
13616 23:00:09.900379 arm64_za-ptrace_Get_and_set_data_for_VL_3712 skip
13617 23:00:09.900469 arm64_za-ptrace_Set_VL_3728 pass
13618 23:00:09.900558 arm64_za-ptrace_Disabled_ZA_for_VL_3728 skip
13619 23:00:09.900636 arm64_za-ptrace_Get_and_set_data_for_VL_3728 skip
13620 23:00:09.900727 arm64_za-ptrace_Set_VL_3744 pass
13621 23:00:09.900998 arm64_za-ptrace_Disabled_ZA_for_VL_3744 skip
13622 23:00:09.901124 arm64_za-ptrace_Get_and_set_data_for_VL_3744 skip
13623 23:00:09.901249 arm64_za-ptrace_Set_VL_3760 pass
13624 23:00:09.901348 arm64_za-ptrace_Disabled_ZA_for_VL_3760 skip
13625 23:00:09.901471 arm64_za-ptrace_Get_and_set_data_for_VL_3760 skip
13626 23:00:09.901578 arm64_za-ptrace_Set_VL_3776 pass
13627 23:00:09.901906 arm64_za-ptrace_Disabled_ZA_for_VL_3776 skip
13628 23:00:09.902015 arm64_za-ptrace_Get_and_set_data_for_VL_3776 skip
13629 23:00:09.902140 arm64_za-ptrace_Set_VL_3792 pass
13630 23:00:09.902247 arm64_za-ptrace_Disabled_ZA_for_VL_3792 skip
13631 23:00:09.902358 arm64_za-ptrace_Get_and_set_data_for_VL_3792 skip
13632 23:00:09.902464 arm64_za-ptrace_Set_VL_3808 pass
13633 23:00:09.902542 arm64_za-ptrace_Disabled_ZA_for_VL_3808 skip
13634 23:00:09.906750 arm64_za-ptrace_Get_and_set_data_for_VL_3808 skip
13635 23:00:09.907106 arm64_za-ptrace_Set_VL_3824 pass
13636 23:00:09.907209 arm64_za-ptrace_Disabled_ZA_for_VL_3824 skip
13637 23:00:09.907299 arm64_za-ptrace_Get_and_set_data_for_VL_3824 skip
13638 23:00:09.907399 arm64_za-ptrace_Set_VL_3840 pass
13639 23:00:09.907486 arm64_za-ptrace_Disabled_ZA_for_VL_3840 skip
13640 23:00:09.907587 arm64_za-ptrace_Get_and_set_data_for_VL_3840 skip
13641 23:00:09.907689 arm64_za-ptrace_Set_VL_3856 pass
13642 23:00:09.907791 arm64_za-ptrace_Disabled_ZA_for_VL_3856 skip
13643 23:00:09.907899 arm64_za-ptrace_Get_and_set_data_for_VL_3856 skip
13644 23:00:09.908197 arm64_za-ptrace_Set_VL_3872 pass
13645 23:00:09.908294 arm64_za-ptrace_Disabled_ZA_for_VL_3872 skip
13646 23:00:09.908398 arm64_za-ptrace_Get_and_set_data_for_VL_3872 skip
13647 23:00:09.908520 arm64_za-ptrace_Set_VL_3888 pass
13648 23:00:09.908612 arm64_za-ptrace_Disabled_ZA_for_VL_3888 skip
13649 23:00:09.908720 arm64_za-ptrace_Get_and_set_data_for_VL_3888 skip
13650 23:00:09.908824 arm64_za-ptrace_Set_VL_3904 pass
13651 23:00:09.909104 arm64_za-ptrace_Disabled_ZA_for_VL_3904 skip
13652 23:00:09.909213 arm64_za-ptrace_Get_and_set_data_for_VL_3904 skip
13653 23:00:09.909298 arm64_za-ptrace_Set_VL_3920 pass
13654 23:00:09.909376 arm64_za-ptrace_Disabled_ZA_for_VL_3920 skip
13655 23:00:09.909472 arm64_za-ptrace_Get_and_set_data_for_VL_3920 skip
13656 23:00:09.909559 arm64_za-ptrace_Set_VL_3936 pass
13657 23:00:09.909670 arm64_za-ptrace_Disabled_ZA_for_VL_3936 skip
13658 23:00:09.909773 arm64_za-ptrace_Get_and_set_data_for_VL_3936 skip
13659 23:00:09.909872 arm64_za-ptrace_Set_VL_3952 pass
13660 23:00:09.909970 arm64_za-ptrace_Disabled_ZA_for_VL_3952 skip
13661 23:00:09.910267 arm64_za-ptrace_Get_and_set_data_for_VL_3952 skip
13662 23:00:09.910362 arm64_za-ptrace_Set_VL_3968 pass
13663 23:00:09.910446 arm64_za-ptrace_Disabled_ZA_for_VL_3968 skip
13664 23:00:09.910546 arm64_za-ptrace_Get_and_set_data_for_VL_3968 skip
13665 23:00:09.910632 arm64_za-ptrace_Set_VL_3984 pass
13666 23:00:09.914994 arm64_za-ptrace_Disabled_ZA_for_VL_3984 skip
13667 23:00:09.915148 arm64_za-ptrace_Get_and_set_data_for_VL_3984 skip
13668 23:00:09.915239 arm64_za-ptrace_Set_VL_4000 pass
13669 23:00:09.915344 arm64_za-ptrace_Disabled_ZA_for_VL_4000 skip
13670 23:00:09.915449 arm64_za-ptrace_Get_and_set_data_for_VL_4000 skip
13671 23:00:09.915552 arm64_za-ptrace_Set_VL_4016 pass
13672 23:00:09.915653 arm64_za-ptrace_Disabled_ZA_for_VL_4016 skip
13673 23:00:09.915948 arm64_za-ptrace_Get_and_set_data_for_VL_4016 skip
13674 23:00:09.916042 arm64_za-ptrace_Set_VL_4032 pass
13675 23:00:09.916145 arm64_za-ptrace_Disabled_ZA_for_VL_4032 skip
13676 23:00:09.916233 arm64_za-ptrace_Get_and_set_data_for_VL_4032 skip
13677 23:00:09.916336 arm64_za-ptrace_Set_VL_4048 pass
13678 23:00:09.916441 arm64_za-ptrace_Disabled_ZA_for_VL_4048 skip
13679 23:00:09.916720 arm64_za-ptrace_Get_and_set_data_for_VL_4048 skip
13680 23:00:09.916812 arm64_za-ptrace_Set_VL_4064 pass
13681 23:00:09.916914 arm64_za-ptrace_Disabled_ZA_for_VL_4064 skip
13682 23:00:09.917001 arm64_za-ptrace_Get_and_set_data_for_VL_4064 skip
13683 23:00:09.917099 arm64_za-ptrace_Set_VL_4080 pass
13684 23:00:09.917186 arm64_za-ptrace_Disabled_ZA_for_VL_4080 skip
13685 23:00:09.917287 arm64_za-ptrace_Get_and_set_data_for_VL_4080 skip
13686 23:00:09.917391 arm64_za-ptrace_Set_VL_4096 pass
13687 23:00:09.917496 arm64_za-ptrace_Disabled_ZA_for_VL_4096 skip
13688 23:00:09.917604 arm64_za-ptrace_Get_and_set_data_for_VL_4096 skip
13689 23:00:09.917899 arm64_za-ptrace_Set_VL_4112 pass
13690 23:00:09.917986 arm64_za-ptrace_Disabled_ZA_for_VL_4112 skip
13691 23:00:09.918077 arm64_za-ptrace_Get_and_set_data_for_VL_4112 skip
13692 23:00:09.918157 arm64_za-ptrace_Set_VL_4128 pass
13693 23:00:09.918245 arm64_za-ptrace_Disabled_ZA_for_VL_4128 skip
13694 23:00:09.918336 arm64_za-ptrace_Get_and_set_data_for_VL_4128 skip
13695 23:00:09.918430 arm64_za-ptrace_Set_VL_4144 pass
13696 23:00:09.922736 arm64_za-ptrace_Disabled_ZA_for_VL_4144 skip
13697 23:00:09.923075 arm64_za-ptrace_Get_and_set_data_for_VL_4144 skip
13698 23:00:09.923171 arm64_za-ptrace_Set_VL_4160 pass
13699 23:00:09.923272 arm64_za-ptrace_Disabled_ZA_for_VL_4160 skip
13700 23:00:09.923373 arm64_za-ptrace_Get_and_set_data_for_VL_4160 skip
13701 23:00:09.923474 arm64_za-ptrace_Set_VL_4176 pass
13702 23:00:09.923577 arm64_za-ptrace_Disabled_ZA_for_VL_4176 skip
13703 23:00:09.923677 arm64_za-ptrace_Get_and_set_data_for_VL_4176 skip
13704 23:00:09.923984 arm64_za-ptrace_Set_VL_4192 pass
13705 23:00:09.924091 arm64_za-ptrace_Disabled_ZA_for_VL_4192 skip
13706 23:00:09.924195 arm64_za-ptrace_Get_and_set_data_for_VL_4192 skip
13707 23:00:09.924503 arm64_za-ptrace_Set_VL_4208 pass
13708 23:00:09.924598 arm64_za-ptrace_Disabled_ZA_for_VL_4208 skip
13709 23:00:09.924684 arm64_za-ptrace_Get_and_set_data_for_VL_4208 skip
13710 23:00:09.924770 arm64_za-ptrace_Set_VL_4224 pass
13711 23:00:09.925051 arm64_za-ptrace_Disabled_ZA_for_VL_4224 skip
13712 23:00:09.925144 arm64_za-ptrace_Get_and_set_data_for_VL_4224 skip
13713 23:00:09.925228 arm64_za-ptrace_Set_VL_4240 pass
13714 23:00:09.925310 arm64_za-ptrace_Disabled_ZA_for_VL_4240 skip
13715 23:00:09.925412 arm64_za-ptrace_Get_and_set_data_for_VL_4240 skip
13716 23:00:09.925500 arm64_za-ptrace_Set_VL_4256 pass
13717 23:00:09.925586 arm64_za-ptrace_Disabled_ZA_for_VL_4256 skip
13718 23:00:09.925696 arm64_za-ptrace_Get_and_set_data_for_VL_4256 skip
13719 23:00:09.925788 arm64_za-ptrace_Set_VL_4272 pass
13720 23:00:09.925889 arm64_za-ptrace_Disabled_ZA_for_VL_4272 skip
13721 23:00:09.925992 arm64_za-ptrace_Get_and_set_data_for_VL_4272 skip
13722 23:00:09.926099 arm64_za-ptrace_Set_VL_4288 pass
13723 23:00:09.926397 arm64_za-ptrace_Disabled_ZA_for_VL_4288 skip
13724 23:00:09.926490 arm64_za-ptrace_Get_and_set_data_for_VL_4288 skip
13725 23:00:09.926594 arm64_za-ptrace_Set_VL_4304 pass
13726 23:00:09.930764 arm64_za-ptrace_Disabled_ZA_for_VL_4304 skip
13727 23:00:09.931165 arm64_za-ptrace_Get_and_set_data_for_VL_4304 skip
13728 23:00:09.931267 arm64_za-ptrace_Set_VL_4320 pass
13729 23:00:09.931355 arm64_za-ptrace_Disabled_ZA_for_VL_4320 skip
13730 23:00:09.931460 arm64_za-ptrace_Get_and_set_data_for_VL_4320 skip
13731 23:00:09.931552 arm64_za-ptrace_Set_VL_4336 pass
13732 23:00:09.931651 arm64_za-ptrace_Disabled_ZA_for_VL_4336 skip
13733 23:00:09.931739 arm64_za-ptrace_Get_and_set_data_for_VL_4336 skip
13734 23:00:09.931839 arm64_za-ptrace_Set_VL_4352 pass
13735 23:00:09.932124 arm64_za-ptrace_Disabled_ZA_for_VL_4352 skip
13736 23:00:09.932216 arm64_za-ptrace_Get_and_set_data_for_VL_4352 skip
13737 23:00:09.932316 arm64_za-ptrace_Set_VL_4368 pass
13738 23:00:09.932404 arm64_za-ptrace_Disabled_ZA_for_VL_4368 skip
13739 23:00:09.932506 arm64_za-ptrace_Get_and_set_data_for_VL_4368 skip
13740 23:00:09.932604 arm64_za-ptrace_Set_VL_4384 pass
13741 23:00:09.932704 arm64_za-ptrace_Disabled_ZA_for_VL_4384 skip
13742 23:00:09.932826 arm64_za-ptrace_Get_and_set_data_for_VL_4384 skip
13743 23:00:09.932928 arm64_za-ptrace_Set_VL_4400 pass
13744 23:00:09.933031 arm64_za-ptrace_Disabled_ZA_for_VL_4400 skip
13745 23:00:09.933323 arm64_za-ptrace_Get_and_set_data_for_VL_4400 skip
13746 23:00:09.933435 arm64_za-ptrace_Set_VL_4416 pass
13747 23:00:09.933536 arm64_za-ptrace_Disabled_ZA_for_VL_4416 skip
13748 23:00:09.933832 arm64_za-ptrace_Get_and_set_data_for_VL_4416 skip
13749 23:00:09.933931 arm64_za-ptrace_Set_VL_4432 pass
13750 23:00:09.934018 arm64_za-ptrace_Disabled_ZA_for_VL_4432 skip
13751 23:00:09.934122 arm64_za-ptrace_Get_and_set_data_for_VL_4432 skip
13752 23:00:09.934213 arm64_za-ptrace_Set_VL_4448 pass
13753 23:00:09.934316 arm64_za-ptrace_Disabled_ZA_for_VL_4448 skip
13754 23:00:09.934421 arm64_za-ptrace_Get_and_set_data_for_VL_4448 skip
13755 23:00:09.934527 arm64_za-ptrace_Set_VL_4464 pass
13756 23:00:09.938723 arm64_za-ptrace_Disabled_ZA_for_VL_4464 skip
13757 23:00:09.939062 arm64_za-ptrace_Get_and_set_data_for_VL_4464 skip
13758 23:00:09.939160 arm64_za-ptrace_Set_VL_4480 pass
13759 23:00:09.939261 arm64_za-ptrace_Disabled_ZA_for_VL_4480 skip
13760 23:00:09.939366 arm64_za-ptrace_Get_and_set_data_for_VL_4480 skip
13761 23:00:09.939456 arm64_za-ptrace_Set_VL_4496 pass
13762 23:00:09.939582 arm64_za-ptrace_Disabled_ZA_for_VL_4496 skip
13763 23:00:09.939686 arm64_za-ptrace_Get_and_set_data_for_VL_4496 skip
13764 23:00:09.939981 arm64_za-ptrace_Set_VL_4512 pass
13765 23:00:09.940073 arm64_za-ptrace_Disabled_ZA_for_VL_4512 skip
13766 23:00:09.940170 arm64_za-ptrace_Get_and_set_data_for_VL_4512 skip
13767 23:00:09.940254 arm64_za-ptrace_Set_VL_4528 pass
13768 23:00:09.940545 arm64_za-ptrace_Disabled_ZA_for_VL_4528 skip
13769 23:00:09.940638 arm64_za-ptrace_Get_and_set_data_for_VL_4528 skip
13770 23:00:09.940741 arm64_za-ptrace_Set_VL_4544 pass
13771 23:00:09.940840 arm64_za-ptrace_Disabled_ZA_for_VL_4544 skip
13772 23:00:09.940938 arm64_za-ptrace_Get_and_set_data_for_VL_4544 skip
13773 23:00:09.941021 arm64_za-ptrace_Set_VL_4560 pass
13774 23:00:09.941113 arm64_za-ptrace_Disabled_ZA_for_VL_4560 skip
13775 23:00:09.941382 arm64_za-ptrace_Get_and_set_data_for_VL_4560 skip
13776 23:00:09.941468 arm64_za-ptrace_Set_VL_4576 pass
13777 23:00:09.941756 arm64_za-ptrace_Disabled_ZA_for_VL_4576 skip
13778 23:00:09.941847 arm64_za-ptrace_Get_and_set_data_for_VL_4576 skip
13779 23:00:09.941945 arm64_za-ptrace_Set_VL_4592 pass
13780 23:00:09.942332 arm64_za-ptrace_Disabled_ZA_for_VL_4592 skip
13781 23:00:09.942438 arm64_za-ptrace_Get_and_set_data_for_VL_4592 skip
13782 23:00:09.942522 arm64_za-ptrace_Set_VL_4608 pass
13783 23:00:09.942797 arm64_za-ptrace_Disabled_ZA_for_VL_4608 skip
13784 23:00:09.942896 arm64_za-ptrace_Get_and_set_data_for_VL_4608 skip
13785 23:00:09.950701 arm64_za-ptrace_Set_VL_4624 pass
13786 23:00:09.969384 arm64_za-ptrace_Disabled_ZA_for_VL_4624 skip
13787 23:00:09.969850 arm64_za-ptrace_Get_and_set_data_for_VL_4624 skip
13788 23:00:09.969946 arm64_za-ptrace_Set_VL_4640 pass
13789 23:00:09.970056 arm64_za-ptrace_Disabled_ZA_for_VL_4640 skip
13790 23:00:09.970158 arm64_za-ptrace_Get_and_set_data_for_VL_4640 skip
13791 23:00:09.970269 arm64_za-ptrace_Set_VL_4656 pass
13792 23:00:09.970357 arm64_za-ptrace_Disabled_ZA_for_VL_4656 skip
13793 23:00:09.970454 arm64_za-ptrace_Get_and_set_data_for_VL_4656 skip
13794 23:00:09.970550 arm64_za-ptrace_Set_VL_4672 pass
13795 23:00:09.970635 arm64_za-ptrace_Disabled_ZA_for_VL_4672 skip
13796 23:00:09.970724 arm64_za-ptrace_Get_and_set_data_for_VL_4672 skip
13797 23:00:09.970832 arm64_za-ptrace_Set_VL_4688 pass
13798 23:00:09.970925 arm64_za-ptrace_Disabled_ZA_for_VL_4688 skip
13799 23:00:09.971031 arm64_za-ptrace_Get_and_set_data_for_VL_4688 skip
13800 23:00:09.971117 arm64_za-ptrace_Set_VL_4704 pass
13801 23:00:09.971238 arm64_za-ptrace_Disabled_ZA_for_VL_4704 skip
13802 23:00:09.971360 arm64_za-ptrace_Get_and_set_data_for_VL_4704 skip
13803 23:00:09.971459 arm64_za-ptrace_Set_VL_4720 pass
13804 23:00:09.971572 arm64_za-ptrace_Disabled_ZA_for_VL_4720 skip
13805 23:00:09.971668 arm64_za-ptrace_Get_and_set_data_for_VL_4720 skip
13806 23:00:09.971764 arm64_za-ptrace_Set_VL_4736 pass
13807 23:00:09.971833 arm64_za-ptrace_Disabled_ZA_for_VL_4736 skip
13808 23:00:09.971911 arm64_za-ptrace_Get_and_set_data_for_VL_4736 skip
13809 23:00:09.971989 arm64_za-ptrace_Set_VL_4752 pass
13810 23:00:09.972252 arm64_za-ptrace_Disabled_ZA_for_VL_4752 skip
13811 23:00:09.972325 arm64_za-ptrace_Get_and_set_data_for_VL_4752 skip
13812 23:00:09.972433 arm64_za-ptrace_Set_VL_4768 pass
13813 23:00:09.972522 arm64_za-ptrace_Disabled_ZA_for_VL_4768 skip
13814 23:00:09.972625 arm64_za-ptrace_Get_and_set_data_for_VL_4768 skip
13815 23:00:09.972716 arm64_za-ptrace_Set_VL_4784 pass
13816 23:00:09.972824 arm64_za-ptrace_Disabled_ZA_for_VL_4784 skip
13817 23:00:09.972927 arm64_za-ptrace_Get_and_set_data_for_VL_4784 skip
13818 23:00:09.973018 arm64_za-ptrace_Set_VL_4800 pass
13819 23:00:09.973125 arm64_za-ptrace_Disabled_ZA_for_VL_4800 skip
13820 23:00:09.973233 arm64_za-ptrace_Get_and_set_data_for_VL_4800 skip
13821 23:00:09.973320 arm64_za-ptrace_Set_VL_4816 pass
13822 23:00:09.973410 arm64_za-ptrace_Disabled_ZA_for_VL_4816 skip
13823 23:00:09.973530 arm64_za-ptrace_Get_and_set_data_for_VL_4816 skip
13824 23:00:09.973806 arm64_za-ptrace_Set_VL_4832 pass
13825 23:00:09.973889 arm64_za-ptrace_Disabled_ZA_for_VL_4832 skip
13826 23:00:09.974011 arm64_za-ptrace_Get_and_set_data_for_VL_4832 skip
13827 23:00:09.974103 arm64_za-ptrace_Set_VL_4848 pass
13828 23:00:09.974223 arm64_za-ptrace_Disabled_ZA_for_VL_4848 skip
13829 23:00:09.974312 arm64_za-ptrace_Get_and_set_data_for_VL_4848 skip
13830 23:00:09.974442 arm64_za-ptrace_Set_VL_4864 pass
13831 23:00:09.974551 arm64_za-ptrace_Disabled_ZA_for_VL_4864 skip
13832 23:00:09.978688 arm64_za-ptrace_Get_and_set_data_for_VL_4864 skip
13833 23:00:09.979078 arm64_za-ptrace_Set_VL_4880 pass
13834 23:00:09.979161 arm64_za-ptrace_Disabled_ZA_for_VL_4880 skip
13835 23:00:09.979240 arm64_za-ptrace_Get_and_set_data_for_VL_4880 skip
13836 23:00:09.979332 arm64_za-ptrace_Set_VL_4896 pass
13837 23:00:09.979404 arm64_za-ptrace_Disabled_ZA_for_VL_4896 skip
13838 23:00:09.979502 arm64_za-ptrace_Get_and_set_data_for_VL_4896 skip
13839 23:00:09.979579 arm64_za-ptrace_Set_VL_4912 pass
13840 23:00:09.979667 arm64_za-ptrace_Disabled_ZA_for_VL_4912 skip
13841 23:00:09.979758 arm64_za-ptrace_Get_and_set_data_for_VL_4912 skip
13842 23:00:09.979866 arm64_za-ptrace_Set_VL_4928 pass
13843 23:00:09.979956 arm64_za-ptrace_Disabled_ZA_for_VL_4928 skip
13844 23:00:09.980054 arm64_za-ptrace_Get_and_set_data_for_VL_4928 skip
13845 23:00:09.980155 arm64_za-ptrace_Set_VL_4944 pass
13846 23:00:09.980269 arm64_za-ptrace_Disabled_ZA_for_VL_4944 skip
13847 23:00:09.980358 arm64_za-ptrace_Get_and_set_data_for_VL_4944 skip
13848 23:00:09.980646 arm64_za-ptrace_Set_VL_4960 pass
13849 23:00:09.980725 arm64_za-ptrace_Disabled_ZA_for_VL_4960 skip
13850 23:00:09.980811 arm64_za-ptrace_Get_and_set_data_for_VL_4960 skip
13851 23:00:09.980892 arm64_za-ptrace_Set_VL_4976 pass
13852 23:00:09.980971 arm64_za-ptrace_Disabled_ZA_for_VL_4976 skip
13853 23:00:09.981040 arm64_za-ptrace_Get_and_set_data_for_VL_4976 skip
13854 23:00:09.981115 arm64_za-ptrace_Set_VL_4992 pass
13855 23:00:09.981180 arm64_za-ptrace_Disabled_ZA_for_VL_4992 skip
13856 23:00:09.981254 arm64_za-ptrace_Get_and_set_data_for_VL_4992 skip
13857 23:00:09.981507 arm64_za-ptrace_Set_VL_5008 pass
13858 23:00:09.981576 arm64_za-ptrace_Disabled_ZA_for_VL_5008 skip
13859 23:00:09.981660 arm64_za-ptrace_Get_and_set_data_for_VL_5008 skip
13860 23:00:09.981727 arm64_za-ptrace_Set_VL_5024 pass
13861 23:00:09.981801 arm64_za-ptrace_Disabled_ZA_for_VL_5024 skip
13862 23:00:09.982066 arm64_za-ptrace_Get_and_set_data_for_VL_5024 skip
13863 23:00:09.982153 arm64_za-ptrace_Set_VL_5040 pass
13864 23:00:09.982262 arm64_za-ptrace_Disabled_ZA_for_VL_5040 skip
13865 23:00:09.982345 arm64_za-ptrace_Get_and_set_data_for_VL_5040 skip
13866 23:00:09.982451 arm64_za-ptrace_Set_VL_5056 pass
13867 23:00:09.982565 arm64_za-ptrace_Disabled_ZA_for_VL_5056 skip
13868 23:00:09.986682 arm64_za-ptrace_Get_and_set_data_for_VL_5056 skip
13869 23:00:09.987075 arm64_za-ptrace_Set_VL_5072 pass
13870 23:00:09.987177 arm64_za-ptrace_Disabled_ZA_for_VL_5072 skip
13871 23:00:09.987261 arm64_za-ptrace_Get_and_set_data_for_VL_5072 skip
13872 23:00:09.987334 arm64_za-ptrace_Set_VL_5088 pass
13873 23:00:09.987413 arm64_za-ptrace_Disabled_ZA_for_VL_5088 skip
13874 23:00:09.987486 arm64_za-ptrace_Get_and_set_data_for_VL_5088 skip
13875 23:00:09.987578 arm64_za-ptrace_Set_VL_5104 pass
13876 23:00:09.987668 arm64_za-ptrace_Disabled_ZA_for_VL_5104 skip
13877 23:00:09.987756 arm64_za-ptrace_Get_and_set_data_for_VL_5104 skip
13878 23:00:09.987830 arm64_za-ptrace_Set_VL_5120 pass
13879 23:00:09.987906 arm64_za-ptrace_Disabled_ZA_for_VL_5120 skip
13880 23:00:09.987983 arm64_za-ptrace_Get_and_set_data_for_VL_5120 skip
13881 23:00:09.988049 arm64_za-ptrace_Set_VL_5136 pass
13882 23:00:09.988331 arm64_za-ptrace_Disabled_ZA_for_VL_5136 skip
13883 23:00:09.988416 arm64_za-ptrace_Get_and_set_data_for_VL_5136 skip
13884 23:00:09.988495 arm64_za-ptrace_Set_VL_5152 pass
13885 23:00:09.988586 arm64_za-ptrace_Disabled_ZA_for_VL_5152 skip
13886 23:00:09.988671 arm64_za-ptrace_Get_and_set_data_for_VL_5152 skip
13887 23:00:09.988758 arm64_za-ptrace_Set_VL_5168 pass
13888 23:00:09.988845 arm64_za-ptrace_Disabled_ZA_for_VL_5168 skip
13889 23:00:09.989110 arm64_za-ptrace_Get_and_set_data_for_VL_5168 skip
13890 23:00:09.989181 arm64_za-ptrace_Set_VL_5184 pass
13891 23:00:09.989274 arm64_za-ptrace_Disabled_ZA_for_VL_5184 skip
13892 23:00:09.989366 arm64_za-ptrace_Get_and_set_data_for_VL_5184 skip
13893 23:00:09.989437 arm64_za-ptrace_Set_VL_5200 pass
13894 23:00:09.989527 arm64_za-ptrace_Disabled_ZA_for_VL_5200 skip
13895 23:00:09.989614 arm64_za-ptrace_Get_and_set_data_for_VL_5200 skip
13896 23:00:09.989715 arm64_za-ptrace_Set_VL_5216 pass
13897 23:00:09.989832 arm64_za-ptrace_Disabled_ZA_for_VL_5216 skip
13898 23:00:09.989965 arm64_za-ptrace_Get_and_set_data_for_VL_5216 skip
13899 23:00:09.990080 arm64_za-ptrace_Set_VL_5232 pass
13900 23:00:09.990214 arm64_za-ptrace_Disabled_ZA_for_VL_5232 skip
13901 23:00:09.990334 arm64_za-ptrace_Get_and_set_data_for_VL_5232 skip
13902 23:00:09.990452 arm64_za-ptrace_Set_VL_5248 pass
13903 23:00:09.990574 arm64_za-ptrace_Disabled_ZA_for_VL_5248 skip
13904 23:00:09.994723 arm64_za-ptrace_Get_and_set_data_for_VL_5248 skip
13905 23:00:09.995096 arm64_za-ptrace_Set_VL_5264 pass
13906 23:00:09.995206 arm64_za-ptrace_Disabled_ZA_for_VL_5264 skip
13907 23:00:09.995297 arm64_za-ptrace_Get_and_set_data_for_VL_5264 skip
13908 23:00:09.995385 arm64_za-ptrace_Set_VL_5280 pass
13909 23:00:09.995484 arm64_za-ptrace_Disabled_ZA_for_VL_5280 skip
13910 23:00:09.995575 arm64_za-ptrace_Get_and_set_data_for_VL_5280 skip
13911 23:00:09.995660 arm64_za-ptrace_Set_VL_5296 pass
13912 23:00:09.995750 arm64_za-ptrace_Disabled_ZA_for_VL_5296 skip
13913 23:00:09.995837 arm64_za-ptrace_Get_and_set_data_for_VL_5296 skip
13914 23:00:09.995908 arm64_za-ptrace_Set_VL_5312 pass
13915 23:00:09.995974 arm64_za-ptrace_Disabled_ZA_for_VL_5312 skip
13916 23:00:09.996052 arm64_za-ptrace_Get_and_set_data_for_VL_5312 skip
13917 23:00:09.996119 arm64_za-ptrace_Set_VL_5328 pass
13918 23:00:09.996215 arm64_za-ptrace_Disabled_ZA_for_VL_5328 skip
13919 23:00:09.996469 arm64_za-ptrace_Get_and_set_data_for_VL_5328 skip
13920 23:00:09.996540 arm64_za-ptrace_Set_VL_5344 pass
13921 23:00:09.996606 arm64_za-ptrace_Disabled_ZA_for_VL_5344 skip
13922 23:00:09.996680 arm64_za-ptrace_Get_and_set_data_for_VL_5344 skip
13923 23:00:09.996758 arm64_za-ptrace_Set_VL_5360 pass
13924 23:00:09.996834 arm64_za-ptrace_Disabled_ZA_for_VL_5360 skip
13925 23:00:09.997090 arm64_za-ptrace_Get_and_set_data_for_VL_5360 skip
13926 23:00:09.997161 arm64_za-ptrace_Set_VL_5376 pass
13927 23:00:09.997226 arm64_za-ptrace_Disabled_ZA_for_VL_5376 skip
13928 23:00:09.997304 arm64_za-ptrace_Get_and_set_data_for_VL_5376 skip
13929 23:00:09.997373 arm64_za-ptrace_Set_VL_5392 pass
13930 23:00:09.997624 arm64_za-ptrace_Disabled_ZA_for_VL_5392 skip
13931 23:00:09.997706 arm64_za-ptrace_Get_and_set_data_for_VL_5392 skip
13932 23:00:09.997785 arm64_za-ptrace_Set_VL_5408 pass
13933 23:00:09.997865 arm64_za-ptrace_Disabled_ZA_for_VL_5408 skip
13934 23:00:09.998145 arm64_za-ptrace_Get_and_set_data_for_VL_5408 skip
13935 23:00:09.998237 arm64_za-ptrace_Set_VL_5424 pass
13936 23:00:09.998352 arm64_za-ptrace_Disabled_ZA_for_VL_5424 skip
13937 23:00:09.998461 arm64_za-ptrace_Get_and_set_data_for_VL_5424 skip
13938 23:00:09.998573 arm64_za-ptrace_Set_VL_5440 pass
13939 23:00:09.998684 arm64_za-ptrace_Disabled_ZA_for_VL_5440 skip
13940 23:00:09.998794 arm64_za-ptrace_Get_and_set_data_for_VL_5440 skip
13941 23:00:10.002687 arm64_za-ptrace_Set_VL_5456 pass
13942 23:00:10.003054 arm64_za-ptrace_Disabled_ZA_for_VL_5456 skip
13943 23:00:10.003138 arm64_za-ptrace_Get_and_set_data_for_VL_5456 skip
13944 23:00:10.003238 arm64_za-ptrace_Set_VL_5472 pass
13945 23:00:10.003353 arm64_za-ptrace_Disabled_ZA_for_VL_5472 skip
13946 23:00:10.003446 arm64_za-ptrace_Get_and_set_data_for_VL_5472 skip
13947 23:00:10.003576 arm64_za-ptrace_Set_VL_5488 pass
13948 23:00:10.003672 arm64_za-ptrace_Disabled_ZA_for_VL_5488 skip
13949 23:00:10.003776 arm64_za-ptrace_Get_and_set_data_for_VL_5488 skip
13950 23:00:10.003848 arm64_za-ptrace_Set_VL_5504 pass
13951 23:00:10.003923 arm64_za-ptrace_Disabled_ZA_for_VL_5504 skip
13952 23:00:10.004041 arm64_za-ptrace_Get_and_set_data_for_VL_5504 skip
13953 23:00:10.004131 arm64_za-ptrace_Set_VL_5520 pass
13954 23:00:10.004440 arm64_za-ptrace_Disabled_ZA_for_VL_5520 skip
13955 23:00:10.004524 arm64_za-ptrace_Get_and_set_data_for_VL_5520 skip
13956 23:00:10.004623 arm64_za-ptrace_Set_VL_5536 pass
13957 23:00:10.004740 arm64_za-ptrace_Disabled_ZA_for_VL_5536 skip
13958 23:00:10.004831 arm64_za-ptrace_Get_and_set_data_for_VL_5536 skip
13959 23:00:10.004949 arm64_za-ptrace_Set_VL_5552 pass
13960 23:00:10.005043 arm64_za-ptrace_Disabled_ZA_for_VL_5552 skip
13961 23:00:10.005160 arm64_za-ptrace_Get_and_set_data_for_VL_5552 skip
13962 23:00:10.005255 arm64_za-ptrace_Set_VL_5568 pass
13963 23:00:10.005374 arm64_za-ptrace_Disabled_ZA_for_VL_5568 skip
13964 23:00:10.005484 arm64_za-ptrace_Get_and_set_data_for_VL_5568 skip
13965 23:00:10.005598 arm64_za-ptrace_Set_VL_5584 pass
13966 23:00:10.005721 arm64_za-ptrace_Disabled_ZA_for_VL_5584 skip
13967 23:00:10.005840 arm64_za-ptrace_Get_and_set_data_for_VL_5584 skip
13968 23:00:10.005948 arm64_za-ptrace_Set_VL_5600 pass
13969 23:00:10.006247 arm64_za-ptrace_Disabled_ZA_for_VL_5600 skip
13970 23:00:10.006338 arm64_za-ptrace_Get_and_set_data_for_VL_5600 skip
13971 23:00:10.006463 arm64_za-ptrace_Set_VL_5616 pass
13972 23:00:10.006558 arm64_za-ptrace_Disabled_ZA_for_VL_5616 skip
13973 23:00:10.010688 arm64_za-ptrace_Get_and_set_data_for_VL_5616 skip
13974 23:00:10.011067 arm64_za-ptrace_Set_VL_5632 pass
13975 23:00:10.011169 arm64_za-ptrace_Disabled_ZA_for_VL_5632 skip
13976 23:00:10.011244 arm64_za-ptrace_Get_and_set_data_for_VL_5632 skip
13977 23:00:10.011308 arm64_za-ptrace_Set_VL_5648 pass
13978 23:00:10.029606 arm64_za-ptrace_Disabled_ZA_for_VL_5648 skip
13979 23:00:10.030078 arm64_za-ptrace_Get_and_set_data_for_VL_5648 skip
13980 23:00:10.030191 arm64_za-ptrace_Set_VL_5664 pass
13981 23:00:10.030279 arm64_za-ptrace_Disabled_ZA_for_VL_5664 skip
13982 23:00:10.030369 arm64_za-ptrace_Get_and_set_data_for_VL_5664 skip
13983 23:00:10.030465 arm64_za-ptrace_Set_VL_5680 pass
13984 23:00:10.030575 arm64_za-ptrace_Disabled_ZA_for_VL_5680 skip
13985 23:00:10.030664 arm64_za-ptrace_Get_and_set_data_for_VL_5680 skip
13986 23:00:10.030742 arm64_za-ptrace_Set_VL_5696 pass
13987 23:00:10.030817 arm64_za-ptrace_Disabled_ZA_for_VL_5696 skip
13988 23:00:10.030916 arm64_za-ptrace_Get_and_set_data_for_VL_5696 skip
13989 23:00:10.031003 arm64_za-ptrace_Set_VL_5712 pass
13990 23:00:10.031307 arm64_za-ptrace_Disabled_ZA_for_VL_5712 skip
13991 23:00:10.031421 arm64_za-ptrace_Get_and_set_data_for_VL_5712 skip
13992 23:00:10.031527 arm64_za-ptrace_Set_VL_5728 pass
13993 23:00:10.031631 arm64_za-ptrace_Disabled_ZA_for_VL_5728 skip
13994 23:00:10.031753 arm64_za-ptrace_Get_and_set_data_for_VL_5728 skip
13995 23:00:10.031864 arm64_za-ptrace_Set_VL_5744 pass
13996 23:00:10.031981 arm64_za-ptrace_Disabled_ZA_for_VL_5744 skip
13997 23:00:10.032090 arm64_za-ptrace_Get_and_set_data_for_VL_5744 skip
13998 23:00:10.032194 arm64_za-ptrace_Set_VL_5760 pass
13999 23:00:10.032333 arm64_za-ptrace_Disabled_ZA_for_VL_5760 skip
14000 23:00:10.032444 arm64_za-ptrace_Get_and_set_data_for_VL_5760 skip
14001 23:00:10.032556 arm64_za-ptrace_Set_VL_5776 pass
14002 23:00:10.032653 arm64_za-ptrace_Disabled_ZA_for_VL_5776 skip
14003 23:00:10.032755 arm64_za-ptrace_Get_and_set_data_for_VL_5776 skip
14004 23:00:10.032867 arm64_za-ptrace_Set_VL_5792 pass
14005 23:00:10.032971 arm64_za-ptrace_Disabled_ZA_for_VL_5792 skip
14006 23:00:10.033097 arm64_za-ptrace_Get_and_set_data_for_VL_5792 skip
14007 23:00:10.033202 arm64_za-ptrace_Set_VL_5808 pass
14008 23:00:10.033311 arm64_za-ptrace_Disabled_ZA_for_VL_5808 skip
14009 23:00:10.033414 arm64_za-ptrace_Get_and_set_data_for_VL_5808 skip
14010 23:00:10.033517 arm64_za-ptrace_Set_VL_5824 pass
14011 23:00:10.033616 arm64_za-ptrace_Disabled_ZA_for_VL_5824 skip
14012 23:00:10.033758 arm64_za-ptrace_Get_and_set_data_for_VL_5824 skip
14013 23:00:10.033857 arm64_za-ptrace_Set_VL_5840 pass
14014 23:00:10.033963 arm64_za-ptrace_Disabled_ZA_for_VL_5840 skip
14015 23:00:10.034067 arm64_za-ptrace_Get_and_set_data_for_VL_5840 skip
14016 23:00:10.034163 arm64_za-ptrace_Set_VL_5856 pass
14017 23:00:10.034267 arm64_za-ptrace_Disabled_ZA_for_VL_5856 skip
14018 23:00:10.034374 arm64_za-ptrace_Get_and_set_data_for_VL_5856 skip
14019 23:00:10.034477 arm64_za-ptrace_Set_VL_5872 pass
14020 23:00:10.034590 arm64_za-ptrace_Disabled_ZA_for_VL_5872 skip
14021 23:00:10.034660 arm64_za-ptrace_Get_and_set_data_for_VL_5872 skip
14022 23:00:10.034721 arm64_za-ptrace_Set_VL_5888 pass
14023 23:00:10.034779 arm64_za-ptrace_Disabled_ZA_for_VL_5888 skip
14024 23:00:10.034839 arm64_za-ptrace_Get_and_set_data_for_VL_5888 skip
14025 23:00:10.034897 arm64_za-ptrace_Set_VL_5904 pass
14026 23:00:10.034956 arm64_za-ptrace_Disabled_ZA_for_VL_5904 skip
14027 23:00:10.035015 arm64_za-ptrace_Get_and_set_data_for_VL_5904 skip
14028 23:00:10.038737 arm64_za-ptrace_Set_VL_5920 pass
14029 23:00:10.039194 arm64_za-ptrace_Disabled_ZA_for_VL_5920 skip
14030 23:00:10.039306 arm64_za-ptrace_Get_and_set_data_for_VL_5920 skip
14031 23:00:10.039401 arm64_za-ptrace_Set_VL_5936 pass
14032 23:00:10.039500 arm64_za-ptrace_Disabled_ZA_for_VL_5936 skip
14033 23:00:10.039600 arm64_za-ptrace_Get_and_set_data_for_VL_5936 skip
14034 23:00:10.039740 arm64_za-ptrace_Set_VL_5952 pass
14035 23:00:10.039851 arm64_za-ptrace_Disabled_ZA_for_VL_5952 skip
14036 23:00:10.039954 arm64_za-ptrace_Get_and_set_data_for_VL_5952 skip
14037 23:00:10.040063 arm64_za-ptrace_Set_VL_5968 pass
14038 23:00:10.040162 arm64_za-ptrace_Disabled_ZA_for_VL_5968 skip
14039 23:00:10.040298 arm64_za-ptrace_Get_and_set_data_for_VL_5968 skip
14040 23:00:10.040416 arm64_za-ptrace_Set_VL_5984 pass
14041 23:00:10.040512 arm64_za-ptrace_Disabled_ZA_for_VL_5984 skip
14042 23:00:10.040630 arm64_za-ptrace_Get_and_set_data_for_VL_5984 skip
14043 23:00:10.040736 arm64_za-ptrace_Set_VL_6000 pass
14044 23:00:10.040835 arm64_za-ptrace_Disabled_ZA_for_VL_6000 skip
14045 23:00:10.040956 arm64_za-ptrace_Get_and_set_data_for_VL_6000 skip
14046 23:00:10.041059 arm64_za-ptrace_Set_VL_6016 pass
14047 23:00:10.041149 arm64_za-ptrace_Disabled_ZA_for_VL_6016 skip
14048 23:00:10.041247 arm64_za-ptrace_Get_and_set_data_for_VL_6016 skip
14049 23:00:10.041353 arm64_za-ptrace_Set_VL_6032 pass
14050 23:00:10.041467 arm64_za-ptrace_Disabled_ZA_for_VL_6032 skip
14051 23:00:10.041569 arm64_za-ptrace_Get_and_set_data_for_VL_6032 skip
14052 23:00:10.041680 arm64_za-ptrace_Set_VL_6048 pass
14053 23:00:10.041789 arm64_za-ptrace_Disabled_ZA_for_VL_6048 skip
14054 23:00:10.041883 arm64_za-ptrace_Get_and_set_data_for_VL_6048 skip
14055 23:00:10.041984 arm64_za-ptrace_Set_VL_6064 pass
14056 23:00:10.042076 arm64_za-ptrace_Disabled_ZA_for_VL_6064 skip
14057 23:00:10.042187 arm64_za-ptrace_Get_and_set_data_for_VL_6064 skip
14058 23:00:10.042297 arm64_za-ptrace_Set_VL_6080 pass
14059 23:00:10.042403 arm64_za-ptrace_Disabled_ZA_for_VL_6080 skip
14060 23:00:10.042546 arm64_za-ptrace_Get_and_set_data_for_VL_6080 skip
14061 23:00:10.042655 arm64_za-ptrace_Set_VL_6096 pass
14062 23:00:10.042767 arm64_za-ptrace_Disabled_ZA_for_VL_6096 skip
14063 23:00:10.042878 arm64_za-ptrace_Get_and_set_data_for_VL_6096 skip
14064 23:00:10.042974 arm64_za-ptrace_Set_VL_6112 pass
14065 23:00:10.043050 arm64_za-ptrace_Disabled_ZA_for_VL_6112 skip
14066 23:00:10.043131 arm64_za-ptrace_Get_and_set_data_for_VL_6112 skip
14067 23:00:10.043224 arm64_za-ptrace_Set_VL_6128 pass
14068 23:00:10.043307 arm64_za-ptrace_Disabled_ZA_for_VL_6128 skip
14069 23:00:10.043402 arm64_za-ptrace_Get_and_set_data_for_VL_6128 skip
14070 23:00:10.043487 arm64_za-ptrace_Set_VL_6144 pass
14071 23:00:10.046731 arm64_za-ptrace_Disabled_ZA_for_VL_6144 skip
14072 23:00:10.046926 arm64_za-ptrace_Get_and_set_data_for_VL_6144 skip
14073 23:00:10.047620 arm64_za-ptrace_Set_VL_6160 pass
14074 23:00:10.047821 arm64_za-ptrace_Disabled_ZA_for_VL_6160 skip
14075 23:00:10.048003 arm64_za-ptrace_Get_and_set_data_for_VL_6160 skip
14076 23:00:10.048206 arm64_za-ptrace_Set_VL_6176 pass
14077 23:00:10.048403 arm64_za-ptrace_Disabled_ZA_for_VL_6176 skip
14078 23:00:10.048554 arm64_za-ptrace_Get_and_set_data_for_VL_6176 skip
14079 23:00:10.048679 arm64_za-ptrace_Set_VL_6192 pass
14080 23:00:10.048794 arm64_za-ptrace_Disabled_ZA_for_VL_6192 skip
14081 23:00:10.048909 arm64_za-ptrace_Get_and_set_data_for_VL_6192 skip
14082 23:00:10.049059 arm64_za-ptrace_Set_VL_6208 pass
14083 23:00:10.049189 arm64_za-ptrace_Disabled_ZA_for_VL_6208 skip
14084 23:00:10.049376 arm64_za-ptrace_Get_and_set_data_for_VL_6208 skip
14085 23:00:10.049550 arm64_za-ptrace_Set_VL_6224 pass
14086 23:00:10.049718 arm64_za-ptrace_Disabled_ZA_for_VL_6224 skip
14087 23:00:10.049927 arm64_za-ptrace_Get_and_set_data_for_VL_6224 skip
14088 23:00:10.050098 arm64_za-ptrace_Set_VL_6240 pass
14089 23:00:10.050257 arm64_za-ptrace_Disabled_ZA_for_VL_6240 skip
14090 23:00:10.050419 arm64_za-ptrace_Get_and_set_data_for_VL_6240 skip
14091 23:00:10.050580 arm64_za-ptrace_Set_VL_6256 pass
14092 23:00:10.050741 arm64_za-ptrace_Disabled_ZA_for_VL_6256 skip
14093 23:00:10.050900 arm64_za-ptrace_Get_and_set_data_for_VL_6256 skip
14094 23:00:10.051060 arm64_za-ptrace_Set_VL_6272 pass
14095 23:00:10.051221 arm64_za-ptrace_Disabled_ZA_for_VL_6272 skip
14096 23:00:10.051434 arm64_za-ptrace_Get_and_set_data_for_VL_6272 skip
14097 23:00:10.051608 arm64_za-ptrace_Set_VL_6288 pass
14098 23:00:10.051769 arm64_za-ptrace_Disabled_ZA_for_VL_6288 skip
14099 23:00:10.051930 arm64_za-ptrace_Get_and_set_data_for_VL_6288 skip
14100 23:00:10.052091 arm64_za-ptrace_Set_VL_6304 pass
14101 23:00:10.052252 arm64_za-ptrace_Disabled_ZA_for_VL_6304 skip
14102 23:00:10.052417 arm64_za-ptrace_Get_and_set_data_for_VL_6304 skip
14103 23:00:10.052578 arm64_za-ptrace_Set_VL_6320 pass
14104 23:00:10.052737 arm64_za-ptrace_Disabled_ZA_for_VL_6320 skip
14105 23:00:10.052899 arm64_za-ptrace_Get_and_set_data_for_VL_6320 skip
14106 23:00:10.053063 arm64_za-ptrace_Set_VL_6336 pass
14107 23:00:10.053227 arm64_za-ptrace_Disabled_ZA_for_VL_6336 skip
14108 23:00:10.053390 arm64_za-ptrace_Get_and_set_data_for_VL_6336 skip
14109 23:00:10.053550 arm64_za-ptrace_Set_VL_6352 pass
14110 23:00:10.053726 arm64_za-ptrace_Disabled_ZA_for_VL_6352 skip
14111 23:00:10.053886 arm64_za-ptrace_Get_and_set_data_for_VL_6352 skip
14112 23:00:10.054752 arm64_za-ptrace_Set_VL_6368 pass
14113 23:00:10.055159 arm64_za-ptrace_Disabled_ZA_for_VL_6368 skip
14114 23:00:10.055355 arm64_za-ptrace_Get_and_set_data_for_VL_6368 skip
14115 23:00:10.055523 arm64_za-ptrace_Set_VL_6384 pass
14116 23:00:10.055719 arm64_za-ptrace_Disabled_ZA_for_VL_6384 skip
14117 23:00:10.055883 arm64_za-ptrace_Get_and_set_data_for_VL_6384 skip
14118 23:00:10.056043 arm64_za-ptrace_Set_VL_6400 pass
14119 23:00:10.056202 arm64_za-ptrace_Disabled_ZA_for_VL_6400 skip
14120 23:00:10.056360 arm64_za-ptrace_Get_and_set_data_for_VL_6400 skip
14121 23:00:10.056516 arm64_za-ptrace_Set_VL_6416 pass
14122 23:00:10.056708 arm64_za-ptrace_Disabled_ZA_for_VL_6416 skip
14123 23:00:10.056906 arm64_za-ptrace_Get_and_set_data_for_VL_6416 skip
14124 23:00:10.057096 arm64_za-ptrace_Set_VL_6432 pass
14125 23:00:10.057279 arm64_za-ptrace_Disabled_ZA_for_VL_6432 skip
14126 23:00:10.057463 arm64_za-ptrace_Get_and_set_data_for_VL_6432 skip
14127 23:00:10.057661 arm64_za-ptrace_Set_VL_6448 pass
14128 23:00:10.057848 arm64_za-ptrace_Disabled_ZA_for_VL_6448 skip
14129 23:00:10.058031 arm64_za-ptrace_Get_and_set_data_for_VL_6448 skip
14130 23:00:10.058260 arm64_za-ptrace_Set_VL_6464 pass
14131 23:00:10.058449 arm64_za-ptrace_Disabled_ZA_for_VL_6464 skip
14132 23:00:10.058651 arm64_za-ptrace_Get_and_set_data_for_VL_6464 skip
14133 23:00:10.058832 arm64_za-ptrace_Set_VL_6480 pass
14134 23:00:10.058990 arm64_za-ptrace_Disabled_ZA_for_VL_6480 skip
14135 23:00:10.059115 arm64_za-ptrace_Get_and_set_data_for_VL_6480 skip
14136 23:00:10.059243 arm64_za-ptrace_Set_VL_6496 pass
14137 23:00:10.059362 arm64_za-ptrace_Disabled_ZA_for_VL_6496 skip
14138 23:00:10.059479 arm64_za-ptrace_Get_and_set_data_for_VL_6496 skip
14139 23:00:10.059642 arm64_za-ptrace_Set_VL_6512 pass
14140 23:00:10.059775 arm64_za-ptrace_Disabled_ZA_for_VL_6512 skip
14141 23:00:10.059892 arm64_za-ptrace_Get_and_set_data_for_VL_6512 skip
14142 23:00:10.060006 arm64_za-ptrace_Set_VL_6528 pass
14143 23:00:10.060119 arm64_za-ptrace_Disabled_ZA_for_VL_6528 skip
14144 23:00:10.060264 arm64_za-ptrace_Get_and_set_data_for_VL_6528 skip
14145 23:00:10.060386 arm64_za-ptrace_Set_VL_6544 pass
14146 23:00:10.062708 arm64_za-ptrace_Disabled_ZA_for_VL_6544 skip
14147 23:00:10.063048 arm64_za-ptrace_Get_and_set_data_for_VL_6544 skip
14148 23:00:10.063151 arm64_za-ptrace_Set_VL_6560 pass
14149 23:00:10.063240 arm64_za-ptrace_Disabled_ZA_for_VL_6560 skip
14150 23:00:10.063328 arm64_za-ptrace_Get_and_set_data_for_VL_6560 skip
14151 23:00:10.063437 arm64_za-ptrace_Set_VL_6576 pass
14152 23:00:10.063531 arm64_za-ptrace_Disabled_ZA_for_VL_6576 skip
14153 23:00:10.064774 arm64_za-ptrace_Get_and_set_data_for_VL_6576 skip
14154 23:00:10.064909 arm64_za-ptrace_Set_VL_6592 pass
14155 23:00:10.065003 arm64_za-ptrace_Disabled_ZA_for_VL_6592 skip
14156 23:00:10.065083 arm64_za-ptrace_Get_and_set_data_for_VL_6592 skip
14157 23:00:10.065164 arm64_za-ptrace_Set_VL_6608 pass
14158 23:00:10.065239 arm64_za-ptrace_Disabled_ZA_for_VL_6608 skip
14159 23:00:10.065312 arm64_za-ptrace_Get_and_set_data_for_VL_6608 skip
14160 23:00:10.065389 arm64_za-ptrace_Set_VL_6624 pass
14161 23:00:10.065460 arm64_za-ptrace_Disabled_ZA_for_VL_6624 skip
14162 23:00:10.065538 arm64_za-ptrace_Get_and_set_data_for_VL_6624 skip
14163 23:00:10.065609 arm64_za-ptrace_Set_VL_6640 pass
14164 23:00:10.065693 arm64_za-ptrace_Disabled_ZA_for_VL_6640 skip
14165 23:00:10.065763 arm64_za-ptrace_Get_and_set_data_for_VL_6640 skip
14166 23:00:10.065833 arm64_za-ptrace_Set_VL_6656 pass
14167 23:00:10.066136 arm64_za-ptrace_Disabled_ZA_for_VL_6656 skip
14168 23:00:10.066230 arm64_za-ptrace_Get_and_set_data_for_VL_6656 skip
14169 23:00:10.066305 arm64_za-ptrace_Set_VL_6672 pass
14170 23:00:10.066381 arm64_za-ptrace_Disabled_ZA_for_VL_6672 skip
14171 23:00:10.088381 arm64_za-ptrace_Get_and_set_data_for_VL_6672 skip
14172 23:00:10.088625 arm64_za-ptrace_Set_VL_6688 pass
14173 23:00:10.088717 arm64_za-ptrace_Disabled_ZA_for_VL_6688 skip
14174 23:00:10.088825 arm64_za-ptrace_Get_and_set_data_for_VL_6688 skip
14175 23:00:10.088917 arm64_za-ptrace_Set_VL_6704 pass
14176 23:00:10.089004 arm64_za-ptrace_Disabled_ZA_for_VL_6704 skip
14177 23:00:10.089092 arm64_za-ptrace_Get_and_set_data_for_VL_6704 skip
14178 23:00:10.089197 arm64_za-ptrace_Set_VL_6720 pass
14179 23:00:10.089286 arm64_za-ptrace_Disabled_ZA_for_VL_6720 skip
14180 23:00:10.089372 arm64_za-ptrace_Get_and_set_data_for_VL_6720 skip
14181 23:00:10.089480 arm64_za-ptrace_Set_VL_6736 pass
14182 23:00:10.089568 arm64_za-ptrace_Disabled_ZA_for_VL_6736 skip
14183 23:00:10.089721 arm64_za-ptrace_Get_and_set_data_for_VL_6736 skip
14184 23:00:10.089814 arm64_za-ptrace_Set_VL_6752 pass
14185 23:00:10.089903 arm64_za-ptrace_Disabled_ZA_for_VL_6752 skip
14186 23:00:10.090008 arm64_za-ptrace_Get_and_set_data_for_VL_6752 skip
14187 23:00:10.090096 arm64_za-ptrace_Set_VL_6768 pass
14188 23:00:10.090197 arm64_za-ptrace_Disabled_ZA_for_VL_6768 skip
14189 23:00:10.090300 arm64_za-ptrace_Get_and_set_data_for_VL_6768 skip
14190 23:00:10.090406 arm64_za-ptrace_Set_VL_6784 pass
14191 23:00:10.090494 arm64_za-ptrace_Disabled_ZA_for_VL_6784 skip
14192 23:00:10.090791 arm64_za-ptrace_Get_and_set_data_for_VL_6784 skip
14193 23:00:10.090886 arm64_za-ptrace_Set_VL_6800 pass
14194 23:00:10.090986 arm64_za-ptrace_Disabled_ZA_for_VL_6800 skip
14195 23:00:10.091074 arm64_za-ptrace_Get_and_set_data_for_VL_6800 skip
14196 23:00:10.091180 arm64_za-ptrace_Set_VL_6816 pass
14197 23:00:10.091265 arm64_za-ptrace_Disabled_ZA_for_VL_6816 skip
14198 23:00:10.091361 arm64_za-ptrace_Get_and_set_data_for_VL_6816 skip
14199 23:00:10.091449 arm64_za-ptrace_Set_VL_6832 pass
14200 23:00:10.091555 arm64_za-ptrace_Disabled_ZA_for_VL_6832 skip
14201 23:00:10.091663 arm64_za-ptrace_Get_and_set_data_for_VL_6832 skip
14202 23:00:10.091750 arm64_za-ptrace_Set_VL_6848 pass
14203 23:00:10.091848 arm64_za-ptrace_Disabled_ZA_for_VL_6848 skip
14204 23:00:10.091955 arm64_za-ptrace_Get_and_set_data_for_VL_6848 skip
14205 23:00:10.092039 arm64_za-ptrace_Set_VL_6864 pass
14206 23:00:10.092137 arm64_za-ptrace_Disabled_ZA_for_VL_6864 skip
14207 23:00:10.092244 arm64_za-ptrace_Get_and_set_data_for_VL_6864 skip
14208 23:00:10.092343 arm64_za-ptrace_Set_VL_6880 pass
14209 23:00:10.092441 arm64_za-ptrace_Disabled_ZA_for_VL_6880 skip
14210 23:00:10.092771 arm64_za-ptrace_Get_and_set_data_for_VL_6880 skip
14211 23:00:10.092931 arm64_za-ptrace_Set_VL_6896 pass
14212 23:00:10.093091 arm64_za-ptrace_Disabled_ZA_for_VL_6896 skip
14213 23:00:10.093225 arm64_za-ptrace_Get_and_set_data_for_VL_6896 skip
14214 23:00:10.093355 arm64_za-ptrace_Set_VL_6912 pass
14215 23:00:10.093463 arm64_za-ptrace_Disabled_ZA_for_VL_6912 skip
14216 23:00:10.093545 arm64_za-ptrace_Get_and_set_data_for_VL_6912 skip
14217 23:00:10.093626 arm64_za-ptrace_Set_VL_6928 pass
14218 23:00:10.093717 arm64_za-ptrace_Disabled_ZA_for_VL_6928 skip
14219 23:00:10.093815 arm64_za-ptrace_Get_and_set_data_for_VL_6928 skip
14220 23:00:10.093900 arm64_za-ptrace_Set_VL_6944 pass
14221 23:00:10.093983 arm64_za-ptrace_Disabled_ZA_for_VL_6944 skip
14222 23:00:10.094080 arm64_za-ptrace_Get_and_set_data_for_VL_6944 skip
14223 23:00:10.094165 arm64_za-ptrace_Set_VL_6960 pass
14224 23:00:10.094261 arm64_za-ptrace_Disabled_ZA_for_VL_6960 skip
14225 23:00:10.094359 arm64_za-ptrace_Get_and_set_data_for_VL_6960 skip
14226 23:00:10.094457 arm64_za-ptrace_Set_VL_6976 pass
14227 23:00:10.098752 arm64_za-ptrace_Disabled_ZA_for_VL_6976 skip
14228 23:00:10.099163 arm64_za-ptrace_Get_and_set_data_for_VL_6976 skip
14229 23:00:10.099283 arm64_za-ptrace_Set_VL_6992 pass
14230 23:00:10.099401 arm64_za-ptrace_Disabled_ZA_for_VL_6992 skip
14231 23:00:10.099493 arm64_za-ptrace_Get_and_set_data_for_VL_6992 skip
14232 23:00:10.099585 arm64_za-ptrace_Set_VL_7008 pass
14233 23:00:10.099683 arm64_za-ptrace_Disabled_ZA_for_VL_7008 skip
14234 23:00:10.099795 arm64_za-ptrace_Get_and_set_data_for_VL_7008 skip
14235 23:00:10.099889 arm64_za-ptrace_Set_VL_7024 pass
14236 23:00:10.099983 arm64_za-ptrace_Disabled_ZA_for_VL_7024 skip
14237 23:00:10.100077 arm64_za-ptrace_Get_and_set_data_for_VL_7024 skip
14238 23:00:10.100190 arm64_za-ptrace_Set_VL_7040 pass
14239 23:00:10.100290 arm64_za-ptrace_Disabled_ZA_for_VL_7040 skip
14240 23:00:10.100390 arm64_za-ptrace_Get_and_set_data_for_VL_7040 skip
14241 23:00:10.100485 arm64_za-ptrace_Set_VL_7056 pass
14242 23:00:10.100591 arm64_za-ptrace_Disabled_ZA_for_VL_7056 skip
14243 23:00:10.100689 arm64_za-ptrace_Get_and_set_data_for_VL_7056 skip
14244 23:00:10.100783 arm64_za-ptrace_Set_VL_7072 pass
14245 23:00:10.100897 arm64_za-ptrace_Disabled_ZA_for_VL_7072 skip
14246 23:00:10.100992 arm64_za-ptrace_Get_and_set_data_for_VL_7072 skip
14247 23:00:10.101108 arm64_za-ptrace_Set_VL_7088 pass
14248 23:00:10.101205 arm64_za-ptrace_Disabled_ZA_for_VL_7088 skip
14249 23:00:10.101309 arm64_za-ptrace_Get_and_set_data_for_VL_7088 skip
14250 23:00:10.101416 arm64_za-ptrace_Set_VL_7104 pass
14251 23:00:10.101507 arm64_za-ptrace_Disabled_ZA_for_VL_7104 skip
14252 23:00:10.101614 arm64_za-ptrace_Get_and_set_data_for_VL_7104 skip
14253 23:00:10.101721 arm64_za-ptrace_Set_VL_7120 pass
14254 23:00:10.101824 arm64_za-ptrace_Disabled_ZA_for_VL_7120 skip
14255 23:00:10.101932 arm64_za-ptrace_Get_and_set_data_for_VL_7120 skip
14256 23:00:10.102044 arm64_za-ptrace_Set_VL_7136 pass
14257 23:00:10.102354 arm64_za-ptrace_Disabled_ZA_for_VL_7136 skip
14258 23:00:10.102454 arm64_za-ptrace_Get_and_set_data_for_VL_7136 skip
14259 23:00:10.102533 arm64_za-ptrace_Set_VL_7152 pass
14260 23:00:10.102621 arm64_za-ptrace_Disabled_ZA_for_VL_7152 skip
14261 23:00:10.110700 arm64_za-ptrace_Get_and_set_data_for_VL_7152 skip
14262 23:00:10.111152 arm64_za-ptrace_Set_VL_7168 pass
14263 23:00:10.111257 arm64_za-ptrace_Disabled_ZA_for_VL_7168 skip
14264 23:00:10.111337 arm64_za-ptrace_Get_and_set_data_for_VL_7168 skip
14265 23:00:10.111415 arm64_za-ptrace_Set_VL_7184 pass
14266 23:00:10.111506 arm64_za-ptrace_Disabled_ZA_for_VL_7184 skip
14267 23:00:10.111585 arm64_za-ptrace_Get_and_set_data_for_VL_7184 skip
14268 23:00:10.111662 arm64_za-ptrace_Set_VL_7200 pass
14269 23:00:10.111756 arm64_za-ptrace_Disabled_ZA_for_VL_7200 skip
14270 23:00:10.111836 arm64_za-ptrace_Get_and_set_data_for_VL_7200 skip
14271 23:00:10.111912 arm64_za-ptrace_Set_VL_7216 pass
14272 23:00:10.112002 arm64_za-ptrace_Disabled_ZA_for_VL_7216 skip
14273 23:00:10.112313 arm64_za-ptrace_Get_and_set_data_for_VL_7216 skip
14274 23:00:10.112414 arm64_za-ptrace_Set_VL_7232 pass
14275 23:00:10.112494 arm64_za-ptrace_Disabled_ZA_for_VL_7232 skip
14276 23:00:10.112571 arm64_za-ptrace_Get_and_set_data_for_VL_7232 skip
14277 23:00:10.112663 arm64_za-ptrace_Set_VL_7248 pass
14278 23:00:10.112742 arm64_za-ptrace_Disabled_ZA_for_VL_7248 skip
14279 23:00:10.112834 arm64_za-ptrace_Get_and_set_data_for_VL_7248 skip
14280 23:00:10.112914 arm64_za-ptrace_Set_VL_7264 pass
14281 23:00:10.113005 arm64_za-ptrace_Disabled_ZA_for_VL_7264 skip
14282 23:00:10.113085 arm64_za-ptrace_Get_and_set_data_for_VL_7264 skip
14283 23:00:10.113164 arm64_za-ptrace_Set_VL_7280 pass
14284 23:00:10.113253 arm64_za-ptrace_Disabled_ZA_for_VL_7280 skip
14285 23:00:10.113343 arm64_za-ptrace_Get_and_set_data_for_VL_7280 skip
14286 23:00:10.113629 arm64_za-ptrace_Set_VL_7296 pass
14287 23:00:10.113740 arm64_za-ptrace_Disabled_ZA_for_VL_7296 skip
14288 23:00:10.113834 arm64_za-ptrace_Get_and_set_data_for_VL_7296 skip
14289 23:00:10.113915 arm64_za-ptrace_Set_VL_7312 pass
14290 23:00:10.114005 arm64_za-ptrace_Disabled_ZA_for_VL_7312 skip
14291 23:00:10.114084 arm64_za-ptrace_Get_and_set_data_for_VL_7312 skip
14292 23:00:10.114174 arm64_za-ptrace_Set_VL_7328 pass
14293 23:00:10.114265 arm64_za-ptrace_Disabled_ZA_for_VL_7328 skip
14294 23:00:10.114355 arm64_za-ptrace_Get_and_set_data_for_VL_7328 skip
14295 23:00:10.114451 arm64_za-ptrace_Set_VL_7344 pass
14296 23:00:10.118671 arm64_za-ptrace_Disabled_ZA_for_VL_7344 skip
14297 23:00:10.119004 arm64_za-ptrace_Get_and_set_data_for_VL_7344 skip
14298 23:00:10.119122 arm64_za-ptrace_Set_VL_7360 pass
14299 23:00:10.119223 arm64_za-ptrace_Disabled_ZA_for_VL_7360 skip
14300 23:00:10.119343 arm64_za-ptrace_Get_and_set_data_for_VL_7360 skip
14301 23:00:10.119440 arm64_za-ptrace_Set_VL_7376 pass
14302 23:00:10.119538 arm64_za-ptrace_Disabled_ZA_for_VL_7376 skip
14303 23:00:10.119652 arm64_za-ptrace_Get_and_set_data_for_VL_7376 skip
14304 23:00:10.119754 arm64_za-ptrace_Set_VL_7392 pass
14305 23:00:10.119870 arm64_za-ptrace_Disabled_ZA_for_VL_7392 skip
14306 23:00:10.119970 arm64_za-ptrace_Get_and_set_data_for_VL_7392 skip
14307 23:00:10.120082 arm64_za-ptrace_Set_VL_7408 pass
14308 23:00:10.120172 arm64_za-ptrace_Disabled_ZA_for_VL_7408 skip
14309 23:00:10.120262 arm64_za-ptrace_Get_and_set_data_for_VL_7408 skip
14310 23:00:10.120373 arm64_za-ptrace_Set_VL_7424 pass
14311 23:00:10.120482 arm64_za-ptrace_Disabled_ZA_for_VL_7424 skip
14312 23:00:10.120578 arm64_za-ptrace_Get_and_set_data_for_VL_7424 skip
14313 23:00:10.120679 arm64_za-ptrace_Set_VL_7440 pass
14314 23:00:10.120770 arm64_za-ptrace_Disabled_ZA_for_VL_7440 skip
14315 23:00:10.120878 arm64_za-ptrace_Get_and_set_data_for_VL_7440 skip
14316 23:00:10.120965 arm64_za-ptrace_Set_VL_7456 pass
14317 23:00:10.121076 arm64_za-ptrace_Disabled_ZA_for_VL_7456 skip
14318 23:00:10.121188 arm64_za-ptrace_Get_and_set_data_for_VL_7456 skip
14319 23:00:10.121294 arm64_za-ptrace_Set_VL_7472 pass
14320 23:00:10.121405 arm64_za-ptrace_Disabled_ZA_for_VL_7472 skip
14321 23:00:10.121509 arm64_za-ptrace_Get_and_set_data_for_VL_7472 skip
14322 23:00:10.121598 arm64_za-ptrace_Set_VL_7488 pass
14323 23:00:10.122012 arm64_za-ptrace_Disabled_ZA_for_VL_7488 skip
14324 23:00:10.122116 arm64_za-ptrace_Get_and_set_data_for_VL_7488 skip
14325 23:00:10.122208 arm64_za-ptrace_Set_VL_7504 pass
14326 23:00:10.122303 arm64_za-ptrace_Disabled_ZA_for_VL_7504 skip
14327 23:00:10.122419 arm64_za-ptrace_Get_and_set_data_for_VL_7504 skip
14328 23:00:10.122509 arm64_za-ptrace_Set_VL_7520 pass
14329 23:00:10.122600 arm64_za-ptrace_Disabled_ZA_for_VL_7520 skip
14330 23:00:10.122707 arm64_za-ptrace_Get_and_set_data_for_VL_7520 skip
14331 23:00:10.126726 arm64_za-ptrace_Set_VL_7536 pass
14332 23:00:10.127099 arm64_za-ptrace_Disabled_ZA_for_VL_7536 skip
14333 23:00:10.127204 arm64_za-ptrace_Get_and_set_data_for_VL_7536 skip
14334 23:00:10.127311 arm64_za-ptrace_Set_VL_7552 pass
14335 23:00:10.127405 arm64_za-ptrace_Disabled_ZA_for_VL_7552 skip
14336 23:00:10.127493 arm64_za-ptrace_Get_and_set_data_for_VL_7552 skip
14337 23:00:10.127597 arm64_za-ptrace_Set_VL_7568 pass
14338 23:00:10.127685 arm64_za-ptrace_Disabled_ZA_for_VL_7568 skip
14339 23:00:10.127771 arm64_za-ptrace_Get_and_set_data_for_VL_7568 skip
14340 23:00:10.127872 arm64_za-ptrace_Set_VL_7584 pass
14341 23:00:10.127958 arm64_za-ptrace_Disabled_ZA_for_VL_7584 skip
14342 23:00:10.128059 arm64_za-ptrace_Get_and_set_data_for_VL_7584 skip
14343 23:00:10.128147 arm64_za-ptrace_Set_VL_7600 pass
14344 23:00:10.128233 arm64_za-ptrace_Disabled_ZA_for_VL_7600 skip
14345 23:00:10.128337 arm64_za-ptrace_Get_and_set_data_for_VL_7600 skip
14346 23:00:10.128428 arm64_za-ptrace_Set_VL_7616 pass
14347 23:00:10.128536 arm64_za-ptrace_Disabled_ZA_for_VL_7616 skip
14348 23:00:10.128834 arm64_za-ptrace_Get_and_set_data_for_VL_7616 skip
14349 23:00:10.128935 arm64_za-ptrace_Set_VL_7632 pass
14350 23:00:10.129025 arm64_za-ptrace_Disabled_ZA_for_VL_7632 skip
14351 23:00:10.129138 arm64_za-ptrace_Get_and_set_data_for_VL_7632 skip
14352 23:00:10.129234 arm64_za-ptrace_Set_VL_7648 pass
14353 23:00:10.129322 arm64_za-ptrace_Disabled_ZA_for_VL_7648 skip
14354 23:00:10.129428 arm64_za-ptrace_Get_and_set_data_for_VL_7648 skip
14355 23:00:10.129520 arm64_za-ptrace_Set_VL_7664 pass
14356 23:00:10.129609 arm64_za-ptrace_Disabled_ZA_for_VL_7664 skip
14357 23:00:10.129730 arm64_za-ptrace_Get_and_set_data_for_VL_7664 skip
14358 23:00:10.129831 arm64_za-ptrace_Set_VL_7680 pass
14359 23:00:10.129937 arm64_za-ptrace_Disabled_ZA_for_VL_7680 skip
14360 23:00:10.130034 arm64_za-ptrace_Get_and_set_data_for_VL_7680 skip
14361 23:00:10.130143 arm64_za-ptrace_Set_VL_7696 pass
14362 23:00:10.130240 arm64_za-ptrace_Disabled_ZA_for_VL_7696 skip
14363 23:00:10.159649 arm64_za-ptrace_Get_and_set_data_for_VL_7696 skip
14364 23:00:10.159914 arm64_za-ptrace_Set_VL_7712 pass
14365 23:00:10.160192 arm64_za-ptrace_Disabled_ZA_for_VL_7712 skip
14366 23:00:10.160283 arm64_za-ptrace_Get_and_set_data_for_VL_7712 skip
14367 23:00:10.160365 arm64_za-ptrace_Set_VL_7728 pass
14368 23:00:10.160436 arm64_za-ptrace_Disabled_ZA_for_VL_7728 skip
14369 23:00:10.160526 arm64_za-ptrace_Get_and_set_data_for_VL_7728 skip
14370 23:00:10.160606 arm64_za-ptrace_Set_VL_7744 pass
14371 23:00:10.160686 arm64_za-ptrace_Disabled_ZA_for_VL_7744 skip
14372 23:00:10.160780 arm64_za-ptrace_Get_and_set_data_for_VL_7744 skip
14373 23:00:10.160858 arm64_za-ptrace_Set_VL_7760 pass
14374 23:00:10.160936 arm64_za-ptrace_Disabled_ZA_for_VL_7760 skip
14375 23:00:10.161034 arm64_za-ptrace_Get_and_set_data_for_VL_7760 skip
14376 23:00:10.161117 arm64_za-ptrace_Set_VL_7776 pass
14377 23:00:10.161195 arm64_za-ptrace_Disabled_ZA_for_VL_7776 skip
14378 23:00:10.161259 arm64_za-ptrace_Get_and_set_data_for_VL_7776 skip
14379 23:00:10.161529 arm64_za-ptrace_Set_VL_7792 pass
14380 23:00:10.161627 arm64_za-ptrace_Disabled_ZA_for_VL_7792 skip
14381 23:00:10.161733 arm64_za-ptrace_Get_and_set_data_for_VL_7792 skip
14382 23:00:10.161827 arm64_za-ptrace_Set_VL_7808 pass
14383 23:00:10.161897 arm64_za-ptrace_Disabled_ZA_for_VL_7808 skip
14384 23:00:10.162005 arm64_za-ptrace_Get_and_set_data_for_VL_7808 skip
14385 23:00:10.162098 arm64_za-ptrace_Set_VL_7824 pass
14386 23:00:10.162194 arm64_za-ptrace_Disabled_ZA_for_VL_7824 skip
14387 23:00:10.162290 arm64_za-ptrace_Get_and_set_data_for_VL_7824 skip
14388 23:00:10.162391 arm64_za-ptrace_Set_VL_7840 pass
14389 23:00:10.162493 arm64_za-ptrace_Disabled_ZA_for_VL_7840 skip
14390 23:00:10.162586 arm64_za-ptrace_Get_and_set_data_for_VL_7840 skip
14391 23:00:10.162662 arm64_za-ptrace_Set_VL_7856 pass
14392 23:00:10.162737 arm64_za-ptrace_Disabled_ZA_for_VL_7856 skip
14393 23:00:10.162800 arm64_za-ptrace_Get_and_set_data_for_VL_7856 skip
14394 23:00:10.166760 arm64_za-ptrace_Set_VL_7872 pass
14395 23:00:10.166916 arm64_za-ptrace_Disabled_ZA_for_VL_7872 skip
14396 23:00:10.167219 arm64_za-ptrace_Get_and_set_data_for_VL_7872 skip
14397 23:00:10.167326 arm64_za-ptrace_Set_VL_7888 pass
14398 23:00:10.167415 arm64_za-ptrace_Disabled_ZA_for_VL_7888 skip
14399 23:00:10.167500 arm64_za-ptrace_Get_and_set_data_for_VL_7888 skip
14400 23:00:10.167579 arm64_za-ptrace_Set_VL_7904 pass
14401 23:00:10.167683 arm64_za-ptrace_Disabled_ZA_for_VL_7904 skip
14402 23:00:10.167772 arm64_za-ptrace_Get_and_set_data_for_VL_7904 skip
14403 23:00:10.167856 arm64_za-ptrace_Set_VL_7920 pass
14404 23:00:10.167940 arm64_za-ptrace_Disabled_ZA_for_VL_7920 skip
14405 23:00:10.168041 arm64_za-ptrace_Get_and_set_data_for_VL_7920 skip
14406 23:00:10.168127 arm64_za-ptrace_Set_VL_7936 pass
14407 23:00:10.168214 arm64_za-ptrace_Disabled_ZA_for_VL_7936 skip
14408 23:00:10.168315 arm64_za-ptrace_Get_and_set_data_for_VL_7936 skip
14409 23:00:10.168405 arm64_za-ptrace_Set_VL_7952 pass
14410 23:00:10.168492 arm64_za-ptrace_Disabled_ZA_for_VL_7952 skip
14411 23:00:10.168594 arm64_za-ptrace_Get_and_set_data_for_VL_7952 skip
14412 23:00:10.168698 arm64_za-ptrace_Set_VL_7968 pass
14413 23:00:10.168787 arm64_za-ptrace_Disabled_ZA_for_VL_7968 skip
14414 23:00:10.168889 arm64_za-ptrace_Get_and_set_data_for_VL_7968 skip
14415 23:00:10.168975 arm64_za-ptrace_Set_VL_7984 pass
14416 23:00:10.169072 arm64_za-ptrace_Disabled_ZA_for_VL_7984 skip
14417 23:00:10.169176 arm64_za-ptrace_Get_and_set_data_for_VL_7984 skip
14418 23:00:10.169276 arm64_za-ptrace_Set_VL_8000 pass
14419 23:00:10.169373 arm64_za-ptrace_Disabled_ZA_for_VL_8000 skip
14420 23:00:10.169712 arm64_za-ptrace_Get_and_set_data_for_VL_8000 skip
14421 23:00:10.169868 arm64_za-ptrace_Set_VL_8016 pass
14422 23:00:10.169995 arm64_za-ptrace_Disabled_ZA_for_VL_8016 skip
14423 23:00:10.170094 arm64_za-ptrace_Get_and_set_data_for_VL_8016 skip
14424 23:00:10.170208 arm64_za-ptrace_Set_VL_8032 pass
14425 23:00:10.170307 arm64_za-ptrace_Disabled_ZA_for_VL_8032 skip
14426 23:00:10.170421 arm64_za-ptrace_Get_and_set_data_for_VL_8032 skip
14427 23:00:10.170518 arm64_za-ptrace_Set_VL_8048 pass
14428 23:00:10.174669 arm64_za-ptrace_Disabled_ZA_for_VL_8048 skip
14429 23:00:10.175099 arm64_za-ptrace_Get_and_set_data_for_VL_8048 skip
14430 23:00:10.175221 arm64_za-ptrace_Set_VL_8064 pass
14431 23:00:10.175322 arm64_za-ptrace_Disabled_ZA_for_VL_8064 skip
14432 23:00:10.175410 arm64_za-ptrace_Get_and_set_data_for_VL_8064 skip
14433 23:00:10.175633 arm64_za-ptrace_Set_VL_8080 pass
14434 23:00:10.175810 arm64_za-ptrace_Disabled_ZA_for_VL_8080 skip
14435 23:00:10.175902 arm64_za-ptrace_Get_and_set_data_for_VL_8080 skip
14436 23:00:10.175987 arm64_za-ptrace_Set_VL_8096 pass
14437 23:00:10.176069 arm64_za-ptrace_Disabled_ZA_for_VL_8096 skip
14438 23:00:10.176170 arm64_za-ptrace_Get_and_set_data_for_VL_8096 skip
14439 23:00:10.176255 arm64_za-ptrace_Set_VL_8112 pass
14440 23:00:10.176338 arm64_za-ptrace_Disabled_ZA_for_VL_8112 skip
14441 23:00:10.176422 arm64_za-ptrace_Get_and_set_data_for_VL_8112 skip
14442 23:00:10.176523 arm64_za-ptrace_Set_VL_8128 pass
14443 23:00:10.176609 arm64_za-ptrace_Disabled_ZA_for_VL_8128 skip
14444 23:00:10.176693 arm64_za-ptrace_Get_and_set_data_for_VL_8128 skip
14445 23:00:10.176780 arm64_za-ptrace_Set_VL_8144 pass
14446 23:00:10.176882 arm64_za-ptrace_Disabled_ZA_for_VL_8144 skip
14447 23:00:10.176970 arm64_za-ptrace_Get_and_set_data_for_VL_8144 skip
14448 23:00:10.177054 arm64_za-ptrace_Set_VL_8160 pass
14449 23:00:10.177152 arm64_za-ptrace_Disabled_ZA_for_VL_8160 skip
14450 23:00:10.177235 arm64_za-ptrace_Get_and_set_data_for_VL_8160 skip
14451 23:00:10.177316 arm64_za-ptrace_Set_VL_8176 pass
14452 23:00:10.177413 arm64_za-ptrace_Disabled_ZA_for_VL_8176 skip
14453 23:00:10.177513 arm64_za-ptrace_Get_and_set_data_for_VL_8176 skip
14454 23:00:10.177599 arm64_za-ptrace_Set_VL_8192 pass
14455 23:00:10.177710 arm64_za-ptrace_Disabled_ZA_for_VL_8192 skip
14456 23:00:10.177812 arm64_za-ptrace_Get_and_set_data_for_VL_8192 skip
14457 23:00:10.177899 arm64_za-ptrace pass
14458 23:00:10.178473 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory pass
14459 23:00:10.178626 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory pass
14460 23:00:10.182858 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory pass
14461 23:00:10.183307 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory pass
14462 23:00:10.183442 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory fail
14463 23:00:10.183565 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory fail
14464 23:00:10.183886 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory pass
14465 23:00:10.184011 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory pass
14466 23:00:10.184295 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory pass
14467 23:00:10.184639 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory pass
14468 23:00:10.184933 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory fail
14469 23:00:10.185060 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory fail
14470 23:00:10.185401 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory pass
14471 23:00:10.185759 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory fail
14472 23:00:10.186063 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory fail
14473 23:00:10.186179 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory pass
14474 23:00:10.186303 arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory pass
14475 23:00:10.190708 arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory pass
14476 23:00:10.191139 arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory pass
14477 23:00:10.191261 arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory pass
14478 23:00:10.191571 arm64_check_buffer_fill fail
14479 23:00:10.191679 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory fail
14480 23:00:10.191994 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory fail
14481 23:00:10.192306 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory fail
14482 23:00:10.192432 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory fail
14483 23:00:10.192732 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory fail
14484 23:00:10.192858 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory fail
14485 23:00:10.193190 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory fail
14486 23:00:10.193502 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory fail
14487 23:00:10.193821 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory fail
14488 23:00:10.193945 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory fail
14489 23:00:10.194259 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory fail
14490 23:00:10.198683 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory fail
14491 23:00:10.199044 arm64_check_child_memory fail
14492 23:00:10.199194 arm64_check_gcr_el1_cswitch fail
14493 23:00:10.199299 arm64_check_ksm_options fail
14494 23:00:10.199409 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off pass
14495 23:00:10.199523 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off pass
14496 23:00:10.199836 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off pass
14497 23:00:10.200156 arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off pass
14498 23:00:10.200462 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14499 23:00:10.205460 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14500 23:00:10.205856 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14501 23:00:10.206151 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14502 23:00:10.206410 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14503 23:00:10.206919 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14504 23:00:10.207241 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14505 23:00:10.207412 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14506 23:00:10.207725 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14507 23:00:10.208024 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14508 23:00:10.208337 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14509 23:00:10.208638 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14510 23:00:10.208965 arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14511 23:00:10.209264 arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14512 23:00:10.209559 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14513 23:00:10.210050 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14514 23:00:10.210346 arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory fail
14515 23:00:10.210466 arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory fail
14516 23:00:10.214707 arm64_check_mmap_options fail
14517 23:00:10.215519 arm64_check_prctl_check_basic_read pass
14518 23:00:10.215654 arm64_check_prctl_NONE pass
14519 23:00:10.215756 arm64_check_prctl_SYNC pass
14520 23:00:10.215849 arm64_check_prctl_ASYNC pass
14521 23:00:10.215965 arm64_check_prctl_SYNC_ASYNC pass
14522 23:00:10.216060 arm64_check_prctl pass
14523 23:00:10.216153 arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode fail
14524 23:00:10.216246 arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode fail
14525 23:00:10.216365 arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode pass
14526 23:00:10.216463 arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode fail
14527 23:00:10.216559 arm64_check_tags_inclusion fail
14528 23:00:10.216678 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14529 23:00:10.216991 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14530 23:00:10.217097 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14531 23:00:10.217357 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14532 23:00:10.217614 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14533 23:00:10.217882 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14534 23:00:10.218134 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14535 23:00:10.218215 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14536 23:00:10.218470 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14537 23:00:10.222699 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14538 23:00:10.223066 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14539 23:00:10.223361 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14540 23:00:10.223448 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14541 23:00:10.223737 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14542 23:00:10.223826 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14543 23:00:10.224093 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14544 23:00:10.224179 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14545 23:00:10.224605 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14546 23:00:10.224869 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14547 23:00:10.224954 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14548 23:00:10.225228 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14549 23:00:10.225489 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14550 23:00:10.225576 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14551 23:00:10.225847 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14552 23:00:10.226109 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14553 23:00:10.226379 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14554 23:00:10.230711 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14555 23:00:10.231052 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14556 23:00:10.231170 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14557 23:00:10.231299 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14558 23:00:10.231609 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14559 23:00:10.231899 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14560 23:00:10.232169 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14561 23:00:10.232431 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14562 23:00:10.232517 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14563 23:00:10.232962 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14564 23:00:10.233225 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14565 23:00:10.233488 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14566 23:00:10.233574 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14567 23:00:10.233862 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14568 23:00:10.234126 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14569 23:00:10.234417 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14570 23:00:10.238716 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14571 23:00:10.239090 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14572 23:00:10.239214 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14573 23:00:10.239544 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14574 23:00:10.239676 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14575 23:00:10.239990 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14576 23:00:10.240291 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14577 23:00:10.240392 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14578 23:00:10.240678 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14579 23:00:10.241017 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14580 23:00:10.241178 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14581 23:00:10.241539 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14582 23:00:10.241725 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14583 23:00:10.242060 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14584 23:00:10.242222 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14585 23:00:10.242406 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14586 23:00:10.246703 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14587 23:00:10.247115 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14588 23:00:10.247206 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14589 23:00:10.247302 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14590 23:00:10.262806 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14591 23:00:10.263313 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14592 23:00:10.263440 arm64_check_user_mem pass
14593 23:00:10.263536 arm64_btitest_nohint_func_call_using_br_x0 pass
14594 23:00:10.263643 arm64_btitest_nohint_func_call_using_br_x16 pass
14595 23:00:10.263742 arm64_btitest_nohint_func_call_using_blr pass
14596 23:00:10.263839 arm64_btitest_bti_none_func_call_using_br_x0 pass
14597 23:00:10.263923 arm64_btitest_bti_none_func_call_using_br_x16 pass
14598 23:00:10.265904 arm64_btitest_bti_none_func_call_using_blr pass
14599 23:00:10.266008 arm64_btitest_bti_c_func_call_using_br_x0 pass
14600 23:00:10.266084 arm64_btitest_bti_c_func_call_using_br_x16 pass
14601 23:00:10.266161 arm64_btitest_bti_c_func_call_using_blr pass
14602 23:00:10.266225 arm64_btitest_bti_j_func_call_using_br_x0 pass
14603 23:00:10.266293 arm64_btitest_bti_j_func_call_using_br_x16 pass
14604 23:00:10.266355 arm64_btitest_bti_j_func_call_using_blr pass
14605 23:00:10.266425 arm64_btitest_bti_jc_func_call_using_br_x0 pass
14606 23:00:10.266523 arm64_btitest_bti_jc_func_call_using_br_x16 pass
14607 23:00:10.266615 arm64_btitest_bti_jc_func_call_using_blr pass
14608 23:00:10.266703 arm64_btitest_paciasp_func_call_using_br_x0 pass
14609 23:00:10.266790 arm64_btitest_paciasp_func_call_using_br_x16 pass
14610 23:00:10.266874 arm64_btitest_paciasp_func_call_using_blr pass
14611 23:00:10.266961 arm64_btitest pass
14612 23:00:10.267049 arm64_nobtitest_nohint_func_call_using_br_x0 pass
14613 23:00:10.267138 arm64_nobtitest_nohint_func_call_using_br_x16 pass
14614 23:00:10.267225 arm64_nobtitest_nohint_func_call_using_blr pass
14615 23:00:10.267313 arm64_nobtitest_bti_none_func_call_using_br_x0 pass
14616 23:00:10.267403 arm64_nobtitest_bti_none_func_call_using_br_x16 pass
14617 23:00:10.267492 arm64_nobtitest_bti_none_func_call_using_blr pass
14618 23:00:10.267581 arm64_nobtitest_bti_c_func_call_using_br_x0 pass
14619 23:00:10.267670 arm64_nobtitest_bti_c_func_call_using_br_x16 pass
14620 23:00:10.267757 arm64_nobtitest_bti_c_func_call_using_blr pass
14621 23:00:10.267845 arm64_nobtitest_bti_j_func_call_using_br_x0 pass
14622 23:00:10.267935 arm64_nobtitest_bti_j_func_call_using_br_x16 pass
14623 23:00:10.268024 arm64_nobtitest_bti_j_func_call_using_blr pass
14624 23:00:10.268112 arm64_nobtitest_bti_jc_func_call_using_br_x0 pass
14625 23:00:10.268201 arm64_nobtitest_bti_jc_func_call_using_br_x16 pass
14626 23:00:10.268290 arm64_nobtitest_bti_jc_func_call_using_blr pass
14627 23:00:10.268377 arm64_nobtitest_paciasp_func_call_using_br_x0 pass
14628 23:00:10.268670 arm64_nobtitest_paciasp_func_call_using_br_x16 pass
14629 23:00:10.268782 arm64_nobtitest_paciasp_func_call_using_blr pass
14630 23:00:10.268873 arm64_nobtitest pass
14631 23:00:10.268962 arm64_hwcap_cpuinfo_match_RNG pass
14632 23:00:10.269051 arm64_hwcap_sigill_RNG pass
14633 23:00:10.270636 arm64_hwcap_cpuinfo_match_SME pass
14634 23:00:10.270898 arm64_hwcap_sigill_SME pass
14635 23:00:10.270998 arm64_hwcap_cpuinfo_match_SVE pass
14636 23:00:10.271099 arm64_hwcap_sigill_SVE pass
14637 23:00:10.271168 arm64_hwcap_cpuinfo_match_SVE_2 pass
14638 23:00:10.271237 arm64_hwcap_sigill_SVE_2 pass
14639 23:00:10.271328 arm64_hwcap_cpuinfo_match_SVE_AES pass
14640 23:00:10.271409 arm64_hwcap_sigill_SVE_AES pass
14641 23:00:10.271654 arm64_hwcap_cpuinfo_match_SVE2_PMULL pass
14642 23:00:10.271745 arm64_hwcap_sigill_SVE2_PMULL pass
14643 23:00:10.271811 arm64_hwcap_cpuinfo_match_SVE2_BITPERM pass
14644 23:00:10.271874 arm64_hwcap_sigill_SVE2_BITPERM pass
14645 23:00:10.271953 arm64_hwcap_cpuinfo_match_SVE2_SHA3 pass
14646 23:00:10.272014 arm64_hwcap_sigill_SVE2_SHA3 pass
14647 23:00:10.272073 arm64_hwcap_cpuinfo_match_SVE2_SM4 pass
14648 23:00:10.272131 arm64_hwcap_sigill_SVE2_SM4 pass
14649 23:00:10.272189 arm64_hwcap_cpuinfo_match_SVE2_I8MM pass
14650 23:00:10.272251 arm64_hwcap_sigill_SVE2_I8MM pass
14651 23:00:10.272322 arm64_hwcap_cpuinfo_match_SVE2_F32MM pass
14652 23:00:10.272384 arm64_hwcap_sigill_SVE2_F32MM pass
14653 23:00:10.272442 arm64_hwcap_cpuinfo_match_SVE2_F64MM pass
14654 23:00:10.272501 arm64_hwcap_sigill_SVE2_F64MM pass
14655 23:00:10.272562 arm64_hwcap_cpuinfo_match_SVE2_BF16 pass
14656 23:00:10.272622 arm64_hwcap_sigill_SVE2_BF16 pass
14657 23:00:10.272695 arm64_hwcap_cpuinfo_match_SVE2_EBF16 pass
14658 23:00:10.272756 arm64_hwcap_sigill_SVE2_EBF16 skip
14659 23:00:10.272814 arm64_hwcap pass
14660 23:00:10.272873 arm64_ptrace_read_tpidr_one pass
14661 23:00:10.272932 arm64_ptrace_write_tpidr_one pass
14662 23:00:10.273003 arm64_ptrace_verify_tpidr_one pass
14663 23:00:10.273063 arm64_ptrace_count_tpidrs pass
14664 23:00:10.273126 arm64_ptrace_tpidr2_write pass
14665 23:00:10.273184 arm64_ptrace_tpidr2_read pass
14666 23:00:10.273243 arm64_ptrace_write_tpidr_only pass
14667 23:00:10.273316 arm64_ptrace pass
14668 23:00:10.273378 arm64_syscall-abi_getpid_FPSIMD pass
14669 23:00:10.273437 arm64_syscall-abi_getpid_SVE_VL_256 pass
14670 23:00:10.273506 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA pass
14671 23:00:10.273567 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM pass
14672 23:00:10.273639 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA pass
14673 23:00:10.273710 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA pass
14674 23:00:10.273769 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM pass
14675 23:00:10.274013 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA pass
14676 23:00:10.274079 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA pass
14677 23:00:10.274151 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM pass
14678 23:00:10.274212 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA pass
14679 23:00:10.274273 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA pass
14680 23:00:10.274344 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM pass
14681 23:00:10.274404 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA pass
14682 23:00:10.274491 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA pass
14683 23:00:10.274554 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM pass
14684 23:00:10.278706 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA pass
14685 23:00:10.279014 arm64_syscall-abi_getpid_SVE_VL_240 pass
14686 23:00:10.279118 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA pass
14687 23:00:10.279204 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM pass
14688 23:00:10.279305 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA pass
14689 23:00:10.279405 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA pass
14690 23:00:10.279504 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM pass
14691 23:00:10.279842 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA pass
14692 23:00:10.280060 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA pass
14693 23:00:10.280296 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM pass
14694 23:00:10.280484 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA pass
14695 23:00:10.280670 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA pass
14696 23:00:10.280870 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM pass
14697 23:00:10.281117 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA pass
14698 23:00:10.281301 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA pass
14699 23:00:10.281466 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM pass
14700 23:00:10.281630 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA pass
14701 23:00:10.281810 arm64_syscall-abi_getpid_SVE_VL_224 pass
14702 23:00:10.281975 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA pass
14703 23:00:10.282173 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM pass
14704 23:00:10.282343 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA pass
14705 23:00:10.282478 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA pass
14706 23:00:10.282600 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM pass
14707 23:00:10.282795 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA pass
14708 23:00:10.282962 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA pass
14709 23:00:10.283122 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM pass
14710 23:00:10.283322 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA pass
14711 23:00:10.283492 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA pass
14712 23:00:10.286712 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM pass
14713 23:00:10.287172 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA pass
14714 23:00:10.287395 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA pass
14715 23:00:10.287590 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM pass
14716 23:00:10.287763 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA pass
14717 23:00:10.287964 arm64_syscall-abi_getpid_SVE_VL_208 pass
14718 23:00:10.288129 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA pass
14719 23:00:10.288293 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM pass
14720 23:00:10.288454 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA pass
14721 23:00:10.288616 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA pass
14722 23:00:10.288773 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM pass
14723 23:00:10.288971 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA pass
14724 23:00:10.289135 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA pass
14725 23:00:10.289294 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM pass
14726 23:00:10.289449 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA pass
14727 23:00:10.289605 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA pass
14728 23:00:10.289794 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM pass
14729 23:00:10.289957 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA pass
14730 23:00:10.290158 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA pass
14731 23:00:10.290324 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM pass
14732 23:00:10.290487 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA pass
14733 23:00:10.290650 arm64_syscall-abi_getpid_SVE_VL_192 pass
14734 23:00:10.290809 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA pass
14735 23:00:10.290965 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM pass
14736 23:00:10.291121 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA pass
14737 23:00:10.291285 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA pass
14738 23:00:10.291447 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM pass
14739 23:00:10.291608 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA pass
14740 23:00:10.291802 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA pass
14741 23:00:10.291966 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM pass
14742 23:00:10.292126 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA pass
14743 23:00:10.294670 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA pass
14744 23:00:10.294983 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM pass
14745 23:00:10.295083 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA pass
14746 23:00:10.295185 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA pass
14747 23:00:10.295286 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM pass
14748 23:00:10.295388 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA pass
14749 23:00:10.295675 arm64_syscall-abi_getpid_SVE_VL_176 pass
14750 23:00:10.295963 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA pass
14751 23:00:10.296061 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM pass
14752 23:00:10.296159 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA pass
14753 23:00:10.296242 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA pass
14754 23:00:10.296340 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM pass
14755 23:00:10.296440 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA pass
14756 23:00:10.296741 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA pass
14757 23:00:10.296841 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM pass
14758 23:00:10.296939 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA pass
14759 23:00:10.297839 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA pass
14760 23:00:10.315447 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM pass
14761 23:00:10.315783 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA pass
14762 23:00:10.316352 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA pass
14763 23:00:10.316561 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM pass
14764 23:00:10.316743 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA pass
14765 23:00:10.316911 arm64_syscall-abi_getpid_SVE_VL_160 pass
14766 23:00:10.317075 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA pass
14767 23:00:10.317241 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM pass
14768 23:00:10.317464 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA pass
14769 23:00:10.317684 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA pass
14770 23:00:10.317875 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM pass
14771 23:00:10.318004 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA pass
14772 23:00:10.318122 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA pass
14773 23:00:10.318244 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM pass
14774 23:00:10.318374 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA pass
14775 23:00:10.318490 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA pass
14776 23:00:10.318642 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM pass
14777 23:00:10.318794 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA pass
14778 23:00:10.318912 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA pass
14779 23:00:10.319024 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM pass
14780 23:00:10.319162 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA pass
14781 23:00:10.319349 arm64_syscall-abi_getpid_SVE_VL_144 pass
14782 23:00:10.319555 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA pass
14783 23:00:10.322771 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM pass
14784 23:00:10.323184 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA pass
14785 23:00:10.323290 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA pass
14786 23:00:10.323378 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM pass
14787 23:00:10.323464 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA pass
14788 23:00:10.323566 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA pass
14789 23:00:10.323654 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM pass
14790 23:00:10.323754 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA pass
14791 23:00:10.323852 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA pass
14792 23:00:10.324147 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM pass
14793 23:00:10.324238 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA pass
14794 23:00:10.324342 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA pass
14795 23:00:10.324435 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM pass
14796 23:00:10.324717 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA pass
14797 23:00:10.324817 arm64_syscall-abi_getpid_SVE_VL_128 pass
14798 23:00:10.324905 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA pass
14799 23:00:10.325222 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM pass
14800 23:00:10.325428 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA pass
14801 23:00:10.325629 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA pass
14802 23:00:10.325822 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM pass
14803 23:00:10.325991 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA pass
14804 23:00:10.326193 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA pass
14805 23:00:10.326365 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM pass
14806 23:00:10.326534 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA pass
14807 23:00:10.326702 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA pass
14808 23:00:10.326871 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM pass
14809 23:00:10.327068 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA pass
14810 23:00:10.327272 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA pass
14811 23:00:10.330749 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM pass
14812 23:00:10.330953 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA pass
14813 23:00:10.331327 arm64_syscall-abi_getpid_SVE_VL_112 pass
14814 23:00:10.331425 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA pass
14815 23:00:10.331531 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM pass
14816 23:00:10.331605 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA pass
14817 23:00:10.331667 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA pass
14818 23:00:10.331742 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM pass
14819 23:00:10.331806 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA pass
14820 23:00:10.331879 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA pass
14821 23:00:10.331991 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM pass
14822 23:00:10.332073 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA pass
14823 23:00:10.332140 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA pass
14824 23:00:10.332216 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM pass
14825 23:00:10.332284 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA pass
14826 23:00:10.332354 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA pass
14827 23:00:10.332428 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM pass
14828 23:00:10.332682 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA pass
14829 23:00:10.332759 arm64_syscall-abi_getpid_SVE_VL_96 pass
14830 23:00:10.332848 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA pass
14831 23:00:10.332935 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM pass
14832 23:00:10.333011 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA pass
14833 23:00:10.333084 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA pass
14834 23:00:10.333147 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM pass
14835 23:00:10.333403 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA pass
14836 23:00:10.333480 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA pass
14837 23:00:10.333554 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM pass
14838 23:00:10.333617 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA pass
14839 23:00:10.333714 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA pass
14840 23:00:10.333994 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM pass
14841 23:00:10.334068 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA pass
14842 23:00:10.334143 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA pass
14843 23:00:10.334205 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM pass
14844 23:00:10.334294 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA pass
14845 23:00:10.334363 arm64_syscall-abi_getpid_SVE_VL_80 pass
14846 23:00:10.334451 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA pass
14847 23:00:10.338783 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM pass
14848 23:00:10.339091 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA pass
14849 23:00:10.339188 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA pass
14850 23:00:10.339277 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM pass
14851 23:00:10.339362 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA pass
14852 23:00:10.339451 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA pass
14853 23:00:10.339561 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM pass
14854 23:00:10.339648 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA pass
14855 23:00:10.339735 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA pass
14856 23:00:10.339828 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM pass
14857 23:00:10.339912 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA pass
14858 23:00:10.340193 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA pass
14859 23:00:10.340283 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM pass
14860 23:00:10.340407 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA pass
14861 23:00:10.340490 arm64_syscall-abi_getpid_SVE_VL_64 pass
14862 23:00:10.340600 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA pass
14863 23:00:10.340903 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM pass
14864 23:00:10.340987 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA pass
14865 23:00:10.341066 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA pass
14866 23:00:10.341140 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM pass
14867 23:00:10.341215 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA pass
14868 23:00:10.341484 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA pass
14869 23:00:10.341591 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM pass
14870 23:00:10.341712 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA pass
14871 23:00:10.341821 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA pass
14872 23:00:10.341927 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM pass
14873 23:00:10.342026 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA pass
14874 23:00:10.342123 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA pass
14875 23:00:10.342217 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM pass
14876 23:00:10.342313 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA pass
14877 23:00:10.342582 arm64_syscall-abi_getpid_SVE_VL_48 pass
14878 23:00:10.346791 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA pass
14879 23:00:10.347162 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM pass
14880 23:00:10.347269 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA pass
14881 23:00:10.347357 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA pass
14882 23:00:10.347443 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM pass
14883 23:00:10.347545 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA pass
14884 23:00:10.347630 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA pass
14885 23:00:10.347728 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM pass
14886 23:00:10.347827 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA pass
14887 23:00:10.347927 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA pass
14888 23:00:10.348226 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM pass
14889 23:00:10.348328 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA pass
14890 23:00:10.348428 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA pass
14891 23:00:10.348536 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM pass
14892 23:00:10.348830 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA pass
14893 23:00:10.348921 arm64_syscall-abi_getpid_SVE_VL_32 pass
14894 23:00:10.349019 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA pass
14895 23:00:10.349118 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM pass
14896 23:00:10.349219 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA pass
14897 23:00:10.349502 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA pass
14898 23:00:10.349592 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM pass
14899 23:00:10.349711 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA pass
14900 23:00:10.349812 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA pass
14901 23:00:10.350096 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM pass
14902 23:00:10.350187 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA pass
14903 23:00:10.350285 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA pass
14904 23:00:10.350572 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM pass
14905 23:00:10.354872 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA pass
14906 23:00:10.355304 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA pass
14907 23:00:10.355399 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM pass
14908 23:00:10.355484 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA pass
14909 23:00:10.355569 arm64_syscall-abi_getpid_SVE_VL_16 pass
14910 23:00:10.355669 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA pass
14911 23:00:10.355753 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM pass
14912 23:00:10.367983 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA pass
14913 23:00:10.368404 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA pass
14914 23:00:10.368500 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM pass
14915 23:00:10.368587 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA pass
14916 23:00:10.368671 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA pass
14917 23:00:10.368772 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM pass
14918 23:00:10.368859 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA pass
14919 23:00:10.368960 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA pass
14920 23:00:10.369046 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM pass
14921 23:00:10.369145 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA pass
14922 23:00:10.369245 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA pass
14923 23:00:10.369531 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM pass
14924 23:00:10.369636 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA pass
14925 23:00:10.369735 arm64_syscall-abi_sched_yield_FPSIMD pass
14926 23:00:10.369833 arm64_syscall-abi_sched_yield_SVE_VL_256 pass
14927 23:00:10.370122 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA pass
14928 23:00:10.370213 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM pass
14929 23:00:10.370312 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA pass
14930 23:00:10.370600 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA pass
14931 23:00:10.374785 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM pass
14932 23:00:10.375262 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA pass
14933 23:00:10.375374 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA pass
14934 23:00:10.375463 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM pass
14935 23:00:10.375569 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA pass
14936 23:00:10.375658 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA pass
14937 23:00:10.375759 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM pass
14938 23:00:10.375860 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA pass
14939 23:00:10.376169 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA pass
14940 23:00:10.376273 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM pass
14941 23:00:10.376376 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA pass
14942 23:00:10.376480 arm64_syscall-abi_sched_yield_SVE_VL_240 pass
14943 23:00:10.376779 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA pass
14944 23:00:10.376882 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM pass
14945 23:00:10.376993 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA pass
14946 23:00:10.377303 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA pass
14947 23:00:10.377407 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM pass
14948 23:00:10.377692 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA pass
14949 23:00:10.377794 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA pass
14950 23:00:10.377892 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM pass
14951 23:00:10.377999 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA pass
14952 23:00:10.378112 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA pass
14953 23:00:10.378416 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM pass
14954 23:00:10.378516 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA pass
14955 23:00:10.382780 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA pass
14956 23:00:10.383312 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM pass
14957 23:00:10.383419 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA pass
14958 23:00:10.383506 arm64_syscall-abi_sched_yield_SVE_VL_224 pass
14959 23:00:10.383593 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA pass
14960 23:00:10.383696 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM pass
14961 23:00:10.383781 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA pass
14962 23:00:10.383878 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA pass
14963 23:00:10.384192 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM pass
14964 23:00:10.384515 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA pass
14965 23:00:10.384612 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA pass
14966 23:00:10.384734 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM pass
14967 23:00:10.384856 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA pass
14968 23:00:10.385180 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA pass
14969 23:00:10.385287 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM pass
14970 23:00:10.385581 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA pass
14971 23:00:10.385692 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA pass
14972 23:00:10.385794 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM pass
14973 23:00:10.385896 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA pass
14974 23:00:10.386008 arm64_syscall-abi_sched_yield_SVE_VL_208 pass
14975 23:00:10.386320 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA pass
14976 23:00:10.386595 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM pass
14977 23:00:10.390754 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA pass
14978 23:00:10.391112 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA pass
14979 23:00:10.391220 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM pass
14980 23:00:10.391311 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA pass
14981 23:00:10.391413 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA pass
14982 23:00:10.391516 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM pass
14983 23:00:10.391809 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA pass
14984 23:00:10.391919 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA pass
14985 23:00:10.392206 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM pass
14986 23:00:10.392319 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA pass
14987 23:00:10.392445 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA pass
14988 23:00:10.392568 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM pass
14989 23:00:10.392691 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA pass
14990 23:00:10.393004 arm64_syscall-abi_sched_yield_SVE_VL_192 pass
14991 23:00:10.393131 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA pass
14992 23:00:10.393270 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM pass
14993 23:00:10.393597 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA pass
14994 23:00:10.393730 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA pass
14995 23:00:10.393835 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM pass
14996 23:00:10.393937 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA pass
14997 23:00:10.394246 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA pass
14998 23:00:10.394361 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM pass
14999 23:00:10.398727 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA pass
15000 23:00:10.399095 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA pass
15001 23:00:10.399200 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM pass
15002 23:00:10.399304 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA pass
15003 23:00:10.399610 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA pass
15004 23:00:10.399711 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM pass
15005 23:00:10.399816 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA pass
15006 23:00:10.399903 arm64_syscall-abi_sched_yield_SVE_VL_176 pass
15007 23:00:10.400004 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA pass
15008 23:00:10.400305 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM pass
15009 23:00:10.400419 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA pass
15010 23:00:10.400519 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA pass
15011 23:00:10.400812 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM pass
15012 23:00:10.400925 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA pass
15013 23:00:10.401033 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA pass
15014 23:00:10.401330 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM pass
15015 23:00:10.401450 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA pass
15016 23:00:10.401553 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA pass
15017 23:00:10.401867 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM pass
15018 23:00:10.401985 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA pass
15019 23:00:10.402092 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA pass
15020 23:00:10.402388 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM pass
15021 23:00:10.402507 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA pass
15022 23:00:10.406750 arm64_syscall-abi_sched_yield_SVE_VL_160 pass
15023 23:00:10.407012 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA pass
15024 23:00:10.407142 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM pass
15025 23:00:10.407451 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA pass
15026 23:00:10.407566 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA pass
15027 23:00:10.407702 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM pass
15028 23:00:10.407816 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA pass
15029 23:00:10.408143 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA pass
15030 23:00:10.408256 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM pass
15031 23:00:10.408355 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA pass
15032 23:00:10.408458 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA pass
15033 23:00:10.408757 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM pass
15034 23:00:10.408858 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA pass
15035 23:00:10.408959 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA pass
15036 23:00:10.409055 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM pass
15037 23:00:10.409143 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA pass
15038 23:00:10.409254 arm64_syscall-abi_sched_yield_SVE_VL_144 pass
15039 23:00:10.409624 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA pass
15040 23:00:10.409734 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM pass
15041 23:00:10.409850 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA pass
15042 23:00:10.409960 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA pass
15043 23:00:10.410276 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM pass
15044 23:00:10.410378 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA pass
15045 23:00:10.410476 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA pass
15046 23:00:10.414741 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM pass
15047 23:00:10.415108 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA pass
15048 23:00:10.415215 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA pass
15049 23:00:10.415358 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM pass
15050 23:00:10.415481 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA pass
15051 23:00:10.415590 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA pass
15052 23:00:10.430362 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM pass
15053 23:00:10.430835 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA pass
15054 23:00:10.431181 arm64_syscall-abi_sched_yield_SVE_VL_128 pass
15055 23:00:10.431411 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA pass
15056 23:00:10.431646 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM pass
15057 23:00:10.431935 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA pass
15058 23:00:10.432205 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA pass
15059 23:00:10.432451 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM pass
15060 23:00:10.432700 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA pass
15061 23:00:10.432950 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA pass
15062 23:00:10.433194 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM pass
15063 23:00:10.433414 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA pass
15064 23:00:10.433868 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA pass
15065 23:00:10.434121 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM pass
15066 23:00:10.434340 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA pass
15067 23:00:10.434504 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA pass
15068 23:00:10.434708 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM pass
15069 23:00:10.439385 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA pass
15070 23:00:10.439677 arm64_syscall-abi_sched_yield_SVE_VL_112 pass
15071 23:00:10.439938 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA pass
15072 23:00:10.440153 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM pass
15073 23:00:10.440342 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA pass
15074 23:00:10.440542 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA pass
15075 23:00:10.440706 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM pass
15076 23:00:10.440862 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA pass
15077 23:00:10.441055 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA pass
15078 23:00:10.441838 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM pass
15079 23:00:10.442055 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA pass
15080 23:00:10.442278 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA pass
15081 23:00:10.442499 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM pass
15082 23:00:10.442639 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA pass
15083 23:00:10.442761 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA pass
15084 23:00:10.442877 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM pass
15085 23:00:10.442993 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA pass
15086 23:00:10.443112 arm64_syscall-abi_sched_yield_SVE_VL_96 pass
15087 23:00:10.443227 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA pass
15088 23:00:10.443343 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM pass
15089 23:00:10.446848 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA pass
15090 23:00:10.447335 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA pass
15091 23:00:10.447518 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM pass
15092 23:00:10.447728 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA pass
15093 23:00:10.448112 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA pass
15094 23:00:10.448308 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM pass
15095 23:00:10.448472 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA pass
15096 23:00:10.448661 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA pass
15097 23:00:10.448876 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM pass
15098 23:00:10.449117 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA pass
15099 23:00:10.449302 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA pass
15100 23:00:10.449468 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM pass
15101 23:00:10.449643 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA pass
15102 23:00:10.449860 arm64_syscall-abi_sched_yield_SVE_VL_80 pass
15103 23:00:10.450055 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA pass
15104 23:00:10.450291 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM pass
15105 23:00:10.450497 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA pass
15106 23:00:10.450662 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA pass
15107 23:00:10.450790 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM pass
15108 23:00:10.450905 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA pass
15109 23:00:10.451049 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA pass
15110 23:00:10.451171 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM pass
15111 23:00:10.451285 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA pass
15112 23:00:10.454957 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA pass
15113 23:00:10.455191 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM pass
15114 23:00:10.455636 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA pass
15115 23:00:10.455833 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA pass
15116 23:00:10.455994 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM pass
15117 23:00:10.456151 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA pass
15118 23:00:10.456345 arm64_syscall-abi_sched_yield_SVE_VL_64 pass
15119 23:00:10.456511 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA pass
15120 23:00:10.456673 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM pass
15121 23:00:10.456864 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA pass
15122 23:00:10.457021 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA pass
15123 23:00:10.457184 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM pass
15124 23:00:10.457372 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA pass
15125 23:00:10.457526 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA pass
15126 23:00:10.457685 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM pass
15127 23:00:10.457836 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA pass
15128 23:00:10.458004 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA pass
15129 23:00:10.458196 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM pass
15130 23:00:10.458362 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA pass
15131 23:00:10.458526 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA pass
15132 23:00:10.458651 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM pass
15133 23:00:10.458791 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA pass
15134 23:00:10.458911 arm64_syscall-abi_sched_yield_SVE_VL_48 pass
15135 23:00:10.462878 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA pass
15136 23:00:10.463408 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM pass
15137 23:00:10.463676 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA pass
15138 23:00:10.463956 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA pass
15139 23:00:10.464452 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM pass
15140 23:00:10.464687 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA pass
15141 23:00:10.465357 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA pass
15142 23:00:10.465643 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM pass
15143 23:00:10.465867 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA pass
15144 23:00:10.466051 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA pass
15145 23:00:10.466421 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM pass
15146 23:00:10.466525 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA pass
15147 23:00:10.466613 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA pass
15148 23:00:10.466701 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM pass
15149 23:00:10.466817 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA pass
15150 23:00:10.470827 arm64_syscall-abi_sched_yield_SVE_VL_32 pass
15151 23:00:10.471257 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA pass
15152 23:00:10.471370 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM pass
15153 23:00:10.471478 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA pass
15154 23:00:10.471600 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA pass
15155 23:00:10.471721 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM pass
15156 23:00:10.471836 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA pass
15157 23:00:10.472121 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA pass
15158 23:00:10.472256 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM pass
15159 23:00:10.472577 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA pass
15160 23:00:10.472684 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA pass
15161 23:00:10.472978 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM pass
15162 23:00:10.473099 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA pass
15163 23:00:10.473224 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA pass
15164 23:00:10.473587 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM pass
15165 23:00:10.473909 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA pass
15166 23:00:10.474034 arm64_syscall-abi_sched_yield_SVE_VL_16 pass
15167 23:00:10.474164 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA pass
15168 23:00:10.474256 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM pass
15169 23:00:10.474346 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA pass
15170 23:00:10.474421 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA pass
15171 23:00:10.474672 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM pass
15172 23:00:10.474753 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA pass
15173 23:00:10.478874 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA pass
15174 23:00:10.479298 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM pass
15175 23:00:10.479407 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA pass
15176 23:00:10.479516 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA pass
15177 23:00:10.479634 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM pass
15178 23:00:10.479741 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA pass
15179 23:00:10.479863 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA pass
15180 23:00:10.479965 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM pass
15181 23:00:10.480091 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA pass
15182 23:00:10.480209 arm64_syscall-abi pass
15183 23:00:10.480316 arm64_tpidr2_default_value pass
15184 23:00:10.480447 arm64_tpidr2_write_read pass
15185 23:00:10.480548 arm64_tpidr2_write_sleep_read pass
15186 23:00:10.480651 arm64_tpidr2_write_fork_read pass
15187 23:00:10.480724 arm64_tpidr2_write_clone_read pass
15188 23:00:10.480784 arm64_tpidr2 pass
15189 23:00:10.496326 + ../../utils/send-to-lava.sh ./output/result.txt
15190 23:00:10.542391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tags_test RESULT=pass>
15191 23:00:10.543382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tags_test RESULT=pass
15193 23:00:10.577023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass>
15194 23:00:10.577577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass
15196 23:00:10.611180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass>
15197 23:00:10.611710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass
15199 23:00:10.645006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass
15201 23:00:10.645573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass>
15202 23:00:10.679527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass>
15203 23:00:10.679962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass
15205 23:00:10.714439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass>
15206 23:00:10.714883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass
15208 23:00:10.748512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass>
15209 23:00:10.748890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass
15211 23:00:10.784018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass>
15212 23:00:10.784414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass
15214 23:00:10.818472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=pass>
15215 23:00:10.818847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=pass
15217 23:00:10.855717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=pass>
15218 23:00:10.856152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=pass
15220 23:00:10.895395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass>
15221 23:00:10.895869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass
15223 23:00:10.935457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass>
15224 23:00:10.935888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass
15226 23:00:10.974903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass
15228 23:00:10.975336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass>
15229 23:00:11.008727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass>
15230 23:00:11.009106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass
15232 23:00:11.043998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass>
15233 23:00:11.044517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass
15235 23:00:11.079686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass>
15236 23:00:11.080162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass
15238 23:00:11.129514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass>
15239 23:00:11.130014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass
15241 23:00:11.165013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass
15243 23:00:11.165613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass>
15244 23:00:11.204304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=pass
15246 23:00:11.204995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=pass>
15247 23:00:11.260760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip>
15248 23:00:11.261242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip
15250 23:00:11.314509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_za RESULT=pass
15252 23:00:11.315195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_za RESULT=pass>
15253 23:00:11.361212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_vl RESULT=pass
15255 23:00:11.361723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_vl RESULT=pass>
15256 23:00:11.393787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ssve_regs RESULT=pass
15258 23:00:11.394245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ssve_regs RESULT=pass>
15259 23:00:11.424779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_regs RESULT=pass>
15260 23:00:11.425273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_regs RESULT=pass
15262 23:00:11.462665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_vl RESULT=pass>
15263 23:00:11.463103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_vl RESULT=pass
15265 23:00:11.501071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_no_regs RESULT=pass>
15266 23:00:11.501446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_no_regs RESULT=pass
15268 23:00:11.536651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_regs RESULT=pass
15270 23:00:11.537221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_regs RESULT=pass>
15271 23:00:11.573058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_corrupt_pac RESULT=pass
15273 23:00:11.573526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_corrupt_pac RESULT=pass>
15274 23:00:11.609309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop RESULT=pass
15276 23:00:11.609962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop RESULT=pass>
15277 23:00:11.647129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop_generic RESULT=pass
15279 23:00:11.647820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop_generic RESULT=pass>
15280 23:00:11.683615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_single_thread_different_keys RESULT=pass>
15281 23:00:11.684051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_single_thread_different_keys RESULT=pass
15283 23:00:11.717419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_exec_changed_keys RESULT=pass
15285 23:00:11.717794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_exec_changed_keys RESULT=pass>
15286 23:00:11.751924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys RESULT=pass>
15287 23:00:11.752331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys RESULT=pass
15289 23:00:11.786180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys_generic RESULT=pass
15291 23:00:11.786744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys_generic RESULT=pass>
15292 23:00:11.822959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac RESULT=pass
15294 23:00:11.823663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac RESULT=pass>
15295 23:00:11.858444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass
15297 23:00:11.859011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass>
15298 23:00:11.892877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-256-0 RESULT=pass
15300 23:00:11.893333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-256-0 RESULT=pass>
15301 23:00:11.928505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-240-0 RESULT=pass>
15302 23:00:11.929007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-240-0 RESULT=pass
15304 23:00:11.964663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-224-0 RESULT=pass>
15305 23:00:11.965124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-224-0 RESULT=pass
15307 23:00:12.001622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-208-0 RESULT=pass>
15308 23:00:12.002076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-208-0 RESULT=pass
15310 23:00:12.039758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-192-0 RESULT=pass
15312 23:00:12.040228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-192-0 RESULT=pass>
15313 23:00:12.075333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-176-0 RESULT=pass>
15314 23:00:12.075817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-176-0 RESULT=pass
15316 23:00:12.110395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-160-0 RESULT=pass
15318 23:00:12.110957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-160-0 RESULT=pass>
15319 23:00:12.144925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-144-0 RESULT=pass>
15320 23:00:12.145404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-144-0 RESULT=pass
15322 23:00:12.180380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-128-0 RESULT=pass>
15323 23:00:12.180861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-128-0 RESULT=pass
15325 23:00:12.224767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-112-0 RESULT=pass>
15326 23:00:12.225207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-112-0 RESULT=pass
15328 23:00:12.260849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-96-0 RESULT=pass
15330 23:00:12.261430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-96-0 RESULT=pass>
15331 23:00:12.297836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-80-0 RESULT=pass>
15332 23:00:12.298352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-80-0 RESULT=pass
15334 23:00:12.335813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-0 RESULT=pass>
15335 23:00:12.336341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-0 RESULT=pass
15337 23:00:12.375876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-48-0 RESULT=pass
15339 23:00:12.376595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-48-0 RESULT=pass>
15340 23:00:12.412952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-0 RESULT=pass>
15341 23:00:12.413519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-0 RESULT=pass
15343 23:00:12.447766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-0 RESULT=pass>
15344 23:00:12.448305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-0 RESULT=pass
15346 23:00:12.489757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-256-0 RESULT=pass>
15347 23:00:12.490296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-256-0 RESULT=pass
15349 23:00:12.536209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-256-0 RESULT=pass>
15350 23:00:12.536676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-256-0 RESULT=pass
15352 23:00:12.581591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-128-0 RESULT=pass>
15353 23:00:12.581992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-128-0 RESULT=pass
15355 23:00:12.616734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-128-0 RESULT=pass>
15356 23:00:12.617133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-128-0 RESULT=pass
15358 23:00:12.653201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-0 RESULT=pass
15360 23:00:12.653585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-0 RESULT=pass>
15361 23:00:12.687466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-0 RESULT=pass
15363 23:00:12.688026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-0 RESULT=pass>
15364 23:00:12.721046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-0 RESULT=pass>
15365 23:00:12.721487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-0 RESULT=pass
15367 23:00:12.757195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-0 RESULT=pass
15369 23:00:12.757777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-0 RESULT=pass>
15370 23:00:12.793063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-0 RESULT=pass>
15371 23:00:12.793618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-0 RESULT=pass
15373 23:00:12.828461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-0 RESULT=pass>
15374 23:00:12.828924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-0 RESULT=pass
15376 23:00:12.864662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress RESULT=pass
15378 23:00:12.865143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress RESULT=pass>
15379 23:00:12.904640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 RESULT=pass>
15380 23:00:12.905108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 RESULT=pass
15382 23:00:12.943477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state RESULT=pass>
15383 23:00:12.943858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state RESULT=pass
15385 23:00:12.980274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set RESULT=pass>
15386 23:00:12.980724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set RESULT=pass
15388 23:00:13.020131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass>
15389 23:00:13.020632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass
15391 23:00:13.056943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_16 RESULT=pass>
15392 23:00:13.057419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_16 RESULT=pass
15394 23:00:13.090877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 RESULT=pass
15396 23:00:13.091450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 RESULT=pass>
15397 23:00:13.125216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 RESULT=pass>
15398 23:00:13.125723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 RESULT=pass
15400 23:00:13.168564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 RESULT=pass
15402 23:00:13.169290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 RESULT=pass>
15403 23:00:13.204169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_32 RESULT=pass
15405 23:00:13.204772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_32 RESULT=pass>
15406 23:00:13.240745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 RESULT=pass
15408 23:00:13.241324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 RESULT=pass>
15409 23:00:13.274110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 RESULT=pass>
15410 23:00:13.274568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 RESULT=pass
15412 23:00:13.309092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 RESULT=pass>
15413 23:00:13.309548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 RESULT=pass
15415 23:00:13.342676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_48 RESULT=pass
15417 23:00:13.343251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_48 RESULT=pass>
15418 23:00:13.376679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 RESULT=pass>
15419 23:00:13.377145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 RESULT=pass
15421 23:00:13.410880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 RESULT=pass
15423 23:00:13.411366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 RESULT=pass>
15424 23:00:13.446976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 RESULT=pass
15426 23:00:13.447428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 RESULT=pass>
15427 23:00:13.480856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_64 RESULT=pass>
15428 23:00:13.481250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_64 RESULT=pass
15430 23:00:13.517000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 RESULT=pass
15432 23:00:13.517393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 RESULT=pass>
15433 23:00:13.553783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 RESULT=pass>
15434 23:00:13.554203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 RESULT=pass
15436 23:00:13.591625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 RESULT=pass>
15437 23:00:13.592074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 RESULT=pass
15439 23:00:13.634469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_80 RESULT=pass
15441 23:00:13.634939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_80 RESULT=pass>
15442 23:00:13.676660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 RESULT=pass>
15443 23:00:13.677091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 RESULT=pass
15445 23:00:13.708681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 RESULT=pass>
15446 23:00:13.709103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 RESULT=pass
15448 23:00:13.740715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 RESULT=pass>
15449 23:00:13.741139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 RESULT=pass
15451 23:00:13.774478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_96 RESULT=pass>
15452 23:00:13.774895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_96 RESULT=pass
15454 23:00:13.808078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 RESULT=pass>
15455 23:00:13.808512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 RESULT=pass
15457 23:00:13.842170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 RESULT=pass
15459 23:00:13.842639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 RESULT=pass>
15460 23:00:13.875577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 RESULT=pass
15462 23:00:13.876021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 RESULT=pass>
15463 23:00:13.907809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_112 RESULT=pass>
15464 23:00:13.908234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_112 RESULT=pass
15466 23:00:13.940343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 RESULT=pass>
15467 23:00:13.940747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 RESULT=pass
15469 23:00:13.973100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 RESULT=pass>
15470 23:00:13.973554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 RESULT=pass
15472 23:00:14.005432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 RESULT=pass>
15473 23:00:14.005936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 RESULT=pass
15475 23:00:14.038008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_128 RESULT=pass
15477 23:00:14.038607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_128 RESULT=pass>
15478 23:00:14.070456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 RESULT=pass
15480 23:00:14.070914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 RESULT=pass>
15481 23:00:14.103418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 RESULT=pass>
15482 23:00:14.103827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 RESULT=pass
15484 23:00:14.136137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 RESULT=pass
15486 23:00:14.136595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 RESULT=pass>
15487 23:00:14.168284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_144 RESULT=pass
15489 23:00:14.168760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_144 RESULT=pass>
15490 23:00:14.200394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 RESULT=pass>
15491 23:00:14.200807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 RESULT=pass
15493 23:00:14.232134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 RESULT=pass
15495 23:00:14.232709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 RESULT=pass>
15496 23:00:14.264629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 RESULT=pass
15498 23:00:14.265182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 RESULT=pass>
15499 23:00:14.296630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_160 RESULT=pass>
15500 23:00:14.297105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_160 RESULT=pass
15502 23:00:14.328202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 RESULT=pass
15504 23:00:14.328950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 RESULT=pass>
15505 23:00:14.361067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 RESULT=pass
15507 23:00:14.361629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 RESULT=pass>
15508 23:00:14.394020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 RESULT=pass
15510 23:00:14.394666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 RESULT=pass>
15511 23:00:14.426159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_176 RESULT=pass>
15512 23:00:14.426695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_176 RESULT=pass
15514 23:00:14.459009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 RESULT=pass
15516 23:00:14.459624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 RESULT=pass>
15517 23:00:14.505233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 RESULT=pass>
15518 23:00:14.505687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 RESULT=pass
15520 23:00:14.537623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 RESULT=pass>
15521 23:00:14.538043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 RESULT=pass
15523 23:00:14.569630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_192 RESULT=pass
15525 23:00:14.570090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_192 RESULT=pass>
15526 23:00:14.601200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 RESULT=pass
15528 23:00:14.601673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 RESULT=pass>
15529 23:00:14.647945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 RESULT=pass>
15530 23:00:14.648364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 RESULT=pass
15532 23:00:14.680925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 RESULT=pass>
15533 23:00:14.681342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 RESULT=pass
15535 23:00:14.713125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_208 RESULT=pass>
15536 23:00:14.713544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_208 RESULT=pass
15538 23:00:14.744977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 RESULT=pass>
15539 23:00:14.745395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 RESULT=pass
15541 23:00:14.779332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 RESULT=pass>
15542 23:00:14.779745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 RESULT=pass
15544 23:00:14.811920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 RESULT=pass>
15545 23:00:14.812338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 RESULT=pass
15547 23:00:14.844008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_224 RESULT=pass
15549 23:00:14.844460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_224 RESULT=pass>
15550 23:00:14.876296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 RESULT=pass
15552 23:00:14.876720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 RESULT=pass>
15553 23:00:14.908396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 RESULT=pass>
15554 23:00:14.908826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 RESULT=pass
15556 23:00:14.940572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 RESULT=pass>
15557 23:00:14.940988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 RESULT=pass
15559 23:00:14.971557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_240 RESULT=pass>
15560 23:00:14.972006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_240 RESULT=pass
15562 23:00:15.002340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 RESULT=pass
15564 23:00:15.002765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 RESULT=pass>
15565 23:00:15.033710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 RESULT=pass>
15566 23:00:15.034103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 RESULT=pass
15568 23:00:15.082502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 RESULT=pass
15570 23:00:15.083094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 RESULT=pass>
15571 23:00:15.115533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_256 RESULT=pass>
15572 23:00:15.115987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_256 RESULT=pass
15574 23:00:15.149045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 RESULT=pass
15576 23:00:15.149615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 RESULT=pass>
15577 23:00:15.183008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 RESULT=pass
15579 23:00:15.183594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 RESULT=pass>
15580 23:00:15.216791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 RESULT=pass
15582 23:00:15.217255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 RESULT=pass>
15583 23:00:15.249818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_272 RESULT=pass>
15584 23:00:15.250254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_272 RESULT=pass
15586 23:00:15.283658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip>
15587 23:00:15.284036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip
15589 23:00:15.316957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip>
15590 23:00:15.317382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip
15592 23:00:15.350482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip>
15593 23:00:15.350842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip
15595 23:00:15.384189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_288 RESULT=pass>
15596 23:00:15.384568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_288 RESULT=pass
15598 23:00:15.419748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip>
15599 23:00:15.420131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip
15601 23:00:15.453861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip>
15602 23:00:15.454219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip
15604 23:00:15.488586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip>
15605 23:00:15.489048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip
15607 23:00:15.522612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_304 RESULT=pass
15609 23:00:15.523182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_304 RESULT=pass>
15610 23:00:15.556760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip>
15611 23:00:15.557156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip
15613 23:00:15.590898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip
15615 23:00:15.591321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip>
15616 23:00:15.624953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip
15618 23:00:15.625379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip>
15619 23:00:15.658805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_320 RESULT=pass
15621 23:00:15.659275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_320 RESULT=pass>
15622 23:00:15.692818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip
15624 23:00:15.693287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip>
15625 23:00:15.726839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip
15627 23:00:15.727293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip>
15628 23:00:15.762068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip>
15629 23:00:15.762489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip
15631 23:00:15.796331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_336 RESULT=pass
15633 23:00:15.796779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_336 RESULT=pass>
15634 23:00:15.829187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip>
15635 23:00:15.829605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip
15637 23:00:15.862308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip>
15638 23:00:15.862698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip
15640 23:00:15.896085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip>
15641 23:00:15.896471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip
15643 23:00:15.931295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_352 RESULT=pass
15645 23:00:15.931735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_352 RESULT=pass>
15646 23:00:15.964799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip>
15647 23:00:15.965186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip
15649 23:00:15.998053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip>
15650 23:00:15.998436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip
15652 23:00:16.032160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip>
15653 23:00:16.032556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip
15655 23:00:16.065212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_368 RESULT=pass>
15656 23:00:16.065638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_368 RESULT=pass
15658 23:00:16.099295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip
15660 23:00:16.099747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip>
15661 23:00:16.132937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip>
15662 23:00:16.133334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip
15664 23:00:16.166995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip
15666 23:00:16.167604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip>
15667 23:00:16.200964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_384 RESULT=pass
15669 23:00:16.201604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_384 RESULT=pass>
15670 23:00:16.234280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip>
15671 23:00:16.234791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip
15673 23:00:16.270308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip
15675 23:00:16.270919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip>
15676 23:00:16.304675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip
15678 23:00:16.305260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip>
15679 23:00:16.348847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_400 RESULT=pass>
15680 23:00:16.349318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_400 RESULT=pass
15682 23:00:16.386409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip>
15683 23:00:16.386800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip
15685 23:00:16.428333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip>
15686 23:00:16.428705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip
15688 23:00:16.464059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip
15690 23:00:16.464487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip>
15691 23:00:16.497904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_416 RESULT=pass>
15692 23:00:16.498285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_416 RESULT=pass
15694 23:00:16.532134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip
15696 23:00:16.532727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip>
15697 23:00:16.565640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip>
15698 23:00:16.566073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip
15700 23:00:16.600744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip
15702 23:00:16.601212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip>
15703 23:00:16.634453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_432 RESULT=pass>
15704 23:00:16.634888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_432 RESULT=pass
15706 23:00:16.668720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip
15708 23:00:16.669178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip>
15709 23:00:16.702479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip>
15710 23:00:16.702903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip
15712 23:00:16.736456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip>
15713 23:00:16.736857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip
15715 23:00:16.770018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_448 RESULT=pass>
15716 23:00:16.770493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_448 RESULT=pass
15718 23:00:16.803721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip>
15719 23:00:16.804132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip
15721 23:00:16.838210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip
15723 23:00:16.838689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip>
15724 23:00:16.872602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip>
15725 23:00:16.872987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip
15727 23:00:16.906107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_464 RESULT=pass>
15728 23:00:16.906517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_464 RESULT=pass
15730 23:00:16.940571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip>
15731 23:00:16.940958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip
15733 23:00:16.974845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip
15735 23:00:16.975300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip>
15736 23:00:17.010158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip
15738 23:00:17.010618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip>
15739 23:00:17.045274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_480 RESULT=pass>
15740 23:00:17.045694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_480 RESULT=pass
15742 23:00:17.079972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip
15744 23:00:17.080427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip>
15745 23:00:17.114513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip
15747 23:00:17.114971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip>
15748 23:00:17.149706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip>
15749 23:00:17.150130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip
15751 23:00:17.184098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_496 RESULT=pass>
15752 23:00:17.184489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_496 RESULT=pass
15754 23:00:17.218411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip
15756 23:00:17.218846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip>
15757 23:00:17.252153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip
15759 23:00:17.252610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip>
15760 23:00:17.287950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip>
15761 23:00:17.288387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip
15763 23:00:17.322018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_512 RESULT=pass>
15764 23:00:17.322439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_512 RESULT=pass
15766 23:00:17.356497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip>
15767 23:00:17.356919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip
15769 23:00:17.391061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip
15771 23:00:17.391501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip>
15772 23:00:17.425803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip>
15773 23:00:17.426247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip
15775 23:00:17.460293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_528 RESULT=pass
15777 23:00:17.460867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_528 RESULT=pass>
15778 23:00:17.494338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip
15780 23:00:17.494892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip>
15781 23:00:17.528198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip>
15782 23:00:17.528666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip
15784 23:00:17.562424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip>
15785 23:00:17.562882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip
15787 23:00:17.596704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_544 RESULT=pass>
15788 23:00:17.597132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_544 RESULT=pass
15790 23:00:17.631842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip
15792 23:00:17.632404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip>
15793 23:00:17.665808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip
15795 23:00:17.666384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip>
15796 23:00:17.700992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip
15798 23:00:17.701437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip>
15799 23:00:17.735778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_560 RESULT=pass>
15800 23:00:17.736198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_560 RESULT=pass
15802 23:00:17.770309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip>
15803 23:00:17.770752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip
15805 23:00:17.807828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip>
15806 23:00:17.808263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip
15808 23:00:17.842831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip
15810 23:00:17.843439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip>
15811 23:00:17.876655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_576 RESULT=pass>
15812 23:00:17.877130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_576 RESULT=pass
15814 23:00:17.912011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip
15816 23:00:17.912601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip>
15817 23:00:17.952153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip
15819 23:00:17.952751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip>
15820 23:00:17.987733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip>
15821 23:00:17.988106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip
15823 23:00:18.020113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_592 RESULT=pass>
15824 23:00:18.020473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_592 RESULT=pass
15826 23:00:18.054004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip>
15827 23:00:18.054469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip
15829 23:00:18.087258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip>
15830 23:00:18.087671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip
15832 23:00:18.119863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip>
15833 23:00:18.120289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip
15835 23:00:18.152828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_608 RESULT=pass>
15836 23:00:18.153207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_608 RESULT=pass
15838 23:00:18.187008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip
15840 23:00:18.187578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip>
15841 23:00:18.219556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip>
15842 23:00:18.220015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip
15844 23:00:18.252257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip
15846 23:00:18.252839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip>
15847 23:00:18.284992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_624 RESULT=pass>
15848 23:00:18.285432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_624 RESULT=pass
15850 23:00:18.318573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip>
15851 23:00:18.319065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip
15853 23:00:18.351896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip
15855 23:00:18.352353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip>
15856 23:00:18.384077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip>
15857 23:00:18.384448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip
15859 23:00:18.416723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_640 RESULT=pass>
15860 23:00:18.417128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_640 RESULT=pass
15862 23:00:18.453195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip
15864 23:00:18.453552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip>
15865 23:00:18.487774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip>
15866 23:00:18.488191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip
15868 23:00:18.523291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip>
15869 23:00:18.523659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip
15871 23:00:18.556327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_656 RESULT=pass
15873 23:00:18.556779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_656 RESULT=pass>
15874 23:00:18.588869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip
15876 23:00:18.589325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip>
15877 23:00:18.621795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip>
15878 23:00:18.622188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip
15880 23:00:18.653542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip>
15881 23:00:18.654032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip
15883 23:00:18.686071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_672 RESULT=pass>
15884 23:00:18.686503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_672 RESULT=pass
15886 23:00:18.728847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip
15888 23:00:18.729315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip>
15889 23:00:18.774133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip>
15890 23:00:18.774575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip
15892 23:00:18.817386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip>
15893 23:00:18.817807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip
15895 23:00:18.848521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_688 RESULT=pass>
15896 23:00:18.848958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_688 RESULT=pass
15898 23:00:18.881161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip
15900 23:00:18.881623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip>
15901 23:00:18.913409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip>
15902 23:00:18.913885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip
15904 23:00:18.947521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip>
15905 23:00:18.947994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip
15907 23:00:18.980058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_704 RESULT=pass
15909 23:00:18.980833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_704 RESULT=pass>
15910 23:00:19.013445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip
15912 23:00:19.013901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip>
15913 23:00:19.045618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip>
15914 23:00:19.046044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip
15916 23:00:19.078359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip
15918 23:00:19.078821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip>
15919 23:00:19.110515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_720 RESULT=pass
15921 23:00:19.111088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_720 RESULT=pass>
15922 23:00:19.142877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip
15924 23:00:19.143519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip>
15925 23:00:19.174984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip>
15926 23:00:19.175480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip
15928 23:00:19.210093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip>
15929 23:00:19.210542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip
15931 23:00:19.245827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_736 RESULT=pass
15933 23:00:19.246391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_736 RESULT=pass>
15934 23:00:19.282130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip
15936 23:00:19.282657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip>
15937 23:00:19.318038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip
15939 23:00:19.318540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip>
15940 23:00:19.355451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip>
15941 23:00:19.355944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip
15943 23:00:19.391701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_752 RESULT=pass>
15944 23:00:19.392188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_752 RESULT=pass
15946 23:00:19.427631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip>
15947 23:00:19.428074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip
15949 23:00:19.464355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip>
15950 23:00:19.464800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip
15952 23:00:19.500236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip
15954 23:00:19.500786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip>
15955 23:00:19.536173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_768 RESULT=pass>
15956 23:00:19.536595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_768 RESULT=pass
15958 23:00:19.572272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip
15960 23:00:19.572723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip>
15961 23:00:19.608196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip>
15962 23:00:19.608637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip
15964 23:00:19.644199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip>
15965 23:00:19.644617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip
15967 23:00:19.679669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_784 RESULT=pass>
15968 23:00:19.679951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_784 RESULT=pass
15970 23:00:19.714273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip>
15971 23:00:19.714557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip
15973 23:00:19.748836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip>
15974 23:00:19.749227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip
15976 23:00:19.784609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip
15978 23:00:19.785050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip>
15979 23:00:19.819726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_800 RESULT=pass>
15980 23:00:19.820221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_800 RESULT=pass
15982 23:00:19.855380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip
15984 23:00:19.856022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip>
15985 23:00:19.889988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip
15987 23:00:19.890440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip>
15988 23:00:19.926170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip>
15989 23:00:19.926585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip
15991 23:00:19.963200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_816 RESULT=pass>
15992 23:00:19.963615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_816 RESULT=pass
15994 23:00:19.999918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip
15996 23:00:20.000377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip>
15997 23:00:20.036752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip
15999 23:00:20.037206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip>
16000 23:00:20.073522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip
16002 23:00:20.073986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip>
16003 23:00:20.110544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_832 RESULT=pass>
16004 23:00:20.110970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_832 RESULT=pass
16006 23:00:20.147980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip>
16007 23:00:20.148398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip
16009 23:00:20.184407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip>
16010 23:00:20.184819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip
16012 23:00:20.222138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip>
16013 23:00:20.222574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip
16015 23:00:20.259597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_848 RESULT=pass>
16016 23:00:20.260040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_848 RESULT=pass
16018 23:00:20.296560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip>
16019 23:00:20.297018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip
16021 23:00:20.332096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip>
16022 23:00:20.332506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip
16024 23:00:20.366814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip
16026 23:00:20.367278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip>
16027 23:00:20.402269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_864 RESULT=pass>
16028 23:00:20.402704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_864 RESULT=pass
16030 23:00:20.437970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip>
16031 23:00:20.438375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip
16033 23:00:20.473857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip
16035 23:00:20.474506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip>
16036 23:00:20.509920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip>
16037 23:00:20.510388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip
16039 23:00:20.544755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_880 RESULT=pass
16041 23:00:20.545311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_880 RESULT=pass>
16042 23:00:20.579690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip>
16043 23:00:20.580102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip
16045 23:00:20.614997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip
16047 23:00:20.615413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip>
16048 23:00:20.650141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip>
16049 23:00:20.650502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip
16051 23:00:20.684564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_896 RESULT=pass>
16052 23:00:20.685024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_896 RESULT=pass
16054 23:00:20.720518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip>
16055 23:00:20.721050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip
16057 23:00:20.757001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip>
16058 23:00:20.757535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip
16060 23:00:20.794429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip
16062 23:00:20.794895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip>
16063 23:00:20.831030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_912 RESULT=pass
16065 23:00:20.831484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_912 RESULT=pass>
16066 23:00:20.868379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip>
16067 23:00:20.868796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip
16069 23:00:20.905554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip
16071 23:00:20.906029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip>
16072 23:00:20.943772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip
16074 23:00:20.944304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip>
16075 23:00:20.981764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_928 RESULT=pass
16077 23:00:20.982232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_928 RESULT=pass>
16078 23:00:21.019765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip>
16079 23:00:21.020184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip
16081 23:00:21.057522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip>
16082 23:00:21.057959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip
16084 23:00:21.095762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip
16086 23:00:21.096231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip>
16087 23:00:21.130755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_944 RESULT=pass
16089 23:00:21.131338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_944 RESULT=pass>
16090 23:00:21.168664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip>
16091 23:00:21.169114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip
16093 23:00:21.205215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip
16095 23:00:21.205816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip>
16096 23:00:21.242160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip
16098 23:00:21.242834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip>
16099 23:00:21.278653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_960 RESULT=pass
16101 23:00:21.279352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_960 RESULT=pass>
16102 23:00:21.316841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip>
16103 23:00:21.317192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip
16105 23:00:21.353698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip
16107 23:00:21.354118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip>
16108 23:00:21.390442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip>
16109 23:00:21.390786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip
16111 23:00:21.444767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_976 RESULT=pass>
16112 23:00:21.445096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_976 RESULT=pass
16114 23:00:21.489552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip>
16115 23:00:21.489956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip
16117 23:00:21.526342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip>
16118 23:00:21.526755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip
16120 23:00:21.568825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip>
16121 23:00:21.569314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip
16123 23:00:21.611432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_992 RESULT=pass>
16124 23:00:21.611893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_992 RESULT=pass
16126 23:00:21.644787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip>
16127 23:00:21.645235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip
16129 23:00:21.677696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip>
16130 23:00:21.678160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip
16132 23:00:21.712034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip>
16133 23:00:21.712491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip
16135 23:00:21.746413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1008 RESULT=pass
16137 23:00:21.746973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1008 RESULT=pass>
16138 23:00:21.779382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip
16140 23:00:21.779826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip>
16141 23:00:21.813038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip
16143 23:00:21.813484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip>
16144 23:00:21.847331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip
16146 23:00:21.847908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip>
16147 23:00:21.881715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1024 RESULT=pass
16149 23:00:21.882325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1024 RESULT=pass>
16150 23:00:21.915922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip>
16151 23:00:21.916387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip
16153 23:00:21.950103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip>
16154 23:00:21.950555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip
16156 23:00:21.982029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip>
16157 23:00:21.982487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip
16159 23:00:22.016523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1040 RESULT=pass>
16160 23:00:22.016994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1040 RESULT=pass
16162 23:00:22.050435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip
16164 23:00:22.050985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip>
16165 23:00:22.129960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip>
16166 23:00:22.130352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip
16168 23:00:22.163535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip>
16169 23:00:22.163909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip
16171 23:00:22.196292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1056 RESULT=pass>
16172 23:00:22.196679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1056 RESULT=pass
16174 23:00:22.232561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip>
16175 23:00:22.232939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip
16177 23:00:22.268246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip>
16178 23:00:22.268742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip
16180 23:00:22.304294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip>
16181 23:00:22.304669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip
16183 23:00:22.348719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1072 RESULT=pass>
16184 23:00:22.349159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1072 RESULT=pass
16186 23:00:22.382958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip
16188 23:00:22.383404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip>
16189 23:00:22.424825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip>
16190 23:00:22.425242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip
16192 23:00:22.468582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip
16194 23:00:22.469054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip>
16195 23:00:22.503446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1088 RESULT=pass
16197 23:00:22.503815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1088 RESULT=pass>
16198 23:00:22.536091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip>
16199 23:00:22.536450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip
16201 23:00:22.568331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip>
16202 23:00:22.568685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip
16204 23:00:22.602322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip
16206 23:00:22.602952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip>
16207 23:00:22.640918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1104 RESULT=pass
16209 23:00:22.641554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1104 RESULT=pass>
16210 23:00:22.674648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip
16212 23:00:22.675114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip>
16213 23:00:22.708476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip>
16214 23:00:22.708868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip
16216 23:00:22.741706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip>
16217 23:00:22.742113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip
16219 23:00:22.773778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1120 RESULT=pass>
16220 23:00:22.774164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1120 RESULT=pass
16222 23:00:22.806580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip
16224 23:00:22.807146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip>
16225 23:00:22.839096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip
16227 23:00:22.839653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip>
16228 23:00:22.873300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip
16230 23:00:22.873768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip>
16231 23:00:22.907792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1136 RESULT=pass>
16232 23:00:22.908311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1136 RESULT=pass
16234 23:00:22.941868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip>
16235 23:00:22.942343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip
16237 23:00:22.975814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip
16239 23:00:22.976446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip>
16240 23:00:23.009073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip
16242 23:00:23.009554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip>
16243 23:00:23.042825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1152 RESULT=pass
16245 23:00:23.043299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1152 RESULT=pass>
16246 23:00:23.076366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip>
16247 23:00:23.076791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip
16249 23:00:23.110261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip
16251 23:00:23.110654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip>
16252 23:00:23.143776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip>
16253 23:00:23.144262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip
16255 23:00:23.177254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1168 RESULT=pass
16257 23:00:23.178013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1168 RESULT=pass>
16258 23:00:23.212113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip
16260 23:00:23.212850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip>
16261 23:00:23.247075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip
16263 23:00:23.247705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip>
16264 23:00:23.282424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip>
16265 23:00:23.282929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip
16267 23:00:23.321550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1184 RESULT=pass>
16268 23:00:23.322000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1184 RESULT=pass
16270 23:00:23.355404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip>
16271 23:00:23.355792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip
16273 23:00:23.387866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip>
16274 23:00:23.388284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip
16276 23:00:23.420965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip>
16277 23:00:23.421436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip
16279 23:00:23.454013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1200 RESULT=pass>
16280 23:00:23.454430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1200 RESULT=pass
16282 23:00:23.488006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip>
16283 23:00:23.488461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip
16285 23:00:23.522079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip
16287 23:00:23.522505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip>
16288 23:00:23.555558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip>
16289 23:00:23.555963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip
16291 23:00:23.587901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1216 RESULT=pass>
16292 23:00:23.588305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1216 RESULT=pass
16294 23:00:23.632699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip>
16295 23:00:23.633106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip
16297 23:00:23.670610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip
16299 23:00:23.671173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip>
16300 23:00:23.703941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip>
16301 23:00:23.704353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip
16303 23:00:23.736682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1232 RESULT=pass>
16304 23:00:23.737107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1232 RESULT=pass
16306 23:00:23.770008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip>
16307 23:00:23.770420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip
16309 23:00:23.803748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip>
16310 23:00:23.804208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip
16312 23:00:23.835731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip
16314 23:00:23.836274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip>
16315 23:00:23.867502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1248 RESULT=pass>
16316 23:00:23.867928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1248 RESULT=pass
16318 23:00:23.901692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip
16320 23:00:23.902145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip>
16321 23:00:23.934927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip
16323 23:00:23.935392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip>
16324 23:00:23.968104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip>
16325 23:00:23.968579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip
16327 23:00:24.001216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1264 RESULT=pass>
16328 23:00:24.001706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1264 RESULT=pass
16330 23:00:24.034445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip>
16331 23:00:24.034910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip
16333 23:00:24.068445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip>
16334 23:00:24.069000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip
16336 23:00:24.104239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip>
16337 23:00:24.104795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip
16339 23:00:24.139508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1280 RESULT=pass>
16340 23:00:24.140061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1280 RESULT=pass
16342 23:00:24.176270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip>
16343 23:00:24.176704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip
16345 23:00:24.213206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip>
16346 23:00:24.213635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip
16348 23:00:24.247969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip
16350 23:00:24.248424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip>
16351 23:00:24.282180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1296 RESULT=pass>
16352 23:00:24.282628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1296 RESULT=pass
16354 23:00:24.317657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip>
16355 23:00:24.318135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip
16357 23:00:24.353632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip
16359 23:00:24.354055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip>
16360 23:00:24.388251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip>
16361 23:00:24.388681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip
16363 23:00:24.422605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1312 RESULT=pass
16365 23:00:24.423032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1312 RESULT=pass>
16366 23:00:24.456928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip>
16367 23:00:24.457302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip
16369 23:00:24.492135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip>
16370 23:00:24.492532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip
16372 23:00:24.525995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip>
16373 23:00:24.526431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip
16375 23:00:24.561836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1328 RESULT=pass
16377 23:00:24.562207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1328 RESULT=pass>
16378 23:00:24.597245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip
16380 23:00:24.597716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip>
16381 23:00:24.631688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip>
16382 23:00:24.632107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip
16384 23:00:24.666184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip
16386 23:00:24.666636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip>
16387 23:00:24.699887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1344 RESULT=pass>
16388 23:00:24.700324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1344 RESULT=pass
16390 23:00:24.734239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip>
16391 23:00:24.734661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip
16393 23:00:24.769315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip>
16394 23:00:24.769872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip
16396 23:00:24.804079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip
16398 23:00:24.804646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip>
16399 23:00:24.839689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1360 RESULT=pass
16401 23:00:24.840152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1360 RESULT=pass>
16402 23:00:24.873318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip>
16403 23:00:24.873730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip
16405 23:00:24.905999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip>
16406 23:00:24.906453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip
16408 23:00:24.938467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip>
16409 23:00:24.938914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip
16411 23:00:24.987604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1376 RESULT=pass>
16412 23:00:24.988073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1376 RESULT=pass
16414 23:00:25.035690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip>
16415 23:00:25.036068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip
16417 23:00:25.070920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip
16419 23:00:25.071540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip>
16420 23:00:25.104380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip>
16421 23:00:25.104774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip
16423 23:00:25.138384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1392 RESULT=pass
16425 23:00:25.138839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1392 RESULT=pass>
16426 23:00:25.171857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip>
16427 23:00:25.172288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip
16429 23:00:25.205202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip>
16430 23:00:25.205658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip
16432 23:00:25.240922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip>
16433 23:00:25.241301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip
16435 23:00:25.275437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1408 RESULT=pass>
16436 23:00:25.275862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1408 RESULT=pass
16438 23:00:25.312299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip
16440 23:00:25.312716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip>
16441 23:00:25.349890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip
16443 23:00:25.350339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip>
16444 23:00:25.386454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip
16446 23:00:25.386914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip>
16447 23:00:25.419012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1424 RESULT=pass
16449 23:00:25.419454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1424 RESULT=pass>
16450 23:00:25.451690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip>
16451 23:00:25.452153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip
16453 23:00:25.483801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip>
16454 23:00:25.484176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip
16456 23:00:25.515856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip>
16457 23:00:25.516318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip
16459 23:00:25.546696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1440 RESULT=pass>
16460 23:00:25.547086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1440 RESULT=pass
16462 23:00:25.578958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip
16464 23:00:25.579490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip>
16465 23:00:25.610939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip
16467 23:00:25.611487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip>
16468 23:00:25.643563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip
16470 23:00:25.644088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip>
16471 23:00:25.675634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1456 RESULT=pass>
16472 23:00:25.676088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1456 RESULT=pass
16474 23:00:25.707908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip>
16475 23:00:25.708309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip
16477 23:00:25.739295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip>
16478 23:00:25.739700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip
16480 23:00:25.771593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip>
16481 23:00:25.772024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip
16483 23:00:25.803393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1472 RESULT=pass>
16484 23:00:25.803773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1472 RESULT=pass
16486 23:00:25.834566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip>
16487 23:00:25.835016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip
16489 23:00:25.865912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip>
16490 23:00:25.866335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip
16492 23:00:25.900236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip>
16493 23:00:25.900743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip
16495 23:00:25.933713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1488 RESULT=pass
16497 23:00:25.934151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1488 RESULT=pass>
16498 23:00:25.965367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip>
16499 23:00:25.965826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip
16501 23:00:25.997372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip>
16502 23:00:25.997837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip
16504 23:00:26.029177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip>
16505 23:00:26.029621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip
16507 23:00:26.060542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1504 RESULT=pass
16509 23:00:26.060977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1504 RESULT=pass>
16510 23:00:26.092587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip>
16511 23:00:26.093046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip
16513 23:00:26.125361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip>
16514 23:00:26.125795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip
16516 23:00:26.157819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip
16518 23:00:26.158258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip>
16519 23:00:26.190866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1520 RESULT=pass
16521 23:00:26.191338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1520 RESULT=pass>
16522 23:00:26.223669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip>
16523 23:00:26.224070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip
16525 23:00:26.256784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip>
16526 23:00:26.257220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip
16528 23:00:26.289539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip>
16529 23:00:26.290014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip
16531 23:00:26.326222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1536 RESULT=pass>
16532 23:00:26.326728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1536 RESULT=pass
16534 23:00:26.359672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip>
16535 23:00:26.360088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip
16537 23:00:26.395952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip>
16538 23:00:26.396324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip
16540 23:00:26.429250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip>
16541 23:00:26.429671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip
16543 23:00:26.466166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1552 RESULT=pass>
16544 23:00:26.466656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1552 RESULT=pass
16546 23:00:26.497193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip>
16547 23:00:26.497662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip
16549 23:00:26.528457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip>
16550 23:00:26.528910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip
16552 23:00:26.560012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip>
16553 23:00:26.560417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip
16555 23:00:26.591643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1568 RESULT=pass
16557 23:00:26.592084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1568 RESULT=pass>
16558 23:00:26.622850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip
16560 23:00:26.623308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip>
16561 23:00:26.655379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip
16563 23:00:26.655812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip>
16564 23:00:26.686941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip>
16565 23:00:26.687389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip
16567 23:00:26.719355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1584 RESULT=pass
16569 23:00:26.719901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1584 RESULT=pass>
16570 23:00:26.750950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip
16572 23:00:26.751483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip>
16573 23:00:26.782896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip
16575 23:00:26.783449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip>
16576 23:00:26.815997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip>
16577 23:00:26.816532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip
16579 23:00:26.848913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1600 RESULT=pass>
16580 23:00:26.849438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1600 RESULT=pass
16582 23:00:26.882255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip>
16583 23:00:26.882676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip
16585 23:00:26.916375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip>
16586 23:00:26.916811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip
16588 23:00:26.950715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip
16590 23:00:26.951289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip>
16591 23:00:26.984888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1616 RESULT=pass>
16592 23:00:26.985324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1616 RESULT=pass
16594 23:00:27.018313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip
16596 23:00:27.018784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip>
16597 23:00:27.052204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip
16599 23:00:27.052760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip>
16600 23:00:27.085911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip>
16601 23:00:27.086364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip
16603 23:00:27.121485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1632 RESULT=pass>
16604 23:00:27.121932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1632 RESULT=pass
16606 23:00:27.156012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip
16608 23:00:27.156461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip>
16609 23:00:27.189772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip>
16610 23:00:27.190179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip
16612 23:00:27.224353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip>
16613 23:00:27.224762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip
16615 23:00:27.258363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1648 RESULT=pass
16617 23:00:27.258796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1648 RESULT=pass>
16618 23:00:27.292268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip>
16619 23:00:27.292702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip
16621 23:00:27.326282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip>
16622 23:00:27.326895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip
16624 23:00:27.361222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip>
16625 23:00:27.361710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip
16627 23:00:27.395797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1664 RESULT=pass
16629 23:00:27.396256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1664 RESULT=pass>
16630 23:00:27.430260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip>
16631 23:00:27.430697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip
16633 23:00:27.465251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip>
16634 23:00:27.465695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip
16636 23:00:27.499847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip
16638 23:00:27.500477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip>
16639 23:00:27.532963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1680 RESULT=pass>
16640 23:00:27.533442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1680 RESULT=pass
16642 23:00:27.566423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip>
16643 23:00:27.566896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip
16645 23:00:27.600137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip>
16646 23:00:27.600588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip
16648 23:00:27.633740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip>
16649 23:00:27.634208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip
16651 23:00:27.667608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1696 RESULT=pass>
16652 23:00:27.668176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1696 RESULT=pass
16654 23:00:27.700693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip
16656 23:00:27.701424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip>
16657 23:00:27.737147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip>
16658 23:00:27.737604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip
16660 23:00:27.772051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip>
16661 23:00:27.772489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip
16663 23:00:27.806376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1712 RESULT=pass>
16664 23:00:27.806813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1712 RESULT=pass
16666 23:00:27.841720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip
16668 23:00:27.842342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip>
16669 23:00:27.877164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip>
16670 23:00:27.877613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip
16672 23:00:27.913089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip
16674 23:00:27.913562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip>
16675 23:00:27.950375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1728 RESULT=pass>
16676 23:00:27.950910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1728 RESULT=pass
16678 23:00:27.987417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip>
16679 23:00:27.987834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip
16681 23:00:28.023638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip>
16682 23:00:28.024050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip
16684 23:00:28.058531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip>
16685 23:00:28.058974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip
16687 23:00:28.093168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1744 RESULT=pass
16689 23:00:28.093628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1744 RESULT=pass>
16690 23:00:28.127516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip>
16691 23:00:28.127914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip
16693 23:00:28.161270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip
16695 23:00:28.161735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip>
16696 23:00:28.198651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip
16698 23:00:28.199296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip>
16699 23:00:28.232691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1760 RESULT=pass
16701 23:00:28.233144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1760 RESULT=pass>
16702 23:00:28.266460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip>
16703 23:00:28.266883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip
16705 23:00:28.300853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip>
16706 23:00:28.301272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip
16708 23:00:28.334119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip>
16709 23:00:28.334534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip
16711 23:00:28.368719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1776 RESULT=pass>
16712 23:00:28.369135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1776 RESULT=pass
16714 23:00:28.402192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip>
16715 23:00:28.402620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip
16717 23:00:28.436650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip>
16718 23:00:28.437059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip
16720 23:00:28.470879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip
16722 23:00:28.471314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip>
16723 23:00:28.504683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1792 RESULT=pass
16725 23:00:28.505112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1792 RESULT=pass>
16726 23:00:28.539324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip>
16727 23:00:28.539722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip
16729 23:00:28.574012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip
16731 23:00:28.574459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip>
16732 23:00:28.608359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip>
16733 23:00:28.608786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip
16735 23:00:28.642719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1808 RESULT=pass
16737 23:00:28.643178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1808 RESULT=pass>
16738 23:00:28.676927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip
16740 23:00:28.677391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip>
16741 23:00:28.710908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip
16743 23:00:28.711380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip>
16744 23:00:28.745318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip>
16745 23:00:28.745784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip
16747 23:00:28.780120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1824 RESULT=pass
16749 23:00:28.780690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1824 RESULT=pass>
16750 23:00:28.814292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip
16752 23:00:28.814879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip>
16753 23:00:28.848295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip
16755 23:00:28.848777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip>
16756 23:00:28.882917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip
16758 23:00:28.883388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip>
16759 23:00:28.918430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1840 RESULT=pass
16761 23:00:28.918892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1840 RESULT=pass>
16762 23:00:28.952977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip>
16763 23:00:28.953467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip
16765 23:00:28.987252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip
16767 23:00:28.987895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip>
16768 23:00:29.021168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip
16770 23:00:29.021814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip>
16771 23:00:29.055797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1856 RESULT=pass
16773 23:00:29.056485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1856 RESULT=pass>
16774 23:00:29.089897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip>
16775 23:00:29.090375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip
16777 23:00:29.123905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip>
16778 23:00:29.124388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip
16780 23:00:29.157810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip
16782 23:00:29.158459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip>
16783 23:00:29.191916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1872 RESULT=pass
16785 23:00:29.192378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1872 RESULT=pass>
16786 23:00:29.225995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip>
16787 23:00:29.226430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip
16789 23:00:29.260610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip
16791 23:00:29.261081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip>
16792 23:00:29.295745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip
16794 23:00:29.296146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip>
16795 23:00:29.329723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1888 RESULT=pass>
16796 23:00:29.330152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1888 RESULT=pass
16798 23:00:29.364121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip
16800 23:00:29.364506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip>
16801 23:00:29.399634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip
16803 23:00:29.400015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip>
16804 23:00:29.433711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip
16806 23:00:29.434349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip>
16807 23:00:29.468656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1904 RESULT=pass
16809 23:00:29.469210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1904 RESULT=pass>
16810 23:00:29.502962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip
16812 23:00:29.503429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip>
16813 23:00:29.538509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip>
16814 23:00:29.539000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip
16816 23:00:29.572735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip
16818 23:00:29.573322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip>
16819 23:00:29.605849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1920 RESULT=pass
16821 23:00:29.606403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1920 RESULT=pass>
16822 23:00:29.639708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip>
16823 23:00:29.640188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip
16825 23:00:29.674101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip
16827 23:00:29.674532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip>
16828 23:00:29.708280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip
16830 23:00:29.708891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip>
16831 23:00:29.740762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1936 RESULT=pass
16833 23:00:29.741360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1936 RESULT=pass>
16834 23:00:29.772294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip
16836 23:00:29.772875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip>
16837 23:00:29.806324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip>
16838 23:00:29.806813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip
16840 23:00:29.837841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip>
16841 23:00:29.838305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip
16843 23:00:29.869250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1952 RESULT=pass>
16844 23:00:29.869700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1952 RESULT=pass
16846 23:00:29.901122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip>
16847 23:00:29.901589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip
16849 23:00:29.933115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip>
16850 23:00:29.933576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip
16852 23:00:29.965038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip>
16853 23:00:29.965448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip
16855 23:00:29.997363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1968 RESULT=pass>
16856 23:00:29.997747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1968 RESULT=pass
16858 23:00:30.028901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip>
16859 23:00:30.029340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip
16861 23:00:30.060656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip
16863 23:00:30.061115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip>
16864 23:00:30.093690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip
16866 23:00:30.094139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip>
16867 23:00:30.125544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1984 RESULT=pass
16869 23:00:30.126094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1984 RESULT=pass>
16870 23:00:30.157800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip
16872 23:00:30.158358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip>
16873 23:00:30.189719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip
16875 23:00:30.190255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip>
16876 23:00:30.221416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip
16878 23:00:30.221964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip>
16879 23:00:30.255282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2000 RESULT=pass>
16880 23:00:30.255719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2000 RESULT=pass
16882 23:00:30.287127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip
16884 23:00:30.287693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip>
16885 23:00:30.328749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip>
16886 23:00:30.329210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip
16888 23:00:30.371505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip>
16889 23:00:30.371945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip
16891 23:00:30.407479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2016 RESULT=pass>
16892 23:00:30.407923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2016 RESULT=pass
16894 23:00:30.442494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip
16896 23:00:30.442916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip>
16897 23:00:30.478078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip
16899 23:00:30.478716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip>
16900 23:00:30.514536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip
16902 23:00:30.515174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip>
16903 23:00:30.551481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2032 RESULT=pass>
16904 23:00:30.551958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2032 RESULT=pass
16906 23:00:30.588169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip>
16907 23:00:30.588606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip
16909 23:00:30.624122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip
16911 23:00:30.624572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip>
16912 23:00:30.660235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip
16914 23:00:30.660698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip>
16915 23:00:30.695508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2048 RESULT=pass>
16916 23:00:30.695945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2048 RESULT=pass
16918 23:00:30.731033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip
16920 23:00:30.731652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip>
16921 23:00:30.766864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip
16923 23:00:30.767279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip>
16924 23:00:30.802534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip
16926 23:00:30.803005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip>
16927 23:00:30.837510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2064 RESULT=pass>
16928 23:00:30.837961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2064 RESULT=pass
16930 23:00:30.872563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip>
16931 23:00:30.873046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip
16933 23:00:30.908463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip>
16934 23:00:30.908938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip
16936 23:00:30.944041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip>
16937 23:00:30.944514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip
16939 23:00:30.979625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2080 RESULT=pass>
16940 23:00:30.980011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2080 RESULT=pass
16942 23:00:31.014646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip
16944 23:00:31.015247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip>
16945 23:00:31.050003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip>
16946 23:00:31.050462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip
16948 23:00:31.085172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip>
16949 23:00:31.085611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip
16951 23:00:31.120407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2096 RESULT=pass
16953 23:00:31.120841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2096 RESULT=pass>
16954 23:00:31.155658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip
16956 23:00:31.156076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip>
16957 23:00:31.190525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip>
16958 23:00:31.190923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip
16960 23:00:31.225971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip
16962 23:00:31.226386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip>
16963 23:00:31.260340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2112 RESULT=pass>
16964 23:00:31.260747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2112 RESULT=pass
16966 23:00:31.296247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip
16968 23:00:31.296822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip>
16969 23:00:31.333404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip>
16970 23:00:31.333813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip
16972 23:00:31.372176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip>
16973 23:00:31.372570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip
16975 23:00:31.419534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2128 RESULT=pass>
16976 23:00:31.419961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2128 RESULT=pass
16978 23:00:31.459510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip>
16979 23:00:31.460004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip
16981 23:00:31.494910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip
16983 23:00:31.495473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip>
16984 23:00:31.531721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip
16986 23:00:31.532182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip>
16987 23:00:31.567492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2144 RESULT=pass>
16988 23:00:31.567884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2144 RESULT=pass
16990 23:00:31.604160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip
16992 23:00:31.604633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip>
16993 23:00:31.639856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip>
16994 23:00:31.640201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip
16996 23:00:31.675515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip>
16997 23:00:31.675858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip
16999 23:00:31.711924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2160 RESULT=pass>
17000 23:00:31.712276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2160 RESULT=pass
17002 23:00:31.749509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip>
17003 23:00:31.749867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip
17005 23:00:31.787880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip
17007 23:00:31.788312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip>
17008 23:00:31.825558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip>
17009 23:00:31.825924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip
17011 23:00:31.863577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2176 RESULT=pass>
17012 23:00:31.863863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2176 RESULT=pass
17014 23:00:31.900729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip>
17015 23:00:31.901176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip
17017 23:00:31.938448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip
17019 23:00:31.938950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip>
17020 23:00:31.975853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip
17022 23:00:31.976304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip>
17023 23:00:32.012286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2192 RESULT=pass
17025 23:00:32.012819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2192 RESULT=pass>
17026 23:00:32.049361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip
17028 23:00:32.049751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip>
17029 23:00:32.086610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip>
17030 23:00:32.087031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip
17032 23:00:32.123450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip>
17033 23:00:32.123876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip
17035 23:00:32.158656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2208 RESULT=pass>
17036 23:00:32.159083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2208 RESULT=pass
17038 23:00:32.193330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip>
17039 23:00:32.193775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip
17041 23:00:32.228857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip>
17042 23:00:32.229275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip
17044 23:00:32.264666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip>
17045 23:00:32.265075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip
17047 23:00:32.300803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2224 RESULT=pass
17049 23:00:32.301246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2224 RESULT=pass>
17050 23:00:32.336342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip
17052 23:00:32.336786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip>
17053 23:00:32.371948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip>
17054 23:00:32.372422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip
17056 23:00:32.407816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip>
17057 23:00:32.408193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip
17059 23:00:32.443465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2240 RESULT=pass
17061 23:00:32.443834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2240 RESULT=pass>
17062 23:00:32.479318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip
17064 23:00:32.479828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip>
17065 23:00:32.515448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip
17067 23:00:32.515900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip>
17068 23:00:32.551746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip
17070 23:00:32.552283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip>
17071 23:00:32.588514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2256 RESULT=pass
17073 23:00:32.589027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2256 RESULT=pass>
17074 23:00:32.624970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip
17076 23:00:32.625440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip>
17077 23:00:32.661067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip>
17078 23:00:32.661381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip
17080 23:00:32.696995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip>
17081 23:00:32.697312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip
17083 23:00:32.732746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2272 RESULT=pass>
17084 23:00:32.733047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2272 RESULT=pass
17086 23:00:32.769378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip>
17087 23:00:32.769676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip
17089 23:00:32.805272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip>
17090 23:00:32.805756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip
17092 23:00:32.841929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip
17094 23:00:32.842439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip>
17095 23:00:32.877640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2288 RESULT=pass>
17096 23:00:32.878121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2288 RESULT=pass
17098 23:00:32.914322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip
17100 23:00:32.914942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip>
17101 23:00:32.951220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip>
17102 23:00:32.951640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip
17104 23:00:32.991441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip>
17105 23:00:32.991824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip
17107 23:00:33.030574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2304 RESULT=pass>
17108 23:00:33.031035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2304 RESULT=pass
17110 23:00:33.069983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip
17112 23:00:33.070497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip>
17113 23:00:33.109988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip>
17114 23:00:33.110357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip
17116 23:00:33.148553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip>
17117 23:00:33.148954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip
17119 23:00:33.184649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2320 RESULT=pass
17121 23:00:33.185118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2320 RESULT=pass>
17122 23:00:33.221039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip>
17123 23:00:33.221486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip
17125 23:00:33.259787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip>
17126 23:00:33.260198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip
17128 23:00:33.296107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip>
17129 23:00:33.296532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip
17131 23:00:33.332258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2336 RESULT=pass
17133 23:00:33.332723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2336 RESULT=pass>
17134 23:00:33.368024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip
17136 23:00:33.368563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip>
17137 23:00:33.407249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip>
17138 23:00:33.407614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip
17140 23:00:33.446155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip
17142 23:00:33.446684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip>
17143 23:00:33.485944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2352 RESULT=pass
17145 23:00:33.486473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2352 RESULT=pass>
17146 23:00:33.525307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip>
17147 23:00:33.525688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip
17149 23:00:33.564766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip>
17150 23:00:33.565187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip
17152 23:00:33.604356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip
17154 23:00:33.604807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip>
17155 23:00:33.643644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2368 RESULT=pass>
17156 23:00:33.644065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2368 RESULT=pass
17158 23:00:33.683069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip
17160 23:00:33.683630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip>
17161 23:00:33.721507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip>
17162 23:00:33.721916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip
17164 23:00:33.758826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip
17166 23:00:33.759217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip>
17167 23:00:33.795788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2384 RESULT=pass
17169 23:00:33.796169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2384 RESULT=pass>
17170 23:00:33.832197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip>
17171 23:00:33.832575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip
17173 23:00:33.867461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip
17175 23:00:33.867958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip>
17176 23:00:33.902442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip>
17177 23:00:33.902803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip
17179 23:00:33.937632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2400 RESULT=pass
17181 23:00:33.938165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2400 RESULT=pass>
17182 23:00:33.972709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip>
17183 23:00:33.973127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip
17185 23:00:34.008525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip>
17186 23:00:34.008955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip
17188 23:00:34.044266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip>
17189 23:00:34.044686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip
17191 23:00:34.080434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2416 RESULT=pass
17193 23:00:34.080912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2416 RESULT=pass>
17194 23:00:34.115946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip>
17195 23:00:34.116419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip
17197 23:00:34.151813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip
17199 23:00:34.152377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip>
17200 23:00:34.198809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip
17202 23:00:34.199575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip>
17203 23:00:34.235907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2432 RESULT=pass>
17204 23:00:34.236459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2432 RESULT=pass
17206 23:00:34.273009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip>
17207 23:00:34.273515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip
17209 23:00:34.306716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip
17211 23:00:34.307196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip>
17212 23:00:34.340330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip>
17213 23:00:34.340754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip
17215 23:00:34.373148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2448 RESULT=pass>
17216 23:00:34.373586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2448 RESULT=pass
17218 23:00:34.405450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip>
17219 23:00:34.405882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip
17221 23:00:34.437659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip
17223 23:00:34.438308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip>
17224 23:00:34.469249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip
17226 23:00:34.469841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip>
17227 23:00:34.500504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2464 RESULT=pass>
17228 23:00:34.500912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2464 RESULT=pass
17230 23:00:34.532089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip>
17231 23:00:34.532524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip
17233 23:00:34.563737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip
17235 23:00:34.564289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip>
17236 23:00:34.595655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip>
17237 23:00:34.596152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip
17239 23:00:34.628433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2480 RESULT=pass
17241 23:00:34.629008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2480 RESULT=pass>
17242 23:00:34.660345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip>
17243 23:00:34.660836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip
17245 23:00:34.695658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip
17247 23:00:34.696210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip>
17248 23:00:34.730956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip
17250 23:00:34.731586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip>
17251 23:00:34.765854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2496 RESULT=pass>
17252 23:00:34.766324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2496 RESULT=pass
17254 23:00:34.799935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip
17256 23:00:34.800495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip>
17257 23:00:34.832459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip>
17258 23:00:34.832866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip
17260 23:00:34.865512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip>
17261 23:00:34.865922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip
17263 23:00:34.898355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2512 RESULT=pass>
17264 23:00:34.898785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2512 RESULT=pass
17266 23:00:34.931095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip>
17267 23:00:34.931512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip
17269 23:00:34.963809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip>
17270 23:00:34.964216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip
17272 23:00:34.995649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip>
17273 23:00:34.996073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip
17275 23:00:35.027904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2528 RESULT=pass>
17276 23:00:35.028353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2528 RESULT=pass
17278 23:00:35.060345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip>
17279 23:00:35.060807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip
17281 23:00:35.092390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip>
17282 23:00:35.092814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip
17284 23:00:35.124643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip>
17285 23:00:35.125101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip
17287 23:00:35.156898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2544 RESULT=pass>
17288 23:00:35.157367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2544 RESULT=pass
17290 23:00:35.189478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip>
17291 23:00:35.189934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip
17293 23:00:35.221704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip
17295 23:00:35.222158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip>
17296 23:00:35.259424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip
17298 23:00:35.259893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip>
17299 23:00:35.297132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2560 RESULT=pass>
17300 23:00:35.297555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2560 RESULT=pass
17302 23:00:35.333804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip
17304 23:00:35.334245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip>
17305 23:00:35.370881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip
17307 23:00:35.371334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip>
17308 23:00:35.408134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip
17310 23:00:35.408602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip>
17311 23:00:35.442201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2576 RESULT=pass>
17312 23:00:35.442686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2576 RESULT=pass
17314 23:00:35.475863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip>
17315 23:00:35.476319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip
17317 23:00:35.507848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip
17319 23:00:35.508406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip>
17320 23:00:35.540997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip
17322 23:00:35.541445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip>
17323 23:00:35.573008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2592 RESULT=pass>
17324 23:00:35.573426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2592 RESULT=pass
17326 23:00:35.605555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip>
17327 23:00:35.605963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip
17329 23:00:35.637244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip>
17330 23:00:35.637681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip
17332 23:00:35.670214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip>
17333 23:00:35.670643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip
17335 23:00:35.703053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2608 RESULT=pass
17337 23:00:35.703699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2608 RESULT=pass>
17338 23:00:35.736072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip
17340 23:00:35.736688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip>
17341 23:00:35.768074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip>
17342 23:00:35.768525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip
17344 23:00:35.800826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip>
17345 23:00:35.801264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip
17347 23:00:35.833414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2624 RESULT=pass>
17348 23:00:35.833892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2624 RESULT=pass
17350 23:00:35.865969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip
17352 23:00:35.866380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip>
17353 23:00:35.898366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip
17355 23:00:35.898825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip>
17356 23:00:35.936350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip
17358 23:00:35.936844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip>
17359 23:00:35.968812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2640 RESULT=pass>
17360 23:00:35.969243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2640 RESULT=pass
17362 23:00:36.000302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip>
17363 23:00:36.000798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip
17365 23:00:36.033132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip>
17366 23:00:36.033539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip
17368 23:00:36.067961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip
17370 23:00:36.068374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip>
17371 23:00:36.101239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2656 RESULT=pass>
17372 23:00:36.101716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2656 RESULT=pass
17374 23:00:36.135590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip>
17375 23:00:36.136082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip
17377 23:00:36.170893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip
17379 23:00:36.171342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip>
17380 23:00:36.204052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip
17382 23:00:36.204599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip>
17383 23:00:36.236578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2672 RESULT=pass>
17384 23:00:36.237050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2672 RESULT=pass
17386 23:00:36.269416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip>
17387 23:00:36.269894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip
17389 23:00:36.302083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip
17391 23:00:36.302716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip>
17392 23:00:36.335035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip
17394 23:00:36.335745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip>
17395 23:00:36.368430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2688 RESULT=pass>
17396 23:00:36.368910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2688 RESULT=pass
17398 23:00:36.400667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip
17400 23:00:36.401223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip>
17401 23:00:36.435180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip>
17402 23:00:36.435608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip
17404 23:00:36.468108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip
17406 23:00:36.468573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip>
17407 23:00:36.500856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2704 RESULT=pass
17409 23:00:36.501265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2704 RESULT=pass>
17410 23:00:36.533249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip>
17411 23:00:36.533638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip
17413 23:00:36.566492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip
17415 23:00:36.566884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip>
17416 23:00:36.598487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip>
17417 23:00:36.598940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip
17419 23:00:36.631860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2720 RESULT=pass
17421 23:00:36.632418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2720 RESULT=pass>
17422 23:00:36.664184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip
17424 23:00:36.664744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip>
17425 23:00:36.697725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip>
17426 23:00:36.698191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip
17428 23:00:36.730362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip
17430 23:00:36.730924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip>
17431 23:00:36.763579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2736 RESULT=pass>
17432 23:00:36.764132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2736 RESULT=pass
17434 23:00:36.798219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip>
17435 23:00:36.798670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip
17437 23:00:36.832000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip
17439 23:00:36.832599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip>
17440 23:00:36.865162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip
17442 23:00:36.865626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip>
17443 23:00:36.899298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2752 RESULT=pass
17445 23:00:36.899755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2752 RESULT=pass>
17446 23:00:36.931717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip>
17447 23:00:36.932070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip
17449 23:00:36.965962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip>
17450 23:00:36.966407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip
17452 23:00:36.999774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip>
17453 23:00:37.000224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip
17455 23:00:37.032562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2768 RESULT=pass
17457 23:00:37.033097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2768 RESULT=pass>
17458 23:00:37.064472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip>
17459 23:00:37.064919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip
17461 23:00:37.097096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip>
17462 23:00:37.097543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip
17464 23:00:37.129211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip
17466 23:00:37.129776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip>
17467 23:00:37.161051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2784 RESULT=pass
17469 23:00:37.161584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2784 RESULT=pass>
17470 23:00:37.193137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip>
17471 23:00:37.193589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip
17473 23:00:37.225783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip
17475 23:00:37.226337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip>
17476 23:00:37.258103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip>
17477 23:00:37.258487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip
17479 23:00:37.290467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2800 RESULT=pass
17481 23:00:37.290904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2800 RESULT=pass>
17482 23:00:37.322238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip
17484 23:00:37.322772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip>
17485 23:00:37.354930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip
17487 23:00:37.355502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip>
17488 23:00:37.387353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip
17490 23:00:37.387879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip>
17491 23:00:37.419629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2816 RESULT=pass
17493 23:00:37.420190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2816 RESULT=pass>
17494 23:00:37.451868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip>
17495 23:00:37.452315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip
17497 23:00:37.484620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip>
17498 23:00:37.485075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip
17500 23:00:37.516859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip>
17501 23:00:37.517314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip
17503 23:00:37.548487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2832 RESULT=pass>
17504 23:00:37.548966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2832 RESULT=pass
17506 23:00:37.580538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip
17508 23:00:37.581159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip>
17509 23:00:37.612519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip
17511 23:00:37.612974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip>
17512 23:00:37.644447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip
17514 23:00:37.645001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip>
17515 23:00:37.676765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2848 RESULT=pass
17517 23:00:37.677323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2848 RESULT=pass>
17518 23:00:37.709116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip>
17519 23:00:37.709566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip
17521 23:00:37.741125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip
17523 23:00:37.741678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip>
17524 23:00:37.773457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip>
17525 23:00:37.773903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip
17527 23:00:37.806206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2864 RESULT=pass
17529 23:00:37.806777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2864 RESULT=pass>
17530 23:00:37.837722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip
17532 23:00:37.838263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip>
17533 23:00:37.869213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip>
17534 23:00:37.869680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip
17536 23:00:37.901711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip
17538 23:00:37.902282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip>
17539 23:00:37.933063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2880 RESULT=pass>
17540 23:00:37.933620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2880 RESULT=pass
17542 23:00:37.965705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip
17544 23:00:37.966245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip>
17545 23:00:37.997287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip>
17546 23:00:37.997700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip
17548 23:00:38.029358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip>
17549 23:00:38.029780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip
17551 23:00:38.063196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2896 RESULT=pass>
17552 23:00:38.063634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2896 RESULT=pass
17554 23:00:38.094742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip
17556 23:00:38.095203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip>
17557 23:00:38.126499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip>
17558 23:00:38.126981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip
17560 23:00:38.160029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip
17562 23:00:38.160612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip>
17563 23:00:38.190439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2912 RESULT=pass>
17564 23:00:38.190896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2912 RESULT=pass
17566 23:00:38.221554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip
17568 23:00:38.222141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip>
17569 23:00:38.255504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip>
17570 23:00:38.255960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip
17572 23:00:38.288190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip>
17573 23:00:38.288668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip
17575 23:00:38.322619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2928 RESULT=pass
17577 23:00:38.323201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2928 RESULT=pass>
17578 23:00:38.355338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip>
17579 23:00:38.355764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip
17581 23:00:38.388168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip
17583 23:00:38.388622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip>
17584 23:00:38.425419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip>
17585 23:00:38.425790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip
17587 23:00:38.456586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2944 RESULT=pass
17589 23:00:38.457123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2944 RESULT=pass>
17590 23:00:38.488101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip>
17591 23:00:38.488553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip
17593 23:00:38.520118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip>
17594 23:00:38.520556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip
17596 23:00:38.551877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip
17598 23:00:38.552408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip>
17599 23:00:38.584475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2960 RESULT=pass
17601 23:00:38.585042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2960 RESULT=pass>
17602 23:00:38.617611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip
17604 23:00:38.618164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip>
17605 23:00:38.649397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip>
17606 23:00:38.649862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip
17608 23:00:38.681108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip
17610 23:00:38.681641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip>
17611 23:00:38.712044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2976 RESULT=pass>
17612 23:00:38.712491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2976 RESULT=pass
17614 23:00:38.743719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip
17616 23:00:38.744255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip>
17617 23:00:38.776269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip
17619 23:00:38.776812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip>
17620 23:00:38.809199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip
17622 23:00:38.809769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip>
17623 23:00:38.841215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2992 RESULT=pass
17625 23:00:38.841777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2992 RESULT=pass>
17626 23:00:38.873682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip
17628 23:00:38.874217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip>
17629 23:00:38.905860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip
17631 23:00:38.906397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip>
17632 23:00:38.938252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip
17634 23:00:38.938788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip>
17635 23:00:38.971838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3008 RESULT=pass>
17636 23:00:38.972292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3008 RESULT=pass
17638 23:00:39.003712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip>
17639 23:00:39.004155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip
17641 23:00:39.035758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip>
17642 23:00:39.036212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip
17644 23:00:39.067816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip
17646 23:00:39.068343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip>
17647 23:00:39.099685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3024 RESULT=pass>
17648 23:00:39.100142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3024 RESULT=pass
17650 23:00:39.131476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip>
17651 23:00:39.131965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip
17653 23:00:39.163550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip>
17654 23:00:39.164021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip
17656 23:00:39.194590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip
17658 23:00:39.195157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip>
17659 23:00:39.225226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3040 RESULT=pass>
17660 23:00:39.225696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3040 RESULT=pass
17662 23:00:39.256571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip>
17663 23:00:39.257042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip
17665 23:00:39.288044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip
17667 23:00:39.288602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip>
17668 23:00:39.321328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip
17670 23:00:39.322023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip>
17671 23:00:39.354085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3056 RESULT=pass
17673 23:00:39.354650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3056 RESULT=pass>
17674 23:00:39.386264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip>
17675 23:00:39.386762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip
17677 23:00:39.418401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip>
17678 23:00:39.418880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip
17680 23:00:39.451215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip>
17681 23:00:39.451658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip
17683 23:00:39.482186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3072 RESULT=pass>
17684 23:00:39.482660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3072 RESULT=pass
17686 23:00:39.515668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip>
17687 23:00:39.516121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip
17689 23:00:39.548035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip
17691 23:00:39.548557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip>
17692 23:00:39.579602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip
17694 23:00:39.580056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip>
17695 23:00:39.611364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3088 RESULT=pass
17697 23:00:39.611885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3088 RESULT=pass>
17698 23:00:39.643389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip>
17699 23:00:39.643819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip
17701 23:00:39.675356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip>
17702 23:00:39.675769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip
17704 23:00:39.707520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip>
17705 23:00:39.707927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip
17707 23:00:39.738198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3104 RESULT=pass>
17708 23:00:39.738627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3104 RESULT=pass
17710 23:00:39.768699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip>
17711 23:00:39.769167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip
17713 23:00:39.800065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip>
17714 23:00:39.800460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip
17716 23:00:39.831311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip
17718 23:00:39.831740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip>
17719 23:00:39.863452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3120 RESULT=pass>
17720 23:00:39.863941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3120 RESULT=pass
17722 23:00:39.899814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip
17724 23:00:39.900280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip>
17725 23:00:39.936139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip
17727 23:00:39.936778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip>
17728 23:00:39.968632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip
17730 23:00:39.969259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip>
17731 23:00:40.000244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3136 RESULT=pass
17733 23:00:40.000698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3136 RESULT=pass>
17734 23:00:40.031795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip>
17735 23:00:40.032258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip
17737 23:00:40.063780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip
17739 23:00:40.064402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip>
17740 23:00:40.095478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip>
17741 23:00:40.095939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip
17743 23:00:40.127669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3152 RESULT=pass
17745 23:00:40.128241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3152 RESULT=pass>
17746 23:00:40.159274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip
17748 23:00:40.159730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip>
17749 23:00:40.190907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip
17751 23:00:40.191359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip>
17752 23:00:40.224647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip
17754 23:00:40.225225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip>
17755 23:00:40.257796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3168 RESULT=pass>
17756 23:00:40.258267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3168 RESULT=pass
17758 23:00:40.290379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip>
17759 23:00:40.290863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip
17761 23:00:40.323698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip>
17762 23:00:40.324185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip
17764 23:00:40.356114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip>
17765 23:00:40.356566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip
17767 23:00:40.389285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3184 RESULT=pass>
17768 23:00:40.389692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3184 RESULT=pass
17770 23:00:40.422650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip
17772 23:00:40.423206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip>
17773 23:00:40.455016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip>
17774 23:00:40.455493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip
17776 23:00:40.487385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip>
17777 23:00:40.487860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip
17779 23:00:40.519733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3200 RESULT=pass
17781 23:00:40.520295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3200 RESULT=pass>
17782 23:00:40.551627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip>
17783 23:00:40.552079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip
17785 23:00:40.584624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip
17787 23:00:40.585155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip>
17788 23:00:40.617387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip>
17789 23:00:40.617880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip
17791 23:00:40.649541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3216 RESULT=pass>
17792 23:00:40.650039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3216 RESULT=pass
17794 23:00:40.681428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip>
17795 23:00:40.681960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip
17797 23:00:40.713253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip>
17798 23:00:40.713628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip
17800 23:00:40.745517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip>
17801 23:00:40.745983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip
17803 23:00:40.777078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3232 RESULT=pass
17805 23:00:40.777696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3232 RESULT=pass>
17806 23:00:40.808152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip
17808 23:00:40.808813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip>
17809 23:00:40.839206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip>
17810 23:00:40.839680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip
17812 23:00:40.870948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip
17814 23:00:40.871494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip>
17815 23:00:40.908615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3248 RESULT=pass>
17816 23:00:40.909070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3248 RESULT=pass
17818 23:00:40.942671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip
17820 23:00:40.943226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip>
17821 23:00:40.974149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip>
17822 23:00:40.974536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip
17824 23:00:41.005618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip>
17825 23:00:41.006027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip
17827 23:00:41.036575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3264 RESULT=pass>
17828 23:00:41.036974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3264 RESULT=pass
17830 23:00:41.068505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip
17832 23:00:41.068919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip>
17833 23:00:41.102685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip
17835 23:00:41.103250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip>
17836 23:00:41.135170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip
17838 23:00:41.135762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip>
17839 23:00:41.167493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3280 RESULT=pass>
17840 23:00:41.167967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3280 RESULT=pass
17842 23:00:41.199889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip
17844 23:00:41.200496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip>
17845 23:00:41.232538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip
17847 23:00:41.233085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip>
17848 23:00:41.264061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip>
17849 23:00:41.264495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip
17851 23:00:41.297663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3296 RESULT=pass
17853 23:00:41.298223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3296 RESULT=pass>
17854 23:00:41.329190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip>
17855 23:00:41.329599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip
17857 23:00:41.363033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip
17859 23:00:41.363572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip>
17860 23:00:41.394752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip
17862 23:00:41.395292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip>
17863 23:00:41.427961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3312 RESULT=pass
17865 23:00:41.428572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3312 RESULT=pass>
17866 23:00:41.464361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip
17868 23:00:41.464954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip>
17869 23:00:41.499860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip
17871 23:00:41.500410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip>
17872 23:00:41.531831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip>
17873 23:00:41.532286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip
17875 23:00:41.563118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3328 RESULT=pass>
17876 23:00:41.563548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3328 RESULT=pass
17878 23:00:41.595427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip>
17879 23:00:41.595942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip
17881 23:00:41.629329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip>
17882 23:00:41.629681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip
17884 23:00:41.661674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip>
17885 23:00:41.662091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip
17887 23:00:41.693633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3344 RESULT=pass>
17888 23:00:41.694111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3344 RESULT=pass
17890 23:00:41.725564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip>
17891 23:00:41.726039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip
17893 23:00:41.757283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip
17895 23:00:41.757876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip>
17896 23:00:41.788992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip>
17897 23:00:41.789472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip
17899 23:00:41.822460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3360 RESULT=pass
17901 23:00:41.823126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3360 RESULT=pass>
17902 23:00:41.855430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip>
17903 23:00:41.855916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip
17905 23:00:41.886749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip
17907 23:00:41.887314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip>
17908 23:00:41.918156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip>
17909 23:00:41.918619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip
17911 23:00:41.949938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3376 RESULT=pass>
17912 23:00:41.950402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3376 RESULT=pass
17914 23:00:41.982121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip>
17915 23:00:41.982574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip
17917 23:00:42.015861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip
17919 23:00:42.016436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip>
17920 23:00:42.048007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip>
17921 23:00:42.048450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip
17923 23:00:42.079822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3392 RESULT=pass>
17924 23:00:42.080295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3392 RESULT=pass
17926 23:00:42.111776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip
17928 23:00:42.112295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip>
17929 23:00:42.143307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip>
17930 23:00:42.143740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip
17932 23:00:42.176329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip
17934 23:00:42.176871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip>
17935 23:00:42.208120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3408 RESULT=pass
17937 23:00:42.208645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3408 RESULT=pass>
17938 23:00:42.238986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip
17940 23:00:42.239506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip>
17941 23:00:42.270453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip>
17942 23:00:42.270877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip
17944 23:00:42.302022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip
17946 23:00:42.302540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip>
17947 23:00:42.333209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3424 RESULT=pass>
17948 23:00:42.333644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3424 RESULT=pass
17950 23:00:42.366454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip
17952 23:00:42.367084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip>
17953 23:00:42.397710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip>
17954 23:00:42.398164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip
17956 23:00:42.429090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip>
17957 23:00:42.429486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip
17959 23:00:42.460426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3440 RESULT=pass
17961 23:00:42.460858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3440 RESULT=pass>
17962 23:00:42.491759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip>
17963 23:00:42.492148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip
17965 23:00:42.523928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip
17967 23:00:42.524372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip>
17968 23:00:42.556309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip>
17969 23:00:42.556704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip
17971 23:00:42.587541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3456 RESULT=pass>
17972 23:00:42.587998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3456 RESULT=pass
17974 23:00:42.618467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip
17976 23:00:42.619069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip>
17977 23:00:42.650401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip
17979 23:00:42.651023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip>
17980 23:00:42.681900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip>
17981 23:00:42.682335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip
17983 23:00:42.714863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3472 RESULT=pass
17985 23:00:42.715468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3472 RESULT=pass>
17986 23:00:42.745640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip>
17987 23:00:42.746084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip
17989 23:00:42.776245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip
17991 23:00:42.776797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip>
17992 23:00:42.807598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip
17994 23:00:42.808154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip>
17995 23:00:42.838011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3488 RESULT=pass
17997 23:00:42.838583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3488 RESULT=pass>
17998 23:00:42.868584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip>
17999 23:00:42.869041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip
18001 23:00:42.901089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip
18003 23:00:42.901729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip>
18004 23:00:42.932054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip>
18005 23:00:42.932499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip
18007 23:00:42.963593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3504 RESULT=pass
18009 23:00:42.964118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3504 RESULT=pass>
18010 23:00:42.994237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip>
18011 23:00:42.994633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip
18013 23:00:43.026127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip>
18014 23:00:43.026577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip
18016 23:00:43.060558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip>
18017 23:00:43.060973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip
18019 23:00:43.093125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3520 RESULT=pass
18021 23:00:43.093775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3520 RESULT=pass>
18022 23:00:43.124749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip
18024 23:00:43.125294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip>
18025 23:00:43.156661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip>
18026 23:00:43.157094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip
18028 23:00:43.188157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip>
18029 23:00:43.188563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip
18031 23:00:43.219854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3536 RESULT=pass
18033 23:00:43.220394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3536 RESULT=pass>
18034 23:00:43.251945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip
18036 23:00:43.252576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip>
18037 23:00:43.282507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip>
18038 23:00:43.282908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip
18040 23:00:43.314198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip
18042 23:00:43.314623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip>
18043 23:00:43.345399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3552 RESULT=pass>
18044 23:00:43.345799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3552 RESULT=pass
18046 23:00:43.376666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip
18048 23:00:43.377083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip>
18049 23:00:43.408164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip
18051 23:00:43.408652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip>
18052 23:00:43.440009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip>
18053 23:00:43.440412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip
18055 23:00:43.472065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3568 RESULT=pass>
18056 23:00:43.472476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3568 RESULT=pass
18058 23:00:43.503360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip>
18059 23:00:43.503762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip
18061 23:00:43.534402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip
18063 23:00:43.534833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip>
18064 23:00:43.565529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip
18066 23:00:43.566073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip>
18067 23:00:43.596987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3584 RESULT=pass>
18068 23:00:43.597443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3584 RESULT=pass
18070 23:00:43.629914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip
18072 23:00:43.630462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip>
18073 23:00:43.661787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip
18075 23:00:43.662341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip>
18076 23:00:43.693093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip>
18077 23:00:43.693512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip
18079 23:00:43.723746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3600 RESULT=pass>
18080 23:00:43.724173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3600 RESULT=pass
18082 23:00:43.755644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip
18084 23:00:43.756112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip>
18085 23:00:43.788078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip
18087 23:00:43.788540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip>
18088 23:00:43.819158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip
18090 23:00:43.819704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip>
18091 23:00:43.849362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3616 RESULT=pass
18093 23:00:43.849925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3616 RESULT=pass>
18094 23:00:43.879653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip>
18095 23:00:43.880106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip
18097 23:00:43.910040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip>
18098 23:00:43.910437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip
18100 23:00:43.941272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip>
18101 23:00:43.941689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip
18103 23:00:43.974108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3632 RESULT=pass
18105 23:00:43.974712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3632 RESULT=pass>
18106 23:00:44.005073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip>
18107 23:00:44.005506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip
18109 23:00:44.036395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip>
18110 23:00:44.036783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip
18112 23:00:44.067261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip>
18113 23:00:44.067662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip
18115 23:00:44.098610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3648 RESULT=pass
18117 23:00:44.099235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3648 RESULT=pass>
18118 23:00:44.131168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip
18120 23:00:44.131764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip>
18121 23:00:44.163756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip>
18122 23:00:44.164193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip
18124 23:00:44.195575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip>
18125 23:00:44.196045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip
18127 23:00:44.227703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3664 RESULT=pass
18129 23:00:44.228239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3664 RESULT=pass>
18130 23:00:44.259329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip
18132 23:00:44.259869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip>
18133 23:00:44.290614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip
18135 23:00:44.291142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip>
18136 23:00:44.323289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip>
18137 23:00:44.323758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip
18139 23:00:44.355390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3680 RESULT=pass
18141 23:00:44.355954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3680 RESULT=pass>
18142 23:00:44.386651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip
18144 23:00:44.387210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip>
18145 23:00:44.418186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip
18147 23:00:44.418748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip>
18148 23:00:44.449523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip>
18149 23:00:44.449977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip
18151 23:00:44.482468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3696 RESULT=pass
18153 23:00:44.483000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3696 RESULT=pass>
18154 23:00:44.516440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip>
18155 23:00:44.516905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip
18157 23:00:44.547912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip
18159 23:00:44.548525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip>
18160 23:00:44.579476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip
18162 23:00:44.579997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip>
18163 23:00:44.610237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3712 RESULT=pass
18165 23:00:44.610767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3712 RESULT=pass>
18166 23:00:44.642364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip>
18167 23:00:44.642777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip
18169 23:00:44.679478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip
18171 23:00:44.679915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip>
18172 23:00:44.711080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip>
18173 23:00:44.711491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip
18175 23:00:44.742404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3728 RESULT=pass>
18176 23:00:44.742817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3728 RESULT=pass
18178 23:00:44.773814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip
18180 23:00:44.774252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip>
18181 23:00:44.806256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip>
18182 23:00:44.806684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip
18184 23:00:44.839743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip>
18185 23:00:44.840163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip
18187 23:00:44.871503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3744 RESULT=pass>
18188 23:00:44.871925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3744 RESULT=pass
18190 23:00:44.904098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip>
18191 23:00:44.904527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip
18193 23:00:44.937040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip
18195 23:00:44.937500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip>
18196 23:00:44.969386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip
18198 23:00:44.969840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip>
18199 23:00:45.002590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3760 RESULT=pass>
18200 23:00:45.003066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3760 RESULT=pass
18202 23:00:45.036220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip
18204 23:00:45.036843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip>
18205 23:00:45.067799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip>
18206 23:00:45.068271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip
18208 23:00:45.099045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip
18210 23:00:45.099597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip>
18211 23:00:45.129832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3776 RESULT=pass>
18212 23:00:45.130309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3776 RESULT=pass
18214 23:00:45.160243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip>
18215 23:00:45.160724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip
18217 23:00:45.195050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip
18219 23:00:45.195614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip>
18220 23:00:45.230256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip>
18221 23:00:45.230738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip
18223 23:00:45.262888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3792 RESULT=pass
18225 23:00:45.263445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3792 RESULT=pass>
18226 23:00:45.294346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip
18228 23:00:45.294883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip>
18229 23:00:45.325587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip
18231 23:00:45.326147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip>
18232 23:00:45.357817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip
18234 23:00:45.358367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip>
18235 23:00:45.390540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3808 RESULT=pass
18237 23:00:45.390981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3808 RESULT=pass>
18238 23:00:45.423015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip
18240 23:00:45.423381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip>
18241 23:00:45.454815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip
18243 23:00:45.455337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip>
18244 23:00:45.485561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip>
18245 23:00:45.485989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip
18247 23:00:45.516780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3824 RESULT=pass
18249 23:00:45.517286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3824 RESULT=pass>
18250 23:00:45.548625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip>
18251 23:00:45.549052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip
18253 23:00:45.580824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip>
18254 23:00:45.581246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip
18256 23:00:45.611839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip>
18257 23:00:45.612227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip
18259 23:00:45.642525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3840 RESULT=pass>
18260 23:00:45.642920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3840 RESULT=pass
18262 23:00:45.674316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip>
18263 23:00:45.674707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip
18265 23:00:45.706262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip>
18266 23:00:45.706718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip
18268 23:00:45.738469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip>
18269 23:00:45.738903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip
18271 23:00:45.771530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3856 RESULT=pass
18273 23:00:45.772069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3856 RESULT=pass>
18274 23:00:45.803266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip
18276 23:00:45.803794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip>
18277 23:00:45.835118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip
18279 23:00:45.835640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip>
18280 23:00:45.866199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip>
18281 23:00:45.866655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip
18283 23:00:45.899841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3872 RESULT=pass
18285 23:00:45.900399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3872 RESULT=pass>
18286 23:00:45.932052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip>
18287 23:00:45.932459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip
18289 23:00:45.963813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip
18291 23:00:45.964262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip>
18292 23:00:45.995143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip>
18293 23:00:45.995539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip
18295 23:00:46.026812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3888 RESULT=pass
18297 23:00:46.027350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3888 RESULT=pass>
18298 23:00:46.058303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip
18300 23:00:46.058886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip>
18301 23:00:46.090377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip
18303 23:00:46.091024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip>
18304 23:00:46.122984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip
18306 23:00:46.123522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip>
18307 23:00:46.153897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3904 RESULT=pass
18309 23:00:46.154420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3904 RESULT=pass>
18310 23:00:46.185597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip
18312 23:00:46.186227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip>
18313 23:00:46.216579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip>
18314 23:00:46.216979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip
18316 23:00:46.247855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip>
18317 23:00:46.248259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip
18319 23:00:46.279632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3920 RESULT=pass
18321 23:00:46.280182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3920 RESULT=pass>
18322 23:00:46.311879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip>
18323 23:00:46.312324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip
18325 23:00:46.343453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip>
18326 23:00:46.343915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip
18328 23:00:46.375640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip>
18329 23:00:46.376192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip
18331 23:00:46.406152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3936 RESULT=pass>
18332 23:00:46.406705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3936 RESULT=pass
18334 23:00:46.437380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip>
18335 23:00:46.437768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip
18337 23:00:46.469742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip>
18338 23:00:46.470199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip
18340 23:00:46.504847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip>
18341 23:00:46.505216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip
18343 23:00:46.552203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3952 RESULT=pass>
18344 23:00:46.552633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3952 RESULT=pass
18346 23:00:46.585605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip>
18347 23:00:46.586019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip
18349 23:00:46.617084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip>
18350 23:00:46.617501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip
18352 23:00:46.649634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip
18354 23:00:46.650241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip>
18355 23:00:46.680627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3968 RESULT=pass>
18356 23:00:46.681089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3968 RESULT=pass
18358 23:00:46.711884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip
18360 23:00:46.712606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip>
18361 23:00:46.743719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip>
18362 23:00:46.744192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip
18364 23:00:46.775326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip
18366 23:00:46.775782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip>
18367 23:00:46.806828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3984 RESULT=pass
18369 23:00:46.807376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3984 RESULT=pass>
18370 23:00:46.839715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip
18372 23:00:46.840184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip>
18373 23:00:46.871807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip>
18374 23:00:46.872283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip
18376 23:00:46.902799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip
18378 23:00:46.903385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip>
18379 23:00:46.933753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4000 RESULT=pass>
18380 23:00:46.934204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4000 RESULT=pass
18382 23:00:46.964807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip
18384 23:00:46.965390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip>
18385 23:00:46.996103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip>
18386 23:00:46.996582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip
18388 23:00:47.027681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip>
18389 23:00:47.028135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip
18391 23:00:47.059454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4016 RESULT=pass>
18392 23:00:47.059921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4016 RESULT=pass
18394 23:00:47.090111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip
18396 23:00:47.090646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip>
18397 23:00:47.121322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip>
18398 23:00:47.121785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip
18400 23:00:47.153058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip>
18401 23:00:47.153529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip
18403 23:00:47.184439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4032 RESULT=pass>
18404 23:00:47.184868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4032 RESULT=pass
18406 23:00:47.215717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip>
18407 23:00:47.216145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip
18409 23:00:47.246278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip>
18410 23:00:47.246709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip
18412 23:00:47.276831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip>
18413 23:00:47.277246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip
18415 23:00:47.308257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4048 RESULT=pass>
18416 23:00:47.308679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4048 RESULT=pass
18418 23:00:47.339679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip>
18419 23:00:47.340061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip
18421 23:00:47.370917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip
18423 23:00:47.371483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip>
18424 23:00:47.402658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip
18426 23:00:47.403196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip>
18427 23:00:47.433127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4064 RESULT=pass>
18428 23:00:47.433582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4064 RESULT=pass
18430 23:00:47.464049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip
18432 23:00:47.464611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip>
18433 23:00:47.495304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip
18435 23:00:47.495940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip>
18436 23:00:47.526473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip
18438 23:00:47.527175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip>
18439 23:00:47.558174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4080 RESULT=pass>
18440 23:00:47.558626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4080 RESULT=pass
18442 23:00:47.589408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip
18444 23:00:47.589964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip>
18445 23:00:47.620617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip>
18446 23:00:47.621059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip
18448 23:00:47.652077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip
18450 23:00:47.652610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip>
18451 23:00:47.683559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4096 RESULT=pass
18453 23:00:47.684090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4096 RESULT=pass>
18454 23:00:47.715274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip
18456 23:00:47.715811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip>
18457 23:00:47.747499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip
18459 23:00:47.748118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip>
18460 23:00:47.778542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip
18462 23:00:47.779153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip>
18463 23:00:47.809837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4112 RESULT=pass>
18464 23:00:47.810305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4112 RESULT=pass
18466 23:00:47.841720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip>
18467 23:00:47.842186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip
18469 23:00:47.873715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip
18471 23:00:47.874330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip>
18472 23:00:47.906170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip>
18473 23:00:47.906614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip
18475 23:00:47.937924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4128 RESULT=pass
18477 23:00:47.938453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4128 RESULT=pass>
18478 23:00:47.969590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip
18480 23:00:47.970129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip>
18481 23:00:48.001119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip>
18482 23:00:48.001558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip
18484 23:00:48.032751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip
18486 23:00:48.033318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip>
18487 23:00:48.065503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4144 RESULT=pass
18489 23:00:48.066049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4144 RESULT=pass>
18490 23:00:48.097456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip>
18491 23:00:48.097908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip
18493 23:00:48.128428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip>
18494 23:00:48.128826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip
18496 23:00:48.160141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip>
18497 23:00:48.160556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip
18499 23:00:48.191802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4160 RESULT=pass
18501 23:00:48.192336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4160 RESULT=pass>
18502 23:00:48.224090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip>
18503 23:00:48.224575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip
18505 23:00:48.257723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip>
18506 23:00:48.258166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip
18508 23:00:48.289140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip>
18509 23:00:48.289589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip
18511 23:00:48.320912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4176 RESULT=pass>
18512 23:00:48.321370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4176 RESULT=pass
18514 23:00:48.352925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip
18516 23:00:48.353455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip>
18517 23:00:48.384009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip>
18518 23:00:48.384462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip
18520 23:00:48.416028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip
18522 23:00:48.416770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip>
18523 23:00:48.447944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4192 RESULT=pass
18525 23:00:48.448563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4192 RESULT=pass>
18526 23:00:48.479537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip
18528 23:00:48.480145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip>
18529 23:00:48.510662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip>
18530 23:00:48.511080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip
18532 23:00:48.541705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip>
18533 23:00:48.542130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip
18535 23:00:48.573983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4208 RESULT=pass
18537 23:00:48.574453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4208 RESULT=pass>
18538 23:00:48.607146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip
18540 23:00:48.607774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip>
18541 23:00:48.639040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip
18543 23:00:48.639650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip>
18544 23:00:48.670250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip
18546 23:00:48.670859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip>
18547 23:00:48.701403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4224 RESULT=pass
18549 23:00:48.701952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4224 RESULT=pass>
18550 23:00:48.732888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip
18552 23:00:48.733417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip>
18553 23:00:48.765234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip>
18554 23:00:48.765757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip
18556 23:00:48.797823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip>
18557 23:00:48.798283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip
18559 23:00:48.829701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4240 RESULT=pass
18561 23:00:48.830232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4240 RESULT=pass>
18562 23:00:48.861853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip
18564 23:00:48.862285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip>
18565 23:00:48.893827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip
18567 23:00:48.894415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip>
18568 23:00:48.925072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip>
18569 23:00:48.925538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip
18571 23:00:48.957337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4256 RESULT=pass
18573 23:00:48.957892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4256 RESULT=pass>
18574 23:00:48.988803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip
18576 23:00:48.989341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip>
18577 23:00:49.020523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip>
18578 23:00:49.020971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip
18580 23:00:49.052046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip>
18581 23:00:49.052508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip
18583 23:00:49.084238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4272 RESULT=pass
18585 23:00:49.084696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4272 RESULT=pass>
18586 23:00:49.115429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip
18588 23:00:49.115882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip>
18589 23:00:49.147610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip
18591 23:00:49.148201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip>
18592 23:00:49.178617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip
18594 23:00:49.179153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip>
18595 23:00:49.209132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4288 RESULT=pass>
18596 23:00:49.209604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4288 RESULT=pass
18598 23:00:49.240263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip
18600 23:00:49.240869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip>
18601 23:00:49.271735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip
18603 23:00:49.272297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip>
18604 23:00:49.304055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip
18606 23:00:49.304737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip>
18607 23:00:49.336552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4304 RESULT=pass
18609 23:00:49.337081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4304 RESULT=pass>
18610 23:00:49.367926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip>
18611 23:00:49.368374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip
18613 23:00:49.399643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip
18615 23:00:49.400251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip>
18616 23:00:49.430612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip
18618 23:00:49.431053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip>
18619 23:00:49.462223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4320 RESULT=pass>
18620 23:00:49.462638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4320 RESULT=pass
18622 23:00:49.494543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip>
18623 23:00:49.494948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip
18625 23:00:49.526436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip
18627 23:00:49.526884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip>
18628 23:00:49.558213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip>
18629 23:00:49.558692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip
18631 23:00:49.590313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4336 RESULT=pass
18633 23:00:49.590773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4336 RESULT=pass>
18634 23:00:49.621809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip>
18635 23:00:49.622357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip
18637 23:00:49.656531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip
18639 23:00:49.657158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip>
18640 23:00:49.688945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip>
18641 23:00:49.689402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip
18643 23:00:49.720753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4352 RESULT=pass>
18644 23:00:49.721205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4352 RESULT=pass
18646 23:00:49.752993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip
18648 23:00:49.753520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip>
18649 23:00:49.785354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip
18651 23:00:49.785906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip>
18652 23:00:49.816853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip
18654 23:00:49.817392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip>
18655 23:00:49.849541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4368 RESULT=pass>
18656 23:00:49.850011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4368 RESULT=pass
18658 23:00:49.880910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip>
18659 23:00:49.881392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip
18661 23:00:49.912573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip>
18662 23:00:49.912999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip
18664 23:00:49.943878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip>
18665 23:00:49.944288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip
18667 23:00:49.975755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4384 RESULT=pass>
18668 23:00:49.976180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4384 RESULT=pass
18670 23:00:50.007736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip>
18671 23:00:50.008236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip
18673 23:00:50.041613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip>
18674 23:00:50.042101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip
18676 23:00:50.072770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip>
18677 23:00:50.073238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip
18679 23:00:50.104416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4400 RESULT=pass>
18680 23:00:50.104885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4400 RESULT=pass
18682 23:00:50.136479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip
18684 23:00:50.137123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip>
18685 23:00:50.169221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip>
18686 23:00:50.169686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip
18688 23:00:50.200942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip>
18689 23:00:50.201392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip
18691 23:00:50.232404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4416 RESULT=pass>
18692 23:00:50.232861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4416 RESULT=pass
18694 23:00:50.267648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip
18696 23:00:50.268192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip>
18697 23:00:50.299006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip
18699 23:00:50.299576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip>
18700 23:00:50.331651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip>
18701 23:00:50.332076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip
18703 23:00:50.365711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4432 RESULT=pass
18705 23:00:50.366328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4432 RESULT=pass>
18706 23:00:50.398679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip>
18707 23:00:50.399102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip
18709 23:00:50.436134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip>
18710 23:00:50.436480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip
18712 23:00:50.472236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip>
18713 23:00:50.472579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip
18715 23:00:50.507157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4448 RESULT=pass>
18716 23:00:50.507516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4448 RESULT=pass
18718 23:00:50.543795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip>
18719 23:00:50.544427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip
18721 23:00:50.575671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip>
18722 23:00:50.576135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip
18724 23:00:50.607434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip>
18725 23:00:50.607901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip
18727 23:00:50.639667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4464 RESULT=pass>
18728 23:00:50.640126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4464 RESULT=pass
18730 23:00:50.671098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip>
18731 23:00:50.671611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip
18733 23:00:50.702601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip
18735 23:00:50.703247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip>
18736 23:00:50.734341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip>
18737 23:00:50.734810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip
18739 23:00:50.765848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4480 RESULT=pass>
18740 23:00:50.766325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4480 RESULT=pass
18742 23:00:50.797063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip>
18743 23:00:50.797508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip
18745 23:00:50.828480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip
18747 23:00:50.828925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip>
18748 23:00:50.859053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip>
18749 23:00:50.859517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip
18751 23:00:50.890678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4496 RESULT=pass
18753 23:00:50.891269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4496 RESULT=pass>
18754 23:00:50.922528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip>
18755 23:00:50.923003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip
18757 23:00:50.954494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip>
18758 23:00:50.954880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip
18760 23:00:50.986666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip>
18761 23:00:50.987113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip
18763 23:00:51.018274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4512 RESULT=pass
18765 23:00:51.018795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4512 RESULT=pass>
18766 23:00:51.049670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip>
18767 23:00:51.050115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip
18769 23:00:51.081619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip>
18770 23:00:51.082156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip
18772 23:00:51.113226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip
18774 23:00:51.113670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip>
18775 23:00:51.145900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4528 RESULT=pass>
18776 23:00:51.146303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4528 RESULT=pass
18778 23:00:51.177044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip
18780 23:00:51.177603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip>
18781 23:00:51.208115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip>
18782 23:00:51.208556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip
18784 23:00:51.239707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip
18786 23:00:51.240161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip>
18787 23:00:51.270489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4544 RESULT=pass>
18788 23:00:51.270954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4544 RESULT=pass
18790 23:00:51.309055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip>
18791 23:00:51.309393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip
18793 23:00:51.343599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip
18795 23:00:51.344012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip>
18796 23:00:51.378887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip
18798 23:00:51.379363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip>
18799 23:00:51.415917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4560 RESULT=pass>
18800 23:00:51.416258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4560 RESULT=pass
18802 23:00:51.453355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip>
18803 23:00:51.453779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip
18805 23:00:51.511505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip>
18806 23:00:51.511926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip
18808 23:00:51.549132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip
18810 23:00:51.549584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip>
18811 23:00:51.584670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4576 RESULT=pass
18813 23:00:51.585123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4576 RESULT=pass>
18814 23:00:51.620339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip>
18815 23:00:51.620710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip
18817 23:00:51.651942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip
18819 23:00:51.652431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip>
18820 23:00:51.682817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip
18822 23:00:51.683252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip>
18823 23:00:51.714271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4592 RESULT=pass>
18824 23:00:51.714736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4592 RESULT=pass
18826 23:00:51.745247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip>
18827 23:00:51.745698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip
18829 23:00:51.777162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip>
18830 23:00:51.777585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip
18832 23:00:51.811603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip>
18833 23:00:51.812154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip
18835 23:00:51.843343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4608 RESULT=pass>
18836 23:00:51.843765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4608 RESULT=pass
18838 23:00:51.875326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip>
18839 23:00:51.875750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip
18841 23:00:51.908120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip>
18842 23:00:51.908549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip
18844 23:00:51.940345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip>
18845 23:00:51.940774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip
18847 23:00:51.972610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4624 RESULT=pass>
18848 23:00:51.973090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4624 RESULT=pass
18850 23:00:52.004790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip
18852 23:00:52.005217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip>
18853 23:00:52.036579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip>
18854 23:00:52.037026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip
18856 23:00:52.068585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip>
18857 23:00:52.069019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip
18859 23:00:52.099866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4640 RESULT=pass>
18860 23:00:52.100300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4640 RESULT=pass
18862 23:00:52.132479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip>
18863 23:00:52.132873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip
18865 23:00:52.166536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip>
18866 23:00:52.166979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip
18868 23:00:52.198099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip
18870 23:00:52.198692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip>
18871 23:00:52.229270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4656 RESULT=pass
18873 23:00:52.229726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4656 RESULT=pass>
18874 23:00:52.260482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip
18876 23:00:52.261025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip>
18877 23:00:52.292279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip
18879 23:00:52.292897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip>
18880 23:00:52.326686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip
18882 23:00:52.327280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip>
18883 23:00:52.359803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4672 RESULT=pass>
18884 23:00:52.360261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4672 RESULT=pass
18886 23:00:52.390495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip>
18887 23:00:52.390936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip
18889 23:00:52.422251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip>
18890 23:00:52.422697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip
18892 23:00:52.453502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip>
18893 23:00:52.453951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip
18895 23:00:52.486823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4688 RESULT=pass
18897 23:00:52.487454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4688 RESULT=pass>
18898 23:00:52.521394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip
18900 23:00:52.521976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip>
18901 23:00:52.552985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip>
18902 23:00:52.553419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip
18904 23:00:52.583955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip>
18905 23:00:52.584394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip
18907 23:00:52.614458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4704 RESULT=pass>
18908 23:00:52.614914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4704 RESULT=pass
18910 23:00:52.645560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip
18912 23:00:52.646106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip>
18913 23:00:52.676963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip
18915 23:00:52.677516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip>
18916 23:00:52.709235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip
18918 23:00:52.709814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip>
18919 23:00:52.741530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4720 RESULT=pass
18921 23:00:52.742089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4720 RESULT=pass>
18922 23:00:52.772759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip>
18923 23:00:52.773200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip
18925 23:00:52.811903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip>
18926 23:00:52.812300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip
18928 23:00:52.844248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip>
18929 23:00:52.844657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip
18931 23:00:52.877782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4736 RESULT=pass
18933 23:00:52.878305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4736 RESULT=pass>
18934 23:00:52.909775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip>
18935 23:00:52.910215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip
18937 23:00:52.941622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip>
18938 23:00:52.942048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip
18940 23:00:52.973138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip>
18941 23:00:52.973543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip
18943 23:00:53.004464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4752 RESULT=pass>
18944 23:00:53.004874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4752 RESULT=pass
18946 23:00:53.037521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip>
18947 23:00:53.037979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip
18949 23:00:53.069026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip
18951 23:00:53.069565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip>
18952 23:00:53.100253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip>
18953 23:00:53.100697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip
18955 23:00:53.132687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4768 RESULT=pass
18957 23:00:53.133257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4768 RESULT=pass>
18958 23:00:53.163895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip
18960 23:00:53.164336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip>
18961 23:00:53.196361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip
18963 23:00:53.196981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip>
18964 23:00:53.229201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip
18966 23:00:53.229821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip>
18967 23:00:53.260945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4784 RESULT=pass>
18968 23:00:53.261422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4784 RESULT=pass
18970 23:00:53.292090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip>
18971 23:00:53.292533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip
18973 23:00:53.323681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip>
18974 23:00:53.324117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip
18976 23:00:53.355089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip
18978 23:00:53.355618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip>
18979 23:00:53.387721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4800 RESULT=pass
18981 23:00:53.388169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4800 RESULT=pass>
18982 23:00:53.419806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip>
18983 23:00:53.420254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip
18985 23:00:53.451430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip
18987 23:00:53.451977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip>
18988 23:00:53.483407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip
18990 23:00:53.483940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip>
18991 23:00:53.515400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4816 RESULT=pass
18993 23:00:53.515939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4816 RESULT=pass>
18994 23:00:53.547303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip
18996 23:00:53.547840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip>
18997 23:00:53.579523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip
18999 23:00:53.579955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip>
19000 23:00:53.610607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip>
19001 23:00:53.611013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip
19003 23:00:53.642088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4832 RESULT=pass
19005 23:00:53.642619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4832 RESULT=pass>
19006 23:00:53.673133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip
19008 23:00:53.673592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip>
19009 23:00:53.703927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip
19011 23:00:53.704392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip>
19012 23:00:53.735455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip>
19013 23:00:53.735884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip
19015 23:00:53.768455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4848 RESULT=pass
19017 23:00:53.768902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4848 RESULT=pass>
19018 23:00:53.800608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip>
19019 23:00:53.801039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip
19021 23:00:53.831895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip>
19022 23:00:53.832356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip
19024 23:00:53.863453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip
19026 23:00:53.864023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip>
19027 23:00:53.894019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4864 RESULT=pass>
19028 23:00:53.894488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4864 RESULT=pass
19030 23:00:53.925804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip
19032 23:00:53.926405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip>
19033 23:00:53.960199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip
19035 23:00:53.960743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip>
19036 23:00:53.991746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip
19038 23:00:53.992285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip>
19039 23:00:54.022188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4880 RESULT=pass>
19040 23:00:54.022672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4880 RESULT=pass
19042 23:00:54.053831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip>
19043 23:00:54.054273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip
19045 23:00:54.085714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip>
19046 23:00:54.086125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip
19048 23:00:54.117714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip
19050 23:00:54.118255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip>
19051 23:00:54.148302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4896 RESULT=pass>
19052 23:00:54.148766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4896 RESULT=pass
19054 23:00:54.179682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip
19056 23:00:54.180234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip>
19057 23:00:54.211904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip>
19058 23:00:54.212367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip
19060 23:00:54.243664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip
19062 23:00:54.244236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip>
19063 23:00:54.276767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4912 RESULT=pass>
19064 23:00:54.277300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4912 RESULT=pass
19066 23:00:54.309437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip
19068 23:00:54.309994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip>
19069 23:00:54.340479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip>
19070 23:00:54.340918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip
19072 23:00:54.371573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip
19074 23:00:54.372140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip>
19075 23:00:54.402043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4928 RESULT=pass
19077 23:00:54.402638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4928 RESULT=pass>
19078 23:00:54.433184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip
19080 23:00:54.433751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip>
19081 23:00:54.465371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip>
19082 23:00:54.465834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip
19084 23:00:54.497374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip>
19085 23:00:54.497815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip
19087 23:00:54.529167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4944 RESULT=pass
19089 23:00:54.529795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4944 RESULT=pass>
19090 23:00:54.560703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip>
19091 23:00:54.561158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip
19093 23:00:54.592740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip>
19094 23:00:54.593196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip
19096 23:00:54.625493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip
19098 23:00:54.626129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip>
19099 23:00:54.657717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4960 RESULT=pass
19101 23:00:54.658330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4960 RESULT=pass>
19102 23:00:54.688483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip>
19103 23:00:54.688944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip
19105 23:00:54.719829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip
19107 23:00:54.720362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip>
19108 23:00:54.750657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip
19110 23:00:54.751184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip>
19111 23:00:54.782420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4976 RESULT=pass
19113 23:00:54.782962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4976 RESULT=pass>
19114 23:00:54.814569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip
19116 23:00:54.815268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip>
19117 23:00:54.846249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip>
19118 23:00:54.846703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip
19120 23:00:54.877625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip
19122 23:00:54.878151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip>
19123 23:00:54.908821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4992 RESULT=pass>
19124 23:00:54.909277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4992 RESULT=pass
19126 23:00:54.940121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip
19128 23:00:54.940547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip>
19129 23:00:54.972863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip>
19130 23:00:54.973305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip
19132 23:00:55.005822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip
19134 23:00:55.006359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip>
19135 23:00:55.037245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5008 RESULT=pass>
19136 23:00:55.037698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5008 RESULT=pass
19138 23:00:55.068938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip
19140 23:00:55.069477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip>
19141 23:00:55.102501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip
19143 23:00:55.103221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip>
19144 23:00:55.135957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip
19146 23:00:55.136503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip>
19147 23:00:55.169889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5024 RESULT=pass>
19148 23:00:55.170322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5024 RESULT=pass
19150 23:00:55.203976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip>
19151 23:00:55.204406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip
19153 23:00:55.236175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip
19155 23:00:55.236596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip>
19156 23:00:55.269421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip
19158 23:00:55.270125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip>
19159 23:00:55.317907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5040 RESULT=pass>
19160 23:00:55.318369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5040 RESULT=pass
19162 23:00:55.359873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip>
19163 23:00:55.360373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip
19165 23:00:55.412184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip>
19166 23:00:55.412691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip
19168 23:00:55.447928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip>
19169 23:00:55.448301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip
19171 23:00:55.481115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5056 RESULT=pass>
19172 23:00:55.481517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5056 RESULT=pass
19174 23:00:55.515112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip>
19175 23:00:55.515527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip
19177 23:00:55.549252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip
19179 23:00:55.549835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip>
19180 23:00:55.581832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip
19182 23:00:55.582394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip>
19183 23:00:55.614037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5072 RESULT=pass
19185 23:00:55.614590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5072 RESULT=pass>
19186 23:00:55.646273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip
19188 23:00:55.646851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip>
19189 23:00:55.678326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip>
19190 23:00:55.678865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip
19192 23:00:55.713031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip>
19193 23:00:55.713583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip
19195 23:00:55.749369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5088 RESULT=pass>
19196 23:00:55.749828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5088 RESULT=pass
19198 23:00:55.784592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip>
19199 23:00:55.784980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip
19201 23:00:55.817677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip
19203 23:00:55.818222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip>
19204 23:00:55.850752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip
19206 23:00:55.851383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip>
19207 23:00:55.892104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5104 RESULT=pass>
19208 23:00:55.892561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5104 RESULT=pass
19210 23:00:55.925838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip
19212 23:00:55.926372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip>
19213 23:00:55.958856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip
19215 23:00:55.959479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip>
19216 23:00:55.994227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip>
19217 23:00:55.994702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip
19219 23:00:56.028009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5120 RESULT=pass
19221 23:00:56.028634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5120 RESULT=pass>
19222 23:00:56.060761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip>
19223 23:00:56.061193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip
19225 23:00:56.095424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip
19227 23:00:56.095888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip>
19228 23:00:56.128227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip>
19229 23:00:56.128650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip
19231 23:00:56.161316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5136 RESULT=pass>
19232 23:00:56.161743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5136 RESULT=pass
19234 23:00:56.195313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip>
19235 23:00:56.195727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip
19237 23:00:56.228960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip>
19238 23:00:56.229485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip
19240 23:00:56.262779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip
19242 23:00:56.263350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip>
19243 23:00:56.296336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5152 RESULT=pass>
19244 23:00:56.296790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5152 RESULT=pass
19246 23:00:56.329722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip>
19247 23:00:56.330179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip
19249 23:00:56.362090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip>
19250 23:00:56.362556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip
19252 23:00:56.400284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip>
19253 23:00:56.400746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip
19255 23:00:56.451397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5168 RESULT=pass
19257 23:00:56.452120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5168 RESULT=pass>
19258 23:00:56.487189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip>
19259 23:00:56.487665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip
19261 23:00:56.522947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip
19263 23:00:56.523557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip>
19264 23:00:56.560240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip
19266 23:00:56.560569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip>
19267 23:00:56.592860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5184 RESULT=pass>
19268 23:00:56.593363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5184 RESULT=pass
19270 23:00:56.625127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip>
19271 23:00:56.625662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip
19273 23:00:56.665366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip>
19274 23:00:56.665806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip
19276 23:00:56.698110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip
19278 23:00:56.698692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip>
19279 23:00:56.731238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5200 RESULT=pass
19281 23:00:56.731853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5200 RESULT=pass>
19282 23:00:56.764702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip
19284 23:00:56.765311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip>
19285 23:00:56.798075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip
19287 23:00:56.798672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip>
19288 23:00:56.831733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip
19290 23:00:56.832290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip>
19291 23:00:56.864589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5216 RESULT=pass
19293 23:00:56.865044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5216 RESULT=pass>
19294 23:00:56.896400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip>
19295 23:00:56.896817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip
19297 23:00:56.930177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip>
19298 23:00:56.930585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip
19300 23:00:56.962612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip
19302 23:00:56.963232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip>
19303 23:00:56.996694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5232 RESULT=pass>
19304 23:00:56.997156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5232 RESULT=pass
19306 23:00:57.028962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip>
19307 23:00:57.029430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip
19309 23:00:57.061226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip>
19310 23:00:57.061662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip
19312 23:00:57.094153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip
19314 23:00:57.094715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip>
19315 23:00:57.126658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5248 RESULT=pass
19317 23:00:57.127212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5248 RESULT=pass>
19318 23:00:57.159121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip>
19319 23:00:57.159592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip
19321 23:00:57.192468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip
19323 23:00:57.193031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip>
19324 23:00:57.224439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip>
19325 23:00:57.224917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip
19327 23:00:57.259151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5264 RESULT=pass>
19328 23:00:57.259606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5264 RESULT=pass
19330 23:00:57.291932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip>
19331 23:00:57.292391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip
19333 23:00:57.324050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip
19335 23:00:57.324497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip>
19336 23:00:57.355865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip
19338 23:00:57.356241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip>
19339 23:00:57.386486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5280 RESULT=pass
19341 23:00:57.386821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5280 RESULT=pass>
19342 23:00:57.417276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip>
19343 23:00:57.417642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip
19345 23:00:57.448562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip>
19346 23:00:57.448939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip
19348 23:00:57.480320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip>
19349 23:00:57.480697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip
19351 23:00:57.512591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5296 RESULT=pass>
19352 23:00:57.512972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5296 RESULT=pass
19354 23:00:57.543884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip>
19355 23:00:57.544259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip
19357 23:00:57.574508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip>
19358 23:00:57.574883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip
19360 23:00:57.605831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip>
19361 23:00:57.606346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip
19363 23:00:57.637073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5312 RESULT=pass
19365 23:00:57.637718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5312 RESULT=pass>
19366 23:00:57.668610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip>
19367 23:00:57.669083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip
19369 23:00:57.700718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip>
19370 23:00:57.701132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip
19372 23:00:57.732295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip
19374 23:00:57.732909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip>
19375 23:00:57.763748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5328 RESULT=pass>
19376 23:00:57.764226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5328 RESULT=pass
19378 23:00:57.796199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip>
19379 23:00:57.796611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip
19381 23:00:57.829267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip>
19382 23:00:57.829700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip
19384 23:00:57.861544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip
19386 23:00:57.862195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip>
19387 23:00:57.893311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5344 RESULT=pass
19389 23:00:57.893899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5344 RESULT=pass>
19390 23:00:57.946154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip
19392 23:00:57.946702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip>
19393 23:00:57.978098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip
19395 23:00:57.978638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip>
19396 23:00:58.010626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip
19398 23:00:58.011233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip>
19399 23:00:58.044887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5360 RESULT=pass
19401 23:00:58.045439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5360 RESULT=pass>
19402 23:00:58.076946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip
19404 23:00:58.077512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip>
19405 23:00:58.108607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip>
19406 23:00:58.109056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip
19408 23:00:58.140049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip>
19409 23:00:58.140554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip
19411 23:00:58.172236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5376 RESULT=pass>
19412 23:00:58.172658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5376 RESULT=pass
19414 23:00:58.204177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip>
19415 23:00:58.204630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip
19417 23:00:58.236950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip>
19418 23:00:58.237413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip
19420 23:00:58.269246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip>
19421 23:00:58.269699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip
19423 23:00:58.300603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5392 RESULT=pass>
19424 23:00:58.301051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5392 RESULT=pass
19426 23:00:58.331903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip>
19427 23:00:58.332367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip
19429 23:00:58.365092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip>
19430 23:00:58.365531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip
19432 23:00:58.398350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip>
19433 23:00:58.398820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip
19435 23:00:58.429308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5408 RESULT=pass>
19436 23:00:58.429774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5408 RESULT=pass
19438 23:00:58.460644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip
19440 23:00:58.461187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip>
19441 23:00:58.491852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip>
19442 23:00:58.492301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip
19444 23:00:58.523951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip>
19445 23:00:58.524402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip
19447 23:00:58.556616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5424 RESULT=pass>
19448 23:00:58.557144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5424 RESULT=pass
19450 23:00:58.589909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip>
19451 23:00:58.590373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip
19453 23:00:58.622053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip>
19454 23:00:58.622527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip
19456 23:00:58.654080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip
19458 23:00:58.654640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip>
19459 23:00:58.685973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5440 RESULT=pass>
19460 23:00:58.686443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5440 RESULT=pass
19462 23:00:58.718342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip
19464 23:00:58.718907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip>
19465 23:00:58.751723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip
19467 23:00:58.752289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip>
19468 23:00:58.785298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip>
19469 23:00:58.785765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip
19471 23:00:58.816891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5456 RESULT=pass>
19472 23:00:58.817359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5456 RESULT=pass
19474 23:00:58.848760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip>
19475 23:00:58.849199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip
19477 23:00:58.880652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip>
19478 23:00:58.881123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip
19480 23:00:58.912485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip>
19481 23:00:58.912944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip
19483 23:00:58.945457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5472 RESULT=pass
19485 23:00:58.945906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5472 RESULT=pass>
19486 23:00:58.977119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip
19488 23:00:58.977692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip>
19489 23:00:59.007850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip>
19490 23:00:59.008311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip
19492 23:00:59.039620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip
19494 23:00:59.040064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip>
19495 23:00:59.072283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5488 RESULT=pass>
19496 23:00:59.072714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5488 RESULT=pass
19498 23:00:59.106202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip>
19499 23:00:59.106653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip
19501 23:00:59.138389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip
19503 23:00:59.138845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip>
19504 23:00:59.170374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip>
19505 23:00:59.170854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip
19507 23:00:59.203737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5504 RESULT=pass
19509 23:00:59.204180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5504 RESULT=pass>
19510 23:00:59.237883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip>
19511 23:00:59.238345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip
19513 23:00:59.273091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip
19515 23:00:59.273563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip>
19516 23:00:59.307977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip>
19517 23:00:59.308424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip
19519 23:00:59.344725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5520 RESULT=pass
19521 23:00:59.345183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5520 RESULT=pass>
19522 23:00:59.384539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip
19524 23:00:59.385164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip>
19525 23:00:59.423422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip
19527 23:00:59.424039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip>
19528 23:00:59.461352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip>
19529 23:00:59.461781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip
19531 23:00:59.494450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5536 RESULT=pass
19533 23:00:59.494912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5536 RESULT=pass>
19534 23:00:59.528830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip
19536 23:00:59.529426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip>
19537 23:00:59.563534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip
19539 23:00:59.564210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip>
19540 23:00:59.598577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip>
19541 23:00:59.599034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip
19543 23:00:59.635915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5552 RESULT=pass>
19544 23:00:59.636433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5552 RESULT=pass
19546 23:00:59.671091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip
19548 23:00:59.671545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip>
19549 23:00:59.705845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip
19551 23:00:59.706299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip>
19552 23:00:59.740150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip>
19553 23:00:59.740577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip
19555 23:00:59.774379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5568 RESULT=pass>
19556 23:00:59.774873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5568 RESULT=pass
19558 23:00:59.811399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip>
19559 23:00:59.811792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip
19561 23:00:59.846178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip>
19562 23:00:59.846643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip
19564 23:00:59.880717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip>
19565 23:00:59.881131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip
19567 23:00:59.916366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5584 RESULT=pass>
19568 23:00:59.916797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5584 RESULT=pass
19570 23:00:59.950638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip>
19571 23:00:59.951056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip
19573 23:00:59.988378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip
19575 23:00:59.988827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip>
19576 23:01:00.023644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip>
19577 23:01:00.024022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip
19579 23:01:00.056945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5600 RESULT=pass>
19580 23:01:00.057351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5600 RESULT=pass
19582 23:01:00.090745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip
19584 23:01:00.091194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip>
19585 23:01:00.125360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip>
19586 23:01:00.125809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip
19588 23:01:00.161713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip>
19589 23:01:00.162120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip
19591 23:01:00.197711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5616 RESULT=pass
19593 23:01:00.198156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5616 RESULT=pass>
19594 23:01:00.231825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip>
19595 23:01:00.232256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip
19597 23:01:00.265712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip>
19598 23:01:00.266127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip
19600 23:01:00.300853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip>
19601 23:01:00.301280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip
19603 23:01:00.335509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5632 RESULT=pass>
19604 23:01:00.335938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5632 RESULT=pass
19606 23:01:00.371494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip>
19607 23:01:00.371927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip
19609 23:01:00.407629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip>
19610 23:01:00.408073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip
19612 23:01:00.441679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip>
19613 23:01:00.442160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip
19615 23:01:00.476045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5648 RESULT=pass>
19616 23:01:00.476500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5648 RESULT=pass
19618 23:01:00.511636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip
19620 23:01:00.512310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip>
19621 23:01:00.547846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip
19623 23:01:00.548406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip>
19624 23:01:00.581794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip>
19625 23:01:00.582203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip
19627 23:01:00.615957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5664 RESULT=pass>
19628 23:01:00.616405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5664 RESULT=pass
19630 23:01:00.650550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip>
19631 23:01:00.650971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip
19633 23:01:00.685711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip>
19634 23:01:00.686110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip
19636 23:01:00.720441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip>
19637 23:01:00.720834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip
19639 23:01:00.752637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5680 RESULT=pass>
19640 23:01:00.753041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5680 RESULT=pass
19642 23:01:00.784479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip>
19643 23:01:00.784860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip
19645 23:01:00.816156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip>
19646 23:01:00.816545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip
19648 23:01:00.848359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip>
19649 23:01:00.848804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip
19651 23:01:00.882004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5696 RESULT=pass>
19652 23:01:00.882419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5696 RESULT=pass
19654 23:01:00.916079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip
19656 23:01:00.916506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip>
19657 23:01:00.948117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip>
19658 23:01:00.948503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip
19660 23:01:00.979929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip>
19661 23:01:00.980336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip
19663 23:01:01.012489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5712 RESULT=pass
19665 23:01:01.012915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5712 RESULT=pass>
19666 23:01:01.045437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip>
19667 23:01:01.045843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip
19669 23:01:01.080096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip>
19670 23:01:01.080565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip
19672 23:01:01.111821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip>
19673 23:01:01.112263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip
19675 23:01:01.143723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5728 RESULT=pass>
19676 23:01:01.144142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5728 RESULT=pass
19678 23:01:01.176034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip
19680 23:01:01.176478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip>
19681 23:01:01.208122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip>
19682 23:01:01.208520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip
19684 23:01:01.242033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip
19686 23:01:01.242599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip>
19687 23:01:01.275655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5744 RESULT=pass
19689 23:01:01.276222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5744 RESULT=pass>
19690 23:01:01.307709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip
19692 23:01:01.308264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip>
19693 23:01:01.338762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip
19695 23:01:01.339318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip>
19696 23:01:01.369927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip
19698 23:01:01.370356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip>
19699 23:01:01.403105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5760 RESULT=pass
19701 23:01:01.403783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5760 RESULT=pass>
19702 23:01:01.437926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip>
19703 23:01:01.438510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip
19705 23:01:01.472441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip>
19706 23:01:01.472877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip
19708 23:01:01.506936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip
19710 23:01:01.507394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip>
19711 23:01:01.541178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5776 RESULT=pass>
19712 23:01:01.541607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5776 RESULT=pass
19714 23:01:01.575511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip>
19715 23:01:01.575935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip
19717 23:01:01.609409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip
19719 23:01:01.609860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip>
19720 23:01:01.641157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip>
19721 23:01:01.641569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip
19723 23:01:01.672724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5792 RESULT=pass>
19724 23:01:01.673136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5792 RESULT=pass
19726 23:01:01.704164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip>
19727 23:01:01.704579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip
19729 23:01:01.737075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip
19731 23:01:01.737673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip>
19732 23:01:01.776033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip>
19733 23:01:01.776466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip
19735 23:01:01.808983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5808 RESULT=pass
19737 23:01:01.809523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5808 RESULT=pass>
19738 23:01:01.840161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip
19740 23:01:01.840718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip>
19741 23:01:01.871372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip
19743 23:01:01.871804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip>
19744 23:01:01.903181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip>
19745 23:01:01.903559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip
19747 23:01:01.936321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5824 RESULT=pass
19749 23:01:01.936756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5824 RESULT=pass>
19750 23:01:01.970220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip>
19751 23:01:01.970666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip
19753 23:01:02.002142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip>
19754 23:01:02.002581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip
19756 23:01:02.034150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip
19758 23:01:02.034667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip>
19759 23:01:02.066377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5840 RESULT=pass>
19760 23:01:02.066819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5840 RESULT=pass
19762 23:01:02.098545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip
19764 23:01:02.099093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip>
19765 23:01:02.132118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip>
19766 23:01:02.132519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip
19768 23:01:02.165544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip
19770 23:01:02.165988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip>
19771 23:01:02.197976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5856 RESULT=pass>
19772 23:01:02.198366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5856 RESULT=pass
19774 23:01:02.229926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip>
19775 23:01:02.230340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip
19777 23:01:02.262133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip
19779 23:01:02.262567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip>
19780 23:01:02.295655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip>
19781 23:01:02.296163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip
19783 23:01:02.329763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5872 RESULT=pass>
19784 23:01:02.330223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5872 RESULT=pass
19786 23:01:02.363335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip>
19787 23:01:02.363800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip
19789 23:01:02.396464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip>
19790 23:01:02.396931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip
19792 23:01:02.428883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip
19794 23:01:02.429409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip>
19795 23:01:02.461430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5888 RESULT=pass
19797 23:01:02.462014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5888 RESULT=pass>
19798 23:01:02.495720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip
19800 23:01:02.496279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip>
19801 23:01:02.528823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip
19803 23:01:02.529385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip>
19804 23:01:02.561226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip>
19805 23:01:02.561696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip
19807 23:01:02.593604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5904 RESULT=pass
19809 23:01:02.594152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5904 RESULT=pass>
19810 23:01:02.625803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip>
19811 23:01:02.626200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip
19813 23:01:02.659622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip>
19814 23:01:02.660013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip
19816 23:01:02.692661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip
19818 23:01:02.693228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip>
19819 23:01:02.725014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5920 RESULT=pass
19821 23:01:02.725642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5920 RESULT=pass>
19822 23:01:02.757182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip>
19823 23:01:02.757656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip
19825 23:01:02.789671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip>
19826 23:01:02.790120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip
19828 23:01:02.821982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip>
19829 23:01:02.822429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip
19831 23:01:02.854488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5936 RESULT=pass>
19832 23:01:02.854968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5936 RESULT=pass
19834 23:01:02.886628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip>
19835 23:01:02.887068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip
19837 23:01:02.918543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip>
19838 23:01:02.918981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip
19840 23:01:02.951283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip>
19841 23:01:02.951683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip
19843 23:01:02.983320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5952 RESULT=pass
19845 23:01:02.983754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5952 RESULT=pass>
19846 23:01:03.023795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip
19848 23:01:03.024230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip>
19849 23:01:03.068698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip
19851 23:01:03.069275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip>
19852 23:01:03.100532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip>
19853 23:01:03.100992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip
19855 23:01:03.132612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5968 RESULT=pass>
19856 23:01:03.133060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5968 RESULT=pass
19858 23:01:03.164032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip>
19859 23:01:03.164474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip
19861 23:01:03.195843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip>
19862 23:01:03.196287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip
19864 23:01:03.228118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip
19866 23:01:03.228732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip>
19867 23:01:03.259493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5984 RESULT=pass>
19868 23:01:03.259922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5984 RESULT=pass
19870 23:01:03.290778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip
19872 23:01:03.291327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip>
19873 23:01:03.322126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip
19875 23:01:03.322718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip>
19876 23:01:03.353607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip
19878 23:01:03.354214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip>
19879 23:01:03.385107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6000 RESULT=pass>
19880 23:01:03.385552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6000 RESULT=pass
19882 23:01:03.416004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip
19884 23:01:03.416538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip>
19885 23:01:03.447877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip
19887 23:01:03.448397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip>
19888 23:01:03.479191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip>
19889 23:01:03.479582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip
19891 23:01:03.509764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6016 RESULT=pass
19893 23:01:03.510278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6016 RESULT=pass>
19894 23:01:03.540477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip
19896 23:01:03.541010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip>
19897 23:01:03.572958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip
19899 23:01:03.573497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip>
19900 23:01:03.604429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip>
19901 23:01:03.604880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip
19903 23:01:03.641517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6032 RESULT=pass>
19904 23:01:03.642001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6032 RESULT=pass
19906 23:01:03.676388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip
19908 23:01:03.676936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip>
19909 23:01:03.708469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip>
19910 23:01:03.708913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip
19912 23:01:03.740933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip>
19913 23:01:03.741386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip
19915 23:01:03.773055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6048 RESULT=pass>
19916 23:01:03.773524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6048 RESULT=pass
19918 23:01:03.805184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip
19920 23:01:03.805740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip>
19921 23:01:03.837424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip>
19922 23:01:03.837901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip
19924 23:01:03.869498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip>
19925 23:01:03.869964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip
19927 23:01:03.902226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6064 RESULT=pass
19929 23:01:03.902794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6064 RESULT=pass>
19930 23:01:03.936553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip>
19931 23:01:03.937039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip
19933 23:01:03.972252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip>
19934 23:01:03.972741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip
19936 23:01:04.005556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip>
19937 23:01:04.006036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip
19939 23:01:04.037556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6080 RESULT=pass
19941 23:01:04.038179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6080 RESULT=pass>
19942 23:01:04.072142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip
19944 23:01:04.072688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip>
19945 23:01:04.104296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip>
19946 23:01:04.104750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip
19948 23:01:04.139413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip>
19949 23:01:04.139796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip
19951 23:01:04.172321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6096 RESULT=pass>
19952 23:01:04.172707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6096 RESULT=pass
19954 23:01:04.204117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip>
19955 23:01:04.204553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip
19957 23:01:04.235905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip>
19958 23:01:04.236336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip
19960 23:01:04.268396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip
19962 23:01:04.269053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip>
19963 23:01:04.300976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6112 RESULT=pass
19965 23:01:04.301556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6112 RESULT=pass>
19966 23:01:04.332650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip>
19967 23:01:04.333086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip
19969 23:01:04.364915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip>
19970 23:01:04.365318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip
19972 23:01:04.397842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip
19974 23:01:04.398284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip>
19975 23:01:04.430618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6128 RESULT=pass>
19976 23:01:04.431034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6128 RESULT=pass
19978 23:01:04.463823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip
19980 23:01:04.464354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip>
19981 23:01:04.495645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip>
19982 23:01:04.496070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip
19984 23:01:04.527929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip
19986 23:01:04.528450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip>
19987 23:01:04.560118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6144 RESULT=pass
19989 23:01:04.560646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6144 RESULT=pass>
19990 23:01:04.592685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip>
19991 23:01:04.593120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip
19993 23:01:04.624933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip>
19994 23:01:04.625381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip
19996 23:01:04.657799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip>
19997 23:01:04.658237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip
19999 23:01:04.689228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6160 RESULT=pass>
20000 23:01:04.689714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6160 RESULT=pass
20002 23:01:04.720646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip>
20003 23:01:04.721109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip
20005 23:01:04.752900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip
20007 23:01:04.753447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip>
20008 23:01:04.784681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip>
20009 23:01:04.785118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip
20011 23:01:04.817894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6176 RESULT=pass
20013 23:01:04.818434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6176 RESULT=pass>
20014 23:01:04.850106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip
20016 23:01:04.850633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip>
20017 23:01:04.883006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip
20019 23:01:04.883448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip>
20020 23:01:04.915061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip
20022 23:01:04.915680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip>
20023 23:01:04.946681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6192 RESULT=pass
20025 23:01:04.947302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6192 RESULT=pass>
20026 23:01:04.981721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip
20028 23:01:04.982351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip>
20029 23:01:05.013723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip>
20030 23:01:05.014179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip
20032 23:01:05.045922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip>
20033 23:01:05.046357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip
20035 23:01:05.077814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6208 RESULT=pass
20037 23:01:05.078267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6208 RESULT=pass>
20038 23:01:05.109436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip>
20039 23:01:05.109898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip
20041 23:01:05.141480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip>
20042 23:01:05.141934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip
20044 23:01:05.173010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip>
20045 23:01:05.173468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip
20047 23:01:05.207366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6224 RESULT=pass
20049 23:01:05.207996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6224 RESULT=pass>
20050 23:01:05.239681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip
20052 23:01:05.240269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip>
20053 23:01:05.273545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip>
20054 23:01:05.274026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip
20056 23:01:05.306855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip
20058 23:01:05.307417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip>
20059 23:01:05.340280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6240 RESULT=pass>
20060 23:01:05.340784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6240 RESULT=pass
20062 23:01:05.374389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip>
20063 23:01:05.374894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip
20065 23:01:05.408848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip
20067 23:01:05.409405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip>
20068 23:01:05.442459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip>
20069 23:01:05.442882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip
20071 23:01:05.475851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6256 RESULT=pass>
20072 23:01:05.476318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6256 RESULT=pass
20074 23:01:05.508794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip
20076 23:01:05.509351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip>
20077 23:01:05.540566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip>
20078 23:01:05.541080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip
20080 23:01:05.572859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip>
20081 23:01:05.573283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip
20083 23:01:05.604195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6272 RESULT=pass>
20084 23:01:05.604626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6272 RESULT=pass
20086 23:01:05.636085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip
20088 23:01:05.636542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip>
20089 23:01:05.668599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip>
20090 23:01:05.669018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip
20092 23:01:05.700830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip
20094 23:01:05.701364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip>
20095 23:01:05.732963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6288 RESULT=pass>
20096 23:01:05.733438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6288 RESULT=pass
20098 23:01:05.765328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip>
20099 23:01:05.765783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip
20101 23:01:05.797227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip>
20102 23:01:05.797673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip
20104 23:01:05.829034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip>
20105 23:01:05.829468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip
20107 23:01:05.861002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6304 RESULT=pass
20109 23:01:05.861564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6304 RESULT=pass>
20110 23:01:05.893185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip>
20111 23:01:05.893637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip
20113 23:01:05.925861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip>
20114 23:01:05.926308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip
20116 23:01:05.957955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip
20118 23:01:05.958495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip>
20119 23:01:05.990620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6320 RESULT=pass
20121 23:01:05.991151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6320 RESULT=pass>
20122 23:01:06.023095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip>
20123 23:01:06.023550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip
20125 23:01:06.056466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip
20127 23:01:06.056993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip>
20128 23:01:06.089239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip>
20129 23:01:06.089681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip
20131 23:01:06.122003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6336 RESULT=pass
20133 23:01:06.122540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6336 RESULT=pass>
20134 23:01:06.154297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip>
20135 23:01:06.154718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip
20137 23:01:06.187352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip>
20138 23:01:06.187766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip
20140 23:01:06.219751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip>
20141 23:01:06.220157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip
20143 23:01:06.256624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6352 RESULT=pass>
20144 23:01:06.257045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6352 RESULT=pass
20146 23:01:06.289322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip>
20147 23:01:06.289771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip
20149 23:01:06.321257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip
20151 23:01:06.321829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip>
20152 23:01:06.353593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip
20154 23:01:06.354155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip>
20155 23:01:06.386048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6368 RESULT=pass
20157 23:01:06.386594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6368 RESULT=pass>
20158 23:01:06.420140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip
20160 23:01:06.420718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip>
20161 23:01:06.454329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip
20163 23:01:06.454806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip>
20164 23:01:06.489883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip
20166 23:01:06.490314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip>
20167 23:01:06.526900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6384 RESULT=pass
20169 23:01:06.527353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6384 RESULT=pass>
20170 23:01:06.565065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip>
20171 23:01:06.565540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip
20173 23:01:06.600290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip
20175 23:01:06.600880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip>
20176 23:01:06.633883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip>
20177 23:01:06.634313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip
20179 23:01:06.668511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6400 RESULT=pass>
20180 23:01:06.668864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6400 RESULT=pass
20182 23:01:06.701561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip>
20183 23:01:06.702022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip
20185 23:01:06.736940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip>
20186 23:01:06.737378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip
20188 23:01:06.773148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip>
20189 23:01:06.773552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip
20191 23:01:06.804981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6416 RESULT=pass
20193 23:01:06.805413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6416 RESULT=pass>
20194 23:01:06.838848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip
20196 23:01:06.839304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip>
20197 23:01:06.872444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip
20199 23:01:06.872881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip>
20200 23:01:06.906866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip
20202 23:01:06.907300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip>
20203 23:01:06.940829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6432 RESULT=pass>
20204 23:01:06.941188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6432 RESULT=pass
20206 23:01:06.973365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip>
20207 23:01:06.973804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip
20209 23:01:07.005129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip
20211 23:01:07.005677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip>
20212 23:01:07.037430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip>
20213 23:01:07.037870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip
20215 23:01:07.069498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6448 RESULT=pass
20217 23:01:07.070035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6448 RESULT=pass>
20218 23:01:07.101666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip>
20219 23:01:07.102100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip
20221 23:01:07.134076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip>
20222 23:01:07.134473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip
20224 23:01:07.165845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip>
20225 23:01:07.166295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip
20227 23:01:07.196880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6464 RESULT=pass>
20228 23:01:07.197360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6464 RESULT=pass
20230 23:01:07.228303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip>
20231 23:01:07.228653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip
20233 23:01:07.259676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip
20235 23:01:07.260105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip>
20236 23:01:07.291647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip
20238 23:01:07.292294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip>
20239 23:01:07.325843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6480 RESULT=pass
20241 23:01:07.326496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6480 RESULT=pass>
20242 23:01:07.357301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip>
20243 23:01:07.357780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip
20245 23:01:07.389450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip
20247 23:01:07.390004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip>
20248 23:01:07.421621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip
20250 23:01:07.422170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip>
20251 23:01:07.453537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6496 RESULT=pass>
20252 23:01:07.453965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6496 RESULT=pass
20254 23:01:07.485434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip>
20255 23:01:07.485858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip
20257 23:01:07.517640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip>
20258 23:01:07.518066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip
20260 23:01:07.549934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip
20262 23:01:07.550513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip>
20263 23:01:07.589433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6512 RESULT=pass>
20264 23:01:07.589895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6512 RESULT=pass
20266 23:01:07.623247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip
20268 23:01:07.623878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip>
20269 23:01:07.656162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip>
20270 23:01:07.656614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip
20272 23:01:07.688492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip>
20273 23:01:07.688924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip
20275 23:01:07.720773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6528 RESULT=pass
20277 23:01:07.721306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6528 RESULT=pass>
20278 23:01:07.753336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip>
20279 23:01:07.753766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip
20281 23:01:07.786960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip
20283 23:01:07.787514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip>
20284 23:01:07.820212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip
20286 23:01:07.820767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip>
20287 23:01:07.852991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6544 RESULT=pass>
20288 23:01:07.853420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6544 RESULT=pass
20290 23:01:07.886099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip>
20291 23:01:07.886559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip
20293 23:01:07.918593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip
20295 23:01:07.919198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip>
20296 23:01:07.951481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip
20298 23:01:07.951938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip>
20299 23:01:07.983494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6560 RESULT=pass>
20300 23:01:07.983909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6560 RESULT=pass
20302 23:01:08.014692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip
20304 23:01:08.015258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip>
20305 23:01:08.047324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip>
20306 23:01:08.047795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip
20308 23:01:08.080953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip>
20309 23:01:08.081402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip
20311 23:01:08.112585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6576 RESULT=pass
20313 23:01:08.113144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6576 RESULT=pass>
20314 23:01:08.165215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip>
20315 23:01:08.165602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip
20317 23:01:08.199454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip>
20318 23:01:08.199864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip
20320 23:01:08.238184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip>
20321 23:01:08.238651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip
20323 23:01:08.270855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6592 RESULT=pass
20325 23:01:08.271435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6592 RESULT=pass>
20326 23:01:08.303270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip
20328 23:01:08.303821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip>
20329 23:01:08.335345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip
20331 23:01:08.335891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip>
20332 23:01:08.367234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip
20334 23:01:08.367856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip>
20335 23:01:08.399645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6608 RESULT=pass>
20336 23:01:08.400109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6608 RESULT=pass
20338 23:01:08.431362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip>
20339 23:01:08.431822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip
20341 23:01:08.463171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip>
20342 23:01:08.463634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip
20344 23:01:08.494525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip
20346 23:01:08.495141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip>
20347 23:01:08.525780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6624 RESULT=pass>
20348 23:01:08.526238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6624 RESULT=pass
20350 23:01:08.557644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip>
20351 23:01:08.558049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip
20353 23:01:08.589503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip
20355 23:01:08.590072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip>
20356 23:01:08.621944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip>
20357 23:01:08.622399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip
20359 23:01:08.656704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6640 RESULT=pass>
20360 23:01:08.657047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6640 RESULT=pass
20362 23:01:08.692236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip
20364 23:01:08.692784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip>
20365 23:01:08.724856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip
20367 23:01:08.725388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip>
20368 23:01:08.757107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip
20370 23:01:08.757634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip>
20371 23:01:08.791253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6656 RESULT=pass>
20372 23:01:08.791743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6656 RESULT=pass
20374 23:01:08.826599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip>
20375 23:01:08.827032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip
20377 23:01:08.859446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip
20379 23:01:08.860048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip>
20380 23:01:08.893329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip>
20381 23:01:08.893788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip
20383 23:01:08.928814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6672 RESULT=pass>
20384 23:01:08.929261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6672 RESULT=pass
20386 23:01:08.964200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip>
20387 23:01:08.964611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip
20389 23:01:09.000102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip
20391 23:01:09.000550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip>
20392 23:01:09.034969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip
20394 23:01:09.035517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip>
20395 23:01:09.067958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6688 RESULT=pass
20397 23:01:09.068546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6688 RESULT=pass>
20398 23:01:09.100295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip>
20399 23:01:09.100737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip
20401 23:01:09.132352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip
20403 23:01:09.132890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip>
20404 23:01:09.165659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip>
20405 23:01:09.166137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip
20407 23:01:09.199496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6704 RESULT=pass>
20408 23:01:09.199962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6704 RESULT=pass
20410 23:01:09.232232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip>
20411 23:01:09.232700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip
20413 23:01:09.265040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip>
20414 23:01:09.265432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip
20416 23:01:09.297586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip
20418 23:01:09.298147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip>
20419 23:01:09.328995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6720 RESULT=pass
20421 23:01:09.329553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6720 RESULT=pass>
20422 23:01:09.360619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip>
20423 23:01:09.361012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip
20425 23:01:09.392251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip>
20426 23:01:09.392643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip
20428 23:01:09.424218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip>
20429 23:01:09.424616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip
20431 23:01:09.456741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6736 RESULT=pass
20433 23:01:09.457174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6736 RESULT=pass>
20434 23:01:09.488980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip
20436 23:01:09.489405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip>
20437 23:01:09.521017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip
20439 23:01:09.521470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip>
20440 23:01:09.552684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip>
20441 23:01:09.553125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip
20443 23:01:09.585162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6752 RESULT=pass>
20444 23:01:09.585560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6752 RESULT=pass
20446 23:01:09.617548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip>
20447 23:01:09.617942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip
20449 23:01:09.648640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip>
20450 23:01:09.649084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip
20452 23:01:09.681634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip>
20453 23:01:09.682114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip
20455 23:01:09.717302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6768 RESULT=pass
20457 23:01:09.717942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6768 RESULT=pass>
20458 23:01:09.748885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip>
20459 23:01:09.749296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip
20461 23:01:09.780697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip
20463 23:01:09.781157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip>
20464 23:01:09.812820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip
20466 23:01:09.813382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip>
20467 23:01:09.843962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6784 RESULT=pass>
20468 23:01:09.844405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6784 RESULT=pass
20470 23:01:09.875459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip>
20471 23:01:09.875899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip
20473 23:01:09.907904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip
20475 23:01:09.908376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip>
20476 23:01:09.939567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip>
20477 23:01:09.940034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip
20479 23:01:09.970731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6800 RESULT=pass
20481 23:01:09.971287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6800 RESULT=pass>
20482 23:01:10.002458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip
20484 23:01:10.003002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip>
20485 23:01:10.033952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip>
20486 23:01:10.034416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip
20488 23:01:10.067694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip
20490 23:01:10.068222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip>
20491 23:01:10.099655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6816 RESULT=pass>
20492 23:01:10.100095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6816 RESULT=pass
20494 23:01:10.134200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip>
20495 23:01:10.134632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip
20497 23:01:10.166707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip
20499 23:01:10.167245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip>
20500 23:01:10.198967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip
20502 23:01:10.199545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip>
20503 23:01:10.231362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6832 RESULT=pass
20505 23:01:10.231888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6832 RESULT=pass>
20506 23:01:10.264490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip
20508 23:01:10.265094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip>
20509 23:01:10.297606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip>
20510 23:01:10.298059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip
20512 23:01:10.341549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip>
20513 23:01:10.342021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip
20515 23:01:10.384579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6848 RESULT=pass>
20516 23:01:10.385016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6848 RESULT=pass
20518 23:01:10.421458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip
20520 23:01:10.422131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip>
20521 23:01:10.457559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip
20523 23:01:10.458155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip>
20524 23:01:10.492658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip>
20525 23:01:10.493148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip
20527 23:01:10.527784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6864 RESULT=pass
20529 23:01:10.528350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6864 RESULT=pass>
20530 23:01:10.559862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip>
20531 23:01:10.560319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip
20533 23:01:10.592279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip>
20534 23:01:10.592729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip
20536 23:01:10.624659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip
20538 23:01:10.625212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip>
20539 23:01:10.655952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6880 RESULT=pass>
20540 23:01:10.656417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6880 RESULT=pass
20542 23:01:10.687759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip>
20543 23:01:10.688229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip
20545 23:01:10.720360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip
20547 23:01:10.720910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip>
20548 23:01:10.752125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip
20550 23:01:10.752667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip>
20551 23:01:10.786550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6896 RESULT=pass
20553 23:01:10.787003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6896 RESULT=pass>
20554 23:01:10.819234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip>
20555 23:01:10.819649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip
20557 23:01:10.851014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip
20559 23:01:10.851453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip>
20560 23:01:10.883414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip
20562 23:01:10.883879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip>
20563 23:01:10.915431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6912 RESULT=pass
20565 23:01:10.915884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6912 RESULT=pass>
20566 23:01:10.946868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip
20568 23:01:10.947435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip>
20569 23:01:10.979549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip>
20570 23:01:10.979985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip
20572 23:01:11.011414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip>
20573 23:01:11.011858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip
20575 23:01:11.042357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6928 RESULT=pass>
20576 23:01:11.042749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6928 RESULT=pass
20578 23:01:11.073662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip>
20579 23:01:11.074052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip
20581 23:01:11.104922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip>
20582 23:01:11.105315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip
20584 23:01:11.137262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip>
20585 23:01:11.137696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip
20587 23:01:11.169713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6944 RESULT=pass>
20588 23:01:11.170220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6944 RESULT=pass
20590 23:01:11.202008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip>
20591 23:01:11.202478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip
20593 23:01:11.233832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip
20595 23:01:11.234382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip>
20596 23:01:11.265144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip
20598 23:01:11.265699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip>
20599 23:01:11.296566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6960 RESULT=pass>
20600 23:01:11.297019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6960 RESULT=pass
20602 23:01:11.328673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip
20604 23:01:11.329281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip>
20605 23:01:11.360842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip
20607 23:01:11.361382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip>
20608 23:01:11.393219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip>
20609 23:01:11.393691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip
20611 23:01:11.427299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6976 RESULT=pass>
20612 23:01:11.427789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6976 RESULT=pass
20614 23:01:11.464225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip
20616 23:01:11.464837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip>
20617 23:01:11.501950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip>
20618 23:01:11.502371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip
20620 23:01:11.537212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip>
20621 23:01:11.537692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip
20623 23:01:11.573254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6992 RESULT=pass>
20624 23:01:11.573677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6992 RESULT=pass
20626 23:01:11.612732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip
20628 23:01:11.613184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip>
20629 23:01:11.645208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip
20631 23:01:11.645644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip>
20632 23:01:11.678926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip
20634 23:01:11.679363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip>
20635 23:01:11.711810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7008 RESULT=pass
20637 23:01:11.712242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7008 RESULT=pass>
20638 23:01:11.744275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip>
20639 23:01:11.744666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip
20641 23:01:11.778087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip>
20642 23:01:11.778574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip
20644 23:01:11.811715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip
20646 23:01:11.812254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip>
20647 23:01:11.844691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7024 RESULT=pass>
20648 23:01:11.845168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7024 RESULT=pass
20650 23:01:11.877815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip>
20651 23:01:11.878266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip
20653 23:01:11.910323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip>
20654 23:01:11.910775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip
20656 23:01:11.952565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip>
20657 23:01:11.953048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip
20659 23:01:11.986078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7040 RESULT=pass
20661 23:01:11.986637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7040 RESULT=pass>
20662 23:01:12.018932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip
20664 23:01:12.019469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip>
20665 23:01:12.053412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip>
20666 23:01:12.053842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip
20668 23:01:12.086431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip>
20669 23:01:12.086845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip
20671 23:01:12.119439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7056 RESULT=pass>
20672 23:01:12.119907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7056 RESULT=pass
20674 23:01:12.150720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip>
20675 23:01:12.151189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip
20677 23:01:12.182212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip>
20678 23:01:12.182676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip
20680 23:01:12.214590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip
20682 23:01:12.215157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip>
20683 23:01:12.246590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7072 RESULT=pass>
20684 23:01:12.247044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7072 RESULT=pass
20686 23:01:12.279012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip
20688 23:01:12.279476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip>
20689 23:01:12.311632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip>
20690 23:01:12.312068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip
20692 23:01:12.344055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip>
20693 23:01:12.344470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip
20695 23:01:12.375897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7088 RESULT=pass>
20696 23:01:12.376332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7088 RESULT=pass
20698 23:01:12.413370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip
20700 23:01:12.413947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip>
20701 23:01:12.445687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip>
20702 23:01:12.446138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip
20704 23:01:12.477563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip>
20705 23:01:12.477983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip
20707 23:01:12.509141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7104 RESULT=pass>
20708 23:01:12.509583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7104 RESULT=pass
20710 23:01:12.541196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip>
20711 23:01:12.541607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip
20713 23:01:12.573130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip>
20714 23:01:12.573546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip
20716 23:01:12.604910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip
20718 23:01:12.605355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip>
20719 23:01:12.636880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7120 RESULT=pass
20721 23:01:12.637347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7120 RESULT=pass>
20722 23:01:12.668083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip>
20723 23:01:12.668499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip
20725 23:01:12.699859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip>
20726 23:01:12.700245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip
20728 23:01:12.731663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip
20730 23:01:12.732226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip>
20731 23:01:12.762654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7136 RESULT=pass
20733 23:01:12.763203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7136 RESULT=pass>
20734 23:01:12.795888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip>
20735 23:01:12.796279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip
20737 23:01:12.827974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip>
20738 23:01:12.828419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip
20740 23:01:12.860126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip>
20741 23:01:12.860574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip
20743 23:01:12.892947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7152 RESULT=pass
20745 23:01:12.893505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7152 RESULT=pass>
20746 23:01:12.925254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip>
20747 23:01:12.925681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip
20749 23:01:12.958008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip>
20750 23:01:12.958420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip
20752 23:01:12.990401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip>
20753 23:01:12.990825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip
20755 23:01:13.022071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7168 RESULT=pass
20757 23:01:13.022531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7168 RESULT=pass>
20758 23:01:13.054076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip
20760 23:01:13.054546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip>
20761 23:01:13.086399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip>
20762 23:01:13.086810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip
20764 23:01:13.118288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip
20766 23:01:13.118751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip>
20767 23:01:13.149726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7184 RESULT=pass>
20768 23:01:13.150198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7184 RESULT=pass
20770 23:01:13.181959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip>
20771 23:01:13.182414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip
20773 23:01:13.213689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip
20775 23:01:13.214229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip>
20776 23:01:13.246551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip>
20777 23:01:13.247007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip
20779 23:01:13.301068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7200 RESULT=pass>
20780 23:01:13.301499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7200 RESULT=pass
20782 23:01:13.333059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip>
20783 23:01:13.333488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip
20785 23:01:13.370350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip>
20786 23:01:13.370807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip
20788 23:01:13.406134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip>
20789 23:01:13.406590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip
20791 23:01:13.439157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7216 RESULT=pass
20793 23:01:13.439713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7216 RESULT=pass>
20794 23:01:13.472127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip>
20795 23:01:13.472529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip
20797 23:01:13.505626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip>
20798 23:01:13.506073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip
20800 23:01:13.539483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip>
20801 23:01:13.539860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip
20803 23:01:13.571723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7232 RESULT=pass
20805 23:01:13.572182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7232 RESULT=pass>
20806 23:01:13.603893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip>
20807 23:01:13.604272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip
20809 23:01:13.636496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip
20811 23:01:13.637057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip>
20812 23:01:13.668607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip
20814 23:01:13.669158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip>
20815 23:01:13.703860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7248 RESULT=pass
20817 23:01:13.704360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7248 RESULT=pass>
20818 23:01:13.736950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip>
20819 23:01:13.737425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip
20821 23:01:13.769197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip
20823 23:01:13.769851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip>
20824 23:01:13.801137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip
20826 23:01:13.801786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip>
20827 23:01:13.832680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7264 RESULT=pass>
20828 23:01:13.833149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7264 RESULT=pass
20830 23:01:13.864253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip
20832 23:01:13.864791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip>
20833 23:01:13.895904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip
20835 23:01:13.896444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip>
20836 23:01:13.927819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip>
20837 23:01:13.928263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip
20839 23:01:13.959969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7280 RESULT=pass>
20840 23:01:13.960416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7280 RESULT=pass
20842 23:01:13.991834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip
20844 23:01:13.992389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip>
20845 23:01:14.023967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip>
20846 23:01:14.024378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip
20848 23:01:14.056587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip
20850 23:01:14.057048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip>
20851 23:01:14.087967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7296 RESULT=pass
20853 23:01:14.088407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7296 RESULT=pass>
20854 23:01:14.120102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip>
20855 23:01:14.120508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip
20857 23:01:14.152952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip>
20858 23:01:14.153397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip
20860 23:01:14.185121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip
20862 23:01:14.185661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip>
20863 23:01:14.216880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7312 RESULT=pass
20865 23:01:14.217420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7312 RESULT=pass>
20866 23:01:14.249465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip>
20867 23:01:14.249927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip
20869 23:01:14.280831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip
20871 23:01:14.281391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip>
20872 23:01:14.313238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip
20874 23:01:14.313803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip>
20875 23:01:14.345394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7328 RESULT=pass
20877 23:01:14.346041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7328 RESULT=pass>
20878 23:01:14.380604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip>
20879 23:01:14.381024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip
20881 23:01:14.419952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip>
20882 23:01:14.420415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip
20884 23:01:14.457174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip
20886 23:01:14.457624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip>
20887 23:01:14.490567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7344 RESULT=pass
20889 23:01:14.491016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7344 RESULT=pass>
20890 23:01:14.522210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip>
20891 23:01:14.522617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip
20893 23:01:14.553807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip
20895 23:01:14.554255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip>
20896 23:01:14.584977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip>
20897 23:01:14.585422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip
20899 23:01:14.616067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7360 RESULT=pass
20901 23:01:14.616624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7360 RESULT=pass>
20902 23:01:14.647951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip>
20903 23:01:14.648399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip
20905 23:01:14.680965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip>
20906 23:01:14.681443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip
20908 23:01:14.713637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip>
20909 23:01:14.714115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip
20911 23:01:14.748792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7376 RESULT=pass>
20912 23:01:14.749371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7376 RESULT=pass
20914 23:01:14.783767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip
20916 23:01:14.784307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip>
20917 23:01:14.822843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip
20919 23:01:14.823295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip>
20920 23:01:14.854385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip>
20921 23:01:14.854770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip
20923 23:01:14.885704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7392 RESULT=pass>
20924 23:01:14.886087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7392 RESULT=pass
20926 23:01:14.916442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip>
20927 23:01:14.916828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip
20929 23:01:14.948299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip
20931 23:01:14.948918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip>
20932 23:01:14.980090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip>
20933 23:01:14.980547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip
20935 23:01:15.012128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7408 RESULT=pass
20937 23:01:15.012673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7408 RESULT=pass>
20938 23:01:15.044464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip>
20939 23:01:15.044911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip
20941 23:01:15.076164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip>
20942 23:01:15.076591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip
20944 23:01:15.109552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip>
20945 23:01:15.110003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip
20947 23:01:15.141095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7424 RESULT=pass
20949 23:01:15.141622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7424 RESULT=pass>
20950 23:01:15.173044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip
20952 23:01:15.173582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip>
20953 23:01:15.205560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip>
20954 23:01:15.205996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip
20956 23:01:15.238655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip
20958 23:01:15.239105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip>
20959 23:01:15.270563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7440 RESULT=pass
20961 23:01:15.271116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7440 RESULT=pass>
20962 23:01:15.302459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip
20964 23:01:15.303004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip>
20965 23:01:15.335239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip>
20966 23:01:15.335670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip
20968 23:01:15.367156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip>
20969 23:01:15.367702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip
20971 23:01:15.398568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7456 RESULT=pass
20973 23:01:15.399104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7456 RESULT=pass>
20974 23:01:15.430373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip>
20975 23:01:15.430810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip
20977 23:01:15.466069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip>
20978 23:01:15.466523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip
20980 23:01:15.498358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip>
20981 23:01:15.498749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip
20983 23:01:15.531867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7472 RESULT=pass
20985 23:01:15.532403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7472 RESULT=pass>
20986 23:01:15.563794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip>
20987 23:01:15.564230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip
20989 23:01:15.595279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip>
20990 23:01:15.595719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip
20992 23:01:15.626675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip
20994 23:01:15.627270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip>
20995 23:01:15.658538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7488 RESULT=pass>
20996 23:01:15.658980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7488 RESULT=pass
20998 23:01:15.690003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip
21000 23:01:15.690515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip>
21001 23:01:15.722043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip>
21002 23:01:15.722472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip
21004 23:01:15.753980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip>
21005 23:01:15.754414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip
21007 23:01:15.786299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7504 RESULT=pass>
21008 23:01:15.786693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7504 RESULT=pass
21010 23:01:15.817932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip>
21011 23:01:15.818315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip
21013 23:01:15.849605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip>
21014 23:01:15.850060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip
21016 23:01:15.881242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip>
21017 23:01:15.881672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip
21019 23:01:15.912898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7520 RESULT=pass>
21020 23:01:15.913322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7520 RESULT=pass
21022 23:01:15.944433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip>
21023 23:01:15.944875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip
21025 23:01:15.976399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip>
21026 23:01:15.976842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip
21028 23:01:16.008432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip>
21029 23:01:16.008894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip
21031 23:01:16.042257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7536 RESULT=pass
21033 23:01:16.042825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7536 RESULT=pass>
21034 23:01:16.074221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip
21036 23:01:16.074761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip>
21037 23:01:16.106322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip
21039 23:01:16.106851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip>
21040 23:01:16.138447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip>
21041 23:01:16.138904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip
21043 23:01:16.170563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7552 RESULT=pass>
21044 23:01:16.171006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7552 RESULT=pass
21046 23:01:16.202901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip
21048 23:01:16.203474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip>
21049 23:01:16.236472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip
21051 23:01:16.236909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip>
21052 23:01:16.268880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip>
21053 23:01:16.269275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip
21055 23:01:16.300736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7568 RESULT=pass>
21056 23:01:16.301195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7568 RESULT=pass
21058 23:01:16.332780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip>
21059 23:01:16.333185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip
21061 23:01:16.365796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip>
21062 23:01:16.366252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip
21064 23:01:16.398781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip
21066 23:01:16.399340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip>
21067 23:01:16.433989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7584 RESULT=pass
21069 23:01:16.434549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7584 RESULT=pass>
21070 23:01:16.470084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip>
21071 23:01:16.470513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip
21073 23:01:16.504229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip>
21074 23:01:16.504640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip
21076 23:01:16.538984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip
21078 23:01:16.539474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip>
21079 23:01:16.573653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7600 RESULT=pass
21081 23:01:16.574105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7600 RESULT=pass>
21082 23:01:16.607586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip>
21083 23:01:16.607947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip
21085 23:01:16.642243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip
21087 23:01:16.642820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip>
21088 23:01:16.674532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip
21090 23:01:16.675084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip>
21091 23:01:16.706044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7616 RESULT=pass
21093 23:01:16.706564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7616 RESULT=pass>
21094 23:01:16.739913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip>
21095 23:01:16.740386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip
21097 23:01:16.772870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip
21099 23:01:16.773416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip>
21100 23:01:16.806376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip
21102 23:01:16.806918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip>
21103 23:01:16.840657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7632 RESULT=pass
21105 23:01:16.841212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7632 RESULT=pass>
21106 23:01:16.872454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip>
21107 23:01:16.872888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip
21109 23:01:16.904532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip>
21110 23:01:16.904966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip
21112 23:01:16.936081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip
21114 23:01:16.936613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip>
21115 23:01:16.967633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7648 RESULT=pass>
21116 23:01:16.968089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7648 RESULT=pass
21118 23:01:16.999671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip>
21119 23:01:17.000118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip
21121 23:01:17.031647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip>
21122 23:01:17.032101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip
21124 23:01:17.063416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip>
21125 23:01:17.063873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip
21127 23:01:17.095751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7664 RESULT=pass>
21128 23:01:17.096213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7664 RESULT=pass
21130 23:01:17.127915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip>
21131 23:01:17.128308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip
21133 23:01:17.159979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip
21135 23:01:17.160524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip>
21136 23:01:17.191763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip>
21137 23:01:17.192203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip
21139 23:01:17.222512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7680 RESULT=pass>
21140 23:01:17.222955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7680 RESULT=pass
21142 23:01:17.253917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip>
21143 23:01:17.254372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip
21145 23:01:17.286138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip>
21146 23:01:17.286585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip
21148 23:01:17.317617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip
21150 23:01:17.318161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip>
21151 23:01:17.348951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7696 RESULT=pass
21153 23:01:17.349476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7696 RESULT=pass>
21154 23:01:17.380647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip
21156 23:01:17.381176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip>
21157 23:01:17.412289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip>
21158 23:01:17.412749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip
21160 23:01:17.444351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip>
21161 23:01:17.444793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip
21163 23:01:17.475813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7712 RESULT=pass
21165 23:01:17.476351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7712 RESULT=pass>
21166 23:01:17.507302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip>
21167 23:01:17.507741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip
21169 23:01:17.538930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip
21171 23:01:17.539478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip>
21172 23:01:17.570316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip>
21173 23:01:17.570768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip
21175 23:01:17.602109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7728 RESULT=pass
21177 23:01:17.602540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7728 RESULT=pass>
21178 23:01:17.633974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip
21180 23:01:17.634398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip>
21181 23:01:17.665945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip>
21182 23:01:17.666329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip
21184 23:01:17.697448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip>
21185 23:01:17.697844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip
21187 23:01:17.729073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7744 RESULT=pass
21189 23:01:17.729488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7744 RESULT=pass>
21190 23:01:17.760920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip>
21191 23:01:17.761298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip
21193 23:01:17.792792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip>
21194 23:01:17.793166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip
21196 23:01:17.825175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip>
21197 23:01:17.825672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip
21199 23:01:17.857475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7760 RESULT=pass
21201 23:01:17.857838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7760 RESULT=pass>
21202 23:01:17.889564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip>
21203 23:01:17.890033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip
21205 23:01:17.921713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip>
21206 23:01:17.922162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip
21208 23:01:17.954060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip>
21209 23:01:17.954496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip
21211 23:01:17.986609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7776 RESULT=pass
21213 23:01:17.987146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7776 RESULT=pass>
21214 23:01:18.019015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip
21216 23:01:18.019556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip>
21217 23:01:18.054904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip
21219 23:01:18.055361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip>
21220 23:01:18.086631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip>
21221 23:01:18.087132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip
21223 23:01:18.118760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7792 RESULT=pass
21225 23:01:18.119391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7792 RESULT=pass>
21226 23:01:18.151533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip>
21227 23:01:18.151949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip
21229 23:01:18.183744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip
21231 23:01:18.184290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip>
21232 23:01:18.215878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip>
21233 23:01:18.216344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip
21235 23:01:18.247832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7808 RESULT=pass>
21236 23:01:18.248298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7808 RESULT=pass
21238 23:01:18.280375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip
21240 23:01:18.280833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip>
21241 23:01:18.313316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip>
21242 23:01:18.313751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip
21244 23:01:18.345861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip>
21245 23:01:18.346311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip
21247 23:01:18.392591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7824 RESULT=pass>
21248 23:01:18.392992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7824 RESULT=pass
21250 23:01:18.435942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip>
21251 23:01:18.436356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip
21253 23:01:18.467811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip
21255 23:01:18.468269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip>
21256 23:01:18.499876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip
21258 23:01:18.500224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip>
21259 23:01:18.535360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7840 RESULT=pass>
21260 23:01:18.535701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7840 RESULT=pass
21262 23:01:18.570342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip>
21263 23:01:18.570682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip
21265 23:01:18.606052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip>
21266 23:01:18.606426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip
21268 23:01:18.640922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip>
21269 23:01:18.641377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip
21271 23:01:18.676129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7856 RESULT=pass>
21272 23:01:18.676542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7856 RESULT=pass
21274 23:01:18.711824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip
21276 23:01:18.712277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip>
21277 23:01:18.747274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip>
21278 23:01:18.747692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip
21280 23:01:18.782263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip>
21281 23:01:18.782830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip
21283 23:01:18.818930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7872 RESULT=pass
21285 23:01:18.819484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7872 RESULT=pass>
21286 23:01:18.854459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip>
21287 23:01:18.854882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip
21289 23:01:18.892166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip
21291 23:01:18.892611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip>
21292 23:01:18.928177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip>
21293 23:01:18.928587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip
21295 23:01:18.964817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7888 RESULT=pass
21297 23:01:18.965339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7888 RESULT=pass>
21298 23:01:18.999993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip>
21299 23:01:19.000334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip
21301 23:01:19.035402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip>
21302 23:01:19.035751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip
21304 23:01:19.070314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip>
21305 23:01:19.070655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip
21307 23:01:19.105356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7904 RESULT=pass
21309 23:01:19.105799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7904 RESULT=pass>
21310 23:01:19.141154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip>
21311 23:01:19.141562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip
21313 23:01:19.176554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip>
21314 23:01:19.176980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip
21316 23:01:19.211860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip>
21317 23:01:19.212219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip
21319 23:01:19.248119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7920 RESULT=pass>
21320 23:01:19.248566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7920 RESULT=pass
21322 23:01:19.283863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip>
21323 23:01:19.284318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip
21325 23:01:19.319580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip
21327 23:01:19.320153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip>
21328 23:01:19.354938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip
21330 23:01:19.355587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip>
21331 23:01:19.390207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7936 RESULT=pass
21333 23:01:19.390837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7936 RESULT=pass>
21334 23:01:19.425468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip
21336 23:01:19.426087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip>
21337 23:01:19.461124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip>
21338 23:01:19.461552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip
21340 23:01:19.496182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip>
21341 23:01:19.496619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip
21343 23:01:19.531585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7952 RESULT=pass
21345 23:01:19.532124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7952 RESULT=pass>
21346 23:01:19.567008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip
21348 23:01:19.567360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip>
21349 23:01:19.602373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip
21351 23:01:19.602936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip>
21352 23:01:19.638070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip
21354 23:01:19.638628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip>
21355 23:01:19.672962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7968 RESULT=pass
21357 23:01:19.673513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7968 RESULT=pass>
21358 23:01:19.708147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip>
21359 23:01:19.708575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip
21361 23:01:19.743088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip>
21362 23:01:19.743515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip
21364 23:01:19.774430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip
21366 23:01:19.774966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip>
21367 23:01:19.804979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7984 RESULT=pass>
21368 23:01:19.805387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7984 RESULT=pass
21370 23:01:19.836630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip>
21371 23:01:19.837027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip
21373 23:01:19.868142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip
21375 23:01:19.868755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip>
21376 23:01:19.899931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip
21378 23:01:19.900477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip>
21379 23:01:19.931415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8000 RESULT=pass
21381 23:01:19.931966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8000 RESULT=pass>
21382 23:01:19.962649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip
21384 23:01:19.963287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip>
21385 23:01:19.994322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip>
21386 23:01:19.994785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip
21388 23:01:20.025631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip>
21389 23:01:20.026087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip
21391 23:01:20.057495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8016 RESULT=pass
21393 23:01:20.058042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8016 RESULT=pass>
21394 23:01:20.088697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip
21396 23:01:20.089250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip>
21397 23:01:20.121999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip
21399 23:01:20.122582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip>
21400 23:01:20.152839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip
21402 23:01:20.153397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip>
21403 23:01:20.183887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8032 RESULT=pass>
21404 23:01:20.184351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8032 RESULT=pass
21406 23:01:20.215728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip>
21407 23:01:20.216205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip
21409 23:01:20.249404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip
21411 23:01:20.250001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip>
21412 23:01:20.281042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip>
21413 23:01:20.281517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip
21415 23:01:20.313826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8048 RESULT=pass
21417 23:01:20.314373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8048 RESULT=pass>
21418 23:01:20.346198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip>
21419 23:01:20.346663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip
21421 23:01:20.378267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip>
21422 23:01:20.378730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip
21424 23:01:20.415617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip
21426 23:01:20.416155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip>
21427 23:01:20.464995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8064 RESULT=pass>
21428 23:01:20.465505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8064 RESULT=pass
21430 23:01:20.499542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip>
21431 23:01:20.499979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip
21433 23:01:20.532855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip>
21434 23:01:20.533300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip
21436 23:01:20.564586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip>
21437 23:01:20.564972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip
21439 23:01:20.595671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8080 RESULT=pass
21441 23:01:20.596235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8080 RESULT=pass>
21442 23:01:20.627463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip
21444 23:01:20.628035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip>
21445 23:01:20.659313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip
21447 23:01:20.659890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip>
21448 23:01:20.691266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip
21450 23:01:20.691845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip>
21451 23:01:20.722466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8096 RESULT=pass>
21452 23:01:20.722916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8096 RESULT=pass
21454 23:01:20.753460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip>
21455 23:01:20.753915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip
21457 23:01:20.785123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip
21459 23:01:20.785638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip>
21460 23:01:20.816752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip>
21461 23:01:20.817193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip
21463 23:01:20.848896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8112 RESULT=pass
21465 23:01:20.849422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8112 RESULT=pass>
21466 23:01:20.880973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip>
21467 23:01:20.881413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip
21469 23:01:20.912736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip>
21470 23:01:20.913155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip
21472 23:01:20.944594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip>
21473 23:01:20.944974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip
21475 23:01:20.976137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8128 RESULT=pass>
21476 23:01:20.976592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8128 RESULT=pass
21478 23:01:21.008410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip>
21479 23:01:21.008847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip
21481 23:01:21.040724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip
21483 23:01:21.041347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip>
21484 23:01:21.073447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip>
21485 23:01:21.073913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip
21487 23:01:21.106161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8144 RESULT=pass
21489 23:01:21.106726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8144 RESULT=pass>
21490 23:01:21.137970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip>
21491 23:01:21.138412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip
21493 23:01:21.169201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip>
21494 23:01:21.169644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip
21496 23:01:21.200578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip>
21497 23:01:21.201025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip
21499 23:01:21.232287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8160 RESULT=pass
21501 23:01:21.232826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8160 RESULT=pass>
21502 23:01:21.266413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip
21504 23:01:21.266976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip>
21505 23:01:21.300624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip>
21506 23:01:21.301067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip
21508 23:01:21.334302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip>
21509 23:01:21.334809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip
21511 23:01:21.369022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8176 RESULT=pass>
21512 23:01:21.369455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8176 RESULT=pass
21514 23:01:21.403670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip
21516 23:01:21.404219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip>
21517 23:01:21.437477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip>
21518 23:01:21.437921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip
21520 23:01:21.472063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip>
21521 23:01:21.472546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip
21523 23:01:21.505900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8192 RESULT=pass>
21524 23:01:21.506324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8192 RESULT=pass
21526 23:01:21.541209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip>
21527 23:01:21.541618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip
21529 23:01:21.575926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip>
21530 23:01:21.576313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip
21532 23:01:21.608268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip>
21533 23:01:21.608737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip
21535 23:01:21.640556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 RESULT=pass>
21536 23:01:21.641023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 RESULT=pass
21538 23:01:21.672980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state RESULT=pass
21540 23:01:21.673533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state RESULT=pass>
21541 23:01:21.705662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set RESULT=pass
21543 23:01:21.706219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set RESULT=pass>
21544 23:01:21.738348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass>
21545 23:01:21.738803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass
21547 23:01:21.772176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_16 RESULT=pass
21549 23:01:21.772804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_16 RESULT=pass>
21550 23:01:21.803807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 RESULT=pass>
21551 23:01:21.804277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 RESULT=pass
21553 23:01:21.835843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 RESULT=pass>
21554 23:01:21.836304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 RESULT=pass
21556 23:01:21.867795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 RESULT=pass>
21557 23:01:21.868240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 RESULT=pass
21559 23:01:21.899834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_32 RESULT=pass>
21560 23:01:21.900280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_32 RESULT=pass
21562 23:01:21.931824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 RESULT=pass
21564 23:01:21.932374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 RESULT=pass>
21565 23:01:21.964251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 RESULT=pass>
21566 23:01:21.964705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 RESULT=pass
21568 23:01:21.996204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 RESULT=pass>
21569 23:01:21.996642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 RESULT=pass
21571 23:01:22.028992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_48 RESULT=pass>
21572 23:01:22.029465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_48 RESULT=pass
21574 23:01:22.061857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip>
21575 23:01:22.062311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip
21577 23:01:22.093569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip>
21578 23:01:22.094042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip
21580 23:01:22.125786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip
21582 23:01:22.126403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip>
21583 23:01:22.158060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_64 RESULT=pass>
21584 23:01:22.158536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_64 RESULT=pass
21586 23:01:22.189926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 RESULT=pass>
21587 23:01:22.190391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 RESULT=pass
21589 23:01:22.221883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 RESULT=pass>
21590 23:01:22.222336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 RESULT=pass
21592 23:01:22.254249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 RESULT=pass>
21593 23:01:22.254766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 RESULT=pass
21595 23:01:22.286103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_80 RESULT=pass
21597 23:01:22.286661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_80 RESULT=pass>
21598 23:01:22.318086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip>
21599 23:01:22.318547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip
21601 23:01:22.350024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip>
21602 23:01:22.350497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip
21604 23:01:22.381693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip>
21605 23:01:22.382144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip
21607 23:01:22.414371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_96 RESULT=pass
21609 23:01:22.414927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_96 RESULT=pass>
21610 23:01:22.445558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip
21612 23:01:22.446114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip>
21613 23:01:22.480901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip>
21614 23:01:22.481408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip
21616 23:01:22.512913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip>
21617 23:01:22.513399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip
21619 23:01:22.546135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_112 RESULT=pass
21621 23:01:22.546765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_112 RESULT=pass>
21622 23:01:22.577738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip>
21623 23:01:22.578208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip
21625 23:01:22.611397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip>
21626 23:01:22.611855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip
21628 23:01:22.643874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip>
21629 23:01:22.644327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip
21631 23:01:22.676905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_128 RESULT=pass
21633 23:01:22.677511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_128 RESULT=pass>
21634 23:01:22.708822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 RESULT=pass>
21635 23:01:22.709272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 RESULT=pass
21637 23:01:22.740818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 RESULT=pass
21639 23:01:22.741327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 RESULT=pass>
21640 23:01:22.772590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 RESULT=pass>
21641 23:01:22.773010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 RESULT=pass
21643 23:01:22.804054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_144 RESULT=pass>
21644 23:01:22.804484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_144 RESULT=pass
21646 23:01:22.835954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip>
21647 23:01:22.836392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip
21649 23:01:22.868652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip>
21650 23:01:22.869093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip
21652 23:01:22.904195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip>
21653 23:01:22.904645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip
21655 23:01:22.936454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_160 RESULT=pass
21657 23:01:22.937011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_160 RESULT=pass>
21658 23:01:22.968877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip>
21659 23:01:22.969332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip
21661 23:01:23.000991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip>
21662 23:01:23.001459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip
21664 23:01:23.032675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip>
21665 23:01:23.033083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip
21667 23:01:23.063878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_176 RESULT=pass
21669 23:01:23.064300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_176 RESULT=pass>
21670 23:01:23.095951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip>
21671 23:01:23.096361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip
21673 23:01:23.127830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip>
21674 23:01:23.128258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip
21676 23:01:23.159906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip>
21677 23:01:23.160442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip
21679 23:01:23.191943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_192 RESULT=pass
21681 23:01:23.192570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_192 RESULT=pass>
21682 23:01:23.223518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip>
21683 23:01:23.223973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip
21685 23:01:23.256242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip>
21686 23:01:23.256722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip
21688 23:01:23.287755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip>
21689 23:01:23.288198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip
21691 23:01:23.318212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_208 RESULT=pass
21693 23:01:23.318745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_208 RESULT=pass>
21694 23:01:23.348862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip>
21695 23:01:23.349287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip
21697 23:01:23.379715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip>
21698 23:01:23.380137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip
21700 23:01:23.410523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip>
21701 23:01:23.410952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip
21703 23:01:23.441868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_224 RESULT=pass>
21704 23:01:23.442302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_224 RESULT=pass
21706 23:01:23.472836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip>
21707 23:01:23.473221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip
21709 23:01:23.520935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip>
21710 23:01:23.521423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip
21712 23:01:23.561542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip>
21713 23:01:23.561994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip
21715 23:01:23.592896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_240 RESULT=pass>
21716 23:01:23.593284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_240 RESULT=pass
21718 23:01:23.624350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip
21720 23:01:23.624976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip>
21721 23:01:23.656952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip>
21722 23:01:23.657443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip
21724 23:01:23.688562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip>
21725 23:01:23.689061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip
21727 23:01:23.720441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_256 RESULT=pass>
21728 23:01:23.720947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_256 RESULT=pass
21730 23:01:23.752104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 RESULT=pass>
21731 23:01:23.752534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 RESULT=pass
21733 23:01:23.783877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 RESULT=pass>
21734 23:01:23.784295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 RESULT=pass
21736 23:01:23.816339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 RESULT=pass>
21737 23:01:23.816810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 RESULT=pass
21739 23:01:23.847923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_272 RESULT=pass>
21740 23:01:23.848368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_272 RESULT=pass
21742 23:01:23.879088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip
21744 23:01:23.879664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip>
21745 23:01:23.910409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip
21747 23:01:23.911004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip>
21748 23:01:23.942021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip
21750 23:01:23.942723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip>
21751 23:01:23.972889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_288 RESULT=pass
21753 23:01:23.973442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_288 RESULT=pass>
21754 23:01:24.003906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip>
21755 23:01:24.004323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip
21757 23:01:24.035810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip>
21758 23:01:24.036223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip
21760 23:01:24.067842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip>
21761 23:01:24.068248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip
21763 23:01:24.099089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_304 RESULT=pass>
21764 23:01:24.099508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_304 RESULT=pass
21766 23:01:24.130706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip
21768 23:01:24.131149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip>
21769 23:01:24.162013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip
21771 23:01:24.162456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip>
21772 23:01:24.193060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip>
21773 23:01:24.193518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip
21775 23:01:24.225440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_320 RESULT=pass>
21776 23:01:24.225869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_320 RESULT=pass
21778 23:01:24.257018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip>
21779 23:01:24.257487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip
21781 23:01:24.288197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip>
21782 23:01:24.288667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip
21784 23:01:24.319607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip>
21785 23:01:24.320044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip
21787 23:01:24.350460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_336 RESULT=pass>
21788 23:01:24.350945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_336 RESULT=pass
21790 23:01:24.381720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip>
21791 23:01:24.382180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip
21793 23:01:24.413310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip>
21794 23:01:24.413771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip
21796 23:01:24.445175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip>
21797 23:01:24.445625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip
21799 23:01:24.476776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_352 RESULT=pass
21801 23:01:24.477398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_352 RESULT=pass>
21802 23:01:24.508107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip>
21803 23:01:24.508558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip
21805 23:01:24.540105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip>
21806 23:01:24.540544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip
21808 23:01:24.572642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip>
21809 23:01:24.573104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip
21811 23:01:24.605096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_368 RESULT=pass>
21812 23:01:24.605569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_368 RESULT=pass
21814 23:01:24.636679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip>
21815 23:01:24.637122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip
21817 23:01:24.669207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip
21819 23:01:24.669786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip>
21820 23:01:24.701410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip
21822 23:01:24.701862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip>
21823 23:01:24.733089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_384 RESULT=pass
21825 23:01:24.733520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_384 RESULT=pass>
21826 23:01:24.764842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip>
21827 23:01:24.765305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip
21829 23:01:24.796493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip>
21830 23:01:24.796956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip
21832 23:01:24.830582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip>
21833 23:01:24.831084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip
21835 23:01:24.864308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_400 RESULT=pass>
21836 23:01:24.864788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_400 RESULT=pass
21838 23:01:24.897059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip>
21839 23:01:24.897528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip
21841 23:01:24.929584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip
21843 23:01:24.930044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip>
21844 23:01:24.960752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip>
21845 23:01:24.961219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip
21847 23:01:24.992522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_416 RESULT=pass>
21848 23:01:24.992977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_416 RESULT=pass
21850 23:01:25.024047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip>
21851 23:01:25.024489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip
21853 23:01:25.055634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip>
21854 23:01:25.056044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip
21856 23:01:25.087857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip
21858 23:01:25.088295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip>
21859 23:01:25.119553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_432 RESULT=pass
21861 23:01:25.119992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_432 RESULT=pass>
21862 23:01:25.151564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip
21864 23:01:25.152000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip>
21865 23:01:25.183375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip
21867 23:01:25.183819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip>
21868 23:01:25.214721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip
21870 23:01:25.215178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip>
21871 23:01:25.247256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_448 RESULT=pass
21873 23:01:25.247712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_448 RESULT=pass>
21874 23:01:25.278562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip
21876 23:01:25.279017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip>
21877 23:01:25.310644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip>
21878 23:01:25.311152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip
21880 23:01:25.343886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip>
21881 23:01:25.344265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip
21883 23:01:25.377666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_464 RESULT=pass>
21884 23:01:25.378140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_464 RESULT=pass
21886 23:01:25.410538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip
21888 23:01:25.410994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip>
21889 23:01:25.444525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip>
21890 23:01:25.444923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip
21892 23:01:25.478564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip>
21893 23:01:25.478979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip
21895 23:01:25.513462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_480 RESULT=pass
21897 23:01:25.514051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_480 RESULT=pass>
21898 23:01:25.546652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip>
21899 23:01:25.547099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip
21901 23:01:25.578540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip>
21902 23:01:25.578971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip
21904 23:01:25.609710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip>
21905 23:01:25.610131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip
21907 23:01:25.640967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_496 RESULT=pass>
21908 23:01:25.641407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_496 RESULT=pass
21910 23:01:25.672132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip
21912 23:01:25.672660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip>
21913 23:01:25.704629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip>
21914 23:01:25.705037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip
21916 23:01:25.736266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip>
21917 23:01:25.736716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip
21919 23:01:25.767922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_512 RESULT=pass
21921 23:01:25.768460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_512 RESULT=pass>
21922 23:01:25.799738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip>
21923 23:01:25.800131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip
21925 23:01:25.831391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip>
21926 23:01:25.831784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip
21928 23:01:25.863125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip>
21929 23:01:25.863570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip
21931 23:01:25.894046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_528 RESULT=pass
21933 23:01:25.894624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_528 RESULT=pass>
21934 23:01:25.925157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip>
21935 23:01:25.925561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip
21937 23:01:25.956639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip>
21938 23:01:25.957047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip
21940 23:01:25.988087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip>
21941 23:01:25.988472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip
21943 23:01:26.020409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_544 RESULT=pass
21945 23:01:26.020821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_544 RESULT=pass>
21946 23:01:26.052107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip>
21947 23:01:26.052484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip
21949 23:01:26.083907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip>
21950 23:01:26.084346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip
21952 23:01:26.115554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip>
21953 23:01:26.115946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip
21955 23:01:26.147300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_560 RESULT=pass>
21956 23:01:26.147745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_560 RESULT=pass
21958 23:01:26.178539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip>
21959 23:01:26.178976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip
21961 23:01:26.210236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip>
21962 23:01:26.210673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip
21964 23:01:26.241884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip
21966 23:01:26.242503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip>
21967 23:01:26.273899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_576 RESULT=pass>
21968 23:01:26.274347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_576 RESULT=pass
21970 23:01:26.305455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip
21972 23:01:26.306075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip>
21973 23:01:26.317163 <47>[ 209.167830] systemd-journald[109]: Sent WATCHDOG=1 notification.
21974 23:01:26.342600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip
21976 23:01:26.343143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip>
21977 23:01:26.374094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip>
21978 23:01:26.374485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip
21980 23:01:26.406085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_592 RESULT=pass>
21981 23:01:26.406475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_592 RESULT=pass
21983 23:01:26.438886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip
21985 23:01:26.439262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip>
21986 23:01:26.472564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip>
21987 23:01:26.473032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip
21989 23:01:26.503783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip>
21990 23:01:26.504261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip
21992 23:01:26.536038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_608 RESULT=pass
21994 23:01:26.536495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_608 RESULT=pass>
21995 23:01:26.568113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip
21997 23:01:26.568572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip>
21998 23:01:26.600060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip>
21999 23:01:26.600459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip
22001 23:01:26.632135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip>
22002 23:01:26.632500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip
22004 23:01:26.664048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_624 RESULT=pass>
22005 23:01:26.664451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_624 RESULT=pass
22007 23:01:26.695967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip>
22008 23:01:26.696412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip
22010 23:01:26.728176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip
22012 23:01:26.728762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip>
22013 23:01:26.759814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip>
22014 23:01:26.760215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip
22016 23:01:26.792000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_640 RESULT=pass
22018 23:01:26.792618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_640 RESULT=pass>
22019 23:01:26.823932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip
22021 23:01:26.824382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip>
22022 23:01:26.856656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip>
22023 23:01:26.857108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip
22025 23:01:26.888606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip>
22026 23:01:26.889065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip
22028 23:01:26.920494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_656 RESULT=pass>
22029 23:01:26.920916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_656 RESULT=pass
22031 23:01:26.951849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip>
22032 23:01:26.952263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip
22034 23:01:26.983675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip
22036 23:01:26.984229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip>
22037 23:01:27.016748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip>
22038 23:01:27.017218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip
22040 23:01:27.048235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_672 RESULT=pass
22042 23:01:27.048792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_672 RESULT=pass>
22043 23:01:27.079487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip>
22044 23:01:27.079929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip
22046 23:01:27.110614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip
22048 23:01:27.111141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip>
22049 23:01:27.141626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip>
22050 23:01:27.142016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip
22052 23:01:27.173378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_688 RESULT=pass>
22053 23:01:27.173759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_688 RESULT=pass
22055 23:01:27.204973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip>
22056 23:01:27.205361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip
22058 23:01:27.237735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip>
22059 23:01:27.238286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip
22061 23:01:27.269791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip>
22062 23:01:27.270221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip
22064 23:01:27.302601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_704 RESULT=pass
22066 23:01:27.303333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_704 RESULT=pass>
22067 23:01:27.334617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip
22069 23:01:27.335181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip>
22070 23:01:27.367435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip>
22071 23:01:27.367894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip
22073 23:01:27.400331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip>
22074 23:01:27.400798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip
22076 23:01:27.432005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_720 RESULT=pass
22078 23:01:27.432637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_720 RESULT=pass>
22079 23:01:27.463882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip>
22080 23:01:27.464368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip
22082 23:01:27.497769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip
22084 23:01:27.498216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip>
22085 23:01:27.531623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip>
22086 23:01:27.532026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip
22088 23:01:27.564635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_736 RESULT=pass>
22089 23:01:27.565067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_736 RESULT=pass
22091 23:01:27.597155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip
22093 23:01:27.597601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip>
22094 23:01:27.629364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip>
22095 23:01:27.629765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip
22097 23:01:27.661807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip>
22098 23:01:27.662207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip
22100 23:01:27.693872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_752 RESULT=pass>
22101 23:01:27.694257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_752 RESULT=pass
22103 23:01:27.726187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip>
22104 23:01:27.726605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip
22106 23:01:27.761330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip>
22107 23:01:27.761800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip
22109 23:01:27.793663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip
22111 23:01:27.794203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip>
22112 23:01:27.825718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_768 RESULT=pass>
22113 23:01:27.826160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_768 RESULT=pass
22115 23:01:27.857719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip>
22116 23:01:27.858123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip
22118 23:01:27.889929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip>
22119 23:01:27.890325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip
22121 23:01:27.923041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip
22123 23:01:27.923481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip>
22124 23:01:27.954594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_784 RESULT=pass
22126 23:01:27.955038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_784 RESULT=pass>
22127 23:01:27.986292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip>
22128 23:01:27.986701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip
22130 23:01:28.017805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip
22132 23:01:28.018236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip>
22133 23:01:28.048994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip>
22134 23:01:28.049388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip
22136 23:01:28.081130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_800 RESULT=pass>
22137 23:01:28.081559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_800 RESULT=pass
22139 23:01:28.115877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip>
22140 23:01:28.116163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip
22142 23:01:28.151663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip>
22143 23:01:28.152140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip
22145 23:01:28.184601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip>
22146 23:01:28.185075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip
22148 23:01:28.215864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_816 RESULT=pass>
22149 23:01:28.216325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_816 RESULT=pass
22151 23:01:28.250472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip>
22152 23:01:28.250959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip
22154 23:01:28.287441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip>
22155 23:01:28.287902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip
22157 23:01:28.320445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip>
22158 23:01:28.320916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip
22160 23:01:28.352323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_832 RESULT=pass
22162 23:01:28.352862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_832 RESULT=pass>
22163 23:01:28.383633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip
22165 23:01:28.384221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip>
22166 23:01:28.414406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip
22168 23:01:28.415006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip>
22169 23:01:28.445066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip>
22170 23:01:28.445545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip
22172 23:01:28.475855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_848 RESULT=pass
22174 23:01:28.476382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_848 RESULT=pass>
22175 23:01:28.507709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip>
22176 23:01:28.508118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip
22178 23:01:28.539677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip>
22179 23:01:28.540084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip
22181 23:01:28.571445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip>
22182 23:01:28.571881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip
22184 23:01:28.603845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_864 RESULT=pass>
22185 23:01:28.604289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_864 RESULT=pass
22187 23:01:28.657962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip>
22188 23:01:28.658419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip
22190 23:01:28.689534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip
22192 23:01:28.690078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip>
22193 23:01:28.720850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip
22195 23:01:28.721302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip>
22196 23:01:28.752031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_880 RESULT=pass
22198 23:01:28.752477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_880 RESULT=pass>
22199 23:01:28.783586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip
22201 23:01:28.784027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip>
22202 23:01:28.816316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip
22204 23:01:28.816768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip>
22205 23:01:28.848208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip>
22206 23:01:28.848613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip
22208 23:01:28.880003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_896 RESULT=pass
22210 23:01:28.880620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_896 RESULT=pass>
22211 23:01:28.912003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip
22213 23:01:28.912619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip>
22214 23:01:28.943657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip
22216 23:01:28.944114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip>
22217 23:01:28.975972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip>
22218 23:01:28.976409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip
22220 23:01:29.007460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_912 RESULT=pass>
22221 23:01:29.007891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_912 RESULT=pass
22223 23:01:29.039042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip>
22224 23:01:29.039496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip
22226 23:01:29.070404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip
22228 23:01:29.070853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip>
22229 23:01:29.101858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip>
22230 23:01:29.102316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip
22232 23:01:29.133175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_928 RESULT=pass>
22233 23:01:29.133613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_928 RESULT=pass
22235 23:01:29.164696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip
22237 23:01:29.165237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip>
22238 23:01:29.196330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip
22240 23:01:29.196888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip>
22241 23:01:29.227713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip
22243 23:01:29.228248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip>
22244 23:01:29.259645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_944 RESULT=pass
22246 23:01:29.260184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_944 RESULT=pass>
22247 23:01:29.291714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip
22249 23:01:29.292261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip>
22250 23:01:29.323944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip
22252 23:01:29.324482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip>
22253 23:01:29.355686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip>
22254 23:01:29.356164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip
22256 23:01:29.388108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_960 RESULT=pass
22258 23:01:29.388746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_960 RESULT=pass>
22259 23:01:29.419766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip>
22260 23:01:29.420237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip
22262 23:01:29.451541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip
22264 23:01:29.452202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip>
22265 23:01:29.482371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip
22267 23:01:29.482932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip>
22268 23:01:29.512950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_976 RESULT=pass>
22269 23:01:29.513421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_976 RESULT=pass
22271 23:01:29.544365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip
22273 23:01:29.544904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip>
22274 23:01:29.575768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip>
22275 23:01:29.576220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip
22277 23:01:29.607580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip
22279 23:01:29.608150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip>
22280 23:01:29.639888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_992 RESULT=pass
22282 23:01:29.640430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_992 RESULT=pass>
22283 23:01:29.672320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip
22285 23:01:29.672907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip>
22286 23:01:29.704177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip>
22287 23:01:29.704712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip
22289 23:01:29.736847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip>
22290 23:01:29.737322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip
22292 23:01:29.768776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 RESULT=pass>
22293 23:01:29.769221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 RESULT=pass
22295 23:01:29.801297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip>
22296 23:01:29.801721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip
22298 23:01:29.839357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip
22300 23:01:29.839801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip>
22301 23:01:29.872529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip
22303 23:01:29.872960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip>
22304 23:01:29.904522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 RESULT=pass>
22305 23:01:29.904902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 RESULT=pass
22307 23:01:29.936561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip>
22308 23:01:29.936944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip
22310 23:01:29.968381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip>
22311 23:01:29.968762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip
22313 23:01:30.000965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip>
22314 23:01:30.001409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip
22316 23:01:30.032916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 RESULT=pass>
22317 23:01:30.033344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 RESULT=pass
22319 23:01:30.064890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip>
22320 23:01:30.065325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip
22322 23:01:30.096716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip>
22323 23:01:30.097138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip
22325 23:01:30.128518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip>
22326 23:01:30.128948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip
22328 23:01:30.159982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 RESULT=pass>
22329 23:01:30.160403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 RESULT=pass
22331 23:01:30.191511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip>
22332 23:01:30.191929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip
22334 23:01:30.223226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip
22336 23:01:30.223734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip>
22337 23:01:30.254979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip
22339 23:01:30.255496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip>
22340 23:01:30.286542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 RESULT=pass
22342 23:01:30.287112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 RESULT=pass>
22343 23:01:30.318456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip>
22344 23:01:30.318866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip
22346 23:01:30.350255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip>
22347 23:01:30.350682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip
22349 23:01:30.388184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip>
22350 23:01:30.388615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip
22352 23:01:30.422024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 RESULT=pass
22354 23:01:30.422551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 RESULT=pass>
22355 23:01:30.454320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip>
22356 23:01:30.454741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip
22358 23:01:30.487037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip
22360 23:01:30.487468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip>
22361 23:01:30.519898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip>
22362 23:01:30.520352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip
22364 23:01:30.552495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 RESULT=pass>
22365 23:01:30.552960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 RESULT=pass
22367 23:01:30.585059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip>
22368 23:01:30.585527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip
22370 23:01:30.618976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip
22372 23:01:30.619594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip>
22373 23:01:30.651861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip>
22374 23:01:30.652322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip
22376 23:01:30.684262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 RESULT=pass>
22377 23:01:30.684649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 RESULT=pass
22379 23:01:30.716188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip>
22380 23:01:30.716615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip
22382 23:01:30.749312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip
22384 23:01:30.749855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip>
22385 23:01:30.792867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip>
22386 23:01:30.793339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip
22388 23:01:30.838045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 RESULT=pass>
22389 23:01:30.838509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 RESULT=pass
22391 23:01:30.880948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip
22393 23:01:30.881409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip>
22394 23:01:30.918125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip>
22395 23:01:30.918560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip
22397 23:01:30.954474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip
22399 23:01:30.954943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip>
22400 23:01:30.991161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 RESULT=pass>
22401 23:01:30.991650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 RESULT=pass
22403 23:01:31.030525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip
22405 23:01:31.031085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip>
22406 23:01:31.067547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip>
22407 23:01:31.067922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip
22409 23:01:31.109749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip>
22410 23:01:31.110120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip
22412 23:01:31.156789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 RESULT=pass>
22413 23:01:31.157170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 RESULT=pass
22415 23:01:31.192180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip
22417 23:01:31.192639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip>
22418 23:01:31.227979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip>
22419 23:01:31.228369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip
22421 23:01:31.263844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip>
22422 23:01:31.264187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip
22424 23:01:31.299388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 RESULT=pass>
22425 23:01:31.299725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 RESULT=pass
22427 23:01:31.333357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip>
22428 23:01:31.333696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip
22430 23:01:31.367887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip>
22431 23:01:31.368232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip
22433 23:01:31.402313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip>
22434 23:01:31.402665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip
22436 23:01:31.436536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 RESULT=pass>
22437 23:01:31.436885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 RESULT=pass
22439 23:01:31.471175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip>
22440 23:01:31.471610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip
22442 23:01:31.505906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip
22444 23:01:31.506538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip>
22445 23:01:31.540160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip>
22446 23:01:31.540628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip
22448 23:01:31.575932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 RESULT=pass>
22449 23:01:31.576352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 RESULT=pass
22451 23:01:31.611476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip>
22452 23:01:31.611933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip
22454 23:01:31.646158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip
22456 23:01:31.646742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip>
22457 23:01:31.680799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip>
22458 23:01:31.681134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip
22460 23:01:31.715646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 RESULT=pass
22462 23:01:31.716082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 RESULT=pass>
22463 23:01:31.750415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip>
22464 23:01:31.750755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip
22466 23:01:31.785204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip>
22467 23:01:31.785556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip
22469 23:01:31.819931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip>
22470 23:01:31.820284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip
22472 23:01:31.855613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 RESULT=pass
22474 23:01:31.856065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 RESULT=pass>
22475 23:01:31.890731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip
22477 23:01:31.891215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip>
22478 23:01:31.923812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip>
22479 23:01:31.924238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip
22481 23:01:31.954976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip
22483 23:01:31.955496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip>
22484 23:01:31.985885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 RESULT=pass
22486 23:01:31.986409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 RESULT=pass>
22487 23:01:32.016705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip>
22488 23:01:32.017181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip
22490 23:01:32.049093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip>
22491 23:01:32.049558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip
22493 23:01:32.080785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip>
22494 23:01:32.081235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip
22496 23:01:32.112260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 RESULT=pass
22498 23:01:32.112790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 RESULT=pass>
22499 23:01:32.143861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip>
22500 23:01:32.144297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip
22502 23:01:32.175286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip>
22503 23:01:32.175715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip
22505 23:01:32.207368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip>
22506 23:01:32.207823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip
22508 23:01:32.238154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 RESULT=pass
22510 23:01:32.238731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 RESULT=pass>
22511 23:01:32.269106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip>
22512 23:01:32.269548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip
22514 23:01:32.300386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip>
22515 23:01:32.300821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip
22517 23:01:32.331829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip>
22518 23:01:32.332289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip
22520 23:01:32.363633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 RESULT=pass>
22521 23:01:32.364060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 RESULT=pass
22523 23:01:32.395681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip>
22524 23:01:32.396128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip
22526 23:01:32.427531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip>
22527 23:01:32.427995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip
22529 23:01:32.459554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip>
22530 23:01:32.460001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip
22532 23:01:32.490579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 RESULT=pass>
22533 23:01:32.491028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 RESULT=pass
22535 23:01:32.521596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip>
22536 23:01:32.522045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip
22538 23:01:32.553707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip>
22539 23:01:32.554176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip
22541 23:01:32.584700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip>
22542 23:01:32.585144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip
22544 23:01:32.617507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 RESULT=pass>
22545 23:01:32.617989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 RESULT=pass
22547 23:01:32.649444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip
22549 23:01:32.650018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip>
22550 23:01:32.680510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip>
22551 23:01:32.680983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip
22553 23:01:32.716319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip>
22554 23:01:32.716773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip
22556 23:01:32.748195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 RESULT=pass
22558 23:01:32.748737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 RESULT=pass>
22559 23:01:32.780033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip>
22560 23:01:32.780482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip
22562 23:01:32.811352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip>
22563 23:01:32.811766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip
22565 23:01:32.842311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip>
22566 23:01:32.842796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip
22568 23:01:32.874176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 RESULT=pass>
22569 23:01:32.874590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 RESULT=pass
22571 23:01:32.905487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip>
22572 23:01:32.905980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip
22574 23:01:32.937052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip>
22575 23:01:32.937506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip
22577 23:01:32.968498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip>
22578 23:01:32.968948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip
22580 23:01:32.999675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 RESULT=pass>
22581 23:01:33.000138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 RESULT=pass
22583 23:01:33.030559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip>
22584 23:01:33.031020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip
22586 23:01:33.062893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip
22588 23:01:33.063518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip>
22589 23:01:33.094422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip>
22590 23:01:33.094887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip
22592 23:01:33.125688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 RESULT=pass>
22593 23:01:33.126137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 RESULT=pass
22595 23:01:33.156887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip>
22596 23:01:33.157297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip
22598 23:01:33.188835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip>
22599 23:01:33.189250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip
22601 23:01:33.224043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip>
22602 23:01:33.224478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip
22604 23:01:33.255745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 RESULT=pass>
22605 23:01:33.256183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 RESULT=pass
22607 23:01:33.287365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip>
22608 23:01:33.287791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip
22610 23:01:33.318104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip>
22611 23:01:33.318548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip
22613 23:01:33.349361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip>
22614 23:01:33.349727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip
22616 23:01:33.380447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 RESULT=pass
22618 23:01:33.381010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 RESULT=pass>
22619 23:01:33.412001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip
22621 23:01:33.412545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip>
22622 23:01:33.443663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip
22624 23:01:33.444203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip>
22625 23:01:33.474454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip>
22626 23:01:33.474919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip
22628 23:01:33.505684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 RESULT=pass>
22629 23:01:33.506160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 RESULT=pass
22631 23:01:33.536846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip>
22632 23:01:33.537300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip
22634 23:01:33.568473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip>
22635 23:01:33.568889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip
22637 23:01:33.600056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip
22639 23:01:33.600657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip>
22640 23:01:33.636055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 RESULT=pass
22642 23:01:33.636705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 RESULT=pass>
22643 23:01:33.667593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip
22645 23:01:33.668223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip>
22646 23:01:33.699362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip
22648 23:01:33.700026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip>
22649 23:01:33.730390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip>
22650 23:01:33.730829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip
22652 23:01:33.785675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 RESULT=pass>
22653 23:01:33.786101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 RESULT=pass
22655 23:01:33.820939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip>
22656 23:01:33.821349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip
22658 23:01:33.856195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip>
22659 23:01:33.856623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip
22661 23:01:33.891148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip>
22662 23:01:33.891561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip
22664 23:01:33.927595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 RESULT=pass
22666 23:01:33.928037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 RESULT=pass>
22667 23:01:33.963330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip>
22668 23:01:33.963745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip
22670 23:01:33.998304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip>
22671 23:01:33.998685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip
22673 23:01:34.033390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip
22675 23:01:34.033847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip>
22676 23:01:34.069016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 RESULT=pass>
22677 23:01:34.069428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 RESULT=pass
22679 23:01:34.105256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip>
22680 23:01:34.105628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip
22682 23:01:34.141950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip>
22683 23:01:34.142297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip
22685 23:01:34.178557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip>
22686 23:01:34.178907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip
22688 23:01:34.215709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 RESULT=pass>
22689 23:01:34.216051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 RESULT=pass
22691 23:01:34.252644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip>
22692 23:01:34.253075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip
22694 23:01:34.289468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip>
22695 23:01:34.289900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip
22697 23:01:34.328298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip>
22698 23:01:34.328708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip
22700 23:01:34.362354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 RESULT=pass>
22701 23:01:34.362794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 RESULT=pass
22703 23:01:34.396407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip>
22704 23:01:34.396896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip
22706 23:01:34.430438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip
22708 23:01:34.431013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip>
22709 23:01:34.462610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip>
22710 23:01:34.463020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip
22712 23:01:34.494652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 RESULT=pass
22714 23:01:34.495252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 RESULT=pass>
22715 23:01:34.526145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip>
22716 23:01:34.526562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip
22718 23:01:34.558462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip>
22719 23:01:34.558916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip
22721 23:01:34.590812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip
22723 23:01:34.591403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip>
22724 23:01:34.622450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 RESULT=pass>
22725 23:01:34.622881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 RESULT=pass
22727 23:01:34.654357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip>
22728 23:01:34.654788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip
22730 23:01:34.687279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip>
22731 23:01:34.687714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip
22733 23:01:34.719015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip
22735 23:01:34.719664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip>
22736 23:01:34.751712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 RESULT=pass
22738 23:01:34.752260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 RESULT=pass>
22739 23:01:34.784099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip>
22740 23:01:34.784519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip
22742 23:01:34.816127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip>
22743 23:01:34.816619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip
22745 23:01:34.848239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip>
22746 23:01:34.848709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip
22748 23:01:34.879891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 RESULT=pass
22750 23:01:34.880445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 RESULT=pass>
22751 23:01:34.912212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip>
22752 23:01:34.912669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip
22754 23:01:34.944683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip
22756 23:01:34.945226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip>
22757 23:01:34.977167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip>
22758 23:01:34.977567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip
22760 23:01:35.009472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 RESULT=pass>
22761 23:01:35.009892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 RESULT=pass
22763 23:01:35.041334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip>
22764 23:01:35.041798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip
22766 23:01:35.073332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip>
22767 23:01:35.073772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip
22769 23:01:35.104808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip>
22770 23:01:35.105286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip
22772 23:01:35.136355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 RESULT=pass
22774 23:01:35.137029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 RESULT=pass>
22775 23:01:35.168116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip>
22776 23:01:35.168555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip
22778 23:01:35.200471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip>
22779 23:01:35.200916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip
22781 23:01:35.232169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip>
22782 23:01:35.232605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip
22784 23:01:35.263992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 RESULT=pass>
22785 23:01:35.264433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 RESULT=pass
22787 23:01:35.296205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip>
22788 23:01:35.296653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip
22790 23:01:35.328348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip>
22791 23:01:35.328786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip
22793 23:01:35.361537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip
22795 23:01:35.362077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip>
22796 23:01:35.398248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 RESULT=pass>
22797 23:01:35.398698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 RESULT=pass
22799 23:01:35.431878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip>
22800 23:01:35.432322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip
22802 23:01:35.466023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip
22804 23:01:35.466568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip>
22805 23:01:35.503036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip
22807 23:01:35.503627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip>
22808 23:01:35.548352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 RESULT=pass
22810 23:01:35.548930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 RESULT=pass>
22811 23:01:35.584235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip>
22812 23:01:35.584582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip
22814 23:01:35.619420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip
22816 23:01:35.619833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip>
22817 23:01:35.653863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip>
22818 23:01:35.654218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip
22820 23:01:35.688808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 RESULT=pass>
22821 23:01:35.689234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 RESULT=pass
22823 23:01:35.724761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip>
22824 23:01:35.725182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip
22826 23:01:35.756471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip>
22827 23:01:35.756896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip
22829 23:01:35.788608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip>
22830 23:01:35.789021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip
22832 23:01:35.820833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 RESULT=pass
22834 23:01:35.821298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 RESULT=pass>
22835 23:01:35.852317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip>
22836 23:01:35.852730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip
22838 23:01:35.884400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip>
22839 23:01:35.884848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip
22841 23:01:35.917929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip
22843 23:01:35.918475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip>
22844 23:01:35.950879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 RESULT=pass
22846 23:01:35.951468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 RESULT=pass>
22847 23:01:35.986373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip
22849 23:01:35.986937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip>
22850 23:01:36.020123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip
22852 23:01:36.020678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip>
22853 23:01:36.052616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip>
22854 23:01:36.053082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip
22856 23:01:36.084841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 RESULT=pass>
22857 23:01:36.085305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 RESULT=pass
22859 23:01:36.116464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip
22861 23:01:36.116902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip>
22862 23:01:36.148190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip>
22863 23:01:36.148571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip
22865 23:01:36.179864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip>
22866 23:01:36.180248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip
22868 23:01:36.211986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 RESULT=pass>
22869 23:01:36.212394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 RESULT=pass
22871 23:01:36.243602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip>
22872 23:01:36.244069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip
22874 23:01:36.276071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip>
22875 23:01:36.276471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip
22877 23:01:36.307896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip>
22878 23:01:36.308292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip
22880 23:01:36.339063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 RESULT=pass>
22881 23:01:36.339468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 RESULT=pass
22883 23:01:36.370412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip>
22884 23:01:36.370815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip
22886 23:01:36.402508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip
22888 23:01:36.403056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip>
22889 23:01:36.434405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip
22891 23:01:36.434867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip>
22892 23:01:36.465921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 RESULT=pass
22894 23:01:36.466363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 RESULT=pass>
22895 23:01:36.497985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip>
22896 23:01:36.498475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip
22898 23:01:36.529670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip>
22899 23:01:36.530226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip
22901 23:01:36.561744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip>
22902 23:01:36.562221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip
22904 23:01:36.592963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 RESULT=pass>
22905 23:01:36.593436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 RESULT=pass
22907 23:01:36.625720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip
22909 23:01:36.626158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip>
22910 23:01:36.658976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip
22912 23:01:36.659420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip>
22913 23:01:36.691993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip>
22914 23:01:36.692394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip
22916 23:01:36.724336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 RESULT=pass>
22917 23:01:36.724784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 RESULT=pass
22919 23:01:36.756255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip>
22920 23:01:36.756620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip
22922 23:01:36.788074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip
22924 23:01:36.788617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip>
22925 23:01:36.819875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip
22927 23:01:36.820409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip>
22928 23:01:36.852356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 RESULT=pass
22930 23:01:36.852900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 RESULT=pass>
22931 23:01:36.884355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip>
22932 23:01:36.884799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip
22934 23:01:36.916861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip>
22935 23:01:36.917319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip
22937 23:01:36.949738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip>
22938 23:01:36.950191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip
22940 23:01:36.981671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 RESULT=pass>
22941 23:01:36.982179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 RESULT=pass
22943 23:01:37.013946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip>
22944 23:01:37.014462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip
22946 23:01:37.045927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip
22948 23:01:37.046522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip>
22949 23:01:37.079375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip
22951 23:01:37.079990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip>
22952 23:01:37.112999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 RESULT=pass
22954 23:01:37.113551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 RESULT=pass>
22955 23:01:37.146880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip
22957 23:01:37.147532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip>
22958 23:01:37.181878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip
22960 23:01:37.182322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip>
22961 23:01:37.216336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip>
22962 23:01:37.216720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip
22964 23:01:37.250383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 RESULT=pass>
22965 23:01:37.250822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 RESULT=pass
22967 23:01:37.284238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip
22969 23:01:37.284677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip>
22970 23:01:37.317962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip>
22971 23:01:37.318362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip
22973 23:01:37.351526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip>
22974 23:01:37.351977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip
22976 23:01:37.399955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 RESULT=pass
22978 23:01:37.400574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 RESULT=pass>
22979 23:01:37.433736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip>
22980 23:01:37.434231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip
22982 23:01:37.468739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip
22984 23:01:37.469210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip>
22985 23:01:37.504366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip>
22986 23:01:37.504768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip
22988 23:01:37.540464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 RESULT=pass>
22989 23:01:37.540854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 RESULT=pass
22991 23:01:37.575667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip
22993 23:01:37.576400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip>
22994 23:01:37.617736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip>
22995 23:01:37.618191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip
22997 23:01:37.664238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip>
22998 23:01:37.664720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip
23000 23:01:37.699025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 RESULT=pass
23002 23:01:37.699570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 RESULT=pass>
23003 23:01:37.733086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip>
23004 23:01:37.733526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip
23006 23:01:37.768361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip>
23007 23:01:37.768751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip
23009 23:01:37.801933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip>
23010 23:01:37.802324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip
23012 23:01:37.840764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 RESULT=pass>
23013 23:01:37.841189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 RESULT=pass
23015 23:01:37.883068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip
23017 23:01:37.883624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip>
23018 23:01:37.915695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip>
23019 23:01:37.916134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip
23021 23:01:37.948164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip>
23022 23:01:37.948562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip
23024 23:01:37.981440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 RESULT=pass>
23025 23:01:37.981864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 RESULT=pass
23027 23:01:38.014554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip>
23028 23:01:38.015023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip
23030 23:01:38.046937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip
23032 23:01:38.047479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip>
23033 23:01:38.079230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip>
23034 23:01:38.079702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip
23036 23:01:38.112294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 RESULT=pass
23038 23:01:38.112841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 RESULT=pass>
23039 23:01:38.144296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip>
23040 23:01:38.144743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip
23042 23:01:38.177293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip
23044 23:01:38.177933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip>
23045 23:01:38.209104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip>
23046 23:01:38.209569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip
23048 23:01:38.241659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 RESULT=pass>
23049 23:01:38.242097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 RESULT=pass
23051 23:01:38.273850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip>
23052 23:01:38.274262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip
23054 23:01:38.306460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip
23056 23:01:38.306913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip>
23057 23:01:38.338135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip>
23058 23:01:38.338540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip
23060 23:01:38.369255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 RESULT=pass>
23061 23:01:38.369676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 RESULT=pass
23063 23:01:38.400813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip>
23064 23:01:38.401213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip
23066 23:01:38.433892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip>
23067 23:01:38.434336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip
23069 23:01:38.467771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip>
23070 23:01:38.468183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip
23072 23:01:38.500539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 RESULT=pass>
23073 23:01:38.500970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 RESULT=pass
23075 23:01:38.533552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip>
23076 23:01:38.534014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip
23078 23:01:38.565324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip>
23079 23:01:38.565792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip
23081 23:01:38.598548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip>
23082 23:01:38.598934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip
23084 23:01:38.631711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 RESULT=pass>
23085 23:01:38.632095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 RESULT=pass
23087 23:01:38.662831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip
23089 23:01:38.663274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip>
23090 23:01:38.694499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip>
23091 23:01:38.694969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip
23093 23:01:38.726163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip
23095 23:01:38.726777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip>
23096 23:01:38.757374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 RESULT=pass>
23097 23:01:38.757841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 RESULT=pass
23099 23:01:38.788851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip
23101 23:01:38.789414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip>
23102 23:01:38.820165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip>
23103 23:01:38.820614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip
23105 23:01:38.851791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip>
23106 23:01:38.852256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip
23108 23:01:38.909364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 RESULT=pass>
23109 23:01:38.909799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 RESULT=pass
23111 23:01:38.944417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip
23113 23:01:38.944830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip>
23114 23:01:38.982800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip
23116 23:01:38.983159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip>
23117 23:01:39.015563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip>
23118 23:01:39.016018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip
23120 23:01:39.047709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 RESULT=pass>
23121 23:01:39.048159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 RESULT=pass
23123 23:01:39.079875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip>
23124 23:01:39.080332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip
23126 23:01:39.112050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip
23128 23:01:39.112590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip>
23129 23:01:39.143703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip
23131 23:01:39.144058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip>
23132 23:01:39.174579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 RESULT=pass>
23133 23:01:39.175024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 RESULT=pass
23135 23:01:39.205694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip>
23136 23:01:39.206160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip
23138 23:01:39.237222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip>
23139 23:01:39.237693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip
23141 23:01:39.268547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip
23143 23:01:39.269166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip>
23144 23:01:39.300486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 RESULT=pass>
23145 23:01:39.301060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 RESULT=pass
23147 23:01:39.332099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip
23149 23:01:39.332659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip>
23150 23:01:39.364094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip>
23151 23:01:39.364535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip
23153 23:01:39.396014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip>
23154 23:01:39.396453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip
23156 23:01:39.428360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 RESULT=pass>
23157 23:01:39.428801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 RESULT=pass
23159 23:01:39.460603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip>
23160 23:01:39.461042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip
23162 23:01:39.493157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip
23164 23:01:39.493709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip>
23165 23:01:39.525193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip>
23166 23:01:39.525679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip
23168 23:01:39.558482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 RESULT=pass
23170 23:01:39.559035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 RESULT=pass>
23171 23:01:39.591521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip
23173 23:01:39.591993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip>
23174 23:01:39.623528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip
23176 23:01:39.624080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip>
23177 23:01:39.656638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip>
23178 23:01:39.657093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip
23180 23:01:39.688681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 RESULT=pass>
23181 23:01:39.689095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 RESULT=pass
23183 23:01:39.721429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip>
23184 23:01:39.721946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip
23186 23:01:39.753806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip>
23187 23:01:39.754263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip
23189 23:01:39.786473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip>
23190 23:01:39.786908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip
23192 23:01:39.819958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 RESULT=pass>
23193 23:01:39.820453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 RESULT=pass
23195 23:01:39.853434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip
23197 23:01:39.854070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip>
23198 23:01:39.887655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip>
23199 23:01:39.888064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip
23201 23:01:39.924038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip
23203 23:01:39.924626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip>
23204 23:01:39.960816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 RESULT=pass>
23205 23:01:39.961240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 RESULT=pass
23207 23:01:39.995850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip>
23208 23:01:39.996287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip
23210 23:01:40.031255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip>
23211 23:01:40.031747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip
23213 23:01:40.078331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip
23215 23:01:40.079070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip>
23216 23:01:40.114184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 RESULT=pass
23218 23:01:40.114745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 RESULT=pass>
23219 23:01:40.148537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip>
23220 23:01:40.149022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip
23222 23:01:40.187849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip>
23223 23:01:40.188248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip
23225 23:01:40.223339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip>
23226 23:01:40.223767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip
23228 23:01:40.257405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 RESULT=pass>
23229 23:01:40.257855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 RESULT=pass
23231 23:01:40.291549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip
23233 23:01:40.292204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip>
23234 23:01:40.326043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip>
23235 23:01:40.326497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip
23237 23:01:40.359848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip>
23238 23:01:40.360348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip
23240 23:01:40.394157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 RESULT=pass
23242 23:01:40.394726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 RESULT=pass>
23243 23:01:40.428652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip
23245 23:01:40.429091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip>
23246 23:01:40.464140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip>
23247 23:01:40.464629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip
23249 23:01:40.498305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip>
23250 23:01:40.498758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip
23252 23:01:40.530553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 RESULT=pass>
23253 23:01:40.531080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 RESULT=pass
23255 23:01:40.563971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip>
23256 23:01:40.564356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip
23258 23:01:40.600815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip>
23259 23:01:40.601234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip
23261 23:01:40.634073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip>
23262 23:01:40.634489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip
23264 23:01:40.667247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 RESULT=pass>
23265 23:01:40.667625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 RESULT=pass
23267 23:01:40.700444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip>
23268 23:01:40.700855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip
23270 23:01:40.734333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip
23272 23:01:40.734863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip>
23273 23:01:40.768693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip>
23274 23:01:40.769149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip
23276 23:01:40.802430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 RESULT=pass>
23277 23:01:40.802890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 RESULT=pass
23279 23:01:40.848061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip
23281 23:01:40.848716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip>
23282 23:01:40.883942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip>
23283 23:01:40.884402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip
23285 23:01:40.917465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip>
23286 23:01:40.917952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip
23288 23:01:40.950431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 RESULT=pass>
23289 23:01:40.950874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 RESULT=pass
23291 23:01:40.983075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip
23293 23:01:40.983676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip>
23294 23:01:41.014660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip
23296 23:01:41.015219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip>
23297 23:01:41.046712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip
23299 23:01:41.047270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip>
23300 23:01:41.079308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 RESULT=pass>
23301 23:01:41.079731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 RESULT=pass
23303 23:01:41.111694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip>
23304 23:01:41.112124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip
23306 23:01:41.143779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip
23308 23:01:41.144224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip>
23309 23:01:41.175789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip>
23310 23:01:41.176257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip
23312 23:01:41.208128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 RESULT=pass>
23313 23:01:41.208569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 RESULT=pass
23315 23:01:41.240402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip>
23316 23:01:41.240865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip
23318 23:01:41.273663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip
23320 23:01:41.274290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip>
23321 23:01:41.308295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip>
23322 23:01:41.308769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip
23324 23:01:41.342070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 RESULT=pass>
23325 23:01:41.342478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 RESULT=pass
23327 23:01:41.374385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip>
23328 23:01:41.374797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip
23330 23:01:41.411421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip
23332 23:01:41.411890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip>
23333 23:01:41.444952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip>
23334 23:01:41.445352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip
23336 23:01:41.481606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 RESULT=pass>
23337 23:01:41.482097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 RESULT=pass
23339 23:01:41.518694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip
23341 23:01:41.519257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip>
23342 23:01:41.555528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip
23344 23:01:41.555998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip>
23345 23:01:41.591216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip>
23346 23:01:41.591642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip
23348 23:01:41.626172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 RESULT=pass>
23349 23:01:41.626565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 RESULT=pass
23351 23:01:41.658835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip
23353 23:01:41.659439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip>
23354 23:01:41.690377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip>
23355 23:01:41.690806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip
23357 23:01:41.721330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip>
23358 23:01:41.721760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip
23360 23:01:41.752024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 RESULT=pass>
23361 23:01:41.752488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 RESULT=pass
23363 23:01:41.783493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip>
23364 23:01:41.783938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip
23366 23:01:41.814870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip
23368 23:01:41.815350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip>
23369 23:01:41.848323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip
23371 23:01:41.848869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip>
23372 23:01:41.880758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 RESULT=pass
23374 23:01:41.881296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 RESULT=pass>
23375 23:01:41.914251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip
23377 23:01:41.914857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip>
23378 23:01:41.947353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip
23380 23:01:41.947910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip>
23381 23:01:41.979964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip
23383 23:01:41.980427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip>
23384 23:01:42.012150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 RESULT=pass>
23385 23:01:42.012574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 RESULT=pass
23387 23:01:42.044566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip>
23388 23:01:42.045007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip
23390 23:01:42.076926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip>
23391 23:01:42.077326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip
23393 23:01:42.109835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip
23395 23:01:42.110383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip>
23396 23:01:42.142072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 RESULT=pass
23398 23:01:42.142622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 RESULT=pass>
23399 23:01:42.175435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip
23401 23:01:42.176058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip>
23402 23:01:42.207982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip>
23403 23:01:42.208430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip
23405 23:01:42.240459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip>
23406 23:01:42.240912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip
23408 23:01:42.273370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 RESULT=pass>
23409 23:01:42.273815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 RESULT=pass
23411 23:01:42.305494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip>
23412 23:01:42.305971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip
23414 23:01:42.339933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip>
23415 23:01:42.340317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip
23417 23:01:42.373812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip>
23418 23:01:42.374210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip
23420 23:01:42.407474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 RESULT=pass
23422 23:01:42.407866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 RESULT=pass>
23423 23:01:42.439721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip
23425 23:01:42.440129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip>
23426 23:01:42.474085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip>
23427 23:01:42.474616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip
23429 23:01:42.523485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip>
23430 23:01:42.524035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip
23432 23:01:42.557677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 RESULT=pass
23434 23:01:42.558344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 RESULT=pass>
23435 23:01:42.592817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip
23437 23:01:42.593311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip>
23438 23:01:42.627531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip
23440 23:01:42.628022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip>
23441 23:01:42.663821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip
23443 23:01:42.664317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip>
23444 23:01:42.699256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 RESULT=pass>
23445 23:01:42.699725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 RESULT=pass
23447 23:01:42.735080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip
23449 23:01:42.735773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip>
23450 23:01:42.773240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip
23452 23:01:42.773752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip>
23453 23:01:42.808391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip
23455 23:01:42.809074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip>
23456 23:01:42.843827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 RESULT=pass>
23457 23:01:42.844345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 RESULT=pass
23459 23:01:42.879795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip
23461 23:01:42.880396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip>
23462 23:01:42.915179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip
23464 23:01:42.915837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip>
23465 23:01:42.950920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip
23467 23:01:42.951403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip>
23468 23:01:42.985673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 RESULT=pass>
23469 23:01:42.986120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 RESULT=pass
23471 23:01:43.020339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip>
23472 23:01:43.020754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip
23474 23:01:43.056018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip>
23475 23:01:43.056440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip
23477 23:01:43.091035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip
23479 23:01:43.091525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip>
23480 23:01:43.125154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 RESULT=pass>
23481 23:01:43.125681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 RESULT=pass
23483 23:01:43.159828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip>
23484 23:01:43.160369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip
23486 23:01:43.192416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip
23488 23:01:43.192981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip>
23489 23:01:43.225444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip
23491 23:01:43.226041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip>
23492 23:01:43.257295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 RESULT=pass>
23493 23:01:43.257788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 RESULT=pass
23495 23:01:43.289736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip>
23496 23:01:43.290211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip
23498 23:01:43.321853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip>
23499 23:01:43.322341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip
23501 23:01:43.354384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip>
23502 23:01:43.354878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip
23504 23:01:43.387563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 RESULT=pass>
23505 23:01:43.388081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 RESULT=pass
23507 23:01:43.421167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip>
23508 23:01:43.421644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip
23510 23:01:43.476198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip
23512 23:01:43.476786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip>
23513 23:01:43.524072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip>
23514 23:01:43.524550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip
23516 23:01:43.561219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 RESULT=pass>
23517 23:01:43.561694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 RESULT=pass
23519 23:01:43.599971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip>
23520 23:01:43.600496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip
23522 23:01:43.638337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip>
23523 23:01:43.638761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip
23525 23:01:43.676172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip
23527 23:01:43.676719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip>
23528 23:01:43.713404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 RESULT=pass>
23529 23:01:43.713816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 RESULT=pass
23531 23:01:43.750427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip>
23532 23:01:43.750854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip
23534 23:01:43.789819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip>
23535 23:01:43.790244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip
23537 23:01:43.828203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip>
23538 23:01:43.828646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip
23540 23:01:43.865998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 RESULT=pass
23542 23:01:43.866573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 RESULT=pass>
23543 23:01:43.904236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip
23545 23:01:43.904812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip>
23546 23:01:43.942107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip>
23547 23:01:43.942568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip
23549 23:01:43.992634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip
23551 23:01:43.993177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip>
23552 23:01:44.038809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 RESULT=pass
23554 23:01:44.039411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 RESULT=pass>
23555 23:01:44.075863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip>
23556 23:01:44.076334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip
23558 23:01:44.111488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip
23560 23:01:44.112038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip>
23561 23:01:44.143647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip>
23562 23:01:44.144059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip
23564 23:01:44.175633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 RESULT=pass
23566 23:01:44.176068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 RESULT=pass>
23567 23:01:44.207808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip
23569 23:01:44.208247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip>
23570 23:01:44.239559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip>
23571 23:01:44.239961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip
23573 23:01:44.271387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip
23575 23:01:44.271840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip>
23576 23:01:44.304229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 RESULT=pass>
23577 23:01:44.304660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 RESULT=pass
23579 23:01:44.338527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip
23581 23:01:44.338984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip>
23582 23:01:44.371661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip>
23583 23:01:44.372088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip
23585 23:01:44.403824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip
23587 23:01:44.404450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip>
23588 23:01:44.435013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 RESULT=pass>
23589 23:01:44.435484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 RESULT=pass
23591 23:01:44.466408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip>
23592 23:01:44.466876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip
23594 23:01:44.497663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip
23596 23:01:44.498210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip>
23597 23:01:44.532143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip>
23598 23:01:44.532602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip
23600 23:01:44.563909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 RESULT=pass>
23601 23:01:44.564373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 RESULT=pass
23603 23:01:44.597464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip
23605 23:01:44.598116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip>
23606 23:01:44.629395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip
23608 23:01:44.629992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip>
23609 23:01:44.661716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip>
23610 23:01:44.662169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip
23612 23:01:44.692996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 RESULT=pass
23614 23:01:44.693562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 RESULT=pass>
23615 23:01:44.724833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip>
23616 23:01:44.725280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip
23618 23:01:44.755969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip>
23619 23:01:44.756381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip
23621 23:01:44.788616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip
23623 23:01:44.789080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip>
23624 23:01:44.822212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 RESULT=pass
23626 23:01:44.822812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 RESULT=pass>
23627 23:01:44.855379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip>
23628 23:01:44.855833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip
23630 23:01:44.886678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip
23632 23:01:44.887299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip>
23633 23:01:44.920197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip>
23634 23:01:44.920690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip
23636 23:01:44.953304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 RESULT=pass
23638 23:01:44.953914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 RESULT=pass>
23639 23:01:44.984812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip>
23640 23:01:44.985183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip
23642 23:01:45.018425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip>
23643 23:01:45.018836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip
23645 23:01:45.050499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip
23647 23:01:45.051038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip>
23648 23:01:45.085424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 RESULT=pass
23650 23:01:45.086012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 RESULT=pass>
23651 23:01:45.119227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip>
23652 23:01:45.119703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip
23654 23:01:45.151381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip>
23655 23:01:45.151829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip
23657 23:01:45.183383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip>
23658 23:01:45.183858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip
23660 23:01:45.215514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 RESULT=pass>
23661 23:01:45.215963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 RESULT=pass
23663 23:01:45.247625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip
23665 23:01:45.248173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip>
23666 23:01:45.279755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip>
23667 23:01:45.280179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip
23669 23:01:45.311847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip
23671 23:01:45.312615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip>
23672 23:01:45.343970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 RESULT=pass>
23673 23:01:45.344438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 RESULT=pass
23675 23:01:45.375817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip>
23676 23:01:45.376268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip
23678 23:01:45.408231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip>
23679 23:01:45.408707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip
23681 23:01:45.453056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip
23683 23:01:45.453412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip>
23684 23:01:45.493697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 RESULT=pass
23686 23:01:45.494169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 RESULT=pass>
23687 23:01:45.542964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip
23689 23:01:45.543317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip>
23690 23:01:45.577706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip>
23691 23:01:45.578091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip
23693 23:01:45.609871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip>
23694 23:01:45.610268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip
23696 23:01:45.642295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 RESULT=pass>
23697 23:01:45.642762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 RESULT=pass
23699 23:01:45.674466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip
23701 23:01:45.675035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip>
23702 23:01:45.708674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip>
23703 23:01:45.709041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip
23705 23:01:45.741711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip>
23706 23:01:45.742061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip
23708 23:01:45.773988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 RESULT=pass>
23709 23:01:45.774431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 RESULT=pass
23711 23:01:45.806268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip>
23712 23:01:45.806671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip
23714 23:01:45.842947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip
23716 23:01:45.843395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip>
23717 23:01:45.875662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip>
23718 23:01:45.876152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip
23720 23:01:45.909746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 RESULT=pass>
23721 23:01:45.910205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 RESULT=pass
23723 23:01:45.941799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip>
23724 23:01:45.942206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip
23726 23:01:45.974469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip>
23727 23:01:45.974923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip
23729 23:01:46.007178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip>
23730 23:01:46.007632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip
23732 23:01:46.039717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 RESULT=pass
23734 23:01:46.040409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 RESULT=pass>
23735 23:01:46.072502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip>
23736 23:01:46.072894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip
23738 23:01:46.105464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip>
23739 23:01:46.105859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip
23741 23:01:46.138038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip
23743 23:01:46.138463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip>
23744 23:01:46.170127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 RESULT=pass>
23745 23:01:46.170510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 RESULT=pass
23747 23:01:46.203099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip
23749 23:01:46.203705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip>
23750 23:01:46.235663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip>
23751 23:01:46.236132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip
23753 23:01:46.268528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip>
23754 23:01:46.269033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip
23756 23:01:46.300698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 RESULT=pass>
23757 23:01:46.301174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 RESULT=pass
23759 23:01:46.333080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip>
23760 23:01:46.333543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip
23762 23:01:46.364544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip>
23763 23:01:46.364990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip
23765 23:01:46.397403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip>
23766 23:01:46.397864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip
23768 23:01:46.429037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 RESULT=pass>
23769 23:01:46.429482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 RESULT=pass
23771 23:01:46.460756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip>
23772 23:01:46.461187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip
23774 23:01:46.493994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip
23776 23:01:46.494415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip>
23777 23:01:46.525876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip>
23778 23:01:46.526258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip
23780 23:01:46.558645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 RESULT=pass>
23781 23:01:46.559035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 RESULT=pass
23783 23:01:46.591214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip>
23784 23:01:46.591602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip
23786 23:01:46.626367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip>
23787 23:01:46.626856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip
23789 23:01:46.661937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip>
23790 23:01:46.662375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip
23792 23:01:46.697931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 RESULT=pass>
23793 23:01:46.698344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 RESULT=pass
23795 23:01:46.735691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip>
23796 23:01:46.735993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip
23798 23:01:46.773072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip
23800 23:01:46.773519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip>
23801 23:01:46.813535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip>
23802 23:01:46.813928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip
23804 23:01:46.846951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 RESULT=pass
23806 23:01:46.847368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 RESULT=pass>
23807 23:01:46.878838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip
23809 23:01:46.879275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip>
23810 23:01:46.911685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip>
23811 23:01:46.912151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip
23813 23:01:46.946555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip>
23814 23:01:46.946958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip
23816 23:01:46.980063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 RESULT=pass>
23817 23:01:46.980414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 RESULT=pass
23819 23:01:47.013542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip>
23820 23:01:47.013929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip
23822 23:01:47.048008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip>
23823 23:01:47.048372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip
23825 23:01:47.081995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip
23827 23:01:47.082544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip>
23828 23:01:47.114566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 RESULT=pass>
23829 23:01:47.115017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 RESULT=pass
23831 23:01:47.147024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip
23833 23:01:47.147564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip>
23834 23:01:47.180153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip>
23835 23:01:47.180587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip
23837 23:01:47.212983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip>
23838 23:01:47.213448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip
23840 23:01:47.248353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 RESULT=pass>
23841 23:01:47.248833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 RESULT=pass
23843 23:01:47.280683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip
23845 23:01:47.281260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip>
23846 23:01:47.312929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip
23848 23:01:47.313487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip>
23849 23:01:47.345899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip>
23850 23:01:47.346347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip
23852 23:01:47.377788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 RESULT=pass
23854 23:01:47.378332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 RESULT=pass>
23855 23:01:47.409734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip>
23856 23:01:47.410185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip
23858 23:01:47.442686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip
23860 23:01:47.443267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip>
23861 23:01:47.475730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip>
23862 23:01:47.476193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip
23864 23:01:47.507750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 RESULT=pass>
23865 23:01:47.508225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 RESULT=pass
23867 23:01:47.540172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip
23869 23:01:47.540724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip>
23870 23:01:47.572441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip
23872 23:01:47.572976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip>
23873 23:01:47.603939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip>
23874 23:01:47.604395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip
23876 23:01:47.636809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 RESULT=pass
23878 23:01:47.637368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 RESULT=pass>
23879 23:01:47.669467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip>
23880 23:01:47.669923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip
23882 23:01:47.701990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip>
23883 23:01:47.702376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip
23885 23:01:47.736228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip>
23886 23:01:47.736700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip
23888 23:01:47.772036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 RESULT=pass
23890 23:01:47.772717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 RESULT=pass>
23891 23:01:47.809263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip>
23892 23:01:47.809701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip
23894 23:01:47.844293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip
23896 23:01:47.844952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip>
23897 23:01:47.877709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip>
23898 23:01:47.878171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip
23900 23:01:47.911545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 RESULT=pass>
23901 23:01:47.911966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 RESULT=pass
23903 23:01:47.944330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip>
23904 23:01:47.944802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip
23906 23:01:47.976764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip>
23907 23:01:47.977233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip
23909 23:01:48.009432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip>
23910 23:01:48.009890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip
23912 23:01:48.042535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 RESULT=pass>
23913 23:01:48.043003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 RESULT=pass
23915 23:01:48.075984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip>
23916 23:01:48.076498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip
23918 23:01:48.109802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip>
23919 23:01:48.110361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip
23921 23:01:48.147837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip>
23922 23:01:48.148229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip
23924 23:01:48.180648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 RESULT=pass>
23925 23:01:48.181038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 RESULT=pass
23927 23:01:48.213945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip
23929 23:01:48.214369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip>
23930 23:01:48.248431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip
23932 23:01:48.248879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip>
23933 23:01:48.282174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip>
23934 23:01:48.282578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip
23936 23:01:48.314732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 RESULT=pass
23938 23:01:48.315183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 RESULT=pass>
23939 23:01:48.348185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip>
23940 23:01:48.348581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip
23942 23:01:48.382333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip>
23943 23:01:48.382752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip
23945 23:01:48.416646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip>
23946 23:01:48.417058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip
23948 23:01:48.450064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 RESULT=pass>
23949 23:01:48.450539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 RESULT=pass
23951 23:01:48.484446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip>
23952 23:01:48.484911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip
23954 23:01:48.519529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip>
23955 23:01:48.519920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip
23957 23:01:48.553410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip
23959 23:01:48.553963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip>
23960 23:01:48.587379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 RESULT=pass>
23961 23:01:48.587980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 RESULT=pass
23963 23:01:48.620581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip
23965 23:01:48.621182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip>
23966 23:01:48.653307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip>
23967 23:01:48.653774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip
23969 23:01:48.686570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip>
23970 23:01:48.687009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip
23972 23:01:48.719375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 RESULT=pass>
23973 23:01:48.719837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 RESULT=pass
23975 23:01:48.752150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip>
23976 23:01:48.752732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip
23978 23:01:48.785714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip>
23979 23:01:48.786178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip
23981 23:01:48.818087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip>
23982 23:01:48.818518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip
23984 23:01:48.852076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 RESULT=pass
23986 23:01:48.852522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 RESULT=pass>
23987 23:01:48.885823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip>
23988 23:01:48.886231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip
23990 23:01:48.924501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip
23992 23:01:48.925228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip>
23993 23:01:48.973445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip>
23994 23:01:48.973855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip
23996 23:01:49.016080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 RESULT=pass>
23997 23:01:49.016428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 RESULT=pass
23999 23:01:49.048357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip>
24000 23:01:49.048706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip
24002 23:01:49.080403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip>
24003 23:01:49.080857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip
24005 23:01:49.137822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip
24007 23:01:49.138379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip>
24008 23:01:49.169841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 RESULT=pass
24010 23:01:49.170376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 RESULT=pass>
24011 23:01:49.201670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip>
24012 23:01:49.202132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip
24014 23:01:49.235478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip>
24015 23:01:49.235927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip
24017 23:01:49.268322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip
24019 23:01:49.268982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip>
24020 23:01:49.301149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 RESULT=pass>
24021 23:01:49.301683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 RESULT=pass
24023 23:01:49.335396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip>
24024 23:01:49.335821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip
24026 23:01:49.369867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip
24028 23:01:49.370435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip>
24029 23:01:49.404632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip>
24030 23:01:49.405080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip
24032 23:01:49.439648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 RESULT=pass
24034 23:01:49.440190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 RESULT=pass>
24035 23:01:49.475713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip
24037 23:01:49.476266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip>
24038 23:01:49.509297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip>
24039 23:01:49.509817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip
24041 23:01:49.542935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip
24043 23:01:49.543349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip>
24044 23:01:49.575834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 RESULT=pass>
24045 23:01:49.576251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 RESULT=pass
24047 23:01:49.608923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip>
24048 23:01:49.609386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip
24050 23:01:49.641953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip
24052 23:01:49.642497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip>
24053 23:01:49.674157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip>
24054 23:01:49.674675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip
24056 23:01:49.705576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 RESULT=pass>
24057 23:01:49.706080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 RESULT=pass
24059 23:01:49.737582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip
24061 23:01:49.738019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip>
24062 23:01:49.769469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip>
24063 23:01:49.769874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip
24065 23:01:49.801414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip>
24066 23:01:49.801818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip
24068 23:01:49.833524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 RESULT=pass
24070 23:01:49.834160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 RESULT=pass>
24071 23:01:49.865169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip>
24072 23:01:49.865631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip
24074 23:01:49.898893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip
24076 23:01:49.899548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip>
24077 23:01:49.931848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip>
24078 23:01:49.932315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip
24080 23:01:49.964474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 RESULT=pass
24082 23:01:49.965098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 RESULT=pass>
24083 23:01:49.995939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip>
24084 23:01:49.996390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip
24086 23:01:50.032079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip
24088 23:01:50.032646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip>
24089 23:01:50.064316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip>
24090 23:01:50.064709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip
24092 23:01:50.096512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 RESULT=pass
24094 23:01:50.096928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 RESULT=pass>
24095 23:01:50.128868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip
24097 23:01:50.129328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip>
24098 23:01:50.160520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip>
24099 23:01:50.160966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip
24101 23:01:50.192516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip>
24102 23:01:50.192949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip
24104 23:01:50.225727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 RESULT=pass
24106 23:01:50.226321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 RESULT=pass>
24107 23:01:50.259968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip
24109 23:01:50.260511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip>
24110 23:01:50.292496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip>
24111 23:01:50.292930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip
24113 23:01:50.324657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip
24115 23:01:50.325187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip>
24116 23:01:50.356967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 RESULT=pass
24118 23:01:50.357513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 RESULT=pass>
24119 23:01:50.388864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip
24121 23:01:50.389400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip>
24122 23:01:50.421718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip>
24123 23:01:50.422155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip
24125 23:01:50.459998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip>
24126 23:01:50.460473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip
24128 23:01:50.497220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 RESULT=pass>
24129 23:01:50.497696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 RESULT=pass
24131 23:01:50.532415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip>
24132 23:01:50.532789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip
24134 23:01:50.567513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip
24136 23:01:50.567989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip>
24137 23:01:50.602465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip>
24138 23:01:50.602886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip
24140 23:01:50.636900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 RESULT=pass>
24141 23:01:50.637333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 RESULT=pass
24143 23:01:50.669832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip
24145 23:01:50.670280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip>
24146 23:01:50.701660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip>
24147 23:01:50.702059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip
24149 23:01:50.733490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip>
24150 23:01:50.733912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip
24152 23:01:50.765484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 RESULT=pass>
24153 23:01:50.765912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 RESULT=pass
24155 23:01:50.797596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip>
24156 23:01:50.798000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip
24158 23:01:50.829730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip>
24159 23:01:50.830178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip
24161 23:01:50.861544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip>
24162 23:01:50.862040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip
24164 23:01:50.893246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 RESULT=pass>
24165 23:01:50.893699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 RESULT=pass
24167 23:01:50.925397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip
24169 23:01:50.926026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip>
24170 23:01:50.957703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip
24172 23:01:50.958333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip>
24173 23:01:50.989247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip>
24174 23:01:50.989702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip
24176 23:01:51.022190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 RESULT=pass
24178 23:01:51.022833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 RESULT=pass>
24179 23:01:51.054544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip
24181 23:01:51.055168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip>
24182 23:01:51.086953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip
24184 23:01:51.087567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip>
24185 23:01:51.119251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip>
24186 23:01:51.119705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip
24188 23:01:51.151315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 RESULT=pass
24190 23:01:51.151857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 RESULT=pass>
24191 23:01:51.183804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip
24193 23:01:51.184348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip>
24194 23:01:51.216039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip>
24195 23:01:51.216480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip
24197 23:01:51.248338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip
24199 23:01:51.248886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip>
24200 23:01:51.281017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 RESULT=pass>
24201 23:01:51.281477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 RESULT=pass
24203 23:01:51.312809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip>
24204 23:01:51.313247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip
24206 23:01:51.345196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip
24208 23:01:51.345640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip>
24209 23:01:51.377568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip>
24210 23:01:51.378031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip
24212 23:01:51.409232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 RESULT=pass
24214 23:01:51.409790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 RESULT=pass>
24215 23:01:51.441347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip
24217 23:01:51.441898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip>
24218 23:01:51.475109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip>
24219 23:01:51.475587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip
24221 23:01:51.507903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip
24223 23:01:51.508447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip>
24224 23:01:51.540032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 RESULT=pass>
24225 23:01:51.540505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 RESULT=pass
24227 23:01:51.573351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip>
24228 23:01:51.573897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip
24230 23:01:51.606867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip
24232 23:01:51.607661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip>
24233 23:01:51.644025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip>
24234 23:01:51.644524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip
24236 23:01:51.680315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 RESULT=pass>
24237 23:01:51.680697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 RESULT=pass
24239 23:01:51.715141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip>
24240 23:01:51.715522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip
24242 23:01:51.748282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip>
24243 23:01:51.748688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip
24245 23:01:51.780839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip>
24246 23:01:51.781265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip
24248 23:01:51.812742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 RESULT=pass>
24249 23:01:51.813162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 RESULT=pass
24251 23:01:51.844971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip>
24252 23:01:51.845448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip
24254 23:01:51.876439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip>
24255 23:01:51.876911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip
24257 23:01:51.908381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip>
24258 23:01:51.908785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip
24260 23:01:51.940502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 RESULT=pass>
24261 23:01:51.940919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 RESULT=pass
24263 23:01:51.973070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip
24265 23:01:51.973505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip>
24266 23:01:52.005655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip
24268 23:01:52.006290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip>
24269 23:01:52.037800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip
24271 23:01:52.038267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip>
24272 23:01:52.069846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 RESULT=pass>
24273 23:01:52.070222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 RESULT=pass
24275 23:01:52.101914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip>
24276 23:01:52.102343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip
24278 23:01:52.133858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip>
24279 23:01:52.134237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip
24281 23:01:52.165704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip>
24282 23:01:52.166079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip
24284 23:01:52.198022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 RESULT=pass
24286 23:01:52.198562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 RESULT=pass>
24287 23:01:52.230119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip>
24288 23:01:52.230540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip
24290 23:01:52.262146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip>
24291 23:01:52.262529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip
24293 23:01:52.294293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip>
24294 23:01:52.294689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip
24296 23:01:52.327511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 RESULT=pass>
24297 23:01:52.327905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 RESULT=pass
24299 23:01:52.359938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip
24301 23:01:52.360350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip>
24302 23:01:52.392244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip
24304 23:01:52.392657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip>
24305 23:01:52.424548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip>
24306 23:01:52.424987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip
24308 23:01:52.456680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 RESULT=pass>
24309 23:01:52.457101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 RESULT=pass
24311 23:01:52.488698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip>
24312 23:01:52.489076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip
24314 23:01:52.520934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip>
24315 23:01:52.521311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip
24317 23:01:52.552538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip>
24318 23:01:52.552945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip
24320 23:01:52.584107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 RESULT=pass>
24321 23:01:52.584565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 RESULT=pass
24323 23:01:52.616024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip>
24324 23:01:52.616472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip
24326 23:01:52.647911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip>
24327 23:01:52.648309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip
24329 23:01:52.680547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip>
24330 23:01:52.680990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip
24332 23:01:52.712062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 RESULT=pass
24334 23:01:52.712594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 RESULT=pass>
24335 23:01:52.744068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip
24337 23:01:52.744608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip>
24338 23:01:52.775941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip>
24339 23:01:52.776380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip
24341 23:01:52.808078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip>
24342 23:01:52.808503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip
24344 23:01:52.840166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 RESULT=pass
24346 23:01:52.840691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 RESULT=pass>
24347 23:01:52.872178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip>
24348 23:01:52.872613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip
24350 23:01:52.904521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip>
24351 23:01:52.904951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip
24353 23:01:52.937511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip>
24354 23:01:52.937959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip
24356 23:01:52.969875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 RESULT=pass>
24357 23:01:52.970323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 RESULT=pass
24359 23:01:53.001841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip>
24360 23:01:53.002277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip
24362 23:01:53.033784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip>
24363 23:01:53.034234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip
24365 23:01:53.066435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip>
24366 23:01:53.066843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip
24368 23:01:53.099787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 RESULT=pass>
24369 23:01:53.100176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 RESULT=pass
24371 23:01:53.132213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip
24373 23:01:53.132667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip>
24374 23:01:53.164411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip
24376 23:01:53.164853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip>
24377 23:01:53.196652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip>
24378 23:01:53.197116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip
24380 23:01:53.228290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 RESULT=pass>
24381 23:01:53.228731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 RESULT=pass
24383 23:01:53.261245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip>
24384 23:01:53.261693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip
24386 23:01:53.293396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip>
24387 23:01:53.293848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip
24389 23:01:53.325699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip>
24390 23:01:53.326144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip
24392 23:01:53.358484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 RESULT=pass>
24393 23:01:53.358947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 RESULT=pass
24395 23:01:53.390582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip
24397 23:01:53.391028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip>
24398 23:01:53.423311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip>
24399 23:01:53.423706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip
24401 23:01:53.455983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip
24403 23:01:53.456666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip>
24404 23:01:53.488801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 RESULT=pass>
24405 23:01:53.489262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 RESULT=pass
24407 23:01:53.521727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip>
24408 23:01:53.522211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip
24410 23:01:53.557666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip
24412 23:01:53.558287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip>
24413 23:01:53.589992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip
24415 23:01:53.590435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip>
24416 23:01:53.623810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 RESULT=pass
24418 23:01:53.624263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 RESULT=pass>
24419 23:01:53.655894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip>
24420 23:01:53.656310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip
24422 23:01:53.689292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip>
24423 23:01:53.689682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip
24425 23:01:53.724020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip>
24426 23:01:53.724426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip
24428 23:01:53.757523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 RESULT=pass>
24429 23:01:53.757964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 RESULT=pass
24431 23:01:53.789440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip>
24432 23:01:53.789862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip
24434 23:01:53.820984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip>
24435 23:01:53.821361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip
24437 23:01:53.852043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip>
24438 23:01:53.852416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip
24440 23:01:53.883577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 RESULT=pass>
24441 23:01:53.884025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 RESULT=pass
24443 23:01:53.914308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip>
24444 23:01:53.914745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip
24446 23:01:53.945996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip>
24447 23:01:53.946446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip
24449 23:01:53.977366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip>
24450 23:01:53.977842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip
24452 23:01:54.008812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 RESULT=pass
24454 23:01:54.009343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 RESULT=pass>
24455 23:01:54.040628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip
24457 23:01:54.041171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip>
24458 23:01:54.073098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip>
24459 23:01:54.073569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip
24461 23:01:54.105686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip>
24462 23:01:54.106128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip
24464 23:01:54.138096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 RESULT=pass>
24465 23:01:54.138514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 RESULT=pass
24467 23:01:54.170260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip>
24468 23:01:54.170658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip
24470 23:01:54.203276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip>
24471 23:01:54.203737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip
24473 23:01:54.272381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip>
24474 23:01:54.272750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip
24476 23:01:54.304037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 RESULT=pass>
24477 23:01:54.304393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 RESULT=pass
24479 23:01:54.335849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip>
24480 23:01:54.336240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip
24482 23:01:54.367890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip>
24483 23:01:54.368271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip
24485 23:01:54.400072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip>
24486 23:01:54.400453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip
24488 23:01:54.432580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 RESULT=pass>
24489 23:01:54.433049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 RESULT=pass
24491 23:01:54.464247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip>
24492 23:01:54.464720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip
24494 23:01:54.496400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip>
24495 23:01:54.496870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip
24497 23:01:54.528849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip>
24498 23:01:54.529314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip
24500 23:01:54.560813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 RESULT=pass
24502 23:01:54.561375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 RESULT=pass>
24503 23:01:54.592811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip>
24504 23:01:54.593224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip
24506 23:01:54.625852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip
24508 23:01:54.626396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip>
24509 23:01:54.657678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip
24511 23:01:54.658211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip>
24512 23:01:54.689175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 RESULT=pass
24514 23:01:54.689617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 RESULT=pass>
24515 23:01:54.724263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip
24517 23:01:54.724705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip>
24518 23:01:54.757010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip>
24519 23:01:54.757407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip
24521 23:01:54.789985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip>
24522 23:01:54.790391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip
24524 23:01:54.821534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 RESULT=pass>
24525 23:01:54.822017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 RESULT=pass
24527 23:01:54.853411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip>
24528 23:01:54.853799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip
24530 23:01:54.884865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip>
24531 23:01:54.885253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip
24533 23:01:54.916856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip>
24534 23:01:54.917322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip
24536 23:01:54.948652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 RESULT=pass
24538 23:01:54.949082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 RESULT=pass>
24539 23:01:54.979990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip>
24540 23:01:54.980434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip
24542 23:01:55.011864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip>
24543 23:01:55.012279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip
24545 23:01:55.044118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip>
24546 23:01:55.044575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip
24548 23:01:55.077669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 RESULT=pass>
24549 23:01:55.078076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 RESULT=pass
24551 23:01:55.109383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip>
24552 23:01:55.109820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip
24554 23:01:55.140940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip>
24555 23:01:55.141370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip
24557 23:01:55.172701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip>
24558 23:01:55.173158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip
24560 23:01:55.205120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 RESULT=pass>
24561 23:01:55.205569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 RESULT=pass
24563 23:01:55.237063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip>
24564 23:01:55.237512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip
24566 23:01:55.268784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip>
24567 23:01:55.269232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip
24569 23:01:55.300754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip>
24570 23:01:55.301199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip
24572 23:01:55.332777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 RESULT=pass>
24573 23:01:55.333204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 RESULT=pass
24575 23:01:55.366538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip
24577 23:01:55.366993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip>
24578 23:01:55.400197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip
24580 23:01:55.400646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip>
24581 23:01:55.433514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip
24583 23:01:55.434097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip>
24584 23:01:55.466891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 RESULT=pass
24586 23:01:55.467453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 RESULT=pass>
24587 23:01:55.498877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip
24589 23:01:55.499339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip>
24590 23:01:55.530680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip
24592 23:01:55.531125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip>
24593 23:01:55.563305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip>
24594 23:01:55.563718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip
24596 23:01:55.604229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 RESULT=pass
24598 23:01:55.604680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 RESULT=pass>
24599 23:01:55.637702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip>
24600 23:01:55.638172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip
24602 23:01:55.670382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip>
24603 23:01:55.670838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip
24605 23:01:55.702278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip
24607 23:01:55.702891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip>
24608 23:01:55.734309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 RESULT=pass>
24609 23:01:55.734758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 RESULT=pass
24611 23:01:55.767348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip
24613 23:01:55.767884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip>
24614 23:01:55.799658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip
24616 23:01:55.800237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip>
24617 23:01:55.832574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip>
24618 23:01:55.833036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip
24620 23:01:55.865095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 RESULT=pass
24622 23:01:55.865522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 RESULT=pass>
24623 23:01:55.897178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip
24625 23:01:55.897800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip>
24626 23:01:55.929375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip>
24627 23:01:55.929843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip
24629 23:01:55.961801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip
24631 23:01:55.962246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip>
24632 23:01:55.995505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 RESULT=pass>
24633 23:01:55.995885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 RESULT=pass
24635 23:01:56.027862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip>
24636 23:01:56.028322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip
24638 23:01:56.060397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip>
24639 23:01:56.060809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip
24641 23:01:56.092547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip>
24642 23:01:56.092954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip
24644 23:01:56.124230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 RESULT=pass>
24645 23:01:56.124631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 RESULT=pass
24647 23:01:56.156462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip>
24648 23:01:56.156909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip
24650 23:01:56.188882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip>
24651 23:01:56.189363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip
24653 23:01:56.221358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip
24655 23:01:56.221992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip>
24656 23:01:56.253551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 RESULT=pass
24658 23:01:56.254174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 RESULT=pass>
24659 23:01:56.285766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip
24661 23:01:56.286384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip>
24662 23:01:56.317568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip>
24663 23:01:56.318030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip
24665 23:01:56.349437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip
24667 23:01:56.350003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip>
24668 23:01:56.381784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 RESULT=pass
24670 23:01:56.382343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 RESULT=pass>
24671 23:01:56.413855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip
24673 23:01:56.414395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip>
24674 23:01:56.445879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip
24676 23:01:56.446425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip>
24677 23:01:56.478335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip
24679 23:01:56.478886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip>
24680 23:01:56.511557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 RESULT=pass
24682 23:01:56.512089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 RESULT=pass>
24683 23:01:56.543025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip
24685 23:01:56.543463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip>
24686 23:01:56.575986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip>
24687 23:01:56.576460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip
24689 23:01:56.612820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip>
24690 23:01:56.613299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip
24692 23:01:56.649231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 RESULT=pass
24694 23:01:56.649870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 RESULT=pass>
24695 23:01:56.684367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip>
24696 23:01:56.684807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip
24698 23:01:56.718317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip>
24699 23:01:56.718733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip
24701 23:01:56.751947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip>
24702 23:01:56.752351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip
24704 23:01:56.785834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 RESULT=pass>
24705 23:01:56.786322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 RESULT=pass
24707 23:01:56.819071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip
24709 23:01:56.819727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip>
24710 23:01:56.851978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip>
24711 23:01:56.852449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip
24713 23:01:56.885224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip>
24714 23:01:56.885638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip
24716 23:01:56.917827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 RESULT=pass>
24717 23:01:56.918239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 RESULT=pass
24719 23:01:56.950044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip>
24720 23:01:56.950439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip
24722 23:01:56.983822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip>
24723 23:01:56.984223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip
24725 23:01:57.016364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip>
24726 23:01:57.016785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip
24728 23:01:57.048404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 RESULT=pass>
24729 23:01:57.048892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 RESULT=pass
24731 23:01:57.081599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip>
24732 23:01:57.082006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip
24734 23:01:57.113369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip>
24735 23:01:57.113756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip
24737 23:01:57.145502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip>
24738 23:01:57.145926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip
24740 23:01:57.178151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 RESULT=pass>
24741 23:01:57.178544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 RESULT=pass
24743 23:01:57.210043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip>
24744 23:01:57.210505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip
24746 23:01:57.241810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip>
24747 23:01:57.242207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip
24749 23:01:57.273907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip>
24750 23:01:57.274352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip
24752 23:01:57.306503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 RESULT=pass
24754 23:01:57.306964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 RESULT=pass>
24755 23:01:57.338293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip>
24756 23:01:57.338735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip
24758 23:01:57.369923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip>
24759 23:01:57.370366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip
24761 23:01:57.401795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip>
24762 23:01:57.402249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip
24764 23:01:57.433509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 RESULT=pass>
24765 23:01:57.433963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 RESULT=pass
24767 23:01:57.465021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip>
24768 23:01:57.465418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip
24770 23:01:57.497163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip
24772 23:01:57.497601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip>
24773 23:01:57.529107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip>
24774 23:01:57.529506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip
24776 23:01:57.561510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 RESULT=pass
24778 23:01:57.562067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 RESULT=pass>
24779 23:01:57.593360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip
24781 23:01:57.593909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip>
24782 23:01:57.625353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip>
24783 23:01:57.625818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip
24785 23:01:57.657164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip>
24786 23:01:57.657615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip
24788 23:01:57.688982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 RESULT=pass>
24789 23:01:57.689420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 RESULT=pass
24791 23:01:57.721608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip>
24792 23:01:57.722049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip
24794 23:01:57.754315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip>
24795 23:01:57.754748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip
24797 23:01:57.786487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip>
24798 23:01:57.786923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip
24800 23:01:57.818254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 RESULT=pass
24802 23:01:57.818789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 RESULT=pass>
24803 23:01:57.852574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip>
24804 23:01:57.853048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip
24806 23:01:57.885057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip>
24807 23:01:57.885487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip
24809 23:01:57.917567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip>
24810 23:01:57.918018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip
24812 23:01:57.949901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 RESULT=pass
24814 23:01:57.950342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 RESULT=pass>
24815 23:01:57.981617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip>
24816 23:01:57.982022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip
24818 23:01:58.015615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip>
24819 23:01:58.016026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip
24821 23:01:58.048147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip>
24822 23:01:58.048609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip
24824 23:01:58.080012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 RESULT=pass>
24825 23:01:58.080410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 RESULT=pass
24827 23:01:58.112133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip
24829 23:01:58.112563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip>
24830 23:01:58.144192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip>
24831 23:01:58.144655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip
24833 23:01:58.176385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip>
24834 23:01:58.176802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip
24836 23:01:58.208826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 RESULT=pass
24838 23:01:58.209458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 RESULT=pass>
24839 23:01:58.241051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip>
24840 23:01:58.241506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip
24842 23:01:58.273486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip>
24843 23:01:58.273954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip
24845 23:01:58.305732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip>
24846 23:01:58.306171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip
24848 23:01:58.338338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 RESULT=pass>
24849 23:01:58.338732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 RESULT=pass
24851 23:01:58.370235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip>
24852 23:01:58.370622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip
24854 23:01:58.401901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip>
24855 23:01:58.402336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip
24857 23:01:58.433946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip>
24858 23:01:58.434397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip
24860 23:01:58.466179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 RESULT=pass>
24861 23:01:58.466627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 RESULT=pass
24863 23:01:58.498055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip
24865 23:01:58.498649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip>
24866 23:01:58.530969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip
24868 23:01:58.531509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip>
24869 23:01:58.563760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip>
24870 23:01:58.564214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip
24872 23:01:58.596772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 RESULT=pass>
24873 23:01:58.597172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 RESULT=pass
24875 23:01:58.629890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip>
24876 23:01:58.630304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip
24878 23:01:58.663634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip
24880 23:01:58.664088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip>
24881 23:01:58.696239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip>
24882 23:01:58.696625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip
24884 23:01:58.728574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 RESULT=pass>
24885 23:01:58.728985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 RESULT=pass
24887 23:01:58.760544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip>
24888 23:01:58.760959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip
24890 23:01:58.792945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip>
24891 23:01:58.793399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip
24893 23:01:58.824907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip>
24894 23:01:58.825363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip
24896 23:01:58.856551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 RESULT=pass>
24897 23:01:58.857044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 RESULT=pass
24899 23:01:58.888427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip>
24900 23:01:58.888871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip
24902 23:01:58.920335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip>
24903 23:01:58.920713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip
24905 23:01:58.953049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip
24907 23:01:58.953612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip>
24908 23:01:58.984905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 RESULT=pass>
24909 23:01:58.985287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 RESULT=pass
24911 23:01:59.017056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip>
24912 23:01:59.017436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip
24914 23:01:59.051641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip
24916 23:01:59.053855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip>
24917 23:01:59.086059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip>
24918 23:01:59.086469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip
24920 23:01:59.117933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 RESULT=pass>
24921 23:01:59.118325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 RESULT=pass
24923 23:01:59.149934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip>
24924 23:01:59.150397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip
24926 23:01:59.181854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip>
24927 23:01:59.182304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip
24929 23:01:59.213424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip
24931 23:01:59.214052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip>
24932 23:01:59.244960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 RESULT=pass
24934 23:01:59.245584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 RESULT=pass>
24935 23:01:59.277160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip>
24936 23:01:59.277621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip
24938 23:01:59.309032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip>
24939 23:01:59.309501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip
24941 23:01:59.364714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip>
24942 23:01:59.365100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip
24944 23:01:59.410332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 RESULT=pass
24946 23:01:59.410970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 RESULT=pass>
24947 23:01:59.445579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip
24949 23:01:59.446022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip>
24950 23:01:59.480371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip
24952 23:01:59.480951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip>
24953 23:01:59.514578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip
24955 23:01:59.515219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip>
24956 23:01:59.549997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 RESULT=pass
24958 23:01:59.550569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 RESULT=pass>
24959 23:01:59.584797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip>
24960 23:01:59.585213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip
24962 23:01:59.619244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip>
24963 23:01:59.619688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip
24965 23:01:59.654130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip>
24966 23:01:59.654530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip
24968 23:01:59.685852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 RESULT=pass>
24969 23:01:59.686317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 RESULT=pass
24971 23:01:59.717483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip>
24972 23:01:59.717881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip
24974 23:01:59.749203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip>
24975 23:01:59.749641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip
24977 23:01:59.780617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip>
24978 23:01:59.781060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip
24980 23:01:59.811959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 RESULT=pass>
24981 23:01:59.812428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 RESULT=pass
24983 23:01:59.843895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip>
24984 23:01:59.844378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip
24986 23:01:59.876451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip>
24987 23:01:59.876985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip
24989 23:01:59.908148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip
24991 23:01:59.908604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip>
24992 23:01:59.939817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 RESULT=pass>
24993 23:01:59.940287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 RESULT=pass
24995 23:01:59.971718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip>
24996 23:01:59.972167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip
24998 23:02:00.003515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip
25000 23:02:00.003962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip>
25001 23:02:00.036236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip>
25002 23:02:00.036709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip
25004 23:02:00.068522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 RESULT=pass>
25005 23:02:00.068971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 RESULT=pass
25007 23:02:00.100190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip>
25008 23:02:00.100656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip
25010 23:02:00.132378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip>
25011 23:02:00.132814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip
25013 23:02:00.163865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip>
25014 23:02:00.164311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip
25016 23:02:00.195865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 RESULT=pass
25018 23:02:00.196424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 RESULT=pass>
25019 23:02:00.227826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip>
25020 23:02:00.228266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip
25022 23:02:00.260432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip>
25023 23:02:00.260880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip
25025 23:02:00.292636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip>
25026 23:02:00.293075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip
25028 23:02:00.324947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 RESULT=pass>
25029 23:02:00.325429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 RESULT=pass
25031 23:02:00.357205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip
25033 23:02:00.357775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip>
25034 23:02:00.388768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip
25036 23:02:00.389202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip>
25037 23:02:00.420774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip>
25038 23:02:00.421247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip
25040 23:02:00.453236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 RESULT=pass>
25041 23:02:00.453688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 RESULT=pass
25043 23:02:00.497597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip>
25044 23:02:00.498063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip
25046 23:02:00.537309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip
25048 23:02:00.537759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip>
25049 23:02:00.572052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip
25051 23:02:00.572591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip>
25052 23:02:00.607842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 RESULT=pass
25054 23:02:00.608382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 RESULT=pass>
25055 23:02:00.645389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip
25057 23:02:00.645939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip>
25058 23:02:00.682192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip
25060 23:02:00.682746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip>
25061 23:02:00.714307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip>
25062 23:02:00.714758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip
25064 23:02:00.747098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 RESULT=pass>
25065 23:02:00.747557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 RESULT=pass
25067 23:02:00.780658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip>
25068 23:02:00.781054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip
25070 23:02:00.813460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip
25072 23:02:00.814101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip>
25073 23:02:00.846072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip>
25074 23:02:00.846594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip
25076 23:02:00.878885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 RESULT=pass
25078 23:02:00.879304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 RESULT=pass>
25079 23:02:00.911909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip>
25080 23:02:00.912290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip
25082 23:02:00.946020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip>
25083 23:02:00.946512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip
25085 23:02:00.981063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip>
25086 23:02:00.981542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip
25088 23:02:01.013100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 RESULT=pass>
25089 23:02:01.013535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 RESULT=pass
25091 23:02:01.045108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip>
25092 23:02:01.045543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip
25094 23:02:01.078011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip>
25095 23:02:01.078542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip
25097 23:02:01.110668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip>
25098 23:02:01.111067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip
25100 23:02:01.142989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 RESULT=pass
25102 23:02:01.143552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 RESULT=pass>
25103 23:02:01.175882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip>
25104 23:02:01.176267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip
25106 23:02:01.208229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip>
25107 23:02:01.208655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip
25109 23:02:01.240112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip>
25110 23:02:01.240577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip
25112 23:02:01.273138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 RESULT=pass>
25113 23:02:01.273556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 RESULT=pass
25115 23:02:01.308857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip>
25116 23:02:01.309324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip
25118 23:02:01.341373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip>
25119 23:02:01.341827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip
25121 23:02:01.373717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip
25123 23:02:01.374280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip>
25124 23:02:01.404729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 RESULT=pass
25126 23:02:01.405308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 RESULT=pass>
25127 23:02:01.435954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip>
25128 23:02:01.436421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip
25130 23:02:01.468129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip>
25131 23:02:01.468580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip
25133 23:02:01.500201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip>
25134 23:02:01.500651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip
25136 23:02:01.532865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 RESULT=pass
25138 23:02:01.533456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 RESULT=pass>
25139 23:02:01.565124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip
25141 23:02:01.565545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip>
25142 23:02:01.598396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip>
25143 23:02:01.598812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip
25145 23:02:01.631400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip>
25146 23:02:01.631792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip
25148 23:02:01.664229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 RESULT=pass
25150 23:02:01.664656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 RESULT=pass>
25151 23:02:01.697900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip
25153 23:02:01.698456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip>
25154 23:02:01.730400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip>
25155 23:02:01.730784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip
25157 23:02:01.763475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip>
25158 23:02:01.763879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip
25160 23:02:01.797814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 RESULT=pass>
25161 23:02:01.798313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 RESULT=pass
25163 23:02:01.829522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip
25165 23:02:01.830098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip>
25166 23:02:01.861985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip>
25167 23:02:01.862436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip
25169 23:02:01.894449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip>
25170 23:02:01.894902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip
25172 23:02:01.927272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 RESULT=pass
25174 23:02:01.927828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 RESULT=pass>
25175 23:02:01.960746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip
25177 23:02:01.961292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip>
25178 23:02:01.995461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip>
25179 23:02:01.995893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip
25181 23:02:02.029057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip>
25182 23:02:02.029446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip
25184 23:02:02.062757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 RESULT=pass
25186 23:02:02.063341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 RESULT=pass>
25187 23:02:02.096405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip>
25188 23:02:02.096806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip
25190 23:02:02.131956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip>
25191 23:02:02.132423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip
25193 23:02:02.165122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip
25195 23:02:02.165713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip>
25196 23:02:02.198069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 RESULT=pass
25198 23:02:02.198604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 RESULT=pass>
25199 23:02:02.229718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip>
25200 23:02:02.230169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip
25202 23:02:02.262820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip
25204 23:02:02.263398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip>
25205 23:02:02.297705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip
25207 23:02:02.298119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip>
25208 23:02:02.330514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 RESULT=pass
25210 23:02:02.331063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 RESULT=pass>
25211 23:02:02.363666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip
25213 23:02:02.364219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip>
25214 23:02:02.397899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip
25216 23:02:02.398489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip>
25217 23:02:02.432430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip>
25218 23:02:02.432835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip
25220 23:02:02.467948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 RESULT=pass>
25221 23:02:02.468374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 RESULT=pass
25223 23:02:02.502520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip
25225 23:02:02.503079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip>
25226 23:02:02.536042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip>
25227 23:02:02.536520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip
25229 23:02:02.569542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip>
25230 23:02:02.569977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip
25232 23:02:02.603641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 RESULT=pass
25234 23:02:02.604251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 RESULT=pass>
25235 23:02:02.635974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip>
25236 23:02:02.636415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip
25238 23:02:02.668015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip>
25239 23:02:02.668481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip
25241 23:02:02.700246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip>
25242 23:02:02.700687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip
25244 23:02:02.732507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 RESULT=pass
25246 23:02:02.732956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 RESULT=pass>
25247 23:02:02.764957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip
25249 23:02:02.765411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip>
25250 23:02:02.797758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip>
25251 23:02:02.798152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip
25253 23:02:02.830169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip>
25254 23:02:02.830577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip
25256 23:02:02.863315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 RESULT=pass>
25257 23:02:02.863730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 RESULT=pass
25259 23:02:02.895511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip>
25260 23:02:02.895920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip
25262 23:02:02.930237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip>
25263 23:02:02.930731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip
25265 23:02:02.963989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip>
25266 23:02:02.964455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip
25268 23:02:02.997275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 RESULT=pass
25270 23:02:02.997858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 RESULT=pass>
25271 23:02:03.031655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip
25273 23:02:03.032208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip>
25274 23:02:03.065705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip>
25275 23:02:03.066159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip
25277 23:02:03.100579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip
25279 23:02:03.101133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip>
25280 23:02:03.134517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 RESULT=pass
25282 23:02:03.134979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 RESULT=pass>
25283 23:02:03.166876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip
25285 23:02:03.167562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip>
25286 23:02:03.200051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip
25288 23:02:03.200599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip>
25289 23:02:03.234135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip>
25290 23:02:03.234593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip
25292 23:02:03.268482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 RESULT=pass>
25293 23:02:03.268948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 RESULT=pass
25295 23:02:03.303748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip
25297 23:02:03.304313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip>
25298 23:02:03.339010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip
25300 23:02:03.339591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip>
25301 23:02:03.382073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip>
25302 23:02:03.382560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip
25304 23:02:03.415505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 RESULT=pass>
25305 23:02:03.415978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 RESULT=pass
25307 23:02:03.447674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip
25309 23:02:03.448229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip>
25310 23:02:03.480305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip
25312 23:02:03.480757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip>
25313 23:02:03.512311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip>
25314 23:02:03.512713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip
25316 23:02:03.548181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 RESULT=pass
25318 23:02:03.548630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 RESULT=pass>
25319 23:02:03.585413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip
25321 23:02:03.585878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip>
25322 23:02:03.617893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip
25324 23:02:03.618543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip>
25325 23:02:03.651799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip>
25326 23:02:03.652265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip
25328 23:02:03.686678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 RESULT=pass
25330 23:02:03.687235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 RESULT=pass>
25331 23:02:03.720618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip
25333 23:02:03.721209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip>
25334 23:02:03.754281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip
25336 23:02:03.754829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip>
25337 23:02:03.787991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip
25339 23:02:03.788566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip>
25340 23:02:03.820873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 RESULT=pass>
25341 23:02:03.821339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 RESULT=pass
25343 23:02:03.853463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip>
25344 23:02:03.853894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip
25346 23:02:03.885192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip
25348 23:02:03.885599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip>
25349 23:02:03.917078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip
25351 23:02:03.917663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip>
25352 23:02:03.949897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 RESULT=pass
25354 23:02:03.950329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 RESULT=pass>
25355 23:02:03.981944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip>
25356 23:02:03.982329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip
25358 23:02:04.016747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip>
25359 23:02:04.017186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip
25361 23:02:04.052095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip>
25362 23:02:04.052500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip
25364 23:02:04.087720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 RESULT=pass>
25365 23:02:04.088125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 RESULT=pass
25367 23:02:04.122119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip>
25368 23:02:04.122550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip
25370 23:02:04.156240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip
25372 23:02:04.156689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip>
25373 23:02:04.189702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip
25375 23:02:04.190143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip>
25376 23:02:04.222205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 RESULT=pass>
25377 23:02:04.222687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 RESULT=pass
25379 23:02:04.254468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip>
25380 23:02:04.254937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip
25382 23:02:04.288425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip
25384 23:02:04.288972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip>
25385 23:02:04.321601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip>
25386 23:02:04.322058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip
25388 23:02:04.354203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 RESULT=pass
25390 23:02:04.354782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 RESULT=pass>
25391 23:02:04.387199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip
25393 23:02:04.387803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip>
25394 23:02:04.419720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip>
25395 23:02:04.420154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip
25397 23:02:04.452419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip
25399 23:02:04.452961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip>
25400 23:02:04.519476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 RESULT=pass>
25401 23:02:04.519945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 RESULT=pass
25403 23:02:04.552870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip>
25404 23:02:04.553339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip
25406 23:02:04.586571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip>
25407 23:02:04.587045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip
25409 23:02:04.630664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip>
25410 23:02:04.631084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip
25412 23:02:04.663933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 RESULT=pass>
25413 23:02:04.664402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 RESULT=pass
25415 23:02:04.696549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip>
25416 23:02:04.697013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip
25418 23:02:04.728842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip>
25419 23:02:04.729277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip
25421 23:02:04.761207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip>
25422 23:02:04.761639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip
25424 23:02:04.794455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 RESULT=pass>
25425 23:02:04.794891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 RESULT=pass
25427 23:02:04.828612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip>
25428 23:02:04.829028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip
25430 23:02:04.861122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip>
25431 23:02:04.861532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip
25433 23:02:04.893691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip>
25434 23:02:04.894101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip
25436 23:02:04.926307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 RESULT=pass
25438 23:02:04.926931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 RESULT=pass>
25439 23:02:04.959358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip
25441 23:02:04.959972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip>
25442 23:02:04.993211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip>
25443 23:02:04.993684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip
25445 23:02:05.027887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip>
25446 23:02:05.028361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip
25448 23:02:05.060879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 RESULT=pass>
25449 23:02:05.061299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 RESULT=pass
25451 23:02:05.092179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip>
25452 23:02:05.092598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip
25454 23:02:05.123855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip>
25455 23:02:05.124649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip
25457 23:02:05.155709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip>
25458 23:02:05.156138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip
25460 23:02:05.187586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 RESULT=pass>
25461 23:02:05.188027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 RESULT=pass
25463 23:02:05.219399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip>
25464 23:02:05.219879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip
25466 23:02:05.252294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip>
25467 23:02:05.252752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip
25469 23:02:05.284270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip
25471 23:02:05.284811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip>
25472 23:02:05.316174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 RESULT=pass
25474 23:02:05.316710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 RESULT=pass>
25475 23:02:05.348145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip
25477 23:02:05.348737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip>
25478 23:02:05.379970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip>
25479 23:02:05.380366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip
25481 23:02:05.413055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip
25483 23:02:05.413512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip>
25484 23:02:05.444961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 RESULT=pass
25486 23:02:05.445521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 RESULT=pass>
25487 23:02:05.476383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip>
25488 23:02:05.476857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip
25490 23:02:05.510826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip
25492 23:02:05.511325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip>
25493 23:02:05.544462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip>
25494 23:02:05.544898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip
25496 23:02:05.579945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 RESULT=pass>
25497 23:02:05.580425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 RESULT=pass
25499 23:02:05.615704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip
25501 23:02:05.616168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip>
25502 23:02:05.652019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip>
25503 23:02:05.652450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip
25505 23:02:05.686908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip
25507 23:02:05.687366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip>
25508 23:02:05.718330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 RESULT=pass>
25509 23:02:05.718751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 RESULT=pass
25511 23:02:05.750657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip
25513 23:02:05.751088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip>
25514 23:02:05.783131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip>
25515 23:02:05.783529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip
25517 23:02:05.815692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip>
25518 23:02:05.816078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip
25520 23:02:05.848776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 RESULT=pass>
25521 23:02:05.849215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 RESULT=pass
25523 23:02:05.880695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip>
25524 23:02:05.881152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip
25526 23:02:05.912564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip>
25527 23:02:05.913029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip
25529 23:02:05.944699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip
25531 23:02:05.945319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip>
25532 23:02:05.977346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 RESULT=pass>
25533 23:02:05.977814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 RESULT=pass
25535 23:02:06.009824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip
25537 23:02:06.010436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip>
25538 23:02:06.042412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip>
25539 23:02:06.042874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip
25541 23:02:06.074814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip
25543 23:02:06.075421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip>
25544 23:02:06.107813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 RESULT=pass>
25545 23:02:06.108277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 RESULT=pass
25547 23:02:06.139968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip>
25548 23:02:06.140411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip
25550 23:02:06.171909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip
25552 23:02:06.172558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip>
25553 23:02:06.203645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip>
25554 23:02:06.204108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip
25556 23:02:06.236430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 RESULT=pass>
25557 23:02:06.236913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 RESULT=pass
25559 23:02:06.269233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip
25561 23:02:06.269717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip>
25562 23:02:06.302047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip
25564 23:02:06.302602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip>
25565 23:02:06.334578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip>
25566 23:02:06.335017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip
25568 23:02:06.367311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 RESULT=pass>
25569 23:02:06.367746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 RESULT=pass
25571 23:02:06.399810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip>
25572 23:02:06.400256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip
25574 23:02:06.432125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip
25576 23:02:06.432658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip>
25577 23:02:06.465100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip
25579 23:02:06.465692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip>
25580 23:02:06.497570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 RESULT=pass
25582 23:02:06.498023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 RESULT=pass>
25583 23:02:06.529789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip
25585 23:02:06.530410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip>
25586 23:02:06.561804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip
25588 23:02:06.562420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip>
25589 23:02:06.595465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip>
25590 23:02:06.595950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip
25592 23:02:06.629496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 RESULT=pass>
25593 23:02:06.630003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 RESULT=pass
25595 23:02:06.664653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip>
25596 23:02:06.665063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip
25598 23:02:06.700169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip
25600 23:02:06.700723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip>
25601 23:02:06.736774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip>
25602 23:02:06.737201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip
25604 23:02:06.773679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 RESULT=pass>
25605 23:02:06.774105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 RESULT=pass
25607 23:02:06.806490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip
25609 23:02:06.806850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip>
25610 23:02:06.838153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip>
25611 23:02:06.838620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip
25613 23:02:06.870122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip>
25614 23:02:06.870546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip
25616 23:02:06.903627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 RESULT=pass>
25617 23:02:06.904100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 RESULT=pass
25619 23:02:06.935891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip
25621 23:02:06.936524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip>
25622 23:02:06.967717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip>
25623 23:02:06.968178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip
25625 23:02:07.000528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip>
25626 23:02:07.000932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip
25628 23:02:07.033162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 RESULT=pass
25630 23:02:07.033726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 RESULT=pass>
25631 23:02:07.065247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip>
25632 23:02:07.065693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip
25634 23:02:07.097587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip>
25635 23:02:07.098043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip
25637 23:02:07.129691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip
25639 23:02:07.130134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip>
25640 23:02:07.162448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 RESULT=pass>
25641 23:02:07.162912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 RESULT=pass
25643 23:02:07.194955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip
25645 23:02:07.195526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip>
25646 23:02:07.230963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip
25648 23:02:07.231491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip>
25649 23:02:07.263711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip>
25650 23:02:07.264141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip
25652 23:02:07.295801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 RESULT=pass>
25653 23:02:07.296262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 RESULT=pass
25655 23:02:07.328491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip>
25656 23:02:07.328947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip
25658 23:02:07.361668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip
25660 23:02:07.362212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip>
25661 23:02:07.393714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip>
25662 23:02:07.394173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip
25664 23:02:07.425723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 RESULT=pass>
25665 23:02:07.426185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 RESULT=pass
25667 23:02:07.459314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip
25669 23:02:07.459861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip>
25670 23:02:07.491905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip>
25671 23:02:07.492350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip
25673 23:02:07.525303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip>
25674 23:02:07.525765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip
25676 23:02:07.557862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 RESULT=pass>
25677 23:02:07.558323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 RESULT=pass
25679 23:02:07.589710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip
25681 23:02:07.590147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip>
25682 23:02:07.621795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip
25684 23:02:07.622223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip>
25685 23:02:07.654273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip>
25686 23:02:07.654713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip
25688 23:02:07.686257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 RESULT=pass>
25689 23:02:07.686694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 RESULT=pass
25691 23:02:07.718356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip>
25692 23:02:07.718803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip
25694 23:02:07.750194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip>
25695 23:02:07.750657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip
25697 23:02:07.782070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip>
25698 23:02:07.782535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip
25700 23:02:07.813789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 RESULT=pass>
25701 23:02:07.814204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 RESULT=pass
25703 23:02:07.845756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip
25705 23:02:07.846201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip>
25706 23:02:07.877077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip>
25707 23:02:07.877487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip
25709 23:02:07.909298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip>
25710 23:02:07.909751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip
25712 23:02:07.941394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 RESULT=pass>
25713 23:02:07.941869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 RESULT=pass
25715 23:02:07.973273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip
25717 23:02:07.973750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip>
25718 23:02:08.004863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip
25720 23:02:08.005339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip>
25721 23:02:08.036298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip
25723 23:02:08.036760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip>
25724 23:02:08.069600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 RESULT=pass
25726 23:02:08.070075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 RESULT=pass>
25727 23:02:08.101882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip>
25728 23:02:08.102346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip
25730 23:02:08.147340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip
25732 23:02:08.148085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip>
25733 23:02:08.180139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip>
25734 23:02:08.180684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip
25736 23:02:08.219785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 RESULT=pass>
25737 23:02:08.220194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 RESULT=pass
25739 23:02:08.254440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip>
25740 23:02:08.254853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip
25742 23:02:08.291621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip>
25743 23:02:08.292069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip
25745 23:02:08.324821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip>
25746 23:02:08.325219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip
25748 23:02:08.357905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 RESULT=pass>
25749 23:02:08.358315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 RESULT=pass
25751 23:02:08.391524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip
25753 23:02:08.391973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip>
25754 23:02:08.425685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip>
25755 23:02:08.426100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip
25757 23:02:08.459653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip>
25758 23:02:08.460067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip
25760 23:02:08.493323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 RESULT=pass>
25761 23:02:08.493736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 RESULT=pass
25763 23:02:08.528055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip>
25764 23:02:08.528484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip
25766 23:02:08.567288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip>
25767 23:02:08.567752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip
25769 23:02:08.601234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip>
25770 23:02:08.601679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip
25772 23:02:08.634310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 RESULT=pass
25774 23:02:08.634743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 RESULT=pass>
25775 23:02:08.667676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip>
25776 23:02:08.668076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip
25778 23:02:08.701554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip>
25779 23:02:08.701951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip
25781 23:02:08.736281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip>
25782 23:02:08.736705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip
25784 23:02:08.770663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 RESULT=pass>
25785 23:02:08.771124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 RESULT=pass
25787 23:02:08.805373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip
25789 23:02:08.805927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip>
25790 23:02:08.839656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip>
25791 23:02:08.840134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip
25793 23:02:08.874517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip
25795 23:02:08.875076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip>
25796 23:02:08.907157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 RESULT=pass>
25797 23:02:08.907633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 RESULT=pass
25799 23:02:08.939728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip
25801 23:02:08.940307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip>
25802 23:02:08.971695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip>
25803 23:02:08.972166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip
25805 23:02:09.003963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip>
25806 23:02:09.004383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip
25808 23:02:09.039291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 RESULT=pass>
25809 23:02:09.039780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 RESULT=pass
25811 23:02:09.072223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip>
25812 23:02:09.072704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip
25814 23:02:09.104952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip
25816 23:02:09.105504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip>
25817 23:02:09.138141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip>
25818 23:02:09.138613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip
25820 23:02:09.170382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 RESULT=pass>
25821 23:02:09.170846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 RESULT=pass
25823 23:02:09.203986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip>
25824 23:02:09.204465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip
25826 23:02:09.236569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip
25828 23:02:09.237042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip>
25829 23:02:09.270701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip
25831 23:02:09.271165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip>
25832 23:02:09.304281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 RESULT=pass
25834 23:02:09.304746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 RESULT=pass>
25835 23:02:09.336551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip
25837 23:02:09.337016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip>
25838 23:02:09.368139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip>
25839 23:02:09.368592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip
25841 23:02:09.399932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip>
25842 23:02:09.400386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip
25844 23:02:09.431922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 RESULT=pass>
25845 23:02:09.432351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 RESULT=pass
25847 23:02:09.463976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip>
25848 23:02:09.464396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip
25850 23:02:09.496832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip
25852 23:02:09.497275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip>
25853 23:02:09.529543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip>
25854 23:02:09.529965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip
25856 23:02:09.561978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 RESULT=pass>
25857 23:02:09.562396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 RESULT=pass
25859 23:02:09.615934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip>
25860 23:02:09.616362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip
25862 23:02:09.648620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip>
25863 23:02:09.649044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip
25865 23:02:09.682145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip>
25866 23:02:09.682573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip
25868 23:02:09.713835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 RESULT=pass>
25869 23:02:09.714279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 RESULT=pass
25871 23:02:09.746012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip>
25872 23:02:09.746456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip
25874 23:02:09.778043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip>
25875 23:02:09.778457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip
25877 23:02:09.810059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip>
25878 23:02:09.810468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip
25880 23:02:09.842427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 RESULT=pass
25882 23:02:09.842896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 RESULT=pass>
25883 23:02:09.875450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip>
25884 23:02:09.875868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip
25886 23:02:09.908127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip>
25887 23:02:09.908547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip
25889 23:02:09.940744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip>
25890 23:02:09.941156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip
25892 23:02:09.972570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 RESULT=pass>
25893 23:02:09.972990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 RESULT=pass
25895 23:02:10.004944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip>
25896 23:02:10.005361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip
25898 23:02:10.037149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip>
25899 23:02:10.037602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip
25901 23:02:10.069680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip>
25902 23:02:10.070195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip
25904 23:02:10.102357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 RESULT=pass
25906 23:02:10.103116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 RESULT=pass>
25907 23:02:10.135611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip>
25908 23:02:10.136025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip
25910 23:02:10.169088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip
25912 23:02:10.169546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip>
25913 23:02:10.201817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip>
25914 23:02:10.202274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip
25916 23:02:10.233578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 RESULT=pass>
25917 23:02:10.234038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 RESULT=pass
25919 23:02:10.265474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip>
25920 23:02:10.265987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip
25922 23:02:10.298025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip>
25923 23:02:10.298518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip
25925 23:02:10.330447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip
25927 23:02:10.331097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip>
25928 23:02:10.363445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 RESULT=pass>
25929 23:02:10.363913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 RESULT=pass
25931 23:02:10.395348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip>
25932 23:02:10.395812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip
25934 23:02:10.427823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip>
25935 23:02:10.428301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip
25937 23:02:10.460046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip>
25938 23:02:10.460521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip
25940 23:02:10.491730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 RESULT=pass>
25941 23:02:10.492209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 RESULT=pass
25943 23:02:10.526967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip
25945 23:02:10.527523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip>
25946 23:02:10.561896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip
25948 23:02:10.562432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip>
25949 23:02:10.597068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip>
25950 23:02:10.597487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip
25952 23:02:10.632171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 RESULT=pass
25954 23:02:10.632628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 RESULT=pass>
25955 23:02:10.667436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip>
25956 23:02:10.667900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip
25958 23:02:10.701884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip>
25959 23:02:10.702295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip
25961 23:02:10.735219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip>
25962 23:02:10.735618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip
25964 23:02:10.767295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 RESULT=pass
25966 23:02:10.767732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 RESULT=pass>
25967 23:02:10.799402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip
25969 23:02:10.799957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip>
25970 23:02:10.831530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip
25972 23:02:10.832082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip>
25973 23:02:10.863703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip>
25974 23:02:10.864187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip
25976 23:02:10.896467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 RESULT=pass>
25977 23:02:10.896893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 RESULT=pass
25979 23:02:10.932456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip
25981 23:02:10.932983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip>
25982 23:02:10.964878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip>
25983 23:02:10.965345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip
25985 23:02:10.997604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip>
25986 23:02:10.998066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip
25988 23:02:11.029936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 RESULT=pass>
25989 23:02:11.030422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 RESULT=pass
25991 23:02:11.062492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip
25993 23:02:11.062946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip>
25994 23:02:11.095811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip>
25995 23:02:11.096209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip
25997 23:02:11.128801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip
25999 23:02:11.129234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip>
26000 23:02:11.161875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 RESULT=pass
26002 23:02:11.162422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 RESULT=pass>
26003 23:02:11.195056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip
26005 23:02:11.195481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip>
26006 23:02:11.228227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip>
26007 23:02:11.228681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip
26009 23:02:11.260886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip>
26010 23:02:11.261332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip
26012 23:02:11.293561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 RESULT=pass>
26013 23:02:11.294059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 RESULT=pass
26015 23:02:11.326151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip
26017 23:02:11.326696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip>
26018 23:02:11.359036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip
26020 23:02:11.359590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip>
26021 23:02:11.391829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip>
26022 23:02:11.392235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip
26024 23:02:11.425081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 RESULT=pass>
26025 23:02:11.425484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 RESULT=pass
26027 23:02:11.457712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip
26029 23:02:11.458143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip>
26030 23:02:11.490280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip>
26031 23:02:11.490730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip
26033 23:02:11.522495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip>
26034 23:02:11.522917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip
26036 23:02:11.554384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 RESULT=pass>
26037 23:02:11.554874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 RESULT=pass
26039 23:02:11.586582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip
26041 23:02:11.587179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip>
26042 23:02:11.621003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip>
26043 23:02:11.621434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip
26045 23:02:11.655347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip
26047 23:02:11.655846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip>
26048 23:02:11.691347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 RESULT=pass>
26049 23:02:11.691788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 RESULT=pass
26051 23:02:11.727981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip>
26052 23:02:11.728404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip
26054 23:02:11.763401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip
26056 23:02:11.763876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip>
26057 23:02:11.798220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip
26059 23:02:11.798846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip>
26060 23:02:11.829995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 RESULT=pass
26062 23:02:11.830571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 RESULT=pass>
26063 23:02:11.861666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip>
26064 23:02:11.862156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip
26066 23:02:11.893200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip
26068 23:02:11.893850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip>
26069 23:02:11.925152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip>
26070 23:02:11.925634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip
26072 23:02:11.956494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 RESULT=pass>
26073 23:02:11.956979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 RESULT=pass
26075 23:02:11.988860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip>
26076 23:02:11.989285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip
26078 23:02:12.021379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip>
26079 23:02:12.021855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip
26081 23:02:12.053956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip>
26082 23:02:12.054403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip
26084 23:02:12.086623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 RESULT=pass>
26085 23:02:12.087063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 RESULT=pass
26087 23:02:12.119272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip>
26088 23:02:12.119694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip
26090 23:02:12.151617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip
26092 23:02:12.152167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip>
26093 23:02:12.184280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip>
26094 23:02:12.184722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip
26096 23:02:12.216560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 RESULT=pass
26098 23:02:12.217196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 RESULT=pass>
26099 23:02:12.248916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip>
26100 23:02:12.249373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip
26102 23:02:12.281739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip>
26103 23:02:12.282191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip
26105 23:02:12.314619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip>
26106 23:02:12.315032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip
26108 23:02:12.347978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 RESULT=pass
26110 23:02:12.348414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 RESULT=pass>
26111 23:02:12.381215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip
26113 23:02:12.381789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip>
26114 23:02:12.413180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip>
26115 23:02:12.413635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip
26117 23:02:12.445235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip>
26118 23:02:12.445696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip
26120 23:02:12.477919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 RESULT=pass>
26121 23:02:12.478386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 RESULT=pass
26123 23:02:12.509708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip>
26124 23:02:12.510155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip
26126 23:02:12.541712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip>
26127 23:02:12.542166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip
26129 23:02:12.573533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip>
26130 23:02:12.574037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip
26132 23:02:12.607523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 RESULT=pass>
26133 23:02:12.607998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 RESULT=pass
26135 23:02:12.640129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip>
26136 23:02:12.640539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip
26138 23:02:12.676741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip>
26139 23:02:12.677167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip
26141 23:02:12.713198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip
26143 23:02:12.713673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip>
26144 23:02:12.750629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 RESULT=pass
26146 23:02:12.751101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 RESULT=pass>
26147 23:02:12.786523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip
26149 23:02:12.786989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip>
26150 23:02:12.819036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip
26152 23:02:12.819684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip>
26153 23:02:12.851842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip>
26154 23:02:12.852294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip
26156 23:02:12.883978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 RESULT=pass>
26157 23:02:12.884433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 RESULT=pass
26159 23:02:12.916320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip
26161 23:02:12.916890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip>
26162 23:02:12.948138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip
26164 23:02:12.948675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip>
26165 23:02:12.979866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip>
26166 23:02:12.980339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip
26168 23:02:13.011794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 RESULT=pass>
26169 23:02:13.012234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 RESULT=pass
26171 23:02:13.043724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip>
26172 23:02:13.044118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip
26174 23:02:13.076484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip>
26175 23:02:13.076937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip
26177 23:02:13.108659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip>
26178 23:02:13.109103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip
26180 23:02:13.139975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 RESULT=pass>
26181 23:02:13.140410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 RESULT=pass
26183 23:02:13.172313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip>
26184 23:02:13.172774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip
26186 23:02:13.204524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip>
26187 23:02:13.204945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip
26189 23:02:13.236727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip
26191 23:02:13.237177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip>
26192 23:02:13.269215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 RESULT=pass
26194 23:02:13.269662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 RESULT=pass>
26195 23:02:13.301540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip>
26196 23:02:13.301944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip
26198 23:02:13.333486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip>
26199 23:02:13.333901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip
26201 23:02:13.366127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip
26203 23:02:13.366563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip>
26204 23:02:13.398315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 RESULT=pass
26206 23:02:13.398861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 RESULT=pass>
26207 23:02:13.433855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip
26209 23:02:13.434414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip>
26210 23:02:13.466324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip>
26211 23:02:13.466751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip
26213 23:02:13.498594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip>
26214 23:02:13.499012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip
26216 23:02:13.534633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 RESULT=pass
26218 23:02:13.534984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 RESULT=pass>
26219 23:02:13.568594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip>
26220 23:02:13.569046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip
26222 23:02:13.600735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip>
26223 23:02:13.601170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip
26225 23:02:13.632300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip>
26226 23:02:13.632752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip
26228 23:02:13.663791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 RESULT=pass>
26229 23:02:13.664257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 RESULT=pass
26231 23:02:13.696130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip
26233 23:02:13.696666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip>
26234 23:02:13.728432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip>
26235 23:02:13.728870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip
26237 23:02:13.760297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip>
26238 23:02:13.760735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip
26240 23:02:13.791625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 RESULT=pass>
26241 23:02:13.792075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 RESULT=pass
26243 23:02:13.823561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip>
26244 23:02:13.824028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip
26246 23:02:13.855246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip>
26247 23:02:13.855713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip
26249 23:02:13.887689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip
26251 23:02:13.888154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip>
26252 23:02:13.919417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 RESULT=pass>
26253 23:02:13.919862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 RESULT=pass
26255 23:02:13.951602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip>
26256 23:02:13.952049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip
26258 23:02:13.983388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip
26260 23:02:13.983923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip>
26261 23:02:14.015650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip>
26262 23:02:14.016080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip
26264 23:02:14.047845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 RESULT=pass
26266 23:02:14.048374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 RESULT=pass>
26267 23:02:14.079804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip>
26268 23:02:14.080239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip
26270 23:02:14.111902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip>
26271 23:02:14.112332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip
26273 23:02:14.143948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip>
26274 23:02:14.144385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip
26276 23:02:14.175834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 RESULT=pass>
26277 23:02:14.176272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 RESULT=pass
26279 23:02:14.214764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip
26281 23:02:14.215345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip>
26282 23:02:14.247187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip>
26283 23:02:14.247657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip
26285 23:02:14.279411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip>
26286 23:02:14.279853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip
26288 23:02:14.311832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 RESULT=pass
26290 23:02:14.312374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 RESULT=pass>
26291 23:02:14.342934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip
26293 23:02:14.343553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip>
26294 23:02:14.374732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip
26296 23:02:14.375365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip>
26297 23:02:14.406340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip>
26298 23:02:14.406779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip
26300 23:02:14.437557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 RESULT=pass>
26301 23:02:14.438034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 RESULT=pass
26303 23:02:14.469659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip
26305 23:02:14.470227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip>
26306 23:02:14.501677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip
26308 23:02:14.502218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip>
26309 23:02:14.533002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip
26311 23:02:14.533461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip>
26312 23:02:14.564921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 RESULT=pass>
26313 23:02:14.565382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 RESULT=pass
26315 23:02:14.596802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip>
26316 23:02:14.597279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip
26318 23:02:14.628357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip
26320 23:02:14.628909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip>
26321 23:02:14.659804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip>
26322 23:02:14.660257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip
26324 23:02:14.691370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 RESULT=pass>
26325 23:02:14.691834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 RESULT=pass
26327 23:02:14.743439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip>
26328 23:02:14.743905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip
26330 23:02:14.775872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip
26332 23:02:14.776407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip>
26333 23:02:14.807039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip
26335 23:02:14.807606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip>
26336 23:02:14.838721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 RESULT=pass
26338 23:02:14.839255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 RESULT=pass>
26339 23:02:14.877968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip>
26340 23:02:14.878312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip
26342 23:02:14.913232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip>
26343 23:02:14.913580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip
26345 23:02:14.949017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip>
26346 23:02:14.949362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip
26348 23:02:14.984477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 RESULT=pass>
26349 23:02:14.984815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 RESULT=pass
26351 23:02:15.020025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip>
26352 23:02:15.020376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip
26354 23:02:15.054877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip
26356 23:02:15.055301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip>
26357 23:02:15.090334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip>
26358 23:02:15.090704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip
26360 23:02:15.121949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 RESULT=pass>
26361 23:02:15.122351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 RESULT=pass
26363 23:02:15.153825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip>
26364 23:02:15.154229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip
26366 23:02:15.186234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip>
26367 23:02:15.186624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip
26369 23:02:15.217863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip>
26370 23:02:15.218253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip
26372 23:02:15.248996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 RESULT=pass>
26373 23:02:15.249420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 RESULT=pass
26375 23:02:15.280352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip>
26376 23:02:15.280783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip
26378 23:02:15.312160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip
26380 23:02:15.312681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip>
26381 23:02:15.344117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip>
26382 23:02:15.344566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip
26384 23:02:15.377139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 RESULT=pass
26386 23:02:15.377687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 RESULT=pass>
26387 23:02:15.409468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip
26389 23:02:15.409905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip>
26390 23:02:15.441699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip>
26391 23:02:15.442089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip
26393 23:02:15.473546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip>
26394 23:02:15.473994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip
26396 23:02:15.505040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 RESULT=pass>
26397 23:02:15.505461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 RESULT=pass
26399 23:02:15.539435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip>
26400 23:02:15.539885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip
26402 23:02:15.571897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip>
26403 23:02:15.572338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip
26405 23:02:15.604399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip>
26406 23:02:15.604813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip
26408 23:02:15.637582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 RESULT=pass>
26409 23:02:15.638024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 RESULT=pass
26411 23:02:15.672537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip
26413 23:02:15.673001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip>
26414 23:02:15.709524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip
26416 23:02:15.709991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip>
26417 23:02:15.743687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip>
26418 23:02:15.744104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip
26420 23:02:15.776694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 RESULT=pass
26422 23:02:15.777152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 RESULT=pass>
26423 23:02:15.808458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip
26425 23:02:15.808980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip>
26426 23:02:15.840816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip
26428 23:02:15.841259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip>
26429 23:02:15.872144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip
26431 23:02:15.872690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip>
26432 23:02:15.904990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 RESULT=pass>
26433 23:02:15.905460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 RESULT=pass
26435 23:02:15.937397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip>
26436 23:02:15.937857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip
26438 23:02:15.969434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip>
26439 23:02:15.969819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip
26441 23:02:16.001563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip>
26442 23:02:16.001950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip
26444 23:02:16.033269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 RESULT=pass
26446 23:02:16.033697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 RESULT=pass>
26447 23:02:16.065015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip>
26448 23:02:16.065461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip
26450 23:02:16.096436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip>
26451 23:02:16.096869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip
26453 23:02:16.128705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip>
26454 23:02:16.129125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip
26456 23:02:16.160617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 RESULT=pass>
26457 23:02:16.161070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 RESULT=pass
26459 23:02:16.192548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip>
26460 23:02:16.193010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip
26462 23:02:16.224917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip>
26463 23:02:16.225344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip
26465 23:02:16.257709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip>
26466 23:02:16.258099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip
26468 23:02:16.288518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 RESULT=pass>
26469 23:02:16.288901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 RESULT=pass
26471 23:02:16.319841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip
26473 23:02:16.320286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip>
26474 23:02:16.351922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip>
26475 23:02:16.352374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip
26477 23:02:16.383375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip>
26478 23:02:16.383769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip
26480 23:02:16.415892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 RESULT=pass>
26481 23:02:16.416322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 RESULT=pass
26483 23:02:16.448838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip
26485 23:02:16.449470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip>
26486 23:02:16.480785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip>
26487 23:02:16.481181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip
26489 23:02:16.513132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip>
26490 23:02:16.513514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip
26492 23:02:16.547203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 RESULT=pass
26494 23:02:16.547624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 RESULT=pass>
26495 23:02:16.579244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip
26497 23:02:16.579665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip>
26498 23:02:16.614124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip>
26499 23:02:16.614582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip
26501 23:02:16.647439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip>
26502 23:02:16.647936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip
26504 23:02:16.680801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 RESULT=pass>
26505 23:02:16.681288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 RESULT=pass
26507 23:02:16.714428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip
26509 23:02:16.714904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip>
26510 23:02:16.747651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip>
26511 23:02:16.748123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip
26513 23:02:16.780170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip>
26514 23:02:16.780567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip
26516 23:02:16.812375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 RESULT=pass>
26517 23:02:16.812846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 RESULT=pass
26519 23:02:16.843839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip>
26520 23:02:16.844279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip
26522 23:02:16.876735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip>
26523 23:02:16.877171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip
26525 23:02:16.909217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip>
26526 23:02:16.909672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip
26528 23:02:16.942414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 RESULT=pass>
26529 23:02:16.942878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 RESULT=pass
26531 23:02:16.976037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip>
26532 23:02:16.976480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip
26534 23:02:17.008354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip
26536 23:02:17.008901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip>
26537 23:02:17.041036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip
26539 23:02:17.041573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip>
26540 23:02:17.073765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 RESULT=pass
26542 23:02:17.074310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 RESULT=pass>
26543 23:02:17.105383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip>
26544 23:02:17.105821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip
26546 23:02:17.137717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip>
26547 23:02:17.138157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip
26549 23:02:17.172826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip>
26550 23:02:17.173286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip
26552 23:02:17.204014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 RESULT=pass>
26553 23:02:17.204423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 RESULT=pass
26555 23:02:17.235030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip
26557 23:02:17.235474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip>
26558 23:02:17.266548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip>
26559 23:02:17.266952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip
26561 23:02:17.298165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip
26563 23:02:17.298619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip>
26564 23:02:17.334252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 RESULT=pass>
26565 23:02:17.334673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 RESULT=pass
26567 23:02:17.365574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip>
26568 23:02:17.365996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip
26570 23:02:17.396883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip>
26571 23:02:17.397301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip
26573 23:02:17.428520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip
26575 23:02:17.429085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip>
26576 23:02:17.460689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 RESULT=pass>
26577 23:02:17.461164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 RESULT=pass
26579 23:02:17.495479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip>
26580 23:02:17.495921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip
26582 23:02:17.530228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip>
26583 23:02:17.530661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip
26585 23:02:17.561784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip>
26586 23:02:17.562219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip
26588 23:02:17.595536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 RESULT=pass
26590 23:02:17.596058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 RESULT=pass>
26591 23:02:17.628260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip>
26592 23:02:17.628687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip
26594 23:02:17.660781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip>
26595 23:02:17.661222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip
26597 23:02:17.697972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip>
26598 23:02:17.698416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip
26600 23:02:17.729878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 RESULT=pass
26602 23:02:17.730443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 RESULT=pass>
26603 23:02:17.761202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip
26605 23:02:17.761758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip>
26606 23:02:17.793418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip>
26607 23:02:17.793897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip
26609 23:02:17.826004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip>
26610 23:02:17.826440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip
26612 23:02:17.863456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 RESULT=pass
26614 23:02:17.864000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 RESULT=pass>
26615 23:02:17.896546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip>
26616 23:02:17.897015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip
26618 23:02:17.929624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip
26620 23:02:17.930176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip>
26621 23:02:17.961549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip>
26622 23:02:17.962008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip
26624 23:02:17.993499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 RESULT=pass>
26625 23:02:17.993974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 RESULT=pass
26627 23:02:18.028275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip>
26628 23:02:18.028731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip
26630 23:02:18.063099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip>
26631 23:02:18.063570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip
26633 23:02:18.095692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip>
26634 23:02:18.096152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip
26636 23:02:18.127431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 RESULT=pass
26638 23:02:18.128120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 RESULT=pass>
26639 23:02:18.159101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip
26641 23:02:18.159678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip>
26642 23:02:18.192163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip>
26643 23:02:18.192614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip
26645 23:02:18.229444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip>
26646 23:02:18.229890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip
26648 23:02:18.261075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 RESULT=pass
26650 23:02:18.261610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 RESULT=pass>
26651 23:02:18.293043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip>
26652 23:02:18.293471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip
26654 23:02:18.325321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip
26656 23:02:18.325898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip>
26657 23:02:18.357246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip>
26658 23:02:18.357636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip
26660 23:02:18.393444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 RESULT=pass>
26661 23:02:18.393943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 RESULT=pass
26663 23:02:18.426389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip>
26664 23:02:18.426846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip
26666 23:02:18.458333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip>
26667 23:02:18.458799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip
26669 23:02:18.490266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip>
26670 23:02:18.490704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip
26672 23:02:18.522968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 RESULT=pass
26674 23:02:18.523537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 RESULT=pass>
26675 23:02:18.555912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip>
26676 23:02:18.556377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip
26678 23:02:18.594445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip>
26679 23:02:18.594865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip
26681 23:02:18.629073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip
26683 23:02:18.629660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip>
26684 23:02:18.661333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 RESULT=pass>
26685 23:02:18.661807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 RESULT=pass
26687 23:02:18.692942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip>
26688 23:02:18.693415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip
26690 23:02:18.725661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip
26692 23:02:18.726114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip>
26693 23:02:18.763574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip
26695 23:02:18.764000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip>
26696 23:02:18.795888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 RESULT=pass
26698 23:02:18.796312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 RESULT=pass>
26699 23:02:18.827447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip>
26700 23:02:18.827827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip
26702 23:02:18.858895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip
26704 23:02:18.859315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip>
26705 23:02:18.890144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip>
26706 23:02:18.890576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip
26708 23:02:18.925010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 RESULT=pass>
26709 23:02:18.925442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 RESULT=pass
26711 23:02:18.958990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip
26713 23:02:18.959426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip>
26714 23:02:18.991557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip>
26715 23:02:18.991943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip
26717 23:02:19.023426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip>
26718 23:02:19.023870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip
26720 23:02:19.055737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 RESULT=pass>
26721 23:02:19.056151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 RESULT=pass
26723 23:02:19.087889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip
26725 23:02:19.088422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip>
26726 23:02:19.124464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip>
26727 23:02:19.124871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip
26729 23:02:19.156741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip>
26730 23:02:19.157151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip
26732 23:02:19.188374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 RESULT=pass
26734 23:02:19.188807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 RESULT=pass>
26735 23:02:19.219827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip>
26736 23:02:19.220228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip
26738 23:02:19.251788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip>
26739 23:02:19.252180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip
26741 23:02:19.285708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip
26743 23:02:19.286131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip>
26744 23:02:19.317659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 RESULT=pass
26746 23:02:19.318237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 RESULT=pass>
26747 23:02:19.352043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip>
26748 23:02:19.352500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip
26750 23:02:19.384395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip
26752 23:02:19.384866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip>
26753 23:02:19.416533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip>
26754 23:02:19.416978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip
26756 23:02:19.448617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 RESULT=pass>
26757 23:02:19.449149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 RESULT=pass
26759 23:02:19.482546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip>
26760 23:02:19.483001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip
26762 23:02:19.515428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip
26764 23:02:19.515973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip>
26765 23:02:19.548014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip>
26766 23:02:19.548575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip
26768 23:02:19.581331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 RESULT=pass>
26769 23:02:19.581906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 RESULT=pass
26771 23:02:19.613947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip>
26772 23:02:19.614470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip
26774 23:02:19.647008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip
26776 23:02:19.647558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip>
26777 23:02:19.679911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip
26779 23:02:19.680451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip>
26780 23:02:19.712140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 RESULT=pass>
26781 23:02:19.712576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 RESULT=pass
26783 23:02:19.744330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip>
26784 23:02:19.744780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip
26786 23:02:19.776432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip>
26787 23:02:19.776835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip
26789 23:02:19.808627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip>
26790 23:02:19.809030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip
26792 23:02:19.865378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 RESULT=pass>
26793 23:02:19.865840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 RESULT=pass
26795 23:02:19.897579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip>
26796 23:02:19.898056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip
26798 23:02:19.929029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip>
26799 23:02:19.929437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip
26801 23:02:19.961161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip>
26802 23:02:19.961549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip
26804 23:02:19.995615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 RESULT=pass>
26805 23:02:19.996103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 RESULT=pass
26807 23:02:20.028003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip>
26808 23:02:20.028470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip
26810 23:02:20.060505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip>
26811 23:02:20.060966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip
26813 23:02:20.092497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip
26815 23:02:20.093111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip>
26816 23:02:20.124045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 RESULT=pass
26818 23:02:20.124652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 RESULT=pass>
26819 23:02:20.156039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip
26821 23:02:20.156677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip>
26822 23:02:20.188738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip
26824 23:02:20.189305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip>
26825 23:02:20.220835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip>
26826 23:02:20.221278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip
26828 23:02:20.252697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 RESULT=pass
26830 23:02:20.253234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 RESULT=pass>
26831 23:02:20.283937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip>
26832 23:02:20.284379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip
26834 23:02:20.315942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip>
26835 23:02:20.316384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip
26837 23:02:20.348666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip
26839 23:02:20.349229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip>
26840 23:02:20.381113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 RESULT=pass>
26841 23:02:20.381578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 RESULT=pass
26843 23:02:20.412925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip
26845 23:02:20.413494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip>
26846 23:02:20.444779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip>
26847 23:02:20.445215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip
26849 23:02:20.476363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip>
26850 23:02:20.476824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip
26852 23:02:20.508315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 RESULT=pass
26854 23:02:20.508769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 RESULT=pass>
26855 23:02:20.549297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip
26857 23:02:20.549915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip>
26858 23:02:20.587604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip>
26859 23:02:20.587994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip
26861 23:02:20.622900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip
26863 23:02:20.623475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip>
26864 23:02:20.659939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 RESULT=pass>
26865 23:02:20.660340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 RESULT=pass
26867 23:02:20.698256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip
26869 23:02:20.698828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip>
26870 23:02:20.736789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip>
26871 23:02:20.737249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip
26873 23:02:20.769120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip
26875 23:02:20.769674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip>
26876 23:02:20.800005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 RESULT=pass>
26877 23:02:20.800470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 RESULT=pass
26879 23:02:20.832074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip>
26880 23:02:20.832532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip
26882 23:02:20.863781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip>
26883 23:02:20.864214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip
26885 23:02:20.896122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip>
26886 23:02:20.896616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip
26888 23:02:20.929840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 RESULT=pass>
26889 23:02:20.930317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 RESULT=pass
26891 23:02:20.961309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip>
26892 23:02:20.961785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip
26894 23:02:20.992366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip
26896 23:02:20.992995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip>
26897 23:02:21.024444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip
26899 23:02:21.025002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip>
26900 23:02:21.056688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 RESULT=pass>
26901 23:02:21.057106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 RESULT=pass
26903 23:02:21.089302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip
26905 23:02:21.089750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip>
26906 23:02:21.122091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip>
26907 23:02:21.122499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip
26909 23:02:21.154317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip>
26910 23:02:21.154772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip
26912 23:02:21.185262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 RESULT=pass
26914 23:02:21.185825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 RESULT=pass>
26915 23:02:21.216944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip>
26916 23:02:21.217407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip
26918 23:02:21.249561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip>
26919 23:02:21.249975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip
26921 23:02:21.282905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip
26923 23:02:21.283346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip>
26924 23:02:21.316989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 RESULT=pass
26926 23:02:21.317439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 RESULT=pass>
26927 23:02:21.349084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip>
26928 23:02:21.349492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip
26930 23:02:21.380884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip
26932 23:02:21.381321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip>
26933 23:02:21.412656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip>
26934 23:02:21.413051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip
26936 23:02:21.445495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 RESULT=pass>
26937 23:02:21.445927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 RESULT=pass
26939 23:02:21.477311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip>
26940 23:02:21.477773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip
26942 23:02:21.508994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip>
26943 23:02:21.509461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip
26945 23:02:21.541717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip
26947 23:02:21.542345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip>
26948 23:02:21.572878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 RESULT=pass>
26949 23:02:21.573339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 RESULT=pass
26951 23:02:21.605129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip
26953 23:02:21.605677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip>
26954 23:02:21.644389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip>
26955 23:02:21.644848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip
26957 23:02:21.677997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip
26959 23:02:21.678543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip>
26960 23:02:21.712161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 RESULT=pass
26962 23:02:21.712693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 RESULT=pass>
26963 23:02:21.746319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip>
26964 23:02:21.746768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip
26966 23:02:21.780947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip
26968 23:02:21.781488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip>
26969 23:02:21.814320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip>
26970 23:02:21.814769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip
26972 23:02:21.846726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 RESULT=pass
26974 23:02:21.847266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 RESULT=pass>
26975 23:02:21.878270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip>
26976 23:02:21.878672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip
26978 23:02:21.909796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip>
26979 23:02:21.910196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip
26981 23:02:21.941115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip
26983 23:02:21.941745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip>
26984 23:02:21.978814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 RESULT=pass
26986 23:02:21.979411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 RESULT=pass>
26987 23:02:22.012029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip
26989 23:02:22.012602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip>
26990 23:02:22.043804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip>
26991 23:02:22.044200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip
26993 23:02:22.076361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip>
26994 23:02:22.076763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip
26996 23:02:22.110052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 RESULT=pass>
26997 23:02:22.110526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 RESULT=pass
26999 23:02:22.141612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip>
27000 23:02:22.142091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip
27002 23:02:22.176288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip>
27003 23:02:22.176719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip
27005 23:02:22.208124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip
27007 23:02:22.208591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip>
27008 23:02:22.239806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 RESULT=pass
27010 23:02:22.240339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 RESULT=pass>
27011 23:02:22.271599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip>
27012 23:02:22.272062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip
27014 23:02:22.303070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip
27016 23:02:22.303687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip>
27017 23:02:22.336332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip>
27018 23:02:22.336797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip
27020 23:02:22.367728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 RESULT=pass>
27021 23:02:22.368208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 RESULT=pass
27023 23:02:22.399718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip>
27024 23:02:22.400175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip
27026 23:02:22.431853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip
27028 23:02:22.432453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip>
27029 23:02:22.464035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip>
27030 23:02:22.464452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip
27032 23:02:22.496309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 RESULT=pass
27034 23:02:22.496937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 RESULT=pass>
27035 23:02:22.529946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip
27037 23:02:22.530549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip>
27038 23:02:22.561715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip>
27039 23:02:22.562125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip
27041 23:02:22.593784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip
27043 23:02:22.594247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip>
27044 23:02:22.625863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 RESULT=pass
27046 23:02:22.626322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 RESULT=pass>
27047 23:02:22.657259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip>
27048 23:02:22.657707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip
27050 23:02:22.689612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip
27052 23:02:22.690502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip>
27053 23:02:22.721719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip
27055 23:02:22.722284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip>
27056 23:02:22.753711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 RESULT=pass
27058 23:02:22.754172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 RESULT=pass>
27059 23:02:22.785322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip>
27060 23:02:22.785749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip
27062 23:02:22.817332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip>
27063 23:02:22.817741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip
27065 23:02:22.849610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip
27067 23:02:22.850168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip>
27068 23:02:22.882030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 RESULT=pass>
27069 23:02:22.882445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 RESULT=pass
27071 23:02:22.914328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip>
27072 23:02:22.914753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip
27074 23:02:22.947786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip
27076 23:02:22.948337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip>
27077 23:02:22.979795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip>
27078 23:02:22.980262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip
27080 23:02:23.012391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 RESULT=pass>
27081 23:02:23.012871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 RESULT=pass
27083 23:02:23.044687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip>
27084 23:02:23.045134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip
27086 23:02:23.076908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip>
27087 23:02:23.077375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip
27089 23:02:23.108941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip>
27090 23:02:23.109419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip
27092 23:02:23.140010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 RESULT=pass>
27093 23:02:23.140463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 RESULT=pass
27095 23:02:23.174388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip>
27096 23:02:23.174849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip
27098 23:02:23.209174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip
27100 23:02:23.209871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip>
27101 23:02:23.242627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip>
27102 23:02:23.243075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip
27104 23:02:23.274131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 RESULT=pass>
27105 23:02:23.274564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 RESULT=pass
27107 23:02:23.306977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip
27109 23:02:23.307504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip>
27110 23:02:23.339309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip>
27111 23:02:23.339727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip
27113 23:02:23.371943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip>
27114 23:02:23.372354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip
27116 23:02:23.403988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 RESULT=pass>
27117 23:02:23.404439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 RESULT=pass
27119 23:02:23.436078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip>
27120 23:02:23.436527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip
27122 23:02:23.467872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip>
27123 23:02:23.468304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip
27125 23:02:23.499797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip>
27126 23:02:23.500219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip
27128 23:02:23.531648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 RESULT=pass>
27129 23:02:23.532069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 RESULT=pass
27131 23:02:23.563749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip>
27132 23:02:23.564183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip
27134 23:02:23.596489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip>
27135 23:02:23.596951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip
27137 23:02:23.629336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip>
27138 23:02:23.629793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip
27140 23:02:23.661038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 RESULT=pass>
27141 23:02:23.661433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 RESULT=pass
27143 23:02:23.693500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip>
27144 23:02:23.693956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip
27146 23:02:23.726256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip>
27147 23:02:23.726713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip
27149 23:02:23.757989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip>
27150 23:02:23.758467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip
27152 23:02:23.790733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 RESULT=pass
27154 23:02:23.791345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 RESULT=pass>
27155 23:02:23.823006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip
27157 23:02:23.823548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip>
27158 23:02:23.854514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip
27160 23:02:23.855052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip>
27161 23:02:23.885703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip>
27162 23:02:23.886086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip
27164 23:02:23.916765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 RESULT=pass
27166 23:02:23.917189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 RESULT=pass>
27167 23:02:23.949013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip
27169 23:02:23.949433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip>
27170 23:02:23.980283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip>
27171 23:02:23.980671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip
27173 23:02:24.011754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip>
27174 23:02:24.012094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip
27176 23:02:24.044301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 RESULT=pass>
27177 23:02:24.044726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 RESULT=pass
27179 23:02:24.076000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip>
27180 23:02:24.076448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip
27182 23:02:24.107767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip
27184 23:02:24.108211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip>
27185 23:02:24.139971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip>
27186 23:02:24.140363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip
27188 23:02:24.171263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 RESULT=pass
27190 23:02:24.171808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 RESULT=pass>
27191 23:02:24.202553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip>
27192 23:02:24.202998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip
27194 23:02:24.235832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip>
27195 23:02:24.236234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip
27197 23:02:24.267932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip>
27198 23:02:24.268391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip
27200 23:02:24.299694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 RESULT=pass>
27201 23:02:24.300159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 RESULT=pass
27203 23:02:24.331556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip>
27204 23:02:24.331989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip
27206 23:02:24.363049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip
27208 23:02:24.363592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip>
27209 23:02:24.395535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip>
27210 23:02:24.395959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip
27212 23:02:24.428104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 RESULT=pass
27214 23:02:24.428547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 RESULT=pass>
27215 23:02:24.459787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip>
27216 23:02:24.460149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip
27218 23:02:24.491899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip>
27219 23:02:24.492354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip
27221 23:02:24.523545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip>
27222 23:02:24.523998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip
27224 23:02:24.554872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 RESULT=pass
27226 23:02:24.555507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 RESULT=pass>
27227 23:02:24.586551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip>
27228 23:02:24.587006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip
27230 23:02:24.618490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip>
27231 23:02:24.618952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip
27233 23:02:24.650616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip>
27234 23:02:24.651028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip
27236 23:02:24.683984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 RESULT=pass
27238 23:02:24.684420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 RESULT=pass>
27239 23:02:24.715846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip>
27240 23:02:24.716239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip
27242 23:02:24.748024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip
27244 23:02:24.748451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip>
27245 23:02:24.780418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip
27247 23:02:24.781032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip>
27248 23:02:24.812443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 RESULT=pass>
27249 23:02:24.812893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 RESULT=pass
27251 23:02:24.846351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip
27253 23:02:24.846828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip>
27254 23:02:24.879557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip
27256 23:02:24.880209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip>
27257 23:02:24.911787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip>
27258 23:02:24.912240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip
27260 23:02:24.965063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 RESULT=pass>
27261 23:02:24.965536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 RESULT=pass
27263 23:02:25.001512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip>
27264 23:02:25.001938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip
27266 23:02:25.036004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip>
27267 23:02:25.036480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip
27269 23:02:25.068519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip
27271 23:02:25.069141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip>
27272 23:02:25.100900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 RESULT=pass>
27273 23:02:25.101320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 RESULT=pass
27275 23:02:25.133142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip
27277 23:02:25.133596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip>
27278 23:02:25.165098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip>
27279 23:02:25.165510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip
27281 23:02:25.197914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip
27283 23:02:25.198567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip>
27284 23:02:25.229185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 RESULT=pass>
27285 23:02:25.229666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 RESULT=pass
27287 23:02:25.261078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip
27289 23:02:25.261712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip>
27290 23:02:25.295338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip>
27291 23:02:25.295814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip
27293 23:02:25.327616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip
27295 23:02:25.328230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip>
27296 23:02:25.359042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 RESULT=pass>
27297 23:02:25.359513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 RESULT=pass
27299 23:02:25.391462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip
27301 23:02:25.392005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip>
27302 23:02:25.423077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip
27304 23:02:25.423620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip>
27305 23:02:25.455690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip
27307 23:02:25.456251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip>
27308 23:02:25.486829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 RESULT=pass
27310 23:02:25.487405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 RESULT=pass>
27311 23:02:25.518197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip
27313 23:02:25.518791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip>
27314 23:02:25.550672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip>
27315 23:02:25.551119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip
27317 23:02:25.583404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip>
27318 23:02:25.583803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip
27320 23:02:25.616060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 RESULT=pass>
27321 23:02:25.616506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 RESULT=pass
27323 23:02:25.648359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip>
27324 23:02:25.648758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip
27326 23:02:25.680830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip>
27327 23:02:25.681225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip
27329 23:02:25.714191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip>
27330 23:02:25.714653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip
27332 23:02:25.747420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 RESULT=pass>
27333 23:02:25.747888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 RESULT=pass
27335 23:02:25.779828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip>
27336 23:02:25.780207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip
27338 23:02:25.812001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip>
27339 23:02:25.812447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip
27341 23:02:25.844180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip
27343 23:02:25.844747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip>
27344 23:02:25.876403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 RESULT=pass
27346 23:02:25.876948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 RESULT=pass>
27347 23:02:25.908639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip>
27348 23:02:25.909083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip
27350 23:02:25.940802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip
27352 23:02:25.941342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip>
27353 23:02:25.973207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip
27355 23:02:25.973746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip>
27356 23:02:26.005106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 RESULT=pass
27358 23:02:26.005638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 RESULT=pass>
27359 23:02:26.036789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip>
27360 23:02:26.037253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip
27362 23:02:26.068698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip
27364 23:02:26.069320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip>
27365 23:02:26.100844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip>
27366 23:02:26.101288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip
27368 23:02:26.133773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 RESULT=pass
27370 23:02:26.134309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 RESULT=pass>
27371 23:02:26.165634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip
27373 23:02:26.166199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip>
27374 23:02:26.197549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip
27376 23:02:26.198103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip>
27377 23:02:26.229718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip
27379 23:02:26.230272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip>
27380 23:02:26.260797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 RESULT=pass
27382 23:02:26.261347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 RESULT=pass>
27383 23:02:26.292873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip>
27384 23:02:26.293270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip
27386 23:02:26.334046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip>
27387 23:02:26.334495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip
27389 23:02:26.365975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip>
27390 23:02:26.366425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip
27392 23:02:26.397337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 RESULT=pass>
27393 23:02:26.397776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 RESULT=pass
27395 23:02:26.428767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip>
27396 23:02:26.429165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip
27398 23:02:26.462496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip>
27399 23:02:26.462947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip
27401 23:02:26.495387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip>
27402 23:02:26.495848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip
27404 23:02:26.526696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 RESULT=pass>
27405 23:02:26.527158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 RESULT=pass
27407 23:02:26.558017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip>
27408 23:02:26.558496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip
27410 23:02:26.590056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip>
27411 23:02:26.590463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip
27413 23:02:26.623263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip
27415 23:02:26.623703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip>
27416 23:02:26.656753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 RESULT=pass>
27417 23:02:26.657177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 RESULT=pass
27419 23:02:26.688783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip>
27420 23:02:26.689205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip
27422 23:02:26.720850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip>
27423 23:02:26.721263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip
27425 23:02:26.753636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip>
27426 23:02:26.754058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip
27428 23:02:26.786317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 RESULT=pass>
27429 23:02:26.786744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 RESULT=pass
27431 23:02:26.820716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip
27433 23:02:26.821155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip>
27434 23:02:26.853583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip
27436 23:02:26.854016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip>
27437 23:02:26.886168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip
27439 23:02:26.886599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip>
27440 23:02:26.918704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 RESULT=pass
27442 23:02:26.919145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 RESULT=pass>
27443 23:02:26.950951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip
27445 23:02:26.951487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip>
27446 23:02:26.983125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip
27448 23:02:26.983660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip>
27449 23:02:27.015668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip>
27450 23:02:27.016123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip
27452 23:02:27.046983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 RESULT=pass
27454 23:02:27.047549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 RESULT=pass>
27455 23:02:27.078415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip
27457 23:02:27.078946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip>
27458 23:02:27.109719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip
27460 23:02:27.110279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip>
27461 23:02:27.141149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip>
27462 23:02:27.141603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip
27464 23:02:27.174264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 RESULT=pass>
27465 23:02:27.174720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 RESULT=pass
27467 23:02:27.206462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip>
27468 23:02:27.206911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip
27470 23:02:27.238977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip
27472 23:02:27.239513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip>
27473 23:02:27.271064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip
27475 23:02:27.271589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip>
27476 23:02:27.302777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 RESULT=pass
27478 23:02:27.303330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 RESULT=pass>
27479 23:02:27.335021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip
27481 23:02:27.335556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip>
27482 23:02:27.368619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip>
27483 23:02:27.369061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip
27485 23:02:27.400980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip>
27486 23:02:27.401422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip
27488 23:02:27.432794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 RESULT=pass
27490 23:02:27.433410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 RESULT=pass>
27491 23:02:27.464683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip>
27492 23:02:27.465125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip
27494 23:02:27.496671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip>
27495 23:02:27.497119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip
27497 23:02:27.529424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip
27499 23:02:27.530055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip>
27500 23:02:27.561082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 RESULT=pass>
27501 23:02:27.561497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 RESULT=pass
27503 23:02:27.593125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip>
27504 23:02:27.593522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip
27506 23:02:27.624952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip>
27507 23:02:27.625352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip
27509 23:02:27.657229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip>
27510 23:02:27.657633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip
27512 23:02:27.690893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 RESULT=pass
27514 23:02:27.691307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 RESULT=pass>
27515 23:02:27.723757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip>
27516 23:02:27.724245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip
27518 23:02:27.756121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip>
27519 23:02:27.756592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip
27521 23:02:27.788152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip>
27522 23:02:27.788610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip
27524 23:02:27.819715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 RESULT=pass
27526 23:02:27.820238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 RESULT=pass>
27527 23:02:27.851206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip
27529 23:02:27.851735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip>
27530 23:02:27.883422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip>
27531 23:02:27.883920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip
27533 23:02:27.916487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip
27535 23:02:27.917053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip>
27536 23:02:27.948557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 RESULT=pass
27538 23:02:27.949110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 RESULT=pass>
27539 23:02:27.979892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip>
27540 23:02:27.980351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip
27542 23:02:28.011508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip>
27543 23:02:28.011944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip
27545 23:02:28.042799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip
27547 23:02:28.043354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip>
27548 23:02:28.074880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 RESULT=pass
27550 23:02:28.075422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 RESULT=pass>
27551 23:02:28.106992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip
27553 23:02:28.107526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip>
27554 23:02:28.138334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip>
27555 23:02:28.138773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip
27557 23:02:28.169760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip>
27558 23:02:28.170208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip
27560 23:02:28.202019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 RESULT=pass>
27561 23:02:28.202458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 RESULT=pass
27563 23:02:28.233723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip>
27564 23:02:28.234243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip
27566 23:02:28.266063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip>
27567 23:02:28.266499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip
27569 23:02:28.299373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip>
27570 23:02:28.299856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip
27572 23:02:28.332952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 RESULT=pass
27574 23:02:28.333546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 RESULT=pass>
27575 23:02:28.364069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip>
27576 23:02:28.364519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip
27578 23:02:28.396583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip>
27579 23:02:28.397037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip
27581 23:02:28.429059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip>
27582 23:02:28.429506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip
27584 23:02:28.460693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 RESULT=pass
27586 23:02:28.461248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 RESULT=pass>
27587 23:02:28.492095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip>
27588 23:02:28.492541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip
27590 23:02:28.523892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip>
27591 23:02:28.524347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip
27593 23:02:28.555973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip>
27594 23:02:28.556434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip
27596 23:02:28.587724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 RESULT=pass>
27597 23:02:28.588174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 RESULT=pass
27599 23:02:28.620284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip>
27600 23:02:28.620750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip
27602 23:02:28.651987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip>
27603 23:02:28.652399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip
27605 23:02:28.683906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip>
27606 23:02:28.684285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip
27608 23:02:28.715449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 RESULT=pass>
27609 23:02:28.715927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 RESULT=pass
27611 23:02:28.747331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip>
27612 23:02:28.747801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip
27614 23:02:28.779744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip>
27615 23:02:28.780192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip
27617 23:02:28.811993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip
27619 23:02:28.812537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip>
27620 23:02:28.843786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 RESULT=pass>
27621 23:02:28.844199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 RESULT=pass
27623 23:02:28.875560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip>
27624 23:02:28.875998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip
27626 23:02:28.907292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip>
27627 23:02:28.907736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip
27629 23:02:28.939722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip>
27630 23:02:28.940151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip
27632 23:02:28.972711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 RESULT=pass
27634 23:02:28.973234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 RESULT=pass>
27635 23:02:29.004686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip>
27636 23:02:29.005112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip
27638 23:02:29.037025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip>
27639 23:02:29.037467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip
27641 23:02:29.069127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip>
27642 23:02:29.069576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip
27644 23:02:29.100735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 RESULT=pass>
27645 23:02:29.101175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 RESULT=pass
27647 23:02:29.135844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip
27649 23:02:29.136397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip>
27650 23:02:29.168676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip>
27651 23:02:29.169107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip
27653 23:02:29.201071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip>
27654 23:02:29.201505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip
27656 23:02:29.233669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 RESULT=pass>
27657 23:02:29.234142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 RESULT=pass
27659 23:02:29.265538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip>
27660 23:02:29.266008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip
27662 23:02:29.298351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip
27664 23:02:29.298968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip>
27665 23:02:29.333941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip
27667 23:02:29.334560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip>
27668 23:02:29.365123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 RESULT=pass>
27669 23:02:29.365586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 RESULT=pass
27671 23:02:29.396747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip
27673 23:02:29.397215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip>
27674 23:02:29.429082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip
27676 23:02:29.429550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip>
27677 23:02:29.460632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip>
27678 23:02:29.461085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip
27680 23:02:29.495822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 RESULT=pass>
27681 23:02:29.496291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 RESULT=pass
27683 23:02:29.528493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip>
27684 23:02:29.528971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip
27686 23:02:29.561212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip>
27687 23:02:29.561674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip
27689 23:02:29.593807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip
27691 23:02:29.594346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip>
27692 23:02:29.624337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace RESULT=pass>
27693 23:02:29.624797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace RESULT=pass
27695 23:02:29.656411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_Enumerated_16_vector_lengths RESULT=pass
27697 23:02:29.656968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_Enumerated_16_vector_lengths RESULT=pass>
27698 23:02:29.691525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_All_vector_lengths_valid RESULT=pass>
27699 23:02:29.691988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_All_vector_lengths_valid RESULT=pass
27701 23:02:29.722338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls RESULT=pass>
27702 23:02:29.722813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls RESULT=pass
27704 23:02:29.753632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_default_vector_length_64 RESULT=pass
27706 23:02:29.754183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_default_vector_length_64 RESULT=pass>
27707 23:02:29.784700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_minimum_vector_length_16 RESULT=pass>
27708 23:02:29.785139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_minimum_vector_length_16 RESULT=pass
27710 23:02:29.816643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_maximum_vector_length_256 RESULT=pass>
27711 23:02:29.817083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_maximum_vector_length_256 RESULT=pass
27713 23:02:29.851455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_current_VL_is_64 RESULT=pass
27715 23:02:29.852076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_current_VL_is_64 RESULT=pass>
27716 23:02:29.883304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 RESULT=pass
27718 23:02:29.883918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 RESULT=pass>
27719 23:02:29.914869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_min_max RESULT=pass
27721 23:02:29.915501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_min_max RESULT=pass>
27722 23:02:29.946913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_used_default RESULT=pass
27724 23:02:29.947484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_used_default RESULT=pass>
27725 23:02:29.978191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_was_inherited RESULT=pass>
27726 23:02:29.978632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_was_inherited RESULT=pass
27728 23:02:30.010246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_set_on_exec RESULT=pass
27730 23:02:30.010772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_set_on_exec RESULT=pass>
27731 23:02:30.046369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors RESULT=pass>
27732 23:02:30.046910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors RESULT=pass
27734 23:02:30.098304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_default_vector_length_32 RESULT=pass
27736 23:02:30.098824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_default_vector_length_32 RESULT=pass>
27737 23:02:30.130775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_minimum_vector_length_16 RESULT=pass
27739 23:02:30.131312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_minimum_vector_length_16 RESULT=pass>
27740 23:02:30.162233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_maximum_vector_length_256 RESULT=pass>
27741 23:02:30.162618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_maximum_vector_length_256 RESULT=pass
27743 23:02:30.193273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_current_VL_is_32 RESULT=pass
27745 23:02:30.193831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_current_VL_is_32 RESULT=pass>
27746 23:02:30.225696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 RESULT=pass>
27747 23:02:30.226137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 RESULT=pass
27749 23:02:30.257054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_min_max RESULT=pass>
27750 23:02:30.257493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_min_max RESULT=pass
27752 23:02:30.289081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_used_default RESULT=pass>
27753 23:02:30.289521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_used_default RESULT=pass
27755 23:02:30.320817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_was_inherited RESULT=pass>
27756 23:02:30.321268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_was_inherited RESULT=pass
27758 23:02:30.351869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_set_on_exec RESULT=pass
27760 23:02:30.352488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_set_on_exec RESULT=pass>
27761 23:02:30.383820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors RESULT=pass>
27762 23:02:30.384284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors RESULT=pass
27764 23:02:30.415031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg RESULT=pass
27766 23:02:30.415642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg RESULT=pass>
27767 23:02:30.446073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork_fork_test RESULT=pass>
27768 23:02:30.446478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork_fork_test RESULT=pass
27770 23:02:30.479726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork RESULT=pass
27772 23:02:30.480321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork RESULT=pass>
27773 23:02:30.510488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_16 RESULT=pass
27775 23:02:30.511035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_16 RESULT=pass>
27776 23:02:30.543427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_16 RESULT=pass
27778 23:02:30.543993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_16 RESULT=pass>
27779 23:02:30.575684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_16 RESULT=pass>
27780 23:02:30.576155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_16 RESULT=pass
27782 23:02:30.607437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_32 RESULT=pass>
27783 23:02:30.607894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_32 RESULT=pass
27785 23:02:30.640415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_32 RESULT=pass
27787 23:02:30.640870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_32 RESULT=pass>
27788 23:02:30.671948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_32 RESULT=pass>
27789 23:02:30.672413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_32 RESULT=pass
27791 23:02:30.703918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_48 RESULT=pass>
27792 23:02:30.704358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_48 RESULT=pass
27794 23:02:30.737961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_48 RESULT=skip>
27795 23:02:30.738378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_48 RESULT=skip
27797 23:02:30.771887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_48 RESULT=skip
27799 23:02:30.772443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_48 RESULT=skip>
27800 23:02:30.803905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_64 RESULT=pass>
27801 23:02:30.804305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_64 RESULT=pass
27803 23:02:30.836090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_64 RESULT=pass>
27804 23:02:30.836527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_64 RESULT=pass
27806 23:02:30.867772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_64 RESULT=pass>
27807 23:02:30.868195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_64 RESULT=pass
27809 23:02:30.900135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_80 RESULT=pass
27811 23:02:30.900666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_80 RESULT=pass>
27812 23:02:30.932808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_80 RESULT=skip
27814 23:02:30.933346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_80 RESULT=skip>
27815 23:02:30.965718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_80 RESULT=skip
27817 23:02:30.966250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_80 RESULT=skip>
27818 23:02:30.998485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_96 RESULT=pass
27820 23:02:30.999024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_96 RESULT=pass>
27821 23:02:31.030965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_96 RESULT=skip
27823 23:02:31.031531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_96 RESULT=skip>
27824 23:02:31.064254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_96 RESULT=skip>
27825 23:02:31.064694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_96 RESULT=skip
27827 23:02:31.096786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_112 RESULT=pass>
27828 23:02:31.097251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_112 RESULT=pass
27830 23:02:31.130028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_112 RESULT=skip
27832 23:02:31.130559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_112 RESULT=skip>
27833 23:02:31.162036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_112 RESULT=skip>
27834 23:02:31.162490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_112 RESULT=skip
27836 23:02:31.194041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_128 RESULT=pass
27838 23:02:31.194476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_128 RESULT=pass>
27839 23:02:31.226209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_128 RESULT=pass>
27840 23:02:31.226649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_128 RESULT=pass
27842 23:02:31.258271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_128 RESULT=pass>
27843 23:02:31.258707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_128 RESULT=pass
27845 23:02:31.290467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_144 RESULT=pass>
27846 23:02:31.290926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_144 RESULT=pass
27848 23:02:31.323717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_144 RESULT=skip>
27849 23:02:31.324172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_144 RESULT=skip
27851 23:02:31.355730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_144 RESULT=skip>
27852 23:02:31.356182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_144 RESULT=skip
27854 23:02:31.386970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_160 RESULT=pass
27856 23:02:31.387497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_160 RESULT=pass>
27857 23:02:31.419548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_160 RESULT=skip
27859 23:02:31.420012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_160 RESULT=skip>
27860 23:02:31.452198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_160 RESULT=skip>
27861 23:02:31.452687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_160 RESULT=skip
27863 23:02:31.485887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_176 RESULT=pass>
27864 23:02:31.486314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_176 RESULT=pass
27866 23:02:31.518373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_176 RESULT=skip
27868 23:02:31.518997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_176 RESULT=skip>
27869 23:02:31.549374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_176 RESULT=skip>
27870 23:02:31.549835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_176 RESULT=skip
27872 23:02:31.580660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_192 RESULT=pass>
27873 23:02:31.581114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_192 RESULT=pass
27875 23:02:31.611843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_192 RESULT=skip>
27876 23:02:31.612286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_192 RESULT=skip
27878 23:02:31.644247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_192 RESULT=skip>
27879 23:02:31.644680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_192 RESULT=skip
27881 23:02:31.677403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_208 RESULT=pass
27883 23:02:31.677862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_208 RESULT=pass>
27884 23:02:31.710070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_208 RESULT=skip>
27885 23:02:31.710524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_208 RESULT=skip
27887 23:02:31.742330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_208 RESULT=skip>
27888 23:02:31.742805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_208 RESULT=skip
27890 23:02:31.775690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_224 RESULT=pass
27892 23:02:31.776227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_224 RESULT=pass>
27893 23:02:31.808742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_224 RESULT=skip
27895 23:02:31.809178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_224 RESULT=skip>
27896 23:02:31.842371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_224 RESULT=skip
27898 23:02:31.842724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_224 RESULT=skip>
27899 23:02:31.876064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_240 RESULT=pass>
27900 23:02:31.876523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_240 RESULT=pass
27902 23:02:31.908308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_240 RESULT=skip
27904 23:02:31.908827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_240 RESULT=skip>
27905 23:02:31.941602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_240 RESULT=skip
27907 23:02:31.942155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_240 RESULT=skip>
27908 23:02:31.973065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_256 RESULT=pass>
27909 23:02:31.973517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_256 RESULT=pass
27911 23:02:32.008379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_256 RESULT=pass
27913 23:02:32.009005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_256 RESULT=pass>
27914 23:02:32.040374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_256 RESULT=pass>
27915 23:02:32.040845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_256 RESULT=pass
27917 23:02:32.071773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_272 RESULT=pass>
27918 23:02:32.072227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_272 RESULT=pass
27920 23:02:32.104569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_272 RESULT=skip>
27921 23:02:32.105025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_272 RESULT=skip
27923 23:02:32.136351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_272 RESULT=skip>
27924 23:02:32.136802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_272 RESULT=skip
27926 23:02:32.169408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_288 RESULT=pass
27928 23:02:32.169955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_288 RESULT=pass>
27929 23:02:32.201402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_288 RESULT=skip
27931 23:02:32.201970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_288 RESULT=skip>
27932 23:02:32.233285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_288 RESULT=skip>
27933 23:02:32.233693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_288 RESULT=skip
27935 23:02:32.264464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_304 RESULT=pass>
27936 23:02:32.264916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_304 RESULT=pass
27938 23:02:32.295861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_304 RESULT=skip>
27939 23:02:32.296305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_304 RESULT=skip
27941 23:02:32.326287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_304 RESULT=skip>
27942 23:02:32.326744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_304 RESULT=skip
27944 23:02:32.359509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_320 RESULT=pass>
27945 23:02:32.359964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_320 RESULT=pass
27947 23:02:32.390349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_320 RESULT=skip>
27948 23:02:32.390805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_320 RESULT=skip
27950 23:02:32.421313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_320 RESULT=skip>
27951 23:02:32.421769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_320 RESULT=skip
27953 23:02:32.453624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_336 RESULT=pass
27955 23:02:32.454196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_336 RESULT=pass>
27956 23:02:32.485706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_336 RESULT=skip>
27957 23:02:32.486124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_336 RESULT=skip
27959 23:02:32.518158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_336 RESULT=skip>
27960 23:02:32.518624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_336 RESULT=skip
27962 23:02:32.550383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_352 RESULT=pass>
27963 23:02:32.550848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_352 RESULT=pass
27965 23:02:32.582406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_352 RESULT=skip
27967 23:02:32.582945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_352 RESULT=skip>
27968 23:02:32.614055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_352 RESULT=skip>
27969 23:02:32.614523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_352 RESULT=skip
27971 23:02:32.645988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_368 RESULT=pass>
27972 23:02:32.646433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_368 RESULT=pass
27974 23:02:32.678132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_368 RESULT=skip
27976 23:02:32.678697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_368 RESULT=skip>
27977 23:02:32.711840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_368 RESULT=skip>
27978 23:02:32.712270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_368 RESULT=skip
27980 23:02:32.743178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_384 RESULT=pass
27982 23:02:32.743767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_384 RESULT=pass>
27983 23:02:32.774708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_384 RESULT=skip
27985 23:02:32.775325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_384 RESULT=skip>
27986 23:02:32.805959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_384 RESULT=skip
27988 23:02:32.806530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_384 RESULT=skip>
27989 23:02:32.837148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_400 RESULT=pass
27991 23:02:32.837688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_400 RESULT=pass>
27992 23:02:32.869138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_400 RESULT=skip
27994 23:02:32.869593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_400 RESULT=skip>
27995 23:02:32.901599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_400 RESULT=skip
27997 23:02:32.902026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_400 RESULT=skip>
27998 23:02:32.932777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_416 RESULT=pass>
27999 23:02:32.933191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_416 RESULT=pass
28001 23:02:32.964591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_416 RESULT=skip>
28002 23:02:32.964971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_416 RESULT=skip
28004 23:02:32.996502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_416 RESULT=skip
28006 23:02:32.997093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_416 RESULT=skip>
28007 23:02:33.027982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_432 RESULT=pass>
28008 23:02:33.028395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_432 RESULT=pass
28010 23:02:33.061108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_432 RESULT=skip>
28011 23:02:33.061562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_432 RESULT=skip
28013 23:02:33.092780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_432 RESULT=skip
28015 23:02:33.093336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_432 RESULT=skip>
28016 23:02:33.124606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_448 RESULT=pass>
28017 23:02:33.125059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_448 RESULT=pass
28019 23:02:33.155802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_448 RESULT=skip
28021 23:02:33.156325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_448 RESULT=skip>
28022 23:02:33.186705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_448 RESULT=skip
28024 23:02:33.187275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_448 RESULT=skip>
28025 23:02:33.217194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_464 RESULT=pass>
28026 23:02:33.217608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_464 RESULT=pass
28028 23:02:33.249350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_464 RESULT=skip
28030 23:02:33.249870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_464 RESULT=skip>
28031 23:02:33.280315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_464 RESULT=skip
28033 23:02:33.280860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_464 RESULT=skip>
28034 23:02:33.311079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_480 RESULT=pass>
28035 23:02:33.311507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_480 RESULT=pass
28037 23:02:33.342388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_480 RESULT=skip>
28038 23:02:33.342812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_480 RESULT=skip
28040 23:02:33.374034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_480 RESULT=skip>
28041 23:02:33.374418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_480 RESULT=skip
28043 23:02:33.406708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_496 RESULT=pass
28045 23:02:33.407155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_496 RESULT=pass>
28046 23:02:33.443337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_496 RESULT=skip
28048 23:02:33.443875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_496 RESULT=skip>
28049 23:02:33.475061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_496 RESULT=skip
28051 23:02:33.475660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_496 RESULT=skip>
28052 23:02:33.506223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_512 RESULT=pass>
28053 23:02:33.506689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_512 RESULT=pass
28055 23:02:33.537810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_512 RESULT=skip>
28056 23:02:33.538269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_512 RESULT=skip
28058 23:02:33.569972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_512 RESULT=skip
28060 23:02:33.570580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_512 RESULT=skip>
28061 23:02:33.603294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_528 RESULT=pass
28063 23:02:33.603866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_528 RESULT=pass>
28064 23:02:33.634973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_528 RESULT=skip
28066 23:02:33.635536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_528 RESULT=skip>
28067 23:02:33.666361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_528 RESULT=skip
28069 23:02:33.666879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_528 RESULT=skip>
28070 23:02:33.698039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_544 RESULT=pass>
28071 23:02:33.698479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_544 RESULT=pass
28073 23:02:33.730003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_544 RESULT=skip>
28074 23:02:33.730461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_544 RESULT=skip
28076 23:02:33.762134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_544 RESULT=skip>
28077 23:02:33.762593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_544 RESULT=skip
28079 23:02:33.794091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_560 RESULT=pass
28081 23:02:33.794616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_560 RESULT=pass>
28082 23:02:33.825990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_560 RESULT=skip
28084 23:02:33.826526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_560 RESULT=skip>
28085 23:02:33.857300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_560 RESULT=skip>
28086 23:02:33.857758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_560 RESULT=skip
28088 23:02:33.889048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_576 RESULT=pass>
28089 23:02:33.889497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_576 RESULT=pass
28091 23:02:33.921161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_576 RESULT=skip>
28092 23:02:33.921621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_576 RESULT=skip
28094 23:02:33.953956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_576 RESULT=skip>
28095 23:02:33.954419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_576 RESULT=skip
28097 23:02:33.985700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_592 RESULT=pass>
28098 23:02:33.986176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_592 RESULT=pass
28100 23:02:34.017881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_592 RESULT=skip
28102 23:02:34.018486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_592 RESULT=skip>
28103 23:02:34.049581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_592 RESULT=skip>
28104 23:02:34.050037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_592 RESULT=skip
28106 23:02:34.081194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_608 RESULT=pass>
28107 23:02:34.081659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_608 RESULT=pass
28109 23:02:34.113392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_608 RESULT=skip>
28110 23:02:34.113935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_608 RESULT=skip
28112 23:02:34.147210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_608 RESULT=skip>
28113 23:02:34.147604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_608 RESULT=skip
28115 23:02:34.179906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_624 RESULT=pass
28117 23:02:34.180437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_624 RESULT=pass>
28118 23:02:34.211393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_624 RESULT=skip
28120 23:02:34.211914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_624 RESULT=skip>
28121 23:02:34.243906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_624 RESULT=skip>
28122 23:02:34.244337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_624 RESULT=skip
28124 23:02:34.275638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_640 RESULT=pass
28126 23:02:34.276181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_640 RESULT=pass>
28127 23:02:34.308501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_640 RESULT=skip
28129 23:02:34.309034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_640 RESULT=skip>
28130 23:02:34.340577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_640 RESULT=skip
28132 23:02:34.341115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_640 RESULT=skip>
28133 23:02:34.371998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_656 RESULT=pass>
28134 23:02:34.372446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_656 RESULT=pass
28136 23:02:34.403788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_656 RESULT=skip
28138 23:02:34.404329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_656 RESULT=skip>
28139 23:02:34.435526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_656 RESULT=skip
28141 23:02:34.436061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_656 RESULT=skip>
28142 23:02:34.466630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_672 RESULT=pass>
28143 23:02:34.467068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_672 RESULT=pass
28145 23:02:34.499563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_672 RESULT=skip>
28146 23:02:34.499984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_672 RESULT=skip
28148 23:02:34.531240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_672 RESULT=skip
28150 23:02:34.531784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_672 RESULT=skip>
28151 23:02:34.563276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_688 RESULT=pass
28153 23:02:34.563880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_688 RESULT=pass>
28154 23:02:34.596144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_688 RESULT=skip
28156 23:02:34.596754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_688 RESULT=skip>
28157 23:02:34.629224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_688 RESULT=skip
28159 23:02:34.629900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_688 RESULT=skip>
28160 23:02:34.662332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_704 RESULT=pass>
28161 23:02:34.662831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_704 RESULT=pass
28163 23:02:34.693838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_704 RESULT=skip>
28164 23:02:34.694294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_704 RESULT=skip
28166 23:02:34.725355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_704 RESULT=skip
28168 23:02:34.725949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_704 RESULT=skip>
28169 23:02:34.757175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_720 RESULT=pass
28171 23:02:34.757732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_720 RESULT=pass>
28172 23:02:34.788186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_720 RESULT=skip
28174 23:02:34.788611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_720 RESULT=skip>
28175 23:02:34.818667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_720 RESULT=skip
28177 23:02:34.819115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_720 RESULT=skip>
28178 23:02:34.851758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_736 RESULT=pass
28180 23:02:34.852174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_736 RESULT=pass>
28181 23:02:34.882579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_736 RESULT=skip
28183 23:02:34.883026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_736 RESULT=skip>
28184 23:02:34.913685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_736 RESULT=skip>
28185 23:02:34.914061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_736 RESULT=skip
28187 23:02:34.944885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_752 RESULT=pass
28189 23:02:34.945440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_752 RESULT=pass>
28190 23:02:34.976270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_752 RESULT=skip
28192 23:02:34.976801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_752 RESULT=skip>
28193 23:02:35.009089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_752 RESULT=skip>
28194 23:02:35.009599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_752 RESULT=skip
28196 23:02:35.040943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_768 RESULT=pass
28198 23:02:35.041525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_768 RESULT=pass>
28199 23:02:35.074174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_768 RESULT=skip>
28200 23:02:35.074628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_768 RESULT=skip
28202 23:02:35.105392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_768 RESULT=skip>
28203 23:02:35.105823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_768 RESULT=skip
28205 23:02:35.136760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_784 RESULT=pass
28207 23:02:35.137270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_784 RESULT=pass>
28208 23:02:35.168739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_784 RESULT=skip>
28209 23:02:35.169163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_784 RESULT=skip
28211 23:02:35.230181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_784 RESULT=skip
28213 23:02:35.230765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_784 RESULT=skip>
28214 23:02:35.261450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_800 RESULT=pass>
28215 23:02:35.261888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_800 RESULT=pass
28217 23:02:35.293004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_800 RESULT=skip>
28218 23:02:35.293421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_800 RESULT=skip
28220 23:02:35.324836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_800 RESULT=skip
28222 23:02:35.325424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_800 RESULT=skip>
28223 23:02:35.356016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_816 RESULT=pass>
28224 23:02:35.356482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_816 RESULT=pass
28226 23:02:35.388541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_816 RESULT=skip
28228 23:02:35.389078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_816 RESULT=skip>
28229 23:02:35.419826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_816 RESULT=skip>
28230 23:02:35.420271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_816 RESULT=skip
28232 23:02:35.451334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_832 RESULT=pass>
28233 23:02:35.451777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_832 RESULT=pass
28235 23:02:35.483388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_832 RESULT=skip>
28236 23:02:35.483820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_832 RESULT=skip
28238 23:02:35.514760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_832 RESULT=skip
28240 23:02:35.515324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_832 RESULT=skip>
28241 23:02:35.547188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_848 RESULT=pass>
28242 23:02:35.547635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_848 RESULT=pass
28244 23:02:35.590636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_848 RESULT=skip>
28245 23:02:35.591095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_848 RESULT=skip
28247 23:02:35.631393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_848 RESULT=skip>
28248 23:02:35.631863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_848 RESULT=skip
28250 23:02:35.666369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_864 RESULT=pass>
28251 23:02:35.666761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_864 RESULT=pass
28253 23:02:35.711448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_864 RESULT=skip>
28254 23:02:35.711904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_864 RESULT=skip
28256 23:02:35.747535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_864 RESULT=skip>
28257 23:02:35.747991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_864 RESULT=skip
28259 23:02:35.779359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_880 RESULT=pass>
28260 23:02:35.779815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_880 RESULT=pass
28262 23:02:35.811941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_880 RESULT=skip>
28263 23:02:35.812407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_880 RESULT=skip
28265 23:02:35.844633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_880 RESULT=skip>
28266 23:02:35.845098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_880 RESULT=skip
28268 23:02:35.877557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_896 RESULT=pass>
28269 23:02:35.878050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_896 RESULT=pass
28271 23:02:35.913174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_896 RESULT=skip
28273 23:02:35.913741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_896 RESULT=skip>
28274 23:02:35.946243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_896 RESULT=skip>
28275 23:02:35.946712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_896 RESULT=skip
28277 23:02:35.977630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_912 RESULT=pass>
28278 23:02:35.978104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_912 RESULT=pass
28280 23:02:36.009033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_912 RESULT=skip>
28281 23:02:36.009490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_912 RESULT=skip
28283 23:02:36.040423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_912 RESULT=skip
28285 23:02:36.040871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_912 RESULT=skip>
28286 23:02:36.071618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_928 RESULT=pass>
28287 23:02:36.072083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_928 RESULT=pass
28289 23:02:36.107006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_928 RESULT=skip>
28290 23:02:36.107461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_928 RESULT=skip
28292 23:02:36.138320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_928 RESULT=skip
28294 23:02:36.138785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_928 RESULT=skip>
28295 23:02:36.169170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_944 RESULT=pass>
28296 23:02:36.169595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_944 RESULT=pass
28298 23:02:36.200963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_944 RESULT=skip>
28299 23:02:36.201384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_944 RESULT=skip
28301 23:02:36.232609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_944 RESULT=skip>
28302 23:02:36.233032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_944 RESULT=skip
28304 23:02:36.268228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_960 RESULT=pass>
28305 23:02:36.268690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_960 RESULT=pass
28307 23:02:36.299708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_960 RESULT=skip>
28308 23:02:36.300167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_960 RESULT=skip
28310 23:02:36.330946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_960 RESULT=skip
28312 23:02:36.331495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_960 RESULT=skip>
28313 23:02:36.362457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_976 RESULT=pass
28315 23:02:36.362994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_976 RESULT=pass>
28316 23:02:36.393583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_976 RESULT=skip
28318 23:02:36.394136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_976 RESULT=skip>
28319 23:02:36.424794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_976 RESULT=skip
28321 23:02:36.425344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_976 RESULT=skip>
28322 23:02:36.459942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_992 RESULT=pass>
28323 23:02:36.460408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_992 RESULT=pass
28325 23:02:36.491943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_992 RESULT=skip
28327 23:02:36.492486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_992 RESULT=skip>
28328 23:02:36.523694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_992 RESULT=skip>
28329 23:02:36.524140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_992 RESULT=skip
28331 23:02:36.555108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1008 RESULT=pass>
28332 23:02:36.555526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1008 RESULT=pass
28334 23:02:36.586513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1008 RESULT=skip
28336 23:02:36.587054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1008 RESULT=skip>
28337 23:02:36.621744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1008 RESULT=skip>
28338 23:02:36.622205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1008 RESULT=skip
28340 23:02:36.654805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1024 RESULT=pass
28342 23:02:36.655400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1024 RESULT=pass>
28343 23:02:36.688669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1024 RESULT=skip
28345 23:02:36.689266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1024 RESULT=skip>
28346 23:02:36.723372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1024 RESULT=skip>
28347 23:02:36.723753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1024 RESULT=skip
28349 23:02:36.758495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1040 RESULT=pass>
28350 23:02:36.758886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1040 RESULT=pass
28352 23:02:36.809471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1040 RESULT=skip
28354 23:02:36.809943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1040 RESULT=skip>
28355 23:02:36.843673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1040 RESULT=skip>
28356 23:02:36.844149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1040 RESULT=skip
28358 23:02:36.876365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1056 RESULT=pass>
28359 23:02:36.876847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1056 RESULT=pass
28361 23:02:36.909484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1056 RESULT=skip
28363 23:02:36.910057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1056 RESULT=skip>
28364 23:02:36.940909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1056 RESULT=skip>
28365 23:02:36.941408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1056 RESULT=skip
28367 23:02:36.971971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1072 RESULT=pass>
28368 23:02:36.972439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1072 RESULT=pass
28370 23:02:37.004049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1072 RESULT=skip
28372 23:02:37.004599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1072 RESULT=skip>
28373 23:02:37.036144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1072 RESULT=skip
28375 23:02:37.036690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1072 RESULT=skip>
28376 23:02:37.067828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1088 RESULT=pass>
28377 23:02:37.068286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1088 RESULT=pass
28379 23:02:37.099382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1088 RESULT=skip>
28380 23:02:37.099840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1088 RESULT=skip
28382 23:02:37.131999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1088 RESULT=skip>
28383 23:02:37.132405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1088 RESULT=skip
28385 23:02:37.164320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1104 RESULT=pass
28387 23:02:37.164756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1104 RESULT=pass>
28388 23:02:37.195713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1104 RESULT=skip>
28389 23:02:37.196192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1104 RESULT=skip
28391 23:02:37.227646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1104 RESULT=skip>
28392 23:02:37.228106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1104 RESULT=skip
28394 23:02:37.261807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1120 RESULT=pass
28396 23:02:37.262464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1120 RESULT=pass>
28397 23:02:37.297275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1120 RESULT=skip
28399 23:02:37.297863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1120 RESULT=skip>
28400 23:02:37.331495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1120 RESULT=skip>
28401 23:02:37.332006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1120 RESULT=skip
28403 23:02:37.363910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1136 RESULT=pass>
28404 23:02:37.364413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1136 RESULT=pass
28406 23:02:37.395741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1136 RESULT=skip>
28407 23:02:37.396200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1136 RESULT=skip
28409 23:02:37.428420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1136 RESULT=skip>
28410 23:02:37.428896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1136 RESULT=skip
28412 23:02:37.461244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1152 RESULT=pass>
28413 23:02:37.461702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1152 RESULT=pass
28415 23:02:37.493333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1152 RESULT=skip>
28416 23:02:37.493789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1152 RESULT=skip
28418 23:02:37.525564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1152 RESULT=skip>
28419 23:02:37.526035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1152 RESULT=skip
28421 23:02:37.557391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1168 RESULT=pass>
28422 23:02:37.557863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1168 RESULT=pass
28424 23:02:37.590870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1168 RESULT=skip
28426 23:02:37.591342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1168 RESULT=skip>
28427 23:02:37.624260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1168 RESULT=skip
28429 23:02:37.624831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1168 RESULT=skip>
28430 23:02:37.656190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1184 RESULT=pass>
28431 23:02:37.656648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1184 RESULT=pass
28433 23:02:37.687909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1184 RESULT=skip>
28434 23:02:37.688374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1184 RESULT=skip
28436 23:02:37.721219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1184 RESULT=skip
28438 23:02:37.721796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1184 RESULT=skip>
28439 23:02:37.754060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1200 RESULT=pass
28441 23:02:37.754616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1200 RESULT=pass>
28442 23:02:37.787940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1200 RESULT=skip
28444 23:02:37.788480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1200 RESULT=skip>
28445 23:02:37.819858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1200 RESULT=skip
28447 23:02:37.820491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1200 RESULT=skip>
28448 23:02:37.851387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1216 RESULT=pass
28450 23:02:37.852007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1216 RESULT=pass>
28451 23:02:37.884437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1216 RESULT=skip
28453 23:02:37.885010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1216 RESULT=skip>
28454 23:02:37.918303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1216 RESULT=skip
28456 23:02:37.918862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1216 RESULT=skip>
28457 23:02:37.951744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1232 RESULT=pass>
28458 23:02:37.952213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1232 RESULT=pass
28460 23:02:37.984582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1232 RESULT=skip>
28461 23:02:37.984991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1232 RESULT=skip
28463 23:02:38.016300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1232 RESULT=skip>
28464 23:02:38.016696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1232 RESULT=skip
28466 23:02:38.048682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1248 RESULT=pass
28468 23:02:38.049130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1248 RESULT=pass>
28469 23:02:38.081822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1248 RESULT=skip
28471 23:02:38.082458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1248 RESULT=skip>
28472 23:02:38.113192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1248 RESULT=skip>
28473 23:02:38.113585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1248 RESULT=skip
28475 23:02:38.144868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1264 RESULT=pass
28477 23:02:38.145502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1264 RESULT=pass>
28478 23:02:38.176853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1264 RESULT=skip>
28479 23:02:38.177296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1264 RESULT=skip
28481 23:02:38.209088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1264 RESULT=skip>
28482 23:02:38.209581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1264 RESULT=skip
28484 23:02:38.241823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1280 RESULT=pass>
28485 23:02:38.242306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1280 RESULT=pass
28487 23:02:38.273657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1280 RESULT=skip
28489 23:02:38.274199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1280 RESULT=skip>
28490 23:02:38.306388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1280 RESULT=skip>
28491 23:02:38.306763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1280 RESULT=skip
28493 23:02:38.338436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1296 RESULT=pass
28495 23:02:38.338958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1296 RESULT=pass>
28496 23:02:38.371499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1296 RESULT=skip>
28497 23:02:38.371947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1296 RESULT=skip
28499 23:02:38.404637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1296 RESULT=skip
28501 23:02:38.405321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1296 RESULT=skip>
28502 23:02:38.436937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1312 RESULT=pass
28504 23:02:38.437542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1312 RESULT=pass>
28505 23:02:38.468936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1312 RESULT=skip
28507 23:02:38.469545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1312 RESULT=skip>
28508 23:02:38.501278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1312 RESULT=skip
28510 23:02:38.501921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1312 RESULT=skip>
28511 23:02:38.533299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1328 RESULT=pass
28513 23:02:38.533844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1328 RESULT=pass>
28514 23:02:38.565071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1328 RESULT=skip>
28515 23:02:38.565520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1328 RESULT=skip
28517 23:02:38.598025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1328 RESULT=skip>
28518 23:02:38.598456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1328 RESULT=skip
28520 23:02:38.630284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1344 RESULT=pass>
28521 23:02:38.630769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1344 RESULT=pass
28523 23:02:38.662551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1344 RESULT=skip
28525 23:02:38.663103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1344 RESULT=skip>
28526 23:02:38.694554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1344 RESULT=skip
28528 23:02:38.695122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1344 RESULT=skip>
28529 23:02:38.727152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1360 RESULT=pass
28531 23:02:38.727572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1360 RESULT=pass>
28532 23:02:38.760027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1360 RESULT=skip
28534 23:02:38.760461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1360 RESULT=skip>
28535 23:02:38.792682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1360 RESULT=skip>
28536 23:02:38.793079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1360 RESULT=skip
28538 23:02:38.825780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1376 RESULT=pass
28540 23:02:38.826209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1376 RESULT=pass>
28541 23:02:38.857635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1376 RESULT=skip>
28542 23:02:38.858049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1376 RESULT=skip
28544 23:02:38.889808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1376 RESULT=skip
28546 23:02:38.890236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1376 RESULT=skip>
28547 23:02:38.922494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1392 RESULT=pass
28549 23:02:38.923112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1392 RESULT=pass>
28550 23:02:38.955241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1392 RESULT=skip>
28551 23:02:38.955711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1392 RESULT=skip
28553 23:02:38.987862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1392 RESULT=skip
28555 23:02:38.988404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1392 RESULT=skip>
28556 23:02:39.019755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1408 RESULT=pass>
28557 23:02:39.020234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1408 RESULT=pass
28559 23:02:39.051188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1408 RESULT=skip>
28560 23:02:39.051638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1408 RESULT=skip
28562 23:02:39.082977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1408 RESULT=skip
28564 23:02:39.083517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1408 RESULT=skip>
28565 23:02:39.115011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1424 RESULT=pass>
28566 23:02:39.115487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1424 RESULT=pass
28568 23:02:39.147382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1424 RESULT=skip
28570 23:02:39.147972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1424 RESULT=skip>
28571 23:02:39.178483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1424 RESULT=skip>
28572 23:02:39.178938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1424 RESULT=skip
28574 23:02:39.209584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1440 RESULT=pass>
28575 23:02:39.210071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1440 RESULT=pass
28577 23:02:39.241161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1440 RESULT=skip>
28578 23:02:39.241620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1440 RESULT=skip
28580 23:02:39.272886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1440 RESULT=skip>
28581 23:02:39.273321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1440 RESULT=skip
28583 23:02:39.305352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1456 RESULT=pass>
28584 23:02:39.305815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1456 RESULT=pass
28586 23:02:39.337255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1456 RESULT=skip>
28587 23:02:39.337664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1456 RESULT=skip
28589 23:02:39.369172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1456 RESULT=skip
28591 23:02:39.369724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1456 RESULT=skip>
28592 23:02:39.401348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1472 RESULT=pass>
28593 23:02:39.401778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1472 RESULT=pass
28595 23:02:39.433415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1472 RESULT=skip
28597 23:02:39.433886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1472 RESULT=skip>
28598 23:02:39.465445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1472 RESULT=skip>
28599 23:02:39.465905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1472 RESULT=skip
28601 23:02:39.498490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1488 RESULT=pass>
28602 23:02:39.498908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1488 RESULT=pass
28604 23:02:39.530978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1488 RESULT=skip
28606 23:02:39.531440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1488 RESULT=skip>
28607 23:02:39.564044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1488 RESULT=skip>
28608 23:02:39.564462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1488 RESULT=skip
28610 23:02:39.595991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1504 RESULT=pass
28612 23:02:39.596450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1504 RESULT=pass>
28613 23:02:39.627614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1504 RESULT=skip>
28614 23:02:39.628024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1504 RESULT=skip
28616 23:02:39.661832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1504 RESULT=skip>
28617 23:02:39.662243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1504 RESULT=skip
28619 23:02:39.694477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1520 RESULT=pass>
28620 23:02:39.694904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1520 RESULT=pass
28622 23:02:39.727450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1520 RESULT=skip
28624 23:02:39.728016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1520 RESULT=skip>
28625 23:02:39.760522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1520 RESULT=skip
28627 23:02:39.760970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1520 RESULT=skip>
28628 23:02:39.794579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1536 RESULT=pass
28630 23:02:39.794931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1536 RESULT=pass>
28631 23:02:39.828540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1536 RESULT=skip>
28632 23:02:39.828946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1536 RESULT=skip
28634 23:02:39.862108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1536 RESULT=skip
28636 23:02:39.862543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1536 RESULT=skip>
28637 23:02:39.894384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1552 RESULT=pass
28639 23:02:39.894825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1552 RESULT=pass>
28640 23:02:39.926297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1552 RESULT=skip>
28641 23:02:39.926757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1552 RESULT=skip
28643 23:02:39.959117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1552 RESULT=skip
28645 23:02:39.959677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1552 RESULT=skip>
28646 23:02:39.990426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1568 RESULT=pass>
28647 23:02:39.990852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1568 RESULT=pass
28649 23:02:40.025116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1568 RESULT=skip>
28650 23:02:40.025591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1568 RESULT=skip
28652 23:02:40.057676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1568 RESULT=skip>
28653 23:02:40.058140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1568 RESULT=skip
28655 23:02:40.088925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1584 RESULT=pass>
28656 23:02:40.089378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1584 RESULT=pass
28658 23:02:40.120360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1584 RESULT=skip>
28659 23:02:40.120828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1584 RESULT=skip
28661 23:02:40.151752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1584 RESULT=skip>
28662 23:02:40.152211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1584 RESULT=skip
28664 23:02:40.184711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1600 RESULT=pass>
28665 23:02:40.185237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1600 RESULT=pass
28667 23:02:40.217633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1600 RESULT=skip>
28668 23:02:40.218081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1600 RESULT=skip
28670 23:02:40.249251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1600 RESULT=skip
28672 23:02:40.249891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1600 RESULT=skip>
28673 23:02:40.282293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1616 RESULT=pass>
28674 23:02:40.282709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1616 RESULT=pass
28676 23:02:40.336496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1616 RESULT=skip>
28677 23:02:40.336977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1616 RESULT=skip
28679 23:02:40.369377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1616 RESULT=skip>
28680 23:02:40.369865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1616 RESULT=skip
28682 23:02:40.403380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1632 RESULT=pass>
28683 23:02:40.403850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1632 RESULT=pass
28685 23:02:40.434302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1632 RESULT=skip>
28686 23:02:40.434715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1632 RESULT=skip
28688 23:02:40.468593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1632 RESULT=skip
28690 23:02:40.469035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1632 RESULT=skip>
28691 23:02:40.500619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1648 RESULT=pass
28693 23:02:40.501049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1648 RESULT=pass>
28694 23:02:40.533116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1648 RESULT=skip>
28695 23:02:40.533514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1648 RESULT=skip
28697 23:02:40.567370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1648 RESULT=skip
28699 23:02:40.567804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1648 RESULT=skip>
28700 23:02:40.600155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1664 RESULT=pass>
28701 23:02:40.600629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1664 RESULT=pass
28703 23:02:40.632063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1664 RESULT=skip
28705 23:02:40.632590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1664 RESULT=skip>
28706 23:02:40.663625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1664 RESULT=skip>
28707 23:02:40.664021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1664 RESULT=skip
28709 23:02:40.695760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1680 RESULT=pass>
28710 23:02:40.696206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1680 RESULT=pass
28712 23:02:40.730433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1680 RESULT=skip>
28713 23:02:40.730833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1680 RESULT=skip
28715 23:02:40.763708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1680 RESULT=skip
28717 23:02:40.764125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1680 RESULT=skip>
28718 23:02:40.796563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1696 RESULT=pass>
28719 23:02:40.796993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1696 RESULT=pass
28721 23:02:40.828608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1696 RESULT=skip>
28722 23:02:40.829042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1696 RESULT=skip
28724 23:02:40.860319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1696 RESULT=skip
28726 23:02:40.860869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1696 RESULT=skip>
28727 23:02:40.893207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1712 RESULT=pass
28729 23:02:40.893660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1712 RESULT=pass>
28730 23:02:40.926672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1712 RESULT=skip
28732 23:02:40.927111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1712 RESULT=skip>
28733 23:02:40.958872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1712 RESULT=skip
28735 23:02:40.959342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1712 RESULT=skip>
28736 23:02:40.991615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1728 RESULT=pass>
28737 23:02:40.992022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1728 RESULT=pass
28739 23:02:41.023438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1728 RESULT=skip
28741 23:02:41.023897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1728 RESULT=skip>
28742 23:02:41.054523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1728 RESULT=skip>
28743 23:02:41.054977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1728 RESULT=skip
28745 23:02:41.088231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1744 RESULT=pass>
28746 23:02:41.088695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1744 RESULT=pass
28748 23:02:41.120238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1744 RESULT=skip
28750 23:02:41.120783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1744 RESULT=skip>
28751 23:02:41.152061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1744 RESULT=skip>
28752 23:02:41.152494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1744 RESULT=skip
28754 23:02:41.183521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1760 RESULT=pass>
28755 23:02:41.183962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1760 RESULT=pass
28757 23:02:41.215291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1760 RESULT=skip>
28758 23:02:41.215755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1760 RESULT=skip
28760 23:02:41.248073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1760 RESULT=skip>
28761 23:02:41.248518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1760 RESULT=skip
28763 23:02:41.281067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1776 RESULT=pass
28765 23:02:41.281619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1776 RESULT=pass>
28766 23:02:41.315418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1776 RESULT=skip
28768 23:02:41.316090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1776 RESULT=skip>
28769 23:02:41.347854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1776 RESULT=skip>
28770 23:02:41.348296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1776 RESULT=skip
28772 23:02:41.379653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1792 RESULT=pass>
28773 23:02:41.380102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1792 RESULT=pass
28775 23:02:41.411343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1792 RESULT=skip
28777 23:02:41.411921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1792 RESULT=skip>
28778 23:02:41.444163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1792 RESULT=skip>
28779 23:02:41.444565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1792 RESULT=skip
28781 23:02:41.477021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1808 RESULT=pass>
28782 23:02:41.477437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1808 RESULT=pass
28784 23:02:41.509706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1808 RESULT=skip>
28785 23:02:41.510126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1808 RESULT=skip
28787 23:02:41.541400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1808 RESULT=skip>
28788 23:02:41.541812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1808 RESULT=skip
28790 23:02:41.572796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1824 RESULT=pass>
28791 23:02:41.573255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1824 RESULT=pass
28793 23:02:41.605145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1824 RESULT=skip>
28794 23:02:41.605606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1824 RESULT=skip
28796 23:02:41.637773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1824 RESULT=skip>
28797 23:02:41.638226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1824 RESULT=skip
28799 23:02:41.669472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1840 RESULT=pass>
28800 23:02:41.669937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1840 RESULT=pass
28802 23:02:41.702172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1840 RESULT=skip
28804 23:02:41.702650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1840 RESULT=skip>
28805 23:02:41.733684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1840 RESULT=skip>
28806 23:02:41.734129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1840 RESULT=skip
28808 23:02:41.765500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1856 RESULT=pass>
28809 23:02:41.765947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1856 RESULT=pass
28811 23:02:41.797816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1856 RESULT=skip>
28812 23:02:41.798253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1856 RESULT=skip
28814 23:02:41.830656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1856 RESULT=skip
28816 23:02:41.831261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1856 RESULT=skip>
28817 23:02:41.862187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1872 RESULT=pass>
28818 23:02:41.862638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1872 RESULT=pass
28820 23:02:41.894821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1872 RESULT=skip
28822 23:02:41.895217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1872 RESULT=skip>
28823 23:02:41.927605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1872 RESULT=skip>
28824 23:02:41.928066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1872 RESULT=skip
28826 23:02:41.961105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1888 RESULT=pass
28828 23:02:41.961656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1888 RESULT=pass>
28829 23:02:41.995250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1888 RESULT=skip
28831 23:02:41.995862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1888 RESULT=skip>
28832 23:02:42.027392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1888 RESULT=skip
28834 23:02:42.027980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1888 RESULT=skip>
28835 23:02:42.059734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1904 RESULT=pass
28837 23:02:42.060280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1904 RESULT=pass>
28838 23:02:42.091894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1904 RESULT=skip>
28839 23:02:42.092289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1904 RESULT=skip
28841 23:02:42.124563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1904 RESULT=skip>
28842 23:02:42.125009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1904 RESULT=skip
28844 23:02:42.156675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1920 RESULT=pass>
28845 23:02:42.157209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1920 RESULT=pass
28847 23:02:42.189054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1920 RESULT=skip
28849 23:02:42.189585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1920 RESULT=skip>
28850 23:02:42.220587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1920 RESULT=skip>
28851 23:02:42.221036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1920 RESULT=skip
28853 23:02:42.252422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1936 RESULT=pass
28855 23:02:42.252957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1936 RESULT=pass>
28856 23:02:42.284349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1936 RESULT=skip
28858 23:02:42.284880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1936 RESULT=skip>
28859 23:02:42.316055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1936 RESULT=skip
28861 23:02:42.316684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1936 RESULT=skip>
28862 23:02:42.348866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1952 RESULT=pass>
28863 23:02:42.349324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1952 RESULT=pass
28865 23:02:42.379780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1952 RESULT=skip>
28866 23:02:42.380229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1952 RESULT=skip
28868 23:02:42.410326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1952 RESULT=skip>
28869 23:02:42.410779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1952 RESULT=skip
28871 23:02:42.441195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1968 RESULT=pass>
28872 23:02:42.441655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1968 RESULT=pass
28874 23:02:42.472448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1968 RESULT=skip>
28875 23:02:42.472914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1968 RESULT=skip
28877 23:02:42.504156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1968 RESULT=skip>
28878 23:02:42.504610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1968 RESULT=skip
28880 23:02:42.537551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1984 RESULT=pass>
28881 23:02:42.538015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1984 RESULT=pass
28883 23:02:42.568774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1984 RESULT=skip>
28884 23:02:42.569250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1984 RESULT=skip
28886 23:02:42.600129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1984 RESULT=skip>
28887 23:02:42.600609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1984 RESULT=skip
28889 23:02:42.631948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2000 RESULT=pass>
28890 23:02:42.632413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2000 RESULT=pass
28892 23:02:42.663673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2000 RESULT=skip
28894 23:02:42.664216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2000 RESULT=skip>
28895 23:02:42.696193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2000 RESULT=skip
28897 23:02:42.696732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2000 RESULT=skip>
28898 23:02:42.727698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2016 RESULT=pass>
28899 23:02:42.728157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2016 RESULT=pass
28901 23:02:42.758747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2016 RESULT=skip
28903 23:02:42.759215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2016 RESULT=skip>
28904 23:02:42.792253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2016 RESULT=skip>
28905 23:02:42.792664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2016 RESULT=skip
28907 23:02:42.824244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2032 RESULT=pass
28909 23:02:42.824686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2032 RESULT=pass>
28910 23:02:42.855950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2032 RESULT=skip>
28911 23:02:42.856363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2032 RESULT=skip
28913 23:02:42.889307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2032 RESULT=skip>
28914 23:02:42.889688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2032 RESULT=skip
28916 23:02:42.920630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2048 RESULT=pass>
28917 23:02:42.921044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2048 RESULT=pass
28919 23:02:42.952225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2048 RESULT=skip>
28920 23:02:42.952648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2048 RESULT=skip
28922 23:02:42.984957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2048 RESULT=skip>
28923 23:02:42.985392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2048 RESULT=skip
28925 23:02:43.016457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2064 RESULT=pass>
28926 23:02:43.016877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2064 RESULT=pass
28928 23:02:43.051604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2064 RESULT=skip
28930 23:02:43.052065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2064 RESULT=skip>
28931 23:02:43.084736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2064 RESULT=skip>
28932 23:02:43.085144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2064 RESULT=skip
28934 23:02:43.115977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2080 RESULT=pass
28936 23:02:43.116377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2080 RESULT=pass>
28937 23:02:43.147613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2080 RESULT=skip
28939 23:02:43.148170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2080 RESULT=skip>
28940 23:02:43.179924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2080 RESULT=skip>
28941 23:02:43.180388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2080 RESULT=skip
28943 23:02:43.212505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2096 RESULT=pass>
28944 23:02:43.212935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2096 RESULT=pass
28946 23:02:43.246037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2096 RESULT=skip>
28947 23:02:43.246399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2096 RESULT=skip
28949 23:02:43.278765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2096 RESULT=skip
28951 23:02:43.279117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2096 RESULT=skip>
28952 23:02:43.310495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2112 RESULT=pass
28954 23:02:43.311028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2112 RESULT=pass>
28955 23:02:43.341687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2112 RESULT=skip>
28956 23:02:43.342120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2112 RESULT=skip
28958 23:02:43.372997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2112 RESULT=skip>
28959 23:02:43.373434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2112 RESULT=skip
28961 23:02:43.404965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2128 RESULT=pass>
28962 23:02:43.405397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2128 RESULT=pass
28964 23:02:43.436533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2128 RESULT=skip>
28965 23:02:43.436935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2128 RESULT=skip
28967 23:02:43.468070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2128 RESULT=skip
28969 23:02:43.468605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2128 RESULT=skip>
28970 23:02:43.499534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2144 RESULT=pass>
28971 23:02:43.499980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2144 RESULT=pass
28973 23:02:43.530629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2144 RESULT=skip
28975 23:02:43.531161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2144 RESULT=skip>
28976 23:02:43.563429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2144 RESULT=skip>
28977 23:02:43.563958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2144 RESULT=skip
28979 23:02:43.596278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2160 RESULT=pass
28981 23:02:43.596864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2160 RESULT=pass>
28982 23:02:43.628270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2160 RESULT=skip
28984 23:02:43.628902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2160 RESULT=skip>
28985 23:02:43.659961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2160 RESULT=skip>
28986 23:02:43.660416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2160 RESULT=skip
28988 23:02:43.691466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2176 RESULT=pass
28990 23:02:43.692036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2176 RESULT=pass>
28991 23:02:43.722679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2176 RESULT=skip
28993 23:02:43.723244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2176 RESULT=skip>
28994 23:02:43.754119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2176 RESULT=skip
28996 23:02:43.754753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2176 RESULT=skip>
28997 23:02:43.785550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2192 RESULT=pass>
28998 23:02:43.785985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2192 RESULT=pass
29000 23:02:43.817979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2192 RESULT=skip>
29001 23:02:43.818421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2192 RESULT=skip
29003 23:02:43.849358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2192 RESULT=skip
29005 23:02:43.849989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2192 RESULT=skip>
29006 23:02:43.880630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2208 RESULT=pass>
29007 23:02:43.881051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2208 RESULT=pass
29009 23:02:43.912978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2208 RESULT=skip>
29010 23:02:43.913386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2208 RESULT=skip
29012 23:02:43.945715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2208 RESULT=skip
29014 23:02:43.946185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2208 RESULT=skip>
29015 23:02:43.977391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2224 RESULT=pass>
29016 23:02:43.977819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2224 RESULT=pass
29018 23:02:44.010496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2224 RESULT=skip>
29019 23:02:44.010930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2224 RESULT=skip
29021 23:02:44.043648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2224 RESULT=skip
29023 23:02:44.044104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2224 RESULT=skip>
29024 23:02:44.074859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2240 RESULT=pass
29026 23:02:44.075315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2240 RESULT=pass>
29027 23:02:44.107123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2240 RESULT=skip>
29028 23:02:44.107588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2240 RESULT=skip
29030 23:02:44.139721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2240 RESULT=skip
29032 23:02:44.140350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2240 RESULT=skip>
29033 23:02:44.172386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2256 RESULT=pass
29035 23:02:44.172850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2256 RESULT=pass>
29036 23:02:44.203792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2256 RESULT=skip
29038 23:02:44.204245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2256 RESULT=skip>
29039 23:02:44.235014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2256 RESULT=skip>
29040 23:02:44.235450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2256 RESULT=skip
29042 23:02:44.266470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2272 RESULT=pass
29044 23:02:44.266928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2272 RESULT=pass>
29045 23:02:44.297774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2272 RESULT=skip
29047 23:02:44.298323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2272 RESULT=skip>
29048 23:02:44.329826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2272 RESULT=skip>
29049 23:02:44.330252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2272 RESULT=skip
29051 23:02:44.362132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2288 RESULT=pass>
29052 23:02:44.362593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2288 RESULT=pass
29054 23:02:44.394579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2288 RESULT=skip>
29055 23:02:44.395038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2288 RESULT=skip
29057 23:02:44.427247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2288 RESULT=skip>
29058 23:02:44.427647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2288 RESULT=skip
29060 23:02:44.459344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2304 RESULT=pass>
29061 23:02:44.459750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2304 RESULT=pass
29063 23:02:44.490984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2304 RESULT=skip
29065 23:02:44.491593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2304 RESULT=skip>
29066 23:02:44.523913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2304 RESULT=skip
29068 23:02:44.524457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2304 RESULT=skip>
29069 23:02:44.556891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2320 RESULT=pass
29071 23:02:44.557394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2320 RESULT=pass>
29072 23:02:44.589961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2320 RESULT=skip>
29073 23:02:44.590377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2320 RESULT=skip
29075 23:02:44.621793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2320 RESULT=skip
29077 23:02:44.622344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2320 RESULT=skip>
29078 23:02:44.653004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2336 RESULT=pass>
29079 23:02:44.653409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2336 RESULT=pass
29081 23:02:44.685090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2336 RESULT=skip>
29082 23:02:44.685574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2336 RESULT=skip
29084 23:02:44.720194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2336 RESULT=skip>
29085 23:02:44.720595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2336 RESULT=skip
29087 23:02:44.752333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2352 RESULT=pass
29089 23:02:44.752885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2352 RESULT=pass>
29090 23:02:44.784151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2352 RESULT=skip
29092 23:02:44.784702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2352 RESULT=skip>
29093 23:02:44.816539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2352 RESULT=skip
29095 23:02:44.817128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2352 RESULT=skip>
29096 23:02:44.849779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2368 RESULT=pass>
29097 23:02:44.850307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2368 RESULT=pass
29099 23:02:44.884210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2368 RESULT=skip
29101 23:02:44.884657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2368 RESULT=skip>
29102 23:02:44.917259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2368 RESULT=skip
29104 23:02:44.917841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2368 RESULT=skip>
29105 23:02:44.949749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2384 RESULT=pass
29107 23:02:44.950281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2384 RESULT=pass>
29108 23:02:44.982192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2384 RESULT=skip>
29109 23:02:44.982691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2384 RESULT=skip
29111 23:02:45.014977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2384 RESULT=skip>
29112 23:02:45.015468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2384 RESULT=skip
29114 23:02:45.048267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2400 RESULT=pass>
29115 23:02:45.048732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2400 RESULT=pass
29117 23:02:45.080985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2400 RESULT=skip>
29118 23:02:45.081469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2400 RESULT=skip
29120 23:02:45.112378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2400 RESULT=skip>
29121 23:02:45.112847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2400 RESULT=skip
29123 23:02:45.144000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2416 RESULT=pass>
29124 23:02:45.144472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2416 RESULT=pass
29126 23:02:45.176006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2416 RESULT=skip
29128 23:02:45.176627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2416 RESULT=skip>
29129 23:02:45.207938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2416 RESULT=skip
29131 23:02:45.208500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2416 RESULT=skip>
29132 23:02:45.240079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2432 RESULT=pass>
29133 23:02:45.240536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2432 RESULT=pass
29135 23:02:45.272530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2432 RESULT=skip>
29136 23:02:45.272994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2432 RESULT=skip
29138 23:02:45.304986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2432 RESULT=skip>
29139 23:02:45.305444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2432 RESULT=skip
29141 23:02:45.337975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2448 RESULT=pass
29143 23:02:45.338585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2448 RESULT=pass>
29144 23:02:45.371039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2448 RESULT=skip>
29145 23:02:45.371516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2448 RESULT=skip
29147 23:02:45.403862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2448 RESULT=skip
29149 23:02:45.404479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2448 RESULT=skip>
29150 23:02:45.457085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2464 RESULT=pass>
29151 23:02:45.457545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2464 RESULT=pass
29153 23:02:45.489791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2464 RESULT=skip>
29154 23:02:45.490240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2464 RESULT=skip
29156 23:02:45.522506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2464 RESULT=skip>
29157 23:02:45.522946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2464 RESULT=skip
29159 23:02:45.555652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2480 RESULT=pass
29161 23:02:45.556122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2480 RESULT=pass>
29162 23:02:45.588220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2480 RESULT=skip>
29163 23:02:45.588661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2480 RESULT=skip
29165 23:02:45.630930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2480 RESULT=skip
29167 23:02:45.631559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2480 RESULT=skip>
29168 23:02:45.685350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2496 RESULT=pass>
29169 23:02:45.685823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2496 RESULT=pass
29171 23:02:45.736748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2496 RESULT=skip>
29172 23:02:45.737193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2496 RESULT=skip
29174 23:02:45.771640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2496 RESULT=skip>
29175 23:02:45.772020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2496 RESULT=skip
29177 23:02:45.804077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2512 RESULT=pass>
29178 23:02:45.804503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2512 RESULT=pass
29180 23:02:45.837413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2512 RESULT=skip
29182 23:02:45.837993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2512 RESULT=skip>
29183 23:02:45.870105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2512 RESULT=skip>
29184 23:02:45.870539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2512 RESULT=skip
29186 23:02:45.903895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2528 RESULT=pass
29188 23:02:45.904465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2528 RESULT=pass>
29189 23:02:45.936422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2528 RESULT=skip>
29190 23:02:45.936869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2528 RESULT=skip
29192 23:02:45.969319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2528 RESULT=skip
29194 23:02:45.969874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2528 RESULT=skip>
29195 23:02:46.001552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2544 RESULT=pass
29197 23:02:46.001998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2544 RESULT=pass>
29198 23:02:46.034355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2544 RESULT=skip>
29199 23:02:46.034811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2544 RESULT=skip
29201 23:02:46.067889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2544 RESULT=skip>
29202 23:02:46.068349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2544 RESULT=skip
29204 23:02:46.100654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2560 RESULT=pass>
29205 23:02:46.101118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2560 RESULT=pass
29207 23:02:46.133933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2560 RESULT=skip
29209 23:02:46.134492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2560 RESULT=skip>
29210 23:02:46.167681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2560 RESULT=skip
29212 23:02:46.168268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2560 RESULT=skip>
29213 23:02:46.199642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2576 RESULT=pass>
29214 23:02:46.200112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2576 RESULT=pass
29216 23:02:46.231370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2576 RESULT=skip
29218 23:02:46.231950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2576 RESULT=skip>
29219 23:02:46.263988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2576 RESULT=skip>
29220 23:02:46.264443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2576 RESULT=skip
29222 23:02:46.295880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2592 RESULT=pass
29224 23:02:46.296425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2592 RESULT=pass>
29225 23:02:46.328260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2592 RESULT=skip>
29226 23:02:46.328729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2592 RESULT=skip
29228 23:02:46.360290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2592 RESULT=skip
29230 23:02:46.360841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2592 RESULT=skip>
29231 23:02:46.393586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2608 RESULT=pass
29233 23:02:46.394151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2608 RESULT=pass>
29234 23:02:46.425491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2608 RESULT=skip
29236 23:02:46.426010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2608 RESULT=skip>
29237 23:02:46.457001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2608 RESULT=skip>
29238 23:02:46.457483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2608 RESULT=skip
29240 23:02:46.488993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2624 RESULT=pass>
29241 23:02:46.489458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2624 RESULT=pass
29243 23:02:46.520569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2624 RESULT=skip>
29244 23:02:46.521025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2624 RESULT=skip
29246 23:02:46.554360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2624 RESULT=skip
29248 23:02:46.555008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2624 RESULT=skip>
29249 23:02:46.586439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2640 RESULT=pass>
29250 23:02:46.586871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2640 RESULT=pass
29252 23:02:46.619169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2640 RESULT=skip>
29253 23:02:46.619573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2640 RESULT=skip
29255 23:02:46.651760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2640 RESULT=skip>
29256 23:02:46.652268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2640 RESULT=skip
29258 23:02:46.685159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2656 RESULT=pass
29260 23:02:46.685714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2656 RESULT=pass>
29261 23:02:46.721824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2656 RESULT=skip>
29262 23:02:46.722211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2656 RESULT=skip
29264 23:02:46.755980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2656 RESULT=skip>
29265 23:02:46.756375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2656 RESULT=skip
29267 23:02:46.793203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2672 RESULT=pass
29269 23:02:46.793603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2672 RESULT=pass>
29270 23:02:46.826425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2672 RESULT=skip>
29271 23:02:46.826806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2672 RESULT=skip
29273 23:02:46.862294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2672 RESULT=skip>
29274 23:02:46.862691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2672 RESULT=skip
29276 23:02:46.902260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2688 RESULT=pass>
29277 23:02:46.902757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2688 RESULT=pass
29279 23:02:46.940340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2688 RESULT=skip
29281 23:02:46.940744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2688 RESULT=skip>
29282 23:02:46.974811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2688 RESULT=skip
29284 23:02:46.975240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2688 RESULT=skip>
29285 23:02:47.011561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2704 RESULT=pass>
29286 23:02:47.011979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2704 RESULT=pass
29288 23:02:47.045725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2704 RESULT=skip>
29289 23:02:47.046112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2704 RESULT=skip
29291 23:02:47.080419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2704 RESULT=skip>
29292 23:02:47.080791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2704 RESULT=skip
29294 23:02:47.113854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2720 RESULT=pass>
29295 23:02:47.114226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2720 RESULT=pass
29297 23:02:47.148978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2720 RESULT=skip>
29298 23:02:47.149358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2720 RESULT=skip
29300 23:02:47.181375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2720 RESULT=skip>
29301 23:02:47.181826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2720 RESULT=skip
29303 23:02:47.213603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2736 RESULT=pass>
29304 23:02:47.214087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2736 RESULT=pass
29306 23:02:47.246924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2736 RESULT=skip
29308 23:02:47.247555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2736 RESULT=skip>
29309 23:02:47.279788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2736 RESULT=skip
29311 23:02:47.280239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2736 RESULT=skip>
29312 23:02:47.312028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2752 RESULT=pass>
29313 23:02:47.312480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2752 RESULT=pass
29315 23:02:47.344499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2752 RESULT=skip>
29316 23:02:47.344907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2752 RESULT=skip
29318 23:02:47.376912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2752 RESULT=skip
29320 23:02:47.377455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2752 RESULT=skip>
29321 23:02:47.409391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2768 RESULT=pass>
29322 23:02:47.409867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2768 RESULT=pass
29324 23:02:47.441769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2768 RESULT=skip>
29325 23:02:47.442236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2768 RESULT=skip
29327 23:02:47.473712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2768 RESULT=skip
29329 23:02:47.474298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2768 RESULT=skip>
29330 23:02:47.505561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2784 RESULT=pass>
29331 23:02:47.506047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2784 RESULT=pass
29333 23:02:47.537563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2784 RESULT=skip
29335 23:02:47.538195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2784 RESULT=skip>
29336 23:02:47.569632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2784 RESULT=skip>
29337 23:02:47.570105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2784 RESULT=skip
29339 23:02:47.601895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2800 RESULT=pass
29341 23:02:47.602482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2800 RESULT=pass>
29342 23:02:47.633899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2800 RESULT=skip
29344 23:02:47.634346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2800 RESULT=skip>
29345 23:02:47.666254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2800 RESULT=skip
29347 23:02:47.666700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2800 RESULT=skip>
29348 23:02:47.697665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2816 RESULT=pass>
29349 23:02:47.698084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2816 RESULT=pass
29351 23:02:47.729921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2816 RESULT=skip>
29352 23:02:47.730324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2816 RESULT=skip
29354 23:02:47.762308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2816 RESULT=skip
29356 23:02:47.762762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2816 RESULT=skip>
29357 23:02:47.793958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2832 RESULT=pass>
29358 23:02:47.794431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2832 RESULT=pass
29360 23:02:47.827347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2832 RESULT=skip
29362 23:02:47.827984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2832 RESULT=skip>
29363 23:02:47.859934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2832 RESULT=skip
29365 23:02:47.860387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2832 RESULT=skip>
29366 23:02:47.898191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2848 RESULT=pass>
29367 23:02:47.898618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2848 RESULT=pass
29369 23:02:47.932691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2848 RESULT=skip
29371 23:02:47.933305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2848 RESULT=skip>
29372 23:02:47.965683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2848 RESULT=skip
29374 23:02:47.966312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2848 RESULT=skip>
29375 23:02:47.997778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2864 RESULT=pass
29377 23:02:47.998247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2864 RESULT=pass>
29378 23:02:48.029936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2864 RESULT=skip
29380 23:02:48.030390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2864 RESULT=skip>
29381 23:02:48.062171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2864 RESULT=skip>
29382 23:02:48.062615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2864 RESULT=skip
29384 23:02:48.094484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2880 RESULT=pass>
29385 23:02:48.094918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2880 RESULT=pass
29387 23:02:48.127275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2880 RESULT=skip
29389 23:02:48.127740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2880 RESULT=skip>
29390 23:02:48.159960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2880 RESULT=skip
29392 23:02:48.160424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2880 RESULT=skip>
29393 23:02:48.192624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2896 RESULT=pass
29395 23:02:48.193079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2896 RESULT=pass>
29396 23:02:48.226199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2896 RESULT=skip
29398 23:02:48.226873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2896 RESULT=skip>
29399 23:02:48.260159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2896 RESULT=skip>
29400 23:02:48.260655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2896 RESULT=skip
29402 23:02:48.301203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2912 RESULT=pass
29404 23:02:48.301868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2912 RESULT=pass>
29405 23:02:48.335466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2912 RESULT=skip>
29406 23:02:48.335953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2912 RESULT=skip
29408 23:02:48.369100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2912 RESULT=skip
29410 23:02:48.369752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2912 RESULT=skip>
29411 23:02:48.405101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2928 RESULT=pass
29413 23:02:48.405772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2928 RESULT=pass>
29414 23:02:48.440452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2928 RESULT=skip>
29415 23:02:48.440892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2928 RESULT=skip
29417 23:02:48.476783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2928 RESULT=skip
29419 23:02:48.477231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2928 RESULT=skip>
29420 23:02:48.511092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2944 RESULT=pass>
29421 23:02:48.511579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2944 RESULT=pass
29423 23:02:48.545443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2944 RESULT=skip
29425 23:02:48.546030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2944 RESULT=skip>
29426 23:02:48.577823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2944 RESULT=skip>
29427 23:02:48.578289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2944 RESULT=skip
29429 23:02:48.609866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2960 RESULT=pass>
29430 23:02:48.610290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2960 RESULT=pass
29432 23:02:48.641921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2960 RESULT=skip>
29433 23:02:48.642343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2960 RESULT=skip
29435 23:02:48.673976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2960 RESULT=skip>
29436 23:02:48.674406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2960 RESULT=skip
29438 23:02:48.706483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2976 RESULT=pass>
29439 23:02:48.706909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2976 RESULT=pass
29441 23:02:48.738838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2976 RESULT=skip
29443 23:02:48.739476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2976 RESULT=skip>
29444 23:02:48.771747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2976 RESULT=skip
29446 23:02:48.772409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2976 RESULT=skip>
29447 23:02:48.803500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2992 RESULT=pass>
29448 23:02:48.803909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2992 RESULT=pass
29450 23:02:48.838151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2992 RESULT=skip>
29451 23:02:48.838563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2992 RESULT=skip
29453 23:02:48.870938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2992 RESULT=skip
29455 23:02:48.871344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2992 RESULT=skip>
29456 23:02:48.903957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3008 RESULT=pass>
29457 23:02:48.904427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3008 RESULT=pass
29459 23:02:48.935729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3008 RESULT=skip>
29460 23:02:48.936184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3008 RESULT=skip
29462 23:02:48.967942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3008 RESULT=skip>
29463 23:02:48.968370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3008 RESULT=skip
29465 23:02:49.000575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3024 RESULT=pass>
29466 23:02:49.001027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3024 RESULT=pass
29468 23:02:49.034928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3024 RESULT=skip
29470 23:02:49.035534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3024 RESULT=skip>
29471 23:02:49.068946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3024 RESULT=skip
29473 23:02:49.069559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3024 RESULT=skip>
29474 23:02:49.104652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3040 RESULT=pass>
29475 23:02:49.105133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3040 RESULT=pass
29477 23:02:49.139432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3040 RESULT=skip>
29478 23:02:49.139884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3040 RESULT=skip
29480 23:02:49.173784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3040 RESULT=skip
29482 23:02:49.174208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3040 RESULT=skip>
29483 23:02:49.207729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3056 RESULT=pass
29485 23:02:49.208174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3056 RESULT=pass>
29486 23:02:49.240464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3056 RESULT=skip>
29487 23:02:49.240892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3056 RESULT=skip
29489 23:02:49.273152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3056 RESULT=skip
29491 23:02:49.273597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3056 RESULT=skip>
29492 23:02:49.305368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3072 RESULT=pass>
29493 23:02:49.305873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3072 RESULT=pass
29495 23:02:49.337521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3072 RESULT=skip>
29496 23:02:49.338008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3072 RESULT=skip
29498 23:02:49.370165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3072 RESULT=skip>
29499 23:02:49.370653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3072 RESULT=skip
29501 23:02:49.402364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3088 RESULT=pass>
29502 23:02:49.402793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3088 RESULT=pass
29504 23:02:49.435963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3088 RESULT=skip
29506 23:02:49.436419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3088 RESULT=skip>
29507 23:02:49.469782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3088 RESULT=skip>
29508 23:02:49.470215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3088 RESULT=skip
29510 23:02:49.502555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3104 RESULT=pass
29512 23:02:49.503005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3104 RESULT=pass>
29513 23:02:49.535951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3104 RESULT=skip>
29514 23:02:49.536370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3104 RESULT=skip
29516 23:02:49.570029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3104 RESULT=skip
29518 23:02:49.570479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3104 RESULT=skip>
29519 23:02:49.602080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3120 RESULT=pass
29521 23:02:49.602516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3120 RESULT=pass>
29522 23:02:49.634341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3120 RESULT=skip>
29523 23:02:49.634769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3120 RESULT=skip
29525 23:02:49.666416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3120 RESULT=skip>
29526 23:02:49.666831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3120 RESULT=skip
29528 23:02:49.698555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3136 RESULT=pass
29530 23:02:49.699003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3136 RESULT=pass>
29531 23:02:49.731253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3136 RESULT=skip>
29532 23:02:49.731648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3136 RESULT=skip
29534 23:02:49.764055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3136 RESULT=skip>
29535 23:02:49.764435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3136 RESULT=skip
29537 23:02:49.795916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3152 RESULT=pass
29539 23:02:49.796354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3152 RESULT=pass>
29540 23:02:49.827903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3152 RESULT=skip>
29541 23:02:49.828325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3152 RESULT=skip
29543 23:02:49.860964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3152 RESULT=skip>
29544 23:02:49.861354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3152 RESULT=skip
29546 23:02:49.892929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3168 RESULT=pass
29548 23:02:49.893583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3168 RESULT=pass>
29549 23:02:49.925072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3168 RESULT=skip
29551 23:02:49.925529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3168 RESULT=skip>
29552 23:02:49.957539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3168 RESULT=skip>
29553 23:02:49.957958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3168 RESULT=skip
29555 23:02:49.989430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3184 RESULT=pass>
29556 23:02:49.989858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3184 RESULT=pass
29558 23:02:50.022108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3184 RESULT=skip
29560 23:02:50.022566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3184 RESULT=skip>
29561 23:02:50.053965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3184 RESULT=skip
29563 23:02:50.054446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3184 RESULT=skip>
29564 23:02:50.085340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3200 RESULT=pass>
29565 23:02:50.085757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3200 RESULT=pass
29567 23:02:50.116431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3200 RESULT=skip
29569 23:02:50.116877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3200 RESULT=skip>
29570 23:02:50.148135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3200 RESULT=skip
29572 23:02:50.148800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3200 RESULT=skip>
29573 23:02:50.179816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3216 RESULT=pass
29575 23:02:50.180457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3216 RESULT=pass>
29576 23:02:50.211972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3216 RESULT=skip>
29577 23:02:50.212441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3216 RESULT=skip
29579 23:02:50.244403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3216 RESULT=skip>
29580 23:02:50.244879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3216 RESULT=skip
29582 23:02:50.276813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3232 RESULT=pass>
29583 23:02:50.277250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3232 RESULT=pass
29585 23:02:50.308636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3232 RESULT=skip
29587 23:02:50.309274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3232 RESULT=skip>
29588 23:02:50.341363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3232 RESULT=skip>
29589 23:02:50.341785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3232 RESULT=skip
29591 23:02:50.374347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3248 RESULT=pass
29593 23:02:50.374794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3248 RESULT=pass>
29594 23:02:50.409126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3248 RESULT=skip
29596 23:02:50.409716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3248 RESULT=skip>
29597 23:02:50.442439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3248 RESULT=skip
29599 23:02:50.443049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3248 RESULT=skip>
29600 23:02:50.475993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3264 RESULT=pass>
29601 23:02:50.476449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3264 RESULT=pass
29603 23:02:50.508251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3264 RESULT=skip
29605 23:02:50.508727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3264 RESULT=skip>
29606 23:02:50.552716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3264 RESULT=skip>
29607 23:02:50.553106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3264 RESULT=skip
29609 23:02:50.597268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3280 RESULT=pass>
29610 23:02:50.597697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3280 RESULT=pass
29612 23:02:50.629820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3280 RESULT=skip
29614 23:02:50.630275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3280 RESULT=skip>
29615 23:02:50.662927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3280 RESULT=skip
29617 23:02:50.663376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3280 RESULT=skip>
29618 23:02:50.695958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3296 RESULT=pass>
29619 23:02:50.696388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3296 RESULT=pass
29621 23:02:50.732314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3296 RESULT=skip
29623 23:02:50.732695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3296 RESULT=skip>
29624 23:02:50.769457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3296 RESULT=skip>
29625 23:02:50.769941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3296 RESULT=skip
29627 23:02:50.802897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3312 RESULT=pass
29629 23:02:50.803362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3312 RESULT=pass>
29630 23:02:50.835007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3312 RESULT=skip>
29631 23:02:50.835558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3312 RESULT=skip
29633 23:02:50.867366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3312 RESULT=skip>
29634 23:02:50.867798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3312 RESULT=skip
29636 23:02:50.898837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3328 RESULT=pass
29638 23:02:50.899299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3328 RESULT=pass>
29639 23:02:50.931613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3328 RESULT=skip>
29640 23:02:50.931980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3328 RESULT=skip
29642 23:02:50.963911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3328 RESULT=skip
29644 23:02:50.964263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3328 RESULT=skip>
29645 23:02:50.996005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3344 RESULT=pass
29647 23:02:50.996342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3344 RESULT=pass>
29648 23:02:51.029448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3344 RESULT=skip
29650 23:02:51.030012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3344 RESULT=skip>
29651 23:02:51.061863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3344 RESULT=skip>
29652 23:02:51.062300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3344 RESULT=skip
29654 23:02:51.094003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3360 RESULT=pass
29656 23:02:51.094561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3360 RESULT=pass>
29657 23:02:51.126001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3360 RESULT=skip>
29658 23:02:51.126446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3360 RESULT=skip
29660 23:02:51.158168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3360 RESULT=skip>
29661 23:02:51.158632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3360 RESULT=skip
29663 23:02:51.190459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3376 RESULT=pass>
29664 23:02:51.190894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3376 RESULT=pass
29666 23:02:51.223288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3376 RESULT=skip>
29667 23:02:51.223696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3376 RESULT=skip
29669 23:02:51.255590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3376 RESULT=skip>
29670 23:02:51.255970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3376 RESULT=skip
29672 23:02:51.287938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3392 RESULT=pass>
29673 23:02:51.288353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3392 RESULT=pass
29675 23:02:51.319286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3392 RESULT=skip>
29676 23:02:51.319718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3392 RESULT=skip
29678 23:02:51.350818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3392 RESULT=skip
29680 23:02:51.351282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3392 RESULT=skip>
29681 23:02:51.382885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3408 RESULT=pass
29683 23:02:51.383329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3408 RESULT=pass>
29684 23:02:51.414454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3408 RESULT=skip
29686 23:02:51.414911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3408 RESULT=skip>
29687 23:02:51.446227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3408 RESULT=skip>
29688 23:02:51.446639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3408 RESULT=skip
29690 23:02:51.479856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3424 RESULT=pass>
29691 23:02:51.480416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3424 RESULT=pass
29693 23:02:51.512955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3424 RESULT=skip>
29694 23:02:51.513360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3424 RESULT=skip
29696 23:02:51.545551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3424 RESULT=skip>
29697 23:02:51.546040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3424 RESULT=skip
29699 23:02:51.578174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3440 RESULT=pass>
29700 23:02:51.578657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3440 RESULT=pass
29702 23:02:51.610093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3440 RESULT=skip
29704 23:02:51.610731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3440 RESULT=skip>
29705 23:02:51.642936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3440 RESULT=skip
29707 23:02:51.643593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3440 RESULT=skip>
29708 23:02:51.674890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3456 RESULT=pass
29710 23:02:51.675453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3456 RESULT=pass>
29711 23:02:51.706886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3456 RESULT=skip
29713 23:02:51.707506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3456 RESULT=skip>
29714 23:02:51.739893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3456 RESULT=skip>
29715 23:02:51.740353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3456 RESULT=skip
29717 23:02:51.771699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3472 RESULT=pass>
29718 23:02:51.772157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3472 RESULT=pass
29720 23:02:51.803902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3472 RESULT=skip
29722 23:02:51.804472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3472 RESULT=skip>
29723 23:02:51.836660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3472 RESULT=skip>
29724 23:02:51.837127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3472 RESULT=skip
29726 23:02:51.869606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3488 RESULT=pass>
29727 23:02:51.870064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3488 RESULT=pass
29729 23:02:51.902007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3488 RESULT=skip>
29730 23:02:51.902491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3488 RESULT=skip
29732 23:02:51.933431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3488 RESULT=skip>
29733 23:02:51.933914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3488 RESULT=skip
29735 23:02:51.966063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3504 RESULT=pass
29737 23:02:51.966666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3504 RESULT=pass>
29738 23:02:51.998243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3504 RESULT=skip>
29739 23:02:51.998689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3504 RESULT=skip
29741 23:02:52.030632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3504 RESULT=skip
29743 23:02:52.031185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3504 RESULT=skip>
29744 23:02:52.063656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3520 RESULT=pass>
29745 23:02:52.064106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3520 RESULT=pass
29747 23:02:52.095907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3520 RESULT=skip
29749 23:02:52.096439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3520 RESULT=skip>
29750 23:02:52.127919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3520 RESULT=skip
29752 23:02:52.128466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3520 RESULT=skip>
29753 23:02:52.159931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3536 RESULT=pass
29755 23:02:52.160366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3536 RESULT=pass>
29756 23:02:52.191974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3536 RESULT=skip>
29757 23:02:52.192416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3536 RESULT=skip
29759 23:02:52.224720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3536 RESULT=skip>
29760 23:02:52.225133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3536 RESULT=skip
29762 23:02:52.257387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3552 RESULT=pass>
29763 23:02:52.257787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3552 RESULT=pass
29765 23:02:52.289837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3552 RESULT=skip>
29766 23:02:52.290236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3552 RESULT=skip
29768 23:02:52.322741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3552 RESULT=skip
29770 23:02:52.323219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3552 RESULT=skip>
29771 23:02:52.354558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3568 RESULT=pass
29773 23:02:52.355004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3568 RESULT=pass>
29774 23:02:52.386347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3568 RESULT=skip>
29775 23:02:52.386734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3568 RESULT=skip
29777 23:02:52.418000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3568 RESULT=skip>
29778 23:02:52.418386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3568 RESULT=skip
29780 23:02:52.449032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3584 RESULT=pass>
29781 23:02:52.449504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3584 RESULT=pass
29783 23:02:52.481576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3584 RESULT=skip>
29784 23:02:52.482070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3584 RESULT=skip
29786 23:02:52.514185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3584 RESULT=skip>
29787 23:02:52.514675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3584 RESULT=skip
29789 23:02:52.546001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3600 RESULT=pass>
29790 23:02:52.546475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3600 RESULT=pass
29792 23:02:52.577956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3600 RESULT=skip>
29793 23:02:52.578443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3600 RESULT=skip
29795 23:02:52.609818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3600 RESULT=skip>
29796 23:02:52.610291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3600 RESULT=skip
29798 23:02:52.641809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3616 RESULT=pass>
29799 23:02:52.642289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3616 RESULT=pass
29801 23:02:52.674160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3616 RESULT=skip>
29802 23:02:52.674597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3616 RESULT=skip
29804 23:02:52.709904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3616 RESULT=skip>
29805 23:02:52.710387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3616 RESULT=skip
29807 23:02:52.743704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3632 RESULT=pass
29809 23:02:52.744254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3632 RESULT=pass>
29810 23:02:52.776153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3632 RESULT=skip
29812 23:02:52.776732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3632 RESULT=skip>
29813 23:02:52.808602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3632 RESULT=skip>
29814 23:02:52.809068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3632 RESULT=skip
29816 23:02:52.841279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3648 RESULT=pass>
29817 23:02:52.841743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3648 RESULT=pass
29819 23:02:52.873918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3648 RESULT=skip>
29820 23:02:52.874358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3648 RESULT=skip
29822 23:02:52.906122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3648 RESULT=skip>
29823 23:02:52.906596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3648 RESULT=skip
29825 23:02:52.938025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3664 RESULT=pass
29827 23:02:52.938660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3664 RESULT=pass>
29828 23:02:52.969995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3664 RESULT=skip
29830 23:02:52.970589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3664 RESULT=skip>
29831 23:02:53.002124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3664 RESULT=skip
29833 23:02:53.002563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3664 RESULT=skip>
29834 23:02:53.033945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3680 RESULT=pass>
29835 23:02:53.034342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3680 RESULT=pass
29837 23:02:53.068608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3680 RESULT=skip>
29838 23:02:53.069081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3680 RESULT=skip
29840 23:02:53.101886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3680 RESULT=skip>
29841 23:02:53.102361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3680 RESULT=skip
29843 23:02:53.134723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3696 RESULT=pass
29845 23:02:53.135283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3696 RESULT=pass>
29846 23:02:53.167528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3696 RESULT=skip>
29847 23:02:53.167944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3696 RESULT=skip
29849 23:02:53.199857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3696 RESULT=skip>
29850 23:02:53.200311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3696 RESULT=skip
29852 23:02:53.232601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3712 RESULT=pass>
29853 23:02:53.233028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3712 RESULT=pass
29855 23:02:53.265105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3712 RESULT=skip
29857 23:02:53.265671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3712 RESULT=skip>
29858 23:02:53.298000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3712 RESULT=skip
29860 23:02:53.298587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3712 RESULT=skip>
29861 23:02:53.330307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3728 RESULT=pass>
29862 23:02:53.330775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3728 RESULT=pass
29864 23:02:53.363747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3728 RESULT=skip>
29865 23:02:53.364201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3728 RESULT=skip
29867 23:02:53.396033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3728 RESULT=skip
29869 23:02:53.396569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3728 RESULT=skip>
29870 23:02:53.427827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3744 RESULT=pass
29872 23:02:53.428362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3744 RESULT=pass>
29873 23:02:53.460107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3744 RESULT=skip
29875 23:02:53.460637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3744 RESULT=skip>
29876 23:02:53.492161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3744 RESULT=skip>
29877 23:02:53.492595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3744 RESULT=skip
29879 23:02:53.523981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3760 RESULT=pass
29881 23:02:53.524400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3760 RESULT=pass>
29882 23:02:53.556787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3760 RESULT=skip
29884 23:02:53.557203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3760 RESULT=skip>
29885 23:02:53.589074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3760 RESULT=skip>
29886 23:02:53.589502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3760 RESULT=skip
29888 23:02:53.622694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3776 RESULT=pass
29890 23:02:53.623145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3776 RESULT=pass>
29891 23:02:53.656679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3776 RESULT=skip>
29892 23:02:53.657107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3776 RESULT=skip
29894 23:02:53.688631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3776 RESULT=skip>
29895 23:02:53.689045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3776 RESULT=skip
29897 23:02:53.724845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3792 RESULT=pass
29899 23:02:53.725311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3792 RESULT=pass>
29900 23:02:53.764177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3792 RESULT=skip>
29901 23:02:53.764601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3792 RESULT=skip
29903 23:02:53.797301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3792 RESULT=skip>
29904 23:02:53.797685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3792 RESULT=skip
29906 23:02:53.833331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3808 RESULT=pass
29908 23:02:53.833791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3808 RESULT=pass>
29909 23:02:53.867657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3808 RESULT=skip>
29910 23:02:53.868102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3808 RESULT=skip
29912 23:02:53.900303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3808 RESULT=skip
29914 23:02:53.900973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3808 RESULT=skip>
29915 23:02:53.932329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3824 RESULT=pass>
29916 23:02:53.932729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3824 RESULT=pass
29918 23:02:53.964997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3824 RESULT=skip>
29919 23:02:53.965373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3824 RESULT=skip
29921 23:02:53.997507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3824 RESULT=skip>
29922 23:02:53.997992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3824 RESULT=skip
29924 23:02:54.030059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3840 RESULT=pass
29926 23:02:54.030611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3840 RESULT=pass>
29927 23:02:54.062321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3840 RESULT=skip
29929 23:02:54.062876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3840 RESULT=skip>
29930 23:02:54.094871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3840 RESULT=skip
29932 23:02:54.095327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3840 RESULT=skip>
29933 23:02:54.131751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3856 RESULT=pass
29935 23:02:54.132210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3856 RESULT=pass>
29936 23:02:54.163695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3856 RESULT=skip
29938 23:02:54.164220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3856 RESULT=skip>
29939 23:02:54.195908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3856 RESULT=skip>
29940 23:02:54.196368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3856 RESULT=skip
29942 23:02:54.226377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3872 RESULT=pass
29944 23:02:54.226840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3872 RESULT=pass>
29945 23:02:54.258084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3872 RESULT=skip
29947 23:02:54.258620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3872 RESULT=skip>
29948 23:02:54.289133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3872 RESULT=skip
29950 23:02:54.289731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3872 RESULT=skip>
29951 23:02:54.320275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3888 RESULT=pass
29953 23:02:54.320887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3888 RESULT=pass>
29954 23:02:54.351243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3888 RESULT=skip
29956 23:02:54.351890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3888 RESULT=skip>
29957 23:02:54.382427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3888 RESULT=skip
29959 23:02:54.382988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3888 RESULT=skip>
29960 23:02:54.413810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3904 RESULT=pass>
29961 23:02:54.414277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3904 RESULT=pass
29963 23:02:54.444907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3904 RESULT=skip>
29964 23:02:54.445359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3904 RESULT=skip
29966 23:02:54.475828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3904 RESULT=skip>
29967 23:02:54.476286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3904 RESULT=skip
29969 23:02:54.506476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3920 RESULT=pass>
29970 23:02:54.506956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3920 RESULT=pass
29972 23:02:54.537704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3920 RESULT=skip>
29973 23:02:54.538161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3920 RESULT=skip
29975 23:02:54.569088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3920 RESULT=skip>
29976 23:02:54.569537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3920 RESULT=skip
29978 23:02:54.601842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3936 RESULT=pass
29980 23:02:54.602383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3936 RESULT=pass>
29981 23:02:54.633573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3936 RESULT=skip>
29982 23:02:54.634005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3936 RESULT=skip
29984 23:02:54.665835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3936 RESULT=skip>
29985 23:02:54.666261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3936 RESULT=skip
29987 23:02:54.698270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3952 RESULT=pass
29989 23:02:54.698790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3952 RESULT=pass>
29990 23:02:54.730573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3952 RESULT=skip>
29991 23:02:54.731023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3952 RESULT=skip
29993 23:02:54.763625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3952 RESULT=skip>
29994 23:02:54.764072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3952 RESULT=skip
29996 23:02:54.796788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3968 RESULT=pass>
29997 23:02:54.797243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3968 RESULT=pass
29999 23:02:54.831364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3968 RESULT=skip
30001 23:02:54.831917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3968 RESULT=skip>
30002 23:02:54.872810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3968 RESULT=skip>
30003 23:02:54.873264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3968 RESULT=skip
30005 23:02:54.904927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3984 RESULT=pass>
30006 23:02:54.905388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3984 RESULT=pass
30008 23:02:54.937135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3984 RESULT=skip
30010 23:02:54.937694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3984 RESULT=skip>
30011 23:02:54.970080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3984 RESULT=skip
30013 23:02:54.970604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3984 RESULT=skip>
30014 23:02:55.002140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4000 RESULT=pass>
30015 23:02:55.002597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4000 RESULT=pass
30017 23:02:55.034215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4000 RESULT=skip
30019 23:02:55.034788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4000 RESULT=skip>
30020 23:02:55.066208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4000 RESULT=skip
30022 23:02:55.066753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4000 RESULT=skip>
30023 23:02:55.110321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4016 RESULT=pass>
30024 23:02:55.110733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4016 RESULT=pass
30026 23:02:55.146370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4016 RESULT=skip
30028 23:02:55.146822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4016 RESULT=skip>
30029 23:02:55.181496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4016 RESULT=skip
30031 23:02:55.182146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4016 RESULT=skip>
30032 23:02:55.217174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4032 RESULT=pass
30034 23:02:55.217950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4032 RESULT=pass>
30035 23:02:55.250939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4032 RESULT=skip
30037 23:02:55.251695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4032 RESULT=skip>
30038 23:02:55.288616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4032 RESULT=skip
30040 23:02:55.289312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4032 RESULT=skip>
30041 23:02:55.321517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4048 RESULT=pass>
30042 23:02:55.321950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4048 RESULT=pass
30044 23:02:55.353822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4048 RESULT=skip>
30045 23:02:55.354249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4048 RESULT=skip
30047 23:02:55.386357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4048 RESULT=skip>
30048 23:02:55.386776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4048 RESULT=skip
30050 23:02:55.418480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4064 RESULT=pass
30052 23:02:55.418996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4064 RESULT=pass>
30053 23:02:55.451586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4064 RESULT=skip
30055 23:02:55.452102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4064 RESULT=skip>
30056 23:02:55.484692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4064 RESULT=skip>
30057 23:02:55.485117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4064 RESULT=skip
30059 23:02:55.516956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4080 RESULT=pass
30061 23:02:55.517470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4080 RESULT=pass>
30062 23:02:55.550533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4080 RESULT=skip
30064 23:02:55.551075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4080 RESULT=skip>
30065 23:02:55.581717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4080 RESULT=skip>
30066 23:02:55.582166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4080 RESULT=skip
30068 23:02:55.613155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4096 RESULT=pass>
30069 23:02:55.613606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4096 RESULT=pass
30071 23:02:55.647119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4096 RESULT=skip>
30072 23:02:55.647590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4096 RESULT=skip
30074 23:02:55.716469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4096 RESULT=skip>
30075 23:02:55.716940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4096 RESULT=skip
30077 23:02:55.753089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4112 RESULT=pass
30079 23:02:55.753630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4112 RESULT=pass>
30080 23:02:55.789012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4112 RESULT=skip
30082 23:02:55.789562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4112 RESULT=skip>
30083 23:02:55.825170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4112 RESULT=skip>
30084 23:02:55.825623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4112 RESULT=skip
30086 23:02:55.860822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4128 RESULT=pass>
30087 23:02:55.861290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4128 RESULT=pass
30089 23:02:55.894842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4128 RESULT=skip
30091 23:02:55.895467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4128 RESULT=skip>
30092 23:02:55.927605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4128 RESULT=skip
30094 23:02:55.928143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4128 RESULT=skip>
30095 23:02:55.959723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4144 RESULT=pass>
30096 23:02:55.960186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4144 RESULT=pass
30098 23:02:55.992179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4144 RESULT=skip>
30099 23:02:55.992574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4144 RESULT=skip
30101 23:02:56.025698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4144 RESULT=skip>
30102 23:02:56.026128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4144 RESULT=skip
30104 23:02:56.058049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4160 RESULT=pass>
30105 23:02:56.058467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4160 RESULT=pass
30107 23:02:56.090627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4160 RESULT=skip>
30108 23:02:56.091154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4160 RESULT=skip
30110 23:02:56.125785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4160 RESULT=skip>
30111 23:02:56.126180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4160 RESULT=skip
30113 23:02:56.157327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4176 RESULT=pass
30115 23:02:56.157766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4176 RESULT=pass>
30116 23:02:56.188900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4176 RESULT=skip
30118 23:02:56.189333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4176 RESULT=skip>
30119 23:02:56.220791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4176 RESULT=skip>
30120 23:02:56.221255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4176 RESULT=skip
30122 23:02:56.252577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4192 RESULT=pass>
30123 23:02:56.253034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4192 RESULT=pass
30125 23:02:56.284540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4192 RESULT=skip
30127 23:02:56.285080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4192 RESULT=skip>
30128 23:02:56.316537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4192 RESULT=skip>
30129 23:02:56.316979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4192 RESULT=skip
30131 23:02:56.348167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4208 RESULT=pass>
30132 23:02:56.348593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4208 RESULT=pass
30134 23:02:56.379939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4208 RESULT=skip>
30135 23:02:56.380415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4208 RESULT=skip
30137 23:02:56.412337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4208 RESULT=skip>
30138 23:02:56.412791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4208 RESULT=skip
30140 23:02:56.444096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4224 RESULT=pass
30142 23:02:56.444633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4224 RESULT=pass>
30143 23:02:56.475747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4224 RESULT=skip
30145 23:02:56.476317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4224 RESULT=skip>
30146 23:02:56.507744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4224 RESULT=skip>
30147 23:02:56.508193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4224 RESULT=skip
30149 23:02:56.539502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4240 RESULT=pass>
30150 23:02:56.539938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4240 RESULT=pass
30152 23:02:56.571940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4240 RESULT=skip>
30153 23:02:56.572380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4240 RESULT=skip
30155 23:02:56.603577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4240 RESULT=skip>
30156 23:02:56.604020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4240 RESULT=skip
30158 23:02:56.634368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4256 RESULT=pass>
30159 23:02:56.634882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4256 RESULT=pass
30161 23:02:56.665808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4256 RESULT=skip
30163 23:02:56.666436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4256 RESULT=skip>
30164 23:02:56.698927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4256 RESULT=skip
30166 23:02:56.699518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4256 RESULT=skip>
30167 23:02:56.733859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4272 RESULT=pass>
30168 23:02:56.734331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4272 RESULT=pass
30170 23:02:56.768282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4272 RESULT=skip
30172 23:02:56.768853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4272 RESULT=skip>
30173 23:02:56.801204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4272 RESULT=skip>
30174 23:02:56.801604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4272 RESULT=skip
30176 23:02:56.834074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4288 RESULT=pass>
30177 23:02:56.834482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4288 RESULT=pass
30179 23:02:56.867455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4288 RESULT=skip>
30180 23:02:56.867917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4288 RESULT=skip
30182 23:02:56.900629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4288 RESULT=skip>
30183 23:02:56.901094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4288 RESULT=skip
30185 23:02:56.933638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4304 RESULT=pass>
30186 23:02:56.934084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4304 RESULT=pass
30188 23:02:56.966067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4304 RESULT=skip>
30189 23:02:56.966617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4304 RESULT=skip
30191 23:02:56.997993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4304 RESULT=skip>
30192 23:02:56.998532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4304 RESULT=skip
30194 23:02:57.031353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4320 RESULT=pass>
30195 23:02:57.031793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4320 RESULT=pass
30197 23:02:57.062914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4320 RESULT=skip
30199 23:02:57.063376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4320 RESULT=skip>
30200 23:02:57.095380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4320 RESULT=skip
30202 23:02:57.095968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4320 RESULT=skip>
30203 23:02:57.127766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4336 RESULT=pass
30205 23:02:57.128174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4336 RESULT=pass>
30206 23:02:57.159915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4336 RESULT=skip
30208 23:02:57.160438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4336 RESULT=skip>
30209 23:02:57.191742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4336 RESULT=skip>
30210 23:02:57.192185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4336 RESULT=skip
30212 23:02:57.223663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4352 RESULT=pass>
30213 23:02:57.224101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4352 RESULT=pass
30215 23:02:57.255876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4352 RESULT=skip>
30216 23:02:57.256316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4352 RESULT=skip
30218 23:02:57.288018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4352 RESULT=skip>
30219 23:02:57.288460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4352 RESULT=skip
30221 23:02:57.319815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4368 RESULT=pass>
30222 23:02:57.320268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4368 RESULT=pass
30224 23:02:57.352627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4368 RESULT=skip>
30225 23:02:57.353076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4368 RESULT=skip
30227 23:02:57.384919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4368 RESULT=skip>
30228 23:02:57.385303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4368 RESULT=skip
30230 23:02:57.417729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4384 RESULT=pass>
30231 23:02:57.418142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4384 RESULT=pass
30233 23:02:57.450271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4384 RESULT=skip>
30234 23:02:57.450687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4384 RESULT=skip
30236 23:02:57.483454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4384 RESULT=skip>
30237 23:02:57.483900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4384 RESULT=skip
30239 23:02:57.515679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4400 RESULT=pass
30241 23:02:57.516221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4400 RESULT=pass>
30242 23:02:57.547930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4400 RESULT=skip
30244 23:02:57.548501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4400 RESULT=skip>
30245 23:02:57.579969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4400 RESULT=skip
30247 23:02:57.580550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4400 RESULT=skip>
30248 23:02:57.612021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4416 RESULT=pass
30250 23:02:57.612559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4416 RESULT=pass>
30251 23:02:57.644010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4416 RESULT=skip>
30252 23:02:57.644471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4416 RESULT=skip
30254 23:02:57.676253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4416 RESULT=skip
30256 23:02:57.676784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4416 RESULT=skip>
30257 23:02:57.708210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4432 RESULT=pass
30259 23:02:57.708804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4432 RESULT=pass>
30260 23:02:57.741031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4432 RESULT=skip>
30261 23:02:57.741505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4432 RESULT=skip
30263 23:02:57.773686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4432 RESULT=skip
30265 23:02:57.774256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4432 RESULT=skip>
30266 23:02:57.806191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4448 RESULT=pass
30268 23:02:57.806811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4448 RESULT=pass>
30269 23:02:57.838578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4448 RESULT=skip
30271 23:02:57.839124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4448 RESULT=skip>
30272 23:02:57.870641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4448 RESULT=skip>
30273 23:02:57.871104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4448 RESULT=skip
30275 23:02:57.904383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4464 RESULT=pass>
30276 23:02:57.904867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4464 RESULT=pass
30278 23:02:57.936361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4464 RESULT=skip>
30279 23:02:57.936828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4464 RESULT=skip
30281 23:02:57.969222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4464 RESULT=skip
30283 23:02:57.969786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4464 RESULT=skip>
30284 23:02:58.000906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4480 RESULT=pass>
30285 23:02:58.001345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4480 RESULT=pass
30287 23:02:58.032291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4480 RESULT=skip
30289 23:02:58.032827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4480 RESULT=skip>
30290 23:02:58.064004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4480 RESULT=skip
30292 23:02:58.064543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4480 RESULT=skip>
30293 23:02:58.095084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4496 RESULT=pass>
30294 23:02:58.095547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4496 RESULT=pass
30296 23:02:58.127087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4496 RESULT=skip>
30297 23:02:58.127553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4496 RESULT=skip
30299 23:02:58.158832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4496 RESULT=skip
30301 23:02:58.159374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4496 RESULT=skip>
30302 23:02:58.190387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4512 RESULT=pass>
30303 23:02:58.190818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4512 RESULT=pass
30305 23:02:58.221709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4512 RESULT=skip
30307 23:02:58.222170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4512 RESULT=skip>
30308 23:02:58.253440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4512 RESULT=skip>
30309 23:02:58.253928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4512 RESULT=skip
30311 23:02:58.286146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4528 RESULT=pass>
30312 23:02:58.286610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4528 RESULT=pass
30314 23:02:58.319840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4528 RESULT=skip
30316 23:02:58.320404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4528 RESULT=skip>
30317 23:02:58.351795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4528 RESULT=skip
30319 23:02:58.352341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4528 RESULT=skip>
30320 23:02:58.384031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4544 RESULT=pass
30322 23:02:58.384606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4544 RESULT=pass>
30323 23:02:58.415210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4544 RESULT=skip>
30324 23:02:58.415688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4544 RESULT=skip
30326 23:02:58.447210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4544 RESULT=skip
30328 23:02:58.447755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4544 RESULT=skip>
30329 23:02:58.479394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4560 RESULT=pass>
30330 23:02:58.479864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4560 RESULT=pass
30332 23:02:58.511293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4560 RESULT=skip
30334 23:02:58.511839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4560 RESULT=skip>
30335 23:02:58.542787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4560 RESULT=skip
30337 23:02:58.543359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4560 RESULT=skip>
30338 23:02:58.574387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4576 RESULT=pass>
30339 23:02:58.574842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4576 RESULT=pass
30341 23:02:58.607414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4576 RESULT=skip>
30342 23:02:58.607882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4576 RESULT=skip
30344 23:02:58.640659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4576 RESULT=skip
30346 23:02:58.641209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4576 RESULT=skip>
30347 23:02:58.672378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4592 RESULT=pass>
30348 23:02:58.672835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4592 RESULT=pass
30350 23:02:58.704021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4592 RESULT=skip
30352 23:02:58.704569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4592 RESULT=skip>
30353 23:02:58.735639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4592 RESULT=skip
30355 23:02:58.736179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4592 RESULT=skip>
30356 23:02:58.767354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4608 RESULT=pass>
30357 23:02:58.767810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4608 RESULT=pass
30359 23:02:58.799585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4608 RESULT=skip>
30360 23:02:58.800016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4608 RESULT=skip
30362 23:02:58.831843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4608 RESULT=skip>
30363 23:02:58.832284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4608 RESULT=skip
30365 23:02:58.863505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4624 RESULT=pass
30367 23:02:58.864061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4624 RESULT=pass>
30368 23:02:58.895429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4624 RESULT=skip
30370 23:02:58.895979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4624 RESULT=skip>
30371 23:02:58.927268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4624 RESULT=skip>
30372 23:02:58.927745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4624 RESULT=skip
30374 23:02:58.959218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4640 RESULT=pass>
30375 23:02:58.959676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4640 RESULT=pass
30377 23:02:58.991904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4640 RESULT=skip
30379 23:02:58.992500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4640 RESULT=skip>
30380 23:02:59.023813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4640 RESULT=skip>
30381 23:02:59.024253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4640 RESULT=skip
30383 23:02:59.055586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4656 RESULT=pass
30385 23:02:59.056130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4656 RESULT=pass>
30386 23:02:59.087803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4656 RESULT=skip>
30387 23:02:59.088247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4656 RESULT=skip
30389 23:02:59.119903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4656 RESULT=skip
30391 23:02:59.120445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4656 RESULT=skip>
30392 23:02:59.151721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4672 RESULT=pass
30394 23:02:59.152277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4672 RESULT=pass>
30395 23:02:59.183696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4672 RESULT=skip
30397 23:02:59.184249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4672 RESULT=skip>
30398 23:02:59.215830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4672 RESULT=skip
30400 23:02:59.216370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4672 RESULT=skip>
30401 23:02:59.247806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4688 RESULT=pass>
30402 23:02:59.248264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4688 RESULT=pass
30404 23:02:59.280814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4688 RESULT=skip>
30405 23:02:59.281288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4688 RESULT=skip
30407 23:02:59.313674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4688 RESULT=skip
30409 23:02:59.314213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4688 RESULT=skip>
30410 23:02:59.345638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4704 RESULT=pass
30412 23:02:59.346184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4704 RESULT=pass>
30413 23:02:59.379972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4704 RESULT=skip
30415 23:02:59.380534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4704 RESULT=skip>
30416 23:02:59.415542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4704 RESULT=skip>
30417 23:02:59.415979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4704 RESULT=skip
30419 23:02:59.453210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4720 RESULT=pass>
30420 23:02:59.453642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4720 RESULT=pass
30422 23:02:59.491264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4720 RESULT=skip>
30423 23:02:59.491717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4720 RESULT=skip
30425 23:02:59.532664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4720 RESULT=skip
30427 23:02:59.533248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4720 RESULT=skip>
30428 23:02:59.568930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4736 RESULT=pass>
30429 23:02:59.569418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4736 RESULT=pass
30431 23:02:59.602552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4736 RESULT=skip>
30432 23:02:59.603040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4736 RESULT=skip
30434 23:02:59.637890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4736 RESULT=skip>
30435 23:02:59.638385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4736 RESULT=skip
30437 23:02:59.673071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4752 RESULT=pass>
30438 23:02:59.673542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4752 RESULT=pass
30440 23:02:59.709016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4752 RESULT=skip
30442 23:02:59.709583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4752 RESULT=skip>
30443 23:02:59.742656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4752 RESULT=skip
30445 23:02:59.743208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4752 RESULT=skip>
30446 23:02:59.774558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4768 RESULT=pass
30448 23:02:59.775015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4768 RESULT=pass>
30449 23:02:59.807398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4768 RESULT=skip
30451 23:02:59.807982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4768 RESULT=skip>
30452 23:02:59.839856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4768 RESULT=skip
30454 23:02:59.840406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4768 RESULT=skip>
30455 23:02:59.871626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4784 RESULT=pass>
30456 23:02:59.872083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4784 RESULT=pass
30458 23:02:59.904172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4784 RESULT=skip>
30459 23:02:59.904640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4784 RESULT=skip
30461 23:02:59.936231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4784 RESULT=skip>
30462 23:02:59.936699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4784 RESULT=skip
30464 23:02:59.967988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4800 RESULT=pass>
30465 23:02:59.968456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4800 RESULT=pass
30467 23:03:00.000182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4800 RESULT=skip>
30468 23:03:00.000646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4800 RESULT=skip
30470 23:03:00.032208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4800 RESULT=skip>
30471 23:03:00.032681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4800 RESULT=skip
30473 23:03:00.064956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4816 RESULT=pass
30475 23:03:00.065532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4816 RESULT=pass>
30476 23:03:00.096761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4816 RESULT=skip
30478 23:03:00.097315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4816 RESULT=skip>
30479 23:03:00.128146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4816 RESULT=skip>
30480 23:03:00.128601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4816 RESULT=skip
30482 23:03:00.159721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4832 RESULT=pass>
30483 23:03:00.160194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4832 RESULT=pass
30485 23:03:00.191633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4832 RESULT=skip
30487 23:03:00.192191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4832 RESULT=skip>
30488 23:03:00.224133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4832 RESULT=skip>
30489 23:03:00.224580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4832 RESULT=skip
30491 23:03:00.257142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4848 RESULT=pass>
30492 23:03:00.257563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4848 RESULT=pass
30494 23:03:00.292364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4848 RESULT=skip
30496 23:03:00.292795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4848 RESULT=skip>
30497 23:03:00.327979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4848 RESULT=skip>
30498 23:03:00.328328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4848 RESULT=skip
30500 23:03:00.362726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4864 RESULT=pass
30502 23:03:00.363227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4864 RESULT=pass>
30503 23:03:00.395019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4864 RESULT=skip
30505 23:03:00.395464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4864 RESULT=skip>
30506 23:03:00.427786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4864 RESULT=skip
30508 23:03:00.428238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4864 RESULT=skip>
30509 23:03:00.459639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4880 RESULT=pass>
30510 23:03:00.460081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4880 RESULT=pass
30512 23:03:00.492730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4880 RESULT=skip>
30513 23:03:00.493163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4880 RESULT=skip
30515 23:03:00.525017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4880 RESULT=skip>
30516 23:03:00.525457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4880 RESULT=skip
30518 23:03:00.556795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4896 RESULT=pass>
30519 23:03:00.557250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4896 RESULT=pass
30521 23:03:00.588468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4896 RESULT=skip>
30522 23:03:00.588925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4896 RESULT=skip
30524 23:03:00.620507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4896 RESULT=skip>
30525 23:03:00.620948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4896 RESULT=skip
30527 23:03:00.654022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4912 RESULT=pass>
30528 23:03:00.654465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4912 RESULT=pass
30530 23:03:00.685560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4912 RESULT=skip>
30531 23:03:00.686152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4912 RESULT=skip
30533 23:03:00.718061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4912 RESULT=skip>
30534 23:03:00.718553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4912 RESULT=skip
30536 23:03:00.751650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4928 RESULT=pass>
30537 23:03:00.752128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4928 RESULT=pass
30539 23:03:00.804668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4928 RESULT=skip>
30540 23:03:00.805142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4928 RESULT=skip
30542 23:03:00.841347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4928 RESULT=skip>
30543 23:03:00.841783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4928 RESULT=skip
30545 23:03:00.874489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4944 RESULT=pass
30547 23:03:00.875018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4944 RESULT=pass>
30548 23:03:00.907164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4944 RESULT=skip>
30549 23:03:00.907674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4944 RESULT=skip
30551 23:03:00.939837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4944 RESULT=skip>
30552 23:03:00.940297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4944 RESULT=skip
30554 23:03:00.973013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4960 RESULT=pass>
30555 23:03:00.973500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4960 RESULT=pass
30557 23:03:01.005837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4960 RESULT=skip>
30558 23:03:01.006302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4960 RESULT=skip
30560 23:03:01.037876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4960 RESULT=skip>
30561 23:03:01.038351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4960 RESULT=skip
30563 23:03:01.069886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4976 RESULT=pass>
30564 23:03:01.070314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4976 RESULT=pass
30566 23:03:01.102178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4976 RESULT=skip
30568 23:03:01.102619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4976 RESULT=skip>
30569 23:03:01.135442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4976 RESULT=skip>
30570 23:03:01.135862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4976 RESULT=skip
30572 23:03:01.167486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4992 RESULT=pass>
30573 23:03:01.167912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4992 RESULT=pass
30575 23:03:01.199873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4992 RESULT=skip
30577 23:03:01.200415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4992 RESULT=skip>
30578 23:03:01.232373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4992 RESULT=skip>
30579 23:03:01.232823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4992 RESULT=skip
30581 23:03:01.264411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5008 RESULT=pass
30583 23:03:01.264949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5008 RESULT=pass>
30584 23:03:01.297438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5008 RESULT=skip
30586 23:03:01.298045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5008 RESULT=skip>
30587 23:03:01.335688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5008 RESULT=skip>
30588 23:03:01.336146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5008 RESULT=skip
30590 23:03:01.368978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5024 RESULT=pass
30592 23:03:01.369537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5024 RESULT=pass>
30593 23:03:01.403364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5024 RESULT=skip>
30594 23:03:01.403858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5024 RESULT=skip
30596 23:03:01.446232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5024 RESULT=skip>
30597 23:03:01.446702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5024 RESULT=skip
30599 23:03:01.478175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5040 RESULT=pass>
30600 23:03:01.478636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5040 RESULT=pass
30602 23:03:01.516231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5040 RESULT=skip>
30603 23:03:01.516723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5040 RESULT=skip
30605 23:03:01.549357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5040 RESULT=skip>
30606 23:03:01.549766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5040 RESULT=skip
30608 23:03:01.581914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5056 RESULT=pass>
30609 23:03:01.582331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5056 RESULT=pass
30611 23:03:01.613587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5056 RESULT=skip
30613 23:03:01.614025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5056 RESULT=skip>
30614 23:03:01.648422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5056 RESULT=skip>
30615 23:03:01.648872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5056 RESULT=skip
30617 23:03:01.680216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5072 RESULT=pass>
30618 23:03:01.680650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5072 RESULT=pass
30620 23:03:01.712784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5072 RESULT=skip>
30621 23:03:01.713243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5072 RESULT=skip
30623 23:03:01.747536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5072 RESULT=skip
30625 23:03:01.748009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5072 RESULT=skip>
30626 23:03:01.784228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5088 RESULT=pass>
30627 23:03:01.784717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5088 RESULT=pass
30629 23:03:01.819769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5088 RESULT=skip>
30630 23:03:01.820237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5088 RESULT=skip
30632 23:03:01.855757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5088 RESULT=skip>
30633 23:03:01.856235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5088 RESULT=skip
30635 23:03:01.890040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5104 RESULT=pass>
30636 23:03:01.890506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5104 RESULT=pass
30638 23:03:01.924489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5104 RESULT=skip
30640 23:03:01.925058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5104 RESULT=skip>
30641 23:03:01.957515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5104 RESULT=skip>
30642 23:03:01.958007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5104 RESULT=skip
30644 23:03:01.989689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5120 RESULT=pass>
30645 23:03:01.990157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5120 RESULT=pass
30647 23:03:02.022535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5120 RESULT=skip
30649 23:03:02.023067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5120 RESULT=skip>
30650 23:03:02.057928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5120 RESULT=skip>
30651 23:03:02.058370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5120 RESULT=skip
30653 23:03:02.090042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5136 RESULT=pass>
30654 23:03:02.090498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5136 RESULT=pass
30656 23:03:02.121588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5136 RESULT=skip>
30657 23:03:02.122028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5136 RESULT=skip
30659 23:03:02.153457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5136 RESULT=skip
30661 23:03:02.153905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5136 RESULT=skip>
30662 23:03:02.185152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5152 RESULT=pass>
30663 23:03:02.185569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5152 RESULT=pass
30665 23:03:02.217976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5152 RESULT=skip
30667 23:03:02.218420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5152 RESULT=skip>
30668 23:03:02.249769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5152 RESULT=skip>
30669 23:03:02.250166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5152 RESULT=skip
30671 23:03:02.282219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5168 RESULT=pass
30673 23:03:02.282671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5168 RESULT=pass>
30674 23:03:02.314507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5168 RESULT=skip
30676 23:03:02.314961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5168 RESULT=skip>
30677 23:03:02.347038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5168 RESULT=skip>
30678 23:03:02.347459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5168 RESULT=skip
30680 23:03:02.378338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5184 RESULT=pass>
30681 23:03:02.378767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5184 RESULT=pass
30683 23:03:02.410377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5184 RESULT=skip>
30684 23:03:02.410807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5184 RESULT=skip
30686 23:03:02.442500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5184 RESULT=skip>
30687 23:03:02.442925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5184 RESULT=skip
30689 23:03:02.474474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5200 RESULT=pass>
30690 23:03:02.474901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5200 RESULT=pass
30692 23:03:02.505913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5200 RESULT=skip
30694 23:03:02.506354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5200 RESULT=skip>
30695 23:03:02.537786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5200 RESULT=skip>
30696 23:03:02.538204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5200 RESULT=skip
30698 23:03:02.569906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5216 RESULT=pass>
30699 23:03:02.570400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5216 RESULT=pass
30701 23:03:02.601457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5216 RESULT=skip>
30702 23:03:02.601924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5216 RESULT=skip
30704 23:03:02.634683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5216 RESULT=skip>
30705 23:03:02.635107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5216 RESULT=skip
30707 23:03:02.665555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5232 RESULT=pass
30709 23:03:02.665984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5232 RESULT=pass>
30710 23:03:02.696388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5232 RESULT=skip
30712 23:03:02.696917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5232 RESULT=skip>
30713 23:03:02.730541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5232 RESULT=skip>
30714 23:03:02.730966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5232 RESULT=skip
30716 23:03:02.762400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5248 RESULT=pass>
30717 23:03:02.762829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5248 RESULT=pass
30719 23:03:02.794267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5248 RESULT=skip>
30720 23:03:02.794688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5248 RESULT=skip
30722 23:03:02.827195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5248 RESULT=skip>
30723 23:03:02.827583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5248 RESULT=skip
30725 23:03:02.858619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5264 RESULT=pass
30727 23:03:02.859035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5264 RESULT=pass>
30728 23:03:02.890559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5264 RESULT=skip>
30729 23:03:02.890942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5264 RESULT=skip
30731 23:03:02.922535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5264 RESULT=skip>
30732 23:03:02.922922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5264 RESULT=skip
30734 23:03:02.954168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5280 RESULT=pass>
30735 23:03:02.954544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5280 RESULT=pass
30737 23:03:02.985838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5280 RESULT=skip>
30738 23:03:02.986222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5280 RESULT=skip
30740 23:03:03.017358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5280 RESULT=skip>
30741 23:03:03.017739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5280 RESULT=skip
30743 23:03:03.049346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5296 RESULT=pass
30745 23:03:03.049773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5296 RESULT=pass>
30746 23:03:03.081702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5296 RESULT=skip>
30747 23:03:03.082086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5296 RESULT=skip
30749 23:03:03.113414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5296 RESULT=skip>
30750 23:03:03.113793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5296 RESULT=skip
30752 23:03:03.144727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5312 RESULT=pass>
30753 23:03:03.145106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5312 RESULT=pass
30755 23:03:03.176343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5312 RESULT=skip>
30756 23:03:03.176722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5312 RESULT=skip
30758 23:03:03.207925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5312 RESULT=skip>
30759 23:03:03.208304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5312 RESULT=skip
30761 23:03:03.240369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5328 RESULT=pass
30763 23:03:03.240799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5328 RESULT=pass>
30764 23:03:03.271941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5328 RESULT=skip>
30765 23:03:03.272383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5328 RESULT=skip
30767 23:03:03.304026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5328 RESULT=skip>
30768 23:03:03.304444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5328 RESULT=skip
30770 23:03:03.335825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5344 RESULT=pass>
30771 23:03:03.336314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5344 RESULT=pass
30773 23:03:03.367849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5344 RESULT=skip>
30774 23:03:03.368270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5344 RESULT=skip
30776 23:03:03.400459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5344 RESULT=skip
30778 23:03:03.400901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5344 RESULT=skip>
30779 23:03:03.432426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5360 RESULT=pass>
30780 23:03:03.432842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5360 RESULT=pass
30782 23:03:03.464743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5360 RESULT=skip
30784 23:03:03.465191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5360 RESULT=skip>
30785 23:03:03.496358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5360 RESULT=skip>
30786 23:03:03.496769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5360 RESULT=skip
30788 23:03:03.528950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5376 RESULT=pass
30790 23:03:03.529385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5376 RESULT=pass>
30791 23:03:03.561861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5376 RESULT=skip>
30792 23:03:03.562276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5376 RESULT=skip
30794 23:03:03.595542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5376 RESULT=skip
30796 23:03:03.596130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5376 RESULT=skip>
30797 23:03:03.627655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5392 RESULT=pass
30799 23:03:03.628215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5392 RESULT=pass>
30800 23:03:03.660581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5392 RESULT=skip
30802 23:03:03.661204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5392 RESULT=skip>
30803 23:03:03.692207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5392 RESULT=skip>
30804 23:03:03.692665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5392 RESULT=skip
30806 23:03:03.724093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5408 RESULT=pass
30808 23:03:03.724706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5408 RESULT=pass>
30809 23:03:03.755971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5408 RESULT=skip>
30810 23:03:03.756440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5408 RESULT=skip
30812 23:03:03.788464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5408 RESULT=skip
30814 23:03:03.789027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5408 RESULT=skip>
30815 23:03:03.819981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5424 RESULT=pass
30817 23:03:03.820523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5424 RESULT=pass>
30818 23:03:03.852066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5424 RESULT=skip>
30819 23:03:03.852505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5424 RESULT=skip
30821 23:03:03.884057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5424 RESULT=skip
30823 23:03:03.884486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5424 RESULT=skip>
30824 23:03:03.916830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5440 RESULT=pass
30826 23:03:03.917268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5440 RESULT=pass>
30827 23:03:03.948989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5440 RESULT=skip
30829 23:03:03.949454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5440 RESULT=skip>
30830 23:03:03.981883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5440 RESULT=skip>
30831 23:03:03.982372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5440 RESULT=skip
30833 23:03:04.014484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5456 RESULT=pass
30835 23:03:04.015110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5456 RESULT=pass>
30836 23:03:04.046436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5456 RESULT=skip>
30837 23:03:04.046881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5456 RESULT=skip
30839 23:03:04.078988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5456 RESULT=skip
30841 23:03:04.079429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5456 RESULT=skip>
30842 23:03:04.111767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5472 RESULT=pass>
30843 23:03:04.112187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5472 RESULT=pass
30845 23:03:04.144018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5472 RESULT=skip
30847 23:03:04.144457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5472 RESULT=skip>
30848 23:03:04.175819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5472 RESULT=skip>
30849 23:03:04.176240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5472 RESULT=skip
30851 23:03:04.208088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5488 RESULT=pass
30853 23:03:04.208668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5488 RESULT=pass>
30854 23:03:04.242152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5488 RESULT=skip
30856 23:03:04.242777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5488 RESULT=skip>
30857 23:03:04.274294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5488 RESULT=skip
30859 23:03:04.274873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5488 RESULT=skip>
30860 23:03:04.305811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5504 RESULT=pass>
30861 23:03:04.306231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5504 RESULT=pass
30863 23:03:04.337282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5504 RESULT=skip>
30864 23:03:04.337683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5504 RESULT=skip
30866 23:03:04.368866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5504 RESULT=skip
30868 23:03:04.369327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5504 RESULT=skip>
30869 23:03:04.400202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5520 RESULT=pass
30871 23:03:04.400659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5520 RESULT=pass>
30872 23:03:04.431946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5520 RESULT=skip>
30873 23:03:04.432354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5520 RESULT=skip
30875 23:03:04.464809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5520 RESULT=skip
30877 23:03:04.465372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5520 RESULT=skip>
30878 23:03:04.496523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5536 RESULT=pass>
30879 23:03:04.496987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5536 RESULT=pass
30881 23:03:04.528509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5536 RESULT=skip>
30882 23:03:04.528966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5536 RESULT=skip
30884 23:03:04.560430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5536 RESULT=skip>
30885 23:03:04.560866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5536 RESULT=skip
30887 23:03:04.591971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5552 RESULT=pass
30889 23:03:04.592507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5552 RESULT=pass>
30890 23:03:04.624448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5552 RESULT=skip
30892 23:03:04.625008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5552 RESULT=skip>
30893 23:03:04.656297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5552 RESULT=skip>
30894 23:03:04.656718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5552 RESULT=skip
30896 23:03:04.689047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5568 RESULT=pass>
30897 23:03:04.689485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5568 RESULT=pass
30899 23:03:04.721433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5568 RESULT=skip>
30900 23:03:04.721848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5568 RESULT=skip
30902 23:03:04.753845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5568 RESULT=skip>
30903 23:03:04.754298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5568 RESULT=skip
30905 23:03:04.786015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5584 RESULT=pass
30907 23:03:04.786557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5584 RESULT=pass>
30908 23:03:04.817882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5584 RESULT=skip>
30909 23:03:04.818339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5584 RESULT=skip
30911 23:03:04.850344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5584 RESULT=skip>
30912 23:03:04.850830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5584 RESULT=skip
30914 23:03:04.884613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5600 RESULT=pass>
30915 23:03:04.885095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5600 RESULT=pass
30917 23:03:04.919655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5600 RESULT=skip
30919 23:03:04.920211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5600 RESULT=skip>
30920 23:03:04.952374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5600 RESULT=skip>
30921 23:03:04.952820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5600 RESULT=skip
30923 23:03:04.984339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5616 RESULT=pass>
30924 23:03:04.984774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5616 RESULT=pass
30926 23:03:05.016452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5616 RESULT=skip>
30927 23:03:05.016913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5616 RESULT=skip
30929 23:03:05.048666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5616 RESULT=skip>
30930 23:03:05.049105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5616 RESULT=skip
30932 23:03:05.080545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5632 RESULT=pass>
30933 23:03:05.080996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5632 RESULT=pass
30935 23:03:05.113180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5632 RESULT=skip
30937 23:03:05.113740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5632 RESULT=skip>
30938 23:03:05.147698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5632 RESULT=skip>
30939 23:03:05.148148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5632 RESULT=skip
30941 23:03:05.180284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5648 RESULT=pass>
30942 23:03:05.180723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5648 RESULT=pass
30944 23:03:05.212182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5648 RESULT=skip>
30945 23:03:05.212632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5648 RESULT=skip
30947 23:03:05.244518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5648 RESULT=skip
30949 23:03:05.245049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5648 RESULT=skip>
30950 23:03:05.276368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5664 RESULT=pass>
30951 23:03:05.276813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5664 RESULT=pass
30953 23:03:05.308859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5664 RESULT=skip>
30954 23:03:05.309295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5664 RESULT=skip
30956 23:03:05.341374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5664 RESULT=skip>
30957 23:03:05.341850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5664 RESULT=skip
30959 23:03:05.374450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5680 RESULT=pass>
30960 23:03:05.374888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5680 RESULT=pass
30962 23:03:05.406344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5680 RESULT=skip
30964 23:03:05.406799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5680 RESULT=skip>
30965 23:03:05.437995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5680 RESULT=skip>
30966 23:03:05.438425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5680 RESULT=skip
30968 23:03:05.469426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5696 RESULT=pass>
30969 23:03:05.469853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5696 RESULT=pass
30971 23:03:05.501173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5696 RESULT=skip
30973 23:03:05.501623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5696 RESULT=skip>
30974 23:03:05.532997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5696 RESULT=skip
30976 23:03:05.533457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5696 RESULT=skip>
30977 23:03:05.564678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5712 RESULT=pass>
30978 23:03:05.565104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5712 RESULT=pass
30980 23:03:05.596359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5712 RESULT=skip
30982 23:03:05.596819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5712 RESULT=skip>
30983 23:03:05.627923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5712 RESULT=skip>
30984 23:03:05.628367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5712 RESULT=skip
30986 23:03:05.662286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5728 RESULT=pass>
30987 23:03:05.662724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5728 RESULT=pass
30989 23:03:05.696123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5728 RESULT=skip>
30990 23:03:05.696597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5728 RESULT=skip
30992 23:03:05.732115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5728 RESULT=skip>
30993 23:03:05.732589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5728 RESULT=skip
30995 23:03:05.778959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5744 RESULT=pass
30997 23:03:05.779513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5744 RESULT=pass>
30998 23:03:05.817911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5744 RESULT=skip>
30999 23:03:05.818398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5744 RESULT=skip
31001 23:03:05.850955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5744 RESULT=skip>
31002 23:03:05.851414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5744 RESULT=skip
31004 23:03:05.882230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5760 RESULT=pass>
31005 23:03:05.882660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5760 RESULT=pass
31007 23:03:05.938675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5760 RESULT=skip
31009 23:03:05.939135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5760 RESULT=skip>
31010 23:03:05.976752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5760 RESULT=skip>
31011 23:03:05.977100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5760 RESULT=skip
31013 23:03:06.014744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5776 RESULT=pass
31015 23:03:06.015445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5776 RESULT=pass>
31016 23:03:06.049591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5776 RESULT=skip>
31017 23:03:06.050078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5776 RESULT=skip
31019 23:03:06.081946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5776 RESULT=skip
31021 23:03:06.082493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5776 RESULT=skip>
31022 23:03:06.114235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5792 RESULT=pass
31024 23:03:06.114781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5792 RESULT=pass>
31025 23:03:06.146242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5792 RESULT=skip>
31026 23:03:06.146710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5792 RESULT=skip
31028 23:03:06.178912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5792 RESULT=skip
31030 23:03:06.179463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5792 RESULT=skip>
31031 23:03:06.211290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5808 RESULT=pass>
31032 23:03:06.211767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5808 RESULT=pass
31034 23:03:06.244469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5808 RESULT=skip>
31035 23:03:06.244895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5808 RESULT=skip
31037 23:03:06.277430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5808 RESULT=skip>
31038 23:03:06.277885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5808 RESULT=skip
31040 23:03:06.309562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5824 RESULT=pass>
31041 23:03:06.310037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5824 RESULT=pass
31043 23:03:06.317510 <47>[ 309.167946] systemd-journald[109]: Sent WATCHDOG=1 notification.
31044 23:03:06.347397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5824 RESULT=skip
31046 23:03:06.347846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5824 RESULT=skip>
31047 23:03:06.379047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5824 RESULT=skip>
31048 23:03:06.379469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5824 RESULT=skip
31050 23:03:06.411539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5840 RESULT=pass
31052 23:03:06.411988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5840 RESULT=pass>
31053 23:03:06.443294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5840 RESULT=skip
31055 23:03:06.443870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5840 RESULT=skip>
31056 23:03:06.474163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5840 RESULT=skip
31058 23:03:06.474721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5840 RESULT=skip>
31059 23:03:06.505040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5856 RESULT=pass>
31060 23:03:06.505488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5856 RESULT=pass
31062 23:03:06.536275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5856 RESULT=skip
31064 23:03:06.536806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5856 RESULT=skip>
31065 23:03:06.567979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5856 RESULT=skip
31067 23:03:06.568559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5856 RESULT=skip>
31068 23:03:06.600247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5872 RESULT=pass>
31069 23:03:06.600724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5872 RESULT=pass
31071 23:03:06.632665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5872 RESULT=skip>
31072 23:03:06.633134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5872 RESULT=skip
31074 23:03:06.664369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5872 RESULT=skip>
31075 23:03:06.664844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5872 RESULT=skip
31077 23:03:06.695877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5888 RESULT=pass>
31078 23:03:06.696327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5888 RESULT=pass
31080 23:03:06.728327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5888 RESULT=skip
31082 23:03:06.728876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5888 RESULT=skip>
31083 23:03:06.762296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5888 RESULT=skip
31085 23:03:06.762962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5888 RESULT=skip>
31086 23:03:06.798066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5904 RESULT=pass>
31087 23:03:06.798539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5904 RESULT=pass
31089 23:03:06.837552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5904 RESULT=skip
31091 23:03:06.838131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5904 RESULT=skip>
31092 23:03:06.872114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5904 RESULT=skip>
31093 23:03:06.872571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5904 RESULT=skip
31095 23:03:06.904402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5920 RESULT=pass>
31096 23:03:06.904870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5920 RESULT=pass
31098 23:03:06.936588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5920 RESULT=skip>
31099 23:03:06.937098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5920 RESULT=skip
31101 23:03:06.968799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5920 RESULT=skip>
31102 23:03:06.969254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5920 RESULT=skip
31104 23:03:07.000623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5936 RESULT=pass>
31105 23:03:07.001088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5936 RESULT=pass
31107 23:03:07.032500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5936 RESULT=skip
31109 23:03:07.033033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5936 RESULT=skip>
31110 23:03:07.063886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5936 RESULT=skip
31112 23:03:07.064426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5936 RESULT=skip>
31113 23:03:07.096112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5952 RESULT=pass>
31114 23:03:07.096577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5952 RESULT=pass
31116 23:03:07.128011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5952 RESULT=skip
31118 23:03:07.128548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5952 RESULT=skip>
31119 23:03:07.159459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5952 RESULT=skip
31121 23:03:07.159994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5952 RESULT=skip>
31122 23:03:07.190952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5968 RESULT=pass
31124 23:03:07.191492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5968 RESULT=pass>
31125 23:03:07.221765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5968 RESULT=skip
31127 23:03:07.222293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5968 RESULT=skip>
31128 23:03:07.252928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5968 RESULT=skip>
31129 23:03:07.253379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5968 RESULT=skip
31131 23:03:07.284730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5984 RESULT=pass>
31132 23:03:07.285171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5984 RESULT=pass
31134 23:03:07.316497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5984 RESULT=skip
31136 23:03:07.317024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5984 RESULT=skip>
31137 23:03:07.347749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5984 RESULT=skip
31139 23:03:07.348271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5984 RESULT=skip>
31140 23:03:07.378576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6000 RESULT=pass
31142 23:03:07.379126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6000 RESULT=pass>
31143 23:03:07.409845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6000 RESULT=skip
31145 23:03:07.410424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6000 RESULT=skip>
31146 23:03:07.441162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6000 RESULT=skip>
31147 23:03:07.441637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6000 RESULT=skip
31149 23:03:07.472530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6016 RESULT=pass>
31150 23:03:07.472970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6016 RESULT=pass
31152 23:03:07.503905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6016 RESULT=skip>
31153 23:03:07.504354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6016 RESULT=skip
31155 23:03:07.535259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6016 RESULT=skip>
31156 23:03:07.535699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6016 RESULT=skip
31158 23:03:07.566532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6032 RESULT=pass
31160 23:03:07.567063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6032 RESULT=pass>
31161 23:03:07.598093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6032 RESULT=skip
31163 23:03:07.598627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6032 RESULT=skip>
31164 23:03:07.629843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6032 RESULT=skip
31166 23:03:07.630382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6032 RESULT=skip>
31167 23:03:07.662014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6048 RESULT=pass
31169 23:03:07.662539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6048 RESULT=pass>
31170 23:03:07.693808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6048 RESULT=skip>
31171 23:03:07.694251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6048 RESULT=skip
31173 23:03:07.725981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6048 RESULT=skip
31175 23:03:07.726525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6048 RESULT=skip>
31176 23:03:07.757713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6064 RESULT=pass>
31177 23:03:07.758164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6064 RESULT=pass
31179 23:03:07.790019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6064 RESULT=skip
31181 23:03:07.790587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6064 RESULT=skip>
31182 23:03:07.822815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6064 RESULT=skip
31184 23:03:07.823385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6064 RESULT=skip>
31185 23:03:07.855980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6080 RESULT=pass
31187 23:03:07.856546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6080 RESULT=pass>
31188 23:03:07.888158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6080 RESULT=skip
31190 23:03:07.888746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6080 RESULT=skip>
31191 23:03:07.920474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6080 RESULT=skip
31193 23:03:07.921014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6080 RESULT=skip>
31194 23:03:07.952096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6096 RESULT=pass
31196 23:03:07.952629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6096 RESULT=pass>
31197 23:03:07.984231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6096 RESULT=skip>
31198 23:03:07.984666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6096 RESULT=skip
31200 23:03:08.016124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6096 RESULT=skip>
31201 23:03:08.016589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6096 RESULT=skip
31203 23:03:08.048250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6112 RESULT=pass
31205 23:03:08.048783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6112 RESULT=pass>
31206 23:03:08.080203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6112 RESULT=skip
31208 23:03:08.080714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6112 RESULT=skip>
31209 23:03:08.112880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6112 RESULT=skip>
31210 23:03:08.113346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6112 RESULT=skip
31212 23:03:08.144863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6128 RESULT=pass>
31213 23:03:08.145312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6128 RESULT=pass
31215 23:03:08.177230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6128 RESULT=skip>
31216 23:03:08.177700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6128 RESULT=skip
31218 23:03:08.209060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6128 RESULT=skip>
31219 23:03:08.209531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6128 RESULT=skip
31221 23:03:08.240582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6144 RESULT=pass>
31222 23:03:08.241051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6144 RESULT=pass
31224 23:03:08.273079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6144 RESULT=skip
31226 23:03:08.273642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6144 RESULT=skip>
31227 23:03:08.308236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6144 RESULT=skip>
31228 23:03:08.308699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6144 RESULT=skip
31230 23:03:08.343695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6160 RESULT=pass>
31231 23:03:08.344166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6160 RESULT=pass
31233 23:03:08.375254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6160 RESULT=skip
31235 23:03:08.375798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6160 RESULT=skip>
31236 23:03:08.406451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6160 RESULT=skip
31238 23:03:08.406917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6160 RESULT=skip>
31239 23:03:08.437926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6176 RESULT=pass>
31240 23:03:08.438396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6176 RESULT=pass
31242 23:03:08.469944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6176 RESULT=skip>
31243 23:03:08.470403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6176 RESULT=skip
31245 23:03:08.501309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6176 RESULT=skip
31247 23:03:08.501869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6176 RESULT=skip>
31248 23:03:08.532659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6192 RESULT=pass
31250 23:03:08.533223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6192 RESULT=pass>
31251 23:03:08.563785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6192 RESULT=skip>
31252 23:03:08.564261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6192 RESULT=skip
31254 23:03:08.595427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6192 RESULT=skip
31256 23:03:08.596042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6192 RESULT=skip>
31257 23:03:08.626891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6208 RESULT=pass
31259 23:03:08.627472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6208 RESULT=pass>
31260 23:03:08.658403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6208 RESULT=skip
31262 23:03:08.658950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6208 RESULT=skip>
31263 23:03:08.689488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6208 RESULT=skip>
31264 23:03:08.689963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6208 RESULT=skip
31266 23:03:08.720640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6224 RESULT=pass>
31267 23:03:08.721103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6224 RESULT=pass
31269 23:03:08.752312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6224 RESULT=skip>
31270 23:03:08.752775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6224 RESULT=skip
31272 23:03:08.783752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6224 RESULT=skip>
31273 23:03:08.784207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6224 RESULT=skip
31275 23:03:08.815338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6240 RESULT=pass>
31276 23:03:08.815787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6240 RESULT=pass
31278 23:03:08.847320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6240 RESULT=skip
31280 23:03:08.847857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6240 RESULT=skip>
31281 23:03:08.879876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6240 RESULT=skip
31283 23:03:08.880433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6240 RESULT=skip>
31284 23:03:08.911359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6256 RESULT=pass>
31285 23:03:08.911854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6256 RESULT=pass
31287 23:03:08.942983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6256 RESULT=skip
31289 23:03:08.943552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6256 RESULT=skip>
31290 23:03:08.974264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6256 RESULT=skip>
31291 23:03:08.974728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6256 RESULT=skip
31293 23:03:09.005369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6272 RESULT=pass>
31294 23:03:09.005797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6272 RESULT=pass
31296 23:03:09.036511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6272 RESULT=skip>
31297 23:03:09.036984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6272 RESULT=skip
31299 23:03:09.068010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6272 RESULT=skip>
31300 23:03:09.068493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6272 RESULT=skip
31302 23:03:09.099502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6288 RESULT=pass>
31303 23:03:09.099971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6288 RESULT=pass
31305 23:03:09.132318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6288 RESULT=skip
31307 23:03:09.132950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6288 RESULT=skip>
31308 23:03:09.164273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6288 RESULT=skip>
31309 23:03:09.164746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6288 RESULT=skip
31311 23:03:09.196499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6304 RESULT=pass>
31312 23:03:09.196922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6304 RESULT=pass
31314 23:03:09.229096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6304 RESULT=skip
31316 23:03:09.229762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6304 RESULT=skip>
31317 23:03:09.260904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6304 RESULT=skip
31319 23:03:09.261355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6304 RESULT=skip>
31320 23:03:09.294255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6320 RESULT=pass>
31321 23:03:09.294697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6320 RESULT=pass
31323 23:03:09.327161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6320 RESULT=skip>
31324 23:03:09.327634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6320 RESULT=skip
31326 23:03:09.359705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6320 RESULT=skip
31328 23:03:09.360154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6320 RESULT=skip>
31329 23:03:09.391619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6336 RESULT=pass
31331 23:03:09.392069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6336 RESULT=pass>
31332 23:03:09.423432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6336 RESULT=skip>
31333 23:03:09.423889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6336 RESULT=skip
31335 23:03:09.455829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6336 RESULT=skip>
31336 23:03:09.456286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6336 RESULT=skip
31338 23:03:09.488066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6352 RESULT=pass>
31339 23:03:09.488515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6352 RESULT=pass
31341 23:03:09.519555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6352 RESULT=skip>
31342 23:03:09.519984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6352 RESULT=skip
31344 23:03:09.551504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6352 RESULT=skip
31346 23:03:09.552092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6352 RESULT=skip>
31347 23:03:09.582335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6368 RESULT=pass>
31348 23:03:09.582803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6368 RESULT=pass
31350 23:03:09.613623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6368 RESULT=skip>
31351 23:03:09.614088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6368 RESULT=skip
31353 23:03:09.644625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6368 RESULT=skip>
31354 23:03:09.645087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6368 RESULT=skip
31356 23:03:09.675708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6384 RESULT=pass>
31357 23:03:09.676164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6384 RESULT=pass
31359 23:03:09.707209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6384 RESULT=skip>
31360 23:03:09.707643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6384 RESULT=skip
31362 23:03:09.737967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6384 RESULT=skip>
31363 23:03:09.738420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6384 RESULT=skip
31365 23:03:09.768537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6400 RESULT=pass
31367 23:03:09.769145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6400 RESULT=pass>
31368 23:03:09.800003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6400 RESULT=skip>
31369 23:03:09.800445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6400 RESULT=skip
31371 23:03:09.831608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6400 RESULT=skip>
31372 23:03:09.831987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6400 RESULT=skip
31374 23:03:09.862601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6416 RESULT=pass
31376 23:03:09.863118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6416 RESULT=pass>
31377 23:03:09.894597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6416 RESULT=skip>
31378 23:03:09.895018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6416 RESULT=skip
31380 23:03:09.925321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6416 RESULT=skip>
31381 23:03:09.925787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6416 RESULT=skip
31383 23:03:09.956855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6432 RESULT=pass
31385 23:03:09.957461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6432 RESULT=pass>
31386 23:03:09.988129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6432 RESULT=skip>
31387 23:03:09.988582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6432 RESULT=skip
31389 23:03:10.019937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6432 RESULT=skip>
31390 23:03:10.020368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6432 RESULT=skip
31392 23:03:10.051697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6448 RESULT=pass>
31393 23:03:10.052141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6448 RESULT=pass
31395 23:03:10.083510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6448 RESULT=skip>
31396 23:03:10.083952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6448 RESULT=skip
31398 23:03:10.115712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6448 RESULT=skip
31400 23:03:10.116325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6448 RESULT=skip>
31401 23:03:10.148366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6464 RESULT=pass>
31402 23:03:10.148818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6464 RESULT=pass
31404 23:03:10.180193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6464 RESULT=skip>
31405 23:03:10.180626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6464 RESULT=skip
31407 23:03:10.212163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6464 RESULT=skip>
31408 23:03:10.212595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6464 RESULT=skip
31410 23:03:10.243831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6480 RESULT=pass
31412 23:03:10.244355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6480 RESULT=pass>
31413 23:03:10.275021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6480 RESULT=skip
31415 23:03:10.275538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6480 RESULT=skip>
31416 23:03:10.306353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6480 RESULT=skip
31418 23:03:10.306876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6480 RESULT=skip>
31419 23:03:10.338565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6496 RESULT=pass>
31420 23:03:10.338997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6496 RESULT=pass
31422 23:03:10.370173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6496 RESULT=skip
31424 23:03:10.370853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6496 RESULT=skip>
31425 23:03:10.401913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6496 RESULT=skip>
31426 23:03:10.402300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6496 RESULT=skip
31428 23:03:10.433083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6512 RESULT=pass>
31429 23:03:10.433478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6512 RESULT=pass
31431 23:03:10.464389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6512 RESULT=skip>
31432 23:03:10.464769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6512 RESULT=skip
31434 23:03:10.496916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6512 RESULT=skip
31436 23:03:10.497442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6512 RESULT=skip>
31437 23:03:10.531839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6528 RESULT=pass
31439 23:03:10.532251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6528 RESULT=pass>
31440 23:03:10.566411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6528 RESULT=skip
31442 23:03:10.566839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6528 RESULT=skip>
31443 23:03:10.600494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6528 RESULT=skip
31445 23:03:10.601000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6528 RESULT=skip>
31446 23:03:10.632287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6544 RESULT=pass>
31447 23:03:10.632730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6544 RESULT=pass
31449 23:03:10.665796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6544 RESULT=skip>
31450 23:03:10.666242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6544 RESULT=skip
31452 23:03:10.702271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6544 RESULT=skip
31454 23:03:10.702832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6544 RESULT=skip>
31455 23:03:10.739703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6560 RESULT=pass
31457 23:03:10.740246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6560 RESULT=pass>
31458 23:03:10.773916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6560 RESULT=skip
31460 23:03:10.774462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6560 RESULT=skip>
31461 23:03:10.808345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6560 RESULT=skip
31463 23:03:10.808809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6560 RESULT=skip>
31464 23:03:10.843465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6576 RESULT=pass
31466 23:03:10.843880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6576 RESULT=pass>
31467 23:03:10.875741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6576 RESULT=skip
31469 23:03:10.876090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6576 RESULT=skip>
31470 23:03:10.908499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6576 RESULT=skip>
31471 23:03:10.908969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6576 RESULT=skip
31473 23:03:10.941774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6592 RESULT=pass>
31474 23:03:10.942245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6592 RESULT=pass
31476 23:03:10.973447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6592 RESULT=skip>
31477 23:03:10.973930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6592 RESULT=skip
31479 23:03:11.005233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6592 RESULT=skip>
31480 23:03:11.005685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6592 RESULT=skip
31482 23:03:11.060756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6608 RESULT=pass
31484 23:03:11.061222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6608 RESULT=pass>
31485 23:03:11.092172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6608 RESULT=skip>
31486 23:03:11.092635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6608 RESULT=skip
31488 23:03:11.123963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6608 RESULT=skip>
31489 23:03:11.124422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6608 RESULT=skip
31491 23:03:11.155356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6624 RESULT=pass>
31492 23:03:11.155816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6624 RESULT=pass
31494 23:03:11.186462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6624 RESULT=skip>
31495 23:03:11.186908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6624 RESULT=skip
31497 23:03:11.218116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6624 RESULT=skip>
31498 23:03:11.218576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6624 RESULT=skip
31500 23:03:11.249892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6640 RESULT=pass>
31501 23:03:11.250342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6640 RESULT=pass
31503 23:03:11.281948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6640 RESULT=skip>
31504 23:03:11.282399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6640 RESULT=skip
31506 23:03:11.314244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6640 RESULT=skip
31508 23:03:11.314851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6640 RESULT=skip>
31509 23:03:11.346212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6656 RESULT=pass>
31510 23:03:11.346692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6656 RESULT=pass
31512 23:03:11.378018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6656 RESULT=skip>
31513 23:03:11.378468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6656 RESULT=skip
31515 23:03:11.410078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6656 RESULT=skip>
31516 23:03:11.410534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6656 RESULT=skip
31518 23:03:11.441910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6672 RESULT=pass>
31519 23:03:11.442355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6672 RESULT=pass
31521 23:03:11.473563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6672 RESULT=skip
31523 23:03:11.474120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6672 RESULT=skip>
31524 23:03:11.504617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6672 RESULT=skip>
31525 23:03:11.505057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6672 RESULT=skip
31527 23:03:11.535949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6688 RESULT=pass
31529 23:03:11.536477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6688 RESULT=pass>
31530 23:03:11.568187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6688 RESULT=skip
31532 23:03:11.568730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6688 RESULT=skip>
31533 23:03:11.599637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6688 RESULT=skip>
31534 23:03:11.600107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6688 RESULT=skip
31536 23:03:11.631092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6704 RESULT=pass>
31537 23:03:11.631561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6704 RESULT=pass
31539 23:03:11.663644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6704 RESULT=skip>
31540 23:03:11.664109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6704 RESULT=skip
31542 23:03:11.695665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6704 RESULT=skip>
31543 23:03:11.696126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6704 RESULT=skip
31545 23:03:11.727795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6720 RESULT=pass>
31546 23:03:11.728249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6720 RESULT=pass
31548 23:03:11.761377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6720 RESULT=skip>
31549 23:03:11.761869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6720 RESULT=skip
31551 23:03:11.795357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6720 RESULT=skip
31553 23:03:11.795933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6720 RESULT=skip>
31554 23:03:11.840599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6736 RESULT=pass>
31555 23:03:11.841063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6736 RESULT=pass
31557 23:03:11.875428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6736 RESULT=skip
31559 23:03:11.876025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6736 RESULT=skip>
31560 23:03:11.909244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6736 RESULT=skip>
31561 23:03:11.909660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6736 RESULT=skip
31563 23:03:11.942536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6752 RESULT=pass>
31564 23:03:11.942939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6752 RESULT=pass
31566 23:03:11.974670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6752 RESULT=skip
31568 23:03:11.975113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6752 RESULT=skip>
31569 23:03:12.007363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6752 RESULT=skip>
31570 23:03:12.007775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6752 RESULT=skip
31572 23:03:12.039417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6768 RESULT=pass>
31573 23:03:12.039852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6768 RESULT=pass
31575 23:03:12.071349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6768 RESULT=skip
31577 23:03:12.072037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6768 RESULT=skip>
31578 23:03:12.102617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6768 RESULT=skip
31580 23:03:12.103171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6768 RESULT=skip>
31581 23:03:12.133949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6784 RESULT=pass
31583 23:03:12.134479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6784 RESULT=pass>
31584 23:03:12.165527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6784 RESULT=skip
31586 23:03:12.166100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6784 RESULT=skip>
31587 23:03:12.197261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6784 RESULT=skip
31589 23:03:12.197804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6784 RESULT=skip>
31590 23:03:12.231075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6800 RESULT=pass>
31591 23:03:12.231497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6800 RESULT=pass
31593 23:03:12.263675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6800 RESULT=skip
31595 23:03:12.264131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6800 RESULT=skip>
31596 23:03:12.295659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6800 RESULT=skip
31598 23:03:12.296123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6800 RESULT=skip>
31599 23:03:12.330271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6816 RESULT=pass>
31600 23:03:12.330676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6816 RESULT=pass
31602 23:03:12.378125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6816 RESULT=skip>
31603 23:03:12.378600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6816 RESULT=skip
31605 23:03:12.411964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6816 RESULT=skip>
31606 23:03:12.412441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6816 RESULT=skip
31608 23:03:12.445283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6832 RESULT=pass>
31609 23:03:12.445771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6832 RESULT=pass
31611 23:03:12.480245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6832 RESULT=skip
31613 23:03:12.480809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6832 RESULT=skip>
31614 23:03:12.514846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6832 RESULT=skip
31616 23:03:12.515412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6832 RESULT=skip>
31617 23:03:12.549129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6848 RESULT=pass>
31618 23:03:12.549614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6848 RESULT=pass
31620 23:03:12.583871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6848 RESULT=skip
31622 23:03:12.584324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6848 RESULT=skip>
31623 23:03:12.618420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6848 RESULT=skip>
31624 23:03:12.618865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6848 RESULT=skip
31626 23:03:12.653720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6864 RESULT=pass
31628 23:03:12.654327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6864 RESULT=pass>
31629 23:03:12.687437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6864 RESULT=skip>
31630 23:03:12.687789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6864 RESULT=skip
31632 23:03:12.720023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6864 RESULT=skip>
31633 23:03:12.720388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6864 RESULT=skip
31635 23:03:12.752319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6880 RESULT=pass>
31636 23:03:12.752787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6880 RESULT=pass
31638 23:03:12.784740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6880 RESULT=skip>
31639 23:03:12.785189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6880 RESULT=skip
31641 23:03:12.816740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6880 RESULT=skip
31643 23:03:12.817324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6880 RESULT=skip>
31644 23:03:12.850071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6896 RESULT=pass>
31645 23:03:12.850538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6896 RESULT=pass
31647 23:03:12.882164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6896 RESULT=skip>
31648 23:03:12.882600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6896 RESULT=skip
31650 23:03:12.914203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6896 RESULT=skip
31652 23:03:12.914741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6896 RESULT=skip>
31653 23:03:12.945970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6912 RESULT=pass>
31654 23:03:12.946404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6912 RESULT=pass
31656 23:03:12.979255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6912 RESULT=skip>
31657 23:03:12.979731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6912 RESULT=skip
31659 23:03:13.011247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6912 RESULT=skip
31661 23:03:13.011837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6912 RESULT=skip>
31662 23:03:13.042690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6928 RESULT=pass
31664 23:03:13.043236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6928 RESULT=pass>
31665 23:03:13.075673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6928 RESULT=skip
31667 23:03:13.076211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6928 RESULT=skip>
31668 23:03:13.107954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6928 RESULT=skip
31670 23:03:13.108502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6928 RESULT=skip>
31671 23:03:13.140241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6944 RESULT=pass
31673 23:03:13.140694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6944 RESULT=pass>
31674 23:03:13.172274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6944 RESULT=skip>
31675 23:03:13.172682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6944 RESULT=skip
31677 23:03:13.204644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6944 RESULT=skip>
31678 23:03:13.205082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6944 RESULT=skip
31680 23:03:13.237298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6960 RESULT=pass>
31681 23:03:13.237750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6960 RESULT=pass
31683 23:03:13.269905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6960 RESULT=skip>
31684 23:03:13.270372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6960 RESULT=skip
31686 23:03:13.302200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6960 RESULT=skip>
31687 23:03:13.302650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6960 RESULT=skip
31689 23:03:13.335331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6976 RESULT=pass
31691 23:03:13.335876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6976 RESULT=pass>
31692 23:03:13.367469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6976 RESULT=skip
31694 23:03:13.367925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6976 RESULT=skip>
31695 23:03:13.399599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6976 RESULT=skip>
31696 23:03:13.400052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6976 RESULT=skip
31698 23:03:13.433110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6992 RESULT=pass>
31699 23:03:13.433600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6992 RESULT=pass
31701 23:03:13.466608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6992 RESULT=skip>
31702 23:03:13.467073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6992 RESULT=skip
31704 23:03:13.499567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6992 RESULT=skip
31706 23:03:13.500178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6992 RESULT=skip>
31707 23:03:13.532549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7008 RESULT=pass>
31708 23:03:13.533028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7008 RESULT=pass
31710 23:03:13.564983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7008 RESULT=skip>
31711 23:03:13.565455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7008 RESULT=skip
31713 23:03:13.597885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7008 RESULT=skip>
31714 23:03:13.598309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7008 RESULT=skip
31716 23:03:13.629749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7024 RESULT=pass>
31717 23:03:13.630225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7024 RESULT=pass
31719 23:03:13.661720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7024 RESULT=skip>
31720 23:03:13.662169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7024 RESULT=skip
31722 23:03:13.693897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7024 RESULT=skip>
31723 23:03:13.694353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7024 RESULT=skip
31725 23:03:13.725835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7040 RESULT=pass
31727 23:03:13.726367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7040 RESULT=pass>
31728 23:03:13.757940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7040 RESULT=skip
31730 23:03:13.758484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7040 RESULT=skip>
31731 23:03:13.791866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7040 RESULT=skip>
31732 23:03:13.792299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7040 RESULT=skip
31734 23:03:13.824069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7056 RESULT=pass>
31735 23:03:13.824487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7056 RESULT=pass
31737 23:03:13.855886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7056 RESULT=skip>
31738 23:03:13.856317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7056 RESULT=skip
31740 23:03:13.887587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7056 RESULT=skip>
31741 23:03:13.888004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7056 RESULT=skip
31743 23:03:13.918468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7072 RESULT=pass>
31744 23:03:13.918906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7072 RESULT=pass
31746 23:03:13.950301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7072 RESULT=skip
31748 23:03:13.950818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7072 RESULT=skip>
31749 23:03:13.981710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7072 RESULT=skip>
31750 23:03:13.982122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7072 RESULT=skip
31752 23:03:14.012629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7088 RESULT=pass
31754 23:03:14.013075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7088 RESULT=pass>
31755 23:03:14.044154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7088 RESULT=skip
31757 23:03:14.044584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7088 RESULT=skip>
31758 23:03:14.076508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7088 RESULT=skip>
31759 23:03:14.076965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7088 RESULT=skip
31761 23:03:14.108415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7104 RESULT=pass
31763 23:03:14.108969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7104 RESULT=pass>
31764 23:03:14.139817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7104 RESULT=skip>
31765 23:03:14.140278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7104 RESULT=skip
31767 23:03:14.171628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7104 RESULT=skip
31769 23:03:14.172230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7104 RESULT=skip>
31770 23:03:14.202193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7120 RESULT=pass
31772 23:03:14.202780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7120 RESULT=pass>
31773 23:03:14.233363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7120 RESULT=skip
31775 23:03:14.233970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7120 RESULT=skip>
31776 23:03:14.265154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7120 RESULT=skip
31778 23:03:14.265677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7120 RESULT=skip>
31779 23:03:14.297066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7136 RESULT=pass>
31780 23:03:14.297528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7136 RESULT=pass
31782 23:03:14.329369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7136 RESULT=skip
31784 23:03:14.329986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7136 RESULT=skip>
31785 23:03:14.362159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7136 RESULT=skip>
31786 23:03:14.362626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7136 RESULT=skip
31788 23:03:14.396079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7152 RESULT=pass
31790 23:03:14.396679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7152 RESULT=pass>
31791 23:03:14.427747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7152 RESULT=skip>
31792 23:03:14.428133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7152 RESULT=skip
31794 23:03:14.459433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7152 RESULT=skip>
31795 23:03:14.459904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7152 RESULT=skip
31797 23:03:14.492111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7168 RESULT=pass
31799 23:03:14.492542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7168 RESULT=pass>
31800 23:03:14.524300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7168 RESULT=skip>
31801 23:03:14.524694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7168 RESULT=skip
31803 23:03:14.557167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7168 RESULT=skip
31805 23:03:14.557720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7168 RESULT=skip>
31806 23:03:14.589217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7184 RESULT=pass
31808 23:03:14.589757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7184 RESULT=pass>
31809 23:03:14.620867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7184 RESULT=skip>
31810 23:03:14.621332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7184 RESULT=skip
31812 23:03:14.652773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7184 RESULT=skip>
31813 23:03:14.653212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7184 RESULT=skip
31815 23:03:14.683975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7200 RESULT=pass
31817 23:03:14.684499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7200 RESULT=pass>
31818 23:03:14.715536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7200 RESULT=skip>
31819 23:03:14.715972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7200 RESULT=skip
31821 23:03:14.746921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7200 RESULT=skip
31823 23:03:14.747540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7200 RESULT=skip>
31824 23:03:14.778087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7216 RESULT=pass>
31825 23:03:14.778539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7216 RESULT=pass
31827 23:03:14.809838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7216 RESULT=skip>
31828 23:03:14.810270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7216 RESULT=skip
31830 23:03:14.841225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7216 RESULT=skip>
31831 23:03:14.841672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7216 RESULT=skip
31833 23:03:14.873709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7232 RESULT=pass>
31834 23:03:14.874152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7232 RESULT=pass
31836 23:03:14.905607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7232 RESULT=skip
31838 23:03:14.906056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7232 RESULT=skip>
31839 23:03:14.937179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7232 RESULT=skip>
31840 23:03:14.937609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7232 RESULT=skip
31842 23:03:14.968894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7248 RESULT=pass
31844 23:03:14.969417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7248 RESULT=pass>
31845 23:03:15.001147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7248 RESULT=skip
31847 23:03:15.001760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7248 RESULT=skip>
31848 23:03:15.033561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7248 RESULT=skip>
31849 23:03:15.034019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7248 RESULT=skip
31851 23:03:15.065225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7264 RESULT=pass>
31852 23:03:15.065662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7264 RESULT=pass
31854 23:03:15.097208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7264 RESULT=skip>
31855 23:03:15.097651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7264 RESULT=skip
31857 23:03:15.129712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7264 RESULT=skip>
31858 23:03:15.130164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7264 RESULT=skip
31860 23:03:15.161598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7280 RESULT=pass>
31861 23:03:15.162074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7280 RESULT=pass
31863 23:03:15.193918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7280 RESULT=skip
31865 23:03:15.194457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7280 RESULT=skip>
31866 23:03:15.226224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7280 RESULT=skip>
31867 23:03:15.226710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7280 RESULT=skip
31869 23:03:15.258374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7296 RESULT=pass>
31870 23:03:15.258845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7296 RESULT=pass
31872 23:03:15.291017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7296 RESULT=skip>
31873 23:03:15.291490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7296 RESULT=skip
31875 23:03:15.323546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7296 RESULT=skip>
31876 23:03:15.324040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7296 RESULT=skip
31878 23:03:15.355611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7312 RESULT=pass>
31879 23:03:15.356084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7312 RESULT=pass
31881 23:03:15.388567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7312 RESULT=skip
31883 23:03:15.389132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7312 RESULT=skip>
31884 23:03:15.421040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7312 RESULT=skip
31886 23:03:15.421592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7312 RESULT=skip>
31887 23:03:15.452936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7328 RESULT=pass>
31888 23:03:15.453415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7328 RESULT=pass
31890 23:03:15.484774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7328 RESULT=skip>
31891 23:03:15.485239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7328 RESULT=skip
31893 23:03:15.517148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7328 RESULT=skip>
31894 23:03:15.517627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7328 RESULT=skip
31896 23:03:15.549365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7344 RESULT=pass
31898 23:03:15.549915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7344 RESULT=pass>
31899 23:03:15.584827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7344 RESULT=skip>
31900 23:03:15.585286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7344 RESULT=skip
31902 23:03:15.617614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7344 RESULT=skip>
31903 23:03:15.618098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7344 RESULT=skip
31905 23:03:15.649054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7360 RESULT=pass
31907 23:03:15.649591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7360 RESULT=pass>
31908 23:03:15.680375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7360 RESULT=skip>
31909 23:03:15.680857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7360 RESULT=skip
31911 23:03:15.712021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7360 RESULT=skip
31913 23:03:15.712575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7360 RESULT=skip>
31914 23:03:15.744455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7376 RESULT=pass
31916 23:03:15.745085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7376 RESULT=pass>
31917 23:03:15.776373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7376 RESULT=skip>
31918 23:03:15.776775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7376 RESULT=skip
31920 23:03:15.809020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7376 RESULT=skip>
31921 23:03:15.809454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7376 RESULT=skip
31923 23:03:15.841443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7392 RESULT=pass>
31924 23:03:15.841901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7392 RESULT=pass
31926 23:03:15.873819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7392 RESULT=skip>
31927 23:03:15.874270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7392 RESULT=skip
31929 23:03:15.906051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7392 RESULT=skip>
31930 23:03:15.906493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7392 RESULT=skip
31932 23:03:15.938886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7408 RESULT=pass
31934 23:03:15.939403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7408 RESULT=pass>
31935 23:03:15.971807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7408 RESULT=skip>
31936 23:03:15.972246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7408 RESULT=skip
31938 23:03:16.004267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7408 RESULT=skip>
31939 23:03:16.004716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7408 RESULT=skip
31941 23:03:16.036413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7424 RESULT=pass
31943 23:03:16.036951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7424 RESULT=pass>
31944 23:03:16.068587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7424 RESULT=skip
31946 23:03:16.069143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7424 RESULT=skip>
31947 23:03:16.100832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7424 RESULT=skip>
31948 23:03:16.101271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7424 RESULT=skip
31950 23:03:16.133199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7440 RESULT=pass>
31951 23:03:16.133680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7440 RESULT=pass
31953 23:03:16.187851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7440 RESULT=skip>
31954 23:03:16.188316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7440 RESULT=skip
31956 23:03:16.220392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7440 RESULT=skip>
31957 23:03:16.220811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7440 RESULT=skip
31959 23:03:16.252845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7456 RESULT=pass>
31960 23:03:16.253302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7456 RESULT=pass
31962 23:03:16.285686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7456 RESULT=skip
31964 23:03:16.286208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7456 RESULT=skip>
31965 23:03:16.318240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7456 RESULT=skip>
31966 23:03:16.318711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7456 RESULT=skip
31968 23:03:16.350433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7472 RESULT=pass>
31969 23:03:16.350893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7472 RESULT=pass
31971 23:03:16.382680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7472 RESULT=skip
31973 23:03:16.383207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7472 RESULT=skip>
31974 23:03:16.415390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7472 RESULT=skip>
31975 23:03:16.415831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7472 RESULT=skip
31977 23:03:16.448139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7488 RESULT=pass>
31978 23:03:16.448603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7488 RESULT=pass
31980 23:03:16.480644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7488 RESULT=skip
31982 23:03:16.481167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7488 RESULT=skip>
31983 23:03:16.512918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7488 RESULT=skip>
31984 23:03:16.513372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7488 RESULT=skip
31986 23:03:16.545073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7504 RESULT=pass>
31987 23:03:16.545534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7504 RESULT=pass
31989 23:03:16.577968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7504 RESULT=skip
31991 23:03:16.578581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7504 RESULT=skip>
31992 23:03:16.610035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7504 RESULT=skip>
31993 23:03:16.610477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7504 RESULT=skip
31995 23:03:16.642554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7520 RESULT=pass>
31996 23:03:16.643008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7520 RESULT=pass
31998 23:03:16.675545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7520 RESULT=skip>
31999 23:03:16.675959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7520 RESULT=skip
32001 23:03:16.708940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7520 RESULT=skip>
32002 23:03:16.709719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7520 RESULT=skip
32004 23:03:16.741916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7536 RESULT=pass>
32005 23:03:16.742387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7536 RESULT=pass
32007 23:03:16.775485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7536 RESULT=skip
32009 23:03:16.776240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7536 RESULT=skip>
32010 23:03:16.828526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7536 RESULT=skip>
32011 23:03:16.828999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7536 RESULT=skip
32013 23:03:16.883811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7552 RESULT=pass
32015 23:03:16.884475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7552 RESULT=pass>
32016 23:03:16.930277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7552 RESULT=skip>
32017 23:03:16.930658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7552 RESULT=skip
32019 23:03:16.964000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7552 RESULT=skip>
32020 23:03:16.964359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7552 RESULT=skip
32022 23:03:16.997215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7568 RESULT=pass>
32023 23:03:16.997560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7568 RESULT=pass
32025 23:03:17.029174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7568 RESULT=skip>
32026 23:03:17.029599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7568 RESULT=skip
32028 23:03:17.065595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7568 RESULT=skip
32030 23:03:17.065963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7568 RESULT=skip>
32031 23:03:17.098278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7584 RESULT=pass
32033 23:03:17.098947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7584 RESULT=pass>
32034 23:03:17.131377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7584 RESULT=skip>
32035 23:03:17.131889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7584 RESULT=skip
32037 23:03:17.164113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7584 RESULT=skip
32039 23:03:17.164757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7584 RESULT=skip>
32040 23:03:17.196562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7600 RESULT=pass
32042 23:03:17.197200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7600 RESULT=pass>
32043 23:03:17.229851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7600 RESULT=skip
32045 23:03:17.230487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7600 RESULT=skip>
32046 23:03:17.261176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7600 RESULT=skip
32048 23:03:17.261803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7600 RESULT=skip>
32049 23:03:17.293070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7616 RESULT=pass>
32050 23:03:17.293519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7616 RESULT=pass
32052 23:03:17.324390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7616 RESULT=skip>
32053 23:03:17.324835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7616 RESULT=skip
32055 23:03:17.355344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7616 RESULT=skip>
32056 23:03:17.355783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7616 RESULT=skip
32058 23:03:17.386275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7632 RESULT=pass>
32059 23:03:17.386724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7632 RESULT=pass
32061 23:03:17.417717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7632 RESULT=skip>
32062 23:03:17.418176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7632 RESULT=skip
32064 23:03:17.448790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7632 RESULT=skip
32066 23:03:17.449416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7632 RESULT=skip>
32067 23:03:17.479855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7648 RESULT=pass>
32068 23:03:17.480323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7648 RESULT=pass
32070 23:03:17.511429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7648 RESULT=skip>
32071 23:03:17.511846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7648 RESULT=skip
32073 23:03:17.543890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7648 RESULT=skip>
32074 23:03:17.544333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7648 RESULT=skip
32076 23:03:17.575538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7664 RESULT=pass
32078 23:03:17.575961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7664 RESULT=pass>
32079 23:03:17.607536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7664 RESULT=skip>
32080 23:03:17.607963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7664 RESULT=skip
32082 23:03:17.638989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7664 RESULT=skip
32084 23:03:17.639581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7664 RESULT=skip>
32085 23:03:17.669762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7680 RESULT=pass>
32086 23:03:17.670238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7680 RESULT=pass
32088 23:03:17.700885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7680 RESULT=skip>
32089 23:03:17.701356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7680 RESULT=skip
32091 23:03:17.732712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7680 RESULT=skip>
32092 23:03:17.733169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7680 RESULT=skip
32094 23:03:17.763986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7696 RESULT=pass
32096 23:03:17.764547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7696 RESULT=pass>
32097 23:03:17.797510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7696 RESULT=skip
32099 23:03:17.798070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7696 RESULT=skip>
32100 23:03:17.828915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7696 RESULT=skip>
32101 23:03:17.829378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7696 RESULT=skip
32103 23:03:17.860874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7712 RESULT=pass>
32104 23:03:17.861323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7712 RESULT=pass
32106 23:03:17.893137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7712 RESULT=skip
32108 23:03:17.893755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7712 RESULT=skip>
32109 23:03:17.928722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7712 RESULT=skip
32111 23:03:17.929284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7712 RESULT=skip>
32112 23:03:17.960676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7728 RESULT=pass>
32113 23:03:17.961132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7728 RESULT=pass
32115 23:03:17.992254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7728 RESULT=skip
32117 23:03:17.992787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7728 RESULT=skip>
32118 23:03:18.024093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7728 RESULT=skip>
32119 23:03:18.024549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7728 RESULT=skip
32121 23:03:18.055986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7744 RESULT=pass>
32122 23:03:18.056444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7744 RESULT=pass
32124 23:03:18.091522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7744 RESULT=skip
32126 23:03:18.091982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7744 RESULT=skip>
32127 23:03:18.124121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7744 RESULT=skip
32129 23:03:18.124889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7744 RESULT=skip>
32130 23:03:18.155934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7760 RESULT=pass>
32131 23:03:18.156375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7760 RESULT=pass
32133 23:03:18.187091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7760 RESULT=skip>
32134 23:03:18.187595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7760 RESULT=skip
32136 23:03:18.218879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7760 RESULT=skip
32138 23:03:18.219448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7760 RESULT=skip>
32139 23:03:18.250120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7776 RESULT=pass>
32140 23:03:18.250579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7776 RESULT=pass
32142 23:03:18.281836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7776 RESULT=skip>
32143 23:03:18.282293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7776 RESULT=skip
32145 23:03:18.314357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7776 RESULT=skip>
32146 23:03:18.314789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7776 RESULT=skip
32148 23:03:18.345699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7792 RESULT=pass>
32149 23:03:18.346219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7792 RESULT=pass
32151 23:03:18.377386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7792 RESULT=skip
32153 23:03:18.378007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7792 RESULT=skip>
32154 23:03:18.409380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7792 RESULT=skip>
32155 23:03:18.409820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7792 RESULT=skip
32157 23:03:18.444487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7808 RESULT=pass>
32158 23:03:18.444950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7808 RESULT=pass
32160 23:03:18.476867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7808 RESULT=skip
32162 23:03:18.477388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7808 RESULT=skip>
32163 23:03:18.508732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7808 RESULT=skip
32165 23:03:18.509241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7808 RESULT=skip>
32166 23:03:18.539896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7824 RESULT=pass>
32167 23:03:18.540341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7824 RESULT=pass
32169 23:03:18.571637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7824 RESULT=skip>
32170 23:03:18.572073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7824 RESULT=skip
32172 23:03:18.603965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7824 RESULT=skip
32174 23:03:18.604485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7824 RESULT=skip>
32175 23:03:18.636451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7840 RESULT=pass
32177 23:03:18.636968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7840 RESULT=pass>
32178 23:03:18.668285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7840 RESULT=skip
32180 23:03:18.668800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7840 RESULT=skip>
32181 23:03:18.699951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7840 RESULT=skip>
32182 23:03:18.700384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7840 RESULT=skip
32184 23:03:18.731509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7856 RESULT=pass>
32185 23:03:18.731965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7856 RESULT=pass
32187 23:03:18.764995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7856 RESULT=skip
32189 23:03:18.765545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7856 RESULT=skip>
32190 23:03:18.797123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7856 RESULT=skip
32192 23:03:18.797576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7856 RESULT=skip>
32193 23:03:18.828987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7872 RESULT=pass>
32194 23:03:18.829451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7872 RESULT=pass
32196 23:03:18.861890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7872 RESULT=skip>
32197 23:03:18.862337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7872 RESULT=skip
32199 23:03:18.894058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7872 RESULT=skip
32201 23:03:18.894511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7872 RESULT=skip>
32202 23:03:18.926798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7888 RESULT=pass
32204 23:03:18.927251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7888 RESULT=pass>
32205 23:03:18.959278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7888 RESULT=skip>
32206 23:03:18.959753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7888 RESULT=skip
32208 23:03:18.991564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7888 RESULT=skip>
32209 23:03:18.992003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7888 RESULT=skip
32211 23:03:19.023950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7904 RESULT=pass
32213 23:03:19.024368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7904 RESULT=pass>
32214 23:03:19.056012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7904 RESULT=skip>
32215 23:03:19.056418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7904 RESULT=skip
32217 23:03:19.087682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7904 RESULT=skip>
32218 23:03:19.088088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7904 RESULT=skip
32220 23:03:19.119217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7920 RESULT=pass
32222 23:03:19.119662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7920 RESULT=pass>
32223 23:03:19.150181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7920 RESULT=skip>
32224 23:03:19.150579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7920 RESULT=skip
32226 23:03:19.181992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7920 RESULT=skip
32228 23:03:19.182414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7920 RESULT=skip>
32229 23:03:19.213442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7936 RESULT=pass>
32230 23:03:19.213848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7936 RESULT=pass
32232 23:03:19.245265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7936 RESULT=skip
32234 23:03:19.245723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7936 RESULT=skip>
32235 23:03:19.277329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7936 RESULT=skip>
32236 23:03:19.277678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7936 RESULT=skip
32238 23:03:19.308625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7952 RESULT=pass
32240 23:03:19.309055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7952 RESULT=pass>
32241 23:03:19.340947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7952 RESULT=skip
32243 23:03:19.341377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7952 RESULT=skip>
32244 23:03:19.373150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7952 RESULT=skip
32246 23:03:19.373766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7952 RESULT=skip>
32247 23:03:19.407373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7968 RESULT=pass>
32248 23:03:19.407858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7968 RESULT=pass
32250 23:03:19.442476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7968 RESULT=skip>
32251 23:03:19.442968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7968 RESULT=skip
32253 23:03:19.477674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7968 RESULT=skip
32255 23:03:19.478425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7968 RESULT=skip>
32256 23:03:19.517074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7984 RESULT=pass>
32257 23:03:19.517565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7984 RESULT=pass
32259 23:03:19.551607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7984 RESULT=skip>
32260 23:03:19.552076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7984 RESULT=skip
32262 23:03:19.586524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7984 RESULT=skip>
32263 23:03:19.586992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7984 RESULT=skip
32265 23:03:19.620769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8000 RESULT=pass>
32266 23:03:19.621205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8000 RESULT=pass
32268 23:03:19.655624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8000 RESULT=skip>
32269 23:03:19.656034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8000 RESULT=skip
32271 23:03:19.690416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8000 RESULT=skip>
32272 23:03:19.690856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8000 RESULT=skip
32274 23:03:19.724673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8016 RESULT=pass
32276 23:03:19.725238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8016 RESULT=pass>
32277 23:03:19.759784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8016 RESULT=skip
32279 23:03:19.760201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8016 RESULT=skip>
32280 23:03:19.799092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8016 RESULT=skip>
32281 23:03:19.799570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8016 RESULT=skip
32283 23:03:19.831502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8032 RESULT=pass>
32284 23:03:19.831973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8032 RESULT=pass
32286 23:03:19.863921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8032 RESULT=skip>
32287 23:03:19.864391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8032 RESULT=skip
32289 23:03:19.896102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8032 RESULT=skip
32291 23:03:19.896715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8032 RESULT=skip>
32292 23:03:19.927855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8048 RESULT=pass
32294 23:03:19.928471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8048 RESULT=pass>
32295 23:03:19.959361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8048 RESULT=skip>
32296 23:03:19.959817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8048 RESULT=skip
32298 23:03:19.991556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8048 RESULT=skip
32300 23:03:19.992165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8048 RESULT=skip>
32301 23:03:20.022163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8064 RESULT=pass>
32302 23:03:20.022615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8064 RESULT=pass
32304 23:03:20.053616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8064 RESULT=skip
32306 23:03:20.054222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8064 RESULT=skip>
32307 23:03:20.084952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8064 RESULT=skip>
32308 23:03:20.085412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8064 RESULT=skip
32310 23:03:20.116140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8080 RESULT=pass
32312 23:03:20.116707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8080 RESULT=pass>
32313 23:03:20.147380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8080 RESULT=skip>
32314 23:03:20.147820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8080 RESULT=skip
32316 23:03:20.179168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8080 RESULT=skip>
32317 23:03:20.179610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8080 RESULT=skip
32319 23:03:20.211160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8096 RESULT=pass>
32320 23:03:20.211650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8096 RESULT=pass
32322 23:03:20.244884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8096 RESULT=skip>
32323 23:03:20.245351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8096 RESULT=skip
32325 23:03:20.276566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8096 RESULT=skip
32327 23:03:20.277148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8096 RESULT=skip>
32328 23:03:20.308101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8112 RESULT=pass
32330 23:03:20.308673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8112 RESULT=pass>
32331 23:03:20.340355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8112 RESULT=skip
32333 23:03:20.340914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8112 RESULT=skip>
32334 23:03:20.372098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8112 RESULT=skip>
32335 23:03:20.372523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8112 RESULT=skip
32337 23:03:20.403945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8128 RESULT=pass>
32338 23:03:20.404413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8128 RESULT=pass
32340 23:03:20.435649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8128 RESULT=skip
32342 23:03:20.436193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8128 RESULT=skip>
32343 23:03:20.466827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8128 RESULT=skip
32345 23:03:20.467448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8128 RESULT=skip>
32346 23:03:20.498219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8144 RESULT=pass>
32347 23:03:20.498675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8144 RESULT=pass
32349 23:03:20.530447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8144 RESULT=skip>
32350 23:03:20.530910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8144 RESULT=skip
32352 23:03:20.562199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8144 RESULT=skip>
32353 23:03:20.562645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8144 RESULT=skip
32355 23:03:20.593945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8160 RESULT=pass>
32356 23:03:20.594380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8160 RESULT=pass
32358 23:03:20.627005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8160 RESULT=skip>
32359 23:03:20.627462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8160 RESULT=skip
32361 23:03:20.658768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8160 RESULT=skip
32363 23:03:20.659305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8160 RESULT=skip>
32364 23:03:20.692097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8176 RESULT=pass>
32365 23:03:20.692569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8176 RESULT=pass
32367 23:03:20.725503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8176 RESULT=skip
32369 23:03:20.725973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8176 RESULT=skip>
32370 23:03:20.759664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8176 RESULT=skip>
32371 23:03:20.760120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8176 RESULT=skip
32373 23:03:20.797057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8192 RESULT=pass>
32374 23:03:20.797398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8192 RESULT=pass
32376 23:03:20.853213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8192 RESULT=skip>
32377 23:03:20.853554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8192 RESULT=skip
32379 23:03:20.897731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8192 RESULT=skip>
32380 23:03:20.898078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8192 RESULT=skip
32382 23:03:20.933431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace RESULT=pass
32384 23:03:20.933935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace RESULT=pass>
32385 23:03:20.968274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory RESULT=pass>
32386 23:03:20.968623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory RESULT=pass
32388 23:03:21.003490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory RESULT=pass>
32389 23:03:21.003836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory RESULT=pass
32391 23:03:21.039661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory RESULT=pass>
32392 23:03:21.040007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory RESULT=pass
32394 23:03:21.076484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory RESULT=pass>
32395 23:03:21.076939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory RESULT=pass
32397 23:03:21.111929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail>
32398 23:03:21.112313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail
32400 23:03:21.147740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail>
32401 23:03:21.148102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail
32403 23:03:21.183670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass>
32404 23:03:21.184031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass
32406 23:03:21.218846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass
32408 23:03:21.219298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass>
32409 23:03:21.253620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass>
32410 23:03:21.253977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass
32412 23:03:21.311981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass>
32413 23:03:21.312368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass
32415 23:03:21.346516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail>
32416 23:03:21.346989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail
32418 23:03:21.379335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail>
32419 23:03:21.379805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail
32421 23:03:21.412688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory RESULT=pass>
32422 23:03:21.413166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory RESULT=pass
32424 23:03:21.445117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory RESULT=fail>
32425 23:03:21.445585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory RESULT=fail
32427 23:03:21.477718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory RESULT=fail>
32428 23:03:21.478126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory RESULT=fail
32430 23:03:21.512342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory RESULT=pass>
32431 23:03:21.512740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory RESULT=pass
32433 23:03:21.546975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=pass
32435 23:03:21.547548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=pass>
32436 23:03:21.582929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
32438 23:03:21.583407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
32439 23:03:21.620239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory RESULT=pass>
32440 23:03:21.620661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory RESULT=pass
32442 23:03:21.656314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
32443 23:03:21.656792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
32445 23:03:21.690866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill RESULT=fail
32447 23:03:21.691171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill RESULT=fail>
32448 23:03:21.726212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail
32450 23:03:21.726556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail>
32451 23:03:21.758146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail>
32452 23:03:21.758600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail
32454 23:03:21.789419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32455 23:03:21.789896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32457 23:03:21.821501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32458 23:03:21.821957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32460 23:03:21.853411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32461 23:03:21.853864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32463 23:03:21.885843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32464 23:03:21.886317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32466 23:03:21.917263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail>
32467 23:03:21.917694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail
32469 23:03:21.948713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail>
32470 23:03:21.949165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail
32472 23:03:21.980675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32473 23:03:21.981154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32475 23:03:22.012395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32476 23:03:22.012830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32478 23:03:22.044087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32479 23:03:22.044534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32481 23:03:22.075923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32482 23:03:22.076329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32484 23:03:22.107777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory RESULT=fail>
32485 23:03:22.108242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory RESULT=fail
32487 23:03:22.139135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=fail
32489 23:03:22.139668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=fail>
32490 23:03:22.169404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_ksm_options RESULT=fail>
32491 23:03:22.169877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_ksm_options RESULT=fail
32493 23:03:22.200832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
32494 23:03:22.201276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass
32496 23:03:22.232633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass>
32497 23:03:22.233040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass
32499 23:03:22.264966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
32500 23:03:22.265440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass
32502 23:03:22.296772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass>
32503 23:03:22.297217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass
32505 23:03:22.328088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32506 23:03:22.328530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32508 23:03:22.359924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32509 23:03:22.360376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32511 23:03:22.393347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32512 23:03:22.393685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32514 23:03:22.425090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32516 23:03:22.425316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32517 23:03:22.456275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32518 23:03:22.456543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32520 23:03:22.487863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32521 23:03:22.488229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32523 23:03:22.519577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32525 23:03:22.520020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32526 23:03:22.551513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32528 23:03:22.552006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32529 23:03:22.582603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32530 23:03:22.582958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32532 23:03:22.615282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32533 23:03:22.615625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32535 23:03:22.649042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32536 23:03:22.649429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32538 23:03:22.681285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32539 23:03:22.681636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32541 23:03:22.713203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32542 23:03:22.713613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32544 23:03:22.745654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32545 23:03:22.746056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32547 23:03:22.777408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32548 23:03:22.777874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32550 23:03:22.809005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32551 23:03:22.809443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32553 23:03:22.840368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail>
32554 23:03:22.840808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail
32556 23:03:22.872362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=fail>
32557 23:03:22.872829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=fail
32559 23:03:22.904437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options RESULT=fail
32561 23:03:22.905063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options RESULT=fail>
32562 23:03:22.938450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass
32564 23:03:22.939093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass>
32565 23:03:22.972048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass
32567 23:03:22.972671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass>
32568 23:03:23.005867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=pass>
32569 23:03:23.006352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=pass
32571 23:03:23.037423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=pass
32573 23:03:23.038045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=pass>
32574 23:03:23.068796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=pass>
32575 23:03:23.069277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=pass
32577 23:03:23.100631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl RESULT=pass>
32578 23:03:23.101134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl RESULT=pass
32580 23:03:23.133174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode RESULT=fail>
32581 23:03:23.133624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode RESULT=fail
32583 23:03:23.165234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode RESULT=fail>
32584 23:03:23.165700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode RESULT=fail
32586 23:03:23.199140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode RESULT=pass
32588 23:03:23.199681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode RESULT=pass>
32589 23:03:23.232251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode RESULT=fail>
32590 23:03:23.232661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode RESULT=fail
32592 23:03:23.264012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion RESULT=fail
32594 23:03:23.264447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion RESULT=fail>
32595 23:03:23.297895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32596 23:03:23.298305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32598 23:03:23.330048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32599 23:03:23.330517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32601 23:03:23.361719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32602 23:03:23.362203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32604 23:03:23.393451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32605 23:03:23.393928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32607 23:03:23.424759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32608 23:03:23.425210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32610 23:03:23.456333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32611 23:03:23.456799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32613 23:03:23.487949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32614 23:03:23.488294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32616 23:03:23.519574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32617 23:03:23.519918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32619 23:03:23.550946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32621 23:03:23.551393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32622 23:03:23.582610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32623 23:03:23.583027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32625 23:03:23.614197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32626 23:03:23.614598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32628 23:03:23.648093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32630 23:03:23.648642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32631 23:03:23.680075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32632 23:03:23.680550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32634 23:03:23.711679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32635 23:03:23.712071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32637 23:03:23.742914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32639 23:03:23.743346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32640 23:03:23.773777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32641 23:03:23.774119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32643 23:03:23.805304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32644 23:03:23.805670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32646 23:03:23.838873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32648 23:03:23.839467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32649 23:03:23.873326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32650 23:03:23.873782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32652 23:03:23.904670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32653 23:03:23.905026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32655 23:03:23.937637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32656 23:03:23.938060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32658 23:03:23.970598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32659 23:03:23.971007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32661 23:03:24.002882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32663 23:03:24.003428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32664 23:03:24.037053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32665 23:03:24.037535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32667 23:03:24.071859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32668 23:03:24.072369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32670 23:03:24.107967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32672 23:03:24.108635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32673 23:03:24.144079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32674 23:03:24.144432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32676 23:03:24.181880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32678 23:03:24.182209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32679 23:03:24.214347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32680 23:03:24.214807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32682 23:03:24.247882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32683 23:03:24.248306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32685 23:03:24.281345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32687 23:03:24.281934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32688 23:03:24.312422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32689 23:03:24.312812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32691 23:03:24.344387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32692 23:03:24.344802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32694 23:03:24.375942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32695 23:03:24.376344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32697 23:03:24.407930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32699 23:03:24.408515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32700 23:03:24.439877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32701 23:03:24.440272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32703 23:03:24.472007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32704 23:03:24.472458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32706 23:03:24.504275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32707 23:03:24.504736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32709 23:03:24.535851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32710 23:03:24.536289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32712 23:03:24.567998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32713 23:03:24.568455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32715 23:03:24.599866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32716 23:03:24.600335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32718 23:03:24.632645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32720 23:03:24.633263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32721 23:03:24.664558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32722 23:03:24.664972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32724 23:03:24.697042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32726 23:03:24.697592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32727 23:03:24.729260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32728 23:03:24.729676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32730 23:03:24.761304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32732 23:03:24.761825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32733 23:03:24.792765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32734 23:03:24.793136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32736 23:03:24.824921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32737 23:03:24.825284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32739 23:03:24.856445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32740 23:03:24.856894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32742 23:03:24.889903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32743 23:03:24.890357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32745 23:03:24.924280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32746 23:03:24.924749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32748 23:03:24.956253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32750 23:03:24.956804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32751 23:03:24.989004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32752 23:03:24.989420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32754 23:03:25.022887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32756 23:03:25.023520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32757 23:03:25.055279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32758 23:03:25.055706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32760 23:03:25.087014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32762 23:03:25.087386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32763 23:03:25.119759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32764 23:03:25.120229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32766 23:03:25.151961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32767 23:03:25.152423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32769 23:03:25.184124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32770 23:03:25.184588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32772 23:03:25.217698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32773 23:03:25.218164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32775 23:03:25.249662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32776 23:03:25.250099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32778 23:03:25.282277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32780 23:03:25.282906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32781 23:03:25.315045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32783 23:03:25.315672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32784 23:03:25.347602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32785 23:03:25.348010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32787 23:03:25.380299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem RESULT=pass
32789 23:03:25.380924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem RESULT=pass>
32790 23:03:25.412986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=pass
32792 23:03:25.413497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=pass>
32793 23:03:25.448230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=pass>
32794 23:03:25.448766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=pass
32796 23:03:25.481823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=pass>
32797 23:03:25.482312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=pass
32799 23:03:25.516985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=pass
32801 23:03:25.517403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=pass>
32802 23:03:25.554089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=pass>
32803 23:03:25.554474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=pass
32805 23:03:25.589265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=pass>
32806 23:03:25.589640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=pass
32808 23:03:25.622205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=pass>
32809 23:03:25.622581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=pass
32811 23:03:25.654180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=pass>
32812 23:03:25.654578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=pass
32814 23:03:25.687231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=pass>
32815 23:03:25.687716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=pass
32817 23:03:25.723583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=pass>
32818 23:03:25.723992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=pass
32820 23:03:25.757011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=pass>
32821 23:03:25.757419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=pass
32823 23:03:25.788939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=pass
32825 23:03:25.789460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=pass>
32826 23:03:25.824850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=pass
32828 23:03:25.825304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=pass>
32829 23:03:25.857023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=pass>
32830 23:03:25.857368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=pass
32832 23:03:25.888191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=pass
32834 23:03:25.888621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=pass>
32835 23:03:25.919942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=pass>
32836 23:03:25.920404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=pass
32838 23:03:25.952583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=pass>
32839 23:03:25.953063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=pass
32841 23:03:25.985217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=pass>
32842 23:03:25.985693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=pass
32844 23:03:26.016632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest RESULT=pass>
32845 23:03:26.017102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest RESULT=pass
32847 23:03:26.049573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=pass>
32848 23:03:26.050040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=pass
32850 23:03:26.082402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=pass>
32851 23:03:26.082818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=pass
32853 23:03:26.116837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=pass>
32854 23:03:26.117303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=pass
32856 23:03:26.151060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=pass
32858 23:03:26.151516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=pass>
32859 23:03:26.185324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=pass>
32860 23:03:26.185746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=pass
32862 23:03:26.221354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=pass>
32863 23:03:26.221889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=pass
32865 23:03:26.258534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=pass>
32866 23:03:26.259034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=pass
32868 23:03:26.295841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=pass>
32869 23:03:26.296284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=pass
32871 23:03:26.332978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=pass>
32872 23:03:26.333505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=pass
32874 23:03:26.370093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=pass>
32875 23:03:26.370578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=pass
32877 23:03:26.435152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=pass>
32878 23:03:26.435575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=pass
32880 23:03:26.480769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=pass>
32881 23:03:26.481171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=pass
32883 23:03:26.518363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=pass
32885 23:03:26.519031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=pass>
32886 23:03:26.552805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=pass>
32887 23:03:26.553305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=pass
32889 23:03:26.587443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=pass>
32890 23:03:26.587886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=pass
32892 23:03:26.621454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=pass>
32893 23:03:26.621967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=pass
32895 23:03:26.655965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=pass
32897 23:03:26.656442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=pass>
32898 23:03:26.690097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=pass>
32899 23:03:26.690554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=pass
32901 23:03:26.724286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest RESULT=pass>
32902 23:03:26.724739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest RESULT=pass
32904 23:03:26.758706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass
32906 23:03:26.759185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass>
32907 23:03:26.793207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=pass
32909 23:03:26.793702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=pass>
32910 23:03:26.826906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass
32912 23:03:26.827400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass>
32913 23:03:26.860898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass>
32914 23:03:26.861329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass
32916 23:03:26.895854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass>
32917 23:03:26.896376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass
32919 23:03:26.930190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass>
32920 23:03:26.930802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass
32922 23:03:26.964175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass>
32923 23:03:26.964694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass
32925 23:03:26.999270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=pass>
32926 23:03:26.999789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=pass
32928 23:03:27.033130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass>
32929 23:03:27.033658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass
32931 23:03:27.067271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=pass>
32932 23:03:27.067779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=pass
32934 23:03:27.101335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass
32936 23:03:27.101938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass>
32937 23:03:27.135688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=pass
32939 23:03:27.136296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=pass>
32940 23:03:27.169640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass>
32941 23:03:27.170201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass
32943 23:03:27.203876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=pass>
32944 23:03:27.204278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=pass
32946 23:03:27.238908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass
32948 23:03:27.239524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass>
32949 23:03:27.273030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=pass>
32950 23:03:27.273552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=pass
32952 23:03:27.308384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass>
32953 23:03:27.308893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass
32955 23:03:27.340571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=pass>
32956 23:03:27.341085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=pass
32958 23:03:27.371979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass>
32959 23:03:27.372456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass
32961 23:03:27.405500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=pass
32963 23:03:27.406194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=pass>
32964 23:03:27.437949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass>
32965 23:03:27.438448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass
32967 23:03:27.469535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=pass>
32968 23:03:27.470057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=pass
32970 23:03:27.500267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass>
32971 23:03:27.500735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass
32973 23:03:27.531361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=pass>
32974 23:03:27.531829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=pass
32976 23:03:27.562396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass>
32977 23:03:27.562877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass
32979 23:03:27.594181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=pass>
32980 23:03:27.594691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=pass
32982 23:03:27.625187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass>
32983 23:03:27.625714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass
32985 23:03:27.656206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip>
32986 23:03:27.656674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip
32988 23:03:27.687125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap RESULT=pass>
32989 23:03:27.687533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap RESULT=pass
32991 23:03:27.718075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass>
32992 23:03:27.718592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass
32994 23:03:27.748704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass>
32995 23:03:27.749210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass
32997 23:03:27.779855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass>
32998 23:03:27.780328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass
33000 23:03:27.810616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass>
33001 23:03:27.811116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass
33003 23:03:27.842495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass>
33004 23:03:27.842957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass
33006 23:03:27.874164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass>
33007 23:03:27.874620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass
33009 23:03:27.905723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass>
33010 23:03:27.906167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass
33012 23:03:27.937445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace RESULT=pass
33014 23:03:27.937983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace RESULT=pass>
33015 23:03:27.968159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass>
33016 23:03:27.968569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass
33018 23:03:27.999509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256 RESULT=pass>
33019 23:03:27.999949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256 RESULT=pass
33021 23:03:28.031701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass
33023 23:03:28.032267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass>
33024 23:03:28.063559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM RESULT=pass>
33025 23:03:28.064011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM RESULT=pass
33027 23:03:28.095617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA RESULT=pass
33029 23:03:28.096185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA RESULT=pass>
33030 23:03:28.127068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass
33032 23:03:28.127613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass>
33033 23:03:28.158195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM RESULT=pass>
33034 23:03:28.158646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM RESULT=pass
33036 23:03:28.189896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA RESULT=pass
33038 23:03:28.190438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA RESULT=pass>
33039 23:03:28.222094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass>
33040 23:03:28.222543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass
33042 23:03:28.253952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM RESULT=pass>
33043 23:03:28.254357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM RESULT=pass
33045 23:03:28.285711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA RESULT=pass>
33046 23:03:28.286186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA RESULT=pass
33048 23:03:28.317759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass>
33049 23:03:28.318229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass
33051 23:03:28.351296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM RESULT=pass
33053 23:03:28.351838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM RESULT=pass>
33054 23:03:28.383992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA RESULT=pass
33056 23:03:28.384556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA RESULT=pass>
33057 23:03:28.416060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass
33059 23:03:28.416613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass>
33060 23:03:28.448778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM RESULT=pass>
33061 23:03:28.449220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM RESULT=pass
33063 23:03:28.482128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA RESULT=pass>
33064 23:03:28.482600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA RESULT=pass
33066 23:03:28.513234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240 RESULT=pass>
33067 23:03:28.513688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240 RESULT=pass
33069 23:03:28.545102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass>
33070 23:03:28.545549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass
33072 23:03:28.577189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM RESULT=pass>
33073 23:03:28.577672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM RESULT=pass
33075 23:03:28.610390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA RESULT=pass
33077 23:03:28.610956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA RESULT=pass>
33078 23:03:28.642015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass
33080 23:03:28.642518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass>
33081 23:03:28.674844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM RESULT=pass
33083 23:03:28.675406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM RESULT=pass>
33084 23:03:28.707698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA RESULT=pass
33086 23:03:28.708432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA RESULT=pass>
33087 23:03:28.741064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass
33089 23:03:28.741611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass>
33090 23:03:28.772432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM RESULT=pass>
33091 23:03:28.772772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM RESULT=pass
33093 23:03:28.804031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA RESULT=pass>
33094 23:03:28.804483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA RESULT=pass
33096 23:03:28.835689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass>
33097 23:03:28.836141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass
33099 23:03:28.866639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM RESULT=pass
33101 23:03:28.867166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM RESULT=pass>
33102 23:03:28.899213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA RESULT=pass
33104 23:03:28.899839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA RESULT=pass>
33105 23:03:28.932125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass>
33106 23:03:28.932596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass
33108 23:03:28.964314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM RESULT=pass>
33109 23:03:28.964669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM RESULT=pass
33111 23:03:28.995620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA RESULT=pass>
33112 23:03:28.995959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA RESULT=pass
33114 23:03:29.026328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224 RESULT=pass>
33115 23:03:29.026701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224 RESULT=pass
33117 23:03:29.057609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass>
33118 23:03:29.057979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass
33120 23:03:29.088520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM RESULT=pass>
33121 23:03:29.088867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM RESULT=pass
33123 23:03:29.120542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA RESULT=pass
33125 23:03:29.121222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA RESULT=pass>
33126 23:03:29.152229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass
33128 23:03:29.152797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass>
33129 23:03:29.183483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM RESULT=pass>
33130 23:03:29.183832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM RESULT=pass
33132 23:03:29.214406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA RESULT=pass>
33133 23:03:29.214773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA RESULT=pass
33135 23:03:29.246324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass>
33136 23:03:29.246725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass
33138 23:03:29.277068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM RESULT=pass>
33139 23:03:29.277422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM RESULT=pass
33141 23:03:29.309011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA RESULT=pass>
33142 23:03:29.309481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA RESULT=pass
33144 23:03:29.342133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass>
33145 23:03:29.342528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass
33147 23:03:29.373696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM RESULT=pass
33149 23:03:29.374257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM RESULT=pass>
33150 23:03:29.405209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA RESULT=pass
33152 23:03:29.405794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA RESULT=pass>
33153 23:03:29.436488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass
33155 23:03:29.437040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass>
33156 23:03:29.468651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM RESULT=pass>
33157 23:03:29.469098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM RESULT=pass
33159 23:03:29.500162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA RESULT=pass>
33160 23:03:29.500595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA RESULT=pass
33162 23:03:29.533166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208 RESULT=pass
33164 23:03:29.533742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208 RESULT=pass>
33165 23:03:29.565697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass
33167 23:03:29.566259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass>
33168 23:03:29.596986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM RESULT=pass
33170 23:03:29.597513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM RESULT=pass>
33171 23:03:29.629061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA RESULT=pass
33173 23:03:29.629699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA RESULT=pass>
33174 23:03:29.660326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass>
33175 23:03:29.660803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass
33177 23:03:29.691886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM RESULT=pass>
33178 23:03:29.692325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM RESULT=pass
33180 23:03:29.723949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA RESULT=pass
33182 23:03:29.724537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA RESULT=pass>
33183 23:03:29.756055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass
33185 23:03:29.756607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass>
33186 23:03:29.787394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM RESULT=pass>
33187 23:03:29.787849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM RESULT=pass
33189 23:03:29.818545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA RESULT=pass
33191 23:03:29.819103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA RESULT=pass>
33192 23:03:29.849730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass>
33193 23:03:29.850170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass
33195 23:03:29.880799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM RESULT=pass>
33196 23:03:29.881252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM RESULT=pass
33198 23:03:29.912217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA RESULT=pass
33200 23:03:29.912755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA RESULT=pass>
33201 23:03:29.945307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass
33203 23:03:29.945876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass>
33204 23:03:29.979938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM RESULT=pass>
33205 23:03:29.980387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM RESULT=pass
33207 23:03:30.011468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA RESULT=pass
33209 23:03:30.011991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA RESULT=pass>
33210 23:03:30.043903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192 RESULT=pass
33212 23:03:30.044356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192 RESULT=pass>
33213 23:03:30.077248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass>
33214 23:03:30.077675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass
33216 23:03:30.109754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM RESULT=pass
33218 23:03:30.110153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM RESULT=pass>
33219 23:03:30.142108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA RESULT=pass
33221 23:03:30.142663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA RESULT=pass>
33222 23:03:30.173821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass>
33223 23:03:30.174278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass
33225 23:03:30.205206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM RESULT=pass>
33226 23:03:30.205517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM RESULT=pass
33228 23:03:30.236349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA RESULT=pass
33230 23:03:30.236895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA RESULT=pass>
33231 23:03:30.268082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass>
33232 23:03:30.268459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass
33234 23:03:30.299310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM RESULT=pass>
33235 23:03:30.299654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM RESULT=pass
33237 23:03:30.330011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA RESULT=pass
33239 23:03:30.330589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA RESULT=pass>
33240 23:03:30.363457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass>
33241 23:03:30.363853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass
33243 23:03:30.397046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM RESULT=pass
33245 23:03:30.397537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM RESULT=pass>
33246 23:03:30.428002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA RESULT=pass>
33247 23:03:30.428453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA RESULT=pass
33249 23:03:30.459370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass>
33250 23:03:30.459813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass
33252 23:03:30.491258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM RESULT=pass>
33253 23:03:30.491658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM RESULT=pass
33255 23:03:30.522321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA RESULT=pass
33257 23:03:30.522931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA RESULT=pass>
33258 23:03:30.553509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176 RESULT=pass>
33259 23:03:30.553989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176 RESULT=pass
33261 23:03:30.589490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass
33263 23:03:30.589881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass>
33264 23:03:30.620932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM RESULT=pass>
33265 23:03:30.621243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM RESULT=pass
33267 23:03:30.653109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA RESULT=pass>
33268 23:03:30.653522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA RESULT=pass
33270 23:03:30.684567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass>
33271 23:03:30.685012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass
33273 23:03:30.716265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM RESULT=pass>
33274 23:03:30.716707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM RESULT=pass
33276 23:03:30.749691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA RESULT=pass>
33277 23:03:30.750126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA RESULT=pass
33279 23:03:30.781535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass>
33280 23:03:30.782001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass
33282 23:03:30.814073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM RESULT=pass>
33283 23:03:30.814548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM RESULT=pass
33285 23:03:30.862042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA RESULT=pass
33287 23:03:30.862477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA RESULT=pass>
33288 23:03:30.894147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass>
33289 23:03:30.894510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass
33291 23:03:30.927450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM RESULT=pass>
33292 23:03:30.927801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM RESULT=pass
33294 23:03:30.959513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA RESULT=pass>
33295 23:03:30.959871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA RESULT=pass
33297 23:03:30.992634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass
33299 23:03:30.993170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass>
33300 23:03:31.025226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM RESULT=pass
33302 23:03:31.025662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM RESULT=pass>
33303 23:03:31.056731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA RESULT=pass>
33304 23:03:31.057079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA RESULT=pass
33306 23:03:31.087806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160 RESULT=pass>
33307 23:03:31.088151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160 RESULT=pass
33309 23:03:31.119465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass>
33310 23:03:31.119809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass
33312 23:03:31.150875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM RESULT=pass
33314 23:03:31.151312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM RESULT=pass>
33315 23:03:31.182215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA RESULT=pass>
33316 23:03:31.182556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA RESULT=pass
33318 23:03:31.213852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass>
33319 23:03:31.214196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass
33321 23:03:31.245551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM RESULT=pass>
33322 23:03:31.245913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM RESULT=pass
33324 23:03:31.276841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA RESULT=pass
33326 23:03:31.277254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA RESULT=pass>
33327 23:03:31.309086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass>
33328 23:03:31.309429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass
33330 23:03:31.342249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM RESULT=pass
33332 23:03:31.342757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM RESULT=pass>
33333 23:03:31.375602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA RESULT=pass
33335 23:03:31.376016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA RESULT=pass>
33336 23:03:31.408570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass>
33337 23:03:31.408878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass
33339 23:03:31.442047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM RESULT=pass>
33340 23:03:31.442392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM RESULT=pass
33342 23:03:31.475554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA RESULT=pass>
33343 23:03:31.475893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA RESULT=pass
33345 23:03:31.530085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass>
33346 23:03:31.530440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass
33348 23:03:31.564964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM RESULT=pass>
33349 23:03:31.565376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM RESULT=pass
33351 23:03:31.599356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA RESULT=pass
33353 23:03:31.599807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA RESULT=pass>
33354 23:03:31.632506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144 RESULT=pass
33356 23:03:31.632973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144 RESULT=pass>
33357 23:03:31.665581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass
33359 23:03:31.666054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass>
33360 23:03:31.697495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM RESULT=pass>
33361 23:03:31.697916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM RESULT=pass
33363 23:03:31.730059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA RESULT=pass>
33364 23:03:31.730474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA RESULT=pass
33366 23:03:31.761786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass>
33367 23:03:31.762182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass
33369 23:03:31.793570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM RESULT=pass>
33370 23:03:31.794058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM RESULT=pass
33372 23:03:31.825013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA RESULT=pass>
33373 23:03:31.825464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA RESULT=pass
33375 23:03:31.857521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass>
33376 23:03:31.857984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass
33378 23:03:31.889473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM RESULT=pass>
33379 23:03:31.889931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM RESULT=pass
33381 23:03:31.921422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA RESULT=pass>
33382 23:03:31.921840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA RESULT=pass
33384 23:03:31.953412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass>
33385 23:03:31.953875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass
33387 23:03:31.985097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM RESULT=pass>
33388 23:03:31.985447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM RESULT=pass
33390 23:03:32.016460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA RESULT=pass>
33391 23:03:32.016747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA RESULT=pass
33393 23:03:32.048398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass>
33394 23:03:32.048857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass
33396 23:03:32.080603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM RESULT=pass>
33397 23:03:32.081070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM RESULT=pass
33399 23:03:32.112882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA RESULT=pass
33401 23:03:32.113325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA RESULT=pass>
33402 23:03:32.145093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128 RESULT=pass>
33403 23:03:32.145556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128 RESULT=pass
33405 23:03:32.176817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass>
33406 23:03:32.177209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass
33408 23:03:32.208813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM RESULT=pass
33410 23:03:32.209234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM RESULT=pass>
33411 23:03:32.240819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA RESULT=pass>
33412 23:03:32.241099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA RESULT=pass
33414 23:03:32.272945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass>
33415 23:03:32.273291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass
33417 23:03:32.304726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM RESULT=pass>
33418 23:03:32.305079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM RESULT=pass
33420 23:03:32.336155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA RESULT=pass>
33421 23:03:32.336507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA RESULT=pass
33423 23:03:32.368785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass>
33424 23:03:32.369132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass
33426 23:03:32.401128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM RESULT=pass>
33427 23:03:32.401411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM RESULT=pass
33429 23:03:32.432960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA RESULT=pass>
33430 23:03:32.433254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA RESULT=pass
33432 23:03:32.465056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass>
33433 23:03:32.465342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass
33435 23:03:32.496866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM RESULT=pass>
33436 23:03:32.497143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM RESULT=pass
33438 23:03:32.528428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA RESULT=pass
33440 23:03:32.528719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA RESULT=pass>
33441 23:03:32.560177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass>
33442 23:03:32.560455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass
33444 23:03:32.592709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM RESULT=pass>
33445 23:03:32.593064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM RESULT=pass
33447 23:03:32.624348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA RESULT=pass>
33448 23:03:32.624696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA RESULT=pass
33450 23:03:32.655865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112 RESULT=pass
33452 23:03:32.656325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112 RESULT=pass>
33453 23:03:32.688095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass>
33454 23:03:32.688521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass
33456 23:03:32.720565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM RESULT=pass>
33457 23:03:32.720965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM RESULT=pass
33459 23:03:32.754044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA RESULT=pass>
33460 23:03:32.754449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA RESULT=pass
33462 23:03:32.786504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass>
33463 23:03:32.786915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass
33465 23:03:32.819118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM RESULT=pass>
33466 23:03:32.819515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM RESULT=pass
33468 23:03:32.851700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA RESULT=pass>
33469 23:03:32.852156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA RESULT=pass
33471 23:03:32.884020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass>
33472 23:03:32.884390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass
33474 23:03:32.915804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM RESULT=pass>
33475 23:03:32.916157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM RESULT=pass
33477 23:03:32.947364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA RESULT=pass>
33478 23:03:32.947733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA RESULT=pass
33480 23:03:32.978518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass>
33481 23:03:32.978924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass
33483 23:03:33.010890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM RESULT=pass
33485 23:03:33.011532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM RESULT=pass>
33486 23:03:33.042947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA RESULT=pass
33488 23:03:33.043516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA RESULT=pass>
33489 23:03:33.074578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass
33491 23:03:33.075109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass>
33492 23:03:33.107577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM RESULT=pass>
33493 23:03:33.107965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM RESULT=pass
33495 23:03:33.139579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA RESULT=pass>
33496 23:03:33.139988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA RESULT=pass
33498 23:03:33.171317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96 RESULT=pass>
33499 23:03:33.171704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96 RESULT=pass
33501 23:03:33.202506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass>
33502 23:03:33.202864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass
33504 23:03:33.234204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM RESULT=pass>
33505 23:03:33.234567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM RESULT=pass
33507 23:03:33.266222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA RESULT=pass>
33508 23:03:33.266581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA RESULT=pass
33510 23:03:33.297891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass>
33511 23:03:33.298260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass
33513 23:03:33.329675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM RESULT=pass>
33514 23:03:33.329952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM RESULT=pass
33516 23:03:33.361560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA RESULT=pass
33518 23:03:33.361846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA RESULT=pass>
33519 23:03:33.394110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass
33521 23:03:33.394564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass>
33522 23:03:33.425962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM RESULT=pass>
33523 23:03:33.426387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM RESULT=pass
33525 23:03:33.457957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA RESULT=pass>
33526 23:03:33.458407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA RESULT=pass
33528 23:03:33.489344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass>
33529 23:03:33.489687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass
33531 23:03:33.521310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM RESULT=pass
33533 23:03:33.521753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM RESULT=pass>
33534 23:03:33.552965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA RESULT=pass>
33535 23:03:33.553342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA RESULT=pass
33537 23:03:33.584284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass>
33538 23:03:33.584681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass
33540 23:03:33.617154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM RESULT=pass
33542 23:03:33.617721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM RESULT=pass>
33543 23:03:33.648705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA RESULT=pass>
33544 23:03:33.649104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA RESULT=pass
33546 23:03:33.680931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80 RESULT=pass
33548 23:03:33.681506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80 RESULT=pass>
33549 23:03:33.713162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass
33551 23:03:33.713726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass>
33552 23:03:33.745364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM RESULT=pass>
33553 23:03:33.745774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM RESULT=pass
33555 23:03:33.777578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA RESULT=pass>
33556 23:03:33.777981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA RESULT=pass
33558 23:03:33.809224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass>
33559 23:03:33.809620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass
33561 23:03:33.840791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM RESULT=pass>
33562 23:03:33.841266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM RESULT=pass
33564 23:03:33.873013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA RESULT=pass>
33565 23:03:33.873408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA RESULT=pass
33567 23:03:33.904731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass>
33568 23:03:33.905169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass
33570 23:03:33.936949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM RESULT=pass>
33571 23:03:33.937342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM RESULT=pass
33573 23:03:33.968768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA RESULT=pass
33575 23:03:33.969316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA RESULT=pass>
33576 23:03:34.000682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass>
33577 23:03:34.001126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass
33579 23:03:34.032846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM RESULT=pass
33581 23:03:34.033381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM RESULT=pass>
33582 23:03:34.065020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA RESULT=pass>
33583 23:03:34.065462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA RESULT=pass
33585 23:03:34.097293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass>
33586 23:03:34.097679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass
33588 23:03:34.129491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM RESULT=pass>
33589 23:03:34.129924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM RESULT=pass
33591 23:03:34.161407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA RESULT=pass>
33592 23:03:34.161803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA RESULT=pass
33594 23:03:34.192863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64 RESULT=pass>
33595 23:03:34.193269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64 RESULT=pass
33597 23:03:34.224900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass>
33598 23:03:34.225294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass
33600 23:03:34.256833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM RESULT=pass>
33601 23:03:34.257235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM RESULT=pass
33603 23:03:34.287923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA RESULT=pass>
33604 23:03:34.288283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA RESULT=pass
33606 23:03:34.319686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass>
33607 23:03:34.320051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass
33609 23:03:34.351053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM RESULT=pass>
33610 23:03:34.351413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM RESULT=pass
33612 23:03:34.382180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA RESULT=pass>
33613 23:03:34.382544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA RESULT=pass
33615 23:03:34.414136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass>
33616 23:03:34.414499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass
33618 23:03:34.445849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM RESULT=pass
33620 23:03:34.446307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM RESULT=pass>
33621 23:03:34.477279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA RESULT=pass>
33622 23:03:34.477641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA RESULT=pass
33624 23:03:34.508379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass>
33625 23:03:34.508741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass
33627 23:03:34.539571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM RESULT=pass
33629 23:03:34.540029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM RESULT=pass>
33630 23:03:34.570620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA RESULT=pass>
33631 23:03:34.570980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA RESULT=pass
33633 23:03:34.603172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass>
33634 23:03:34.603449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass
33636 23:03:34.635825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM RESULT=pass>
33637 23:03:34.636117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM RESULT=pass
33639 23:03:34.667668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA RESULT=pass>
33640 23:03:34.668026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA RESULT=pass
33642 23:03:34.698790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48 RESULT=pass
33644 23:03:34.699252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48 RESULT=pass>
33645 23:03:34.731085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass>
33646 23:03:34.731500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass
33648 23:03:34.763328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM RESULT=pass>
33649 23:03:34.763745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM RESULT=pass
33651 23:03:34.795906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA RESULT=pass>
33652 23:03:34.796327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA RESULT=pass
33654 23:03:34.828044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass>
33655 23:03:34.828454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass
33657 23:03:34.859989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM RESULT=pass>
33658 23:03:34.860412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM RESULT=pass
33660 23:03:34.891872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA RESULT=pass>
33661 23:03:34.892287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA RESULT=pass
33663 23:03:34.923767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass
33665 23:03:34.924356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass>
33666 23:03:34.955420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM RESULT=pass
33668 23:03:34.955919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM RESULT=pass>
33669 23:03:34.987222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA RESULT=pass>
33670 23:03:34.987671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA RESULT=pass
33672 23:03:35.018438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass>
33673 23:03:35.018829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass
33675 23:03:35.049862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM RESULT=pass>
33676 23:03:35.050223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM RESULT=pass
33678 23:03:35.081257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA RESULT=pass>
33679 23:03:35.081615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA RESULT=pass
33681 23:03:35.112665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass>
33682 23:03:35.113041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass
33684 23:03:35.145050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM RESULT=pass>
33685 23:03:35.145326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM RESULT=pass
33687 23:03:35.176559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA RESULT=pass>
33688 23:03:35.176835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA RESULT=pass
33690 23:03:35.208118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32 RESULT=pass>
33691 23:03:35.208398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32 RESULT=pass
33693 23:03:35.240090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass>
33694 23:03:35.240361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass
33696 23:03:35.272035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM RESULT=pass
33698 23:03:35.272515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM RESULT=pass>
33699 23:03:35.304025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA RESULT=pass>
33700 23:03:35.304381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA RESULT=pass
33702 23:03:35.336160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass
33704 23:03:35.336638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass>
33705 23:03:35.368111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM RESULT=pass
33707 23:03:35.368394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM RESULT=pass>
33708 23:03:35.399848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA RESULT=pass
33710 23:03:35.400122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA RESULT=pass>
33711 23:03:35.432098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass>
33712 23:03:35.432368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass
33714 23:03:35.463685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM RESULT=pass>
33715 23:03:35.463951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM RESULT=pass
33717 23:03:35.495465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA RESULT=pass>
33718 23:03:35.495731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA RESULT=pass
33720 23:03:35.527161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass
33722 23:03:35.527678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass>
33723 23:03:35.558355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM RESULT=pass
33725 23:03:35.558870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM RESULT=pass>
33726 23:03:35.590255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA RESULT=pass>
33727 23:03:35.590671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA RESULT=pass
33729 23:03:35.621882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass>
33730 23:03:35.622297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass
33732 23:03:35.654657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM RESULT=pass>
33733 23:03:35.655126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM RESULT=pass
33735 23:03:35.686673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA RESULT=pass
33737 23:03:35.687113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA RESULT=pass>
33738 23:03:35.718765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16 RESULT=pass
33740 23:03:35.719346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16 RESULT=pass>
33741 23:03:35.753841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass
33743 23:03:35.754286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass>
33744 23:03:35.788484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM RESULT=pass>
33745 23:03:35.788911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM RESULT=pass
33747 23:03:35.823595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA RESULT=pass
33749 23:03:35.824181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA RESULT=pass>
33750 23:03:35.855703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass
33752 23:03:35.856269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass>
33753 23:03:35.887698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM RESULT=pass>
33754 23:03:35.888097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM RESULT=pass
33756 23:03:35.920075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA RESULT=pass>
33757 23:03:35.920503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA RESULT=pass
33759 23:03:35.952141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass
33761 23:03:35.952572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass>
33762 23:03:35.984451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM RESULT=pass>
33763 23:03:35.984872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM RESULT=pass
33765 23:03:36.016777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA RESULT=pass>
33766 23:03:36.017237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA RESULT=pass
33768 23:03:36.048666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass>
33769 23:03:36.049076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass
33771 23:03:36.080642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM RESULT=pass
33773 23:03:36.081203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM RESULT=pass>
33774 23:03:36.112144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA RESULT=pass>
33775 23:03:36.112499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA RESULT=pass
33777 23:03:36.144150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass>
33778 23:03:36.144504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass
33780 23:03:36.176688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM RESULT=pass>
33781 23:03:36.177038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM RESULT=pass
33783 23:03:36.209064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA RESULT=pass>
33784 23:03:36.209413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA RESULT=pass
33786 23:03:36.241154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass
33788 23:03:36.241595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass>
33789 23:03:36.273185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256 RESULT=pass>
33790 23:03:36.273543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256 RESULT=pass
33792 23:03:36.305178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass>
33793 23:03:36.305542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass
33795 23:03:36.337166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM RESULT=pass>
33796 23:03:36.337444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM RESULT=pass
33798 23:03:36.369702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA RESULT=pass>
33799 23:03:36.370155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA RESULT=pass
33801 23:03:36.402082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass>
33802 23:03:36.402542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass
33804 23:03:36.434386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM RESULT=pass>
33805 23:03:36.434849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM RESULT=pass
33807 23:03:36.467517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA RESULT=pass
33809 23:03:36.467966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA RESULT=pass>
33810 23:03:36.499689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass>
33811 23:03:36.500106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass
33813 23:03:36.531879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM RESULT=pass>
33814 23:03:36.532278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM RESULT=pass
33816 23:03:36.563856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA RESULT=pass
33818 23:03:36.564481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA RESULT=pass>
33819 23:03:36.595818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass>
33820 23:03:36.596210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass
33822 23:03:36.660776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM RESULT=pass>
33823 23:03:36.661142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM RESULT=pass
33825 23:03:36.695990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA RESULT=pass>
33826 23:03:36.696277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA RESULT=pass
33828 23:03:36.728278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass>
33829 23:03:36.728751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass
33831 23:03:36.760131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM RESULT=pass
33833 23:03:36.760705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM RESULT=pass>
33834 23:03:36.791648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA RESULT=pass>
33835 23:03:36.792112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA RESULT=pass
33837 23:03:36.823803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240 RESULT=pass
33839 23:03:36.824387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240 RESULT=pass>
33840 23:03:36.856620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass
33842 23:03:36.857178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass>
33843 23:03:36.889812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM RESULT=pass>
33844 23:03:36.890277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM RESULT=pass
33846 23:03:36.922282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA RESULT=pass>
33847 23:03:36.922744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA RESULT=pass
33849 23:03:36.954889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass
33851 23:03:36.955334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass>
33852 23:03:36.987583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM RESULT=pass>
33853 23:03:36.988041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM RESULT=pass
33855 23:03:37.020032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA RESULT=pass>
33856 23:03:37.020382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA RESULT=pass
33858 23:03:37.052237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass>
33859 23:03:37.052579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass
33861 23:03:37.084142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM RESULT=pass
33863 23:03:37.084910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM RESULT=pass>
33864 23:03:37.116026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA RESULT=pass>
33865 23:03:37.116434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA RESULT=pass
33867 23:03:37.147974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass>
33868 23:03:37.148278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass
33870 23:03:37.180299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM RESULT=pass>
33871 23:03:37.180673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM RESULT=pass
33873 23:03:37.212632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA RESULT=pass>
33874 23:03:37.213060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA RESULT=pass
33876 23:03:37.245961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass>
33877 23:03:37.246368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass
33879 23:03:37.278510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM RESULT=pass>
33880 23:03:37.278917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM RESULT=pass
33882 23:03:37.310738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA RESULT=pass
33884 23:03:37.311189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA RESULT=pass>
33885 23:03:37.342613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224 RESULT=pass>
33886 23:03:37.343046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224 RESULT=pass
33888 23:03:37.375567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass>
33889 23:03:37.375968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass
33891 23:03:37.408073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM RESULT=pass
33893 23:03:37.408627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM RESULT=pass>
33894 23:03:37.439890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA RESULT=pass>
33895 23:03:37.440263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA RESULT=pass
33897 23:03:37.471801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass>
33898 23:03:37.472174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass
33900 23:03:37.503854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM RESULT=pass>
33901 23:03:37.504201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM RESULT=pass
33903 23:03:37.536007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA RESULT=pass>
33904 23:03:37.536357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA RESULT=pass
33906 23:03:37.567960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass
33908 23:03:37.568391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass>
33909 23:03:37.600027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM RESULT=pass>
33910 23:03:37.600427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM RESULT=pass
33912 23:03:37.632293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA RESULT=pass>
33913 23:03:37.632695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA RESULT=pass
33915 23:03:37.664337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass>
33916 23:03:37.664737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass
33918 23:03:37.696507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM RESULT=pass>
33919 23:03:37.696887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM RESULT=pass
33921 23:03:37.728394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA RESULT=pass
33923 23:03:37.728873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA RESULT=pass>
33924 23:03:37.760650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass
33926 23:03:37.761205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass>
33927 23:03:37.792412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM RESULT=pass>
33928 23:03:37.792762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM RESULT=pass
33930 23:03:37.824804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA RESULT=pass>
33931 23:03:37.825148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA RESULT=pass
33933 23:03:37.856755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208 RESULT=pass>
33934 23:03:37.857132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208 RESULT=pass
33936 23:03:37.888965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass>
33937 23:03:37.889368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass
33939 23:03:37.922320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM RESULT=pass>
33940 23:03:37.922761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM RESULT=pass
33942 23:03:37.954302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA RESULT=pass>
33943 23:03:37.954707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA RESULT=pass
33945 23:03:37.986106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass>
33946 23:03:37.986574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass
33948 23:03:38.018553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM RESULT=pass>
33949 23:03:38.018965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM RESULT=pass
33951 23:03:38.051587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA RESULT=pass
33953 23:03:38.052033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA RESULT=pass>
33954 23:03:38.083981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass>
33955 23:03:38.084382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass
33957 23:03:38.115973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM RESULT=pass>
33958 23:03:38.116436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM RESULT=pass
33960 23:03:38.147935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA RESULT=pass>
33961 23:03:38.148405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA RESULT=pass
33963 23:03:38.179608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass>
33964 23:03:38.179960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass
33966 23:03:38.211170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM RESULT=pass>
33967 23:03:38.211516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM RESULT=pass
33969 23:03:38.242309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA RESULT=pass>
33970 23:03:38.242635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA RESULT=pass
33972 23:03:38.274944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass
33974 23:03:38.275512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass>
33975 23:03:38.306533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM RESULT=pass>
33976 23:03:38.306943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM RESULT=pass
33978 23:03:38.338358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA RESULT=pass>
33979 23:03:38.338739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA RESULT=pass
33981 23:03:38.369991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192 RESULT=pass>
33982 23:03:38.370338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192 RESULT=pass
33984 23:03:38.401952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass>
33985 23:03:38.402301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass
33987 23:03:38.433337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM RESULT=pass>
33988 23:03:38.433778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM RESULT=pass
33990 23:03:38.464880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA RESULT=pass>
33991 23:03:38.465339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA RESULT=pass
33993 23:03:38.496393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass>
33994 23:03:38.496857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass
33996 23:03:38.528375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM RESULT=pass
33998 23:03:38.528814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM RESULT=pass>
33999 23:03:38.561024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA RESULT=pass>
34000 23:03:38.561515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA RESULT=pass
34002 23:03:38.593211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass>
34003 23:03:38.593690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass
34005 23:03:38.625276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM RESULT=pass
34007 23:03:38.625984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM RESULT=pass>
34008 23:03:38.659312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA RESULT=pass>
34009 23:03:38.659723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA RESULT=pass
34011 23:03:38.692676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass>
34012 23:03:38.693152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass
34014 23:03:38.725277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM RESULT=pass>
34015 23:03:38.725561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM RESULT=pass
34017 23:03:38.757674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA RESULT=pass
34019 23:03:38.757966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA RESULT=pass>
34020 23:03:38.789796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass>
34021 23:03:38.790163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass
34023 23:03:38.822032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM RESULT=pass>
34024 23:03:38.822400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM RESULT=pass
34026 23:03:38.854251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA RESULT=pass>
34027 23:03:38.854607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA RESULT=pass
34029 23:03:38.885835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176 RESULT=pass>
34030 23:03:38.886237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176 RESULT=pass
34032 23:03:38.917534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass>
34033 23:03:38.917936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass
34035 23:03:38.949282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM RESULT=pass>
34036 23:03:38.949742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM RESULT=pass
34038 23:03:38.980862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA RESULT=pass>
34039 23:03:38.981306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA RESULT=pass
34041 23:03:39.013016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass>
34042 23:03:39.013469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass
34044 23:03:39.045277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM RESULT=pass>
34045 23:03:39.045688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM RESULT=pass
34047 23:03:39.076669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA RESULT=pass>
34048 23:03:39.076947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA RESULT=pass
34050 23:03:39.108918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass>
34051 23:03:39.109279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass
34053 23:03:39.141117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM RESULT=pass>
34054 23:03:39.141567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM RESULT=pass
34056 23:03:39.173096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA RESULT=pass>
34057 23:03:39.173585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA RESULT=pass
34059 23:03:39.204950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass>
34060 23:03:39.205352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass
34062 23:03:39.237170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM RESULT=pass
34064 23:03:39.237540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM RESULT=pass>
34065 23:03:39.269022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA RESULT=pass>
34066 23:03:39.269464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA RESULT=pass
34068 23:03:39.301099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass>
34069 23:03:39.301468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass
34071 23:03:39.332776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM RESULT=pass
34073 23:03:39.333238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM RESULT=pass>
34074 23:03:39.364469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA RESULT=pass>
34075 23:03:39.364909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA RESULT=pass
34077 23:03:39.396101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160 RESULT=pass
34079 23:03:39.396660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160 RESULT=pass>
34080 23:03:39.430326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass
34082 23:03:39.430790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass>
34083 23:03:39.465408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM RESULT=pass>
34084 23:03:39.465733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM RESULT=pass
34086 23:03:39.500248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA RESULT=pass>
34087 23:03:39.500538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA RESULT=pass
34089 23:03:39.539449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass
34091 23:03:39.539897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass>
34092 23:03:39.582324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM RESULT=pass>
34093 23:03:39.582637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM RESULT=pass
34095 23:03:39.617972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA RESULT=pass>
34096 23:03:39.618312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA RESULT=pass
34098 23:03:39.652610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass
34100 23:03:39.653039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass>
34101 23:03:39.684962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM RESULT=pass>
34102 23:03:39.685412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM RESULT=pass
34104 23:03:39.716814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA RESULT=pass>
34105 23:03:39.717241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA RESULT=pass
34107 23:03:39.748612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass>
34108 23:03:39.749104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass
34110 23:03:39.780475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM RESULT=pass
34112 23:03:39.780959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM RESULT=pass>
34113 23:03:39.811960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA RESULT=pass>
34114 23:03:39.812301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA RESULT=pass
34116 23:03:39.845003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass
34118 23:03:39.845573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass>
34119 23:03:39.877321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM RESULT=pass>
34120 23:03:39.877707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM RESULT=pass
34122 23:03:39.909730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA RESULT=pass>
34123 23:03:39.910174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA RESULT=pass
34125 23:03:39.941944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144 RESULT=pass>
34126 23:03:39.942379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144 RESULT=pass
34128 23:03:39.974516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass>
34129 23:03:39.974965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass
34131 23:03:40.007677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM RESULT=pass
34133 23:03:40.008307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM RESULT=pass>
34134 23:03:40.039935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA RESULT=pass>
34135 23:03:40.040306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA RESULT=pass
34137 23:03:40.072041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass>
34138 23:03:40.072397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass
34140 23:03:40.104303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM RESULT=pass>
34141 23:03:40.104652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM RESULT=pass
34143 23:03:40.136391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA RESULT=pass>
34144 23:03:40.136736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA RESULT=pass
34146 23:03:40.168451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass>
34147 23:03:40.168847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass
34149 23:03:40.201064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM RESULT=pass>
34150 23:03:40.201480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM RESULT=pass
34152 23:03:40.234033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA RESULT=pass>
34153 23:03:40.234423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA RESULT=pass
34155 23:03:40.266490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass>
34156 23:03:40.266867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass
34158 23:03:40.298420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM RESULT=pass>
34159 23:03:40.298766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM RESULT=pass
34161 23:03:40.330394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA RESULT=pass>
34162 23:03:40.330742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA RESULT=pass
34164 23:03:40.363421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass>
34165 23:03:40.363764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass
34167 23:03:40.395705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM RESULT=pass>
34168 23:03:40.396067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM RESULT=pass
34170 23:03:40.427928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA RESULT=pass>
34171 23:03:40.428382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA RESULT=pass
34173 23:03:40.460305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128 RESULT=pass>
34174 23:03:40.460706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128 RESULT=pass
34176 23:03:40.492622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass>
34177 23:03:40.492986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass
34179 23:03:40.524851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM RESULT=pass>
34180 23:03:40.525201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM RESULT=pass
34182 23:03:40.556814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA RESULT=pass>
34183 23:03:40.557156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA RESULT=pass
34185 23:03:40.588985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass>
34186 23:03:40.589338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass
34188 23:03:40.621081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM RESULT=pass>
34189 23:03:40.621368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM RESULT=pass
34191 23:03:40.654049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA RESULT=pass>
34192 23:03:40.654467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA RESULT=pass
34194 23:03:40.686330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass>
34195 23:03:40.686707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass
34197 23:03:40.717686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM RESULT=pass>
34198 23:03:40.717972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM RESULT=pass
34200 23:03:40.749144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA RESULT=pass>
34201 23:03:40.749601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA RESULT=pass
34203 23:03:40.782131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass
34205 23:03:40.782577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass>
34206 23:03:40.814228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM RESULT=pass>
34207 23:03:40.814630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM RESULT=pass
34209 23:03:40.846361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA RESULT=pass>
34210 23:03:40.846766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA RESULT=pass
34212 23:03:40.878751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass
34214 23:03:40.879072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass>
34215 23:03:40.920102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM RESULT=pass>
34216 23:03:40.920477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM RESULT=pass
34218 23:03:40.951821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA RESULT=pass>
34219 23:03:40.952149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA RESULT=pass
34221 23:03:40.984897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112 RESULT=pass>
34222 23:03:40.985305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112 RESULT=pass
34224 23:03:41.018221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass>
34225 23:03:41.018644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass
34227 23:03:41.052684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM RESULT=pass
34229 23:03:41.053249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM RESULT=pass>
34230 23:03:41.085036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA RESULT=pass>
34231 23:03:41.085431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA RESULT=pass
34233 23:03:41.117511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass>
34234 23:03:41.117948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass
34236 23:03:41.149678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM RESULT=pass>
34237 23:03:41.150077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM RESULT=pass
34239 23:03:41.182169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA RESULT=pass
34241 23:03:41.182737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA RESULT=pass>
34242 23:03:41.215538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass>
34243 23:03:41.216030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass
34245 23:03:41.251039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM RESULT=pass
34247 23:03:41.251476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM RESULT=pass>
34248 23:03:41.283238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA RESULT=pass>
34249 23:03:41.283637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA RESULT=pass
34251 23:03:41.315824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass>
34252 23:03:41.316227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass
34254 23:03:41.354388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM RESULT=pass>
34255 23:03:41.354807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM RESULT=pass
34257 23:03:41.387246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA RESULT=pass>
34258 23:03:41.387708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA RESULT=pass
34260 23:03:41.428605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass
34262 23:03:41.429698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass>
34263 23:03:41.467223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM RESULT=pass>
34264 23:03:41.467691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM RESULT=pass
34266 23:03:41.499413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA RESULT=pass
34268 23:03:41.499849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA RESULT=pass>
34269 23:03:41.530966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96 RESULT=pass
34271 23:03:41.531526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96 RESULT=pass>
34272 23:03:41.562572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass>
34273 23:03:41.563011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass
34275 23:03:41.594192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM RESULT=pass>
34276 23:03:41.594594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM RESULT=pass
34278 23:03:41.626427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA RESULT=pass>
34279 23:03:41.626835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA RESULT=pass
34281 23:03:41.658256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass>
34282 23:03:41.658546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass
34284 23:03:41.689722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM RESULT=pass>
34285 23:03:41.690105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM RESULT=pass
34287 23:03:41.721953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA RESULT=pass>
34288 23:03:41.722336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA RESULT=pass
34290 23:03:41.776105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass
34292 23:03:41.776559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass>
34293 23:03:41.809106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM RESULT=pass>
34294 23:03:41.809511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM RESULT=pass
34296 23:03:41.841194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA RESULT=pass>
34297 23:03:41.841601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA RESULT=pass
34299 23:03:41.873457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass>
34300 23:03:41.873946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass
34302 23:03:41.904978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM RESULT=pass>
34303 23:03:41.905422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM RESULT=pass
34305 23:03:41.936790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA RESULT=pass>
34306 23:03:41.937123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA RESULT=pass
34308 23:03:41.969201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass>
34309 23:03:41.969610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass
34311 23:03:42.001112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM RESULT=pass>
34312 23:03:42.001460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM RESULT=pass
34314 23:03:42.032794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA RESULT=pass>
34315 23:03:42.033248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA RESULT=pass
34317 23:03:42.064354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80 RESULT=pass>
34318 23:03:42.064812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80 RESULT=pass
34320 23:03:42.096470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass>
34321 23:03:42.096866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass
34323 23:03:42.129089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM RESULT=pass>
34324 23:03:42.129495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM RESULT=pass
34326 23:03:42.161211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA RESULT=pass
34328 23:03:42.161785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA RESULT=pass>
34329 23:03:42.192695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass>
34330 23:03:42.193097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass
34332 23:03:42.224125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM RESULT=pass>
34333 23:03:42.224562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM RESULT=pass
34335 23:03:42.255922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA RESULT=pass>
34336 23:03:42.256370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA RESULT=pass
34338 23:03:42.287538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass>
34339 23:03:42.287878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass
34341 23:03:42.319876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM RESULT=pass>
34342 23:03:42.320299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM RESULT=pass
34344 23:03:42.351940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA RESULT=pass>
34345 23:03:42.352354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA RESULT=pass
34347 23:03:42.383470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass>
34348 23:03:42.383901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass
34350 23:03:42.417553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM RESULT=pass
34352 23:03:42.418004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM RESULT=pass>
34353 23:03:42.449510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA RESULT=pass>
34354 23:03:42.449949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA RESULT=pass
34356 23:03:42.481955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass>
34357 23:03:42.482403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass
34359 23:03:42.515234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM RESULT=pass>
34360 23:03:42.515690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM RESULT=pass
34362 23:03:42.547342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA RESULT=pass>
34363 23:03:42.547650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA RESULT=pass
34365 23:03:42.579431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64 RESULT=pass>
34366 23:03:42.579752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64 RESULT=pass
34368 23:03:42.611958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass>
34369 23:03:42.612353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass
34371 23:03:42.644713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM RESULT=pass
34373 23:03:42.645174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM RESULT=pass>
34374 23:03:42.677424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA RESULT=pass
34376 23:03:42.677871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA RESULT=pass>
34377 23:03:42.709094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass>
34378 23:03:42.709520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass
34380 23:03:42.740661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM RESULT=pass>
34381 23:03:42.741127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM RESULT=pass
34383 23:03:42.773665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA RESULT=pass>
34384 23:03:42.774149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA RESULT=pass
34386 23:03:42.806222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass
34388 23:03:42.806684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass>
34389 23:03:42.839915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM RESULT=pass
34391 23:03:42.840570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM RESULT=pass>
34392 23:03:42.872001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA RESULT=pass>
34393 23:03:42.872397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA RESULT=pass
34395 23:03:42.904081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass>
34396 23:03:42.904544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass
34398 23:03:42.936026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM RESULT=pass
34400 23:03:42.936602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM RESULT=pass>
34401 23:03:42.968054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA RESULT=pass>
34402 23:03:42.968458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA RESULT=pass
34404 23:03:43.000933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass>
34405 23:03:43.001395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass
34407 23:03:43.032501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM RESULT=pass
34409 23:03:43.033149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM RESULT=pass>
34410 23:03:43.064534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA RESULT=pass
34412 23:03:43.064975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA RESULT=pass>
34413 23:03:43.096407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48 RESULT=pass
34415 23:03:43.096844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48 RESULT=pass>
34416 23:03:43.128226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass>
34417 23:03:43.128688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass
34419 23:03:43.160586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM RESULT=pass>
34420 23:03:43.161061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM RESULT=pass
34422 23:03:43.193727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA RESULT=pass>
34423 23:03:43.194211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA RESULT=pass
34425 23:03:43.226053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass>
34426 23:03:43.226450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass
34428 23:03:43.258054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM RESULT=pass
34430 23:03:43.258487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM RESULT=pass>
34431 23:03:43.289924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA RESULT=pass>
34432 23:03:43.290383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA RESULT=pass
34434 23:03:43.321583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass
34436 23:03:43.322114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass>
34437 23:03:43.353306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM RESULT=pass>
34438 23:03:43.353775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM RESULT=pass
34440 23:03:43.385469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA RESULT=pass>
34441 23:03:43.385918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA RESULT=pass
34443 23:03:43.416830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass>
34444 23:03:43.417126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass
34446 23:03:43.448604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM RESULT=pass>
34447 23:03:43.448946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM RESULT=pass
34449 23:03:43.480644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA RESULT=pass>
34450 23:03:43.481086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA RESULT=pass
34452 23:03:43.513437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass>
34453 23:03:43.513883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass
34455 23:03:43.546066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM RESULT=pass>
34456 23:03:43.546525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM RESULT=pass
34458 23:03:43.578919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA RESULT=pass
34460 23:03:43.579377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA RESULT=pass>
34461 23:03:43.610633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32 RESULT=pass
34463 23:03:43.611080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32 RESULT=pass>
34464 23:03:43.644809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass>
34465 23:03:43.645212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass
34467 23:03:43.677269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM RESULT=pass>
34468 23:03:43.677678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM RESULT=pass
34470 23:03:43.709301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA RESULT=pass>
34471 23:03:43.709679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA RESULT=pass
34473 23:03:43.741267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass>
34474 23:03:43.741674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass
34476 23:03:43.772941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM RESULT=pass>
34477 23:03:43.773338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM RESULT=pass
34479 23:03:43.805700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA RESULT=pass>
34480 23:03:43.806102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA RESULT=pass
34482 23:03:43.837543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass>
34483 23:03:43.837916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass
34485 23:03:43.868662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM RESULT=pass>
34486 23:03:43.869026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM RESULT=pass
34488 23:03:43.900197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA RESULT=pass>
34489 23:03:43.900558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA RESULT=pass
34491 23:03:43.931957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass>
34492 23:03:43.932330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass
34494 23:03:43.963697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM RESULT=pass>
34495 23:03:43.964108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM RESULT=pass
34497 23:03:43.996046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA RESULT=pass>
34498 23:03:43.996442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA RESULT=pass
34500 23:03:44.029325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass
34502 23:03:44.029932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass>
34503 23:03:44.061175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM RESULT=pass>
34504 23:03:44.061586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM RESULT=pass
34506 23:03:44.092653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA RESULT=pass>
34507 23:03:44.093047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA RESULT=pass
34509 23:03:44.124574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16 RESULT=pass>
34510 23:03:44.124972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16 RESULT=pass
34512 23:03:44.156399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass>
34513 23:03:44.156751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass
34515 23:03:44.188976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM RESULT=pass>
34516 23:03:44.189394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM RESULT=pass
34518 23:03:44.221190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA RESULT=pass
34520 23:03:44.221632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA RESULT=pass>
34521 23:03:44.253582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass>
34522 23:03:44.253989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass
34524 23:03:44.285629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM RESULT=pass
34526 23:03:44.286204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM RESULT=pass>
34527 23:03:44.317178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA RESULT=pass>
34528 23:03:44.317498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA RESULT=pass
34530 23:03:44.348560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass>
34531 23:03:44.348972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass
34533 23:03:44.380092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM RESULT=pass>
34534 23:03:44.380562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM RESULT=pass
34536 23:03:44.411788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA RESULT=pass>
34537 23:03:44.412189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA RESULT=pass
34539 23:03:44.444335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass
34541 23:03:44.444779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass>
34542 23:03:44.476294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM RESULT=pass>
34543 23:03:44.476746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM RESULT=pass
34545 23:03:44.507907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA RESULT=pass>
34546 23:03:44.508276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA RESULT=pass
34548 23:03:44.540283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass>
34549 23:03:44.540686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass
34551 23:03:44.572756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM RESULT=pass>
34552 23:03:44.573161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM RESULT=pass
34554 23:03:44.605138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA RESULT=pass>
34555 23:03:44.605591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA RESULT=pass
34557 23:03:44.636708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi RESULT=pass>
34558 23:03:44.637083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi RESULT=pass
34560 23:03:44.667995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_default_value RESULT=pass>
34561 23:03:44.668371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_default_value RESULT=pass
34563 23:03:44.699685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_read RESULT=pass
34565 23:03:44.700112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_read RESULT=pass>
34566 23:03:44.731857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_sleep_read RESULT=pass>
34567 23:03:44.732233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_sleep_read RESULT=pass
34569 23:03:44.763327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_fork_read RESULT=pass
34571 23:03:44.763860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_fork_read RESULT=pass>
34572 23:03:44.794373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_clone_read RESULT=pass
34574 23:03:44.794848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_clone_read RESULT=pass>
34575 23:03:44.826194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2 RESULT=pass
34577 23:03:44.826537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2 RESULT=pass>
34578 23:03:44.829042 + set +x
34579 23:03:44.829250 <LAVA_SIGNAL_ENDRUN 1_kselftest-arm64_qemu 566315_1.1.3.5>
34580 23:03:44.829585 Received signal: <ENDRUN> 1_kselftest-arm64_qemu 566315_1.1.3.5
34581 23:03:44.829743 Ending use of test pattern.
34582 23:03:44.829866 Ending test lava.1_kselftest-arm64_qemu (566315_1.1.3.5), duration 324.68
34584 23:03:44.832289 <LAVA_TEST_RUNNER EXIT>
34585 23:03:44.832638 ok: lava_test_shell seems to have completed
34586 23:03:44.924078 arm64_btitest: pass
arm64_btitest_bti_c_func_call_using_blr: pass
arm64_btitest_bti_c_func_call_using_br_x0: pass
arm64_btitest_bti_c_func_call_using_br_x16: pass
arm64_btitest_bti_j_func_call_using_blr: pass
arm64_btitest_bti_j_func_call_using_br_x0: pass
arm64_btitest_bti_j_func_call_using_br_x16: pass
arm64_btitest_bti_jc_func_call_using_blr: pass
arm64_btitest_bti_jc_func_call_using_br_x0: pass
arm64_btitest_bti_jc_func_call_using_br_x16: pass
arm64_btitest_bti_none_func_call_using_blr: pass
arm64_btitest_bti_none_func_call_using_br_x0: pass
arm64_btitest_bti_none_func_call_using_br_x16: pass
arm64_btitest_nohint_func_call_using_blr: pass
arm64_btitest_nohint_func_call_using_br_x0: pass
arm64_btitest_nohint_func_call_using_br_x16: pass
arm64_btitest_paciasp_func_call_using_blr: pass
arm64_btitest_paciasp_func_call_using_br_x0: pass
arm64_btitest_paciasp_func_call_using_br_x16: pass
arm64_check_buffer_fill: fail
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_child_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_gcr_el1_cswitch: fail
arm64_check_ksm_options: fail
arm64_check_mmap_options: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory: fail
arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_prctl: pass
arm64_check_prctl_ASYNC: pass
arm64_check_prctl_NONE: pass
arm64_check_prctl_SYNC: pass
arm64_check_prctl_SYNC_ASYNC: pass
arm64_check_prctl_check_basic_read: pass
arm64_check_tags_inclusion: fail
arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode: pass
arm64_check_user_mem: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_fake_sigreturn_bad_magic: pass
arm64_fake_sigreturn_bad_size: pass
arm64_fake_sigreturn_bad_size_for_magic0: pass
arm64_fake_sigreturn_duplicated_fpsimd: pass
arm64_fake_sigreturn_misaligned_sp: pass
arm64_fake_sigreturn_missing_fpsimd: pass
arm64_fake_sigreturn_sme_change_vl: pass
arm64_fake_sigreturn_sve_change_vl: pass
arm64_fp-stress: pass
arm64_fp-stress_FPSIMD-0-0: pass
arm64_fp-stress_SSVE-VL-128-0: pass
arm64_fp-stress_SSVE-VL-16-0: pass
arm64_fp-stress_SSVE-VL-256-0: pass
arm64_fp-stress_SSVE-VL-32-0: pass
arm64_fp-stress_SSVE-VL-64-0: pass
arm64_fp-stress_SVE-VL-112-0: pass
arm64_fp-stress_SVE-VL-128-0: pass
arm64_fp-stress_SVE-VL-144-0: pass
arm64_fp-stress_SVE-VL-16-0: pass
arm64_fp-stress_SVE-VL-160-0: pass
arm64_fp-stress_SVE-VL-176-0: pass
arm64_fp-stress_SVE-VL-192-0: pass
arm64_fp-stress_SVE-VL-208-0: pass
arm64_fp-stress_SVE-VL-224-0: pass
arm64_fp-stress_SVE-VL-240-0: pass
arm64_fp-stress_SVE-VL-256-0: pass
arm64_fp-stress_SVE-VL-32-0: pass
arm64_fp-stress_SVE-VL-48-0: pass
arm64_fp-stress_SVE-VL-64-0: pass
arm64_fp-stress_SVE-VL-80-0: pass
arm64_fp-stress_SVE-VL-96-0: pass
arm64_fp-stress_ZA-VL-128-0: pass
arm64_fp-stress_ZA-VL-16-0: pass
arm64_fp-stress_ZA-VL-256-0: pass
arm64_fp-stress_ZA-VL-32-0: pass
arm64_fp-stress_ZA-VL-64-0: pass
arm64_hwcap: pass
arm64_hwcap_cpuinfo_match_RNG: pass
arm64_hwcap_cpuinfo_match_SME: pass
arm64_hwcap_cpuinfo_match_SVE: pass
arm64_hwcap_cpuinfo_match_SVE2_BF16: pass
arm64_hwcap_cpuinfo_match_SVE2_BITPERM: pass
arm64_hwcap_cpuinfo_match_SVE2_EBF16: pass
arm64_hwcap_cpuinfo_match_SVE2_F32MM: pass
arm64_hwcap_cpuinfo_match_SVE2_F64MM: pass
arm64_hwcap_cpuinfo_match_SVE2_I8MM: pass
arm64_hwcap_cpuinfo_match_SVE2_PMULL: pass
arm64_hwcap_cpuinfo_match_SVE2_SHA3: pass
arm64_hwcap_cpuinfo_match_SVE2_SM4: pass
arm64_hwcap_cpuinfo_match_SVE_2: pass
arm64_hwcap_cpuinfo_match_SVE_AES: pass
arm64_hwcap_sigill_RNG: pass
arm64_hwcap_sigill_SME: pass
arm64_hwcap_sigill_SVE: pass
arm64_hwcap_sigill_SVE2_BF16: pass
arm64_hwcap_sigill_SVE2_BITPERM: pass
arm64_hwcap_sigill_SVE2_EBF16: skip
arm64_hwcap_sigill_SVE2_F32MM: pass
arm64_hwcap_sigill_SVE2_F64MM: pass
arm64_hwcap_sigill_SVE2_I8MM: pass
arm64_hwcap_sigill_SVE2_PMULL: pass
arm64_hwcap_sigill_SVE2_SHA3: pass
arm64_hwcap_sigill_SVE2_SM4: pass
arm64_hwcap_sigill_SVE_2: pass
arm64_hwcap_sigill_SVE_AES: pass
arm64_mangle_pstate_invalid_compat_toggle: pass
arm64_mangle_pstate_invalid_daif_bits: pass
arm64_mangle_pstate_invalid_mode_el1h: pass
arm64_mangle_pstate_invalid_mode_el1t: pass
arm64_mangle_pstate_invalid_mode_el2h: pass
arm64_mangle_pstate_invalid_mode_el2t: pass
arm64_mangle_pstate_invalid_mode_el3h: pass
arm64_mangle_pstate_invalid_mode_el3t: pass
arm64_nobtitest: pass
arm64_nobtitest_bti_c_func_call_using_blr: pass
arm64_nobtitest_bti_c_func_call_using_br_x0: pass
arm64_nobtitest_bti_c_func_call_using_br_x16: pass
arm64_nobtitest_bti_j_func_call_using_blr: pass
arm64_nobtitest_bti_j_func_call_using_br_x0: pass
arm64_nobtitest_bti_j_func_call_using_br_x16: pass
arm64_nobtitest_bti_jc_func_call_using_blr: pass
arm64_nobtitest_bti_jc_func_call_using_br_x0: pass
arm64_nobtitest_bti_jc_func_call_using_br_x16: pass
arm64_nobtitest_bti_none_func_call_using_blr: pass
arm64_nobtitest_bti_none_func_call_using_br_x0: pass
arm64_nobtitest_bti_none_func_call_using_br_x16: pass
arm64_nobtitest_nohint_func_call_using_blr: pass
arm64_nobtitest_nohint_func_call_using_br_x0: pass
arm64_nobtitest_nohint_func_call_using_br_x16: pass
arm64_nobtitest_paciasp_func_call_using_blr: pass
arm64_nobtitest_paciasp_func_call_using_br_x0: pass
arm64_nobtitest_paciasp_func_call_using_br_x16: pass
arm64_pac: pass
arm64_pac_global_context_switch_keep_keys: pass
arm64_pac_global_context_switch_keep_keys_generic: pass
arm64_pac_global_corrupt_pac: pass
arm64_pac_global_exec_changed_keys: pass
arm64_pac_global_pac_instructions_not_nop: pass
arm64_pac_global_pac_instructions_not_nop_generic: pass
arm64_pac_global_single_thread_different_keys: pass
arm64_ptrace: pass
arm64_ptrace_count_tpidrs: pass
arm64_ptrace_read_tpidr_one: pass
arm64_ptrace_tpidr2_read: pass
arm64_ptrace_tpidr2_write: pass
arm64_ptrace_verify_tpidr_one: pass
arm64_ptrace_write_tpidr_one: pass
arm64_ptrace_write_tpidr_only: pass
arm64_run_tags_test_sh: pass
arm64_sme_trap_no_sm: pass
arm64_sme_trap_non_streaming: skip
arm64_sme_trap_za: pass
arm64_sme_vl: pass
arm64_ssve_regs: pass
arm64_sve-probe-vls: pass
arm64_sve-probe-vls_All_vector_lengths_valid: pass
arm64_sve-probe-vls_Enumerated_16_vector_lengths: pass
arm64_sve-ptrace: pass
arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0: pass
arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared: pass
arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set: pass
arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state: pass
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992: skip
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_SVE_VL_1008: pass
arm64_sve-ptrace_Set_SVE_VL_1024: pass
arm64_sve-ptrace_Set_SVE_VL_1040: pass
arm64_sve-ptrace_Set_SVE_VL_1056: pass
arm64_sve-ptrace_Set_SVE_VL_1072: pass
arm64_sve-ptrace_Set_SVE_VL_1088: pass
arm64_sve-ptrace_Set_SVE_VL_1104: pass
arm64_sve-ptrace_Set_SVE_VL_112: pass
arm64_sve-ptrace_Set_SVE_VL_1120: pass
arm64_sve-ptrace_Set_SVE_VL_1136: pass
arm64_sve-ptrace_Set_SVE_VL_1152: pass
arm64_sve-ptrace_Set_SVE_VL_1168: pass
arm64_sve-ptrace_Set_SVE_VL_1184: pass
arm64_sve-ptrace_Set_SVE_VL_1200: pass
arm64_sve-ptrace_Set_SVE_VL_1216: pass
arm64_sve-ptrace_Set_SVE_VL_1232: pass
arm64_sve-ptrace_Set_SVE_VL_1248: pass
arm64_sve-ptrace_Set_SVE_VL_1264: pass
arm64_sve-ptrace_Set_SVE_VL_128: pass
arm64_sve-ptrace_Set_SVE_VL_1280: pass
arm64_sve-ptrace_Set_SVE_VL_1296: pass
arm64_sve-ptrace_Set_SVE_VL_1312: pass
arm64_sve-ptrace_Set_SVE_VL_1328: pass
arm64_sve-ptrace_Set_SVE_VL_1344: pass
arm64_sve-ptrace_Set_SVE_VL_1360: pass
arm64_sve-ptrace_Set_SVE_VL_1376: pass
arm64_sve-ptrace_Set_SVE_VL_1392: pass
arm64_sve-ptrace_Set_SVE_VL_1408: pass
arm64_sve-ptrace_Set_SVE_VL_1424: pass
arm64_sve-ptrace_Set_SVE_VL_144: pass
arm64_sve-ptrace_Set_SVE_VL_1440: pass
arm64_sve-ptrace_Set_SVE_VL_1456: pass
arm64_sve-ptrace_Set_SVE_VL_1472: pass
arm64_sve-ptrace_Set_SVE_VL_1488: pass
arm64_sve-ptrace_Set_SVE_VL_1504: pass
arm64_sve-ptrace_Set_SVE_VL_1520: pass
arm64_sve-ptrace_Set_SVE_VL_1536: pass
arm64_sve-ptrace_Set_SVE_VL_1552: pass
arm64_sve-ptrace_Set_SVE_VL_1568: pass
arm64_sve-ptrace_Set_SVE_VL_1584: pass
arm64_sve-ptrace_Set_SVE_VL_16: pass
arm64_sve-ptrace_Set_SVE_VL_160: pass
arm64_sve-ptrace_Set_SVE_VL_1600: pass
arm64_sve-ptrace_Set_SVE_VL_1616: pass
arm64_sve-ptrace_Set_SVE_VL_1632: pass
arm64_sve-ptrace_Set_SVE_VL_1648: pass
arm64_sve-ptrace_Set_SVE_VL_1664: pass
arm64_sve-ptrace_Set_SVE_VL_1680: pass
arm64_sve-ptrace_Set_SVE_VL_1696: pass
arm64_sve-ptrace_Set_SVE_VL_1712: pass
arm64_sve-ptrace_Set_SVE_VL_1728: pass
arm64_sve-ptrace_Set_SVE_VL_1744: pass
arm64_sve-ptrace_Set_SVE_VL_176: pass
arm64_sve-ptrace_Set_SVE_VL_1760: pass
arm64_sve-ptrace_Set_SVE_VL_1776: pass
arm64_sve-ptrace_Set_SVE_VL_1792: pass
arm64_sve-ptrace_Set_SVE_VL_1808: pass
arm64_sve-ptrace_Set_SVE_VL_1824: pass
arm64_sve-ptrace_Set_SVE_VL_1840: pass
arm64_sve-ptrace_Set_SVE_VL_1856: pass
arm64_sve-ptrace_Set_SVE_VL_1872: pass
arm64_sve-ptrace_Set_SVE_VL_1888: pass
arm64_sve-ptrace_Set_SVE_VL_1904: pass
arm64_sve-ptrace_Set_SVE_VL_192: pass
arm64_sve-ptrace_Set_SVE_VL_1920: pass
arm64_sve-ptrace_Set_SVE_VL_1936: pass
arm64_sve-ptrace_Set_SVE_VL_1952: pass
arm64_sve-ptrace_Set_SVE_VL_1968: pass
arm64_sve-ptrace_Set_SVE_VL_1984: pass
arm64_sve-ptrace_Set_SVE_VL_2000: pass
arm64_sve-ptrace_Set_SVE_VL_2016: pass
arm64_sve-ptrace_Set_SVE_VL_2032: pass
arm64_sve-ptrace_Set_SVE_VL_2048: pass
arm64_sve-ptrace_Set_SVE_VL_2064: pass
arm64_sve-ptrace_Set_SVE_VL_208: pass
arm64_sve-ptrace_Set_SVE_VL_2080: pass
arm64_sve-ptrace_Set_SVE_VL_2096: pass
arm64_sve-ptrace_Set_SVE_VL_2112: pass
arm64_sve-ptrace_Set_SVE_VL_2128: pass
arm64_sve-ptrace_Set_SVE_VL_2144: pass
arm64_sve-ptrace_Set_SVE_VL_2160: pass
arm64_sve-ptrace_Set_SVE_VL_2176: pass
arm64_sve-ptrace_Set_SVE_VL_2192: pass
arm64_sve-ptrace_Set_SVE_VL_2208: pass
arm64_sve-ptrace_Set_SVE_VL_2224: pass
arm64_sve-ptrace_Set_SVE_VL_224: pass
arm64_sve-ptrace_Set_SVE_VL_2240: pass
arm64_sve-ptrace_Set_SVE_VL_2256: pass
arm64_sve-ptrace_Set_SVE_VL_2272: pass
arm64_sve-ptrace_Set_SVE_VL_2288: pass
arm64_sve-ptrace_Set_SVE_VL_2304: pass
arm64_sve-ptrace_Set_SVE_VL_2320: pass
arm64_sve-ptrace_Set_SVE_VL_2336: pass
arm64_sve-ptrace_Set_SVE_VL_2352: pass
arm64_sve-ptrace_Set_SVE_VL_2368: pass
arm64_sve-ptrace_Set_SVE_VL_2384: pass
arm64_sve-ptrace_Set_SVE_VL_240: pass
arm64_sve-ptrace_Set_SVE_VL_2400: pass
arm64_sve-ptrace_Set_SVE_VL_2416: pass
arm64_sve-ptrace_Set_SVE_VL_2432: pass
arm64_sve-ptrace_Set_SVE_VL_2448: pass
arm64_sve-ptrace_Set_SVE_VL_2464: pass
arm64_sve-ptrace_Set_SVE_VL_2480: pass
arm64_sve-ptrace_Set_SVE_VL_2496: pass
arm64_sve-ptrace_Set_SVE_VL_2512: pass
arm64_sve-ptrace_Set_SVE_VL_2528: pass
arm64_sve-ptrace_Set_SVE_VL_2544: pass
arm64_sve-ptrace_Set_SVE_VL_256: pass
arm64_sve-ptrace_Set_SVE_VL_2560: pass
arm64_sve-ptrace_Set_SVE_VL_2576: pass
arm64_sve-ptrace_Set_SVE_VL_2592: pass
arm64_sve-ptrace_Set_SVE_VL_2608: pass
arm64_sve-ptrace_Set_SVE_VL_2624: pass
arm64_sve-ptrace_Set_SVE_VL_2640: pass
arm64_sve-ptrace_Set_SVE_VL_2656: pass
arm64_sve-ptrace_Set_SVE_VL_2672: pass
arm64_sve-ptrace_Set_SVE_VL_2688: pass
arm64_sve-ptrace_Set_SVE_VL_2704: pass
arm64_sve-ptrace_Set_SVE_VL_272: pass
arm64_sve-ptrace_Set_SVE_VL_2720: pass
arm64_sve-ptrace_Set_SVE_VL_2736: pass
arm64_sve-ptrace_Set_SVE_VL_2752: pass
arm64_sve-ptrace_Set_SVE_VL_2768: pass
arm64_sve-ptrace_Set_SVE_VL_2784: pass
arm64_sve-ptrace_Set_SVE_VL_2800: pass
arm64_sve-ptrace_Set_SVE_VL_2816: pass
arm64_sve-ptrace_Set_SVE_VL_2832: pass
arm64_sve-ptrace_Set_SVE_VL_2848: pass
arm64_sve-ptrace_Set_SVE_VL_2864: pass
arm64_sve-ptrace_Set_SVE_VL_288: pass
arm64_sve-ptrace_Set_SVE_VL_2880: pass
arm64_sve-ptrace_Set_SVE_VL_2896: pass
arm64_sve-ptrace_Set_SVE_VL_2912: pass
arm64_sve-ptrace_Set_SVE_VL_2928: pass
arm64_sve-ptrace_Set_SVE_VL_2944: pass
arm64_sve-ptrace_Set_SVE_VL_2960: pass
arm64_sve-ptrace_Set_SVE_VL_2976: pass
arm64_sve-ptrace_Set_SVE_VL_2992: pass
arm64_sve-ptrace_Set_SVE_VL_3008: pass
arm64_sve-ptrace_Set_SVE_VL_3024: pass
arm64_sve-ptrace_Set_SVE_VL_304: pass
arm64_sve-ptrace_Set_SVE_VL_3040: pass
arm64_sve-ptrace_Set_SVE_VL_3056: pass
arm64_sve-ptrace_Set_SVE_VL_3072: pass
arm64_sve-ptrace_Set_SVE_VL_3088: pass
arm64_sve-ptrace_Set_SVE_VL_3104: pass
arm64_sve-ptrace_Set_SVE_VL_3120: pass
arm64_sve-ptrace_Set_SVE_VL_3136: pass
arm64_sve-ptrace_Set_SVE_VL_3152: pass
arm64_sve-ptrace_Set_SVE_VL_3168: pass
arm64_sve-ptrace_Set_SVE_VL_3184: pass
arm64_sve-ptrace_Set_SVE_VL_32: pass
arm64_sve-ptrace_Set_SVE_VL_320: pass
arm64_sve-ptrace_Set_SVE_VL_3200: pass
arm64_sve-ptrace_Set_SVE_VL_3216: pass
arm64_sve-ptrace_Set_SVE_VL_3232: pass
arm64_sve-ptrace_Set_SVE_VL_3248: pass
arm64_sve-ptrace_Set_SVE_VL_3264: pass
arm64_sve-ptrace_Set_SVE_VL_3280: pass
arm64_sve-ptrace_Set_SVE_VL_3296: pass
arm64_sve-ptrace_Set_SVE_VL_3312: pass
arm64_sve-ptrace_Set_SVE_VL_3328: pass
arm64_sve-ptrace_Set_SVE_VL_3344: pass
arm64_sve-ptrace_Set_SVE_VL_336: pass
arm64_sve-ptrace_Set_SVE_VL_3360: pass
arm64_sve-ptrace_Set_SVE_VL_3376: pass
arm64_sve-ptrace_Set_SVE_VL_3392: pass
arm64_sve-ptrace_Set_SVE_VL_3408: pass
arm64_sve-ptrace_Set_SVE_VL_3424: pass
arm64_sve-ptrace_Set_SVE_VL_3440: pass
arm64_sve-ptrace_Set_SVE_VL_3456: pass
arm64_sve-ptrace_Set_SVE_VL_3472: pass
arm64_sve-ptrace_Set_SVE_VL_3488: pass
arm64_sve-ptrace_Set_SVE_VL_3504: pass
arm64_sve-ptrace_Set_SVE_VL_352: pass
arm64_sve-ptrace_Set_SVE_VL_3520: pass
arm64_sve-ptrace_Set_SVE_VL_3536: pass
arm64_sve-ptrace_Set_SVE_VL_3552: pass
arm64_sve-ptrace_Set_SVE_VL_3568: pass
arm64_sve-ptrace_Set_SVE_VL_3584: pass
arm64_sve-ptrace_Set_SVE_VL_3600: pass
arm64_sve-ptrace_Set_SVE_VL_3616: pass
arm64_sve-ptrace_Set_SVE_VL_3632: pass
arm64_sve-ptrace_Set_SVE_VL_3648: pass
arm64_sve-ptrace_Set_SVE_VL_3664: pass
arm64_sve-ptrace_Set_SVE_VL_368: pass
arm64_sve-ptrace_Set_SVE_VL_3680: pass
arm64_sve-ptrace_Set_SVE_VL_3696: pass
arm64_sve-ptrace_Set_SVE_VL_3712: pass
arm64_sve-ptrace_Set_SVE_VL_3728: pass
arm64_sve-ptrace_Set_SVE_VL_3744: pass
arm64_sve-ptrace_Set_SVE_VL_3760: pass
arm64_sve-ptrace_Set_SVE_VL_3776: pass
arm64_sve-ptrace_Set_SVE_VL_3792: pass
arm64_sve-ptrace_Set_SVE_VL_3808: pass
arm64_sve-ptrace_Set_SVE_VL_3824: pass
arm64_sve-ptrace_Set_SVE_VL_384: pass
arm64_sve-ptrace_Set_SVE_VL_3840: pass
arm64_sve-ptrace_Set_SVE_VL_3856: pass
arm64_sve-ptrace_Set_SVE_VL_3872: pass
arm64_sve-ptrace_Set_SVE_VL_3888: pass
arm64_sve-ptrace_Set_SVE_VL_3904: pass
arm64_sve-ptrace_Set_SVE_VL_3920: pass
arm64_sve-ptrace_Set_SVE_VL_3936: pass
arm64_sve-ptrace_Set_SVE_VL_3952: pass
arm64_sve-ptrace_Set_SVE_VL_3968: pass
arm64_sve-ptrace_Set_SVE_VL_3984: pass
arm64_sve-ptrace_Set_SVE_VL_400: pass
arm64_sve-ptrace_Set_SVE_VL_4000: pass
arm64_sve-ptrace_Set_SVE_VL_4016: pass
arm64_sve-ptrace_Set_SVE_VL_4032: pass
arm64_sve-ptrace_Set_SVE_VL_4048: pass
arm64_sve-ptrace_Set_SVE_VL_4064: pass
arm64_sve-ptrace_Set_SVE_VL_4080: pass
arm64_sve-ptrace_Set_SVE_VL_4096: pass
arm64_sve-ptrace_Set_SVE_VL_4112: pass
arm64_sve-ptrace_Set_SVE_VL_4128: pass
arm64_sve-ptrace_Set_SVE_VL_4144: pass
arm64_sve-ptrace_Set_SVE_VL_416: pass
arm64_sve-ptrace_Set_SVE_VL_4160: pass
arm64_sve-ptrace_Set_SVE_VL_4176: pass
arm64_sve-ptrace_Set_SVE_VL_4192: pass
arm64_sve-ptrace_Set_SVE_VL_4208: pass
arm64_sve-ptrace_Set_SVE_VL_4224: pass
arm64_sve-ptrace_Set_SVE_VL_4240: pass
arm64_sve-ptrace_Set_SVE_VL_4256: pass
arm64_sve-ptrace_Set_SVE_VL_4272: pass
arm64_sve-ptrace_Set_SVE_VL_4288: pass
arm64_sve-ptrace_Set_SVE_VL_4304: pass
arm64_sve-ptrace_Set_SVE_VL_432: pass
arm64_sve-ptrace_Set_SVE_VL_4320: pass
arm64_sve-ptrace_Set_SVE_VL_4336: pass
arm64_sve-ptrace_Set_SVE_VL_4352: pass
arm64_sve-ptrace_Set_SVE_VL_4368: pass
arm64_sve-ptrace_Set_SVE_VL_4384: pass
arm64_sve-ptrace_Set_SVE_VL_4400: pass
arm64_sve-ptrace_Set_SVE_VL_4416: pass
arm64_sve-ptrace_Set_SVE_VL_4432: pass
arm64_sve-ptrace_Set_SVE_VL_4448: pass
arm64_sve-ptrace_Set_SVE_VL_4464: pass
arm64_sve-ptrace_Set_SVE_VL_448: pass
arm64_sve-ptrace_Set_SVE_VL_4480: pass
arm64_sve-ptrace_Set_SVE_VL_4496: pass
arm64_sve-ptrace_Set_SVE_VL_4512: pass
arm64_sve-ptrace_Set_SVE_VL_4528: pass
arm64_sve-ptrace_Set_SVE_VL_4544: pass
arm64_sve-ptrace_Set_SVE_VL_4560: pass
arm64_sve-ptrace_Set_SVE_VL_4576: pass
arm64_sve-ptrace_Set_SVE_VL_4592: pass
arm64_sve-ptrace_Set_SVE_VL_4608: pass
arm64_sve-ptrace_Set_SVE_VL_4624: pass
arm64_sve-ptrace_Set_SVE_VL_464: pass
arm64_sve-ptrace_Set_SVE_VL_4640: pass
arm64_sve-ptrace_Set_SVE_VL_4656: pass
arm64_sve-ptrace_Set_SVE_VL_4672: pass
arm64_sve-ptrace_Set_SVE_VL_4688: pass
arm64_sve-ptrace_Set_SVE_VL_4704: pass
arm64_sve-ptrace_Set_SVE_VL_4720: pass
arm64_sve-ptrace_Set_SVE_VL_4736: pass
arm64_sve-ptrace_Set_SVE_VL_4752: pass
arm64_sve-ptrace_Set_SVE_VL_4768: pass
arm64_sve-ptrace_Set_SVE_VL_4784: pass
arm64_sve-ptrace_Set_SVE_VL_48: pass
arm64_sve-ptrace_Set_SVE_VL_480: pass
arm64_sve-ptrace_Set_SVE_VL_4800: pass
arm64_sve-ptrace_Set_SVE_VL_4816: pass
arm64_sve-ptrace_Set_SVE_VL_4832: pass
arm64_sve-ptrace_Set_SVE_VL_4848: pass
arm64_sve-ptrace_Set_SVE_VL_4864: pass
arm64_sve-ptrace_Set_SVE_VL_4880: pass
arm64_sve-ptrace_Set_SVE_VL_4896: pass
arm64_sve-ptrace_Set_SVE_VL_4912: pass
arm64_sve-ptrace_Set_SVE_VL_4928: pass
arm64_sve-ptrace_Set_SVE_VL_4944: pass
arm64_sve-ptrace_Set_SVE_VL_496: pass
arm64_sve-ptrace_Set_SVE_VL_4960: pass
arm64_sve-ptrace_Set_SVE_VL_4976: pass
arm64_sve-ptrace_Set_SVE_VL_4992: pass
arm64_sve-ptrace_Set_SVE_VL_5008: pass
arm64_sve-ptrace_Set_SVE_VL_5024: pass
arm64_sve-ptrace_Set_SVE_VL_5040: pass
arm64_sve-ptrace_Set_SVE_VL_5056: pass
arm64_sve-ptrace_Set_SVE_VL_5072: pass
arm64_sve-ptrace_Set_SVE_VL_5088: pass
arm64_sve-ptrace_Set_SVE_VL_5104: pass
arm64_sve-ptrace_Set_SVE_VL_512: pass
arm64_sve-ptrace_Set_SVE_VL_5120: pass
arm64_sve-ptrace_Set_SVE_VL_5136: pass
arm64_sve-ptrace_Set_SVE_VL_5152: pass
arm64_sve-ptrace_Set_SVE_VL_5168: pass
arm64_sve-ptrace_Set_SVE_VL_5184: pass
arm64_sve-ptrace_Set_SVE_VL_5200: pass
arm64_sve-ptrace_Set_SVE_VL_5216: pass
arm64_sve-ptrace_Set_SVE_VL_5232: pass
arm64_sve-ptrace_Set_SVE_VL_5248: pass
arm64_sve-ptrace_Set_SVE_VL_5264: pass
arm64_sve-ptrace_Set_SVE_VL_528: pass
arm64_sve-ptrace_Set_SVE_VL_5280: pass
arm64_sve-ptrace_Set_SVE_VL_5296: pass
arm64_sve-ptrace_Set_SVE_VL_5312: pass
arm64_sve-ptrace_Set_SVE_VL_5328: pass
arm64_sve-ptrace_Set_SVE_VL_5344: pass
arm64_sve-ptrace_Set_SVE_VL_5360: pass
arm64_sve-ptrace_Set_SVE_VL_5376: pass
arm64_sve-ptrace_Set_SVE_VL_5392: pass
arm64_sve-ptrace_Set_SVE_VL_5408: pass
arm64_sve-ptrace_Set_SVE_VL_5424: pass
arm64_sve-ptrace_Set_SVE_VL_544: pass
arm64_sve-ptrace_Set_SVE_VL_5440: pass
arm64_sve-ptrace_Set_SVE_VL_5456: pass
arm64_sve-ptrace_Set_SVE_VL_5472: pass
arm64_sve-ptrace_Set_SVE_VL_5488: pass
arm64_sve-ptrace_Set_SVE_VL_5504: pass
arm64_sve-ptrace_Set_SVE_VL_5520: pass
arm64_sve-ptrace_Set_SVE_VL_5536: pass
arm64_sve-ptrace_Set_SVE_VL_5552: pass
arm64_sve-ptrace_Set_SVE_VL_5568: pass
arm64_sve-ptrace_Set_SVE_VL_5584: pass
arm64_sve-ptrace_Set_SVE_VL_560: pass
arm64_sve-ptrace_Set_SVE_VL_5600: pass
arm64_sve-ptrace_Set_SVE_VL_5616: pass
arm64_sve-ptrace_Set_SVE_VL_5632: pass
arm64_sve-ptrace_Set_SVE_VL_5648: pass
arm64_sve-ptrace_Set_SVE_VL_5664: pass
arm64_sve-ptrace_Set_SVE_VL_5680: pass
arm64_sve-ptrace_Set_SVE_VL_5696: pass
arm64_sve-ptrace_Set_SVE_VL_5712: pass
arm64_sve-ptrace_Set_SVE_VL_5728: pass
arm64_sve-ptrace_Set_SVE_VL_5744: pass
arm64_sve-ptrace_Set_SVE_VL_576: pass
arm64_sve-ptrace_Set_SVE_VL_5760: pass
arm64_sve-ptrace_Set_SVE_VL_5776: pass
arm64_sve-ptrace_Set_SVE_VL_5792: pass
arm64_sve-ptrace_Set_SVE_VL_5808: pass
arm64_sve-ptrace_Set_SVE_VL_5824: pass
arm64_sve-ptrace_Set_SVE_VL_5840: pass
arm64_sve-ptrace_Set_SVE_VL_5856: pass
arm64_sve-ptrace_Set_SVE_VL_5872: pass
arm64_sve-ptrace_Set_SVE_VL_5888: pass
arm64_sve-ptrace_Set_SVE_VL_5904: pass
arm64_sve-ptrace_Set_SVE_VL_592: pass
arm64_sve-ptrace_Set_SVE_VL_5920: pass
arm64_sve-ptrace_Set_SVE_VL_5936: pass
arm64_sve-ptrace_Set_SVE_VL_5952: pass
arm64_sve-ptrace_Set_SVE_VL_5968: pass
arm64_sve-ptrace_Set_SVE_VL_5984: pass
arm64_sve-ptrace_Set_SVE_VL_6000: pass
arm64_sve-ptrace_Set_SVE_VL_6016: pass
arm64_sve-ptrace_Set_SVE_VL_6032: pass
arm64_sve-ptrace_Set_SVE_VL_6048: pass
arm64_sve-ptrace_Set_SVE_VL_6064: pass
arm64_sve-ptrace_Set_SVE_VL_608: pass
arm64_sve-ptrace_Set_SVE_VL_6080: pass
arm64_sve-ptrace_Set_SVE_VL_6096: pass
arm64_sve-ptrace_Set_SVE_VL_6112: pass
arm64_sve-ptrace_Set_SVE_VL_6128: pass
arm64_sve-ptrace_Set_SVE_VL_6144: pass
arm64_sve-ptrace_Set_SVE_VL_6160: pass
arm64_sve-ptrace_Set_SVE_VL_6176: pass
arm64_sve-ptrace_Set_SVE_VL_6192: pass
arm64_sve-ptrace_Set_SVE_VL_6208: pass
arm64_sve-ptrace_Set_SVE_VL_6224: pass
arm64_sve-ptrace_Set_SVE_VL_624: pass
arm64_sve-ptrace_Set_SVE_VL_6240: pass
arm64_sve-ptrace_Set_SVE_VL_6256: pass
arm64_sve-ptrace_Set_SVE_VL_6272: pass
arm64_sve-ptrace_Set_SVE_VL_6288: pass
arm64_sve-ptrace_Set_SVE_VL_6304: pass
arm64_sve-ptrace_Set_SVE_VL_6320: pass
arm64_sve-ptrace_Set_SVE_VL_6336: pass
arm64_sve-ptrace_Set_SVE_VL_6352: pass
arm64_sve-ptrace_Set_SVE_VL_6368: pass
arm64_sve-ptrace_Set_SVE_VL_6384: pass
arm64_sve-ptrace_Set_SVE_VL_64: pass
arm64_sve-ptrace_Set_SVE_VL_640: pass
arm64_sve-ptrace_Set_SVE_VL_6400: pass
arm64_sve-ptrace_Set_SVE_VL_6416: pass
arm64_sve-ptrace_Set_SVE_VL_6432: pass
arm64_sve-ptrace_Set_SVE_VL_6448: pass
arm64_sve-ptrace_Set_SVE_VL_6464: pass
arm64_sve-ptrace_Set_SVE_VL_6480: pass
arm64_sve-ptrace_Set_SVE_VL_6496: pass
arm64_sve-ptrace_Set_SVE_VL_6512: pass
arm64_sve-ptrace_Set_SVE_VL_6528: pass
arm64_sve-ptrace_Set_SVE_VL_6544: pass
arm64_sve-ptrace_Set_SVE_VL_656: pass
arm64_sve-ptrace_Set_SVE_VL_6560: pass
arm64_sve-ptrace_Set_SVE_VL_6576: pass
arm64_sve-ptrace_Set_SVE_VL_6592: pass
arm64_sve-ptrace_Set_SVE_VL_6608: pass
arm64_sve-ptrace_Set_SVE_VL_6624: pass
arm64_sve-ptrace_Set_SVE_VL_6640: pass
arm64_sve-ptrace_Set_SVE_VL_6656: pass
arm64_sve-ptrace_Set_SVE_VL_6672: pass
arm64_sve-ptrace_Set_SVE_VL_6688: pass
arm64_sve-ptrace_Set_SVE_VL_6704: pass
arm64_sve-ptrace_Set_SVE_VL_672: pass
arm64_sve-ptrace_Set_SVE_VL_6720: pass
arm64_sve-ptrace_Set_SVE_VL_6736: pass
arm64_sve-ptrace_Set_SVE_VL_6752: pass
arm64_sve-ptrace_Set_SVE_VL_6768: pass
arm64_sve-ptrace_Set_SVE_VL_6784: pass
arm64_sve-ptrace_Set_SVE_VL_6800: pass
arm64_sve-ptrace_Set_SVE_VL_6816: pass
arm64_sve-ptrace_Set_SVE_VL_6832: pass
arm64_sve-ptrace_Set_SVE_VL_6848: pass
arm64_sve-ptrace_Set_SVE_VL_6864: pass
arm64_sve-ptrace_Set_SVE_VL_688: pass
arm64_sve-ptrace_Set_SVE_VL_6880: pass
arm64_sve-ptrace_Set_SVE_VL_6896: pass
arm64_sve-ptrace_Set_SVE_VL_6912: pass
arm64_sve-ptrace_Set_SVE_VL_6928: pass
arm64_sve-ptrace_Set_SVE_VL_6944: pass
arm64_sve-ptrace_Set_SVE_VL_6960: pass
arm64_sve-ptrace_Set_SVE_VL_6976: pass
arm64_sve-ptrace_Set_SVE_VL_6992: pass
arm64_sve-ptrace_Set_SVE_VL_7008: pass
arm64_sve-ptrace_Set_SVE_VL_7024: pass
arm64_sve-ptrace_Set_SVE_VL_704: pass
arm64_sve-ptrace_Set_SVE_VL_7040: pass
arm64_sve-ptrace_Set_SVE_VL_7056: pass
arm64_sve-ptrace_Set_SVE_VL_7072: pass
arm64_sve-ptrace_Set_SVE_VL_7088: pass
arm64_sve-ptrace_Set_SVE_VL_7104: pass
arm64_sve-ptrace_Set_SVE_VL_7120: pass
arm64_sve-ptrace_Set_SVE_VL_7136: pass
arm64_sve-ptrace_Set_SVE_VL_7152: pass
arm64_sve-ptrace_Set_SVE_VL_7168: pass
arm64_sve-ptrace_Set_SVE_VL_7184: pass
arm64_sve-ptrace_Set_SVE_VL_720: pass
arm64_sve-ptrace_Set_SVE_VL_7200: pass
arm64_sve-ptrace_Set_SVE_VL_7216: pass
arm64_sve-ptrace_Set_SVE_VL_7232: pass
arm64_sve-ptrace_Set_SVE_VL_7248: pass
arm64_sve-ptrace_Set_SVE_VL_7264: pass
arm64_sve-ptrace_Set_SVE_VL_7280: pass
arm64_sve-ptrace_Set_SVE_VL_7296: pass
arm64_sve-ptrace_Set_SVE_VL_7312: pass
arm64_sve-ptrace_Set_SVE_VL_7328: pass
arm64_sve-ptrace_Set_SVE_VL_7344: pass
arm64_sve-ptrace_Set_SVE_VL_736: pass
arm64_sve-ptrace_Set_SVE_VL_7360: pass
arm64_sve-ptrace_Set_SVE_VL_7376: pass
arm64_sve-ptrace_Set_SVE_VL_7392: pass
arm64_sve-ptrace_Set_SVE_VL_7408: pass
arm64_sve-ptrace_Set_SVE_VL_7424: pass
arm64_sve-ptrace_Set_SVE_VL_7440: pass
arm64_sve-ptrace_Set_SVE_VL_7456: pass
arm64_sve-ptrace_Set_SVE_VL_7472: pass
arm64_sve-ptrace_Set_SVE_VL_7488: pass
arm64_sve-ptrace_Set_SVE_VL_7504: pass
arm64_sve-ptrace_Set_SVE_VL_752: pass
arm64_sve-ptrace_Set_SVE_VL_7520: pass
arm64_sve-ptrace_Set_SVE_VL_7536: pass
arm64_sve-ptrace_Set_SVE_VL_7552: pass
arm64_sve-ptrace_Set_SVE_VL_7568: pass
arm64_sve-ptrace_Set_SVE_VL_7584: pass
arm64_sve-ptrace_Set_SVE_VL_7600: pass
arm64_sve-ptrace_Set_SVE_VL_7616: pass
arm64_sve-ptrace_Set_SVE_VL_7632: pass
arm64_sve-ptrace_Set_SVE_VL_7648: pass
arm64_sve-ptrace_Set_SVE_VL_7664: pass
arm64_sve-ptrace_Set_SVE_VL_768: pass
arm64_sve-ptrace_Set_SVE_VL_7680: pass
arm64_sve-ptrace_Set_SVE_VL_7696: pass
arm64_sve-ptrace_Set_SVE_VL_7712: pass
arm64_sve-ptrace_Set_SVE_VL_7728: pass
arm64_sve-ptrace_Set_SVE_VL_7744: pass
arm64_sve-ptrace_Set_SVE_VL_7760: pass
arm64_sve-ptrace_Set_SVE_VL_7776: pass
arm64_sve-ptrace_Set_SVE_VL_7792: pass
arm64_sve-ptrace_Set_SVE_VL_7808: pass
arm64_sve-ptrace_Set_SVE_VL_7824: pass
arm64_sve-ptrace_Set_SVE_VL_784: pass
arm64_sve-ptrace_Set_SVE_VL_7840: pass
arm64_sve-ptrace_Set_SVE_VL_7856: pass
arm64_sve-ptrace_Set_SVE_VL_7872: pass
arm64_sve-ptrace_Set_SVE_VL_7888: pass
arm64_sve-ptrace_Set_SVE_VL_7904: pass
arm64_sve-ptrace_Set_SVE_VL_7920: pass
arm64_sve-ptrace_Set_SVE_VL_7936: pass
arm64_sve-ptrace_Set_SVE_VL_7952: pass
arm64_sve-ptrace_Set_SVE_VL_7968: pass
arm64_sve-ptrace_Set_SVE_VL_7984: pass
arm64_sve-ptrace_Set_SVE_VL_80: pass
arm64_sve-ptrace_Set_SVE_VL_800: pass
arm64_sve-ptrace_Set_SVE_VL_8000: pass
arm64_sve-ptrace_Set_SVE_VL_8016: pass
arm64_sve-ptrace_Set_SVE_VL_8032: pass
arm64_sve-ptrace_Set_SVE_VL_8048: pass
arm64_sve-ptrace_Set_SVE_VL_8064: pass
arm64_sve-ptrace_Set_SVE_VL_8080: pass
arm64_sve-ptrace_Set_SVE_VL_8096: pass
arm64_sve-ptrace_Set_SVE_VL_8112: pass
arm64_sve-ptrace_Set_SVE_VL_8128: pass
arm64_sve-ptrace_Set_SVE_VL_8144: pass
arm64_sve-ptrace_Set_SVE_VL_816: pass
arm64_sve-ptrace_Set_SVE_VL_8160: pass
arm64_sve-ptrace_Set_SVE_VL_8176: pass
arm64_sve-ptrace_Set_SVE_VL_8192: pass
arm64_sve-ptrace_Set_SVE_VL_832: pass
arm64_sve-ptrace_Set_SVE_VL_848: pass
arm64_sve-ptrace_Set_SVE_VL_864: pass
arm64_sve-ptrace_Set_SVE_VL_880: pass
arm64_sve-ptrace_Set_SVE_VL_896: pass
arm64_sve-ptrace_Set_SVE_VL_912: pass
arm64_sve-ptrace_Set_SVE_VL_928: pass
arm64_sve-ptrace_Set_SVE_VL_944: pass
arm64_sve-ptrace_Set_SVE_VL_96: pass
arm64_sve-ptrace_Set_SVE_VL_960: pass
arm64_sve-ptrace_Set_SVE_VL_976: pass
arm64_sve-ptrace_Set_SVE_VL_992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_48: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_80: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_96: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_992: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64: pass
arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0: pass
arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared: pass
arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set: pass
arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state: pass
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992: skip
arm64_sve_regs: pass
arm64_sve_vl: pass
arm64_syscall-abi: pass
arm64_syscall-abi_getpid_FPSIMD: pass
arm64_syscall-abi_getpid_SVE_VL_112: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16: pass
arm64_syscall-abi_getpid_SVE_VL_160: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_FPSIMD: pass
arm64_syscall-abi_sched_yield_SVE_VL_112: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16: pass
arm64_syscall-abi_sched_yield_SVE_VL_160: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA: pass
arm64_tags_test: pass
arm64_tpidr2: pass
arm64_tpidr2_default_value: pass
arm64_tpidr2_write_clone_read: pass
arm64_tpidr2_write_fork_read: pass
arm64_tpidr2_write_read: pass
arm64_tpidr2_write_sleep_read: pass
arm64_vec-syscfg: pass
arm64_vec-syscfg_SME_current_VL_is_32: pass
arm64_vec-syscfg_SME_default_vector_length_32: pass
arm64_vec-syscfg_SME_maximum_vector_length_256: pass
arm64_vec-syscfg_SME_minimum_vector_length_16: pass
arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors: pass
arm64_vec-syscfg_SME_prctl_set_min_max: pass
arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32: pass
arm64_vec-syscfg_SME_vector_length_set_on_exec: pass
arm64_vec-syscfg_SME_vector_length_used_default: pass
arm64_vec-syscfg_SME_vector_length_was_inherited: pass
arm64_vec-syscfg_SVE_current_VL_is_64: pass
arm64_vec-syscfg_SVE_default_vector_length_64: pass
arm64_vec-syscfg_SVE_maximum_vector_length_256: pass
arm64_vec-syscfg_SVE_minimum_vector_length_16: pass
arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors: pass
arm64_vec-syscfg_SVE_prctl_set_min_max: pass
arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64: pass
arm64_vec-syscfg_SVE_vector_length_set_on_exec: pass
arm64_vec-syscfg_SVE_vector_length_used_default: pass
arm64_vec-syscfg_SVE_vector_length_was_inherited: pass
arm64_za-fork: pass
arm64_za-fork_fork_test: pass
arm64_za-ptrace: pass
arm64_za-ptrace_Data_match_for_VL_128: pass
arm64_za-ptrace_Data_match_for_VL_16: pass
arm64_za-ptrace_Data_match_for_VL_256: pass
arm64_za-ptrace_Data_match_for_VL_32: pass
arm64_za-ptrace_Data_match_for_VL_64: pass
arm64_za-ptrace_Disabled_ZA_for_VL_1008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_128: pass
arm64_za-ptrace_Disabled_ZA_for_VL_1280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_16: pass
arm64_za-ptrace_Disabled_ZA_for_VL_160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_256: pass
arm64_za-ptrace_Disabled_ZA_for_VL_2560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_32: pass
arm64_za-ptrace_Disabled_ZA_for_VL_320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_48: skip
arm64_za-ptrace_Disabled_ZA_for_VL_480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_64: pass
arm64_za-ptrace_Disabled_ZA_for_VL_640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_80: skip
arm64_za-ptrace_Disabled_ZA_for_VL_800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_96: skip
arm64_za-ptrace_Disabled_ZA_for_VL_960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_48: skip
arm64_za-ptrace_Get_and_set_data_for_VL_480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_80: skip
arm64_za-ptrace_Get_and_set_data_for_VL_800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_96: skip
arm64_za-ptrace_Get_and_set_data_for_VL_960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_992: skip
arm64_za-ptrace_Set_VL_1008: pass
arm64_za-ptrace_Set_VL_1024: pass
arm64_za-ptrace_Set_VL_1040: pass
arm64_za-ptrace_Set_VL_1056: pass
arm64_za-ptrace_Set_VL_1072: pass
arm64_za-ptrace_Set_VL_1088: pass
arm64_za-ptrace_Set_VL_1104: pass
arm64_za-ptrace_Set_VL_112: pass
arm64_za-ptrace_Set_VL_1120: pass
arm64_za-ptrace_Set_VL_1136: pass
arm64_za-ptrace_Set_VL_1152: pass
arm64_za-ptrace_Set_VL_1168: pass
arm64_za-ptrace_Set_VL_1184: pass
arm64_za-ptrace_Set_VL_1200: pass
arm64_za-ptrace_Set_VL_1216: pass
arm64_za-ptrace_Set_VL_1232: pass
arm64_za-ptrace_Set_VL_1248: pass
arm64_za-ptrace_Set_VL_1264: pass
arm64_za-ptrace_Set_VL_128: pass
arm64_za-ptrace_Set_VL_1280: pass
arm64_za-ptrace_Set_VL_1296: pass
arm64_za-ptrace_Set_VL_1312: pass
arm64_za-ptrace_Set_VL_1328: pass
arm64_za-ptrace_Set_VL_1344: pass
arm64_za-ptrace_Set_VL_1360: pass
arm64_za-ptrace_Set_VL_1376: pass
arm64_za-ptrace_Set_VL_1392: pass
arm64_za-ptrace_Set_VL_1408: pass
arm64_za-ptrace_Set_VL_1424: pass
arm64_za-ptrace_Set_VL_144: pass
arm64_za-ptrace_Set_VL_1440: pass
arm64_za-ptrace_Set_VL_1456: pass
arm64_za-ptrace_Set_VL_1472: pass
arm64_za-ptrace_Set_VL_1488: pass
arm64_za-ptrace_Set_VL_1504: pass
arm64_za-ptrace_Set_VL_1520: pass
arm64_za-ptrace_Set_VL_1536: pass
arm64_za-ptrace_Set_VL_1552: pass
arm64_za-ptrace_Set_VL_1568: pass
arm64_za-ptrace_Set_VL_1584: pass
arm64_za-ptrace_Set_VL_16: pass
arm64_za-ptrace_Set_VL_160: pass
arm64_za-ptrace_Set_VL_1600: pass
arm64_za-ptrace_Set_VL_1616: pass
arm64_za-ptrace_Set_VL_1632: pass
arm64_za-ptrace_Set_VL_1648: pass
arm64_za-ptrace_Set_VL_1664: pass
arm64_za-ptrace_Set_VL_1680: pass
arm64_za-ptrace_Set_VL_1696: pass
arm64_za-ptrace_Set_VL_1712: pass
arm64_za-ptrace_Set_VL_1728: pass
arm64_za-ptrace_Set_VL_1744: pass
arm64_za-ptrace_Set_VL_176: pass
arm64_za-ptrace_Set_VL_1760: pass
arm64_za-ptrace_Set_VL_1776: pass
arm64_za-ptrace_Set_VL_1792: pass
arm64_za-ptrace_Set_VL_1808: pass
arm64_za-ptrace_Set_VL_1824: pass
arm64_za-ptrace_Set_VL_1840: pass
arm64_za-ptrace_Set_VL_1856: pass
arm64_za-ptrace_Set_VL_1872: pass
arm64_za-ptrace_Set_VL_1888: pass
arm64_za-ptrace_Set_VL_1904: pass
arm64_za-ptrace_Set_VL_192: pass
arm64_za-ptrace_Set_VL_1920: pass
arm64_za-ptrace_Set_VL_1936: pass
arm64_za-ptrace_Set_VL_1952: pass
arm64_za-ptrace_Set_VL_1968: pass
arm64_za-ptrace_Set_VL_1984: pass
arm64_za-ptrace_Set_VL_2000: pass
arm64_za-ptrace_Set_VL_2016: pass
arm64_za-ptrace_Set_VL_2032: pass
arm64_za-ptrace_Set_VL_2048: pass
arm64_za-ptrace_Set_VL_2064: pass
arm64_za-ptrace_Set_VL_208: pass
arm64_za-ptrace_Set_VL_2080: pass
arm64_za-ptrace_Set_VL_2096: pass
arm64_za-ptrace_Set_VL_2112: pass
arm64_za-ptrace_Set_VL_2128: pass
arm64_za-ptrace_Set_VL_2144: pass
arm64_za-ptrace_Set_VL_2160: pass
arm64_za-ptrace_Set_VL_2176: pass
arm64_za-ptrace_Set_VL_2192: pass
arm64_za-ptrace_Set_VL_2208: pass
arm64_za-ptrace_Set_VL_2224: pass
arm64_za-ptrace_Set_VL_224: pass
arm64_za-ptrace_Set_VL_2240: pass
arm64_za-ptrace_Set_VL_2256: pass
arm64_za-ptrace_Set_VL_2272: pass
arm64_za-ptrace_Set_VL_2288: pass
arm64_za-ptrace_Set_VL_2304: pass
arm64_za-ptrace_Set_VL_2320: pass
arm64_za-ptrace_Set_VL_2336: pass
arm64_za-ptrace_Set_VL_2352: pass
arm64_za-ptrace_Set_VL_2368: pass
arm64_za-ptrace_Set_VL_2384: pass
arm64_za-ptrace_Set_VL_240: pass
arm64_za-ptrace_Set_VL_2400: pass
arm64_za-ptrace_Set_VL_2416: pass
arm64_za-ptrace_Set_VL_2432: pass
arm64_za-ptrace_Set_VL_2448: pass
arm64_za-ptrace_Set_VL_2464: pass
arm64_za-ptrace_Set_VL_2480: pass
arm64_za-ptrace_Set_VL_2496: pass
arm64_za-ptrace_Set_VL_2512: pass
arm64_za-ptrace_Set_VL_2528: pass
arm64_za-ptrace_Set_VL_2544: pass
arm64_za-ptrace_Set_VL_256: pass
arm64_za-ptrace_Set_VL_2560: pass
arm64_za-ptrace_Set_VL_2576: pass
arm64_za-ptrace_Set_VL_2592: pass
arm64_za-ptrace_Set_VL_2608: pass
arm64_za-ptrace_Set_VL_2624: pass
arm64_za-ptrace_Set_VL_2640: pass
arm64_za-ptrace_Set_VL_2656: pass
arm64_za-ptrace_Set_VL_2672: pass
arm64_za-ptrace_Set_VL_2688: pass
arm64_za-ptrace_Set_VL_2704: pass
arm64_za-ptrace_Set_VL_272: pass
arm64_za-ptrace_Set_VL_2720: pass
arm64_za-ptrace_Set_VL_2736: pass
arm64_za-ptrace_Set_VL_2752: pass
arm64_za-ptrace_Set_VL_2768: pass
arm64_za-ptrace_Set_VL_2784: pass
arm64_za-ptrace_Set_VL_2800: pass
arm64_za-ptrace_Set_VL_2816: pass
arm64_za-ptrace_Set_VL_2832: pass
arm64_za-ptrace_Set_VL_2848: pass
arm64_za-ptrace_Set_VL_2864: pass
arm64_za-ptrace_Set_VL_288: pass
arm64_za-ptrace_Set_VL_2880: pass
arm64_za-ptrace_Set_VL_2896: pass
arm64_za-ptrace_Set_VL_2912: pass
arm64_za-ptrace_Set_VL_2928: pass
arm64_za-ptrace_Set_VL_2944: pass
arm64_za-ptrace_Set_VL_2960: pass
arm64_za-ptrace_Set_VL_2976: pass
arm64_za-ptrace_Set_VL_2992: pass
arm64_za-ptrace_Set_VL_3008: pass
arm64_za-ptrace_Set_VL_3024: pass
arm64_za-ptrace_Set_VL_304: pass
arm64_za-ptrace_Set_VL_3040: pass
arm64_za-ptrace_Set_VL_3056: pass
arm64_za-ptrace_Set_VL_3072: pass
arm64_za-ptrace_Set_VL_3088: pass
arm64_za-ptrace_Set_VL_3104: pass
arm64_za-ptrace_Set_VL_3120: pass
arm64_za-ptrace_Set_VL_3136: pass
arm64_za-ptrace_Set_VL_3152: pass
arm64_za-ptrace_Set_VL_3168: pass
arm64_za-ptrace_Set_VL_3184: pass
arm64_za-ptrace_Set_VL_32: pass
arm64_za-ptrace_Set_VL_320: pass
arm64_za-ptrace_Set_VL_3200: pass
arm64_za-ptrace_Set_VL_3216: pass
arm64_za-ptrace_Set_VL_3232: pass
arm64_za-ptrace_Set_VL_3248: pass
arm64_za-ptrace_Set_VL_3264: pass
arm64_za-ptrace_Set_VL_3280: pass
arm64_za-ptrace_Set_VL_3296: pass
arm64_za-ptrace_Set_VL_3312: pass
arm64_za-ptrace_Set_VL_3328: pass
arm64_za-ptrace_Set_VL_3344: pass
arm64_za-ptrace_Set_VL_336: pass
arm64_za-ptrace_Set_VL_3360: pass
arm64_za-ptrace_Set_VL_3376: pass
arm64_za-ptrace_Set_VL_3392: pass
arm64_za-ptrace_Set_VL_3408: pass
arm64_za-ptrace_Set_VL_3424: pass
arm64_za-ptrace_Set_VL_3440: pass
arm64_za-ptrace_Set_VL_3456: pass
arm64_za-ptrace_Set_VL_3472: pass
arm64_za-ptrace_Set_VL_3488: pass
arm64_za-ptrace_Set_VL_3504: pass
arm64_za-ptrace_Set_VL_352: pass
arm64_za-ptrace_Set_VL_3520: pass
arm64_za-ptrace_Set_VL_3536: pass
arm64_za-ptrace_Set_VL_3552: pass
arm64_za-ptrace_Set_VL_3568: pass
arm64_za-ptrace_Set_VL_3584: pass
arm64_za-ptrace_Set_VL_3600: pass
arm64_za-ptrace_Set_VL_3616: pass
arm64_za-ptrace_Set_VL_3632: pass
arm64_za-ptrace_Set_VL_3648: pass
arm64_za-ptrace_Set_VL_3664: pass
arm64_za-ptrace_Set_VL_368: pass
arm64_za-ptrace_Set_VL_3680: pass
arm64_za-ptrace_Set_VL_3696: pass
arm64_za-ptrace_Set_VL_3712: pass
arm64_za-ptrace_Set_VL_3728: pass
arm64_za-ptrace_Set_VL_3744: pass
arm64_za-ptrace_Set_VL_3760: pass
arm64_za-ptrace_Set_VL_3776: pass
arm64_za-ptrace_Set_VL_3792: pass
arm64_za-ptrace_Set_VL_3808: pass
arm64_za-ptrace_Set_VL_3824: pass
arm64_za-ptrace_Set_VL_384: pass
arm64_za-ptrace_Set_VL_3840: pass
arm64_za-ptrace_Set_VL_3856: pass
arm64_za-ptrace_Set_VL_3872: pass
arm64_za-ptrace_Set_VL_3888: pass
arm64_za-ptrace_Set_VL_3904: pass
arm64_za-ptrace_Set_VL_3920: pass
arm64_za-ptrace_Set_VL_3936: pass
arm64_za-ptrace_Set_VL_3952: pass
arm64_za-ptrace_Set_VL_3968: pass
arm64_za-ptrace_Set_VL_3984: pass
arm64_za-ptrace_Set_VL_400: pass
arm64_za-ptrace_Set_VL_4000: pass
arm64_za-ptrace_Set_VL_4016: pass
arm64_za-ptrace_Set_VL_4032: pass
arm64_za-ptrace_Set_VL_4048: pass
arm64_za-ptrace_Set_VL_4064: pass
arm64_za-ptrace_Set_VL_4080: pass
arm64_za-ptrace_Set_VL_4096: pass
arm64_za-ptrace_Set_VL_4112: pass
arm64_za-ptrace_Set_VL_4128: pass
arm64_za-ptrace_Set_VL_4144: pass
arm64_za-ptrace_Set_VL_416: pass
arm64_za-ptrace_Set_VL_4160: pass
arm64_za-ptrace_Set_VL_4176: pass
arm64_za-ptrace_Set_VL_4192: pass
arm64_za-ptrace_Set_VL_4208: pass
arm64_za-ptrace_Set_VL_4224: pass
arm64_za-ptrace_Set_VL_4240: pass
arm64_za-ptrace_Set_VL_4256: pass
arm64_za-ptrace_Set_VL_4272: pass
arm64_za-ptrace_Set_VL_4288: pass
arm64_za-ptrace_Set_VL_4304: pass
arm64_za-ptrace_Set_VL_432: pass
arm64_za-ptrace_Set_VL_4320: pass
arm64_za-ptrace_Set_VL_4336: pass
arm64_za-ptrace_Set_VL_4352: pass
arm64_za-ptrace_Set_VL_4368: pass
arm64_za-ptrace_Set_VL_4384: pass
arm64_za-ptrace_Set_VL_4400: pass
arm64_za-ptrace_Set_VL_4416: pass
arm64_za-ptrace_Set_VL_4432: pass
arm64_za-ptrace_Set_VL_4448: pass
arm64_za-ptrace_Set_VL_4464: pass
arm64_za-ptrace_Set_VL_448: pass
arm64_za-ptrace_Set_VL_4480: pass
arm64_za-ptrace_Set_VL_4496: pass
arm64_za-ptrace_Set_VL_4512: pass
arm64_za-ptrace_Set_VL_4528: pass
arm64_za-ptrace_Set_VL_4544: pass
arm64_za-ptrace_Set_VL_4560: pass
arm64_za-ptrace_Set_VL_4576: pass
arm64_za-ptrace_Set_VL_4592: pass
arm64_za-ptrace_Set_VL_4608: pass
arm64_za-ptrace_Set_VL_4624: pass
arm64_za-ptrace_Set_VL_464: pass
arm64_za-ptrace_Set_VL_4640: pass
arm64_za-ptrace_Set_VL_4656: pass
arm64_za-ptrace_Set_VL_4672: pass
arm64_za-ptrace_Set_VL_4688: pass
arm64_za-ptrace_Set_VL_4704: pass
arm64_za-ptrace_Set_VL_4720: pass
arm64_za-ptrace_Set_VL_4736: pass
arm64_za-ptrace_Set_VL_4752: pass
arm64_za-ptrace_Set_VL_4768: pass
arm64_za-ptrace_Set_VL_4784: pass
arm64_za-ptrace_Set_VL_48: pass
arm64_za-ptrace_Set_VL_480: pass
arm64_za-ptrace_Set_VL_4800: pass
arm64_za-ptrace_Set_VL_4816: pass
arm64_za-ptrace_Set_VL_4832: pass
arm64_za-ptrace_Set_VL_4848: pass
arm64_za-ptrace_Set_VL_4864: pass
arm64_za-ptrace_Set_VL_4880: pass
arm64_za-ptrace_Set_VL_4896: pass
arm64_za-ptrace_Set_VL_4912: pass
arm64_za-ptrace_Set_VL_4928: pass
arm64_za-ptrace_Set_VL_4944: pass
arm64_za-ptrace_Set_VL_496: pass
arm64_za-ptrace_Set_VL_4960: pass
arm64_za-ptrace_Set_VL_4976: pass
arm64_za-ptrace_Set_VL_4992: pass
arm64_za-ptrace_Set_VL_5008: pass
arm64_za-ptrace_Set_VL_5024: pass
arm64_za-ptrace_Set_VL_5040: pass
arm64_za-ptrace_Set_VL_5056: pass
arm64_za-ptrace_Set_VL_5072: pass
arm64_za-ptrace_Set_VL_5088: pass
arm64_za-ptrace_Set_VL_5104: pass
arm64_za-ptrace_Set_VL_512: pass
arm64_za-ptrace_Set_VL_5120: pass
arm64_za-ptrace_Set_VL_5136: pass
arm64_za-ptrace_Set_VL_5152: pass
arm64_za-ptrace_Set_VL_5168: pass
arm64_za-ptrace_Set_VL_5184: pass
arm64_za-ptrace_Set_VL_5200: pass
arm64_za-ptrace_Set_VL_5216: pass
arm64_za-ptrace_Set_VL_5232: pass
arm64_za-ptrace_Set_VL_5248: pass
arm64_za-ptrace_Set_VL_5264: pass
arm64_za-ptrace_Set_VL_528: pass
arm64_za-ptrace_Set_VL_5280: pass
arm64_za-ptrace_Set_VL_5296: pass
arm64_za-ptrace_Set_VL_5312: pass
arm64_za-ptrace_Set_VL_5328: pass
arm64_za-ptrace_Set_VL_5344: pass
arm64_za-ptrace_Set_VL_5360: pass
arm64_za-ptrace_Set_VL_5376: pass
arm64_za-ptrace_Set_VL_5392: pass
arm64_za-ptrace_Set_VL_5408: pass
arm64_za-ptrace_Set_VL_5424: pass
arm64_za-ptrace_Set_VL_544: pass
arm64_za-ptrace_Set_VL_5440: pass
arm64_za-ptrace_Set_VL_5456: pass
arm64_za-ptrace_Set_VL_5472: pass
arm64_za-ptrace_Set_VL_5488: pass
arm64_za-ptrace_Set_VL_5504: pass
arm64_za-ptrace_Set_VL_5520: pass
arm64_za-ptrace_Set_VL_5536: pass
arm64_za-ptrace_Set_VL_5552: pass
arm64_za-ptrace_Set_VL_5568: pass
arm64_za-ptrace_Set_VL_5584: pass
arm64_za-ptrace_Set_VL_560: pass
arm64_za-ptrace_Set_VL_5600: pass
arm64_za-ptrace_Set_VL_5616: pass
arm64_za-ptrace_Set_VL_5632: pass
arm64_za-ptrace_Set_VL_5648: pass
arm64_za-ptrace_Set_VL_5664: pass
arm64_za-ptrace_Set_VL_5680: pass
arm64_za-ptrace_Set_VL_5696: pass
arm64_za-ptrace_Set_VL_5712: pass
arm64_za-ptrace_Set_VL_5728: pass
arm64_za-ptrace_Set_VL_5744: pass
arm64_za-ptrace_Set_VL_576: pass
arm64_za-ptrace_Set_VL_5760: pass
arm64_za-ptrace_Set_VL_5776: pass
arm64_za-ptrace_Set_VL_5792: pass
arm64_za-ptrace_Set_VL_5808: pass
arm64_za-ptrace_Set_VL_5824: pass
arm64_za-ptrace_Set_VL_5840: pass
arm64_za-ptrace_Set_VL_5856: pass
arm64_za-ptrace_Set_VL_5872: pass
arm64_za-ptrace_Set_VL_5888: pass
arm64_za-ptrace_Set_VL_5904: pass
arm64_za-ptrace_Set_VL_592: pass
arm64_za-ptrace_Set_VL_5920: pass
arm64_za-ptrace_Set_VL_5936: pass
arm64_za-ptrace_Set_VL_5952: pass
arm64_za-ptrace_Set_VL_5968: pass
arm64_za-ptrace_Set_VL_5984: pass
arm64_za-ptrace_Set_VL_6000: pass
arm64_za-ptrace_Set_VL_6016: pass
arm64_za-ptrace_Set_VL_6032: pass
arm64_za-ptrace_Set_VL_6048: pass
arm64_za-ptrace_Set_VL_6064: pass
arm64_za-ptrace_Set_VL_608: pass
arm64_za-ptrace_Set_VL_6080: pass
arm64_za-ptrace_Set_VL_6096: pass
arm64_za-ptrace_Set_VL_6112: pass
arm64_za-ptrace_Set_VL_6128: pass
arm64_za-ptrace_Set_VL_6144: pass
arm64_za-ptrace_Set_VL_6160: pass
arm64_za-ptrace_Set_VL_6176: pass
arm64_za-ptrace_Set_VL_6192: pass
arm64_za-ptrace_Set_VL_6208: pass
arm64_za-ptrace_Set_VL_6224: pass
arm64_za-ptrace_Set_VL_624: pass
arm64_za-ptrace_Set_VL_6240: pass
arm64_za-ptrace_Set_VL_6256: pass
arm64_za-ptrace_Set_VL_6272: pass
arm64_za-ptrace_Set_VL_6288: pass
arm64_za-ptrace_Set_VL_6304: pass
arm64_za-ptrace_Set_VL_6320: pass
arm64_za-ptrace_Set_VL_6336: pass
arm64_za-ptrace_Set_VL_6352: pass
arm64_za-ptrace_Set_VL_6368: pass
arm64_za-ptrace_Set_VL_6384: pass
arm64_za-ptrace_Set_VL_64: pass
arm64_za-ptrace_Set_VL_640: pass
arm64_za-ptrace_Set_VL_6400: pass
arm64_za-ptrace_Set_VL_6416: pass
arm64_za-ptrace_Set_VL_6432: pass
arm64_za-ptrace_Set_VL_6448: pass
arm64_za-ptrace_Set_VL_6464: pass
arm64_za-ptrace_Set_VL_6480: pass
arm64_za-ptrace_Set_VL_6496: pass
arm64_za-ptrace_Set_VL_6512: pass
arm64_za-ptrace_Set_VL_6528: pass
arm64_za-ptrace_Set_VL_6544: pass
arm64_za-ptrace_Set_VL_656: pass
arm64_za-ptrace_Set_VL_6560: pass
arm64_za-ptrace_Set_VL_6576: pass
arm64_za-ptrace_Set_VL_6592: pass
arm64_za-ptrace_Set_VL_6608: pass
arm64_za-ptrace_Set_VL_6624: pass
arm64_za-ptrace_Set_VL_6640: pass
arm64_za-ptrace_Set_VL_6656: pass
arm64_za-ptrace_Set_VL_6672: pass
arm64_za-ptrace_Set_VL_6688: pass
arm64_za-ptrace_Set_VL_6704: pass
arm64_za-ptrace_Set_VL_672: pass
arm64_za-ptrace_Set_VL_6720: pass
arm64_za-ptrace_Set_VL_6736: pass
arm64_za-ptrace_Set_VL_6752: pass
arm64_za-ptrace_Set_VL_6768: pass
arm64_za-ptrace_Set_VL_6784: pass
arm64_za-ptrace_Set_VL_6800: pass
arm64_za-ptrace_Set_VL_6816: pass
arm64_za-ptrace_Set_VL_6832: pass
arm64_za-ptrace_Set_VL_6848: pass
arm64_za-ptrace_Set_VL_6864: pass
arm64_za-ptrace_Set_VL_688: pass
arm64_za-ptrace_Set_VL_6880: pass
arm64_za-ptrace_Set_VL_6896: pass
arm64_za-ptrace_Set_VL_6912: pass
arm64_za-ptrace_Set_VL_6928: pass
arm64_za-ptrace_Set_VL_6944: pass
arm64_za-ptrace_Set_VL_6960: pass
arm64_za-ptrace_Set_VL_6976: pass
arm64_za-ptrace_Set_VL_6992: pass
arm64_za-ptrace_Set_VL_7008: pass
arm64_za-ptrace_Set_VL_7024: pass
arm64_za-ptrace_Set_VL_704: pass
arm64_za-ptrace_Set_VL_7040: pass
arm64_za-ptrace_Set_VL_7056: pass
arm64_za-ptrace_Set_VL_7072: pass
arm64_za-ptrace_Set_VL_7088: pass
arm64_za-ptrace_Set_VL_7104: pass
arm64_za-ptrace_Set_VL_7120: pass
arm64_za-ptrace_Set_VL_7136: pass
arm64_za-ptrace_Set_VL_7152: pass
arm64_za-ptrace_Set_VL_7168: pass
arm64_za-ptrace_Set_VL_7184: pass
arm64_za-ptrace_Set_VL_720: pass
arm64_za-ptrace_Set_VL_7200: pass
arm64_za-ptrace_Set_VL_7216: pass
arm64_za-ptrace_Set_VL_7232: pass
arm64_za-ptrace_Set_VL_7248: pass
arm64_za-ptrace_Set_VL_7264: pass
arm64_za-ptrace_Set_VL_7280: pass
arm64_za-ptrace_Set_VL_7296: pass
arm64_za-ptrace_Set_VL_7312: pass
arm64_za-ptrace_Set_VL_7328: pass
arm64_za-ptrace_Set_VL_7344: pass
arm64_za-ptrace_Set_VL_736: pass
arm64_za-ptrace_Set_VL_7360: pass
arm64_za-ptrace_Set_VL_7376: pass
arm64_za-ptrace_Set_VL_7392: pass
arm64_za-ptrace_Set_VL_7408: pass
arm64_za-ptrace_Set_VL_7424: pass
arm64_za-ptrace_Set_VL_7440: pass
arm64_za-ptrace_Set_VL_7456: pass
arm64_za-ptrace_Set_VL_7472: pass
arm64_za-ptrace_Set_VL_7488: pass
arm64_za-ptrace_Set_VL_7504: pass
arm64_za-ptrace_Set_VL_752: pass
arm64_za-ptrace_Set_VL_7520: pass
arm64_za-ptrace_Set_VL_7536: pass
arm64_za-ptrace_Set_VL_7552: pass
arm64_za-ptrace_Set_VL_7568: pass
arm64_za-ptrace_Set_VL_7584: pass
arm64_za-ptrace_Set_VL_7600: pass
arm64_za-ptrace_Set_VL_7616: pass
arm64_za-ptrace_Set_VL_7632: pass
arm64_za-ptrace_Set_VL_7648: pass
arm64_za-ptrace_Set_VL_7664: pass
arm64_za-ptrace_Set_VL_768: pass
arm64_za-ptrace_Set_VL_7680: pass
arm64_za-ptrace_Set_VL_7696: pass
arm64_za-ptrace_Set_VL_7712: pass
arm64_za-ptrace_Set_VL_7728: pass
arm64_za-ptrace_Set_VL_7744: pass
arm64_za-ptrace_Set_VL_7760: pass
arm64_za-ptrace_Set_VL_7776: pass
arm64_za-ptrace_Set_VL_7792: pass
arm64_za-ptrace_Set_VL_7808: pass
arm64_za-ptrace_Set_VL_7824: pass
arm64_za-ptrace_Set_VL_784: pass
arm64_za-ptrace_Set_VL_7840: pass
arm64_za-ptrace_Set_VL_7856: pass
arm64_za-ptrace_Set_VL_7872: pass
arm64_za-ptrace_Set_VL_7888: pass
arm64_za-ptrace_Set_VL_7904: pass
arm64_za-ptrace_Set_VL_7920: pass
arm64_za-ptrace_Set_VL_7936: pass
arm64_za-ptrace_Set_VL_7952: pass
arm64_za-ptrace_Set_VL_7968: pass
arm64_za-ptrace_Set_VL_7984: pass
arm64_za-ptrace_Set_VL_80: pass
arm64_za-ptrace_Set_VL_800: pass
arm64_za-ptrace_Set_VL_8000: pass
arm64_za-ptrace_Set_VL_8016: pass
arm64_za-ptrace_Set_VL_8032: pass
arm64_za-ptrace_Set_VL_8048: pass
arm64_za-ptrace_Set_VL_8064: pass
arm64_za-ptrace_Set_VL_8080: pass
arm64_za-ptrace_Set_VL_8096: pass
arm64_za-ptrace_Set_VL_8112: pass
arm64_za-ptrace_Set_VL_8128: pass
arm64_za-ptrace_Set_VL_8144: pass
arm64_za-ptrace_Set_VL_816: pass
arm64_za-ptrace_Set_VL_8160: pass
arm64_za-ptrace_Set_VL_8176: pass
arm64_za-ptrace_Set_VL_8192: pass
arm64_za-ptrace_Set_VL_832: pass
arm64_za-ptrace_Set_VL_848: pass
arm64_za-ptrace_Set_VL_864: pass
arm64_za-ptrace_Set_VL_880: pass
arm64_za-ptrace_Set_VL_896: pass
arm64_za-ptrace_Set_VL_912: pass
arm64_za-ptrace_Set_VL_928: pass
arm64_za-ptrace_Set_VL_944: pass
arm64_za-ptrace_Set_VL_96: pass
arm64_za-ptrace_Set_VL_960: pass
arm64_za-ptrace_Set_VL_976: pass
arm64_za-ptrace_Set_VL_992: pass
arm64_za_no_regs: pass
arm64_za_regs: pass
34587 23:03:44.927677 end: 3.1 lava-test-shell (duration 00:05:26) [common]
34588 23:03:44.927784 end: 3 lava-test-retry (duration 00:05:26) [common]
34589 23:03:44.927875 start: 4 finalize (timeout 00:03:22) [common]
34590 23:03:44.927964 start: 4.1 power-off (timeout 00:00:30) [common]
34591 23:03:44.928045 end: 4.1 power-off (duration 00:00:00) [common]
34592 23:03:44.928124 start: 4.2 read-feedback (timeout 00:03:22) [common]
34593 23:03:44.928305 Listened to connection for namespace 'common' for up to 1s
34594 23:03:44.928584 Listened to connection for namespace 'common' for up to 1s
34595 23:03:45.933334 Finalising connection for namespace 'common'
34597 23:03:46.034337 / # poweroff
34598 23:03:46.034914 Already disconnected
34599 23:03:46.035069 poweroff
34600 23:03:46.437622 end: 4.2 read-feedback (duration 00:00:02) [common]
34601 23:03:46.437915 Already disconnected
34602 23:03:46.438083 end: 4 finalize (duration 00:00:02) [common]
34603 23:03:46.438257 Cleaning after the job
34604 23:03:46.438445 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/566315/deployimages-_2fpvrk7/kernel
34605 23:03:46.447266 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/566315/deployimages-_2fpvrk7/ramdisk
34606 23:03:46.463829 Stopping the qemu container lava-docker-qemu-566315-2.1.1-0og6kndn0a
34607 23:03:47.891944 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/566315
34608 23:03:47.984861 Job finished correctly