Boot log: qemu_arm64-virt-gicv3
- Errors: 0
- Kernel Errors: 0
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 4
1 22:56:41.376885 lava-dispatcher, installed at version: 2023.01
2 22:56:41.377077 start: 0 validate
3 22:56:41.377188 Start time: 2023-06-05 22:56:41.377181+00:00 (UTC)
4 22:56:41.378276 Validating that http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig/gcc-10/kernel/Image exists
5 22:56:41.732273 Validating that http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230527.0/arm64/rootfs.cpio.gz exists
6 22:56:41.909257 cmd: ['docker', 'pull', 'kernelci/qemu']
7 22:56:41.909494 Calling: 'nice' 'docker' 'pull' 'kernelci/qemu'
8 22:56:42.071528 >> Using default tag: latest
9 22:56:43.193190 >> latest: Pulling from kernelci/qemu
10 22:56:43.224899 >> Digest: sha256:fc85786d1b429cf64a5683fdc5d697be0f1ce54a15ccbe3e596ab02286b2b909
11 22:56:43.225072 >> Status: Image is up to date for kernelci/qemu:latest
12 22:56:43.258383 >> docker.io/kernelci/qemu:latest
13 22:56:43.262237 Returned 0 in 1 seconds
14 22:56:43.398405 cmd: ['docker', 'run', '--rm', '--init', 'kernelci/qemu', 'qemu-system-aarch64', '--version']
15 22:56:43.398704 Calling: 'nice' 'docker' 'run' '--rm' '--init' 'kernelci/qemu' 'qemu-system-aarch64' '--version'
16 22:56:45.378350 >> QEMU emulator version 7.2.2 (Debian 1:7.2+dfsg-7~bpo11+1)
17 22:56:45.378796 >> Copyright (c) 2003-2022 Fabrice Bellard and the QEMU Project developers
18 22:56:46.780309 Returned 0 in 3 seconds
19 22:56:46.881023 validate duration: 5.50
21 22:56:46.881594 start: 1 deployimages (timeout 00:03:00) [common]
22 22:56:46.881789 start: 1.1 lava-overlay (timeout 00:03:00) [common]
23 22:56:46.882234 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94
24 22:56:46.882491 makedir: /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin
25 22:56:46.882692 makedir: /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/tests
26 22:56:46.882887 makedir: /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/results
27 22:56:46.883089 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-add-keys
28 22:56:46.883347 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-add-sources
29 22:56:46.883587 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-background-process-start
30 22:56:46.883825 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-background-process-stop
31 22:56:46.884061 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-common-functions
32 22:56:46.884288 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-echo-ipv4
33 22:56:46.884518 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-install-packages
34 22:56:46.884747 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-installed-packages
35 22:56:46.884971 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-os-build
36 22:56:46.885208 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-probe-channel
37 22:56:46.885439 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-probe-ip
38 22:56:46.885685 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-target-ip
39 22:56:46.885922 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-target-mac
40 22:56:46.886153 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-target-storage
41 22:56:46.886386 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-test-case
42 22:56:46.886616 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-test-event
43 22:56:46.886845 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-test-feedback
44 22:56:46.887071 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-test-raise
45 22:56:46.887308 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-test-reference
46 22:56:46.887536 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-test-runner
47 22:56:46.887762 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-test-set
48 22:56:46.887987 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-test-shell
49 22:56:46.888229 Updating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-install-packages (oe)
50 22:56:46.888506 Updating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/bin/lava-installed-packages (oe)
51 22:56:46.888744 Creating /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/environment
52 22:56:46.888938 LAVA metadata
53 22:56:46.889075 - LAVA_JOB_ID=566287
54 22:56:46.889207 - LAVA_DISPATCHER_IP=172.27.0.2
55 22:56:46.889394 start: 1.1.1 lava-vland-overlay (timeout 00:03:00) [common]
56 22:56:46.889528 skipped lava-vland-overlay
57 22:56:46.889684 end: 1.1.1 lava-vland-overlay (duration 00:00:00) [common]
58 22:56:46.889839 start: 1.1.2 lava-multinode-overlay (timeout 00:03:00) [common]
59 22:56:46.889968 skipped lava-multinode-overlay
60 22:56:46.890110 end: 1.1.2 lava-multinode-overlay (duration 00:00:00) [common]
61 22:56:46.890261 start: 1.1.3 test-definition (timeout 00:03:00) [common]
62 22:56:46.890410 Loading test definitions
63 22:56:46.890587 start: 1.1.3.1 inline-repo-action (timeout 00:03:00) [common]
64 22:56:46.890730 Using /lava-566287 at stage 0
65 22:56:46.891314 uuid=566287_1.1.3.1 testdef=None
66 22:56:46.891489 end: 1.1.3.1 inline-repo-action (duration 00:00:00) [common]
67 22:56:46.891653 start: 1.1.3.2 test-overlay (timeout 00:03:00) [common]
68 22:56:46.892523 end: 1.1.3.2 test-overlay (duration 00:00:00) [common]
70 22:56:46.892989 start: 1.1.3.3 test-install-overlay (timeout 00:03:00) [common]
71 22:56:46.894055 end: 1.1.3.3 test-install-overlay (duration 00:00:00) [common]
73 22:56:46.894530 start: 1.1.3.4 test-runscript-overlay (timeout 00:03:00) [common]
74 22:56:46.912212 runner path: /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/0/tests/0_timesync-off test_uuid 566287_1.1.3.1
75 22:56:46.912490 end: 1.1.3.4 test-runscript-overlay (duration 00:00:00) [common]
77 22:56:46.912945 start: 1.1.3.5 git-repo-action (timeout 00:03:00) [common]
78 22:56:46.913079 Using /lava-566287 at stage 0
79 22:56:46.913264 Fetching tests from https://github.com/kernelci/test-definitions.git
80 22:56:46.913405 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/0/tests/1_kselftest-arm64_qemu'
81 22:56:49.515411 Running '/usr/bin/git checkout kernelci.org
82 22:56:49.684572 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/0/tests/1_kselftest-arm64_qemu/automated/linux/kselftest/kselftest.yaml
83 22:56:49.685718 uuid=566287_1.1.3.5 testdef=None
84 22:56:49.685960 end: 1.1.3.5 git-repo-action (duration 00:00:03) [common]
86 22:56:49.686436 start: 1.1.3.6 test-overlay (timeout 00:02:57) [common]
87 22:56:49.688153 end: 1.1.3.6 test-overlay (duration 00:00:00) [common]
89 22:56:49.688635 start: 1.1.3.7 test-install-overlay (timeout 00:02:57) [common]
90 22:56:49.690790 end: 1.1.3.7 test-install-overlay (duration 00:00:00) [common]
92 22:56:49.691303 start: 1.1.3.8 test-runscript-overlay (timeout 00:02:57) [common]
93 22:56:49.693364 runner path: /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/0/tests/1_kselftest-arm64_qemu test_uuid 566287_1.1.3.5
94 22:56:49.693542 BOARD='qemu_arm64-virt-gicv3'
95 22:56:49.693678 BRANCH='cip'
96 22:56:49.693798 SKIPFILE='/dev/null'
97 22:56:49.693915 SKIP_INSTALL='True'
98 22:56:49.694029 TESTPROG_URL='http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig/gcc-10/kselftest.tar.xz'
99 22:56:49.694152 TST_CASENAME=''
100 22:56:49.694269 TST_CMDFILES='arm64'
101 22:56:49.694540 end: 1.1.3.8 test-runscript-overlay (duration 00:00:00) [common]
103 22:56:49.694997 Creating lava-test-runner.conf files
104 22:56:49.695123 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/566287/lava-overlay-r9mzcc94/lava-566287/0 for stage 0
105 22:56:49.695299 - 0_timesync-off
106 22:56:49.695434 - 1_kselftest-arm64_qemu
107 22:56:49.695611 end: 1.1.3 test-definition (duration 00:00:03) [common]
108 22:56:49.695779 start: 1.1.4 compress-overlay (timeout 00:02:57) [common]
109 22:56:58.389621 end: 1.1.4 compress-overlay (duration 00:00:09) [common]
110 22:56:58.389853 start: 1.1.5 persistent-nfs-overlay (timeout 00:02:48) [common]
111 22:56:58.389973 end: 1.1.5 persistent-nfs-overlay (duration 00:00:00) [common]
112 22:56:58.390089 end: 1.1 lava-overlay (duration 00:00:12) [common]
113 22:56:58.390190 start: 1.2 apply-overlay-guest (timeout 00:02:48) [common]
114 22:56:58.390274 Overlay: /var/lib/lava/dispatcher/tmp/566287/compress-overlay-t3dfxcue/overlay-1.1.4.tar.gz
115 22:57:13.367029 end: 1.2 apply-overlay-guest (duration 00:00:15) [common]
117 22:57:13.367607 start: 1.3 deploy-device-env (timeout 00:02:34) [common]
118 22:57:13.367714 end: 1.3 deploy-device-env (duration 00:00:00) [common]
119 22:57:13.367819 start: 1.4 download-retry (timeout 00:02:34) [common]
120 22:57:13.367931 start: 1.4.1 http-download (timeout 00:02:34) [common]
121 22:57:13.368143 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig/gcc-10/kernel/Image
122 22:57:13.368232 saving as /var/lib/lava/dispatcher/tmp/566287/deployimages-7l7yzo33/kernel/Image
123 22:57:13.368312 total size: 37358080 (35MB)
124 22:57:13.368395 No compression specified
125 22:57:13.720357 progress 0% (0MB)
126 22:57:14.771509 progress 5% (1MB)
127 22:57:15.123422 progress 10% (3MB)
128 22:57:15.136515 progress 15% (5MB)
129 22:57:15.492814 progress 20% (7MB)
130 22:57:15.672829 progress 25% (8MB)
131 22:57:15.844155 progress 30% (10MB)
132 22:57:16.021432 progress 35% (12MB)
133 22:57:16.203349 progress 40% (14MB)
134 22:57:16.380465 progress 45% (16MB)
135 22:57:16.557281 progress 50% (17MB)
136 22:57:16.734095 progress 55% (19MB)
137 22:57:16.917717 progress 60% (21MB)
138 22:57:17.094088 progress 65% (23MB)
139 22:57:17.274000 progress 70% (24MB)
140 22:57:17.591223 progress 75% (26MB)
141 22:57:17.767211 progress 80% (28MB)
142 22:57:17.943095 progress 85% (30MB)
143 22:57:18.118420 progress 90% (32MB)
144 22:57:18.293590 progress 95% (33MB)
145 22:57:18.468381 progress 100% (35MB)
146 22:57:18.468611 35MB downloaded in 5.10s (6.99MB/s)
147 22:57:18.468892 end: 1.4.1 http-download (duration 00:00:05) [common]
149 22:57:18.469434 end: 1.4 download-retry (duration 00:00:05) [common]
150 22:57:18.469598 start: 1.5 download-retry (timeout 00:02:28) [common]
151 22:57:18.469774 start: 1.5.1 http-download (timeout 00:02:28) [common]
152 22:57:18.469993 Not decompressing ramdisk as can be used compressed.
153 22:57:18.470157 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230527.0/arm64/rootfs.cpio.gz
154 22:57:18.470280 saving as /var/lib/lava/dispatcher/tmp/566287/deployimages-7l7yzo33/ramdisk/rootfs.cpio.gz
155 22:57:18.470435 total size: 88976554 (84MB)
156 22:57:18.470589 No compression specified
157 22:57:18.647575 progress 0% (0MB)
158 22:57:19.004660 progress 5% (4MB)
159 22:57:19.365603 progress 10% (8MB)
160 22:57:19.721769 progress 15% (12MB)
161 22:57:20.241781 progress 20% (17MB)
162 22:57:20.601869 progress 25% (21MB)
163 22:57:20.957355 progress 30% (25MB)
164 22:57:21.450549 progress 35% (29MB)
165 22:57:21.826782 progress 40% (33MB)
166 22:57:22.184947 progress 45% (38MB)
167 22:57:22.539750 progress 50% (42MB)
168 22:57:22.894812 progress 55% (46MB)
169 22:57:23.413421 progress 60% (50MB)
170 22:57:23.769173 progress 65% (55MB)
171 22:57:24.124314 progress 70% (59MB)
172 22:57:24.479516 progress 75% (63MB)
173 22:57:24.981166 progress 80% (67MB)
174 22:57:25.357132 progress 85% (72MB)
175 22:57:25.712050 progress 90% (76MB)
176 22:57:26.067456 progress 95% (80MB)
177 22:57:26.431663 progress 100% (84MB)
178 22:57:26.431988 84MB downloaded in 7.96s (10.66MB/s)
179 22:57:26.432204 end: 1.5.1 http-download (duration 00:00:08) [common]
181 22:57:26.432587 end: 1.5 download-retry (duration 00:00:08) [common]
182 22:57:26.432718 end: 1 deployimages (duration 00:00:40) [common]
183 22:57:26.432851 start: 2 boot-image-retry (timeout 00:05:00) [common]
184 22:57:26.432970 start: 2.1 boot-qemu-image (timeout 00:05:00) [common]
185 22:57:26.433092 start: 2.1.1 execute-qemu (timeout 00:05:00) [common]
186 22:57:26.433387 Extending command line for qcow2 test overlay
187 22:57:26.433851 Pulling docker image
188 22:57:26.433973 cmd: ['docker', 'pull', 'kernelci/qemu']
189 22:57:26.434078 Calling: 'nice' 'docker' 'pull' 'kernelci/qemu'
190 22:57:26.596690 >> Using default tag: latest
191 22:57:27.727132 >> latest: Pulling from kernelci/qemu
192 22:57:27.879784 >> Digest: sha256:fc85786d1b429cf64a5683fdc5d697be0f1ce54a15ccbe3e596ab02286b2b909
193 22:57:27.880057 >> Status: Image is up to date for kernelci/qemu:latest
194 22:57:27.971376 >> docker.io/kernelci/qemu:latest
195 22:57:27.974865 Returned 0 in 1 seconds
196 22:57:28.110712 Boot command: docker run --network=host --cap-add=NET_ADMIN --interactive --tty --rm --init --name=lava-docker-qemu-566287-2.1.1-ns0d7d0k4f --mount=type=bind,source=/var/lib/lava/dispatcher/tmp,destination=/var/lib/lava/dispatcher/tmp kernelci/qemu qemu-system-aarch64 -cpu max,pauth-impdef=on -machine virt,gic-version=3,mte=on,accel=tcg -nographic -net nic,model=virtio,macaddr=52:54:00:12:34:58 -net user -m 1g -monitor none -kernel /var/lib/lava/dispatcher/tmp/566287/deployimages-7l7yzo33/kernel/Image -append "console=ttyAMA0,115200 root=/dev/ram0 debug verbose console_msg_format=syslog earlycon" -initrd /var/lib/lava/dispatcher/tmp/566287/deployimages-7l7yzo33/ramdisk/rootfs.cpio.gz -drive format=qcow2,file=/var/lib/lava/dispatcher/tmp/566287/apply-overlay-guest-hn61vk_d/lava-guest.qcow2,media=disk,if=virtio,id=lavatest
197 22:57:28.244741 started a shell command
198 22:57:28.245325 end: 2.1.1 execute-qemu (duration 00:00:02) [common]
199 22:57:28.245477 end: 2.1 boot-qemu-image (duration 00:00:02) [common]
200 22:57:28.245622 start: 2.2 auto-login-action (timeout 00:04:58) [common]
201 22:57:28.245765 Setting prompt string to ['Linux version [0-9]']
202 22:57:28.245877 auto-login-action: Wait for prompt ['Linux version [0-9]'] (timeout 00:05:00)
203 22:57:30.070384 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x000f0510]
204 22:57:30.071158 start: 2.2.1 login-action (timeout 00:04:56) [common]
205 22:57:30.071289 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
206 22:57:30.071425 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
207 22:57:30.071549 Using line separator: #'\n'#
208 22:57:30.071645 No login prompt set.
209 22:57:30.071739 Parsing kernel messages
210 22:57:30.071829 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
211 22:57:30.071998 [login-action] Waiting for messages, (timeout 00:04:56)
212 22:57:30.072925 [ 0.000000] Linux version 6.1.31 (KernelCI@build-j1612555-arm64-gcc-10-defconfig-nxrtt) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Mon Jun 5 22:38:01 UTC 2023
213 22:57:30.073045 [ 0.000000] random: crng init done
214 22:57:30.073137 [ 0.000000] Machine model: linux,dummy-virt
215 22:57:30.073226 [ 0.000000] efi: UEFI not found.
216 22:57:30.073362 [ 0.000000] earlycon: pl11 at MMIO 0x0000000009000000 (options '')
217 22:57:30.073466 [ 0.000000] printk: bootconsole [pl11] enabled
218 22:57:30.076215 [ 0.000000] NUMA: No NUMA configuration found
219 22:57:30.076548 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000007fffffff]
220 22:57:30.077175 [ 0.000000] NUMA: NODE_DATA [mem 0x7fdf2a00-0x7fdf4fff]
221 22:57:30.079503 [ 0.000000] Zone ranges:
222 22:57:30.080333 [ 0.000000] DMA [mem 0x0000000040000000-0x000000007fffffff]
223 22:57:30.080649 [ 0.000000] DMA32 empty
224 22:57:30.080755 [ 0.000000] Normal empty
225 22:57:30.080849 [ 0.000000] Movable zone start for each node
226 22:57:30.080937 [ 0.000000] Early memory node ranges
227 22:57:30.081042 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000007fffffff]
228 22:57:30.081541 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000007fffffff]
229 22:57:30.096722 [ 0.000000] cma: Reserved 32 MiB at 0x000000007cc00000
230 22:57:30.097910 [ 0.000000] psci: probing for conduit method from DT.
231 22:57:30.098234 [ 0.000000] psci: PSCIv1.1 detected in firmware.
232 22:57:30.098333 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
233 22:57:30.098644 [ 0.000000] psci: Trusted OS migration not required
234 22:57:30.098765 [ 0.000000] psci: SMC Calling Convention v1.0
235 22:57:30.101190 [ 0.000000] percpu: Embedded 20 pages/cpu s44840 r8192 d28888 u81920
236 22:57:30.101525 [ 0.000000] pcpu-alloc: s44840 r8192 d28888 u81920 alloc=20*4096
237 22:57:30.101765 [ 0.000000] pcpu-alloc: [0] 0
238 22:57:30.103336 [ 0.000000] Detected PIPT I-cache on CPU0
239 22:57:30.108615 [ 0.000000] CPU features: detected: Address authentication (IMP DEF algorithm)
240 22:57:30.109264 [ 0.000000] CPU features: detected: GIC system register CPU interface
241 22:57:30.109489 [ 0.000000] CPU features: detected: Hardware dirty bit management
242 22:57:30.109933 [ 0.000000] CPU features: detected: Memory Tagging Extension
243 22:57:30.110134 [ 0.000000] CPU features: detected: Asymmetric MTE Tag Check Fault
244 22:57:30.110306 [ 0.000000] CPU features: detected: Spectre-v4
245 22:57:30.113964 [ 0.000000] alternatives: applying boot alternatives
246 22:57:30.116720 [ 0.000000] Fallback order for Node 0: 0
247 22:57:30.117171 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 258048
248 22:57:30.117351 [ 0.000000] Policy zone: DMA
249 22:57:30.117582 [ 0.000000] Kernel command line: console=ttyAMA0,115200 root=/dev/ram0 debug verbose console_msg_format=syslog earlycon
250 22:57:30.120191 <5>[ 0.000000] Unknown kernel command line parameters \"verbose\", will be passed to user space.
251 22:57:30.122720 <6>[ 0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
252 22:57:30.123199 <6>[ 0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
253 22:57:30.123412 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
254 22:57:30.132840 <6>[ 0.000000] Memory: 870672K/1048576K available (16192K kernel code, 3714K rwdata, 8860K rodata, 7552K init, 609K bss, 145136K reserved, 32768K cma-reserved)
255 22:57:30.138747 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
256 22:57:30.146185 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
257 22:57:30.146404 <6>[ 0.000000] rcu: RCU event tracing is enabled.
258 22:57:30.146647 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=1.
259 22:57:30.146813 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
260 22:57:30.147010 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
261 22:57:30.147209 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
262 22:57:30.147359 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
263 22:57:30.148373 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
264 22:57:30.155649 <6>[ 0.000000] GICv3: 224 SPIs implemented
265 22:57:30.155835 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
266 22:57:30.157503 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
267 22:57:30.157946 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
268 22:57:30.158448 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x00000000080a0000
269 22:57:30.163142 <6>[ 0.000000] ITS [mem 0x08080000-0x0809ffff]
270 22:57:30.164185 <6>[ 0.000000] ITS@0x0000000008080000: allocated 8192 Devices @42830000 (indirect, esz 8, psz 64K, shr 1)
271 22:57:30.164617 <6>[ 0.000000] ITS@0x0000000008080000: allocated 8192 Interrupt Collections @42840000 (flat, esz 8, psz 64K, shr 1)
272 22:57:30.165309 <6>[ 0.000000] GICv3: using LPI property table @0x0000000042850000
273 22:57:30.166184 <6>[ 0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000042860000
274 22:57:30.167340 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
275 22:57:30.178222 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 62.50MHz (virt).
276 22:57:30.178710 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0x1ffffffffffffff max_cycles: 0x1cd42e208c, max_idle_ns: 881590405314 ns
277 22:57:30.179470 <6>[ 0.000076] sched_clock: 57 bits at 63MHz, resolution 16ns, wraps every 4398046511096ns
278 22:57:30.197033 <6>[ 0.015046] Console: colour dummy device 80x25
279 22:57:30.201236 <6>[ 0.021233] Calibrating delay loop (skipped), value calculated using timer frequency.. 125.00 BogoMIPS (lpj=250000)
280 22:57:30.201488 <6>[ 0.022382] pid_max: default: 32768 minimum: 301
281 22:57:30.202841 <6>[ 0.023601] LSM: Security Framework initializing
282 22:57:30.206971 <6>[ 0.027780] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
283 22:57:30.207457 <6>[ 0.028043] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
284 22:57:30.243914 <4>[ 0.064473] cacheinfo: Unable to detect cache hierarchy for CPU 0
285 22:57:30.251057 <6>[ 0.071517] cblist_init_generic: Setting adjustable number of callback queues.
286 22:57:30.251257 <6>[ 0.071910] cblist_init_generic: Setting shift to 0 and lim to 1.
287 22:57:30.251781 <6>[ 0.072624] cblist_init_generic: Setting shift to 0 and lim to 1.
288 22:57:30.253989 <6>[ 0.074867] rcu: Hierarchical SRCU implementation.
289 22:57:30.254480 <6>[ 0.075051] rcu: Max phase no-delay instances is 1000.
290 22:57:30.259512 <6>[ 0.080358] Platform MSI: its@8080000 domain created
291 22:57:30.260332 <6>[ 0.081022] PCI/MSI: /intc@8000000/its@8080000 domain created
292 22:57:30.262089 <6>[ 0.082746] fsl-mc MSI: its@8080000 domain created
293 22:57:30.264882 <6>[ 0.085511] EFI services will not be available.
294 22:57:30.266081 <6>[ 0.086975] smp: Bringing up secondary CPUs ...
295 22:57:30.266503 <6>[ 0.087235] smp: Brought up 1 node, 1 CPU
296 22:57:30.266621 <6>[ 0.087395] SMP: Total of 1 processors activated.
297 22:57:30.266969 <6>[ 0.087768] CPU features: detected: Branch Target Identification
298 22:57:30.267349 <6>[ 0.088015] CPU features: detected: 32-bit EL0 Support
299 22:57:30.267468 <6>[ 0.088173] CPU features: detected: 32-bit EL1 Support
300 22:57:30.267581 <6>[ 0.088303] CPU features: detected: ARMv8.4 Translation Table Level
301 22:57:30.267701 <6>[ 0.088508] CPU features: detected: Data cache clean to the PoU not required for I/D coherence
302 22:57:30.267904 <6>[ 0.088769] CPU features: detected: Common not Private translations
303 22:57:30.268339 <6>[ 0.088951] CPU features: detected: CRC32 instructions
304 22:57:30.268558 <6>[ 0.089104] CPU features: detected: E0PD
305 22:57:30.268819 <6>[ 0.089331] CPU features: detected: Generic authentication (IMP DEF algorithm)
306 22:57:30.268994 <6>[ 0.089558] CPU features: detected: RCpc load-acquire (LDAPR)
307 22:57:30.269227 <6>[ 0.089708] CPU features: detected: LSE atomic instructions
308 22:57:30.269431 <6>[ 0.090017] CPU features: detected: Privileged Access Never
309 22:57:30.269687 <6>[ 0.090214] CPU features: detected: RAS Extension Support
310 22:57:30.269879 <6>[ 0.090354] CPU features: detected: Random Number Generator
311 22:57:30.270042 <6>[ 0.090510] CPU features: detected: Speculation barrier (SB)
312 22:57:30.270241 <6>[ 0.090644] CPU features: detected: Stage-2 Force Write-Back
313 22:57:30.270415 <6>[ 0.090798] CPU features: detected: TLB range maintenance instructions
314 22:57:30.270601 <6>[ 0.090993] CPU features: detected: Scalable Matrix Extension
315 22:57:30.270738 <6>[ 0.091129] CPU features: detected: FA64
316 22:57:30.270919 <6>[ 0.091219] CPU features: detected: Speculative Store Bypassing Safe (SSBS)
317 22:57:30.271064 <6>[ 0.091418] CPU features: detected: Scalable Vector Extension
318 22:57:30.282221 <6>[ 0.100185] SVE: maximum available vector length 256 bytes per vector
319 22:57:30.282806 <6>[ 0.103610] SVE: default vector length 64 bytes per vector
320 22:57:30.284973 <6>[ 0.105554] SME: minimum available vector length 16 bytes per vector
321 22:57:30.285162 <6>[ 0.105771] SME: maximum available vector length 256 bytes per vector
322 22:57:30.285324 <6>[ 0.105996] SME: default vector length 32 bytes per vector
323 22:57:30.285735 <6>[ 0.106516] CPU: All CPU(s) started at EL1
324 22:57:30.286700 <6>[ 0.107320] alternatives: applying system-wide alternatives
325 22:57:30.341593 <6>[ 0.162141] devtmpfs: initialized
326 22:57:30.363322 <6>[ 0.183797] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
327 22:57:30.363980 <6>[ 0.184773] futex hash table entries: 256 (order: 2, 16384 bytes, linear)
328 22:57:30.370342 <6>[ 0.191001] pinctrl core: initialized pinctrl subsystem
329 22:57:30.382191 <6>[ 0.202808] DMI not present or invalid.
330 22:57:30.391883 <6>[ 0.212469] NET: Registered PF_NETLINK/PF_ROUTE protocol family
331 22:57:30.403936 <6>[ 0.224452] DMA: preallocated 128 KiB GFP_KERNEL pool for atomic allocations
332 22:57:30.404973 <6>[ 0.225527] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
333 22:57:30.405554 <6>[ 0.226290] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
334 22:57:30.406097 <6>[ 0.226938] audit: initializing netlink subsys (disabled)
335 22:57:30.414020 <5>[ 0.234696] audit: type=2000 audit(0.192:1): state=initialized audit_enabled=0 res=1
336 22:57:30.415191 <6>[ 0.235869] thermal_sys: Registered thermal governor 'step_wise'
337 22:57:30.415769 <6>[ 0.235943] thermal_sys: Registered thermal governor 'power_allocator'
338 22:57:30.415854 <6>[ 0.236558] cpuidle: using governor menu
339 22:57:30.417780 <6>[ 0.238450] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
340 22:57:30.418269 <6>[ 0.239165] ASID allocator initialised with 65536 entries
341 22:57:30.424832 <6>[ 0.245762] Serial: AMBA PL011 UART driver
342 22:57:30.477473 <6>[ 0.298086] 9000000.pl011: ttyAMA0 at MMIO 0x9000000 (irq = 13, base_baud = 0) is a PL011 rev1
343 22:57:30.479120 <6>[ 0.299890] printk: console [ttyAMA0] enabled
344 22:57:30.479595 <6>[ 0.299890] printk: console [ttyAMA0] enabled
345 22:57:30.479712 <6>[ 0.300335] printk: bootconsole [pl11] disabled
346 22:57:30.479818 <6>[ 0.300335] printk: bootconsole [pl11] disabled
347 22:57:30.490993 <6>[ 0.311902] KASLR enabled
348 22:57:30.528947 <6>[ 0.349777] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
349 22:57:30.529472 <6>[ 0.349983] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
350 22:57:30.529700 <6>[ 0.350141] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
351 22:57:30.529913 <6>[ 0.350310] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
352 22:57:30.530107 <6>[ 0.350502] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
353 22:57:30.530283 <6>[ 0.350698] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
354 22:57:30.530460 <6>[ 0.350881] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
355 22:57:30.530636 <6>[ 0.351081] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
356 22:57:30.540519 <6>[ 0.361403] ACPI: Interpreter disabled.
357 22:57:30.549183 <6>[ 0.370063] iommu: Default domain type: Translated
358 22:57:30.549678 <6>[ 0.370225] iommu: DMA domain TLB invalidation policy: strict mode
359 22:57:30.551225 <5>[ 0.371868] SCSI subsystem initialized
360 22:57:30.551838 <7>[ 0.372698] libata version 3.00 loaded.
361 22:57:30.553240 <6>[ 0.374121] usbcore: registered new interface driver usbfs
362 22:57:30.553688 <6>[ 0.374495] usbcore: registered new interface driver hub
363 22:57:30.554189 <6>[ 0.374809] usbcore: registered new device driver usb
364 22:57:30.557392 <6>[ 0.378224] pps_core: LinuxPPS API ver. 1 registered
365 22:57:30.557872 <6>[ 0.378351] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
366 22:57:30.558045 <6>[ 0.378650] PTP clock support registered
367 22:57:30.558514 <6>[ 0.379283] EDAC MC: Ver: 3.0.0
368 22:57:30.563993 <6>[ 0.384887] FPGA manager framework
369 22:57:30.565119 <6>[ 0.385763] Advanced Linux Sound Architecture Driver Initialized.
370 22:57:30.574193 <6>[ 0.395059] vgaarb: loaded
371 22:57:30.578513 <6>[ 0.399133] clocksource: Switched to clocksource arch_sys_counter
372 22:57:30.579495 <5>[ 0.400390] VFS: Disk quotas dquot_6.6.0
373 22:57:30.579990 <6>[ 0.400753] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
374 22:57:30.583705 <6>[ 0.404582] pnp: PnP ACPI: disabled
375 22:57:30.604327 <6>[ 0.425163] NET: Registered PF_INET protocol family
376 22:57:30.607046 <6>[ 0.427612] IP idents hash table entries: 16384 (order: 5, 131072 bytes, linear)
377 22:57:30.612052 <6>[ 0.432845] tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes, linear)
378 22:57:30.612676 <6>[ 0.433148] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
379 22:57:30.612846 <6>[ 0.433433] TCP established hash table entries: 8192 (order: 4, 65536 bytes, linear)
380 22:57:30.613098 <6>[ 0.433863] TCP bind hash table entries: 8192 (order: 6, 262144 bytes, linear)
381 22:57:30.613573 <6>[ 0.434419] TCP: Hash tables configured (established 8192 bind 8192)
382 22:57:30.615062 <6>[ 0.435759] UDP hash table entries: 512 (order: 2, 16384 bytes, linear)
383 22:57:30.615419 <6>[ 0.436168] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear)
384 22:57:30.616514 <6>[ 0.437371] NET: Registered PF_UNIX/PF_LOCAL protocol family
385 22:57:30.619326 <6>[ 0.439918] RPC: Registered named UNIX socket transport module.
386 22:57:30.619558 <6>[ 0.440171] RPC: Registered udp transport module.
387 22:57:30.619758 <6>[ 0.440356] RPC: Registered tcp transport module.
388 22:57:30.619978 <6>[ 0.440545] RPC: Registered tcp NFSv4.1 backchannel transport module.
389 22:57:30.620124 <6>[ 0.440859] PCI: CLS 0 bytes, default 64
390 22:57:30.624821 <6>[ 0.445700] Unpacking initramfs...
391 22:57:30.634823 <6>[ 0.455387] hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 counters available
392 22:57:30.635456 <6>[ 0.456278] kvm [1]: HYP mode not available
393 22:57:30.643968 <5>[ 0.464732] Initialise system trusted keyrings
394 22:57:30.645728 <6>[ 0.466367] workingset: timestamp_bits=42 max_order=18 bucket_order=0
395 22:57:30.690932 <6>[ 0.511604] squashfs: version 4.0 (2009/01/31) Phillip Lougher
396 22:57:30.695945 <5>[ 0.516464] NFS: Registering the id_resolver key type
397 22:57:30.696183 <5>[ 0.516984] Key type id_resolver registered
398 22:57:30.696308 <5>[ 0.517178] Key type id_legacy registered
399 22:57:30.697063 <6>[ 0.517761] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
400 22:57:30.697348 <6>[ 0.518111] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
401 22:57:30.705782 <6>[ 0.523381] 9p: Installing v9fs 9p2000 file system support
402 22:57:30.769326 <5>[ 0.590056] Key type asymmetric registered
403 22:57:30.769839 <5>[ 0.590325] Asymmetric key parser 'x509' registered
404 22:57:30.774384 <6>[ 0.595037] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245)
405 22:57:30.774621 <6>[ 0.595414] io scheduler mq-deadline registered
406 22:57:30.774731 <6>[ 0.595634] io scheduler kyber registered
407 22:57:30.838682 <6>[ 0.659362] pl061_gpio 9030000.pl061: PL061 GPIO chip registered
408 22:57:30.849501 <6>[ 0.670273] pci-host-generic 4010000000.pcie: host bridge /pcie@10000000 ranges:
409 22:57:30.854827 <6>[ 0.675338] pci-host-generic 4010000000.pcie: IO 0x003eff0000..0x003effffff -> 0x0000000000
410 22:57:30.855306 <6>[ 0.676110] pci-host-generic 4010000000.pcie: MEM 0x0010000000..0x003efeffff -> 0x0010000000
411 22:57:30.855659 <6>[ 0.676393] pci-host-generic 4010000000.pcie: MEM 0x8000000000..0xffffffffff -> 0x8000000000
412 22:57:30.856439 <4>[ 0.677089] pci-host-generic 4010000000.pcie: Memory resource size exceeds max for 32 bits
413 22:57:30.857472 <6>[ 0.677918] pci-host-generic 4010000000.pcie: ECAM at [mem 0x4010000000-0x401fffffff] for [bus 00-ff]
414 22:57:30.862954 <6>[ 0.683643] pci-host-generic 4010000000.pcie: PCI host bridge to bus 0000:00
415 22:57:30.863278 <6>[ 0.684074] pci_bus 0000:00: root bus resource [bus 00-ff]
416 22:57:30.863609 <6>[ 0.684269] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
417 22:57:30.863702 <6>[ 0.684458] pci_bus 0000:00: root bus resource [mem 0x10000000-0x3efeffff]
418 22:57:30.863811 <6>[ 0.684635] pci_bus 0000:00: root bus resource [mem 0x8000000000-0xffffffffff]
419 22:57:30.865399 <6>[ 0.686146] pci 0000:00:00.0: [1b36:0008] type 00 class 0x060000
420 22:57:30.873054 <6>[ 0.693768] pci 0000:00:01.0: [1af4:1000] type 00 class 0x020000
421 22:57:30.873439 <6>[ 0.694176] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x001f]
422 22:57:30.873547 <6>[ 0.694347] pci 0000:00:01.0: reg 0x14: [mem 0x00000000-0x00000fff]
423 22:57:30.873880 <6>[ 0.694580] pci 0000:00:01.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit pref]
424 22:57:30.878106 <6>[ 0.698911] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x0003ffff pref]
425 22:57:30.879002 <6>[ 0.699640] pci 0000:00:02.0: [1af4:1001] type 00 class 0x010000
426 22:57:30.879178 <6>[ 0.699863] pci 0000:00:02.0: reg 0x10: [io 0x0000-0x007f]
427 22:57:30.879359 <6>[ 0.700051] pci 0000:00:02.0: reg 0x14: [mem 0x00000000-0x00000fff]
428 22:57:30.879524 <6>[ 0.700222] pci 0000:00:02.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit pref]
429 22:57:30.886632 <6>[ 0.707247] pci 0000:00:01.0: BAR 6: assigned [mem 0x10000000-0x1003ffff pref]
430 22:57:30.886976 <6>[ 0.707701] pci 0000:00:01.0: BAR 4: assigned [mem 0x8000000000-0x8000003fff 64bit pref]
431 22:57:30.887585 <6>[ 0.708112] pci 0000:00:02.0: BAR 4: assigned [mem 0x8000004000-0x8000007fff 64bit pref]
432 22:57:30.887790 <6>[ 0.708420] pci 0000:00:01.0: BAR 1: assigned [mem 0x10040000-0x10040fff]
433 22:57:30.887986 <6>[ 0.708667] pci 0000:00:02.0: BAR 1: assigned [mem 0x10041000-0x10041fff]
434 22:57:30.888174 <6>[ 0.708897] pci 0000:00:02.0: BAR 0: assigned [io 0x1000-0x107f]
435 22:57:30.888351 <6>[ 0.709141] pci 0000:00:01.0: BAR 0: assigned [io 0x1080-0x109f]
436 22:57:30.903400 <6>[ 0.724222] EINJ: ACPI disabled.
437 22:57:31.001193 <6>[ 0.821905] virtio-pci 0000:00:01.0: enabling device (0000 -> 0003)
438 22:57:31.008295 <6>[ 0.829085] virtio-pci 0000:00:02.0: enabling device (0000 -> 0003)
439 22:57:31.039516 <6>[ 0.860258] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
440 22:57:31.056057 <6>[ 0.876798] SuperH (H)SCI(F) driver initialized
441 22:57:31.057513 <6>[ 0.878402] msm_serial: driver initialized
442 22:57:31.066658 <4>[ 0.887466] cacheinfo: Unable to detect cache hierarchy for CPU 0
443 22:57:31.102847 <6>[ 0.923642] loop: module loaded
444 22:57:31.104036 <6>[ 0.924713] virtio_blk virtio1: 1/0/0 default/read/poll queues
445 22:57:31.120986 <5>[ 0.941745] virtio_blk virtio1: [vda] 1048576 512-byte logical blocks (537 MB/512 MiB)
446 22:57:31.156285 <6>[ 0.977070] megasas: 07.719.03.00-rc1
447 22:57:31.170662 <5>[ 0.991394] physmap-flash 0.flash: physmap platform flash device: [mem 0x00000000-0x03ffffff]
448 22:57:31.172624 <6>[ 0.993217] 0.flash: Found 2 x16 devices at 0x0 in 32-bit bank. Manufacturer ID 0x000000 Chip ID 0x000000
449 22:57:31.173314 <6>[ 0.993994] Intel/Sharp Extended Query Table at 0x0031
450 22:57:31.178272 <6>[ 0.999121] Using buffer write method
451 22:57:31.178966 <7>[ 0.999638] erase region 0: offset=0x0,size=0x40000,blocks=256
452 22:57:31.179317 <5>[ 1.000081] physmap-flash 0.flash: physmap platform flash device: [mem 0x04000000-0x07ffffff]
453 22:57:31.180205 <6>[ 1.000905] 0.flash: Found 2 x16 devices at 0x0 in 32-bit bank. Manufacturer ID 0x000000 Chip ID 0x000000
454 22:57:31.180332 <6>[ 1.001182] Intel/Sharp Extended Query Table at 0x0031
455 22:57:31.181123 <6>[ 1.001865] Using buffer write method
456 22:57:31.181471 <7>[ 1.002014] erase region 0: offset=0x0,size=0x40000,blocks=256
457 22:57:31.181578 <5>[ 1.002209] Concatenating MTD devices:
458 22:57:31.181678 <5>[ 1.002368] (0): \"0.flash\"
459 22:57:31.181785 <5>[ 1.002473] (1): \"0.flash\"
460 22:57:31.181873 <5>[ 1.002603] into device \"0.flash\"
461 22:57:36.038650 <6>[ 5.859383] Freeing initrd memory: 86888K
462 22:57:36.160858 <6>[ 5.981595] tun: Universal TUN/TAP device driver, 1.6
463 22:57:36.170911 <6>[ 5.991751] thunder_xcv, ver 1.0
464 22:57:36.171540 <6>[ 5.992003] thunder_bgx, ver 1.0
465 22:57:36.171709 <6>[ 5.992219] nicpf, ver 1.0
466 22:57:36.174769 <6>[ 5.995605] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
467 22:57:36.175281 <6>[ 5.995810] hns3: Copyright (c) 2017 Huawei Corporation.
468 22:57:36.175458 <6>[ 5.996211] hclge is initializing
469 22:57:36.175646 <6>[ 5.996424] e1000: Intel(R) PRO/1000 Network Driver
470 22:57:36.175803 <6>[ 5.996548] e1000: Copyright (c) 1999-2006 Intel Corporation.
471 22:57:36.176040 <6>[ 5.996834] e1000e: Intel(R) PRO/1000 Network Driver
472 22:57:36.176212 <6>[ 5.996967] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
473 22:57:36.176626 <6>[ 5.997348] igb: Intel(R) Gigabit Ethernet Network Driver
474 22:57:36.176740 <6>[ 5.997493] igb: Copyright (c) 2007-2014 Intel Corporation.
475 22:57:36.177083 <6>[ 5.997766] igbvf: Intel(R) Gigabit Virtual Function Network Driver
476 22:57:36.177182 <6>[ 5.997960] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
477 22:57:36.178353 <6>[ 5.999092] sky2: driver version 1.30
478 22:57:36.181199 <6>[ 6.002104] VFIO - User Level meta-driver version: 0.3
479 22:57:36.190841 <6>[ 6.011409] usbcore: registered new interface driver usb-storage
480 22:57:36.200144 <6>[ 6.020983] rtc-pl031 9010000.pl031: registered as rtc0
481 22:57:36.201389 <6>[ 6.021854] rtc-pl031 9010000.pl031: setting system clock to 2023-06-05T22:57:36 UTC (1686005856)
482 22:57:36.203556 <6>[ 6.024211] i2c_dev: i2c /dev entries driver
483 22:57:36.219767 <6>[ 6.040330] sdhci: Secure Digital Host Controller Interface driver
484 22:57:36.219963 <6>[ 6.040557] sdhci: Copyright(c) Pierre Ossman
485 22:57:36.222104 <6>[ 6.042725] Synopsys Designware Multimedia Card Interface Driver
486 22:57:36.224717 <6>[ 6.045375] sdhci-pltfm: SDHCI platform and OF driver helper
487 22:57:36.229806 <6>[ 6.050421] ledtrig-cpu: registered to indicate activity on CPUs
488 22:57:36.235291 <6>[ 6.056164] usbcore: registered new interface driver usbhid
489 22:57:36.235715 <6>[ 6.056358] usbhid: USB HID core driver
490 22:57:36.252232 <6>[ 6.073042] NET: Registered PF_PACKET protocol family
491 22:57:36.253429 <6>[ 6.074143] 9pnet: Installing 9P2000 support
492 22:57:36.253794 <5>[ 6.074610] Key type dns_resolver registered
493 22:57:36.255237 <6>[ 6.076144] registered taskstats version 1
494 22:57:36.255714 <5>[ 6.076502] Loading compiled-in X.509 certificates
495 22:57:36.276817 <6>[ 6.097364] input: gpio-keys as /devices/platform/gpio-keys/input/input0
496 22:57:36.283753 <6>[ 6.104619] ALSA device list:
497 22:57:36.284199 <6>[ 6.104823] No soundcards found.
498 22:57:36.286970 <6>[ 6.107611] uart-pl011 9000000.pl011: no DMA platform data
499 22:57:36.342676 <6>[ 6.163418] Freeing unused kernel memory: 7552K
500 22:57:36.343721 <6>[ 6.164392] Run /init as init process
501 22:57:36.343832 <7>[ 6.164563] with arguments:
502 22:57:36.344176 <7>[ 6.164715] /init
503 22:57:36.344282 <7>[ 6.164821] verbose
504 22:57:36.344371 <7>[ 6.164912] with environment:
505 22:57:36.344460 <7>[ 6.165062] HOME=/
506 22:57:36.344563 <7>[ 6.165172] TERM=linux
507 22:57:36.476460 <30>[ 6.296854] systemd[1]: systemd 247.3-7+deb11u2 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +ZSTD +SECCOMP +BLKID +ELFUTILS +KMOD +IDN2 -IDN +PCRE2 default-hierarchy=unified)
508 22:57:36.477536 <31>[ 6.298180] systemd[1]: No virtualization found in DMI
509 22:57:36.478944 <31>[ 6.299556] systemd[1]: UML virtualization not found in /proc/cpuinfo.
510 22:57:36.479136 <31>[ 6.299877] systemd[1]: No virtualization found in CPUID
511 22:57:36.479466 <31>[ 6.300163] systemd[1]: Virtualization XEN not found, /proc/xen does not exist
512 22:57:36.480643 <31>[ 6.301282] systemd[1]: Virtualization QEMU: \"fw-cfg\" present in /proc/device-tree/fw-cfg@9020000
513 22:57:36.480756 <31>[ 6.301644] systemd[1]: Found VM virtualization qemu
514 22:57:36.481083 <30>[ 6.301879] systemd[1]: Detected virtualization qemu.
515 22:57:36.481427 <30>[ 6.302182] systemd[1]: Detected architecture arm64.
516 22:57:36.481734 <31>[ 6.302515] systemd[1]: Detected initialized system, this is not the first boot.
517 22:57:36.486026
518 22:57:36.486544 Welcome to [1mDebian GNU/Linux 11 (bullseye)[0m!
519 22:57:36.486713
520 22:57:36.488596 <30>[ 6.309229] systemd[1]: Set hostname to <debian-bullseye-arm64>.
521 22:57:36.507849 <31>[ 6.328585] systemd[1]: Successfully added address 127.0.0.1 to loopback interface
522 22:57:36.509250 <31>[ 6.329789] systemd[1]: Failed to add address ::1 to loopback interface: Operation not supported
523 22:57:36.509519 <31>[ 6.330224] systemd[1]: Successfully brought loopback interface up
524 22:57:36.514800 <31>[ 6.335343] systemd[1]: Setting 'fs/file-max' to '9223372036854775807'.
525 22:57:36.527433 <31>[ 6.347919] systemd[1]: Found cgroup2 on /sys/fs/cgroup/, full unified hierarchy
526 22:57:36.527675 <31>[ 6.348289] systemd[1]: Unified cgroup hierarchy is located at /sys/fs/cgroup.
527 22:57:36.569738 <31>[ 6.390242] systemd[1]: Got EBADF when using BPF_F_ALLOW_MULTI, which indicates it is supported. Yay!
528 22:57:36.571498 <31>[ 6.392066] systemd[1]: Controller 'cpu' supported: yes
529 22:57:36.571661 <31>[ 6.392260] systemd[1]: Controller 'cpuacct' supported: no
530 22:57:36.571871 <31>[ 6.392435] systemd[1]: Controller 'cpuset' supported: yes
531 22:57:36.572050 <31>[ 6.392668] systemd[1]: Controller 'io' supported: yes
532 22:57:36.572195 <31>[ 6.392878] systemd[1]: Controller 'blkio' supported: no
533 22:57:36.572371 <31>[ 6.393092] systemd[1]: Controller 'memory' supported: yes
534 22:57:36.572546 <31>[ 6.393303] systemd[1]: Controller 'devices' supported: no
535 22:57:36.572715 <31>[ 6.393522] systemd[1]: Controller 'pids' supported: yes
536 22:57:36.572883 <31>[ 6.393721] systemd[1]: Controller 'bpf-firewall' supported: yes
537 22:57:36.573314 <31>[ 6.393943] systemd[1]: Controller 'bpf-devices' supported: yes
538 22:57:36.574808 <31>[ 6.395464] systemd[1]: Set up TFD_TIMER_CANCEL_ON_SET timerfd.
539 22:57:36.575254 <31>[ 6.395916] systemd[1]: Failed to stat /etc/localtime, ignoring: No such file or directory
540 22:57:36.575714 <31>[ 6.396486] systemd[1]: /etc/localtime doesn't exist yet, watching /etc instead.
541 22:57:36.583666 <31>[ 6.404365] systemd[1]: Enabling (yes) showing of status (commandline).
542 22:57:36.591780 <31>[ 6.412279] systemd[1]: Successfully forked off '(sd-executor)' as PID 94.
543 22:57:36.601656 <31>[ 6.422119] systemd[94]: Successfully forked off '(direxec)' as PID 95.
544 22:57:36.603830 <31>[ 6.424441] systemd[94]: Successfully forked off '(direxec)' as PID 96.
545 22:57:36.605671 <31>[ 6.426326] systemd[94]: Successfully forked off '(direxec)' as PID 97.
546 22:57:36.620203 <31>[ 6.440941] systemd[94]: Successfully forked off '(direxec)' as PID 98.
547 22:57:36.642595 <31>[ 6.463273] systemd[94]: Successfully forked off '(direxec)' as PID 99.
548 22:57:36.793121 <31>[ 6.613861] systemd-fstab-generator[96]: Parsing /etc/fstab...
549 22:57:36.801580 <31>[ 6.622161] systemd-bless-boot-generator[95]: Skipping generator, not an EFI boot.
550 22:57:36.802712 <31>[ 6.623285] systemd-getty-generator[97]: Automatically adding serial getty for /dev/ttyAMA0.
551 22:57:36.804215 <31>[ 6.624891] systemd-getty-generator[97]: SELinux enabled state cached to: disabled
552 22:57:36.815731 <31>[ 6.636272] systemd-fstab-generator[96]: Found entry what=/dev/disk/by-uuid/ffe0be16-960b-4f4f-abe2-c028c6995c76 where=/ type=ext4 makefs=no growfs=no noauto=no nofail=no
553 22:57:36.827420 <31>[ 6.648004] systemd[94]: /usr/lib/systemd/system-generators/systemd-bless-boot-generator succeeded.
554 22:57:36.827902 <31>[ 6.648561] systemd[94]: /usr/lib/systemd/system-generators/systemd-veritysetup-generator succeeded.
555 22:57:36.828387 <31>[ 6.649065] systemd[94]: /usr/lib/systemd/system-generators/systemd-getty-generator succeeded.
556 22:57:36.829669 <31>[ 6.650159] systemd-fstab-generator[96]: Checking was requested for /dev/disk/by-uuid/ffe0be16-960b-4f4f-abe2-c028c6995c76, but fsck.ext4 does not exist.
557 22:57:36.830922 <31>[ 6.651511] systemd[94]: /usr/lib/systemd/system-generators/systemd-run-generator succeeded.
558 22:57:36.833868 <31>[ 6.654470] systemd-fstab-generator[96]: SELinux enabled state cached to: disabled
559 22:57:36.840380 <31>[ 6.660860] systemd[94]: /usr/lib/systemd/system-generators/systemd-fstab-generator succeeded.
560 22:57:36.843162 <31>[ 6.663755] systemd[1]: (sd-executor) succeeded.
561 22:57:36.844641 <31>[ 6.665204] systemd[1]: Looking for unit files in (higher priority first):
562 22:57:36.844847 <31>[ 6.665437] systemd[1]: /etc/systemd/system.control
563 22:57:36.845086 <31>[ 6.665572] systemd[1]: /run/systemd/system.control
564 22:57:36.845266 <31>[ 6.665743] systemd[1]: /run/systemd/transient
565 22:57:36.845445 <31>[ 6.665931] systemd[1]: /run/systemd/generator.early
566 22:57:36.845631 <31>[ 6.666143] systemd[1]: /etc/systemd/system
567 22:57:36.845832 <31>[ 6.666344] systemd[1]: /etc/systemd/system.attached
568 22:57:36.846041 <31>[ 6.666560] systemd[1]: /run/systemd/system
569 22:57:36.846184 <31>[ 6.666765] systemd[1]: /run/systemd/system.attached
570 22:57:36.846721 <31>[ 6.667345] systemd[1]: /run/systemd/generator
571 22:57:36.846916 <31>[ 6.667547] systemd[1]: /usr/local/lib/systemd/system
572 22:57:36.847093 <31>[ 6.667750] systemd[1]: /lib/systemd/system
573 22:57:36.847217 <31>[ 6.667929] systemd[1]: /usr/lib/systemd/system
574 22:57:36.847357 <31>[ 6.668126] systemd[1]: /run/systemd/generator.late
575 22:57:36.884713 <31>[ 6.705141] systemd[1]: Modification times have changed, need to update cache.
576 22:57:36.886855 <31>[ 6.707404] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.network1.service → systemd-networkd.service
577 22:57:36.888136 <31>[ 6.708552] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.timesync1.service → systemd-timesyncd.service
578 22:57:36.888659 <31>[ 6.709307] systemd[1]: unit_file_build_name_map: alias: /etc/systemd/system/dbus-org.freedesktop.resolve1.service → systemd-resolved.service
579 22:57:36.889583 <31>[ 6.710218] systemd[1]: unit_file_build_name_map: normal unit file: /run/systemd/generator/-.mount
580 22:57:36.891003 <31>[ 6.711614] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald@.service
581 22:57:36.891251 <31>[ 6.711939] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/console-getty.service
582 22:57:36.891488 <31>[ 6.712280] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/fstrim.timer
583 22:57:36.891997 <31>[ 6.712627] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-wall.path
584 22:57:36.892224 <31>[ 6.712976] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-rfkill.service
585 22:57:36.892742 <31>[ 6.713324] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/poweroff.target
586 22:57:36.892943 <31>[ 6.713720] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network-pre.target
587 22:57:36.893819 <31>[ 6.714441] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel4.target → multi-user.target
588 22:57:36.894025 <31>[ 6.714750] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/suspend-then-hibernate.target
589 22:57:36.895015 <31>[ 6.715651] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network.target
590 22:57:36.895900 <31>[ 6.716564] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel5.target → graphical.target
591 22:57:36.896352 <31>[ 6.716936] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald.service
592 22:57:36.896736 <31>[ 6.717300] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-update-utmp-runlevel.service
593 22:57:36.897113 <31>[ 6.717684] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-root-fs.target
594 22:57:36.897479 <31>[ 6.718057] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/slices.target
595 22:57:36.898641 <31>[ 6.719231] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/kmod.service → systemd-modules-load.service
596 22:57:36.899020 <31>[ 6.719690] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-update-utmp.service
597 22:57:36.899962 <31>[ 6.720627] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel1.target → rescue.target
598 22:57:36.900633 <31>[ 6.721072] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/cryptsetup-pre.target
599 22:57:36.900778 <31>[ 6.721487] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update-pre.target
600 22:57:36.901399 <31>[ 6.721881] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/machine.slice
601 22:57:36.901734 <31>[ 6.722358] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-fs-pre.target
602 22:57:36.902279 <31>[ 6.722780] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-clean.service
603 22:57:36.903573 <31>[ 6.724104] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel3.target → multi-user.target
604 22:57:36.904385 <31>[ 6.724961] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.timedate1.service → systemd-timedated.service
605 22:57:36.904728 <31>[ 6.725402] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dbus.service
606 22:57:36.905276 <31>[ 6.725790] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/reboot.target
607 22:57:36.905972 <31>[ 6.726429] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-audit.socket
608 22:57:36.906843 <31>[ 6.727356] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty@.service
609 22:57:36.907311 <31>[ 6.727843] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/kexec.target
610 22:57:36.907750 <31>[ 6.728217] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-systemd\x2dcryptsetup.slice
611 22:57:36.908201 <31>[ 6.728643] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-timedated.service
612 22:57:36.908681 <31>[ 6.729065] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-root-device.target
613 22:57:36.908871 <31>[ 6.729469] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-parse-etc.service
614 22:57:36.909353 <31>[ 6.729888] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd.target
615 22:57:36.909856 <31>[ 6.730255] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_all.timer
616 22:57:36.910028 <31>[ 6.730623] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-binfmt.service
617 22:57:36.910756 <31>[ 6.731227] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/local-fs-pre.target
618 22:57:36.910932 <31>[ 6.731635] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_all.service
619 22:57:36.911353 <31>[ 6.732026] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/paths.target
620 22:57:36.911765 <31>[ 6.732433] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/modprobe@.service
621 22:57:36.912626 <31>[ 6.733293] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/rc.service → /dev/null
622 22:57:36.913042 <31>[ 6.733704] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty-static.service
623 22:57:36.913961 <31>[ 6.734571] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/runlevel2.target → multi-user.target
624 22:57:36.914858 <31>[ 6.735407] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-modules-load.service
625 22:57:36.915307 <31>[ 6.736004] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/suspend.target
626 22:57:36.915750 <31>[ 6.736396] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sys-kernel-debug.mount
627 22:57:36.916244 <31>[ 6.736807] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-sysusers.service
628 22:57:36.917102 <31>[ 6.737776] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/default.target → graphical.target
629 22:57:36.917548 <31>[ 6.738178] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-poweroff.service
630 22:57:36.918014 <31>[ 6.738595] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-switch-root.target
631 22:57:36.918703 <31>[ 6.739315] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-sysctl.service
632 22:57:36.919765 <31>[ 6.740416] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/procps.service → systemd-sysctl.service
633 22:57:36.920203 <31>[ 6.740860] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-time-wait-sync.service
634 22:57:36.920612 <31>[ 6.741285] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user@.service
635 22:57:36.921451 <31>[ 6.742095] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/udev.service → systemd-udevd.service
636 22:57:36.921885 <31>[ 6.742512] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update-cleanup.service
637 22:57:36.922778 <31>[ 6.743287] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/nss-lookup.target
638 22:57:36.923234 <31>[ 6.743733] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/umount.target
639 22:57:36.923703 <31>[ 6.744130] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-udevadm-cleanup-db.service
640 22:57:36.923894 <31>[ 6.744559] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sys-kernel-tracing.mount
641 22:57:36.924339 <31>[ 6.744960] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-initctl.socket
642 22:57:36.924770 <31>[ 6.745385] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-timesyncd.service
643 22:57:36.925220 <31>[ 6.745788] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald.socket
644 22:57:36.925764 <31>[ 6.746206] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/printer.target
645 22:57:36.925972 <31>[ 6.746595] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network-online.target
646 22:57:36.926778 <31>[ 6.747355] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/usb-gadget.target
647 22:57:36.927363 <31>[ 6.747864] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hybrid-sleep.service
648 22:57:36.927605 <31>[ 6.748276] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-reboot.service
649 22:57:36.928157 <31>[ 6.748668] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/quotaon.service
650 22:57:36.929003 <31>[ 6.749475] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/bluetooth.target
651 22:57:36.929215 <31>[ 6.749863] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rescue.service
652 22:57:36.929790 <31>[ 6.750231] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-backlight@.service
653 22:57:36.930910 <31>[ 6.751261] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/cryptdisks-early.service → /dev/null
654 22:57:36.931138 <31>[ 6.751684] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dev-hugepages.mount
655 22:57:36.931388 <31>[ 6.752064] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-cryptsetup.target
656 22:57:36.931850 <31>[ 6.752458] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-pstore.service
657 22:57:36.932420 <31>[ 6.753039] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/x11-common.service → /dev/null
658 22:57:36.933395 <31>[ 6.753934] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.locale1.service → systemd-localed.service
659 22:57:36.933766 <31>[ 6.754419] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/timers.target
660 22:57:36.934291 <31>[ 6.754798] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/proc-sys-fs-binfmt_misc.automount
661 22:57:36.935131 <31>[ 6.755538] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-console.service
662 22:57:36.935341 <31>[ 6.755987] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-rfkill.socket
663 22:57:36.935829 <31>[ 6.756355] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user.slice
664 22:57:36.936008 <31>[ 6.756699] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-setup.service
665 22:57:36.936493 <31>[ 6.757077] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-fsck-root.service
666 22:57:36.936728 <31>[ 6.757478] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-quotacheck.service
667 22:57:36.937224 <31>[ 6.757850] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-kexec.service
668 22:57:36.937803 <31>[ 6.758239] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/graphical.target
669 22:57:36.938011 <31>[ 6.758616] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-clean.timer
670 22:57:36.938785 <31>[ 6.759428] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/exit.target
671 22:57:36.939044 <31>[ 6.759816] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-fs.target
672 22:57:36.939663 <31>[ 6.760169] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-boot-system-token.service
673 22:57:36.940179 <31>[ 6.760798] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-varlink@.socket
674 22:57:36.940672 <31>[ 6.761229] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd.service
675 22:57:36.940872 <31>[ 6.761621] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rpcbind.target
676 22:57:36.942335 <31>[ 6.762714] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.hostname1.service → systemd-hostnamed.service
677 22:57:36.943064 <31>[ 6.763738] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/syslog.socket
678 22:57:36.943613 <31>[ 6.764126] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-user-sessions.service
679 22:57:36.943840 <31>[ 6.764505] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-volatile-root.service
680 22:57:36.944440 <31>[ 6.764901] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user-runtime-dir@.service
681 22:57:36.944637 <31>[ 6.765292] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/kmod-static-nodes.service
682 22:57:36.945143 <31>[ 6.765651] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-logind.service
683 22:57:36.945333 <31>[ 6.766046] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd-control.socket
684 22:57:36.945797 <31>[ 6.766429] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-bless-boot.service
685 22:57:36.946290 <31>[ 6.767013] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd.service
686 22:57:36.946819 <31>[ 6.767425] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journal-flush.service
687 22:57:36.947427 <31>[ 6.767847] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty-pre.target
688 22:57:36.947621 <31>[ 6.768243] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty.target
689 22:57:36.948204 <31>[ 6.768628] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-network-generator.service
690 22:57:36.948448 <31>[ 6.769048] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update.target
691 22:57:36.949042 <31>[ 6.769448] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/multi-user.target
692 22:57:36.949273 <31>[ 6.769819] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-suspend.service
693 22:57:36.949519 <31>[ 6.770210] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-initctl.service
694 22:57:36.950105 <31>[ 6.770590] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-cleanup.service
695 22:57:36.950345 <31>[ 6.771085] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/basic.target
696 22:57:36.950880 <31>[ 6.771420] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/emergency.target
697 22:57:36.951291 <31>[ 6.771819] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-suspend-then-hibernate.service
698 22:57:36.951758 <31>[ 6.772233] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hibernate-resume@.service
699 22:57:36.951969 <31>[ 6.772617] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd-kernel.socket
700 22:57:36.952446 <31>[ 6.773000] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-dev-log.socket
701 22:57:36.952793 <31>[ 6.773382] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-machine-id-commit.service
702 22:57:36.953139 <31>[ 6.773764] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/serial-getty@.service
703 22:57:36.953525 <31>[ 6.774142] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-switch-root.service
704 22:57:36.953921 <31>[ 6.774518] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_reap.service
705 22:57:36.954315 <31>[ 6.775030] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sockets.target
706 22:57:36.955099 <31>[ 6.775767] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/cryptdisks.service → /dev/null
707 22:57:36.955643 <31>[ 6.776189] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/hybrid-sleep.target
708 22:57:36.956589 <31>[ 6.777190] systemd[1]: unit_file_build_name_map: alias: /lib/systemd/system/dbus-org.freedesktop.login1.service → systemd-logind.service
709 22:57:36.957138 <31>[ 6.777663] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sleep.target
710 22:57:36.957303 <31>[ 6.778008] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hibernate.service
711 22:57:36.957708 <31>[ 6.778412] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-halt.service
712 22:57:36.958372 <31>[ 6.778792] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/halt.target
713 22:57:36.959080 <31>[ 6.779552] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sigpwr.target
714 22:57:36.959490 <31>[ 6.779976] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-setup-dev.service
715 22:57:36.959834 <31>[ 6.780422] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sound.target
716 22:57:36.960165 <31>[ 6.780796] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/time-set.target
717 22:57:36.960562 <31>[ 6.781161] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udev-settle.service
718 22:57:36.961092 <31>[ 6.781563] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dbus.socket
719 22:57:36.961544 <31>[ 6.782226] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/hwclock.service → /dev/null
720 22:57:36.962512 <31>[ 6.783156] systemd[1]: unit_file_build_name_map: linked unit file: /lib/systemd/system/rcS.service → /dev/null
721 22:57:36.963006 <31>[ 6.783655] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/hibernate.target
722 22:57:36.963546 <31>[ 6.784067] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-random-seed.service
723 22:57:36.964028 <31>[ 6.784502] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/cryptsetup.target
724 22:57:36.964415 <31>[ 6.784931] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/boot-complete.target
725 22:57:36.964833 <31>[ 6.785347] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/blockdev@.target
726 22:57:36.965231 <31>[ 6.785728] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd-wait-online.service
727 22:57:37.395666 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m.
728 22:57:37.400862 [[0;32m OK [0m] Created slice [0;1;39msystem-modprobe.slice[0m.
729 22:57:37.405220 [[0;32m OK [0m] Created slice [0;1;39msystem-serial\x2dgetty.slice[0m.
730 22:57:37.408892 [[0;32m OK [0m] Created slice [0;1;39mUser and Session Slice[0m.
731 22:57:37.413011 [[0;32m OK [0m] Started [0;1;39mDispatch Password …ts to Console Directory Watch[0m.
732 22:57:37.415044 [[0;32m OK [0m] Started [0;1;39mForward Password R…uests to Wall Directory Watch[0m.
733 22:57:37.417350 [[0;32m OK [0m] Reached target [0;1;39mLocal Encrypted Volumes[0m.
734 22:57:37.418668 [[0;32m OK [0m] Reached target [0;1;39mPaths[0m.
735 22:57:37.419517 [[0;32m OK [0m] Reached target [0;1;39mRemote File Systems[0m.
736 22:57:37.420441 [[0;32m OK [0m] Reached target [0;1;39mSlices[0m.
737 22:57:37.420978 [[0;32m OK [0m] Reached target [0;1;39mSwap[0m.
738 22:57:37.425330 [[0;32m OK [0m] Listening on [0;1;39minitctl Compatibility Named Pipe[0m.
739 22:57:37.429891 [[0;32m OK [0m] Listening on [0;1;39mJournal Audit Socket[0m.
740 22:57:37.432818 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket (/dev/log)[0m.
741 22:57:37.435444 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket[0m.
742 22:57:37.437942 [[0;32m OK [0m] Listening on [0;1;39mNetwork Service Netlink Socket[0m.
743 22:57:37.440551 [[0;32m OK [0m] Listening on [0;1;39mudev Control Socket[0m.
744 22:57:37.443168 [[0;32m OK [0m] Listening on [0;1;39mudev Kernel Socket[0m.
745 22:57:37.472411 Mounting [0;1;39mHuge Pages File System[0m...
746 22:57:37.507704 Mounting [0;1;39mPOSIX Message Queue File System[0m...
747 22:57:37.547492 Mounting [0;1;39mKernel Debug File System[0m...
748 22:57:37.596310 Starting [0;1;39mLoad Kernel Module configfs[0m...
749 22:57:37.635890 Starting [0;1;39mLoad Kernel Module drm[0m...
750 22:57:37.699834 Starting [0;1;39mJournal Service[0m...
751 22:57:37.731843 Starting [0;1;39mLoad Kernel Modules[0m...
752 22:57:37.771880 Starting [0;1;39mRemount Root and Kernel File Systems[0m...
753 22:57:37.827877 Starting [0;1;39mColdplug All udev Devices[0m...
754 22:57:37.917495 [[0;32m OK [0m] Mounted [0;1;39mHuge Pages File System[0m.
755 22:57:37.936561 [[0;32m OK [0m] Mounted [0;1;39mPOSIX Message Queue File System[0m.
756 22:57:37.958578 [[0;32m OK [0m] Mounted [0;1;39mKernel Debug File System[0m.
757 22:57:38.007655 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module configfs[0m.
758 22:57:38.059373 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module drm[0m.
759 22:57:38.087235 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Modules[0m.
760 22:57:38.166582 Mounting [0;1;39mKernel Configuration File System[0m...
761 22:57:38.272278 Starting [0;1;39mApply Kernel Variables[0m...
762 22:57:38.349448 [[0;32m OK [0m] Mounted [0;1;39mKernel Configuration File System[0m.
763 22:57:38.444593 <47>[ 8.265350] systemd-journald[105]: SELinux enabled state cached to: disabled
764 22:57:38.445818 <47>[ 8.266640] systemd-journald[105]: Auditing in kernel turned off.
765 22:57:38.473065 <47>[ 8.293568] systemd-journald[105]: Found cgroup2 on /sys/fs/cgroup/, full unified hierarchy
766 22:57:38.495404 [[0;1;31mFAILED[0m] Failed to start [0;1;39mRemount Root and Kernel File Systems[0m.
767 22:57:38.498816 See 'systemctl status systemd-remount-fs.service' for details.
768 22:57:38.535529 <47>[ 8.356065] systemd-journald[105]: Journal effective settings seal=no keyed_hash=no compress=yes compress_threshold_bytes=512B
769 22:57:38.538142 <47>[ 8.358694] systemd-journald[105]: Fixed min_use=3.8M max_use=19.4M max_size=2.4M min_size=512.0K keep_free=9.7M n_max_files=100
770 22:57:38.547898 <47>[ 8.368483] systemd-journald[105]: Reserving 333 entries in field hash table.
771 22:57:38.552368 Starting [0;1;39mLoad/Save Random Seed[0m...
772 22:57:38.581239 <47>[ 8.401863] systemd-journald[105]: Reserving 4437 entries in data hash table.
773 22:57:38.599408 <47>[ 8.420205] systemd-journald[105]: Vacuuming...
774 22:57:38.600247 <47>[ 8.420899] systemd-journald[105]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
775 22:57:38.600867 <47>[ 8.421543] systemd-journald[105]: Flushing /dev/kmsg...
776 22:57:38.608227 Starting [0;1;39mCreate System Users[0m...
777 22:57:38.644439 [[0;32m OK [0m] Finished [0;1;39mApply Kernel Variables[0m.
778 22:57:38.776258 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Random Seed[0m.
779 22:57:38.956889 [[0;32m OK [0m] Finished [0;1;39mCreate System Users[0m.
780 22:57:38.996326 Starting [0;1;39mCreate Static Device Nodes in /dev[0m...
781 22:57:39.172480 <47>[ 8.992970] systemd-journald[105]: systemd-journald running as PID 105 for the system.
782 22:57:39.187016 [[0;32m OK [0m] Started [0;1;39mJournal Service[0m.
783 22:57:39.198574 <47>[ 9.019390] systemd-journald[105]: Sent READY=1 notification.
784 22:57:39.199054 <47>[ 9.019908] systemd-journald[105]: Sent WATCHDOG=1 notification.
785 22:57:39.251861 Starting [0;1;39mFlush Journal to Persistent Storage[0m...
786 22:57:39.253012 <47>[ 9.073559] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
787 22:57:39.264621 <47>[ 9.085123] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
788 22:57:39.284084 <47>[ 9.104796] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
789 22:57:39.295594 [[0;32m OK [0m] Finished [0;1;39mCreate Static Device Nodes in /dev[0m.
790 22:57:39.296863 <47>[ 9.117471] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
791 22:57:39.313523 <47>[ 9.133978] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
792 22:57:39.323225 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems (Pre)[0m.
793 22:57:39.328133 <47>[ 9.146833] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
794 22:57:39.328622 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems[0m.
795 22:57:39.338050 <47>[ 9.158520] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
796 22:57:39.365514 <47>[ 9.185954] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
797 22:57:39.380966 <47>[ 9.201328] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
798 22:57:39.395469 <47>[ 9.216164] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
799 22:57:39.397695 <47>[ 9.218230] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
800 22:57:39.411174 <47>[ 9.231927] systemd-journald[105]: n/a: New incoming connection.
801 22:57:39.411799 <47>[ 9.232529] systemd-journald[105]: varlink-21: varlink: setting state idle-server
802 22:57:39.424210 Starting [0;1;39mRule-based Manage…for Device Events and Files[0m...
803 22:57:39.439931 <47>[ 9.260396] systemd-journald[105]: varlink-21: New incoming message: {\"method\":\"io.systemd.Journal.FlushToVar\",\"parameters\":{}}
804 22:57:39.442130 <47>[ 9.262528] systemd-journald[105]: varlink-21: varlink: changing state idle-server → processing-method
805 22:57:39.455494 <46>[ 9.275969] systemd-journald[105]: Received client request to flush runtime journal.
806 22:57:39.456012 <47>[ 9.276574] systemd-journald[105]: Journal effective settings seal=yes keyed_hash=no compress=yes compress_threshold_bytes=512B
807 22:57:39.456905 <47>[ 9.277562] systemd-journald[105]: Vacuuming...
808 22:57:39.457532 <47>[ 9.278053] systemd-journald[105]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
809 22:57:39.463952 <47>[ 9.284460] systemd-journald[105]: varlink-21: Sending message: {\"parameters\":{}}
810 22:57:39.464184 <47>[ 9.284824] systemd-journald[105]: varlink-21: varlink: changing state processing-method → processed-method
811 22:57:39.464583 <47>[ 9.285296] systemd-journald[105]: varlink-21: varlink: changing state processed-method → idle-server
812 22:57:39.482239 <47>[ 9.302645] systemd-journald[105]: varlink-21: varlink: changing state idle-server → pending-disconnect
813 22:57:39.487491 <47>[ 9.308032] systemd-journald[105]: varlink-21: varlink: changing state pending-disconnect → processing-disconnect
814 22:57:39.487732 <47>[ 9.308457] systemd-journald[105]: varlink-21: varlink: changing state processing-disconnect → disconnected
815 22:57:39.488603 <47>[ 9.309344] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
816 22:57:39.501225 [[0;32m OK [0m] Finished [0;1;39mFlush Journal to Persistent Storage[0m.
817 22:57:39.508705 <47>[ 9.329164] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
818 22:57:39.524033 <47>[ 9.344511] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
819 22:57:39.536527 <47>[ 9.356981] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
820 22:57:39.559792 Starting [0;1;39mCreate Volatile Files and Directories[0m...
821 22:57:39.566148 <47>[ 9.386683] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
822 22:57:40.024586 [[0;32m OK [0m] Started [0;1;39mRule-based Manager for Device Events and Files[0m.
823 22:57:40.113747 Starting [0;1;39mNetwork Service[0m...
824 22:57:40.124983 <47>[ 9.945691] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
825 22:57:40.147733 [[0;32m OK [0m] Finished [0;1;39mCreate Volatile Files and Directories[0m.
826 22:57:40.258913 Starting [0;1;39mNetwork Time Synchronization[0m...
827 22:57:40.261933 <47>[ 10.082607] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
828 22:57:40.324866 Starting [0;1;39mUpdate UTMP about System Boot/Shutdown[0m...
829 22:57:40.333191 <47>[ 10.153601] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
830 22:57:40.782675 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Boot/Shutdown[0m.
831 22:57:41.845719 <47>[ 11.665942] systemd-journald[105]: Data hash table of /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal has a fill level at 75.0 (3328 of 4437 items, 2555904 file size, 768 bytes per hash table item), suggesting rotation.
832 22:57:41.846119 <47>[ 11.666733] systemd-journald[105]: /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal: Journal header limits reached or header out-of-date, rotating.
833 22:57:41.858832 <47>[ 11.679608] systemd-journald[105]: Rotating...
834 22:57:41.860150 <47>[ 11.680618] systemd-journald[105]: Journal effective settings seal=no keyed_hash=no compress=yes compress_threshold_bytes=512B
835 22:57:41.861235 <47>[ 11.682067] systemd-journald[105]: Reserving 333 entries in field hash table.
836 22:57:41.908187 <47>[ 11.728878] systemd-journald[105]: Reserving 4437 entries in data hash table.
837 22:57:41.932777 <47>[ 11.753466] systemd-journald[105]: Vacuuming...
838 22:57:41.964092 <47>[ 11.784561] systemd-journald[105]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
839 22:57:41.994786 [[0;32m OK [0m] Started [0;1;39mNetwork Service[0m.
840 22:57:42.140700 Starting [0;1;39mNetwork Name Resolution[0m...
841 22:57:42.168701 <47>[ 11.989153] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
842 22:57:42.322567 <47>[ 12.143230] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
843 22:57:42.476637 [[0;32m OK [0m] Started [0;1;39mNetwork Time Synchronization[0m.
844 22:57:42.479128 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Set[0m.
845 22:57:42.487466 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Synchronized[0m.
846 22:57:43.784266 [[0;32m OK [0m] Finished [0;1;39mColdplug All udev Devices[0m.
847 22:57:43.792339 [[0;32m OK [0m] Reached target [0;1;39mSystem Initialization[0m.
848 22:57:43.819032 [[0;32m OK [0m] Started [0;1;39mPeriodic ext4 Onli…ata Check for All Filesystems[0m.
849 22:57:43.843690 [[0;32m OK [0m] Started [0;1;39mDiscard unused blocks once a week[0m.
850 22:57:43.848642 [[0;32m OK [0m] Started [0;1;39mDaily Cleanup of Temporary Directories[0m.
851 22:57:43.853822 [[0;32m OK [0m] Reached target [0;1;39mTimers[0m.
852 22:57:43.884641 [[0;32m OK [0m] Listening on [0;1;39mD-Bus System Message Bus Socket[0m.
853 22:57:43.885580 [[0;32m OK [0m] Reached target [0;1;39mSockets[0m.
854 22:57:43.893048 [[0;32m OK [0m] Reached target [0;1;39mBasic System[0m.
855 22:57:43.960330 [[0;32m OK [0m] Started [0;1;39mD-Bus System Message Bus[0m.
856 22:57:43.985750 <47>[ 13.806112] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
857 22:57:44.159344 Starting [0;1;39mRemove Stale Onli…t4 Metadata Check Snapshots[0m...
858 22:57:44.160222 <47>[ 13.980883] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
859 22:57:44.436573 Starting [0;1;39mUser Login Management[0m...
860 22:57:44.444649 <47>[ 14.265398] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
861 22:57:44.903438 [[0;32m OK [0m] Started [0;1;39mNetwork Name Resolution[0m.
862 22:57:44.905527 [[0;32m OK [0m] Reached target [0;1;39mNetwork[0m.
863 22:57:44.909573 [[0;32m OK [0m] Reached target [0;1;39mHost and Network Name Lookups[0m.
864 22:57:44.987861 Starting [0;1;39mPermit User Sessions[0m...
865 22:57:45.008726 <47>[ 14.829181] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
866 22:57:45.183061 [[0;32m OK [0m] Finished [0;1;39mPermit User Sessions[0m.
867 22:57:45.277081 [[0;32m OK [0m] Started [0;1;39mGetty on tty1[0m.
868 22:57:45.408489 [[0;32m OK [0m] Finished [0;1;39mRemove Stale Onli…ext4 Metadata Check Snapshots[0m.
869 22:57:45.712955 [[0;32m OK [0m] Started [0;1;39mUser Login Management[0m.
870 22:57:47.979413 [[0;32m OK [0m] Found device [0;1;39m/dev/ttyAMA0[0m.
871 22:57:48.056137 [[0;32m OK [0m] Started [0;1;39mSerial Getty on ttyAMA0[0m.
872 22:57:48.079102 [[0;32m OK [0m] Reached target [0;1;39mLogin Prompts[0m.
873 22:57:48.096754 [[0;32m OK [0m] Reached target [0;1;39mMulti-User System[0m.
874 22:57:48.114590 [[0;32m OK [0m] Reached target [0;1;39mGraphical Interface[0m.
875 22:57:48.180285 Starting [0;1;39mUpdate UTMP about System Runlevel Changes[0m...
876 22:57:48.188167 <47>[ 18.008645] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
877 22:57:48.402634 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Runlevel Changes[0m.
878 22:57:48.441278 <47>[ 18.261919] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
879 22:57:48.473754 <47>[ 18.294126] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
880 22:57:48.544847
881 22:57:48.545168 Debian GNU/Linux 11 debian-bullseye-arm64 ttyAMA0
882 22:57:48.545365
883 22:57:48.545849 debian-bullseye-arm64 login: root (automatic login)
884 22:57:48.546019
885 22:57:48.620134 <6>[ 18.440824] virtio_net virtio0 enp0s1: renamed from eth0
886 22:57:48.805484 Linux debian-bullseye-arm64 6.1.31 #1 SMP PREEMPT Mon Jun 5 22:38:01 UTC 2023 aarch64
887 22:57:48.806118
888 22:57:48.809563 The programs included with the Debian GNU/Linux system are free software;
889 22:57:48.809809 the exact distribution terms for each program are described in the
890 22:57:48.809915 individual files in /usr/share/doc/*/copyright.
891 22:57:48.810012
892 22:57:48.810378 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
893 22:57:48.810485 permitted by applicable law.
894 22:57:49.412420 <47>[ 19.233068] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
895 22:57:49.432804 <47>[ 19.253241] systemd-journald[105]: Data hash table of /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal has a fill level at 75.1 (3332 of 4437 items, 2555904 file size, 767 bytes per hash table item), suggesting rotation.
896 22:57:49.433318 <47>[ 19.253870] systemd-journald[105]: /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal: Journal header limits reached or header out-of-date, rotating.
897 22:57:49.433448 <47>[ 19.254287] systemd-journald[105]: Rotating...
898 22:57:49.449334 <47>[ 19.269912] systemd-journald[105]: Reserving 333 entries in field hash table.
899 22:57:49.478634 <47>[ 19.299367] systemd-journald[105]: Reserving 4437 entries in data hash table.
900 22:57:49.481612 <47>[ 19.302467] systemd-journald[105]: Vacuuming...
901 22:57:49.487940 <47>[ 19.308391] systemd-journald[105]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
902 22:57:49.732323 <47>[ 19.553013] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
903 22:57:51.481316 <47>[ 21.301805] systemd-journald[105]: Successfully sent stream file descriptor to service manager.
904 22:57:52.083053 Matched prompt #10: / #
906 22:57:52.083519 Setting prompt string to ['/ #']
907 22:57:52.083657 end: 2.2.1 login-action (duration 00:00:22) [common]
909 22:57:52.083963 end: 2.2 auto-login-action (duration 00:00:24) [common]
910 22:57:52.084087 start: 2.3 expect-shell-connection (timeout 00:04:34) [common]
911 22:57:52.084189 Setting prompt string to ['/ #']
912 22:57:52.084280 Forcing a shell prompt, looking for ['/ #']
914 22:57:52.134769 / #
915 22:57:52.135021 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
916 22:57:52.135138 Waiting using forced prompt support (timeout 00:02:30)
917 22:57:52.136744
918 22:57:52.141943 end: 2.3 expect-shell-connection (duration 00:00:00) [common]
919 22:57:52.142116 start: 2.4 export-device-env (timeout 00:04:34) [common]
920 22:57:52.142249 end: 2.4 export-device-env (duration 00:00:00) [common]
921 22:57:52.142370 end: 2 boot-image-retry (duration 00:00:26) [common]
922 22:57:52.142487 start: 3 lava-test-retry (timeout 00:08:55) [common]
923 22:57:52.142606 start: 3.1 lava-test-shell (timeout 00:08:55) [common]
924 22:57:52.142709 Using namespace: common
926 22:57:52.243510 / # #
927 22:57:52.243784 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
928 22:57:52.244363 #
930 22:57:52.353377 / # mkdir /lava-566287
931 22:57:52.354279 mkdir /lava-566287
933 22:57:52.484199 / # mount /dev/disk/by-uuid/92b7becb-91f9-40c4-a22c-3660ecba8dcd -t ext2 /lava-566287
934 22:57:52.485019 mount /dev/disk/by-uuid/92b7becb-91f9-40c4-a22c-3660ecba8dcd -t ext2 /lava-566287
935 22:57:52.524658 <4>[ 22.345112] ext2 filesystem being mounted at /lava-566287 supports timestamps until 2038 (0x7fffffff)
937 22:57:52.672489 / # ls -la /lava-566287/bin/lava-test-runner
938 22:57:52.673494 ls -la /lava-566287/bin/lava-test-runner
939 22:57:52.713211 -rwxr-xr-x 1 root root 1039 Jun 5 22:56 /lava-566287/bin/lava-test-runner
940 22:57:52.726023 Using /lava-566287
942 22:57:52.827045 / # export SHELL=/bin/sh
943 22:57:52.827748 export SHELL=/bin/sh
945 22:57:52.933208 / # . /lava-566287/environment
946 22:57:52.934143 . /lava-566287/environment
948 22:57:53.046062 / # /lava-566287/bin/lava-test-runner /lava-566287/0
949 22:57:53.046366 Test shell timeout: 10s (minimum of the action and connection timeout)
950 22:57:53.047228 /lava-566287/bin/lava-test-runner /lava-566287/0
951 22:57:53.216905 + export TESTRUN_ID=0_timesync-off
952 22:57:53.217767 + cd /lava-566287/0/tests/0_timesync-off
953 22:57:53.220363 + cat uuid
954 22:57:53.229125 + UUID=566287_1.1.3.1
955 22:57:53.229376 + set +x
956 22:57:53.230111 Received signal: <STARTRUN> 0_timesync-off 566287_1.1.3.1
957 22:57:53.230235 Starting test lava.0_timesync-off (566287_1.1.3.1)
958 22:57:53.230368 Skipping test definition patterns.
959 22:57:53.230572 <LAVA_SIGNAL_STARTRUN 0_timesync-off 566287_1.1.3.1>
960 22:57:53.230681 + systemctl stop systemd-timesyncd
961 22:57:53.489217 + set +x
962 22:57:53.489801 <LAVA_SIGNAL_ENDRUN 0_timesync-off 566287_1.1.3.1>
963 22:57:53.490176 Received signal: <ENDRUN> 0_timesync-off 566287_1.1.3.1
964 22:57:53.490360 Ending use of test pattern.
965 22:57:53.490509 Ending test lava.0_timesync-off (566287_1.1.3.1), duration 0.26
967 22:57:53.535693 + export TESTRUN_ID=1_kselftest-arm64_qemu
968 22:57:53.535962 + cd /lava-566287/0/tests/1_kselftest-arm64_qemu
969 22:57:53.538331 + cat uuid
970 22:57:53.547094 + UUID=566287_1.1.3.5
971 22:57:53.547427 + set +x
972 22:57:53.547661 <LAVA_SIGNAL_STARTRUN 1_kselftest-arm64_qemu 566287_1.1.3.5>
973 22:57:53.547862 + cd ./automated/linux/kselftest/
974 22:57:53.548235 Received signal: <STARTRUN> 1_kselftest-arm64_qemu 566287_1.1.3.5
975 22:57:53.548411 Starting test lava.1_kselftest-arm64_qemu (566287_1.1.3.5)
976 22:57:53.548637 Skipping test definition patterns.
977 22:57:53.552852 + ./kselftest.sh -c arm64 -T -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig/gcc-10/kselftest.tar.xz -L -S /dev/null -b qemu_arm64-virt-gicv3 -g cip -e -p /opt/kselftests/mainline/ -n 1 -i 1
978 22:57:53.652447 INFO: install_deps skipped
979 22:57:53.686482 --2023-06-05 22:57:53-- http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.26-1314-g1ab0ac1d7e2e3/arm64/defconfig/gcc-10/kselftest.tar.xz
980 22:57:53.778914 Resolving storage.kernelci.org (storage.kernelci.org)... 52.250.1.28
981 22:57:53.983568 Connecting to storage.kernelci.org (storage.kernelci.org)|52.250.1.28|:80... connected.
982 22:57:54.174241 HTTP request sent, awaiting response... 200 OK
983 22:57:54.177130 Length: 2702660 (2.6M) [application/octet-stream]
984 22:57:54.179001 Saving to: 'kselftest.tar.xz'
985 22:57:54.179755
986 22:57:55.466278 kselftest.tar.xz 0%[ ] 0 --.-KB/s kselftest.tar.xz 1%[ ] 50.15K 151KB/s kselftest.tar.xz 8%[> ] 219.84K 323KB/s kselftest.tar.xz 28%[====> ] 758.09K 861KB/s kselftest.tar.xz 68%[============> ] 1.76M 1.48MB/s kselftest.tar.xz 100%[===================>] 2.58M 2.07MB/s in 1.2s
987 22:57:55.466571
988 22:57:55.472082 2023-06-05 22:57:55 (2.07 MB/s) - 'kselftest.tar.xz' saved [2702660/2702660]
989 22:57:55.472264
990 22:57:58.611487 skiplist:
991 22:57:58.611996 ========================================
992 22:57:58.612422 ========================================
993 22:57:58.674971 arm64:tags_test
994 22:57:58.675226 arm64:run_tags_test.sh
995 22:57:58.675533 arm64:fake_sigreturn_bad_magic
996 22:57:58.675643 arm64:fake_sigreturn_bad_size
997 22:57:58.675735 arm64:fake_sigreturn_bad_size_for_magic0
998 22:57:58.675825 arm64:fake_sigreturn_duplicated_fpsimd
999 22:57:58.675911 arm64:fake_sigreturn_misaligned_sp
1000 22:57:58.675998 arm64:fake_sigreturn_missing_fpsimd
1001 22:57:58.676085 arm64:fake_sigreturn_sme_change_vl
1002 22:57:58.676187 arm64:fake_sigreturn_sve_change_vl
1003 22:57:58.676536 arm64:mangle_pstate_invalid_compat_toggle
1004 22:57:58.676643 arm64:mangle_pstate_invalid_daif_bits
1005 22:57:58.676736 arm64:mangle_pstate_invalid_mode_el1h
1006 22:57:58.676826 arm64:mangle_pstate_invalid_mode_el1t
1007 22:57:58.676916 arm64:mangle_pstate_invalid_mode_el2h
1008 22:57:58.677191 arm64:mangle_pstate_invalid_mode_el2t
1009 22:57:58.677289 arm64:mangle_pstate_invalid_mode_el3h
1010 22:57:58.677381 arm64:mangle_pstate_invalid_mode_el3t
1011 22:57:58.677474 arm64:sme_trap_no_sm
1012 22:57:58.677580 arm64:sme_trap_non_streaming
1013 22:57:58.677677 arm64:sme_trap_za
1014 22:57:58.677762 arm64:sme_vl
1015 22:57:58.677846 arm64:ssve_regs
1016 22:57:58.677930 arm64:sve_regs
1017 22:57:58.678014 arm64:sve_vl
1018 22:57:58.678115 arm64:za_no_regs
1019 22:57:58.678200 arm64:za_regs
1020 22:57:58.678283 arm64:pac
1021 22:57:58.678368 arm64:fp-stress
1022 22:57:58.678452 arm64:sve-ptrace
1023 22:57:58.678535 arm64:sve-probe-vls
1024 22:57:58.678619 arm64:vec-syscfg
1025 22:57:58.678712 arm64:za-fork
1026 22:57:58.678798 arm64:za-ptrace
1027 22:57:58.678902 arm64:check_buffer_fill
1028 22:57:58.678988 arm64:check_child_memory
1029 22:57:58.679071 arm64:check_gcr_el1_cswitch
1030 22:57:58.679153 arm64:check_ksm_options
1031 22:57:58.679233 arm64:check_mmap_options
1032 22:57:58.679313 arm64:check_prctl
1033 22:57:58.679393 arm64:check_tags_inclusion
1034 22:57:58.679478 arm64:check_user_mem
1035 22:57:58.679561 arm64:btitest
1036 22:57:58.679645 arm64:nobtitest
1037 22:57:58.679725 arm64:hwcap
1038 22:57:58.679808 arm64:ptrace
1039 22:57:58.679888 arm64:syscall-abi
1040 22:57:58.679986 arm64:tpidr2
1041 22:57:58.692671 ============== Tests to run ===============
1042 22:57:58.698907 arm64:tags_test
1043 22:57:58.699361 arm64:run_tags_test.sh
1044 22:57:58.699467 arm64:fake_sigreturn_bad_magic
1045 22:57:58.699564 arm64:fake_sigreturn_bad_size
1046 22:57:58.699659 arm64:fake_sigreturn_bad_size_for_magic0
1047 22:57:58.699754 arm64:fake_sigreturn_duplicated_fpsimd
1048 22:57:58.699847 arm64:fake_sigreturn_misaligned_sp
1049 22:57:58.699940 arm64:fake_sigreturn_missing_fpsimd
1050 22:57:58.700033 arm64:fake_sigreturn_sme_change_vl
1051 22:57:58.700145 arm64:fake_sigreturn_sve_change_vl
1052 22:57:58.700242 arm64:mangle_pstate_invalid_compat_toggle
1053 22:57:58.700336 arm64:mangle_pstate_invalid_daif_bits
1054 22:57:58.700427 arm64:mangle_pstate_invalid_mode_el1h
1055 22:57:58.700519 arm64:mangle_pstate_invalid_mode_el1t
1056 22:57:58.700612 arm64:mangle_pstate_invalid_mode_el2h
1057 22:57:58.700706 arm64:mangle_pstate_invalid_mode_el2t
1058 22:57:58.700800 arm64:mangle_pstate_invalid_mode_el3h
1059 22:57:58.700892 arm64:mangle_pstate_invalid_mode_el3t
1060 22:57:58.700983 arm64:sme_trap_no_sm
1061 22:57:58.701093 arm64:sme_trap_non_streaming
1062 22:57:58.701185 arm64:sme_trap_za
1063 22:57:58.701275 arm64:sme_vl
1064 22:57:58.701363 arm64:ssve_regs
1065 22:57:58.701446 arm64:sve_regs
1066 22:57:58.701528 arm64:sve_vl
1067 22:57:58.701616 arm64:za_no_regs
1068 22:57:58.701714 arm64:za_regs
1069 22:57:58.701804 arm64:pac
1070 22:57:58.701894 arm64:fp-stress
1071 22:57:58.701983 arm64:sve-ptrace
1072 22:57:58.702093 arm64:sve-probe-vls
1073 22:57:58.702191 arm64:vec-syscfg
1074 22:57:58.702286 arm64:za-fork
1075 22:57:58.702375 arm64:za-ptrace
1076 22:57:58.702464 arm64:check_buffer_fill
1077 22:57:58.702553 arm64:check_child_memory
1078 22:57:58.702642 arm64:check_gcr_el1_cswitch
1079 22:57:58.702732 arm64:check_ksm_options
1080 22:57:58.702821 arm64:check_mmap_options
1081 22:57:58.702909 arm64:check_prctl
1082 22:57:58.702998 arm64:check_tags_inclusion
1083 22:57:58.703106 arm64:check_user_mem
1084 22:57:58.703198 arm64:btitest
1085 22:57:58.703293 arm64:nobtitest
1086 22:57:58.703382 arm64:hwcap
1087 22:57:58.703472 arm64:ptrace
1088 22:57:58.703560 arm64:syscall-abi
1089 22:57:58.703647 arm64:tpidr2
1090 22:57:58.704258 ===========End Tests to run ===============
1091 22:57:59.721170 <12>[ 29.541890] kselftest: Running tests in arm64
1092 22:57:59.751700 TAP version 13
1093 22:57:59.770678 1..48
1094 22:57:59.823169 # selftests: arm64: tags_test
1095 22:57:59.880223 ok 1 selftests: arm64: tags_test
1096 22:57:59.930609 # selftests: arm64: run_tags_test.sh
1097 22:57:59.985519 # --------------------
1098 22:57:59.985806 # running tags test
1099 22:57:59.985935 # --------------------
1100 22:57:59.986055 # [PASS]
1101 22:57:59.991712 ok 2 selftests: arm64: run_tags_test.sh
1102 22:58:00.041985 # selftests: arm64: fake_sigreturn_bad_magic
1103 22:58:00.096846 # Registered handlers for all signals.
1104 22:58:00.097169 # Detected MINSTKSIGSZ:10000
1105 22:58:00.097331 # Testcase initialized.
1106 22:58:00.097463 # uc context validated.
1107 22:58:00.097830 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1108 22:58:00.097991 # Handled SIG_COPYCTX
1109 22:58:00.098114 # Available space:3536
1110 22:58:00.098231 # Using badly built context - ERR: BAD MAGIC !
1111 22:58:00.098350 # SIG_OK -- SP:0xFFFFF62D64E0 si_addr@:0xfffff62d64e0 si_code:2 token@:0xfffff62d5280 offset:-4704
1112 22:58:00.098527 # ==>> completed. PASS(1)
1113 22:58:00.098659 # # FAKE_SIGRETURN_BAD_MAGIC :: Trigger a sigreturn with a sigframe with a bad magic
1114 22:58:00.098780 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFF62D5280
1115 22:58:00.106363 ok 3 selftests: arm64: fake_sigreturn_bad_magic
1116 22:58:00.159748 # selftests: arm64: fake_sigreturn_bad_size
1117 22:58:00.210677 # Registered handlers for all signals.
1118 22:58:00.211239 # Detected MINSTKSIGSZ:10000
1119 22:58:00.211420 # Testcase initialized.
1120 22:58:00.211569 # uc context validated.
1121 22:58:00.211695 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1122 22:58:00.211815 # Handled SIG_COPYCTX
1123 22:58:00.211933 # Available space:3536
1124 22:58:00.212049 # uc context validated.
1125 22:58:00.212191 # Using badly built context - ERR: Bad size for esr_context
1126 22:58:00.212311 # SIG_OK -- SP:0xFFFFF279D6B0 si_addr@:0xfffff279d6b0 si_code:2 token@:0xfffff279c450 offset:-4704
1127 22:58:00.212428 # ==>> completed. PASS(1)
1128 22:58:00.212544 # # FAKE_SIGRETURN_BAD_SIZE :: Triggers a sigreturn with a overrun __reserved area
1129 22:58:00.212660 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFF279C450
1130 22:58:00.220018 ok 4 selftests: arm64: fake_sigreturn_bad_size
1131 22:58:00.267391 # selftests: arm64: fake_sigreturn_bad_size_for_magic0
1132 22:58:00.319302 # Registered handlers for all signals.
1133 22:58:00.319848 # Detected MINSTKSIGSZ:10000
1134 22:58:00.319990 # Testcase initialized.
1135 22:58:00.320110 # uc context validated.
1136 22:58:00.321551 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1137 22:58:00.321999 # Handled SIG_COPYCTX
1138 22:58:00.322222 # Available space:3536
1139 22:58:00.322402 # Using badly built context - ERR: Bad size for terminator
1140 22:58:00.322563 # SIG_OK -- SP:0xFFFFED6D3820 si_addr@:0xffffed6d3820 si_code:2 token@:0xffffed6d25c0 offset:-4704
1141 22:58:00.322715 # ==>> completed. PASS(1)
1142 22:58:00.322841 # # FAKE_SIGRETURN_BAD_SIZE_FOR_TERMINATOR :: Trigger a sigreturn using non-zero size terminator
1143 22:58:00.322960 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFED6D25C0
1144 22:58:00.329427 ok 5 selftests: arm64: fake_sigreturn_bad_size_for_magic0
1145 22:58:00.376407 # selftests: arm64: fake_sigreturn_duplicated_fpsimd
1146 22:58:00.427985 # Registered handlers for all signals.
1147 22:58:00.428220 # Detected MINSTKSIGSZ:10000
1148 22:58:00.428313 # Testcase initialized.
1149 22:58:00.428418 # uc context validated.
1150 22:58:00.428507 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1151 22:58:00.428593 # Handled SIG_COPYCTX
1152 22:58:00.428679 # Available space:3536
1153 22:58:00.428782 # Using badly built context - ERR: Multiple FPSIMD_MAGIC
1154 22:58:00.428887 # SIG_OK -- SP:0xFFFFD184F310 si_addr@:0xffffd184f310 si_code:2 token@:0xffffd184e0b0 offset:-4704
1155 22:58:00.428975 # ==>> completed. PASS(1)
1156 22:58:00.436715 # # FAKE_SIGRETURN_DUPLICATED_FPSIMD :: Triggers a sigreturn including two fpsimd_context
1157 22:58:00.437139 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFD184E0B0
1158 22:58:00.437247 ok 6 selftests: arm64: fake_sigreturn_duplicated_fpsimd
1159 22:58:00.485167 # selftests: arm64: fake_sigreturn_misaligned_sp
1160 22:58:00.535247 # Registered handlers for all signals.
1161 22:58:00.535552 # Detected MINSTKSIGSZ:10000
1162 22:58:00.535688 # Testcase initialized.
1163 22:58:00.536068 # uc context validated.
1164 22:58:00.536224 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1165 22:58:00.536350 # Handled SIG_COPYCTX
1166 22:58:00.536470 # SIG_OK -- SP:0xFFFFCC102FD3 si_addr@:0xffffcc102fd3 si_code:2 token@:0xffffcc102fd3 offset:0
1167 22:58:00.536591 # ==>> completed. PASS(1)
1168 22:58:00.536711 # # FAKE_SIGRETURN_MISALIGNED_SP :: Triggers a sigreturn with a misaligned sigframe
1169 22:58:00.536854 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFCC102FD3
1170 22:58:00.544790 ok 7 selftests: arm64: fake_sigreturn_misaligned_sp
1171 22:58:00.591124 # selftests: arm64: fake_sigreturn_missing_fpsimd
1172 22:58:00.642340 # Registered handlers for all signals.
1173 22:58:00.642595 # Detected MINSTKSIGSZ:10000
1174 22:58:00.642903 # Testcase initialized.
1175 22:58:00.643011 # uc context validated.
1176 22:58:00.643101 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1177 22:58:00.643189 # Handled SIG_COPYCTX
1178 22:58:00.643276 # Mangling template header. Spare space:4096
1179 22:58:00.643378 # Using badly built context - ERR: Missing FPSIMD
1180 22:58:00.643466 # SIG_OK -- SP:0xFFFFC27460A0 si_addr@:0xffffc27460a0 si_code:2 token@:0xffffc2744e40 offset:-4704
1181 22:58:00.643551 # ==>> completed. PASS(1)
1182 22:58:00.643652 # # FAKE_SIGRETURN_MISSING_FPSIMD :: Triggers a sigreturn with a missing fpsimd_context
1183 22:58:00.643752 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFC2744E40
1184 22:58:00.652015 ok 8 selftests: arm64: fake_sigreturn_missing_fpsimd
1185 22:58:00.699781 # selftests: arm64: fake_sigreturn_sme_change_vl
1186 22:58:00.750367 # Registered handlers for all signals.
1187 22:58:00.750843 # Detected MINSTKSIGSZ:10000
1188 22:58:00.750956 # Required Features: [ SME ] supported
1189 22:58:00.751053 # Incompatible Features: [] absent
1190 22:58:00.751147 # Testcase initialized.
1191 22:58:00.751241 # uc context validated.
1192 22:58:00.751539 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1193 22:58:00.751647 # Handled SIG_COPYCTX
1194 22:58:00.751734 # Attempting to change VL from 16 to 256
1195 22:58:00.751820 # SIG_OK -- SP:0xFFFFCDB680E0 si_addr@:0xffffcdb680e0 si_code:2 token@:0xffffcdb66e80 offset:-4704
1196 22:58:00.751907 # ==>> completed. PASS(1)
1197 22:58:00.751988 # # FAKE_SIGRETURN_SSVE_CHANGE :: Attempt to change Streaming SVE VL
1198 22:58:00.752077 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFCDB66E80
1199 22:58:00.761198 ok 9 selftests: arm64: fake_sigreturn_sme_change_vl
1200 22:58:00.809984 # selftests: arm64: fake_sigreturn_sve_change_vl
1201 22:58:00.863259 # Registered handlers for all signals.
1202 22:58:00.863800 # Detected MINSTKSIGSZ:10000
1203 22:58:00.863963 # Required Features: [ SVE ] supported
1204 22:58:00.865294 # Incompatible Features: [] absent
1205 22:58:00.865510 # Testcase initialized.
1206 22:58:00.865703 # uc context validated.
1207 22:58:00.866107 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1208 22:58:00.866222 # Handled SIG_COPYCTX
1209 22:58:00.866316 # Attempting to change VL from 16 to 256
1210 22:58:00.866404 # SIG_OK -- SP:0xFFFFFF41F090 si_addr@:0xffffff41f090 si_code:2 token@:0xffffff41de30 offset:-4704
1211 22:58:00.866494 # ==>> completed. PASS(1)
1212 22:58:00.866574 # # FAKE_SIGRETURN_SVE_CHANGE :: Attempt to change SVE VL
1213 22:58:00.866672 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFFF41DE30
1214 22:58:00.873200 ok 10 selftests: arm64: fake_sigreturn_sve_change_vl
1215 22:58:00.922784 # selftests: arm64: mangle_pstate_invalid_compat_toggle
1216 22:58:00.973937 # Registered handlers for all signals.
1217 22:58:00.974098 # Detected MINSTKSIGSZ:10000
1218 22:58:00.974184 # Testcase initialized.
1219 22:58:00.974265 # uc context validated.
1220 22:58:00.974369 # Handled SIG_TRIG
1221 22:58:00.974458 # SIG_OK -- SP:0xFFFFCC69EF50 si_addr@:0xffffcc69ef50 si_code:2 token@:(nil) offset:-281474111237968
1222 22:58:00.974548 # ==>> completed. PASS(1)
1223 22:58:00.974641 # # MANGLE_PSTATE_INVALID_STATE_TOGGLE :: Mangling uc_mcontext with INVALID STATE_TOGGLE
1224 22:58:00.982490 ok 11 selftests: arm64: mangle_pstate_invalid_compat_toggle
1225 22:58:01.030632 # selftests: arm64: mangle_pstate_invalid_daif_bits
1226 22:58:01.081517 # Registered handlers for all signals.
1227 22:58:01.081925 # Detected MINSTKSIGSZ:10000
1228 22:58:01.082035 # Testcase initialized.
1229 22:58:01.082128 # uc context validated.
1230 22:58:01.082215 # Handled SIG_TRIG
1231 22:58:01.082300 # SIG_OK -- SP:0xFFFFFA3D71E0 si_addr@:0xfffffa3d71e0 si_code:2 token@:(nil) offset:-281474880074208
1232 22:58:01.082405 # ==>> completed. PASS(1)
1233 22:58:01.082492 # # MANGLE_PSTATE_INVALID_DAIF_BITS :: Mangling uc_mcontext with INVALID DAIF_BITS
1234 22:58:01.090141 ok 12 selftests: arm64: mangle_pstate_invalid_daif_bits
1235 22:58:01.143627 # selftests: arm64: mangle_pstate_invalid_mode_el1h
1236 22:58:01.194086 # Registered handlers for all signals.
1237 22:58:01.194310 # Detected MINSTKSIGSZ:10000
1238 22:58:01.194402 # Testcase initialized.
1239 22:58:01.194490 # uc context validated.
1240 22:58:01.194578 # Handled SIG_TRIG
1241 22:58:01.194684 # SIG_OK -- SP:0xFFFFDF718FE0 si_addr@:0xffffdf718fe0 si_code:2 token@:(nil) offset:-281474430504928
1242 22:58:01.194775 # ==>> completed. PASS(1)
1243 22:58:01.194863 # # MANGLE_PSTATE_INVALID_MODE_EL1h :: Mangling uc_mcontext INVALID MODE EL1h
1244 22:58:01.202719 ok 13 selftests: arm64: mangle_pstate_invalid_mode_el1h
1245 22:58:01.250974 # selftests: arm64: mangle_pstate_invalid_mode_el1t
1246 22:58:01.303666 # Registered handlers for all signals.
1247 22:58:01.303988 # Detected MINSTKSIGSZ:10000
1248 22:58:01.304160 # Testcase initialized.
1249 22:58:01.304284 # uc context validated.
1250 22:58:01.304400 # Handled SIG_TRIG
1251 22:58:01.304543 # SIG_OK -- SP:0xFFFFE3D0B760 si_addr@:0xffffe3d0b760 si_code:2 token@:(nil) offset:-281474503849824
1252 22:58:01.304666 # ==>> completed. PASS(1)
1253 22:58:01.304782 # # MANGLE_PSTATE_INVALID_MODE_EL1t :: Mangling uc_mcontext INVALID MODE EL1t
1254 22:58:01.312227 ok 14 selftests: arm64: mangle_pstate_invalid_mode_el1t
1255 22:58:01.358541 # selftests: arm64: mangle_pstate_invalid_mode_el2h
1256 22:58:01.410148 # Registered handlers for all signals.
1257 22:58:01.410481 # Detected MINSTKSIGSZ:10000
1258 22:58:01.410871 # Testcase initialized.
1259 22:58:01.410980 # uc context validated.
1260 22:58:01.411072 # Handled SIG_TRIG
1261 22:58:01.411157 # SIG_OK -- SP:0xFFFFF0952E20 si_addr@:0xfffff0952e20 si_code:2 token@:(nil) offset:-281474718051872
1262 22:58:01.411246 # ==>> completed. PASS(1)
1263 22:58:01.411332 # # MANGLE_PSTATE_INVALID_MODE_EL2h :: Mangling uc_mcontext INVALID MODE EL2h
1264 22:58:01.419758 ok 15 selftests: arm64: mangle_pstate_invalid_mode_el2h
1265 22:58:01.468075 # selftests: arm64: mangle_pstate_invalid_mode_el2t
1266 22:58:01.518865 # Registered handlers for all signals.
1267 22:58:01.519334 # Detected MINSTKSIGSZ:10000
1268 22:58:01.519444 # Testcase initialized.
1269 22:58:01.519535 # uc context validated.
1270 22:58:01.519629 # Handled SIG_TRIG
1271 22:58:01.519715 # SIG_OK -- SP:0xFFFFE3516350 si_addr@:0xffffe3516350 si_code:2 token@:(nil) offset:-281474495505232
1272 22:58:01.519817 # ==>> completed. PASS(1)
1273 22:58:01.519901 # # MANGLE_PSTATE_INVALID_MODE_EL2t :: Mangling uc_mcontext INVALID MODE EL2t
1274 22:58:01.528137 ok 16 selftests: arm64: mangle_pstate_invalid_mode_el2t
1275 22:58:01.576514 # selftests: arm64: mangle_pstate_invalid_mode_el3h
1276 22:58:01.627463 # Registered handlers for all signals.
1277 22:58:01.627926 # Detected MINSTKSIGSZ:10000
1278 22:58:01.628044 # Testcase initialized.
1279 22:58:01.628140 # uc context validated.
1280 22:58:01.628232 # Handled SIG_TRIG
1281 22:58:01.628341 # SIG_OK -- SP:0xFFFFECE76550 si_addr@:0xffffece76550 si_code:2 token@:(nil) offset:-281474656331088
1282 22:58:01.628436 # ==>> completed. PASS(1)
1283 22:58:01.628527 # # MANGLE_PSTATE_INVALID_MODE_EL3h :: Mangling uc_mcontext INVALID MODE EL3h
1284 22:58:01.634670 ok 17 selftests: arm64: mangle_pstate_invalid_mode_el3h
1285 22:58:01.685374 # selftests: arm64: mangle_pstate_invalid_mode_el3t
1286 22:58:01.735400 # Registered handlers for all signals.
1287 22:58:01.735680 # Detected MINSTKSIGSZ:10000
1288 22:58:01.736136 # Testcase initialized.
1289 22:58:01.736309 # uc context validated.
1290 22:58:01.736501 # Handled SIG_TRIG
1291 22:58:01.736690 # SIG_OK -- SP:0xFFFFDB46B270 si_addr@:0xffffdb46b270 si_code:2 token@:(nil) offset:-281474360586864
1292 22:58:01.736883 # ==>> completed. PASS(1)
1293 22:58:01.737072 # # MANGLE_PSTATE_INVALID_MODE_EL3t :: Mangling uc_mcontext INVALID MODE EL3t
1294 22:58:01.744972 ok 18 selftests: arm64: mangle_pstate_invalid_mode_el3t
1295 22:58:01.793723 # selftests: arm64: sme_trap_no_sm
1296 22:58:01.916951 # Registered handlers for all signals.
1297 22:58:01.917255 # Detected MINSTKSIGSZ:10000
1298 22:58:01.917391 # Required Features: [ SME ] supported
1299 22:58:01.917512 # Incompatible Features: [] absent
1300 22:58:01.917631 # Testcase initialized.
1301 22:58:01.918927 # SIG_OK -- SP:0xFFFFC112F3E0 si_addr@:0xaaaac10b2514 si_code:1 token@:(nil) offset:-187650359895316
1302 22:58:01.919241 # ==>> completed. PASS(1)
1303 22:58:01.919347 # # SME trap without SM :: Check that we get a SIGILL if we use streaming mode without enabling it
1304 22:58:01.934172 ok 19 selftests: arm64: sme_trap_no_sm
1305 22:58:02.032670 # selftests: arm64: sme_trap_non_streaming
1306 22:58:02.097273 # Registered handlers for all signals.
1307 22:58:02.097525 # Detected MINSTKSIGSZ:10000
1308 22:58:02.097833 # Required Features: [] NOT supported
1309 22:58:02.097940 # Incompatible Features: [] supported
1310 22:58:02.098033 # ==>> completed. SKIP.
1311 22:58:02.098122 # # SME SM trap unsupported instruction :: Check that we get a SIGILL if we use an unsupported instruction in streaming mode
1312 22:58:02.106521 ok 20 selftests: arm64: sme_trap_non_streaming # SKIP
1313 22:58:02.161853 # selftests: arm64: sme_trap_za
1314 22:58:02.215885 # Registered handlers for all signals.
1315 22:58:02.216439 # Detected MINSTKSIGSZ:10000
1316 22:58:02.216594 # Testcase initialized.
1317 22:58:02.216744 # SIG_OK -- SP:0xFFFFD9D003C0 si_addr@:0xaaaac21b2510 si_code:1 token@:(nil) offset:-187650377721104
1318 22:58:02.216891 # ==>> completed. PASS(1)
1319 22:58:02.217034 # # SME ZA trap :: Check that we get a SIGILL if we access ZA without enabling
1320 22:58:02.225388 ok 21 selftests: arm64: sme_trap_za
1321 22:58:02.276350 # selftests: arm64: sme_vl
1322 22:58:02.332242 # Registered handlers for all signals.
1323 22:58:02.332563 # Detected MINSTKSIGSZ:10000
1324 22:58:02.332976 # Required Features: [ SME ] supported
1325 22:58:02.333091 # Incompatible Features: [] absent
1326 22:58:02.333189 # Testcase initialized.
1327 22:58:02.333277 # uc context validated.
1328 22:58:02.333370 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1329 22:58:02.333460 # Handled SIG_COPYCTX
1330 22:58:02.333549 # got expected VL 32
1331 22:58:02.333636 # ==>> completed. PASS(1)
1332 22:58:02.333734 # # SME VL :: Check that we get the right SME VL reported
1333 22:58:02.341725 ok 22 selftests: arm64: sme_vl
1334 22:58:02.393828 # selftests: arm64: ssve_regs
1335 22:58:02.589329 # Registered handlers for all signals.
1336 22:58:02.589565 # Detected MINSTKSIGSZ:10000
1337 22:58:02.589672 # Required Features: [ SME FA64 ] supported
1338 22:58:02.589779 # Incompatible Features: [] absent
1339 22:58:02.589869 # Testcase initialized.
1340 22:58:02.589957 # Testing VL 256
1341 22:58:02.590045 # Validating EXTRA...
1342 22:58:02.590131 # uc context validated.
1343 22:58:02.590232 # 9360 byte GOOD CONTEXT grabbed from sig_copyctx handler
1344 22:58:02.590320 # Handled SIG_COPYCTX
1345 22:58:02.590412 # Got expected size 8752 and VL 256
1346 22:58:02.590499 # Testing VL 128
1347 22:58:02.590583 # Validating EXTRA...
1348 22:58:02.590667 # uc context validated.
1349 22:58:02.590767 # 4992 byte GOOD CONTEXT grabbed from sig_copyctx handler
1350 22:58:02.590854 # Handled SIG_COPYCTX
1351 22:58:02.590938 # Got expected size 4384 and VL 128
1352 22:58:02.591024 # Testing VL 64
1353 22:58:02.591110 # uc context validated.
1354 22:58:02.591210 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1355 22:58:02.591296 # Handled SIG_COPYCTX
1356 22:58:02.591380 # Got expected size 2208 and VL 64
1357 22:58:02.591464 # Testing VL 32
1358 22:58:02.591547 # uc context validated.
1359 22:58:02.591646 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1360 22:58:02.591732 # Handled SIG_COPYCTX
1361 22:58:02.591818 # Got expected size 1120 and VL 32
1362 22:58:02.591905 # Testing VL 16
1363 22:58:02.591991 # uc context validated.
1364 22:58:02.592093 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1365 22:58:02.592179 # Handled SIG_COPYCTX
1366 22:58:02.592263 # Got expected size 576 and VL 16
1367 22:58:02.592346 # ==>> completed. PASS(1)
1368 22:58:02.592443 # # Streaming SVE registers :: Check that we get the right Streaming SVE registers reported
1369 22:58:02.601630 ok 23 selftests: arm64: ssve_regs
1370 22:58:02.650160 # selftests: arm64: sve_regs
1371 22:58:03.306426 # Registered handlers for all signals.
1372 22:58:03.306681 # Detected MINSTKSIGSZ:10000
1373 22:58:03.307000 # Required Features: [ SVE ] supported
1374 22:58:03.307109 # Incompatible Features: [] absent
1375 22:58:03.307198 # Testcase initialized.
1376 22:58:03.307293 # Testing VL 256
1377 22:58:03.307383 # Validating EXTRA...
1378 22:58:03.307470 # uc context validated.
1379 22:58:03.307556 # 9360 byte GOOD CONTEXT grabbed from sig_copyctx handler
1380 22:58:03.307665 # Handled SIG_COPYCTX
1381 22:58:03.307756 # Got expected size 8752 and VL 256
1382 22:58:03.307844 # Testing VL 240
1383 22:58:03.307932 # Validating EXTRA...
1384 22:58:03.308017 # uc context validated.
1385 22:58:03.308103 # 8816 byte GOOD CONTEXT grabbed from sig_copyctx handler
1386 22:58:03.308192 # Handled SIG_COPYCTX
1387 22:58:03.308282 # Got expected size 8208 and VL 240
1388 22:58:03.308372 # Testing VL 224
1389 22:58:03.308480 # Validating EXTRA...
1390 22:58:03.308573 # uc context validated.
1391 22:58:03.308663 # 8272 byte GOOD CONTEXT grabbed from sig_copyctx handler
1392 22:58:03.308747 # Handled SIG_COPYCTX
1393 22:58:03.308826 # Got expected size 7664 and VL 224
1394 22:58:03.316205 # Testing VL 208
1395 22:58:03.316432 # Validating EXTRA...
1396 22:58:03.316529 # uc context validated.
1397 22:58:03.317349 # 7728 byte GOOD CONTEXT grabbed from sig_copyctx handler
1398 22:58:03.317704 # Handled SIG_COPYCTX
1399 22:58:03.317913 # Got expected size 7120 and VL 208
1400 22:58:03.318096 # Testing VL 192
1401 22:58:03.318302 # Validating EXTRA...
1402 22:58:03.318479 # uc context validated.
1403 22:58:03.318634 # 7184 byte GOOD CONTEXT grabbed from sig_copyctx handler
1404 22:58:03.318799 # Handled SIG_COPYCTX
1405 22:58:03.318955 # Got expected size 6576 and VL 192
1406 22:58:03.319087 # Testing VL 176
1407 22:58:03.319216 # Validating EXTRA...
1408 22:58:03.319372 # uc context validated.
1409 22:58:03.319549 # 6640 byte GOOD CONTEXT grabbed from sig_copyctx handler
1410 22:58:03.319720 # Handled SIG_COPYCTX
1411 22:58:03.319873 # Got expected size 6032 and VL 176
1412 22:58:03.320041 # Testing VL 160
1413 22:58:03.320206 # Validating EXTRA...
1414 22:58:03.320336 # uc context validated.
1415 22:58:03.320454 # 6096 byte GOOD CONTEXT grabbed from sig_copyctx handler
1416 22:58:03.320569 # Handled SIG_COPYCTX
1417 22:58:03.320682 # Got expected size 5488 and VL 160
1418 22:58:03.320797 # Testing VL 144
1419 22:58:03.320911 # Validating EXTRA...
1420 22:58:03.321026 # uc context validated.
1421 22:58:03.321139 # 5552 byte GOOD CONTEXT grabbed from sig_copyctx handler
1422 22:58:03.321252 # Handled SIG_COPYCTX
1423 22:58:03.321376 # Got expected size 4944 and VL 144
1424 22:58:03.321594 # Testing VL 128
1425 22:58:03.321815 # Validating EXTRA...
1426 22:58:03.322013 # uc context validated.
1427 22:58:03.322199 # 4992 byte GOOD CONTEXT grabbed from sig_copyctx handler
1428 22:58:03.322384 # Handled SIG_COPYCTX
1429 22:58:03.322567 # Got expected size 4384 and VL 128
1430 22:58:03.322722 # Testing VL 112
1431 22:58:03.322864 # Validating EXTRA...
1432 22:58:03.323004 # uc context validated.
1433 22:58:03.324802 # 4448 byte GOOD CONTEXT grabbed from sig_copyctx handler
1434 22:58:03.324978 # Handled SIG_COPYCTX
1435 22:58:03.325412 # Got expected size 3840 and VL 112
1436 22:58:03.325584 # Testing VL 96
1437 22:58:03.325724 # uc context validated.
1438 22:58:03.325844 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1439 22:58:03.325963 # Handled SIG_COPYCTX
1440 22:58:03.326083 # Got expected size 3296 and VL 96
1441 22:58:03.326200 # Testing VL 80
1442 22:58:03.326317 # uc context validated.
1443 22:58:03.326460 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1444 22:58:03.326583 # Handled SIG_COPYCTX
1445 22:58:03.326701 # Got expected size 2752 and VL 80
1446 22:58:03.326819 # Testing VL 64
1447 22:58:03.326935 # uc context validated.
1448 22:58:03.327053 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1449 22:58:03.327170 # Handled SIG_COPYCTX
1450 22:58:03.327288 # Got expected size 2208 and VL 64
1451 22:58:03.327407 # Testing VL 48
1452 22:58:03.327523 # uc context validated.
1453 22:58:03.327639 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1454 22:58:03.327754 # Handled SIG_COPYCTX
1455 22:58:03.327869 # Got expected size 1664 and VL 48
1456 22:58:03.327985 # Testing VL 32
1457 22:58:03.328130 # uc context validated.
1458 22:58:03.328252 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1459 22:58:03.328370 # Handled SIG_COPYCTX
1460 22:58:03.328487 # Got expected size 1120 and VL 32
1461 22:58:03.328603 # Testing VL 16
1462 22:58:03.328719 # uc context validated.
1463 22:58:03.328835 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1464 22:58:03.328952 # Handled SIG_COPYCTX
1465 22:58:03.329067 # Got expected size 576 and VL 16
1466 22:58:03.329182 # ==>> completed. PASS(1)
1467 22:58:03.329297 # # SVE registers :: Check that we get the right SVE registers reported
1468 22:58:03.329444 ok 24 selftests: arm64: sve_regs
1469 22:58:03.377556 # selftests: arm64: sve_vl
1470 22:58:03.434503 # Registered handlers for all signals.
1471 22:58:03.434763 # Detected MINSTKSIGSZ:10000
1472 22:58:03.435076 # Required Features: [ SVE ] supported
1473 22:58:03.435185 # Incompatible Features: [] absent
1474 22:58:03.435284 # Testcase initialized.
1475 22:58:03.435371 # uc context validated.
1476 22:58:03.435453 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1477 22:58:03.435535 # Handled SIG_COPYCTX
1478 22:58:03.435642 # got expected VL 64
1479 22:58:03.435733 # ==>> completed. PASS(1)
1480 22:58:03.435814 # # SVE VL :: Check that we get the right SVE VL reported
1481 22:58:03.442093 ok 25 selftests: arm64: sve_vl
1482 22:58:03.494002 # selftests: arm64: za_no_regs
1483 22:58:03.555159 # Registered handlers for all signals.
1484 22:58:03.555413 # Detected MINSTKSIGSZ:10000
1485 22:58:03.555747 # Required Features: [ SME ] supported
1486 22:58:03.555956 # Incompatible Features: [] absent
1487 22:58:03.556136 # Testcase initialized.
1488 22:58:03.556316 # Testing VL 256
1489 22:58:03.556532 # uc context validated.
1490 22:58:03.556738 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1491 22:58:03.556918 # Handled SIG_COPYCTX
1492 22:58:03.557076 # Got expected size 16 and VL 256
1493 22:58:03.557237 # Testing VL 128
1494 22:58:03.557482 # uc context validated.
1495 22:58:03.557695 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1496 22:58:03.557878 # Handled SIG_COPYCTX
1497 22:58:03.558099 # Got expected size 16 and VL 128
1498 22:58:03.558235 # Testing VL 64
1499 22:58:03.558352 # uc context validated.
1500 22:58:03.558518 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1501 22:58:03.558647 # Handled SIG_COPYCTX
1502 22:58:03.558762 # Got expected size 16 and VL 64
1503 22:58:03.558878 # Testing VL 32
1504 22:58:03.558991 # uc context validated.
1505 22:58:03.559104 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1506 22:58:03.559219 # Handled SIG_COPYCTX
1507 22:58:03.559331 # Got expected size 16 and VL 32
1508 22:58:03.559446 # Testing VL 16
1509 22:58:03.559561 # uc context validated.
1510 22:58:03.559704 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1511 22:58:03.559826 # Handled SIG_COPYCTX
1512 22:58:03.559941 # Got expected size 16 and VL 16
1513 22:58:03.560057 # ==>> completed. PASS(1)
1514 22:58:03.560171 # # ZA registers - ZA disabled :: Check ZA context with ZA disabled
1515 22:58:03.567537 ok 26 selftests: arm64: za_no_regs
1516 22:58:03.614543 # selftests: arm64: za_regs
1517 22:58:03.805060 # Registered handlers for all signals.
1518 22:58:03.805306 # Detected MINSTKSIGSZ:10000
1519 22:58:03.807302 # Required Features: [ SME ] supported
1520 22:58:03.807426 # Incompatible Features: [] absent
1521 22:58:03.807723 # Testcase initialized.
1522 22:58:03.807833 # Testing VL 256
1523 22:58:03.807920 # Validating EXTRA...
1524 22:58:03.808004 # uc context validated.
1525 22:58:03.808104 # 66160 byte GOOD CONTEXT grabbed from sig_copyctx handler
1526 22:58:03.808190 # Handled SIG_COPYCTX
1527 22:58:03.808274 # Got expected size 65552 and VL 256
1528 22:58:03.808358 # Testing VL 128
1529 22:58:03.808441 # Validating EXTRA...
1530 22:58:03.808541 # uc context validated.
1531 22:58:03.808626 # 17008 byte GOOD CONTEXT grabbed from sig_copyctx handler
1532 22:58:03.808711 # Handled SIG_COPYCTX
1533 22:58:03.808792 # Got expected size 16400 and VL 128
1534 22:58:03.808874 # Testing VL 64
1535 22:58:03.808955 # Validating EXTRA...
1536 22:58:03.809055 # uc context validated.
1537 22:58:03.809139 # 4720 byte GOOD CONTEXT grabbed from sig_copyctx handler
1538 22:58:03.809220 # Handled SIG_COPYCTX
1539 22:58:03.809303 # Got expected size 4112 and VL 64
1540 22:58:03.809391 # Testing VL 32
1541 22:58:03.809474 # uc context validated.
1542 22:58:03.809572 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1543 22:58:03.809662 # Handled SIG_COPYCTX
1544 22:58:03.816887 # Got expected size 1040 and VL 32
1545 22:58:03.817414 # Testing VL 16
1546 22:58:03.817523 # uc context validated.
1547 22:58:03.817611 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1548 22:58:03.817704 # Handled SIG_COPYCTX
1549 22:58:03.817803 # Got expected size 272 and VL 16
1550 22:58:03.817890 # ==>> completed. PASS(1)
1551 22:58:03.817993 # # ZA register :: Check that we get the right ZA registers reported
1552 22:58:03.818432 ok 27 selftests: arm64: za_regs
1553 22:58:03.872420 # selftests: arm64: pac
1554 22:58:04.029342 # TAP version 13
1555 22:58:04.029613 # 1..7
1556 22:58:04.030034 # # Starting 7 tests from 1 test cases.
1557 22:58:04.030238 # # RUN global.corrupt_pac ...
1558 22:58:04.030443 # # OK global.corrupt_pac
1559 22:58:04.030600 # ok 1 global.corrupt_pac
1560 22:58:04.030745 # # RUN global.pac_instructions_not_nop ...
1561 22:58:04.030889 # # OK global.pac_instructions_not_nop
1562 22:58:04.031073 # ok 2 global.pac_instructions_not_nop
1563 22:58:04.031212 # # RUN global.pac_instructions_not_nop_generic ...
1564 22:58:04.031358 # # OK global.pac_instructions_not_nop_generic
1565 22:58:04.031504 # ok 3 global.pac_instructions_not_nop_generic
1566 22:58:04.031646 # # RUN global.single_thread_different_keys ...
1567 22:58:04.031789 # # OK global.single_thread_different_keys
1568 22:58:04.031933 # ok 4 global.single_thread_different_keys
1569 22:58:04.032074 # # RUN global.exec_changed_keys ...
1570 22:58:04.032216 # # OK global.exec_changed_keys
1571 22:58:04.032401 # ok 5 global.exec_changed_keys
1572 22:58:04.032536 # # RUN global.context_switch_keep_keys ...
1573 22:58:04.032678 # # OK global.context_switch_keep_keys
1574 22:58:04.032821 # ok 6 global.context_switch_keep_keys
1575 22:58:04.032966 # # RUN global.context_switch_keep_keys_generic ...
1576 22:58:04.033108 # # OK global.context_switch_keep_keys_generic
1577 22:58:04.033250 # ok 7 global.context_switch_keep_keys_generic
1578 22:58:04.033441 # # PASSED: 7 / 7 tests passed.
1579 22:58:04.033614 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
1580 22:58:04.038715 ok 28 selftests: arm64: pac
1581 22:58:04.086667 # selftests: arm64: fp-stress
1582 22:58:21.370201 # TAP version 13
1583 22:58:21.370436 # 1..27
1584 22:58:21.371767 # # 1 CPUs, 16 SVE VLs, 5 SME VLs
1585 22:58:21.371980 # # Will run for 10s
1586 22:58:21.372075 # # Started FPSIMD-0-0
1587 22:58:21.372162 # # Started SVE-VL-256-0
1588 22:58:21.372247 # # Started SVE-VL-240-0
1589 22:58:21.372333 # # Started SVE-VL-224-0
1590 22:58:21.372417 # # Started SVE-VL-208-0
1591 22:58:21.372500 # # Started SVE-VL-192-0
1592 22:58:21.372583 # # Started SVE-VL-176-0
1593 22:58:21.372667 # # Started SVE-VL-160-0
1594 22:58:21.372747 # # Started SVE-VL-144-0
1595 22:58:21.372826 # # Started SVE-VL-128-0
1596 22:58:21.372902 # # Started SVE-VL-112-0
1597 22:58:21.372976 # # Started SVE-VL-96-0
1598 22:58:21.373052 # # Started SVE-VL-80-0
1599 22:58:21.373126 # # Started SVE-VL-64-0
1600 22:58:21.373199 # # Started SVE-VL-48-0
1601 22:58:21.373273 # # Started SVE-VL-32-0
1602 22:58:21.373346 # # Started SVE-VL-16-0
1603 22:58:21.373417 # # Started SSVE-VL-256-0
1604 22:58:21.373491 # # Started ZA-VL-256-0
1605 22:58:21.373565 # # Started SSVE-VL-128-0
1606 22:58:21.373644 # # Started ZA-VL-128-0
1607 22:58:21.373737 # # Started SSVE-VL-64-0
1608 22:58:21.373812 # # Started ZA-VL-64-0
1609 22:58:21.373885 # # Started SSVE-VL-32-0
1610 22:58:21.373956 # # Started ZA-VL-32-0
1611 22:58:21.374027 # # Started SSVE-VL-16-0
1612 22:58:21.374133 # # Started ZA-VL-16-0
1613 22:58:21.374206 # # SVE-VL-256-0: Vector length: 2048 bits
1614 22:58:21.374282 # # SVE-VL-256-0: PID: 908
1615 22:58:21.374361 # # FPSIMD-0-0: Vector length: 128 bits
1616 22:58:21.374433 # # FPSIMD-0-0: PID: 907
1617 22:58:21.374503 # # SVE-VL-208-0: Vector length: 1664 bits
1618 22:58:21.374581 # # SVE-VL-208-0: PID: 911
1619 22:58:21.374660 # # SVE-VL-176-0: Vector length: 1408 bits
1620 22:58:21.378077 # # SVE-VL-176-0: PID: 913
1621 22:58:21.378227 # # SVE-VL-192-0: Vector length: 1536 bits
1622 22:58:21.378322 # # SVE-VL-192-0: PID: 912
1623 22:58:21.378616 # # SVE-VL-240-0: Vector length: 1920 bits
1624 22:58:21.378718 # # SVE-VL-240-0: PID: 909
1625 22:58:21.378805 # # SVE-VL-224-0: Vector length: 1792 bits
1626 22:58:21.378894 # # SVE-VL-224-0: PID: 910
1627 22:58:21.378994 # # SVE-VL-80-0: Vector length: 640 bits
1628 22:58:21.379081 # # SVE-VL-80-0: PID: 919
1629 22:58:21.379164 # # SVE-VL-64-0: Vector length: 512 bits
1630 22:58:21.379248 # # SVE-VL-144-0: Vector length: 1152 bits
1631 22:58:21.379347 # # SVE-VL-144-0: PID: 915
1632 22:58:21.379435 # # SVE-VL-64-0: PID: 920
1633 22:58:21.379521 # # SVE-VL-160-0: Vector length: 1280 bits
1634 22:58:21.379603 # # SVE-VL-160-0: PID: 914
1635 22:58:21.379701 # # SVE-VL-32-0: Vector length: 256 bits
1636 22:58:21.379787 # # SVE-VL-32-0: PID: 922
1637 22:58:21.379885 # # ZA-VL-128-0: Streaming mode vector length: 1024 bits
1638 22:58:21.379970 # # ZA-VL-128-0: PID: 927
1639 22:58:21.380069 # # SVE-VL-16-0: Vector length: 128 bits
1640 22:58:21.380168 # # SVE-VL-16-0: PID: 923
1641 22:58:21.380267 # # SVE-VL-112-0: Vector length: 896 bits
1642 22:58:21.380366 # # SVE-VL-112-0: PID: 917
1643 22:58:21.380466 # # SSVE-VL-64-0: Streaming mode Vector length: 512 bits
1644 22:58:21.380753 # # SSVE-VL-64-0: PID: 928
1645 22:58:21.380842 # # ZA-VL-256-0: Streaming mode vector length: 2048 bits
1646 22:58:21.380931 # # ZA-VL-256-0: PID: 925
1647 22:58:21.386732 # # SSVE-VL-256-0: Streaming mode Vector length: 2048 bits
1648 22:58:21.387176 # # SSVE-VL-256-0: PID: 924
1649 22:58:21.387275 # # SSVE-VL-128-0: Streaming mode Vector length: 1024 bits
1650 22:58:21.387364 # # SSVE-VL-128-0: PID: 926
1651 22:58:21.387465 # # SVE-VL-96-0: Vector length: 768 bits
1652 22:58:21.387554 # # SVE-VL-96-0: PID: 918
1653 22:58:21.387656 # # SSVE-VL-32-0: Streaming mode Vector length: 256 bits
1654 22:58:21.387744 # # SSVE-VL-32-0: PID: 930
1655 22:58:21.387845 # # SVE-VL-48-0: Vector length: 384 bits
1656 22:58:21.387947 # # SVE-VL-48-0: PID: 921
1657 22:58:21.388050 # # SVE-VL-128-0: Vector length: 1024 bits
1658 22:58:21.388329 # # SVE-VL-128-0: PID: 916
1659 22:58:21.388421 # # ZA-VL-16-0: Streaming mode vector length: 128 bits
1660 22:58:21.388505 # # ZA-VL-16-0: PID: 933
1661 22:58:21.388606 # # SSVE-VL-16-0: Streaming mode Vector length: 128 bits
1662 22:58:21.388694 # # ZA-VL-64-0: Streaming mode vector length: 512 bits
1663 22:58:21.388799 # # ZA-VL-64-0: PID: 929
1664 22:58:21.388892 # # SSVE-VL-16-0: PID: 932
1665 22:58:21.389711 # # ZA-VL-32-0: Streaming mode vector length: 256 bits
1666 22:58:21.389811 # # ZA-VL-32-0: PID: 931
1667 22:58:21.389898 # # Finishing up...
1668 22:58:21.389996 # # SVE-VL-192-0: Terminated by signal 15, no error, iterations=3220, signals=9
1669 22:58:21.390098 # # SVE-VL-176-0: Terminated by signal 15, no error, iterations=3735, signals=9
1670 22:58:21.390382 # # SVE-VL-240-0: Terminated by signal 15, no error, iterations=2866, signals=9
1671 22:58:21.390671 # # SVE-VL-144-0: Terminated by signal 15, no error, iterations=3966, signals=9
1672 22:58:21.390763 # # SVE-VL-208-0: Terminated by signal 15, no error, iterations=3129, signals=9
1673 22:58:21.390863 # # ZA-VL-128-0: Terminated by signal 15, no error, iterations=751, signals=9
1674 22:58:21.391327 # # ZA-VL-16-0: Terminated by signal 15, no error, iterations=1515, signals=10
1675 22:58:21.391420 # # ZA-VL-32-0: Terminated by signal 15, no error, iterations=1007, signals=9
1676 22:58:21.391520 # # ZA-VL-256-0: Terminated by signal 15, no error, iterations=260, signals=10
1677 22:58:21.391605 # # SSVE-VL-128-0: Terminated by signal 15, no error, iterations=4337, signals=9
1678 22:58:21.391891 # # SVE-VL-224-0: Terminated by signal 15, no error, iterations=2846, signals=9
1679 22:58:21.391994 # # ZA-VL-64-0: Terminated by signal 15, no error, iterations=1119, signals=10
1680 22:58:21.392095 # # SSVE-VL-256-0: Terminated by signal 15, no error, iterations=2535, signals=10
1681 22:58:21.392387 # # SVE-VL-16-0: Terminated by signal 15, no error, iterations=11258, signals=10
1682 22:58:21.392676 # # SSVE-VL-16-0: Terminated by signal 15, no error, iterations=10757, signals=10
1683 22:58:21.392782 # # SVE-VL-160-0: Terminated by signal 15, no error, iterations=3621, signals=9
1684 22:58:21.495484 # # SSVE-VL-32-0: Terminated by signal 15, no error, iterations=9733, signals=10
1685 22:58:21.495741 # # SVE-VL-96-0: Terminated by signal 15, no error, iterations=4673, signals=10
1686 22:58:21.496055 # # SVE-VL-64-0: Terminated by signal 15, no error, iterations=6583, signals=10
1687 22:58:21.496163 # # SVE-VL-48-0: Terminated by signal 15, no error, iterations=6139, signals=10
1688 22:58:21.496254 # # SSVE-VL-64-0: Terminated by signal 15, no error, iterations=6779, signals=10
1689 22:58:21.496556 # # SVE-VL-80-0: Terminated by signal 15, no error, iterations=6278, signals=10
1690 22:58:21.496662 # # SVE-VL-128-0: Terminated by signal 15, no error, iterations=3654, signals=9
1691 22:58:21.496751 # # SVE-VL-256-0: Terminated by signal 15, no error, iterations=2760, signals=9
1692 22:58:21.497051 # # SVE-VL-112-0: Terminated by signal 15, no error, iterations=4135, signals=9
1693 22:58:21.497155 # # FPSIMD-0-0: Terminated by signal 15, no error, iterations=3029, signals=9
1694 22:58:21.502903 # # SVE-VL-32-0: Terminated by signal 15, no error, iterations=9817, signals=9
1695 22:58:21.503112 # ok 1 FPSIMD-0-0
1696 22:58:21.503411 # ok 2 SVE-VL-256-0
1697 22:58:21.503518 # ok 3 SVE-VL-240-0
1698 22:58:21.503604 # ok 4 SVE-VL-224-0
1699 22:58:21.503688 # ok 5 SVE-VL-208-0
1700 22:58:21.503771 # ok 6 SVE-VL-192-0
1701 22:58:21.503855 # ok 7 SVE-VL-176-0
1702 22:58:21.503937 # ok 8 SVE-VL-160-0
1703 22:58:21.504020 # ok 9 SVE-VL-144-0
1704 22:58:21.504102 # ok 10 SVE-VL-128-0
1705 22:58:21.504202 # ok 11 SVE-VL-112-0
1706 22:58:21.504288 # ok 12 SVE-VL-96-0
1707 22:58:21.504371 # ok 13 SVE-VL-80-0
1708 22:58:21.504453 # ok 14 SVE-VL-64-0
1709 22:58:21.504541 # ok 15 SVE-VL-48-0
1710 22:58:21.504624 # ok 16 SVE-VL-32-0
1711 22:58:21.504707 # ok 17 SVE-VL-16-0
1712 22:58:21.504789 # ok 18 SSVE-VL-256-0
1713 22:58:21.504872 # ok 19 ZA-VL-256-0
1714 22:58:21.504954 # ok 20 SSVE-VL-128-0
1715 22:58:21.505036 # ok 21 ZA-VL-128-0
1716 22:58:21.505136 # ok 22 SSVE-VL-64-0
1717 22:58:21.505222 # ok 23 ZA-VL-64-0
1718 22:58:21.505305 # ok 24 SSVE-VL-32-0
1719 22:58:21.505386 # ok 25 ZA-VL-32-0
1720 22:58:21.505466 # ok 26 SSVE-VL-16-0
1721 22:58:21.505548 # ok 27 ZA-VL-16-0
1722 22:58:21.505632 # # Totals: pass:27 fail:0 xfail:0 xpass:0 skip:0 error:0
1723 22:58:21.531713 ok 29 selftests: arm64: fp-stress
1724 22:58:21.710737 # selftests: arm64: sve-ptrace
1725 22:58:21.863251 # TAP version 13
1726 22:58:21.863497 # 1..4104
1727 22:58:21.863797 # # Parent is 950, child is 951
1728 22:58:21.863891 # ok 1 SVE FPSIMD set via SVE: 0
1729 22:58:21.863978 # ok 2 SVE get_fpsimd() gave same state
1730 22:58:21.864065 # ok 3 SVE SVE_PT_VL_INHERIT set
1731 22:58:21.864150 # ok 4 SVE SVE_PT_VL_INHERIT cleared
1732 22:58:21.864235 # ok 5 Set SVE VL 16
1733 22:58:21.864321 # ok 6 Set and get SVE data for VL 16
1734 22:58:21.864407 # ok 7 Set and get FPSIMD data for SVE VL 16
1735 22:58:21.864510 # ok 8 Set FPSIMD, read via SVE for SVE VL 16
1736 22:58:21.864597 # ok 9 Set SVE VL 32
1737 22:58:21.864683 # ok 10 Set and get SVE data for VL 32
1738 22:58:21.864767 # ok 11 Set and get FPSIMD data for SVE VL 32
1739 22:58:21.864852 # ok 12 Set FPSIMD, read via SVE for SVE VL 32
1740 22:58:21.864937 # ok 13 Set SVE VL 48
1741 22:58:21.865021 # ok 14 Set and get SVE data for VL 48
1742 22:58:21.865105 # ok 15 Set and get FPSIMD data for SVE VL 48
1743 22:58:21.865217 # ok 16 Set FPSIMD, read via SVE for SVE VL 48
1744 22:58:21.865304 # ok 17 Set SVE VL 64
1745 22:58:21.865388 # ok 18 Set and get SVE data for VL 64
1746 22:58:21.865470 # ok 19 Set and get FPSIMD data for SVE VL 64
1747 22:58:21.865556 # ok 20 Set FPSIMD, read via SVE for SVE VL 64
1748 22:58:21.865641 # ok 21 Set SVE VL 80
1749 22:58:21.865733 # ok 22 Set and get SVE data for VL 80
1750 22:58:21.865835 # ok 23 Set and get FPSIMD data for SVE VL 80
1751 22:58:21.866824 # ok 24 Set FPSIMD, read via SVE for SVE VL 80
1752 22:58:21.866933 # ok 25 Set SVE VL 96
1753 22:58:21.867019 # ok 26 Set and get SVE data for VL 96
1754 22:58:21.867120 # ok 27 Set and get FPSIMD data for SVE VL 96
1755 22:58:21.867209 # ok 28 Set FPSIMD, read via SVE for SVE VL 96
1756 22:58:21.867294 # ok 29 Set SVE VL 112
1757 22:58:21.867393 # ok 30 Set and get SVE data for VL 112
1758 22:58:21.867479 # ok 31 Set and get FPSIMD data for SVE VL 112
1759 22:58:21.867580 # ok 32 Set FPSIMD, read via SVE for SVE VL 112
1760 22:58:21.867667 # ok 33 Set SVE VL 128
1761 22:58:21.867751 # ok 34 Set and get SVE data for VL 128
1762 22:58:21.867850 # ok 35 Set and get FPSIMD data for SVE VL 128
1763 22:58:21.867937 # ok 36 Set FPSIMD, read via SVE for SVE VL 128
1764 22:58:21.868036 # ok 37 Set SVE VL 144
1765 22:58:21.868136 # ok 38 Set and get SVE data for VL 144
1766 22:58:21.868237 # ok 39 Set and get FPSIMD data for SVE VL 144
1767 22:58:21.868337 # ok 40 Set FPSIMD, read via SVE for SVE VL 144
1768 22:58:21.868424 # ok 41 Set SVE VL 160
1769 22:58:21.868523 # ok 42 Set and get SVE data for VL 160
1770 22:58:21.868609 # ok 43 Set and get FPSIMD data for SVE VL 160
1771 22:58:21.868896 # ok 44 Set FPSIMD, read via SVE for SVE VL 160
1772 22:58:21.868987 # ok 45 Set SVE VL 176
1773 22:58:21.869072 # ok 46 Set and get SVE data for VL 176
1774 22:58:21.869157 # ok 47 Set and get FPSIMD data for SVE VL 176
1775 22:58:21.869258 # ok 48 Set FPSIMD, read via SVE for SVE VL 176
1776 22:58:21.869344 # ok 49 Set SVE VL 192
1777 22:58:21.869428 # ok 50 Set and get SVE data for VL 192
1778 22:58:21.869510 # ok 51 Set and get FPSIMD data for SVE VL 192
1779 22:58:21.875830 # ok 52 Set FPSIMD, read via SVE for SVE VL 192
1780 22:58:21.876055 # ok 53 Set SVE VL 208
1781 22:58:21.876347 # ok 54 Set and get SVE data for VL 208
1782 22:58:21.876441 # ok 55 Set and get FPSIMD data for SVE VL 208
1783 22:58:21.876526 # ok 56 Set FPSIMD, read via SVE for SVE VL 208
1784 22:58:21.876609 # ok 57 Set SVE VL 224
1785 22:58:21.876692 # ok 58 Set and get SVE data for VL 224
1786 22:58:21.876775 # ok 59 Set and get FPSIMD data for SVE VL 224
1787 22:58:21.876873 # ok 60 Set FPSIMD, read via SVE for SVE VL 224
1788 22:58:21.876959 # ok 61 Set SVE VL 240
1789 22:58:21.877042 # ok 62 Set and get SVE data for VL 240
1790 22:58:21.877142 # ok 63 Set and get FPSIMD data for SVE VL 240
1791 22:58:21.877232 # ok 64 Set FPSIMD, read via SVE for SVE VL 240
1792 22:58:21.877316 # ok 65 Set SVE VL 256
1793 22:58:21.877397 # ok 66 Set and get SVE data for VL 256
1794 22:58:21.877477 # ok 67 Set and get FPSIMD data for SVE VL 256
1795 22:58:21.877576 # ok 68 Set FPSIMD, read via SVE for SVE VL 256
1796 22:58:21.877882 # ok 69 Set SVE VL 272
1797 22:58:21.878005 # ok 70 # SKIP SVE set SVE get SVE for VL 272
1798 22:58:21.878104 # ok 71 # SKIP SVE set SVE get FPSIMD for VL 272
1799 22:58:21.878491 # ok 72 # SKIP SVE set FPSIMD get SVE for VL 272
1800 22:58:21.878707 # ok 73 Set SVE VL 288
1801 22:58:21.878888 # ok 74 # SKIP SVE set SVE get SVE for VL 288
1802 22:58:21.879094 # ok 75 # SKIP SVE set SVE get FPSIMD for VL 288
1803 22:58:21.879275 # ok 76 # SKIP SVE set FPSIMD get SVE for VL 288
1804 22:58:21.879450 # ok 77 Set SVE VL 304
1805 22:58:21.879626 # ok 78 # SKIP SVE set SVE get SVE for VL 304
1806 22:58:21.879801 # ok 79 # SKIP SVE set SVE get FPSIMD for VL 304
1807 22:58:21.879974 # ok 80 # SKIP SVE set FPSIMD get SVE for VL 304
1808 22:58:21.880189 # ok 81 Set SVE VL 320
1809 22:58:21.880367 # ok 82 # SKIP SVE set SVE get SVE for VL 320
1810 22:58:21.880542 # ok 83 # SKIP SVE set SVE get FPSIMD for VL 320
1811 22:58:21.880719 # ok 84 # SKIP SVE set FPSIMD get SVE for VL 320
1812 22:58:21.880893 # ok 85 Set SVE VL 336
1813 22:58:21.881067 # ok 86 # SKIP SVE set SVE get SVE for VL 336
1814 22:58:21.881240 # ok 87 # SKIP SVE set SVE get FPSIMD for VL 336
1815 22:58:21.881408 # ok 88 # SKIP SVE set FPSIMD get SVE for VL 336
1816 22:58:21.881579 # ok 89 Set SVE VL 352
1817 22:58:21.881772 # ok 90 # SKIP SVE set SVE get SVE for VL 352
1818 22:58:21.881951 # ok 91 # SKIP SVE set SVE get FPSIMD for VL 352
1819 22:58:21.882129 # ok 92 # SKIP SVE set FPSIMD get SVE for VL 352
1820 22:58:21.882308 # ok 93 Set SVE VL 368
1821 22:58:21.882525 # ok 94 # SKIP SVE set SVE get SVE for VL 368
1822 22:58:21.882705 # ok 95 # SKIP SVE set SVE get FPSIMD for VL 368
1823 22:58:21.882874 # ok 96 # SKIP SVE set FPSIMD get SVE for VL 368
1824 22:58:21.883043 # ok 97 Set SVE VL 384
1825 22:58:21.883210 # ok 98 # SKIP SVE set SVE get SVE for VL 384
1826 22:58:21.883375 # ok 99 # SKIP SVE set SVE get FPSIMD for VL 384
1827 22:58:21.883543 # ok 100 # SKIP SVE set FPSIMD get SVE for VL 384
1828 22:58:21.883712 # ok 101 Set SVE VL 400
1829 22:58:21.892663 # ok 102 # SKIP SVE set SVE get SVE for VL 400
1830 22:58:21.893136 # ok 103 # SKIP SVE set SVE get FPSIMD for VL 400
1831 22:58:21.893252 # ok 104 # SKIP SVE set FPSIMD get SVE for VL 400
1832 22:58:21.893345 # ok 105 Set SVE VL 416
1833 22:58:21.893424 # ok 106 # SKIP SVE set SVE get SVE for VL 416
1834 22:58:21.893498 # ok 107 # SKIP SVE set SVE get FPSIMD for VL 416
1835 22:58:21.893572 # ok 108 # SKIP SVE set FPSIMD get SVE for VL 416
1836 22:58:21.893669 # ok 109 Set SVE VL 432
1837 22:58:21.894108 # ok 110 # SKIP SVE set SVE get SVE for VL 432
1838 22:58:21.894472 # ok 111 # SKIP SVE set SVE get FPSIMD for VL 432
1839 22:58:21.894576 # ok 112 # SKIP SVE set FPSIMD get SVE for VL 432
1840 22:58:21.894664 # ok 113 Set SVE VL 448
1841 22:58:21.894762 # ok 114 # SKIP SVE set SVE get SVE for VL 448
1842 22:58:21.894846 # ok 115 # SKIP SVE set SVE get FPSIMD for VL 448
1843 22:58:21.894945 # ok 116 # SKIP SVE set FPSIMD get SVE for VL 448
1844 22:58:21.895031 # ok 117 Set SVE VL 464
1845 22:58:21.895128 # ok 118 # SKIP SVE set SVE get SVE for VL 464
1846 22:58:21.895227 # ok 119 # SKIP SVE set SVE get FPSIMD for VL 464
1847 22:58:21.895527 # ok 120 # SKIP SVE set FPSIMD get SVE for VL 464
1848 22:58:21.895631 # ok 121 Set SVE VL 480
1849 22:58:21.895732 # ok 122 # SKIP SVE set SVE get SVE for VL 480
1850 22:58:21.896022 # ok 123 # SKIP SVE set SVE get FPSIMD for VL 480
1851 22:58:21.896124 # ok 124 # SKIP SVE set FPSIMD get SVE for VL 480
1852 22:58:21.896212 # ok 125 Set SVE VL 496
1853 22:58:21.896316 # ok 126 # SKIP SVE set SVE get SVE for VL 496
1854 22:58:21.896404 # ok 127 # SKIP SVE set SVE get FPSIMD for VL 496
1855 22:58:21.896503 # ok 128 # SKIP SVE set FPSIMD get SVE for VL 496
1856 22:58:21.896591 # ok 129 Set SVE VL 512
1857 22:58:21.896691 # ok 130 # SKIP SVE set SVE get SVE for VL 512
1858 22:58:21.896792 # ok 131 # SKIP SVE set SVE get FPSIMD for VL 512
1859 22:58:21.896902 # ok 132 # SKIP SVE set FPSIMD get SVE for VL 512
1860 22:58:21.897003 # ok 133 Set SVE VL 528
1861 22:58:21.897290 # ok 134 # SKIP SVE set SVE get SVE for VL 528
1862 22:58:21.897377 # ok 135 # SKIP SVE set SVE get FPSIMD for VL 528
1863 22:58:21.908330 # ok 136 # SKIP SVE set FPSIMD get SVE for VL 528
1864 22:58:21.908539 # ok 137 Set SVE VL 544
1865 22:58:21.908827 # ok 138 # SKIP SVE set SVE get SVE for VL 544
1866 22:58:21.908930 # ok 139 # SKIP SVE set SVE get FPSIMD for VL 544
1867 22:58:21.909017 # ok 140 # SKIP SVE set FPSIMD get SVE for VL 544
1868 22:58:21.909101 # ok 141 Set SVE VL 560
1869 22:58:21.909195 # ok 142 # SKIP SVE set SVE get SVE for VL 560
1870 22:58:21.909388 # ok 143 # SKIP SVE set SVE get FPSIMD for VL 560
1871 22:58:21.909533 # ok 144 # SKIP SVE set FPSIMD get SVE for VL 560
1872 22:58:21.909674 # ok 145 Set SVE VL 576
1873 22:58:21.909844 # ok 146 # SKIP SVE set SVE get SVE for VL 576
1874 22:58:21.910047 # ok 147 # SKIP SVE set SVE get FPSIMD for VL 576
1875 22:58:21.910210 # ok 148 # SKIP SVE set FPSIMD get SVE for VL 576
1876 22:58:21.910417 # ok 149 Set SVE VL 592
1877 22:58:21.910596 # ok 150 # SKIP SVE set SVE get SVE for VL 592
1878 22:58:21.910845 # ok 151 # SKIP SVE set SVE get FPSIMD for VL 592
1879 22:58:21.911045 # ok 152 # SKIP SVE set FPSIMD get SVE for VL 592
1880 22:58:21.911216 # ok 153 Set SVE VL 608
1881 22:58:21.911432 # ok 154 # SKIP SVE set SVE get SVE for VL 608
1882 22:58:21.911579 # ok 155 # SKIP SVE set SVE get FPSIMD for VL 608
1883 22:58:21.911744 # ok 156 # SKIP SVE set FPSIMD get SVE for VL 608
1884 22:58:21.911899 # ok 157 Set SVE VL 624
1885 22:58:21.912031 # ok 158 # SKIP SVE set SVE get SVE for VL 624
1886 22:58:21.912154 # ok 159 # SKIP SVE set SVE get FPSIMD for VL 624
1887 22:58:21.912341 # ok 160 # SKIP SVE set FPSIMD get SVE for VL 624
1888 22:58:21.912509 # ok 161 Set SVE VL 640
1889 22:58:21.912679 # ok 162 # SKIP SVE set SVE get SVE for VL 640
1890 22:58:21.912837 # ok 163 # SKIP SVE set SVE get FPSIMD for VL 640
1891 22:58:21.913003 # ok 164 # SKIP SVE set FPSIMD get SVE for VL 640
1892 22:58:21.913145 # ok 165 Set SVE VL 656
1893 22:58:21.913352 # ok 166 # SKIP SVE set SVE get SVE for VL 656
1894 22:58:21.913564 # ok 167 # SKIP SVE set SVE get FPSIMD for VL 656
1895 22:58:21.913786 # ok 168 # SKIP SVE set FPSIMD get SVE for VL 656
1896 22:58:21.913988 # ok 169 Set SVE VL 672
1897 22:58:21.914182 # ok 170 # SKIP SVE set SVE get SVE for VL 672
1898 22:58:21.914370 # ok 171 # SKIP SVE set SVE get FPSIMD for VL 672
1899 22:58:21.914554 # ok 172 # SKIP SVE set FPSIMD get SVE for VL 672
1900 22:58:21.914738 # ok 173 Set SVE VL 688
1901 22:58:21.914916 # ok 174 # SKIP SVE set SVE get SVE for VL 688
1902 22:58:21.921389 # ok 175 # SKIP SVE set SVE get FPSIMD for VL 688
1903 22:58:21.921970 # ok 176 # SKIP SVE set FPSIMD get SVE for VL 688
1904 22:58:21.922186 # ok 177 Set SVE VL 704
1905 22:58:21.922685 # ok 178 # SKIP SVE set SVE get SVE for VL 704
1906 22:58:21.922903 # ok 179 # SKIP SVE set SVE get FPSIMD for VL 704
1907 22:58:21.923133 # ok 180 # SKIP SVE set FPSIMD get SVE for VL 704
1908 22:58:21.923397 # ok 181 Set SVE VL 720
1909 22:58:21.923623 # ok 182 # SKIP SVE set SVE get SVE for VL 720
1910 22:58:21.924065 # ok 183 # SKIP SVE set SVE get FPSIMD for VL 720
1911 22:58:21.924168 # ok 184 # SKIP SVE set FPSIMD get SVE for VL 720
1912 22:58:21.924257 # ok 185 Set SVE VL 736
1913 22:58:21.924346 # ok 186 # SKIP SVE set SVE get SVE for VL 736
1914 22:58:21.924429 # ok 187 # SKIP SVE set SVE get FPSIMD for VL 736
1915 22:58:21.924514 # ok 188 # SKIP SVE set FPSIMD get SVE for VL 736
1916 22:58:21.924598 # ok 189 Set SVE VL 752
1917 22:58:21.924682 # ok 190 # SKIP SVE set SVE get SVE for VL 752
1918 22:58:21.924766 # ok 191 # SKIP SVE set SVE get FPSIMD for VL 752
1919 22:58:21.924850 # ok 192 # SKIP SVE set FPSIMD get SVE for VL 752
1920 22:58:21.924936 # ok 193 Set SVE VL 768
1921 22:58:21.925021 # ok 194 # SKIP SVE set SVE get SVE for VL 768
1922 22:58:21.925105 # ok 195 # SKIP SVE set SVE get FPSIMD for VL 768
1923 22:58:21.925209 # ok 196 # SKIP SVE set FPSIMD get SVE for VL 768
1924 22:58:21.925289 # ok 197 Set SVE VL 784
1925 22:58:21.925380 # ok 198 # SKIP SVE set SVE get SVE for VL 784
1926 22:58:21.925461 # ok 199 # SKIP SVE set SVE get FPSIMD for VL 784
1927 22:58:21.925538 # ok 200 # SKIP SVE set FPSIMD get SVE for VL 784
1928 22:58:21.925614 # ok 201 Set SVE VL 800
1929 22:58:21.925697 # ok 202 # SKIP SVE set SVE get SVE for VL 800
1930 22:58:21.925772 # ok 203 # SKIP SVE set SVE get FPSIMD for VL 800
1931 22:58:21.925848 # ok 204 # SKIP SVE set FPSIMD get SVE for VL 800
1932 22:58:21.925938 # ok 205 Set SVE VL 816
1933 22:58:21.932767 # ok 206 # SKIP SVE set SVE get SVE for VL 816
1934 22:58:21.933271 # ok 207 # SKIP SVE set SVE get FPSIMD for VL 816
1935 22:58:21.933456 # ok 208 # SKIP SVE set FPSIMD get SVE for VL 816
1936 22:58:21.933592 # ok 209 Set SVE VL 832
1937 22:58:21.933737 # ok 210 # SKIP SVE set SVE get SVE for VL 832
1938 22:58:21.933887 # ok 211 # SKIP SVE set SVE get FPSIMD for VL 832
1939 22:58:21.934072 # ok 212 # SKIP SVE set FPSIMD get SVE for VL 832
1940 22:58:21.934217 # ok 213 Set SVE VL 848
1941 22:58:21.934351 # ok 214 # SKIP SVE set SVE get SVE for VL 848
1942 22:58:21.934511 # ok 215 # SKIP SVE set SVE get FPSIMD for VL 848
1943 22:58:21.934651 # ok 216 # SKIP SVE set FPSIMD get SVE for VL 848
1944 22:58:21.934797 # ok 217 Set SVE VL 864
1945 22:58:21.934978 # ok 218 # SKIP SVE set SVE get SVE for VL 864
1946 22:58:21.935145 # ok 219 # SKIP SVE set SVE get FPSIMD for VL 864
1947 22:58:21.935309 # ok 220 # SKIP SVE set FPSIMD get SVE for VL 864
1948 22:58:21.935470 # ok 221 Set SVE VL 880
1949 22:58:21.935607 # ok 222 # SKIP SVE set SVE get SVE for VL 880
1950 22:58:21.935736 # ok 223 # SKIP SVE set SVE get FPSIMD for VL 880
1951 22:58:21.935864 # ok 224 # SKIP SVE set FPSIMD get SVE for VL 880
1952 22:58:21.936003 # ok 225 Set SVE VL 896
1953 22:58:21.936238 # ok 226 # SKIP SVE set SVE get SVE for VL 896
1954 22:58:21.936438 # ok 227 # SKIP SVE set SVE get FPSIMD for VL 896
1955 22:58:21.936633 # ok 228 # SKIP SVE set FPSIMD get SVE for VL 896
1956 22:58:21.936814 # ok 229 Set SVE VL 912
1957 22:58:21.936976 # ok 230 # SKIP SVE set SVE get SVE for VL 912
1958 22:58:21.937117 # ok 231 # SKIP SVE set SVE get FPSIMD for VL 912
1959 22:58:21.937243 # ok 232 # SKIP SVE set FPSIMD get SVE for VL 912
1960 22:58:21.937404 # ok 233 Set SVE VL 928
1961 22:58:21.937530 # ok 234 # SKIP SVE set SVE get SVE for VL 928
1962 22:58:21.937661 # ok 235 # SKIP SVE set SVE get FPSIMD for VL 928
1963 22:58:21.937780 # ok 236 # SKIP SVE set FPSIMD get SVE for VL 928
1964 22:58:21.937895 # ok 237 Set SVE VL 944
1965 22:58:21.938010 # ok 238 # SKIP SVE set SVE get SVE for VL 944
1966 22:58:21.938124 # ok 239 # SKIP SVE set SVE get FPSIMD for VL 944
1967 22:58:21.938239 # ok 240 # SKIP SVE set FPSIMD get SVE for VL 944
1968 22:58:21.938353 # ok 241 Set SVE VL 960
1969 22:58:21.938467 # ok 242 # SKIP SVE set SVE get SVE for VL 960
1970 22:58:21.938581 # ok 243 # SKIP SVE set SVE get FPSIMD for VL 960
1971 22:58:21.944331 # ok 244 # SKIP SVE set FPSIMD get SVE for VL 960
1972 22:58:21.944806 # ok 245 Set SVE VL 976
1973 22:58:21.944913 # ok 246 # SKIP SVE set SVE get SVE for VL 976
1974 22:58:21.944999 # ok 247 # SKIP SVE set SVE get FPSIMD for VL 976
1975 22:58:21.945083 # ok 248 # SKIP SVE set FPSIMD get SVE for VL 976
1976 22:58:21.945162 # ok 249 Set SVE VL 992
1977 22:58:21.945261 # ok 250 # SKIP SVE set SVE get SVE for VL 992
1978 22:58:21.945358 # ok 251 # SKIP SVE set SVE get FPSIMD for VL 992
1979 22:58:21.945448 # ok 252 # SKIP SVE set FPSIMD get SVE for VL 992
1980 22:58:21.945534 # ok 253 Set SVE VL 1008
1981 22:58:21.945629 # ok 254 # SKIP SVE set SVE get SVE for VL 1008
1982 22:58:21.948436 # ok 255 # SKIP SVE set SVE get FPSIMD for VL 1008
1983 22:58:21.948728 # ok 256 # SKIP SVE set FPSIMD get SVE for VL 1008
1984 22:58:21.948837 # ok 257 Set SVE VL 1024
1985 22:58:21.948921 # ok 258 # SKIP SVE set SVE get SVE for VL 1024
1986 22:58:21.949018 # ok 259 # SKIP SVE set SVE get FPSIMD for VL 1024
1987 22:58:21.949101 # ok 260 # SKIP SVE set FPSIMD get SVE for VL 1024
1988 22:58:21.949182 # ok 261 Set SVE VL 1040
1989 22:58:21.949277 # ok 262 # SKIP SVE set SVE get SVE for VL 1040
1990 22:58:21.949381 # ok 263 # SKIP SVE set SVE get FPSIMD for VL 1040
1991 22:58:21.949854 # ok 264 # SKIP SVE set FPSIMD get SVE for VL 1040
1992 22:58:21.949964 # ok 265 Set SVE VL 1056
1993 22:58:21.950064 # ok 266 # SKIP SVE set SVE get SVE for VL 1056
1994 22:58:21.950157 # ok 267 # SKIP SVE set SVE get FPSIMD for VL 1056
1995 22:58:21.950246 # ok 268 # SKIP SVE set FPSIMD get SVE for VL 1056
1996 22:58:21.950335 # ok 269 Set SVE VL 1072
1997 22:58:21.950716 # ok 270 # SKIP SVE set SVE get SVE for VL 1072
1998 22:58:21.950818 # ok 271 # SKIP SVE set SVE get FPSIMD for VL 1072
1999 22:58:21.950899 # ok 272 # SKIP SVE set FPSIMD get SVE for VL 1072
2000 22:58:21.950976 # ok 273 Set SVE VL 1088
2001 22:58:21.951067 # ok 274 # SKIP SVE set SVE get SVE for VL 1088
2002 22:58:21.951150 # ok 275 # SKIP SVE set SVE get FPSIMD for VL 1088
2003 22:58:21.951235 # ok 276 # SKIP SVE set FPSIMD get SVE for VL 1088
2004 22:58:21.951318 # ok 277 Set SVE VL 1104
2005 22:58:21.951426 # ok 278 # SKIP SVE set SVE get SVE for VL 1104
2006 22:58:21.951508 # ok 279 # SKIP SVE set SVE get FPSIMD for VL 1104
2007 22:58:21.951584 # ok 280 # SKIP SVE set FPSIMD get SVE for VL 1104
2008 22:58:21.951660 # ok 281 Set SVE VL 1120
2009 22:58:21.951751 # ok 282 # SKIP SVE set SVE get SVE for VL 1120
2010 22:58:21.951830 # ok 283 # SKIP SVE set SVE get FPSIMD for VL 1120
2011 22:58:21.951931 # ok 284 # SKIP SVE set FPSIMD get SVE for VL 1120
2012 22:58:21.952018 # ok 285 Set SVE VL 1136
2013 22:58:21.952118 # ok 286 # SKIP SVE set SVE get SVE for VL 1136
2014 22:58:21.952200 # ok 287 # SKIP SVE set SVE get FPSIMD for VL 1136
2015 22:58:21.952516 # ok 288 # SKIP SVE set FPSIMD get SVE for VL 1136
2016 22:58:21.952624 # ok 289 Set SVE VL 1152
2017 22:58:21.952713 # ok 290 # SKIP SVE set SVE get SVE for VL 1152
2018 22:58:21.952809 # ok 291 # SKIP SVE set SVE get FPSIMD for VL 1152
2019 22:58:21.952889 # ok 292 # SKIP SVE set FPSIMD get SVE for VL 1152
2020 22:58:21.971324 # ok 293 Set SVE VL 1168
2021 22:58:21.971862 # ok 294 # SKIP SVE set SVE get SVE for VL 1168
2022 22:58:21.972070 # ok 295 # SKIP SVE set SVE get FPSIMD for VL 1168
2023 22:58:21.972268 # ok 296 # SKIP SVE set FPSIMD get SVE for VL 1168
2024 22:58:21.972445 # ok 297 Set SVE VL 1184
2025 22:58:21.972613 # ok 298 # SKIP SVE set SVE get SVE for VL 1184
2026 22:58:21.972816 # ok 299 # SKIP SVE set SVE get FPSIMD for VL 1184
2027 22:58:21.972991 # ok 300 # SKIP SVE set FPSIMD get SVE for VL 1184
2028 22:58:21.973159 # ok 301 Set SVE VL 1200
2029 22:58:21.973321 # ok 302 # SKIP SVE set SVE get SVE for VL 1200
2030 22:58:21.973518 # ok 303 # SKIP SVE set SVE get FPSIMD for VL 1200
2031 22:58:21.973672 # ok 304 # SKIP SVE set FPSIMD get SVE for VL 1200
2032 22:58:21.973824 # ok 305 Set SVE VL 1216
2033 22:58:21.974039 # ok 306 # SKIP SVE set SVE get SVE for VL 1216
2034 22:58:21.974217 # ok 307 # SKIP SVE set SVE get FPSIMD for VL 1216
2035 22:58:21.974418 # ok 308 # SKIP SVE set FPSIMD get SVE for VL 1216
2036 22:58:21.974575 # ok 309 Set SVE VL 1232
2037 22:58:21.974782 # ok 310 # SKIP SVE set SVE get SVE for VL 1232
2038 22:58:21.974960 # ok 311 # SKIP SVE set SVE get FPSIMD for VL 1232
2039 22:58:21.975124 # ok 312 # SKIP SVE set FPSIMD get SVE for VL 1232
2040 22:58:21.975273 # ok 313 Set SVE VL 1248
2041 22:58:21.975435 # ok 314 # SKIP SVE set SVE get SVE for VL 1248
2042 22:58:21.975589 # ok 315 # SKIP SVE set SVE get FPSIMD for VL 1248
2043 22:58:21.975748 # ok 316 # SKIP SVE set FPSIMD get SVE for VL 1248
2044 22:58:21.975911 # ok 317 Set SVE VL 1264
2045 22:58:21.976131 # ok 318 # SKIP SVE set SVE get SVE for VL 1264
2046 22:58:21.976307 # ok 319 # SKIP SVE set SVE get FPSIMD for VL 1264
2047 22:58:21.977290 # ok 320 # SKIP SVE set FPSIMD get SVE for VL 1264
2048 22:58:21.977408 # ok 321 Set SVE VL 1280
2049 22:58:21.977504 # ok 322 # SKIP SVE set SVE get SVE for VL 1280
2050 22:58:21.977594 # ok 323 # SKIP SVE set SVE get FPSIMD for VL 1280
2051 22:58:21.977695 # ok 324 # SKIP SVE set FPSIMD get SVE for VL 1280
2052 22:58:21.977783 # ok 325 Set SVE VL 1296
2053 22:58:21.977870 # ok 326 # SKIP SVE set SVE get SVE for VL 1296
2054 22:58:21.977958 # ok 327 # SKIP SVE set SVE get FPSIMD for VL 1296
2055 22:58:21.978045 # ok 328 # SKIP SVE set FPSIMD get SVE for VL 1296
2056 22:58:21.978133 # ok 329 Set SVE VL 1312
2057 22:58:21.978223 # ok 330 # SKIP SVE set SVE get SVE for VL 1312
2058 22:58:21.978314 # ok 331 # SKIP SVE set SVE get FPSIMD for VL 1312
2059 22:58:21.978407 # ok 332 # SKIP SVE set FPSIMD get SVE for VL 1312
2060 22:58:21.978501 # ok 333 Set SVE VL 1328
2061 22:58:21.978593 # ok 334 # SKIP SVE set SVE get SVE for VL 1328
2062 22:58:21.978686 # ok 335 # SKIP SVE set SVE get FPSIMD for VL 1328
2063 22:58:21.978778 # ok 336 # SKIP SVE set FPSIMD get SVE for VL 1328
2064 22:58:21.978870 # ok 337 Set SVE VL 1344
2065 22:58:21.978962 # ok 338 # SKIP SVE set SVE get SVE for VL 1344
2066 22:58:21.979054 # ok 339 # SKIP SVE set SVE get FPSIMD for VL 1344
2067 22:58:21.979147 # ok 340 # SKIP SVE set FPSIMD get SVE for VL 1344
2068 22:58:21.979239 # ok 341 Set SVE VL 1360
2069 22:58:21.979326 # ok 342 # SKIP SVE set SVE get SVE for VL 1360
2070 22:58:21.979414 # ok 343 # SKIP SVE set SVE get FPSIMD for VL 1360
2071 22:58:21.979495 # ok 344 # SKIP SVE set FPSIMD get SVE for VL 1360
2072 22:58:21.979582 # ok 345 Set SVE VL 1376
2073 22:58:21.979664 # ok 346 # SKIP SVE set SVE get SVE for VL 1376
2074 22:58:21.979751 # ok 347 # SKIP SVE set SVE get FPSIMD for VL 1376
2075 22:58:21.979837 # ok 348 # SKIP SVE set FPSIMD get SVE for VL 1376
2076 22:58:21.979923 # ok 349 Set SVE VL 1392
2077 22:58:21.980006 # ok 350 # SKIP SVE set SVE get SVE for VL 1392
2078 22:58:21.980091 # ok 351 # SKIP SVE set SVE get FPSIMD for VL 1392
2079 22:58:21.980173 # ok 352 # SKIP SVE set FPSIMD get SVE for VL 1392
2080 22:58:21.980257 # ok 353 Set SVE VL 1408
2081 22:58:21.980340 # ok 354 # SKIP SVE set SVE get SVE for VL 1408
2082 22:58:21.980425 # ok 355 # SKIP SVE set SVE get FPSIMD for VL 1408
2083 22:58:21.980510 # ok 356 # SKIP SVE set FPSIMD get SVE for VL 1408
2084 22:58:21.980594 # ok 357 Set SVE VL 1424
2085 22:58:21.980878 # ok 358 # SKIP SVE set SVE get SVE for VL 1424
2086 22:58:21.985601 # ok 359 # SKIP SVE set SVE get FPSIMD for VL 1424
2087 22:58:21.985984 # ok 360 # SKIP SVE set FPSIMD get SVE for VL 1424
2088 22:58:21.986087 # ok 361 Set SVE VL 1440
2089 22:58:21.986169 # ok 362 # SKIP SVE set SVE get SVE for VL 1440
2090 22:58:21.986255 # ok 363 # SKIP SVE set SVE get FPSIMD for VL 1440
2091 22:58:21.986359 # ok 364 # SKIP SVE set FPSIMD get SVE for VL 1440
2092 22:58:21.986448 # ok 365 Set SVE VL 1456
2093 22:58:21.986525 # ok 366 # SKIP SVE set SVE get SVE for VL 1456
2094 22:58:21.986618 # ok 367 # SKIP SVE set SVE get FPSIMD for VL 1456
2095 22:58:21.986698 # ok 368 # SKIP SVE set FPSIMD get SVE for VL 1456
2096 22:58:21.986775 # ok 369 Set SVE VL 1472
2097 22:58:21.986858 # ok 370 # SKIP SVE set SVE get SVE for VL 1472
2098 22:58:21.986959 # ok 371 # SKIP SVE set SVE get FPSIMD for VL 1472
2099 22:58:21.987045 # ok 372 # SKIP SVE set FPSIMD get SVE for VL 1472
2100 22:58:21.987125 # ok 373 Set SVE VL 1488
2101 22:58:21.987201 # ok 374 # SKIP SVE set SVE get SVE for VL 1488
2102 22:58:21.987292 # ok 375 # SKIP SVE set SVE get FPSIMD for VL 1488
2103 22:58:21.987371 # ok 376 # SKIP SVE set FPSIMD get SVE for VL 1488
2104 22:58:21.987452 # ok 377 Set SVE VL 1504
2105 22:58:21.987538 # ok 378 # SKIP SVE set SVE get SVE for VL 1504
2106 22:58:21.987632 # ok 379 # SKIP SVE set SVE get FPSIMD for VL 1504
2107 22:58:21.987716 # ok 380 # SKIP SVE set FPSIMD get SVE for VL 1504
2108 22:58:21.987803 # ok 381 Set SVE VL 1520
2109 22:58:21.987900 # ok 382 # SKIP SVE set SVE get SVE for VL 1520
2110 22:58:21.987983 # ok 383 # SKIP SVE set SVE get FPSIMD for VL 1520
2111 22:58:21.988086 # ok 384 # SKIP SVE set FPSIMD get SVE for VL 1520
2112 22:58:21.988167 # ok 385 Set SVE VL 1536
2113 22:58:21.988244 # ok 386 # SKIP SVE set SVE get SVE for VL 1536
2114 22:58:21.988335 # ok 387 # SKIP SVE set SVE get FPSIMD for VL 1536
2115 22:58:21.988430 # ok 388 # SKIP SVE set FPSIMD get SVE for VL 1536
2116 22:58:21.988512 # ok 389 Set SVE VL 1552
2117 22:58:21.988612 # ok 390 # SKIP SVE set SVE get SVE for VL 1552
2118 22:58:21.988702 # ok 391 # SKIP SVE set SVE get FPSIMD for VL 1552
2119 22:58:21.988802 # ok 392 # SKIP SVE set FPSIMD get SVE for VL 1552
2120 22:58:21.988892 # ok 393 Set SVE VL 1568
2121 22:58:21.988995 # ok 394 # SKIP SVE set SVE get SVE for VL 1568
2122 22:58:21.989099 # ok 395 # SKIP SVE set SVE get FPSIMD for VL 1568
2123 22:58:21.989190 # ok 396 # SKIP SVE set FPSIMD get SVE for VL 1568
2124 22:58:21.989302 # ok 397 Set SVE VL 1584
2125 22:58:21.989386 # ok 398 # SKIP SVE set SVE get SVE for VL 1584
2126 22:58:21.993737 # ok 399 # SKIP SVE set SVE get FPSIMD for VL 1584
2127 22:58:21.994210 # ok 400 # SKIP SVE set FPSIMD get SVE for VL 1584
2128 22:58:21.994395 # ok 401 Set SVE VL 1600
2129 22:58:21.994587 # ok 402 # SKIP SVE set SVE get SVE for VL 1600
2130 22:58:21.994763 # ok 403 # SKIP SVE set SVE get FPSIMD for VL 1600
2131 22:58:21.994948 # ok 404 # SKIP SVE set FPSIMD get SVE for VL 1600
2132 22:58:21.995137 # ok 405 Set SVE VL 1616
2133 22:58:21.995308 # ok 406 # SKIP SVE set SVE get SVE for VL 1616
2134 22:58:21.995475 # ok 407 # SKIP SVE set SVE get FPSIMD for VL 1616
2135 22:58:21.995630 # ok 408 # SKIP SVE set FPSIMD get SVE for VL 1616
2136 22:58:21.995783 # ok 409 Set SVE VL 1632
2137 22:58:21.995943 # ok 410 # SKIP SVE set SVE get SVE for VL 1632
2138 22:58:21.996096 # ok 411 # SKIP SVE set SVE get FPSIMD for VL 1632
2139 22:58:21.996289 # ok 412 # SKIP SVE set FPSIMD get SVE for VL 1632
2140 22:58:21.996462 # ok 413 Set SVE VL 1648
2141 22:58:21.996621 # ok 414 # SKIP SVE set SVE get SVE for VL 1648
2142 22:58:21.996781 # ok 415 # SKIP SVE set SVE get FPSIMD for VL 1648
2143 22:58:21.996943 # ok 416 # SKIP SVE set FPSIMD get SVE for VL 1648
2144 22:58:21.997091 # ok 417 Set SVE VL 1664
2145 22:58:21.997244 # ok 418 # SKIP SVE set SVE get SVE for VL 1664
2146 22:58:21.997379 # ok 419 # SKIP SVE set SVE get FPSIMD for VL 1664
2147 22:58:21.997499 # ok 420 # SKIP SVE set FPSIMD get SVE for VL 1664
2148 22:58:21.997616 # ok 421 Set SVE VL 1680
2149 22:58:21.997857 # ok 422 # SKIP SVE set SVE get SVE for VL 1680
2150 22:58:21.998053 # ok 423 # SKIP SVE set SVE get FPSIMD for VL 1680
2151 22:58:21.998281 # ok 424 # SKIP SVE set FPSIMD get SVE for VL 1680
2152 22:58:21.998453 # ok 425 Set SVE VL 1696
2153 22:58:21.998598 # ok 426 # SKIP SVE set SVE get SVE for VL 1696
2154 22:58:21.998741 # ok 427 # SKIP SVE set SVE get FPSIMD for VL 1696
2155 22:58:21.998886 # ok 428 # SKIP SVE set FPSIMD get SVE for VL 1696
2156 22:58:21.999028 # ok 429 Set SVE VL 1712
2157 22:58:21.999169 # ok 430 # SKIP SVE set SVE get SVE for VL 1712
2158 22:58:21.999311 # ok 431 # SKIP SVE set SVE get FPSIMD for VL 1712
2159 22:58:21.999456 # ok 432 # SKIP SVE set FPSIMD get SVE for VL 1712
2160 22:58:21.999597 # ok 433 Set SVE VL 1728
2161 22:58:22.002122 # ok 434 # SKIP SVE set SVE get SVE for VL 1728
2162 22:58:22.002353 # ok 435 # SKIP SVE set SVE get FPSIMD for VL 1728
2163 22:58:22.002515 # ok 436 # SKIP SVE set FPSIMD get SVE for VL 1728
2164 22:58:22.002721 # ok 437 Set SVE VL 1744
2165 22:58:22.002936 # ok 438 # SKIP SVE set SVE get SVE for VL 1744
2166 22:58:22.003140 # ok 439 # SKIP SVE set SVE get FPSIMD for VL 1744
2167 22:58:22.003305 # ok 440 # SKIP SVE set FPSIMD get SVE for VL 1744
2168 22:58:22.003447 # ok 441 Set SVE VL 1760
2169 22:58:22.003608 # ok 442 # SKIP SVE set SVE get SVE for VL 1760
2170 22:58:22.003776 # ok 443 # SKIP SVE set SVE get FPSIMD for VL 1760
2171 22:58:22.003935 # ok 444 # SKIP SVE set FPSIMD get SVE for VL 1760
2172 22:58:22.004094 # ok 445 Set SVE VL 1776
2173 22:58:22.004259 # ok 446 # SKIP SVE set SVE get SVE for VL 1776
2174 22:58:22.004381 # ok 447 # SKIP SVE set SVE get FPSIMD for VL 1776
2175 22:58:22.004499 # ok 448 # SKIP SVE set FPSIMD get SVE for VL 1776
2176 22:58:22.004615 # ok 449 Set SVE VL 1792
2177 22:58:22.004729 # ok 450 # SKIP SVE set SVE get SVE for VL 1792
2178 22:58:22.004846 # ok 451 # SKIP SVE set SVE get FPSIMD for VL 1792
2179 22:58:22.004959 # ok 452 # SKIP SVE set FPSIMD get SVE for VL 1792
2180 22:58:22.005073 # ok 453 Set SVE VL 1808
2181 22:58:22.005203 # ok 454 # SKIP SVE set SVE get SVE for VL 1808
2182 22:58:22.005363 # ok 455 # SKIP SVE set SVE get FPSIMD for VL 1808
2183 22:58:22.005520 # ok 456 # SKIP SVE set FPSIMD get SVE for VL 1808
2184 22:58:22.005642 # ok 457 Set SVE VL 1824
2185 22:58:22.005867 # ok 458 # SKIP SVE set SVE get SVE for VL 1824
2186 22:58:22.006057 # ok 459 # SKIP SVE set SVE get FPSIMD for VL 1824
2187 22:58:22.006242 # ok 460 # SKIP SVE set FPSIMD get SVE for VL 1824
2188 22:58:22.006426 # ok 461 Set SVE VL 1840
2189 22:58:22.006584 # ok 462 # SKIP SVE set SVE get SVE for VL 1840
2190 22:58:22.006727 # ok 463 # SKIP SVE set SVE get FPSIMD for VL 1840
2191 22:58:22.006869 # ok 464 # SKIP SVE set FPSIMD get SVE for VL 1840
2192 22:58:22.009671 # ok 465 Set SVE VL 1856
2193 22:58:22.010092 # ok 466 # SKIP SVE set SVE get SVE for VL 1856
2194 22:58:22.010201 # ok 467 # SKIP SVE set SVE get FPSIMD for VL 1856
2195 22:58:22.010292 # ok 468 # SKIP SVE set FPSIMD get SVE for VL 1856
2196 22:58:22.010378 # ok 469 Set SVE VL 1872
2197 22:58:22.010483 # ok 470 # SKIP SVE set SVE get SVE for VL 1872
2198 22:58:22.010575 # ok 471 # SKIP SVE set SVE get FPSIMD for VL 1872
2199 22:58:22.010665 # ok 472 # SKIP SVE set FPSIMD get SVE for VL 1872
2200 22:58:22.010773 # ok 473 Set SVE VL 1888
2201 22:58:22.010869 # ok 474 # SKIP SVE set SVE get SVE for VL 1888
2202 22:58:22.010963 # ok 475 # SKIP SVE set SVE get FPSIMD for VL 1888
2203 22:58:22.011074 # ok 476 # SKIP SVE set FPSIMD get SVE for VL 1888
2204 22:58:22.011169 # ok 477 Set SVE VL 1904
2205 22:58:22.011262 # ok 478 # SKIP SVE set SVE get SVE for VL 1904
2206 22:58:22.011370 # ok 479 # SKIP SVE set SVE get FPSIMD for VL 1904
2207 22:58:22.018034 # ok 480 # SKIP SVE set FPSIMD get SVE for VL 1904
2208 22:58:22.018207 # ok 481 Set SVE VL 1920
2209 22:58:22.018307 # ok 482 # SKIP SVE set SVE get SVE for VL 1920
2210 22:58:22.018417 # ok 483 # SKIP SVE set SVE get FPSIMD for VL 1920
2211 22:58:22.018512 # ok 484 # SKIP SVE set FPSIMD get SVE for VL 1920
2212 22:58:22.018603 # ok 485 Set SVE VL 1936
2213 22:58:22.018693 # ok 486 # SKIP SVE set SVE get SVE for VL 1936
2214 22:58:22.018800 # ok 487 # SKIP SVE set SVE get FPSIMD for VL 1936
2215 22:58:22.018892 # ok 488 # SKIP SVE set FPSIMD get SVE for VL 1936
2216 22:58:22.018983 # ok 489 Set SVE VL 1952
2217 22:58:22.019091 # ok 490 # SKIP SVE set SVE get SVE for VL 1952
2218 22:58:22.019184 # ok 491 # SKIP SVE set SVE get FPSIMD for VL 1952
2219 22:58:22.019275 # ok 492 # SKIP SVE set FPSIMD get SVE for VL 1952
2220 22:58:22.019365 # ok 493 Set SVE VL 1968
2221 22:58:22.019472 # ok 494 # SKIP SVE set SVE get SVE for VL 1968
2222 22:58:22.019559 # ok 495 # SKIP SVE set SVE get FPSIMD for VL 1968
2223 22:58:22.019641 # ok 496 # SKIP SVE set FPSIMD get SVE for VL 1968
2224 22:58:22.019740 # ok 497 Set SVE VL 1984
2225 22:58:22.019825 # ok 498 # SKIP SVE set SVE get SVE for VL 1984
2226 22:58:22.019923 # ok 499 # SKIP SVE set SVE get FPSIMD for VL 1984
2227 22:58:22.020021 # ok 500 # SKIP SVE set FPSIMD get SVE for VL 1984
2228 22:58:22.020120 # ok 501 Set SVE VL 2000
2229 22:58:22.020204 # ok 502 # SKIP SVE set SVE get SVE for VL 2000
2230 22:58:22.020302 # ok 503 # SKIP SVE set SVE get FPSIMD for VL 2000
2231 22:58:22.020398 # ok 504 # SKIP SVE set FPSIMD get SVE for VL 2000
2232 22:58:22.020488 # ok 505 Set SVE VL 2016
2233 22:58:22.020834 # ok 506 # SKIP SVE set SVE get SVE for VL 2016
2234 22:58:22.021069 # ok 507 # SKIP SVE set SVE get FPSIMD for VL 2016
2235 22:58:22.021315 # ok 508 # SKIP SVE set FPSIMD get SVE for VL 2016
2236 22:58:22.021512 # ok 509 Set SVE VL 2032
2237 22:58:22.021663 # ok 510 # SKIP SVE set SVE get SVE for VL 2032
2238 22:58:22.021788 # ok 511 # SKIP SVE set SVE get FPSIMD for VL 2032
2239 22:58:22.021942 # ok 512 # SKIP SVE set FPSIMD get SVE for VL 2032
2240 22:58:22.022106 # ok 513 Set SVE VL 2048
2241 22:58:22.022279 # ok 514 # SKIP SVE set SVE get SVE for VL 2048
2242 22:58:22.022434 # ok 515 # SKIP SVE set SVE get FPSIMD for VL 2048
2243 22:58:22.022597 # ok 516 # SKIP SVE set FPSIMD get SVE for VL 2048
2244 22:58:22.022773 # ok 517 Set SVE VL 2064
2245 22:58:22.022985 # ok 518 # SKIP SVE set SVE get SVE for VL 2064
2246 22:58:22.023212 # ok 519 # SKIP SVE set SVE get FPSIMD for VL 2064
2247 22:58:22.023402 # ok 520 # SKIP SVE set FPSIMD get SVE for VL 2064
2248 22:58:22.023570 # ok 521 Set SVE VL 2080
2249 22:58:22.023729 # ok 522 # SKIP SVE set SVE get SVE for VL 2080
2250 22:58:22.023892 # ok 523 # SKIP SVE set SVE get FPSIMD for VL 2080
2251 22:58:22.024360 # ok 524 # SKIP SVE set FPSIMD get SVE for VL 2080
2252 22:58:22.024537 # ok 525 Set SVE VL 2096
2253 22:58:22.024699 # ok 526 # SKIP SVE set SVE get SVE for VL 2096
2254 22:58:22.024907 # ok 527 # SKIP SVE set SVE get FPSIMD for VL 2096
2255 22:58:22.025085 # ok 528 # SKIP SVE set FPSIMD get SVE for VL 2096
2256 22:58:22.025247 # ok 529 Set SVE VL 2112
2257 22:58:22.025402 # ok 530 # SKIP SVE set SVE get SVE for VL 2112
2258 22:58:22.025525 # ok 531 # SKIP SVE set SVE get FPSIMD for VL 2112
2259 22:58:22.025641 # ok 532 # SKIP SVE set FPSIMD get SVE for VL 2112
2260 22:58:22.025852 # ok 533 Set SVE VL 2128
2261 22:58:22.026046 # ok 534 # SKIP SVE set SVE get SVE for VL 2128
2262 22:58:22.026192 # ok 535 # SKIP SVE set SVE get FPSIMD for VL 2128
2263 22:58:22.026335 # ok 536 # SKIP SVE set FPSIMD get SVE for VL 2128
2264 22:58:22.026477 # ok 537 Set SVE VL 2144
2265 22:58:22.026618 # ok 538 # SKIP SVE set SVE get SVE for VL 2144
2266 22:58:22.026759 # ok 539 # SKIP SVE set SVE get FPSIMD for VL 2144
2267 22:58:22.026906 # ok 540 # SKIP SVE set FPSIMD get SVE for VL 2144
2268 22:58:22.027048 # ok 541 Set SVE VL 2160
2269 22:58:22.027246 # ok 542 # SKIP SVE set SVE get SVE for VL 2160
2270 22:58:22.027460 # ok 543 # SKIP SVE set SVE get FPSIMD for VL 2160
2271 22:58:22.027666 # ok 544 # SKIP SVE set FPSIMD get SVE for VL 2160
2272 22:58:22.027889 # ok 545 Set SVE VL 2176
2273 22:58:22.028407 # ok 546 # SKIP SVE set SVE get SVE for VL 2176
2274 22:58:22.028612 # ok 547 # SKIP SVE set SVE get FPSIMD for VL 2176
2275 22:58:22.028824 # ok 548 # SKIP SVE set FPSIMD get SVE for VL 2176
2276 22:58:22.029046 # ok 549 Set SVE VL 2192
2277 22:58:22.029511 # ok 550 # SKIP SVE set SVE get SVE for VL 2192
2278 22:58:22.029638 # ok 551 # SKIP SVE set SVE get FPSIMD for VL 2192
2279 22:58:22.029744 # ok 552 # SKIP SVE set FPSIMD get SVE for VL 2192
2280 22:58:22.029834 # ok 553 Set SVE VL 2208
2281 22:58:22.029923 # ok 554 # SKIP SVE set SVE get SVE for VL 2208
2282 22:58:22.030012 # ok 555 # SKIP SVE set SVE get FPSIMD for VL 2208
2283 22:58:22.030100 # ok 556 # SKIP SVE set FPSIMD get SVE for VL 2208
2284 22:58:22.030188 # ok 557 Set SVE VL 2224
2285 22:58:22.030276 # ok 558 # SKIP SVE set SVE get SVE for VL 2224
2286 22:58:22.030364 # ok 559 # SKIP SVE set SVE get FPSIMD for VL 2224
2287 22:58:22.030452 # ok 560 # SKIP SVE set FPSIMD get SVE for VL 2224
2288 22:58:22.030547 # ok 561 Set SVE VL 2240
2289 22:58:22.030634 # ok 562 # SKIP SVE set SVE get SVE for VL 2240
2290 22:58:22.030722 # ok 563 # SKIP SVE set SVE get FPSIMD for VL 2240
2291 22:58:22.030804 # ok 564 # SKIP SVE set FPSIMD get SVE for VL 2240
2292 22:58:22.030881 # ok 565 Set SVE VL 2256
2293 22:58:22.030958 # ok 566 # SKIP SVE set SVE get SVE for VL 2256
2294 22:58:22.031034 # ok 567 # SKIP SVE set SVE get FPSIMD for VL 2256
2295 22:58:22.031112 # ok 568 # SKIP SVE set FPSIMD get SVE for VL 2256
2296 22:58:22.031193 # ok 569 Set SVE VL 2272
2297 22:58:22.031278 # ok 570 # SKIP SVE set SVE get SVE for VL 2272
2298 22:58:22.031366 # ok 571 # SKIP SVE set SVE get FPSIMD for VL 2272
2299 22:58:22.031454 # ok 572 # SKIP SVE set FPSIMD get SVE for VL 2272
2300 22:58:22.031571 # ok 573 Set SVE VL 2288
2301 22:58:22.031663 # ok 574 # SKIP SVE set SVE get SVE for VL 2288
2302 22:58:22.031752 # ok 575 # SKIP SVE set SVE get FPSIMD for VL 2288
2303 22:58:22.031834 # ok 576 # SKIP SVE set FPSIMD get SVE for VL 2288
2304 22:58:22.031910 # ok 577 Set SVE VL 2304
2305 22:58:22.031990 # ok 578 # SKIP SVE set SVE get SVE for VL 2304
2306 22:58:22.032073 # ok 579 # SKIP SVE set SVE get FPSIMD for VL 2304
2307 22:58:22.032154 # ok 580 # SKIP SVE set FPSIMD get SVE for VL 2304
2308 22:58:22.032231 # ok 581 Set SVE VL 2320
2309 22:58:22.032306 # ok 582 # SKIP SVE set SVE get SVE for VL 2320
2310 22:58:22.032387 # ok 583 # SKIP SVE set SVE get FPSIMD for VL 2320
2311 22:58:22.032471 # ok 584 # SKIP SVE set FPSIMD get SVE for VL 2320
2312 22:58:22.032557 # ok 585 Set SVE VL 2336
2313 22:58:22.032641 # ok 586 # SKIP SVE set SVE get SVE for VL 2336
2314 22:58:22.032728 # ok 587 # SKIP SVE set SVE get FPSIMD for VL 2336
2315 22:58:22.032819 # ok 588 # SKIP SVE set FPSIMD get SVE for VL 2336
2316 22:58:22.032907 # ok 589 Set SVE VL 2352
2317 22:58:22.032986 # ok 590 # SKIP SVE set SVE get SVE for VL 2352
2318 22:58:22.033079 # ok 591 # SKIP SVE set SVE get FPSIMD for VL 2352
2319 22:58:22.033160 # ok 592 # SKIP SVE set FPSIMD get SVE for VL 2352
2320 22:58:22.033237 # ok 593 Set SVE VL 2368
2321 22:58:22.034035 # ok 594 # SKIP SVE set SVE get SVE for VL 2368
2322 22:58:22.034140 # ok 595 # SKIP SVE set SVE get FPSIMD for VL 2368
2323 22:58:22.034223 # ok 596 # SKIP SVE set FPSIMD get SVE for VL 2368
2324 22:58:22.034309 # ok 597 Set SVE VL 2384
2325 22:58:22.034396 # ok 598 # SKIP SVE set SVE get SVE for VL 2384
2326 22:58:22.034484 # ok 599 # SKIP SVE set SVE get FPSIMD for VL 2384
2327 22:58:22.034572 # ok 600 # SKIP SVE set FPSIMD get SVE for VL 2384
2328 22:58:22.034660 # ok 601 Set SVE VL 2400
2329 22:58:22.034748 # ok 602 # SKIP SVE set SVE get SVE for VL 2400
2330 22:58:22.034836 # ok 603 # SKIP SVE set SVE get FPSIMD for VL 2400
2331 22:58:22.034923 # ok 604 # SKIP SVE set FPSIMD get SVE for VL 2400
2332 22:58:22.035009 # ok 605 Set SVE VL 2416
2333 22:58:22.035097 # ok 606 # SKIP SVE set SVE get SVE for VL 2416
2334 22:58:22.035184 # ok 607 # SKIP SVE set SVE get FPSIMD for VL 2416
2335 22:58:22.035273 # ok 608 # SKIP SVE set FPSIMD get SVE for VL 2416
2336 22:58:22.035362 # ok 609 Set SVE VL 2432
2337 22:58:22.035450 # ok 610 # SKIP SVE set SVE get SVE for VL 2432
2338 22:58:22.035538 # ok 611 # SKIP SVE set SVE get FPSIMD for VL 2432
2339 22:58:22.035627 # ok 612 # SKIP SVE set FPSIMD get SVE for VL 2432
2340 22:58:22.035737 # ok 613 Set SVE VL 2448
2341 22:58:22.035829 # ok 614 # SKIP SVE set SVE get SVE for VL 2448
2342 22:58:22.035917 # ok 615 # SKIP SVE set SVE get FPSIMD for VL 2448
2343 22:58:22.036002 # ok 616 # SKIP SVE set FPSIMD get SVE for VL 2448
2344 22:58:22.036089 # ok 617 Set SVE VL 2464
2345 22:58:22.036174 # ok 618 # SKIP SVE set SVE get SVE for VL 2464
2346 22:58:22.036259 # ok 619 # SKIP SVE set SVE get FPSIMD for VL 2464
2347 22:58:22.036346 # ok 620 # SKIP SVE set FPSIMD get SVE for VL 2464
2348 22:58:22.036433 # ok 621 Set SVE VL 2480
2349 22:58:22.036526 # ok 622 # SKIP SVE set SVE get SVE for VL 2480
2350 22:58:22.036613 # ok 623 # SKIP SVE set SVE get FPSIMD for VL 2480
2351 22:58:22.036702 # ok 624 # SKIP SVE set FPSIMD get SVE for VL 2480
2352 22:58:22.036790 # ok 625 Set SVE VL 2496
2353 22:58:22.036877 # ok 626 # SKIP SVE set SVE get SVE for VL 2496
2354 22:58:22.036966 # ok 627 # SKIP SVE set SVE get FPSIMD for VL 2496
2355 22:58:22.037054 # ok 628 # SKIP SVE set FPSIMD get SVE for VL 2496
2356 22:58:22.037143 # ok 629 Set SVE VL 2512
2357 22:58:22.037253 # ok 630 # SKIP SVE set SVE get SVE for VL 2512
2358 22:58:22.037347 # ok 631 # SKIP SVE set SVE get FPSIMD for VL 2512
2359 22:58:22.037436 # ok 632 # SKIP SVE set FPSIMD get SVE for VL 2512
2360 22:58:22.037525 # ok 633 Set SVE VL 2528
2361 22:58:22.037613 # ok 634 # SKIP SVE set SVE get SVE for VL 2528
2362 22:58:22.038373 # ok 635 # SKIP SVE set SVE get FPSIMD for VL 2528
2363 22:58:22.038470 # ok 636 # SKIP SVE set FPSIMD get SVE for VL 2528
2364 22:58:22.038848 # ok 637 Set SVE VL 2544
2365 22:58:22.039051 # ok 638 # SKIP SVE set SVE get SVE for VL 2544
2366 22:58:22.039193 # ok 639 # SKIP SVE set SVE get FPSIMD for VL 2544
2367 22:58:22.039311 # ok 640 # SKIP SVE set FPSIMD get SVE for VL 2544
2368 22:58:22.039426 # ok 641 Set SVE VL 2560
2369 22:58:22.039526 # ok 642 # SKIP SVE set SVE get SVE for VL 2560
2370 22:58:22.039628 # ok 643 # SKIP SVE set SVE get FPSIMD for VL 2560
2371 22:58:22.039725 # ok 644 # SKIP SVE set FPSIMD get SVE for VL 2560
2372 22:58:22.039813 # ok 645 Set SVE VL 2576
2373 22:58:22.039898 # ok 646 # SKIP SVE set SVE get SVE for VL 2576
2374 22:58:22.039983 # ok 647 # SKIP SVE set SVE get FPSIMD for VL 2576
2375 22:58:22.040070 # ok 648 # SKIP SVE set FPSIMD get SVE for VL 2576
2376 22:58:22.040155 # ok 649 Set SVE VL 2592
2377 22:58:22.040241 # ok 650 # SKIP SVE set SVE get SVE for VL 2592
2378 22:58:22.040326 # ok 651 # SKIP SVE set SVE get FPSIMD for VL 2592
2379 22:58:22.040412 # ok 652 # SKIP SVE set FPSIMD get SVE for VL 2592
2380 22:58:22.040500 # ok 653 Set SVE VL 2608
2381 22:58:22.040587 # ok 654 # SKIP SVE set SVE get SVE for VL 2608
2382 22:58:22.040673 # ok 655 # SKIP SVE set SVE get FPSIMD for VL 2608
2383 22:58:22.040759 # ok 656 # SKIP SVE set FPSIMD get SVE for VL 2608
2384 22:58:22.040846 # ok 657 Set SVE VL 2624
2385 22:58:22.040931 # ok 658 # SKIP SVE set SVE get SVE for VL 2624
2386 22:58:22.041038 # ok 659 # SKIP SVE set SVE get FPSIMD for VL 2624
2387 22:58:22.041128 # ok 660 # SKIP SVE set FPSIMD get SVE for VL 2624
2388 22:58:22.041215 # ok 661 Set SVE VL 2640
2389 22:58:22.041319 # ok 662 # SKIP SVE set SVE get SVE for VL 2640
2390 22:58:22.041436 # ok 663 # SKIP SVE set SVE get FPSIMD for VL 2640
2391 22:58:22.041530 # ok 664 # SKIP SVE set FPSIMD get SVE for VL 2640
2392 22:58:22.041616 # ok 665 Set SVE VL 2656
2393 22:58:22.041763 # ok 666 # SKIP SVE set SVE get SVE for VL 2656
2394 22:58:22.046533 # ok 667 # SKIP SVE set SVE get FPSIMD for VL 2656
2395 22:58:22.046826 # ok 668 # SKIP SVE set FPSIMD get SVE for VL 2656
2396 22:58:22.046906 # ok 669 Set SVE VL 2672
2397 22:58:22.046999 # ok 670 # SKIP SVE set SVE get SVE for VL 2672
2398 22:58:22.047087 # ok 671 # SKIP SVE set SVE get FPSIMD for VL 2672
2399 22:58:22.047159 # ok 672 # SKIP SVE set FPSIMD get SVE for VL 2672
2400 22:58:22.047250 # ok 673 Set SVE VL 2688
2401 22:58:22.047758 # ok 674 # SKIP SVE set SVE get SVE for VL 2688
2402 22:58:22.047841 # ok 675 # SKIP SVE set SVE get FPSIMD for VL 2688
2403 22:58:22.047918 # ok 676 # SKIP SVE set FPSIMD get SVE for VL 2688
2404 22:58:22.047992 # ok 677 Set SVE VL 2704
2405 22:58:22.048247 # ok 678 # SKIP SVE set SVE get SVE for VL 2704
2406 22:58:22.048330 # ok 679 # SKIP SVE set SVE get FPSIMD for VL 2704
2407 22:58:22.048402 # ok 680 # SKIP SVE set FPSIMD get SVE for VL 2704
2408 22:58:22.048476 # ok 681 Set SVE VL 2720
2409 22:58:22.048589 # ok 682 # SKIP SVE set SVE get SVE for VL 2720
2410 22:58:22.048675 # ok 683 # SKIP SVE set SVE get FPSIMD for VL 2720
2411 22:58:22.048778 # ok 684 # SKIP SVE set FPSIMD get SVE for VL 2720
2412 22:58:22.048880 # ok 685 Set SVE VL 2736
2413 22:58:22.048983 # ok 686 # SKIP SVE set SVE get SVE for VL 2736
2414 22:58:22.049064 # ok 687 # SKIP SVE set SVE get FPSIMD for VL 2736
2415 22:58:22.049183 # ok 688 # SKIP SVE set FPSIMD get SVE for VL 2736
2416 22:58:22.049268 # ok 689 Set SVE VL 2752
2417 22:58:22.049356 # ok 690 # SKIP SVE set SVE get SVE for VL 2752
2418 22:58:22.049435 # ok 691 # SKIP SVE set SVE get FPSIMD for VL 2752
2419 22:58:22.050226 # ok 692 # SKIP SVE set FPSIMD get SVE for VL 2752
2420 22:58:22.050527 # ok 693 Set SVE VL 2768
2421 22:58:22.050639 # ok 694 # SKIP SVE set SVE get SVE for VL 2768
2422 22:58:22.050753 # ok 695 # SKIP SVE set SVE get FPSIMD for VL 2768
2423 22:58:22.051280 # ok 696 # SKIP SVE set FPSIMD get SVE for VL 2768
2424 22:58:22.051391 # ok 697 Set SVE VL 2784
2425 22:58:22.051685 # ok 698 # SKIP SVE set SVE get SVE for VL 2784
2426 22:58:22.051793 # ok 699 # SKIP SVE set SVE get FPSIMD for VL 2784
2427 22:58:22.051886 # ok 700 # SKIP SVE set FPSIMD get SVE for VL 2784
2428 22:58:22.051975 # ok 701 Set SVE VL 2800
2429 22:58:22.052059 # ok 702 # SKIP SVE set SVE get SVE for VL 2800
2430 22:58:22.052166 # ok 703 # SKIP SVE set SVE get FPSIMD for VL 2800
2431 22:58:22.052254 # ok 704 # SKIP SVE set FPSIMD get SVE for VL 2800
2432 22:58:22.052341 # ok 705 Set SVE VL 2816
2433 22:58:22.052428 # ok 706 # SKIP SVE set SVE get SVE for VL 2816
2434 22:58:22.052519 # ok 707 # SKIP SVE set SVE get FPSIMD for VL 2816
2435 22:58:22.052629 # ok 708 # SKIP SVE set FPSIMD get SVE for VL 2816
2436 22:58:22.052719 # ok 709 Set SVE VL 2832
2437 22:58:22.052812 # ok 710 # SKIP SVE set SVE get SVE for VL 2832
2438 22:58:22.052903 # ok 711 # SKIP SVE set SVE get FPSIMD for VL 2832
2439 22:58:22.053009 # ok 712 # SKIP SVE set FPSIMD get SVE for VL 2832
2440 22:58:22.053100 # ok 713 Set SVE VL 2848
2441 22:58:22.053190 # ok 714 # SKIP SVE set SVE get SVE for VL 2848
2442 22:58:22.053295 # ok 715 # SKIP SVE set SVE get FPSIMD for VL 2848
2443 22:58:22.053387 # ok 716 # SKIP SVE set FPSIMD get SVE for VL 2848
2444 22:58:22.053492 # ok 717 Set SVE VL 2864
2445 22:58:22.053938 # ok 718 # SKIP SVE set SVE get SVE for VL 2864
2446 22:58:22.054235 # ok 719 # SKIP SVE set SVE get FPSIMD for VL 2864
2447 22:58:22.054320 # ok 720 # SKIP SVE set FPSIMD get SVE for VL 2864
2448 22:58:22.054387 # ok 721 Set SVE VL 2880
2449 22:58:22.054649 # ok 722 # SKIP SVE set SVE get SVE for VL 2880
2450 22:58:22.054730 # ok 723 # SKIP SVE set SVE get FPSIMD for VL 2880
2451 22:58:22.054793 # ok 724 # SKIP SVE set FPSIMD get SVE for VL 2880
2452 22:58:22.054870 # ok 725 Set SVE VL 2896
2453 22:58:22.055203 # ok 726 # SKIP SVE set SVE get SVE for VL 2896
2454 22:58:22.055292 # ok 727 # SKIP SVE set SVE get FPSIMD for VL 2896
2455 22:58:22.055391 # ok 728 # SKIP SVE set FPSIMD get SVE for VL 2896
2456 22:58:22.055477 # ok 729 Set SVE VL 2912
2457 22:58:22.055569 # ok 730 # SKIP SVE set SVE get SVE for VL 2912
2458 22:58:22.055681 # ok 731 # SKIP SVE set SVE get FPSIMD for VL 2912
2459 22:58:22.055801 # ok 732 # SKIP SVE set FPSIMD get SVE for VL 2912
2460 22:58:22.055927 # ok 733 Set SVE VL 2928
2461 22:58:22.056034 # ok 734 # SKIP SVE set SVE get SVE for VL 2928
2462 22:58:22.056139 # ok 735 # SKIP SVE set SVE get FPSIMD for VL 2928
2463 22:58:22.056231 # ok 736 # SKIP SVE set FPSIMD get SVE for VL 2928
2464 22:58:22.056365 # ok 737 Set SVE VL 2944
2465 22:58:22.056467 # ok 738 # SKIP SVE set SVE get SVE for VL 2944
2466 22:58:22.056577 # ok 739 # SKIP SVE set SVE get FPSIMD for VL 2944
2467 22:58:22.056683 # ok 740 # SKIP SVE set FPSIMD get SVE for VL 2944
2468 22:58:22.056760 # ok 741 Set SVE VL 2960
2469 22:58:22.056827 # ok 742 # SKIP SVE set SVE get SVE for VL 2960
2470 22:58:22.056920 # ok 743 # SKIP SVE set SVE get FPSIMD for VL 2960
2471 22:58:22.056988 # ok 744 # SKIP SVE set FPSIMD get SVE for VL 2960
2472 22:58:22.057061 # ok 745 Set SVE VL 2976
2473 22:58:22.057134 # ok 746 # SKIP SVE set SVE get SVE for VL 2976
2474 22:58:22.057206 # ok 747 # SKIP SVE set SVE get FPSIMD for VL 2976
2475 22:58:22.057318 # ok 748 # SKIP SVE set FPSIMD get SVE for VL 2976
2476 22:58:22.057392 # ok 749 Set SVE VL 2992
2477 22:58:22.057453 # ok 750 # SKIP SVE set SVE get SVE for VL 2992
2478 22:58:22.057525 # ok 751 # SKIP SVE set SVE get FPSIMD for VL 2992
2479 22:58:22.057606 # ok 752 # SKIP SVE set FPSIMD get SVE for VL 2992
2480 22:58:22.057710 # ok 753 Set SVE VL 3008
2481 22:58:22.058024 # ok 754 # SKIP SVE set SVE get SVE for VL 3008
2482 22:58:22.058136 # ok 755 # SKIP SVE set SVE get FPSIMD for VL 3008
2483 22:58:22.058249 # ok 756 # SKIP SVE set FPSIMD get SVE for VL 3008
2484 22:58:22.058670 # ok 757 Set SVE VL 3024
2485 22:58:22.058774 # ok 758 # SKIP SVE set SVE get SVE for VL 3024
2486 22:58:22.058868 # ok 759 # SKIP SVE set SVE get FPSIMD for VL 3024
2487 22:58:22.058960 # ok 760 # SKIP SVE set FPSIMD get SVE for VL 3024
2488 22:58:22.059246 # ok 761 Set SVE VL 3040
2489 22:58:22.059345 # ok 762 # SKIP SVE set SVE get SVE for VL 3040
2490 22:58:22.059439 # ok 763 # SKIP SVE set SVE get FPSIMD for VL 3040
2491 22:58:22.059532 # ok 764 # SKIP SVE set FPSIMD get SVE for VL 3040
2492 22:58:22.059624 # ok 765 Set SVE VL 3056
2493 22:58:22.059733 # ok 766 # SKIP SVE set SVE get SVE for VL 3056
2494 22:58:22.059828 # ok 767 # SKIP SVE set SVE get FPSIMD for VL 3056
2495 22:58:22.059924 # ok 768 # SKIP SVE set FPSIMD get SVE for VL 3056
2496 22:58:22.060017 # ok 769 Set SVE VL 3072
2497 22:58:22.060129 # ok 770 # SKIP SVE set SVE get SVE for VL 3072
2498 22:58:22.060224 # ok 771 # SKIP SVE set SVE get FPSIMD for VL 3072
2499 22:58:22.060316 # ok 772 # SKIP SVE set FPSIMD get SVE for VL 3072
2500 22:58:22.060407 # ok 773 Set SVE VL 3088
2501 22:58:22.060516 # ok 774 # SKIP SVE set SVE get SVE for VL 3088
2502 22:58:22.060611 # ok 775 # SKIP SVE set SVE get FPSIMD for VL 3088
2503 22:58:22.060705 # ok 776 # SKIP SVE set FPSIMD get SVE for VL 3088
2504 22:58:22.060812 # ok 777 Set SVE VL 3104
2505 22:58:22.060904 # ok 778 # SKIP SVE set SVE get SVE for VL 3104
2506 22:58:22.061009 # ok 779 # SKIP SVE set SVE get FPSIMD for VL 3104
2507 22:58:22.061102 # ok 780 # SKIP SVE set FPSIMD get SVE for VL 3104
2508 22:58:22.061193 # ok 781 Set SVE VL 3120
2509 22:58:22.061485 # ok 782 # SKIP SVE set SVE get SVE for VL 3120
2510 22:58:22.061600 # ok 783 # SKIP SVE set SVE get FPSIMD for VL 3120
2511 22:58:22.061715 # ok 784 # SKIP SVE set FPSIMD get SVE for VL 3120
2512 22:58:22.061801 # ok 785 Set SVE VL 3136
2513 22:58:22.061882 # ok 786 # SKIP SVE set SVE get SVE for VL 3136
2514 22:58:22.061980 # ok 787 # SKIP SVE set SVE get FPSIMD for VL 3136
2515 22:58:22.062307 # ok 788 # SKIP SVE set FPSIMD get SVE for VL 3136
2516 22:58:22.062486 # ok 789 Set SVE VL 3152
2517 22:58:22.062654 # ok 790 # SKIP SVE set SVE get SVE for VL 3152
2518 22:58:22.062854 # ok 791 # SKIP SVE set SVE get FPSIMD for VL 3152
2519 22:58:22.063023 # ok 792 # SKIP SVE set FPSIMD get SVE for VL 3152
2520 22:58:22.063184 # ok 793 Set SVE VL 3168
2521 22:58:22.063343 # ok 794 # SKIP SVE set SVE get SVE for VL 3168
2522 22:58:22.063503 # ok 795 # SKIP SVE set SVE get FPSIMD for VL 3168
2523 22:58:22.063633 # ok 796 # SKIP SVE set FPSIMD get SVE for VL 3168
2524 22:58:22.063774 # ok 797 Set SVE VL 3184
2525 22:58:22.063932 # ok 798 # SKIP SVE set SVE get SVE for VL 3184
2526 22:58:22.064086 # ok 799 # SKIP SVE set SVE get FPSIMD for VL 3184
2527 22:58:22.064248 # ok 800 # SKIP SVE set FPSIMD get SVE for VL 3184
2528 22:58:22.064378 # ok 801 Set SVE VL 3200
2529 22:58:22.064498 # ok 802 # SKIP SVE set SVE get SVE for VL 3200
2530 22:58:22.064625 # ok 803 # SKIP SVE set SVE get FPSIMD for VL 3200
2531 22:58:22.064746 # ok 804 # SKIP SVE set FPSIMD get SVE for VL 3200
2532 22:58:22.064868 # ok 805 Set SVE VL 3216
2533 22:58:22.064995 # ok 806 # SKIP SVE set SVE get SVE for VL 3216
2534 22:58:22.065152 # ok 807 # SKIP SVE set SVE get FPSIMD for VL 3216
2535 22:58:22.065749 # ok 808 # SKIP SVE set FPSIMD get SVE for VL 3216
2536 22:58:22.065839 # ok 809 Set SVE VL 3232
2537 22:58:22.065914 # ok 810 # SKIP SVE set SVE get SVE for VL 3232
2538 22:58:22.065998 # ok 811 # SKIP SVE set SVE get FPSIMD for VL 3232
2539 22:58:22.066084 # ok 812 # SKIP SVE set FPSIMD get SVE for VL 3232
2540 22:58:22.066172 # ok 813 Set SVE VL 3248
2541 22:58:22.066254 # ok 814 # SKIP SVE set SVE get SVE for VL 3248
2542 22:58:22.066341 # ok 815 # SKIP SVE set SVE get FPSIMD for VL 3248
2543 22:58:22.066423 # ok 816 # SKIP SVE set FPSIMD get SVE for VL 3248
2544 22:58:22.066505 # ok 817 Set SVE VL 3264
2545 22:58:22.066609 # ok 818 # SKIP SVE set SVE get SVE for VL 3264
2546 22:58:22.066691 # ok 819 # SKIP SVE set SVE get FPSIMD for VL 3264
2547 22:58:22.066775 # ok 820 # SKIP SVE set FPSIMD get SVE for VL 3264
2548 22:58:22.066862 # ok 821 Set SVE VL 3280
2549 22:58:22.066942 # ok 822 # SKIP SVE set SVE get SVE for VL 3280
2550 22:58:22.067024 # ok 823 # SKIP SVE set SVE get FPSIMD for VL 3280
2551 22:58:22.067102 # ok 824 # SKIP SVE set FPSIMD get SVE for VL 3280
2552 22:58:22.067176 # ok 825 Set SVE VL 3296
2553 22:58:22.067258 # ok 826 # SKIP SVE set SVE get SVE for VL 3296
2554 22:58:22.067341 # ok 827 # SKIP SVE set SVE get FPSIMD for VL 3296
2555 22:58:22.067422 # ok 828 # SKIP SVE set FPSIMD get SVE for VL 3296
2556 22:58:22.067500 # ok 829 Set SVE VL 3312
2557 22:58:22.067576 # ok 830 # SKIP SVE set SVE get SVE for VL 3312
2558 22:58:22.067651 # ok 831 # SKIP SVE set SVE get FPSIMD for VL 3312
2559 22:58:22.067988 # ok 832 # SKIP SVE set FPSIMD get SVE for VL 3312
2560 22:58:22.068092 # ok 833 Set SVE VL 3328
2561 22:58:22.068193 # ok 834 # SKIP SVE set SVE get SVE for VL 3328
2562 22:58:22.068272 # ok 835 # SKIP SVE set SVE get FPSIMD for VL 3328
2563 22:58:22.068352 # ok 836 # SKIP SVE set FPSIMD get SVE for VL 3328
2564 22:58:22.068436 # ok 837 Set SVE VL 3344
2565 22:58:22.068522 # ok 838 # SKIP SVE set SVE get SVE for VL 3344
2566 22:58:22.068609 # ok 839 # SKIP SVE set SVE get FPSIMD for VL 3344
2567 22:58:22.068694 # ok 840 # SKIP SVE set FPSIMD get SVE for VL 3344
2568 22:58:22.068773 # ok 841 Set SVE VL 3360
2569 22:58:22.068850 # ok 842 # SKIP SVE set SVE get SVE for VL 3360
2570 22:58:22.068926 # ok 843 # SKIP SVE set SVE get FPSIMD for VL 3360
2571 22:58:22.069002 # ok 844 # SKIP SVE set FPSIMD get SVE for VL 3360
2572 22:58:22.069096 # ok 845 Set SVE VL 3376
2573 22:58:22.069175 # ok 846 # SKIP SVE set SVE get SVE for VL 3376
2574 22:58:22.069254 # ok 847 # SKIP SVE set SVE get FPSIMD for VL 3376
2575 22:58:22.069342 # ok 848 # SKIP SVE set FPSIMD get SVE for VL 3376
2576 22:58:22.069427 # ok 849 Set SVE VL 3392
2577 22:58:22.069512 # ok 850 # SKIP SVE set SVE get SVE for VL 3392
2578 22:58:22.069590 # ok 851 # SKIP SVE set SVE get FPSIMD for VL 3392
2579 22:58:22.069675 # ok 852 # SKIP SVE set FPSIMD get SVE for VL 3392
2580 22:58:22.069754 # ok 853 Set SVE VL 3408
2581 22:58:22.069829 # ok 854 # SKIP SVE set SVE get SVE for VL 3408
2582 22:58:22.076387 # ok 855 # SKIP SVE set SVE get FPSIMD for VL 3408
2583 22:58:22.076683 # ok 856 # SKIP SVE set FPSIMD get SVE for VL 3408
2584 22:58:22.076878 # ok 857 Set SVE VL 3424
2585 22:58:22.077080 # ok 858 # SKIP SVE set SVE get SVE for VL 3424
2586 22:58:22.077263 # ok 859 # SKIP SVE set SVE get FPSIMD for VL 3424
2587 22:58:22.077477 # ok 860 # SKIP SVE set FPSIMD get SVE for VL 3424
2588 22:58:22.077682 # ok 861 Set SVE VL 3440
2589 22:58:22.077880 # ok 862 # SKIP SVE set SVE get SVE for VL 3440
2590 22:58:22.078046 # ok 863 # SKIP SVE set SVE get FPSIMD for VL 3440
2591 22:58:22.078230 # ok 864 # SKIP SVE set FPSIMD get SVE for VL 3440
2592 22:58:22.078391 # ok 865 Set SVE VL 3456
2593 22:58:22.078568 # ok 866 # SKIP SVE set SVE get SVE for VL 3456
2594 22:58:22.078690 # ok 867 # SKIP SVE set SVE get FPSIMD for VL 3456
2595 22:58:22.078829 # ok 868 # SKIP SVE set FPSIMD get SVE for VL 3456
2596 22:58:22.078950 # ok 869 Set SVE VL 3472
2597 22:58:22.079088 # ok 870 # SKIP SVE set SVE get SVE for VL 3472
2598 22:58:22.079210 # ok 871 # SKIP SVE set SVE get FPSIMD for VL 3472
2599 22:58:22.079348 # ok 872 # SKIP SVE set FPSIMD get SVE for VL 3472
2600 22:58:22.079470 # ok 873 Set SVE VL 3488
2601 22:58:22.079608 # ok 874 # SKIP SVE set SVE get SVE for VL 3488
2602 22:58:22.079730 # ok 875 # SKIP SVE set SVE get FPSIMD for VL 3488
2603 22:58:22.079870 # ok 876 # SKIP SVE set FPSIMD get SVE for VL 3488
2604 22:58:22.079991 # ok 877 Set SVE VL 3504
2605 22:58:22.080129 # ok 878 # SKIP SVE set SVE get SVE for VL 3504
2606 22:58:22.080251 # ok 879 # SKIP SVE set SVE get FPSIMD for VL 3504
2607 22:58:22.080389 # ok 880 # SKIP SVE set FPSIMD get SVE for VL 3504
2608 22:58:22.080510 # ok 881 Set SVE VL 3520
2609 22:58:22.080651 # ok 882 # SKIP SVE set SVE get SVE for VL 3520
2610 22:58:22.080773 # ok 883 # SKIP SVE set SVE get FPSIMD for VL 3520
2611 22:58:22.080909 # ok 884 # SKIP SVE set FPSIMD get SVE for VL 3520
2612 22:58:22.081032 # ok 885 Set SVE VL 3536
2613 22:58:22.081167 # ok 886 # SKIP SVE set SVE get SVE for VL 3536
2614 22:58:22.081289 # ok 887 # SKIP SVE set SVE get FPSIMD for VL 3536
2615 22:58:22.081426 # ok 888 # SKIP SVE set FPSIMD get SVE for VL 3536
2616 22:58:22.081548 # ok 889 Set SVE VL 3552
2617 22:58:22.081693 # ok 890 # SKIP SVE set SVE get SVE for VL 3552
2618 22:58:22.081835 # ok 891 # SKIP SVE set SVE get FPSIMD for VL 3552
2619 22:58:22.081974 # ok 892 # SKIP SVE set FPSIMD get SVE for VL 3552
2620 22:58:22.082116 # ok 893 Set SVE VL 3568
2621 22:58:22.082238 # ok 894 # SKIP SVE set SVE get SVE for VL 3568
2622 22:58:22.082375 # ok 895 # SKIP SVE set SVE get FPSIMD for VL 3568
2623 22:58:22.082514 # ok 896 # SKIP SVE set FPSIMD get SVE for VL 3568
2624 22:58:22.082610 # ok 897 Set SVE VL 3584
2625 22:58:22.082703 # ok 898 # SKIP SVE set SVE get SVE for VL 3584
2626 22:58:22.082995 # ok 899 # SKIP SVE set SVE get FPSIMD for VL 3584
2627 22:58:22.083104 # ok 900 # SKIP SVE set FPSIMD get SVE for VL 3584
2628 22:58:22.083193 # ok 901 Set SVE VL 3600
2629 22:58:22.083295 # ok 902 # SKIP SVE set SVE get SVE for VL 3600
2630 22:58:22.083385 # ok 903 # SKIP SVE set SVE get FPSIMD for VL 3600
2631 22:58:22.083489 # ok 904 # SKIP SVE set FPSIMD get SVE for VL 3600
2632 22:58:22.083582 # ok 905 Set SVE VL 3616
2633 22:58:22.083688 # ok 906 # SKIP SVE set SVE get SVE for VL 3616
2634 22:58:22.083804 # ok 907 # SKIP SVE set SVE get FPSIMD for VL 3616
2635 22:58:22.084125 # ok 908 # SKIP SVE set FPSIMD get SVE for VL 3616
2636 22:58:22.084230 # ok 909 Set SVE VL 3632
2637 22:58:22.084322 # ok 910 # SKIP SVE set SVE get SVE for VL 3632
2638 22:58:22.084428 # ok 911 # SKIP SVE set SVE get FPSIMD for VL 3632
2639 22:58:22.084520 # ok 912 # SKIP SVE set FPSIMD get SVE for VL 3632
2640 22:58:22.084625 # ok 913 Set SVE VL 3648
2641 22:58:22.084732 # ok 914 # SKIP SVE set SVE get SVE for VL 3648
2642 22:58:22.084838 # ok 915 # SKIP SVE set SVE get FPSIMD for VL 3648
2643 22:58:22.084943 # ok 916 # SKIP SVE set FPSIMD get SVE for VL 3648
2644 22:58:22.085049 # ok 917 Set SVE VL 3664
2645 22:58:22.085155 # ok 918 # SKIP SVE set SVE get SVE for VL 3664
2646 22:58:22.085261 # ok 919 # SKIP SVE set SVE get FPSIMD for VL 3664
2647 22:58:22.085573 # ok 920 # SKIP SVE set FPSIMD get SVE for VL 3664
2648 22:58:22.085701 # ok 921 Set SVE VL 3680
2649 22:58:22.085996 # ok 922 # SKIP SVE set SVE get SVE for VL 3680
2650 22:58:22.086096 # ok 923 # SKIP SVE set SVE get FPSIMD for VL 3680
2651 22:58:22.086189 # ok 924 # SKIP SVE set FPSIMD get SVE for VL 3680
2652 22:58:22.086270 # ok 925 Set SVE VL 3696
2653 22:58:22.086368 # ok 926 # SKIP SVE set SVE get SVE for VL 3696
2654 22:58:22.086471 # ok 927 # SKIP SVE set SVE get FPSIMD for VL 3696
2655 22:58:22.086782 # ok 928 # SKIP SVE set FPSIMD get SVE for VL 3696
2656 22:58:22.086896 # ok 929 Set SVE VL 3712
2657 22:58:22.086990 # ok 930 # SKIP SVE set SVE get SVE for VL 3712
2658 22:58:22.087098 # ok 931 # SKIP SVE set SVE get FPSIMD for VL 3712
2659 22:58:22.087183 # ok 932 # SKIP SVE set FPSIMD get SVE for VL 3712
2660 22:58:22.087264 # ok 933 Set SVE VL 3728
2661 22:58:22.087362 # ok 934 # SKIP SVE set SVE get SVE for VL 3728
2662 22:58:22.087444 # ok 935 # SKIP SVE set SVE get FPSIMD for VL 3728
2663 22:58:22.087541 # ok 936 # SKIP SVE set FPSIMD get SVE for VL 3728
2664 22:58:22.087630 # ok 937 Set SVE VL 3744
2665 22:58:22.087727 # ok 938 # SKIP SVE set SVE get SVE for VL 3744
2666 22:58:22.088021 # ok 939 # SKIP SVE set SVE get FPSIMD for VL 3744
2667 22:58:22.088121 # ok 940 # SKIP SVE set FPSIMD get SVE for VL 3744
2668 22:58:22.088209 # ok 941 Set SVE VL 3760
2669 22:58:22.088307 # ok 942 # SKIP SVE set SVE get SVE for VL 3760
2670 22:58:22.089803 # ok 943 # SKIP SVE set SVE get FPSIMD for VL 3760
2671 22:58:22.089909 # ok 944 # SKIP SVE set FPSIMD get SVE for VL 3760
2672 22:58:22.089997 # ok 945 Set SVE VL 3776
2673 22:58:22.090080 # ok 946 # SKIP SVE set SVE get SVE for VL 3776
2674 22:58:22.090159 # ok 947 # SKIP SVE set SVE get FPSIMD for VL 3776
2675 22:58:22.090241 # ok 948 # SKIP SVE set FPSIMD get SVE for VL 3776
2676 22:58:22.090333 # ok 949 Set SVE VL 3792
2677 22:58:22.090417 # ok 950 # SKIP SVE set SVE get SVE for VL 3792
2678 22:58:22.090492 # ok 951 # SKIP SVE set SVE get FPSIMD for VL 3792
2679 22:58:22.090569 # ok 952 # SKIP SVE set FPSIMD get SVE for VL 3792
2680 22:58:22.090650 # ok 953 Set SVE VL 3808
2681 22:58:22.090927 # ok 954 # SKIP SVE set SVE get SVE for VL 3808
2682 22:58:22.091020 # ok 955 # SKIP SVE set SVE get FPSIMD for VL 3808
2683 22:58:22.091095 # ok 956 # SKIP SVE set FPSIMD get SVE for VL 3808
2684 22:58:22.091172 # ok 957 Set SVE VL 3824
2685 22:58:22.091253 # ok 958 # SKIP SVE set SVE get SVE for VL 3824
2686 22:58:22.091319 # ok 959 # SKIP SVE set SVE get FPSIMD for VL 3824
2687 22:58:22.091399 # ok 960 # SKIP SVE set FPSIMD get SVE for VL 3824
2688 22:58:22.091477 # ok 961 Set SVE VL 3840
2689 22:58:22.091559 # ok 962 # SKIP SVE set SVE get SVE for VL 3840
2690 22:58:22.091644 # ok 963 # SKIP SVE set SVE get FPSIMD for VL 3840
2691 22:58:22.091739 # ok 964 # SKIP SVE set FPSIMD get SVE for VL 3840
2692 22:58:22.091817 # ok 965 Set SVE VL 3856
2693 22:58:22.091890 # ok 966 # SKIP SVE set SVE get SVE for VL 3856
2694 22:58:22.091967 # ok 967 # SKIP SVE set SVE get FPSIMD for VL 3856
2695 22:58:22.092036 # ok 968 # SKIP SVE set FPSIMD get SVE for VL 3856
2696 22:58:22.092113 # ok 969 Set SVE VL 3872
2697 22:58:22.092378 # ok 970 # SKIP SVE set SVE get SVE for VL 3872
2698 22:58:22.092513 # ok 971 # SKIP SVE set SVE get FPSIMD for VL 3872
2699 22:58:22.092588 # ok 972 # SKIP SVE set FPSIMD get SVE for VL 3872
2700 22:58:22.092661 # ok 973 Set SVE VL 3888
2701 22:58:22.092737 # ok 974 # SKIP SVE set SVE get SVE for VL 3888
2702 22:58:22.092824 # ok 975 # SKIP SVE set SVE get FPSIMD for VL 3888
2703 22:58:22.092917 # ok 976 # SKIP SVE set FPSIMD get SVE for VL 3888
2704 22:58:22.093188 # ok 977 Set SVE VL 3904
2705 22:58:22.093468 # ok 978 # SKIP SVE set SVE get SVE for VL 3904
2706 22:58:22.093545 # ok 979 # SKIP SVE set SVE get FPSIMD for VL 3904
2707 22:58:22.093613 # ok 980 # SKIP SVE set FPSIMD get SVE for VL 3904
2708 22:58:22.093702 # ok 981 Set SVE VL 3920
2709 22:58:22.094257 # ok 982 # SKIP SVE set SVE get SVE for VL 3920
2710 22:58:22.094584 # ok 983 # SKIP SVE set SVE get FPSIMD for VL 3920
2711 22:58:22.094745 # ok 984 # SKIP SVE set FPSIMD get SVE for VL 3920
2712 22:58:22.094843 # ok 985 Set SVE VL 3936
2713 22:58:22.094939 # ok 986 # SKIP SVE set SVE get SVE for VL 3936
2714 22:58:22.095218 # ok 987 # SKIP SVE set SVE get FPSIMD for VL 3936
2715 22:58:22.095362 # ok 988 # SKIP SVE set FPSIMD get SVE for VL 3936
2716 22:58:22.095449 # ok 989 Set SVE VL 3952
2717 22:58:22.095547 # ok 990 # SKIP SVE set SVE get SVE for VL 3952
2718 22:58:22.095641 # ok 991 # SKIP SVE set SVE get FPSIMD for VL 3952
2719 22:58:22.095766 # ok 992 # SKIP SVE set FPSIMD get SVE for VL 3952
2720 22:58:22.095871 # ok 993 Set SVE VL 3968
2721 22:58:22.096010 # ok 994 # SKIP SVE set SVE get SVE for VL 3968
2722 22:58:22.096381 # ok 995 # SKIP SVE set SVE get FPSIMD for VL 3968
2723 22:58:22.096483 # ok 996 # SKIP SVE set FPSIMD get SVE for VL 3968
2724 22:58:22.096566 # ok 997 Set SVE VL 3984
2725 22:58:22.096654 # ok 998 # SKIP SVE set SVE get SVE for VL 3984
2726 22:58:22.096750 # ok 999 # SKIP SVE set SVE get FPSIMD for VL 3984
2727 22:58:22.096833 # ok 1000 # SKIP SVE set FPSIMD get SVE for VL 3984
2728 22:58:22.096919 # ok 1001 Set SVE VL 4000
2729 22:58:22.097002 # ok 1002 # SKIP SVE set SVE get SVE for VL 4000
2730 22:58:22.097101 # ok 1003 # SKIP SVE set SVE get FPSIMD for VL 4000
2731 22:58:22.097199 # ok 1004 # SKIP SVE set FPSIMD get SVE for VL 4000
2732 22:58:22.097482 # ok 1005 Set SVE VL 4016
2733 22:58:22.097582 # ok 1006 # SKIP SVE set SVE get SVE for VL 4016
2734 22:58:22.097683 # ok 1007 # SKIP SVE set SVE get FPSIMD for VL 4016
2735 22:58:22.097987 # ok 1008 # SKIP SVE set FPSIMD get SVE for VL 4016
2736 22:58:22.098090 # ok 1009 Set SVE VL 4032
2737 22:58:22.098194 # ok 1010 # SKIP SVE set SVE get SVE for VL 4032
2738 22:58:22.098291 # ok 1011 # SKIP SVE set SVE get FPSIMD for VL 4032
2739 22:58:22.098395 # ok 1012 # SKIP SVE set FPSIMD get SVE for VL 4032
2740 22:58:22.098488 # ok 1013 Set SVE VL 4048
2741 22:58:22.098767 # ok 1014 # SKIP SVE set SVE get SVE for VL 4048
2742 22:58:22.098864 # ok 1015 # SKIP SVE set SVE get FPSIMD for VL 4048
2743 22:58:22.098955 # ok 1016 # SKIP SVE set FPSIMD get SVE for VL 4048
2744 22:58:22.099037 # ok 1017 Set SVE VL 4064
2745 22:58:22.099336 # ok 1018 # SKIP SVE set SVE get SVE for VL 4064
2746 22:58:22.099425 # ok 1019 # SKIP SVE set SVE get FPSIMD for VL 4064
2747 22:58:22.099517 # ok 1020 # SKIP SVE set FPSIMD get SVE for VL 4064
2748 22:58:22.099598 # ok 1021 Set SVE VL 4080
2749 22:58:22.099696 # ok 1022 # SKIP SVE set SVE get SVE for VL 4080
2750 22:58:22.099793 # ok 1023 # SKIP SVE set SVE get FPSIMD for VL 4080
2751 22:58:22.099890 # ok 1024 # SKIP SVE set FPSIMD get SVE for VL 4080
2752 22:58:22.099981 # ok 1025 Set SVE VL 4096
2753 22:58:22.100305 # ok 1026 # SKIP SVE set SVE get SVE for VL 4096
2754 22:58:22.100647 # ok 1027 # SKIP SVE set SVE get FPSIMD for VL 4096
2755 22:58:22.100751 # ok 1028 # SKIP SVE set FPSIMD get SVE for VL 4096
2756 22:58:22.100842 # ok 1029 Set SVE VL 4112
2757 22:58:22.100929 # ok 1030 # SKIP SVE set SVE get SVE for VL 4112
2758 22:58:22.101029 # ok 1031 # SKIP SVE set SVE get FPSIMD for VL 4112
2759 22:58:22.101114 # ok 1032 # SKIP SVE set FPSIMD get SVE for VL 4112
2760 22:58:22.101218 # ok 1033 Set SVE VL 4128
2761 22:58:22.101307 # ok 1034 # SKIP SVE set SVE get SVE for VL 4128
2762 22:58:22.101407 # ok 1035 # SKIP SVE set SVE get FPSIMD for VL 4128
2763 22:58:22.102763 # ok 1036 # SKIP SVE set FPSIMD get SVE for VL 4128
2764 22:58:22.103113 # ok 1037 Set SVE VL 4144
2765 22:58:22.103256 # ok 1038 # SKIP SVE set SVE get SVE for VL 4144
2766 22:58:22.103364 # ok 1039 # SKIP SVE set SVE get FPSIMD for VL 4144
2767 22:58:22.103448 # ok 1040 # SKIP SVE set FPSIMD get SVE for VL 4144
2768 22:58:22.112628 # ok 1041 Set SVE VL 4160
2769 22:58:22.112830 # ok 1042 # SKIP SVE set SVE get SVE for VL 4160
2770 22:58:22.112916 # ok 1043 # SKIP SVE set SVE get FPSIMD for VL 4160
2771 22:58:22.112984 # ok 1044 # SKIP SVE set FPSIMD get SVE for VL 4160
2772 22:58:22.113047 # ok 1045 Set SVE VL 4176
2773 22:58:22.113124 # ok 1046 # SKIP SVE set SVE get SVE for VL 4176
2774 22:58:22.113192 # ok 1047 # SKIP SVE set SVE get FPSIMD for VL 4176
2775 22:58:22.113459 # ok 1048 # SKIP SVE set FPSIMD get SVE for VL 4176
2776 22:58:22.113554 # ok 1049 Set SVE VL 4192
2777 22:58:22.114320 # ok 1050 # SKIP SVE set SVE get SVE for VL 4192
2778 22:58:22.114590 # ok 1051 # SKIP SVE set SVE get FPSIMD for VL 4192
2779 22:58:22.114686 # ok 1052 # SKIP SVE set FPSIMD get SVE for VL 4192
2780 22:58:22.114769 # ok 1053 Set SVE VL 4208
2781 22:58:22.114865 # ok 1054 # SKIP SVE set SVE get SVE for VL 4208
2782 22:58:22.115199 # ok 1055 # SKIP SVE set SVE get FPSIMD for VL 4208
2783 22:58:22.115272 # ok 1056 # SKIP SVE set FPSIMD get SVE for VL 4208
2784 22:58:22.115515 # ok 1057 Set SVE VL 4224
2785 22:58:22.115584 # ok 1058 # SKIP SVE set SVE get SVE for VL 4224
2786 22:58:22.115648 # ok 1059 # SKIP SVE set SVE get FPSIMD for VL 4224
2787 22:58:22.115722 # ok 1060 # SKIP SVE set FPSIMD get SVE for VL 4224
2788 22:58:22.115789 # ok 1061 Set SVE VL 4240
2789 22:58:22.116118 # ok 1062 # SKIP SVE set SVE get SVE for VL 4240
2790 22:58:22.116244 # ok 1063 # SKIP SVE set SVE get FPSIMD for VL 4240
2791 22:58:22.116397 # ok 1064 # SKIP SVE set FPSIMD get SVE for VL 4240
2792 22:58:22.116526 # ok 1065 Set SVE VL 4256
2793 22:58:22.116631 # ok 1066 # SKIP SVE set SVE get SVE for VL 4256
2794 22:58:22.116752 # ok 1067 # SKIP SVE set SVE get FPSIMD for VL 4256
2795 22:58:22.116853 # ok 1068 # SKIP SVE set FPSIMD get SVE for VL 4256
2796 22:58:22.116986 # ok 1069 Set SVE VL 4272
2797 22:58:22.117079 # ok 1070 # SKIP SVE set SVE get SVE for VL 4272
2798 22:58:22.117201 # ok 1071 # SKIP SVE set SVE get FPSIMD for VL 4272
2799 22:58:22.117305 # ok 1072 # SKIP SVE set FPSIMD get SVE for VL 4272
2800 22:58:22.117427 # ok 1073 Set SVE VL 4288
2801 22:58:22.117515 # ok 1074 # SKIP SVE set SVE get SVE for VL 4288
2802 22:58:22.122509 # ok 1075 # SKIP SVE set SVE get FPSIMD for VL 4288
2803 22:58:22.122724 # ok 1076 # SKIP SVE set FPSIMD get SVE for VL 4288
2804 22:58:22.122804 # ok 1077 Set SVE VL 4304
2805 22:58:22.122884 # ok 1078 # SKIP SVE set SVE get SVE for VL 4304
2806 22:58:22.122960 # ok 1079 # SKIP SVE set SVE get FPSIMD for VL 4304
2807 22:58:22.123227 # ok 1080 # SKIP SVE set FPSIMD get SVE for VL 4304
2808 22:58:22.123325 # ok 1081 Set SVE VL 4320
2809 22:58:22.123418 # ok 1082 # SKIP SVE set SVE get SVE for VL 4320
2810 22:58:22.123502 # ok 1083 # SKIP SVE set SVE get FPSIMD for VL 4320
2811 22:58:22.123601 # ok 1084 # SKIP SVE set FPSIMD get SVE for VL 4320
2812 22:58:22.123704 # ok 1085 Set SVE VL 4336
2813 22:58:22.123806 # ok 1086 # SKIP SVE set SVE get SVE for VL 4336
2814 22:58:22.124078 # ok 1087 # SKIP SVE set SVE get FPSIMD for VL 4336
2815 22:58:22.124385 # ok 1088 # SKIP SVE set FPSIMD get SVE for VL 4336
2816 22:58:22.124476 # ok 1089 Set SVE VL 4352
2817 22:58:22.124558 # ok 1090 # SKIP SVE set SVE get SVE for VL 4352
2818 22:58:22.124636 # ok 1091 # SKIP SVE set SVE get FPSIMD for VL 4352
2819 22:58:22.124719 # ok 1092 # SKIP SVE set FPSIMD get SVE for VL 4352
2820 22:58:22.124796 # ok 1093 Set SVE VL 4368
2821 22:58:22.125044 # ok 1094 # SKIP SVE set SVE get SVE for VL 4368
2822 22:58:22.125294 # ok 1095 # SKIP SVE set SVE get FPSIMD for VL 4368
2823 22:58:22.125386 # ok 1096 # SKIP SVE set FPSIMD get SVE for VL 4368
2824 22:58:22.125482 # ok 1097 Set SVE VL 4384
2825 22:58:22.125567 # ok 1098 # SKIP SVE set SVE get SVE for VL 4384
2826 22:58:22.125839 # ok 1099 # SKIP SVE set SVE get FPSIMD for VL 4384
2827 22:58:22.125923 # ok 1100 # SKIP SVE set FPSIMD get SVE for VL 4384
2828 22:58:22.125999 # ok 1101 Set SVE VL 4400
2829 22:58:22.126246 # ok 1102 # SKIP SVE set SVE get SVE for VL 4400
2830 22:58:22.126516 # ok 1103 # SKIP SVE set SVE get FPSIMD for VL 4400
2831 22:58:22.126654 # ok 1104 # SKIP SVE set FPSIMD get SVE for VL 4400
2832 22:58:22.126788 # ok 1105 Set SVE VL 4416
2833 22:58:22.126940 # ok 1106 # SKIP SVE set SVE get SVE for VL 4416
2834 22:58:22.127073 # ok 1107 # SKIP SVE set SVE get FPSIMD for VL 4416
2835 22:58:22.127192 # ok 1108 # SKIP SVE set FPSIMD get SVE for VL 4416
2836 22:58:22.127279 # ok 1109 Set SVE VL 4432
2837 22:58:22.127367 # ok 1110 # SKIP SVE set SVE get SVE for VL 4432
2838 22:58:22.127446 # ok 1111 # SKIP SVE set SVE get FPSIMD for VL 4432
2839 22:58:22.127542 # ok 1112 # SKIP SVE set FPSIMD get SVE for VL 4432
2840 22:58:22.127637 # ok 1113 Set SVE VL 4448
2841 22:58:22.127733 # ok 1114 # SKIP SVE set SVE get SVE for VL 4448
2842 22:58:22.128035 # ok 1115 # SKIP SVE set SVE get FPSIMD for VL 4448
2843 22:58:22.128128 # ok 1116 # SKIP SVE set FPSIMD get SVE for VL 4448
2844 22:58:22.128221 # ok 1117 Set SVE VL 4464
2845 22:58:22.128314 # ok 1118 # SKIP SVE set SVE get SVE for VL 4464
2846 22:58:22.128593 # ok 1119 # SKIP SVE set SVE get FPSIMD for VL 4464
2847 22:58:22.128664 # ok 1120 # SKIP SVE set FPSIMD get SVE for VL 4464
2848 22:58:22.128738 # ok 1121 Set SVE VL 4480
2849 22:58:22.128811 # ok 1122 # SKIP SVE set SVE get SVE for VL 4480
2850 22:58:22.128891 # ok 1123 # SKIP SVE set SVE get FPSIMD for VL 4480
2851 22:58:22.129152 # ok 1124 # SKIP SVE set FPSIMD get SVE for VL 4480
2852 22:58:22.129223 # ok 1125 Set SVE VL 4496
2853 22:58:22.129296 # ok 1126 # SKIP SVE set SVE get SVE for VL 4496
2854 22:58:22.129585 # ok 1127 # SKIP SVE set SVE get FPSIMD for VL 4496
2855 22:58:22.129860 # ok 1128 # SKIP SVE set FPSIMD get SVE for VL 4496
2856 22:58:22.129932 # ok 1129 Set SVE VL 4512
2857 22:58:22.130008 # ok 1130 # SKIP SVE set SVE get SVE for VL 4512
2858 22:58:22.130259 # ok 1131 # SKIP SVE set SVE get FPSIMD for VL 4512
2859 22:58:22.130521 # ok 1132 # SKIP SVE set FPSIMD get SVE for VL 4512
2860 22:58:22.130602 # ok 1133 Set SVE VL 4528
2861 22:58:22.130689 # ok 1134 # SKIP SVE set SVE get SVE for VL 4528
2862 22:58:22.130770 # ok 1135 # SKIP SVE set SVE get FPSIMD for VL 4528
2863 22:58:22.130865 # ok 1136 # SKIP SVE set FPSIMD get SVE for VL 4528
2864 22:58:22.130960 # ok 1137 Set SVE VL 4544
2865 22:58:22.131250 # ok 1138 # SKIP SVE set SVE get SVE for VL 4544
2866 22:58:22.131353 # ok 1139 # SKIP SVE set SVE get FPSIMD for VL 4544
2867 22:58:22.131422 # ok 1140 # SKIP SVE set FPSIMD get SVE for VL 4544
2868 22:58:22.131498 # ok 1141 Set SVE VL 4560
2869 22:58:22.131572 # ok 1142 # SKIP SVE set SVE get SVE for VL 4560
2870 22:58:22.131838 # ok 1143 # SKIP SVE set SVE get FPSIMD for VL 4560
2871 22:58:22.131917 # ok 1144 # SKIP SVE set FPSIMD get SVE for VL 4560
2872 22:58:22.132167 # ok 1145 Set SVE VL 4576
2873 22:58:22.132234 # ok 1146 # SKIP SVE set SVE get SVE for VL 4576
2874 22:58:22.132309 # ok 1147 # SKIP SVE set SVE get FPSIMD for VL 4576
2875 22:58:22.132383 # ok 1148 # SKIP SVE set FPSIMD get SVE for VL 4576
2876 22:58:22.132636 # ok 1149 Set SVE VL 4592
2877 22:58:22.132704 # ok 1150 # SKIP SVE set SVE get SVE for VL 4592
2878 22:58:22.132778 # ok 1151 # SKIP SVE set SVE get FPSIMD for VL 4592
2879 22:58:22.133033 # ok 1152 # SKIP SVE set FPSIMD get SVE for VL 4592
2880 22:58:22.133103 # ok 1153 Set SVE VL 4608
2881 22:58:22.133179 # ok 1154 # SKIP SVE set SVE get SVE for VL 4608
2882 22:58:22.133255 # ok 1155 # SKIP SVE set SVE get FPSIMD for VL 4608
2883 22:58:22.133537 # ok 1156 # SKIP SVE set FPSIMD get SVE for VL 4608
2884 22:58:22.133799 # ok 1157 Set SVE VL 4624
2885 22:58:22.133872 # ok 1158 # SKIP SVE set SVE get SVE for VL 4624
2886 22:58:22.133946 # ok 1159 # SKIP SVE set SVE get FPSIMD for VL 4624
2887 22:58:22.134196 # ok 1160 # SKIP SVE set FPSIMD get SVE for VL 4624
2888 22:58:22.134264 # ok 1161 Set SVE VL 4640
2889 22:58:22.134338 # ok 1162 # SKIP SVE set SVE get SVE for VL 4640
2890 22:58:22.134615 # ok 1163 # SKIP SVE set SVE get FPSIMD for VL 4640
2891 22:58:22.134709 # ok 1164 # SKIP SVE set FPSIMD get SVE for VL 4640
2892 22:58:22.134794 # ok 1165 Set SVE VL 4656
2893 22:58:22.134861 # ok 1166 # SKIP SVE set SVE get SVE for VL 4656
2894 22:58:22.135116 # ok 1167 # SKIP SVE set SVE get FPSIMD for VL 4656
2895 22:58:22.135185 # ok 1168 # SKIP SVE set FPSIMD get SVE for VL 4656
2896 22:58:22.135260 # ok 1169 Set SVE VL 4672
2897 22:58:22.135344 # ok 1170 # SKIP SVE set SVE get SVE for VL 4672
2898 22:58:22.135589 # ok 1171 # SKIP SVE set SVE get FPSIMD for VL 4672
2899 22:58:22.135668 # ok 1172 # SKIP SVE set FPSIMD get SVE for VL 4672
2900 22:58:22.135746 # ok 1173 Set SVE VL 4688
2901 22:58:22.135991 # ok 1174 # SKIP SVE set SVE get SVE for VL 4688
2902 22:58:22.136058 # ok 1175 # SKIP SVE set SVE get FPSIMD for VL 4688
2903 22:58:22.136132 # ok 1176 # SKIP SVE set FPSIMD get SVE for VL 4688
2904 22:58:22.136375 # ok 1177 Set SVE VL 4704
2905 22:58:22.136448 # ok 1178 # SKIP SVE set SVE get SVE for VL 4704
2906 22:58:22.136699 # ok 1179 # SKIP SVE set SVE get FPSIMD for VL 4704
2907 22:58:22.136767 # ok 1180 # SKIP SVE set FPSIMD get SVE for VL 4704
2908 22:58:22.136842 # ok 1181 Set SVE VL 4720
2909 22:58:22.136907 # ok 1182 # SKIP SVE set SVE get SVE for VL 4720
2910 22:58:22.137151 # ok 1183 # SKIP SVE set SVE get FPSIMD for VL 4720
2911 22:58:22.137228 # ok 1184 # SKIP SVE set FPSIMD get SVE for VL 4720
2912 22:58:22.137483 # ok 1185 Set SVE VL 4736
2913 22:58:22.137562 # ok 1186 # SKIP SVE set SVE get SVE for VL 4736
2914 22:58:22.137815 # ok 1187 # SKIP SVE set SVE get FPSIMD for VL 4736
2915 22:58:22.137896 # ok 1188 # SKIP SVE set FPSIMD get SVE for VL 4736
2916 22:58:22.137961 # ok 1189 Set SVE VL 4752
2917 22:58:22.138203 # ok 1190 # SKIP SVE set SVE get SVE for VL 4752
2918 22:58:22.138282 # ok 1191 # SKIP SVE set SVE get FPSIMD for VL 4752
2919 22:58:22.138356 # ok 1192 # SKIP SVE set FPSIMD get SVE for VL 4752
2920 22:58:22.138460 # ok 1193 Set SVE VL 4768
2921 22:58:22.138755 # ok 1194 # SKIP SVE set SVE get SVE for VL 4768
2922 22:58:22.138901 # ok 1195 # SKIP SVE set SVE get FPSIMD for VL 4768
2923 22:58:22.139052 # ok 1196 # SKIP SVE set FPSIMD get SVE for VL 4768
2924 22:58:22.139167 # ok 1197 Set SVE VL 4784
2925 22:58:22.139252 # ok 1198 # SKIP SVE set SVE get SVE for VL 4784
2926 22:58:22.139337 # ok 1199 # SKIP SVE set SVE get FPSIMD for VL 4784
2927 22:58:22.139427 # ok 1200 # SKIP SVE set FPSIMD get SVE for VL 4784
2928 22:58:22.139499 # ok 1201 Set SVE VL 4800
2929 22:58:22.139577 # ok 1202 # SKIP SVE set SVE get SVE for VL 4800
2930 22:58:22.139848 # ok 1203 # SKIP SVE set SVE get FPSIMD for VL 4800
2931 22:58:22.139943 # ok 1204 # SKIP SVE set FPSIMD get SVE for VL 4800
2932 22:58:22.140022 # ok 1205 Set SVE VL 4816
2933 22:58:22.140291 # ok 1206 # SKIP SVE set SVE get SVE for VL 4816
2934 22:58:22.140385 # ok 1207 # SKIP SVE set SVE get FPSIMD for VL 4816
2935 22:58:22.140478 # ok 1208 # SKIP SVE set FPSIMD get SVE for VL 4816
2936 22:58:22.140575 # ok 1209 Set SVE VL 4832
2937 22:58:22.140655 # ok 1210 # SKIP SVE set SVE get SVE for VL 4832
2938 22:58:22.140937 # ok 1211 # SKIP SVE set SVE get FPSIMD for VL 4832
2939 22:58:22.141017 # ok 1212 # SKIP SVE set FPSIMD get SVE for VL 4832
2940 22:58:22.141095 # ok 1213 Set SVE VL 4848
2941 22:58:22.141170 # ok 1214 # SKIP SVE set SVE get SVE for VL 4848
2942 22:58:22.141455 # ok 1215 # SKIP SVE set SVE get FPSIMD for VL 4848
2943 22:58:22.141535 # ok 1216 # SKIP SVE set FPSIMD get SVE for VL 4848
2944 22:58:22.141787 # ok 1217 Set SVE VL 4864
2945 22:58:22.141869 # ok 1218 # SKIP SVE set SVE get SVE for VL 4864
2946 22:58:22.142142 # ok 1219 # SKIP SVE set SVE get FPSIMD for VL 4864
2947 22:58:22.142235 # ok 1220 # SKIP SVE set FPSIMD get SVE for VL 4864
2948 22:58:22.142321 # ok 1221 Set SVE VL 4880
2949 22:58:22.142422 # ok 1222 # SKIP SVE set SVE get SVE for VL 4880
2950 22:58:22.142521 # ok 1223 # SKIP SVE set SVE get FPSIMD for VL 4880
2951 22:58:22.160213 # ok 1224 # SKIP SVE set FPSIMD get SVE for VL 4880
2952 22:58:22.160670 # ok 1225 Set SVE VL 4896
2953 22:58:22.160776 # ok 1226 # SKIP SVE set SVE get SVE for VL 4896
2954 22:58:22.160859 # ok 1227 # SKIP SVE set SVE get FPSIMD for VL 4896
2955 22:58:22.160930 # ok 1228 # SKIP SVE set FPSIMD get SVE for VL 4896
2956 22:58:22.161010 # ok 1229 Set SVE VL 4912
2957 22:58:22.161279 # ok 1230 # SKIP SVE set SVE get SVE for VL 4912
2958 22:58:22.161390 # ok 1231 # SKIP SVE set SVE get FPSIMD for VL 4912
2959 22:58:22.161473 # ok 1232 # SKIP SVE set FPSIMD get SVE for VL 4912
2960 22:58:22.161566 # ok 1233 Set SVE VL 4928
2961 22:58:22.161878 # ok 1234 # SKIP SVE set SVE get SVE for VL 4928
2962 22:58:22.164673 # ok 1235 # SKIP SVE set SVE get FPSIMD for VL 4928
2963 22:58:22.165029 # ok 1236 # SKIP SVE set FPSIMD get SVE for VL 4928
2964 22:58:22.165124 # ok 1237 Set SVE VL 4944
2965 22:58:22.165258 # ok 1238 # SKIP SVE set SVE get SVE for VL 4944
2966 22:58:22.165367 # ok 1239 # SKIP SVE set SVE get FPSIMD for VL 4944
2967 22:58:22.165480 # ok 1240 # SKIP SVE set FPSIMD get SVE for VL 4944
2968 22:58:22.165577 # ok 1241 Set SVE VL 4960
2969 22:58:22.166861 # ok 1242 # SKIP SVE set SVE get SVE for VL 4960
2970 22:58:22.167199 # ok 1243 # SKIP SVE set SVE get FPSIMD for VL 4960
2971 22:58:22.167310 # ok 1244 # SKIP SVE set FPSIMD get SVE for VL 4960
2972 22:58:22.167422 # ok 1245 Set SVE VL 4976
2973 22:58:22.167513 # ok 1246 # SKIP SVE set SVE get SVE for VL 4976
2974 22:58:22.167617 # ok 1247 # SKIP SVE set SVE get FPSIMD for VL 4976
2975 22:58:22.167720 # ok 1248 # SKIP SVE set FPSIMD get SVE for VL 4976
2976 22:58:22.167822 # ok 1249 Set SVE VL 4992
2977 22:58:22.167931 # ok 1250 # SKIP SVE set SVE get SVE for VL 4992
2978 22:58:22.168232 # ok 1251 # SKIP SVE set SVE get FPSIMD for VL 4992
2979 22:58:22.168338 # ok 1252 # SKIP SVE set FPSIMD get SVE for VL 4992
2980 22:58:22.168445 # ok 1253 Set SVE VL 5008
2981 22:58:22.168533 # ok 1254 # SKIP SVE set SVE get SVE for VL 5008
2982 22:58:22.168632 # ok 1255 # SKIP SVE set SVE get FPSIMD for VL 5008
2983 22:58:22.168730 # ok 1256 # SKIP SVE set FPSIMD get SVE for VL 5008
2984 22:58:22.168831 # ok 1257 Set SVE VL 5024
2985 22:58:22.168930 # ok 1258 # SKIP SVE set SVE get SVE for VL 5024
2986 22:58:22.169230 # ok 1259 # SKIP SVE set SVE get FPSIMD for VL 5024
2987 22:58:22.169340 # ok 1260 # SKIP SVE set FPSIMD get SVE for VL 5024
2988 22:58:22.169447 # ok 1261 Set SVE VL 5040
2989 22:58:22.169551 # ok 1262 # SKIP SVE set SVE get SVE for VL 5040
2990 22:58:22.169837 # ok 1263 # SKIP SVE set SVE get FPSIMD for VL 5040
2991 22:58:22.169966 # ok 1264 # SKIP SVE set FPSIMD get SVE for VL 5040
2992 22:58:22.170075 # ok 1265 Set SVE VL 5056
2993 22:58:22.170179 # ok 1266 # SKIP SVE set SVE get SVE for VL 5056
2994 22:58:22.170285 # ok 1267 # SKIP SVE set SVE get FPSIMD for VL 5056
2995 22:58:22.170413 # ok 1268 # SKIP SVE set FPSIMD get SVE for VL 5056
2996 22:58:22.170521 # ok 1269 Set SVE VL 5072
2997 22:58:22.170823 # ok 1270 # SKIP SVE set SVE get SVE for VL 5072
2998 22:58:22.170932 # ok 1271 # SKIP SVE set SVE get FPSIMD for VL 5072
2999 22:58:22.171223 # ok 1272 # SKIP SVE set FPSIMD get SVE for VL 5072
3000 22:58:22.171319 # ok 1273 Set SVE VL 5088
3001 22:58:22.171424 # ok 1274 # SKIP SVE set SVE get SVE for VL 5088
3002 22:58:22.171528 # ok 1275 # SKIP SVE set SVE get FPSIMD for VL 5088
3003 22:58:22.171632 # ok 1276 # SKIP SVE set FPSIMD get SVE for VL 5088
3004 22:58:22.171735 # ok 1277 Set SVE VL 5104
3005 22:58:22.171838 # ok 1278 # SKIP SVE set SVE get SVE for VL 5104
3006 22:58:22.171941 # ok 1279 # SKIP SVE set SVE get FPSIMD for VL 5104
3007 22:58:22.172053 # ok 1280 # SKIP SVE set FPSIMD get SVE for VL 5104
3008 22:58:22.172345 # ok 1281 Set SVE VL 5120
3009 22:58:22.172440 # ok 1282 # SKIP SVE set SVE get SVE for VL 5120
3010 22:58:22.172545 # ok 1283 # SKIP SVE set SVE get FPSIMD for VL 5120
3011 22:58:22.172649 # ok 1284 # SKIP SVE set FPSIMD get SVE for VL 5120
3012 22:58:22.172740 # ok 1285 Set SVE VL 5136
3013 22:58:22.173032 # ok 1286 # SKIP SVE set SVE get SVE for VL 5136
3014 22:58:22.173126 # ok 1287 # SKIP SVE set SVE get FPSIMD for VL 5136
3015 22:58:22.173229 # ok 1288 # SKIP SVE set FPSIMD get SVE for VL 5136
3016 22:58:22.173321 # ok 1289 Set SVE VL 5152
3017 22:58:22.173422 # ok 1290 # SKIP SVE set SVE get SVE for VL 5152
3018 22:58:22.173522 # ok 1291 # SKIP SVE set SVE get FPSIMD for VL 5152
3019 22:58:22.173827 # ok 1292 # SKIP SVE set FPSIMD get SVE for VL 5152
3020 22:58:22.173947 # ok 1293 Set SVE VL 5168
3021 22:58:22.174039 # ok 1294 # SKIP SVE set SVE get SVE for VL 5168
3022 22:58:22.174142 # ok 1295 # SKIP SVE set SVE get FPSIMD for VL 5168
3023 22:58:22.174445 # ok 1296 # SKIP SVE set FPSIMD get SVE for VL 5168
3024 22:58:22.174552 # ok 1297 Set SVE VL 5184
3025 22:58:22.174659 # ok 1298 # SKIP SVE set SVE get SVE for VL 5184
3026 22:58:22.174769 # ok 1299 # SKIP SVE set SVE get FPSIMD for VL 5184
3027 22:58:22.174860 # ok 1300 # SKIP SVE set FPSIMD get SVE for VL 5184
3028 22:58:22.174964 # ok 1301 Set SVE VL 5200
3029 22:58:22.175068 # ok 1302 # SKIP SVE set SVE get SVE for VL 5200
3030 22:58:22.175172 # ok 1303 # SKIP SVE set SVE get FPSIMD for VL 5200
3031 22:58:22.175465 # ok 1304 # SKIP SVE set FPSIMD get SVE for VL 5200
3032 22:58:22.175562 # ok 1305 Set SVE VL 5216
3033 22:58:22.175667 # ok 1306 # SKIP SVE set SVE get SVE for VL 5216
3034 22:58:22.175757 # ok 1307 # SKIP SVE set SVE get FPSIMD for VL 5216
3035 22:58:22.176052 # ok 1308 # SKIP SVE set FPSIMD get SVE for VL 5216
3036 22:58:22.176149 # ok 1309 Set SVE VL 5232
3037 22:58:22.176253 # ok 1310 # SKIP SVE set SVE get SVE for VL 5232
3038 22:58:22.176345 # ok 1311 # SKIP SVE set SVE get FPSIMD for VL 5232
3039 22:58:22.176448 # ok 1312 # SKIP SVE set FPSIMD get SVE for VL 5232
3040 22:58:22.176539 # ok 1313 Set SVE VL 5248
3041 22:58:22.176640 # ok 1314 # SKIP SVE set SVE get SVE for VL 5248
3042 22:58:22.176743 # ok 1315 # SKIP SVE set SVE get FPSIMD for VL 5248
3043 22:58:22.176847 # ok 1316 # SKIP SVE set FPSIMD get SVE for VL 5248
3044 22:58:22.176951 # ok 1317 Set SVE VL 5264
3045 22:58:22.177053 # ok 1318 # SKIP SVE set SVE get SVE for VL 5264
3046 22:58:22.177352 # ok 1319 # SKIP SVE set SVE get FPSIMD for VL 5264
3047 22:58:22.177461 # ok 1320 # SKIP SVE set FPSIMD get SVE for VL 5264
3048 22:58:22.177568 # ok 1321 Set SVE VL 5280
3049 22:58:22.177857 # ok 1322 # SKIP SVE set SVE get SVE for VL 5280
3050 22:58:22.177964 # ok 1323 # SKIP SVE set SVE get FPSIMD for VL 5280
3051 22:58:22.178068 # ok 1324 # SKIP SVE set FPSIMD get SVE for VL 5280
3052 22:58:22.178354 # ok 1325 Set SVE VL 5296
3053 22:58:22.178454 # ok 1326 # SKIP SVE set SVE get SVE for VL 5296
3054 22:58:22.178546 # ok 1327 # SKIP SVE set SVE get FPSIMD for VL 5296
3055 22:58:22.178651 # ok 1328 # SKIP SVE set FPSIMD get SVE for VL 5296
3056 22:58:22.178740 # ok 1329 Set SVE VL 5312
3057 22:58:22.178847 # ok 1330 # SKIP SVE set SVE get SVE for VL 5312
3058 22:58:22.178950 # ok 1331 # SKIP SVE set SVE get FPSIMD for VL 5312
3059 22:58:22.179052 # ok 1332 # SKIP SVE set FPSIMD get SVE for VL 5312
3060 22:58:22.179154 # ok 1333 Set SVE VL 5328
3061 22:58:22.179255 # ok 1334 # SKIP SVE set SVE get SVE for VL 5328
3062 22:58:22.179375 # ok 1335 # SKIP SVE set SVE get FPSIMD for VL 5328
3063 22:58:22.179669 # ok 1336 # SKIP SVE set FPSIMD get SVE for VL 5328
3064 22:58:22.179782 # ok 1337 Set SVE VL 5344
3065 22:58:22.179886 # ok 1338 # SKIP SVE set SVE get SVE for VL 5344
3066 22:58:22.179990 # ok 1339 # SKIP SVE set SVE get FPSIMD for VL 5344
3067 22:58:22.180092 # ok 1340 # SKIP SVE set FPSIMD get SVE for VL 5344
3068 22:58:22.180198 # ok 1341 Set SVE VL 5360
3069 22:58:22.180304 # ok 1342 # SKIP SVE set SVE get SVE for VL 5360
3070 22:58:22.180410 # ok 1343 # SKIP SVE set SVE get FPSIMD for VL 5360
3071 22:58:22.180702 # ok 1344 # SKIP SVE set FPSIMD get SVE for VL 5360
3072 22:58:22.180797 # ok 1345 Set SVE VL 5376
3073 22:58:22.180899 # ok 1346 # SKIP SVE set SVE get SVE for VL 5376
3074 22:58:22.181001 # ok 1347 # SKIP SVE set SVE get FPSIMD for VL 5376
3075 22:58:22.181113 # ok 1348 # SKIP SVE set FPSIMD get SVE for VL 5376
3076 22:58:22.181220 # ok 1349 Set SVE VL 5392
3077 22:58:22.181321 # ok 1350 # SKIP SVE set SVE get SVE for VL 5392
3078 22:58:22.181611 # ok 1351 # SKIP SVE set SVE get FPSIMD for VL 5392
3079 22:58:22.181921 # ok 1352 # SKIP SVE set FPSIMD get SVE for VL 5392
3080 22:58:22.182016 # ok 1353 Set SVE VL 5408
3081 22:58:22.182118 # ok 1354 # SKIP SVE set SVE get SVE for VL 5408
3082 22:58:22.182220 # ok 1355 # SKIP SVE set SVE get FPSIMD for VL 5408
3083 22:58:22.182326 # ok 1356 # SKIP SVE set FPSIMD get SVE for VL 5408
3084 22:58:22.182434 # ok 1357 Set SVE VL 5424
3085 22:58:22.182541 # ok 1358 # SKIP SVE set SVE get SVE for VL 5424
3086 22:58:22.182649 # ok 1359 # SKIP SVE set SVE get FPSIMD for VL 5424
3087 22:58:22.182945 # ok 1360 # SKIP SVE set FPSIMD get SVE for VL 5424
3088 22:58:22.183043 # ok 1361 Set SVE VL 5440
3089 22:58:22.183145 # ok 1362 # SKIP SVE set SVE get SVE for VL 5440
3090 22:58:22.183251 # ok 1363 # SKIP SVE set SVE get FPSIMD for VL 5440
3091 22:58:22.183355 # ok 1364 # SKIP SVE set FPSIMD get SVE for VL 5440
3092 22:58:22.183637 # ok 1365 Set SVE VL 5456
3093 22:58:22.183735 # ok 1366 # SKIP SVE set SVE get SVE for VL 5456
3094 22:58:22.183841 # ok 1367 # SKIP SVE set SVE get FPSIMD for VL 5456
3095 22:58:22.183934 # ok 1368 # SKIP SVE set FPSIMD get SVE for VL 5456
3096 22:58:22.184037 # ok 1369 Set SVE VL 5472
3097 22:58:22.184128 # ok 1370 # SKIP SVE set SVE get SVE for VL 5472
3098 22:58:22.184230 # ok 1371 # SKIP SVE set SVE get FPSIMD for VL 5472
3099 22:58:22.184345 # ok 1372 # SKIP SVE set FPSIMD get SVE for VL 5472
3100 22:58:22.184460 # ok 1373 Set SVE VL 5488
3101 22:58:22.184760 # ok 1374 # SKIP SVE set SVE get SVE for VL 5488
3102 22:58:22.184873 # ok 1375 # SKIP SVE set SVE get FPSIMD for VL 5488
3103 22:58:22.184965 # ok 1376 # SKIP SVE set FPSIMD get SVE for VL 5488
3104 22:58:22.185072 # ok 1377 Set SVE VL 5504
3105 22:58:22.185179 # ok 1378 # SKIP SVE set SVE get SVE for VL 5504
3106 22:58:22.185437 # ok 1379 # SKIP SVE set SVE get FPSIMD for VL 5504
3107 22:58:22.185526 # ok 1380 # SKIP SVE set FPSIMD get SVE for VL 5504
3108 22:58:22.185636 # ok 1381 Set SVE VL 5520
3109 22:58:22.185905 # ok 1382 # SKIP SVE set SVE get SVE for VL 5520
3110 22:58:22.185992 # ok 1383 # SKIP SVE set SVE get FPSIMD for VL 5520
3111 22:58:22.186079 # ok 1384 # SKIP SVE set FPSIMD get SVE for VL 5520
3112 22:58:22.186166 # ok 1385 Set SVE VL 5536
3113 22:58:22.186440 # ok 1386 # SKIP SVE set SVE get SVE for VL 5536
3114 22:58:22.186528 # ok 1387 # SKIP SVE set SVE get FPSIMD for VL 5536
3115 22:58:22.186635 # ok 1388 # SKIP SVE set FPSIMD get SVE for VL 5536
3116 22:58:22.186723 # ok 1389 Set SVE VL 5552
3117 22:58:22.186811 # ok 1390 # SKIP SVE set SVE get SVE for VL 5552
3118 22:58:22.187077 # ok 1391 # SKIP SVE set SVE get FPSIMD for VL 5552
3119 22:58:22.187148 # ok 1392 # SKIP SVE set FPSIMD get SVE for VL 5552
3120 22:58:22.187248 # ok 1393 Set SVE VL 5568
3121 22:58:22.187354 # ok 1394 # SKIP SVE set SVE get SVE for VL 5568
3122 22:58:22.187653 # ok 1395 # SKIP SVE set SVE get FPSIMD for VL 5568
3123 22:58:22.187739 # ok 1396 # SKIP SVE set FPSIMD get SVE for VL 5568
3124 22:58:22.187855 # ok 1397 Set SVE VL 5584
3125 22:58:22.187959 # ok 1398 # SKIP SVE set SVE get SVE for VL 5584
3126 22:58:22.188078 # ok 1399 # SKIP SVE set SVE get FPSIMD for VL 5584
3127 22:58:22.188190 # ok 1400 # SKIP SVE set FPSIMD get SVE for VL 5584
3128 22:58:22.188286 # ok 1401 Set SVE VL 5600
3129 22:58:22.188402 # ok 1402 # SKIP SVE set SVE get SVE for VL 5600
3130 22:58:22.188514 # ok 1403 # SKIP SVE set SVE get FPSIMD for VL 5600
3131 22:58:22.188636 # ok 1404 # SKIP SVE set FPSIMD get SVE for VL 5600
3132 22:58:22.188744 # ok 1405 Set SVE VL 5616
3133 22:58:22.188857 # ok 1406 # SKIP SVE set SVE get SVE for VL 5616
3134 22:58:22.205567 # ok 1407 # SKIP SVE set SVE get FPSIMD for VL 5616
3135 22:58:22.231926 # ok 1408 # SKIP SVE set FPSIMD get SVE for VL 5616
3136 22:58:22.232299 # ok 1409 Set SVE VL 5632
3137 22:58:22.232782 # ok 1410 # SKIP SVE set SVE get SVE for VL 5632
3138 22:58:22.232936 # ok 1411 # SKIP SVE set SVE get FPSIMD for VL 5632
3139 22:58:22.233133 # ok 1412 # SKIP SVE set FPSIMD get SVE for VL 5632
3140 22:58:22.233407 # ok 1413 Set SVE VL 5648
3141 22:58:22.233541 # ok 1414 # SKIP SVE set SVE get SVE for VL 5648
3142 22:58:22.233636 # ok 1415 # SKIP SVE set SVE get FPSIMD for VL 5648
3143 22:58:22.233759 # ok 1416 # SKIP SVE set FPSIMD get SVE for VL 5648
3144 22:58:22.233851 # ok 1417 Set SVE VL 5664
3145 22:58:22.233939 # ok 1418 # SKIP SVE set SVE get SVE for VL 5664
3146 22:58:22.234025 # ok 1419 # SKIP SVE set SVE get FPSIMD for VL 5664
3147 22:58:22.234110 # ok 1420 # SKIP SVE set FPSIMD get SVE for VL 5664
3148 22:58:22.234197 # ok 1421 Set SVE VL 5680
3149 22:58:22.234282 # ok 1422 # SKIP SVE set SVE get SVE for VL 5680
3150 22:58:22.267309 # ok 1423 # SKIP SVE set SVE get FPSIMD for VL 5680
3151 22:58:22.267559 # ok 1424 # SKIP SVE set FPSIMD get SVE for VL 5680
3152 22:58:22.267906 # ok 1425 Set SVE VL 5696
3153 22:58:22.268054 # ok 1426 # SKIP SVE set SVE get SVE for VL 5696
3154 22:58:22.268241 # ok 1427 # SKIP SVE set SVE get FPSIMD for VL 5696
3155 22:58:22.268438 # ok 1428 # SKIP SVE set FPSIMD get SVE for VL 5696
3156 22:58:22.268605 # ok 1429 Set SVE VL 5712
3157 22:58:22.268723 # ok 1430 # SKIP SVE set SVE get SVE for VL 5712
3158 22:58:22.268816 # ok 1431 # SKIP SVE set SVE get FPSIMD for VL 5712
3159 22:58:22.268905 # ok 1432 # SKIP SVE set FPSIMD get SVE for VL 5712
3160 22:58:22.268992 # ok 1433 Set SVE VL 5728
3161 22:58:22.269081 # ok 1434 # SKIP SVE set SVE get SVE for VL 5728
3162 22:58:22.269170 # ok 1435 # SKIP SVE set SVE get FPSIMD for VL 5728
3163 22:58:22.269279 # ok 1436 # SKIP SVE set FPSIMD get SVE for VL 5728
3164 22:58:22.269369 # ok 1437 Set SVE VL 5744
3165 22:58:22.269454 # ok 1438 # SKIP SVE set SVE get SVE for VL 5744
3166 22:58:22.269538 # ok 1439 # SKIP SVE set SVE get FPSIMD for VL 5744
3167 22:58:22.269640 # ok 1440 # SKIP SVE set FPSIMD get SVE for VL 5744
3168 22:58:22.269738 # ok 1441 Set SVE VL 5760
3169 22:58:22.269823 # ok 1442 # SKIP SVE set SVE get SVE for VL 5760
3170 22:58:22.279206 # ok 1443 # SKIP SVE set SVE get FPSIMD for VL 5760
3171 22:58:22.279672 # ok 1444 # SKIP SVE set FPSIMD get SVE for VL 5760
3172 22:58:22.279781 # ok 1445 Set SVE VL 5776
3173 22:58:22.279871 # ok 1446 # SKIP SVE set SVE get SVE for VL 5776
3174 22:58:22.279975 # ok 1447 # SKIP SVE set SVE get FPSIMD for VL 5776
3175 22:58:22.280065 # ok 1448 # SKIP SVE set FPSIMD get SVE for VL 5776
3176 22:58:22.280151 # ok 1449 Set SVE VL 5792
3177 22:58:22.280235 # ok 1450 # SKIP SVE set SVE get SVE for VL 5792
3178 22:58:22.280334 # ok 1451 # SKIP SVE set SVE get FPSIMD for VL 5792
3179 22:58:22.280440 # ok 1452 # SKIP SVE set FPSIMD get SVE for VL 5792
3180 22:58:22.280544 # ok 1453 Set SVE VL 5808
3181 22:58:22.280649 # ok 1454 # SKIP SVE set SVE get SVE for VL 5808
3182 22:58:22.280994 # ok 1455 # SKIP SVE set SVE get FPSIMD for VL 5808
3183 22:58:22.281115 # ok 1456 # SKIP SVE set FPSIMD get SVE for VL 5808
3184 22:58:22.281206 # ok 1457 Set SVE VL 5824
3185 22:58:22.281311 # ok 1458 # SKIP SVE set SVE get SVE for VL 5824
3186 22:58:22.281415 # ok 1459 # SKIP SVE set SVE get FPSIMD for VL 5824
3187 22:58:22.281695 # ok 1460 # SKIP SVE set FPSIMD get SVE for VL 5824
3188 22:58:22.281801 # ok 1461 Set SVE VL 5840
3189 22:58:22.285754 # ok 1462 # SKIP SVE set SVE get SVE for VL 5840
3190 22:58:22.292217 # ok 1463 # SKIP SVE set SVE get FPSIMD for VL 5840
3191 22:58:22.292758 # ok 1464 # SKIP SVE set FPSIMD get SVE for VL 5840
3192 22:58:22.292977 # ok 1465 Set SVE VL 5856
3193 22:58:22.293156 # ok 1466 # SKIP SVE set SVE get SVE for VL 5856
3194 22:58:22.293427 # ok 1467 # SKIP SVE set SVE get FPSIMD for VL 5856
3195 22:58:22.293708 # ok 1468 # SKIP SVE set FPSIMD get SVE for VL 5856
3196 22:58:22.293877 # ok 1469 Set SVE VL 5872
3197 22:58:22.294021 # ok 1470 # SKIP SVE set SVE get SVE for VL 5872
3198 22:58:22.294150 # ok 1471 # SKIP SVE set SVE get FPSIMD for VL 5872
3199 22:58:22.294275 # ok 1472 # SKIP SVE set FPSIMD get SVE for VL 5872
3200 22:58:22.294407 # ok 1473 Set SVE VL 5888
3201 22:58:22.294638 # ok 1474 # SKIP SVE set SVE get SVE for VL 5888
3202 22:58:22.294815 # ok 1475 # SKIP SVE set SVE get FPSIMD for VL 5888
3203 22:58:22.295007 # ok 1476 # SKIP SVE set FPSIMD get SVE for VL 5888
3204 22:58:22.295197 # ok 1477 Set SVE VL 5904
3205 22:58:22.296110 # ok 1478 # SKIP SVE set SVE get SVE for VL 5904
3206 22:58:22.296258 # ok 1479 # SKIP SVE set SVE get FPSIMD for VL 5904
3207 22:58:22.296602 # ok 1480 # SKIP SVE set FPSIMD get SVE for VL 5904
3208 22:58:22.296714 # ok 1481 Set SVE VL 5920
3209 22:58:22.296865 # ok 1482 # SKIP SVE set SVE get SVE for VL 5920
3210 22:58:22.296986 # ok 1483 # SKIP SVE set SVE get FPSIMD for VL 5920
3211 22:58:22.297076 # ok 1484 # SKIP SVE set FPSIMD get SVE for VL 5920
3212 22:58:22.297162 # ok 1485 Set SVE VL 5936
3213 22:58:22.297265 # ok 1486 # SKIP SVE set SVE get SVE for VL 5936
3214 22:58:22.297366 # ok 1487 # SKIP SVE set SVE get FPSIMD for VL 5936
3215 22:58:22.297466 # ok 1488 # SKIP SVE set FPSIMD get SVE for VL 5936
3216 22:58:22.297721 # ok 1489 Set SVE VL 5952
3217 22:58:22.297831 # ok 1490 # SKIP SVE set SVE get SVE for VL 5952
3218 22:58:22.299981 # ok 1491 # SKIP SVE set SVE get FPSIMD for VL 5952
3219 22:58:22.300561 # ok 1492 # SKIP SVE set FPSIMD get SVE for VL 5952
3220 22:58:22.300735 # ok 1493 Set SVE VL 5968
3221 22:58:22.300893 # ok 1494 # SKIP SVE set SVE get SVE for VL 5968
3222 22:58:22.301039 # ok 1495 # SKIP SVE set SVE get FPSIMD for VL 5968
3223 22:58:22.301189 # ok 1496 # SKIP SVE set FPSIMD get SVE for VL 5968
3224 22:58:22.301386 # ok 1497 Set SVE VL 5984
3225 22:58:22.301569 # ok 1498 # SKIP SVE set SVE get SVE for VL 5984
3226 22:58:22.301778 # ok 1499 # SKIP SVE set SVE get FPSIMD for VL 5984
3227 22:58:22.301934 # ok 1500 # SKIP SVE set FPSIMD get SVE for VL 5984
3228 22:58:22.302083 # ok 1501 Set SVE VL 6000
3229 22:58:22.302261 # ok 1502 # SKIP SVE set SVE get SVE for VL 6000
3230 22:58:22.302468 # ok 1503 # SKIP SVE set SVE get FPSIMD for VL 6000
3231 22:58:22.302610 # ok 1504 # SKIP SVE set FPSIMD get SVE for VL 6000
3232 22:58:22.303235 # ok 1505 Set SVE VL 6016
3233 22:58:22.303638 # ok 1506 # SKIP SVE set SVE get SVE for VL 6016
3234 22:58:22.303743 # ok 1507 # SKIP SVE set SVE get FPSIMD for VL 6016
3235 22:58:22.303834 # ok 1508 # SKIP SVE set FPSIMD get SVE for VL 6016
3236 22:58:22.303943 # ok 1509 Set SVE VL 6032
3237 22:58:22.304026 # ok 1510 # SKIP SVE set SVE get SVE for VL 6032
3238 22:58:22.304123 # ok 1511 # SKIP SVE set SVE get FPSIMD for VL 6032
3239 22:58:22.304219 # ok 1512 # SKIP SVE set FPSIMD get SVE for VL 6032
3240 22:58:22.304437 # ok 1513 Set SVE VL 6048
3241 22:58:22.304540 # ok 1514 # SKIP SVE set SVE get SVE for VL 6048
3242 22:58:22.304642 # ok 1515 # SKIP SVE set SVE get FPSIMD for VL 6048
3243 22:58:22.304744 # ok 1516 # SKIP SVE set FPSIMD get SVE for VL 6048
3244 22:58:22.304832 # ok 1517 Set SVE VL 6064
3245 22:58:22.304924 # ok 1518 # SKIP SVE set SVE get SVE for VL 6064
3246 22:58:22.305027 # ok 1519 # SKIP SVE set SVE get FPSIMD for VL 6064
3247 22:58:22.305323 # ok 1520 # SKIP SVE set FPSIMD get SVE for VL 6064
3248 22:58:22.305432 # ok 1521 Set SVE VL 6080
3249 22:58:22.305689 # ok 1522 # SKIP SVE set SVE get SVE for VL 6080
3250 22:58:22.305778 # ok 1523 # SKIP SVE set SVE get FPSIMD for VL 6080
3251 22:58:22.306888 # ok 1524 # SKIP SVE set FPSIMD get SVE for VL 6080
3252 22:58:22.307058 # ok 1525 Set SVE VL 6096
3253 22:58:22.307401 # ok 1526 # SKIP SVE set SVE get SVE for VL 6096
3254 22:58:22.307566 # ok 1527 # SKIP SVE set SVE get FPSIMD for VL 6096
3255 22:58:22.307724 # ok 1528 # SKIP SVE set FPSIMD get SVE for VL 6096
3256 22:58:22.307920 # ok 1529 Set SVE VL 6112
3257 22:58:22.308119 # ok 1530 # SKIP SVE set SVE get SVE for VL 6112
3258 22:58:22.308308 # ok 1531 # SKIP SVE set SVE get FPSIMD for VL 6112
3259 22:58:22.308484 # ok 1532 # SKIP SVE set FPSIMD get SVE for VL 6112
3260 22:58:22.308614 # ok 1533 Set SVE VL 6128
3261 22:58:22.308745 # ok 1534 # SKIP SVE set SVE get SVE for VL 6128
3262 22:58:22.308872 # ok 1535 # SKIP SVE set SVE get FPSIMD for VL 6128
3263 22:58:22.309015 # ok 1536 # SKIP SVE set FPSIMD get SVE for VL 6128
3264 22:58:22.309165 # ok 1537 Set SVE VL 6144
3265 22:58:22.309295 # ok 1538 # SKIP SVE set SVE get SVE for VL 6144
3266 22:58:22.309422 # ok 1539 # SKIP SVE set SVE get FPSIMD for VL 6144
3267 22:58:22.309597 # ok 1540 # SKIP SVE set FPSIMD get SVE for VL 6144
3268 22:58:22.309861 # ok 1541 Set SVE VL 6160
3269 22:58:22.310058 # ok 1542 # SKIP SVE set SVE get SVE for VL 6160
3270 22:58:22.310242 # ok 1543 # SKIP SVE set SVE get FPSIMD for VL 6160
3271 22:58:22.310417 # ok 1544 # SKIP SVE set FPSIMD get SVE for VL 6160
3272 22:58:22.310566 # ok 1545 Set SVE VL 6176
3273 22:58:22.310822 # ok 1546 # SKIP SVE set SVE get SVE for VL 6176
3274 22:58:22.311055 # ok 1547 # SKIP SVE set SVE get FPSIMD for VL 6176
3275 22:58:22.311228 # ok 1548 # SKIP SVE set FPSIMD get SVE for VL 6176
3276 22:58:22.311405 # ok 1549 Set SVE VL 6192
3277 22:58:22.311616 # ok 1550 # SKIP SVE set SVE get SVE for VL 6192
3278 22:58:22.311781 # ok 1551 # SKIP SVE set SVE get FPSIMD for VL 6192
3279 22:58:22.311937 # ok 1552 # SKIP SVE set FPSIMD get SVE for VL 6192
3280 22:58:22.312144 # ok 1553 Set SVE VL 6208
3281 22:58:22.312416 # ok 1554 # SKIP SVE set SVE get SVE for VL 6208
3282 22:58:22.312629 # ok 1555 # SKIP SVE set SVE get FPSIMD for VL 6208
3283 22:58:22.312846 # ok 1556 # SKIP SVE set FPSIMD get SVE for VL 6208
3284 22:58:22.313057 # ok 1557 Set SVE VL 6224
3285 22:58:22.313224 # ok 1558 # SKIP SVE set SVE get SVE for VL 6224
3286 22:58:22.313352 # ok 1559 # SKIP SVE set SVE get FPSIMD for VL 6224
3287 22:58:22.313536 # ok 1560 # SKIP SVE set FPSIMD get SVE for VL 6224
3288 22:58:22.313780 # ok 1561 Set SVE VL 6240
3289 22:58:22.313982 # ok 1562 # SKIP SVE set SVE get SVE for VL 6240
3290 22:58:22.314168 # ok 1563 # SKIP SVE set SVE get FPSIMD for VL 6240
3291 22:58:22.314310 # ok 1564 # SKIP SVE set FPSIMD get SVE for VL 6240
3292 22:58:22.314453 # ok 1565 Set SVE VL 6256
3293 22:58:22.314595 # ok 1566 # SKIP SVE set SVE get SVE for VL 6256
3294 22:58:22.314738 # ok 1567 # SKIP SVE set SVE get FPSIMD for VL 6256
3295 22:58:22.315104 # ok 1568 # SKIP SVE set FPSIMD get SVE for VL 6256
3296 22:58:22.315245 # ok 1569 Set SVE VL 6272
3297 22:58:22.315390 # ok 1570 # SKIP SVE set SVE get SVE for VL 6272
3298 22:58:22.315534 # ok 1571 # SKIP SVE set SVE get FPSIMD for VL 6272
3299 22:58:22.315678 # ok 1572 # SKIP SVE set FPSIMD get SVE for VL 6272
3300 22:58:22.315821 # ok 1573 Set SVE VL 6288
3301 22:58:22.315969 # ok 1574 # SKIP SVE set SVE get SVE for VL 6288
3302 22:58:22.316112 # ok 1575 # SKIP SVE set SVE get FPSIMD for VL 6288
3303 22:58:22.316256 # ok 1576 # SKIP SVE set FPSIMD get SVE for VL 6288
3304 22:58:22.316398 # ok 1577 Set SVE VL 6304
3305 22:58:22.316539 # ok 1578 # SKIP SVE set SVE get SVE for VL 6304
3306 22:58:22.316719 # ok 1579 # SKIP SVE set SVE get FPSIMD for VL 6304
3307 22:58:22.316856 # ok 1580 # SKIP SVE set FPSIMD get SVE for VL 6304
3308 22:58:22.317001 # ok 1581 Set SVE VL 6320
3309 22:58:22.317143 # ok 1582 # SKIP SVE set SVE get SVE for VL 6320
3310 22:58:22.317286 # ok 1583 # SKIP SVE set SVE get FPSIMD for VL 6320
3311 22:58:22.317429 # ok 1584 # SKIP SVE set FPSIMD get SVE for VL 6320
3312 22:58:22.317572 # ok 1585 Set SVE VL 6336
3313 22:58:22.317730 # ok 1586 # SKIP SVE set SVE get SVE for VL 6336
3314 22:58:22.317874 # ok 1587 # SKIP SVE set SVE get FPSIMD for VL 6336
3315 22:58:22.318016 # ok 1588 # SKIP SVE set FPSIMD get SVE for VL 6336
3316 22:58:22.318160 # ok 1589 Set SVE VL 6352
3317 22:58:22.320730 # ok 1590 # SKIP SVE set SVE get SVE for VL 6352
3318 22:58:22.320872 # ok 1591 # SKIP SVE set SVE get FPSIMD for VL 6352
3319 22:58:22.321019 # ok 1592 # SKIP SVE set FPSIMD get SVE for VL 6352
3320 22:58:22.321166 # ok 1593 Set SVE VL 6368
3321 22:58:22.321342 # ok 1594 # SKIP SVE set SVE get SVE for VL 6368
3322 22:58:22.321495 # ok 1595 # SKIP SVE set SVE get FPSIMD for VL 6368
3323 22:58:22.321639 # ok 1596 # SKIP SVE set FPSIMD get SVE for VL 6368
3324 22:58:22.321828 # ok 1597 Set SVE VL 6384
3325 22:58:22.321954 # ok 1598 # SKIP SVE set SVE get SVE for VL 6384
3326 22:58:22.322075 # ok 1599 # SKIP SVE set SVE get FPSIMD for VL 6384
3327 22:58:22.322457 # ok 1600 # SKIP SVE set FPSIMD get SVE for VL 6384
3328 22:58:22.322868 # ok 1601 Set SVE VL 6400
3329 22:58:22.323072 # ok 1602 # SKIP SVE set SVE get SVE for VL 6400
3330 22:58:22.323281 # ok 1603 # SKIP SVE set SVE get FPSIMD for VL 6400
3331 22:58:22.323532 # ok 1604 # SKIP SVE set FPSIMD get SVE for VL 6400
3332 22:58:22.323718 # ok 1605 Set SVE VL 6416
3333 22:58:22.323872 # ok 1606 # SKIP SVE set SVE get SVE for VL 6416
3334 22:58:22.324032 # ok 1607 # SKIP SVE set SVE get FPSIMD for VL 6416
3335 22:58:22.324191 # ok 1608 # SKIP SVE set FPSIMD get SVE for VL 6416
3336 22:58:22.324439 # ok 1609 Set SVE VL 6432
3337 22:58:22.324655 # ok 1610 # SKIP SVE set SVE get SVE for VL 6432
3338 22:58:22.324839 # ok 1611 # SKIP SVE set SVE get FPSIMD for VL 6432
3339 22:58:22.325005 # ok 1612 # SKIP SVE set FPSIMD get SVE for VL 6432
3340 22:58:22.325170 # ok 1613 Set SVE VL 6448
3341 22:58:22.325329 # ok 1614 # SKIP SVE set SVE get SVE for VL 6448
3342 22:58:22.325479 # ok 1615 # SKIP SVE set SVE get FPSIMD for VL 6448
3343 22:58:22.325722 # ok 1616 # SKIP SVE set FPSIMD get SVE for VL 6448
3344 22:58:22.325932 # ok 1617 Set SVE VL 6464
3345 22:58:22.326120 # ok 1618 # SKIP SVE set SVE get SVE for VL 6464
3346 22:58:22.326311 # ok 1619 # SKIP SVE set SVE get FPSIMD for VL 6464
3347 22:58:22.326504 # ok 1620 # SKIP SVE set FPSIMD get SVE for VL 6464
3348 22:58:22.326663 # ok 1621 Set SVE VL 6480
3349 22:58:22.326808 # ok 1622 # SKIP SVE set SVE get SVE for VL 6480
3350 22:58:22.326947 # ok 1623 # SKIP SVE set SVE get FPSIMD for VL 6480
3351 22:58:22.327102 # ok 1624 # SKIP SVE set FPSIMD get SVE for VL 6480
3352 22:58:22.327256 # ok 1625 Set SVE VL 6496
3353 22:58:22.327447 # ok 1626 # SKIP SVE set SVE get SVE for VL 6496
3354 22:58:22.327613 # ok 1627 # SKIP SVE set SVE get FPSIMD for VL 6496
3355 22:58:22.327775 # ok 1628 # SKIP SVE set FPSIMD get SVE for VL 6496
3356 22:58:22.327929 # ok 1629 Set SVE VL 6512
3357 22:58:22.328088 # ok 1630 # SKIP SVE set SVE get SVE for VL 6512
3358 22:58:22.328232 # ok 1631 # SKIP SVE set SVE get FPSIMD for VL 6512
3359 22:58:22.328387 # ok 1632 # SKIP SVE set FPSIMD get SVE for VL 6512
3360 22:58:22.328543 # ok 1633 Set SVE VL 6528
3361 22:58:22.328719 # ok 1634 # SKIP SVE set SVE get SVE for VL 6528
3362 22:58:22.328914 # ok 1635 # SKIP SVE set SVE get FPSIMD for VL 6528
3363 22:58:22.329090 # ok 1636 # SKIP SVE set FPSIMD get SVE for VL 6528
3364 22:58:22.329233 # ok 1637 Set SVE VL 6544
3365 22:58:22.329415 # ok 1638 # SKIP SVE set SVE get SVE for VL 6544
3366 22:58:22.329612 # ok 1639 # SKIP SVE set SVE get FPSIMD for VL 6544
3367 22:58:22.330349 # ok 1640 # SKIP SVE set FPSIMD get SVE for VL 6544
3368 22:58:22.330511 # ok 1641 Set SVE VL 6560
3369 22:58:22.330658 # ok 1642 # SKIP SVE set SVE get SVE for VL 6560
3370 22:58:22.330815 # ok 1643 # SKIP SVE set SVE get FPSIMD for VL 6560
3371 22:58:22.331318 # ok 1644 # SKIP SVE set FPSIMD get SVE for VL 6560
3372 22:58:22.331518 # ok 1645 Set SVE VL 6576
3373 22:58:22.331692 # ok 1646 # SKIP SVE set SVE get SVE for VL 6576
3374 22:58:22.331883 # ok 1647 # SKIP SVE set SVE get FPSIMD for VL 6576
3375 22:58:22.332092 # ok 1648 # SKIP SVE set FPSIMD get SVE for VL 6576
3376 22:58:22.332301 # ok 1649 Set SVE VL 6592
3377 22:58:22.332513 # ok 1650 # SKIP SVE set SVE get SVE for VL 6592
3378 22:58:22.332732 # ok 1651 # SKIP SVE set SVE get FPSIMD for VL 6592
3379 22:58:22.332937 # ok 1652 # SKIP SVE set FPSIMD get SVE for VL 6592
3380 22:58:22.333124 # ok 1653 Set SVE VL 6608
3381 22:58:22.333288 # ok 1654 # SKIP SVE set SVE get SVE for VL 6608
3382 22:58:22.333453 # ok 1655 # SKIP SVE set SVE get FPSIMD for VL 6608
3383 22:58:22.333640 # ok 1656 # SKIP SVE set FPSIMD get SVE for VL 6608
3384 22:58:22.333839 # ok 1657 Set SVE VL 6624
3385 22:58:22.334023 # ok 1658 # SKIP SVE set SVE get SVE for VL 6624
3386 22:58:22.334304 # ok 1659 # SKIP SVE set SVE get FPSIMD for VL 6624
3387 22:58:22.334518 # ok 1660 # SKIP SVE set FPSIMD get SVE for VL 6624
3388 22:58:22.334695 # ok 1661 Set SVE VL 6640
3389 22:58:22.334863 # ok 1662 # SKIP SVE set SVE get SVE for VL 6640
3390 22:58:22.335032 # ok 1663 # SKIP SVE set SVE get FPSIMD for VL 6640
3391 22:58:22.335199 # ok 1664 # SKIP SVE set FPSIMD get SVE for VL 6640
3392 22:58:22.335367 # ok 1665 Set SVE VL 6656
3393 22:58:22.335528 # ok 1666 # SKIP SVE set SVE get SVE for VL 6656
3394 22:58:22.335688 # ok 1667 # SKIP SVE set SVE get FPSIMD for VL 6656
3395 22:58:22.335896 # ok 1668 # SKIP SVE set FPSIMD get SVE for VL 6656
3396 22:58:22.336063 # ok 1669 Set SVE VL 6672
3397 22:58:22.336218 # ok 1670 # SKIP SVE set SVE get SVE for VL 6672
3398 22:58:22.336346 # ok 1671 # SKIP SVE set SVE get FPSIMD for VL 6672
3399 22:58:22.336463 # ok 1672 # SKIP SVE set FPSIMD get SVE for VL 6672
3400 22:58:22.336616 # ok 1673 Set SVE VL 6688
3401 22:58:22.336757 # ok 1674 # SKIP SVE set SVE get SVE for VL 6688
3402 22:58:22.336911 # ok 1675 # SKIP SVE set SVE get FPSIMD for VL 6688
3403 22:58:22.337063 # ok 1676 # SKIP SVE set FPSIMD get SVE for VL 6688
3404 22:58:22.337212 # ok 1677 Set SVE VL 6704
3405 22:58:22.337362 # ok 1678 # SKIP SVE set SVE get SVE for VL 6704
3406 22:58:22.337513 # ok 1679 # SKIP SVE set SVE get FPSIMD for VL 6704
3407 22:58:22.337764 # ok 1680 # SKIP SVE set FPSIMD get SVE for VL 6704
3408 22:58:22.337976 # ok 1681 Set SVE VL 6720
3409 22:58:22.338161 # ok 1682 # SKIP SVE set SVE get SVE for VL 6720
3410 22:58:22.338345 # ok 1683 # SKIP SVE set SVE get FPSIMD for VL 6720
3411 22:58:22.338528 # ok 1684 # SKIP SVE set FPSIMD get SVE for VL 6720
3412 22:58:22.338778 # ok 1685 Set SVE VL 6736
3413 22:58:22.338975 # ok 1686 # SKIP SVE set SVE get SVE for VL 6736
3414 22:58:22.339439 # ok 1687 # SKIP SVE set SVE get FPSIMD for VL 6736
3415 22:58:22.339638 # ok 1688 # SKIP SVE set FPSIMD get SVE for VL 6736
3416 22:58:22.339837 # ok 1689 Set SVE VL 6752
3417 22:58:22.340053 # ok 1690 # SKIP SVE set SVE get SVE for VL 6752
3418 22:58:22.340211 # ok 1691 # SKIP SVE set SVE get FPSIMD for VL 6752
3419 22:58:22.340376 # ok 1692 # SKIP SVE set FPSIMD get SVE for VL 6752
3420 22:58:22.340541 # ok 1693 Set SVE VL 6768
3421 22:58:22.340692 # ok 1694 # SKIP SVE set SVE get SVE for VL 6768
3422 22:58:22.340846 # ok 1695 # SKIP SVE set SVE get FPSIMD for VL 6768
3423 22:58:22.341016 # ok 1696 # SKIP SVE set FPSIMD get SVE for VL 6768
3424 22:58:22.341180 # ok 1697 Set SVE VL 6784
3425 22:58:22.341345 # ok 1698 # SKIP SVE set SVE get SVE for VL 6784
3426 22:58:22.341497 # ok 1699 # SKIP SVE set SVE get FPSIMD for VL 6784
3427 22:58:22.341638 # ok 1700 # SKIP SVE set FPSIMD get SVE for VL 6784
3428 22:58:22.341806 # ok 1701 Set SVE VL 6800
3429 22:58:22.341953 # ok 1702 # SKIP SVE set SVE get SVE for VL 6800
3430 22:58:22.342093 # ok 1703 # SKIP SVE set SVE get FPSIMD for VL 6800
3431 22:58:22.342176 # ok 1704 # SKIP SVE set FPSIMD get SVE for VL 6800
3432 22:58:22.342251 # ok 1705 Set SVE VL 6816
3433 22:58:22.342324 # ok 1706 # SKIP SVE set SVE get SVE for VL 6816
3434 22:58:22.342409 # ok 1707 # SKIP SVE set SVE get FPSIMD for VL 6816
3435 22:58:22.342522 # ok 1708 # SKIP SVE set FPSIMD get SVE for VL 6816
3436 22:58:22.342602 # ok 1709 Set SVE VL 6832
3437 22:58:22.342689 # ok 1710 # SKIP SVE set SVE get SVE for VL 6832
3438 22:58:22.342774 # ok 1711 # SKIP SVE set SVE get FPSIMD for VL 6832
3439 22:58:22.342860 # ok 1712 # SKIP SVE set FPSIMD get SVE for VL 6832
3440 22:58:22.342943 # ok 1713 Set SVE VL 6848
3441 22:58:22.343025 # ok 1714 # SKIP SVE set SVE get SVE for VL 6848
3442 22:58:22.343101 # ok 1715 # SKIP SVE set SVE get FPSIMD for VL 6848
3443 22:58:22.343185 # ok 1716 # SKIP SVE set FPSIMD get SVE for VL 6848
3444 22:58:22.343265 # ok 1717 Set SVE VL 6864
3445 22:58:22.343351 # ok 1718 # SKIP SVE set SVE get SVE for VL 6864
3446 22:58:22.343418 # ok 1719 # SKIP SVE set SVE get FPSIMD for VL 6864
3447 22:58:22.343478 # ok 1720 # SKIP SVE set FPSIMD get SVE for VL 6864
3448 22:58:22.343538 # ok 1721 Set SVE VL 6880
3449 22:58:22.343599 # ok 1722 # SKIP SVE set SVE get SVE for VL 6880
3450 22:58:22.343675 # ok 1723 # SKIP SVE set SVE get FPSIMD for VL 6880
3451 22:58:22.343748 # ok 1724 # SKIP SVE set FPSIMD get SVE for VL 6880
3452 22:58:22.343841 # ok 1725 Set SVE VL 6896
3453 22:58:22.343947 # ok 1726 # SKIP SVE set SVE get SVE for VL 6896
3454 22:58:22.344065 # ok 1727 # SKIP SVE set SVE get FPSIMD for VL 6896
3455 22:58:22.344172 # ok 1728 # SKIP SVE set FPSIMD get SVE for VL 6896
3456 22:58:22.344287 # ok 1729 Set SVE VL 6912
3457 22:58:22.344757 # ok 1730 # SKIP SVE set SVE get SVE for VL 6912
3458 22:58:22.344869 # ok 1731 # SKIP SVE set SVE get FPSIMD for VL 6912
3459 22:58:22.344949 # ok 1732 # SKIP SVE set FPSIMD get SVE for VL 6912
3460 22:58:22.345011 # ok 1733 Set SVE VL 6928
3461 22:58:22.345072 # ok 1734 # SKIP SVE set SVE get SVE for VL 6928
3462 22:58:22.345134 # ok 1735 # SKIP SVE set SVE get FPSIMD for VL 6928
3463 22:58:22.345192 # ok 1736 # SKIP SVE set FPSIMD get SVE for VL 6928
3464 22:58:22.345252 # ok 1737 Set SVE VL 6944
3465 22:58:22.345310 # ok 1738 # SKIP SVE set SVE get SVE for VL 6944
3466 22:58:22.345368 # ok 1739 # SKIP SVE set SVE get FPSIMD for VL 6944
3467 22:58:22.345427 # ok 1740 # SKIP SVE set FPSIMD get SVE for VL 6944
3468 22:58:22.345485 # ok 1741 Set SVE VL 6960
3469 22:58:22.345544 # ok 1742 # SKIP SVE set SVE get SVE for VL 6960
3470 22:58:22.345603 # ok 1743 # SKIP SVE set SVE get FPSIMD for VL 6960
3471 22:58:22.345680 # ok 1744 # SKIP SVE set FPSIMD get SVE for VL 6960
3472 22:58:22.345786 # ok 1745 Set SVE VL 6976
3473 22:58:22.345881 # ok 1746 # SKIP SVE set SVE get SVE for VL 6976
3474 22:58:22.345973 # ok 1747 # SKIP SVE set SVE get FPSIMD for VL 6976
3475 22:58:22.346046 # ok 1748 # SKIP SVE set FPSIMD get SVE for VL 6976
3476 22:58:22.346120 # ok 1749 Set SVE VL 6992
3477 22:58:22.346200 # ok 1750 # SKIP SVE set SVE get SVE for VL 6992
3478 22:58:22.346274 # ok 1751 # SKIP SVE set SVE get FPSIMD for VL 6992
3479 22:58:22.346347 # ok 1752 # SKIP SVE set FPSIMD get SVE for VL 6992
3480 22:58:22.346420 # ok 1753 Set SVE VL 7008
3481 22:58:22.346494 # ok 1754 # SKIP SVE set SVE get SVE for VL 7008
3482 22:58:22.346568 # ok 1755 # SKIP SVE set SVE get FPSIMD for VL 7008
3483 22:58:22.346641 # ok 1756 # SKIP SVE set FPSIMD get SVE for VL 7008
3484 22:58:22.346714 # ok 1757 Set SVE VL 7024
3485 22:58:22.346788 # ok 1758 # SKIP SVE set SVE get SVE for VL 7024
3486 22:58:22.346861 # ok 1759 # SKIP SVE set SVE get FPSIMD for VL 7024
3487 22:58:22.346934 # ok 1760 # SKIP SVE set FPSIMD get SVE for VL 7024
3488 22:58:22.347009 # ok 1761 Set SVE VL 7040
3489 22:58:22.347081 # ok 1762 # SKIP SVE set SVE get SVE for VL 7040
3490 22:58:22.347155 # ok 1763 # SKIP SVE set SVE get FPSIMD for VL 7040
3491 22:58:22.347228 # ok 1764 # SKIP SVE set FPSIMD get SVE for VL 7040
3492 22:58:22.347301 # ok 1765 Set SVE VL 7056
3493 22:58:22.347374 # ok 1766 # SKIP SVE set SVE get SVE for VL 7056
3494 22:58:22.347448 # ok 1767 # SKIP SVE set SVE get FPSIMD for VL 7056
3495 22:58:22.347522 # ok 1768 # SKIP SVE set FPSIMD get SVE for VL 7056
3496 22:58:22.347596 # ok 1769 Set SVE VL 7072
3497 22:58:22.347669 # ok 1770 # SKIP SVE set SVE get SVE for VL 7072
3498 22:58:22.347761 # ok 1771 # SKIP SVE set SVE get FPSIMD for VL 7072
3499 22:58:22.348016 # ok 1772 # SKIP SVE set FPSIMD get SVE for VL 7072
3500 22:58:22.349378 # ok 1773 Set SVE VL 7088
3501 22:58:22.349517 # ok 1774 # SKIP SVE set SVE get SVE for VL 7088
3502 22:58:22.349656 # ok 1775 # SKIP SVE set SVE get FPSIMD for VL 7088
3503 22:58:22.349770 # ok 1776 # SKIP SVE set FPSIMD get SVE for VL 7088
3504 22:58:22.350559 # ok 1777 Set SVE VL 7104
3505 22:58:22.350861 # ok 1778 # SKIP SVE set SVE get SVE for VL 7104
3506 22:58:22.350980 # ok 1779 # SKIP SVE set SVE get FPSIMD for VL 7104
3507 22:58:22.351093 # ok 1780 # SKIP SVE set FPSIMD get SVE for VL 7104
3508 22:58:22.351208 # ok 1781 Set SVE VL 7120
3509 22:58:22.351301 # ok 1782 # SKIP SVE set SVE get SVE for VL 7120
3510 22:58:22.351407 # ok 1783 # SKIP SVE set SVE get FPSIMD for VL 7120
3511 22:58:22.351515 # ok 1784 # SKIP SVE set FPSIMD get SVE for VL 7120
3512 22:58:22.351625 # ok 1785 Set SVE VL 7136
3513 22:58:22.351734 # ok 1786 # SKIP SVE set SVE get SVE for VL 7136
3514 22:58:22.351840 # ok 1787 # SKIP SVE set SVE get FPSIMD for VL 7136
3515 22:58:22.352143 # ok 1788 # SKIP SVE set FPSIMD get SVE for VL 7136
3516 22:58:22.352262 # ok 1789 Set SVE VL 7152
3517 22:58:22.352358 # ok 1790 # SKIP SVE set SVE get SVE for VL 7152
3518 22:58:22.352441 # ok 1791 # SKIP SVE set SVE get FPSIMD for VL 7152
3519 22:58:22.352519 # ok 1792 # SKIP SVE set FPSIMD get SVE for VL 7152
3520 22:58:22.352774 # ok 1793 Set SVE VL 7168
3521 22:58:22.352860 # ok 1794 # SKIP SVE set SVE get SVE for VL 7168
3522 22:58:22.352941 # ok 1795 # SKIP SVE set SVE get FPSIMD for VL 7168
3523 22:58:22.353021 # ok 1796 # SKIP SVE set FPSIMD get SVE for VL 7168
3524 22:58:22.353315 # ok 1797 Set SVE VL 7184
3525 22:58:22.353415 # ok 1798 # SKIP SVE set SVE get SVE for VL 7184
3526 22:58:22.353514 # ok 1799 # SKIP SVE set SVE get FPSIMD for VL 7184
3527 22:58:22.353605 # ok 1800 # SKIP SVE set FPSIMD get SVE for VL 7184
3528 22:58:22.353911 # ok 1801 Set SVE VL 7200
3529 22:58:22.354016 # ok 1802 # SKIP SVE set SVE get SVE for VL 7200
3530 22:58:22.354347 # ok 1803 # SKIP SVE set SVE get FPSIMD for VL 7200
3531 22:58:22.354438 # ok 1804 # SKIP SVE set FPSIMD get SVE for VL 7200
3532 22:58:22.354513 # ok 1805 Set SVE VL 7216
3533 22:58:22.354593 # ok 1806 # SKIP SVE set SVE get SVE for VL 7216
3534 22:58:22.354661 # ok 1807 # SKIP SVE set SVE get FPSIMD for VL 7216
3535 22:58:22.354915 # ok 1808 # SKIP SVE set FPSIMD get SVE for VL 7216
3536 22:58:22.354988 # ok 1809 Set SVE VL 7232
3537 22:58:22.355063 # ok 1810 # SKIP SVE set SVE get SVE for VL 7232
3538 22:58:22.355144 # ok 1811 # SKIP SVE set SVE get FPSIMD for VL 7232
3539 22:58:22.355398 # ok 1812 # SKIP SVE set FPSIMD get SVE for VL 7232
3540 22:58:22.355650 # ok 1813 Set SVE VL 7248
3541 22:58:22.355720 # ok 1814 # SKIP SVE set SVE get SVE for VL 7248
3542 22:58:22.355797 # ok 1815 # SKIP SVE set SVE get FPSIMD for VL 7248
3543 22:58:22.355874 # ok 1816 # SKIP SVE set FPSIMD get SVE for VL 7248
3544 22:58:22.355974 # ok 1817 Set SVE VL 7264
3545 22:58:22.356076 # ok 1818 # SKIP SVE set SVE get SVE for VL 7264
3546 22:58:22.356350 # ok 1819 # SKIP SVE set SVE get FPSIMD for VL 7264
3547 22:58:22.356432 # ok 1820 # SKIP SVE set FPSIMD get SVE for VL 7264
3548 22:58:22.356680 # ok 1821 Set SVE VL 7280
3549 22:58:22.356750 # ok 1822 # SKIP SVE set SVE get SVE for VL 7280
3550 22:58:22.356826 # ok 1823 # SKIP SVE set SVE get FPSIMD for VL 7280
3551 22:58:22.356908 # ok 1824 # SKIP SVE set FPSIMD get SVE for VL 7280
3552 22:58:22.357197 # ok 1825 Set SVE VL 7296
3553 22:58:22.357274 # ok 1826 # SKIP SVE set SVE get SVE for VL 7296
3554 22:58:22.357676 # ok 1827 # SKIP SVE set SVE get FPSIMD for VL 7296
3555 22:58:22.357749 # ok 1828 # SKIP SVE set FPSIMD get SVE for VL 7296
3556 22:58:22.357812 # ok 1829 Set SVE VL 7312
3557 22:58:22.358498 # ok 1830 # SKIP SVE set SVE get SVE for VL 7312
3558 22:58:22.358748 # ok 1831 # SKIP SVE set SVE get FPSIMD for VL 7312
3559 22:58:22.358827 # ok 1832 # SKIP SVE set FPSIMD get SVE for VL 7312
3560 22:58:22.359082 # ok 1833 Set SVE VL 7328
3561 22:58:22.361750 # ok 1834 # SKIP SVE set SVE get SVE for VL 7328
3562 22:58:22.361882 # ok 1835 # SKIP SVE set SVE get FPSIMD for VL 7328
3563 22:58:22.361975 # ok 1836 # SKIP SVE set FPSIMD get SVE for VL 7328
3564 22:58:22.362062 # ok 1837 Set SVE VL 7344
3565 22:58:22.362153 # ok 1838 # SKIP SVE set SVE get SVE for VL 7344
3566 22:58:22.362239 # ok 1839 # SKIP SVE set SVE get FPSIMD for VL 7344
3567 22:58:22.362328 # ok 1840 # SKIP SVE set FPSIMD get SVE for VL 7344
3568 22:58:22.362415 # ok 1841 Set SVE VL 7360
3569 22:58:22.362507 # ok 1842 # SKIP SVE set SVE get SVE for VL 7360
3570 22:58:22.362597 # ok 1843 # SKIP SVE set SVE get FPSIMD for VL 7360
3571 22:58:22.362683 # ok 1844 # SKIP SVE set FPSIMD get SVE for VL 7360
3572 22:58:22.362765 # ok 1845 Set SVE VL 7376
3573 22:58:22.362847 # ok 1846 # SKIP SVE set SVE get SVE for VL 7376
3574 22:58:22.362929 # ok 1847 # SKIP SVE set SVE get FPSIMD for VL 7376
3575 22:58:22.363011 # ok 1848 # SKIP SVE set FPSIMD get SVE for VL 7376
3576 22:58:22.363094 # ok 1849 Set SVE VL 7392
3577 22:58:22.363177 # ok 1850 # SKIP SVE set SVE get SVE for VL 7392
3578 22:58:22.363261 # ok 1851 # SKIP SVE set SVE get FPSIMD for VL 7392
3579 22:58:22.363343 # ok 1852 # SKIP SVE set FPSIMD get SVE for VL 7392
3580 22:58:22.363427 # ok 1853 Set SVE VL 7408
3581 22:58:22.363511 # ok 1854 # SKIP SVE set SVE get SVE for VL 7408
3582 22:58:22.363594 # ok 1855 # SKIP SVE set SVE get FPSIMD for VL 7408
3583 22:58:22.363679 # ok 1856 # SKIP SVE set FPSIMD get SVE for VL 7408
3584 22:58:22.363764 # ok 1857 Set SVE VL 7424
3585 22:58:22.364092 # ok 1858 # SKIP SVE set SVE get SVE for VL 7424
3586 22:58:22.364192 # ok 1859 # SKIP SVE set SVE get FPSIMD for VL 7424
3587 22:58:22.364274 # ok 1860 # SKIP SVE set FPSIMD get SVE for VL 7424
3588 22:58:22.364360 # ok 1861 Set SVE VL 7440
3589 22:58:22.364446 # ok 1862 # SKIP SVE set SVE get SVE for VL 7440
3590 22:58:22.364534 # ok 1863 # SKIP SVE set SVE get FPSIMD for VL 7440
3591 22:58:22.364621 # ok 1864 # SKIP SVE set FPSIMD get SVE for VL 7440
3592 22:58:22.364701 # ok 1865 Set SVE VL 7456
3593 22:58:22.364776 # ok 1866 # SKIP SVE set SVE get SVE for VL 7456
3594 22:58:22.364851 # ok 1867 # SKIP SVE set SVE get FPSIMD for VL 7456
3595 22:58:22.364927 # ok 1868 # SKIP SVE set FPSIMD get SVE for VL 7456
3596 22:58:22.365002 # ok 1869 Set SVE VL 7472
3597 22:58:22.365078 # ok 1870 # SKIP SVE set SVE get SVE for VL 7472
3598 22:58:22.365178 # ok 1871 # SKIP SVE set SVE get FPSIMD for VL 7472
3599 22:58:22.365270 # ok 1872 # SKIP SVE set FPSIMD get SVE for VL 7472
3600 22:58:22.365358 # ok 1873 Set SVE VL 7488
3601 22:58:22.365436 # ok 1874 # SKIP SVE set SVE get SVE for VL 7488
3602 22:58:22.365513 # ok 1875 # SKIP SVE set SVE get FPSIMD for VL 7488
3603 22:58:22.365593 # ok 1876 # SKIP SVE set FPSIMD get SVE for VL 7488
3604 22:58:22.365683 # ok 1877 Set SVE VL 7504
3605 22:58:22.365772 # ok 1878 # SKIP SVE set SVE get SVE for VL 7504
3606 22:58:22.365878 # ok 1879 # SKIP SVE set SVE get FPSIMD for VL 7504
3607 22:58:22.365968 # ok 1880 # SKIP SVE set FPSIMD get SVE for VL 7504
3608 22:58:22.366048 # ok 1881 Set SVE VL 7520
3609 22:58:22.366138 # ok 1882 # SKIP SVE set SVE get SVE for VL 7520
3610 22:58:22.366424 # ok 1883 # SKIP SVE set SVE get FPSIMD for VL 7520
3611 22:58:22.366722 # ok 1884 # SKIP SVE set FPSIMD get SVE for VL 7520
3612 22:58:22.366810 # ok 1885 Set SVE VL 7536
3613 22:58:22.366887 # ok 1886 # SKIP SVE set SVE get SVE for VL 7536
3614 22:58:22.366965 # ok 1887 # SKIP SVE set SVE get FPSIMD for VL 7536
3615 22:58:22.367066 # ok 1888 # SKIP SVE set FPSIMD get SVE for VL 7536
3616 22:58:22.367156 # ok 1889 Set SVE VL 7552
3617 22:58:22.367242 # ok 1890 # SKIP SVE set SVE get SVE for VL 7552
3618 22:58:22.367343 # ok 1891 # SKIP SVE set SVE get FPSIMD for VL 7552
3619 22:58:22.367423 # ok 1892 # SKIP SVE set FPSIMD get SVE for VL 7552
3620 22:58:22.367714 # ok 1893 Set SVE VL 7568
3621 22:58:22.367818 # ok 1894 # SKIP SVE set SVE get SVE for VL 7568
3622 22:58:22.367908 # ok 1895 # SKIP SVE set SVE get FPSIMD for VL 7568
3623 22:58:22.368009 # ok 1896 # SKIP SVE set FPSIMD get SVE for VL 7568
3624 22:58:22.368093 # ok 1897 Set SVE VL 7584
3625 22:58:22.368195 # ok 1898 # SKIP SVE set SVE get SVE for VL 7584
3626 22:58:22.368286 # ok 1899 # SKIP SVE set SVE get FPSIMD for VL 7584
3627 22:58:22.368399 # ok 1900 # SKIP SVE set FPSIMD get SVE for VL 7584
3628 22:58:22.368671 # ok 1901 Set SVE VL 7600
3629 22:58:22.368757 # ok 1902 # SKIP SVE set SVE get SVE for VL 7600
3630 22:58:22.368861 # ok 1903 # SKIP SVE set SVE get FPSIMD for VL 7600
3631 22:58:22.368966 # ok 1904 # SKIP SVE set FPSIMD get SVE for VL 7600
3632 22:58:22.369218 # ok 1905 Set SVE VL 7616
3633 22:58:22.369324 # ok 1906 # SKIP SVE set SVE get SVE for VL 7616
3634 22:58:22.369433 # ok 1907 # SKIP SVE set SVE get FPSIMD for VL 7616
3635 22:58:22.369512 # ok 1908 # SKIP SVE set FPSIMD get SVE for VL 7616
3636 22:58:22.369594 # ok 1909 Set SVE VL 7632
3637 22:58:22.369692 # ok 1910 # SKIP SVE set SVE get SVE for VL 7632
3638 22:58:22.369970 # ok 1911 # SKIP SVE set SVE get FPSIMD for VL 7632
3639 22:58:22.370114 # ok 1912 # SKIP SVE set FPSIMD get SVE for VL 7632
3640 22:58:22.370263 # ok 1913 Set SVE VL 7648
3641 22:58:22.370368 # ok 1914 # SKIP SVE set SVE get SVE for VL 7648
3642 22:58:22.370641 # ok 1915 # SKIP SVE set SVE get FPSIMD for VL 7648
3643 22:58:22.370734 # ok 1916 # SKIP SVE set FPSIMD get SVE for VL 7648
3644 22:58:22.370837 # ok 1917 Set SVE VL 7664
3645 22:58:22.370916 # ok 1918 # SKIP SVE set SVE get SVE for VL 7664
3646 22:58:22.370997 # ok 1919 # SKIP SVE set SVE get FPSIMD for VL 7664
3647 22:58:22.371085 # ok 1920 # SKIP SVE set FPSIMD get SVE for VL 7664
3648 22:58:22.371336 # ok 1921 Set SVE VL 7680
3649 22:58:22.371425 # ok 1922 # SKIP SVE set SVE get SVE for VL 7680
3650 22:58:22.371503 # ok 1923 # SKIP SVE set SVE get FPSIMD for VL 7680
3651 22:58:22.371749 # ok 1924 # SKIP SVE set FPSIMD get SVE for VL 7680
3652 22:58:22.371817 # ok 1925 Set SVE VL 7696
3653 22:58:22.372071 # ok 1926 # SKIP SVE set SVE get SVE for VL 7696
3654 22:58:22.372167 # ok 1927 # SKIP SVE set SVE get FPSIMD for VL 7696
3655 22:58:22.372233 # ok 1928 # SKIP SVE set FPSIMD get SVE for VL 7696
3656 22:58:22.372487 # ok 1929 Set SVE VL 7712
3657 22:58:22.372556 # ok 1930 # SKIP SVE set SVE get SVE for VL 7712
3658 22:58:22.372639 # ok 1931 # SKIP SVE set SVE get FPSIMD for VL 7712
3659 22:58:22.372718 # ok 1932 # SKIP SVE set FPSIMD get SVE for VL 7712
3660 22:58:22.372962 # ok 1933 Set SVE VL 7728
3661 22:58:22.373030 # ok 1934 # SKIP SVE set SVE get SVE for VL 7728
3662 22:58:22.373104 # ok 1935 # SKIP SVE set SVE get FPSIMD for VL 7728
3663 22:58:22.373370 # ok 1936 # SKIP SVE set FPSIMD get SVE for VL 7728
3664 22:58:22.373464 # ok 1937 Set SVE VL 7744
3665 22:58:22.373568 # ok 1938 # SKIP SVE set SVE get SVE for VL 7744
3666 22:58:22.373681 # ok 1939 # SKIP SVE set SVE get FPSIMD for VL 7744
3667 22:58:22.376439 # ok 1940 # SKIP SVE set FPSIMD get SVE for VL 7744
3668 22:58:22.376575 # ok 1941 Set SVE VL 7760
3669 22:58:22.376682 # ok 1942 # SKIP SVE set SVE get SVE for VL 7760
3670 22:58:22.376779 # ok 1943 # SKIP SVE set SVE get FPSIMD for VL 7760
3671 22:58:22.376875 # ok 1944 # SKIP SVE set FPSIMD get SVE for VL 7760
3672 22:58:22.376971 # ok 1945 Set SVE VL 7776
3673 22:58:22.377070 # ok 1946 # SKIP SVE set SVE get SVE for VL 7776
3674 22:58:22.377168 # ok 1947 # SKIP SVE set SVE get FPSIMD for VL 7776
3675 22:58:22.377245 # ok 1948 # SKIP SVE set FPSIMD get SVE for VL 7776
3676 22:58:22.377328 # ok 1949 Set SVE VL 7792
3677 22:58:22.377404 # ok 1950 # SKIP SVE set SVE get SVE for VL 7792
3678 22:58:22.377492 # ok 1951 # SKIP SVE set SVE get FPSIMD for VL 7792
3679 22:58:22.377578 # ok 1952 # SKIP SVE set FPSIMD get SVE for VL 7792
3680 22:58:22.377641 # ok 1953 Set SVE VL 7808
3681 22:58:22.377713 # ok 1954 # SKIP SVE set SVE get SVE for VL 7808
3682 22:58:22.377788 # ok 1955 # SKIP SVE set SVE get FPSIMD for VL 7808
3683 22:58:22.381869 # ok 1956 # SKIP SVE set FPSIMD get SVE for VL 7808
3684 22:58:22.384119 # ok 1957 Set SVE VL 7824
3685 22:58:22.384232 # ok 1958 # SKIP SVE set SVE get SVE for VL 7824
3686 22:58:22.384322 # ok 1959 # SKIP SVE set SVE get FPSIMD for VL 7824
3687 22:58:22.384450 # ok 1960 # SKIP SVE set FPSIMD get SVE for VL 7824
3688 22:58:22.384569 # ok 1961 Set SVE VL 7840
3689 22:58:22.384688 # ok 1962 # SKIP SVE set SVE get SVE for VL 7840
3690 22:58:22.384796 # ok 1963 # SKIP SVE set SVE get FPSIMD for VL 7840
3691 22:58:22.384910 # ok 1964 # SKIP SVE set FPSIMD get SVE for VL 7840
3692 22:58:22.385044 # ok 1965 Set SVE VL 7856
3693 22:58:22.385152 # ok 1966 # SKIP SVE set SVE get SVE for VL 7856
3694 22:58:22.385251 # ok 1967 # SKIP SVE set SVE get FPSIMD for VL 7856
3695 22:58:22.385360 # ok 1968 # SKIP SVE set FPSIMD get SVE for VL 7856
3696 22:58:22.385461 # ok 1969 Set SVE VL 7872
3697 22:58:22.385553 # ok 1970 # SKIP SVE set SVE get SVE for VL 7872
3698 22:58:22.385837 # ok 1971 # SKIP SVE set SVE get FPSIMD for VL 7872
3699 22:58:22.385921 # ok 1972 # SKIP SVE set FPSIMD get SVE for VL 7872
3700 22:58:22.385988 # ok 1973 Set SVE VL 7888
3701 22:58:22.386065 # ok 1974 # SKIP SVE set SVE get SVE for VL 7888
3702 22:58:22.386145 # ok 1975 # SKIP SVE set SVE get FPSIMD for VL 7888
3703 22:58:22.386210 # ok 1976 # SKIP SVE set FPSIMD get SVE for VL 7888
3704 22:58:22.386290 # ok 1977 Set SVE VL 7904
3705 22:58:22.386366 # ok 1978 # SKIP SVE set SVE get SVE for VL 7904
3706 22:58:22.386441 # ok 1979 # SKIP SVE set SVE get FPSIMD for VL 7904
3707 22:58:22.386519 # ok 1980 # SKIP SVE set FPSIMD get SVE for VL 7904
3708 22:58:22.386598 # ok 1981 Set SVE VL 7920
3709 22:58:22.386671 # ok 1982 # SKIP SVE set SVE get SVE for VL 7920
3710 22:58:22.386774 # ok 1983 # SKIP SVE set SVE get FPSIMD for VL 7920
3711 22:58:22.386853 # ok 1984 # SKIP SVE set FPSIMD get SVE for VL 7920
3712 22:58:22.386949 # ok 1985 Set SVE VL 7936
3713 22:58:22.387053 # ok 1986 # SKIP SVE set SVE get SVE for VL 7936
3714 22:58:22.387158 # ok 1987 # SKIP SVE set SVE get FPSIMD for VL 7936
3715 22:58:22.387259 # ok 1988 # SKIP SVE set FPSIMD get SVE for VL 7936
3716 22:58:22.387342 # ok 1989 Set SVE VL 7952
3717 22:58:22.387452 # ok 1990 # SKIP SVE set SVE get SVE for VL 7952
3718 22:58:22.387530 # ok 1991 # SKIP SVE set SVE get FPSIMD for VL 7952
3719 22:58:22.387594 # ok 1992 # SKIP SVE set FPSIMD get SVE for VL 7952
3720 22:58:22.387668 # ok 1993 Set SVE VL 7968
3721 22:58:22.387756 # ok 1994 # SKIP SVE set SVE get SVE for VL 7968
3722 22:58:22.387830 # ok 1995 # SKIP SVE set SVE get FPSIMD for VL 7968
3723 22:58:22.387894 # ok 1996 # SKIP SVE set FPSIMD get SVE for VL 7968
3724 22:58:22.387988 # ok 1997 Set SVE VL 7984
3725 22:58:22.388092 # ok 1998 # SKIP SVE set SVE get SVE for VL 7984
3726 22:58:22.388172 # ok 1999 # SKIP SVE set SVE get FPSIMD for VL 7984
3727 22:58:22.388259 # ok 2000 # SKIP SVE set FPSIMD get SVE for VL 7984
3728 22:58:22.388335 # ok 2001 Set SVE VL 8000
3729 22:58:22.388711 # ok 2002 # SKIP SVE set SVE get SVE for VL 8000
3730 22:58:22.388996 # ok 2003 # SKIP SVE set SVE get FPSIMD for VL 8000
3731 22:58:22.389074 # ok 2004 # SKIP SVE set FPSIMD get SVE for VL 8000
3732 22:58:22.389136 # ok 2005 Set SVE VL 8016
3733 22:58:22.389204 # ok 2006 # SKIP SVE set SVE get SVE for VL 8016
3734 22:58:22.389290 # ok 2007 # SKIP SVE set SVE get FPSIMD for VL 8016
3735 22:58:22.389382 # ok 2008 # SKIP SVE set FPSIMD get SVE for VL 8016
3736 22:58:22.389479 # ok 2009 Set SVE VL 8032
3737 22:58:22.389745 # ok 2010 # SKIP SVE set SVE get SVE for VL 8032
3738 22:58:22.389839 # ok 2011 # SKIP SVE set SVE get FPSIMD for VL 8032
3739 22:58:22.389944 # ok 2012 # SKIP SVE set FPSIMD get SVE for VL 8032
3740 22:58:22.390197 # ok 2013 Set SVE VL 8048
3741 22:58:22.390263 # ok 2014 # SKIP SVE set SVE get SVE for VL 8048
3742 22:58:22.390509 # ok 2015 # SKIP SVE set SVE get FPSIMD for VL 8048
3743 22:58:22.390583 # ok 2016 # SKIP SVE set FPSIMD get SVE for VL 8048
3744 22:58:22.390645 # ok 2017 Set SVE VL 8064
3745 22:58:22.390716 # ok 2018 # SKIP SVE set SVE get SVE for VL 8064
3746 22:58:22.390955 # ok 2019 # SKIP SVE set SVE get FPSIMD for VL 8064
3747 22:58:22.391060 # ok 2020 # SKIP SVE set FPSIMD get SVE for VL 8064
3748 22:58:22.391129 # ok 2021 Set SVE VL 8080
3749 22:58:22.391212 # ok 2022 # SKIP SVE set SVE get SVE for VL 8080
3750 22:58:22.391673 # ok 2023 # SKIP SVE set SVE get FPSIMD for VL 8080
3751 22:58:22.391740 # ok 2024 # SKIP SVE set FPSIMD get SVE for VL 8080
3752 22:58:22.391801 # ok 2025 Set SVE VL 8096
3753 22:58:22.392060 # ok 2026 # SKIP SVE set SVE get SVE for VL 8096
3754 22:58:22.392137 # ok 2027 # SKIP SVE set SVE get FPSIMD for VL 8096
3755 22:58:22.392376 # ok 2028 # SKIP SVE set FPSIMD get SVE for VL 8096
3756 22:58:22.392440 # ok 2029 Set SVE VL 8112
3757 22:58:22.392499 # ok 2030 # SKIP SVE set SVE get SVE for VL 8112
3758 22:58:22.392745 # ok 2031 # SKIP SVE set SVE get FPSIMD for VL 8112
3759 22:58:22.392819 # ok 2032 # SKIP SVE set FPSIMD get SVE for VL 8112
3760 22:58:22.392881 # ok 2033 Set SVE VL 8128
3761 22:58:22.392951 # ok 2034 # SKIP SVE set SVE get SVE for VL 8128
3762 22:58:22.393380 # ok 2035 # SKIP SVE set SVE get FPSIMD for VL 8128
3763 22:58:22.393458 # ok 2036 # SKIP SVE set FPSIMD get SVE for VL 8128
3764 22:58:22.393558 # ok 2037 Set SVE VL 8144
3765 22:58:22.393674 # ok 2038 # SKIP SVE set SVE get SVE for VL 8144
3766 22:58:22.393769 # ok 2039 # SKIP SVE set SVE get FPSIMD for VL 8144
3767 22:58:22.393864 # ok 2040 # SKIP SVE set FPSIMD get SVE for VL 8144
3768 22:58:22.393949 # ok 2041 Set SVE VL 8160
3769 22:58:22.394219 # ok 2042 # SKIP SVE set SVE get SVE for VL 8160
3770 22:58:22.394302 # ok 2043 # SKIP SVE set SVE get FPSIMD for VL 8160
3771 22:58:22.394389 # ok 2044 # SKIP SVE set FPSIMD get SVE for VL 8160
3772 22:58:22.394866 # ok 2045 Set SVE VL 8176
3773 22:58:22.394955 # ok 2046 # SKIP SVE set SVE get SVE for VL 8176
3774 22:58:22.395020 # ok 2047 # SKIP SVE set SVE get FPSIMD for VL 8176
3775 22:58:22.395264 # ok 2048 # SKIP SVE set FPSIMD get SVE for VL 8176
3776 22:58:22.395333 # ok 2049 Set SVE VL 8192
3777 22:58:22.395397 # ok 2050 # SKIP SVE set SVE get SVE for VL 8192
3778 22:58:22.395473 # ok 2051 # SKIP SVE set SVE get FPSIMD for VL 8192
3779 22:58:22.395538 # ok 2052 # SKIP SVE set FPSIMD get SVE for VL 8192
3780 22:58:22.395610 # ok 2053 Streaming SVE FPSIMD set via SVE: 0
3781 22:58:22.395861 # ok 2054 Streaming SVE get_fpsimd() gave same state
3782 22:58:22.395963 # ok 2055 Streaming SVE SVE_PT_VL_INHERIT set
3783 22:58:22.396042 # ok 2056 Streaming SVE SVE_PT_VL_INHERIT cleared
3784 22:58:22.396123 # ok 2057 Set Streaming SVE VL 16
3785 22:58:22.396535 # ok 2058 Set and get Streaming SVE data for VL 16
3786 22:58:22.396626 # ok 2059 Set and get FPSIMD data for Streaming SVE VL 16
3787 22:58:22.396695 # ok 2060 Set FPSIMD, read via SVE for Streaming SVE VL 16
3788 22:58:22.396991 # ok 2061 Set Streaming SVE VL 32
3789 22:58:22.397088 # ok 2062 Set and get Streaming SVE data for VL 32
3790 22:58:22.397164 # ok 2063 Set and get FPSIMD data for Streaming SVE VL 32
3791 22:58:22.397251 # ok 2064 Set FPSIMD, read via SVE for Streaming SVE VL 32
3792 22:58:22.397329 # ok 2065 Set Streaming SVE VL 48
3793 22:58:22.397596 # ok 2066 # SKIP Streaming SVE set SVE get SVE for VL 48
3794 22:58:22.397718 # ok 2067 # SKIP Streaming SVE set SVE get FPSIMD for VL 48
3795 22:58:22.397992 # ok 2068 # SKIP Streaming SVE set FPSIMD get SVE for VL 48
3796 22:58:22.398083 # ok 2069 Set Streaming SVE VL 64
3797 22:58:22.398162 # ok 2070 Set and get Streaming SVE data for VL 64
3798 22:58:22.398243 # ok 2071 Set and get FPSIMD data for Streaming SVE VL 64
3799 22:58:22.398497 # ok 2072 Set FPSIMD, read via SVE for Streaming SVE VL 64
3800 22:58:22.398591 # ok 2073 Set Streaming SVE VL 80
3801 22:58:22.398678 # ok 2074 # SKIP Streaming SVE set SVE get SVE for VL 80
3802 22:58:22.398757 # ok 2075 # SKIP Streaming SVE set SVE get FPSIMD for VL 80
3803 22:58:22.399035 # ok 2076 # SKIP Streaming SVE set FPSIMD get SVE for VL 80
3804 22:58:22.399161 # ok 2077 Set Streaming SVE VL 96
3805 22:58:22.399447 # ok 2078 # SKIP Streaming SVE set SVE get SVE for VL 96
3806 22:58:22.399543 # ok 2079 # SKIP Streaming SVE set SVE get FPSIMD for VL 96
3807 22:58:22.399631 # ok 2080 # SKIP Streaming SVE set FPSIMD get SVE for VL 96
3808 22:58:22.399721 # ok 2081 Set Streaming SVE VL 112
3809 22:58:22.400008 # ok 2082 # SKIP Streaming SVE set SVE get SVE for VL 112
3810 22:58:22.400094 # ok 2083 # SKIP Streaming SVE set SVE get FPSIMD for VL 112
3811 22:58:22.400181 # ok 2084 # SKIP Streaming SVE set FPSIMD get SVE for VL 112
3812 22:58:22.400283 # ok 2085 Set Streaming SVE VL 128
3813 22:58:22.400373 # ok 2086 Set and get Streaming SVE data for VL 128
3814 22:58:22.400655 # ok 2087 Set and get FPSIMD data for Streaming SVE VL 128
3815 22:58:22.400774 # ok 2088 Set FPSIMD, read via SVE for Streaming SVE VL 128
3816 22:58:22.400878 # ok 2089 Set Streaming SVE VL 144
3817 22:58:22.401146 # ok 2090 # SKIP Streaming SVE set SVE get SVE for VL 144
3818 22:58:22.401270 # ok 2091 # SKIP Streaming SVE set SVE get FPSIMD for VL 144
3819 22:58:22.401375 # ok 2092 # SKIP Streaming SVE set FPSIMD get SVE for VL 144
3820 22:58:22.401477 # ok 2093 Set Streaming SVE VL 160
3821 22:58:22.401603 # ok 2094 # SKIP Streaming SVE set SVE get SVE for VL 160
3822 22:58:22.402133 # ok 2095 # SKIP Streaming SVE set SVE get FPSIMD for VL 160
3823 22:58:22.402424 # ok 2096 # SKIP Streaming SVE set FPSIMD get SVE for VL 160
3824 22:58:22.402736 # ok 2097 Set Streaming SVE VL 176
3825 22:58:22.402834 # ok 2098 # SKIP Streaming SVE set SVE get SVE for VL 176
3826 22:58:22.402941 # ok 2099 # SKIP Streaming SVE set SVE get FPSIMD for VL 176
3827 22:58:22.403241 # ok 2100 # SKIP Streaming SVE set FPSIMD get SVE for VL 176
3828 22:58:22.403339 # ok 2101 Set Streaming SVE VL 192
3829 22:58:22.403430 # ok 2102 # SKIP Streaming SVE set SVE get SVE for VL 192
3830 22:58:22.403736 # ok 2103 # SKIP Streaming SVE set SVE get FPSIMD for VL 192
3831 22:58:22.403846 # ok 2104 # SKIP Streaming SVE set FPSIMD get SVE for VL 192
3832 22:58:22.403939 # ok 2105 Set Streaming SVE VL 208
3833 22:58:22.404046 # ok 2106 # SKIP Streaming SVE set SVE get SVE for VL 208
3834 22:58:22.404154 # ok 2107 # SKIP Streaming SVE set SVE get FPSIMD for VL 208
3835 22:58:22.404261 # ok 2108 # SKIP Streaming SVE set FPSIMD get SVE for VL 208
3836 22:58:22.404368 # ok 2109 Set Streaming SVE VL 224
3837 22:58:22.404473 # ok 2110 # SKIP Streaming SVE set SVE get SVE for VL 224
3838 22:58:22.404590 # ok 2111 # SKIP Streaming SVE set SVE get FPSIMD for VL 224
3839 22:58:22.404812 # ok 2112 # SKIP Streaming SVE set FPSIMD get SVE for VL 224
3840 22:58:22.404982 # ok 2113 Set Streaming SVE VL 240
3841 22:58:22.405321 # ok 2114 # SKIP Streaming SVE set SVE get SVE for VL 240
3842 22:58:22.405428 # ok 2115 # SKIP Streaming SVE set SVE get FPSIMD for VL 240
3843 22:58:22.405535 # ok 2116 # SKIP Streaming SVE set FPSIMD get SVE for VL 240
3844 22:58:22.405675 # ok 2117 Set Streaming SVE VL 256
3845 22:58:22.405780 # ok 2118 Set and get Streaming SVE data for VL 256
3846 22:58:22.406116 # ok 2119 Set and get FPSIMD data for Streaming SVE VL 256
3847 22:58:22.406312 # ok 2120 Set FPSIMD, read via SVE for Streaming SVE VL 256
3848 22:58:22.406438 # ok 2121 Set Streaming SVE VL 272
3849 22:58:22.406539 # ok 2122 # SKIP Streaming SVE set SVE get SVE for VL 272
3850 22:58:22.406639 # ok 2123 # SKIP Streaming SVE set SVE get FPSIMD for VL 272
3851 22:58:22.406925 # ok 2124 # SKIP Streaming SVE set FPSIMD get SVE for VL 272
3852 22:58:22.407008 # ok 2125 Set Streaming SVE VL 288
3853 22:58:22.411826 # ok 2126 # SKIP Streaming SVE set SVE get SVE for VL 288
3854 22:58:22.412189 # ok 2127 # SKIP Streaming SVE set SVE get FPSIMD for VL 288
3855 22:58:22.412313 # ok 2128 # SKIP Streaming SVE set FPSIMD get SVE for VL 288
3856 22:58:22.412422 # ok 2129 Set Streaming SVE VL 304
3857 22:58:22.412524 # ok 2130 # SKIP Streaming SVE set SVE get SVE for VL 304
3858 22:58:22.412610 # ok 2131 # SKIP Streaming SVE set SVE get FPSIMD for VL 304
3859 22:58:22.412709 # ok 2132 # SKIP Streaming SVE set FPSIMD get SVE for VL 304
3860 22:58:22.412812 # ok 2133 Set Streaming SVE VL 320
3861 22:58:22.413133 # ok 2134 # SKIP Streaming SVE set SVE get SVE for VL 320
3862 22:58:22.413434 # ok 2135 # SKIP Streaming SVE set SVE get FPSIMD for VL 320
3863 22:58:22.413533 # ok 2136 # SKIP Streaming SVE set FPSIMD get SVE for VL 320
3864 22:58:22.413622 # ok 2137 Set Streaming SVE VL 336
3865 22:58:22.413735 # ok 2138 # SKIP Streaming SVE set SVE get SVE for VL 336
3866 22:58:22.414520 # ok 2139 # SKIP Streaming SVE set SVE get FPSIMD for VL 336
3867 22:58:22.414839 # ok 2140 # SKIP Streaming SVE set FPSIMD get SVE for VL 336
3868 22:58:22.414946 # ok 2141 Set Streaming SVE VL 352
3869 22:58:22.415245 # ok 2142 # SKIP Streaming SVE set SVE get SVE for VL 352
3870 22:58:22.415539 # ok 2143 # SKIP Streaming SVE set SVE get FPSIMD for VL 352
3871 22:58:22.415638 # ok 2144 # SKIP Streaming SVE set FPSIMD get SVE for VL 352
3872 22:58:22.415730 # ok 2145 Set Streaming SVE VL 368
3873 22:58:22.415837 # ok 2146 # SKIP Streaming SVE set SVE get SVE for VL 368
3874 22:58:22.415945 # ok 2147 # SKIP Streaming SVE set SVE get FPSIMD for VL 368
3875 22:58:22.416053 # ok 2148 # SKIP Streaming SVE set FPSIMD get SVE for VL 368
3876 22:58:22.416341 # ok 2149 Set Streaming SVE VL 384
3877 22:58:22.416438 # ok 2150 # SKIP Streaming SVE set SVE get SVE for VL 384
3878 22:58:22.417823 # ok 2151 # SKIP Streaming SVE set SVE get FPSIMD for VL 384
3879 22:58:22.417930 # ok 2152 # SKIP Streaming SVE set FPSIMD get SVE for VL 384
3880 22:58:22.418022 # ok 2153 Set Streaming SVE VL 400
3881 22:58:22.418113 # ok 2154 # SKIP Streaming SVE set SVE get SVE for VL 400
3882 22:58:22.418203 # ok 2155 # SKIP Streaming SVE set SVE get FPSIMD for VL 400
3883 22:58:22.418299 # ok 2156 # SKIP Streaming SVE set FPSIMD get SVE for VL 400
3884 22:58:22.418391 # ok 2157 Set Streaming SVE VL 416
3885 22:58:22.418481 # ok 2158 # SKIP Streaming SVE set SVE get SVE for VL 416
3886 22:58:22.418591 # ok 2159 # SKIP Streaming SVE set SVE get FPSIMD for VL 416
3887 22:58:22.418685 # ok 2160 # SKIP Streaming SVE set FPSIMD get SVE for VL 416
3888 22:58:22.418776 # ok 2161 Set Streaming SVE VL 432
3889 22:58:22.418866 # ok 2162 # SKIP Streaming SVE set SVE get SVE for VL 432
3890 22:58:22.418974 # ok 2163 # SKIP Streaming SVE set SVE get FPSIMD for VL 432
3891 22:58:22.419066 # ok 2164 # SKIP Streaming SVE set FPSIMD get SVE for VL 432
3892 22:58:22.419156 # ok 2165 Set Streaming SVE VL 448
3893 22:58:22.419262 # ok 2166 # SKIP Streaming SVE set SVE get SVE for VL 448
3894 22:58:22.419370 # ok 2167 # SKIP Streaming SVE set SVE get FPSIMD for VL 448
3895 22:58:22.419476 # ok 2168 # SKIP Streaming SVE set FPSIMD get SVE for VL 448
3896 22:58:22.419575 # ok 2169 Set Streaming SVE VL 464
3897 22:58:22.419853 # ok 2170 # SKIP Streaming SVE set SVE get SVE for VL 464
3898 22:58:22.419958 # ok 2171 # SKIP Streaming SVE set SVE get FPSIMD for VL 464
3899 22:58:22.420241 # ok 2172 # SKIP Streaming SVE set FPSIMD get SVE for VL 464
3900 22:58:22.420340 # ok 2173 Set Streaming SVE VL 480
3901 22:58:22.420439 # ok 2174 # SKIP Streaming SVE set SVE get SVE for VL 480
3902 22:58:22.420726 # ok 2175 # SKIP Streaming SVE set SVE get FPSIMD for VL 480
3903 22:58:22.420820 # ok 2176 # SKIP Streaming SVE set FPSIMD get SVE for VL 480
3904 22:58:22.420918 # ok 2177 Set Streaming SVE VL 496
3905 22:58:22.421219 # ok 2178 # SKIP Streaming SVE set SVE get SVE for VL 496
3906 22:58:22.421319 # ok 2179 # SKIP Streaming SVE set SVE get FPSIMD for VL 496
3907 22:58:22.421598 # ok 2180 # SKIP Streaming SVE set FPSIMD get SVE for VL 496
3908 22:58:22.421704 # ok 2181 Set Streaming SVE VL 512
3909 22:58:22.421813 # ok 2182 # SKIP Streaming SVE set SVE get SVE for VL 512
3910 22:58:22.422127 # ok 2183 # SKIP Streaming SVE set SVE get FPSIMD for VL 512
3911 22:58:22.422284 # ok 2184 # SKIP Streaming SVE set FPSIMD get SVE for VL 512
3912 22:58:22.422400 # ok 2185 Set Streaming SVE VL 528
3913 22:58:22.422700 # ok 2186 # SKIP Streaming SVE set SVE get SVE for VL 528
3914 22:58:22.422810 # ok 2187 # SKIP Streaming SVE set SVE get FPSIMD for VL 528
3915 22:58:22.423094 # ok 2188 # SKIP Streaming SVE set FPSIMD get SVE for VL 528
3916 22:58:22.423193 # ok 2189 Set Streaming SVE VL 544
3917 22:58:22.423302 # ok 2190 # SKIP Streaming SVE set SVE get SVE for VL 544
3918 22:58:22.423411 # ok 2191 # SKIP Streaming SVE set SVE get FPSIMD for VL 544
3919 22:58:22.423699 # ok 2192 # SKIP Streaming SVE set FPSIMD get SVE for VL 544
3920 22:58:22.423991 # ok 2193 Set Streaming SVE VL 560
3921 22:58:22.424089 # ok 2194 # SKIP Streaming SVE set SVE get SVE for VL 560
3922 22:58:22.424546 # ok 2195 # SKIP Streaming SVE set SVE get FPSIMD for VL 560
3923 22:58:22.424647 # ok 2196 # SKIP Streaming SVE set FPSIMD get SVE for VL 560
3924 22:58:22.424738 # ok 2197 Set Streaming SVE VL 576
3925 22:58:22.424830 # ok 2198 # SKIP Streaming SVE set SVE get SVE for VL 576
3926 22:58:22.425113 # ok 2199 # SKIP Streaming SVE set SVE get FPSIMD for VL 576
3927 22:58:22.425212 # ok 2200 # SKIP Streaming SVE set FPSIMD get SVE for VL 576
3928 22:58:22.425308 # ok 2201 Set Streaming SVE VL 592
3929 22:58:22.425398 # ok 2202 # SKIP Streaming SVE set SVE get SVE for VL 592
3930 22:58:22.425505 # ok 2203 # SKIP Streaming SVE set SVE get FPSIMD for VL 592
3931 22:58:22.425598 # ok 2204 # SKIP Streaming SVE set FPSIMD get SVE for VL 592
3932 22:58:22.425693 # ok 2205 Set Streaming SVE VL 608
3933 22:58:22.425793 # ok 2206 # SKIP Streaming SVE set SVE get SVE for VL 608
3934 22:58:22.426202 # ok 2207 # SKIP Streaming SVE set SVE get FPSIMD for VL 608
3935 22:58:22.426521 # ok 2208 # SKIP Streaming SVE set FPSIMD get SVE for VL 608
3936 22:58:22.426659 # ok 2209 Set Streaming SVE VL 624
3937 22:58:22.426765 # ok 2210 # SKIP Streaming SVE set SVE get SVE for VL 624
3938 22:58:22.426849 # ok 2211 # SKIP Streaming SVE set SVE get FPSIMD for VL 624
3939 22:58:22.426941 # ok 2212 # SKIP Streaming SVE set FPSIMD get SVE for VL 624
3940 22:58:22.427033 # ok 2213 Set Streaming SVE VL 640
3941 22:58:22.427315 # ok 2214 # SKIP Streaming SVE set SVE get SVE for VL 640
3942 22:58:22.427679 # ok 2215 # SKIP Streaming SVE set SVE get FPSIMD for VL 640
3943 22:58:22.427780 # ok 2216 # SKIP Streaming SVE set FPSIMD get SVE for VL 640
3944 22:58:22.427867 # ok 2217 Set Streaming SVE VL 656
3945 22:58:22.428156 # ok 2218 # SKIP Streaming SVE set SVE get SVE for VL 656
3946 22:58:22.428266 # ok 2219 # SKIP Streaming SVE set SVE get FPSIMD for VL 656
3947 22:58:22.428539 # ok 2220 # SKIP Streaming SVE set FPSIMD get SVE for VL 656
3948 22:58:22.428639 # ok 2221 Set Streaming SVE VL 672
3949 22:58:22.428729 # ok 2222 # SKIP Streaming SVE set SVE get SVE for VL 672
3950 22:58:22.428828 # ok 2223 # SKIP Streaming SVE set SVE get FPSIMD for VL 672
3951 22:58:22.428909 # ok 2224 # SKIP Streaming SVE set FPSIMD get SVE for VL 672
3952 22:58:22.429002 # ok 2225 Set Streaming SVE VL 688
3953 22:58:22.429093 # ok 2226 # SKIP Streaming SVE set SVE get SVE for VL 688
3954 22:58:22.429437 # ok 2227 # SKIP Streaming SVE set SVE get FPSIMD for VL 688
3955 22:58:22.429624 # ok 2228 # SKIP Streaming SVE set FPSIMD get SVE for VL 688
3956 22:58:22.429735 # ok 2229 Set Streaming SVE VL 704
3957 22:58:22.429847 # ok 2230 # SKIP Streaming SVE set SVE get SVE for VL 704
3958 22:58:22.430147 # ok 2231 # SKIP Streaming SVE set SVE get FPSIMD for VL 704
3959 22:58:22.430277 # ok 2232 # SKIP Streaming SVE set FPSIMD get SVE for VL 704
3960 22:58:22.430396 # ok 2233 Set Streaming SVE VL 720
3961 22:58:22.430503 # ok 2234 # SKIP Streaming SVE set SVE get SVE for VL 720
3962 22:58:22.430770 # ok 2235 # SKIP Streaming SVE set SVE get FPSIMD for VL 720
3963 22:58:22.430888 # ok 2236 # SKIP Streaming SVE set FPSIMD get SVE for VL 720
3964 22:58:22.431207 # ok 2237 Set Streaming SVE VL 736
3965 22:58:22.431315 # ok 2238 # SKIP Streaming SVE set SVE get SVE for VL 736
3966 22:58:22.431414 # ok 2239 # SKIP Streaming SVE set SVE get FPSIMD for VL 736
3967 22:58:22.431513 # ok 2240 # SKIP Streaming SVE set FPSIMD get SVE for VL 736
3968 22:58:22.431612 # ok 2241 Set Streaming SVE VL 752
3969 22:58:22.431709 # ok 2242 # SKIP Streaming SVE set SVE get SVE for VL 752
3970 22:58:22.432035 # ok 2243 # SKIP Streaming SVE set SVE get FPSIMD for VL 752
3971 22:58:22.432148 # ok 2244 # SKIP Streaming SVE set FPSIMD get SVE for VL 752
3972 22:58:22.432434 # ok 2245 Set Streaming SVE VL 768
3973 22:58:22.432533 # ok 2246 # SKIP Streaming SVE set SVE get SVE for VL 768
3974 22:58:22.432632 # ok 2247 # SKIP Streaming SVE set SVE get FPSIMD for VL 768
3975 22:58:22.432730 # ok 2248 # SKIP Streaming SVE set FPSIMD get SVE for VL 768
3976 22:58:22.432830 # ok 2249 Set Streaming SVE VL 784
3977 22:58:22.432927 # ok 2250 # SKIP Streaming SVE set SVE get SVE for VL 784
3978 22:58:22.433270 # ok 2251 # SKIP Streaming SVE set SVE get FPSIMD for VL 784
3979 22:58:22.433370 # ok 2252 # SKIP Streaming SVE set FPSIMD get SVE for VL 784
3980 22:58:22.433531 # ok 2253 Set Streaming SVE VL 800
3981 22:58:22.433742 # ok 2254 # SKIP Streaming SVE set SVE get SVE for VL 800
3982 22:58:22.433839 # ok 2255 # SKIP Streaming SVE set SVE get FPSIMD for VL 800
3983 22:58:22.434290 # ok 2256 # SKIP Streaming SVE set FPSIMD get SVE for VL 800
3984 22:58:22.435123 # ok 2257 Set Streaming SVE VL 816
3985 22:58:22.435232 # ok 2258 # SKIP Streaming SVE set SVE get SVE for VL 816
3986 22:58:22.435353 # ok 2259 # SKIP Streaming SVE set SVE get FPSIMD for VL 816
3987 22:58:22.435572 # ok 2260 # SKIP Streaming SVE set FPSIMD get SVE for VL 816
3988 22:58:22.435668 # ok 2261 Set Streaming SVE VL 832
3989 22:58:22.435756 # ok 2262 # SKIP Streaming SVE set SVE get SVE for VL 832
3990 22:58:22.436172 # ok 2263 # SKIP Streaming SVE set SVE get FPSIMD for VL 832
3991 22:58:22.436276 # ok 2264 # SKIP Streaming SVE set FPSIMD get SVE for VL 832
3992 22:58:22.436368 # ok 2265 Set Streaming SVE VL 848
3993 22:58:22.436459 # ok 2266 # SKIP Streaming SVE set SVE get SVE for VL 848
3994 22:58:22.436549 # ok 2267 # SKIP Streaming SVE set SVE get FPSIMD for VL 848
3995 22:58:22.436636 # ok 2268 # SKIP Streaming SVE set FPSIMD get SVE for VL 848
3996 22:58:22.436719 # ok 2269 Set Streaming SVE VL 864
3997 22:58:22.436818 # ok 2270 # SKIP Streaming SVE set SVE get SVE for VL 864
3998 22:58:22.436903 # ok 2271 # SKIP Streaming SVE set SVE get FPSIMD for VL 864
3999 22:58:22.436986 # ok 2272 # SKIP Streaming SVE set FPSIMD get SVE for VL 864
4000 22:58:22.437068 # ok 2273 Set Streaming SVE VL 880
4001 22:58:22.437149 # ok 2274 # SKIP Streaming SVE set SVE get SVE for VL 880
4002 22:58:22.437247 # ok 2275 # SKIP Streaming SVE set SVE get FPSIMD for VL 880
4003 22:58:22.437334 # ok 2276 # SKIP Streaming SVE set FPSIMD get SVE for VL 880
4004 22:58:22.437418 # ok 2277 Set Streaming SVE VL 896
4005 22:58:22.437518 # ok 2278 # SKIP Streaming SVE set SVE get SVE for VL 896
4006 22:58:22.443493 # ok 2279 # SKIP Streaming SVE set SVE get FPSIMD for VL 896
4007 22:58:22.443884 # ok 2280 # SKIP Streaming SVE set FPSIMD get SVE for VL 896
4008 22:58:22.444059 # ok 2281 Set Streaming SVE VL 912
4009 22:58:22.444164 # ok 2282 # SKIP Streaming SVE set SVE get SVE for VL 912
4010 22:58:22.444288 # ok 2283 # SKIP Streaming SVE set SVE get FPSIMD for VL 912
4011 22:58:22.444391 # ok 2284 # SKIP Streaming SVE set FPSIMD get SVE for VL 912
4012 22:58:22.444495 # ok 2285 Set Streaming SVE VL 928
4013 22:58:22.444613 # ok 2286 # SKIP Streaming SVE set SVE get SVE for VL 928
4014 22:58:22.444927 # ok 2287 # SKIP Streaming SVE set SVE get FPSIMD for VL 928
4015 22:58:22.445037 # ok 2288 # SKIP Streaming SVE set FPSIMD get SVE for VL 928
4016 22:58:22.445136 # ok 2289 Set Streaming SVE VL 944
4017 22:58:22.445238 # ok 2290 # SKIP Streaming SVE set SVE get SVE for VL 944
4018 22:58:22.445333 # ok 2291 # SKIP Streaming SVE set SVE get FPSIMD for VL 944
4019 22:58:22.445641 # ok 2292 # SKIP Streaming SVE set FPSIMD get SVE for VL 944
4020 22:58:22.445748 # ok 2293 Set Streaming SVE VL 960
4021 22:58:22.445824 # ok 2294 # SKIP Streaming SVE set SVE get SVE for VL 960
4022 22:58:22.446103 # ok 2295 # SKIP Streaming SVE set SVE get FPSIMD for VL 960
4023 22:58:22.446258 # ok 2296 # SKIP Streaming SVE set FPSIMD get SVE for VL 960
4024 22:58:22.446380 # ok 2297 Set Streaming SVE VL 976
4025 22:58:22.446707 # ok 2298 # SKIP Streaming SVE set SVE get SVE for VL 976
4026 22:58:22.446810 # ok 2299 # SKIP Streaming SVE set SVE get FPSIMD for VL 976
4027 22:58:22.446918 # ok 2300 # SKIP Streaming SVE set FPSIMD get SVE for VL 976
4028 22:58:22.447027 # ok 2301 Set Streaming SVE VL 992
4029 22:58:22.447138 # ok 2302 # SKIP Streaming SVE set SVE get SVE for VL 992
4030 22:58:22.447391 # ok 2303 # SKIP Streaming SVE set SVE get FPSIMD for VL 992
4031 22:58:22.447497 # ok 2304 # SKIP Streaming SVE set FPSIMD get SVE for VL 992
4032 22:58:22.447606 # ok 2305 Set Streaming SVE VL 1008
4033 22:58:22.447712 # ok 2306 # SKIP Streaming SVE set SVE get SVE for VL 1008
4034 22:58:22.447838 # ok 2307 # SKIP Streaming SVE set SVE get FPSIMD for VL 1008
4035 22:58:22.448171 # ok 2308 # SKIP Streaming SVE set FPSIMD get SVE for VL 1008
4036 22:58:22.448276 # ok 2309 Set Streaming SVE VL 1024
4037 22:58:22.448383 # ok 2310 # SKIP Streaming SVE set SVE get SVE for VL 1024
4038 22:58:22.448695 # ok 2311 # SKIP Streaming SVE set SVE get FPSIMD for VL 1024
4039 22:58:22.448794 # ok 2312 # SKIP Streaming SVE set FPSIMD get SVE for VL 1024
4040 22:58:22.449075 # ok 2313 Set Streaming SVE VL 1040
4041 22:58:22.449160 # ok 2314 # SKIP Streaming SVE set SVE get SVE for VL 1040
4042 22:58:22.449237 # ok 2315 # SKIP Streaming SVE set SVE get FPSIMD for VL 1040
4043 22:58:22.449491 # ok 2316 # SKIP Streaming SVE set FPSIMD get SVE for VL 1040
4044 22:58:22.449560 # ok 2317 Set Streaming SVE VL 1056
4045 22:58:22.449817 # ok 2318 # SKIP Streaming SVE set SVE get SVE for VL 1056
4046 22:58:22.449896 # ok 2319 # SKIP Streaming SVE set SVE get FPSIMD for VL 1056
4047 22:58:22.450151 # ok 2320 # SKIP Streaming SVE set FPSIMD get SVE for VL 1056
4048 22:58:22.450244 # ok 2321 Set Streaming SVE VL 1072
4049 22:58:22.450328 # ok 2322 # SKIP Streaming SVE set SVE get SVE for VL 1072
4050 22:58:22.450580 # ok 2323 # SKIP Streaming SVE set SVE get FPSIMD for VL 1072
4051 22:58:22.450830 # ok 2324 # SKIP Streaming SVE set FPSIMD get SVE for VL 1072
4052 22:58:22.450913 # ok 2325 Set Streaming SVE VL 1088
4053 22:58:22.451166 # ok 2326 # SKIP Streaming SVE set SVE get SVE for VL 1088
4054 22:58:22.451234 # ok 2327 # SKIP Streaming SVE set SVE get FPSIMD for VL 1088
4055 22:58:22.451679 # ok 2328 # SKIP Streaming SVE set FPSIMD get SVE for VL 1088
4056 22:58:22.451751 # ok 2329 Set Streaming SVE VL 1104
4057 22:58:22.451993 # ok 2330 # SKIP Streaming SVE set SVE get SVE for VL 1104
4058 22:58:22.452063 # ok 2331 # SKIP Streaming SVE set SVE get FPSIMD for VL 1104
4059 22:58:22.452126 # ok 2332 # SKIP Streaming SVE set FPSIMD get SVE for VL 1104
4060 22:58:22.452199 # ok 2333 Set Streaming SVE VL 1120
4061 22:58:22.452277 # ok 2334 # SKIP Streaming SVE set SVE get SVE for VL 1120
4062 22:58:22.452522 # ok 2335 # SKIP Streaming SVE set SVE get FPSIMD for VL 1120
4063 22:58:22.452788 # ok 2336 # SKIP Streaming SVE set FPSIMD get SVE for VL 1120
4064 22:58:22.452859 # ok 2337 Set Streaming SVE VL 1136
4065 22:58:22.453104 # ok 2338 # SKIP Streaming SVE set SVE get SVE for VL 1136
4066 22:58:22.453174 # ok 2339 # SKIP Streaming SVE set SVE get FPSIMD for VL 1136
4067 22:58:22.453595 # ok 2340 # SKIP Streaming SVE set FPSIMD get SVE for VL 1136
4068 22:58:22.453674 # ok 2341 Set Streaming SVE VL 1152
4069 22:58:22.453750 # ok 2342 # SKIP Streaming SVE set SVE get SVE for VL 1152
4070 22:58:22.454408 # ok 2343 # SKIP Streaming SVE set SVE get FPSIMD for VL 1152
4071 22:58:22.454476 # ok 2344 # SKIP Streaming SVE set FPSIMD get SVE for VL 1152
4072 22:58:22.454538 # ok 2345 Set Streaming SVE VL 1168
4073 22:58:22.454775 # ok 2346 # SKIP Streaming SVE set SVE get SVE for VL 1168
4074 22:58:22.454842 # ok 2347 # SKIP Streaming SVE set SVE get FPSIMD for VL 1168
4075 22:58:22.455092 # ok 2348 # SKIP Streaming SVE set FPSIMD get SVE for VL 1168
4076 22:58:22.455161 # ok 2349 Set Streaming SVE VL 1184
4077 22:58:22.455247 # ok 2350 # SKIP Streaming SVE set SVE get SVE for VL 1184
4078 22:58:22.455349 # ok 2351 # SKIP Streaming SVE set SVE get FPSIMD for VL 1184
4079 22:58:22.455632 # ok 2352 # SKIP Streaming SVE set FPSIMD get SVE for VL 1184
4080 22:58:22.455710 # ok 2353 Set Streaming SVE VL 1200
4081 22:58:22.455961 # ok 2354 # SKIP Streaming SVE set SVE get SVE for VL 1200
4082 22:58:22.456042 # ok 2355 # SKIP Streaming SVE set SVE get FPSIMD for VL 1200
4083 22:58:22.456292 # ok 2356 # SKIP Streaming SVE set FPSIMD get SVE for VL 1200
4084 22:58:22.456360 # ok 2357 Set Streaming SVE VL 1216
4085 22:58:22.456606 # ok 2358 # SKIP Streaming SVE set SVE get SVE for VL 1216
4086 22:58:22.456853 # ok 2359 # SKIP Streaming SVE set SVE get FPSIMD for VL 1216
4087 22:58:22.456922 # ok 2360 # SKIP Streaming SVE set FPSIMD get SVE for VL 1216
4088 22:58:22.456988 # ok 2361 Set Streaming SVE VL 1232
4089 22:58:22.457062 # ok 2362 # SKIP Streaming SVE set SVE get SVE for VL 1232
4090 22:58:22.457315 # ok 2363 # SKIP Streaming SVE set SVE get FPSIMD for VL 1232
4091 22:58:22.457394 # ok 2364 # SKIP Streaming SVE set FPSIMD get SVE for VL 1232
4092 22:58:22.457469 # ok 2365 Set Streaming SVE VL 1248
4093 22:58:22.457676 # ok 2366 # SKIP Streaming SVE set SVE get SVE for VL 1248
4094 22:58:22.458288 # ok 2367 # SKIP Streaming SVE set SVE get FPSIMD for VL 1248
4095 22:58:22.458537 # ok 2368 # SKIP Streaming SVE set FPSIMD get SVE for VL 1248
4096 22:58:22.458604 # ok 2369 Set Streaming SVE VL 1264
4097 22:58:22.458669 # ok 2370 # SKIP Streaming SVE set SVE get SVE for VL 1264
4098 22:58:22.458919 # ok 2371 # SKIP Streaming SVE set SVE get FPSIMD for VL 1264
4099 22:58:22.458998 # ok 2372 # SKIP Streaming SVE set FPSIMD get SVE for VL 1264
4100 22:58:22.459073 # ok 2373 Set Streaming SVE VL 1280
4101 22:58:22.459324 # ok 2374 # SKIP Streaming SVE set SVE get SVE for VL 1280
4102 22:58:22.459402 # ok 2375 # SKIP Streaming SVE set SVE get FPSIMD for VL 1280
4103 22:58:22.459654 # ok 2376 # SKIP Streaming SVE set FPSIMD get SVE for VL 1280
4104 22:58:22.459732 # ok 2377 Set Streaming SVE VL 1296
4105 22:58:22.459996 # ok 2378 # SKIP Streaming SVE set SVE get SVE for VL 1296
4106 22:58:22.460091 # ok 2379 # SKIP Streaming SVE set SVE get FPSIMD for VL 1296
4107 22:58:22.460347 # ok 2380 # SKIP Streaming SVE set FPSIMD get SVE for VL 1296
4108 22:58:22.460434 # ok 2381 Set Streaming SVE VL 1312
4109 22:58:22.460510 # ok 2382 # SKIP Streaming SVE set SVE get SVE for VL 1312
4110 22:58:22.460761 # ok 2383 # SKIP Streaming SVE set SVE get FPSIMD for VL 1312
4111 22:58:22.460839 # ok 2384 # SKIP Streaming SVE set FPSIMD get SVE for VL 1312
4112 22:58:22.461092 # ok 2385 Set Streaming SVE VL 1328
4113 22:58:22.461170 # ok 2386 # SKIP Streaming SVE set SVE get SVE for VL 1328
4114 22:58:22.461437 # ok 2387 # SKIP Streaming SVE set SVE get FPSIMD for VL 1328
4115 22:58:22.461545 # ok 2388 # SKIP Streaming SVE set FPSIMD get SVE for VL 1328
4116 22:58:22.461630 # ok 2389 Set Streaming SVE VL 1344
4117 22:58:22.461931 # ok 2390 # SKIP Streaming SVE set SVE get SVE for VL 1344
4118 22:58:22.513454 # ok 2391 # SKIP Streaming SVE set SVE get FPSIMD for VL 1344
4119 22:58:22.513706 # ok 2392 # SKIP Streaming SVE set FPSIMD get SVE for VL 1344
4120 22:58:22.513798 # ok 2393 Set Streaming SVE VL 1360
4121 22:58:22.513884 # ok 2394 # SKIP Streaming SVE set SVE get SVE for VL 1360
4122 22:58:22.513969 # ok 2395 # SKIP Streaming SVE set SVE get FPSIMD for VL 1360
4123 22:58:22.514052 # ok 2396 # SKIP Streaming SVE set FPSIMD get SVE for VL 1360
4124 22:58:22.514136 # ok 2397 Set Streaming SVE VL 1376
4125 22:58:22.514218 # ok 2398 # SKIP Streaming SVE set SVE get SVE for VL 1376
4126 22:58:22.514301 # ok 2399 # SKIP Streaming SVE set SVE get FPSIMD for VL 1376
4127 22:58:22.514385 # ok 2400 # SKIP Streaming SVE set FPSIMD get SVE for VL 1376
4128 22:58:22.514473 # ok 2401 Set Streaming SVE VL 1392
4129 22:58:22.514558 # ok 2402 # SKIP Streaming SVE set SVE get SVE for VL 1392
4130 22:58:22.514641 # ok 2403 # SKIP Streaming SVE set SVE get FPSIMD for VL 1392
4131 22:58:22.514724 # ok 2404 # SKIP Streaming SVE set FPSIMD get SVE for VL 1392
4132 22:58:22.514808 # ok 2405 Set Streaming SVE VL 1408
4133 22:58:22.514891 # ok 2406 # SKIP Streaming SVE set SVE get SVE for VL 1408
4134 22:58:22.514974 # ok 2407 # SKIP Streaming SVE set SVE get FPSIMD for VL 1408
4135 22:58:22.515058 # ok 2408 # SKIP Streaming SVE set FPSIMD get SVE for VL 1408
4136 22:58:22.515142 # ok 2409 Set Streaming SVE VL 1424
4137 22:58:22.515226 # ok 2410 # SKIP Streaming SVE set SVE get SVE for VL 1424
4138 22:58:22.515309 # ok 2411 # SKIP Streaming SVE set SVE get FPSIMD for VL 1424
4139 22:58:22.515393 # ok 2412 # SKIP Streaming SVE set FPSIMD get SVE for VL 1424
4140 22:58:22.515476 # ok 2413 Set Streaming SVE VL 1440
4141 22:58:22.515559 # ok 2414 # SKIP Streaming SVE set SVE get SVE for VL 1440
4142 22:58:22.515643 # ok 2415 # SKIP Streaming SVE set SVE get FPSIMD for VL 1440
4143 22:58:22.515727 # ok 2416 # SKIP Streaming SVE set FPSIMD get SVE for VL 1440
4144 22:58:22.515810 # ok 2417 Set Streaming SVE VL 1456
4145 22:58:22.515894 # ok 2418 # SKIP Streaming SVE set SVE get SVE for VL 1456
4146 22:58:22.515977 # ok 2419 # SKIP Streaming SVE set SVE get FPSIMD for VL 1456
4147 22:58:22.516060 # ok 2420 # SKIP Streaming SVE set FPSIMD get SVE for VL 1456
4148 22:58:22.516143 # ok 2421 Set Streaming SVE VL 1472
4149 22:58:22.516226 # ok 2422 # SKIP Streaming SVE set SVE get SVE for VL 1472
4150 22:58:22.516309 # ok 2423 # SKIP Streaming SVE set SVE get FPSIMD for VL 1472
4151 22:58:22.516395 # ok 2424 # SKIP Streaming SVE set FPSIMD get SVE for VL 1472
4152 22:58:22.516478 # ok 2425 Set Streaming SVE VL 1488
4153 22:58:22.517416 # ok 2426 # SKIP Streaming SVE set SVE get SVE for VL 1488
4154 22:58:22.517564 # ok 2427 # SKIP Streaming SVE set SVE get FPSIMD for VL 1488
4155 22:58:22.517664 # ok 2428 # SKIP Streaming SVE set FPSIMD get SVE for VL 1488
4156 22:58:22.517751 # ok 2429 Set Streaming SVE VL 1504
4157 22:58:22.517835 # ok 2430 # SKIP Streaming SVE set SVE get SVE for VL 1504
4158 22:58:22.517919 # ok 2431 # SKIP Streaming SVE set SVE get FPSIMD for VL 1504
4159 22:58:22.518003 # ok 2432 # SKIP Streaming SVE set FPSIMD get SVE for VL 1504
4160 22:58:22.518086 # ok 2433 Set Streaming SVE VL 1520
4161 22:58:22.518170 # ok 2434 # SKIP Streaming SVE set SVE get SVE for VL 1520
4162 22:58:22.518254 # ok 2435 # SKIP Streaming SVE set SVE get FPSIMD for VL 1520
4163 22:58:22.518337 # ok 2436 # SKIP Streaming SVE set FPSIMD get SVE for VL 1520
4164 22:58:22.518420 # ok 2437 Set Streaming SVE VL 1536
4165 22:58:22.518506 # ok 2438 # SKIP Streaming SVE set SVE get SVE for VL 1536
4166 22:58:22.518588 # ok 2439 # SKIP Streaming SVE set SVE get FPSIMD for VL 1536
4167 22:58:22.518671 # ok 2440 # SKIP Streaming SVE set FPSIMD get SVE for VL 1536
4168 22:58:22.518754 # ok 2441 Set Streaming SVE VL 1552
4169 22:58:22.518837 # ok 2442 # SKIP Streaming SVE set SVE get SVE for VL 1552
4170 22:58:22.518919 # ok 2443 # SKIP Streaming SVE set SVE get FPSIMD for VL 1552
4171 22:58:22.519001 # ok 2444 # SKIP Streaming SVE set FPSIMD get SVE for VL 1552
4172 22:58:22.519084 # ok 2445 Set Streaming SVE VL 1568
4173 22:58:22.519166 # ok 2446 # SKIP Streaming SVE set SVE get SVE for VL 1568
4174 22:58:22.519249 # ok 2447 # SKIP Streaming SVE set SVE get FPSIMD for VL 1568
4175 22:58:22.519331 # ok 2448 # SKIP Streaming SVE set FPSIMD get SVE for VL 1568
4176 22:58:22.519413 # ok 2449 Set Streaming SVE VL 1584
4177 22:58:22.519500 # ok 2450 # SKIP Streaming SVE set SVE get SVE for VL 1584
4178 22:58:22.519583 # ok 2451 # SKIP Streaming SVE set SVE get FPSIMD for VL 1584
4179 22:58:22.519665 # ok 2452 # SKIP Streaming SVE set FPSIMD get SVE for VL 1584
4180 22:58:22.519748 # ok 2453 Set Streaming SVE VL 1600
4181 22:58:22.519830 # ok 2454 # SKIP Streaming SVE set SVE get SVE for VL 1600
4182 22:58:22.519913 # ok 2455 # SKIP Streaming SVE set SVE get FPSIMD for VL 1600
4183 22:58:22.519995 # ok 2456 # SKIP Streaming SVE set FPSIMD get SVE for VL 1600
4184 22:58:22.520078 # ok 2457 Set Streaming SVE VL 1616
4185 22:58:22.520161 # ok 2458 # SKIP Streaming SVE set SVE get SVE for VL 1616
4186 22:58:22.520243 # ok 2459 # SKIP Streaming SVE set SVE get FPSIMD for VL 1616
4187 22:58:22.520326 # ok 2460 # SKIP Streaming SVE set FPSIMD get SVE for VL 1616
4188 22:58:22.523927 # ok 2461 Set Streaming SVE VL 1632
4189 22:58:22.524090 # ok 2462 # SKIP Streaming SVE set SVE get SVE for VL 1632
4190 22:58:22.524180 # ok 2463 # SKIP Streaming SVE set SVE get FPSIMD for VL 1632
4191 22:58:22.524265 # ok 2464 # SKIP Streaming SVE set FPSIMD get SVE for VL 1632
4192 22:58:22.524350 # ok 2465 Set Streaming SVE VL 1648
4193 22:58:22.524434 # ok 2466 # SKIP Streaming SVE set SVE get SVE for VL 1648
4194 22:58:22.524517 # ok 2467 # SKIP Streaming SVE set SVE get FPSIMD for VL 1648
4195 22:58:22.524602 # ok 2468 # SKIP Streaming SVE set FPSIMD get SVE for VL 1648
4196 22:58:22.524687 # ok 2469 Set Streaming SVE VL 1664
4197 22:58:22.524771 # ok 2470 # SKIP Streaming SVE set SVE get SVE for VL 1664
4198 22:58:22.524855 # ok 2471 # SKIP Streaming SVE set SVE get FPSIMD for VL 1664
4199 22:58:22.524939 # ok 2472 # SKIP Streaming SVE set FPSIMD get SVE for VL 1664
4200 22:58:22.525022 # ok 2473 Set Streaming SVE VL 1680
4201 22:58:22.525105 # ok 2474 # SKIP Streaming SVE set SVE get SVE for VL 1680
4202 22:58:22.525188 # ok 2475 # SKIP Streaming SVE set SVE get FPSIMD for VL 1680
4203 22:58:22.525272 # ok 2476 # SKIP Streaming SVE set FPSIMD get SVE for VL 1680
4204 22:58:22.525743 # ok 2477 Set Streaming SVE VL 1696
4205 22:58:22.525839 # ok 2478 # SKIP Streaming SVE set SVE get SVE for VL 1696
4206 22:58:22.525928 # ok 2479 # SKIP Streaming SVE set SVE get FPSIMD for VL 1696
4207 22:58:22.526013 # ok 2480 # SKIP Streaming SVE set FPSIMD get SVE for VL 1696
4208 22:58:22.526096 # ok 2481 Set Streaming SVE VL 1712
4209 22:58:22.526179 # ok 2482 # SKIP Streaming SVE set SVE get SVE for VL 1712
4210 22:58:22.526262 # ok 2483 # SKIP Streaming SVE set SVE get FPSIMD for VL 1712
4211 22:58:22.526345 # ok 2484 # SKIP Streaming SVE set FPSIMD get SVE for VL 1712
4212 22:58:22.526429 # ok 2485 Set Streaming SVE VL 1728
4213 22:58:22.526517 # ok 2486 # SKIP Streaming SVE set SVE get SVE for VL 1728
4214 22:58:22.526600 # ok 2487 # SKIP Streaming SVE set SVE get FPSIMD for VL 1728
4215 22:58:22.526683 # ok 2488 # SKIP Streaming SVE set FPSIMD get SVE for VL 1728
4216 22:58:22.526766 # ok 2489 Set Streaming SVE VL 1744
4217 22:58:22.526848 # ok 2490 # SKIP Streaming SVE set SVE get SVE for VL 1744
4218 22:58:22.526931 # ok 2491 # SKIP Streaming SVE set SVE get FPSIMD for VL 1744
4219 22:58:22.527013 # ok 2492 # SKIP Streaming SVE set FPSIMD get SVE for VL 1744
4220 22:58:22.527096 # ok 2493 Set Streaming SVE VL 1760
4221 22:58:22.527179 # ok 2494 # SKIP Streaming SVE set SVE get SVE for VL 1760
4222 22:58:22.527261 # ok 2495 # SKIP Streaming SVE set SVE get FPSIMD for VL 1760
4223 22:58:22.527716 # ok 2496 # SKIP Streaming SVE set FPSIMD get SVE for VL 1760
4224 22:58:22.527823 # ok 2497 Set Streaming SVE VL 1776
4225 22:58:22.527910 # ok 2498 # SKIP Streaming SVE set SVE get SVE for VL 1776
4226 22:58:22.527995 # ok 2499 # SKIP Streaming SVE set SVE get FPSIMD for VL 1776
4227 22:58:22.528080 # ok 2500 # SKIP Streaming SVE set FPSIMD get SVE for VL 1776
4228 22:58:22.528164 # ok 2501 Set Streaming SVE VL 1792
4229 22:58:22.528247 # ok 2502 # SKIP Streaming SVE set SVE get SVE for VL 1792
4230 22:58:22.528331 # ok 2503 # SKIP Streaming SVE set SVE get FPSIMD for VL 1792
4231 22:58:22.528414 # ok 2504 # SKIP Streaming SVE set FPSIMD get SVE for VL 1792
4232 22:58:22.528498 # ok 2505 Set Streaming SVE VL 1808
4233 22:58:22.528581 # ok 2506 # SKIP Streaming SVE set SVE get SVE for VL 1808
4234 22:58:22.528665 # ok 2507 # SKIP Streaming SVE set SVE get FPSIMD for VL 1808
4235 22:58:22.528748 # ok 2508 # SKIP Streaming SVE set FPSIMD get SVE for VL 1808
4236 22:58:22.528832 # ok 2509 Set Streaming SVE VL 1824
4237 22:58:22.528916 # ok 2510 # SKIP Streaming SVE set SVE get SVE for VL 1824
4238 22:58:22.529000 # ok 2511 # SKIP Streaming SVE set SVE get FPSIMD for VL 1824
4239 22:58:22.529084 # ok 2512 # SKIP Streaming SVE set FPSIMD get SVE for VL 1824
4240 22:58:22.529168 # ok 2513 Set Streaming SVE VL 1840
4241 22:58:22.529251 # ok 2514 # SKIP Streaming SVE set SVE get SVE for VL 1840
4242 22:58:22.529832 # ok 2515 # SKIP Streaming SVE set SVE get FPSIMD for VL 1840
4243 22:58:22.529937 # ok 2516 # SKIP Streaming SVE set FPSIMD get SVE for VL 1840
4244 22:58:22.530022 # ok 2517 Set Streaming SVE VL 1856
4245 22:58:22.530106 # ok 2518 # SKIP Streaming SVE set SVE get SVE for VL 1856
4246 22:58:22.530189 # ok 2519 # SKIP Streaming SVE set SVE get FPSIMD for VL 1856
4247 22:58:22.530273 # ok 2520 # SKIP Streaming SVE set FPSIMD get SVE for VL 1856
4248 22:58:22.530357 # ok 2521 Set Streaming SVE VL 1872
4249 22:58:22.530440 # ok 2522 # SKIP Streaming SVE set SVE get SVE for VL 1872
4250 22:58:22.530526 # ok 2523 # SKIP Streaming SVE set SVE get FPSIMD for VL 1872
4251 22:58:22.530610 # ok 2524 # SKIP Streaming SVE set FPSIMD get SVE for VL 1872
4252 22:58:22.530692 # ok 2525 Set Streaming SVE VL 1888
4253 22:58:22.530775 # ok 2526 # SKIP Streaming SVE set SVE get SVE for VL 1888
4254 22:58:22.530857 # ok 2527 # SKIP Streaming SVE set SVE get FPSIMD for VL 1888
4255 22:58:22.530940 # ok 2528 # SKIP Streaming SVE set FPSIMD get SVE for VL 1888
4256 22:58:22.531023 # ok 2529 Set Streaming SVE VL 1904
4257 22:58:22.531106 # ok 2530 # SKIP Streaming SVE set SVE get SVE for VL 1904
4258 22:58:22.531536 # ok 2531 # SKIP Streaming SVE set SVE get FPSIMD for VL 1904
4259 22:58:22.531643 # ok 2532 # SKIP Streaming SVE set FPSIMD get SVE for VL 1904
4260 22:58:22.531731 # ok 2533 Set Streaming SVE VL 1920
4261 22:58:22.531816 # ok 2534 # SKIP Streaming SVE set SVE get SVE for VL 1920
4262 22:58:22.531900 # ok 2535 # SKIP Streaming SVE set SVE get FPSIMD for VL 1920
4263 22:58:22.531982 # ok 2536 # SKIP Streaming SVE set FPSIMD get SVE for VL 1920
4264 22:58:22.532066 # ok 2537 Set Streaming SVE VL 1936
4265 22:58:22.532149 # ok 2538 # SKIP Streaming SVE set SVE get SVE for VL 1936
4266 22:58:22.532232 # ok 2539 # SKIP Streaming SVE set SVE get FPSIMD for VL 1936
4267 22:58:22.532315 # ok 2540 # SKIP Streaming SVE set FPSIMD get SVE for VL 1936
4268 22:58:22.532398 # ok 2541 Set Streaming SVE VL 1952
4269 22:58:22.532482 # ok 2542 # SKIP Streaming SVE set SVE get SVE for VL 1952
4270 22:58:22.532567 # ok 2543 # SKIP Streaming SVE set SVE get FPSIMD for VL 1952
4271 22:58:22.532651 # ok 2544 # SKIP Streaming SVE set FPSIMD get SVE for VL 1952
4272 22:58:22.532734 # ok 2545 Set Streaming SVE VL 1968
4273 22:58:22.532817 # ok 2546 # SKIP Streaming SVE set SVE get SVE for VL 1968
4274 22:58:22.532900 # ok 2547 # SKIP Streaming SVE set SVE get FPSIMD for VL 1968
4275 22:58:22.532983 # ok 2548 # SKIP Streaming SVE set FPSIMD get SVE for VL 1968
4276 22:58:22.533065 # ok 2549 Set Streaming SVE VL 1984
4277 22:58:22.533148 # ok 2550 # SKIP Streaming SVE set SVE get SVE for VL 1984
4278 22:58:22.533232 # ok 2551 # SKIP Streaming SVE set SVE get FPSIMD for VL 1984
4279 22:58:22.533315 # ok 2552 # SKIP Streaming SVE set FPSIMD get SVE for VL 1984
4280 22:58:22.533398 # ok 2553 Set Streaming SVE VL 2000
4281 22:58:22.533936 # ok 2554 # SKIP Streaming SVE set SVE get SVE for VL 2000
4282 22:58:22.534028 # ok 2555 # SKIP Streaming SVE set SVE get FPSIMD for VL 2000
4283 22:58:22.534112 # ok 2556 # SKIP Streaming SVE set FPSIMD get SVE for VL 2000
4284 22:58:22.534196 # ok 2557 Set Streaming SVE VL 2016
4285 22:58:22.534279 # ok 2558 # SKIP Streaming SVE set SVE get SVE for VL 2016
4286 22:58:22.534362 # ok 2559 # SKIP Streaming SVE set SVE get FPSIMD for VL 2016
4287 22:58:22.534446 # ok 2560 # SKIP Streaming SVE set FPSIMD get SVE for VL 2016
4288 22:58:22.534529 # ok 2561 Set Streaming SVE VL 2032
4289 22:58:22.534612 # ok 2562 # SKIP Streaming SVE set SVE get SVE for VL 2032
4290 22:58:22.534695 # ok 2563 # SKIP Streaming SVE set SVE get FPSIMD for VL 2032
4291 22:58:22.534778 # ok 2564 # SKIP Streaming SVE set FPSIMD get SVE for VL 2032
4292 22:58:22.534862 # ok 2565 Set Streaming SVE VL 2048
4293 22:58:22.534945 # ok 2566 # SKIP Streaming SVE set SVE get SVE for VL 2048
4294 22:58:22.535323 # ok 2567 # SKIP Streaming SVE set SVE get FPSIMD for VL 2048
4295 22:58:22.535432 # ok 2568 # SKIP Streaming SVE set FPSIMD get SVE for VL 2048
4296 22:58:22.535519 # ok 2569 Set Streaming SVE VL 2064
4297 22:58:22.535603 # ok 2570 # SKIP Streaming SVE set SVE get SVE for VL 2064
4298 22:58:22.535688 # ok 2571 # SKIP Streaming SVE set SVE get FPSIMD for VL 2064
4299 22:58:22.535772 # ok 2572 # SKIP Streaming SVE set FPSIMD get SVE for VL 2064
4300 22:58:22.535855 # ok 2573 Set Streaming SVE VL 2080
4301 22:58:22.535938 # ok 2574 # SKIP Streaming SVE set SVE get SVE for VL 2080
4302 22:58:22.536022 # ok 2575 # SKIP Streaming SVE set SVE get FPSIMD for VL 2080
4303 22:58:22.536105 # ok 2576 # SKIP Streaming SVE set FPSIMD get SVE for VL 2080
4304 22:58:22.536188 # ok 2577 Set Streaming SVE VL 2096
4305 22:58:22.536272 # ok 2578 # SKIP Streaming SVE set SVE get SVE for VL 2096
4306 22:58:22.536356 # ok 2579 # SKIP Streaming SVE set SVE get FPSIMD for VL 2096
4307 22:58:22.536440 # ok 2580 # SKIP Streaming SVE set FPSIMD get SVE for VL 2096
4308 22:58:22.536526 # ok 2581 Set Streaming SVE VL 2112
4309 22:58:22.536608 # ok 2582 # SKIP Streaming SVE set SVE get SVE for VL 2112
4310 22:58:22.536690 # ok 2583 # SKIP Streaming SVE set SVE get FPSIMD for VL 2112
4311 22:58:22.536774 # ok 2584 # SKIP Streaming SVE set FPSIMD get SVE for VL 2112
4312 22:58:22.536857 # ok 2585 Set Streaming SVE VL 2128
4313 22:58:22.536939 # ok 2586 # SKIP Streaming SVE set SVE get SVE for VL 2128
4314 22:58:22.537021 # ok 2587 # SKIP Streaming SVE set SVE get FPSIMD for VL 2128
4315 22:58:22.537104 # ok 2588 # SKIP Streaming SVE set FPSIMD get SVE for VL 2128
4316 22:58:22.537186 # ok 2589 Set Streaming SVE VL 2144
4317 22:58:22.537268 # ok 2590 # SKIP Streaming SVE set SVE get SVE for VL 2144
4318 22:58:22.537812 # ok 2591 # SKIP Streaming SVE set SVE get FPSIMD for VL 2144
4319 22:58:22.537907 # ok 2592 # SKIP Streaming SVE set FPSIMD get SVE for VL 2144
4320 22:58:22.537991 # ok 2593 Set Streaming SVE VL 2160
4321 22:58:22.538073 # ok 2594 # SKIP Streaming SVE set SVE get SVE for VL 2160
4322 22:58:22.538156 # ok 2595 # SKIP Streaming SVE set SVE get FPSIMD for VL 2160
4323 22:58:22.538238 # ok 2596 # SKIP Streaming SVE set FPSIMD get SVE for VL 2160
4324 22:58:22.538320 # ok 2597 Set Streaming SVE VL 2176
4325 22:58:22.538403 # ok 2598 # SKIP Streaming SVE set SVE get SVE for VL 2176
4326 22:58:22.538485 # ok 2599 # SKIP Streaming SVE set SVE get FPSIMD for VL 2176
4327 22:58:22.538568 # ok 2600 # SKIP Streaming SVE set FPSIMD get SVE for VL 2176
4328 22:58:22.538650 # ok 2601 Set Streaming SVE VL 2192
4329 22:58:22.539004 # ok 2602 # SKIP Streaming SVE set SVE get SVE for VL 2192
4330 22:58:22.539111 # ok 2603 # SKIP Streaming SVE set SVE get FPSIMD for VL 2192
4331 22:58:22.539198 # ok 2604 # SKIP Streaming SVE set FPSIMD get SVE for VL 2192
4332 22:58:22.539282 # ok 2605 Set Streaming SVE VL 2208
4333 22:58:22.539366 # ok 2606 # SKIP Streaming SVE set SVE get SVE for VL 2208
4334 22:58:22.539449 # ok 2607 # SKIP Streaming SVE set SVE get FPSIMD for VL 2208
4335 22:58:22.539540 # ok 2608 # SKIP Streaming SVE set FPSIMD get SVE for VL 2208
4336 22:58:22.539623 # ok 2609 Set Streaming SVE VL 2224
4337 22:58:22.539707 # ok 2610 # SKIP Streaming SVE set SVE get SVE for VL 2224
4338 22:58:22.539790 # ok 2611 # SKIP Streaming SVE set SVE get FPSIMD for VL 2224
4339 22:58:22.539874 # ok 2612 # SKIP Streaming SVE set FPSIMD get SVE for VL 2224
4340 22:58:22.539957 # ok 2613 Set Streaming SVE VL 2240
4341 22:58:22.540041 # ok 2614 # SKIP Streaming SVE set SVE get SVE for VL 2240
4342 22:58:22.540124 # ok 2615 # SKIP Streaming SVE set SVE get FPSIMD for VL 2240
4343 22:58:22.540208 # ok 2616 # SKIP Streaming SVE set FPSIMD get SVE for VL 2240
4344 22:58:22.542474 # ok 2617 Set Streaming SVE VL 2256
4345 22:58:22.542619 # ok 2618 # SKIP Streaming SVE set SVE get SVE for VL 2256
4346 22:58:22.542706 # ok 2619 # SKIP Streaming SVE set SVE get FPSIMD for VL 2256
4347 22:58:22.542791 # ok 2620 # SKIP Streaming SVE set FPSIMD get SVE for VL 2256
4348 22:58:22.542875 # ok 2621 Set Streaming SVE VL 2272
4349 22:58:22.542958 # ok 2622 # SKIP Streaming SVE set SVE get SVE for VL 2272
4350 22:58:22.543041 # ok 2623 # SKIP Streaming SVE set SVE get FPSIMD for VL 2272
4351 22:58:22.543125 # ok 2624 # SKIP Streaming SVE set FPSIMD get SVE for VL 2272
4352 22:58:22.543208 # ok 2625 Set Streaming SVE VL 2288
4353 22:58:22.543291 # ok 2626 # SKIP Streaming SVE set SVE get SVE for VL 2288
4354 22:58:22.543374 # ok 2627 # SKIP Streaming SVE set SVE get FPSIMD for VL 2288
4355 22:58:22.543458 # ok 2628 # SKIP Streaming SVE set FPSIMD get SVE for VL 2288
4356 22:58:22.543544 # ok 2629 Set Streaming SVE VL 2304
4357 22:58:22.543626 # ok 2630 # SKIP Streaming SVE set SVE get SVE for VL 2304
4358 22:58:22.543709 # ok 2631 # SKIP Streaming SVE set SVE get FPSIMD for VL 2304
4359 22:58:22.543792 # ok 2632 # SKIP Streaming SVE set FPSIMD get SVE for VL 2304
4360 22:58:22.543875 # ok 2633 Set Streaming SVE VL 2320
4361 22:58:22.543957 # ok 2634 # SKIP Streaming SVE set SVE get SVE for VL 2320
4362 22:58:22.544040 # ok 2635 # SKIP Streaming SVE set SVE get FPSIMD for VL 2320
4363 22:58:22.544123 # ok 2636 # SKIP Streaming SVE set FPSIMD get SVE for VL 2320
4364 22:58:22.546721 # ok 2637 Set Streaming SVE VL 2336
4365 22:58:22.546887 # ok 2638 # SKIP Streaming SVE set SVE get SVE for VL 2336
4366 22:58:22.546976 # ok 2639 # SKIP Streaming SVE set SVE get FPSIMD for VL 2336
4367 22:58:22.547062 # ok 2640 # SKIP Streaming SVE set FPSIMD get SVE for VL 2336
4368 22:58:22.547146 # ok 2641 Set Streaming SVE VL 2352
4369 22:58:22.547230 # ok 2642 # SKIP Streaming SVE set SVE get SVE for VL 2352
4370 22:58:22.547314 # ok 2643 # SKIP Streaming SVE set SVE get FPSIMD for VL 2352
4371 22:58:22.547398 # ok 2644 # SKIP Streaming SVE set FPSIMD get SVE for VL 2352
4372 22:58:22.547482 # ok 2645 Set Streaming SVE VL 2368
4373 22:58:22.547573 # ok 2646 # SKIP Streaming SVE set SVE get SVE for VL 2368
4374 22:58:22.547657 # ok 2647 # SKIP Streaming SVE set SVE get FPSIMD for VL 2368
4375 22:58:22.547740 # ok 2648 # SKIP Streaming SVE set FPSIMD get SVE for VL 2368
4376 22:58:22.547824 # ok 2649 Set Streaming SVE VL 2384
4377 22:58:22.547906 # ok 2650 # SKIP Streaming SVE set SVE get SVE for VL 2384
4378 22:58:22.547990 # ok 2651 # SKIP Streaming SVE set SVE get FPSIMD for VL 2384
4379 22:58:22.548073 # ok 2652 # SKIP Streaming SVE set FPSIMD get SVE for VL 2384
4380 22:58:22.548156 # ok 2653 Set Streaming SVE VL 2400
4381 22:58:22.548240 # ok 2654 # SKIP Streaming SVE set SVE get SVE for VL 2400
4382 22:58:22.548323 # ok 2655 # SKIP Streaming SVE set SVE get FPSIMD for VL 2400
4383 22:58:22.548407 # ok 2656 # SKIP Streaming SVE set FPSIMD get SVE for VL 2400
4384 22:58:22.548490 # ok 2657 Set Streaming SVE VL 2416
4385 22:58:22.548574 # ok 2658 # SKIP Streaming SVE set SVE get SVE for VL 2416
4386 22:58:22.548658 # ok 2659 # SKIP Streaming SVE set SVE get FPSIMD for VL 2416
4387 22:58:22.548741 # ok 2660 # SKIP Streaming SVE set FPSIMD get SVE for VL 2416
4388 22:58:22.548824 # ok 2661 Set Streaming SVE VL 2432
4389 22:58:22.548907 # ok 2662 # SKIP Streaming SVE set SVE get SVE for VL 2432
4390 22:58:22.548990 # ok 2663 # SKIP Streaming SVE set SVE get FPSIMD for VL 2432
4391 22:58:22.549074 # ok 2664 # SKIP Streaming SVE set FPSIMD get SVE for VL 2432
4392 22:58:22.549158 # ok 2665 Set Streaming SVE VL 2448
4393 22:58:22.549241 # ok 2666 # SKIP Streaming SVE set SVE get SVE for VL 2448
4394 22:58:22.549325 # ok 2667 # SKIP Streaming SVE set SVE get FPSIMD for VL 2448
4395 22:58:22.549408 # ok 2668 # SKIP Streaming SVE set FPSIMD get SVE for VL 2448
4396 22:58:22.549491 # ok 2669 Set Streaming SVE VL 2464
4397 22:58:22.549576 # ok 2670 # SKIP Streaming SVE set SVE get SVE for VL 2464
4398 22:58:22.549690 # ok 2671 # SKIP Streaming SVE set SVE get FPSIMD for VL 2464
4399 22:58:22.550012 # ok 2672 # SKIP Streaming SVE set FPSIMD get SVE for VL 2464
4400 22:58:22.550104 # ok 2673 Set Streaming SVE VL 2480
4401 22:58:22.550189 # ok 2674 # SKIP Streaming SVE set SVE get SVE for VL 2480
4402 22:58:22.550272 # ok 2675 # SKIP Streaming SVE set SVE get FPSIMD for VL 2480
4403 22:58:22.550354 # ok 2676 # SKIP Streaming SVE set FPSIMD get SVE for VL 2480
4404 22:58:22.550439 # ok 2677 Set Streaming SVE VL 2496
4405 22:58:22.550526 # ok 2678 # SKIP Streaming SVE set SVE get SVE for VL 2496
4406 22:58:22.550615 # ok 2679 # SKIP Streaming SVE set SVE get FPSIMD for VL 2496
4407 22:58:22.550700 # ok 2680 # SKIP Streaming SVE set FPSIMD get SVE for VL 2496
4408 22:58:22.550785 # ok 2681 Set Streaming SVE VL 2512
4409 22:58:22.550869 # ok 2682 # SKIP Streaming SVE set SVE get SVE for VL 2512
4410 22:58:22.550954 # ok 2683 # SKIP Streaming SVE set SVE get FPSIMD for VL 2512
4411 22:58:22.551040 # ok 2684 # SKIP Streaming SVE set FPSIMD get SVE for VL 2512
4412 22:58:22.551125 # ok 2685 Set Streaming SVE VL 2528
4413 22:58:22.551209 # ok 2686 # SKIP Streaming SVE set SVE get SVE for VL 2528
4414 22:58:22.551293 # ok 2687 # SKIP Streaming SVE set SVE get FPSIMD for VL 2528
4415 22:58:22.551378 # ok 2688 # SKIP Streaming SVE set FPSIMD get SVE for VL 2528
4416 22:58:22.551462 # ok 2689 Set Streaming SVE VL 2544
4417 22:58:22.551547 # ok 2690 # SKIP Streaming SVE set SVE get SVE for VL 2544
4418 22:58:22.551631 # ok 2691 # SKIP Streaming SVE set SVE get FPSIMD for VL 2544
4419 22:58:22.551717 # ok 2692 # SKIP Streaming SVE set FPSIMD get SVE for VL 2544
4420 22:58:22.551802 # ok 2693 Set Streaming SVE VL 2560
4421 22:58:22.551887 # ok 2694 # SKIP Streaming SVE set SVE get SVE for VL 2560
4422 22:58:22.551973 # ok 2695 # SKIP Streaming SVE set SVE get FPSIMD for VL 2560
4423 22:58:22.552058 # ok 2696 # SKIP Streaming SVE set FPSIMD get SVE for VL 2560
4424 22:58:22.552144 # ok 2697 Set Streaming SVE VL 2576
4425 22:58:22.552228 # ok 2698 # SKIP Streaming SVE set SVE get SVE for VL 2576
4426 22:58:22.552312 # ok 2699 # SKIP Streaming SVE set SVE get FPSIMD for VL 2576
4427 22:58:22.552397 # ok 2700 # SKIP Streaming SVE set FPSIMD get SVE for VL 2576
4428 22:58:22.552482 # ok 2701 Set Streaming SVE VL 2592
4429 22:58:22.552567 # ok 2702 # SKIP Streaming SVE set SVE get SVE for VL 2592
4430 22:58:22.552651 # ok 2703 # SKIP Streaming SVE set SVE get FPSIMD for VL 2592
4431 22:58:22.552736 # ok 2704 # SKIP Streaming SVE set FPSIMD get SVE for VL 2592
4432 22:58:22.552821 # ok 2705 Set Streaming SVE VL 2608
4433 22:58:22.552905 # ok 2706 # SKIP Streaming SVE set SVE get SVE for VL 2608
4434 22:58:22.552990 # ok 2707 # SKIP Streaming SVE set SVE get FPSIMD for VL 2608
4435 22:58:22.553290 # ok 2708 # SKIP Streaming SVE set FPSIMD get SVE for VL 2608
4436 22:58:22.553382 # ok 2709 Set Streaming SVE VL 2624
4437 22:58:22.553466 # ok 2710 # SKIP Streaming SVE set SVE get SVE for VL 2624
4438 22:58:22.553551 # ok 2711 # SKIP Streaming SVE set SVE get FPSIMD for VL 2624
4439 22:58:22.553637 # ok 2712 # SKIP Streaming SVE set FPSIMD get SVE for VL 2624
4440 22:58:22.553736 # ok 2713 Set Streaming SVE VL 2640
4441 22:58:22.553822 # ok 2714 # SKIP Streaming SVE set SVE get SVE for VL 2640
4442 22:58:22.553907 # ok 2715 # SKIP Streaming SVE set SVE get FPSIMD for VL 2640
4443 22:58:22.553992 # ok 2716 # SKIP Streaming SVE set FPSIMD get SVE for VL 2640
4444 22:58:22.554077 # ok 2717 Set Streaming SVE VL 2656
4445 22:58:22.554162 # ok 2718 # SKIP Streaming SVE set SVE get SVE for VL 2656
4446 22:58:22.554247 # ok 2719 # SKIP Streaming SVE set SVE get FPSIMD for VL 2656
4447 22:58:22.554331 # ok 2720 # SKIP Streaming SVE set FPSIMD get SVE for VL 2656
4448 22:58:22.554416 # ok 2721 Set Streaming SVE VL 2672
4449 22:58:22.554500 # ok 2722 # SKIP Streaming SVE set SVE get SVE for VL 2672
4450 22:58:22.554585 # ok 2723 # SKIP Streaming SVE set SVE get FPSIMD for VL 2672
4451 22:58:22.554670 # ok 2724 # SKIP Streaming SVE set FPSIMD get SVE for VL 2672
4452 22:58:22.554755 # ok 2725 Set Streaming SVE VL 2688
4453 22:58:22.554840 # ok 2726 # SKIP Streaming SVE set SVE get SVE for VL 2688
4454 22:58:22.554925 # ok 2727 # SKIP Streaming SVE set SVE get FPSIMD for VL 2688
4455 22:58:22.555010 # ok 2728 # SKIP Streaming SVE set FPSIMD get SVE for VL 2688
4456 22:58:22.555095 # ok 2729 Set Streaming SVE VL 2704
4457 22:58:22.555179 # ok 2730 # SKIP Streaming SVE set SVE get SVE for VL 2704
4458 22:58:22.555264 # ok 2731 # SKIP Streaming SVE set SVE get FPSIMD for VL 2704
4459 22:58:22.555349 # ok 2732 # SKIP Streaming SVE set FPSIMD get SVE for VL 2704
4460 22:58:22.555433 # ok 2733 Set Streaming SVE VL 2720
4461 22:58:22.555518 # ok 2734 # SKIP Streaming SVE set SVE get SVE for VL 2720
4462 22:58:22.555605 # ok 2735 # SKIP Streaming SVE set SVE get FPSIMD for VL 2720
4463 22:58:22.555689 # ok 2736 # SKIP Streaming SVE set FPSIMD get SVE for VL 2720
4464 22:58:22.555772 # ok 2737 Set Streaming SVE VL 2736
4465 22:58:22.555856 # ok 2738 # SKIP Streaming SVE set SVE get SVE for VL 2736
4466 22:58:22.555941 # ok 2739 # SKIP Streaming SVE set SVE get FPSIMD for VL 2736
4467 22:58:22.556024 # ok 2740 # SKIP Streaming SVE set FPSIMD get SVE for VL 2736
4468 22:58:22.556107 # ok 2741 Set Streaming SVE VL 2752
4469 22:58:22.556189 # ok 2742 # SKIP Streaming SVE set SVE get SVE for VL 2752
4470 22:58:22.556498 # ok 2743 # SKIP Streaming SVE set SVE get FPSIMD for VL 2752
4471 22:58:22.556600 # ok 2744 # SKIP Streaming SVE set FPSIMD get SVE for VL 2752
4472 22:58:22.556687 # ok 2745 Set Streaming SVE VL 2768
4473 22:58:22.556772 # ok 2746 # SKIP Streaming SVE set SVE get SVE for VL 2768
4474 22:58:22.556857 # ok 2747 # SKIP Streaming SVE set SVE get FPSIMD for VL 2768
4475 22:58:22.556942 # ok 2748 # SKIP Streaming SVE set FPSIMD get SVE for VL 2768
4476 22:58:22.557027 # ok 2749 Set Streaming SVE VL 2784
4477 22:58:22.557112 # ok 2750 # SKIP Streaming SVE set SVE get SVE for VL 2784
4478 22:58:22.557197 # ok 2751 # SKIP Streaming SVE set SVE get FPSIMD for VL 2784
4479 22:58:22.557283 # ok 2752 # SKIP Streaming SVE set FPSIMD get SVE for VL 2784
4480 22:58:22.557367 # ok 2753 Set Streaming SVE VL 2800
4481 22:58:22.557451 # ok 2754 # SKIP Streaming SVE set SVE get SVE for VL 2800
4482 22:58:22.557536 # ok 2755 # SKIP Streaming SVE set SVE get FPSIMD for VL 2800
4483 22:58:22.557624 # ok 2756 # SKIP Streaming SVE set FPSIMD get SVE for VL 2800
4484 22:58:22.557725 # ok 2757 Set Streaming SVE VL 2816
4485 22:58:22.557809 # ok 2758 # SKIP Streaming SVE set SVE get SVE for VL 2816
4486 22:58:22.557892 # ok 2759 # SKIP Streaming SVE set SVE get FPSIMD for VL 2816
4487 22:58:22.557975 # ok 2760 # SKIP Streaming SVE set FPSIMD get SVE for VL 2816
4488 22:58:22.558059 # ok 2761 Set Streaming SVE VL 2832
4489 22:58:22.558141 # ok 2762 # SKIP Streaming SVE set SVE get SVE for VL 2832
4490 22:58:22.558225 # ok 2763 # SKIP Streaming SVE set SVE get FPSIMD for VL 2832
4491 22:58:22.558308 # ok 2764 # SKIP Streaming SVE set FPSIMD get SVE for VL 2832
4492 22:58:22.558391 # ok 2765 Set Streaming SVE VL 2848
4493 22:58:22.558474 # ok 2766 # SKIP Streaming SVE set SVE get SVE for VL 2848
4494 22:58:22.558557 # ok 2767 # SKIP Streaming SVE set SVE get FPSIMD for VL 2848
4495 22:58:22.558641 # ok 2768 # SKIP Streaming SVE set FPSIMD get SVE for VL 2848
4496 22:58:22.558724 # ok 2769 Set Streaming SVE VL 2864
4497 22:58:22.558807 # ok 2770 # SKIP Streaming SVE set SVE get SVE for VL 2864
4498 22:58:22.558890 # ok 2771 # SKIP Streaming SVE set SVE get FPSIMD for VL 2864
4499 22:58:22.558973 # ok 2772 # SKIP Streaming SVE set FPSIMD get SVE for VL 2864
4500 22:58:22.559056 # ok 2773 Set Streaming SVE VL 2880
4501 22:58:22.559138 # ok 2774 # SKIP Streaming SVE set SVE get SVE for VL 2880
4502 22:58:22.559222 # ok 2775 # SKIP Streaming SVE set SVE get FPSIMD for VL 2880
4503 22:58:22.559305 # ok 2776 # SKIP Streaming SVE set FPSIMD get SVE for VL 2880
4504 22:58:22.559388 # ok 2777 Set Streaming SVE VL 2896
4505 22:58:22.559896 # ok 2778 # SKIP Streaming SVE set SVE get SVE for VL 2896
4506 22:58:22.560007 # ok 2779 # SKIP Streaming SVE set SVE get FPSIMD for VL 2896
4507 22:58:22.560094 # ok 2780 # SKIP Streaming SVE set FPSIMD get SVE for VL 2896
4508 22:58:22.560178 # ok 2781 Set Streaming SVE VL 2912
4509 22:58:22.560262 # ok 2782 # SKIP Streaming SVE set SVE get SVE for VL 2912
4510 22:58:22.560346 # ok 2783 # SKIP Streaming SVE set SVE get FPSIMD for VL 2912
4511 22:58:22.560430 # ok 2784 # SKIP Streaming SVE set FPSIMD get SVE for VL 2912
4512 22:58:22.560513 # ok 2785 Set Streaming SVE VL 2928
4513 22:58:22.560596 # ok 2786 # SKIP Streaming SVE set SVE get SVE for VL 2928
4514 22:58:22.560680 # ok 2787 # SKIP Streaming SVE set SVE get FPSIMD for VL 2928
4515 22:58:22.560764 # ok 2788 # SKIP Streaming SVE set FPSIMD get SVE for VL 2928
4516 22:58:22.560848 # ok 2789 Set Streaming SVE VL 2944
4517 22:58:22.560931 # ok 2790 # SKIP Streaming SVE set SVE get SVE for VL 2944
4518 22:58:22.561015 # ok 2791 # SKIP Streaming SVE set SVE get FPSIMD for VL 2944
4519 22:58:22.561098 # ok 2792 # SKIP Streaming SVE set FPSIMD get SVE for VL 2944
4520 22:58:22.561182 # ok 2793 Set Streaming SVE VL 2960
4521 22:58:22.561265 # ok 2794 # SKIP Streaming SVE set SVE get SVE for VL 2960
4522 22:58:22.561348 # ok 2795 # SKIP Streaming SVE set SVE get FPSIMD for VL 2960
4523 22:58:22.561429 # ok 2796 # SKIP Streaming SVE set FPSIMD get SVE for VL 2960
4524 22:58:22.561512 # ok 2797 Set Streaming SVE VL 2976
4525 22:58:22.561599 # ok 2798 # SKIP Streaming SVE set SVE get SVE for VL 2976
4526 22:58:22.561694 # ok 2799 # SKIP Streaming SVE set SVE get FPSIMD for VL 2976
4527 22:58:22.561782 # ok 2800 # SKIP Streaming SVE set FPSIMD get SVE for VL 2976
4528 22:58:22.561866 # ok 2801 Set Streaming SVE VL 2992
4529 22:58:22.561948 # ok 2802 # SKIP Streaming SVE set SVE get SVE for VL 2992
4530 22:58:22.562031 # ok 2803 # SKIP Streaming SVE set SVE get FPSIMD for VL 2992
4531 22:58:22.562114 # ok 2804 # SKIP Streaming SVE set FPSIMD get SVE for VL 2992
4532 22:58:22.562197 # ok 2805 Set Streaming SVE VL 3008
4533 22:58:22.562280 # ok 2806 # SKIP Streaming SVE set SVE get SVE for VL 3008
4534 22:58:22.562363 # ok 2807 # SKIP Streaming SVE set SVE get FPSIMD for VL 3008
4535 22:58:22.562446 # ok 2808 # SKIP Streaming SVE set FPSIMD get SVE for VL 3008
4536 22:58:22.562529 # ok 2809 Set Streaming SVE VL 3024
4537 22:58:22.562619 # ok 2810 # SKIP Streaming SVE set SVE get SVE for VL 3024
4538 22:58:22.562702 # ok 2811 # SKIP Streaming SVE set SVE get FPSIMD for VL 3024
4539 22:58:22.562785 # ok 2812 # SKIP Streaming SVE set FPSIMD get SVE for VL 3024
4540 22:58:22.563180 # ok 2813 Set Streaming SVE VL 3040
4541 22:58:22.563288 # ok 2814 # SKIP Streaming SVE set SVE get SVE for VL 3040
4542 22:58:22.563375 # ok 2815 # SKIP Streaming SVE set SVE get FPSIMD for VL 3040
4543 22:58:22.563459 # ok 2816 # SKIP Streaming SVE set FPSIMD get SVE for VL 3040
4544 22:58:22.563543 # ok 2817 Set Streaming SVE VL 3056
4545 22:58:22.563627 # ok 2818 # SKIP Streaming SVE set SVE get SVE for VL 3056
4546 22:58:22.563710 # ok 2819 # SKIP Streaming SVE set SVE get FPSIMD for VL 3056
4547 22:58:22.563794 # ok 2820 # SKIP Streaming SVE set FPSIMD get SVE for VL 3056
4548 22:58:22.563877 # ok 2821 Set Streaming SVE VL 3072
4549 22:58:22.563959 # ok 2822 # SKIP Streaming SVE set SVE get SVE for VL 3072
4550 22:58:22.564043 # ok 2823 # SKIP Streaming SVE set SVE get FPSIMD for VL 3072
4551 22:58:22.564126 # ok 2824 # SKIP Streaming SVE set FPSIMD get SVE for VL 3072
4552 22:58:22.564209 # ok 2825 Set Streaming SVE VL 3088
4553 22:58:22.564292 # ok 2826 # SKIP Streaming SVE set SVE get SVE for VL 3088
4554 22:58:22.564375 # ok 2827 # SKIP Streaming SVE set SVE get FPSIMD for VL 3088
4555 22:58:22.564459 # ok 2828 # SKIP Streaming SVE set FPSIMD get SVE for VL 3088
4556 22:58:22.564543 # ok 2829 Set Streaming SVE VL 3104
4557 22:58:22.564628 # ok 2830 # SKIP Streaming SVE set SVE get SVE for VL 3104
4558 22:58:22.564711 # ok 2831 # SKIP Streaming SVE set SVE get FPSIMD for VL 3104
4559 22:58:22.564794 # ok 2832 # SKIP Streaming SVE set FPSIMD get SVE for VL 3104
4560 22:58:22.564878 # ok 2833 Set Streaming SVE VL 3120
4561 22:58:22.564966 # ok 2834 # SKIP Streaming SVE set SVE get SVE for VL 3120
4562 22:58:22.565053 # ok 2835 # SKIP Streaming SVE set SVE get FPSIMD for VL 3120
4563 22:58:22.565136 # ok 2836 # SKIP Streaming SVE set FPSIMD get SVE for VL 3120
4564 22:58:22.565222 # ok 2837 Set Streaming SVE VL 3136
4565 22:58:22.565309 # ok 2838 # SKIP Streaming SVE set SVE get SVE for VL 3136
4566 22:58:22.565392 # ok 2839 # SKIP Streaming SVE set SVE get FPSIMD for VL 3136
4567 22:58:22.565473 # ok 2840 # SKIP Streaming SVE set FPSIMD get SVE for VL 3136
4568 22:58:22.565801 # ok 2841 Set Streaming SVE VL 3152
4569 22:58:22.565896 # ok 2842 # SKIP Streaming SVE set SVE get SVE for VL 3152
4570 22:58:22.565980 # ok 2843 # SKIP Streaming SVE set SVE get FPSIMD for VL 3152
4571 22:58:22.566063 # ok 2844 # SKIP Streaming SVE set FPSIMD get SVE for VL 3152
4572 22:58:22.566147 # ok 2845 Set Streaming SVE VL 3168
4573 22:58:22.566229 # ok 2846 # SKIP Streaming SVE set SVE get SVE for VL 3168
4574 22:58:22.566312 # ok 2847 # SKIP Streaming SVE set SVE get FPSIMD for VL 3168
4575 22:58:22.566621 # ok 2848 # SKIP Streaming SVE set FPSIMD get SVE for VL 3168
4576 22:58:22.566726 # ok 2849 Set Streaming SVE VL 3184
4577 22:58:22.566813 # ok 2850 # SKIP Streaming SVE set SVE get SVE for VL 3184
4578 22:58:22.566898 # ok 2851 # SKIP Streaming SVE set SVE get FPSIMD for VL 3184
4579 22:58:22.566981 # ok 2852 # SKIP Streaming SVE set FPSIMD get SVE for VL 3184
4580 22:58:22.567065 # ok 2853 Set Streaming SVE VL 3200
4581 22:58:22.567147 # ok 2854 # SKIP Streaming SVE set SVE get SVE for VL 3200
4582 22:58:22.567230 # ok 2855 # SKIP Streaming SVE set SVE get FPSIMD for VL 3200
4583 22:58:22.567313 # ok 2856 # SKIP Streaming SVE set FPSIMD get SVE for VL 3200
4584 22:58:22.567395 # ok 2857 Set Streaming SVE VL 3216
4585 22:58:22.567478 # ok 2858 # SKIP Streaming SVE set SVE get SVE for VL 3216
4586 22:58:22.567564 # ok 2859 # SKIP Streaming SVE set SVE get FPSIMD for VL 3216
4587 22:58:22.567652 # ok 2860 # SKIP Streaming SVE set FPSIMD get SVE for VL 3216
4588 22:58:22.567735 # ok 2861 Set Streaming SVE VL 3232
4589 22:58:22.567818 # ok 2862 # SKIP Streaming SVE set SVE get SVE for VL 3232
4590 22:58:22.567901 # ok 2863 # SKIP Streaming SVE set SVE get FPSIMD for VL 3232
4591 22:58:22.567985 # ok 2864 # SKIP Streaming SVE set FPSIMD get SVE for VL 3232
4592 22:58:22.568069 # ok 2865 Set Streaming SVE VL 3248
4593 22:58:22.568152 # ok 2866 # SKIP Streaming SVE set SVE get SVE for VL 3248
4594 22:58:22.568235 # ok 2867 # SKIP Streaming SVE set SVE get FPSIMD for VL 3248
4595 22:58:22.568319 # ok 2868 # SKIP Streaming SVE set FPSIMD get SVE for VL 3248
4596 22:58:22.568402 # ok 2869 Set Streaming SVE VL 3264
4597 22:58:22.568485 # ok 2870 # SKIP Streaming SVE set SVE get SVE for VL 3264
4598 22:58:22.568567 # ok 2871 # SKIP Streaming SVE set SVE get FPSIMD for VL 3264
4599 22:58:22.568651 # ok 2872 # SKIP Streaming SVE set FPSIMD get SVE for VL 3264
4600 22:58:22.568734 # ok 2873 Set Streaming SVE VL 3280
4601 22:58:22.568817 # ok 2874 # SKIP Streaming SVE set SVE get SVE for VL 3280
4602 22:58:22.568901 # ok 2875 # SKIP Streaming SVE set SVE get FPSIMD for VL 3280
4603 22:58:22.568983 # ok 2876 # SKIP Streaming SVE set FPSIMD get SVE for VL 3280
4604 22:58:22.569066 # ok 2877 Set Streaming SVE VL 3296
4605 22:58:22.569149 # ok 2878 # SKIP Streaming SVE set SVE get SVE for VL 3296
4606 22:58:22.569232 # ok 2879 # SKIP Streaming SVE set SVE get FPSIMD for VL 3296
4607 22:58:22.569315 # ok 2880 # SKIP Streaming SVE set FPSIMD get SVE for VL 3296
4608 22:58:22.569398 # ok 2881 Set Streaming SVE VL 3312
4609 22:58:22.569482 # ok 2882 # SKIP Streaming SVE set SVE get SVE for VL 3312
4610 22:58:22.569566 # ok 2883 # SKIP Streaming SVE set SVE get FPSIMD for VL 3312
4611 22:58:22.572524 # ok 2884 # SKIP Streaming SVE set FPSIMD get SVE for VL 3312
4612 22:58:22.572831 # ok 2885 Set Streaming SVE VL 3328
4613 22:58:22.573011 # ok 2886 # SKIP Streaming SVE set SVE get SVE for VL 3328
4614 22:58:22.573181 # ok 2887 # SKIP Streaming SVE set SVE get FPSIMD for VL 3328
4615 22:58:22.573598 # ok 2888 # SKIP Streaming SVE set FPSIMD get SVE for VL 3328
4616 22:58:22.573756 # ok 2889 Set Streaming SVE VL 3344
4617 22:58:22.573873 # ok 2890 # SKIP Streaming SVE set SVE get SVE for VL 3344
4618 22:58:22.573965 # ok 2891 # SKIP Streaming SVE set SVE get FPSIMD for VL 3344
4619 22:58:22.574052 # ok 2892 # SKIP Streaming SVE set FPSIMD get SVE for VL 3344
4620 22:58:22.574138 # ok 2893 Set Streaming SVE VL 3360
4621 22:58:22.574224 # ok 2894 # SKIP Streaming SVE set SVE get SVE for VL 3360
4622 22:58:22.574309 # ok 2895 # SKIP Streaming SVE set SVE get FPSIMD for VL 3360
4623 22:58:22.574395 # ok 2896 # SKIP Streaming SVE set FPSIMD get SVE for VL 3360
4624 22:58:22.574481 # ok 2897 Set Streaming SVE VL 3376
4625 22:58:22.574586 # ok 2898 # SKIP Streaming SVE set SVE get SVE for VL 3376
4626 22:58:22.579068 # ok 2899 # SKIP Streaming SVE set SVE get FPSIMD for VL 3376
4627 22:58:22.579473 # ok 2900 # SKIP Streaming SVE set FPSIMD get SVE for VL 3376
4628 22:58:22.579581 # ok 2901 Set Streaming SVE VL 3392
4629 22:58:22.579676 # ok 2902 # SKIP Streaming SVE set SVE get SVE for VL 3392
4630 22:58:22.579784 # ok 2903 # SKIP Streaming SVE set SVE get FPSIMD for VL 3392
4631 22:58:22.579876 # ok 2904 # SKIP Streaming SVE set FPSIMD get SVE for VL 3392
4632 22:58:22.579981 # ok 2905 Set Streaming SVE VL 3408
4633 22:58:22.580086 # ok 2906 # SKIP Streaming SVE set SVE get SVE for VL 3408
4634 22:58:22.580195 # ok 2907 # SKIP Streaming SVE set SVE get FPSIMD for VL 3408
4635 22:58:22.580510 # ok 2908 # SKIP Streaming SVE set FPSIMD get SVE for VL 3408
4636 22:58:22.580617 # ok 2909 Set Streaming SVE VL 3424
4637 22:58:22.581759 # ok 2910 # SKIP Streaming SVE set SVE get SVE for VL 3424
4638 22:58:22.581872 # ok 2911 # SKIP Streaming SVE set SVE get FPSIMD for VL 3424
4639 22:58:22.581963 # ok 2912 # SKIP Streaming SVE set FPSIMD get SVE for VL 3424
4640 22:58:22.582045 # ok 2913 Set Streaming SVE VL 3440
4641 22:58:22.582128 # ok 2914 # SKIP Streaming SVE set SVE get SVE for VL 3440
4642 22:58:22.582223 # ok 2915 # SKIP Streaming SVE set SVE get FPSIMD for VL 3440
4643 22:58:22.582305 # ok 2916 # SKIP Streaming SVE set FPSIMD get SVE for VL 3440
4644 22:58:22.582392 # ok 2917 Set Streaming SVE VL 3456
4645 22:58:22.587387 # ok 2918 # SKIP Streaming SVE set SVE get SVE for VL 3456
4646 22:58:22.587822 # ok 2919 # SKIP Streaming SVE set SVE get FPSIMD for VL 3456
4647 22:58:22.587937 # ok 2920 # SKIP Streaming SVE set FPSIMD get SVE for VL 3456
4648 22:58:22.588020 # ok 2921 Set Streaming SVE VL 3472
4649 22:58:22.588301 # ok 2922 # SKIP Streaming SVE set SVE get SVE for VL 3472
4650 22:58:22.588394 # ok 2923 # SKIP Streaming SVE set SVE get FPSIMD for VL 3472
4651 22:58:22.588470 # ok 2924 # SKIP Streaming SVE set FPSIMD get SVE for VL 3472
4652 22:58:22.588542 # ok 2925 Set Streaming SVE VL 3488
4653 22:58:22.588618 # ok 2926 # SKIP Streaming SVE set SVE get SVE for VL 3488
4654 22:58:22.588702 # ok 2927 # SKIP Streaming SVE set SVE get FPSIMD for VL 3488
4655 22:58:22.588975 # ok 2928 # SKIP Streaming SVE set FPSIMD get SVE for VL 3488
4656 22:58:22.589068 # ok 2929 Set Streaming SVE VL 3504
4657 22:58:22.589145 # ok 2930 # SKIP Streaming SVE set SVE get SVE for VL 3504
4658 22:58:22.589431 # ok 2931 # SKIP Streaming SVE set SVE get FPSIMD for VL 3504
4659 22:58:22.589528 # ok 2932 # SKIP Streaming SVE set FPSIMD get SVE for VL 3504
4660 22:58:22.589610 # ok 2933 Set Streaming SVE VL 3520
4661 22:58:22.589703 # ok 2934 # SKIP Streaming SVE set SVE get SVE for VL 3520
4662 22:58:22.589994 # ok 2935 # SKIP Streaming SVE set SVE get FPSIMD for VL 3520
4663 22:58:22.590099 # ok 2936 # SKIP Streaming SVE set FPSIMD get SVE for VL 3520
4664 22:58:22.595642 # ok 2937 Set Streaming SVE VL 3536
4665 22:58:22.596072 # ok 2938 # SKIP Streaming SVE set SVE get SVE for VL 3536
4666 22:58:22.596183 # ok 2939 # SKIP Streaming SVE set SVE get FPSIMD for VL 3536
4667 22:58:22.596273 # ok 2940 # SKIP Streaming SVE set FPSIMD get SVE for VL 3536
4668 22:58:22.596376 # ok 2941 Set Streaming SVE VL 3552
4669 22:58:22.596467 # ok 2942 # SKIP Streaming SVE set SVE get SVE for VL 3552
4670 22:58:22.596558 # ok 2943 # SKIP Streaming SVE set SVE get FPSIMD for VL 3552
4671 22:58:22.596675 # ok 2944 # SKIP Streaming SVE set FPSIMD get SVE for VL 3552
4672 22:58:22.596771 # ok 2945 Set Streaming SVE VL 3568
4673 22:58:22.596879 # ok 2946 # SKIP Streaming SVE set SVE get SVE for VL 3568
4674 22:58:22.596989 # ok 2947 # SKIP Streaming SVE set SVE get FPSIMD for VL 3568
4675 22:58:22.597310 # ok 2948 # SKIP Streaming SVE set FPSIMD get SVE for VL 3568
4676 22:58:22.597418 # ok 2949 Set Streaming SVE VL 3584
4677 22:58:22.597522 # ok 2950 # SKIP Streaming SVE set SVE get SVE for VL 3584
4678 22:58:22.597630 # ok 2951 # SKIP Streaming SVE set SVE get FPSIMD for VL 3584
4679 22:58:22.597757 # ok 2952 # SKIP Streaming SVE set FPSIMD get SVE for VL 3584
4680 22:58:22.598687 # ok 2953 Set Streaming SVE VL 3600
4681 22:58:22.598953 # ok 2954 # SKIP Streaming SVE set SVE get SVE for VL 3600
4682 22:58:22.599275 # ok 2955 # SKIP Streaming SVE set SVE get FPSIMD for VL 3600
4683 22:58:22.599378 # ok 2956 # SKIP Streaming SVE set FPSIMD get SVE for VL 3600
4684 22:58:22.599465 # ok 2957 Set Streaming SVE VL 3616
4685 22:58:22.599564 # ok 2958 # SKIP Streaming SVE set SVE get SVE for VL 3616
4686 22:58:22.599666 # ok 2959 # SKIP Streaming SVE set SVE get FPSIMD for VL 3616
4687 22:58:22.599765 # ok 2960 # SKIP Streaming SVE set FPSIMD get SVE for VL 3616
4688 22:58:22.599864 # ok 2961 Set Streaming SVE VL 3632
4689 22:58:22.599968 # ok 2962 # SKIP Streaming SVE set SVE get SVE for VL 3632
4690 22:58:22.600267 # ok 2963 # SKIP Streaming SVE set SVE get FPSIMD for VL 3632
4691 22:58:22.600383 # ok 2964 # SKIP Streaming SVE set FPSIMD get SVE for VL 3632
4692 22:58:22.600483 # ok 2965 Set Streaming SVE VL 3648
4693 22:58:22.600780 # ok 2966 # SKIP Streaming SVE set SVE get SVE for VL 3648
4694 22:58:22.600901 # ok 2967 # SKIP Streaming SVE set SVE get FPSIMD for VL 3648
4695 22:58:22.601002 # ok 2968 # SKIP Streaming SVE set FPSIMD get SVE for VL 3648
4696 22:58:22.601100 # ok 2969 Set Streaming SVE VL 3664
4697 22:58:22.601197 # ok 2970 # SKIP Streaming SVE set SVE get SVE for VL 3664
4698 22:58:22.601415 # ok 2971 # SKIP Streaming SVE set SVE get FPSIMD for VL 3664
4699 22:58:22.601686 # ok 2972 # SKIP Streaming SVE set FPSIMD get SVE for VL 3664
4700 22:58:22.601851 # ok 2973 Set Streaming SVE VL 3680
4701 22:58:22.601961 # ok 2974 # SKIP Streaming SVE set SVE get SVE for VL 3680
4702 22:58:22.607444 # ok 2975 # SKIP Streaming SVE set SVE get FPSIMD for VL 3680
4703 22:58:22.607873 # ok 2976 # SKIP Streaming SVE set FPSIMD get SVE for VL 3680
4704 22:58:22.607982 # ok 2977 Set Streaming SVE VL 3696
4705 22:58:22.608072 # ok 2978 # SKIP Streaming SVE set SVE get SVE for VL 3696
4706 22:58:22.608174 # ok 2979 # SKIP Streaming SVE set SVE get FPSIMD for VL 3696
4707 22:58:22.608260 # ok 2980 # SKIP Streaming SVE set FPSIMD get SVE for VL 3696
4708 22:58:22.608364 # ok 2981 Set Streaming SVE VL 3712
4709 22:58:22.608450 # ok 2982 # SKIP Streaming SVE set SVE get SVE for VL 3712
4710 22:58:22.608555 # ok 2983 # SKIP Streaming SVE set SVE get FPSIMD for VL 3712
4711 22:58:22.608661 # ok 2984 # SKIP Streaming SVE set FPSIMD get SVE for VL 3712
4712 22:58:22.608760 # ok 2985 Set Streaming SVE VL 3728
4713 22:58:22.609060 # ok 2986 # SKIP Streaming SVE set SVE get SVE for VL 3728
4714 22:58:22.609161 # ok 2987 # SKIP Streaming SVE set SVE get FPSIMD for VL 3728
4715 22:58:22.609262 # ok 2988 # SKIP Streaming SVE set FPSIMD get SVE for VL 3728
4716 22:58:22.609347 # ok 2989 Set Streaming SVE VL 3744
4717 22:58:22.609623 # ok 2990 # SKIP Streaming SVE set SVE get SVE for VL 3744
4718 22:58:22.609753 # ok 2991 # SKIP Streaming SVE set SVE get FPSIMD for VL 3744
4719 22:58:22.609856 # ok 2992 # SKIP Streaming SVE set FPSIMD get SVE for VL 3744
4720 22:58:22.613265 # ok 2993 Set Streaming SVE VL 3760
4721 22:58:22.613623 # ok 2994 # SKIP Streaming SVE set SVE get SVE for VL 3760
4722 22:58:22.613741 # ok 2995 # SKIP Streaming SVE set SVE get FPSIMD for VL 3760
4723 22:58:22.613842 # ok 2996 # SKIP Streaming SVE set FPSIMD get SVE for VL 3760
4724 22:58:22.619583 # ok 2997 Set Streaming SVE VL 3776
4725 22:58:22.620003 # ok 2998 # SKIP Streaming SVE set SVE get SVE for VL 3776
4726 22:58:22.620136 # ok 2999 # SKIP Streaming SVE set SVE get FPSIMD for VL 3776
4727 22:58:22.620228 # ok 3000 # SKIP Streaming SVE set FPSIMD get SVE for VL 3776
4728 22:58:22.620330 # ok 3001 Set Streaming SVE VL 3792
4729 22:58:22.620417 # ok 3002 # SKIP Streaming SVE set SVE get SVE for VL 3792
4730 22:58:22.620518 # ok 3003 # SKIP Streaming SVE set SVE get FPSIMD for VL 3792
4731 22:58:22.620606 # ok 3004 # SKIP Streaming SVE set FPSIMD get SVE for VL 3792
4732 22:58:22.620704 # ok 3005 Set Streaming SVE VL 3808
4733 22:58:22.620805 # ok 3006 # SKIP Streaming SVE set SVE get SVE for VL 3808
4734 22:58:22.620928 # ok 3007 # SKIP Streaming SVE set SVE get FPSIMD for VL 3808
4735 22:58:22.621229 # ok 3008 # SKIP Streaming SVE set FPSIMD get SVE for VL 3808
4736 22:58:22.621336 # ok 3009 Set Streaming SVE VL 3824
4737 22:58:22.621435 # ok 3010 # SKIP Streaming SVE set SVE get SVE for VL 3824
4738 22:58:22.621537 # ok 3011 # SKIP Streaming SVE set SVE get FPSIMD for VL 3824
4739 22:58:22.621825 # ok 3012 # SKIP Streaming SVE set FPSIMD get SVE for VL 3824
4740 22:58:22.621933 # ok 3013 Set Streaming SVE VL 3840
4741 22:58:22.622035 # ok 3014 # SKIP Streaming SVE set SVE get SVE for VL 3840
4742 22:58:22.627333 # ok 3015 # SKIP Streaming SVE set SVE get FPSIMD for VL 3840
4743 22:58:22.627725 # ok 3016 # SKIP Streaming SVE set FPSIMD get SVE for VL 3840
4744 22:58:22.627828 # ok 3017 Set Streaming SVE VL 3856
4745 22:58:22.627920 # ok 3018 # SKIP Streaming SVE set SVE get SVE for VL 3856
4746 22:58:22.628019 # ok 3019 # SKIP Streaming SVE set SVE get FPSIMD for VL 3856
4747 22:58:22.628120 # ok 3020 # SKIP Streaming SVE set FPSIMD get SVE for VL 3856
4748 22:58:22.628221 # ok 3021 Set Streaming SVE VL 3872
4749 22:58:22.628522 # ok 3022 # SKIP Streaming SVE set SVE get SVE for VL 3872
4750 22:58:22.628626 # ok 3023 # SKIP Streaming SVE set SVE get FPSIMD for VL 3872
4751 22:58:22.628726 # ok 3024 # SKIP Streaming SVE set FPSIMD get SVE for VL 3872
4752 22:58:22.628827 # ok 3025 Set Streaming SVE VL 3888
4753 22:58:22.628927 # ok 3026 # SKIP Streaming SVE set SVE get SVE for VL 3888
4754 22:58:22.635465 # ok 3027 # SKIP Streaming SVE set SVE get FPSIMD for VL 3888
4755 22:58:22.635917 # ok 3028 # SKIP Streaming SVE set FPSIMD get SVE for VL 3888
4756 22:58:22.636023 # ok 3029 Set Streaming SVE VL 3904
4757 22:58:22.636112 # ok 3030 # SKIP Streaming SVE set SVE get SVE for VL 3904
4758 22:58:22.636214 # ok 3031 # SKIP Streaming SVE set SVE get FPSIMD for VL 3904
4759 22:58:22.636303 # ok 3032 # SKIP Streaming SVE set FPSIMD get SVE for VL 3904
4760 22:58:22.636405 # ok 3033 Set Streaming SVE VL 3920
4761 22:58:22.636492 # ok 3034 # SKIP Streaming SVE set SVE get SVE for VL 3920
4762 22:58:22.636594 # ok 3035 # SKIP Streaming SVE set SVE get FPSIMD for VL 3920
4763 22:58:22.636704 # ok 3036 # SKIP Streaming SVE set FPSIMD get SVE for VL 3920
4764 22:58:22.636806 # ok 3037 Set Streaming SVE VL 3936
4765 22:58:22.637081 # ok 3038 # SKIP Streaming SVE set SVE get SVE for VL 3936
4766 22:58:22.637209 # ok 3039 # SKIP Streaming SVE set SVE get FPSIMD for VL 3936
4767 22:58:22.637442 # ok 3040 # SKIP Streaming SVE set FPSIMD get SVE for VL 3936
4768 22:58:22.637548 # ok 3041 Set Streaming SVE VL 3952
4769 22:58:22.637670 # ok 3042 # SKIP Streaming SVE set SVE get SVE for VL 3952
4770 22:58:22.637783 # ok 3043 # SKIP Streaming SVE set SVE get FPSIMD for VL 3952
4771 22:58:22.643316 # ok 3044 # SKIP Streaming SVE set FPSIMD get SVE for VL 3952
4772 22:58:22.643528 # ok 3045 Set Streaming SVE VL 3968
4773 22:58:22.643857 # ok 3046 # SKIP Streaming SVE set SVE get SVE for VL 3968
4774 22:58:22.644008 # ok 3047 # SKIP Streaming SVE set SVE get FPSIMD for VL 3968
4775 22:58:22.644101 # ok 3048 # SKIP Streaming SVE set FPSIMD get SVE for VL 3968
4776 22:58:22.644202 # ok 3049 Set Streaming SVE VL 3984
4777 22:58:22.644290 # ok 3050 # SKIP Streaming SVE set SVE get SVE for VL 3984
4778 22:58:22.644375 # ok 3051 # SKIP Streaming SVE set SVE get FPSIMD for VL 3984
4779 22:58:22.644475 # ok 3052 # SKIP Streaming SVE set FPSIMD get SVE for VL 3984
4780 22:58:22.644562 # ok 3053 Set Streaming SVE VL 4000
4781 22:58:22.644661 # ok 3054 # SKIP Streaming SVE set SVE get SVE for VL 4000
4782 22:58:22.644761 # ok 3055 # SKIP Streaming SVE set SVE get FPSIMD for VL 4000
4783 22:58:22.645070 # ok 3056 # SKIP Streaming SVE set FPSIMD get SVE for VL 4000
4784 22:58:22.645180 # ok 3057 Set Streaming SVE VL 4016
4785 22:58:22.645287 # ok 3058 # SKIP Streaming SVE set SVE get SVE for VL 4016
4786 22:58:22.645535 # ok 3059 # SKIP Streaming SVE set SVE get FPSIMD for VL 4016
4787 22:58:22.645626 # ok 3060 # SKIP Streaming SVE set FPSIMD get SVE for VL 4016
4788 22:58:22.645739 # ok 3061 Set Streaming SVE VL 4032
4789 22:58:22.645832 # ok 3062 # SKIP Streaming SVE set SVE get SVE for VL 4032
4790 22:58:22.652451 # ok 3063 # SKIP Streaming SVE set SVE get FPSIMD for VL 4032
4791 22:58:22.652667 # ok 3064 # SKIP Streaming SVE set FPSIMD get SVE for VL 4032
4792 22:58:22.652997 # ok 3065 Set Streaming SVE VL 4048
4793 22:58:22.653179 # ok 3066 # SKIP Streaming SVE set SVE get SVE for VL 4048
4794 22:58:22.653429 # ok 3067 # SKIP Streaming SVE set SVE get FPSIMD for VL 4048
4795 22:58:22.653526 # ok 3068 # SKIP Streaming SVE set FPSIMD get SVE for VL 4048
4796 22:58:22.653617 # ok 3069 Set Streaming SVE VL 4064
4797 22:58:22.653722 # ok 3070 # SKIP Streaming SVE set SVE get SVE for VL 4064
4798 22:58:22.654012 # ok 3071 # SKIP Streaming SVE set SVE get FPSIMD for VL 4064
4799 22:58:22.654114 # ok 3072 # SKIP Streaming SVE set FPSIMD get SVE for VL 4064
4800 22:58:22.654206 # ok 3073 Set Streaming SVE VL 4080
4801 22:58:22.654513 # ok 3074 # SKIP Streaming SVE set SVE get SVE for VL 4080
4802 22:58:22.654653 # ok 3075 # SKIP Streaming SVE set SVE get FPSIMD for VL 4080
4803 22:58:22.654769 # ok 3076 # SKIP Streaming SVE set FPSIMD get SVE for VL 4080
4804 22:58:22.656469 # ok 3077 Set Streaming SVE VL 4096
4805 22:58:22.656652 # ok 3078 # SKIP Streaming SVE set SVE get SVE for VL 4096
4806 22:58:22.656937 # ok 3079 # SKIP Streaming SVE set SVE get FPSIMD for VL 4096
4807 22:58:22.657091 # ok 3080 # SKIP Streaming SVE set FPSIMD get SVE for VL 4096
4808 22:58:22.657299 # ok 3081 Set Streaming SVE VL 4112
4809 22:58:22.657504 # ok 3082 # SKIP Streaming SVE set SVE get SVE for VL 4112
4810 22:58:22.657728 # ok 3083 # SKIP Streaming SVE set SVE get FPSIMD for VL 4112
4811 22:58:22.657955 # ok 3084 # SKIP Streaming SVE set FPSIMD get SVE for VL 4112
4812 22:58:22.658180 # ok 3085 Set Streaming SVE VL 4128
4813 22:58:22.658387 # ok 3086 # SKIP Streaming SVE set SVE get SVE for VL 4128
4814 22:58:22.658725 # ok 3087 # SKIP Streaming SVE set SVE get FPSIMD for VL 4128
4815 22:58:22.658838 # ok 3088 # SKIP Streaming SVE set FPSIMD get SVE for VL 4128
4816 22:58:22.658935 # ok 3089 Set Streaming SVE VL 4144
4817 22:58:22.659029 # ok 3090 # SKIP Streaming SVE set SVE get SVE for VL 4144
4818 22:58:22.659122 # ok 3091 # SKIP Streaming SVE set SVE get FPSIMD for VL 4144
4819 22:58:22.659215 # ok 3092 # SKIP Streaming SVE set FPSIMD get SVE for VL 4144
4820 22:58:22.659308 # ok 3093 Set Streaming SVE VL 4160
4821 22:58:22.659400 # ok 3094 # SKIP Streaming SVE set SVE get SVE for VL 4160
4822 22:58:22.659493 # ok 3095 # SKIP Streaming SVE set SVE get FPSIMD for VL 4160
4823 22:58:22.659585 # ok 3096 # SKIP Streaming SVE set FPSIMD get SVE for VL 4160
4824 22:58:22.659678 # ok 3097 Set Streaming SVE VL 4176
4825 22:58:22.659775 # ok 3098 # SKIP Streaming SVE set SVE get SVE for VL 4176
4826 22:58:22.659868 # ok 3099 # SKIP Streaming SVE set SVE get FPSIMD for VL 4176
4827 22:58:22.659966 # ok 3100 # SKIP Streaming SVE set FPSIMD get SVE for VL 4176
4828 22:58:22.660059 # ok 3101 Set Streaming SVE VL 4192
4829 22:58:22.660151 # ok 3102 # SKIP Streaming SVE set SVE get SVE for VL 4192
4830 22:58:22.660243 # ok 3103 # SKIP Streaming SVE set SVE get FPSIMD for VL 4192
4831 22:58:22.660336 # ok 3104 # SKIP Streaming SVE set FPSIMD get SVE for VL 4192
4832 22:58:22.661314 # ok 3105 Set Streaming SVE VL 4208
4833 22:58:22.661475 # ok 3106 # SKIP Streaming SVE set SVE get SVE for VL 4208
4834 22:58:22.661889 # ok 3107 # SKIP Streaming SVE set SVE get FPSIMD for VL 4208
4835 22:58:22.662019 # ok 3108 # SKIP Streaming SVE set FPSIMD get SVE for VL 4208
4836 22:58:22.662117 # ok 3109 Set Streaming SVE VL 4224
4837 22:58:22.662209 # ok 3110 # SKIP Streaming SVE set SVE get SVE for VL 4224
4838 22:58:22.662303 # ok 3111 # SKIP Streaming SVE set SVE get FPSIMD for VL 4224
4839 22:58:22.662412 # ok 3112 # SKIP Streaming SVE set FPSIMD get SVE for VL 4224
4840 22:58:22.666924 # ok 3113 Set Streaming SVE VL 4240
4841 22:58:22.667493 # ok 3114 # SKIP Streaming SVE set SVE get SVE for VL 4240
4842 22:58:22.668490 # ok 3115 # SKIP Streaming SVE set SVE get FPSIMD for VL 4240
4843 22:58:22.668674 # ok 3116 # SKIP Streaming SVE set FPSIMD get SVE for VL 4240
4844 22:58:22.668902 # ok 3117 Set Streaming SVE VL 4256
4845 22:58:22.669125 # ok 3118 # SKIP Streaming SVE set SVE get SVE for VL 4256
4846 22:58:22.669324 # ok 3119 # SKIP Streaming SVE set SVE get FPSIMD for VL 4256
4847 22:58:22.669556 # ok 3120 # SKIP Streaming SVE set FPSIMD get SVE for VL 4256
4848 22:58:22.669786 # ok 3121 Set Streaming SVE VL 4272
4849 22:58:22.669966 # ok 3122 # SKIP Streaming SVE set SVE get SVE for VL 4272
4850 22:58:22.670068 # ok 3123 # SKIP Streaming SVE set SVE get FPSIMD for VL 4272
4851 22:58:22.670163 # ok 3124 # SKIP Streaming SVE set FPSIMD get SVE for VL 4272
4852 22:58:22.670256 # ok 3125 Set Streaming SVE VL 4288
4853 22:58:22.670377 # ok 3126 # SKIP Streaming SVE set SVE get SVE for VL 4288
4854 22:58:22.670474 # ok 3127 # SKIP Streaming SVE set SVE get FPSIMD for VL 4288
4855 22:58:22.670564 # ok 3128 # SKIP Streaming SVE set FPSIMD get SVE for VL 4288
4856 22:58:22.670647 # ok 3129 Set Streaming SVE VL 4304
4857 22:58:22.670729 # ok 3130 # SKIP Streaming SVE set SVE get SVE for VL 4304
4858 22:58:22.670813 # ok 3131 # SKIP Streaming SVE set SVE get FPSIMD for VL 4304
4859 22:58:22.670896 # ok 3132 # SKIP Streaming SVE set FPSIMD get SVE for VL 4304
4860 22:58:22.670978 # ok 3133 Set Streaming SVE VL 4320
4861 22:58:22.671061 # ok 3134 # SKIP Streaming SVE set SVE get SVE for VL 4320
4862 22:58:22.671143 # ok 3135 # SKIP Streaming SVE set SVE get FPSIMD for VL 4320
4863 22:58:22.671226 # ok 3136 # SKIP Streaming SVE set FPSIMD get SVE for VL 4320
4864 22:58:22.671309 # ok 3137 Set Streaming SVE VL 4336
4865 22:58:22.671393 # ok 3138 # SKIP Streaming SVE set SVE get SVE for VL 4336
4866 22:58:22.671479 # ok 3139 # SKIP Streaming SVE set SVE get FPSIMD for VL 4336
4867 22:58:22.675338 # ok 3140 # SKIP Streaming SVE set FPSIMD get SVE for VL 4336
4868 22:58:22.675519 # ok 3141 Set Streaming SVE VL 4352
4869 22:58:22.675616 # ok 3142 # SKIP Streaming SVE set SVE get SVE for VL 4352
4870 22:58:22.675727 # ok 3143 # SKIP Streaming SVE set SVE get FPSIMD for VL 4352
4871 22:58:22.675826 # ok 3144 # SKIP Streaming SVE set FPSIMD get SVE for VL 4352
4872 22:58:22.675933 # ok 3145 Set Streaming SVE VL 4368
4873 22:58:22.676027 # ok 3146 # SKIP Streaming SVE set SVE get SVE for VL 4368
4874 22:58:22.676132 # ok 3147 # SKIP Streaming SVE set SVE get FPSIMD for VL 4368
4875 22:58:22.676232 # ok 3148 # SKIP Streaming SVE set FPSIMD get SVE for VL 4368
4876 22:58:22.676330 # ok 3149 Set Streaming SVE VL 4384
4877 22:58:22.676643 # ok 3150 # SKIP Streaming SVE set SVE get SVE for VL 4384
4878 22:58:22.676765 # ok 3151 # SKIP Streaming SVE set SVE get FPSIMD for VL 4384
4879 22:58:22.676855 # ok 3152 # SKIP Streaming SVE set FPSIMD get SVE for VL 4384
4880 22:58:22.676957 # ok 3153 Set Streaming SVE VL 4400
4881 22:58:22.677047 # ok 3154 # SKIP Streaming SVE set SVE get SVE for VL 4400
4882 22:58:22.677155 # ok 3155 # SKIP Streaming SVE set SVE get FPSIMD for VL 4400
4883 22:58:22.677250 # ok 3156 # SKIP Streaming SVE set FPSIMD get SVE for VL 4400
4884 22:58:22.677353 # ok 3157 Set Streaming SVE VL 4416
4885 22:58:22.677452 # ok 3158 # SKIP Streaming SVE set SVE get SVE for VL 4416
4886 22:58:22.677820 # ok 3159 # SKIP Streaming SVE set SVE get FPSIMD for VL 4416
4887 22:58:22.677932 # ok 3160 # SKIP Streaming SVE set FPSIMD get SVE for VL 4416
4888 22:58:22.678036 # ok 3161 Set Streaming SVE VL 4432
4889 22:58:22.685445 # ok 3162 # SKIP Streaming SVE set SVE get SVE for VL 4432
4890 22:58:22.685955 # ok 3163 # SKIP Streaming SVE set SVE get FPSIMD for VL 4432
4891 22:58:22.686112 # ok 3164 # SKIP Streaming SVE set FPSIMD get SVE for VL 4432
4892 22:58:22.686296 # ok 3165 Set Streaming SVE VL 4448
4893 22:58:22.686398 # ok 3166 # SKIP Streaming SVE set SVE get SVE for VL 4448
4894 22:58:22.686485 # ok 3167 # SKIP Streaming SVE set SVE get FPSIMD for VL 4448
4895 22:58:22.693568 # ok 3168 # SKIP Streaming SVE set FPSIMD get SVE for VL 4448
4896 22:58:22.694016 # ok 3169 Set Streaming SVE VL 4464
4897 22:58:22.694334 # ok 3170 # SKIP Streaming SVE set SVE get SVE for VL 4464
4898 22:58:22.694429 # ok 3171 # SKIP Streaming SVE set SVE get FPSIMD for VL 4464
4899 22:58:22.694517 # ok 3172 # SKIP Streaming SVE set FPSIMD get SVE for VL 4464
4900 22:58:22.694831 # ok 3173 Set Streaming SVE VL 4480
4901 22:58:22.694981 # ok 3174 # SKIP Streaming SVE set SVE get SVE for VL 4480
4902 22:58:22.695089 # ok 3175 # SKIP Streaming SVE set SVE get FPSIMD for VL 4480
4903 22:58:22.695190 # ok 3176 # SKIP Streaming SVE set FPSIMD get SVE for VL 4480
4904 22:58:22.696112 # ok 3177 Set Streaming SVE VL 4496
4905 22:58:22.696277 # ok 3178 # SKIP Streaming SVE set SVE get SVE for VL 4496
4906 22:58:22.696386 # ok 3179 # SKIP Streaming SVE set SVE get FPSIMD for VL 4496
4907 22:58:22.696487 # ok 3180 # SKIP Streaming SVE set FPSIMD get SVE for VL 4496
4908 22:58:22.696587 # ok 3181 Set Streaming SVE VL 4512
4909 22:58:22.696685 # ok 3182 # SKIP Streaming SVE set SVE get SVE for VL 4512
4910 22:58:22.696983 # ok 3183 # SKIP Streaming SVE set SVE get FPSIMD for VL 4512
4911 22:58:22.697102 # ok 3184 # SKIP Streaming SVE set FPSIMD get SVE for VL 4512
4912 22:58:22.697204 # ok 3185 Set Streaming SVE VL 4528
4913 22:58:22.697441 # ok 3186 # SKIP Streaming SVE set SVE get SVE for VL 4528
4914 22:58:22.697551 # ok 3187 # SKIP Streaming SVE set SVE get FPSIMD for VL 4528
4915 22:58:22.697756 # ok 3188 # SKIP Streaming SVE set FPSIMD get SVE for VL 4528
4916 22:58:22.697863 # ok 3189 Set Streaming SVE VL 4544
4917 22:58:22.698050 # ok 3190 # SKIP Streaming SVE set SVE get SVE for VL 4544
4918 22:58:22.698155 # ok 3191 # SKIP Streaming SVE set SVE get FPSIMD for VL 4544
4919 22:58:22.719779 # ok 3192 # SKIP Streaming SVE set FPSIMD get SVE for VL 4544
4920 22:58:22.720030 # ok 3193 Set Streaming SVE VL 4560
4921 22:58:22.720335 # ok 3194 # SKIP Streaming SVE set SVE get SVE for VL 4560
4922 22:58:22.720441 # ok 3195 # SKIP Streaming SVE set SVE get FPSIMD for VL 4560
4923 22:58:22.720531 # ok 3196 # SKIP Streaming SVE set FPSIMD get SVE for VL 4560
4924 22:58:22.720618 # ok 3197 Set Streaming SVE VL 4576
4925 22:58:22.720722 # ok 3198 # SKIP Streaming SVE set SVE get SVE for VL 4576
4926 22:58:22.720812 # ok 3199 # SKIP Streaming SVE set SVE get FPSIMD for VL 4576
4927 22:58:22.720902 # ok 3200 # SKIP Streaming SVE set FPSIMD get SVE for VL 4576
4928 22:58:22.721002 # ok 3201 Set Streaming SVE VL 4592
4929 22:58:22.721102 # ok 3202 # SKIP Streaming SVE set SVE get SVE for VL 4592
4930 22:58:22.721443 # ok 3203 # SKIP Streaming SVE set SVE get FPSIMD for VL 4592
4931 22:58:22.721558 # ok 3204 # SKIP Streaming SVE set FPSIMD get SVE for VL 4592
4932 22:58:22.721665 # ok 3205 Set Streaming SVE VL 4608
4933 22:58:22.721774 # ok 3206 # SKIP Streaming SVE set SVE get SVE for VL 4608
4934 22:58:22.722007 # ok 3207 # SKIP Streaming SVE set SVE get FPSIMD for VL 4608
4935 22:58:22.734914 # ok 3208 # SKIP Streaming SVE set FPSIMD get SVE for VL 4608
4936 22:58:22.735275 # ok 3209 Set Streaming SVE VL 4624
4937 22:58:22.735743 # ok 3210 # SKIP Streaming SVE set SVE get SVE for VL 4624
4938 22:58:22.735943 # ok 3211 # SKIP Streaming SVE set SVE get FPSIMD for VL 4624
4939 22:58:22.736164 # ok 3212 # SKIP Streaming SVE set FPSIMD get SVE for VL 4624
4940 22:58:22.736373 # ok 3213 Set Streaming SVE VL 4640
4941 22:58:22.736642 # ok 3214 # SKIP Streaming SVE set SVE get SVE for VL 4640
4942 22:58:22.736863 # ok 3215 # SKIP Streaming SVE set SVE get FPSIMD for VL 4640
4943 22:58:22.737066 # ok 3216 # SKIP Streaming SVE set FPSIMD get SVE for VL 4640
4944 22:58:22.737272 # ok 3217 Set Streaming SVE VL 4656
4945 22:58:22.737469 # ok 3218 # SKIP Streaming SVE set SVE get SVE for VL 4656
4946 22:58:22.737700 # ok 3219 # SKIP Streaming SVE set SVE get FPSIMD for VL 4656
4947 22:58:22.737921 # ok 3220 # SKIP Streaming SVE set FPSIMD get SVE for VL 4656
4948 22:58:22.738139 # ok 3221 Set Streaming SVE VL 4672
4949 22:58:22.738327 # ok 3222 # SKIP Streaming SVE set SVE get SVE for VL 4672
4950 22:58:22.738458 # ok 3223 # SKIP Streaming SVE set SVE get FPSIMD for VL 4672
4951 22:58:22.738577 # ok 3224 # SKIP Streaming SVE set FPSIMD get SVE for VL 4672
4952 22:58:22.738694 # ok 3225 Set Streaming SVE VL 4688
4953 22:58:22.738812 # ok 3226 # SKIP Streaming SVE set SVE get SVE for VL 4688
4954 22:58:22.738929 # ok 3227 # SKIP Streaming SVE set SVE get FPSIMD for VL 4688
4955 22:58:22.739045 # ok 3228 # SKIP Streaming SVE set FPSIMD get SVE for VL 4688
4956 22:58:22.739159 # ok 3229 Set Streaming SVE VL 4704
4957 22:58:22.739276 # ok 3230 # SKIP Streaming SVE set SVE get SVE for VL 4704
4958 22:58:22.746967 # ok 3231 # SKIP Streaming SVE set SVE get FPSIMD for VL 4704
4959 22:58:22.747190 # ok 3232 # SKIP Streaming SVE set FPSIMD get SVE for VL 4704
4960 22:58:22.747508 # ok 3233 Set Streaming SVE VL 4720
4961 22:58:22.747615 # ok 3234 # SKIP Streaming SVE set SVE get SVE for VL 4720
4962 22:58:22.747726 # ok 3235 # SKIP Streaming SVE set SVE get FPSIMD for VL 4720
4963 22:58:22.747843 # ok 3236 # SKIP Streaming SVE set FPSIMD get SVE for VL 4720
4964 22:58:22.748020 # ok 3237 Set Streaming SVE VL 4736
4965 22:58:22.748233 # ok 3238 # SKIP Streaming SVE set SVE get SVE for VL 4736
4966 22:58:22.748492 # ok 3239 # SKIP Streaming SVE set SVE get FPSIMD for VL 4736
4967 22:58:22.748708 # ok 3240 # SKIP Streaming SVE set FPSIMD get SVE for VL 4736
4968 22:58:22.748926 # ok 3241 Set Streaming SVE VL 4752
4969 22:58:22.749129 # ok 3242 # SKIP Streaming SVE set SVE get SVE for VL 4752
4970 22:58:22.749283 # ok 3243 # SKIP Streaming SVE set SVE get FPSIMD for VL 4752
4971 22:58:22.749493 # ok 3244 # SKIP Streaming SVE set FPSIMD get SVE for VL 4752
4972 22:58:22.749679 # ok 3245 Set Streaming SVE VL 4768
4973 22:58:22.749855 # ok 3246 # SKIP Streaming SVE set SVE get SVE for VL 4768
4974 22:58:22.750007 # ok 3247 # SKIP Streaming SVE set SVE get FPSIMD for VL 4768
4975 22:58:22.750136 # ok 3248 # SKIP Streaming SVE set FPSIMD get SVE for VL 4768
4976 22:58:22.750256 # ok 3249 Set Streaming SVE VL 4784
4977 22:58:22.750372 # ok 3250 # SKIP Streaming SVE set SVE get SVE for VL 4784
4978 22:58:22.750488 # ok 3251 # SKIP Streaming SVE set SVE get FPSIMD for VL 4784
4979 22:58:22.750632 # ok 3252 # SKIP Streaming SVE set FPSIMD get SVE for VL 4784
4980 22:58:22.750752 # ok 3253 Set Streaming SVE VL 4800
4981 22:58:22.750869 # ok 3254 # SKIP Streaming SVE set SVE get SVE for VL 4800
4982 22:58:22.758062 # ok 3255 # SKIP Streaming SVE set SVE get FPSIMD for VL 4800
4983 22:58:22.758319 # ok 3256 # SKIP Streaming SVE set FPSIMD get SVE for VL 4800
4984 22:58:22.758448 # ok 3257 Set Streaming SVE VL 4816
4985 22:58:22.762066 # ok 3258 # SKIP Streaming SVE set SVE get SVE for VL 4816
4986 22:58:22.768533 # ok 3259 # SKIP Streaming SVE set SVE get FPSIMD for VL 4816
4987 22:58:22.768844 # ok 3260 # SKIP Streaming SVE set FPSIMD get SVE for VL 4816
4988 22:58:22.769054 # ok 3261 Set Streaming SVE VL 4832
4989 22:58:22.769190 # ok 3262 # SKIP Streaming SVE set SVE get SVE for VL 4832
4990 22:58:22.769312 # ok 3263 # SKIP Streaming SVE set SVE get FPSIMD for VL 4832
4991 22:58:22.769487 # ok 3264 # SKIP Streaming SVE set FPSIMD get SVE for VL 4832
4992 22:58:22.769636 # ok 3265 Set Streaming SVE VL 4848
4993 22:58:22.769884 # ok 3266 # SKIP Streaming SVE set SVE get SVE for VL 4848
4994 22:58:22.770077 # ok 3267 # SKIP Streaming SVE set SVE get FPSIMD for VL 4848
4995 22:58:22.770251 # ok 3268 # SKIP Streaming SVE set FPSIMD get SVE for VL 4848
4996 22:58:22.770399 # ok 3269 Set Streaming SVE VL 4864
4997 22:58:22.770579 # ok 3270 # SKIP Streaming SVE set SVE get SVE for VL 4864
4998 22:58:22.770718 # ok 3271 # SKIP Streaming SVE set SVE get FPSIMD for VL 4864
4999 22:58:22.770864 # ok 3272 # SKIP Streaming SVE set FPSIMD get SVE for VL 4864
5000 22:58:22.771008 # ok 3273 Set Streaming SVE VL 4880
5001 22:58:22.775712 # ok 3274 # SKIP Streaming SVE set SVE get SVE for VL 4880
5002 22:58:22.776218 # ok 3275 # SKIP Streaming SVE set SVE get FPSIMD for VL 4880
5003 22:58:22.776416 # ok 3276 # SKIP Streaming SVE set FPSIMD get SVE for VL 4880
5004 22:58:22.776581 # ok 3277 Set Streaming SVE VL 4896
5005 22:58:22.776785 # ok 3278 # SKIP Streaming SVE set SVE get SVE for VL 4896
5006 22:58:22.776955 # ok 3279 # SKIP Streaming SVE set SVE get FPSIMD for VL 4896
5007 22:58:22.777150 # ok 3280 # SKIP Streaming SVE set FPSIMD get SVE for VL 4896
5008 22:58:22.777353 # ok 3281 Set Streaming SVE VL 4912
5009 22:58:22.777517 # ok 3282 # SKIP Streaming SVE set SVE get SVE for VL 4912
5010 22:58:22.777715 # ok 3283 # SKIP Streaming SVE set SVE get FPSIMD for VL 4912
5011 22:58:22.777946 # ok 3284 # SKIP Streaming SVE set FPSIMD get SVE for VL 4912
5012 22:58:22.778130 # ok 3285 Set Streaming SVE VL 4928
5013 22:58:22.778276 # ok 3286 # SKIP Streaming SVE set SVE get SVE for VL 4928
5014 22:58:22.778399 # ok 3287 # SKIP Streaming SVE set SVE get FPSIMD for VL 4928
5015 22:58:22.778518 # ok 3288 # SKIP Streaming SVE set FPSIMD get SVE for VL 4928
5016 22:58:22.778636 # ok 3289 Set Streaming SVE VL 4944
5017 22:58:22.778753 # ok 3290 # SKIP Streaming SVE set SVE get SVE for VL 4944
5018 22:58:22.778871 # ok 3291 # SKIP Streaming SVE set SVE get FPSIMD for VL 4944
5019 22:58:22.778989 # ok 3292 # SKIP Streaming SVE set FPSIMD get SVE for VL 4944
5020 22:58:22.779106 # ok 3293 Set Streaming SVE VL 4960
5021 22:58:22.779225 # ok 3294 # SKIP Streaming SVE set SVE get SVE for VL 4960
5022 22:58:22.779342 # ok 3295 # SKIP Streaming SVE set SVE get FPSIMD for VL 4960
5023 22:58:22.783310 # ok 3296 # SKIP Streaming SVE set FPSIMD get SVE for VL 4960
5024 22:58:22.783562 # ok 3297 Set Streaming SVE VL 4976
5025 22:58:22.783980 # ok 3298 # SKIP Streaming SVE set SVE get SVE for VL 4976
5026 22:58:22.784131 # ok 3299 # SKIP Streaming SVE set SVE get FPSIMD for VL 4976
5027 22:58:22.784291 # ok 3300 # SKIP Streaming SVE set FPSIMD get SVE for VL 4976
5028 22:58:22.784499 # ok 3301 Set Streaming SVE VL 4992
5029 22:58:22.784689 # ok 3302 # SKIP Streaming SVE set SVE get SVE for VL 4992
5030 22:58:22.784953 # ok 3303 # SKIP Streaming SVE set SVE get FPSIMD for VL 4992
5031 22:58:22.785134 # ok 3304 # SKIP Streaming SVE set FPSIMD get SVE for VL 4992
5032 22:58:22.785311 # ok 3305 Set Streaming SVE VL 5008
5033 22:58:22.785456 # ok 3306 # SKIP Streaming SVE set SVE get SVE for VL 5008
5034 22:58:22.785593 # ok 3307 # SKIP Streaming SVE set SVE get FPSIMD for VL 5008
5035 22:58:22.785763 # ok 3308 # SKIP Streaming SVE set FPSIMD get SVE for VL 5008
5036 22:58:22.785934 # ok 3309 Set Streaming SVE VL 5024
5037 22:58:22.786113 # ok 3310 # SKIP Streaming SVE set SVE get SVE for VL 5024
5038 22:58:22.786238 # ok 3311 # SKIP Streaming SVE set SVE get FPSIMD for VL 5024
5039 22:58:22.786357 # ok 3312 # SKIP Streaming SVE set FPSIMD get SVE for VL 5024
5040 22:58:22.786475 # ok 3313 Set Streaming SVE VL 5040
5041 22:58:22.786593 # ok 3314 # SKIP Streaming SVE set SVE get SVE for VL 5040
5042 22:58:22.786710 # ok 3315 # SKIP Streaming SVE set SVE get FPSIMD for VL 5040
5043 22:58:22.786825 # ok 3316 # SKIP Streaming SVE set FPSIMD get SVE for VL 5040
5044 22:58:22.786939 # ok 3317 Set Streaming SVE VL 5056
5045 22:58:22.791663 # ok 3318 # SKIP Streaming SVE set SVE get SVE for VL 5056
5046 22:58:22.792251 # ok 3319 # SKIP Streaming SVE set SVE get FPSIMD for VL 5056
5047 22:58:22.792455 # ok 3320 # SKIP Streaming SVE set FPSIMD get SVE for VL 5056
5048 22:58:22.792673 # ok 3321 Set Streaming SVE VL 5072
5049 22:58:22.792860 # ok 3322 # SKIP Streaming SVE set SVE get SVE for VL 5072
5050 22:58:22.793027 # ok 3323 # SKIP Streaming SVE set SVE get FPSIMD for VL 5072
5051 22:58:22.793156 # ok 3324 # SKIP Streaming SVE set FPSIMD get SVE for VL 5072
5052 22:58:22.793277 # ok 3325 Set Streaming SVE VL 5088
5053 22:58:22.793397 # ok 3326 # SKIP Streaming SVE set SVE get SVE for VL 5088
5054 22:58:22.794005 # ok 3327 # SKIP Streaming SVE set SVE get FPSIMD for VL 5088
5055 22:58:22.794963 # ok 3328 # SKIP Streaming SVE set FPSIMD get SVE for VL 5088
5056 22:58:22.795248 # ok 3329 Set Streaming SVE VL 5104
5057 22:58:22.795380 # ok 3330 # SKIP Streaming SVE set SVE get SVE for VL 5104
5058 22:58:22.795697 # ok 3331 # SKIP Streaming SVE set SVE get FPSIMD for VL 5104
5059 22:58:22.795822 # ok 3332 # SKIP Streaming SVE set FPSIMD get SVE for VL 5104
5060 22:58:22.795939 # ok 3333 Set Streaming SVE VL 5120
5061 22:58:22.796317 # ok 3334 # SKIP Streaming SVE set SVE get SVE for VL 5120
5062 22:58:22.796544 # ok 3335 # SKIP Streaming SVE set SVE get FPSIMD for VL 5120
5063 22:58:22.796749 # ok 3336 # SKIP Streaming SVE set FPSIMD get SVE for VL 5120
5064 22:58:22.796955 # ok 3337 Set Streaming SVE VL 5136
5065 22:58:22.797152 # ok 3338 # SKIP Streaming SVE set SVE get SVE for VL 5136
5066 22:58:22.797342 # ok 3339 # SKIP Streaming SVE set SVE get FPSIMD for VL 5136
5067 22:58:22.797541 # ok 3340 # SKIP Streaming SVE set FPSIMD get SVE for VL 5136
5068 22:58:22.797759 # ok 3341 Set Streaming SVE VL 5152
5069 22:58:22.797957 # ok 3342 # SKIP Streaming SVE set SVE get SVE for VL 5152
5070 22:58:22.801991 # ok 3343 # SKIP Streaming SVE set SVE get FPSIMD for VL 5152
5071 22:58:22.805310 # ok 3344 # SKIP Streaming SVE set FPSIMD get SVE for VL 5152
5072 22:58:22.805561 # ok 3345 Set Streaming SVE VL 5168
5073 22:58:22.805973 # ok 3346 # SKIP Streaming SVE set SVE get SVE for VL 5168
5074 22:58:22.806075 # ok 3347 # SKIP Streaming SVE set SVE get FPSIMD for VL 5168
5075 22:58:22.806155 # ok 3348 # SKIP Streaming SVE set FPSIMD get SVE for VL 5168
5076 22:58:22.806231 # ok 3349 Set Streaming SVE VL 5184
5077 22:58:22.811790 # ok 3350 # SKIP Streaming SVE set SVE get SVE for VL 5184
5078 22:58:22.812222 # ok 3351 # SKIP Streaming SVE set SVE get FPSIMD for VL 5184
5079 22:58:22.812328 # ok 3352 # SKIP Streaming SVE set FPSIMD get SVE for VL 5184
5080 22:58:22.812421 # ok 3353 Set Streaming SVE VL 5200
5081 22:58:22.812528 # ok 3354 # SKIP Streaming SVE set SVE get SVE for VL 5200
5082 22:58:22.812618 # ok 3355 # SKIP Streaming SVE set SVE get FPSIMD for VL 5200
5083 22:58:22.812722 # ok 3356 # SKIP Streaming SVE set FPSIMD get SVE for VL 5200
5084 22:58:22.813008 # ok 3357 Set Streaming SVE VL 5216
5085 22:58:22.813117 # ok 3358 # SKIP Streaming SVE set SVE get SVE for VL 5216
5086 22:58:22.813221 # ok 3359 # SKIP Streaming SVE set SVE get FPSIMD for VL 5216
5087 22:58:22.813311 # ok 3360 # SKIP Streaming SVE set FPSIMD get SVE for VL 5216
5088 22:58:22.813410 # ok 3361 Set Streaming SVE VL 5232
5089 22:58:22.813523 # ok 3362 # SKIP Streaming SVE set SVE get SVE for VL 5232
5090 22:58:22.813809 # ok 3363 # SKIP Streaming SVE set SVE get FPSIMD for VL 5232
5091 22:58:22.814161 # ok 3364 # SKIP Streaming SVE set FPSIMD get SVE for VL 5232
5092 22:58:22.814325 # ok 3365 Set Streaming SVE VL 5248
5093 22:58:22.818027 # ok 3366 # SKIP Streaming SVE set SVE get SVE for VL 5248
5094 22:58:22.819359 # ok 3367 # SKIP Streaming SVE set SVE get FPSIMD for VL 5248
5095 22:58:22.819836 # ok 3368 # SKIP Streaming SVE set FPSIMD get SVE for VL 5248
5096 22:58:22.820028 # ok 3369 Set Streaming SVE VL 5264
5097 22:58:22.820235 # ok 3370 # SKIP Streaming SVE set SVE get SVE for VL 5264
5098 22:58:22.820477 # ok 3371 # SKIP Streaming SVE set SVE get FPSIMD for VL 5264
5099 22:58:22.820665 # ok 3372 # SKIP Streaming SVE set FPSIMD get SVE for VL 5264
5100 22:58:22.820846 # ok 3373 Set Streaming SVE VL 5280
5101 22:58:22.821045 # ok 3374 # SKIP Streaming SVE set SVE get SVE for VL 5280
5102 22:58:22.821238 # ok 3375 # SKIP Streaming SVE set SVE get FPSIMD for VL 5280
5103 22:58:22.821449 # ok 3376 # SKIP Streaming SVE set FPSIMD get SVE for VL 5280
5104 22:58:22.821629 # ok 3377 Set Streaming SVE VL 5296
5105 22:58:22.821858 # ok 3378 # SKIP Streaming SVE set SVE get SVE for VL 5296
5106 22:58:22.822073 # ok 3379 # SKIP Streaming SVE set SVE get FPSIMD for VL 5296
5107 22:58:22.822256 # ok 3380 # SKIP Streaming SVE set FPSIMD get SVE for VL 5296
5108 22:58:22.822388 # ok 3381 Set Streaming SVE VL 5312
5109 22:58:22.822505 # ok 3382 # SKIP Streaming SVE set SVE get SVE for VL 5312
5110 22:58:22.822649 # ok 3383 # SKIP Streaming SVE set SVE get FPSIMD for VL 5312
5111 22:58:22.822772 # ok 3384 # SKIP Streaming SVE set FPSIMD get SVE for VL 5312
5112 22:58:22.822889 # ok 3385 Set Streaming SVE VL 5328
5113 22:58:22.823005 # ok 3386 # SKIP Streaming SVE set SVE get SVE for VL 5328
5114 22:58:22.826940 # ok 3387 # SKIP Streaming SVE set SVE get FPSIMD for VL 5328
5115 22:58:22.827481 # ok 3388 # SKIP Streaming SVE set FPSIMD get SVE for VL 5328
5116 22:58:22.827719 # ok 3389 Set Streaming SVE VL 5344
5117 22:58:22.827949 # ok 3390 # SKIP Streaming SVE set SVE get SVE for VL 5344
5118 22:58:22.828162 # ok 3391 # SKIP Streaming SVE set SVE get FPSIMD for VL 5344
5119 22:58:22.828398 # ok 3392 # SKIP Streaming SVE set FPSIMD get SVE for VL 5344
5120 22:58:22.828581 # ok 3393 Set Streaming SVE VL 5360
5121 22:58:22.828743 # ok 3394 # SKIP Streaming SVE set SVE get SVE for VL 5360
5122 22:58:22.828910 # ok 3395 # SKIP Streaming SVE set SVE get FPSIMD for VL 5360
5123 22:58:22.829391 # ok 3396 # SKIP Streaming SVE set FPSIMD get SVE for VL 5360
5124 22:58:22.829610 # ok 3397 Set Streaming SVE VL 5376
5125 22:58:22.829800 # ok 3398 # SKIP Streaming SVE set SVE get SVE for VL 5376
5126 22:58:22.829975 # ok 3399 # SKIP Streaming SVE set SVE get FPSIMD for VL 5376
5127 22:58:22.830118 # ok 3400 # SKIP Streaming SVE set FPSIMD get SVE for VL 5376
5128 22:58:22.830239 # ok 3401 Set Streaming SVE VL 5392
5129 22:58:22.830356 # ok 3402 # SKIP Streaming SVE set SVE get SVE for VL 5392
5130 22:58:22.830473 # ok 3403 # SKIP Streaming SVE set SVE get FPSIMD for VL 5392
5131 22:58:22.830588 # ok 3404 # SKIP Streaming SVE set FPSIMD get SVE for VL 5392
5132 22:58:22.830705 # ok 3405 Set Streaming SVE VL 5408
5133 22:58:22.830822 # ok 3406 # SKIP Streaming SVE set SVE get SVE for VL 5408
5134 22:58:22.831169 # ok 3407 # SKIP Streaming SVE set SVE get FPSIMD for VL 5408
5135 22:58:22.831326 # ok 3408 # SKIP Streaming SVE set FPSIMD get SVE for VL 5408
5136 22:58:22.831450 # ok 3409 Set Streaming SVE VL 5424
5137 22:58:22.831569 # ok 3410 # SKIP Streaming SVE set SVE get SVE for VL 5424
5138 22:58:22.831687 # ok 3411 # SKIP Streaming SVE set SVE get FPSIMD for VL 5424
5139 22:58:22.838685 # ok 3412 # SKIP Streaming SVE set FPSIMD get SVE for VL 5424
5140 22:58:22.839266 # ok 3413 Set Streaming SVE VL 5440
5141 22:58:22.839475 # ok 3414 # SKIP Streaming SVE set SVE get SVE for VL 5440
5142 22:58:22.839681 # ok 3415 # SKIP Streaming SVE set SVE get FPSIMD for VL 5440
5143 22:58:22.839853 # ok 3416 # SKIP Streaming SVE set FPSIMD get SVE for VL 5440
5144 22:58:22.840263 # ok 3417 Set Streaming SVE VL 5456
5145 22:58:22.840495 # ok 3418 # SKIP Streaming SVE set SVE get SVE for VL 5456
5146 22:58:22.840671 # ok 3419 # SKIP Streaming SVE set SVE get FPSIMD for VL 5456
5147 22:58:22.840834 # ok 3420 # SKIP Streaming SVE set FPSIMD get SVE for VL 5456
5148 22:58:22.841030 # ok 3421 Set Streaming SVE VL 5472
5149 22:58:22.841234 # ok 3422 # SKIP Streaming SVE set SVE get SVE for VL 5472
5150 22:58:22.841408 # ok 3423 # SKIP Streaming SVE set SVE get FPSIMD for VL 5472
5151 22:58:22.841552 # ok 3424 # SKIP Streaming SVE set FPSIMD get SVE for VL 5472
5152 22:58:22.841730 # ok 3425 Set Streaming SVE VL 5488
5153 22:58:22.841892 # ok 3426 # SKIP Streaming SVE set SVE get SVE for VL 5488
5154 22:58:22.842063 # ok 3427 # SKIP Streaming SVE set SVE get FPSIMD for VL 5488
5155 22:58:22.842190 # ok 3428 # SKIP Streaming SVE set FPSIMD get SVE for VL 5488
5156 22:58:22.842308 # ok 3429 Set Streaming SVE VL 5504
5157 22:58:22.842426 # ok 3430 # SKIP Streaming SVE set SVE get SVE for VL 5504
5158 22:58:22.842543 # ok 3431 # SKIP Streaming SVE set SVE get FPSIMD for VL 5504
5159 22:58:22.842659 # ok 3432 # SKIP Streaming SVE set FPSIMD get SVE for VL 5504
5160 22:58:22.842776 # ok 3433 Set Streaming SVE VL 5520
5161 22:58:22.842891 # ok 3434 # SKIP Streaming SVE set SVE get SVE for VL 5520
5162 22:58:22.843008 # ok 3435 # SKIP Streaming SVE set SVE get FPSIMD for VL 5520
5163 22:58:22.843124 # ok 3436 # SKIP Streaming SVE set FPSIMD get SVE for VL 5520
5164 22:58:22.843239 # ok 3437 Set Streaming SVE VL 5536
5165 22:58:22.843355 # ok 3438 # SKIP Streaming SVE set SVE get SVE for VL 5536
5166 22:58:22.849595 # ok 3439 # SKIP Streaming SVE set SVE get FPSIMD for VL 5536
5167 22:58:22.849929 # ok 3440 # SKIP Streaming SVE set FPSIMD get SVE for VL 5536
5168 22:58:22.850145 # ok 3441 Set Streaming SVE VL 5552
5169 22:58:22.850278 # ok 3442 # SKIP Streaming SVE set SVE get SVE for VL 5552
5170 22:58:22.850394 # ok 3443 # SKIP Streaming SVE set SVE get FPSIMD for VL 5552
5171 22:58:22.850510 # ok 3444 # SKIP Streaming SVE set FPSIMD get SVE for VL 5552
5172 22:58:22.855416 # ok 3445 Set Streaming SVE VL 5568
5173 22:58:22.855961 # ok 3446 # SKIP Streaming SVE set SVE get SVE for VL 5568
5174 22:58:22.856164 # ok 3447 # SKIP Streaming SVE set SVE get FPSIMD for VL 5568
5175 22:58:22.856334 # ok 3448 # SKIP Streaming SVE set FPSIMD get SVE for VL 5568
5176 22:58:22.856489 # ok 3449 Set Streaming SVE VL 5584
5177 22:58:22.856674 # ok 3450 # SKIP Streaming SVE set SVE get SVE for VL 5584
5178 22:58:22.856893 # ok 3451 # SKIP Streaming SVE set SVE get FPSIMD for VL 5584
5179 22:58:22.857048 # ok 3452 # SKIP Streaming SVE set FPSIMD get SVE for VL 5584
5180 22:58:22.857212 # ok 3453 Set Streaming SVE VL 5600
5181 22:58:22.857390 # ok 3454 # SKIP Streaming SVE set SVE get SVE for VL 5600
5182 22:58:22.857594 # ok 3455 # SKIP Streaming SVE set SVE get FPSIMD for VL 5600
5183 22:58:22.858097 # ok 3456 # SKIP Streaming SVE set FPSIMD get SVE for VL 5600
5184 22:58:22.858285 # ok 3457 Set Streaming SVE VL 5616
5185 22:58:22.858414 # ok 3458 # SKIP Streaming SVE set SVE get SVE for VL 5616
5186 22:58:22.858535 # ok 3459 # SKIP Streaming SVE set SVE get FPSIMD for VL 5616
5187 22:58:22.858657 # ok 3460 # SKIP Streaming SVE set FPSIMD get SVE for VL 5616
5188 22:58:22.858775 # ok 3461 Set Streaming SVE VL 5632
5189 22:58:22.858895 # ok 3462 # SKIP Streaming SVE set SVE get SVE for VL 5632
5190 22:58:22.859013 # ok 3463 # SKIP Streaming SVE set SVE get FPSIMD for VL 5632
5191 22:58:22.859132 # ok 3464 # SKIP Streaming SVE set FPSIMD get SVE for VL 5632
5192 22:58:22.871526 # ok 3465 Set Streaming SVE VL 5648
5193 22:58:22.872176 # ok 3466 # SKIP Streaming SVE set SVE get SVE for VL 5648
5194 22:58:22.872407 # ok 3467 # SKIP Streaming SVE set SVE get FPSIMD for VL 5648
5195 22:58:22.872615 # ok 3468 # SKIP Streaming SVE set FPSIMD get SVE for VL 5648
5196 22:58:22.872797 # ok 3469 Set Streaming SVE VL 5664
5197 22:58:22.872929 # ok 3470 # SKIP Streaming SVE set SVE get SVE for VL 5664
5198 22:58:22.873075 # ok 3471 # SKIP Streaming SVE set SVE get FPSIMD for VL 5664
5199 22:58:22.873201 # ok 3472 # SKIP Streaming SVE set FPSIMD get SVE for VL 5664
5200 22:58:22.873320 # ok 3473 Set Streaming SVE VL 5680
5201 22:58:22.873438 # ok 3474 # SKIP Streaming SVE set SVE get SVE for VL 5680
5202 22:58:22.873556 # ok 3475 # SKIP Streaming SVE set SVE get FPSIMD for VL 5680
5203 22:58:22.874032 # ok 3476 # SKIP Streaming SVE set FPSIMD get SVE for VL 5680
5204 22:58:22.874434 # ok 3477 Set Streaming SVE VL 5696
5205 22:58:22.883236 # ok 3478 # SKIP Streaming SVE set SVE get SVE for VL 5696
5206 22:58:22.883812 # ok 3479 # SKIP Streaming SVE set SVE get FPSIMD for VL 5696
5207 22:58:22.884019 # ok 3480 # SKIP Streaming SVE set FPSIMD get SVE for VL 5696
5208 22:58:22.884239 # ok 3481 Set Streaming SVE VL 5712
5209 22:58:22.884441 # ok 3482 # SKIP Streaming SVE set SVE get SVE for VL 5712
5210 22:58:22.884690 # ok 3483 # SKIP Streaming SVE set SVE get FPSIMD for VL 5712
5211 22:58:22.884903 # ok 3484 # SKIP Streaming SVE set FPSIMD get SVE for VL 5712
5212 22:58:22.885155 # ok 3485 Set Streaming SVE VL 5728
5213 22:58:22.885394 # ok 3486 # SKIP Streaming SVE set SVE get SVE for VL 5728
5214 22:58:22.885608 # ok 3487 # SKIP Streaming SVE set SVE get FPSIMD for VL 5728
5215 22:58:22.885839 # ok 3488 # SKIP Streaming SVE set FPSIMD get SVE for VL 5728
5216 22:58:22.886048 # ok 3489 Set Streaming SVE VL 5744
5217 22:58:22.886184 # ok 3490 # SKIP Streaming SVE set SVE get SVE for VL 5744
5218 22:58:22.886305 # ok 3491 # SKIP Streaming SVE set SVE get FPSIMD for VL 5744
5219 22:58:22.886421 # ok 3492 # SKIP Streaming SVE set FPSIMD get SVE for VL 5744
5220 22:58:22.886565 # ok 3493 Set Streaming SVE VL 5760
5221 22:58:22.886687 # ok 3494 # SKIP Streaming SVE set SVE get SVE for VL 5760
5222 22:58:22.886805 # ok 3495 # SKIP Streaming SVE set SVE get FPSIMD for VL 5760
5223 22:58:22.886922 # ok 3496 # SKIP Streaming SVE set FPSIMD get SVE for VL 5760
5224 22:58:22.887039 # ok 3497 Set Streaming SVE VL 5776
5225 22:58:22.887154 # ok 3498 # SKIP Streaming SVE set SVE get SVE for VL 5776
5226 22:58:22.895489 # ok 3499 # SKIP Streaming SVE set SVE get FPSIMD for VL 5776
5227 22:58:22.895835 # ok 3500 # SKIP Streaming SVE set FPSIMD get SVE for VL 5776
5228 22:58:22.896077 # ok 3501 Set Streaming SVE VL 5792
5229 22:58:22.896259 # ok 3502 # SKIP Streaming SVE set SVE get SVE for VL 5792
5230 22:58:22.896402 # ok 3503 # SKIP Streaming SVE set SVE get FPSIMD for VL 5792
5231 22:58:22.896572 # ok 3504 # SKIP Streaming SVE set FPSIMD get SVE for VL 5792
5232 22:58:22.896769 # ok 3505 Set Streaming SVE VL 5808
5233 22:58:22.896962 # ok 3506 # SKIP Streaming SVE set SVE get SVE for VL 5808
5234 22:58:22.897156 # ok 3507 # SKIP Streaming SVE set SVE get FPSIMD for VL 5808
5235 22:58:22.897367 # ok 3508 # SKIP Streaming SVE set FPSIMD get SVE for VL 5808
5236 22:58:22.897571 # ok 3509 Set Streaming SVE VL 5824
5237 22:58:22.897766 # ok 3510 # SKIP Streaming SVE set SVE get SVE for VL 5824
5238 22:58:22.897941 # ok 3511 # SKIP Streaming SVE set SVE get FPSIMD for VL 5824
5239 22:58:22.898111 # ok 3512 # SKIP Streaming SVE set FPSIMD get SVE for VL 5824
5240 22:58:22.898254 # ok 3513 Set Streaming SVE VL 5840
5241 22:58:22.898375 # ok 3514 # SKIP Streaming SVE set SVE get SVE for VL 5840
5242 22:58:22.898495 # ok 3515 # SKIP Streaming SVE set SVE get FPSIMD for VL 5840
5243 22:58:22.898616 # ok 3516 # SKIP Streaming SVE set FPSIMD get SVE for VL 5840
5244 22:58:22.898735 # ok 3517 Set Streaming SVE VL 5856
5245 22:58:22.898853 # ok 3518 # SKIP Streaming SVE set SVE get SVE for VL 5856
5246 22:58:22.898972 # ok 3519 # SKIP Streaming SVE set SVE get FPSIMD for VL 5856
5247 22:58:22.899091 # ok 3520 # SKIP Streaming SVE set FPSIMD get SVE for VL 5856
5248 22:58:22.899235 # ok 3521 Set Streaming SVE VL 5872
5249 22:58:22.899358 # ok 3522 # SKIP Streaming SVE set SVE get SVE for VL 5872
5250 22:58:22.903142 # ok 3523 # SKIP Streaming SVE set SVE get FPSIMD for VL 5872
5251 22:58:22.903630 # ok 3524 # SKIP Streaming SVE set FPSIMD get SVE for VL 5872
5252 22:58:22.903835 # ok 3525 Set Streaming SVE VL 5888
5253 22:58:22.904037 # ok 3526 # SKIP Streaming SVE set SVE get SVE for VL 5888
5254 22:58:22.904258 # ok 3527 # SKIP Streaming SVE set SVE get FPSIMD for VL 5888
5255 22:58:22.904437 # ok 3528 # SKIP Streaming SVE set FPSIMD get SVE for VL 5888
5256 22:58:22.904612 # ok 3529 Set Streaming SVE VL 5904
5257 22:58:22.904780 # ok 3530 # SKIP Streaming SVE set SVE get SVE for VL 5904
5258 22:58:22.904947 # ok 3531 # SKIP Streaming SVE set SVE get FPSIMD for VL 5904
5259 22:58:22.905148 # ok 3532 # SKIP Streaming SVE set FPSIMD get SVE for VL 5904
5260 22:58:22.905311 # ok 3533 Set Streaming SVE VL 5920
5261 22:58:22.905448 # ok 3534 # SKIP Streaming SVE set SVE get SVE for VL 5920
5262 22:58:22.905585 # ok 3535 # SKIP Streaming SVE set SVE get FPSIMD for VL 5920
5263 22:58:22.905751 # ok 3536 # SKIP Streaming SVE set FPSIMD get SVE for VL 5920
5264 22:58:22.905928 # ok 3537 Set Streaming SVE VL 5936
5265 22:58:22.906091 # ok 3538 # SKIP Streaming SVE set SVE get SVE for VL 5936
5266 22:58:22.906243 # ok 3539 # SKIP Streaming SVE set SVE get FPSIMD for VL 5936
5267 22:58:22.906365 # ok 3540 # SKIP Streaming SVE set FPSIMD get SVE for VL 5936
5268 22:58:22.906484 # ok 3541 Set Streaming SVE VL 5952
5269 22:58:22.906601 # ok 3542 # SKIP Streaming SVE set SVE get SVE for VL 5952
5270 22:58:22.906718 # ok 3543 # SKIP Streaming SVE set SVE get FPSIMD for VL 5952
5271 22:58:22.906833 # ok 3544 # SKIP Streaming SVE set FPSIMD get SVE for VL 5952
5272 22:58:22.914940 # ok 3545 Set Streaming SVE VL 5968
5273 22:58:22.915282 # ok 3546 # SKIP Streaming SVE set SVE get SVE for VL 5968
5274 22:58:22.915769 # ok 3547 # SKIP Streaming SVE set SVE get FPSIMD for VL 5968
5275 22:58:22.916024 # ok 3548 # SKIP Streaming SVE set FPSIMD get SVE for VL 5968
5276 22:58:22.916255 # ok 3549 Set Streaming SVE VL 5984
5277 22:58:22.916440 # ok 3550 # SKIP Streaming SVE set SVE get SVE for VL 5984
5278 22:58:22.916650 # ok 3551 # SKIP Streaming SVE set SVE get FPSIMD for VL 5984
5279 22:58:22.916832 # ok 3552 # SKIP Streaming SVE set FPSIMD get SVE for VL 5984
5280 22:58:22.917047 # ok 3553 Set Streaming SVE VL 6000
5281 22:58:22.917251 # ok 3554 # SKIP Streaming SVE set SVE get SVE for VL 6000
5282 22:58:22.917462 # ok 3555 # SKIP Streaming SVE set SVE get FPSIMD for VL 6000
5283 22:58:22.917696 # ok 3556 # SKIP Streaming SVE set FPSIMD get SVE for VL 6000
5284 22:58:22.917908 # ok 3557 Set Streaming SVE VL 6016
5285 22:58:22.918148 # ok 3558 # SKIP Streaming SVE set SVE get SVE for VL 6016
5286 22:58:22.918295 # ok 3559 # SKIP Streaming SVE set SVE get FPSIMD for VL 6016
5287 22:58:22.918418 # ok 3560 # SKIP Streaming SVE set FPSIMD get SVE for VL 6016
5288 22:58:22.918537 # ok 3561 Set Streaming SVE VL 6032
5289 22:58:22.918655 # ok 3562 # SKIP Streaming SVE set SVE get SVE for VL 6032
5290 22:58:22.918772 # ok 3563 # SKIP Streaming SVE set SVE get FPSIMD for VL 6032
5291 22:58:22.918890 # ok 3564 # SKIP Streaming SVE set FPSIMD get SVE for VL 6032
5292 22:58:22.919007 # ok 3565 Set Streaming SVE VL 6048
5293 22:58:22.919124 # ok 3566 # SKIP Streaming SVE set SVE get SVE for VL 6048
5294 22:58:22.919239 # ok 3567 # SKIP Streaming SVE set SVE get FPSIMD for VL 6048
5295 22:58:22.925856 # ok 3568 # SKIP Streaming SVE set FPSIMD get SVE for VL 6048
5296 22:58:22.926233 # ok 3569 Set Streaming SVE VL 6064
5297 22:58:22.926595 # ok 3570 # SKIP Streaming SVE set SVE get SVE for VL 6064
5298 22:58:22.926732 # ok 3571 # SKIP Streaming SVE set SVE get FPSIMD for VL 6064
5299 22:58:22.931294 # ok 3572 # SKIP Streaming SVE set FPSIMD get SVE for VL 6064
5300 22:58:22.931837 # ok 3573 Set Streaming SVE VL 6080
5301 22:58:22.932079 # ok 3574 # SKIP Streaming SVE set SVE get SVE for VL 6080
5302 22:58:22.932281 # ok 3575 # SKIP Streaming SVE set SVE get FPSIMD for VL 6080
5303 22:58:22.932474 # ok 3576 # SKIP Streaming SVE set FPSIMD get SVE for VL 6080
5304 22:58:22.932722 # ok 3577 Set Streaming SVE VL 6096
5305 22:58:22.932898 # ok 3578 # SKIP Streaming SVE set SVE get SVE for VL 6096
5306 22:58:22.933093 # ok 3579 # SKIP Streaming SVE set SVE get FPSIMD for VL 6096
5307 22:58:22.933671 # ok 3580 # SKIP Streaming SVE set FPSIMD get SVE for VL 6096
5308 22:58:22.933912 # ok 3581 Set Streaming SVE VL 6112
5309 22:58:22.934135 # ok 3582 # SKIP Streaming SVE set SVE get SVE for VL 6112
5310 22:58:22.934281 # ok 3583 # SKIP Streaming SVE set SVE get FPSIMD for VL 6112
5311 22:58:22.934432 # ok 3584 # SKIP Streaming SVE set FPSIMD get SVE for VL 6112
5312 22:58:22.934557 # ok 3585 Set Streaming SVE VL 6128
5313 22:58:22.934675 # ok 3586 # SKIP Streaming SVE set SVE get SVE for VL 6128
5314 22:58:22.934793 # ok 3587 # SKIP Streaming SVE set SVE get FPSIMD for VL 6128
5315 22:58:22.934908 # ok 3588 # SKIP Streaming SVE set FPSIMD get SVE for VL 6128
5316 22:58:22.935024 # ok 3589 Set Streaming SVE VL 6144
5317 22:58:22.935140 # ok 3590 # SKIP Streaming SVE set SVE get SVE for VL 6144
5318 22:58:22.935256 # ok 3591 # SKIP Streaming SVE set SVE get FPSIMD for VL 6144
5319 22:58:22.935372 # ok 3592 # SKIP Streaming SVE set FPSIMD get SVE for VL 6144
5320 22:58:22.941537 # ok 3593 Set Streaming SVE VL 6160
5321 22:58:22.941998 # ok 3594 # SKIP Streaming SVE set SVE get SVE for VL 6160
5322 22:58:22.944451 # ok 3595 # SKIP Streaming SVE set SVE get FPSIMD for VL 6160
5323 22:58:22.944795 # ok 3596 # SKIP Streaming SVE set FPSIMD get SVE for VL 6160
5324 22:58:22.945123 # ok 3597 Set Streaming SVE VL 6176
5325 22:58:22.945452 # ok 3598 # SKIP Streaming SVE set SVE get SVE for VL 6176
5326 22:58:22.945572 # ok 3599 # SKIP Streaming SVE set SVE get FPSIMD for VL 6176
5327 22:58:22.945689 # ok 3600 # SKIP Streaming SVE set FPSIMD get SVE for VL 6176
5328 22:58:22.945778 # ok 3601 Set Streaming SVE VL 6192
5329 22:58:22.945879 # ok 3602 # SKIP Streaming SVE set SVE get SVE for VL 6192
5330 22:58:22.946178 # ok 3603 # SKIP Streaming SVE set SVE get FPSIMD for VL 6192
5331 22:58:22.946864 # ok 3604 # SKIP Streaming SVE set FPSIMD get SVE for VL 6192
5332 22:58:22.946973 # ok 3605 Set Streaming SVE VL 6208
5333 22:58:22.947259 # ok 3606 # SKIP Streaming SVE set SVE get SVE for VL 6208
5334 22:58:22.947367 # ok 3607 # SKIP Streaming SVE set SVE get FPSIMD for VL 6208
5335 22:58:22.947453 # ok 3608 # SKIP Streaming SVE set FPSIMD get SVE for VL 6208
5336 22:58:22.947553 # ok 3609 Set Streaming SVE VL 6224
5337 22:58:22.947639 # ok 3610 # SKIP Streaming SVE set SVE get SVE for VL 6224
5338 22:58:22.947737 # ok 3611 # SKIP Streaming SVE set SVE get FPSIMD for VL 6224
5339 22:58:22.948061 # ok 3612 # SKIP Streaming SVE set FPSIMD get SVE for VL 6224
5340 22:58:22.948166 # ok 3613 Set Streaming SVE VL 6240
5341 22:58:22.948470 # ok 3614 # SKIP Streaming SVE set SVE get SVE for VL 6240
5342 22:58:22.948579 # ok 3615 # SKIP Streaming SVE set SVE get FPSIMD for VL 6240
5343 22:58:22.948684 # ok 3616 # SKIP Streaming SVE set FPSIMD get SVE for VL 6240
5344 22:58:22.948786 # ok 3617 Set Streaming SVE VL 6256
5345 22:58:22.948884 # ok 3618 # SKIP Streaming SVE set SVE get SVE for VL 6256
5346 22:58:22.949179 # ok 3619 # SKIP Streaming SVE set SVE get FPSIMD for VL 6256
5347 22:58:22.949298 # ok 3620 # SKIP Streaming SVE set FPSIMD get SVE for VL 6256
5348 22:58:22.949397 # ok 3621 Set Streaming SVE VL 6272
5349 22:58:22.949699 # ok 3622 # SKIP Streaming SVE set SVE get SVE for VL 6272
5350 22:58:22.949815 # ok 3623 # SKIP Streaming SVE set SVE get FPSIMD for VL 6272
5351 22:58:22.950105 # ok 3624 # SKIP Streaming SVE set FPSIMD get SVE for VL 6272
5352 22:58:22.950203 # ok 3625 Set Streaming SVE VL 6288
5353 22:58:22.996580 # ok 3626 # SKIP Streaming SVE set SVE get SVE for VL 6288
5354 22:58:22.997014 # ok 3627 # SKIP Streaming SVE set SVE get FPSIMD for VL 6288
5355 22:58:22.997120 # ok 3628 # SKIP Streaming SVE set FPSIMD get SVE for VL 6288
5356 22:58:22.997208 # ok 3629 Set Streaming SVE VL 6304
5357 22:58:22.997308 # ok 3630 # SKIP Streaming SVE set SVE get SVE for VL 6304
5358 22:58:22.997413 # ok 3631 # SKIP Streaming SVE set SVE get FPSIMD for VL 6304
5359 22:58:22.997695 # ok 3632 # SKIP Streaming SVE set FPSIMD get SVE for VL 6304
5360 22:58:22.997800 # ok 3633 Set Streaming SVE VL 6320
5361 22:58:22.997901 # ok 3634 # SKIP Streaming SVE set SVE get SVE for VL 6320
5362 22:58:22.998001 # ok 3635 # SKIP Streaming SVE set SVE get FPSIMD for VL 6320
5363 22:58:23.002947 # ok 3636 # SKIP Streaming SVE set FPSIMD get SVE for VL 6320
5364 22:58:23.003080 # ok 3637 Set Streaming SVE VL 6336
5365 22:58:23.003405 # ok 3638 # SKIP Streaming SVE set SVE get SVE for VL 6336
5366 22:58:23.003605 # ok 3639 # SKIP Streaming SVE set SVE get FPSIMD for VL 6336
5367 22:58:23.003775 # ok 3640 # SKIP Streaming SVE set FPSIMD get SVE for VL 6336
5368 22:58:23.003989 # ok 3641 Set Streaming SVE VL 6352
5369 22:58:23.004201 # ok 3642 # SKIP Streaming SVE set SVE get SVE for VL 6352
5370 22:58:23.004379 # ok 3643 # SKIP Streaming SVE set SVE get FPSIMD for VL 6352
5371 22:58:23.004517 # ok 3644 # SKIP Streaming SVE set FPSIMD get SVE for VL 6352
5372 22:58:23.004672 # ok 3645 Set Streaming SVE VL 6368
5373 22:58:23.004801 # ok 3646 # SKIP Streaming SVE set SVE get SVE for VL 6368
5374 22:58:23.004935 # ok 3647 # SKIP Streaming SVE set SVE get FPSIMD for VL 6368
5375 22:58:23.005079 # ok 3648 # SKIP Streaming SVE set FPSIMD get SVE for VL 6368
5376 22:58:23.005225 # ok 3649 Set Streaming SVE VL 6384
5377 22:58:23.005409 # ok 3650 # SKIP Streaming SVE set SVE get SVE for VL 6384
5378 22:58:23.005554 # ok 3651 # SKIP Streaming SVE set SVE get FPSIMD for VL 6384
5379 22:58:23.005694 # ok 3652 # SKIP Streaming SVE set FPSIMD get SVE for VL 6384
5380 22:58:23.005852 # ok 3653 Set Streaming SVE VL 6400
5381 22:58:23.005986 # ok 3654 # SKIP Streaming SVE set SVE get SVE for VL 6400
5382 22:58:23.006111 # ok 3655 # SKIP Streaming SVE set SVE get FPSIMD for VL 6400
5383 22:58:23.006235 # ok 3656 # SKIP Streaming SVE set FPSIMD get SVE for VL 6400
5384 22:58:23.006353 # ok 3657 Set Streaming SVE VL 6416
5385 22:58:23.006471 # ok 3658 # SKIP Streaming SVE set SVE get SVE for VL 6416
5386 22:58:23.006587 # ok 3659 # SKIP Streaming SVE set SVE get FPSIMD for VL 6416
5387 22:58:23.006726 # ok 3660 # SKIP Streaming SVE set FPSIMD get SVE for VL 6416
5388 22:58:23.006847 # ok 3661 Set Streaming SVE VL 6432
5389 22:58:23.006963 # ok 3662 # SKIP Streaming SVE set SVE get SVE for VL 6432
5390 22:58:23.008630 # ok 3663 # SKIP Streaming SVE set SVE get FPSIMD for VL 6432
5391 22:58:23.008735 # ok 3664 # SKIP Streaming SVE set FPSIMD get SVE for VL 6432
5392 22:58:23.008832 # ok 3665 Set Streaming SVE VL 6448
5393 22:58:23.008913 # ok 3666 # SKIP Streaming SVE set SVE get SVE for VL 6448
5394 22:58:23.009232 # ok 3667 # SKIP Streaming SVE set SVE get FPSIMD for VL 6448
5395 22:58:23.009335 # ok 3668 # SKIP Streaming SVE set FPSIMD get SVE for VL 6448
5396 22:58:23.009429 # ok 3669 Set Streaming SVE VL 6464
5397 22:58:23.009853 # ok 3670 # SKIP Streaming SVE set SVE get SVE for VL 6464
5398 22:58:23.009955 # ok 3671 # SKIP Streaming SVE set SVE get FPSIMD for VL 6464
5399 22:58:23.010051 # ok 3672 # SKIP Streaming SVE set FPSIMD get SVE for VL 6464
5400 22:58:23.010132 # ok 3673 Set Streaming SVE VL 6480
5401 22:58:23.010222 # ok 3674 # SKIP Streaming SVE set SVE get SVE for VL 6480
5402 22:58:23.019541 # ok 3675 # SKIP Streaming SVE set SVE get FPSIMD for VL 6480
5403 22:58:23.020015 # ok 3676 # SKIP Streaming SVE set FPSIMD get SVE for VL 6480
5404 22:58:23.020125 # ok 3677 Set Streaming SVE VL 6496
5405 22:58:23.020217 # ok 3678 # SKIP Streaming SVE set SVE get SVE for VL 6496
5406 22:58:23.020305 # ok 3679 # SKIP Streaming SVE set SVE get FPSIMD for VL 6496
5407 22:58:23.020597 # ok 3680 # SKIP Streaming SVE set FPSIMD get SVE for VL 6496
5408 22:58:23.020709 # ok 3681 Set Streaming SVE VL 6512
5409 22:58:23.020804 # ok 3682 # SKIP Streaming SVE set SVE get SVE for VL 6512
5410 22:58:23.020893 # ok 3683 # SKIP Streaming SVE set SVE get FPSIMD for VL 6512
5411 22:58:23.020998 # ok 3684 # SKIP Streaming SVE set FPSIMD get SVE for VL 6512
5412 22:58:23.021091 # ok 3685 Set Streaming SVE VL 6528
5413 22:58:23.021195 # ok 3686 # SKIP Streaming SVE set SVE get SVE for VL 6528
5414 22:58:23.021288 # ok 3687 # SKIP Streaming SVE set SVE get FPSIMD for VL 6528
5415 22:58:23.021393 # ok 3688 # SKIP Streaming SVE set FPSIMD get SVE for VL 6528
5416 22:58:23.021503 # ok 3689 Set Streaming SVE VL 6544
5417 22:58:23.021589 # ok 3690 # SKIP Streaming SVE set SVE get SVE for VL 6544
5418 22:58:23.021702 # ok 3691 # SKIP Streaming SVE set SVE get FPSIMD for VL 6544
5419 22:58:23.021809 # ok 3692 # SKIP Streaming SVE set FPSIMD get SVE for VL 6544
5420 22:58:23.021916 # ok 3693 Set Streaming SVE VL 6560
5421 22:58:23.022219 # ok 3694 # SKIP Streaming SVE set SVE get SVE for VL 6560
5422 22:58:23.026837 # ok 3695 # SKIP Streaming SVE set SVE get FPSIMD for VL 6560
5423 22:58:23.027285 # ok 3696 # SKIP Streaming SVE set FPSIMD get SVE for VL 6560
5424 22:58:23.027394 # ok 3697 Set Streaming SVE VL 6576
5425 22:58:23.027487 # ok 3698 # SKIP Streaming SVE set SVE get SVE for VL 6576
5426 22:58:23.027594 # ok 3699 # SKIP Streaming SVE set SVE get FPSIMD for VL 6576
5427 22:58:23.027700 # ok 3700 # SKIP Streaming SVE set FPSIMD get SVE for VL 6576
5428 22:58:23.027789 # ok 3701 Set Streaming SVE VL 6592
5429 22:58:23.028101 # ok 3702 # SKIP Streaming SVE set SVE get SVE for VL 6592
5430 22:58:23.028208 # ok 3703 # SKIP Streaming SVE set SVE get FPSIMD for VL 6592
5431 22:58:23.028315 # ok 3704 # SKIP Streaming SVE set FPSIMD get SVE for VL 6592
5432 22:58:23.028404 # ok 3705 Set Streaming SVE VL 6608
5433 22:58:23.028506 # ok 3706 # SKIP Streaming SVE set SVE get SVE for VL 6608
5434 22:58:23.028609 # ok 3707 # SKIP Streaming SVE set SVE get FPSIMD for VL 6608
5435 22:58:23.028934 # ok 3708 # SKIP Streaming SVE set FPSIMD get SVE for VL 6608
5436 22:58:23.029041 # ok 3709 Set Streaming SVE VL 6624
5437 22:58:23.029331 # ok 3710 # SKIP Streaming SVE set SVE get SVE for VL 6624
5438 22:58:23.029445 # ok 3711 # SKIP Streaming SVE set SVE get FPSIMD for VL 6624
5439 22:58:23.029552 # ok 3712 # SKIP Streaming SVE set FPSIMD get SVE for VL 6624
5440 22:58:23.029642 # ok 3713 Set Streaming SVE VL 6640
5441 22:58:23.029751 # ok 3714 # SKIP Streaming SVE set SVE get SVE for VL 6640
5442 22:58:23.029856 # ok 3715 # SKIP Streaming SVE set SVE get FPSIMD for VL 6640
5443 22:58:23.029960 # ok 3716 # SKIP Streaming SVE set FPSIMD get SVE for VL 6640
5444 22:58:23.030264 # ok 3717 Set Streaming SVE VL 6656
5445 22:58:23.030371 # ok 3718 # SKIP Streaming SVE set SVE get SVE for VL 6656
5446 22:58:23.036321 # ok 3719 # SKIP Streaming SVE set SVE get FPSIMD for VL 6656
5447 22:58:23.036739 # ok 3720 # SKIP Streaming SVE set FPSIMD get SVE for VL 6656
5448 22:58:23.036849 # ok 3721 Set Streaming SVE VL 6672
5449 22:58:23.036944 # ok 3722 # SKIP Streaming SVE set SVE get SVE for VL 6672
5450 22:58:23.037052 # ok 3723 # SKIP Streaming SVE set SVE get FPSIMD for VL 6672
5451 22:58:23.037163 # ok 3724 # SKIP Streaming SVE set FPSIMD get SVE for VL 6672
5452 22:58:23.037258 # ok 3725 Set Streaming SVE VL 6688
5453 22:58:23.037368 # ok 3726 # SKIP Streaming SVE set SVE get SVE for VL 6688
5454 22:58:23.037474 # ok 3727 # SKIP Streaming SVE set SVE get FPSIMD for VL 6688
5455 22:58:23.037574 # ok 3728 # SKIP Streaming SVE set FPSIMD get SVE for VL 6688
5456 22:58:23.037918 # ok 3729 Set Streaming SVE VL 6704
5457 22:58:23.038025 # ok 3730 # SKIP Streaming SVE set SVE get SVE for VL 6704
5458 22:58:23.038336 # ok 3731 # SKIP Streaming SVE set SVE get FPSIMD for VL 6704
5459 22:58:23.038445 # ok 3732 # SKIP Streaming SVE set FPSIMD get SVE for VL 6704
5460 22:58:23.042937 # ok 3733 Set Streaming SVE VL 6720
5461 22:58:23.043273 # ok 3734 # SKIP Streaming SVE set SVE get SVE for VL 6720
5462 22:58:23.043371 # ok 3735 # SKIP Streaming SVE set SVE get FPSIMD for VL 6720
5463 22:58:23.043665 # ok 3736 # SKIP Streaming SVE set FPSIMD get SVE for VL 6720
5464 22:58:23.043762 # ok 3737 Set Streaming SVE VL 6736
5465 22:58:23.043864 # ok 3738 # SKIP Streaming SVE set SVE get SVE for VL 6736
5466 22:58:23.043966 # ok 3739 # SKIP Streaming SVE set SVE get FPSIMD for VL 6736
5467 22:58:23.044256 # ok 3740 # SKIP Streaming SVE set FPSIMD get SVE for VL 6736
5468 22:58:23.044354 # ok 3741 Set Streaming SVE VL 6752
5469 22:58:23.044650 # ok 3742 # SKIP Streaming SVE set SVE get SVE for VL 6752
5470 22:58:23.044769 # ok 3743 # SKIP Streaming SVE set SVE get FPSIMD for VL 6752
5471 22:58:23.044865 # ok 3744 # SKIP Streaming SVE set FPSIMD get SVE for VL 6752
5472 22:58:23.044976 # ok 3745 Set Streaming SVE VL 6768
5473 22:58:23.045072 # ok 3746 # SKIP Streaming SVE set SVE get SVE for VL 6768
5474 22:58:23.045371 # ok 3747 # SKIP Streaming SVE set SVE get FPSIMD for VL 6768
5475 22:58:23.045472 # ok 3748 # SKIP Streaming SVE set FPSIMD get SVE for VL 6768
5476 22:58:23.045581 # ok 3749 Set Streaming SVE VL 6784
5477 22:58:23.045686 # ok 3750 # SKIP Streaming SVE set SVE get SVE for VL 6784
5478 22:58:23.045988 # ok 3751 # SKIP Streaming SVE set SVE get FPSIMD for VL 6784
5479 22:58:23.046085 # ok 3752 # SKIP Streaming SVE set FPSIMD get SVE for VL 6784
5480 22:58:23.046188 # ok 3753 Set Streaming SVE VL 6800
5481 22:58:23.046277 # ok 3754 # SKIP Streaming SVE set SVE get SVE for VL 6800
5482 22:58:23.060927 # ok 3755 # SKIP Streaming SVE set SVE get FPSIMD for VL 6800
5483 22:58:23.061173 # ok 3756 # SKIP Streaming SVE set FPSIMD get SVE for VL 6800
5484 22:58:23.061272 # ok 3757 Set Streaming SVE VL 6816
5485 22:58:23.061367 # ok 3758 # SKIP Streaming SVE set SVE get SVE for VL 6816
5486 22:58:23.061475 # ok 3759 # SKIP Streaming SVE set SVE get FPSIMD for VL 6816
5487 22:58:23.061585 # ok 3760 # SKIP Streaming SVE set FPSIMD get SVE for VL 6816
5488 22:58:23.061689 # ok 3761 Set Streaming SVE VL 6832
5489 22:58:23.061799 # ok 3762 # SKIP Streaming SVE set SVE get SVE for VL 6832
5490 22:58:23.061912 # ok 3763 # SKIP Streaming SVE set SVE get FPSIMD for VL 6832
5491 22:58:23.062266 # ok 3764 # SKIP Streaming SVE set FPSIMD get SVE for VL 6832
5492 22:58:23.062375 # ok 3765 Set Streaming SVE VL 6848
5493 22:58:23.071135 # ok 3766 # SKIP Streaming SVE set SVE get SVE for VL 6848
5494 22:58:23.071515 # ok 3767 # SKIP Streaming SVE set SVE get FPSIMD for VL 6848
5495 22:58:23.071619 # ok 3768 # SKIP Streaming SVE set FPSIMD get SVE for VL 6848
5496 22:58:23.071721 # ok 3769 Set Streaming SVE VL 6864
5497 22:58:23.071809 # ok 3770 # SKIP Streaming SVE set SVE get SVE for VL 6864
5498 22:58:23.071910 # ok 3771 # SKIP Streaming SVE set SVE get FPSIMD for VL 6864
5499 22:58:23.071998 # ok 3772 # SKIP Streaming SVE set FPSIMD get SVE for VL 6864
5500 22:58:23.072099 # ok 3773 Set Streaming SVE VL 6880
5501 22:58:23.072392 # ok 3774 # SKIP Streaming SVE set SVE get SVE for VL 6880
5502 22:58:23.074003 # ok 3775 # SKIP Streaming SVE set SVE get FPSIMD for VL 6880
5503 22:58:23.074315 # ok 3776 # SKIP Streaming SVE set FPSIMD get SVE for VL 6880
5504 22:58:23.074411 # ok 3777 Set Streaming SVE VL 6896
5505 22:58:23.075557 # ok 3778 # SKIP Streaming SVE set SVE get SVE for VL 6896
5506 22:58:23.076164 # ok 3779 # SKIP Streaming SVE set SVE get FPSIMD for VL 6896
5507 22:58:23.076314 # ok 3780 # SKIP Streaming SVE set FPSIMD get SVE for VL 6896
5508 22:58:23.076402 # ok 3781 Set Streaming SVE VL 6912
5509 22:58:23.076485 # ok 3782 # SKIP Streaming SVE set SVE get SVE for VL 6912
5510 22:58:23.076770 # ok 3783 # SKIP Streaming SVE set SVE get FPSIMD for VL 6912
5511 22:58:23.076875 # ok 3784 # SKIP Streaming SVE set FPSIMD get SVE for VL 6912
5512 22:58:23.076962 # ok 3785 Set Streaming SVE VL 6928
5513 22:58:23.077047 # ok 3786 # SKIP Streaming SVE set SVE get SVE for VL 6928
5514 22:58:23.077130 # ok 3787 # SKIP Streaming SVE set SVE get FPSIMD for VL 6928
5515 22:58:23.077230 # ok 3788 # SKIP Streaming SVE set FPSIMD get SVE for VL 6928
5516 22:58:23.077317 # ok 3789 Set Streaming SVE VL 6944
5517 22:58:23.077400 # ok 3790 # SKIP Streaming SVE set SVE get SVE for VL 6944
5518 22:58:23.077498 # ok 3791 # SKIP Streaming SVE set SVE get FPSIMD for VL 6944
5519 22:58:23.077601 # ok 3792 # SKIP Streaming SVE set FPSIMD get SVE for VL 6944
5520 22:58:23.077697 # ok 3793 Set Streaming SVE VL 6960
5521 22:58:23.077797 # ok 3794 # SKIP Streaming SVE set SVE get SVE for VL 6960
5522 22:58:23.078134 # ok 3795 # SKIP Streaming SVE set SVE get FPSIMD for VL 6960
5523 22:58:23.078240 # ok 3796 # SKIP Streaming SVE set FPSIMD get SVE for VL 6960
5524 22:58:23.078340 # ok 3797 Set Streaming SVE VL 6976
5525 22:58:23.086879 # ok 3798 # SKIP Streaming SVE set SVE get SVE for VL 6976
5526 22:58:23.087069 # ok 3799 # SKIP Streaming SVE set SVE get FPSIMD for VL 6976
5527 22:58:23.087160 # ok 3800 # SKIP Streaming SVE set FPSIMD get SVE for VL 6976
5528 22:58:23.087444 # ok 3801 Set Streaming SVE VL 6992
5529 22:58:23.087553 # ok 3802 # SKIP Streaming SVE set SVE get SVE for VL 6992
5530 22:58:23.087642 # ok 3803 # SKIP Streaming SVE set SVE get FPSIMD for VL 6992
5531 22:58:23.087728 # ok 3804 # SKIP Streaming SVE set FPSIMD get SVE for VL 6992
5532 22:58:23.087814 # ok 3805 Set Streaming SVE VL 7008
5533 22:58:23.087917 # ok 3806 # SKIP Streaming SVE set SVE get SVE for VL 7008
5534 22:58:23.088004 # ok 3807 # SKIP Streaming SVE set SVE get FPSIMD for VL 7008
5535 22:58:23.088090 # ok 3808 # SKIP Streaming SVE set FPSIMD get SVE for VL 7008
5536 22:58:23.088176 # ok 3809 Set Streaming SVE VL 7024
5537 22:58:23.088276 # ok 3810 # SKIP Streaming SVE set SVE get SVE for VL 7024
5538 22:58:23.088363 # ok 3811 # SKIP Streaming SVE set SVE get FPSIMD for VL 7024
5539 22:58:23.088463 # ok 3812 # SKIP Streaming SVE set FPSIMD get SVE for VL 7024
5540 22:58:23.088552 # ok 3813 Set Streaming SVE VL 7040
5541 22:58:23.088652 # ok 3814 # SKIP Streaming SVE set SVE get SVE for VL 7040
5542 22:58:23.088952 # ok 3815 # SKIP Streaming SVE set SVE get FPSIMD for VL 7040
5543 22:58:23.089057 # ok 3816 # SKIP Streaming SVE set FPSIMD get SVE for VL 7040
5544 22:58:23.089145 # ok 3817 Set Streaming SVE VL 7056
5545 22:58:23.089247 # ok 3818 # SKIP Streaming SVE set SVE get SVE for VL 7056
5546 22:58:23.089348 # ok 3819 # SKIP Streaming SVE set SVE get FPSIMD for VL 7056
5547 22:58:23.089434 # ok 3820 # SKIP Streaming SVE set FPSIMD get SVE for VL 7056
5548 22:58:23.089536 # ok 3821 Set Streaming SVE VL 7072
5549 22:58:23.089628 # ok 3822 # SKIP Streaming SVE set SVE get SVE for VL 7072
5550 22:58:23.089736 # ok 3823 # SKIP Streaming SVE set SVE get FPSIMD for VL 7072
5551 22:58:23.089836 # ok 3824 # SKIP Streaming SVE set FPSIMD get SVE for VL 7072
5552 22:58:23.089935 # ok 3825 Set Streaming SVE VL 7088
5553 22:58:23.090374 # ok 3826 # SKIP Streaming SVE set SVE get SVE for VL 7088
5554 22:58:23.090480 # ok 3827 # SKIP Streaming SVE set SVE get FPSIMD for VL 7088
5555 22:58:23.090569 # ok 3828 # SKIP Streaming SVE set FPSIMD get SVE for VL 7088
5556 22:58:23.095006 # ok 3829 Set Streaming SVE VL 7104
5557 22:58:23.095384 # ok 3830 # SKIP Streaming SVE set SVE get SVE for VL 7104
5558 22:58:23.095495 # ok 3831 # SKIP Streaming SVE set SVE get FPSIMD for VL 7104
5559 22:58:23.095918 # ok 3832 # SKIP Streaming SVE set FPSIMD get SVE for VL 7104
5560 22:58:23.096028 # ok 3833 Set Streaming SVE VL 7120
5561 22:58:23.096121 # ok 3834 # SKIP Streaming SVE set SVE get SVE for VL 7120
5562 22:58:23.096228 # ok 3835 # SKIP Streaming SVE set SVE get FPSIMD for VL 7120
5563 22:58:23.096319 # ok 3836 # SKIP Streaming SVE set FPSIMD get SVE for VL 7120
5564 22:58:23.096405 # ok 3837 Set Streaming SVE VL 7136
5565 22:58:23.096491 # ok 3838 # SKIP Streaming SVE set SVE get SVE for VL 7136
5566 22:58:23.096594 # ok 3839 # SKIP Streaming SVE set SVE get FPSIMD for VL 7136
5567 22:58:23.096683 # ok 3840 # SKIP Streaming SVE set FPSIMD get SVE for VL 7136
5568 22:58:23.096769 # ok 3841 Set Streaming SVE VL 7152
5569 22:58:23.096870 # ok 3842 # SKIP Streaming SVE set SVE get SVE for VL 7152
5570 22:58:23.096959 # ok 3843 # SKIP Streaming SVE set SVE get FPSIMD for VL 7152
5571 22:58:23.097061 # ok 3844 # SKIP Streaming SVE set FPSIMD get SVE for VL 7152
5572 22:58:23.097149 # ok 3845 Set Streaming SVE VL 7168
5573 22:58:23.097251 # ok 3846 # SKIP Streaming SVE set SVE get SVE for VL 7168
5574 22:58:23.097692 # ok 3847 # SKIP Streaming SVE set SVE get FPSIMD for VL 7168
5575 22:58:23.097796 # ok 3848 # SKIP Streaming SVE set FPSIMD get SVE for VL 7168
5576 22:58:23.097904 # ok 3849 Set Streaming SVE VL 7184
5577 22:58:23.097995 # ok 3850 # SKIP Streaming SVE set SVE get SVE for VL 7184
5578 22:58:23.098082 # ok 3851 # SKIP Streaming SVE set SVE get FPSIMD for VL 7184
5579 22:58:23.098350 # ok 3852 # SKIP Streaming SVE set FPSIMD get SVE for VL 7184
5580 22:58:23.098520 # ok 3853 Set Streaming SVE VL 7200
5581 22:58:23.102954 # ok 3854 # SKIP Streaming SVE set SVE get SVE for VL 7200
5582 22:58:23.103273 # ok 3855 # SKIP Streaming SVE set SVE get FPSIMD for VL 7200
5583 22:58:23.103375 # ok 3856 # SKIP Streaming SVE set FPSIMD get SVE for VL 7200
5584 22:58:23.103477 # ok 3857 Set Streaming SVE VL 7216
5585 22:58:23.103568 # ok 3858 # SKIP Streaming SVE set SVE get SVE for VL 7216
5586 22:58:23.103672 # ok 3859 # SKIP Streaming SVE set SVE get FPSIMD for VL 7216
5587 22:58:23.105488 # ok 3860 # SKIP Streaming SVE set FPSIMD get SVE for VL 7216
5588 22:58:23.105601 # ok 3861 Set Streaming SVE VL 7232
5589 22:58:23.105704 # ok 3862 # SKIP Streaming SVE set SVE get SVE for VL 7232
5590 22:58:23.105794 # ok 3863 # SKIP Streaming SVE set SVE get FPSIMD for VL 7232
5591 22:58:23.105881 # ok 3864 # SKIP Streaming SVE set FPSIMD get SVE for VL 7232
5592 22:58:23.105969 # ok 3865 Set Streaming SVE VL 7248
5593 22:58:23.106057 # ok 3866 # SKIP Streaming SVE set SVE get SVE for VL 7248
5594 22:58:23.109404 # ok 3867 # SKIP Streaming SVE set SVE get FPSIMD for VL 7248
5595 22:58:23.109510 # ok 3868 # SKIP Streaming SVE set FPSIMD get SVE for VL 7248
5596 22:58:23.109597 # ok 3869 Set Streaming SVE VL 7264
5597 22:58:23.109692 # ok 3870 # SKIP Streaming SVE set SVE get SVE for VL 7264
5598 22:58:23.109807 # ok 3871 # SKIP Streaming SVE set SVE get FPSIMD for VL 7264
5599 22:58:23.109895 # ok 3872 # SKIP Streaming SVE set FPSIMD get SVE for VL 7264
5600 22:58:23.109979 # ok 3873 Set Streaming SVE VL 7280
5601 22:58:23.110060 # ok 3874 # SKIP Streaming SVE set SVE get SVE for VL 7280
5602 22:58:23.110671 # ok 3875 # SKIP Streaming SVE set SVE get FPSIMD for VL 7280
5603 22:58:23.110970 # ok 3876 # SKIP Streaming SVE set FPSIMD get SVE for VL 7280
5604 22:58:23.111070 # ok 3877 Set Streaming SVE VL 7296
5605 22:58:23.111178 # ok 3878 # SKIP Streaming SVE set SVE get SVE for VL 7296
5606 22:58:23.111288 # ok 3879 # SKIP Streaming SVE set SVE get FPSIMD for VL 7296
5607 22:58:23.111397 # ok 3880 # SKIP Streaming SVE set FPSIMD get SVE for VL 7296
5608 22:58:23.111697 # ok 3881 Set Streaming SVE VL 7312
5609 22:58:23.111797 # ok 3882 # SKIP Streaming SVE set SVE get SVE for VL 7312
5610 22:58:23.111905 # ok 3883 # SKIP Streaming SVE set SVE get FPSIMD for VL 7312
5611 22:58:23.112221 # ok 3884 # SKIP Streaming SVE set FPSIMD get SVE for VL 7312
5612 22:58:23.112317 # ok 3885 Set Streaming SVE VL 7328
5613 22:58:23.112417 # ok 3886 # SKIP Streaming SVE set SVE get SVE for VL 7328
5614 22:58:23.112520 # ok 3887 # SKIP Streaming SVE set SVE get FPSIMD for VL 7328
5615 22:58:23.112826 # ok 3888 # SKIP Streaming SVE set FPSIMD get SVE for VL 7328
5616 22:58:23.112942 # ok 3889 Set Streaming SVE VL 7344
5617 22:58:23.113062 # ok 3890 # SKIP Streaming SVE set SVE get SVE for VL 7344
5618 22:58:23.113368 # ok 3891 # SKIP Streaming SVE set SVE get FPSIMD for VL 7344
5619 22:58:23.113514 # ok 3892 # SKIP Streaming SVE set FPSIMD get SVE for VL 7344
5620 22:58:23.113624 # ok 3893 Set Streaming SVE VL 7360
5621 22:58:23.113723 # ok 3894 # SKIP Streaming SVE set SVE get SVE for VL 7360
5622 22:58:23.114023 # ok 3895 # SKIP Streaming SVE set SVE get FPSIMD for VL 7360
5623 22:58:23.114122 # ok 3896 # SKIP Streaming SVE set FPSIMD get SVE for VL 7360
5624 22:58:23.114228 # ok 3897 Set Streaming SVE VL 7376
5625 22:58:23.118602 # ok 3898 # SKIP Streaming SVE set SVE get SVE for VL 7376
5626 22:58:23.118990 # ok 3899 # SKIP Streaming SVE set SVE get FPSIMD for VL 7376
5627 22:58:23.119083 # ok 3900 # SKIP Streaming SVE set FPSIMD get SVE for VL 7376
5628 22:58:23.119376 # ok 3901 Set Streaming SVE VL 7392
5629 22:58:23.119474 # ok 3902 # SKIP Streaming SVE set SVE get SVE for VL 7392
5630 22:58:23.119584 # ok 3903 # SKIP Streaming SVE set SVE get FPSIMD for VL 7392
5631 22:58:23.119679 # ok 3904 # SKIP Streaming SVE set FPSIMD get SVE for VL 7392
5632 22:58:23.119772 # ok 3905 Set Streaming SVE VL 7408
5633 22:58:23.119881 # ok 3906 # SKIP Streaming SVE set SVE get SVE for VL 7408
5634 22:58:23.119984 # ok 3907 # SKIP Streaming SVE set SVE get FPSIMD for VL 7408
5635 22:58:23.120085 # ok 3908 # SKIP Streaming SVE set FPSIMD get SVE for VL 7408
5636 22:58:23.120361 # ok 3909 Set Streaming SVE VL 7424
5637 22:58:23.120737 # ok 3910 # SKIP Streaming SVE set SVE get SVE for VL 7424
5638 22:58:23.120833 # ok 3911 # SKIP Streaming SVE set SVE get FPSIMD for VL 7424
5639 22:58:23.120917 # ok 3912 # SKIP Streaming SVE set FPSIMD get SVE for VL 7424
5640 22:58:23.121001 # ok 3913 Set Streaming SVE VL 7440
5641 22:58:23.121321 # ok 3914 # SKIP Streaming SVE set SVE get SVE for VL 7440
5642 22:58:23.121448 # ok 3915 # SKIP Streaming SVE set SVE get FPSIMD for VL 7440
5643 22:58:23.121567 # ok 3916 # SKIP Streaming SVE set FPSIMD get SVE for VL 7440
5644 22:58:23.121667 # ok 3917 Set Streaming SVE VL 7456
5645 22:58:23.121759 # ok 3918 # SKIP Streaming SVE set SVE get SVE for VL 7456
5646 22:58:23.121867 # ok 3919 # SKIP Streaming SVE set SVE get FPSIMD for VL 7456
5647 22:58:23.121957 # ok 3920 # SKIP Streaming SVE set FPSIMD get SVE for VL 7456
5648 22:58:23.122042 # ok 3921 Set Streaming SVE VL 7472
5649 22:58:23.122143 # ok 3922 # SKIP Streaming SVE set SVE get SVE for VL 7472
5650 22:58:23.122230 # ok 3923 # SKIP Streaming SVE set SVE get FPSIMD for VL 7472
5651 22:58:23.122333 # ok 3924 # SKIP Streaming SVE set FPSIMD get SVE for VL 7472
5652 22:58:23.128290 # ok 3925 Set Streaming SVE VL 7488
5653 22:58:23.128690 # ok 3926 # SKIP Streaming SVE set SVE get SVE for VL 7488
5654 22:58:23.128793 # ok 3927 # SKIP Streaming SVE set SVE get FPSIMD for VL 7488
5655 22:58:23.128880 # ok 3928 # SKIP Streaming SVE set FPSIMD get SVE for VL 7488
5656 22:58:23.128980 # ok 3929 Set Streaming SVE VL 7504
5657 22:58:23.129066 # ok 3930 # SKIP Streaming SVE set SVE get SVE for VL 7504
5658 22:58:23.129150 # ok 3931 # SKIP Streaming SVE set SVE get FPSIMD for VL 7504
5659 22:58:23.129234 # ok 3932 # SKIP Streaming SVE set FPSIMD get SVE for VL 7504
5660 22:58:23.133359 # ok 3933 Set Streaming SVE VL 7520
5661 22:58:23.133505 # ok 3934 # SKIP Streaming SVE set SVE get SVE for VL 7520
5662 22:58:23.133593 # ok 3935 # SKIP Streaming SVE set SVE get FPSIMD for VL 7520
5663 22:58:23.133692 # ok 3936 # SKIP Streaming SVE set FPSIMD get SVE for VL 7520
5664 22:58:23.133776 # ok 3937 Set Streaming SVE VL 7536
5665 22:58:23.133862 # ok 3938 # SKIP Streaming SVE set SVE get SVE for VL 7536
5666 22:58:23.137426 # ok 3939 # SKIP Streaming SVE set SVE get FPSIMD for VL 7536
5667 22:58:23.137557 # ok 3940 # SKIP Streaming SVE set FPSIMD get SVE for VL 7536
5668 22:58:23.137626 # ok 3941 Set Streaming SVE VL 7552
5669 22:58:23.137701 # ok 3942 # SKIP Streaming SVE set SVE get SVE for VL 7552
5670 22:58:23.137762 # ok 3943 # SKIP Streaming SVE set SVE get FPSIMD for VL 7552
5671 22:58:23.137820 # ok 3944 # SKIP Streaming SVE set FPSIMD get SVE for VL 7552
5672 22:58:23.137878 # ok 3945 Set Streaming SVE VL 7568
5673 22:58:23.137936 # ok 3946 # SKIP Streaming SVE set SVE get SVE for VL 7568
5674 22:58:23.137994 # ok 3947 # SKIP Streaming SVE set SVE get FPSIMD for VL 7568
5675 22:58:23.138052 # ok 3948 # SKIP Streaming SVE set FPSIMD get SVE for VL 7568
5676 22:58:23.138111 # ok 3949 Set Streaming SVE VL 7584
5677 22:58:23.138202 # ok 3950 # SKIP Streaming SVE set SVE get SVE for VL 7584
5678 22:58:23.138267 # ok 3951 # SKIP Streaming SVE set SVE get FPSIMD for VL 7584
5679 22:58:23.138334 # ok 3952 # SKIP Streaming SVE set FPSIMD get SVE for VL 7584
5680 22:58:23.138415 # ok 3953 Set Streaming SVE VL 7600
5681 22:58:23.138485 # ok 3954 # SKIP Streaming SVE set SVE get SVE for VL 7600
5682 22:58:23.138552 # ok 3955 # SKIP Streaming SVE set SVE get FPSIMD for VL 7600
5683 22:58:23.138616 # ok 3956 # SKIP Streaming SVE set FPSIMD get SVE for VL 7600
5684 22:58:23.138680 # ok 3957 Set Streaming SVE VL 7616
5685 22:58:23.138739 # ok 3958 # SKIP Streaming SVE set SVE get SVE for VL 7616
5686 22:58:23.138797 # ok 3959 # SKIP Streaming SVE set SVE get FPSIMD for VL 7616
5687 22:58:23.138857 # ok 3960 # SKIP Streaming SVE set FPSIMD get SVE for VL 7616
5688 22:58:23.138916 # ok 3961 Set Streaming SVE VL 7632
5689 22:58:23.138976 # ok 3962 # SKIP Streaming SVE set SVE get SVE for VL 7632
5690 22:58:23.139035 # ok 3963 # SKIP Streaming SVE set SVE get FPSIMD for VL 7632
5691 22:58:23.139094 # ok 3964 # SKIP Streaming SVE set FPSIMD get SVE for VL 7632
5692 22:58:23.139153 # ok 3965 Set Streaming SVE VL 7648
5693 22:58:23.139214 # ok 3966 # SKIP Streaming SVE set SVE get SVE for VL 7648
5694 22:58:23.139272 # ok 3967 # SKIP Streaming SVE set SVE get FPSIMD for VL 7648
5695 22:58:23.139332 # ok 3968 # SKIP Streaming SVE set FPSIMD get SVE for VL 7648
5696 22:58:23.139391 # ok 3969 Set Streaming SVE VL 7664
5697 22:58:23.139451 # ok 3970 # SKIP Streaming SVE set SVE get SVE for VL 7664
5698 22:58:23.139511 # ok 3971 # SKIP Streaming SVE set SVE get FPSIMD for VL 7664
5699 22:58:23.139570 # ok 3972 # SKIP Streaming SVE set FPSIMD get SVE for VL 7664
5700 22:58:23.139630 # ok 3973 Set Streaming SVE VL 7680
5701 22:58:23.139893 # ok 3974 # SKIP Streaming SVE set SVE get SVE for VL 7680
5702 22:58:23.139960 # ok 3975 # SKIP Streaming SVE set SVE get FPSIMD for VL 7680
5703 22:58:23.140022 # ok 3976 # SKIP Streaming SVE set FPSIMD get SVE for VL 7680
5704 22:58:23.140081 # ok 3977 Set Streaming SVE VL 7696
5705 22:58:23.140142 # ok 3978 # SKIP Streaming SVE set SVE get SVE for VL 7696
5706 22:58:23.140202 # ok 3979 # SKIP Streaming SVE set SVE get FPSIMD for VL 7696
5707 22:58:23.140262 # ok 3980 # SKIP Streaming SVE set FPSIMD get SVE for VL 7696
5708 22:58:23.140322 # ok 3981 Set Streaming SVE VL 7712
5709 22:58:23.140382 # ok 3982 # SKIP Streaming SVE set SVE get SVE for VL 7712
5710 22:58:23.140442 # ok 3983 # SKIP Streaming SVE set SVE get FPSIMD for VL 7712
5711 22:58:23.140502 # ok 3984 # SKIP Streaming SVE set FPSIMD get SVE for VL 7712
5712 22:58:23.140562 # ok 3985 Set Streaming SVE VL 7728
5713 22:58:23.140621 # ok 3986 # SKIP Streaming SVE set SVE get SVE for VL 7728
5714 22:58:23.140683 # ok 3987 # SKIP Streaming SVE set SVE get FPSIMD for VL 7728
5715 22:58:23.142828 # ok 3988 # SKIP Streaming SVE set FPSIMD get SVE for VL 7728
5716 22:58:23.143164 # ok 3989 Set Streaming SVE VL 7744
5717 22:58:23.143261 # ok 3990 # SKIP Streaming SVE set SVE get SVE for VL 7744
5718 22:58:23.143344 # ok 3991 # SKIP Streaming SVE set SVE get FPSIMD for VL 7744
5719 22:58:23.143441 # ok 3992 # SKIP Streaming SVE set FPSIMD get SVE for VL 7744
5720 22:58:23.143727 # ok 3993 Set Streaming SVE VL 7760
5721 22:58:23.143822 # ok 3994 # SKIP Streaming SVE set SVE get SVE for VL 7760
5722 22:58:23.143888 # ok 3995 # SKIP Streaming SVE set SVE get FPSIMD for VL 7760
5723 22:58:23.143961 # ok 3996 # SKIP Streaming SVE set FPSIMD get SVE for VL 7760
5724 22:58:23.144023 # ok 3997 Set Streaming SVE VL 7776
5725 22:58:23.144084 # ok 3998 # SKIP Streaming SVE set SVE get SVE for VL 7776
5726 22:58:23.144341 # ok 3999 # SKIP Streaming SVE set SVE get FPSIMD for VL 7776
5727 22:58:23.144438 # ok 4000 # SKIP Streaming SVE set FPSIMD get SVE for VL 7776
5728 22:58:23.144519 # ok 4001 Set Streaming SVE VL 7792
5729 22:58:23.144612 # ok 4002 # SKIP Streaming SVE set SVE get SVE for VL 7792
5730 22:58:23.144695 # ok 4003 # SKIP Streaming SVE set SVE get FPSIMD for VL 7792
5731 22:58:23.144788 # ok 4004 # SKIP Streaming SVE set FPSIMD get SVE for VL 7792
5732 22:58:23.145116 # ok 4005 Set Streaming SVE VL 7808
5733 22:58:23.145212 # ok 4006 # SKIP Streaming SVE set SVE get SVE for VL 7808
5734 22:58:23.145753 # ok 4007 # SKIP Streaming SVE set SVE get FPSIMD for VL 7808
5735 22:58:23.145842 # ok 4008 # SKIP Streaming SVE set FPSIMD get SVE for VL 7808
5736 22:58:23.145917 # ok 4009 Set Streaming SVE VL 7824
5737 22:58:23.145989 # ok 4010 # SKIP Streaming SVE set SVE get SVE for VL 7824
5738 22:58:23.146059 # ok 4011 # SKIP Streaming SVE set SVE get FPSIMD for VL 7824
5739 22:58:23.146129 # ok 4012 # SKIP Streaming SVE set FPSIMD get SVE for VL 7824
5740 22:58:23.146219 # ok 4013 Set Streaming SVE VL 7840
5741 22:58:23.146472 # ok 4014 # SKIP Streaming SVE set SVE get SVE for VL 7840
5742 22:58:23.146559 # ok 4015 # SKIP Streaming SVE set SVE get FPSIMD for VL 7840
5743 22:58:23.146622 # ok 4016 # SKIP Streaming SVE set FPSIMD get SVE for VL 7840
5744 22:58:23.146687 # ok 4017 Set Streaming SVE VL 7856
5745 22:58:23.146745 # ok 4018 # SKIP Streaming SVE set SVE get SVE for VL 7856
5746 22:58:23.150750 # ok 4019 # SKIP Streaming SVE set SVE get FPSIMD for VL 7856
5747 22:58:23.151066 # ok 4020 # SKIP Streaming SVE set FPSIMD get SVE for VL 7856
5748 22:58:23.151167 # ok 4021 Set Streaming SVE VL 7872
5749 22:58:23.152024 # ok 4022 # SKIP Streaming SVE set SVE get SVE for VL 7872
5750 22:58:23.152609 # ok 4023 # SKIP Streaming SVE set SVE get FPSIMD for VL 7872
5751 22:58:23.152706 # ok 4024 # SKIP Streaming SVE set FPSIMD get SVE for VL 7872
5752 22:58:23.152775 # ok 4025 Set Streaming SVE VL 7888
5753 22:58:23.152849 # ok 4026 # SKIP Streaming SVE set SVE get SVE for VL 7888
5754 22:58:23.152923 # ok 4027 # SKIP Streaming SVE set SVE get FPSIMD for VL 7888
5755 22:58:23.152997 # ok 4028 # SKIP Streaming SVE set FPSIMD get SVE for VL 7888
5756 22:58:23.153099 # ok 4029 Set Streaming SVE VL 7904
5757 22:58:23.153549 # ok 4030 # SKIP Streaming SVE set SVE get SVE for VL 7904
5758 22:58:23.153712 # ok 4031 # SKIP Streaming SVE set SVE get FPSIMD for VL 7904
5759 22:58:23.153781 # ok 4032 # SKIP Streaming SVE set FPSIMD get SVE for VL 7904
5760 22:58:23.153841 # ok 4033 Set Streaming SVE VL 7920
5761 22:58:23.153901 # ok 4034 # SKIP Streaming SVE set SVE get SVE for VL 7920
5762 22:58:23.153960 # ok 4035 # SKIP Streaming SVE set SVE get FPSIMD for VL 7920
5763 22:58:23.154020 # ok 4036 # SKIP Streaming SVE set FPSIMD get SVE for VL 7920
5764 22:58:23.154080 # ok 4037 Set Streaming SVE VL 7936
5765 22:58:23.154151 # ok 4038 # SKIP Streaming SVE set SVE get SVE for VL 7936
5766 22:58:23.154228 # ok 4039 # SKIP Streaming SVE set SVE get FPSIMD for VL 7936
5767 22:58:23.154289 # ok 4040 # SKIP Streaming SVE set FPSIMD get SVE for VL 7936
5768 22:58:23.154356 # ok 4041 Set Streaming SVE VL 7952
5769 22:58:23.154440 # ok 4042 # SKIP Streaming SVE set SVE get SVE for VL 7952
5770 22:58:23.154522 # ok 4043 # SKIP Streaming SVE set SVE get FPSIMD for VL 7952
5771 22:58:23.154592 # ok 4044 # SKIP Streaming SVE set FPSIMD get SVE for VL 7952
5772 22:58:23.154846 # ok 4045 Set Streaming SVE VL 7968
5773 22:58:23.154924 # ok 4046 # SKIP Streaming SVE set SVE get SVE for VL 7968
5774 22:58:23.154986 # ok 4047 # SKIP Streaming SVE set SVE get FPSIMD for VL 7968
5775 22:58:23.155045 # ok 4048 # SKIP Streaming SVE set FPSIMD get SVE for VL 7968
5776 22:58:23.158876 # ok 4049 Set Streaming SVE VL 7984
5777 22:58:23.159320 # ok 4050 # SKIP Streaming SVE set SVE get SVE for VL 7984
5778 22:58:23.159425 # ok 4051 # SKIP Streaming SVE set SVE get FPSIMD for VL 7984
5779 22:58:23.159512 # ok 4052 # SKIP Streaming SVE set FPSIMD get SVE for VL 7984
5780 22:58:23.159614 # ok 4053 Set Streaming SVE VL 8000
5781 22:58:23.159701 # ok 4054 # SKIP Streaming SVE set SVE get SVE for VL 8000
5782 22:58:23.159997 # ok 4055 # SKIP Streaming SVE set SVE get FPSIMD for VL 8000
5783 22:58:23.160098 # ok 4056 # SKIP Streaming SVE set FPSIMD get SVE for VL 8000
5784 22:58:23.160189 # ok 4057 Set Streaming SVE VL 8016
5785 22:58:23.160291 # ok 4058 # SKIP Streaming SVE set SVE get SVE for VL 8016
5786 22:58:23.160382 # ok 4059 # SKIP Streaming SVE set SVE get FPSIMD for VL 8016
5787 22:58:23.160475 # ok 4060 # SKIP Streaming SVE set FPSIMD get SVE for VL 8016
5788 22:58:23.160783 # ok 4061 Set Streaming SVE VL 8032
5789 22:58:23.160875 # ok 4062 # SKIP Streaming SVE set SVE get SVE for VL 8032
5790 22:58:23.160962 # ok 4063 # SKIP Streaming SVE set SVE get FPSIMD for VL 8032
5791 22:58:23.161050 # ok 4064 # SKIP Streaming SVE set FPSIMD get SVE for VL 8032
5792 22:58:23.161121 # ok 4065 Set Streaming SVE VL 8048
5793 22:58:23.161417 # ok 4066 # SKIP Streaming SVE set SVE get SVE for VL 8048
5794 22:58:23.161497 # ok 4067 # SKIP Streaming SVE set SVE get FPSIMD for VL 8048
5795 22:58:23.161575 # ok 4068 # SKIP Streaming SVE set FPSIMD get SVE for VL 8048
5796 22:58:23.161667 # ok 4069 Set Streaming SVE VL 8064
5797 22:58:23.161747 # ok 4070 # SKIP Streaming SVE set SVE get SVE for VL 8064
5798 22:58:23.162044 # ok 4071 # SKIP Streaming SVE set SVE get FPSIMD for VL 8064
5799 22:58:23.162153 # ok 4072 # SKIP Streaming SVE set FPSIMD get SVE for VL 8064
5800 22:58:23.162268 # ok 4073 Set Streaming SVE VL 8080
5801 22:58:23.166907 # ok 4074 # SKIP Streaming SVE set SVE get SVE for VL 8080
5802 22:58:23.168044 # ok 4075 # SKIP Streaming SVE set SVE get FPSIMD for VL 8080
5803 22:58:23.168195 # ok 4076 # SKIP Streaming SVE set FPSIMD get SVE for VL 8080
5804 22:58:23.168320 # ok 4077 Set Streaming SVE VL 8096
5805 22:58:23.168442 # ok 4078 # SKIP Streaming SVE set SVE get SVE for VL 8096
5806 22:58:23.168565 # ok 4079 # SKIP Streaming SVE set SVE get FPSIMD for VL 8096
5807 22:58:23.168897 # ok 4080 # SKIP Streaming SVE set FPSIMD get SVE for VL 8096
5808 22:58:23.168998 # ok 4081 Set Streaming SVE VL 8112
5809 22:58:23.169113 # ok 4082 # SKIP Streaming SVE set SVE get SVE for VL 8112
5810 22:58:23.169240 # ok 4083 # SKIP Streaming SVE set SVE get FPSIMD for VL 8112
5811 22:58:23.169579 # ok 4084 # SKIP Streaming SVE set FPSIMD get SVE for VL 8112
5812 22:58:23.169678 # ok 4085 Set Streaming SVE VL 8128
5813 22:58:23.169780 # ok 4086 # SKIP Streaming SVE set SVE get SVE for VL 8128
5814 22:58:23.169880 # ok 4087 # SKIP Streaming SVE set SVE get FPSIMD for VL 8128
5815 22:58:23.169979 # ok 4088 # SKIP Streaming SVE set FPSIMD get SVE for VL 8128
5816 22:58:23.170084 # ok 4089 Set Streaming SVE VL 8144
5817 22:58:23.170372 # ok 4090 # SKIP Streaming SVE set SVE get SVE for VL 8144
5818 22:58:23.175110 # ok 4091 # SKIP Streaming SVE set SVE get FPSIMD for VL 8144
5819 22:58:23.175343 # ok 4092 # SKIP Streaming SVE set FPSIMD get SVE for VL 8144
5820 22:58:23.175451 # ok 4093 Set Streaming SVE VL 8160
5821 22:58:23.175561 # ok 4094 # SKIP Streaming SVE set SVE get SVE for VL 8160
5822 22:58:23.175667 # ok 4095 # SKIP Streaming SVE set SVE get FPSIMD for VL 8160
5823 22:58:23.175751 # ok 4096 # SKIP Streaming SVE set FPSIMD get SVE for VL 8160
5824 22:58:23.175830 # ok 4097 Set Streaming SVE VL 8176
5825 22:58:23.175917 # ok 4098 # SKIP Streaming SVE set SVE get SVE for VL 8176
5826 22:58:23.176022 # ok 4099 # SKIP Streaming SVE set SVE get FPSIMD for VL 8176
5827 22:58:23.177767 # ok 4100 # SKIP Streaming SVE set FPSIMD get SVE for VL 8176
5828 22:58:23.177849 # ok 4101 Set Streaming SVE VL 8192
5829 22:58:23.177911 # ok 4102 # SKIP Streaming SVE set SVE get SVE for VL 8192
5830 22:58:23.177971 # ok 4103 # SKIP Streaming SVE set SVE get FPSIMD for VL 8192
5831 22:58:23.178032 # ok 4104 # SKIP Streaming SVE set FPSIMD get SVE for VL 8192
5832 22:58:23.178091 # # Totals: pass:1095 fail:0 xfail:0 xpass:0 skip:3009 error:0
5833 22:58:23.178151 ok 30 selftests: arm64: sve-ptrace
5834 22:58:23.178212 # selftests: arm64: sve-probe-vls
5835 22:58:23.178272 # TAP version 13
5836 22:58:23.178331 # 1..2
5837 22:58:23.178390 # ok 1 Enumerated 16 vector lengths
5838 22:58:23.178450 # ok 2 All vector lengths valid
5839 22:58:23.178510 # # 16
5840 22:58:23.178570 # # 32
5841 22:58:23.178630 # # 48
5842 22:58:23.178689 # # 64
5843 22:58:23.178748 # # 80
5844 22:58:23.178808 # # 96
5845 22:58:23.178866 # # 112
5846 22:58:23.178925 # # 128
5847 22:58:23.178985 # # 144
5848 22:58:23.179044 # # 160
5849 22:58:23.179103 # # 176
5850 22:58:23.179162 # # 192
5851 22:58:23.179221 # # 208
5852 22:58:23.179280 # # 224
5853 22:58:23.179339 # # 240
5854 22:58:23.179398 # # 256
5855 22:58:23.179458 # # Totals: pass:2 fail:0 xfail:0 xpass:0 skip:0 error:0
5856 22:58:23.179517 ok 31 selftests: arm64: sve-probe-vls
5857 22:58:23.275547 # selftests: arm64: vec-syscfg
5858 22:58:24.158704 # TAP version 13
5859 22:58:24.158938 # 1..20
5860 22:58:24.159221 # ok 1 SVE default vector length 64
5861 22:58:24.159327 # ok 2 SVE minimum vector length 16
5862 22:58:24.160107 # ok 3 SVE maximum vector length 256
5863 22:58:24.160379 # ok 4 SVE current VL is 64
5864 22:58:24.160489 # ok 5 SVE set VL 64 and have VL 64
5865 22:58:24.160580 # ok 6 SVE prctl() set min/max
5866 22:58:24.160681 # ok 7 SVE vector length used default
5867 22:58:24.160764 # ok 8 SVE vector length was inherited
5868 22:58:24.160855 # ok 9 SVE vector length set on exec
5869 22:58:24.160935 # ok 10 SVE prctl() set all VLs, 0 errors
5870 22:58:24.161013 # ok 11 SME default vector length 32
5871 22:58:24.161103 # ok 12 SME minimum vector length 16
5872 22:58:24.161184 # ok 13 SME maximum vector length 256
5873 22:58:24.161270 # ok 14 SME current VL is 32
5874 22:58:24.161371 # ok 15 SME set VL 32 and have VL 32
5875 22:58:24.161453 # ok 16 SME prctl() set min/max
5876 22:58:24.161529 # ok 17 SME vector length used default
5877 22:58:24.161618 # ok 18 SME vector length was inherited
5878 22:58:24.161707 # ok 19 SME vector length set on exec
5879 22:58:24.161832 # ok 20 SME prctl() set all VLs, 0 errors
5880 22:58:24.161963 # # Totals: pass:20 fail:0 xfail:0 xpass:0 skip:0 error:0
5881 22:58:24.181065 ok 32 selftests: arm64: vec-syscfg
5882 22:58:24.285495 # selftests: arm64: za-fork
5883 22:58:24.466276 # TAP version 13
5884 22:58:24.466726 # 1..1
5885 22:58:24.466897 # # PID: 1014
5886 22:58:24.467069 # ok 1 fork_test
5887 22:58:24.467208 # # Totals: pass:1 fail:0 xfail:0 xpass:0 skip:0 error:0
5888 22:58:24.489185 ok 33 selftests: arm64: za-fork
5889 22:58:24.650124 # selftests: arm64: za-ptrace
5890 22:58:24.849573 # TAP version 13
5891 22:58:24.849840 # 1..1536
5892 22:58:24.849947 # # Parent is 1032, child is 1033
5893 22:58:24.850256 # ok 1 Set VL 16
5894 22:58:24.850368 # ok 2 Disabled ZA for VL 16
5895 22:58:24.850462 # ok 3 Data match for VL 16
5896 22:58:24.850551 # ok 4 Set VL 32
5897 22:58:24.850639 # ok 5 Disabled ZA for VL 32
5898 22:58:24.850726 # ok 6 Data match for VL 32
5899 22:58:24.850812 # ok 7 Set VL 48
5900 22:58:24.850897 # ok 8 # SKIP Disabled ZA for VL 48
5901 22:58:24.850983 # ok 9 # SKIP Get and set data for VL 48
5902 22:58:24.851089 # ok 10 Set VL 64
5903 22:58:24.851178 # ok 11 Disabled ZA for VL 64
5904 22:58:24.851264 # ok 12 Data match for VL 64
5905 22:58:24.851349 # ok 13 Set VL 80
5906 22:58:24.851434 # ok 14 # SKIP Disabled ZA for VL 80
5907 22:58:24.851520 # ok 15 # SKIP Get and set data for VL 80
5908 22:58:24.851605 # ok 16 Set VL 96
5909 22:58:24.851690 # ok 17 # SKIP Disabled ZA for VL 96
5910 22:58:24.851792 # ok 18 # SKIP Get and set data for VL 96
5911 22:58:24.851879 # ok 19 Set VL 112
5912 22:58:24.851964 # ok 20 # SKIP Disabled ZA for VL 112
5913 22:58:24.852869 # ok 21 # SKIP Get and set data for VL 112
5914 22:58:24.853169 # ok 22 Set VL 128
5915 22:58:24.853266 # ok 23 Disabled ZA for VL 128
5916 22:58:24.853355 # ok 24 Data match for VL 128
5917 22:58:24.853464 # ok 25 Set VL 144
5918 22:58:24.853554 # ok 26 # SKIP Disabled ZA for VL 144
5919 22:58:24.853640 # ok 27 # SKIP Get and set data for VL 144
5920 22:58:24.853734 # ok 28 Set VL 160
5921 22:58:24.853835 # ok 29 # SKIP Disabled ZA for VL 160
5922 22:58:24.853922 # ok 30 # SKIP Get and set data for VL 160
5923 22:58:24.854003 # ok 31 Set VL 176
5924 22:58:24.854101 # ok 32 # SKIP Disabled ZA for VL 176
5925 22:58:24.854187 # ok 33 # SKIP Get and set data for VL 176
5926 22:58:24.854269 # ok 34 Set VL 192
5927 22:58:24.854369 # ok 35 # SKIP Disabled ZA for VL 192
5928 22:58:24.854468 # ok 36 # SKIP Get and set data for VL 192
5929 22:58:24.854552 # ok 37 Set VL 208
5930 22:58:24.854650 # ok 38 # SKIP Disabled ZA for VL 208
5931 22:58:24.854736 # ok 39 # SKIP Get and set data for VL 208
5932 22:58:24.854820 # ok 40 Set VL 224
5933 22:58:24.854919 # ok 41 # SKIP Disabled ZA for VL 224
5934 22:58:24.855004 # ok 42 # SKIP Get and set data for VL 224
5935 22:58:24.855088 # ok 43 Set VL 240
5936 22:58:24.855187 # ok 44 # SKIP Disabled ZA for VL 240
5937 22:58:24.855270 # ok 45 # SKIP Get and set data for VL 240
5938 22:58:24.855353 # ok 46 Set VL 256
5939 22:58:24.855450 # ok 47 Disabled ZA for VL 256
5940 22:58:24.855960 # ok 48 Data match for VL 256
5941 22:58:24.856267 # ok 49 Set VL 272
5942 22:58:24.856367 # ok 50 # SKIP Disabled ZA for VL 272
5943 22:58:24.856461 # ok 51 # SKIP Get and set data for VL 272
5944 22:58:24.856569 # ok 52 Set VL 288
5945 22:58:24.856662 # ok 53 # SKIP Disabled ZA for VL 288
5946 22:58:24.856764 # ok 54 # SKIP Get and set data for VL 288
5947 22:58:24.856848 # ok 55 Set VL 304
5948 22:58:24.856950 # ok 56 # SKIP Disabled ZA for VL 304
5949 22:58:24.857034 # ok 57 # SKIP Get and set data for VL 304
5950 22:58:24.857120 # ok 58 Set VL 320
5951 22:58:24.857216 # ok 59 # SKIP Disabled ZA for VL 320
5952 22:58:24.857304 # ok 60 # SKIP Get and set data for VL 320
5953 22:58:24.857401 # ok 61 Set VL 336
5954 22:58:24.857488 # ok 62 # SKIP Disabled ZA for VL 336
5955 22:58:24.857585 # ok 63 # SKIP Get and set data for VL 336
5956 22:58:24.857694 # ok 64 Set VL 352
5957 22:58:24.857983 # ok 65 # SKIP Disabled ZA for VL 352
5958 22:58:24.858075 # ok 66 # SKIP Get and set data for VL 352
5959 22:58:24.858181 # ok 67 Set VL 368
5960 22:58:24.858273 # ok 68 # SKIP Disabled ZA for VL 368
5961 22:58:24.858361 # ok 69 # SKIP Get and set data for VL 368
5962 22:58:24.858467 # ok 70 Set VL 384
5963 22:58:24.858555 # ok 71 # SKIP Disabled ZA for VL 384
5964 22:58:24.858661 # ok 72 # SKIP Get and set data for VL 384
5965 22:58:24.858754 # ok 73 Set VL 400
5966 22:58:24.858860 # ok 74 # SKIP Disabled ZA for VL 400
5967 22:58:24.858969 # ok 75 # SKIP Get and set data for VL 400
5968 22:58:24.859062 # ok 76 Set VL 416
5969 22:58:24.859169 # ok 77 # SKIP Disabled ZA for VL 416
5970 22:58:24.859260 # ok 78 # SKIP Get and set data for VL 416
5971 22:58:24.859367 # ok 79 Set VL 432
5972 22:58:24.869681 # ok 80 # SKIP Disabled ZA for VL 432
5973 22:58:24.870104 # ok 81 # SKIP Get and set data for VL 432
5974 22:58:24.870217 # ok 82 Set VL 448
5975 22:58:24.870313 # ok 83 # SKIP Disabled ZA for VL 448
5976 22:58:24.870406 # ok 84 # SKIP Get and set data for VL 448
5977 22:58:24.870500 # ok 85 Set VL 464
5978 22:58:24.870611 # ok 86 # SKIP Disabled ZA for VL 464
5979 22:58:24.870706 # ok 87 # SKIP Get and set data for VL 464
5980 22:58:24.870801 # ok 88 Set VL 480
5981 22:58:24.870895 # ok 89 # SKIP Disabled ZA for VL 480
5982 22:58:24.870989 # ok 90 # SKIP Get and set data for VL 480
5983 22:58:24.871079 # ok 91 Set VL 496
5984 22:58:24.871186 # ok 92 # SKIP Disabled ZA for VL 496
5985 22:58:24.871279 # ok 93 # SKIP Get and set data for VL 496
5986 22:58:24.871371 # ok 94 Set VL 512
5987 22:58:24.871462 # ok 95 # SKIP Disabled ZA for VL 512
5988 22:58:24.871552 # ok 96 # SKIP Get and set data for VL 512
5989 22:58:24.871643 # ok 97 Set VL 528
5990 22:58:24.871750 # ok 98 # SKIP Disabled ZA for VL 528
5991 22:58:24.872107 # ok 99 # SKIP Get and set data for VL 528
5992 22:58:24.872216 # ok 100 Set VL 544
5993 22:58:24.872326 # ok 101 # SKIP Disabled ZA for VL 544
5994 22:58:24.872413 # ok 102 # SKIP Get and set data for VL 544
5995 22:58:24.872499 # ok 103 Set VL 560
5996 22:58:24.872608 # ok 104 # SKIP Disabled ZA for VL 560
5997 22:58:24.872700 # ok 105 # SKIP Get and set data for VL 560
5998 22:58:24.872790 # ok 106 Set VL 576
5999 22:58:24.872897 # ok 107 # SKIP Disabled ZA for VL 576
6000 22:58:24.872996 # ok 108 # SKIP Get and set data for VL 576
6001 22:58:24.873103 # ok 109 Set VL 592
6002 22:58:24.873189 # ok 110 # SKIP Disabled ZA for VL 592
6003 22:58:24.873291 # ok 111 # SKIP Get and set data for VL 592
6004 22:58:24.873377 # ok 112 Set VL 608
6005 22:58:24.873476 # ok 113 # SKIP Disabled ZA for VL 608
6006 22:58:24.873774 # ok 114 # SKIP Get and set data for VL 608
6007 22:58:24.873875 # ok 115 Set VL 624
6008 22:58:24.873967 # ok 116 # SKIP Disabled ZA for VL 624
6009 22:58:24.874074 # ok 117 # SKIP Get and set data for VL 624
6010 22:58:24.874162 # ok 118 Set VL 640
6011 22:58:24.874245 # ok 119 # SKIP Disabled ZA for VL 640
6012 22:58:24.874352 # ok 120 # SKIP Get and set data for VL 640
6013 22:58:24.874445 # ok 121 Set VL 656
6014 22:58:24.874535 # ok 122 # SKIP Disabled ZA for VL 656
6015 22:58:24.874643 # ok 123 # SKIP Get and set data for VL 656
6016 22:58:24.874737 # ok 124 Set VL 672
6017 22:58:24.890240 # ok 125 # SKIP Disabled ZA for VL 672
6018 22:58:24.890443 # ok 126 # SKIP Get and set data for VL 672
6019 22:58:24.890534 # ok 127 Set VL 688
6020 22:58:24.890840 # ok 128 # SKIP Disabled ZA for VL 688
6021 22:58:24.890951 # ok 129 # SKIP Get and set data for VL 688
6022 22:58:24.891042 # ok 130 Set VL 704
6023 22:58:24.891129 # ok 131 # SKIP Disabled ZA for VL 704
6024 22:58:24.891215 # ok 132 # SKIP Get and set data for VL 704
6025 22:58:24.891301 # ok 133 Set VL 720
6026 22:58:24.891386 # ok 134 # SKIP Disabled ZA for VL 720
6027 22:58:24.891471 # ok 135 # SKIP Get and set data for VL 720
6028 22:58:24.891573 # ok 136 Set VL 736
6029 22:58:24.891864 # ok 137 # SKIP Disabled ZA for VL 736
6030 22:58:24.891968 # ok 138 # SKIP Get and set data for VL 736
6031 22:58:24.892057 # ok 139 Set VL 752
6032 22:58:24.892142 # ok 140 # SKIP Disabled ZA for VL 752
6033 22:58:24.892227 # ok 141 # SKIP Get and set data for VL 752
6034 22:58:24.892312 # ok 142 Set VL 768
6035 22:58:24.898361 # ok 143 # SKIP Disabled ZA for VL 768
6036 22:58:24.898723 # ok 144 # SKIP Get and set data for VL 768
6037 22:58:24.898831 # ok 145 Set VL 784
6038 22:58:24.898919 # ok 146 # SKIP Disabled ZA for VL 784
6039 22:58:24.899003 # ok 147 # SKIP Get and set data for VL 784
6040 22:58:24.899087 # ok 148 Set VL 800
6041 22:58:24.899186 # ok 149 # SKIP Disabled ZA for VL 800
6042 22:58:24.899272 # ok 150 # SKIP Get and set data for VL 800
6043 22:58:24.899356 # ok 151 Set VL 816
6044 22:58:24.899439 # ok 152 # SKIP Disabled ZA for VL 816
6045 22:58:24.899522 # ok 153 # SKIP Get and set data for VL 816
6046 22:58:24.899620 # ok 154 Set VL 832
6047 22:58:24.899938 # ok 155 # SKIP Disabled ZA for VL 832
6048 22:58:24.900060 # ok 156 # SKIP Get and set data for VL 832
6049 22:58:24.900148 # ok 157 Set VL 848
6050 22:58:24.900246 # ok 158 # SKIP Disabled ZA for VL 848
6051 22:58:24.900331 # ok 159 # SKIP Get and set data for VL 848
6052 22:58:24.900430 # ok 160 Set VL 864
6053 22:58:24.900514 # ok 161 # SKIP Disabled ZA for VL 864
6054 22:58:24.900612 # ok 162 # SKIP Get and set data for VL 864
6055 22:58:24.900698 # ok 163 Set VL 880
6056 22:58:24.900796 # ok 164 # SKIP Disabled ZA for VL 880
6057 22:58:24.900895 # ok 165 # SKIP Get and set data for VL 880
6058 22:58:24.900981 # ok 166 Set VL 896
6059 22:58:24.901078 # ok 167 # SKIP Disabled ZA for VL 896
6060 22:58:24.901420 # ok 168 # SKIP Get and set data for VL 896
6061 22:58:24.901524 # ok 169 Set VL 912
6062 22:58:24.901611 # ok 170 # SKIP Disabled ZA for VL 912
6063 22:58:24.901704 # ok 171 # SKIP Get and set data for VL 912
6064 22:58:24.901805 # ok 172 Set VL 928
6065 22:58:24.901891 # ok 173 # SKIP Disabled ZA for VL 928
6066 22:58:24.901989 # ok 174 # SKIP Get and set data for VL 928
6067 22:58:24.902088 # ok 175 Set VL 944
6068 22:58:24.902174 # ok 176 # SKIP Disabled ZA for VL 944
6069 22:58:24.902259 # ok 177 # SKIP Get and set data for VL 944
6070 22:58:24.902342 # ok 178 Set VL 960
6071 22:58:24.902440 # ok 179 # SKIP Disabled ZA for VL 960
6072 22:58:24.902526 # ok 180 # SKIP Get and set data for VL 960
6073 22:58:24.902624 # ok 181 Set VL 976
6074 22:58:24.902710 # ok 182 # SKIP Disabled ZA for VL 976
6075 22:58:24.902807 # ok 183 # SKIP Get and set data for VL 976
6076 22:58:24.902893 # ok 184 Set VL 992
6077 22:58:24.902992 # ok 185 # SKIP Disabled ZA for VL 992
6078 22:58:24.903092 # ok 186 # SKIP Get and set data for VL 992
6079 22:58:24.903178 # ok 187 Set VL 1008
6080 22:58:24.903276 # ok 188 # SKIP Disabled ZA for VL 1008
6081 22:58:24.903362 # ok 189 # SKIP Get and set data for VL 1008
6082 22:58:24.903461 # ok 190 Set VL 1024
6083 22:58:24.910122 # ok 191 # SKIP Disabled ZA for VL 1024
6084 22:58:24.910532 # ok 192 # SKIP Get and set data for VL 1024
6085 22:58:24.910645 # ok 193 Set VL 1040
6086 22:58:24.910734 # ok 194 # SKIP Disabled ZA for VL 1040
6087 22:58:24.910822 # ok 195 # SKIP Get and set data for VL 1040
6088 22:58:24.910911 # ok 196 Set VL 1056
6089 22:58:24.911021 # ok 197 # SKIP Disabled ZA for VL 1056
6090 22:58:24.911116 # ok 198 # SKIP Get and set data for VL 1056
6091 22:58:24.911208 # ok 199 Set VL 1072
6092 22:58:24.911299 # ok 200 # SKIP Disabled ZA for VL 1072
6093 22:58:24.911407 # ok 201 # SKIP Get and set data for VL 1072
6094 22:58:24.911500 # ok 202 Set VL 1088
6095 22:58:24.911590 # ok 203 # SKIP Disabled ZA for VL 1088
6096 22:58:24.911889 # ok 204 # SKIP Get and set data for VL 1088
6097 22:58:24.912007 # ok 205 Set VL 1104
6098 22:58:24.912110 # ok 206 # SKIP Disabled ZA for VL 1104
6099 22:58:24.912211 # ok 207 # SKIP Get and set data for VL 1104
6100 22:58:24.912313 # ok 208 Set VL 1120
6101 22:58:24.912414 # ok 209 # SKIP Disabled ZA for VL 1120
6102 22:58:24.912515 # ok 210 # SKIP Get and set data for VL 1120
6103 22:58:24.912617 # ok 211 Set VL 1136
6104 22:58:24.912718 # ok 212 # SKIP Disabled ZA for VL 1136
6105 22:58:24.912819 # ok 213 # SKIP Get and set data for VL 1136
6106 22:58:24.912920 # ok 214 Set VL 1152
6107 22:58:24.913021 # ok 215 # SKIP Disabled ZA for VL 1152
6108 22:58:24.913322 # ok 216 # SKIP Get and set data for VL 1152
6109 22:58:24.913480 # ok 217 Set VL 1168
6110 22:58:24.913624 # ok 218 # SKIP Disabled ZA for VL 1168
6111 22:58:24.913803 # ok 219 # SKIP Get and set data for VL 1168
6112 22:58:24.913942 # ok 220 Set VL 1184
6113 22:58:24.914117 # ok 221 # SKIP Disabled ZA for VL 1184
6114 22:58:24.914282 # ok 222 # SKIP Get and set data for VL 1184
6115 22:58:24.914426 # ok 223 Set VL 1200
6116 22:58:24.914567 # ok 224 # SKIP Disabled ZA for VL 1200
6117 22:58:24.914722 # ok 225 # SKIP Get and set data for VL 1200
6118 22:58:24.914874 # ok 226 Set VL 1216
6119 22:58:24.915063 # ok 227 # SKIP Disabled ZA for VL 1216
6120 22:58:24.915201 # ok 228 # SKIP Get and set data for VL 1216
6121 22:58:24.915350 # ok 229 Set VL 1232
6122 22:58:24.915489 # ok 230 # SKIP Disabled ZA for VL 1232
6123 22:58:24.915591 # ok 231 # SKIP Get and set data for VL 1232
6124 22:58:24.915698 # ok 232 Set VL 1248
6125 22:58:24.915786 # ok 233 # SKIP Disabled ZA for VL 1248
6126 22:58:24.915871 # ok 234 # SKIP Get and set data for VL 1248
6127 22:58:24.915955 # ok 235 Set VL 1264
6128 22:58:24.916045 # ok 236 # SKIP Disabled ZA for VL 1264
6129 22:58:24.926517 # ok 237 # SKIP Get and set data for VL 1264
6130 22:58:24.926934 # ok 238 Set VL 1280
6131 22:58:24.927041 # ok 239 # SKIP Disabled ZA for VL 1280
6132 22:58:24.927131 # ok 240 # SKIP Get and set data for VL 1280
6133 22:58:24.927217 # ok 241 Set VL 1296
6134 22:58:24.927300 # ok 242 # SKIP Disabled ZA for VL 1296
6135 22:58:24.927400 # ok 243 # SKIP Get and set data for VL 1296
6136 22:58:24.927486 # ok 244 Set VL 1312
6137 22:58:24.927568 # ok 245 # SKIP Disabled ZA for VL 1312
6138 22:58:24.965229 # ok 246 # SKIP Get and set data for VL 1312
6139 22:58:24.965482 # ok 247 Set VL 1328
6140 22:58:24.966004 # ok 248 # SKIP Disabled ZA for VL 1328
6141 22:58:24.966112 # ok 249 # SKIP Get and set data for VL 1328
6142 22:58:24.966200 # ok 250 Set VL 1344
6143 22:58:24.966284 # ok 251 # SKIP Disabled ZA for VL 1344
6144 22:58:24.966368 # ok 252 # SKIP Get and set data for VL 1344
6145 22:58:24.966452 # ok 253 Set VL 1360
6146 22:58:24.966536 # ok 254 # SKIP Disabled ZA for VL 1360
6147 22:58:24.966620 # ok 255 # SKIP Get and set data for VL 1360
6148 22:58:24.966704 # ok 256 Set VL 1376
6149 22:58:24.966805 # ok 257 # SKIP Disabled ZA for VL 1376
6150 22:58:24.966892 # ok 258 # SKIP Get and set data for VL 1376
6151 22:58:24.966976 # ok 259 Set VL 1392
6152 22:58:24.967059 # ok 260 # SKIP Disabled ZA for VL 1392
6153 22:58:24.967148 # ok 261 # SKIP Get and set data for VL 1392
6154 22:58:24.967231 # ok 262 Set VL 1408
6155 22:58:24.967314 # ok 263 # SKIP Disabled ZA for VL 1408
6156 22:58:24.967397 # ok 264 # SKIP Get and set data for VL 1408
6157 22:58:24.967480 # ok 265 Set VL 1424
6158 22:58:24.967581 # ok 266 # SKIP Disabled ZA for VL 1424
6159 22:58:24.967667 # ok 267 # SKIP Get and set data for VL 1424
6160 22:58:24.967750 # ok 268 Set VL 1440
6161 22:58:24.967833 # ok 269 # SKIP Disabled ZA for VL 1440
6162 22:58:24.967916 # ok 270 # SKIP Get and set data for VL 1440
6163 22:58:24.967999 # ok 271 Set VL 1456
6164 22:58:24.968082 # ok 272 # SKIP Disabled ZA for VL 1456
6165 22:58:24.973274 # ok 273 # SKIP Get and set data for VL 1456
6166 22:58:24.973736 # ok 274 Set VL 1472
6167 22:58:24.973845 # ok 275 # SKIP Disabled ZA for VL 1472
6168 22:58:24.973931 # ok 276 # SKIP Get and set data for VL 1472
6169 22:58:24.974016 # ok 277 Set VL 1488
6170 22:58:24.974117 # ok 278 # SKIP Disabled ZA for VL 1488
6171 22:58:24.974203 # ok 279 # SKIP Get and set data for VL 1488
6172 22:58:24.974288 # ok 280 Set VL 1504
6173 22:58:24.974371 # ok 281 # SKIP Disabled ZA for VL 1504
6174 22:58:24.974454 # ok 282 # SKIP Get and set data for VL 1504
6175 22:58:24.974569 # ok 283 Set VL 1520
6176 22:58:24.974675 # ok 284 # SKIP Disabled ZA for VL 1520
6177 22:58:24.974761 # ok 285 # SKIP Get and set data for VL 1520
6178 22:58:24.974845 # ok 286 Set VL 1536
6179 22:58:24.974929 # ok 287 # SKIP Disabled ZA for VL 1536
6180 22:58:24.975011 # ok 288 # SKIP Get and set data for VL 1536
6181 22:58:24.975095 # ok 289 Set VL 1552
6182 22:58:24.975177 # ok 290 # SKIP Disabled ZA for VL 1552
6183 22:58:24.975277 # ok 291 # SKIP Get and set data for VL 1552
6184 22:58:24.975363 # ok 292 Set VL 1568
6185 22:58:24.975446 # ok 293 # SKIP Disabled ZA for VL 1568
6186 22:58:24.975529 # ok 294 # SKIP Get and set data for VL 1568
6187 22:58:24.975613 # ok 295 Set VL 1584
6188 22:58:24.975696 # ok 296 # SKIP Disabled ZA for VL 1584
6189 22:58:24.975795 # ok 297 # SKIP Get and set data for VL 1584
6190 22:58:24.975881 # ok 298 Set VL 1600
6191 22:58:24.984832 # ok 299 # SKIP Disabled ZA for VL 1600
6192 22:58:24.985228 # ok 300 # SKIP Get and set data for VL 1600
6193 22:58:24.985337 # ok 301 Set VL 1616
6194 22:58:24.985427 # ok 302 # SKIP Disabled ZA for VL 1616
6195 22:58:24.985512 # ok 303 # SKIP Get and set data for VL 1616
6196 22:58:24.985599 # ok 304 Set VL 1632
6197 22:58:24.985709 # ok 305 # SKIP Disabled ZA for VL 1632
6198 22:58:24.985800 # ok 306 # SKIP Get and set data for VL 1632
6199 22:58:24.985884 # ok 307 Set VL 1648
6200 22:58:24.985968 # ok 308 # SKIP Disabled ZA for VL 1648
6201 22:58:24.986067 # ok 309 # SKIP Get and set data for VL 1648
6202 22:58:24.986153 # ok 310 Set VL 1664
6203 22:58:24.986252 # ok 311 # SKIP Disabled ZA for VL 1664
6204 22:58:24.986345 # ok 312 # SKIP Get and set data for VL 1664
6205 22:58:24.986439 # ok 313 Set VL 1680
6206 22:58:24.986537 # ok 314 # SKIP Disabled ZA for VL 1680
6207 22:58:24.987032 # ok 315 # SKIP Get and set data for VL 1680
6208 22:58:24.987192 # ok 316 Set VL 1696
6209 22:58:24.987375 # ok 317 # SKIP Disabled ZA for VL 1696
6210 22:58:24.987551 # ok 318 # SKIP Get and set data for VL 1696
6211 22:58:24.987645 # ok 319 Set VL 1712
6212 22:58:24.987728 # ok 320 # SKIP Disabled ZA for VL 1712
6213 22:58:24.987811 # ok 321 # SKIP Get and set data for VL 1712
6214 22:58:24.987893 # ok 322 Set VL 1728
6215 22:58:24.987975 # ok 323 # SKIP Disabled ZA for VL 1728
6216 22:58:24.988257 # ok 324 # SKIP Get and set data for VL 1728
6217 22:58:24.988362 # ok 325 Set VL 1744
6218 22:58:24.988448 # ok 326 # SKIP Disabled ZA for VL 1744
6219 22:58:24.988532 # ok 327 # SKIP Get and set data for VL 1744
6220 22:58:24.988615 # ok 328 Set VL 1760
6221 22:58:24.989691 # ok 329 # SKIP Disabled ZA for VL 1760
6222 22:58:24.990271 # ok 330 # SKIP Get and set data for VL 1760
6223 22:58:24.990413 # ok 331 Set VL 1776
6224 22:58:24.990579 # ok 332 # SKIP Disabled ZA for VL 1776
6225 22:58:24.990672 # ok 333 # SKIP Get and set data for VL 1776
6226 22:58:24.990756 # ok 334 Set VL 1792
6227 22:58:24.990839 # ok 335 # SKIP Disabled ZA for VL 1792
6228 22:58:24.990941 # ok 336 # SKIP Get and set data for VL 1792
6229 22:58:24.991028 # ok 337 Set VL 1808
6230 22:58:24.991112 # ok 338 # SKIP Disabled ZA for VL 1808
6231 22:58:24.991195 # ok 339 # SKIP Get and set data for VL 1808
6232 22:58:24.991279 # ok 340 Set VL 1824
6233 22:58:24.991361 # ok 341 # SKIP Disabled ZA for VL 1824
6234 22:58:24.991461 # ok 342 # SKIP Get and set data for VL 1824
6235 22:58:24.991547 # ok 343 Set VL 1840
6236 22:58:24.991630 # ok 344 # SKIP Disabled ZA for VL 1840
6237 22:58:24.991713 # ok 345 # SKIP Get and set data for VL 1840
6238 22:58:24.991797 # ok 346 Set VL 1856
6239 22:58:24.991879 # ok 347 # SKIP Disabled ZA for VL 1856
6240 22:58:24.991963 # ok 348 # SKIP Get and set data for VL 1856
6241 22:58:25.006751 # ok 349 Set VL 1872
6242 22:58:25.007176 # ok 350 # SKIP Disabled ZA for VL 1872
6243 22:58:25.007276 # ok 351 # SKIP Get and set data for VL 1872
6244 22:58:25.007365 # ok 352 Set VL 1888
6245 22:58:25.007452 # ok 353 # SKIP Disabled ZA for VL 1888
6246 22:58:25.007554 # ok 354 # SKIP Get and set data for VL 1888
6247 22:58:25.007641 # ok 355 Set VL 1904
6248 22:58:25.007727 # ok 356 # SKIP Disabled ZA for VL 1904
6249 22:58:25.009218 # ok 357 # SKIP Get and set data for VL 1904
6250 22:58:25.009516 # ok 358 Set VL 1920
6251 22:58:25.010298 # ok 359 # SKIP Disabled ZA for VL 1920
6252 22:58:25.010708 # ok 360 # SKIP Get and set data for VL 1920
6253 22:58:25.010801 # ok 361 Set VL 1936
6254 22:58:25.010888 # ok 362 # SKIP Disabled ZA for VL 1936
6255 22:58:25.010990 # ok 363 # SKIP Get and set data for VL 1936
6256 22:58:25.011079 # ok 364 Set VL 1952
6257 22:58:25.011180 # ok 365 # SKIP Disabled ZA for VL 1952
6258 22:58:25.011268 # ok 366 # SKIP Get and set data for VL 1952
6259 22:58:25.011353 # ok 367 Set VL 1968
6260 22:58:25.011453 # ok 368 # SKIP Disabled ZA for VL 1968
6261 22:58:25.011555 # ok 369 # SKIP Get and set data for VL 1968
6262 22:58:25.017228 # ok 370 Set VL 1984
6263 22:58:25.017570 # ok 371 # SKIP Disabled ZA for VL 1984
6264 22:58:25.017674 # ok 372 # SKIP Get and set data for VL 1984
6265 22:58:25.017764 # ok 373 Set VL 2000
6266 22:58:25.017866 # ok 374 # SKIP Disabled ZA for VL 2000
6267 22:58:25.017955 # ok 375 # SKIP Get and set data for VL 2000
6268 22:58:25.018040 # ok 376 Set VL 2016
6269 22:58:25.018139 # ok 377 # SKIP Disabled ZA for VL 2016
6270 22:58:25.018241 # ok 378 # SKIP Get and set data for VL 2016
6271 22:58:25.018328 # ok 379 Set VL 2032
6272 22:58:25.018414 # ok 380 # SKIP Disabled ZA for VL 2032
6273 22:58:25.018513 # ok 381 # SKIP Get and set data for VL 2032
6274 22:58:25.018615 # ok 382 Set VL 2048
6275 22:58:25.018702 # ok 383 # SKIP Disabled ZA for VL 2048
6276 22:58:25.018803 # ok 384 # SKIP Get and set data for VL 2048
6277 22:58:25.018890 # ok 385 Set VL 2064
6278 22:58:25.018976 # ok 386 # SKIP Disabled ZA for VL 2064
6279 22:58:25.019273 # ok 387 # SKIP Get and set data for VL 2064
6280 22:58:25.019384 # ok 388 Set VL 2080
6281 22:58:25.019477 # ok 389 # SKIP Disabled ZA for VL 2080
6282 22:58:25.019568 # ok 390 # SKIP Get and set data for VL 2080
6283 22:58:25.019661 # ok 391 Set VL 2096
6284 22:58:25.019770 # ok 392 # SKIP Disabled ZA for VL 2096
6285 22:58:25.019866 # ok 393 # SKIP Get and set data for VL 2096
6286 22:58:25.024875 # ok 394 Set VL 2112
6287 22:58:25.025224 # ok 395 # SKIP Disabled ZA for VL 2112
6288 22:58:25.025338 # ok 396 # SKIP Get and set data for VL 2112
6289 22:58:25.025429 # ok 397 Set VL 2128
6290 22:58:25.025535 # ok 398 # SKIP Disabled ZA for VL 2128
6291 22:58:25.025625 # ok 399 # SKIP Get and set data for VL 2128
6292 22:58:25.025717 # ok 400 Set VL 2144
6293 22:58:25.025813 # ok 401 # SKIP Disabled ZA for VL 2144
6294 22:58:25.025900 # ok 402 # SKIP Get and set data for VL 2144
6295 22:58:25.025980 # ok 403 Set VL 2160
6296 22:58:25.026063 # ok 404 # SKIP Disabled ZA for VL 2160
6297 22:58:25.026169 # ok 405 # SKIP Get and set data for VL 2160
6298 22:58:25.026259 # ok 406 Set VL 2176
6299 22:58:25.026346 # ok 407 # SKIP Disabled ZA for VL 2176
6300 22:58:25.026739 # ok 408 # SKIP Get and set data for VL 2176
6301 22:58:25.026849 # ok 409 Set VL 2192
6302 22:58:25.026939 # ok 410 # SKIP Disabled ZA for VL 2192
6303 22:58:25.027022 # ok 411 # SKIP Get and set data for VL 2192
6304 22:58:25.027104 # ok 412 Set VL 2208
6305 22:58:25.027187 # ok 413 # SKIP Disabled ZA for VL 2208
6306 22:58:25.027274 # ok 414 # SKIP Get and set data for VL 2208
6307 22:58:25.027357 # ok 415 Set VL 2224
6308 22:58:25.027458 # ok 416 # SKIP Disabled ZA for VL 2224
6309 22:58:25.027544 # ok 417 # SKIP Get and set data for VL 2224
6310 22:58:25.027628 # ok 418 Set VL 2240
6311 22:58:25.027710 # ok 419 # SKIP Disabled ZA for VL 2240
6312 22:58:25.027794 # ok 420 # SKIP Get and set data for VL 2240
6313 22:58:25.027877 # ok 421 Set VL 2256
6314 22:58:25.033119 # ok 422 # SKIP Disabled ZA for VL 2256
6315 22:58:25.033498 # ok 423 # SKIP Get and set data for VL 2256
6316 22:58:25.033609 # ok 424 Set VL 2272
6317 22:58:25.033712 # ok 425 # SKIP Disabled ZA for VL 2272
6318 22:58:25.033822 # ok 426 # SKIP Get and set data for VL 2272
6319 22:58:25.033916 # ok 427 Set VL 2288
6320 22:58:25.034010 # ok 428 # SKIP Disabled ZA for VL 2288
6321 22:58:25.034104 # ok 429 # SKIP Get and set data for VL 2288
6322 22:58:25.034215 # ok 430 Set VL 2304
6323 22:58:25.034313 # ok 431 # SKIP Disabled ZA for VL 2304
6324 22:58:25.034412 # ok 432 # SKIP Get and set data for VL 2304
6325 22:58:25.034500 # ok 433 Set VL 2320
6326 22:58:25.034601 # ok 434 # SKIP Disabled ZA for VL 2320
6327 22:58:25.034688 # ok 435 # SKIP Get and set data for VL 2320
6328 22:58:25.034773 # ok 436 Set VL 2336
6329 22:58:25.034856 # ok 437 # SKIP Disabled ZA for VL 2336
6330 22:58:25.035141 # ok 438 # SKIP Get and set data for VL 2336
6331 22:58:25.035243 # ok 439 Set VL 2352
6332 22:58:25.035336 # ok 440 # SKIP Disabled ZA for VL 2352
6333 22:58:25.035427 # ok 441 # SKIP Get and set data for VL 2352
6334 22:58:25.035518 # ok 442 Set VL 2368
6335 22:58:25.035626 # ok 443 # SKIP Disabled ZA for VL 2368
6336 22:58:25.035720 # ok 444 # SKIP Get and set data for VL 2368
6337 22:58:25.035811 # ok 445 Set VL 2384
6338 22:58:25.040901 # ok 446 # SKIP Disabled ZA for VL 2384
6339 22:58:25.041274 # ok 447 # SKIP Get and set data for VL 2384
6340 22:58:25.041421 # ok 448 Set VL 2400
6341 22:58:25.041567 # ok 449 # SKIP Disabled ZA for VL 2400
6342 22:58:25.041762 # ok 450 # SKIP Get and set data for VL 2400
6343 22:58:25.041863 # ok 451 Set VL 2416
6344 22:58:25.041954 # ok 452 # SKIP Disabled ZA for VL 2416
6345 22:58:25.042043 # ok 453 # SKIP Get and set data for VL 2416
6346 22:58:25.042130 # ok 454 Set VL 2432
6347 22:58:25.042217 # ok 455 # SKIP Disabled ZA for VL 2432
6348 22:58:25.042323 # ok 456 # SKIP Get and set data for VL 2432
6349 22:58:25.042615 # ok 457 Set VL 2448
6350 22:58:25.042705 # ok 458 # SKIP Disabled ZA for VL 2448
6351 22:58:25.042801 # ok 459 # SKIP Get and set data for VL 2448
6352 22:58:25.042872 # ok 460 Set VL 2464
6353 22:58:25.042947 # ok 461 # SKIP Disabled ZA for VL 2464
6354 22:58:25.043021 # ok 462 # SKIP Get and set data for VL 2464
6355 22:58:25.045794 # ok 463 Set VL 2480
6356 22:58:25.045912 # ok 464 # SKIP Disabled ZA for VL 2480
6357 22:58:25.046008 # ok 465 # SKIP Get and set data for VL 2480
6358 22:58:25.046100 # ok 466 Set VL 2496
6359 22:58:25.046191 # ok 467 # SKIP Disabled ZA for VL 2496
6360 22:58:25.046312 # ok 468 # SKIP Get and set data for VL 2496
6361 22:58:25.046497 # ok 469 Set VL 2512
6362 22:58:25.046671 # ok 470 # SKIP Disabled ZA for VL 2512
6363 22:58:25.046817 # ok 471 # SKIP Get and set data for VL 2512
6364 22:58:25.046960 # ok 472 Set VL 2528
6365 22:58:25.047102 # ok 473 # SKIP Disabled ZA for VL 2528
6366 22:58:25.047506 # ok 474 # SKIP Get and set data for VL 2528
6367 22:58:25.047616 # ok 475 Set VL 2544
6368 22:58:25.047706 # ok 476 # SKIP Disabled ZA for VL 2544
6369 22:58:25.047792 # ok 477 # SKIP Get and set data for VL 2544
6370 22:58:25.047876 # ok 478 Set VL 2560
6371 22:58:25.047961 # ok 479 # SKIP Disabled ZA for VL 2560
6372 22:58:25.048046 # ok 480 # SKIP Get and set data for VL 2560
6373 22:58:25.048131 # ok 481 Set VL 2576
6374 22:58:25.048214 # ok 482 # SKIP Disabled ZA for VL 2576
6375 22:58:25.048299 # ok 483 # SKIP Get and set data for VL 2576
6376 22:58:25.048384 # ok 484 Set VL 2592
6377 22:58:25.052663 # ok 485 # SKIP Disabled ZA for VL 2592
6378 22:58:25.053005 # ok 486 # SKIP Get and set data for VL 2592
6379 22:58:25.053118 # ok 487 Set VL 2608
6380 22:58:25.053204 # ok 488 # SKIP Disabled ZA for VL 2608
6381 22:58:25.053308 # ok 489 # SKIP Get and set data for VL 2608
6382 22:58:25.053401 # ok 490 Set VL 2624
6383 22:58:25.053500 # ok 491 # SKIP Disabled ZA for VL 2624
6384 22:58:25.053605 # ok 492 # SKIP Get and set data for VL 2624
6385 22:58:25.053701 # ok 493 Set VL 2640
6386 22:58:25.053786 # ok 494 # SKIP Disabled ZA for VL 2640
6387 22:58:25.053869 # ok 495 # SKIP Get and set data for VL 2640
6388 22:58:25.053952 # ok 496 Set VL 2656
6389 22:58:25.054052 # ok 497 # SKIP Disabled ZA for VL 2656
6390 22:58:25.054137 # ok 498 # SKIP Get and set data for VL 2656
6391 22:58:25.054220 # ok 499 Set VL 2672
6392 22:58:25.054301 # ok 500 # SKIP Disabled ZA for VL 2672
6393 22:58:25.054696 # ok 501 # SKIP Get and set data for VL 2672
6394 22:58:25.054816 # ok 502 Set VL 2688
6395 22:58:25.054903 # ok 503 # SKIP Disabled ZA for VL 2688
6396 22:58:25.054987 # ok 504 # SKIP Get and set data for VL 2688
6397 22:58:25.055069 # ok 505 Set VL 2704
6398 22:58:25.055152 # ok 506 # SKIP Disabled ZA for VL 2704
6399 22:58:25.055235 # ok 507 # SKIP Get and set data for VL 2704
6400 22:58:25.055318 # ok 508 Set VL 2720
6401 22:58:25.055401 # ok 509 # SKIP Disabled ZA for VL 2720
6402 22:58:25.055503 # ok 510 # SKIP Get and set data for VL 2720
6403 22:58:25.055588 # ok 511 Set VL 2736
6404 22:58:25.055671 # ok 512 # SKIP Disabled ZA for VL 2736
6405 22:58:25.055753 # ok 513 # SKIP Get and set data for VL 2736
6406 22:58:25.055836 # ok 514 Set VL 2752
6407 22:58:25.055918 # ok 515 # SKIP Disabled ZA for VL 2752
6408 22:58:25.056000 # ok 516 # SKIP Get and set data for VL 2752
6409 22:58:25.056083 # ok 517 Set VL 2768
6410 22:58:25.056165 # ok 518 # SKIP Disabled ZA for VL 2768
6411 22:58:25.057074 # ok 519 # SKIP Get and set data for VL 2768
6412 22:58:25.057183 # ok 520 Set VL 2784
6413 22:58:25.057269 # ok 521 # SKIP Disabled ZA for VL 2784
6414 22:58:25.057553 # ok 522 # SKIP Get and set data for VL 2784
6415 22:58:25.057664 # ok 523 Set VL 2800
6416 22:58:25.057751 # ok 524 # SKIP Disabled ZA for VL 2800
6417 22:58:25.057836 # ok 525 # SKIP Get and set data for VL 2800
6418 22:58:25.057919 # ok 526 Set VL 2816
6419 22:58:25.058001 # ok 527 # SKIP Disabled ZA for VL 2816
6420 22:58:25.058101 # ok 528 # SKIP Get and set data for VL 2816
6421 22:58:25.058186 # ok 529 Set VL 2832
6422 22:58:25.058271 # ok 530 # SKIP Disabled ZA for VL 2832
6423 22:58:25.058356 # ok 531 # SKIP Get and set data for VL 2832
6424 22:58:25.058445 # ok 532 Set VL 2848
6425 22:58:25.058527 # ok 533 # SKIP Disabled ZA for VL 2848
6426 22:58:25.058626 # ok 534 # SKIP Get and set data for VL 2848
6427 22:58:25.058712 # ok 535 Set VL 2864
6428 22:58:25.058794 # ok 536 # SKIP Disabled ZA for VL 2864
6429 22:58:25.058876 # ok 537 # SKIP Get and set data for VL 2864
6430 22:58:25.058959 # ok 538 Set VL 2880
6431 22:58:25.059058 # ok 539 # SKIP Disabled ZA for VL 2880
6432 22:58:25.059143 # ok 540 # SKIP Get and set data for VL 2880
6433 22:58:25.059226 # ok 541 Set VL 2896
6434 22:58:25.059313 # ok 542 # SKIP Disabled ZA for VL 2896
6435 22:58:25.059395 # ok 543 # SKIP Get and set data for VL 2896
6436 22:58:25.059477 # ok 544 Set VL 2912
6437 22:58:25.059559 # ok 545 # SKIP Disabled ZA for VL 2912
6438 22:58:25.059659 # ok 546 # SKIP Get and set data for VL 2912
6439 22:58:25.059744 # ok 547 Set VL 2928
6440 22:58:25.059826 # ok 548 # SKIP Disabled ZA for VL 2928
6441 22:58:25.059916 # ok 549 # SKIP Get and set data for VL 2928
6442 22:58:25.059999 # ok 550 Set VL 2944
6443 22:58:25.060081 # ok 551 # SKIP Disabled ZA for VL 2944
6444 22:58:25.065783 # ok 552 # SKIP Get and set data for VL 2944
6445 22:58:25.066092 # ok 553 Set VL 2960
6446 22:58:25.066285 # ok 554 # SKIP Disabled ZA for VL 2960
6447 22:58:25.066742 # ok 555 # SKIP Get and set data for VL 2960
6448 22:58:25.066956 # ok 556 Set VL 2976
6449 22:58:25.067152 # ok 557 # SKIP Disabled ZA for VL 2976
6450 22:58:25.067343 # ok 558 # SKIP Get and set data for VL 2976
6451 22:58:25.067529 # ok 559 Set VL 2992
6452 22:58:25.067695 # ok 560 # SKIP Disabled ZA for VL 2992
6453 22:58:25.067886 # ok 561 # SKIP Get and set data for VL 2992
6454 22:58:25.068053 # ok 562 Set VL 3008
6455 22:58:25.068201 # ok 563 # SKIP Disabled ZA for VL 3008
6456 22:58:25.068347 # ok 564 # SKIP Get and set data for VL 3008
6457 22:58:25.068491 # ok 565 Set VL 3024
6458 22:58:25.068633 # ok 566 # SKIP Disabled ZA for VL 3024
6459 22:58:25.068777 # ok 567 # SKIP Get and set data for VL 3024
6460 22:58:25.068928 # ok 568 Set VL 3040
6461 22:58:25.069829 # ok 569 # SKIP Disabled ZA for VL 3040
6462 22:58:25.070031 # ok 570 # SKIP Get and set data for VL 3040
6463 22:58:25.070190 # ok 571 Set VL 3056
6464 22:58:25.070342 # ok 572 # SKIP Disabled ZA for VL 3056
6465 22:58:25.070503 # ok 573 # SKIP Get and set data for VL 3056
6466 22:58:25.070659 # ok 574 Set VL 3072
6467 22:58:25.073233 # ok 575 # SKIP Disabled ZA for VL 3072
6468 22:58:25.073732 # ok 576 # SKIP Get and set data for VL 3072
6469 22:58:25.073941 # ok 577 Set VL 3088
6470 22:58:25.074122 # ok 578 # SKIP Disabled ZA for VL 3088
6471 22:58:25.074303 # ok 579 # SKIP Get and set data for VL 3088
6472 22:58:25.074484 # ok 580 Set VL 3104
6473 22:58:25.074699 # ok 581 # SKIP Disabled ZA for VL 3104
6474 22:58:25.074881 # ok 582 # SKIP Get and set data for VL 3104
6475 22:58:25.075059 # ok 583 Set VL 3120
6476 22:58:25.075228 # ok 584 # SKIP Disabled ZA for VL 3120
6477 22:58:25.075401 # ok 585 # SKIP Get and set data for VL 3120
6478 22:58:25.075568 # ok 586 Set VL 3136
6479 22:58:25.075694 # ok 587 # SKIP Disabled ZA for VL 3136
6480 22:58:25.075810 # ok 588 # SKIP Get and set data for VL 3136
6481 22:58:25.075925 # ok 589 Set VL 3152
6482 22:58:25.081429 # ok 590 # SKIP Disabled ZA for VL 3152
6483 22:58:25.081937 # ok 591 # SKIP Get and set data for VL 3152
6484 22:58:25.082092 # ok 592 Set VL 3168
6485 22:58:25.082243 # ok 593 # SKIP Disabled ZA for VL 3168
6486 22:58:25.082401 # ok 594 # SKIP Get and set data for VL 3168
6487 22:58:25.082592 # ok 595 Set VL 3184
6488 22:58:25.082841 # ok 596 # SKIP Disabled ZA for VL 3184
6489 22:58:25.083031 # ok 597 # SKIP Get and set data for VL 3184
6490 22:58:25.083179 # ok 598 Set VL 3200
6491 22:58:25.083308 # ok 599 # SKIP Disabled ZA for VL 3200
6492 22:58:25.083434 # ok 600 # SKIP Get and set data for VL 3200
6493 22:58:25.083559 # ok 601 Set VL 3216
6494 22:58:25.083679 # ok 602 # SKIP Disabled ZA for VL 3216
6495 22:58:25.083796 # ok 603 # SKIP Get and set data for VL 3216
6496 22:58:25.083912 # ok 604 Set VL 3232
6497 22:58:25.084055 # ok 605 # SKIP Disabled ZA for VL 3232
6498 22:58:25.084176 # ok 606 # SKIP Get and set data for VL 3232
6499 22:58:25.084294 # ok 607 Set VL 3248
6500 22:58:25.084415 # ok 608 # SKIP Disabled ZA for VL 3248
6501 22:58:25.084533 # ok 609 # SKIP Get and set data for VL 3248
6502 22:58:25.084650 # ok 610 Set VL 3264
6503 22:58:25.084766 # ok 611 # SKIP Disabled ZA for VL 3264
6504 22:58:25.084883 # ok 612 # SKIP Get and set data for VL 3264
6505 22:58:25.089422 # ok 613 Set VL 3280
6506 22:58:25.089657 # ok 614 # SKIP Disabled ZA for VL 3280
6507 22:58:25.090217 # ok 615 # SKIP Get and set data for VL 3280
6508 22:58:25.090442 # ok 616 Set VL 3296
6509 22:58:25.090654 # ok 617 # SKIP Disabled ZA for VL 3296
6510 22:58:25.090841 # ok 618 # SKIP Get and set data for VL 3296
6511 22:58:25.091029 # ok 619 Set VL 3312
6512 22:58:25.091245 # ok 620 # SKIP Disabled ZA for VL 3312
6513 22:58:25.091442 # ok 621 # SKIP Get and set data for VL 3312
6514 22:58:25.091651 # ok 622 Set VL 3328
6515 22:58:25.091785 # ok 623 # SKIP Disabled ZA for VL 3328
6516 22:58:25.091903 # ok 624 # SKIP Get and set data for VL 3328
6517 22:58:25.092019 # ok 625 Set VL 3344
6518 22:58:25.092161 # ok 626 # SKIP Disabled ZA for VL 3344
6519 22:58:25.092366 # ok 627 # SKIP Get and set data for VL 3344
6520 22:58:25.092574 # ok 628 Set VL 3360
6521 22:58:25.092787 # ok 629 # SKIP Disabled ZA for VL 3360
6522 22:58:25.093000 # ok 630 # SKIP Get and set data for VL 3360
6523 22:58:25.093208 # ok 631 Set VL 3376
6524 22:58:25.093406 # ok 632 # SKIP Disabled ZA for VL 3376
6525 22:58:25.093594 # ok 633 # SKIP Get and set data for VL 3376
6526 22:58:25.094505 # ok 634 Set VL 3392
6527 22:58:25.094675 # ok 635 # SKIP Disabled ZA for VL 3392
6528 22:58:25.094847 # ok 636 # SKIP Get and set data for VL 3392
6529 22:58:25.095028 # ok 637 Set VL 3408
6530 22:58:25.095273 # ok 638 # SKIP Disabled ZA for VL 3408
6531 22:58:25.095474 # ok 639 # SKIP Get and set data for VL 3408
6532 22:58:25.095619 # ok 640 Set VL 3424
6533 22:58:25.095737 # ok 641 # SKIP Disabled ZA for VL 3424
6534 22:58:25.095851 # ok 642 # SKIP Get and set data for VL 3424
6535 22:58:25.095967 # ok 643 Set VL 3440
6536 22:58:25.096082 # ok 644 # SKIP Disabled ZA for VL 3440
6537 22:58:25.096194 # ok 645 # SKIP Get and set data for VL 3440
6538 22:58:25.096310 # ok 646 Set VL 3456
6539 22:58:25.096424 # ok 647 # SKIP Disabled ZA for VL 3456
6540 22:58:25.096536 # ok 648 # SKIP Get and set data for VL 3456
6541 22:58:25.096650 # ok 649 Set VL 3472
6542 22:58:25.096763 # ok 650 # SKIP Disabled ZA for VL 3472
6543 22:58:25.096876 # ok 651 # SKIP Get and set data for VL 3472
6544 22:58:25.096990 # ok 652 Set VL 3488
6545 22:58:25.097104 # ok 653 # SKIP Disabled ZA for VL 3488
6546 22:58:25.097217 # ok 654 # SKIP Get and set data for VL 3488
6547 22:58:25.097330 # ok 655 Set VL 3504
6548 22:58:25.097444 # ok 656 # SKIP Disabled ZA for VL 3504
6549 22:58:25.097557 # ok 657 # SKIP Get and set data for VL 3504
6550 22:58:25.097728 # ok 658 Set VL 3520
6551 22:58:25.097934 # ok 659 # SKIP Disabled ZA for VL 3520
6552 22:58:25.098119 # ok 660 # SKIP Get and set data for VL 3520
6553 22:58:25.098302 # ok 661 Set VL 3536
6554 22:58:25.098485 # ok 662 # SKIP Disabled ZA for VL 3536
6555 22:58:25.098669 # ok 663 # SKIP Get and set data for VL 3536
6556 22:58:25.098811 # ok 664 Set VL 3552
6557 22:58:25.098954 # ok 665 # SKIP Disabled ZA for VL 3552
6558 22:58:25.099097 # ok 666 # SKIP Get and set data for VL 3552
6559 22:58:25.099237 # ok 667 Set VL 3568
6560 22:58:25.099618 # ok 668 # SKIP Disabled ZA for VL 3568
6561 22:58:25.099757 # ok 669 # SKIP Get and set data for VL 3568
6562 22:58:25.099903 # ok 670 Set VL 3584
6563 22:58:25.100045 # ok 671 # SKIP Disabled ZA for VL 3584
6564 22:58:25.100188 # ok 672 # SKIP Get and set data for VL 3584
6565 22:58:25.100331 # ok 673 Set VL 3600
6566 22:58:25.100472 # ok 674 # SKIP Disabled ZA for VL 3600
6567 22:58:25.100615 # ok 675 # SKIP Get and set data for VL 3600
6568 22:58:25.100757 # ok 676 Set VL 3616
6569 22:58:25.100898 # ok 677 # SKIP Disabled ZA for VL 3616
6570 22:58:25.101102 # ok 678 # SKIP Get and set data for VL 3616
6571 22:58:25.101344 # ok 679 Set VL 3632
6572 22:58:25.101536 # ok 680 # SKIP Disabled ZA for VL 3632
6573 22:58:25.101734 # ok 681 # SKIP Get and set data for VL 3632
6574 22:58:25.101898 # ok 682 Set VL 3648
6575 22:58:25.102030 # ok 683 # SKIP Disabled ZA for VL 3648
6576 22:58:25.102169 # ok 684 # SKIP Get and set data for VL 3648
6577 22:58:25.102359 # ok 685 Set VL 3664
6578 22:58:25.102527 # ok 686 # SKIP Disabled ZA for VL 3664
6579 22:58:25.102738 # ok 687 # SKIP Get and set data for VL 3664
6580 22:58:25.102977 # ok 688 Set VL 3680
6581 22:58:25.103168 # ok 689 # SKIP Disabled ZA for VL 3680
6582 22:58:25.103388 # ok 690 # SKIP Get and set data for VL 3680
6583 22:58:25.103574 # ok 691 Set VL 3696
6584 22:58:25.103736 # ok 692 # SKIP Disabled ZA for VL 3696
6585 22:58:25.103860 # ok 693 # SKIP Get and set data for VL 3696
6586 22:58:25.103975 # ok 694 Set VL 3712
6587 22:58:25.104090 # ok 695 # SKIP Disabled ZA for VL 3712
6588 22:58:25.104204 # ok 696 # SKIP Get and set data for VL 3712
6589 22:58:25.104319 # ok 697 Set VL 3728
6590 22:58:25.104433 # ok 698 # SKIP Disabled ZA for VL 3728
6591 22:58:25.104546 # ok 699 # SKIP Get and set data for VL 3728
6592 22:58:25.104660 # ok 700 Set VL 3744
6593 22:58:25.104772 # ok 701 # SKIP Disabled ZA for VL 3744
6594 22:58:25.104885 # ok 702 # SKIP Get and set data for VL 3744
6595 22:58:25.104997 # ok 703 Set VL 3760
6596 22:58:25.107433 # ok 704 # SKIP Disabled ZA for VL 3760
6597 22:58:25.113380 # ok 705 # SKIP Get and set data for VL 3760
6598 22:58:25.113957 # ok 706 Set VL 3776
6599 22:58:25.114102 # ok 707 # SKIP Disabled ZA for VL 3776
6600 22:58:25.114224 # ok 708 # SKIP Get and set data for VL 3776
6601 22:58:25.114344 # ok 709 Set VL 3792
6602 22:58:25.114489 # ok 710 # SKIP Disabled ZA for VL 3792
6603 22:58:25.114643 # ok 711 # SKIP Get and set data for VL 3792
6604 22:58:25.114758 # ok 712 Set VL 3808
6605 22:58:25.115328 # ok 713 # SKIP Disabled ZA for VL 3808
6606 22:58:25.115484 # ok 714 # SKIP Get and set data for VL 3808
6607 22:58:25.115591 # ok 715 Set VL 3824
6608 22:58:25.115682 # ok 716 # SKIP Disabled ZA for VL 3824
6609 22:58:25.115770 # ok 717 # SKIP Get and set data for VL 3824
6610 22:58:25.115858 # ok 718 Set VL 3840
6611 22:58:25.115943 # ok 719 # SKIP Disabled ZA for VL 3840
6612 22:58:25.116027 # ok 720 # SKIP Get and set data for VL 3840
6613 22:58:25.116111 # ok 721 Set VL 3856
6614 22:58:25.116196 # ok 722 # SKIP Disabled ZA for VL 3856
6615 22:58:25.116281 # ok 723 # SKIP Get and set data for VL 3856
6616 22:58:25.116365 # ok 724 Set VL 3872
6617 22:58:25.116449 # ok 725 # SKIP Disabled ZA for VL 3872
6618 22:58:25.116534 # ok 726 # SKIP Get and set data for VL 3872
6619 22:58:25.116618 # ok 727 Set VL 3888
6620 22:58:25.116901 # ok 728 # SKIP Disabled ZA for VL 3888
6621 22:58:25.116994 # ok 729 # SKIP Get and set data for VL 3888
6622 22:58:25.117081 # ok 730 Set VL 3904
6623 22:58:25.117167 # ok 731 # SKIP Disabled ZA for VL 3904
6624 22:58:25.123511 # ok 732 # SKIP Get and set data for VL 3904
6625 22:58:25.123784 # ok 733 Set VL 3920
6626 22:58:25.123898 # ok 734 # SKIP Disabled ZA for VL 3920
6627 22:58:25.123989 # ok 735 # SKIP Get and set data for VL 3920
6628 22:58:25.124081 # ok 736 Set VL 3936
6629 22:58:25.124201 # ok 737 # SKIP Disabled ZA for VL 3936
6630 22:58:25.124302 # ok 738 # SKIP Get and set data for VL 3936
6631 22:58:25.124398 # ok 739 Set VL 3952
6632 22:58:25.124485 # ok 740 # SKIP Disabled ZA for VL 3952
6633 22:58:25.124569 # ok 741 # SKIP Get and set data for VL 3952
6634 22:58:25.124650 # ok 742 Set VL 3968
6635 22:58:25.124731 # ok 743 # SKIP Disabled ZA for VL 3968
6636 22:58:25.124809 # ok 744 # SKIP Get and set data for VL 3968
6637 22:58:25.124884 # ok 745 Set VL 3984
6638 22:58:25.124957 # ok 746 # SKIP Disabled ZA for VL 3984
6639 22:58:25.125031 # ok 747 # SKIP Get and set data for VL 3984
6640 22:58:25.125106 # ok 748 Set VL 4000
6641 22:58:25.125183 # ok 749 # SKIP Disabled ZA for VL 4000
6642 22:58:25.125261 # ok 750 # SKIP Get and set data for VL 4000
6643 22:58:25.125339 # ok 751 Set VL 4016
6644 22:58:25.125415 # ok 752 # SKIP Disabled ZA for VL 4016
6645 22:58:25.125491 # ok 753 # SKIP Get and set data for VL 4016
6646 22:58:25.125568 # ok 754 Set VL 4032
6647 22:58:25.125644 # ok 755 # SKIP Disabled ZA for VL 4032
6648 22:58:25.125734 # ok 756 # SKIP Get and set data for VL 4032
6649 22:58:25.125813 # ok 757 Set VL 4048
6650 22:58:25.125889 # ok 758 # SKIP Disabled ZA for VL 4048
6651 22:58:25.133366 # ok 759 # SKIP Get and set data for VL 4048
6652 22:58:25.133639 # ok 760 Set VL 4064
6653 22:58:25.133940 # ok 761 # SKIP Disabled ZA for VL 4064
6654 22:58:25.134034 # ok 762 # SKIP Get and set data for VL 4064
6655 22:58:25.134117 # ok 763 Set VL 4080
6656 22:58:25.134194 # ok 764 # SKIP Disabled ZA for VL 4080
6657 22:58:25.134268 # ok 765 # SKIP Get and set data for VL 4080
6658 22:58:25.134345 # ok 766 Set VL 4096
6659 22:58:25.134436 # ok 767 # SKIP Disabled ZA for VL 4096
6660 22:58:25.134515 # ok 768 # SKIP Get and set data for VL 4096
6661 22:58:25.134593 # ok 769 Set VL 4112
6662 22:58:25.134685 # ok 770 # SKIP Disabled ZA for VL 4112
6663 22:58:25.134785 # ok 771 # SKIP Get and set data for VL 4112
6664 22:58:25.134851 # ok 772 Set VL 4128
6665 22:58:25.134932 # ok 773 # SKIP Disabled ZA for VL 4128
6666 22:58:25.135013 # ok 774 # SKIP Get and set data for VL 4128
6667 22:58:25.135078 # ok 775 Set VL 4144
6668 22:58:25.135160 # ok 776 # SKIP Disabled ZA for VL 4144
6669 22:58:25.135246 # ok 777 # SKIP Get and set data for VL 4144
6670 22:58:25.135314 # ok 778 Set VL 4160
6671 22:58:25.135573 # ok 779 # SKIP Disabled ZA for VL 4160
6672 22:58:25.141051 # ok 780 # SKIP Get and set data for VL 4160
6673 22:58:25.141398 # ok 781 Set VL 4176
6674 22:58:25.141482 # ok 782 # SKIP Disabled ZA for VL 4176
6675 22:58:25.141558 # ok 783 # SKIP Get and set data for VL 4176
6676 22:58:25.141655 # ok 784 Set VL 4192
6677 22:58:25.141733 # ok 785 # SKIP Disabled ZA for VL 4192
6678 22:58:25.141808 # ok 786 # SKIP Get and set data for VL 4192
6679 22:58:25.141870 # ok 787 Set VL 4208
6680 22:58:25.141931 # ok 788 # SKIP Disabled ZA for VL 4208
6681 22:58:25.142003 # ok 789 # SKIP Get and set data for VL 4208
6682 22:58:25.142064 # ok 790 Set VL 4224
6683 22:58:25.142134 # ok 791 # SKIP Disabled ZA for VL 4224
6684 22:58:25.142390 # ok 792 # SKIP Get and set data for VL 4224
6685 22:58:25.142469 # ok 793 Set VL 4240
6686 22:58:25.142534 # ok 794 # SKIP Disabled ZA for VL 4240
6687 22:58:25.142622 # ok 795 # SKIP Get and set data for VL 4240
6688 22:58:25.142710 # ok 796 Set VL 4256
6689 22:58:25.142808 # ok 797 # SKIP Disabled ZA for VL 4256
6690 22:58:25.142886 # ok 798 # SKIP Get and set data for VL 4256
6691 22:58:25.142973 # ok 799 Set VL 4272
6692 22:58:25.143240 # ok 800 # SKIP Disabled ZA for VL 4272
6693 22:58:25.143307 # ok 801 # SKIP Get and set data for VL 4272
6694 22:58:25.143366 # ok 802 Set VL 4288
6695 22:58:25.143626 # ok 803 # SKIP Disabled ZA for VL 4288
6696 22:58:25.143693 # ok 804 # SKIP Get and set data for VL 4288
6697 22:58:25.143753 # ok 805 Set VL 4304
6698 22:58:25.161203 # ok 806 # SKIP Disabled ZA for VL 4304
6699 22:58:25.161661 # ok 807 # SKIP Get and set data for VL 4304
6700 22:58:25.161747 # ok 808 Set VL 4320
6701 22:58:25.161828 # ok 809 # SKIP Disabled ZA for VL 4320
6702 22:58:25.161913 # ok 810 # SKIP Get and set data for VL 4320
6703 22:58:25.161992 # ok 811 Set VL 4336
6704 22:58:25.162086 # ok 812 # SKIP Disabled ZA for VL 4336
6705 22:58:25.162164 # ok 813 # SKIP Get and set data for VL 4336
6706 22:58:25.162233 # ok 814 Set VL 4352
6707 22:58:25.162310 # ok 815 # SKIP Disabled ZA for VL 4352
6708 22:58:25.162412 # ok 816 # SKIP Get and set data for VL 4352
6709 22:58:25.162505 # ok 817 Set VL 4368
6710 22:58:25.162590 # ok 818 # SKIP Disabled ZA for VL 4368
6711 22:58:25.162678 # ok 819 # SKIP Get and set data for VL 4368
6712 22:58:25.162758 # ok 820 Set VL 4384
6713 22:58:25.162820 # ok 821 # SKIP Disabled ZA for VL 4384
6714 22:58:25.182842 # ok 822 # SKIP Get and set data for VL 4384
6715 22:58:25.183428 # ok 823 Set VL 4400
6716 22:58:25.183592 # ok 824 # SKIP Disabled ZA for VL 4400
6717 22:58:25.183713 # ok 825 # SKIP Get and set data for VL 4400
6718 22:58:25.183830 # ok 826 Set VL 4416
6719 22:58:25.183942 # ok 827 # SKIP Disabled ZA for VL 4416
6720 22:58:25.184053 # ok 828 # SKIP Get and set data for VL 4416
6721 22:58:25.184165 # ok 829 Set VL 4432
6722 22:58:25.184276 # ok 830 # SKIP Disabled ZA for VL 4432
6723 22:58:25.184413 # ok 831 # SKIP Get and set data for VL 4432
6724 22:58:25.197999 # ok 832 Set VL 4448
6725 22:58:25.198357 # ok 833 # SKIP Disabled ZA for VL 4448
6726 22:58:25.198556 # ok 834 # SKIP Get and set data for VL 4448
6727 22:58:25.198746 # ok 835 Set VL 4464
6728 22:58:25.198954 # ok 836 # SKIP Disabled ZA for VL 4464
6729 22:58:25.199214 # ok 837 # SKIP Get and set data for VL 4464
6730 22:58:25.199455 # ok 838 Set VL 4480
6731 22:58:25.199642 # ok 839 # SKIP Disabled ZA for VL 4480
6732 22:58:25.199786 # ok 840 # SKIP Get and set data for VL 4480
6733 22:58:25.199904 # ok 841 Set VL 4496
6734 22:58:25.200017 # ok 842 # SKIP Disabled ZA for VL 4496
6735 22:58:25.200131 # ok 843 # SKIP Get and set data for VL 4496
6736 22:58:25.200249 # ok 844 Set VL 4512
6737 22:58:25.200426 # ok 845 # SKIP Disabled ZA for VL 4512
6738 22:58:25.200549 # ok 846 # SKIP Get and set data for VL 4512
6739 22:58:25.200664 # ok 847 Set VL 4528
6740 22:58:25.200777 # ok 848 # SKIP Disabled ZA for VL 4528
6741 22:58:25.200891 # ok 849 # SKIP Get and set data for VL 4528
6742 22:58:25.201040 # ok 850 Set VL 4544
6743 22:58:25.201162 # ok 851 # SKIP Disabled ZA for VL 4544
6744 22:58:25.201278 # ok 852 # SKIP Get and set data for VL 4544
6745 22:58:25.201392 # ok 853 Set VL 4560
6746 22:58:25.201507 # ok 854 # SKIP Disabled ZA for VL 4560
6747 22:58:25.213842 # ok 855 # SKIP Get and set data for VL 4560
6748 22:58:25.214200 # ok 856 Set VL 4576
6749 22:58:25.214483 # ok 857 # SKIP Disabled ZA for VL 4576
6750 22:58:25.214708 # ok 858 # SKIP Get and set data for VL 4576
6751 22:58:25.214894 # ok 859 Set VL 4592
6752 22:58:25.215092 # ok 860 # SKIP Disabled ZA for VL 4592
6753 22:58:25.215325 # ok 861 # SKIP Get and set data for VL 4592
6754 22:58:25.215552 # ok 862 Set VL 4608
6755 22:58:25.215697 # ok 863 # SKIP Disabled ZA for VL 4608
6756 22:58:25.215845 # ok 864 # SKIP Get and set data for VL 4608
6757 22:58:25.215965 # ok 865 Set VL 4624
6758 22:58:25.216080 # ok 866 # SKIP Disabled ZA for VL 4624
6759 22:58:25.216195 # ok 867 # SKIP Get and set data for VL 4624
6760 22:58:25.216309 # ok 868 Set VL 4640
6761 22:58:25.216421 # ok 869 # SKIP Disabled ZA for VL 4640
6762 22:58:25.216538 # ok 870 # SKIP Get and set data for VL 4640
6763 22:58:25.216651 # ok 871 Set VL 4656
6764 22:58:25.216764 # ok 872 # SKIP Disabled ZA for VL 4656
6765 22:58:25.216878 # ok 873 # SKIP Get and set data for VL 4656
6766 22:58:25.216997 # ok 874 Set VL 4672
6767 22:58:25.217111 # ok 875 # SKIP Disabled ZA for VL 4672
6768 22:58:25.230503 # ok 876 # SKIP Get and set data for VL 4672
6769 22:58:25.230736 # ok 877 Set VL 4688
6770 22:58:25.230837 # ok 878 # SKIP Disabled ZA for VL 4688
6771 22:58:25.230921 # ok 879 # SKIP Get and set data for VL 4688
6772 22:58:25.231219 # ok 880 Set VL 4704
6773 22:58:25.231322 # ok 881 # SKIP Disabled ZA for VL 4704
6774 22:58:25.231403 # ok 882 # SKIP Get and set data for VL 4704
6775 22:58:25.231477 # ok 883 Set VL 4720
6776 22:58:25.231550 # ok 884 # SKIP Disabled ZA for VL 4720
6777 22:58:25.231629 # ok 885 # SKIP Get and set data for VL 4720
6778 22:58:25.231737 # ok 886 Set VL 4736
6779 22:58:25.231830 # ok 887 # SKIP Disabled ZA for VL 4736
6780 22:58:25.231921 # ok 888 # SKIP Get and set data for VL 4736
6781 22:58:25.237851 # ok 889 Set VL 4752
6782 22:58:25.238289 # ok 890 # SKIP Disabled ZA for VL 4752
6783 22:58:25.238402 # ok 891 # SKIP Get and set data for VL 4752
6784 22:58:25.238502 # ok 892 Set VL 4768
6785 22:58:25.238601 # ok 893 # SKIP Disabled ZA for VL 4768
6786 22:58:25.238696 # ok 894 # SKIP Get and set data for VL 4768
6787 22:58:25.238791 # ok 895 Set VL 4784
6788 22:58:25.239095 # ok 896 # SKIP Disabled ZA for VL 4784
6789 22:58:25.239209 # ok 897 # SKIP Get and set data for VL 4784
6790 22:58:25.239306 # ok 898 Set VL 4800
6791 22:58:25.239440 # ok 899 # SKIP Disabled ZA for VL 4800
6792 22:58:25.239550 # ok 900 # SKIP Get and set data for VL 4800
6793 22:58:25.239651 # ok 901 Set VL 4816
6794 22:58:25.239746 # ok 902 # SKIP Disabled ZA for VL 4816
6795 22:58:25.239840 # ok 903 # SKIP Get and set data for VL 4816
6796 22:58:25.239934 # ok 904 Set VL 4832
6797 22:58:25.240028 # ok 905 # SKIP Disabled ZA for VL 4832
6798 22:58:25.240124 # ok 906 # SKIP Get and set data for VL 4832
6799 22:58:25.240236 # ok 907 Set VL 4848
6800 22:58:25.240332 # ok 908 # SKIP Disabled ZA for VL 4848
6801 22:58:25.253757 # ok 909 # SKIP Get and set data for VL 4848
6802 22:58:25.254234 # ok 910 Set VL 4864
6803 22:58:25.254364 # ok 911 # SKIP Disabled ZA for VL 4864
6804 22:58:25.254475 # ok 912 # SKIP Get and set data for VL 4864
6805 22:58:25.254602 # ok 913 Set VL 4880
6806 22:58:25.254700 # ok 914 # SKIP Disabled ZA for VL 4880
6807 22:58:25.254794 # ok 915 # SKIP Get and set data for VL 4880
6808 22:58:25.254897 # ok 916 Set VL 4896
6809 22:58:25.254999 # ok 917 # SKIP Disabled ZA for VL 4896
6810 22:58:25.255110 # ok 918 # SKIP Get and set data for VL 4896
6811 22:58:25.255210 # ok 919 Set VL 4912
6812 22:58:25.255314 # ok 920 # SKIP Disabled ZA for VL 4912
6813 22:58:25.255419 # ok 921 # SKIP Get and set data for VL 4912
6814 22:58:25.255524 # ok 922 Set VL 4928
6815 22:58:25.255641 # ok 923 # SKIP Disabled ZA for VL 4928
6816 22:58:25.255713 # ok 924 # SKIP Get and set data for VL 4928
6817 22:58:25.255774 # ok 925 Set VL 4944
6818 22:58:25.255834 # ok 926 # SKIP Disabled ZA for VL 4944
6819 22:58:25.255894 # ok 927 # SKIP Get and set data for VL 4944
6820 22:58:25.255953 # ok 928 Set VL 4960
6821 22:58:25.256012 # ok 929 # SKIP Disabled ZA for VL 4960
6822 22:58:25.269551 # ok 930 # SKIP Get and set data for VL 4960
6823 22:58:25.269773 # ok 931 Set VL 4976
6824 22:58:25.270078 # ok 932 # SKIP Disabled ZA for VL 4976
6825 22:58:25.270177 # ok 933 # SKIP Get and set data for VL 4976
6826 22:58:25.270270 # ok 934 Set VL 4992
6827 22:58:25.270364 # ok 935 # SKIP Disabled ZA for VL 4992
6828 22:58:25.270460 # ok 936 # SKIP Get and set data for VL 4992
6829 22:58:25.270571 # ok 937 Set VL 5008
6830 22:58:25.270666 # ok 938 # SKIP Disabled ZA for VL 5008
6831 22:58:25.270752 # ok 939 # SKIP Get and set data for VL 5008
6832 22:58:25.270836 # ok 940 Set VL 5024
6833 22:58:25.270936 # ok 941 # SKIP Disabled ZA for VL 5024
6834 22:58:25.271024 # ok 942 # SKIP Get and set data for VL 5024
6835 22:58:25.271108 # ok 943 Set VL 5040
6836 22:58:25.271192 # ok 944 # SKIP Disabled ZA for VL 5040
6837 22:58:25.271295 # ok 945 # SKIP Get and set data for VL 5040
6838 22:58:25.271383 # ok 946 Set VL 5056
6839 22:58:25.271466 # ok 947 # SKIP Disabled ZA for VL 5056
6840 22:58:25.271551 # ok 948 # SKIP Get and set data for VL 5056
6841 22:58:25.271652 # ok 949 Set VL 5072
6842 22:58:25.271738 # ok 950 # SKIP Disabled ZA for VL 5072
6843 22:58:25.271836 # ok 951 # SKIP Get and set data for VL 5072
6844 22:58:25.271922 # ok 952 Set VL 5088
6845 22:58:25.272005 # ok 953 # SKIP Disabled ZA for VL 5088
6846 22:58:25.272102 # ok 954 # SKIP Get and set data for VL 5088
6847 22:58:25.272188 # ok 955 Set VL 5104
6848 22:58:25.272285 # ok 956 # SKIP Disabled ZA for VL 5104
6849 22:58:25.293807 # ok 957 # SKIP Get and set data for VL 5104
6850 22:58:25.294038 # ok 958 Set VL 5120
6851 22:58:25.294135 # ok 959 # SKIP Disabled ZA for VL 5120
6852 22:58:25.294455 # ok 960 # SKIP Get and set data for VL 5120
6853 22:58:25.294560 # ok 961 Set VL 5136
6854 22:58:25.294665 # ok 962 # SKIP Disabled ZA for VL 5136
6855 22:58:25.294758 # ok 963 # SKIP Get and set data for VL 5136
6856 22:58:25.294824 # ok 964 Set VL 5152
6857 22:58:25.294887 # ok 965 # SKIP Disabled ZA for VL 5152
6858 22:58:25.294966 # ok 966 # SKIP Get and set data for VL 5152
6859 22:58:25.295042 # ok 967 Set VL 5168
6860 22:58:25.295121 # ok 968 # SKIP Disabled ZA for VL 5168
6861 22:58:25.295197 # ok 969 # SKIP Get and set data for VL 5168
6862 22:58:25.295272 # ok 970 Set VL 5184
6863 22:58:25.295360 # ok 971 # SKIP Disabled ZA for VL 5184
6864 22:58:25.295440 # ok 972 # SKIP Get and set data for VL 5184
6865 22:58:25.295516 # ok 973 Set VL 5200
6866 22:58:25.295592 # ok 974 # SKIP Disabled ZA for VL 5200
6867 22:58:25.295684 # ok 975 # SKIP Get and set data for VL 5200
6868 22:58:25.295752 # ok 976 Set VL 5216
6869 22:58:25.295815 # ok 977 # SKIP Disabled ZA for VL 5216
6870 22:58:25.295876 # ok 978 # SKIP Get and set data for VL 5216
6871 22:58:25.295934 # ok 979 Set VL 5232
6872 22:58:25.309880 # ok 980 # SKIP Disabled ZA for VL 5232
6873 22:58:25.310204 # ok 981 # SKIP Get and set data for VL 5232
6874 22:58:25.310349 # ok 982 Set VL 5248
6875 22:58:25.310754 # ok 983 # SKIP Disabled ZA for VL 5248
6876 22:58:25.310969 # ok 984 # SKIP Get and set data for VL 5248
6877 22:58:25.311173 # ok 985 Set VL 5264
6878 22:58:25.311377 # ok 986 # SKIP Disabled ZA for VL 5264
6879 22:58:25.311623 # ok 987 # SKIP Get and set data for VL 5264
6880 22:58:25.311855 # ok 988 Set VL 5280
6881 22:58:25.312079 # ok 989 # SKIP Disabled ZA for VL 5280
6882 22:58:25.312278 # ok 990 # SKIP Get and set data for VL 5280
6883 22:58:25.312456 # ok 991 Set VL 5296
6884 22:58:25.312623 # ok 992 # SKIP Disabled ZA for VL 5296
6885 22:58:25.312759 # ok 993 # SKIP Get and set data for VL 5296
6886 22:58:25.312885 # ok 994 Set VL 5312
6887 22:58:25.313010 # ok 995 # SKIP Disabled ZA for VL 5312
6888 22:58:25.313136 # ok 996 # SKIP Get and set data for VL 5312
6889 22:58:25.313270 # ok 997 Set VL 5328
6890 22:58:25.313502 # ok 998 # SKIP Disabled ZA for VL 5328
6891 22:58:25.313692 # ok 999 # SKIP Get and set data for VL 5328
6892 22:58:25.313905 # ok 1000 Set VL 5344
6893 22:58:25.314091 # ok 1001 # SKIP Disabled ZA for VL 5344
6894 22:58:25.314291 # ok 1002 # SKIP Get and set data for VL 5344
6895 22:58:25.314485 # ok 1003 Set VL 5360
6896 22:58:25.314659 # ok 1004 # SKIP Disabled ZA for VL 5360
6897 22:58:25.314836 # ok 1005 # SKIP Get and set data for VL 5360
6898 22:58:25.315031 # ok 1006 Set VL 5376
6899 22:58:25.315220 # ok 1007 # SKIP Disabled ZA for VL 5376
6900 22:58:25.315410 # ok 1008 # SKIP Get and set data for VL 5376
6901 22:58:25.315601 # ok 1009 Set VL 5392
6902 22:58:25.315841 # ok 1010 # SKIP Disabled ZA for VL 5392
6903 22:58:25.316052 # ok 1011 # SKIP Get and set data for VL 5392
6904 22:58:25.316245 # ok 1012 Set VL 5408
6905 22:58:25.316434 # ok 1013 # SKIP Disabled ZA for VL 5408
6906 22:58:25.316622 # ok 1014 # SKIP Get and set data for VL 5408
6907 22:58:25.316810 # ok 1015 Set VL 5424
6908 22:58:25.316996 # ok 1016 # SKIP Disabled ZA for VL 5424
6909 22:58:25.317170 # ok 1017 # SKIP Get and set data for VL 5424
6910 22:58:25.317349 # ok 1018 Set VL 5440
6911 22:58:25.317537 # ok 1019 # SKIP Disabled ZA for VL 5440
6912 22:58:25.317686 # ok 1020 # SKIP Get and set data for VL 5440
6913 22:58:25.317807 # ok 1021 Set VL 5456
6914 22:58:25.317924 # ok 1022 # SKIP Disabled ZA for VL 5456
6915 22:58:25.318041 # ok 1023 # SKIP Get and set data for VL 5456
6916 22:58:25.318156 # ok 1024 Set VL 5472
6917 22:58:25.318272 # ok 1025 # SKIP Disabled ZA for VL 5472
6918 22:58:25.318390 # ok 1026 # SKIP Get and set data for VL 5472
6919 22:58:25.318505 # ok 1027 Set VL 5488
6920 22:58:25.318622 # ok 1028 # SKIP Disabled ZA for VL 5488
6921 22:58:25.318738 # ok 1029 # SKIP Get and set data for VL 5488
6922 22:58:25.318855 # ok 1030 Set VL 5504
6923 22:58:25.318971 # ok 1031 # SKIP Disabled ZA for VL 5504
6924 22:58:25.319088 # ok 1032 # SKIP Get and set data for VL 5504
6925 22:58:25.319204 # ok 1033 Set VL 5520
6926 22:58:25.319321 # ok 1034 # SKIP Disabled ZA for VL 5520
6927 22:58:25.319673 # ok 1035 # SKIP Get and set data for VL 5520
6928 22:58:25.319805 # ok 1036 Set VL 5536
6929 22:58:25.319928 # ok 1037 # SKIP Disabled ZA for VL 5536
6930 22:58:25.320098 # ok 1038 # SKIP Get and set data for VL 5536
6931 22:58:25.320223 # ok 1039 Set VL 5552
6932 22:58:25.320339 # ok 1040 # SKIP Disabled ZA for VL 5552
6933 22:58:25.320456 # ok 1041 # SKIP Get and set data for VL 5552
6934 22:58:25.320570 # ok 1042 Set VL 5568
6935 22:58:25.320686 # ok 1043 # SKIP Disabled ZA for VL 5568
6936 22:58:25.320800 # ok 1044 # SKIP Get and set data for VL 5568
6937 22:58:25.320916 # ok 1045 Set VL 5584
6938 22:58:25.321032 # ok 1046 # SKIP Disabled ZA for VL 5584
6939 22:58:25.321147 # ok 1047 # SKIP Get and set data for VL 5584
6940 22:58:25.321264 # ok 1048 Set VL 5600
6941 22:58:25.321451 # ok 1049 # SKIP Disabled ZA for VL 5600
6942 22:58:25.321594 # ok 1050 # SKIP Get and set data for VL 5600
6943 22:58:25.321729 # ok 1051 Set VL 5616
6944 22:58:25.321846 # ok 1052 # SKIP Disabled ZA for VL 5616
6945 22:58:25.346167 # ok 1053 # SKIP Get and set data for VL 5616
6946 22:58:25.346468 # ok 1054 Set VL 5632
6947 22:58:25.346938 # ok 1055 # SKIP Disabled ZA for VL 5632
6948 22:58:25.347132 # ok 1056 # SKIP Get and set data for VL 5632
6949 22:58:25.347300 # ok 1057 Set VL 5648
6950 22:58:25.347438 # ok 1058 # SKIP Disabled ZA for VL 5648
6951 22:58:25.347576 # ok 1059 # SKIP Get and set data for VL 5648
6952 22:58:25.347704 # ok 1060 Set VL 5664
6953 22:58:25.347818 # ok 1061 # SKIP Disabled ZA for VL 5664
6954 22:58:25.347981 # ok 1062 # SKIP Get and set data for VL 5664
6955 22:58:25.348133 # ok 1063 Set VL 5680
6956 22:58:25.348252 # ok 1064 # SKIP Disabled ZA for VL 5680
6957 22:58:25.348368 # ok 1065 # SKIP Get and set data for VL 5680
6958 22:58:25.348483 # ok 1066 Set VL 5696
6959 22:58:25.348597 # ok 1067 # SKIP Disabled ZA for VL 5696
6960 22:58:25.348712 # ok 1068 # SKIP Get and set data for VL 5696
6961 22:58:25.353518 # ok 1069 Set VL 5712
6962 22:58:25.354074 # ok 1070 # SKIP Disabled ZA for VL 5712
6963 22:58:25.354184 # ok 1071 # SKIP Get and set data for VL 5712
6964 22:58:25.354275 # ok 1072 Set VL 5728
6965 22:58:25.354361 # ok 1073 # SKIP Disabled ZA for VL 5728
6966 22:58:25.354463 # ok 1074 # SKIP Get and set data for VL 5728
6967 22:58:25.354812 # ok 1075 Set VL 5744
6968 22:58:25.354922 # ok 1076 # SKIP Disabled ZA for VL 5744
6969 22:58:25.355010 # ok 1077 # SKIP Get and set data for VL 5744
6970 22:58:25.355094 # ok 1078 Set VL 5760
6971 22:58:25.355177 # ok 1079 # SKIP Disabled ZA for VL 5760
6972 22:58:25.355259 # ok 1080 # SKIP Get and set data for VL 5760
6973 22:58:25.355342 # ok 1081 Set VL 5776
6974 22:58:25.355424 # ok 1082 # SKIP Disabled ZA for VL 5776
6975 22:58:25.355524 # ok 1083 # SKIP Get and set data for VL 5776
6976 22:58:25.355610 # ok 1084 Set VL 5792
6977 22:58:25.355692 # ok 1085 # SKIP Disabled ZA for VL 5792
6978 22:58:25.355775 # ok 1086 # SKIP Get and set data for VL 5792
6979 22:58:25.355857 # ok 1087 Set VL 5808
6980 22:58:25.355955 # ok 1088 # SKIP Disabled ZA for VL 5808
6981 22:58:25.357930 # ok 1089 # SKIP Get and set data for VL 5808
6982 22:58:25.358274 # ok 1090 Set VL 5824
6983 22:58:25.358378 # ok 1091 # SKIP Disabled ZA for VL 5824
6984 22:58:25.358465 # ok 1092 # SKIP Get and set data for VL 5824
6985 22:58:25.358564 # ok 1093 Set VL 5840
6986 22:58:25.358650 # ok 1094 # SKIP Disabled ZA for VL 5840
6987 22:58:25.358734 # ok 1095 # SKIP Get and set data for VL 5840
6988 22:58:25.358832 # ok 1096 Set VL 5856
6989 22:58:25.358917 # ok 1097 # SKIP Disabled ZA for VL 5856
6990 22:58:25.359014 # ok 1098 # SKIP Get and set data for VL 5856
6991 22:58:25.359099 # ok 1099 Set VL 5872
6992 22:58:25.359197 # ok 1100 # SKIP Disabled ZA for VL 5872
6993 22:58:25.359282 # ok 1101 # SKIP Get and set data for VL 5872
6994 22:58:25.359378 # ok 1102 Set VL 5888
6995 22:58:25.359463 # ok 1103 # SKIP Disabled ZA for VL 5888
6996 22:58:25.359560 # ok 1104 # SKIP Get and set data for VL 5888
6997 22:58:25.359645 # ok 1105 Set VL 5904
6998 22:58:25.367404 # ok 1106 # SKIP Disabled ZA for VL 5904
6999 22:58:25.367624 # ok 1107 # SKIP Get and set data for VL 5904
7000 22:58:25.367898 # ok 1108 Set VL 5920
7001 22:58:25.373485 # ok 1109 # SKIP Disabled ZA for VL 5920
7002 22:58:25.373900 # ok 1110 # SKIP Get and set data for VL 5920
7003 22:58:25.374002 # ok 1111 Set VL 5936
7004 22:58:25.374091 # ok 1112 # SKIP Disabled ZA for VL 5936
7005 22:58:25.374184 # ok 1113 # SKIP Get and set data for VL 5936
7006 22:58:25.374291 # ok 1114 Set VL 5952
7007 22:58:25.374382 # ok 1115 # SKIP Disabled ZA for VL 5952
7008 22:58:25.374468 # ok 1116 # SKIP Get and set data for VL 5952
7009 22:58:25.374554 # ok 1117 Set VL 5968
7010 22:58:25.374643 # ok 1118 # SKIP Disabled ZA for VL 5968
7011 22:58:25.374748 # ok 1119 # SKIP Get and set data for VL 5968
7012 22:58:25.374837 # ok 1120 Set VL 5984
7013 22:58:25.374924 # ok 1121 # SKIP Disabled ZA for VL 5984
7014 22:58:25.375032 # ok 1122 # SKIP Get and set data for VL 5984
7015 22:58:25.375122 # ok 1123 Set VL 6000
7016 22:58:25.375203 # ok 1124 # SKIP Disabled ZA for VL 6000
7017 22:58:25.375281 # ok 1125 # SKIP Get and set data for VL 6000
7018 22:58:25.375381 # ok 1126 Set VL 6016
7019 22:58:25.375466 # ok 1127 # SKIP Disabled ZA for VL 6016
7020 22:58:25.375550 # ok 1128 # SKIP Get and set data for VL 6016
7021 22:58:25.375632 # ok 1129 Set VL 6032
7022 22:58:25.375729 # ok 1130 # SKIP Disabled ZA for VL 6032
7023 22:58:25.378353 # ok 1131 # SKIP Get and set data for VL 6032
7024 22:58:25.378613 # ok 1132 Set VL 6048
7025 22:58:25.379028 # ok 1133 # SKIP Disabled ZA for VL 6048
7026 22:58:25.379202 # ok 1134 # SKIP Get and set data for VL 6048
7027 22:58:25.379400 # ok 1135 Set VL 6064
7028 22:58:25.379571 # ok 1136 # SKIP Disabled ZA for VL 6064
7029 22:58:25.379707 # ok 1137 # SKIP Get and set data for VL 6064
7030 22:58:25.379827 # ok 1138 Set VL 6080
7031 22:58:25.379944 # ok 1139 # SKIP Disabled ZA for VL 6080
7032 22:58:25.380294 # ok 1140 # SKIP Get and set data for VL 6080
7033 22:58:25.380452 # ok 1141 Set VL 6096
7034 22:58:25.380573 # ok 1142 # SKIP Disabled ZA for VL 6096
7035 22:58:25.380691 # ok 1143 # SKIP Get and set data for VL 6096
7036 22:58:25.380811 # ok 1144 Set VL 6112
7037 22:58:25.380928 # ok 1145 # SKIP Disabled ZA for VL 6112
7038 22:58:25.389541 # ok 1146 # SKIP Get and set data for VL 6112
7039 22:58:25.389995 # ok 1147 Set VL 6128
7040 22:58:25.390107 # ok 1148 # SKIP Disabled ZA for VL 6128
7041 22:58:25.390203 # ok 1149 # SKIP Get and set data for VL 6128
7042 22:58:25.390296 # ok 1150 Set VL 6144
7043 22:58:25.390390 # ok 1151 # SKIP Disabled ZA for VL 6144
7044 22:58:25.390484 # ok 1152 # SKIP Get and set data for VL 6144
7045 22:58:25.390593 # ok 1153 Set VL 6160
7046 22:58:25.390918 # ok 1154 # SKIP Disabled ZA for VL 6160
7047 22:58:25.391025 # ok 1155 # SKIP Get and set data for VL 6160
7048 22:58:25.391121 # ok 1156 Set VL 6176
7049 22:58:25.391214 # ok 1157 # SKIP Disabled ZA for VL 6176
7050 22:58:25.391308 # ok 1158 # SKIP Get and set data for VL 6176
7051 22:58:25.391400 # ok 1159 Set VL 6192
7052 22:58:25.391491 # ok 1160 # SKIP Disabled ZA for VL 6192
7053 22:58:25.391599 # ok 1161 # SKIP Get and set data for VL 6192
7054 22:58:25.391691 # ok 1162 Set VL 6208
7055 22:58:25.391782 # ok 1163 # SKIP Disabled ZA for VL 6208
7056 22:58:25.391877 # ok 1164 # SKIP Get and set data for VL 6208
7057 22:58:25.391966 # ok 1165 Set VL 6224
7058 22:58:25.392056 # ok 1166 # SKIP Disabled ZA for VL 6224
7059 22:58:25.392146 # ok 1167 # SKIP Get and set data for VL 6224
7060 22:58:25.393925 # ok 1168 Set VL 6240
7061 22:58:25.394051 # ok 1169 # SKIP Disabled ZA for VL 6240
7062 22:58:25.394135 # ok 1170 # SKIP Get and set data for VL 6240
7063 22:58:25.394218 # ok 1171 Set VL 6256
7064 22:58:25.394300 # ok 1172 # SKIP Disabled ZA for VL 6256
7065 22:58:25.394384 # ok 1173 # SKIP Get and set data for VL 6256
7066 22:58:25.394469 # ok 1174 Set VL 6272
7067 22:58:25.394556 # ok 1175 # SKIP Disabled ZA for VL 6272
7068 22:58:25.394647 # ok 1176 # SKIP Get and set data for VL 6272
7069 22:58:25.394737 # ok 1177 Set VL 6288
7070 22:58:25.395089 # ok 1178 # SKIP Disabled ZA for VL 6288
7071 22:58:25.395198 # ok 1179 # SKIP Get and set data for VL 6288
7072 22:58:25.395291 # ok 1180 Set VL 6304
7073 22:58:25.395381 # ok 1181 # SKIP Disabled ZA for VL 6304
7074 22:58:25.395469 # ok 1182 # SKIP Get and set data for VL 6304
7075 22:58:25.395552 # ok 1183 Set VL 6320
7076 22:58:25.395650 # ok 1184 # SKIP Disabled ZA for VL 6320
7077 22:58:25.395733 # ok 1185 # SKIP Get and set data for VL 6320
7078 22:58:25.395814 # ok 1186 Set VL 6336
7079 22:58:25.395895 # ok 1187 # SKIP Disabled ZA for VL 6336
7080 22:58:25.395974 # ok 1188 # SKIP Get and set data for VL 6336
7081 22:58:25.396055 # ok 1189 Set VL 6352
7082 22:58:25.396138 # ok 1190 # SKIP Disabled ZA for VL 6352
7083 22:58:25.396221 # ok 1191 # SKIP Get and set data for VL 6352
7084 22:58:25.396303 # ok 1192 Set VL 6368
7085 22:58:25.396382 # ok 1193 # SKIP Disabled ZA for VL 6368
7086 22:58:25.396463 # ok 1194 # SKIP Get and set data for VL 6368
7087 22:58:25.396543 # ok 1195 Set VL 6384
7088 22:58:25.396623 # ok 1196 # SKIP Disabled ZA for VL 6384
7089 22:58:25.396705 # ok 1197 # SKIP Get and set data for VL 6384
7090 22:58:25.401094 # ok 1198 Set VL 6400
7091 22:58:25.401300 # ok 1199 # SKIP Disabled ZA for VL 6400
7092 22:58:25.401607 # ok 1200 # SKIP Get and set data for VL 6400
7093 22:58:25.401730 # ok 1201 Set VL 6416
7094 22:58:25.401824 # ok 1202 # SKIP Disabled ZA for VL 6416
7095 22:58:25.401916 # ok 1203 # SKIP Get and set data for VL 6416
7096 22:58:25.402024 # ok 1204 Set VL 6432
7097 22:58:25.402118 # ok 1205 # SKIP Disabled ZA for VL 6432
7098 22:58:25.402209 # ok 1206 # SKIP Get and set data for VL 6432
7099 22:58:25.402299 # ok 1207 Set VL 6448
7100 22:58:25.402390 # ok 1208 # SKIP Disabled ZA for VL 6448
7101 22:58:25.402497 # ok 1209 # SKIP Get and set data for VL 6448
7102 22:58:25.402590 # ok 1210 Set VL 6464
7103 22:58:25.402679 # ok 1211 # SKIP Disabled ZA for VL 6464
7104 22:58:25.402762 # ok 1212 # SKIP Get and set data for VL 6464
7105 22:58:25.402840 # ok 1213 Set VL 6480
7106 22:58:25.402920 # ok 1214 # SKIP Disabled ZA for VL 6480
7107 22:58:25.403017 # ok 1215 # SKIP Get and set data for VL 6480
7108 22:58:25.403100 # ok 1216 Set VL 6496
7109 22:58:25.403179 # ok 1217 # SKIP Disabled ZA for VL 6496
7110 22:58:25.403258 # ok 1218 # SKIP Get and set data for VL 6496
7111 22:58:25.403338 # ok 1219 Set VL 6512
7112 22:58:25.403435 # ok 1220 # SKIP Disabled ZA for VL 6512
7113 22:58:25.403521 # ok 1221 # SKIP Get and set data for VL 6512
7114 22:58:25.403625 # ok 1222 Set VL 6528
7115 22:58:25.403716 # ok 1223 # SKIP Disabled ZA for VL 6528
7116 22:58:25.403807 # ok 1224 # SKIP Get and set data for VL 6528
7117 22:58:25.403898 # ok 1225 Set VL 6544
7118 22:58:25.404000 # ok 1226 # SKIP Disabled ZA for VL 6544
7119 22:58:25.409127 # ok 1227 # SKIP Get and set data for VL 6544
7120 22:58:25.409329 # ok 1228 Set VL 6560
7121 22:58:25.409637 # ok 1229 # SKIP Disabled ZA for VL 6560
7122 22:58:25.409741 # ok 1230 # SKIP Get and set data for VL 6560
7123 22:58:25.409827 # ok 1231 Set VL 6576
7124 22:58:25.409915 # ok 1232 # SKIP Disabled ZA for VL 6576
7125 22:58:25.410016 # ok 1233 # SKIP Get and set data for VL 6576
7126 22:58:25.410103 # ok 1234 Set VL 6592
7127 22:58:25.410183 # ok 1235 # SKIP Disabled ZA for VL 6592
7128 22:58:25.410254 # ok 1236 # SKIP Get and set data for VL 6592
7129 22:58:25.410318 # ok 1237 Set VL 6608
7130 22:58:25.410412 # ok 1238 # SKIP Disabled ZA for VL 6608
7131 22:58:25.410495 # ok 1239 # SKIP Get and set data for VL 6608
7132 22:58:25.410574 # ok 1240 Set VL 6624
7133 22:58:25.410677 # ok 1241 # SKIP Disabled ZA for VL 6624
7134 22:58:25.410814 # ok 1242 # SKIP Get and set data for VL 6624
7135 22:58:25.410893 # ok 1243 Set VL 6640
7136 22:58:25.410986 # ok 1244 # SKIP Disabled ZA for VL 6640
7137 22:58:25.411067 # ok 1245 # SKIP Get and set data for VL 6640
7138 22:58:25.411144 # ok 1246 Set VL 6656
7139 22:58:25.411241 # ok 1247 # SKIP Disabled ZA for VL 6656
7140 22:58:25.411314 # ok 1248 # SKIP Get and set data for VL 6656
7141 22:58:25.411400 # ok 1249 Set VL 6672
7142 22:58:25.411486 # ok 1250 # SKIP Disabled ZA for VL 6672
7143 22:58:25.411584 # ok 1251 # SKIP Get and set data for VL 6672
7144 22:58:25.411682 # ok 1252 Set VL 6688
7145 22:58:25.411759 # ok 1253 # SKIP Disabled ZA for VL 6688
7146 22:58:25.411822 # ok 1254 # SKIP Get and set data for VL 6688
7147 22:58:25.411884 # ok 1255 Set VL 6704
7148 22:58:25.411947 # ok 1256 # SKIP Disabled ZA for VL 6704
7149 22:58:25.417273 # ok 1257 # SKIP Get and set data for VL 6704
7150 22:58:25.417629 # ok 1258 Set VL 6720
7151 22:58:25.417739 # ok 1259 # SKIP Disabled ZA for VL 6720
7152 22:58:25.417824 # ok 1260 # SKIP Get and set data for VL 6720
7153 22:58:25.417907 # ok 1261 Set VL 6736
7154 22:58:25.417990 # ok 1262 # SKIP Disabled ZA for VL 6736
7155 22:58:25.418086 # ok 1263 # SKIP Get and set data for VL 6736
7156 22:58:25.418167 # ok 1264 Set VL 6752
7157 22:58:25.418248 # ok 1265 # SKIP Disabled ZA for VL 6752
7158 22:58:25.418328 # ok 1266 # SKIP Get and set data for VL 6752
7159 22:58:25.418408 # ok 1267 Set VL 6768
7160 22:58:25.418505 # ok 1268 # SKIP Disabled ZA for VL 6768
7161 22:58:25.418589 # ok 1269 # SKIP Get and set data for VL 6768
7162 22:58:25.418672 # ok 1270 Set VL 6784
7163 22:58:25.418753 # ok 1271 # SKIP Disabled ZA for VL 6784
7164 22:58:25.418833 # ok 1272 # SKIP Get and set data for VL 6784
7165 22:58:25.418926 # ok 1273 Set VL 6800
7166 22:58:25.419007 # ok 1274 # SKIP Disabled ZA for VL 6800
7167 22:58:25.419079 # ok 1275 # SKIP Get and set data for VL 6800
7168 22:58:25.419140 # ok 1276 Set VL 6816
7169 22:58:25.419200 # ok 1277 # SKIP Disabled ZA for VL 6816
7170 22:58:25.425867 # ok 1278 # SKIP Get and set data for VL 6816
7171 22:58:25.426204 # ok 1279 Set VL 6832
7172 22:58:25.426309 # ok 1280 # SKIP Disabled ZA for VL 6832
7173 22:58:25.426399 # ok 1281 # SKIP Get and set data for VL 6832
7174 22:58:25.426504 # ok 1282 Set VL 6848
7175 22:58:25.426594 # ok 1283 # SKIP Disabled ZA for VL 6848
7176 22:58:25.426683 # ok 1284 # SKIP Get and set data for VL 6848
7177 22:58:25.426773 # ok 1285 Set VL 6864
7178 22:58:25.426875 # ok 1286 # SKIP Disabled ZA for VL 6864
7179 22:58:25.426961 # ok 1287 # SKIP Get and set data for VL 6864
7180 22:58:25.427041 # ok 1288 Set VL 6880
7181 22:58:25.427122 # ok 1289 # SKIP Disabled ZA for VL 6880
7182 22:58:25.427222 # ok 1290 # SKIP Get and set data for VL 6880
7183 22:58:25.427307 # ok 1291 Set VL 6896
7184 22:58:25.427402 # ok 1292 # SKIP Disabled ZA for VL 6896
7185 22:58:25.427486 # ok 1293 # SKIP Get and set data for VL 6896
7186 22:58:25.427573 # ok 1294 Set VL 6912
7187 22:58:25.427671 # ok 1295 # SKIP Disabled ZA for VL 6912
7188 22:58:25.427739 # ok 1296 # SKIP Get and set data for VL 6912
7189 22:58:25.427799 # ok 1297 Set VL 6928
7190 22:58:25.427858 # ok 1298 # SKIP Disabled ZA for VL 6928
7191 22:58:25.434099 # ok 1299 # SKIP Get and set data for VL 6928
7192 22:58:25.434281 # ok 1300 Set VL 6944
7193 22:58:25.434592 # ok 1301 # SKIP Disabled ZA for VL 6944
7194 22:58:25.434686 # ok 1302 # SKIP Get and set data for VL 6944
7195 22:58:25.434777 # ok 1303 Set VL 6960
7196 22:58:25.434850 # ok 1304 # SKIP Disabled ZA for VL 6960
7197 22:58:25.434933 # ok 1305 # SKIP Get and set data for VL 6960
7198 22:58:25.435005 # ok 1306 Set VL 6976
7199 22:58:25.435077 # ok 1307 # SKIP Disabled ZA for VL 6976
7200 22:58:25.435144 # ok 1308 # SKIP Get and set data for VL 6976
7201 22:58:25.435239 # ok 1309 Set VL 6992
7202 22:58:25.435332 # ok 1310 # SKIP Disabled ZA for VL 6992
7203 22:58:25.435427 # ok 1311 # SKIP Get and set data for VL 6992
7204 22:58:25.435600 # ok 1312 Set VL 7008
7205 22:58:25.435688 # ok 1313 # SKIP Disabled ZA for VL 7008
7206 22:58:25.435754 # ok 1314 # SKIP Get and set data for VL 7008
7207 22:58:25.435816 # ok 1315 Set VL 7024
7208 22:58:25.441342 # ok 1316 # SKIP Disabled ZA for VL 7024
7209 22:58:25.441728 # ok 1317 # SKIP Get and set data for VL 7024
7210 22:58:25.441846 # ok 1318 Set VL 7040
7211 22:58:25.441941 # ok 1319 # SKIP Disabled ZA for VL 7040
7212 22:58:25.442052 # ok 1320 # SKIP Get and set data for VL 7040
7213 22:58:25.442145 # ok 1321 Set VL 7056
7214 22:58:25.442233 # ok 1322 # SKIP Disabled ZA for VL 7056
7215 22:58:25.442337 # ok 1323 # SKIP Get and set data for VL 7056
7216 22:58:25.442424 # ok 1324 Set VL 7072
7217 22:58:25.442510 # ok 1325 # SKIP Disabled ZA for VL 7072
7218 22:58:25.442611 # ok 1326 # SKIP Get and set data for VL 7072
7219 22:58:25.442700 # ok 1327 Set VL 7088
7220 22:58:25.442787 # ok 1328 # SKIP Disabled ZA for VL 7088
7221 22:58:25.442889 # ok 1329 # SKIP Get and set data for VL 7088
7222 22:58:25.442983 # ok 1330 Set VL 7104
7223 22:58:25.443084 # ok 1331 # SKIP Disabled ZA for VL 7104
7224 22:58:25.443172 # ok 1332 # SKIP Get and set data for VL 7104
7225 22:58:25.443256 # ok 1333 Set VL 7120
7226 22:58:25.443348 # ok 1334 # SKIP Disabled ZA for VL 7120
7227 22:58:25.443449 # ok 1335 # SKIP Get and set data for VL 7120
7228 22:58:25.443552 # ok 1336 Set VL 7136
7229 22:58:25.443654 # ok 1337 # SKIP Disabled ZA for VL 7136
7230 22:58:25.447093 # ok 1338 # SKIP Get and set data for VL 7136
7231 22:58:25.447424 # ok 1339 Set VL 7152
7232 22:58:25.447531 # ok 1340 # SKIP Disabled ZA for VL 7152
7233 22:58:25.447642 # ok 1341 # SKIP Get and set data for VL 7152
7234 22:58:25.447753 # ok 1342 Set VL 7168
7235 22:58:25.447829 # ok 1343 # SKIP Disabled ZA for VL 7168
7236 22:58:25.457931 # ok 1344 # SKIP Get and set data for VL 7168
7237 22:58:25.458164 # ok 1345 Set VL 7184
7238 22:58:25.458477 # ok 1346 # SKIP Disabled ZA for VL 7184
7239 22:58:25.458583 # ok 1347 # SKIP Get and set data for VL 7184
7240 22:58:25.458673 # ok 1348 Set VL 7200
7241 22:58:25.458761 # ok 1349 # SKIP Disabled ZA for VL 7200
7242 22:58:25.458849 # ok 1350 # SKIP Get and set data for VL 7200
7243 22:58:25.458953 # ok 1351 Set VL 7216
7244 22:58:25.459043 # ok 1352 # SKIP Disabled ZA for VL 7216
7245 22:58:25.459130 # ok 1353 # SKIP Get and set data for VL 7216
7246 22:58:25.459215 # ok 1354 Set VL 7232
7247 22:58:25.459301 # ok 1355 # SKIP Disabled ZA for VL 7232
7248 22:58:25.459406 # ok 1356 # SKIP Get and set data for VL 7232
7249 22:58:25.459497 # ok 1357 Set VL 7248
7250 22:58:25.459584 # ok 1358 # SKIP Disabled ZA for VL 7248
7251 22:58:25.459673 # ok 1359 # SKIP Get and set data for VL 7248
7252 22:58:25.459763 # ok 1360 Set VL 7264
7253 22:58:25.459870 # ok 1361 # SKIP Disabled ZA for VL 7264
7254 22:58:25.459960 # ok 1362 # SKIP Get and set data for VL 7264
7255 22:58:25.460051 # ok 1363 Set VL 7280
7256 22:58:25.462810 # ok 1364 # SKIP Disabled ZA for VL 7280
7257 22:58:25.463319 # ok 1365 # SKIP Get and set data for VL 7280
7258 22:58:25.463524 # ok 1366 Set VL 7296
7259 22:58:25.463719 # ok 1367 # SKIP Disabled ZA for VL 7296
7260 22:58:25.463876 # ok 1368 # SKIP Get and set data for VL 7296
7261 22:58:25.464004 # ok 1369 Set VL 7312
7262 22:58:25.464147 # ok 1370 # SKIP Disabled ZA for VL 7312
7263 22:58:25.464273 # ok 1371 # SKIP Get and set data for VL 7312
7264 22:58:25.464390 # ok 1372 Set VL 7328
7265 22:58:25.465360 # ok 1373 # SKIP Disabled ZA for VL 7328
7266 22:58:25.465790 # ok 1374 # SKIP Get and set data for VL 7328
7267 22:58:25.465898 # ok 1375 Set VL 7344
7268 22:58:25.465988 # ok 1376 # SKIP Disabled ZA for VL 7344
7269 22:58:25.466079 # ok 1377 # SKIP Get and set data for VL 7344
7270 22:58:25.466167 # ok 1378 Set VL 7360
7271 22:58:25.466268 # ok 1379 # SKIP Disabled ZA for VL 7360
7272 22:58:25.466355 # ok 1380 # SKIP Get and set data for VL 7360
7273 22:58:25.466443 # ok 1381 Set VL 7376
7274 22:58:25.466543 # ok 1382 # SKIP Disabled ZA for VL 7376
7275 22:58:25.466627 # ok 1383 # SKIP Get and set data for VL 7376
7276 22:58:25.466711 # ok 1384 Set VL 7392
7277 22:58:25.466793 # ok 1385 # SKIP Disabled ZA for VL 7392
7278 22:58:25.466892 # ok 1386 # SKIP Get and set data for VL 7392
7279 22:58:25.466980 # ok 1387 Set VL 7408
7280 22:58:25.467067 # ok 1388 # SKIP Disabled ZA for VL 7408
7281 22:58:25.467157 # ok 1389 # SKIP Get and set data for VL 7408
7282 22:58:25.467265 # ok 1390 Set VL 7424
7283 22:58:25.467357 # ok 1391 # SKIP Disabled ZA for VL 7424
7284 22:58:25.467448 # ok 1392 # SKIP Get and set data for VL 7424
7285 22:58:25.467554 # ok 1393 Set VL 7440
7286 22:58:25.467646 # ok 1394 # SKIP Disabled ZA for VL 7440
7287 22:58:25.467736 # ok 1395 # SKIP Get and set data for VL 7440
7288 22:58:25.467838 # ok 1396 Set VL 7456
7289 22:58:25.468575 # ok 1397 # SKIP Disabled ZA for VL 7456
7290 22:58:25.469061 # ok 1398 # SKIP Get and set data for VL 7456
7291 22:58:25.469269 # ok 1399 Set VL 7472
7292 22:58:25.469481 # ok 1400 # SKIP Disabled ZA for VL 7472
7293 22:58:25.469704 # ok 1401 # SKIP Get and set data for VL 7472
7294 22:58:25.469884 # ok 1402 Set VL 7488
7295 22:58:25.470089 # ok 1403 # SKIP Disabled ZA for VL 7488
7296 22:58:25.470261 # ok 1404 # SKIP Get and set data for VL 7488
7297 22:58:25.470425 # ok 1405 Set VL 7504
7298 22:58:25.470635 # ok 1406 # SKIP Disabled ZA for VL 7504
7299 22:58:25.470894 # ok 1407 # SKIP Get and set data for VL 7504
7300 22:58:25.471065 # ok 1408 Set VL 7520
7301 22:58:25.471244 # ok 1409 # SKIP Disabled ZA for VL 7520
7302 22:58:25.471412 # ok 1410 # SKIP Get and set data for VL 7520
7303 22:58:25.471565 # ok 1411 Set VL 7536
7304 22:58:25.471737 # ok 1412 # SKIP Disabled ZA for VL 7536
7305 22:58:25.471931 # ok 1413 # SKIP Get and set data for VL 7536
7306 22:58:25.472063 # ok 1414 Set VL 7552
7307 22:58:25.472180 # ok 1415 # SKIP Disabled ZA for VL 7552
7308 22:58:25.472295 # ok 1416 # SKIP Get and set data for VL 7552
7309 22:58:25.472409 # ok 1417 Set VL 7568
7310 22:58:25.472523 # ok 1418 # SKIP Disabled ZA for VL 7568
7311 22:58:25.472638 # ok 1419 # SKIP Get and set data for VL 7568
7312 22:58:25.472753 # ok 1420 Set VL 7584
7313 22:58:25.472867 # ok 1421 # SKIP Disabled ZA for VL 7584
7314 22:58:25.472980 # ok 1422 # SKIP Get and set data for VL 7584
7315 22:58:25.473094 # ok 1423 Set VL 7600
7316 22:58:25.473210 # ok 1424 # SKIP Disabled ZA for VL 7600
7317 22:58:25.473324 # ok 1425 # SKIP Get and set data for VL 7600
7318 22:58:25.473439 # ok 1426 Set VL 7616
7319 22:58:25.473552 # ok 1427 # SKIP Disabled ZA for VL 7616
7320 22:58:25.477515 # ok 1428 # SKIP Get and set data for VL 7616
7321 22:58:25.477912 # ok 1429 Set VL 7632
7322 22:58:25.478015 # ok 1430 # SKIP Disabled ZA for VL 7632
7323 22:58:25.478116 # ok 1431 # SKIP Get and set data for VL 7632
7324 22:58:25.478206 # ok 1432 Set VL 7648
7325 22:58:25.478315 # ok 1433 # SKIP Disabled ZA for VL 7648
7326 22:58:25.478399 # ok 1434 # SKIP Get and set data for VL 7648
7327 22:58:25.478473 # ok 1435 Set VL 7664
7328 22:58:25.478582 # ok 1436 # SKIP Disabled ZA for VL 7664
7329 22:58:25.478665 # ok 1437 # SKIP Get and set data for VL 7664
7330 22:58:25.478745 # ok 1438 Set VL 7680
7331 22:58:25.478834 # ok 1439 # SKIP Disabled ZA for VL 7680
7332 22:58:25.478916 # ok 1440 # SKIP Get and set data for VL 7680
7333 22:58:25.479007 # ok 1441 Set VL 7696
7334 22:58:25.479092 # ok 1442 # SKIP Disabled ZA for VL 7696
7335 22:58:25.479194 # ok 1443 # SKIP Get and set data for VL 7696
7336 22:58:25.479283 # ok 1444 Set VL 7712
7337 22:58:25.479368 # ok 1445 # SKIP Disabled ZA for VL 7712
7338 22:58:25.479460 # ok 1446 # SKIP Get and set data for VL 7712
7339 22:58:25.479820 # ok 1447 Set VL 7728
7340 22:58:25.479899 # ok 1448 # SKIP Disabled ZA for VL 7728
7341 22:58:25.484833 # ok 1449 # SKIP Get and set data for VL 7728
7342 22:58:25.485198 # ok 1450 Set VL 7744
7343 22:58:25.485303 # ok 1451 # SKIP Disabled ZA for VL 7744
7344 22:58:25.485406 # ok 1452 # SKIP Get and set data for VL 7744
7345 22:58:25.485516 # ok 1453 Set VL 7760
7346 22:58:25.485641 # ok 1454 # SKIP Disabled ZA for VL 7760
7347 22:58:25.485746 # ok 1455 # SKIP Get and set data for VL 7760
7348 22:58:25.485833 # ok 1456 Set VL 7776
7349 22:58:25.485913 # ok 1457 # SKIP Disabled ZA for VL 7776
7350 22:58:25.486000 # ok 1458 # SKIP Get and set data for VL 7776
7351 22:58:25.486082 # ok 1459 Set VL 7792
7352 22:58:25.486161 # ok 1460 # SKIP Disabled ZA for VL 7792
7353 22:58:25.486261 # ok 1461 # SKIP Get and set data for VL 7792
7354 22:58:25.486359 # ok 1462 Set VL 7808
7355 22:58:25.486447 # ok 1463 # SKIP Disabled ZA for VL 7808
7356 22:58:25.486585 # ok 1464 # SKIP Get and set data for VL 7808
7357 22:58:25.486688 # ok 1465 Set VL 7824
7358 22:58:25.486806 # ok 1466 # SKIP Disabled ZA for VL 7824
7359 22:58:25.486900 # ok 1467 # SKIP Get and set data for VL 7824
7360 22:58:25.487014 # ok 1468 Set VL 7840
7361 22:58:25.487113 # ok 1469 # SKIP Disabled ZA for VL 7840
7362 22:58:25.487226 # ok 1470 # SKIP Get and set data for VL 7840
7363 22:58:25.487333 # ok 1471 Set VL 7856
7364 22:58:25.487447 # ok 1472 # SKIP Disabled ZA for VL 7856
7365 22:58:25.487533 # ok 1473 # SKIP Get and set data for VL 7856
7366 22:58:25.487633 # ok 1474 Set VL 7872
7367 22:58:25.487717 # ok 1475 # SKIP Disabled ZA for VL 7872
7368 22:58:25.487782 # ok 1476 # SKIP Get and set data for VL 7872
7369 22:58:25.492910 # ok 1477 Set VL 7888
7370 22:58:25.493093 # ok 1478 # SKIP Disabled ZA for VL 7888
7371 22:58:25.493206 # ok 1479 # SKIP Get and set data for VL 7888
7372 22:58:25.493296 # ok 1480 Set VL 7904
7373 22:58:25.493411 # ok 1481 # SKIP Disabled ZA for VL 7904
7374 22:58:25.493534 # ok 1482 # SKIP Get and set data for VL 7904
7375 22:58:25.493632 # ok 1483 Set VL 7920
7376 22:58:25.493777 # ok 1484 # SKIP Disabled ZA for VL 7920
7377 22:58:25.493879 # ok 1485 # SKIP Get and set data for VL 7920
7378 22:58:25.493953 # ok 1486 Set VL 7936
7379 22:58:25.494042 # ok 1487 # SKIP Disabled ZA for VL 7936
7380 22:58:25.494159 # ok 1488 # SKIP Get and set data for VL 7936
7381 22:58:25.494257 # ok 1489 Set VL 7952
7382 22:58:25.494351 # ok 1490 # SKIP Disabled ZA for VL 7952
7383 22:58:25.494467 # ok 1491 # SKIP Get and set data for VL 7952
7384 22:58:25.494557 # ok 1492 Set VL 7968
7385 22:58:25.494646 # ok 1493 # SKIP Disabled ZA for VL 7968
7386 22:58:25.494745 # ok 1494 # SKIP Get and set data for VL 7968
7387 22:58:25.494835 # ok 1495 Set VL 7984
7388 22:58:25.494935 # ok 1496 # SKIP Disabled ZA for VL 7984
7389 22:58:25.495024 # ok 1497 # SKIP Get and set data for VL 7984
7390 22:58:25.495133 # ok 1498 Set VL 8000
7391 22:58:25.495231 # ok 1499 # SKIP Disabled ZA for VL 8000
7392 22:58:25.495333 # ok 1500 # SKIP Get and set data for VL 8000
7393 22:58:25.495405 # ok 1501 Set VL 8016
7394 22:58:25.495480 # ok 1502 # SKIP Disabled ZA for VL 8016
7395 22:58:25.508429 # ok 1503 # SKIP Get and set data for VL 8016
7396 22:58:25.508827 # ok 1504 Set VL 8032
7397 22:58:25.508938 # ok 1505 # SKIP Disabled ZA for VL 8032
7398 22:58:25.509045 # ok 1506 # SKIP Get and set data for VL 8032
7399 22:58:25.509151 # ok 1507 Set VL 8048
7400 22:58:25.509459 # ok 1508 # SKIP Disabled ZA for VL 8048
7401 22:58:25.509580 # ok 1509 # SKIP Get and set data for VL 8048
7402 22:58:25.509695 # ok 1510 Set VL 8064
7403 22:58:25.510024 # ok 1511 # SKIP Disabled ZA for VL 8064
7404 22:58:25.510149 # ok 1512 # SKIP Get and set data for VL 8064
7405 22:58:25.510254 # ok 1513 Set VL 8080
7406 22:58:25.510355 # ok 1514 # SKIP Disabled ZA for VL 8080
7407 22:58:25.510680 # ok 1515 # SKIP Get and set data for VL 8080
7408 22:58:25.510786 # ok 1516 Set VL 8096
7409 22:58:25.510890 # ok 1517 # SKIP Disabled ZA for VL 8096
7410 22:58:25.510994 # ok 1518 # SKIP Get and set data for VL 8096
7411 22:58:25.511100 # ok 1519 Set VL 8112
7412 22:58:25.511412 # ok 1520 # SKIP Disabled ZA for VL 8112
7413 22:58:25.511535 # ok 1521 # SKIP Get and set data for VL 8112
7414 22:58:25.511641 # ok 1522 Set VL 8128
7415 22:58:25.528718 # ok 1523 # SKIP Disabled ZA for VL 8128
7416 22:58:25.528957 # ok 1524 # SKIP Get and set data for VL 8128
7417 22:58:25.529248 # ok 1525 Set VL 8144
7418 22:58:25.529356 # ok 1526 # SKIP Disabled ZA for VL 8144
7419 22:58:25.529445 # ok 1527 # SKIP Get and set data for VL 8144
7420 22:58:25.529534 # ok 1528 Set VL 8160
7421 22:58:25.529623 # ok 1529 # SKIP Disabled ZA for VL 8160
7422 22:58:25.529738 # ok 1530 # SKIP Get and set data for VL 8160
7423 22:58:25.529827 # ok 1531 Set VL 8176
7424 22:58:25.529916 # ok 1532 # SKIP Disabled ZA for VL 8176
7425 22:58:25.530001 # ok 1533 # SKIP Get and set data for VL 8176
7426 22:58:25.530086 # ok 1534 Set VL 8192
7427 22:58:25.530169 # ok 1535 # SKIP Disabled ZA for VL 8192
7428 22:58:25.530270 # ok 1536 # SKIP Get and set data for VL 8192
7429 22:58:25.530357 # # Totals: pass:522 fail:0 xfail:0 xpass:0 skip:1014 error:0
7430 22:58:25.530444 ok 34 selftests: arm64: za-ptrace
7431 22:58:25.530530 # selftests: arm64: check_buffer_fill
7432 22:58:26.098012 # 1..20
7433 22:58:26.098480 # ok 1 Check buffer correctness by byte with sync err mode and mmap memory
7434 22:58:26.098588 # ok 2 Check buffer correctness by byte with async err mode and mmap memory
7435 22:58:26.098679 # ok 3 Check buffer correctness by byte with sync err mode and mmap/mprotect memory
7436 22:58:26.098783 # ok 4 Check buffer correctness by byte with async err mode and mmap/mprotect memory
7437 22:58:26.098886 # not ok 5 Check buffer write underflow by byte with sync mode and mmap memory
7438 22:58:26.098990 # not ok 6 Check buffer write underflow by byte with async mode and mmap memory
7439 22:58:26.099290 # ok 7 Check buffer write underflow by byte with tag check fault ignore and mmap memory
7440 22:58:26.099410 # ok 8 Check buffer write underflow by byte with sync mode and mmap memory
7441 22:58:26.099499 # ok 9 Check buffer write underflow by byte with async mode and mmap memory
7442 22:58:26.099800 # ok 10 Check buffer write underflow by byte with tag check fault ignore and mmap memory
7443 22:58:26.099920 # not ok 11 Check buffer write overflow by byte with sync mode and mmap memory
7444 22:58:26.100011 # not ok 12 Check buffer write overflow by byte with async mode and mmap memory
7445 22:58:26.107407 # ok 13 Check buffer write overflow by byte with tag fault ignore mode and mmap memory
7446 22:58:26.107842 # not ok 14 Check buffer write correctness by block with sync mode and mmap memory
7447 22:58:26.107937 # not ok 15 Check buffer write correctness by block with async mode and mmap memory
7448 22:58:26.108026 # ok 16 Check buffer write correctness by block with tag fault ignore and mmap memory
7449 22:58:26.108129 # ok 17 Check initial tags with private mapping, sync error mode and mmap memory
7450 22:58:26.126344 # ok 18 Check initial tags with private mapping, sync error mode and mmap/mprotect memory
7451 22:58:26.126578 # ok 19 Check initial tags with shared mapping, sync error mode and mmap memory
7452 22:58:26.126878 # ok 20 Check initial tags with shared mapping, sync error mode and mmap/mprotect memory
7453 22:58:26.126970 # # Totals: pass:14 fail:6 xfail:0 xpass:0 skip:0 error:0
7454 22:58:26.131640 not ok 35 selftests: arm64: check_buffer_fill # exit=1
7455 22:58:26.283991 # selftests: arm64: check_child_memory
7456 22:58:26.821985 # 1..12
7457 22:58:26.822452 # not ok 1 Check child anonymous memory with private mapping, precise mode and mmap memory
7458 22:58:26.822562 # not ok 2 Check child anonymous memory with shared mapping, precise mode and mmap memory
7459 22:58:26.822650 # not ok 3 Check child anonymous memory with private mapping, imprecise mode and mmap memory
7460 22:58:26.822747 # not ok 4 Check child anonymous memory with shared mapping, imprecise mode and mmap memory
7461 22:58:26.822841 # not ok 5 Check child anonymous memory with private mapping, precise mode and mmap/mprotect memory
7462 22:58:26.823037 # not ok 6 Check child anonymous memory with shared mapping, precise mode and mmap/mprotect memory
7463 22:58:26.823327 # not ok 7 Check child file memory with private mapping, precise mode and mmap memory
7464 22:58:26.823649 # not ok 8 Check child file memory with shared mapping, precise mode and mmap memory
7465 22:58:26.823755 # not ok 9 Check child file memory with private mapping, imprecise mode and mmap memory
7466 22:58:26.823858 # not ok 10 Check child file memory with shared mapping, imprecise mode and mmap memory
7467 22:58:26.824046 # not ok 11 Check child file memory with private mapping, precise mode and mmap/mprotect memory
7468 22:58:26.824167 # not ok 12 Check child file memory with shared mapping, precise mode and mmap/mprotect memory
7469 22:58:26.824277 # # Totals: pass:0 fail:12 xfail:0 xpass:0 skip:0 error:0
7470 22:58:26.854244 not ok 36 selftests: arm64: check_child_memory # exit=1
7471 22:58:27.007833 # selftests: arm64: check_gcr_el1_cswitch
7472 22:59:12.178404 <47>[ 101.997537] systemd-journald[105]: Sent WATCHDOG=1 notification.
7473 22:59:13.074369 <47>[ 102.894678] systemd-journald[105]: Data hash table of /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal has a fill level at 75.0 (3329 of 4437 items, 2555904 file size, 767 bytes per hash table item), suggesting rotation.
7474 22:59:13.074819 <47>[ 102.895452] systemd-journald[105]: /run/log/journal/938dcdc227b64155a30c60b8906c70ae/system.journal: Journal header limits reached or header out-of-date, rotating.
7475 22:59:13.075115 <47>[ 102.895890] systemd-journald[105]: Rotating...
7476 22:59:13.130436 <47>[ 102.951149] systemd-journald[105]: Reserving 333 entries in field hash table.
7477 22:59:13.194553 <47>[ 103.015220] systemd-journald[105]: Reserving 4437 entries in data hash table.
7478 22:59:13.220868 <47>[ 103.040525] systemd-journald[105]: Vacuuming...
7479 22:59:13.246854 <47>[ 103.067309] systemd-journald[105]: Vacuuming done, freed 0B of archived journals from /run/log/journal/938dcdc227b64155a30c60b8906c70ae.
7480 22:59:13.521510 # 1..1
7481 22:59:13.521761 # 1..1
7482 22:59:13.521855 # 1..1
7483 22:59:13.521946 # 1..1
7484 22:59:13.522246 # 1..1
7485 22:59:13.522348 # 1..1
7486 22:59:13.522433 # 1..1
7487 22:59:13.522518 # 1..1
7488 22:59:13.522601 # 1..1
7489 22:59:13.522684 # 1..1
7490 22:59:13.522767 # 1..1
7491 22:59:13.522848 # 1..1
7492 22:59:13.522927 # 1..1
7493 22:59:13.523011 # 1..1
7494 22:59:13.523093 # 1..1
7495 22:59:13.523181 # 1..1
7496 22:59:13.523261 # 1..1
7497 22:59:13.523341 # 1..1
7498 22:59:13.523422 # 1..1
7499 22:59:13.523509 # 1..1
7500 22:59:13.523592 # 1..1
7501 22:59:13.523675 # 1..1
7502 22:59:13.523757 # 1..1
7503 22:59:13.523838 # 1..1
7504 22:59:13.523922 # 1..1
7505 22:59:13.524005 # 1..1
7506 22:59:13.524087 # 1..1
7507 22:59:13.524173 # 1..1
7508 22:59:13.524257 # 1..1
7509 22:59:13.524341 # 1..1
7510 22:59:13.524424 # 1..1
7511 22:59:13.524505 # 1..1
7512 22:59:13.524609 # 1..1
7513 22:59:13.524694 # 1..1
7514 22:59:13.524776 # 1..1
7515 22:59:13.524857 # 1..1
7516 22:59:13.524936 # 1..1
7517 22:59:13.525018 # 1..1
7518 22:59:13.525098 # 1..1
7519 22:59:13.525184 # 1..1
7520 22:59:13.525263 # 1..1
7521 22:59:13.525344 # 1..1
7522 22:59:13.525425 # 1..1
7523 22:59:13.525504 # 1..1
7524 22:59:13.525586 # 1..1
7525 22:59:13.525692 # 1..1
7526 22:59:13.525774 # 1..1
7527 22:59:13.525856 # 1..1
7528 22:59:13.525936 # 1..1
7529 22:59:13.526017 # 1..1
7530 22:59:13.526099 # 1..1
7531 22:59:13.526180 # 1..1
7532 22:59:13.526261 # 1..1
7533 22:59:13.526343 # 1..1
7534 22:59:13.526426 # 1..1
7535 22:59:13.526509 # 1..1
7536 22:59:13.526593 # 1..1
7537 22:59:13.526677 # 1..1
7538 22:59:13.526760 # 1..1
7539 22:59:13.526844 # 1..1
7540 22:59:13.526929 # 1..1
7541 22:59:13.527015 # 1..1
7542 22:59:13.527101 # 1..1
7543 22:59:13.527187 # 1..1
7544 22:59:13.527270 # 1..1
7545 22:59:13.527355 # 1..1
7546 22:59:13.527438 # 1..1
7547 22:59:13.527522 # 1..1
7548 22:59:13.527604 # 1..1
7549 22:59:13.527686 # 1..1
7550 22:59:13.527770 # 1..1
7551 22:59:13.527851 # 1..1
7552 22:59:13.527933 # 1..1
7553 22:59:13.528017 # 1..1
7554 22:59:13.541208 # 1..1
7555 22:59:13.541528 # 1..1
7556 22:59:13.541706 # 1..1
7557 22:59:13.541888 # 1..1
7558 22:59:13.542065 # 1..1
7559 22:59:13.542217 # 1..1
7560 22:59:13.542361 # 1..1
7561 22:59:13.542768 # 1..1
7562 22:59:13.542968 # 1..1
7563 22:59:13.543176 # 1..1
7564 22:59:13.543352 # 1..1
7565 22:59:13.543523 # 1..1
7566 22:59:13.543672 # 1..1
7567 22:59:13.543794 # 1..1
7568 22:59:13.543913 # 1..1
7569 22:59:13.544082 # 1..1
7570 22:59:13.544251 # 1..1
7571 22:59:13.544376 # 1..1
7572 22:59:13.544494 # 1..1
7573 22:59:13.544609 # 1..1
7574 22:59:13.544724 # 1..1
7575 22:59:13.544839 # 1..1
7576 22:59:13.544956 # 1..1
7577 22:59:13.545072 # 1..1
7578 22:59:13.545187 # 1..1
7579 22:59:13.545303 # 1..1
7580 22:59:13.545419 # 1..1
7581 22:59:13.545535 # 1..1
7582 22:59:13.545662 # 1..1
7583 22:59:13.545839 # 1..1
7584 22:59:13.545966 # 1..1
7585 22:59:13.546083 # 1..1
7586 22:59:13.546199 # 1..1
7587 22:59:13.546315 # 1..1
7588 22:59:13.546432 # 1..1
7589 22:59:13.546547 # 1..1
7590 22:59:13.546661 # 1..1
7591 22:59:13.546776 # 1..1
7592 22:59:13.546891 # 1..1
7593 22:59:13.547006 # 1..1
7594 22:59:13.547121 # 1..1
7595 22:59:13.547236 # 1..1
7596 22:59:13.547351 # 1..1
7597 22:59:13.547466 # 1..1
7598 22:59:13.547632 # 1..1
7599 22:59:13.547759 # 1..1
7600 22:59:13.547876 # 1..1
7601 22:59:13.548048 # 1..1
7602 22:59:13.548198 # 1..1
7603 22:59:13.548317 # 1..1
7604 22:59:13.548432 # 1..1
7605 22:59:13.548546 # 1..1
7606 22:59:13.548663 # 1..1
7607 22:59:13.548778 # 1..1
7608 22:59:13.548893 # 1..1
7609 22:59:13.549009 # 1..1
7610 22:59:13.549125 # 1..1
7611 22:59:13.549240 # 1..1
7612 22:59:13.549407 # 1..1
7613 22:59:13.549579 # 1..1
7614 22:59:13.549717 # 1..1
7615 22:59:13.549837 # 1..1
7616 22:59:13.549955 # 1..1
7617 22:59:13.550070 # 1..1
7618 22:59:13.550186 # 1..1
7619 22:59:13.550302 # 1..1
7620 22:59:13.550418 # 1..1
7621 22:59:13.550534 # 1..1
7622 22:59:13.550650 # 1..1
7623 22:59:13.550765 # 1..1
7624 22:59:13.550880 # 1..1
7625 22:59:13.550995 # 1..1
7626 22:59:13.551110 # 1..1
7627 22:59:13.551225 # 1..1
7628 22:59:13.551341 # 1..1
7629 22:59:13.551455 # 1..1
7630 22:59:13.551619 # 1..1
7631 22:59:13.551750 # 1..1
7632 22:59:13.551867 # 1..1
7633 22:59:13.551985 # 1..1
7634 22:59:13.552114 # 1..1
7635 22:59:13.552234 # 1..1
7636 22:59:13.552350 # 1..1
7637 22:59:13.552466 # 1..1
7638 22:59:13.552589 # 1..1
7639 22:59:13.552764 # 1..1
7640 22:59:13.552922 # 1..1
7641 22:59:13.553078 # 1..1
7642 22:59:13.553201 # 1..1
7643 22:59:13.553359 # 1..1
7644 22:59:13.567003 # 1..1
7645 22:59:13.567297 # 1..1
7646 22:59:13.567481 # 1..1
7647 22:59:13.567665 # 1..1
7648 22:59:13.567839 # 1..1
7649 22:59:13.567986 # 1..1
7650 22:59:13.568152 # 1..1
7651 22:59:13.568556 # 1..1
7652 22:59:13.568697 # 1..1
7653 22:59:13.568841 # 1..1
7654 22:59:13.568985 # 1..1
7655 22:59:13.569126 # 1..1
7656 22:59:13.569278 # 1..1
7657 22:59:13.569443 # 1..1
7658 22:59:13.569565 # 1..1
7659 22:59:13.569696 # 1..1
7660 22:59:13.569812 # 1..1
7661 22:59:13.569927 # 1..1
7662 22:59:13.570043 # 1..1
7663 22:59:13.570158 # 1..1
7664 22:59:13.570277 # 1..1
7665 22:59:13.570393 # 1..1
7666 22:59:13.570507 # 1..1
7667 22:59:13.570621 # 1..1
7668 22:59:13.570738 # 1..1
7669 22:59:13.570853 # 1..1
7670 22:59:13.570968 # 1..1
7671 22:59:13.571084 # 1..1
7672 22:59:13.571199 # 1..1
7673 22:59:13.571316 # 1..1
7674 22:59:13.571432 # 1..1
7675 22:59:13.571592 # 1..1
7676 22:59:13.571724 # 1..1
7677 22:59:13.609336 # 1..1
7678 22:59:13.609584 # 1..1
7679 22:59:13.609685 # 1..1
7680 22:59:13.609776 # 1..1
7681 22:59:13.609864 # 1..1
7682 22:59:13.610171 # 1..1
7683 22:59:13.610282 # 1..1
7684 22:59:13.610378 # 1..1
7685 22:59:13.610456 # 1..1
7686 22:59:13.610530 # 1..1
7687 22:59:13.610604 # 1..1
7688 22:59:13.610676 # 1..1
7689 22:59:13.610748 # 1..1
7690 22:59:13.610819 # 1..1
7691 22:59:13.610891 # 1..1
7692 22:59:13.610964 # 1..1
7693 22:59:13.611037 # 1..1
7694 22:59:13.611107 # 1..1
7695 22:59:13.611178 # 1..1
7696 22:59:13.611254 # 1..1
7697 22:59:13.611338 # 1..1
7698 22:59:13.611413 # 1..1
7699 22:59:13.611492 # 1..1
7700 22:59:13.611570 # 1..1
7701 22:59:13.611645 # 1..1
7702 22:59:13.611723 # 1..1
7703 22:59:13.611796 # 1..1
7704 22:59:13.611876 # 1..1
7705 22:59:13.611958 # 1..1
7706 22:59:13.612036 # 1..1
7707 22:59:13.612109 # 1..1
7708 22:59:13.612181 # 1..1
7709 22:59:13.612253 # 1..1
7710 22:59:13.612328 # 1..1
7711 22:59:13.612423 # 1..1
7712 22:59:13.612496 # 1..1
7713 22:59:13.612574 # 1..1
7714 22:59:13.612654 # 1..1
7715 22:59:13.612740 # 1..1
7716 22:59:13.612824 # 1..1
7717 22:59:13.612907 # 1..1
7718 22:59:13.612991 # 1..1
7719 22:59:13.613075 # 1..1
7720 22:59:13.613159 # 1..1
7721 22:59:13.613243 # 1..1
7722 22:59:13.613331 # 1..1
7723 22:59:13.613414 # 1..1
7724 22:59:13.613497 # 1..1
7725 22:59:13.613580 # 1..1
7726 22:59:13.614322 # 1..1
7727 22:59:13.614422 # 1..1
7728 22:59:13.614499 # 1..1
7729 22:59:13.614573 # 1..1
7730 22:59:13.614647 # 1..1
7731 22:59:13.614719 # 1..1
7732 22:59:13.614791 # 1..1
7733 22:59:13.614863 # 1..1
7734 22:59:13.614935 # 1..1
7735 22:59:13.615007 # 1..1
7736 22:59:13.615079 # 1..1
7737 22:59:13.615151 # 1..1
7738 22:59:13.615224 # 1..1
7739 22:59:13.615296 # 1..1
7740 22:59:13.615368 # 1..1
7741 22:59:13.615439 # 1..1
7742 22:59:13.615511 # 1..1
7743 22:59:13.615581 # 1..1
7744 22:59:13.615654 # 1..1
7745 22:59:13.615726 # 1..1
7746 22:59:13.615797 # 1..1
7747 22:59:13.615870 # 1..1
7748 22:59:13.615943 # 1..1
7749 22:59:13.616016 # 1..1
7750 22:59:13.616090 # 1..1
7751 22:59:13.616164 # 1..1
7752 22:59:13.616245 # 1..1
7753 22:59:13.616322 # 1..1
7754 22:59:13.616402 # 1..1
7755 22:59:13.616477 # 1..1
7756 22:59:13.616550 # 1..1
7757 22:59:13.616626 # 1..1
7758 22:59:13.616706 # 1..1
7759 22:59:13.616787 # 1..1
7760 22:59:13.616864 # 1..1
7761 22:59:13.616939 # 1..1
7762 22:59:13.617013 # 1..1
7763 22:59:13.617085 # 1..1
7764 22:59:13.617158 # 1..1
7765 22:59:13.617235 # 1..1
7766 22:59:13.633877 # 1..1
7767 22:59:13.634120 # 1..1
7768 22:59:13.634209 # 1..1
7769 22:59:13.634298 # 1..1
7770 22:59:13.634387 # 1..1
7771 22:59:13.634670 # 1..1
7772 22:59:13.634752 # 1..1
7773 22:59:13.634827 # 1..1
7774 22:59:13.634902 # 1..1
7775 22:59:13.634977 # 1..1
7776 22:59:13.635049 # 1..1
7777 22:59:13.635124 # 1..1
7778 22:59:13.635199 # 1..1
7779 22:59:13.635276 # 1..1
7780 22:59:13.635358 # 1..1
7781 22:59:13.635435 # 1..1
7782 22:59:13.635513 # 1..1
7783 22:59:13.635598 # 1..1
7784 22:59:13.635683 # 1..1
7785 22:59:13.635769 # 1..1
7786 22:59:13.635854 # 1..1
7787 22:59:13.635939 # 1..1
7788 22:59:13.636024 # 1..1
7789 22:59:13.636109 # 1..1
7790 22:59:13.636195 # 1..1
7791 22:59:13.636280 # 1..1
7792 22:59:13.636365 # 1..1
7793 22:59:13.636450 # 1..1
7794 22:59:13.636536 # 1..1
7795 22:59:13.636621 # 1..1
7796 22:59:13.636706 # 1..1
7797 22:59:13.636791 # 1..1
7798 22:59:13.636875 # 1..1
7799 22:59:13.636960 # 1..1
7800 22:59:13.637045 # 1..1
7801 22:59:13.637130 # 1..1
7802 22:59:13.637215 # 1..1
7803 22:59:13.637300 # 1..1
7804 22:59:13.637409 # 1..1
7805 22:59:13.637497 # 1..1
7806 22:59:13.637582 # 1..1
7807 22:59:13.637677 # 1..1
7808 22:59:13.637764 # 1..1
7809 22:59:13.637849 # 1..1
7810 22:59:13.637935 # 1..1
7811 22:59:13.638021 # 1..1
7812 22:59:13.638106 # 1..1
7813 22:59:13.638191 # 1..1
7814 22:59:13.638275 # 1..1
7815 22:59:13.638360 # 1..1
7816 22:59:13.638441 # 1..1
7817 22:59:13.638517 # 1..1
7818 22:59:13.638590 # 1..1
7819 22:59:13.638662 # 1..1
7820 22:59:13.638734 # 1..1
7821 22:59:13.638806 # 1..1
7822 22:59:13.638877 # 1..1
7823 22:59:13.638951 # 1..1
7824 22:59:13.639022 # 1..1
7825 22:59:13.639095 # 1..1
7826 22:59:13.639167 # 1..1
7827 22:59:13.639240 # 1..1
7828 22:59:13.639312 # 1..1
7829 22:59:13.639384 # 1..1
7830 22:59:13.639455 # 1..1
7831 22:59:13.639525 # 1..1
7832 22:59:13.639596 # 1..1
7833 22:59:13.639669 # 1..1
7834 22:59:13.639743 # 1..1
7835 22:59:13.639818 # 1..1
7836 22:59:13.639890 # 1..1
7837 22:59:13.639964 # 1..1
7838 22:59:13.640041 # 1..1
7839 22:59:13.640115 # 1..1
7840 22:59:13.640189 # 1..1
7841 22:59:13.640263 # 1..1
7842 22:59:13.640339 # 1..1
7843 22:59:13.640412 # 1..1
7844 22:59:13.640496 # 1..1
7845 22:59:13.640580 # 1..1
7846 22:59:13.666018 # 1..1
7847 22:59:13.666255 # 1..1
7848 22:59:13.666341 # 1..1
7849 22:59:13.666429 # 1..1
7850 22:59:13.666512 # 1..1
7851 22:59:13.666811 # 1..1
7852 22:59:13.666908 # 1..1
7853 22:59:13.666982 # 1..1
7854 22:59:13.667053 # 1..1
7855 22:59:13.667123 # 1..1
7856 22:59:13.667193 # 1..1
7857 22:59:13.667263 # 1..1
7858 22:59:13.667332 # 1..1
7859 22:59:13.667400 # 1..1
7860 22:59:13.667469 # 1..1
7861 22:59:13.667538 # 1..1
7862 22:59:13.667608 # 1..1
7863 22:59:13.667677 # 1..1
7864 22:59:13.667748 # 1..1
7865 22:59:13.667817 # 1..1
7866 22:59:13.667886 # 1..1
7867 22:59:13.667954 # 1..1
7868 22:59:13.668023 # 1..1
7869 22:59:13.668093 # 1..1
7870 22:59:13.668160 # 1..1
7871 22:59:13.668233 # 1..1
7872 22:59:13.668303 # 1..1
7873 22:59:13.668373 # 1..1
7874 22:59:13.668442 # 1..1
7875 22:59:13.668511 # 1..1
7876 22:59:13.668579 # 1..1
7877 22:59:13.668648 # 1..1
7878 22:59:13.668746 # 1..1
7879 22:59:13.668823 # 1..1
7880 22:59:13.668897 # 1..1
7881 22:59:13.668970 # 1..1
7882 22:59:13.669041 # 1..1
7883 22:59:13.669113 # 1..1
7884 22:59:13.669183 # 1..1
7885 22:59:13.669254 # 1..1
7886 22:59:13.669325 # 1..1
7887 22:59:13.669398 # 1..1
7888 22:59:13.669470 # 1..1
7889 22:59:13.669543 # 1..1
7890 22:59:13.669615 # 1..1
7891 22:59:13.669700 # 1..1
7892 22:59:13.669775 # 1..1
7893 22:59:13.669847 # 1..1
7894 22:59:13.669919 # 1..1
7895 22:59:13.669991 # 1..1
7896 22:59:13.670060 # 1..1
7897 22:59:13.670130 # 1..1
7898 22:59:13.670200 # 1..1
7899 22:59:13.670270 # 1..1
7900 22:59:13.670341 # 1..1
7901 22:59:13.670416 # 1..1
7902 22:59:13.670487 # 1..1
7903 22:59:13.670556 # 1..1
7904 22:59:13.670628 # 1..1
7905 22:59:13.683043 # 1..1
7906 22:59:13.683354 # 1..1
7907 22:59:13.683507 # 1..1
7908 22:59:13.683665 # 1..1
7909 22:59:13.683788 # 1..1
7910 22:59:13.683904 # 1..1
7911 22:59:13.684248 # 1..1
7912 22:59:13.684376 # 1..1
7913 22:59:13.684503 # 1..1
7914 22:59:13.684680 # 1..1
7915 22:59:13.684828 # 1..1
7916 22:59:13.684970 # 1..1
7917 22:59:13.685113 # 1..1
7918 22:59:13.685254 # 1..1
7919 22:59:13.685394 # 1..1
7920 22:59:13.703022 #
7921 22:59:13.703536 not ok 37 selftests: arm64: check_gcr_el1_cswitch # TIMEOUT 45 seconds
7922 22:59:14.142208 # selftests: arm64: check_ksm_options
7923 22:59:14.718450 # 1..4
7924 22:59:14.718725 # # Invalid MTE synchronous exception caught!
7925 22:59:14.789254 not ok 38 selftests: arm64: check_ksm_options # exit=1
7926 22:59:15.259011 # selftests: arm64: check_mmap_options
7927 22:59:16.614077 # 1..22
7928 22:59:16.614555 # ok 1 Check anonymous memory with private mapping, sync error mode, mmap memory and tag check off
7929 22:59:16.614704 # ok 2 Check file memory with private mapping, sync error mode, mmap/mprotect memory and tag check off
7930 22:59:16.614923 # ok 3 Check anonymous memory with private mapping, no error mode, mmap memory and tag check off
7931 22:59:16.615034 # ok 4 Check file memory with private mapping, no error mode, mmap/mprotect memory and tag check off
7932 22:59:16.615143 # not ok 5 Check anonymous memory with private mapping, sync error mode, mmap memory and tag check on
7933 22:59:16.615249 # not ok 6 Check anonymous memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
7934 22:59:16.615565 # not ok 7 Check anonymous memory with shared mapping, sync error mode, mmap memory and tag check on
7935 22:59:16.630010 # not ok 8 Check anonymous memory with shared mapping, sync error mode, mmap/mprotect memory and tag check on
7936 22:59:16.630467 # not ok 9 Check anonymous memory with private mapping, async error mode, mmap memory and tag check on
7937 22:59:16.630583 # not ok 10 Check anonymous memory with private mapping, async error mode, mmap/mprotect memory and tag check on
7938 22:59:16.630704 # not ok 11 Check anonymous memory with shared mapping, async error mode, mmap memory and tag check on
7939 22:59:16.631028 # not ok 12 Check anonymous memory with shared mapping, async error mode, mmap/mprotect memory and tag check on
7940 22:59:16.631157 # not ok 13 Check file memory with private mapping, sync error mode, mmap memory and tag check on
7941 22:59:16.631509 # not ok 14 Check file memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
7942 22:59:16.670477 # not ok 15 Check file memory with shared mapping, sync error mode, mmap memory and tag check on
7943 22:59:16.671045 # not ok 16 Check file memory with shared mapping, sync error mode, mmap/mprotect memory and tag check on
7944 22:59:16.671161 # not ok 17 Check file memory with private mapping, async error mode, mmap memory and tag check on
7945 22:59:16.671269 # not ok 18 Check file memory with private mapping, async error mode, mmap/mprotect memory and tag check on
7946 22:59:16.671374 # not ok 19 Check file memory with shared mapping, async error mode, mmap memory and tag check on
7947 22:59:16.678670 # not ok 20 Check file memory with shared mapping, async error mode, mmap/mprotect memory and tag check on
7948 22:59:16.679059 # not ok 21 Check clear PROT_MTE flags with private mapping, sync error mode and mmap memory
7949 22:59:16.679165 # not ok 22 Check clear PROT_MTE flags with private mapping and sync error mode and mmap/mprotect memory
7950 22:59:16.679257 # # Totals: pass:4 fail:18 xfail:0 xpass:0 skip:0 error:0
7951 22:59:16.726436 not ok 39 selftests: arm64: check_mmap_options # exit=1
7952 22:59:17.239163 # selftests: arm64: check_prctl
7953 22:59:17.922283 # TAP version 13
7954 22:59:17.922588 # 1..5
7955 22:59:17.922722 # ok 1 check_basic_read
7956 22:59:17.922842 # ok 2 NONE
7957 22:59:17.923202 # ok 3 SYNC
7958 22:59:17.923360 # ok 4 ASYNC
7959 22:59:17.923487 # ok 5 SYNC+ASYNC
7960 22:59:17.923605 # # Totals: pass:5 fail:0 xfail:0 xpass:0 skip:0 error:0
7961 22:59:17.977643 ok 40 selftests: arm64: check_prctl
7962 22:59:18.503582 # selftests: arm64: check_tags_inclusion
7963 22:59:19.114398 # 1..4
7964 22:59:19.114902 # # Unexpected fault recorded for 0x900ffffa3f4a000-0x900ffffa3f4a050 in mode 1
7965 22:59:19.115003 # not ok 1 Check an included tag value with sync mode
7966 22:59:19.115125 # # Unexpected fault recorded for 0xb00ffffa3f4a000-0xb00ffffa3f4a050 in mode 1
7967 22:59:19.115227 # not ok 2 Check different included tags value with sync mode
7968 22:59:19.115343 # ok 3 Check none included tags value with sync mode
7969 22:59:19.115452 # # Unexpected fault recorded for 0xd00ffffa3f4a000-0xd00ffffa3f4a050 in mode 1
7970 22:59:19.115552 # not ok 4 Check all included tags value with sync mode
7971 22:59:19.115638 # # Totals: pass:1 fail:3 xfail:0 xpass:0 skip:0 error:0
7972 22:59:19.207676 not ok 41 selftests: arm64: check_tags_inclusion # exit=1
7973 22:59:19.442957 # selftests: arm64: check_user_mem
7974 22:59:27.826327 # 1..64
7975 22:59:27.826586 # ok 1 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7976 22:59:27.826902 # ok 2 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7977 22:59:27.827007 # ok 3 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7978 22:59:27.827094 # ok 4 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7979 22:59:27.827196 # ok 5 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7980 22:59:27.827300 # ok 6 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7981 22:59:27.827657 # ok 7 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7982 22:59:27.829512 # ok 8 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7983 22:59:27.830090 # ok 9 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7984 22:59:27.830301 # ok 10 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7985 22:59:27.830525 # ok 11 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7986 22:59:27.830737 # ok 12 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7987 22:59:27.830979 # ok 13 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7988 22:59:27.831179 # ok 14 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7989 22:59:27.831368 # ok 15 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7990 22:59:27.831567 # ok 16 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7991 22:59:27.831745 # ok 17 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
7992 22:59:27.831913 # ok 18 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
7993 22:59:27.832042 # ok 19 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
7994 22:59:27.832163 # ok 20 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
7995 22:59:27.832556 # ok 21 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
7996 22:59:27.832943 # ok 22 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
7997 22:59:27.833055 # ok 23 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
7998 22:59:27.833166 # ok 24 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
7999 22:59:27.833308 # ok 25 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8000 22:59:27.833631 # ok 26 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8001 22:59:27.833762 # ok 27 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8002 22:59:27.833872 # ok 28 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8003 22:59:27.834170 # ok 29 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8004 22:59:27.834280 # ok 30 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8005 22:59:27.834612 # ok 31 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8006 22:59:27.834845 # ok 32 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8007 22:59:27.835018 # ok 33 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8008 22:59:27.835214 # ok 34 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8009 22:59:27.835381 # ok 35 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8010 22:59:27.835581 # ok 36 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8011 22:59:27.835713 # ok 37 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8012 22:59:27.844388 # ok 38 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8013 22:59:27.844891 # ok 39 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8014 22:59:27.845085 # ok 40 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8015 22:59:27.845272 # ok 41 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8016 22:59:27.845463 # ok 42 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8017 22:59:27.845588 # ok 43 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8018 22:59:27.845773 # ok 44 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8019 22:59:27.845984 # ok 45 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8020 22:59:27.846158 # ok 46 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8021 22:59:27.846334 # ok 47 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8022 22:59:27.846536 # ok 48 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8023 22:59:27.846708 # ok 49 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8024 22:59:27.846836 # ok 50 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8025 22:59:27.846978 # ok 51 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8026 22:59:29.617738 # ok 52 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8027 22:59:29.619327 # ok 53 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8028 22:59:29.619637 # ok 54 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8029 22:59:29.619821 # ok 55 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8030 22:59:29.619990 # ok 56 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8031 22:59:29.620118 # ok 57 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
8032 22:59:29.620237 # ok 58 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
8033 22:59:29.620356 # ok 59 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
8034 22:59:29.620510 # ok 60 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
8035 22:59:29.620667 # ok 61 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
8036 22:59:29.623546 # ok 62 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
8037 22:59:29.634392 # ok 63 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
8038 22:59:29.634828 # ok 64 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
8039 22:59:29.634916 # # Totals: pass:64 fail:0 xfail:0 xpass:0 skip:0 error:0
8040 22:59:29.645681 ok 42 selftests: arm64: check_user_mem
8041 22:59:29.799633 # selftests: arm64: btitest
8042 22:59:30.021125 # TAP version 13
8043 22:59:30.021485 # 1..18
8044 22:59:30.021684 # # HWCAP_PACA present
8045 22:59:30.021854 # # HWCAP2_BTI present
8046 22:59:30.022266 # # Test binary built for BTI
8047 22:59:30.022448 # # [SIGILL in nohint_func/call_using_br_x0, BTYPE=11 (expected)]
8048 22:59:30.022624 # ok 1 nohint_func/call_using_br_x0
8049 22:59:30.022794 # # [SIGILL in nohint_func/call_using_br_x16, BTYPE=01 (expected)]
8050 22:59:30.022966 # ok 2 nohint_func/call_using_br_x16
8051 22:59:30.023136 # # [SIGILL in nohint_func/call_using_blr, BTYPE=10 (expected)]
8052 22:59:30.023346 # ok 3 nohint_func/call_using_blr
8053 22:59:30.023523 # # [SIGILL in bti_none_func/call_using_br_x0, BTYPE=11 (expected)]
8054 22:59:30.023688 # ok 4 bti_none_func/call_using_br_x0
8055 22:59:30.023854 # # [SIGILL in bti_none_func/call_using_br_x16, BTYPE=01 (expected)]
8056 22:59:30.024019 # ok 5 bti_none_func/call_using_br_x16
8057 22:59:30.024183 # # [SIGILL in bti_none_func/call_using_blr, BTYPE=10 (expected)]
8058 22:59:30.024385 # ok 6 bti_none_func/call_using_blr
8059 22:59:30.024553 # # [SIGILL in bti_c_func/call_using_br_x0, BTYPE=11 (expected)]
8060 22:59:30.024717 # ok 7 bti_c_func/call_using_br_x0
8061 22:59:30.024881 # ok 8 bti_c_func/call_using_br_x16
8062 22:59:30.025045 # ok 9 bti_c_func/call_using_blr
8063 22:59:30.025207 # ok 10 bti_j_func/call_using_br_x0
8064 22:59:30.025372 # ok 11 bti_j_func/call_using_br_x16
8065 22:59:30.025542 # # [SIGILL in bti_j_func/call_using_blr, BTYPE=10 (expected)]
8066 22:59:30.025730 # ok 12 bti_j_func/call_using_blr
8067 22:59:30.025892 # ok 13 bti_jc_func/call_using_br_x0
8068 22:59:30.026054 # ok 14 bti_jc_func/call_using_br_x16
8069 22:59:30.026253 # ok 15 bti_jc_func/call_using_blr
8070 22:59:30.026431 # # [SIGILL in paciasp_func/call_using_br_x0, BTYPE=11 (expected)]
8071 22:59:30.026599 # ok 16 paciasp_func/call_using_br_x0
8072 22:59:30.026766 # ok 17 paciasp_func/call_using_br_x16
8073 22:59:30.026925 # ok 18 paciasp_func/call_using_blr
8074 22:59:30.027088 # # Totals: pass:18 fail:0 xfail:0 xpass:0 skip:0 error:0
8075 22:59:30.058824 ok 43 selftests: arm64: btitest
8076 22:59:30.263103 # selftests: arm64: nobtitest
8077 22:59:30.439335 # TAP version 13
8078 22:59:30.439590 # 1..18
8079 22:59:30.439684 # # HWCAP_PACA present
8080 22:59:30.439772 # # HWCAP2_BTI present
8081 22:59:30.440063 # # Test binary not built for BTI
8082 22:59:30.440156 # ok 1 nohint_func/call_using_br_x0
8083 22:59:30.442844 # ok 2 nohint_func/call_using_br_x16
8084 22:59:30.442949 # ok 3 nohint_func/call_using_blr
8085 22:59:30.443234 # ok 4 bti_none_func/call_using_br_x0
8086 22:59:30.443326 # ok 5 bti_none_func/call_using_br_x16
8087 22:59:30.443404 # ok 6 bti_none_func/call_using_blr
8088 22:59:30.443478 # ok 7 bti_c_func/call_using_br_x0
8089 22:59:30.443551 # ok 8 bti_c_func/call_using_br_x16
8090 22:59:30.443645 # ok 9 bti_c_func/call_using_blr
8091 22:59:30.443721 # ok 10 bti_j_func/call_using_br_x0
8092 22:59:30.443794 # ok 11 bti_j_func/call_using_br_x16
8093 22:59:30.443871 # ok 12 bti_j_func/call_using_blr
8094 22:59:30.445725 # ok 13 bti_jc_func/call_using_br_x0
8095 22:59:30.446206 # ok 14 bti_jc_func/call_using_br_x16
8096 22:59:30.446416 # ok 15 bti_jc_func/call_using_blr
8097 22:59:30.446596 # ok 16 paciasp_func/call_using_br_x0
8098 22:59:30.446983 # ok 17 paciasp_func/call_using_br_x16
8099 22:59:30.447146 # ok 18 paciasp_func/call_using_blr
8100 22:59:30.447281 # # Totals: pass:18 fail:0 xfail:0 xpass:0 skip:0 error:0
8101 22:59:30.469371 ok 44 selftests: arm64: nobtitest
8102 22:59:30.617859 # selftests: arm64: hwcap
8103 22:59:30.845733 # TAP version 13
8104 22:59:30.845979 # 1..28
8105 22:59:30.846325 # # RNG present
8106 22:59:30.846527 # ok 1 cpuinfo_match_RNG
8107 22:59:30.846693 # ok 2 sigill_RNG
8108 22:59:30.846818 # # SME present
8109 22:59:30.846998 # ok 3 cpuinfo_match_SME
8110 22:59:30.847165 # ok 4 sigill_SME
8111 22:59:30.847291 # # SVE present
8112 22:59:30.847408 # ok 5 cpuinfo_match_SVE
8113 22:59:30.847523 # ok 6 sigill_SVE
8114 22:59:30.847656 # # SVE 2 present
8115 22:59:30.847772 # ok 7 cpuinfo_match_SVE 2
8116 22:59:30.847884 # ok 8 sigill_SVE 2
8117 22:59:30.847999 # # SVE AES present
8118 22:59:30.848147 # ok 9 cpuinfo_match_SVE AES
8119 22:59:30.848268 # ok 10 sigill_SVE AES
8120 22:59:30.848382 # # SVE2 PMULL present
8121 22:59:30.848497 # ok 11 cpuinfo_match_SVE2 PMULL
8122 22:59:30.848612 # ok 12 sigill_SVE2 PMULL
8123 22:59:30.848727 # # SVE2 BITPERM present
8124 22:59:30.848841 # ok 13 cpuinfo_match_SVE2 BITPERM
8125 22:59:30.848953 # ok 14 sigill_SVE2 BITPERM
8126 22:59:30.849067 # # SVE2 SHA3 present
8127 22:59:30.849179 # ok 15 cpuinfo_match_SVE2 SHA3
8128 22:59:30.849291 # ok 16 sigill_SVE2 SHA3
8129 22:59:30.849403 # # SVE2 SM4 present
8130 22:59:30.849516 # ok 17 cpuinfo_match_SVE2 SM4
8131 22:59:30.849628 # ok 18 sigill_SVE2 SM4
8132 22:59:30.849768 # # SVE2 I8MM present
8133 22:59:30.849882 # ok 19 cpuinfo_match_SVE2 I8MM
8134 22:59:30.849998 # ok 20 sigill_SVE2 I8MM
8135 22:59:30.850114 # # SVE2 F32MM present
8136 22:59:30.853922 # ok 21 cpuinfo_match_SVE2 F32MM
8137 22:59:30.854159 # ok 22 sigill_SVE2 F32MM
8138 22:59:30.854548 # # SVE2 F64MM present
8139 22:59:30.854647 # ok 23 cpuinfo_match_SVE2 F64MM
8140 22:59:30.854724 # ok 24 sigill_SVE2 F64MM
8141 22:59:30.854797 # # SVE2 BF16 present
8142 22:59:30.854868 # ok 25 cpuinfo_match_SVE2 BF16
8143 22:59:30.854940 # ok 26 sigill_SVE2 BF16
8144 22:59:30.855016 # ok 27 cpuinfo_match_SVE2 EBF16
8145 22:59:30.855087 # ok 28 # SKIP sigill_SVE2 EBF16
8146 22:59:30.855172 # # Totals: pass:27 fail:0 xfail:0 xpass:0 skip:1 error:0
8147 22:59:30.902260 ok 45 selftests: arm64: hwcap
8148 22:59:31.206371 # selftests: arm64: ptrace
8149 22:59:31.473910 # TAP version 13
8150 22:59:31.474174 # 1..7
8151 22:59:31.474554 # # Parent is 3908, child is 3909
8152 22:59:31.474712 # ok 1 read_tpidr_one
8153 22:59:31.474832 # ok 2 write_tpidr_one
8154 22:59:31.474946 # ok 3 verify_tpidr_one
8155 22:59:31.475058 # ok 4 count_tpidrs
8156 22:59:31.475176 # ok 5 tpidr2_write
8157 22:59:31.475289 # ok 6 tpidr2_read
8158 22:59:31.475402 # ok 7 write_tpidr_only
8159 22:59:31.475538 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
8160 22:59:31.530047 ok 46 selftests: arm64: ptrace
8161 22:59:31.746092 # selftests: arm64: syscall-abi
8162 22:59:34.445601 # TAP version 13
8163 22:59:34.445950 # 1..514
8164 22:59:34.446127 # # SME with FA64
8165 22:59:34.446294 # ok 1 getpid() FPSIMD
8166 22:59:34.446489 # ok 2 getpid() SVE VL 256
8167 22:59:34.446657 # ok 3 getpid() SVE VL 256/SME VL 256 SM+ZA
8168 22:59:34.446822 # ok 4 getpid() SVE VL 256/SME VL 256 SM
8169 22:59:34.446980 # ok 5 getpid() SVE VL 256/SME VL 256 ZA
8170 22:59:34.447140 # ok 6 getpid() SVE VL 256/SME VL 128 SM+ZA
8171 22:59:34.447302 # ok 7 getpid() SVE VL 256/SME VL 128 SM
8172 22:59:34.447464 # ok 8 getpid() SVE VL 256/SME VL 128 ZA
8173 22:59:34.447666 # ok 9 getpid() SVE VL 256/SME VL 64 SM+ZA
8174 22:59:34.447808 # ok 10 getpid() SVE VL 256/SME VL 64 SM
8175 22:59:34.447958 # ok 11 getpid() SVE VL 256/SME VL 64 ZA
8176 22:59:34.448080 # ok 12 getpid() SVE VL 256/SME VL 32 SM+ZA
8177 22:59:34.448197 # ok 13 getpid() SVE VL 256/SME VL 32 SM
8178 22:59:34.448312 # ok 14 getpid() SVE VL 256/SME VL 32 ZA
8179 22:59:34.448426 # ok 15 getpid() SVE VL 256/SME VL 16 SM+ZA
8180 22:59:34.448540 # ok 16 getpid() SVE VL 256/SME VL 16 SM
8181 22:59:34.448654 # ok 17 getpid() SVE VL 256/SME VL 16 ZA
8182 22:59:34.448769 # ok 18 getpid() SVE VL 240
8183 22:59:34.448883 # ok 19 getpid() SVE VL 240/SME VL 256 SM+ZA
8184 22:59:34.448996 # ok 20 getpid() SVE VL 240/SME VL 256 SM
8185 22:59:34.449110 # ok 21 getpid() SVE VL 240/SME VL 256 ZA
8186 22:59:34.449224 # ok 22 getpid() SVE VL 240/SME VL 128 SM+ZA
8187 22:59:34.451926 # ok 23 getpid() SVE VL 240/SME VL 128 SM
8188 22:59:34.452163 # ok 24 getpid() SVE VL 240/SME VL 128 ZA
8189 22:59:34.452598 # ok 25 getpid() SVE VL 240/SME VL 64 SM+ZA
8190 22:59:34.452799 # ok 26 getpid() SVE VL 240/SME VL 64 SM
8191 22:59:34.452973 # ok 27 getpid() SVE VL 240/SME VL 64 ZA
8192 22:59:34.453140 # ok 28 getpid() SVE VL 240/SME VL 32 SM+ZA
8193 22:59:34.453303 # ok 29 getpid() SVE VL 240/SME VL 32 SM
8194 22:59:34.453462 # ok 30 getpid() SVE VL 240/SME VL 32 ZA
8195 22:59:34.453624 # ok 31 getpid() SVE VL 240/SME VL 16 SM+ZA
8196 22:59:34.453799 # ok 32 getpid() SVE VL 240/SME VL 16 SM
8197 22:59:34.453963 # ok 33 getpid() SVE VL 240/SME VL 16 ZA
8198 22:59:34.454111 # ok 34 getpid() SVE VL 224
8199 22:59:34.454275 # ok 35 getpid() SVE VL 224/SME VL 256 SM+ZA
8200 22:59:34.454413 # ok 36 getpid() SVE VL 224/SME VL 256 SM
8201 22:59:34.454531 # ok 37 getpid() SVE VL 224/SME VL 256 ZA
8202 22:59:34.454648 # ok 38 getpid() SVE VL 224/SME VL 128 SM+ZA
8203 22:59:34.454768 # ok 39 getpid() SVE VL 224/SME VL 128 SM
8204 22:59:34.454923 # ok 40 getpid() SVE VL 224/SME VL 128 ZA
8205 22:59:34.455078 # ok 41 getpid() SVE VL 224/SME VL 64 SM+ZA
8206 22:59:34.455238 # ok 42 getpid() SVE VL 224/SME VL 64 SM
8207 22:59:34.455397 # ok 43 getpid() SVE VL 224/SME VL 64 ZA
8208 22:59:34.455538 # ok 44 getpid() SVE VL 224/SME VL 32 SM+ZA
8209 22:59:34.455704 # ok 45 getpid() SVE VL 224/SME VL 32 SM
8210 22:59:34.455830 # ok 46 getpid() SVE VL 224/SME VL 32 ZA
8211 22:59:34.455947 # ok 47 getpid() SVE VL 224/SME VL 16 SM+ZA
8212 22:59:34.456064 # ok 48 getpid() SVE VL 224/SME VL 16 SM
8213 22:59:34.456180 # ok 49 getpid() SVE VL 224/SME VL 16 ZA
8214 22:59:34.456295 # ok 50 getpid() SVE VL 208
8215 22:59:34.456410 # ok 51 getpid() SVE VL 208/SME VL 256 SM+ZA
8216 22:59:34.456524 # ok 52 getpid() SVE VL 208/SME VL 256 SM
8217 22:59:34.456639 # ok 53 getpid() SVE VL 208/SME VL 256 ZA
8218 22:59:34.456752 # ok 54 getpid() SVE VL 208/SME VL 128 SM+ZA
8219 22:59:34.456868 # ok 55 getpid() SVE VL 208/SME VL 128 SM
8220 22:59:34.456983 # ok 56 getpid() SVE VL 208/SME VL 128 ZA
8221 22:59:34.459831 # ok 57 getpid() SVE VL 208/SME VL 64 SM+ZA
8222 22:59:34.460275 # ok 58 getpid() SVE VL 208/SME VL 64 SM
8223 22:59:34.460480 # ok 59 getpid() SVE VL 208/SME VL 64 ZA
8224 22:59:34.460648 # ok 60 getpid() SVE VL 208/SME VL 32 SM+ZA
8225 22:59:34.460812 # ok 61 getpid() SVE VL 208/SME VL 32 SM
8226 22:59:34.460972 # ok 62 getpid() SVE VL 208/SME VL 32 ZA
8227 22:59:34.461162 # ok 63 getpid() SVE VL 208/SME VL 16 SM+ZA
8228 22:59:34.461322 # ok 64 getpid() SVE VL 208/SME VL 16 SM
8229 22:59:34.461471 # ok 65 getpid() SVE VL 208/SME VL 16 ZA
8230 22:59:34.461617 # ok 66 getpid() SVE VL 192
8231 22:59:34.461784 # ok 67 getpid() SVE VL 192/SME VL 256 SM+ZA
8232 22:59:34.461925 # ok 68 getpid() SVE VL 192/SME VL 256 SM
8233 22:59:34.462045 # ok 69 getpid() SVE VL 192/SME VL 256 ZA
8234 22:59:34.462170 # ok 70 getpid() SVE VL 192/SME VL 128 SM+ZA
8235 22:59:34.462285 # ok 71 getpid() SVE VL 192/SME VL 128 SM
8236 22:59:34.462404 # ok 72 getpid() SVE VL 192/SME VL 128 ZA
8237 22:59:34.462566 # ok 73 getpid() SVE VL 192/SME VL 64 SM+ZA
8238 22:59:34.462742 # ok 74 getpid() SVE VL 192/SME VL 64 SM
8239 22:59:34.462885 # ok 75 getpid() SVE VL 192/SME VL 64 ZA
8240 22:59:34.463010 # ok 76 getpid() SVE VL 192/SME VL 32 SM+ZA
8241 22:59:34.463148 # ok 77 getpid() SVE VL 192/SME VL 32 SM
8242 22:59:34.463282 # ok 78 getpid() SVE VL 192/SME VL 32 ZA
8243 22:59:34.463441 # ok 79 getpid() SVE VL 192/SME VL 16 SM+ZA
8244 22:59:34.463592 # ok 80 getpid() SVE VL 192/SME VL 16 SM
8245 22:59:34.463726 # ok 81 getpid() SVE VL 192/SME VL 16 ZA
8246 22:59:34.463840 # ok 82 getpid() SVE VL 176
8247 22:59:34.463953 # ok 83 getpid() SVE VL 176/SME VL 256 SM+ZA
8248 22:59:34.464066 # ok 84 getpid() SVE VL 176/SME VL 256 SM
8249 22:59:34.464177 # ok 85 getpid() SVE VL 176/SME VL 256 ZA
8250 22:59:34.464287 # ok 86 getpid() SVE VL 176/SME VL 128 SM+ZA
8251 22:59:34.464430 # ok 87 getpid() SVE VL 176/SME VL 128 SM
8252 22:59:34.464549 # ok 88 getpid() SVE VL 176/SME VL 128 ZA
8253 22:59:34.464662 # ok 89 getpid() SVE VL 176/SME VL 64 SM+ZA
8254 22:59:34.464774 # ok 90 getpid() SVE VL 176/SME VL 64 SM
8255 22:59:34.464887 # ok 91 getpid() SVE VL 176/SME VL 64 ZA
8256 22:59:34.464997 # ok 92 getpid() SVE VL 176/SME VL 32 SM+ZA
8257 22:59:34.465106 # ok 93 getpid() SVE VL 176/SME VL 32 SM
8258 22:59:34.465217 # ok 94 getpid() SVE VL 176/SME VL 32 ZA
8259 22:59:34.465327 # ok 95 getpid() SVE VL 176/SME VL 16 SM+ZA
8260 22:59:34.465444 # ok 96 getpid() SVE VL 176/SME VL 16 SM
8261 22:59:34.467916 # ok 97 getpid() SVE VL 176/SME VL 16 ZA
8262 22:59:34.468308 # ok 98 getpid() SVE VL 160
8263 22:59:36.970830 # ok 99 getpid() SVE VL 160/SME VL 256 SM+ZA
8264 22:59:36.971071 # ok 100 getpid() SVE VL 160/SME VL 256 SM
8265 22:59:36.971597 # ok 101 getpid() SVE VL 160/SME VL 256 ZA
8266 22:59:36.971687 # ok 102 getpid() SVE VL 160/SME VL 128 SM+ZA
8267 22:59:36.971763 # ok 103 getpid() SVE VL 160/SME VL 128 SM
8268 22:59:36.971839 # ok 104 getpid() SVE VL 160/SME VL 128 ZA
8269 22:59:36.971913 # ok 105 getpid() SVE VL 160/SME VL 64 SM+ZA
8270 22:59:36.971987 # ok 106 getpid() SVE VL 160/SME VL 64 SM
8271 22:59:36.972061 # ok 107 getpid() SVE VL 160/SME VL 64 ZA
8272 22:59:36.972134 # ok 108 getpid() SVE VL 160/SME VL 32 SM+ZA
8273 22:59:36.972208 # ok 109 getpid() SVE VL 160/SME VL 32 SM
8274 22:59:36.972484 # ok 110 getpid() SVE VL 160/SME VL 32 ZA
8275 22:59:36.972764 # ok 111 getpid() SVE VL 160/SME VL 16 SM+ZA
8276 22:59:36.972855 # ok 112 getpid() SVE VL 160/SME VL 16 SM
8277 22:59:36.972957 # ok 113 getpid() SVE VL 160/SME VL 16 ZA
8278 22:59:36.973044 # ok 114 getpid() SVE VL 144
8279 22:59:36.973144 # ok 115 getpid() SVE VL 144/SME VL 256 SM+ZA
8280 22:59:36.973230 # ok 116 getpid() SVE VL 144/SME VL 256 SM
8281 22:59:36.973330 # ok 117 getpid() SVE VL 144/SME VL 256 ZA
8282 22:59:36.973617 # ok 118 getpid() SVE VL 144/SME VL 128 SM+ZA
8283 22:59:36.973716 # ok 119 getpid() SVE VL 144/SME VL 128 SM
8284 22:59:36.973818 # ok 120 getpid() SVE VL 144/SME VL 128 ZA
8285 22:59:36.973932 # ok 121 getpid() SVE VL 144/SME VL 64 SM+ZA
8286 22:59:36.974034 # ok 122 getpid() SVE VL 144/SME VL 64 SM
8287 22:59:36.974134 # ok 123 getpid() SVE VL 144/SME VL 64 ZA
8288 22:59:36.974233 # ok 124 getpid() SVE VL 144/SME VL 32 SM+ZA
8289 22:59:36.974536 # ok 125 getpid() SVE VL 144/SME VL 32 SM
8290 22:59:36.974633 # ok 126 getpid() SVE VL 144/SME VL 32 ZA
8291 22:59:36.974719 # ok 127 getpid() SVE VL 144/SME VL 16 SM+ZA
8292 22:59:36.974793 # ok 128 getpid() SVE VL 144/SME VL 16 SM
8293 22:59:36.974875 # ok 129 getpid() SVE VL 144/SME VL 16 ZA
8294 22:59:36.974946 # ok 130 getpid() SVE VL 128
8295 22:59:36.975272 # ok 131 getpid() SVE VL 128/SME VL 256 SM+ZA
8296 22:59:36.975483 # ok 132 getpid() SVE VL 128/SME VL 256 SM
8297 22:59:36.975663 # ok 133 getpid() SVE VL 128/SME VL 256 ZA
8298 22:59:36.975866 # ok 134 getpid() SVE VL 128/SME VL 128 SM+ZA
8299 22:59:36.976043 # ok 135 getpid() SVE VL 128/SME VL 128 SM
8300 22:59:36.980846 # ok 136 getpid() SVE VL 128/SME VL 128 ZA
8301 22:59:36.981344 # ok 137 getpid() SVE VL 128/SME VL 64 SM+ZA
8302 22:59:36.981449 # ok 138 getpid() SVE VL 128/SME VL 64 SM
8303 22:59:36.981534 # ok 139 getpid() SVE VL 128/SME VL 64 ZA
8304 22:59:36.981621 # ok 140 getpid() SVE VL 128/SME VL 32 SM+ZA
8305 22:59:36.981714 # ok 141 getpid() SVE VL 128/SME VL 32 SM
8306 22:59:36.981812 # ok 142 getpid() SVE VL 128/SME VL 32 ZA
8307 22:59:36.981894 # ok 143 getpid() SVE VL 128/SME VL 16 SM+ZA
8308 22:59:36.981973 # ok 144 getpid() SVE VL 128/SME VL 16 SM
8309 22:59:36.982067 # ok 145 getpid() SVE VL 128/SME VL 16 ZA
8310 22:59:36.982149 # ok 146 getpid() SVE VL 112
8311 22:59:36.982242 # ok 147 getpid() SVE VL 112/SME VL 256 SM+ZA
8312 22:59:36.982325 # ok 148 getpid() SVE VL 112/SME VL 256 SM
8313 22:59:36.982422 # ok 149 getpid() SVE VL 112/SME VL 256 ZA
8314 22:59:36.982506 # ok 150 getpid() SVE VL 112/SME VL 128 SM+ZA
8315 22:59:36.982608 # ok 151 getpid() SVE VL 112/SME VL 128 SM
8316 22:59:36.982974 # ok 152 getpid() SVE VL 112/SME VL 128 ZA
8317 22:59:36.983076 # ok 153 getpid() SVE VL 112/SME VL 64 SM+ZA
8318 22:59:36.983168 # ok 154 getpid() SVE VL 112/SME VL 64 SM
8319 22:59:36.983255 # ok 155 getpid() SVE VL 112/SME VL 64 ZA
8320 22:59:36.983355 # ok 156 getpid() SVE VL 112/SME VL 32 SM+ZA
8321 22:59:36.983442 # ok 157 getpid() SVE VL 112/SME VL 32 SM
8322 22:59:36.983527 # ok 158 getpid() SVE VL 112/SME VL 32 ZA
8323 22:59:36.983616 # ok 159 getpid() SVE VL 112/SME VL 16 SM+ZA
8324 22:59:36.983699 # ok 160 getpid() SVE VL 112/SME VL 16 SM
8325 22:59:36.983801 # ok 161 getpid() SVE VL 112/SME VL 16 ZA
8326 22:59:36.983885 # ok 162 getpid() SVE VL 96
8327 22:59:36.988110 # ok 163 getpid() SVE VL 96/SME VL 256 SM+ZA
8328 22:59:36.988569 # ok 164 getpid() SVE VL 96/SME VL 256 SM
8329 22:59:36.988666 # ok 165 getpid() SVE VL 96/SME VL 256 ZA
8330 22:59:36.988752 # ok 166 getpid() SVE VL 96/SME VL 128 SM+ZA
8331 22:59:36.988834 # ok 167 getpid() SVE VL 96/SME VL 128 SM
8332 22:59:36.988935 # ok 168 getpid() SVE VL 96/SME VL 128 ZA
8333 22:59:36.989023 # ok 169 getpid() SVE VL 96/SME VL 64 SM+ZA
8334 22:59:36.989108 # ok 170 getpid() SVE VL 96/SME VL 64 SM
8335 22:59:36.989209 # ok 171 getpid() SVE VL 96/SME VL 64 ZA
8336 22:59:36.989296 # ok 172 getpid() SVE VL 96/SME VL 32 SM+ZA
8337 22:59:36.989398 # ok 173 getpid() SVE VL 96/SME VL 32 SM
8338 22:59:36.989485 # ok 174 getpid() SVE VL 96/SME VL 32 ZA
8339 22:59:36.989588 # ok 175 getpid() SVE VL 96/SME VL 16 SM+ZA
8340 22:59:36.989689 # ok 176 getpid() SVE VL 96/SME VL 16 SM
8341 22:59:36.989790 # ok 177 getpid() SVE VL 96/SME VL 16 ZA
8342 22:59:36.989890 # ok 178 getpid() SVE VL 80
8343 22:59:36.989976 # ok 179 getpid() SVE VL 80/SME VL 256 SM+ZA
8344 22:59:36.990075 # ok 180 getpid() SVE VL 80/SME VL 256 SM
8345 22:59:36.990175 # ok 181 getpid() SVE VL 80/SME VL 256 ZA
8346 22:59:36.990276 # ok 182 getpid() SVE VL 80/SME VL 128 SM+ZA
8347 22:59:36.990376 # ok 183 getpid() SVE VL 80/SME VL 128 SM
8348 22:59:36.990476 # ok 184 getpid() SVE VL 80/SME VL 128 ZA
8349 22:59:36.990773 # ok 185 getpid() SVE VL 80/SME VL 64 SM+ZA
8350 22:59:36.990867 # ok 186 getpid() SVE VL 80/SME VL 64 SM
8351 22:59:36.990968 # ok 187 getpid() SVE VL 80/SME VL 64 ZA
8352 22:59:36.991068 # ok 188 getpid() SVE VL 80/SME VL 32 SM+ZA
8353 22:59:36.991167 # ok 189 getpid() SVE VL 80/SME VL 32 SM
8354 22:59:36.991460 # ok 190 getpid() SVE VL 80/SME VL 32 ZA
8355 22:59:36.991549 # ok 191 getpid() SVE VL 80/SME VL 16 SM+ZA
8356 22:59:36.991626 # ok 192 getpid() SVE VL 80/SME VL 16 SM
8357 22:59:36.996021 # ok 193 getpid() SVE VL 80/SME VL 16 ZA
8358 22:59:36.996352 # ok 194 getpid() SVE VL 64
8359 22:59:36.996439 # ok 195 getpid() SVE VL 64/SME VL 256 SM+ZA
8360 22:59:39.219606 # ok 196 getpid() SVE VL 64/SME VL 256 SM
8361 22:59:39.220896 # ok 197 getpid() SVE VL 64/SME VL 256 ZA
8362 22:59:39.221382 # ok 198 getpid() SVE VL 64/SME VL 128 SM+ZA
8363 22:59:39.221566 # ok 199 getpid() SVE VL 64/SME VL 128 SM
8364 22:59:39.221756 # ok 200 getpid() SVE VL 64/SME VL 128 ZA
8365 22:59:39.221967 # ok 201 getpid() SVE VL 64/SME VL 64 SM+ZA
8366 22:59:39.222111 # ok 202 getpid() SVE VL 64/SME VL 64 SM
8367 22:59:39.222289 # ok 203 getpid() SVE VL 64/SME VL 64 ZA
8368 22:59:39.222426 # ok 204 getpid() SVE VL 64/SME VL 32 SM+ZA
8369 22:59:39.222569 # ok 205 getpid() SVE VL 64/SME VL 32 SM
8370 22:59:39.222743 # ok 206 getpid() SVE VL 64/SME VL 32 ZA
8371 22:59:39.222879 # ok 207 getpid() SVE VL 64/SME VL 16 SM+ZA
8372 22:59:39.223022 # ok 208 getpid() SVE VL 64/SME VL 16 SM
8373 22:59:39.223163 # ok 209 getpid() SVE VL 64/SME VL 16 ZA
8374 22:59:39.223339 # ok 210 getpid() SVE VL 48
8375 22:59:39.223476 # ok 211 getpid() SVE VL 48/SME VL 256 SM+ZA
8376 22:59:39.223618 # ok 212 getpid() SVE VL 48/SME VL 256 SM
8377 22:59:39.223760 # ok 213 getpid() SVE VL 48/SME VL 256 ZA
8378 22:59:39.223903 # ok 214 getpid() SVE VL 48/SME VL 128 SM+ZA
8379 22:59:39.224077 # ok 215 getpid() SVE VL 48/SME VL 128 SM
8380 22:59:39.224214 # ok 216 getpid() SVE VL 48/SME VL 128 ZA
8381 22:59:39.231868 # ok 217 getpid() SVE VL 48/SME VL 64 SM+ZA
8382 22:59:39.232426 # ok 218 getpid() SVE VL 48/SME VL 64 SM
8383 22:59:39.232552 # ok 219 getpid() SVE VL 48/SME VL 64 ZA
8384 22:59:39.232645 # ok 220 getpid() SVE VL 48/SME VL 32 SM+ZA
8385 22:59:39.232733 # ok 221 getpid() SVE VL 48/SME VL 32 SM
8386 22:59:39.232818 # ok 222 getpid() SVE VL 48/SME VL 32 ZA
8387 22:59:39.232928 # ok 223 getpid() SVE VL 48/SME VL 16 SM+ZA
8388 22:59:39.233018 # ok 224 getpid() SVE VL 48/SME VL 16 SM
8389 22:59:39.233108 # ok 225 getpid() SVE VL 48/SME VL 16 ZA
8390 22:59:39.233191 # ok 226 getpid() SVE VL 32
8391 22:59:39.233292 # ok 227 getpid() SVE VL 32/SME VL 256 SM+ZA
8392 22:59:39.233377 # ok 228 getpid() SVE VL 32/SME VL 256 SM
8393 22:59:39.233460 # ok 229 getpid() SVE VL 32/SME VL 256 ZA
8394 22:59:39.233558 # ok 230 getpid() SVE VL 32/SME VL 128 SM+ZA
8395 22:59:39.233644 # ok 231 getpid() SVE VL 32/SME VL 128 SM
8396 22:59:39.233739 # ok 232 getpid() SVE VL 32/SME VL 128 ZA
8397 22:59:39.233839 # ok 233 getpid() SVE VL 32/SME VL 64 SM+ZA
8398 22:59:39.233924 # ok 234 getpid() SVE VL 32/SME VL 64 SM
8399 22:59:39.234023 # ok 235 getpid() SVE VL 32/SME VL 64 ZA
8400 22:59:39.234110 # ok 236 getpid() SVE VL 32/SME VL 32 SM+ZA
8401 22:59:39.234206 # ok 237 getpid() SVE VL 32/SME VL 32 SM
8402 22:59:39.234292 # ok 238 getpid() SVE VL 32/SME VL 32 ZA
8403 22:59:39.234388 # ok 239 getpid() SVE VL 32/SME VL 16 SM+ZA
8404 22:59:39.234472 # ok 240 getpid() SVE VL 32/SME VL 16 SM
8405 22:59:39.234568 # ok 241 getpid() SVE VL 32/SME VL 16 ZA
8406 22:59:39.234652 # ok 242 getpid() SVE VL 16
8407 22:59:39.234748 # ok 243 getpid() SVE VL 16/SME VL 256 SM+ZA
8408 22:59:39.234835 # ok 244 getpid() SVE VL 16/SME VL 256 SM
8409 22:59:39.234939 # ok 245 getpid() SVE VL 16/SME VL 256 ZA
8410 22:59:39.235418 # ok 246 getpid() SVE VL 16/SME VL 128 SM+ZA
8411 22:59:39.235511 # ok 247 getpid() SVE VL 16/SME VL 128 SM
8412 22:59:39.235612 # ok 248 getpid() SVE VL 16/SME VL 128 ZA
8413 22:59:39.240214 # ok 249 getpid() SVE VL 16/SME VL 64 SM+ZA
8414 22:59:39.240782 # ok 250 getpid() SVE VL 16/SME VL 64 SM
8415 22:59:39.240897 # ok 251 getpid() SVE VL 16/SME VL 64 ZA
8416 22:59:39.240989 # ok 252 getpid() SVE VL 16/SME VL 32 SM+ZA
8417 22:59:39.241077 # ok 253 getpid() SVE VL 16/SME VL 32 SM
8418 22:59:39.241181 # ok 254 getpid() SVE VL 16/SME VL 32 ZA
8419 22:59:39.241272 # ok 255 getpid() SVE VL 16/SME VL 16 SM+ZA
8420 22:59:39.241359 # ok 256 getpid() SVE VL 16/SME VL 16 SM
8421 22:59:39.241460 # ok 257 getpid() SVE VL 16/SME VL 16 ZA
8422 22:59:39.241547 # ok 258 sched_yield() FPSIMD
8423 22:59:39.241633 # ok 259 sched_yield() SVE VL 256
8424 22:59:39.241744 # ok 260 sched_yield() SVE VL 256/SME VL 256 SM+ZA
8425 22:59:39.241832 # ok 261 sched_yield() SVE VL 256/SME VL 256 SM
8426 22:59:39.241932 # ok 262 sched_yield() SVE VL 256/SME VL 256 ZA
8427 22:59:39.242333 # ok 263 sched_yield() SVE VL 256/SME VL 128 SM+ZA
8428 22:59:39.242438 # ok 264 sched_yield() SVE VL 256/SME VL 128 SM
8429 22:59:39.242528 # ok 265 sched_yield() SVE VL 256/SME VL 128 ZA
8430 22:59:39.242630 # ok 266 sched_yield() SVE VL 256/SME VL 64 SM+ZA
8431 22:59:39.242719 # ok 267 sched_yield() SVE VL 256/SME VL 64 SM
8432 22:59:39.242817 # ok 268 sched_yield() SVE VL 256/SME VL 64 ZA
8433 22:59:39.242916 # ok 269 sched_yield() SVE VL 256/SME VL 32 SM+ZA
8434 22:59:39.243214 # ok 270 sched_yield() SVE VL 256/SME VL 32 SM
8435 22:59:39.243319 # ok 271 sched_yield() SVE VL 256/SME VL 32 ZA
8436 22:59:39.243419 # ok 272 sched_yield() SVE VL 256/SME VL 16 SM+ZA
8437 22:59:39.243714 # ok 273 sched_yield() SVE VL 256/SME VL 16 SM
8438 22:59:39.248142 # ok 274 sched_yield() SVE VL 256/SME VL 16 ZA
8439 22:59:39.248435 # ok 275 sched_yield() SVE VL 240
8440 22:59:39.248537 # ok 276 sched_yield() SVE VL 240/SME VL 256 SM+ZA
8441 22:59:39.248643 # ok 277 sched_yield() SVE VL 240/SME VL 256 SM
8442 22:59:39.248746 # ok 278 sched_yield() SVE VL 240/SME VL 256 ZA
8443 22:59:39.249046 # ok 279 sched_yield() SVE VL 240/SME VL 128 SM+ZA
8444 22:59:39.249165 # ok 280 sched_yield() SVE VL 240/SME VL 128 SM
8445 22:59:39.249258 # ok 281 sched_yield() SVE VL 240/SME VL 128 ZA
8446 22:59:39.249359 # ok 282 sched_yield() SVE VL 240/SME VL 64 SM+ZA
8447 22:59:39.249461 # ok 283 sched_yield() SVE VL 240/SME VL 64 SM
8448 22:59:39.249561 # ok 284 sched_yield() SVE VL 240/SME VL 64 ZA
8449 22:59:39.249869 # ok 285 sched_yield() SVE VL 240/SME VL 32 SM+ZA
8450 22:59:39.249978 # ok 286 sched_yield() SVE VL 240/SME VL 32 SM
8451 22:59:39.250080 # ok 287 sched_yield() SVE VL 240/SME VL 32 ZA
8452 22:59:39.250375 # ok 288 sched_yield() SVE VL 240/SME VL 16 SM+ZA
8453 22:59:39.250476 # ok 289 sched_yield() SVE VL 240/SME VL 16 SM
8454 22:59:41.260622 # ok 290 sched_yield() SVE VL 240/SME VL 16 ZA
8455 22:59:41.261087 # ok 291 sched_yield() SVE VL 224
8456 22:59:41.261197 # ok 292 sched_yield() SVE VL 224/SME VL 256 SM+ZA
8457 22:59:41.261292 # ok 293 sched_yield() SVE VL 224/SME VL 256 SM
8458 22:59:41.261381 # ok 294 sched_yield() SVE VL 224/SME VL 256 ZA
8459 22:59:41.261695 # ok 295 sched_yield() SVE VL 224/SME VL 128 SM+ZA
8460 22:59:41.261804 # ok 296 sched_yield() SVE VL 224/SME VL 128 SM
8461 22:59:41.261892 # ok 297 sched_yield() SVE VL 224/SME VL 128 ZA
8462 22:59:41.261978 # ok 298 sched_yield() SVE VL 224/SME VL 64 SM+ZA
8463 22:59:41.262075 # ok 299 sched_yield() SVE VL 224/SME VL 64 SM
8464 22:59:41.262161 # ok 300 sched_yield() SVE VL 224/SME VL 64 ZA
8465 22:59:41.262243 # ok 301 sched_yield() SVE VL 224/SME VL 32 SM+ZA
8466 22:59:41.262341 # ok 302 sched_yield() SVE VL 224/SME VL 32 SM
8467 22:59:41.262425 # ok 303 sched_yield() SVE VL 224/SME VL 32 ZA
8468 22:59:41.262522 # ok 304 sched_yield() SVE VL 224/SME VL 16 SM+ZA
8469 22:59:41.262629 # ok 305 sched_yield() SVE VL 224/SME VL 16 SM
8470 22:59:41.262966 # ok 306 sched_yield() SVE VL 224/SME VL 16 ZA
8471 22:59:41.263160 # ok 307 sched_yield() SVE VL 208
8472 22:59:41.263358 # ok 308 sched_yield() SVE VL 208/SME VL 256 SM+ZA
8473 22:59:41.263528 # ok 309 sched_yield() SVE VL 208/SME VL 256 SM
8474 22:59:41.263662 # ok 310 sched_yield() SVE VL 208/SME VL 256 ZA
8475 22:59:41.263816 # ok 311 sched_yield() SVE VL 208/SME VL 128 SM+ZA
8476 22:59:41.263946 # ok 312 sched_yield() SVE VL 208/SME VL 128 SM
8477 22:59:41.264072 # ok 313 sched_yield() SVE VL 208/SME VL 128 ZA
8478 22:59:41.264195 # ok 314 sched_yield() SVE VL 208/SME VL 64 SM+ZA
8479 22:59:41.264349 # ok 315 sched_yield() SVE VL 208/SME VL 64 SM
8480 22:59:41.264478 # ok 316 sched_yield() SVE VL 208/SME VL 64 ZA
8481 22:59:41.264597 # ok 317 sched_yield() SVE VL 208/SME VL 32 SM+ZA
8482 22:59:41.264718 # ok 318 sched_yield() SVE VL 208/SME VL 32 SM
8483 22:59:41.264866 # ok 319 sched_yield() SVE VL 208/SME VL 32 ZA
8484 22:59:41.264992 # ok 320 sched_yield() SVE VL 208/SME VL 16 SM+ZA
8485 22:59:41.265115 # ok 321 sched_yield() SVE VL 208/SME VL 16 SM
8486 22:59:41.265236 # ok 322 sched_yield() SVE VL 208/SME VL 16 ZA
8487 22:59:41.265357 # ok 323 sched_yield() SVE VL 192
8488 22:59:41.265506 # ok 324 sched_yield() SVE VL 192/SME VL 256 SM+ZA
8489 22:59:41.265627 # ok 325 sched_yield() SVE VL 192/SME VL 256 SM
8490 22:59:41.265804 # ok 326 sched_yield() SVE VL 192/SME VL 256 ZA
8491 22:59:41.265944 # ok 327 sched_yield() SVE VL 192/SME VL 128 SM+ZA
8492 22:59:41.266060 # ok 328 sched_yield() SVE VL 192/SME VL 128 SM
8493 22:59:41.266176 # ok 329 sched_yield() SVE VL 192/SME VL 128 ZA
8494 22:59:41.266289 # ok 330 sched_yield() SVE VL 192/SME VL 64 SM+ZA
8495 22:59:41.266405 # ok 331 sched_yield() SVE VL 192/SME VL 64 SM
8496 22:59:41.266545 # ok 332 sched_yield() SVE VL 192/SME VL 64 ZA
8497 22:59:41.272142 # ok 333 sched_yield() SVE VL 192/SME VL 32 SM+ZA
8498 22:59:41.272354 # ok 334 sched_yield() SVE VL 192/SME VL 32 SM
8499 22:59:41.272740 # ok 335 sched_yield() SVE VL 192/SME VL 32 ZA
8500 22:59:41.272881 # ok 336 sched_yield() SVE VL 192/SME VL 16 SM+ZA
8501 22:59:41.273071 # ok 337 sched_yield() SVE VL 192/SME VL 16 SM
8502 22:59:41.273250 # ok 338 sched_yield() SVE VL 192/SME VL 16 ZA
8503 22:59:41.273376 # ok 339 sched_yield() SVE VL 176
8504 22:59:41.273493 # ok 340 sched_yield() SVE VL 176/SME VL 256 SM+ZA
8505 22:59:41.273641 # ok 341 sched_yield() SVE VL 176/SME VL 256 SM
8506 22:59:41.273781 # ok 342 sched_yield() SVE VL 176/SME VL 256 ZA
8507 22:59:41.273899 # ok 343 sched_yield() SVE VL 176/SME VL 128 SM+ZA
8508 22:59:41.274016 # ok 344 sched_yield() SVE VL 176/SME VL 128 SM
8509 22:59:41.274133 # ok 345 sched_yield() SVE VL 176/SME VL 128 ZA
8510 22:59:41.274250 # ok 346 sched_yield() SVE VL 176/SME VL 64 SM+ZA
8511 22:59:41.274373 # ok 347 sched_yield() SVE VL 176/SME VL 64 SM
8512 22:59:41.274538 # ok 348 sched_yield() SVE VL 176/SME VL 64 ZA
8513 22:59:41.274662 # ok 349 sched_yield() SVE VL 176/SME VL 32 SM+ZA
8514 22:59:41.274780 # ok 350 sched_yield() SVE VL 176/SME VL 32 SM
8515 22:59:41.274896 # ok 351 sched_yield() SVE VL 176/SME VL 32 ZA
8516 22:59:41.275044 # ok 352 sched_yield() SVE VL 176/SME VL 16 SM+ZA
8517 22:59:41.275168 # ok 353 sched_yield() SVE VL 176/SME VL 16 SM
8518 22:59:41.275286 # ok 354 sched_yield() SVE VL 176/SME VL 16 ZA
8519 22:59:41.275404 # ok 355 sched_yield() SVE VL 160
8520 22:59:41.275527 # ok 356 sched_yield() SVE VL 160/SME VL 256 SM+ZA
8521 22:59:41.275700 # ok 357 sched_yield() SVE VL 160/SME VL 256 SM
8522 22:59:41.275846 # ok 358 sched_yield() SVE VL 160/SME VL 256 ZA
8523 22:59:41.275988 # ok 359 sched_yield() SVE VL 160/SME VL 128 SM+ZA
8524 22:59:41.276128 # ok 360 sched_yield() SVE VL 160/SME VL 128 SM
8525 22:59:41.276268 # ok 361 sched_yield() SVE VL 160/SME VL 128 ZA
8526 22:59:41.276407 # ok 362 sched_yield() SVE VL 160/SME VL 64 SM+ZA
8527 22:59:41.276547 # ok 363 sched_yield() SVE VL 160/SME VL 64 SM
8528 22:59:41.276685 # ok 364 sched_yield() SVE VL 160/SME VL 64 ZA
8529 22:59:41.276828 # ok 365 sched_yield() SVE VL 160/SME VL 32 SM+ZA
8530 22:59:41.276967 # ok 366 sched_yield() SVE VL 160/SME VL 32 SM
8531 22:59:41.277145 # ok 367 sched_yield() SVE VL 160/SME VL 32 ZA
8532 22:59:41.277281 # ok 368 sched_yield() SVE VL 160/SME VL 16 SM+ZA
8533 22:59:41.277423 # ok 369 sched_yield() SVE VL 160/SME VL 16 SM
8534 22:59:41.277567 # ok 370 sched_yield() SVE VL 160/SME VL 16 ZA
8535 22:59:41.277723 # ok 371 sched_yield() SVE VL 144
8536 22:59:41.277869 # ok 372 sched_yield() SVE VL 144/SME VL 256 SM+ZA
8537 22:59:41.278010 # ok 373 sched_yield() SVE VL 144/SME VL 256 SM
8538 22:59:41.284131 # ok 374 sched_yield() SVE VL 144/SME VL 256 ZA
8539 22:59:41.284308 # ok 375 sched_yield() SVE VL 144/SME VL 128 SM+ZA
8540 22:59:41.284482 # ok 376 sched_yield() SVE VL 144/SME VL 128 SM
8541 22:59:43.354095 # ok 377 sched_yield() SVE VL 144/SME VL 128 ZA
8542 22:59:43.354698 # ok 378 sched_yield() SVE VL 144/SME VL 64 SM+ZA
8543 22:59:43.354907 # ok 379 sched_yield() SVE VL 144/SME VL 64 SM
8544 22:59:43.355087 # ok 380 sched_yield() SVE VL 144/SME VL 64 ZA
8545 22:59:43.355269 # ok 381 sched_yield() SVE VL 144/SME VL 32 SM+ZA
8546 22:59:43.355437 # ok 382 sched_yield() SVE VL 144/SME VL 32 SM
8547 22:59:43.355876 # ok 383 sched_yield() SVE VL 144/SME VL 32 ZA
8548 22:59:43.356073 # ok 384 sched_yield() SVE VL 144/SME VL 16 SM+ZA
8549 22:59:43.356235 # ok 385 sched_yield() SVE VL 144/SME VL 16 SM
8550 22:59:43.356390 # ok 386 sched_yield() SVE VL 144/SME VL 16 ZA
8551 22:59:43.356546 # ok 387 sched_yield() SVE VL 128
8552 22:59:43.356701 # ok 388 sched_yield() SVE VL 128/SME VL 256 SM+ZA
8553 22:59:43.356856 # ok 389 sched_yield() SVE VL 128/SME VL 256 SM
8554 22:59:43.357009 # ok 390 sched_yield() SVE VL 128/SME VL 256 ZA
8555 22:59:43.357163 # ok 391 sched_yield() SVE VL 128/SME VL 128 SM+ZA
8556 22:59:43.364043 # ok 392 sched_yield() SVE VL 128/SME VL 128 SM
8557 22:59:43.364600 # ok 393 sched_yield() SVE VL 128/SME VL 128 ZA
8558 22:59:43.364798 # ok 394 sched_yield() SVE VL 128/SME VL 64 SM+ZA
8559 22:59:43.364977 # ok 395 sched_yield() SVE VL 128/SME VL 64 SM
8560 22:59:43.365136 # ok 396 sched_yield() SVE VL 128/SME VL 64 ZA
8561 22:59:43.365327 # ok 397 sched_yield() SVE VL 128/SME VL 32 SM+ZA
8562 22:59:43.365472 # ok 398 sched_yield() SVE VL 128/SME VL 32 SM
8563 22:59:43.365633 # ok 399 sched_yield() SVE VL 128/SME VL 32 ZA
8564 22:59:43.365818 # ok 400 sched_yield() SVE VL 128/SME VL 16 SM+ZA
8565 22:59:43.365983 # ok 401 sched_yield() SVE VL 128/SME VL 16 SM
8566 22:59:43.366115 # ok 402 sched_yield() SVE VL 128/SME VL 16 ZA
8567 22:59:43.366268 # ok 403 sched_yield() SVE VL 112
8568 22:59:43.366398 # ok 404 sched_yield() SVE VL 112/SME VL 256 SM+ZA
8569 22:59:43.366521 # ok 405 sched_yield() SVE VL 112/SME VL 256 SM
8570 22:59:43.366645 # ok 406 sched_yield() SVE VL 112/SME VL 256 ZA
8571 22:59:43.366772 # ok 407 sched_yield() SVE VL 112/SME VL 128 SM+ZA
8572 22:59:43.366897 # ok 408 sched_yield() SVE VL 112/SME VL 128 SM
8573 22:59:43.367020 # ok 409 sched_yield() SVE VL 112/SME VL 128 ZA
8574 22:59:43.367171 # ok 410 sched_yield() SVE VL 112/SME VL 64 SM+ZA
8575 22:59:43.367313 # ok 411 sched_yield() SVE VL 112/SME VL 64 SM
8576 22:59:43.367497 # ok 412 sched_yield() SVE VL 112/SME VL 64 ZA
8577 22:59:43.367655 # ok 413 sched_yield() SVE VL 112/SME VL 32 SM+ZA
8578 22:59:43.367826 # ok 414 sched_yield() SVE VL 112/SME VL 32 SM
8579 22:59:43.367991 # ok 415 sched_yield() SVE VL 112/SME VL 32 ZA
8580 22:59:43.368174 # ok 416 sched_yield() SVE VL 112/SME VL 16 SM+ZA
8581 22:59:43.368352 # ok 417 sched_yield() SVE VL 112/SME VL 16 SM
8582 22:59:43.368477 # ok 418 sched_yield() SVE VL 112/SME VL 16 ZA
8583 22:59:43.368614 # ok 419 sched_yield() SVE VL 96
8584 22:59:43.368786 # ok 420 sched_yield() SVE VL 96/SME VL 256 SM+ZA
8585 22:59:43.368907 # ok 421 sched_yield() SVE VL 96/SME VL 256 SM
8586 22:59:43.369023 # ok 422 sched_yield() SVE VL 96/SME VL 256 ZA
8587 22:59:43.369137 # ok 423 sched_yield() SVE VL 96/SME VL 128 SM+ZA
8588 22:59:43.369277 # ok 424 sched_yield() SVE VL 96/SME VL 128 SM
8589 22:59:43.369442 # ok 425 sched_yield() SVE VL 96/SME VL 128 ZA
8590 22:59:43.369593 # ok 426 sched_yield() SVE VL 96/SME VL 64 SM+ZA
8591 22:59:43.369765 # ok 427 sched_yield() SVE VL 96/SME VL 64 SM
8592 22:59:43.369986 # ok 428 sched_yield() SVE VL 96/SME VL 64 ZA
8593 22:59:43.370130 # ok 429 sched_yield() SVE VL 96/SME VL 32 SM+ZA
8594 22:59:43.370249 # ok 430 sched_yield() SVE VL 96/SME VL 32 SM
8595 22:59:43.370363 # ok 431 sched_yield() SVE VL 96/SME VL 32 ZA
8596 22:59:43.370484 # ok 432 sched_yield() SVE VL 96/SME VL 16 SM+ZA
8597 22:59:43.370896 # ok 433 sched_yield() SVE VL 96/SME VL 16 SM
8598 22:59:43.371084 # ok 434 sched_yield() SVE VL 96/SME VL 16 ZA
8599 22:59:43.371269 # ok 435 sched_yield() SVE VL 80
8600 22:59:43.371441 # ok 436 sched_yield() SVE VL 80/SME VL 256 SM+ZA
8601 22:59:43.371571 # ok 437 sched_yield() SVE VL 80/SME VL 256 SM
8602 22:59:43.371704 # ok 438 sched_yield() SVE VL 80/SME VL 256 ZA
8603 22:59:43.371822 # ok 439 sched_yield() SVE VL 80/SME VL 128 SM+ZA
8604 22:59:43.371936 # ok 440 sched_yield() SVE VL 80/SME VL 128 SM
8605 22:59:43.372051 # ok 441 sched_yield() SVE VL 80/SME VL 128 ZA
8606 22:59:43.372193 # ok 442 sched_yield() SVE VL 80/SME VL 64 SM+ZA
8607 22:59:43.372315 # ok 443 sched_yield() SVE VL 80/SME VL 64 SM
8608 22:59:43.372431 # ok 444 sched_yield() SVE VL 80/SME VL 64 ZA
8609 22:59:43.372547 # ok 445 sched_yield() SVE VL 80/SME VL 32 SM+ZA
8610 22:59:43.372663 # ok 446 sched_yield() SVE VL 80/SME VL 32 SM
8611 22:59:43.372782 # ok 447 sched_yield() SVE VL 80/SME VL 32 ZA
8612 22:59:43.376256 # ok 448 sched_yield() SVE VL 80/SME VL 16 SM+ZA
8613 22:59:43.376617 # ok 449 sched_yield() SVE VL 80/SME VL 16 SM
8614 22:59:43.376758 # ok 450 sched_yield() SVE VL 80/SME VL 16 ZA
8615 22:59:43.376893 # ok 451 sched_yield() SVE VL 64
8616 22:59:43.377072 # ok 452 sched_yield() SVE VL 64/SME VL 256 SM+ZA
8617 22:59:43.377240 # ok 453 sched_yield() SVE VL 64/SME VL 256 SM
8618 22:59:43.377431 # ok 454 sched_yield() SVE VL 64/SME VL 256 ZA
8619 22:59:43.377568 # ok 455 sched_yield() SVE VL 64/SME VL 128 SM+ZA
8620 22:59:43.377699 # ok 456 sched_yield() SVE VL 64/SME VL 128 SM
8621 22:59:43.377818 # ok 457 sched_yield() SVE VL 64/SME VL 128 ZA
8622 22:59:43.377933 # ok 458 sched_yield() SVE VL 64/SME VL 64 SM+ZA
8623 22:59:43.378047 # ok 459 sched_yield() SVE VL 64/SME VL 64 SM
8624 22:59:43.378162 # ok 460 sched_yield() SVE VL 64/SME VL 64 ZA
8625 22:59:43.378277 # ok 461 sched_yield() SVE VL 64/SME VL 32 SM+ZA
8626 22:59:43.378439 # ok 462 sched_yield() SVE VL 64/SME VL 32 SM
8627 22:59:43.378583 # ok 463 sched_yield() SVE VL 64/SME VL 32 ZA
8628 22:59:44.035579 # ok 464 sched_yield() SVE VL 64/SME VL 16 SM+ZA
8629 22:59:44.035869 # ok 465 sched_yield() SVE VL 64/SME VL 16 SM
8630 22:59:44.036004 # ok 466 sched_yield() SVE VL 64/SME VL 16 ZA
8631 22:59:44.036123 # ok 467 sched_yield() SVE VL 48
8632 22:59:44.036457 # ok 468 sched_yield() SVE VL 48/SME VL 256 SM+ZA
8633 22:59:44.037223 # ok 469 sched_yield() SVE VL 48/SME VL 256 SM
8634 22:59:44.037526 # ok 470 sched_yield() SVE VL 48/SME VL 256 ZA
8635 22:59:44.037624 # ok 471 sched_yield() SVE VL 48/SME VL 128 SM+ZA
8636 22:59:44.037717 # ok 472 sched_yield() SVE VL 48/SME VL 128 SM
8637 22:59:44.037818 # ok 473 sched_yield() SVE VL 48/SME VL 128 ZA
8638 22:59:44.037908 # ok 474 sched_yield() SVE VL 48/SME VL 64 SM+ZA
8639 22:59:44.038010 # ok 475 sched_yield() SVE VL 48/SME VL 64 SM
8640 22:59:44.038096 # ok 476 sched_yield() SVE VL 48/SME VL 64 ZA
8641 22:59:44.038195 # ok 477 sched_yield() SVE VL 48/SME VL 32 SM+ZA
8642 22:59:44.038282 # ok 478 sched_yield() SVE VL 48/SME VL 32 SM
8643 22:59:44.038402 # ok 479 sched_yield() SVE VL 48/SME VL 32 ZA
8644 22:59:44.038505 # ok 480 sched_yield() SVE VL 48/SME VL 16 SM+ZA
8645 22:59:44.038834 # ok 481 sched_yield() SVE VL 48/SME VL 16 SM
8646 22:59:44.039044 # ok 482 sched_yield() SVE VL 48/SME VL 16 ZA
8647 22:59:44.039240 # ok 483 sched_yield() SVE VL 32
8648 22:59:44.039379 # ok 484 sched_yield() SVE VL 32/SME VL 256 SM+ZA
8649 22:59:44.039538 # ok 485 sched_yield() SVE VL 32/SME VL 256 SM
8650 22:59:44.039690 # ok 486 sched_yield() SVE VL 32/SME VL 256 ZA
8651 22:59:44.039838 # ok 487 sched_yield() SVE VL 32/SME VL 128 SM+ZA
8652 22:59:44.039964 # ok 488 sched_yield() SVE VL 32/SME VL 128 SM
8653 22:59:44.040083 # ok 489 sched_yield() SVE VL 32/SME VL 128 ZA
8654 22:59:44.046178 # ok 490 sched_yield() SVE VL 32/SME VL 64 SM+ZA
8655 22:59:44.046382 # ok 491 sched_yield() SVE VL 32/SME VL 64 SM
8656 22:59:44.046606 # ok 492 sched_yield() SVE VL 32/SME VL 64 ZA
8657 22:59:44.046770 # ok 493 sched_yield() SVE VL 32/SME VL 32 SM+ZA
8658 22:59:44.046918 # ok 494 sched_yield() SVE VL 32/SME VL 32 SM
8659 22:59:44.047109 # ok 495 sched_yield() SVE VL 32/SME VL 32 ZA
8660 22:59:44.047351 # ok 496 sched_yield() SVE VL 32/SME VL 16 SM+ZA
8661 22:59:44.047549 # ok 497 sched_yield() SVE VL 32/SME VL 16 SM
8662 22:59:44.047699 # ok 498 sched_yield() SVE VL 32/SME VL 16 ZA
8663 22:59:44.047819 # ok 499 sched_yield() SVE VL 16
8664 22:59:44.047953 # ok 500 sched_yield() SVE VL 16/SME VL 256 SM+ZA
8665 22:59:44.048106 # ok 501 sched_yield() SVE VL 16/SME VL 256 SM
8666 22:59:44.048278 # ok 502 sched_yield() SVE VL 16/SME VL 256 ZA
8667 22:59:44.048460 # ok 503 sched_yield() SVE VL 16/SME VL 128 SM+ZA
8668 22:59:44.048610 # ok 504 sched_yield() SVE VL 16/SME VL 128 SM
8669 22:59:44.048776 # ok 505 sched_yield() SVE VL 16/SME VL 128 ZA
8670 22:59:44.048907 # ok 506 sched_yield() SVE VL 16/SME VL 64 SM+ZA
8671 22:59:44.049031 # ok 507 sched_yield() SVE VL 16/SME VL 64 SM
8672 22:59:44.049148 # ok 508 sched_yield() SVE VL 16/SME VL 64 ZA
8673 22:59:44.049310 # ok 509 sched_yield() SVE VL 16/SME VL 32 SM+ZA
8674 22:59:44.049434 # ok 510 sched_yield() SVE VL 16/SME VL 32 SM
8675 22:59:44.049552 # ok 511 sched_yield() SVE VL 16/SME VL 32 ZA
8676 22:59:44.049682 # ok 512 sched_yield() SVE VL 16/SME VL 16 SM+ZA
8677 22:59:44.049799 # ok 513 sched_yield() SVE VL 16/SME VL 16 SM
8678 22:59:44.049912 # ok 514 sched_yield() SVE VL 16/SME VL 16 ZA
8679 22:59:44.050027 # # Totals: pass:514 fail:0 xfail:0 xpass:0 skip:0 error:0
8680 22:59:44.050140 ok 47 selftests: arm64: syscall-abi
8681 22:59:44.094541 # selftests: arm64: tpidr2
8682 22:59:44.243186 # TAP version 13
8683 22:59:44.243455 # 1..5
8684 22:59:44.243583 # # PID: 3943
8685 22:59:44.243698 # ok 1 default_value
8686 22:59:44.243810 # ok 2 write_read
8687 22:59:44.243921 # ok 3 write_sleep_read
8688 22:59:44.244031 # ok 4 write_fork_read
8689 22:59:44.244356 # ok 5 write_clone_read
8690 22:59:44.244478 # # Totals: pass:5 fail:0 xfail:0 xpass:0 skip:0 error:0
8691 22:59:44.260903 ok 48 selftests: arm64: tpidr2
8692 22:59:44.746125 arm64_tags_test pass
8693 22:59:44.746435 arm64_run_tags_test_sh pass
8694 22:59:44.746614 arm64_fake_sigreturn_bad_magic pass
8695 22:59:44.746788 arm64_fake_sigreturn_bad_size pass
8696 22:59:44.746993 arm64_fake_sigreturn_bad_size_for_magic0 pass
8697 22:59:44.747167 arm64_fake_sigreturn_duplicated_fpsimd pass
8698 22:59:44.747315 arm64_fake_sigreturn_misaligned_sp pass
8699 22:59:44.747702 arm64_fake_sigreturn_missing_fpsimd pass
8700 22:59:44.747880 arm64_fake_sigreturn_sme_change_vl pass
8701 22:59:44.748055 arm64_fake_sigreturn_sve_change_vl pass
8702 22:59:44.748200 arm64_mangle_pstate_invalid_compat_toggle pass
8703 22:59:44.748382 arm64_mangle_pstate_invalid_daif_bits pass
8704 22:59:44.748552 arm64_mangle_pstate_invalid_mode_el1h pass
8705 22:59:44.748695 arm64_mangle_pstate_invalid_mode_el1t pass
8706 22:59:44.748859 arm64_mangle_pstate_invalid_mode_el2h pass
8707 22:59:44.749062 arm64_mangle_pstate_invalid_mode_el2t pass
8708 22:59:44.749222 arm64_mangle_pstate_invalid_mode_el3h pass
8709 22:59:44.749359 arm64_mangle_pstate_invalid_mode_el3t pass
8710 22:59:44.749506 arm64_sme_trap_no_sm pass
8711 22:59:44.749644 arm64_sme_trap_non_streaming skip
8712 22:59:44.749814 arm64_sme_trap_za pass
8713 22:59:44.750015 arm64_sme_vl pass
8714 22:59:44.750216 arm64_ssve_regs pass
8715 22:59:44.750406 arm64_sve_regs pass
8716 22:59:44.750619 arm64_sve_vl pass
8717 22:59:44.750832 arm64_za_no_regs pass
8718 22:59:44.750993 arm64_za_regs pass
8719 22:59:44.751175 arm64_pac_global_corrupt_pac pass
8720 22:59:44.751364 arm64_pac_global_pac_instructions_not_nop pass
8721 22:59:44.751520 arm64_pac_global_pac_instructions_not_nop_generic pass
8722 22:59:44.751669 arm64_pac_global_single_thread_different_keys pass
8723 22:59:44.751788 arm64_pac_global_exec_changed_keys pass
8724 22:59:44.751901 arm64_pac_global_context_switch_keep_keys pass
8725 22:59:44.752014 arm64_pac_global_context_switch_keep_keys_generic pass
8726 22:59:44.752126 arm64_pac pass
8727 22:59:44.752239 arm64_fp-stress_FPSIMD-0-0 pass
8728 22:59:44.752352 arm64_fp-stress_SVE-VL-256-0 pass
8729 22:59:44.752467 arm64_fp-stress_SVE-VL-240-0 pass
8730 22:59:44.752579 arm64_fp-stress_SVE-VL-224-0 pass
8731 22:59:44.752691 arm64_fp-stress_SVE-VL-208-0 pass
8732 22:59:44.752805 arm64_fp-stress_SVE-VL-192-0 pass
8733 22:59:44.752915 arm64_fp-stress_SVE-VL-176-0 pass
8734 22:59:44.753028 arm64_fp-stress_SVE-VL-160-0 pass
8735 22:59:44.753139 arm64_fp-stress_SVE-VL-144-0 pass
8736 22:59:44.753252 arm64_fp-stress_SVE-VL-128-0 pass
8737 22:59:44.753364 arm64_fp-stress_SVE-VL-112-0 pass
8738 22:59:44.753476 arm64_fp-stress_SVE-VL-96-0 pass
8739 22:59:44.753588 arm64_fp-stress_SVE-VL-80-0 pass
8740 22:59:44.753717 arm64_fp-stress_SVE-VL-64-0 pass
8741 22:59:44.753831 arm64_fp-stress_SVE-VL-48-0 pass
8742 22:59:44.753943 arm64_fp-stress_SVE-VL-32-0 pass
8743 22:59:44.754057 arm64_fp-stress_SVE-VL-16-0 pass
8744 22:59:44.754169 arm64_fp-stress_SSVE-VL-256-0 pass
8745 22:59:44.754285 arm64_fp-stress_ZA-VL-256-0 pass
8746 22:59:44.754424 arm64_fp-stress_SSVE-VL-128-0 pass
8747 22:59:44.754576 arm64_fp-stress_ZA-VL-128-0 pass
8748 22:59:44.754694 arm64_fp-stress_SSVE-VL-64-0 pass
8749 22:59:44.754811 arm64_fp-stress_ZA-VL-64-0 pass
8750 22:59:44.754926 arm64_fp-stress_SSVE-VL-32-0 pass
8751 22:59:44.755042 arm64_fp-stress_ZA-VL-32-0 pass
8752 22:59:44.755159 arm64_fp-stress_SSVE-VL-16-0 pass
8753 22:59:44.755504 arm64_fp-stress_ZA-VL-16-0 pass
8754 22:59:44.755635 arm64_fp-stress pass
8755 22:59:44.755787 arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 pass
8756 22:59:44.755941 arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state pass
8757 22:59:44.756095 arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set pass
8758 22:59:44.756282 arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared pass
8759 22:59:44.756450 arm64_sve-ptrace_Set_SVE_VL_16 pass
8760 22:59:44.756675 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 pass
8761 22:59:44.756836 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 pass
8762 22:59:44.756981 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 pass
8763 22:59:44.757141 arm64_sve-ptrace_Set_SVE_VL_32 pass
8764 22:59:44.757315 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 pass
8765 22:59:44.757461 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 pass
8766 22:59:44.757602 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 pass
8767 22:59:44.757795 arm64_sve-ptrace_Set_SVE_VL_48 pass
8768 22:59:44.757931 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 pass
8769 22:59:44.758127 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 pass
8770 22:59:44.758289 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 pass
8771 22:59:44.758474 arm64_sve-ptrace_Set_SVE_VL_64 pass
8772 22:59:44.758651 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 pass
8773 22:59:44.758801 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 pass
8774 22:59:44.758966 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 pass
8775 22:59:44.759139 arm64_sve-ptrace_Set_SVE_VL_80 pass
8776 22:59:44.759353 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 pass
8777 22:59:44.759615 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 pass
8778 22:59:44.759775 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 pass
8779 22:59:44.759921 arm64_sve-ptrace_Set_SVE_VL_96 pass
8780 22:59:44.760064 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 pass
8781 22:59:44.760207 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 pass
8782 22:59:44.760352 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 pass
8783 22:59:44.760498 arm64_sve-ptrace_Set_SVE_VL_112 pass
8784 22:59:44.760640 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 pass
8785 22:59:44.760781 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 pass
8786 22:59:44.760924 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 pass
8787 22:59:44.761066 arm64_sve-ptrace_Set_SVE_VL_128 pass
8788 22:59:44.761207 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 pass
8789 22:59:44.761349 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 pass
8790 22:59:44.761711 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 pass
8791 22:59:44.761853 arm64_sve-ptrace_Set_SVE_VL_144 pass
8792 22:59:44.761998 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 pass
8793 22:59:44.762142 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 pass
8794 22:59:44.764035 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 pass
8795 22:59:44.764224 arm64_sve-ptrace_Set_SVE_VL_160 pass
8796 22:59:44.764468 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 pass
8797 22:59:44.764646 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 pass
8798 22:59:44.764824 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 pass
8799 22:59:44.764969 arm64_sve-ptrace_Set_SVE_VL_176 pass
8800 22:59:44.765153 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 pass
8801 22:59:44.765301 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 pass
8802 22:59:44.765448 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 pass
8803 22:59:44.765584 arm64_sve-ptrace_Set_SVE_VL_192 pass
8804 22:59:44.765757 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 pass
8805 22:59:44.765938 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 pass
8806 22:59:44.766099 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 pass
8807 22:59:44.766258 arm64_sve-ptrace_Set_SVE_VL_208 pass
8808 22:59:44.766416 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 pass
8809 22:59:44.766574 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 pass
8810 22:59:44.766727 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 pass
8811 22:59:44.766904 arm64_sve-ptrace_Set_SVE_VL_224 pass
8812 22:59:44.767112 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 pass
8813 22:59:44.767260 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 pass
8814 22:59:44.767387 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 pass
8815 22:59:44.767555 arm64_sve-ptrace_Set_SVE_VL_240 pass
8816 22:59:44.767728 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 pass
8817 22:59:44.767852 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 pass
8818 22:59:44.767968 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 pass
8819 22:59:44.768082 arm64_sve-ptrace_Set_SVE_VL_256 pass
8820 22:59:44.768196 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 pass
8821 22:59:44.768339 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 pass
8822 22:59:44.768463 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 pass
8823 22:59:44.768580 arm64_sve-ptrace_Set_SVE_VL_272 pass
8824 22:59:44.768694 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 skip
8825 22:59:44.768809 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 skip
8826 22:59:44.772066 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 skip
8827 22:59:44.772365 arm64_sve-ptrace_Set_SVE_VL_288 pass
8828 22:59:44.772544 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 skip
8829 22:59:44.772740 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 skip
8830 22:59:44.772911 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 skip
8831 22:59:44.773076 arm64_sve-ptrace_Set_SVE_VL_304 pass
8832 22:59:44.773242 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 skip
8833 22:59:44.773406 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 skip
8834 22:59:44.773562 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 skip
8835 22:59:44.773718 arm64_sve-ptrace_Set_SVE_VL_320 pass
8836 22:59:44.773897 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 skip
8837 22:59:44.774056 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 skip
8838 22:59:44.774212 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 skip
8839 22:59:44.774370 arm64_sve-ptrace_Set_SVE_VL_336 pass
8840 22:59:44.774579 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 skip
8841 22:59:44.774784 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 skip
8842 22:59:44.774976 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 skip
8843 22:59:44.775182 arm64_sve-ptrace_Set_SVE_VL_352 pass
8844 22:59:44.775345 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 skip
8845 22:59:44.775580 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 skip
8846 22:59:44.775719 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 skip
8847 22:59:44.775864 arm64_sve-ptrace_Set_SVE_VL_368 pass
8848 22:59:44.776010 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 skip
8849 22:59:44.776153 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 skip
8850 22:59:44.776295 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 skip
8851 22:59:44.776440 arm64_sve-ptrace_Set_SVE_VL_384 pass
8852 22:59:44.776582 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 skip
8853 22:59:44.776724 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 skip
8854 22:59:44.776867 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 skip
8855 22:59:44.777009 arm64_sve-ptrace_Set_SVE_VL_400 pass
8856 22:59:44.777150 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 skip
8857 22:59:44.777291 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 skip
8858 22:59:44.777434 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 skip
8859 22:59:44.777575 arm64_sve-ptrace_Set_SVE_VL_416 pass
8860 22:59:44.779793 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 skip
8861 22:59:44.780215 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 skip
8862 22:59:44.780362 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 skip
8863 22:59:44.780529 arm64_sve-ptrace_Set_SVE_VL_432 pass
8864 22:59:44.780713 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 skip
8865 22:59:44.780937 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 skip
8866 22:59:44.781079 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 skip
8867 22:59:44.781225 arm64_sve-ptrace_Set_SVE_VL_448 pass
8868 22:59:44.781367 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 skip
8869 22:59:44.781511 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 skip
8870 22:59:44.796318 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 skip
8871 22:59:44.796742 arm64_sve-ptrace_Set_SVE_VL_464 pass
8872 22:59:44.796921 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 skip
8873 22:59:44.797080 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 skip
8874 22:59:44.797258 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 skip
8875 22:59:44.797414 arm64_sve-ptrace_Set_SVE_VL_480 pass
8876 22:59:44.797542 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 skip
8877 22:59:44.797675 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 skip
8878 22:59:44.797846 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 skip
8879 22:59:44.797985 arm64_sve-ptrace_Set_SVE_VL_496 pass
8880 22:59:44.798130 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 skip
8881 22:59:44.798253 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 skip
8882 22:59:44.798371 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 skip
8883 22:59:44.798488 arm64_sve-ptrace_Set_SVE_VL_512 pass
8884 22:59:44.798603 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 skip
8885 22:59:44.798745 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 skip
8886 22:59:44.798867 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 skip
8887 22:59:44.798985 arm64_sve-ptrace_Set_SVE_VL_528 pass
8888 22:59:44.799102 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 skip
8889 22:59:44.799218 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 skip
8890 22:59:44.799357 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 skip
8891 22:59:44.799478 arm64_sve-ptrace_Set_SVE_VL_544 pass
8892 22:59:44.799594 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 skip
8893 22:59:44.799710 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 skip
8894 22:59:44.799848 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 skip
8895 22:59:44.799971 arm64_sve-ptrace_Set_SVE_VL_560 pass
8896 22:59:44.800087 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 skip
8897 22:59:44.803817 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 skip
8898 22:59:44.804182 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 skip
8899 22:59:44.804311 arm64_sve-ptrace_Set_SVE_VL_576 pass
8900 22:59:44.804431 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 skip
8901 22:59:44.804573 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 skip
8902 22:59:44.804721 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 skip
8903 22:59:44.804898 arm64_sve-ptrace_Set_SVE_VL_592 pass
8904 22:59:44.805143 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 skip
8905 22:59:44.805346 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 skip
8906 22:59:44.805532 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 skip
8907 22:59:44.805826 arm64_sve-ptrace_Set_SVE_VL_608 pass
8908 22:59:44.806001 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 skip
8909 22:59:44.806198 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 skip
8910 22:59:44.806344 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 skip
8911 22:59:44.806494 arm64_sve-ptrace_Set_SVE_VL_624 pass
8912 22:59:44.806654 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 skip
8913 22:59:44.806821 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 skip
8914 22:59:44.807018 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 skip
8915 22:59:44.807206 arm64_sve-ptrace_Set_SVE_VL_640 pass
8916 22:59:44.807377 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 skip
8917 22:59:44.807556 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 skip
8918 22:59:44.807773 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 skip
8919 22:59:44.807959 arm64_sve-ptrace_Set_SVE_VL_656 pass
8920 22:59:44.808138 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 skip
8921 22:59:44.808317 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 skip
8922 22:59:44.808491 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 skip
8923 22:59:44.808668 arm64_sve-ptrace_Set_SVE_VL_672 pass
8924 22:59:44.808842 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 skip
8925 22:59:44.809016 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 skip
8926 22:59:44.809184 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 skip
8927 22:59:44.809341 arm64_sve-ptrace_Set_SVE_VL_688 pass
8928 22:59:44.809491 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 skip
8929 22:59:44.809638 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 skip
8930 22:59:44.811810 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 skip
8931 22:59:44.812270 arm64_sve-ptrace_Set_SVE_VL_704 pass
8932 22:59:44.812461 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 skip
8933 22:59:44.812622 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 skip
8934 22:59:44.812768 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 skip
8935 22:59:44.812956 arm64_sve-ptrace_Set_SVE_VL_720 pass
8936 22:59:44.813127 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 skip
8937 22:59:44.813309 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 skip
8938 22:59:44.813509 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 skip
8939 22:59:44.813695 arm64_sve-ptrace_Set_SVE_VL_736 pass
8940 22:59:44.813870 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 skip
8941 22:59:44.814089 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 skip
8942 22:59:44.814290 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 skip
8943 22:59:44.814471 arm64_sve-ptrace_Set_SVE_VL_752 pass
8944 22:59:44.814635 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 skip
8945 22:59:44.814794 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 skip
8946 22:59:44.814917 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 skip
8947 22:59:44.815057 arm64_sve-ptrace_Set_SVE_VL_768 pass
8948 22:59:44.815191 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 skip
8949 22:59:44.815349 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 skip
8950 22:59:44.815498 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 skip
8951 22:59:44.815656 arm64_sve-ptrace_Set_SVE_VL_784 pass
8952 22:59:44.815787 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 skip
8953 22:59:44.815904 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 skip
8954 22:59:44.816018 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 skip
8955 22:59:44.816131 arm64_sve-ptrace_Set_SVE_VL_800 pass
8956 22:59:44.816245 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 skip
8957 22:59:44.816360 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 skip
8958 22:59:44.816476 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 skip
8959 22:59:44.816588 arm64_sve-ptrace_Set_SVE_VL_816 pass
8960 22:59:44.816701 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 skip
8961 22:59:44.816816 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 skip
8962 22:59:44.816929 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 skip
8963 22:59:44.817041 arm64_sve-ptrace_Set_SVE_VL_832 pass
8964 22:59:44.819857 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 skip
8965 22:59:44.820375 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 skip
8966 22:59:44.820574 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 skip
8967 22:59:44.820736 arm64_sve-ptrace_Set_SVE_VL_848 pass
8968 22:59:44.820887 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 skip
8969 22:59:44.821034 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 skip
8970 22:59:44.821188 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 skip
8971 22:59:44.821375 arm64_sve-ptrace_Set_SVE_VL_864 pass
8972 22:59:44.821542 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 skip
8973 22:59:44.821735 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 skip
8974 22:59:44.821940 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 skip
8975 22:59:44.822110 arm64_sve-ptrace_Set_SVE_VL_880 pass
8976 22:59:44.822269 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 skip
8977 22:59:44.822428 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 skip
8978 22:59:44.822585 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 skip
8979 22:59:44.822777 arm64_sve-ptrace_Set_SVE_VL_896 pass
8980 22:59:44.822940 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 skip
8981 22:59:44.823103 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 skip
8982 22:59:44.823264 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 skip
8983 22:59:44.823423 arm64_sve-ptrace_Set_SVE_VL_912 pass
8984 22:59:44.823609 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 skip
8985 22:59:44.823755 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 skip
8986 22:59:44.823871 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 skip
8987 22:59:44.823984 arm64_sve-ptrace_Set_SVE_VL_928 pass
8988 22:59:44.824097 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 skip
8989 22:59:44.824210 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 skip
8990 22:59:44.824352 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 skip
8991 22:59:44.824471 arm64_sve-ptrace_Set_SVE_VL_944 pass
8992 22:59:44.824586 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 skip
8993 22:59:44.824701 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 skip
8994 22:59:44.824816 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 skip
8995 22:59:44.824929 arm64_sve-ptrace_Set_SVE_VL_960 pass
8996 22:59:44.825042 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 skip
8997 22:59:44.827821 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 skip
8998 22:59:44.828228 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 skip
8999 22:59:44.828400 arm64_sve-ptrace_Set_SVE_VL_976 pass
9000 22:59:44.828589 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 skip
9001 22:59:44.828765 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 skip
9002 22:59:44.828961 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 skip
9003 22:59:44.829129 arm64_sve-ptrace_Set_SVE_VL_992 pass
9004 22:59:44.829290 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 skip
9005 22:59:44.829454 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 skip
9006 22:59:44.829665 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 skip
9007 22:59:44.829836 arm64_sve-ptrace_Set_SVE_VL_1008 pass
9008 22:59:44.830003 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 skip
9009 22:59:44.830170 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 skip
9010 22:59:44.830354 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 skip
9011 22:59:44.830509 arm64_sve-ptrace_Set_SVE_VL_1024 pass
9012 22:59:44.830690 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 skip
9013 22:59:44.830829 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 skip
9014 22:59:44.830995 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 skip
9015 22:59:44.831167 arm64_sve-ptrace_Set_SVE_VL_1040 pass
9016 22:59:44.831362 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 skip
9017 22:59:44.831546 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 skip
9018 22:59:44.831734 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 skip
9019 22:59:44.831906 arm64_sve-ptrace_Set_SVE_VL_1056 pass
9020 22:59:44.832089 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 skip
9021 22:59:44.832228 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 skip
9022 22:59:44.832372 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 skip
9023 22:59:44.832518 arm64_sve-ptrace_Set_SVE_VL_1072 pass
9024 22:59:44.832660 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 skip
9025 22:59:44.832801 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 skip
9026 22:59:44.832942 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 skip
9027 22:59:44.835998 arm64_sve-ptrace_Set_SVE_VL_1088 pass
9028 22:59:44.836193 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 skip
9029 22:59:44.836385 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 skip
9030 22:59:44.836557 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 skip
9031 22:59:44.836708 arm64_sve-ptrace_Set_SVE_VL_1104 pass
9032 22:59:44.847054 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 skip
9033 22:59:44.847369 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 skip
9034 22:59:44.847475 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 skip
9035 22:59:44.847569 arm64_sve-ptrace_Set_SVE_VL_1120 pass
9036 22:59:44.847677 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 skip
9037 22:59:44.847769 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 skip
9038 22:59:44.847873 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 skip
9039 22:59:44.847975 arm64_sve-ptrace_Set_SVE_VL_1136 pass
9040 22:59:44.848076 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 skip
9041 22:59:44.848164 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 skip
9042 22:59:44.848264 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 skip
9043 22:59:44.848365 arm64_sve-ptrace_Set_SVE_VL_1152 pass
9044 22:59:44.848467 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 skip
9045 22:59:44.848559 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 skip
9046 22:59:44.848660 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 skip
9047 22:59:44.848761 arm64_sve-ptrace_Set_SVE_VL_1168 pass
9048 22:59:44.848862 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 skip
9049 22:59:44.848965 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 skip
9050 22:59:44.849325 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 skip
9051 22:59:44.849531 arm64_sve-ptrace_Set_SVE_VL_1184 pass
9052 22:59:44.849791 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 skip
9053 22:59:44.849990 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 skip
9054 22:59:44.850156 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 skip
9055 22:59:44.850311 arm64_sve-ptrace_Set_SVE_VL_1200 pass
9056 22:59:44.850464 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 skip
9057 22:59:44.850656 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 skip
9058 22:59:44.850819 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 skip
9059 22:59:44.850978 arm64_sve-ptrace_Set_SVE_VL_1216 pass
9060 22:59:44.851141 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 skip
9061 22:59:44.851309 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 skip
9062 22:59:44.851469 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 skip
9063 22:59:44.851621 arm64_sve-ptrace_Set_SVE_VL_1232 pass
9064 22:59:44.851769 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 skip
9065 22:59:44.851889 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 skip
9066 22:59:44.852005 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 skip
9067 22:59:44.852120 arm64_sve-ptrace_Set_SVE_VL_1248 pass
9068 22:59:44.852233 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 skip
9069 22:59:44.852348 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 skip
9070 22:59:44.852464 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 skip
9071 22:59:44.852577 arm64_sve-ptrace_Set_SVE_VL_1264 pass
9072 22:59:44.855799 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 skip
9073 22:59:44.856222 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 skip
9074 22:59:44.856412 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 skip
9075 22:59:44.856584 arm64_sve-ptrace_Set_SVE_VL_1280 pass
9076 22:59:44.856748 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 skip
9077 22:59:44.856939 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 skip
9078 22:59:44.857102 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 skip
9079 22:59:44.857260 arm64_sve-ptrace_Set_SVE_VL_1296 pass
9080 22:59:44.857419 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 skip
9081 22:59:44.857576 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 skip
9082 22:59:44.857751 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 skip
9083 22:59:44.857947 arm64_sve-ptrace_Set_SVE_VL_1312 pass
9084 22:59:44.858112 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 skip
9085 22:59:44.858273 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 skip
9086 22:59:44.858434 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 skip
9087 22:59:44.858592 arm64_sve-ptrace_Set_SVE_VL_1328 pass
9088 22:59:44.858743 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 skip
9089 22:59:44.858894 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 skip
9090 22:59:44.859047 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 skip
9091 22:59:44.859233 arm64_sve-ptrace_Set_SVE_VL_1344 pass
9092 22:59:44.859389 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 skip
9093 22:59:44.859535 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 skip
9094 22:59:44.859684 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 skip
9095 22:59:44.859806 arm64_sve-ptrace_Set_SVE_VL_1360 pass
9096 22:59:44.859922 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 skip
9097 22:59:44.860036 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 skip
9098 22:59:44.860150 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 skip
9099 22:59:44.860263 arm64_sve-ptrace_Set_SVE_VL_1376 pass
9100 22:59:44.860379 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 skip
9101 22:59:44.860519 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 skip
9102 22:59:44.860641 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 skip
9103 22:59:44.860756 arm64_sve-ptrace_Set_SVE_VL_1392 pass
9104 22:59:44.863762 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 skip
9105 22:59:44.864204 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 skip
9106 22:59:44.864395 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 skip
9107 22:59:44.864547 arm64_sve-ptrace_Set_SVE_VL_1408 pass
9108 22:59:44.864729 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 skip
9109 22:59:44.864894 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 skip
9110 22:59:44.865060 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 skip
9111 22:59:44.865221 arm64_sve-ptrace_Set_SVE_VL_1424 pass
9112 22:59:44.865406 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 skip
9113 22:59:44.865556 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 skip
9114 22:59:44.865737 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 skip
9115 22:59:44.865904 arm64_sve-ptrace_Set_SVE_VL_1440 pass
9116 22:59:44.866112 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 skip
9117 22:59:44.866297 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 skip
9118 22:59:44.866495 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 skip
9119 22:59:44.866676 arm64_sve-ptrace_Set_SVE_VL_1456 pass
9120 22:59:44.866882 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 skip
9121 22:59:44.867089 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 skip
9122 22:59:44.867304 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 skip
9123 22:59:44.867506 arm64_sve-ptrace_Set_SVE_VL_1472 pass
9124 22:59:44.867667 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 skip
9125 22:59:44.867790 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 skip
9126 22:59:44.867939 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 skip
9127 22:59:44.868065 arm64_sve-ptrace_Set_SVE_VL_1488 pass
9128 22:59:44.868186 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 skip
9129 22:59:44.868305 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 skip
9130 22:59:44.868422 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 skip
9131 22:59:44.868540 arm64_sve-ptrace_Set_SVE_VL_1504 pass
9132 22:59:44.868658 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 skip
9133 22:59:44.868778 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 skip
9134 22:59:44.868895 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 skip
9135 22:59:44.869013 arm64_sve-ptrace_Set_SVE_VL_1520 pass
9136 22:59:44.871783 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 skip
9137 22:59:44.872092 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 skip
9138 22:59:44.872199 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 skip
9139 22:59:44.872292 arm64_sve-ptrace_Set_SVE_VL_1536 pass
9140 22:59:44.872398 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 skip
9141 22:59:44.872489 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 skip
9142 22:59:44.872593 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 skip
9143 22:59:44.872683 arm64_sve-ptrace_Set_SVE_VL_1552 pass
9144 22:59:44.872789 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 skip
9145 22:59:44.872877 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 skip
9146 22:59:44.872979 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 skip
9147 22:59:44.873067 arm64_sve-ptrace_Set_SVE_VL_1568 pass
9148 22:59:44.873168 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 skip
9149 22:59:44.873271 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 skip
9150 22:59:44.873373 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 skip
9151 22:59:44.873476 arm64_sve-ptrace_Set_SVE_VL_1584 pass
9152 22:59:44.873767 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 skip
9153 22:59:44.873891 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 skip
9154 22:59:44.874196 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 skip
9155 22:59:44.874301 arm64_sve-ptrace_Set_SVE_VL_1600 pass
9156 22:59:44.874407 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 skip
9157 22:59:44.874508 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 skip
9158 22:59:44.874594 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 skip
9159 22:59:44.874700 arm64_sve-ptrace_Set_SVE_VL_1616 pass
9160 22:59:44.874789 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 skip
9161 22:59:44.874891 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 skip
9162 22:59:44.874993 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 skip
9163 22:59:44.875080 arm64_sve-ptrace_Set_SVE_VL_1632 pass
9164 22:59:44.875180 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 skip
9165 22:59:44.875281 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 skip
9166 22:59:44.875383 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 skip
9167 22:59:44.875484 arm64_sve-ptrace_Set_SVE_VL_1648 pass
9168 22:59:44.879740 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 skip
9169 22:59:44.880074 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 skip
9170 22:59:44.880296 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 skip
9171 22:59:44.880456 arm64_sve-ptrace_Set_SVE_VL_1664 pass
9172 22:59:44.880616 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 skip
9173 22:59:44.880773 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 skip
9174 22:59:44.880944 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 skip
9175 22:59:44.881086 arm64_sve-ptrace_Set_SVE_VL_1680 pass
9176 22:59:44.881233 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 skip
9177 22:59:44.881390 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 skip
9178 22:59:44.881576 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 skip
9179 22:59:44.881757 arm64_sve-ptrace_Set_SVE_VL_1696 pass
9180 22:59:44.881924 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 skip
9181 22:59:44.882085 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 skip
9182 22:59:44.882249 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 skip
9183 22:59:44.882444 arm64_sve-ptrace_Set_SVE_VL_1712 pass
9184 22:59:44.882612 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 skip
9185 22:59:44.882749 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 skip
9186 22:59:44.882870 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 skip
9187 22:59:44.883009 arm64_sve-ptrace_Set_SVE_VL_1728 pass
9188 22:59:44.883134 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 skip
9189 22:59:44.883277 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 skip
9190 22:59:44.883399 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 skip
9191 22:59:44.883517 arm64_sve-ptrace_Set_SVE_VL_1744 pass
9192 22:59:44.899020 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 skip
9193 22:59:44.899430 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 skip
9194 22:59:44.899572 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 skip
9195 22:59:44.899678 arm64_sve-ptrace_Set_SVE_VL_1760 pass
9196 22:59:44.899809 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 skip
9197 22:59:44.899945 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 skip
9198 22:59:44.900070 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 skip
9199 22:59:44.900203 arm64_sve-ptrace_Set_SVE_VL_1776 pass
9200 22:59:44.900314 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 skip
9201 22:59:44.900457 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 skip
9202 22:59:44.900607 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 skip
9203 22:59:44.900731 arm64_sve-ptrace_Set_SVE_VL_1792 pass
9204 22:59:44.900851 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 skip
9205 22:59:44.900966 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 skip
9206 22:59:44.901101 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 skip
9207 22:59:44.901232 arm64_sve-ptrace_Set_SVE_VL_1808 pass
9208 22:59:44.901346 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 skip
9209 22:59:44.901494 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 skip
9210 22:59:44.901616 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 skip
9211 22:59:44.901777 arm64_sve-ptrace_Set_SVE_VL_1824 pass
9212 22:59:44.901924 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 skip
9213 22:59:44.902064 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 skip
9214 22:59:44.902216 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 skip
9215 22:59:44.902326 arm64_sve-ptrace_Set_SVE_VL_1840 pass
9216 22:59:44.902420 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 skip
9217 22:59:44.902576 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 skip
9218 22:59:44.902705 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 skip
9219 22:59:44.902821 arm64_sve-ptrace_Set_SVE_VL_1856 pass
9220 22:59:44.902951 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 skip
9221 22:59:44.903090 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 skip
9222 22:59:44.903249 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 skip
9223 22:59:44.903403 arm64_sve-ptrace_Set_SVE_VL_1872 pass
9224 22:59:44.903558 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 skip
9225 22:59:44.903673 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 skip
9226 22:59:44.903784 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 skip
9227 22:59:44.903877 arm64_sve-ptrace_Set_SVE_VL_1888 pass
9228 22:59:44.903966 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 skip
9229 22:59:44.904053 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 skip
9230 22:59:44.904374 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 skip
9231 22:59:44.904531 arm64_sve-ptrace_Set_SVE_VL_1904 pass
9232 22:59:44.907746 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 skip
9233 22:59:44.908076 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 skip
9234 22:59:44.908184 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 skip
9235 22:59:44.908287 arm64_sve-ptrace_Set_SVE_VL_1920 pass
9236 22:59:44.908420 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 skip
9237 22:59:44.908548 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 skip
9238 22:59:44.908708 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 skip
9239 22:59:44.908834 arm64_sve-ptrace_Set_SVE_VL_1936 pass
9240 22:59:44.909008 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 skip
9241 22:59:44.909139 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 skip
9242 22:59:44.909235 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 skip
9243 22:59:44.909345 arm64_sve-ptrace_Set_SVE_VL_1952 pass
9244 22:59:44.909469 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 skip
9245 22:59:44.909630 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 skip
9246 22:59:44.909784 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 skip
9247 22:59:44.909932 arm64_sve-ptrace_Set_SVE_VL_1968 pass
9248 22:59:44.910073 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 skip
9249 22:59:44.910216 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 skip
9250 22:59:44.910379 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 skip
9251 22:59:44.910532 arm64_sve-ptrace_Set_SVE_VL_1984 pass
9252 22:59:44.910642 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 skip
9253 22:59:44.910783 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 skip
9254 22:59:44.910883 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 skip
9255 22:59:44.911020 arm64_sve-ptrace_Set_SVE_VL_2000 pass
9256 22:59:44.911169 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 skip
9257 22:59:44.911300 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 skip
9258 22:59:44.911437 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 skip
9259 22:59:44.911585 arm64_sve-ptrace_Set_SVE_VL_2016 pass
9260 22:59:44.911699 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 skip
9261 22:59:44.911808 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 skip
9262 22:59:44.911900 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 skip
9263 22:59:44.911988 arm64_sve-ptrace_Set_SVE_VL_2032 pass
9264 22:59:44.915781 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 skip
9265 22:59:44.916206 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 skip
9266 22:59:44.916378 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 skip
9267 22:59:44.916504 arm64_sve-ptrace_Set_SVE_VL_2048 pass
9268 22:59:44.916646 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 skip
9269 22:59:44.916826 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 skip
9270 22:59:44.916994 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 skip
9271 22:59:44.917143 arm64_sve-ptrace_Set_SVE_VL_2064 pass
9272 22:59:44.917285 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 skip
9273 22:59:44.917502 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 skip
9274 22:59:44.917702 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 skip
9275 22:59:44.917881 arm64_sve-ptrace_Set_SVE_VL_2080 pass
9276 22:59:44.918110 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 skip
9277 22:59:44.918309 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 skip
9278 22:59:44.918486 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 skip
9279 22:59:44.918708 arm64_sve-ptrace_Set_SVE_VL_2096 pass
9280 22:59:44.918883 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 skip
9281 22:59:44.919056 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 skip
9282 22:59:44.919232 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 skip
9283 22:59:44.919407 arm64_sve-ptrace_Set_SVE_VL_2112 pass
9284 22:59:44.919574 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 skip
9285 22:59:44.919702 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 skip
9286 22:59:44.919816 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 skip
9287 22:59:44.919929 arm64_sve-ptrace_Set_SVE_VL_2128 pass
9288 22:59:44.920043 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 skip
9289 22:59:44.920186 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 skip
9290 22:59:44.920307 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 skip
9291 22:59:44.920423 arm64_sve-ptrace_Set_SVE_VL_2144 pass
9292 22:59:44.920537 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 skip
9293 22:59:44.920652 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 skip
9294 22:59:44.920768 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 skip
9295 22:59:44.920884 arm64_sve-ptrace_Set_SVE_VL_2160 pass
9296 22:59:44.920997 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 skip
9297 22:59:44.923980 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 skip
9298 22:59:44.924164 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 skip
9299 22:59:44.924336 arm64_sve-ptrace_Set_SVE_VL_2176 pass
9300 22:59:44.924510 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 skip
9301 22:59:44.924746 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 skip
9302 22:59:44.924936 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 skip
9303 22:59:44.925101 arm64_sve-ptrace_Set_SVE_VL_2192 pass
9304 22:59:44.925261 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 skip
9305 22:59:44.925454 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 skip
9306 22:59:44.925685 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 skip
9307 22:59:44.925874 arm64_sve-ptrace_Set_SVE_VL_2208 pass
9308 22:59:44.926041 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 skip
9309 22:59:44.926205 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 skip
9310 22:59:44.926365 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 skip
9311 22:59:44.926532 arm64_sve-ptrace_Set_SVE_VL_2224 pass
9312 22:59:44.926708 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 skip
9313 22:59:44.926905 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 skip
9314 22:59:44.927079 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 skip
9315 22:59:44.927223 arm64_sve-ptrace_Set_SVE_VL_2240 pass
9316 22:59:44.927368 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 skip
9317 22:59:44.927546 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 skip
9318 22:59:44.927667 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 skip
9319 22:59:44.927781 arm64_sve-ptrace_Set_SVE_VL_2256 pass
9320 22:59:44.927895 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 skip
9321 22:59:44.928008 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 skip
9322 22:59:44.928122 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 skip
9323 22:59:44.928233 arm64_sve-ptrace_Set_SVE_VL_2272 pass
9324 22:59:44.928346 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 skip
9325 22:59:44.928487 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 skip
9326 22:59:44.928608 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 skip
9327 22:59:44.928723 arm64_sve-ptrace_Set_SVE_VL_2288 pass
9328 22:59:44.928838 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 skip
9329 22:59:44.928951 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 skip
9330 22:59:44.929065 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 skip
9331 22:59:44.931741 arm64_sve-ptrace_Set_SVE_VL_2304 pass
9332 22:59:44.932085 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 skip
9333 22:59:44.932259 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 skip
9334 22:59:44.932441 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 skip
9335 22:59:44.932612 arm64_sve-ptrace_Set_SVE_VL_2320 pass
9336 22:59:44.932748 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 skip
9337 22:59:44.932876 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 skip
9338 22:59:44.932978 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 skip
9339 22:59:44.933075 arm64_sve-ptrace_Set_SVE_VL_2336 pass
9340 22:59:44.933171 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 skip
9341 22:59:44.933284 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 skip
9342 22:59:44.933383 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 skip
9343 22:59:44.933541 arm64_sve-ptrace_Set_SVE_VL_2352 pass
9344 22:59:44.933643 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 skip
9345 22:59:44.933769 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 skip
9346 22:59:44.933885 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 skip
9347 22:59:44.934008 arm64_sve-ptrace_Set_SVE_VL_2368 pass
9348 22:59:44.934143 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 skip
9349 22:59:44.934258 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 skip
9350 22:59:44.934427 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 skip
9351 22:59:44.934531 arm64_sve-ptrace_Set_SVE_VL_2384 pass
9352 22:59:44.947618 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 skip
9353 22:59:44.947947 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 skip
9354 22:59:44.948101 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 skip
9355 22:59:44.948226 arm64_sve-ptrace_Set_SVE_VL_2400 pass
9356 22:59:44.948374 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 skip
9357 22:59:44.948497 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 skip
9358 22:59:44.948638 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 skip
9359 22:59:44.948763 arm64_sve-ptrace_Set_SVE_VL_2416 pass
9360 22:59:44.948886 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 skip
9361 22:59:44.949074 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 skip
9362 22:59:44.949226 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 skip
9363 22:59:44.949339 arm64_sve-ptrace_Set_SVE_VL_2432 pass
9364 22:59:44.949530 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 skip
9365 22:59:44.949697 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 skip
9366 22:59:44.949853 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 skip
9367 22:59:44.950009 arm64_sve-ptrace_Set_SVE_VL_2448 pass
9368 22:59:44.950143 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 skip
9369 22:59:44.950291 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 skip
9370 22:59:44.950444 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 skip
9371 22:59:44.950615 arm64_sve-ptrace_Set_SVE_VL_2464 pass
9372 22:59:44.950789 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 skip
9373 22:59:44.950983 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 skip
9374 22:59:44.951185 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 skip
9375 22:59:44.951431 arm64_sve-ptrace_Set_SVE_VL_2480 pass
9376 22:59:44.951606 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 skip
9377 22:59:44.951735 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 skip
9378 22:59:44.951854 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 skip
9379 22:59:44.951970 arm64_sve-ptrace_Set_SVE_VL_2496 pass
9380 22:59:44.952083 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 skip
9381 22:59:44.952196 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 skip
9382 22:59:44.952311 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 skip
9383 22:59:44.952425 arm64_sve-ptrace_Set_SVE_VL_2512 pass
9384 22:59:44.952538 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 skip
9385 22:59:44.952651 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 skip
9386 22:59:44.952767 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 skip
9387 22:59:44.952904 arm64_sve-ptrace_Set_SVE_VL_2528 pass
9388 22:59:44.955800 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 skip
9389 22:59:44.956238 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 skip
9390 22:59:44.956435 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 skip
9391 22:59:44.956603 arm64_sve-ptrace_Set_SVE_VL_2544 pass
9392 22:59:44.956765 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 skip
9393 22:59:44.956954 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 skip
9394 22:59:44.957122 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 skip
9395 22:59:44.957287 arm64_sve-ptrace_Set_SVE_VL_2560 pass
9396 22:59:44.957440 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 skip
9397 22:59:44.957581 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 skip
9398 22:59:44.957763 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 skip
9399 22:59:44.957926 arm64_sve-ptrace_Set_SVE_VL_2576 pass
9400 22:59:44.958081 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 skip
9401 22:59:44.958230 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 skip
9402 22:59:44.958390 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 skip
9403 22:59:44.958541 arm64_sve-ptrace_Set_SVE_VL_2592 pass
9404 22:59:44.958663 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 skip
9405 22:59:44.958858 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 skip
9406 22:59:44.959038 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 skip
9407 22:59:44.959194 arm64_sve-ptrace_Set_SVE_VL_2608 pass
9408 22:59:44.959328 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 skip
9409 22:59:44.959472 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 skip
9410 22:59:44.959609 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 skip
9411 22:59:44.959730 arm64_sve-ptrace_Set_SVE_VL_2624 pass
9412 22:59:44.959850 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 skip
9413 22:59:44.959967 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 skip
9414 22:59:44.960110 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 skip
9415 22:59:44.960231 arm64_sve-ptrace_Set_SVE_VL_2640 pass
9416 22:59:44.960347 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 skip
9417 22:59:44.960463 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 skip
9418 22:59:44.960580 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 skip
9419 22:59:44.960696 arm64_sve-ptrace_Set_SVE_VL_2656 pass
9420 22:59:44.963896 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 skip
9421 22:59:44.964098 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 skip
9422 22:59:44.964528 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 skip
9423 22:59:44.964638 arm64_sve-ptrace_Set_SVE_VL_2672 pass
9424 22:59:44.964733 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 skip
9425 22:59:44.964828 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 skip
9426 22:59:44.964917 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 skip
9427 22:59:44.965023 arm64_sve-ptrace_Set_SVE_VL_2688 pass
9428 22:59:44.965114 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 skip
9429 22:59:44.965203 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 skip
9430 22:59:44.965294 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 skip
9431 22:59:44.965380 arm64_sve-ptrace_Set_SVE_VL_2704 pass
9432 22:59:44.965484 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 skip
9433 22:59:44.965573 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 skip
9434 22:59:44.965667 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 skip
9435 22:59:44.965771 arm64_sve-ptrace_Set_SVE_VL_2720 pass
9436 22:59:44.965861 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 skip
9437 22:59:44.965946 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 skip
9438 22:59:44.966049 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 skip
9439 22:59:44.966142 arm64_sve-ptrace_Set_SVE_VL_2736 pass
9440 22:59:44.966243 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 skip
9441 22:59:44.966346 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 skip
9442 22:59:44.966434 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 skip
9443 22:59:44.966538 arm64_sve-ptrace_Set_SVE_VL_2752 pass
9444 22:59:44.966641 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 skip
9445 22:59:44.966744 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 skip
9446 22:59:44.966846 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 skip
9447 22:59:44.966948 arm64_sve-ptrace_Set_SVE_VL_2768 pass
9448 22:59:44.967049 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 skip
9449 22:59:44.967385 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 skip
9450 22:59:44.967490 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 skip
9451 22:59:44.967593 arm64_sve-ptrace_Set_SVE_VL_2784 pass
9452 22:59:44.967681 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 skip
9453 22:59:44.967782 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 skip
9454 22:59:44.971943 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 skip
9455 22:59:44.972100 arm64_sve-ptrace_Set_SVE_VL_2800 pass
9456 22:59:44.972288 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 skip
9457 22:59:44.972448 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 skip
9458 22:59:44.972637 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 skip
9459 22:59:44.972812 arm64_sve-ptrace_Set_SVE_VL_2816 pass
9460 22:59:44.972974 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 skip
9461 22:59:44.973187 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 skip
9462 22:59:44.973359 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 skip
9463 22:59:44.973522 arm64_sve-ptrace_Set_SVE_VL_2832 pass
9464 22:59:44.973725 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 skip
9465 22:59:44.973902 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 skip
9466 22:59:44.974101 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 skip
9467 22:59:44.974270 arm64_sve-ptrace_Set_SVE_VL_2848 pass
9468 22:59:44.974430 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 skip
9469 22:59:44.974589 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 skip
9470 22:59:44.974747 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 skip
9471 22:59:44.974912 arm64_sve-ptrace_Set_SVE_VL_2864 pass
9472 22:59:44.975081 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 skip
9473 22:59:44.975283 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 skip
9474 22:59:44.975493 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 skip
9475 22:59:44.975652 arm64_sve-ptrace_Set_SVE_VL_2880 pass
9476 22:59:44.975831 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 skip
9477 22:59:44.975959 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 skip
9478 22:59:44.976075 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 skip
9479 22:59:44.976190 arm64_sve-ptrace_Set_SVE_VL_2896 pass
9480 22:59:44.976305 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 skip
9481 22:59:44.976418 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 skip
9482 22:59:44.976533 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 skip
9483 22:59:44.976647 arm64_sve-ptrace_Set_SVE_VL_2912 pass
9484 22:59:44.976760 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 skip
9485 22:59:44.976900 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 skip
9486 22:59:44.979772 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 skip
9487 22:59:44.980239 arm64_sve-ptrace_Set_SVE_VL_2928 pass
9488 22:59:44.980354 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 skip
9489 22:59:44.980458 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 skip
9490 22:59:44.980556 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 skip
9491 22:59:44.980666 arm64_sve-ptrace_Set_SVE_VL_2944 pass
9492 22:59:44.980777 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 skip
9493 22:59:44.980881 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 skip
9494 22:59:44.980990 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 skip
9495 22:59:44.981083 arm64_sve-ptrace_Set_SVE_VL_2960 pass
9496 22:59:44.981172 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 skip
9497 22:59:44.981278 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 skip
9498 22:59:44.981370 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 skip
9499 22:59:44.981460 arm64_sve-ptrace_Set_SVE_VL_2976 pass
9500 22:59:44.981566 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 skip
9501 22:59:44.981683 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 skip
9502 22:59:44.981792 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 skip
9503 22:59:44.982090 arm64_sve-ptrace_Set_SVE_VL_2992 pass
9504 22:59:44.982188 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 skip
9505 22:59:44.982294 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 skip
9506 22:59:44.982400 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 skip
9507 22:59:44.982505 arm64_sve-ptrace_Set_SVE_VL_3008 pass
9508 22:59:44.982798 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 skip
9509 22:59:44.982894 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 skip
9510 22:59:44.982998 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 skip
9511 22:59:44.983103 arm64_sve-ptrace_Set_SVE_VL_3024 pass
9512 22:59:44.997912 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 skip
9513 22:59:44.998288 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 skip
9514 22:59:44.998461 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 skip
9515 22:59:44.998635 arm64_sve-ptrace_Set_SVE_VL_3040 pass
9516 22:59:44.998857 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 skip
9517 22:59:44.999035 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 skip
9518 22:59:44.999206 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 skip
9519 22:59:44.999367 arm64_sve-ptrace_Set_SVE_VL_3056 pass
9520 22:59:44.999565 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 skip
9521 22:59:44.999749 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 skip
9522 22:59:44.999946 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 skip
9523 22:59:45.000104 arm64_sve-ptrace_Set_SVE_VL_3072 pass
9524 22:59:45.000313 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 skip
9525 22:59:45.000507 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 skip
9526 22:59:45.000749 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 skip
9527 22:59:45.000939 arm64_sve-ptrace_Set_SVE_VL_3088 pass
9528 22:59:45.001146 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 skip
9529 22:59:45.001331 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 skip
9530 22:59:45.001522 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 skip
9531 22:59:45.001747 arm64_sve-ptrace_Set_SVE_VL_3104 pass
9532 22:59:45.001944 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 skip
9533 22:59:45.002133 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 skip
9534 22:59:45.002304 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 skip
9535 22:59:45.002505 arm64_sve-ptrace_Set_SVE_VL_3120 pass
9536 22:59:45.002705 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 skip
9537 22:59:45.002916 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 skip
9538 22:59:45.003136 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 skip
9539 22:59:45.003339 arm64_sve-ptrace_Set_SVE_VL_3136 pass
9540 22:59:45.003545 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 skip
9541 22:59:45.003714 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 skip
9542 22:59:45.003845 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 skip
9543 22:59:45.003960 arm64_sve-ptrace_Set_SVE_VL_3152 pass
9544 22:59:45.004072 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 skip
9545 22:59:45.004184 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 skip
9546 22:59:45.004298 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 skip
9547 22:59:45.004410 arm64_sve-ptrace_Set_SVE_VL_3168 pass
9548 22:59:45.004524 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 skip
9549 22:59:45.004637 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 skip
9550 22:59:45.004985 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 skip
9551 22:59:45.005139 arm64_sve-ptrace_Set_SVE_VL_3184 pass
9552 22:59:45.005261 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 skip
9553 22:59:45.005374 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 skip
9554 22:59:45.005485 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 skip
9555 22:59:45.005598 arm64_sve-ptrace_Set_SVE_VL_3200 pass
9556 22:59:45.005725 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 skip
9557 22:59:45.005841 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 skip
9558 22:59:45.005952 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 skip
9559 22:59:45.006063 arm64_sve-ptrace_Set_SVE_VL_3216 pass
9560 22:59:45.007800 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 skip
9561 22:59:45.008173 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 skip
9562 22:59:45.008278 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 skip
9563 22:59:45.008367 arm64_sve-ptrace_Set_SVE_VL_3232 pass
9564 22:59:45.008470 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 skip
9565 22:59:45.008558 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 skip
9566 22:59:45.008660 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 skip
9567 22:59:45.008749 arm64_sve-ptrace_Set_SVE_VL_3248 pass
9568 22:59:45.008842 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 skip
9569 22:59:45.008944 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 skip
9570 22:59:45.009031 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 skip
9571 22:59:45.009132 arm64_sve-ptrace_Set_SVE_VL_3264 pass
9572 22:59:45.009234 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 skip
9573 22:59:45.009515 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 skip
9574 22:59:45.009607 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 skip
9575 22:59:45.009701 arm64_sve-ptrace_Set_SVE_VL_3280 pass
9576 22:59:45.009806 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 skip
9577 22:59:45.009895 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 skip
9578 22:59:45.009995 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 skip
9579 22:59:45.010083 arm64_sve-ptrace_Set_SVE_VL_3296 pass
9580 22:59:45.010184 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 skip
9581 22:59:45.010287 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 skip
9582 22:59:45.010388 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 skip
9583 22:59:45.010490 arm64_sve-ptrace_Set_SVE_VL_3312 pass
9584 22:59:45.010599 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 skip
9585 22:59:45.010718 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 skip
9586 22:59:45.011055 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 skip
9587 22:59:45.011157 arm64_sve-ptrace_Set_SVE_VL_3328 pass
9588 22:59:45.011244 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 skip
9589 22:59:45.011330 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 skip
9590 22:59:45.011431 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 skip
9591 22:59:45.011519 arm64_sve-ptrace_Set_SVE_VL_3344 pass
9592 22:59:45.011605 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 skip
9593 22:59:45.011706 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 skip
9594 22:59:45.015778 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 skip
9595 22:59:45.016534 arm64_sve-ptrace_Set_SVE_VL_3360 pass
9596 22:59:45.016739 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 skip
9597 22:59:45.016903 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 skip
9598 22:59:45.017060 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 skip
9599 22:59:45.017217 arm64_sve-ptrace_Set_SVE_VL_3376 pass
9600 22:59:45.017372 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 skip
9601 22:59:45.017563 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 skip
9602 22:59:45.017744 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 skip
9603 22:59:45.017905 arm64_sve-ptrace_Set_SVE_VL_3392 pass
9604 22:59:45.018051 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 skip
9605 22:59:45.018197 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 skip
9606 22:59:45.018343 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 skip
9607 22:59:45.018488 arm64_sve-ptrace_Set_SVE_VL_3408 pass
9608 22:59:45.018632 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 skip
9609 22:59:45.018775 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 skip
9610 22:59:45.018954 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 skip
9611 22:59:45.019102 arm64_sve-ptrace_Set_SVE_VL_3424 pass
9612 22:59:45.019245 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 skip
9613 22:59:45.019388 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 skip
9614 22:59:45.019532 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 skip
9615 22:59:45.019676 arm64_sve-ptrace_Set_SVE_VL_3440 pass
9616 22:59:45.019846 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 skip
9617 22:59:45.020017 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 skip
9618 22:59:45.020176 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 skip
9619 22:59:45.020310 arm64_sve-ptrace_Set_SVE_VL_3456 pass
9620 22:59:45.020462 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 skip
9621 22:59:45.020637 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 skip
9622 22:59:45.020846 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 skip
9623 22:59:45.021028 arm64_sve-ptrace_Set_SVE_VL_3472 pass
9624 22:59:45.021202 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 skip
9625 22:59:45.021382 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 skip
9626 22:59:45.021550 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 skip
9627 22:59:45.021684 arm64_sve-ptrace_Set_SVE_VL_3488 pass
9628 22:59:45.023801 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 skip
9629 22:59:45.024105 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 skip
9630 22:59:45.024207 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 skip
9631 22:59:45.024311 arm64_sve-ptrace_Set_SVE_VL_3504 pass
9632 22:59:45.024947 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 skip
9633 22:59:45.025041 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 skip
9634 22:59:45.025128 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 skip
9635 22:59:45.025214 arm64_sve-ptrace_Set_SVE_VL_3520 pass
9636 22:59:45.025303 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 skip
9637 22:59:45.025389 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 skip
9638 22:59:45.025475 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 skip
9639 22:59:45.025561 arm64_sve-ptrace_Set_SVE_VL_3536 pass
9640 22:59:45.025855 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 skip
9641 22:59:45.025959 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 skip
9642 22:59:45.026046 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 skip
9643 22:59:45.026133 arm64_sve-ptrace_Set_SVE_VL_3552 pass
9644 22:59:45.026219 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 skip
9645 22:59:45.026305 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 skip
9646 22:59:45.026390 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 skip
9647 22:59:45.026465 arm64_sve-ptrace_Set_SVE_VL_3568 pass
9648 22:59:45.026561 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 skip
9649 22:59:45.026635 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 skip
9650 22:59:45.026718 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 skip
9651 22:59:45.026804 arm64_sve-ptrace_Set_SVE_VL_3584 pass
9652 22:59:45.026890 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 skip
9653 22:59:45.026977 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 skip
9654 22:59:45.027079 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 skip
9655 22:59:45.027167 arm64_sve-ptrace_Set_SVE_VL_3600 pass
9656 22:59:45.027253 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 skip
9657 22:59:45.027338 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 skip
9658 22:59:45.027440 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 skip
9659 22:59:45.027526 arm64_sve-ptrace_Set_SVE_VL_3616 pass
9660 22:59:45.027612 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 skip
9661 22:59:45.027713 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 skip
9662 22:59:45.031765 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 skip
9663 22:59:45.032085 arm64_sve-ptrace_Set_SVE_VL_3632 pass
9664 22:59:45.032346 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 skip
9665 22:59:45.032582 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 skip
9666 22:59:45.032781 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 skip
9667 22:59:45.032920 arm64_sve-ptrace_Set_SVE_VL_3648 pass
9668 22:59:45.033037 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 skip
9669 22:59:45.033179 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 skip
9670 22:59:45.033372 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 skip
9671 22:59:45.033506 arm64_sve-ptrace_Set_SVE_VL_3664 pass
9672 22:59:45.048726 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 skip
9673 22:59:45.049129 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 skip
9674 22:59:45.049231 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 skip
9675 22:59:45.049319 arm64_sve-ptrace_Set_SVE_VL_3680 pass
9676 22:59:45.049404 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 skip
9677 22:59:45.049506 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 skip
9678 22:59:45.049593 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 skip
9679 22:59:45.049687 arm64_sve-ptrace_Set_SVE_VL_3696 pass
9680 22:59:45.049773 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 skip
9681 22:59:45.049874 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 skip
9682 22:59:45.049961 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 skip
9683 22:59:45.050047 arm64_sve-ptrace_Set_SVE_VL_3712 pass
9684 22:59:45.050147 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 skip
9685 22:59:45.050234 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 skip
9686 22:59:45.050334 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 skip
9687 22:59:45.050418 arm64_sve-ptrace_Set_SVE_VL_3728 pass
9688 22:59:45.050516 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 skip
9689 22:59:45.050591 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 skip
9690 22:59:45.050676 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 skip
9691 22:59:45.050750 arm64_sve-ptrace_Set_SVE_VL_3744 pass
9692 22:59:45.050835 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 skip
9693 22:59:45.051186 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 skip
9694 22:59:45.051376 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 skip
9695 22:59:45.051533 arm64_sve-ptrace_Set_SVE_VL_3760 pass
9696 22:59:45.051683 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 skip
9697 22:59:45.051804 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 skip
9698 22:59:45.051919 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 skip
9699 22:59:45.055757 arm64_sve-ptrace_Set_SVE_VL_3776 pass
9700 22:59:45.056235 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 skip
9701 22:59:45.056400 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 skip
9702 22:59:45.056552 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 skip
9703 22:59:45.056690 arm64_sve-ptrace_Set_SVE_VL_3792 pass
9704 22:59:45.056918 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 skip
9705 22:59:45.057096 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 skip
9706 22:59:45.057284 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 skip
9707 22:59:45.057431 arm64_sve-ptrace_Set_SVE_VL_3808 pass
9708 22:59:45.057613 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 skip
9709 22:59:45.057833 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 skip
9710 22:59:45.058009 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 skip
9711 22:59:45.058194 arm64_sve-ptrace_Set_SVE_VL_3824 pass
9712 22:59:45.058359 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 skip
9713 22:59:45.058507 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 skip
9714 22:59:45.058671 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 skip
9715 22:59:45.058830 arm64_sve-ptrace_Set_SVE_VL_3840 pass
9716 22:59:45.058978 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 skip
9717 22:59:45.059174 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 skip
9718 22:59:45.059390 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 skip
9719 22:59:45.059595 arm64_sve-ptrace_Set_SVE_VL_3856 pass
9720 22:59:45.059730 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 skip
9721 22:59:45.059847 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 skip
9722 22:59:45.059963 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 skip
9723 22:59:45.060075 arm64_sve-ptrace_Set_SVE_VL_3872 pass
9724 22:59:45.060187 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 skip
9725 22:59:45.060299 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 skip
9726 22:59:45.060412 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 skip
9727 22:59:45.060525 arm64_sve-ptrace_Set_SVE_VL_3888 pass
9728 22:59:45.060637 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 skip
9729 22:59:45.060750 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 skip
9730 22:59:45.060890 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 skip
9731 22:59:45.061011 arm64_sve-ptrace_Set_SVE_VL_3904 pass
9732 22:59:45.061126 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 skip
9733 22:59:45.063769 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 skip
9734 22:59:45.064198 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 skip
9735 22:59:45.064385 arm64_sve-ptrace_Set_SVE_VL_3920 pass
9736 22:59:45.064778 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 skip
9737 22:59:45.064951 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 skip
9738 22:59:45.065113 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 skip
9739 22:59:45.065268 arm64_sve-ptrace_Set_SVE_VL_3936 pass
9740 22:59:45.065421 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 skip
9741 22:59:45.065582 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 skip
9742 22:59:45.065824 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 skip
9743 22:59:45.066020 arm64_sve-ptrace_Set_SVE_VL_3952 pass
9744 22:59:45.066191 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 skip
9745 22:59:45.066349 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 skip
9746 22:59:45.066508 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 skip
9747 22:59:45.066660 arm64_sve-ptrace_Set_SVE_VL_3968 pass
9748 22:59:45.066813 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 skip
9749 22:59:45.066971 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 skip
9750 22:59:45.067156 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 skip
9751 22:59:45.067323 arm64_sve-ptrace_Set_SVE_VL_3984 pass
9752 22:59:45.067484 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 skip
9753 22:59:45.067642 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 skip
9754 22:59:45.067766 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 skip
9755 22:59:45.067881 arm64_sve-ptrace_Set_SVE_VL_4000 pass
9756 22:59:45.067994 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 skip
9757 22:59:45.068109 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 skip
9758 22:59:45.068223 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 skip
9759 22:59:45.068337 arm64_sve-ptrace_Set_SVE_VL_4016 pass
9760 22:59:45.068478 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 skip
9761 22:59:45.068597 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 skip
9762 22:59:45.068714 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 skip
9763 22:59:45.068828 arm64_sve-ptrace_Set_SVE_VL_4032 pass
9764 22:59:45.068943 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 skip
9765 22:59:45.069057 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 skip
9766 22:59:45.071872 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 skip
9767 22:59:45.072080 arm64_sve-ptrace_Set_SVE_VL_4048 pass
9768 22:59:45.072534 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 skip
9769 22:59:45.072728 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 skip
9770 22:59:45.072891 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 skip
9771 22:59:45.073050 arm64_sve-ptrace_Set_SVE_VL_4064 pass
9772 22:59:45.073241 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 skip
9773 22:59:45.073438 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 skip
9774 22:59:45.073672 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 skip
9775 22:59:45.073875 arm64_sve-ptrace_Set_SVE_VL_4080 pass
9776 22:59:45.074049 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 skip
9777 22:59:45.074222 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 skip
9778 22:59:45.074424 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 skip
9779 22:59:45.074599 arm64_sve-ptrace_Set_SVE_VL_4096 pass
9780 22:59:45.074752 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 skip
9781 22:59:45.074908 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 skip
9782 22:59:45.075065 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 skip
9783 22:59:45.075225 arm64_sve-ptrace_Set_SVE_VL_4112 pass
9784 22:59:45.075425 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 skip
9785 22:59:45.075590 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 skip
9786 22:59:45.075712 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 skip
9787 22:59:45.075825 arm64_sve-ptrace_Set_SVE_VL_4128 pass
9788 22:59:45.075938 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 skip
9789 22:59:45.076050 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 skip
9790 22:59:45.076162 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 skip
9791 22:59:45.076274 arm64_sve-ptrace_Set_SVE_VL_4144 pass
9792 22:59:45.076385 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 skip
9793 22:59:45.076496 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 skip
9794 22:59:45.076607 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 skip
9795 22:59:45.076719 arm64_sve-ptrace_Set_SVE_VL_4160 pass
9796 22:59:45.076829 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 skip
9797 22:59:45.076941 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 skip
9798 22:59:45.077052 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 skip
9799 22:59:45.077164 arm64_sve-ptrace_Set_SVE_VL_4176 pass
9800 22:59:45.077274 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 skip
9801 22:59:45.077409 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 skip
9802 22:59:45.077526 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 skip
9803 22:59:45.077637 arm64_sve-ptrace_Set_SVE_VL_4192 pass
9804 22:59:45.079827 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 skip
9805 22:59:45.080481 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 skip
9806 22:59:45.080671 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 skip
9807 22:59:45.080833 arm64_sve-ptrace_Set_SVE_VL_4208 pass
9808 22:59:45.080976 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 skip
9809 22:59:45.081131 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 skip
9810 22:59:45.081289 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 skip
9811 22:59:45.081446 arm64_sve-ptrace_Set_SVE_VL_4224 pass
9812 22:59:45.081635 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 skip
9813 22:59:45.081807 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 skip
9814 22:59:45.081969 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 skip
9815 22:59:45.082137 arm64_sve-ptrace_Set_SVE_VL_4240 pass
9816 22:59:45.082298 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 skip
9817 22:59:45.082448 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 skip
9818 22:59:45.082606 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 skip
9819 22:59:45.082751 arm64_sve-ptrace_Set_SVE_VL_4256 pass
9820 22:59:45.082869 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 skip
9821 22:59:45.083016 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 skip
9822 22:59:45.083138 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 skip
9823 22:59:45.083307 arm64_sve-ptrace_Set_SVE_VL_4272 pass
9824 22:59:45.083437 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 skip
9825 22:59:45.083554 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 skip
9826 22:59:45.083668 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 skip
9827 22:59:45.083782 arm64_sve-ptrace_Set_SVE_VL_4288 pass
9828 22:59:45.083896 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 skip
9829 22:59:45.084012 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 skip
9830 22:59:45.084124 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 skip
9831 22:59:45.084239 arm64_sve-ptrace_Set_SVE_VL_4304 pass
9832 22:59:45.098363 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 skip
9833 22:59:45.098474 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 skip
9834 22:59:45.098770 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 skip
9835 22:59:45.098947 arm64_sve-ptrace_Set_SVE_VL_4320 pass
9836 22:59:45.099103 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 skip
9837 22:59:45.099501 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 skip
9838 22:59:45.099682 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 skip
9839 22:59:45.099839 arm64_sve-ptrace_Set_SVE_VL_4336 pass
9840 22:59:45.099961 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 skip
9841 22:59:45.100096 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 skip
9842 22:59:45.100249 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 skip
9843 22:59:45.100436 arm64_sve-ptrace_Set_SVE_VL_4352 pass
9844 22:59:45.100586 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 skip
9845 22:59:45.100751 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 skip
9846 22:59:45.100958 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 skip
9847 22:59:45.101146 arm64_sve-ptrace_Set_SVE_VL_4368 pass
9848 22:59:45.101339 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 skip
9849 22:59:45.101504 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 skip
9850 22:59:45.101674 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 skip
9851 22:59:45.101820 arm64_sve-ptrace_Set_SVE_VL_4384 pass
9852 22:59:45.101972 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 skip
9853 22:59:45.102161 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 skip
9854 22:59:45.102321 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 skip
9855 22:59:45.102472 arm64_sve-ptrace_Set_SVE_VL_4400 pass
9856 22:59:45.102631 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 skip
9857 22:59:45.102819 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 skip
9858 22:59:45.102988 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 skip
9859 22:59:45.103143 arm64_sve-ptrace_Set_SVE_VL_4416 pass
9860 22:59:45.103303 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 skip
9861 22:59:45.103528 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 skip
9862 22:59:45.103680 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 skip
9863 22:59:45.103797 arm64_sve-ptrace_Set_SVE_VL_4432 pass
9864 22:59:45.103912 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 skip
9865 22:59:45.109712 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 skip
9866 22:59:45.109928 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 skip
9867 22:59:45.110092 arm64_sve-ptrace_Set_SVE_VL_4448 pass
9868 22:59:45.110246 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 skip
9869 22:59:45.110400 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 skip
9870 22:59:45.110548 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 skip
9871 22:59:45.110694 arm64_sve-ptrace_Set_SVE_VL_4464 pass
9872 22:59:45.110835 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 skip
9873 22:59:45.110978 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 skip
9874 22:59:45.111132 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 skip
9875 22:59:45.111290 arm64_sve-ptrace_Set_SVE_VL_4480 pass
9876 22:59:45.111418 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 skip
9877 22:59:45.111531 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 skip
9878 22:59:45.111621 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 skip
9879 22:59:45.111707 arm64_sve-ptrace_Set_SVE_VL_4496 pass
9880 22:59:45.111790 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 skip
9881 22:59:45.111875 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 skip
9882 22:59:45.111960 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 skip
9883 22:59:45.112045 arm64_sve-ptrace_Set_SVE_VL_4512 pass
9884 22:59:45.112128 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 skip
9885 22:59:45.112420 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 skip
9886 22:59:45.112524 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 skip
9887 22:59:45.112611 arm64_sve-ptrace_Set_SVE_VL_4528 pass
9888 22:59:45.112696 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 skip
9889 22:59:45.112781 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 skip
9890 22:59:45.112866 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 skip
9891 22:59:45.112951 arm64_sve-ptrace_Set_SVE_VL_4544 pass
9892 22:59:45.113036 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 skip
9893 22:59:45.113121 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 skip
9894 22:59:45.113206 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 skip
9895 22:59:45.113290 arm64_sve-ptrace_Set_SVE_VL_4560 pass
9896 22:59:45.113375 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 skip
9897 22:59:45.113459 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 skip
9898 22:59:45.113543 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 skip
9899 22:59:45.113628 arm64_sve-ptrace_Set_SVE_VL_4576 pass
9900 22:59:45.113720 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 skip
9901 22:59:45.113805 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 skip
9902 22:59:45.113891 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 skip
9903 22:59:45.113978 arm64_sve-ptrace_Set_SVE_VL_4592 pass
9904 22:59:45.115723 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 skip
9905 22:59:45.116040 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 skip
9906 22:59:45.116248 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 skip
9907 22:59:45.116385 arm64_sve-ptrace_Set_SVE_VL_4608 pass
9908 22:59:45.116584 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 skip
9909 22:59:45.116762 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 skip
9910 22:59:45.116897 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 skip
9911 22:59:45.117017 arm64_sve-ptrace_Set_SVE_VL_4624 pass
9912 22:59:45.117126 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 skip
9913 22:59:45.117258 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 skip
9914 22:59:45.117354 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 skip
9915 22:59:45.117471 arm64_sve-ptrace_Set_SVE_VL_4640 pass
9916 22:59:45.117585 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 skip
9917 22:59:45.117740 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 skip
9918 22:59:45.117859 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 skip
9919 22:59:45.117973 arm64_sve-ptrace_Set_SVE_VL_4656 pass
9920 22:59:45.118082 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 skip
9921 22:59:45.118197 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 skip
9922 22:59:45.118268 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 skip
9923 22:59:45.118328 arm64_sve-ptrace_Set_SVE_VL_4672 pass
9924 22:59:45.118393 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 skip
9925 22:59:45.118493 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 skip
9926 22:59:45.118596 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 skip
9927 22:59:45.118700 arm64_sve-ptrace_Set_SVE_VL_4688 pass
9928 22:59:45.118802 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 skip
9929 22:59:45.118921 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 skip
9930 22:59:45.119013 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 skip
9931 22:59:45.119103 arm64_sve-ptrace_Set_SVE_VL_4704 pass
9932 22:59:45.119205 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 skip
9933 22:59:45.119304 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 skip
9934 22:59:45.119390 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 skip
9935 22:59:45.119490 arm64_sve-ptrace_Set_SVE_VL_4720 pass
9936 22:59:45.119611 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 skip
9937 22:59:45.123738 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 skip
9938 22:59:45.124087 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 skip
9939 22:59:45.124185 arm64_sve-ptrace_Set_SVE_VL_4736 pass
9940 22:59:45.124286 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 skip
9941 22:59:45.124395 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 skip
9942 22:59:45.124477 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 skip
9943 22:59:45.124556 arm64_sve-ptrace_Set_SVE_VL_4752 pass
9944 22:59:45.124634 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 skip
9945 22:59:45.124752 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 skip
9946 22:59:45.124857 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 skip
9947 22:59:45.124945 arm64_sve-ptrace_Set_SVE_VL_4768 pass
9948 22:59:45.125060 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 skip
9949 22:59:45.125140 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 skip
9950 22:59:45.125217 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 skip
9951 22:59:45.125310 arm64_sve-ptrace_Set_SVE_VL_4784 pass
9952 22:59:45.125404 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 skip
9953 22:59:45.125477 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 skip
9954 22:59:45.125561 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 skip
9955 22:59:45.125849 arm64_sve-ptrace_Set_SVE_VL_4800 pass
9956 22:59:45.125933 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 skip
9957 22:59:45.126059 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 skip
9958 22:59:45.126148 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 skip
9959 22:59:45.126231 arm64_sve-ptrace_Set_SVE_VL_4816 pass
9960 22:59:45.126323 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 skip
9961 22:59:45.126417 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 skip
9962 22:59:45.126502 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 skip
9963 22:59:45.126612 arm64_sve-ptrace_Set_SVE_VL_4832 pass
9964 22:59:45.126729 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 skip
9965 22:59:45.126828 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 skip
9966 22:59:45.126905 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 skip
9967 22:59:45.126983 arm64_sve-ptrace_Set_SVE_VL_4848 pass
9968 22:59:45.127080 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 skip
9969 22:59:45.127171 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 skip
9970 22:59:45.127575 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 skip
9971 22:59:45.127668 arm64_sve-ptrace_Set_SVE_VL_4864 pass
9972 22:59:45.127753 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 skip
9973 22:59:45.131781 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 skip
9974 22:59:45.132108 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 skip
9975 22:59:45.132204 arm64_sve-ptrace_Set_SVE_VL_4880 pass
9976 22:59:45.132289 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 skip
9977 22:59:45.132380 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 skip
9978 22:59:45.132455 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 skip
9979 22:59:45.132545 arm64_sve-ptrace_Set_SVE_VL_4896 pass
9980 22:59:45.132634 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 skip
9981 22:59:45.132729 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 skip
9982 22:59:45.132812 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 skip
9983 22:59:45.132906 arm64_sve-ptrace_Set_SVE_VL_4912 pass
9984 22:59:45.132992 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 skip
9985 22:59:45.133090 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 skip
9986 22:59:45.133422 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 skip
9987 22:59:45.133618 arm64_sve-ptrace_Set_SVE_VL_4928 pass
9988 22:59:45.133805 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 skip
9989 22:59:45.133927 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 skip
9990 22:59:45.134042 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 skip
9991 22:59:45.134201 arm64_sve-ptrace_Set_SVE_VL_4944 pass
9992 22:59:45.149365 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 skip
9993 22:59:45.149952 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 skip
9994 22:59:45.150155 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 skip
9995 22:59:45.150328 arm64_sve-ptrace_Set_SVE_VL_4960 pass
9996 22:59:45.150495 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 skip
9997 22:59:45.150655 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 skip
9998 22:59:45.150853 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 skip
9999 22:59:45.151014 arm64_sve-ptrace_Set_SVE_VL_4976 pass
10000 22:59:45.151180 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 skip
10001 22:59:45.151343 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 skip
10002 22:59:45.151509 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 skip
10003 22:59:45.151675 arm64_sve-ptrace_Set_SVE_VL_4992 pass
10004 22:59:45.151812 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 skip
10005 22:59:45.151972 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 skip
10006 22:59:45.152176 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 skip
10007 22:59:45.152344 arm64_sve-ptrace_Set_SVE_VL_5008 pass
10008 22:59:45.152507 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 skip
10009 22:59:45.152670 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 skip
10010 22:59:45.152833 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 skip
10011 22:59:45.152995 arm64_sve-ptrace_Set_SVE_VL_5024 pass
10012 22:59:45.153161 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 skip
10013 22:59:45.153322 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 skip
10014 22:59:45.153481 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 skip
10015 22:59:45.153642 arm64_sve-ptrace_Set_SVE_VL_5040 pass
10016 22:59:45.153818 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 skip
10017 22:59:45.153979 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 skip
10018 22:59:45.154178 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 skip
10019 22:59:45.154347 arm64_sve-ptrace_Set_SVE_VL_5056 pass
10020 22:59:45.154510 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 skip
10021 22:59:45.154670 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 skip
10022 22:59:45.154833 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 skip
10023 22:59:45.154992 arm64_sve-ptrace_Set_SVE_VL_5072 pass
10024 22:59:45.155152 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 skip
10025 22:59:45.155314 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 skip
10026 22:59:45.155471 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 skip
10027 22:59:45.155628 arm64_sve-ptrace_Set_SVE_VL_5088 pass
10028 22:59:45.155749 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 skip
10029 22:59:45.155862 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 skip
10030 22:59:45.156178 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 skip
10031 22:59:45.156264 arm64_sve-ptrace_Set_SVE_VL_5104 pass
10032 22:59:45.156330 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 skip
10033 22:59:45.156391 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 skip
10034 22:59:45.156453 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 skip
10035 22:59:45.156513 arm64_sve-ptrace_Set_SVE_VL_5120 pass
10036 22:59:45.156573 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 skip
10037 22:59:45.156633 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 skip
10038 22:59:45.156693 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 skip
10039 22:59:45.156753 arm64_sve-ptrace_Set_SVE_VL_5136 pass
10040 22:59:45.156812 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 skip
10041 22:59:45.156872 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 skip
10042 22:59:45.156932 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 skip
10043 22:59:45.156993 arm64_sve-ptrace_Set_SVE_VL_5152 pass
10044 22:59:45.157053 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 skip
10045 22:59:45.157118 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 skip
10046 22:59:45.157177 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 skip
10047 22:59:45.157237 arm64_sve-ptrace_Set_SVE_VL_5168 pass
10048 22:59:45.159781 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 skip
10049 22:59:45.160074 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 skip
10050 22:59:45.160174 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 skip
10051 22:59:45.160245 arm64_sve-ptrace_Set_SVE_VL_5184 pass
10052 22:59:45.160329 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 skip
10053 22:59:45.160409 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 skip
10054 22:59:45.160672 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 skip
10055 22:59:45.160762 arm64_sve-ptrace_Set_SVE_VL_5200 pass
10056 22:59:45.160836 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 skip
10057 22:59:45.160929 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 skip
10058 22:59:45.161011 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 skip
10059 22:59:45.161104 arm64_sve-ptrace_Set_SVE_VL_5216 pass
10060 22:59:45.161179 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 skip
10061 22:59:45.161269 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 skip
10062 22:59:45.161526 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 skip
10063 22:59:45.161608 arm64_sve-ptrace_Set_SVE_VL_5232 pass
10064 22:59:45.161717 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 skip
10065 22:59:45.161801 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 skip
10066 22:59:45.161894 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 skip
10067 22:59:45.161987 arm64_sve-ptrace_Set_SVE_VL_5248 pass
10068 22:59:45.162081 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 skip
10069 22:59:45.162176 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 skip
10070 22:59:45.162468 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 skip
10071 22:59:45.162564 arm64_sve-ptrace_Set_SVE_VL_5264 pass
10072 22:59:45.162660 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 skip
10073 22:59:45.162735 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 skip
10074 22:59:45.162825 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 skip
10075 22:59:45.162908 arm64_sve-ptrace_Set_SVE_VL_5280 pass
10076 22:59:45.162998 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 skip
10077 22:59:45.163076 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 skip
10078 22:59:45.163171 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 skip
10079 22:59:45.163456 arm64_sve-ptrace_Set_SVE_VL_5296 pass
10080 22:59:45.163555 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 skip
10081 22:59:45.163669 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 skip
10082 22:59:45.167732 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 skip
10083 22:59:45.168031 arm64_sve-ptrace_Set_SVE_VL_5312 pass
10084 22:59:45.168128 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 skip
10085 22:59:45.168216 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 skip
10086 22:59:45.168296 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 skip
10087 22:59:45.168380 arm64_sve-ptrace_Set_SVE_VL_5328 pass
10088 22:59:45.168456 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 skip
10089 22:59:45.168540 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 skip
10090 22:59:45.168620 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 skip
10091 22:59:45.168888 arm64_sve-ptrace_Set_SVE_VL_5344 pass
10092 22:59:45.168967 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 skip
10093 22:59:45.169067 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 skip
10094 22:59:45.169177 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 skip
10095 22:59:45.169269 arm64_sve-ptrace_Set_SVE_VL_5360 pass
10096 22:59:45.169531 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 skip
10097 22:59:45.169638 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 skip
10098 22:59:45.169753 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 skip
10099 22:59:45.169858 arm64_sve-ptrace_Set_SVE_VL_5376 pass
10100 22:59:45.169946 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 skip
10101 22:59:45.170054 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 skip
10102 22:59:45.170356 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 skip
10103 22:59:45.170457 arm64_sve-ptrace_Set_SVE_VL_5392 pass
10104 22:59:45.170558 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 skip
10105 22:59:45.170645 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 skip
10106 22:59:45.170748 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 skip
10107 22:59:45.170847 arm64_sve-ptrace_Set_SVE_VL_5408 pass
10108 22:59:45.170952 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 skip
10109 22:59:45.171155 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 skip
10110 22:59:45.171503 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 skip
10111 22:59:45.171605 arm64_sve-ptrace_Set_SVE_VL_5424 pass
10112 22:59:45.171710 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 skip
10113 22:59:45.179686 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 skip
10114 22:59:45.180071 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 skip
10115 22:59:45.180203 arm64_sve-ptrace_Set_SVE_VL_5440 pass
10116 22:59:45.180293 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 skip
10117 22:59:45.180410 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 skip
10118 22:59:45.180498 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 skip
10119 22:59:45.180573 arm64_sve-ptrace_Set_SVE_VL_5456 pass
10120 22:59:45.180648 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 skip
10121 22:59:45.180724 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 skip
10122 22:59:45.180813 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 skip
10123 22:59:45.181099 arm64_sve-ptrace_Set_SVE_VL_5472 pass
10124 22:59:45.181183 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 skip
10125 22:59:45.181305 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 skip
10126 22:59:45.181390 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 skip
10127 22:59:45.181495 arm64_sve-ptrace_Set_SVE_VL_5488 pass
10128 22:59:45.181598 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 skip
10129 22:59:45.181712 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 skip
10130 22:59:45.181805 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 skip
10131 22:59:45.182059 arm64_sve-ptrace_Set_SVE_VL_5504 pass
10132 22:59:45.182147 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 skip
10133 22:59:45.182238 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 skip
10134 22:59:45.182311 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 skip
10135 22:59:45.182404 arm64_sve-ptrace_Set_SVE_VL_5520 pass
10136 22:59:45.182519 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 skip
10137 22:59:45.182620 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 skip
10138 22:59:45.182896 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 skip
10139 22:59:45.182990 arm64_sve-ptrace_Set_SVE_VL_5536 pass
10140 22:59:45.183054 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 skip
10141 22:59:45.183127 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 skip
10142 22:59:45.183201 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 skip
10143 22:59:45.183278 arm64_sve-ptrace_Set_SVE_VL_5552 pass
10144 22:59:45.183343 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 skip
10145 22:59:45.183437 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 skip
10146 22:59:45.183728 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 skip
10147 22:59:45.187934 arm64_sve-ptrace_Set_SVE_VL_5568 pass
10148 22:59:45.188036 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 skip
10149 22:59:45.188142 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 skip
10150 22:59:45.188212 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 skip
10151 22:59:45.188284 arm64_sve-ptrace_Set_SVE_VL_5584 pass
10152 22:59:45.199870 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 skip
10153 22:59:45.200176 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 skip
10154 22:59:45.200255 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 skip
10155 22:59:45.200324 arm64_sve-ptrace_Set_SVE_VL_5600 pass
10156 22:59:45.200402 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 skip
10157 22:59:45.200472 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 skip
10158 22:59:45.200546 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 skip
10159 22:59:45.200621 arm64_sve-ptrace_Set_SVE_VL_5616 pass
10160 22:59:45.200708 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 skip
10161 22:59:45.200788 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 skip
10162 22:59:45.200883 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 skip
10163 22:59:45.200957 arm64_sve-ptrace_Set_SVE_VL_5632 pass
10164 22:59:45.201217 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 skip
10165 22:59:45.201297 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 skip
10166 22:59:45.201371 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 skip
10167 22:59:45.201435 arm64_sve-ptrace_Set_SVE_VL_5648 pass
10168 22:59:45.201510 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 skip
10169 22:59:45.201756 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 skip
10170 22:59:45.201827 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 skip
10171 22:59:45.201910 arm64_sve-ptrace_Set_SVE_VL_5664 pass
10172 22:59:45.201976 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 skip
10173 22:59:45.202221 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 skip
10174 22:59:45.202291 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 skip
10175 22:59:45.202366 arm64_sve-ptrace_Set_SVE_VL_5680 pass
10176 22:59:45.202431 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 skip
10177 22:59:45.202518 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 skip
10178 22:59:45.202601 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 skip
10179 22:59:45.202679 arm64_sve-ptrace_Set_SVE_VL_5696 pass
10180 22:59:45.202753 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 skip
10181 22:59:45.203015 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 skip
10182 22:59:45.203097 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 skip
10183 22:59:45.203177 arm64_sve-ptrace_Set_SVE_VL_5712 pass
10184 22:59:45.203249 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 skip
10185 22:59:45.203322 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 skip
10186 22:59:45.203603 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 skip
10187 22:59:45.203691 arm64_sve-ptrace_Set_SVE_VL_5728 pass
10188 22:59:45.207975 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 skip
10189 22:59:45.208186 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 skip
10190 22:59:45.208346 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 skip
10191 22:59:45.208716 arm64_sve-ptrace_Set_SVE_VL_5744 pass
10192 22:59:45.208900 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 skip
10193 22:59:45.209092 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 skip
10194 22:59:45.209281 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 skip
10195 22:59:45.209457 arm64_sve-ptrace_Set_SVE_VL_5760 pass
10196 22:59:45.209603 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 skip
10197 22:59:45.209801 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 skip
10198 22:59:45.209965 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 skip
10199 22:59:45.210116 arm64_sve-ptrace_Set_SVE_VL_5776 pass
10200 22:59:45.210284 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 skip
10201 22:59:45.210445 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 skip
10202 22:59:45.210620 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 skip
10203 22:59:45.210803 arm64_sve-ptrace_Set_SVE_VL_5792 pass
10204 22:59:45.210968 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 skip
10205 22:59:45.211129 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 skip
10206 22:59:45.211335 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 skip
10207 22:59:45.211504 arm64_sve-ptrace_Set_SVE_VL_5808 pass
10208 22:59:45.211687 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 skip
10209 22:59:45.211847 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 skip
10210 22:59:45.211968 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 skip
10211 22:59:45.212083 arm64_sve-ptrace_Set_SVE_VL_5824 pass
10212 22:59:45.212196 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 skip
10213 22:59:45.212313 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 skip
10214 22:59:45.212425 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 skip
10215 22:59:45.212538 arm64_sve-ptrace_Set_SVE_VL_5840 pass
10216 22:59:45.212650 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 skip
10217 22:59:45.212762 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 skip
10218 22:59:45.212875 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 skip
10219 22:59:45.213013 arm64_sve-ptrace_Set_SVE_VL_5856 pass
10220 22:59:45.213131 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 skip
10221 22:59:45.215825 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 skip
10222 22:59:45.216233 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 skip
10223 22:59:45.216336 arm64_sve-ptrace_Set_SVE_VL_5872 pass
10224 22:59:45.216424 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 skip
10225 22:59:45.216511 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 skip
10226 22:59:45.216611 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 skip
10227 22:59:45.216696 arm64_sve-ptrace_Set_SVE_VL_5888 pass
10228 22:59:45.216780 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 skip
10229 22:59:45.216874 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 skip
10230 22:59:45.217168 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 skip
10231 22:59:45.217274 arm64_sve-ptrace_Set_SVE_VL_5904 pass
10232 22:59:45.217373 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 skip
10233 22:59:45.217483 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 skip
10234 22:59:45.217801 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 skip
10235 22:59:45.217987 arm64_sve-ptrace_Set_SVE_VL_5920 pass
10236 22:59:45.218192 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 skip
10237 22:59:45.218363 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 skip
10238 22:59:45.218510 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 skip
10239 22:59:45.218662 arm64_sve-ptrace_Set_SVE_VL_5936 pass
10240 22:59:45.218848 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 skip
10241 22:59:45.219009 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 skip
10242 22:59:45.219152 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 skip
10243 22:59:45.219309 arm64_sve-ptrace_Set_SVE_VL_5952 pass
10244 22:59:45.219465 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 skip
10245 22:59:45.219685 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 skip
10246 22:59:45.219855 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 skip
10247 22:59:45.219987 arm64_sve-ptrace_Set_SVE_VL_5968 pass
10248 22:59:45.220103 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 skip
10249 22:59:45.220217 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 skip
10250 22:59:45.220329 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 skip
10251 22:59:45.223775 arm64_sve-ptrace_Set_SVE_VL_5984 pass
10252 22:59:45.224055 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 skip
10253 22:59:45.224147 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 skip
10254 22:59:45.224338 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 skip
10255 22:59:45.224511 arm64_sve-ptrace_Set_SVE_VL_6000 pass
10256 22:59:45.224677 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 skip
10257 22:59:45.224870 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 skip
10258 22:59:45.225035 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 skip
10259 22:59:45.225182 arm64_sve-ptrace_Set_SVE_VL_6016 pass
10260 22:59:45.225319 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 skip
10261 22:59:45.225487 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 skip
10262 22:59:45.225663 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 skip
10263 22:59:45.225832 arm64_sve-ptrace_Set_SVE_VL_6032 pass
10264 22:59:45.225990 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 skip
10265 22:59:45.226147 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 skip
10266 22:59:45.226309 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 skip
10267 22:59:45.226500 arm64_sve-ptrace_Set_SVE_VL_6048 pass
10268 22:59:45.226662 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 skip
10269 22:59:45.226819 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 skip
10270 22:59:45.226956 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 skip
10271 22:59:45.227114 arm64_sve-ptrace_Set_SVE_VL_6064 pass
10272 22:59:45.227277 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 skip
10273 22:59:45.227412 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 skip
10274 22:59:45.227566 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 skip
10275 22:59:45.227696 arm64_sve-ptrace_Set_SVE_VL_6080 pass
10276 22:59:45.227811 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 skip
10277 22:59:45.227954 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 skip
10278 22:59:45.228074 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 skip
10279 22:59:45.228188 arm64_sve-ptrace_Set_SVE_VL_6096 pass
10280 22:59:45.228301 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 skip
10281 22:59:45.228416 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 skip
10282 22:59:45.228529 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 skip
10283 22:59:45.228642 arm64_sve-ptrace_Set_SVE_VL_6112 pass
10284 22:59:45.228755 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 skip
10285 22:59:45.228869 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 skip
10286 22:59:45.228982 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 skip
10287 22:59:45.231783 arm64_sve-ptrace_Set_SVE_VL_6128 pass
10288 22:59:45.232236 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 skip
10289 22:59:45.232415 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 skip
10290 22:59:45.232552 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 skip
10291 22:59:45.232680 arm64_sve-ptrace_Set_SVE_VL_6144 pass
10292 22:59:45.232863 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 skip
10293 22:59:45.233059 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 skip
10294 22:59:45.233226 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 skip
10295 22:59:45.233388 arm64_sve-ptrace_Set_SVE_VL_6160 pass
10296 22:59:45.233540 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 skip
10297 22:59:45.233743 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 skip
10298 22:59:45.233912 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 skip
10299 22:59:45.234044 arm64_sve-ptrace_Set_SVE_VL_6176 pass
10300 22:59:45.234189 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 skip
10301 22:59:45.234353 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 skip
10302 22:59:45.234544 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 skip
10303 22:59:45.234694 arm64_sve-ptrace_Set_SVE_VL_6192 pass
10304 22:59:45.234812 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 skip
10305 22:59:45.234971 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 skip
10306 22:59:45.235108 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 skip
10307 22:59:45.235225 arm64_sve-ptrace_Set_SVE_VL_6208 pass
10308 22:59:45.235340 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 skip
10309 22:59:45.235454 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 skip
10310 22:59:45.235617 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 skip
10311 22:59:45.235747 arm64_sve-ptrace_Set_SVE_VL_6224 pass
10312 22:59:45.251483 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 skip
10313 22:59:45.251795 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 skip
10314 22:59:45.251907 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 skip
10315 22:59:45.252011 arm64_sve-ptrace_Set_SVE_VL_6240 pass
10316 22:59:45.252313 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 skip
10317 22:59:45.252416 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 skip
10318 22:59:45.252517 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 skip
10319 22:59:45.252616 arm64_sve-ptrace_Set_SVE_VL_6256 pass
10320 22:59:45.252715 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 skip
10321 22:59:45.253011 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 skip
10322 22:59:45.253128 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 skip
10323 22:59:45.253230 arm64_sve-ptrace_Set_SVE_VL_6272 pass
10324 22:59:45.253334 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 skip
10325 22:59:45.253635 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 skip
10326 22:59:45.253757 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 skip
10327 22:59:45.253843 arm64_sve-ptrace_Set_SVE_VL_6288 pass
10328 22:59:45.253939 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 skip
10329 22:59:45.254086 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 skip
10330 22:59:45.254332 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 skip
10331 22:59:45.254561 arm64_sve-ptrace_Set_SVE_VL_6304 pass
10332 22:59:45.254801 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 skip
10333 22:59:45.254995 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 skip
10334 22:59:45.255154 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 skip
10335 22:59:45.255372 arm64_sve-ptrace_Set_SVE_VL_6320 pass
10336 22:59:45.255547 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 skip
10337 22:59:45.255674 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 skip
10338 22:59:45.255790 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 skip
10339 22:59:45.255927 arm64_sve-ptrace_Set_SVE_VL_6336 pass
10340 22:59:45.256047 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 skip
10341 22:59:45.259783 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 skip
10342 22:59:45.260253 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 skip
10343 22:59:45.260426 arm64_sve-ptrace_Set_SVE_VL_6352 pass
10344 22:59:45.260627 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 skip
10345 22:59:45.260807 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 skip
10346 22:59:45.260958 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 skip
10347 22:59:45.261124 arm64_sve-ptrace_Set_SVE_VL_6368 pass
10348 22:59:45.261247 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 skip
10349 22:59:45.261367 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 skip
10350 22:59:45.261482 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 skip
10351 22:59:45.261611 arm64_sve-ptrace_Set_SVE_VL_6384 pass
10352 22:59:45.261810 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 skip
10353 22:59:45.262052 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 skip
10354 22:59:45.262214 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 skip
10355 22:59:45.262364 arm64_sve-ptrace_Set_SVE_VL_6400 pass
10356 22:59:45.262530 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 skip
10357 22:59:45.262696 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 skip
10358 22:59:45.262887 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 skip
10359 22:59:45.263061 arm64_sve-ptrace_Set_SVE_VL_6416 pass
10360 22:59:45.263232 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 skip
10361 22:59:45.263398 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 skip
10362 22:59:45.263604 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 skip
10363 22:59:45.263747 arm64_sve-ptrace_Set_SVE_VL_6432 pass
10364 22:59:45.263865 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 skip
10365 22:59:45.263979 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 skip
10366 22:59:45.264091 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 skip
10367 22:59:45.264202 arm64_sve-ptrace_Set_SVE_VL_6448 pass
10368 22:59:45.264314 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 skip
10369 22:59:45.264425 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 skip
10370 22:59:45.264536 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 skip
10371 22:59:45.264647 arm64_sve-ptrace_Set_SVE_VL_6464 pass
10372 22:59:45.264757 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 skip
10373 22:59:45.264868 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 skip
10374 22:59:45.264978 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 skip
10375 22:59:45.265091 arm64_sve-ptrace_Set_SVE_VL_6480 pass
10376 22:59:45.267796 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 skip
10377 22:59:45.268209 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 skip
10378 22:59:45.268379 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 skip
10379 22:59:45.268533 arm64_sve-ptrace_Set_SVE_VL_6496 pass
10380 22:59:45.268670 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 skip
10381 22:59:45.268805 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 skip
10382 22:59:45.268966 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 skip
10383 22:59:45.269107 arm64_sve-ptrace_Set_SVE_VL_6512 pass
10384 22:59:45.269256 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 skip
10385 22:59:45.269415 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 skip
10386 22:59:45.269565 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 skip
10387 22:59:45.269723 arm64_sve-ptrace_Set_SVE_VL_6528 pass
10388 22:59:45.269892 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 skip
10389 22:59:45.270045 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 skip
10390 22:59:45.270175 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 skip
10391 22:59:45.270318 arm64_sve-ptrace_Set_SVE_VL_6544 pass
10392 22:59:45.270502 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 skip
10393 22:59:45.270654 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 skip
10394 22:59:45.270775 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 skip
10395 22:59:45.270896 arm64_sve-ptrace_Set_SVE_VL_6560 pass
10396 22:59:45.271124 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 skip
10397 22:59:45.271292 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 skip
10398 22:59:45.271447 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 skip
10399 22:59:45.271588 arm64_sve-ptrace_Set_SVE_VL_6576 pass
10400 22:59:45.271706 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 skip
10401 22:59:45.271823 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 skip
10402 22:59:45.271938 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 skip
10403 22:59:45.272053 arm64_sve-ptrace_Set_SVE_VL_6592 pass
10404 22:59:45.272169 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 skip
10405 22:59:45.272284 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 skip
10406 22:59:45.272402 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 skip
10407 22:59:45.272518 arm64_sve-ptrace_Set_SVE_VL_6608 pass
10408 22:59:45.272635 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 skip
10409 22:59:45.272778 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 skip
10410 22:59:45.272897 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 skip
10411 22:59:45.273015 arm64_sve-ptrace_Set_SVE_VL_6624 pass
10412 22:59:45.273132 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 skip
10413 22:59:45.273249 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 skip
10414 22:59:45.275891 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 skip
10415 22:59:45.276307 arm64_sve-ptrace_Set_SVE_VL_6640 pass
10416 22:59:45.276483 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 skip
10417 22:59:45.276641 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 skip
10418 22:59:45.276799 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 skip
10419 22:59:45.276963 arm64_sve-ptrace_Set_SVE_VL_6656 pass
10420 22:59:45.277171 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 skip
10421 22:59:45.277425 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 skip
10422 22:59:45.277625 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 skip
10423 22:59:45.277820 arm64_sve-ptrace_Set_SVE_VL_6672 pass
10424 22:59:45.277987 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 skip
10425 22:59:45.278154 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 skip
10426 22:59:45.278316 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 skip
10427 22:59:45.278482 arm64_sve-ptrace_Set_SVE_VL_6688 pass
10428 22:59:45.278644 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 skip
10429 22:59:45.278804 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 skip
10430 22:59:45.278993 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 skip
10431 22:59:45.279244 arm64_sve-ptrace_Set_SVE_VL_6704 pass
10432 22:59:45.279421 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 skip
10433 22:59:45.279572 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 skip
10434 22:59:45.279729 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 skip
10435 22:59:45.279871 arm64_sve-ptrace_Set_SVE_VL_6720 pass
10436 22:59:45.279987 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 skip
10437 22:59:45.280101 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 skip
10438 22:59:45.280215 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 skip
10439 22:59:45.280328 arm64_sve-ptrace_Set_SVE_VL_6736 pass
10440 22:59:45.280440 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 skip
10441 22:59:45.280553 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 skip
10442 22:59:45.280667 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 skip
10443 22:59:45.280780 arm64_sve-ptrace_Set_SVE_VL_6752 pass
10444 22:59:45.280891 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 skip
10445 22:59:45.281030 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 skip
10446 22:59:45.281149 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 skip
10447 22:59:45.281264 arm64_sve-ptrace_Set_SVE_VL_6768 pass
10448 22:59:45.281378 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 skip
10449 22:59:45.283807 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 skip
10450 22:59:45.284205 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 skip
10451 22:59:45.284309 arm64_sve-ptrace_Set_SVE_VL_6784 pass
10452 22:59:45.284400 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 skip
10453 22:59:45.284485 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 skip
10454 22:59:45.284583 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 skip
10455 22:59:45.284669 arm64_sve-ptrace_Set_SVE_VL_6800 pass
10456 22:59:45.284766 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 skip
10457 22:59:45.284862 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 skip
10458 22:59:45.284968 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 skip
10459 22:59:45.285066 arm64_sve-ptrace_Set_SVE_VL_6816 pass
10460 22:59:45.285396 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 skip
10461 22:59:45.285602 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 skip
10462 22:59:45.285783 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 skip
10463 22:59:45.285976 arm64_sve-ptrace_Set_SVE_VL_6832 pass
10464 22:59:45.286119 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 skip
10465 22:59:45.286280 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 skip
10466 22:59:45.286488 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 skip
10467 22:59:45.286653 arm64_sve-ptrace_Set_SVE_VL_6848 pass
10468 22:59:45.286778 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 skip
10469 22:59:45.286895 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 skip
10470 22:59:45.287054 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 skip
10471 22:59:45.287181 arm64_sve-ptrace_Set_SVE_VL_6864 pass
10472 22:59:45.302461 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 skip
10473 22:59:45.302802 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 skip
10474 22:59:45.302991 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 skip
10475 22:59:45.303138 arm64_sve-ptrace_Set_SVE_VL_6880 pass
10476 22:59:45.303324 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 skip
10477 22:59:45.303452 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 skip
10478 22:59:45.303576 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 skip
10479 22:59:45.303690 arm64_sve-ptrace_Set_SVE_VL_6896 pass
10480 22:59:45.303806 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 skip
10481 22:59:45.303991 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 skip
10482 22:59:45.304150 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 skip
10483 22:59:45.304304 arm64_sve-ptrace_Set_SVE_VL_6912 pass
10484 22:59:45.304447 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 skip
10485 22:59:45.304598 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 skip
10486 22:59:45.304820 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 skip
10487 22:59:45.304987 arm64_sve-ptrace_Set_SVE_VL_6928 pass
10488 22:59:45.305147 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 skip
10489 22:59:45.305296 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 skip
10490 22:59:45.305446 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 skip
10491 22:59:45.305600 arm64_sve-ptrace_Set_SVE_VL_6944 pass
10492 22:59:45.305776 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 skip
10493 22:59:45.305938 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 skip
10494 22:59:45.306132 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 skip
10495 22:59:45.306301 arm64_sve-ptrace_Set_SVE_VL_6960 pass
10496 22:59:45.306468 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 skip
10497 22:59:45.306631 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 skip
10498 22:59:45.306793 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 skip
10499 22:59:45.306957 arm64_sve-ptrace_Set_SVE_VL_6976 pass
10500 22:59:45.307121 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 skip
10501 22:59:45.307281 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 skip
10502 22:59:45.307446 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 skip
10503 22:59:45.307590 arm64_sve-ptrace_Set_SVE_VL_6992 pass
10504 22:59:45.307706 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 skip
10505 22:59:45.307820 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 skip
10506 22:59:45.307960 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 skip
10507 22:59:45.308080 arm64_sve-ptrace_Set_SVE_VL_7008 pass
10508 22:59:45.308194 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 skip
10509 22:59:45.308306 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 skip
10510 22:59:45.308424 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 skip
10511 22:59:45.308768 arm64_sve-ptrace_Set_SVE_VL_7024 pass
10512 22:59:45.308923 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 skip
10513 22:59:45.309045 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 skip
10514 22:59:45.309162 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 skip
10515 22:59:45.309278 arm64_sve-ptrace_Set_SVE_VL_7040 pass
10516 22:59:45.309393 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 skip
10517 22:59:45.311740 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 skip
10518 22:59:45.312119 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 skip
10519 22:59:45.312231 arm64_sve-ptrace_Set_SVE_VL_7056 pass
10520 22:59:45.312316 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 skip
10521 22:59:45.312413 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 skip
10522 22:59:45.312495 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 skip
10523 22:59:45.312592 arm64_sve-ptrace_Set_SVE_VL_7072 pass
10524 22:59:45.312688 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 skip
10525 22:59:45.312787 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 skip
10526 22:59:45.313083 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 skip
10527 22:59:45.313186 arm64_sve-ptrace_Set_SVE_VL_7088 pass
10528 22:59:45.313284 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 skip
10529 22:59:45.313383 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 skip
10530 22:59:45.313625 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 skip
10531 22:59:45.313862 arm64_sve-ptrace_Set_SVE_VL_7104 pass
10532 22:59:45.314020 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 skip
10533 22:59:45.314190 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 skip
10534 22:59:45.314347 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 skip
10535 22:59:45.314541 arm64_sve-ptrace_Set_SVE_VL_7120 pass
10536 22:59:45.314703 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 skip
10537 22:59:45.314856 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 skip
10538 22:59:45.314994 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 skip
10539 22:59:45.315170 arm64_sve-ptrace_Set_SVE_VL_7136 pass
10540 22:59:45.315322 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 skip
10541 22:59:45.315478 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 skip
10542 22:59:45.315665 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 skip
10543 22:59:45.315824 arm64_sve-ptrace_Set_SVE_VL_7152 pass
10544 22:59:45.315944 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 skip
10545 22:59:45.316060 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 skip
10546 22:59:45.316173 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 skip
10547 22:59:45.319781 arm64_sve-ptrace_Set_SVE_VL_7168 pass
10548 22:59:45.320158 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 skip
10549 22:59:45.320257 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 skip
10550 22:59:45.320357 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 skip
10551 22:59:45.320444 arm64_sve-ptrace_Set_SVE_VL_7184 pass
10552 22:59:45.320541 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 skip
10553 22:59:45.320835 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 skip
10554 22:59:45.320932 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 skip
10555 22:59:45.321032 arm64_sve-ptrace_Set_SVE_VL_7200 pass
10556 22:59:45.321117 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 skip
10557 22:59:45.321215 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 skip
10558 22:59:45.321606 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 skip
10559 22:59:45.321817 arm64_sve-ptrace_Set_SVE_VL_7216 pass
10560 22:59:45.321998 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 skip
10561 22:59:45.322163 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 skip
10562 22:59:45.322312 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 skip
10563 22:59:45.322491 arm64_sve-ptrace_Set_SVE_VL_7232 pass
10564 22:59:45.322641 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 skip
10565 22:59:45.322772 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 skip
10566 22:59:45.322923 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 skip
10567 22:59:45.323114 arm64_sve-ptrace_Set_SVE_VL_7248 pass
10568 22:59:45.323274 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 skip
10569 22:59:45.323435 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 skip
10570 22:59:45.323618 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 skip
10571 22:59:45.323757 arm64_sve-ptrace_Set_SVE_VL_7264 pass
10572 22:59:45.323902 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 skip
10573 22:59:45.324024 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 skip
10574 22:59:45.324139 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 skip
10575 22:59:45.327805 arm64_sve-ptrace_Set_SVE_VL_7280 pass
10576 22:59:45.328113 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 skip
10577 22:59:45.328205 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 skip
10578 22:59:45.328302 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 skip
10579 22:59:45.328386 arm64_sve-ptrace_Set_SVE_VL_7296 pass
10580 22:59:45.328483 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 skip
10581 22:59:45.328589 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 skip
10582 22:59:45.328688 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 skip
10583 22:59:45.328986 arm64_sve-ptrace_Set_SVE_VL_7312 pass
10584 22:59:45.329084 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 skip
10585 22:59:45.329180 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 skip
10586 22:59:45.329276 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 skip
10587 22:59:45.329372 arm64_sve-ptrace_Set_SVE_VL_7328 pass
10588 22:59:45.329659 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 skip
10589 22:59:45.329749 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 skip
10590 22:59:45.329843 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 skip
10591 22:59:45.329942 arm64_sve-ptrace_Set_SVE_VL_7344 pass
10592 22:59:45.330224 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 skip
10593 22:59:45.330313 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 skip
10594 22:59:45.330415 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 skip
10595 22:59:45.330512 arm64_sve-ptrace_Set_SVE_VL_7360 pass
10596 22:59:45.330810 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 skip
10597 22:59:45.330898 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 skip
10598 22:59:45.330996 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 skip
10599 22:59:45.331093 arm64_sve-ptrace_Set_SVE_VL_7376 pass
10600 22:59:45.331192 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 skip
10601 22:59:45.331485 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 skip
10602 22:59:45.331572 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 skip
10603 22:59:45.331672 arm64_sve-ptrace_Set_SVE_VL_7392 pass
10604 22:59:45.335897 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 skip
10605 22:59:45.336246 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 skip
10606 22:59:45.336336 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 skip
10607 22:59:45.336422 arm64_sve-ptrace_Set_SVE_VL_7408 pass
10608 22:59:45.336512 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 skip
10609 22:59:45.336609 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 skip
10610 22:59:45.336695 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 skip
10611 22:59:45.336777 arm64_sve-ptrace_Set_SVE_VL_7424 pass
10612 22:59:45.336875 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 skip
10613 22:59:45.337203 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 skip
10614 22:59:45.337391 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 skip
10615 22:59:45.337554 arm64_sve-ptrace_Set_SVE_VL_7440 pass
10616 22:59:45.337770 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 skip
10617 22:59:45.337924 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 skip
10618 22:59:45.338065 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 skip
10619 22:59:45.338215 arm64_sve-ptrace_Set_SVE_VL_7456 pass
10620 22:59:45.338399 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 skip
10621 22:59:45.338556 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 skip
10622 22:59:45.338678 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 skip
10623 22:59:45.338796 arm64_sve-ptrace_Set_SVE_VL_7472 pass
10624 22:59:45.338913 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 skip
10625 22:59:45.339053 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 skip
10626 22:59:45.339177 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 skip
10627 22:59:45.339317 arm64_sve-ptrace_Set_SVE_VL_7488 pass
10628 22:59:45.339451 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 skip
10629 22:59:45.339622 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 skip
10630 22:59:45.339757 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 skip
10631 22:59:45.339884 arm64_sve-ptrace_Set_SVE_VL_7504 pass
10632 22:59:45.356701 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 skip
10633 22:59:45.357175 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 skip
10634 22:59:45.357278 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 skip
10635 22:59:45.357365 arm64_sve-ptrace_Set_SVE_VL_7520 pass
10636 22:59:45.357443 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 skip
10637 22:59:45.357533 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 skip
10638 22:59:45.357607 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 skip
10639 22:59:45.357682 arm64_sve-ptrace_Set_SVE_VL_7536 pass
10640 22:59:45.357764 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 skip
10641 22:59:45.357845 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 skip
10642 22:59:45.357923 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 skip
10643 22:59:45.358211 arm64_sve-ptrace_Set_SVE_VL_7552 pass
10644 22:59:45.358329 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 skip
10645 22:59:45.358436 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 skip
10646 22:59:45.358542 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 skip
10647 22:59:45.358662 arm64_sve-ptrace_Set_SVE_VL_7568 pass
10648 22:59:45.358767 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 skip
10649 22:59:45.358889 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 skip
10650 22:59:45.358993 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 skip
10651 22:59:45.359091 arm64_sve-ptrace_Set_SVE_VL_7584 pass
10652 22:59:45.359192 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 skip
10653 22:59:45.359273 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 skip
10654 22:59:45.359340 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 skip
10655 22:59:45.359431 arm64_sve-ptrace_Set_SVE_VL_7600 pass
10656 22:59:45.359537 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 skip
10657 22:59:45.359650 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 skip
10658 22:59:45.359736 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 skip
10659 22:59:45.363947 arm64_sve-ptrace_Set_SVE_VL_7616 pass
10660 22:59:45.364169 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 skip
10661 22:59:45.364467 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 skip
10662 22:59:45.364564 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 skip
10663 22:59:45.364649 arm64_sve-ptrace_Set_SVE_VL_7632 pass
10664 22:59:45.364747 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 skip
10665 22:59:45.364834 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 skip
10666 22:59:45.364920 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 skip
10667 22:59:45.365019 arm64_sve-ptrace_Set_SVE_VL_7648 pass
10668 22:59:45.365106 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 skip
10669 22:59:45.365203 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 skip
10670 22:59:45.365303 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 skip
10671 22:59:45.365404 arm64_sve-ptrace_Set_SVE_VL_7664 pass
10672 22:59:45.365687 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 skip
10673 22:59:45.365792 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 skip
10674 22:59:45.365893 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 skip
10675 22:59:45.366167 arm64_sve-ptrace_Set_SVE_VL_7680 pass
10676 22:59:45.366255 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 skip
10677 22:59:45.366355 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 skip
10678 22:59:45.366455 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 skip
10679 22:59:45.366560 arm64_sve-ptrace_Set_SVE_VL_7696 pass
10680 22:59:45.366659 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 skip
10681 22:59:45.366920 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 skip
10682 22:59:45.367022 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 skip
10683 22:59:45.367123 arm64_sve-ptrace_Set_SVE_VL_7712 pass
10684 22:59:45.367224 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 skip
10685 22:59:45.367542 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 skip
10686 22:59:45.367640 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 skip
10687 22:59:45.372193 arm64_sve-ptrace_Set_SVE_VL_7728 pass
10688 22:59:45.372437 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 skip
10689 22:59:45.372741 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 skip
10690 22:59:45.372822 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 skip
10691 22:59:45.372885 arm64_sve-ptrace_Set_SVE_VL_7744 pass
10692 22:59:45.372946 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 skip
10693 22:59:45.373006 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 skip
10694 22:59:45.373078 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 skip
10695 22:59:45.373142 arm64_sve-ptrace_Set_SVE_VL_7760 pass
10696 22:59:45.373206 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 skip
10697 22:59:45.373282 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 skip
10698 22:59:45.373347 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 skip
10699 22:59:45.373424 arm64_sve-ptrace_Set_SVE_VL_7776 pass
10700 22:59:45.373502 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 skip
10701 22:59:45.373597 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 skip
10702 22:59:45.373704 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 skip
10703 22:59:45.373798 arm64_sve-ptrace_Set_SVE_VL_7792 pass
10704 22:59:45.373879 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 skip
10705 22:59:45.374162 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 skip
10706 22:59:45.374260 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 skip
10707 22:59:45.374358 arm64_sve-ptrace_Set_SVE_VL_7808 pass
10708 22:59:45.374442 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 skip
10709 22:59:45.374542 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 skip
10710 22:59:45.374618 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 skip
10711 22:59:45.374705 arm64_sve-ptrace_Set_SVE_VL_7824 pass
10712 22:59:45.374785 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 skip
10713 22:59:45.374881 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 skip
10714 22:59:45.375017 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 skip
10715 22:59:45.375140 arm64_sve-ptrace_Set_SVE_VL_7840 pass
10716 22:59:45.375239 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 skip
10717 22:59:45.375354 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 skip
10718 22:59:45.375470 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 skip
10719 22:59:45.375578 arm64_sve-ptrace_Set_SVE_VL_7856 pass
10720 22:59:45.375697 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 skip
10721 22:59:45.379951 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 skip
10722 22:59:45.380389 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 skip
10723 22:59:45.380480 arm64_sve-ptrace_Set_SVE_VL_7872 pass
10724 22:59:45.380569 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 skip
10725 22:59:45.380655 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 skip
10726 22:59:45.380754 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 skip
10727 22:59:45.380838 arm64_sve-ptrace_Set_SVE_VL_7888 pass
10728 22:59:45.380936 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 skip
10729 22:59:45.381034 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 skip
10730 22:59:45.381134 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 skip
10731 22:59:45.381233 arm64_sve-ptrace_Set_SVE_VL_7904 pass
10732 22:59:45.381528 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 skip
10733 22:59:45.381641 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 skip
10734 22:59:45.381751 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 skip
10735 22:59:45.381858 arm64_sve-ptrace_Set_SVE_VL_7920 pass
10736 22:59:45.382122 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 skip
10737 22:59:45.382216 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 skip
10738 22:59:45.382296 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 skip
10739 22:59:45.382373 arm64_sve-ptrace_Set_SVE_VL_7936 pass
10740 22:59:45.382649 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 skip
10741 22:59:45.382733 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 skip
10742 22:59:45.382808 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 skip
10743 22:59:45.383072 arm64_sve-ptrace_Set_SVE_VL_7952 pass
10744 22:59:45.383162 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 skip
10745 22:59:45.383248 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 skip
10746 22:59:45.383326 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 skip
10747 22:59:45.383411 arm64_sve-ptrace_Set_SVE_VL_7968 pass
10748 22:59:45.383569 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 skip
10749 22:59:45.383654 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 skip
10750 22:59:45.387968 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 skip
10751 22:59:45.388215 arm64_sve-ptrace_Set_SVE_VL_7984 pass
10752 22:59:45.388517 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 skip
10753 22:59:45.388612 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 skip
10754 22:59:45.388699 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 skip
10755 22:59:45.388787 arm64_sve-ptrace_Set_SVE_VL_8000 pass
10756 22:59:45.388890 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 skip
10757 22:59:45.388979 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 skip
10758 22:59:45.389080 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 skip
10759 22:59:45.389169 arm64_sve-ptrace_Set_SVE_VL_8016 pass
10760 22:59:45.389271 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 skip
10761 22:59:45.389359 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 skip
10762 22:59:45.389461 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 skip
10763 22:59:45.389564 arm64_sve-ptrace_Set_SVE_VL_8032 pass
10764 22:59:45.389676 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 skip
10765 22:59:45.389780 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 skip
10766 22:59:45.389881 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 skip
10767 22:59:45.389982 arm64_sve-ptrace_Set_SVE_VL_8048 pass
10768 22:59:45.390084 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 skip
10769 22:59:45.390404 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 skip
10770 22:59:45.390498 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 skip
10771 22:59:45.390602 arm64_sve-ptrace_Set_SVE_VL_8064 pass
10772 22:59:45.390691 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 skip
10773 22:59:45.390793 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 skip
10774 22:59:45.390897 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 skip
10775 22:59:45.390999 arm64_sve-ptrace_Set_SVE_VL_8080 pass
10776 22:59:45.391307 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 skip
10777 22:59:45.391409 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 skip
10778 22:59:45.391497 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 skip
10779 22:59:45.391608 arm64_sve-ptrace_Set_SVE_VL_8096 pass
10780 22:59:45.391696 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 skip
10781 22:59:45.395863 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 skip
10782 22:59:45.396157 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 skip
10783 22:59:45.396249 arm64_sve-ptrace_Set_SVE_VL_8112 pass
10784 22:59:45.396335 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 skip
10785 22:59:45.396437 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 skip
10786 22:59:45.396525 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 skip
10787 22:59:45.396628 arm64_sve-ptrace_Set_SVE_VL_8128 pass
10788 22:59:45.396730 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 skip
10789 22:59:45.396832 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 skip
10790 22:59:45.396933 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 skip
10791 22:59:45.397034 arm64_sve-ptrace_Set_SVE_VL_8144 pass
10792 22:59:45.408830 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 skip
10793 22:59:45.409184 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 skip
10794 22:59:45.409367 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 skip
10795 22:59:45.409556 arm64_sve-ptrace_Set_SVE_VL_8160 pass
10796 22:59:45.409766 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 skip
10797 22:59:45.409930 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 skip
10798 22:59:45.410092 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 skip
10799 22:59:45.410281 arm64_sve-ptrace_Set_SVE_VL_8176 pass
10800 22:59:45.410445 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 skip
10801 22:59:45.410636 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 skip
10802 22:59:45.410797 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 skip
10803 22:59:45.410940 arm64_sve-ptrace_Set_SVE_VL_8192 pass
10804 22:59:45.411079 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 skip
10805 22:59:45.411211 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 skip
10806 22:59:45.411347 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 skip
10807 22:59:45.411493 arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 pass
10808 22:59:45.411675 arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state pass
10809 22:59:45.411799 arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set pass
10810 22:59:45.411914 arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared pass
10811 22:59:45.412030 arm64_sve-ptrace_Set_Streaming_SVE_VL_16 pass
10812 22:59:45.412144 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 pass
10813 22:59:45.412258 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 pass
10814 22:59:45.412372 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 pass
10815 22:59:45.415750 arm64_sve-ptrace_Set_Streaming_SVE_VL_32 pass
10816 22:59:45.416122 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 pass
10817 22:59:45.416225 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 pass
10818 22:59:45.416329 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 pass
10819 22:59:45.416417 arm64_sve-ptrace_Set_Streaming_SVE_VL_48 pass
10820 22:59:45.416518 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 skip
10821 22:59:45.416620 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 skip
10822 22:59:45.416721 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 skip
10823 22:59:45.416823 arm64_sve-ptrace_Set_Streaming_SVE_VL_64 pass
10824 22:59:45.417124 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 pass
10825 22:59:45.417226 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 pass
10826 22:59:45.417328 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 pass
10827 22:59:45.417438 arm64_sve-ptrace_Set_Streaming_SVE_VL_80 pass
10828 22:59:45.417687 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 skip
10829 22:59:45.417793 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 skip
10830 22:59:45.418091 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 skip
10831 22:59:45.418197 arm64_sve-ptrace_Set_Streaming_SVE_VL_96 pass
10832 22:59:45.418299 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 skip
10833 22:59:45.418619 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 skip
10834 22:59:45.418698 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 skip
10835 22:59:45.418995 arm64_sve-ptrace_Set_Streaming_SVE_VL_112 pass
10836 22:59:45.419089 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 skip
10837 22:59:45.419168 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 skip
10838 22:59:45.419259 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 skip
10839 22:59:45.419337 arm64_sve-ptrace_Set_Streaming_SVE_VL_128 pass
10840 22:59:45.419429 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 pass
10841 22:59:45.423777 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 pass
10842 22:59:45.424213 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 pass
10843 22:59:45.424396 arm64_sve-ptrace_Set_Streaming_SVE_VL_144 pass
10844 22:59:45.424564 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 skip
10845 22:59:45.424760 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 skip
10846 22:59:45.424922 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 skip
10847 22:59:45.425090 arm64_sve-ptrace_Set_Streaming_SVE_VL_160 pass
10848 22:59:45.425254 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 skip
10849 22:59:45.425418 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 skip
10850 22:59:45.425609 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 skip
10851 22:59:45.425789 arm64_sve-ptrace_Set_Streaming_SVE_VL_176 pass
10852 22:59:45.425953 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 skip
10853 22:59:45.426108 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 skip
10854 22:59:45.426272 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 skip
10855 22:59:45.426421 arm64_sve-ptrace_Set_Streaming_SVE_VL_192 pass
10856 22:59:45.426575 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 skip
10857 22:59:45.426753 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 skip
10858 22:59:45.426880 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 skip
10859 22:59:45.427031 arm64_sve-ptrace_Set_Streaming_SVE_VL_208 pass
10860 22:59:45.427248 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 skip
10861 22:59:45.427434 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 skip
10862 22:59:45.427606 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 skip
10863 22:59:45.427729 arm64_sve-ptrace_Set_Streaming_SVE_VL_224 pass
10864 22:59:45.427846 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 skip
10865 22:59:45.427989 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 skip
10866 22:59:45.428112 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 skip
10867 22:59:45.428228 arm64_sve-ptrace_Set_Streaming_SVE_VL_240 pass
10868 22:59:45.428343 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 skip
10869 22:59:45.428458 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 skip
10870 22:59:45.431793 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 skip
10871 22:59:45.432222 arm64_sve-ptrace_Set_Streaming_SVE_VL_256 pass
10872 22:59:45.432423 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 pass
10873 22:59:45.432628 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 pass
10874 22:59:45.432837 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 pass
10875 22:59:45.433007 arm64_sve-ptrace_Set_Streaming_SVE_VL_272 pass
10876 22:59:45.433170 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 skip
10877 22:59:45.433332 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 skip
10878 22:59:45.433497 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 skip
10879 22:59:45.433707 arm64_sve-ptrace_Set_Streaming_SVE_VL_288 pass
10880 22:59:45.433873 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 skip
10881 22:59:45.434035 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 skip
10882 22:59:45.434199 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 skip
10883 22:59:45.434356 arm64_sve-ptrace_Set_Streaming_SVE_VL_304 pass
10884 22:59:45.434522 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 skip
10885 22:59:45.434715 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 skip
10886 22:59:45.434880 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 skip
10887 22:59:45.435032 arm64_sve-ptrace_Set_Streaming_SVE_VL_320 pass
10888 22:59:45.435166 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 skip
10889 22:59:45.435285 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 skip
10890 22:59:45.435409 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 skip
10891 22:59:45.435545 arm64_sve-ptrace_Set_Streaming_SVE_VL_336 pass
10892 22:59:45.435666 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 skip
10893 22:59:45.435782 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 skip
10894 22:59:45.435923 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 skip
10895 22:59:45.436043 arm64_sve-ptrace_Set_Streaming_SVE_VL_352 pass
10896 22:59:45.436159 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 skip
10897 22:59:45.436275 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 skip
10898 22:59:45.436390 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 skip
10899 22:59:45.439966 arm64_sve-ptrace_Set_Streaming_SVE_VL_368 pass
10900 22:59:45.440150 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 skip
10901 22:59:45.440306 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 skip
10902 22:59:45.440500 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 skip
10903 22:59:45.440674 arm64_sve-ptrace_Set_Streaming_SVE_VL_384 pass
10904 22:59:45.440863 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 skip
10905 22:59:45.441029 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 skip
10906 22:59:45.441222 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 skip
10907 22:59:45.441392 arm64_sve-ptrace_Set_Streaming_SVE_VL_400 pass
10908 22:59:45.441555 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 skip
10909 22:59:45.441757 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 skip
10910 22:59:45.441920 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 skip
10911 22:59:45.442081 arm64_sve-ptrace_Set_Streaming_SVE_VL_416 pass
10912 22:59:45.442243 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 skip
10913 22:59:45.442429 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 skip
10914 22:59:45.442586 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 skip
10915 22:59:45.442754 arm64_sve-ptrace_Set_Streaming_SVE_VL_432 pass
10916 22:59:45.442920 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 skip
10917 22:59:45.443072 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 skip
10918 22:59:45.443237 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 skip
10919 22:59:45.443436 arm64_sve-ptrace_Set_Streaming_SVE_VL_448 pass
10920 22:59:45.443597 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 skip
10921 22:59:45.443721 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 skip
10922 22:59:45.443837 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 skip
10923 22:59:45.443953 arm64_sve-ptrace_Set_Streaming_SVE_VL_464 pass
10924 22:59:45.444069 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 skip
10925 22:59:45.444208 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 skip
10926 22:59:45.447828 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 skip
10927 22:59:45.448249 arm64_sve-ptrace_Set_Streaming_SVE_VL_480 pass
10928 22:59:45.448380 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 skip
10929 22:59:45.457868 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 skip
10930 22:59:45.458289 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 skip
10931 22:59:45.458423 arm64_sve-ptrace_Set_Streaming_SVE_VL_496 pass
10932 22:59:45.458542 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 skip
10933 22:59:45.458669 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 skip
10934 22:59:45.458769 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 skip
10935 22:59:45.458876 arm64_sve-ptrace_Set_Streaming_SVE_VL_512 pass
10936 22:59:45.458995 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 skip
10937 22:59:45.459087 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 skip
10938 22:59:45.459167 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 skip
10939 22:59:45.459262 arm64_sve-ptrace_Set_Streaming_SVE_VL_528 pass
10940 22:59:45.459542 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 skip
10941 22:59:45.459626 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 skip
10942 22:59:45.459736 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 skip
10943 22:59:45.459820 arm64_sve-ptrace_Set_Streaming_SVE_VL_544 pass
10944 22:59:45.459914 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 skip
10945 22:59:45.460011 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 skip
10946 22:59:45.460108 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 skip
10947 22:59:45.460193 arm64_sve-ptrace_Set_Streaming_SVE_VL_560 pass
10948 22:59:45.460602 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 skip
10949 22:59:45.460708 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 skip
10950 22:59:45.460990 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 skip
10951 22:59:45.461085 arm64_sve-ptrace_Set_Streaming_SVE_VL_576 pass
10952 22:59:45.461183 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 skip
10953 22:59:45.461268 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 skip
10954 22:59:45.461376 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 skip
10955 22:59:45.461511 arm64_sve-ptrace_Set_Streaming_SVE_VL_592 pass
10956 22:59:45.461618 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 skip
10957 22:59:45.461728 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 skip
10958 22:59:45.461810 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 skip
10959 22:59:45.461933 arm64_sve-ptrace_Set_Streaming_SVE_VL_608 pass
10960 22:59:45.462021 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 skip
10961 22:59:45.462099 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 skip
10962 22:59:45.462186 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 skip
10963 22:59:45.462261 arm64_sve-ptrace_Set_Streaming_SVE_VL_624 pass
10964 22:59:45.462336 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 skip
10965 22:59:45.462431 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 skip
10966 22:59:45.462516 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 skip
10967 22:59:45.462609 arm64_sve-ptrace_Set_Streaming_SVE_VL_640 pass
10968 22:59:45.462709 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 skip
10969 22:59:45.463014 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 skip
10970 22:59:45.463122 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 skip
10971 22:59:45.463215 arm64_sve-ptrace_Set_Streaming_SVE_VL_656 pass
10972 22:59:45.463310 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 skip
10973 22:59:45.463628 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 skip
10974 22:59:45.463786 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 skip
10975 22:59:45.467851 arm64_sve-ptrace_Set_Streaming_SVE_VL_672 pass
10976 22:59:45.468072 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 skip
10977 22:59:45.468542 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 skip
10978 22:59:45.468673 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 skip
10979 22:59:45.468766 arm64_sve-ptrace_Set_Streaming_SVE_VL_688 pass
10980 22:59:45.468852 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 skip
10981 22:59:45.468935 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 skip
10982 22:59:45.469030 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 skip
10983 22:59:45.469110 arm64_sve-ptrace_Set_Streaming_SVE_VL_704 pass
10984 22:59:45.469187 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 skip
10985 22:59:45.469277 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 skip
10986 22:59:45.469359 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 skip
10987 22:59:45.469438 arm64_sve-ptrace_Set_Streaming_SVE_VL_720 pass
10988 22:59:45.469779 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 skip
10989 22:59:45.469870 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 skip
10990 22:59:45.469951 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 skip
10991 22:59:45.470029 arm64_sve-ptrace_Set_Streaming_SVE_VL_736 pass
10992 22:59:45.470124 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 skip
10993 22:59:45.470395 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 skip
10994 22:59:45.470482 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 skip
10995 22:59:45.470561 arm64_sve-ptrace_Set_Streaming_SVE_VL_752 pass
10996 22:59:45.470646 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 skip
10997 22:59:45.470724 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 skip
10998 22:59:45.470829 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 skip
10999 22:59:45.470923 arm64_sve-ptrace_Set_Streaming_SVE_VL_768 pass
11000 22:59:45.471003 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 skip
11001 22:59:45.471093 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 skip
11002 22:59:45.471173 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 skip
11003 22:59:45.471263 arm64_sve-ptrace_Set_Streaming_SVE_VL_784 pass
11004 22:59:45.471539 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 skip
11005 22:59:45.471621 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 skip
11006 22:59:45.471684 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 skip
11007 22:59:45.475758 arm64_sve-ptrace_Set_Streaming_SVE_VL_800 pass
11008 22:59:45.476165 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 skip
11009 22:59:45.476343 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 skip
11010 22:59:45.476507 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 skip
11011 22:59:45.476677 arm64_sve-ptrace_Set_Streaming_SVE_VL_816 pass
11012 22:59:45.476812 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 skip
11013 22:59:45.476968 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 skip
11014 22:59:45.477160 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 skip
11015 22:59:45.477305 arm64_sve-ptrace_Set_Streaming_SVE_VL_832 pass
11016 22:59:45.477457 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 skip
11017 22:59:45.477635 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 skip
11018 22:59:45.477780 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 skip
11019 22:59:45.477932 arm64_sve-ptrace_Set_Streaming_SVE_VL_848 pass
11020 22:59:45.478129 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 skip
11021 22:59:45.478320 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 skip
11022 22:59:45.478525 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 skip
11023 22:59:45.478711 arm64_sve-ptrace_Set_Streaming_SVE_VL_864 pass
11024 22:59:45.478908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 skip
11025 22:59:45.479092 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 skip
11026 22:59:45.479234 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 skip
11027 22:59:45.479393 arm64_sve-ptrace_Set_Streaming_SVE_VL_880 pass
11028 22:59:45.479553 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 skip
11029 22:59:45.479737 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 skip
11030 22:59:45.479868 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 skip
11031 22:59:45.479988 arm64_sve-ptrace_Set_Streaming_SVE_VL_896 pass
11032 22:59:45.480105 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 skip
11033 22:59:45.483756 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 skip
11034 22:59:45.484157 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 skip
11035 22:59:45.484346 arm64_sve-ptrace_Set_Streaming_SVE_VL_912 pass
11036 22:59:45.484515 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 skip
11037 22:59:45.484749 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 skip
11038 22:59:45.484953 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 skip
11039 22:59:45.485190 arm64_sve-ptrace_Set_Streaming_SVE_VL_928 pass
11040 22:59:45.485385 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 skip
11041 22:59:45.485554 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 skip
11042 22:59:45.485726 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 skip
11043 22:59:45.485893 arm64_sve-ptrace_Set_Streaming_SVE_VL_944 pass
11044 22:59:45.486092 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 skip
11045 22:59:45.486257 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 skip
11046 22:59:45.486415 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 skip
11047 22:59:45.486578 arm64_sve-ptrace_Set_Streaming_SVE_VL_960 pass
11048 22:59:45.486738 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 skip
11049 22:59:45.486907 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 skip
11050 22:59:45.487134 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 skip
11051 22:59:45.487355 arm64_sve-ptrace_Set_Streaming_SVE_VL_976 pass
11052 22:59:45.487624 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 skip
11053 22:59:45.487780 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 skip
11054 22:59:45.487903 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 skip
11055 22:59:45.488021 arm64_sve-ptrace_Set_Streaming_SVE_VL_992 pass
11056 22:59:45.488136 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 skip
11057 22:59:45.488251 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 skip
11058 22:59:45.488364 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 skip
11059 22:59:45.488477 arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 pass
11060 22:59:45.488591 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 skip
11061 22:59:45.488705 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 skip
11062 22:59:45.488822 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 skip
11063 22:59:45.495796 arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 pass
11064 22:59:45.495990 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 skip
11065 22:59:45.506412 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 skip
11066 22:59:45.506733 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 skip
11067 22:59:45.506839 arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 pass
11068 22:59:45.506950 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 skip
11069 22:59:45.507039 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 skip
11070 22:59:45.507141 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 skip
11071 22:59:45.507246 arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 pass
11072 22:59:45.507357 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 skip
11073 22:59:45.507629 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 skip
11074 22:59:45.507893 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 skip
11075 22:59:45.508008 arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 pass
11076 22:59:45.508110 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 skip
11077 22:59:45.508414 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 skip
11078 22:59:45.508508 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 skip
11079 22:59:45.508616 arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 pass
11080 22:59:45.508894 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 skip
11081 22:59:45.508981 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 skip
11082 22:59:45.509087 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 skip
11083 22:59:45.509410 arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 pass
11084 22:59:45.509609 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 skip
11085 22:59:45.509821 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 skip
11086 22:59:45.509990 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 skip
11087 22:59:45.510198 arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 pass
11088 22:59:45.510392 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 skip
11089 22:59:45.510570 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 skip
11090 22:59:45.510802 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 skip
11091 22:59:45.510967 arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 pass
11092 22:59:45.511122 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 skip
11093 22:59:45.511265 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 skip
11094 22:59:45.511427 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 skip
11095 22:59:45.511562 arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 pass
11096 22:59:45.511676 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 skip
11097 22:59:45.511788 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 skip
11098 22:59:45.511922 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 skip
11099 22:59:45.515775 arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 pass
11100 22:59:45.516178 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 skip
11101 22:59:45.516367 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 skip
11102 22:59:45.516549 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 skip
11103 22:59:45.516729 arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 pass
11104 22:59:45.516924 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 skip
11105 22:59:45.517140 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 skip
11106 22:59:45.517310 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 skip
11107 22:59:45.517459 arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 pass
11108 22:59:45.517596 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 skip
11109 22:59:45.517816 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 skip
11110 22:59:45.518008 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 skip
11111 22:59:45.518198 arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 pass
11112 22:59:45.518390 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 skip
11113 22:59:45.518570 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 skip
11114 22:59:45.518806 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 skip
11115 22:59:45.519004 arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 pass
11116 22:59:45.519165 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 skip
11117 22:59:45.519300 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 skip
11118 22:59:45.519468 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 skip
11119 22:59:45.519609 arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 pass
11120 22:59:45.519748 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 skip
11121 22:59:45.519885 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 skip
11122 22:59:45.520058 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 skip
11123 22:59:45.520193 arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 pass
11124 22:59:45.520331 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 skip
11125 22:59:45.520468 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 skip
11126 22:59:45.520605 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 skip
11127 22:59:45.523838 arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 pass
11128 22:59:45.524273 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 skip
11129 22:59:45.524454 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 skip
11130 22:59:45.524624 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 skip
11131 22:59:45.524759 arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 pass
11132 22:59:45.524921 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 skip
11133 22:59:45.525084 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 skip
11134 22:59:45.525300 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 skip
11135 22:59:45.525489 arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 pass
11136 22:59:45.525710 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 skip
11137 22:59:45.525899 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 skip
11138 22:59:45.526138 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 skip
11139 22:59:45.526335 arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 pass
11140 22:59:45.526477 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 skip
11141 22:59:45.526635 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 skip
11142 22:59:45.526772 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 skip
11143 22:59:45.526919 arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 pass
11144 22:59:45.527078 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 skip
11145 22:59:45.527229 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 skip
11146 22:59:45.527410 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 skip
11147 22:59:45.527569 arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 pass
11148 22:59:45.527729 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 skip
11149 22:59:45.531837 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 skip
11150 22:59:45.532252 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 skip
11151 22:59:45.532439 arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 pass
11152 22:59:45.532635 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 skip
11153 22:59:45.532811 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 skip
11154 22:59:45.532998 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 skip
11155 22:59:45.533217 arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 pass
11156 22:59:45.533407 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 skip
11157 22:59:45.533590 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 skip
11158 22:59:45.533824 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 skip
11159 22:59:45.533987 arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 pass
11160 22:59:45.534144 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 skip
11161 22:59:45.534328 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 skip
11162 22:59:45.534491 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 skip
11163 22:59:45.534633 arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 pass
11164 22:59:45.534813 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 skip
11165 22:59:45.534965 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 skip
11166 22:59:45.535140 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 skip
11167 22:59:45.535285 arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 pass
11168 22:59:45.535468 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 skip
11169 22:59:45.535612 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 skip
11170 22:59:45.535750 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 skip
11171 22:59:45.539896 arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 pass
11172 22:59:45.540264 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 skip
11173 22:59:45.540427 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 skip
11174 22:59:45.540610 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 skip
11175 22:59:45.540770 arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 pass
11176 22:59:45.540940 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 skip
11177 22:59:45.541072 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 skip
11178 22:59:45.541238 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 skip
11179 22:59:45.541389 arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 pass
11180 22:59:45.541595 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 skip
11181 22:59:45.541789 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 skip
11182 22:59:45.542011 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 skip
11183 22:59:45.542171 arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 pass
11184 22:59:45.542350 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 skip
11185 22:59:45.542517 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 skip
11186 22:59:45.542716 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 skip
11187 22:59:45.542861 arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 pass
11188 22:59:45.543053 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 skip
11189 22:59:45.543210 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 skip
11190 22:59:45.543356 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 skip
11191 22:59:45.543510 arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 pass
11192 22:59:45.543639 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 skip
11193 22:59:45.543801 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 skip
11194 22:59:45.547890 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 skip
11195 22:59:45.548340 arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 pass
11196 22:59:45.548530 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 skip
11197 22:59:45.548691 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 skip
11198 22:59:45.548854 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 skip
11199 22:59:45.564528 arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 pass
11200 22:59:45.564968 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 skip
11201 22:59:45.565178 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 skip
11202 22:59:45.565361 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 skip
11203 22:59:45.565569 arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 pass
11204 22:59:45.565741 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 skip
11205 22:59:45.565928 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 skip
11206 22:59:45.566082 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 skip
11207 22:59:45.566244 arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 pass
11208 22:59:45.566440 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 skip
11209 22:59:45.566605 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 skip
11210 22:59:45.566764 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 skip
11211 22:59:45.566922 arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 pass
11212 22:59:45.567074 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 skip
11213 22:59:45.567259 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 skip
11214 22:59:45.567420 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 skip
11215 22:59:45.567574 arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 pass
11216 22:59:45.567705 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 skip
11217 22:59:45.567818 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 skip
11218 22:59:45.567953 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 skip
11219 22:59:45.568069 arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 pass
11220 22:59:45.571768 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 skip
11221 22:59:45.572185 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 skip
11222 22:59:45.572354 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 skip
11223 22:59:45.572540 arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 pass
11224 22:59:45.572669 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 skip
11225 22:59:45.572862 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 skip
11226 22:59:45.573017 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 skip
11227 22:59:45.573166 arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 pass
11228 22:59:45.573388 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 skip
11229 22:59:45.573589 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 skip
11230 22:59:45.573821 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 skip
11231 22:59:45.573984 arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 pass
11232 22:59:45.574140 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 skip
11233 22:59:45.574329 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 skip
11234 22:59:45.574484 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 skip
11235 22:59:45.574672 arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 pass
11236 22:59:45.574832 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 skip
11237 22:59:45.574990 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 skip
11238 22:59:45.575139 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 skip
11239 22:59:45.575291 arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 pass
11240 22:59:45.575456 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 skip
11241 22:59:45.575611 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 skip
11242 22:59:45.575737 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 skip
11243 22:59:45.575849 arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 pass
11244 22:59:45.575959 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 skip
11245 22:59:45.576070 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 skip
11246 22:59:45.576181 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 skip
11247 22:59:45.576315 arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 pass
11248 22:59:45.579782 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 skip
11249 22:59:45.580211 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 skip
11250 22:59:45.580400 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 skip
11251 22:59:45.580563 arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 pass
11252 22:59:45.580811 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 skip
11253 22:59:45.581001 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 skip
11254 22:59:45.581162 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 skip
11255 22:59:45.581336 arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 pass
11256 22:59:45.581530 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 skip
11257 22:59:45.581694 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 skip
11258 22:59:45.581859 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 skip
11259 22:59:45.582006 arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 pass
11260 22:59:45.582151 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 skip
11261 22:59:45.582311 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 skip
11262 22:59:45.582567 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 skip
11263 22:59:45.582756 arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 pass
11264 22:59:45.582930 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 skip
11265 22:59:45.583088 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 skip
11266 22:59:45.583242 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 skip
11267 22:59:45.583392 arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 pass
11268 22:59:45.583543 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 skip
11269 22:59:45.583722 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 skip
11270 22:59:45.583845 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 skip
11271 22:59:45.583959 arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 pass
11272 22:59:45.584072 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 skip
11273 22:59:45.584183 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 skip
11274 22:59:45.584295 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 skip
11275 22:59:45.584405 arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 pass
11276 22:59:45.584516 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 skip
11277 22:59:45.587906 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 skip
11278 22:59:45.588341 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 skip
11279 22:59:45.588519 arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 pass
11280 22:59:45.588670 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 skip
11281 22:59:45.588825 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 skip
11282 22:59:45.589043 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 skip
11283 22:59:45.589231 arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 pass
11284 22:59:45.589417 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 skip
11285 22:59:45.589595 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 skip
11286 22:59:45.589797 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 skip
11287 22:59:45.589974 arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 pass
11288 22:59:45.590186 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 skip
11289 22:59:45.590375 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 skip
11290 22:59:45.590583 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 skip
11291 22:59:45.590795 arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 pass
11292 22:59:45.590994 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 skip
11293 22:59:45.591178 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 skip
11294 22:59:45.591345 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 skip
11295 22:59:45.591507 arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 pass
11296 22:59:45.591669 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 skip
11297 22:59:45.591835 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 skip
11298 22:59:45.591971 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 skip
11299 22:59:45.592102 arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 pass
11300 22:59:45.592231 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 skip
11301 22:59:45.592360 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 skip
11302 22:59:45.592486 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 skip
11303 22:59:45.592615 arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 pass
11304 22:59:45.592741 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 skip
11305 22:59:45.592869 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 skip
11306 22:59:45.592995 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 skip
11307 22:59:45.595822 arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 pass
11308 22:59:45.596268 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 skip
11309 22:59:45.596420 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 skip
11310 22:59:45.596537 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 skip
11311 22:59:45.596657 arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 pass
11312 22:59:45.596785 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 skip
11313 22:59:45.596931 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 skip
11314 22:59:45.597045 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 skip
11315 22:59:45.597167 arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 pass
11316 22:59:45.597282 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 skip
11317 22:59:45.597411 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 skip
11318 22:59:45.597578 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 skip
11319 22:59:45.597759 arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 pass
11320 22:59:45.597915 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 skip
11321 22:59:45.598079 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 skip
11322 22:59:45.598217 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 skip
11323 22:59:45.598311 arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 pass
11324 22:59:45.598438 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 skip
11325 22:59:45.598583 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 skip
11326 22:59:45.598729 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 skip
11327 22:59:45.598862 arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 pass
11328 22:59:45.598991 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 skip
11329 22:59:45.599126 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 skip
11330 22:59:45.599259 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 skip
11331 22:59:45.599389 arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 pass
11332 22:59:45.599499 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 skip
11333 22:59:45.614167 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 skip
11334 22:59:45.614516 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 skip
11335 22:59:45.614656 arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 pass
11336 22:59:45.617786 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 skip
11337 22:59:45.618010 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 skip
11338 22:59:45.618195 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 skip
11339 22:59:45.618349 arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 pass
11340 22:59:45.618522 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 skip
11341 22:59:45.618695 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 skip
11342 22:59:45.618874 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 skip
11343 22:59:45.619068 arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 pass
11344 22:59:45.619229 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 skip
11345 22:59:45.619393 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 skip
11346 22:59:45.619577 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 skip
11347 22:59:45.619750 arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 pass
11348 22:59:45.619883 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 skip
11349 22:59:45.620015 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 skip
11350 22:59:45.620144 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 skip
11351 22:59:45.620275 arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 pass
11352 22:59:45.620404 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 skip
11353 22:59:45.620759 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 skip
11354 22:59:45.620906 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 skip
11355 22:59:45.621040 arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 pass
11356 22:59:45.621172 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 skip
11357 22:59:45.621303 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 skip
11358 22:59:45.621432 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 skip
11359 22:59:45.621562 arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 pass
11360 22:59:45.621710 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 skip
11361 22:59:45.621844 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 skip
11362 22:59:45.621973 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 skip
11363 22:59:45.622103 arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 pass
11364 22:59:45.623811 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 skip
11365 22:59:45.624222 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 skip
11366 22:59:45.624427 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 skip
11367 22:59:45.624646 arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 pass
11368 22:59:45.624842 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 skip
11369 22:59:45.625045 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 skip
11370 22:59:45.625231 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 skip
11371 22:59:45.625373 arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 pass
11372 22:59:45.625541 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 skip
11373 22:59:45.625730 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 skip
11374 22:59:45.625959 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 skip
11375 22:59:45.626222 arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 pass
11376 22:59:45.626452 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 skip
11377 22:59:45.626647 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 skip
11378 22:59:45.626872 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 skip
11379 22:59:45.627066 arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 pass
11380 22:59:45.627251 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 skip
11381 22:59:45.627435 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 skip
11382 22:59:45.627642 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 skip
11383 22:59:45.627779 arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 pass
11384 22:59:45.627907 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 skip
11385 22:59:45.628034 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 skip
11386 22:59:45.631879 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 skip
11387 22:59:45.632238 arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 pass
11388 22:59:45.632375 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 skip
11389 22:59:45.632522 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 skip
11390 22:59:45.632650 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 skip
11391 22:59:45.632793 arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 pass
11392 22:59:45.632919 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 skip
11393 22:59:45.633064 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 skip
11394 22:59:45.633215 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 skip
11395 22:59:45.633368 arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 pass
11396 22:59:45.633519 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 skip
11397 22:59:45.633714 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 skip
11398 22:59:45.633902 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 skip
11399 22:59:45.634063 arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 pass
11400 22:59:45.634494 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 skip
11401 22:59:45.634644 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 skip
11402 22:59:45.634789 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 skip
11403 22:59:45.634915 arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 pass
11404 22:59:45.635059 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 skip
11405 22:59:45.635196 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 skip
11406 22:59:45.635330 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 skip
11407 22:59:45.635460 arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 pass
11408 22:59:45.639805 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 skip
11409 22:59:45.640172 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 skip
11410 22:59:45.640317 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 skip
11411 22:59:45.640451 arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 pass
11412 22:59:45.640572 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 skip
11413 22:59:45.640711 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 skip
11414 22:59:45.641067 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 skip
11415 22:59:45.641197 arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 pass
11416 22:59:45.641309 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 skip
11417 22:59:45.641435 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 skip
11418 22:59:45.641563 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 skip
11419 22:59:45.641927 arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 pass
11420 22:59:45.642127 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 skip
11421 22:59:45.642300 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 skip
11422 22:59:45.642473 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 skip
11423 22:59:45.642626 arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 pass
11424 22:59:45.642825 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 skip
11425 22:59:45.643012 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 skip
11426 22:59:45.643227 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 skip
11427 22:59:45.643412 arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 pass
11428 22:59:45.643628 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 skip
11429 22:59:45.643779 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 skip
11430 22:59:45.647840 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 skip
11431 22:59:45.648284 arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 pass
11432 22:59:45.648485 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 skip
11433 22:59:45.648668 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 skip
11434 22:59:45.648895 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 skip
11435 22:59:45.649097 arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 pass
11436 22:59:45.649303 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 skip
11437 22:59:45.649555 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 skip
11438 22:59:45.649804 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 skip
11439 22:59:45.649982 arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 pass
11440 22:59:45.650176 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 skip
11441 22:59:45.650373 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 skip
11442 22:59:45.650581 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 skip
11443 22:59:45.650771 arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 pass
11444 22:59:45.650967 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 skip
11445 22:59:45.651194 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 skip
11446 22:59:45.651381 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 skip
11447 22:59:45.651556 arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 pass
11448 22:59:45.651704 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 skip
11449 22:59:45.651833 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 skip
11450 22:59:45.651962 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 skip
11451 22:59:45.652118 arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 pass
11452 22:59:45.652249 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 skip
11453 22:59:45.655819 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 skip
11454 22:59:45.656284 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 skip
11455 22:59:45.656500 arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 pass
11456 22:59:45.656727 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 skip
11457 22:59:45.656950 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 skip
11458 22:59:45.657174 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 skip
11459 22:59:45.657357 arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 pass
11460 22:59:45.657520 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 skip
11461 22:59:45.657661 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 skip
11462 22:59:45.657794 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 skip
11463 22:59:45.657954 arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 pass
11464 22:59:45.658114 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 skip
11465 22:59:45.658247 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 skip
11466 22:59:45.658377 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 skip
11467 22:59:45.673557 arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 pass
11468 22:59:45.673920 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 skip
11469 22:59:45.674057 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 skip
11470 22:59:45.674245 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 skip
11471 22:59:45.674405 arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 pass
11472 22:59:45.674554 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 skip
11473 22:59:45.674716 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 skip
11474 22:59:45.674867 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 skip
11475 22:59:45.675025 arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 pass
11476 22:59:45.675215 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 skip
11477 22:59:45.675377 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 skip
11478 22:59:45.675564 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 skip
11479 22:59:45.675702 arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 pass
11480 22:59:45.675841 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 skip
11481 22:59:45.676032 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 skip
11482 22:59:45.676193 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 skip
11483 22:59:45.676377 arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 pass
11484 22:59:45.676537 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 skip
11485 22:59:45.676721 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 skip
11486 22:59:45.676882 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 skip
11487 22:59:45.677065 arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 pass
11488 22:59:45.677212 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 skip
11489 22:59:45.677360 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 skip
11490 22:59:45.677477 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 skip
11491 22:59:45.677644 arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 pass
11492 22:59:45.677830 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 skip
11493 22:59:45.678001 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 skip
11494 22:59:45.678180 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 skip
11495 22:59:45.678339 arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 pass
11496 22:59:45.678531 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 skip
11497 22:59:45.678731 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 skip
11498 22:59:45.678944 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 skip
11499 22:59:45.679125 arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 pass
11500 22:59:45.679525 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 skip
11501 22:59:45.679691 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 skip
11502 22:59:45.679811 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 skip
11503 22:59:45.679924 arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 pass
11504 22:59:45.680037 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 skip
11505 22:59:45.680149 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 skip
11506 22:59:45.683758 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 skip
11507 22:59:45.684201 arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 pass
11508 22:59:45.684392 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 skip
11509 22:59:45.684538 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 skip
11510 22:59:45.684704 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 skip
11511 22:59:45.684888 arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 pass
11512 22:59:45.685062 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 skip
11513 22:59:45.685203 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 skip
11514 22:59:45.685350 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 skip
11515 22:59:45.685504 arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 pass
11516 22:59:45.685665 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 skip
11517 22:59:45.685850 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 skip
11518 22:59:45.686010 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 skip
11519 22:59:45.686163 arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 pass
11520 22:59:45.686325 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 skip
11521 22:59:45.686460 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 skip
11522 22:59:45.686603 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 skip
11523 22:59:45.686788 arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 pass
11524 22:59:45.686948 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 skip
11525 22:59:45.687104 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 skip
11526 22:59:45.687290 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 skip
11527 22:59:45.687451 arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 pass
11528 22:59:45.687606 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 skip
11529 22:59:45.687751 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 skip
11530 22:59:45.687868 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 skip
11531 22:59:45.691892 arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 pass
11532 22:59:45.692298 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 skip
11533 22:59:45.692486 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 skip
11534 22:59:45.692668 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 skip
11535 22:59:45.692825 arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 pass
11536 22:59:45.692980 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 skip
11537 22:59:45.693159 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 skip
11538 22:59:45.693321 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 skip
11539 22:59:45.693479 arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 pass
11540 22:59:45.693673 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 skip
11541 22:59:45.693818 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 skip
11542 22:59:45.693958 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 skip
11543 22:59:45.694129 arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 pass
11544 22:59:45.694287 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 skip
11545 22:59:45.694427 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 skip
11546 22:59:45.694610 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 skip
11547 22:59:45.694765 arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 pass
11548 22:59:45.694946 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 skip
11549 22:59:45.695120 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 skip
11550 22:59:45.695319 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 skip
11551 22:59:45.695467 arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 pass
11552 22:59:45.695615 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 skip
11553 22:59:45.695759 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 skip
11554 22:59:45.695876 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 skip
11555 22:59:45.699766 arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 pass
11556 22:59:45.700217 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 skip
11557 22:59:45.700443 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 skip
11558 22:59:45.700644 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 skip
11559 22:59:45.700845 arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 pass
11560 22:59:45.701004 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 skip
11561 22:59:45.701165 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 skip
11562 22:59:45.701308 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 skip
11563 22:59:45.701458 arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 pass
11564 22:59:45.701639 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 skip
11565 22:59:45.701833 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 skip
11566 22:59:45.702006 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 skip
11567 22:59:45.702155 arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 pass
11568 22:59:45.702337 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 skip
11569 22:59:45.702497 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 skip
11570 22:59:45.702652 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 skip
11571 22:59:45.702807 arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 pass
11572 22:59:45.702955 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 skip
11573 22:59:45.703136 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 skip
11574 22:59:45.703296 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 skip
11575 22:59:45.703454 arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 pass
11576 22:59:45.703608 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 skip
11577 22:59:45.703729 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 skip
11578 22:59:45.703839 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 skip
11579 22:59:45.703971 arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 pass
11580 22:59:45.704085 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 skip
11581 22:59:45.704195 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 skip
11582 22:59:45.711800 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 skip
11583 22:59:45.712274 arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 pass
11584 22:59:45.712379 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 skip
11585 22:59:45.712468 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 skip
11586 22:59:45.712569 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 skip
11587 22:59:45.712659 arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 pass
11588 22:59:45.712761 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 skip
11589 22:59:45.712863 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 skip
11590 22:59:45.713134 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 skip
11591 22:59:45.713242 arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 pass
11592 22:59:45.713342 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 skip
11593 22:59:45.713655 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 skip
11594 22:59:45.713769 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 skip
11595 22:59:45.713869 arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 pass
11596 22:59:45.714186 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 skip
11597 22:59:45.714424 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 skip
11598 22:59:45.714618 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 skip
11599 22:59:45.714783 arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 pass
11600 22:59:45.714908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 skip
11601 22:59:45.724810 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 skip
11602 22:59:45.725235 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 skip
11603 22:59:45.725344 arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 pass
11604 22:59:45.725436 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 skip
11605 22:59:45.725699 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 skip
11606 22:59:45.725804 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 skip
11607 22:59:45.725894 arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 pass
11608 22:59:45.725981 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 skip
11609 22:59:45.726084 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 skip
11610 22:59:45.726174 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 skip
11611 22:59:45.726277 arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 pass
11612 22:59:45.726365 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 skip
11613 22:59:45.726450 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 skip
11614 22:59:45.726552 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 skip
11615 22:59:45.726642 arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 pass
11616 22:59:45.728379 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 skip
11617 22:59:45.728538 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 skip
11618 22:59:45.728662 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 skip
11619 22:59:45.728780 arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 pass
11620 22:59:45.728896 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 skip
11621 22:59:45.729011 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 skip
11622 22:59:45.729127 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 skip
11623 22:59:45.729245 arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 pass
11624 22:59:45.729359 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 skip
11625 22:59:45.732060 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 skip
11626 22:59:45.732297 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 skip
11627 22:59:45.732563 arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 pass
11628 22:59:45.732772 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 skip
11629 22:59:45.732963 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 skip
11630 22:59:45.733169 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 skip
11631 22:59:45.733344 arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 pass
11632 22:59:45.733531 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 skip
11633 22:59:45.733707 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 skip
11634 22:59:45.733900 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 skip
11635 22:59:45.734067 arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 pass
11636 22:59:45.734300 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 skip
11637 22:59:45.734531 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 skip
11638 22:59:45.734779 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 skip
11639 22:59:45.734937 arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 pass
11640 22:59:45.735100 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 skip
11641 22:59:45.735270 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 skip
11642 22:59:45.735495 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 skip
11643 22:59:45.735638 arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 pass
11644 22:59:45.735755 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 skip
11645 22:59:45.735870 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 skip
11646 22:59:45.735987 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 skip
11647 22:59:45.736100 arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 pass
11648 22:59:45.736242 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 skip
11649 22:59:45.740051 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 skip
11650 22:59:45.740247 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 skip
11651 22:59:45.740446 arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 pass
11652 22:59:45.740615 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 skip
11653 22:59:45.740805 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 skip
11654 22:59:45.741024 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 skip
11655 22:59:45.741284 arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 pass
11656 22:59:45.741500 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 skip
11657 22:59:45.741687 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 skip
11658 22:59:45.741879 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 skip
11659 22:59:45.742027 arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 pass
11660 22:59:45.742160 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 skip
11661 22:59:45.742302 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 skip
11662 22:59:45.742682 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 skip
11663 22:59:45.742881 arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 pass
11664 22:59:45.743055 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 skip
11665 22:59:45.743241 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 skip
11666 22:59:45.743468 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 skip
11667 22:59:45.743663 arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 pass
11668 22:59:45.743822 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 skip
11669 22:59:45.743946 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 skip
11670 22:59:45.744062 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 skip
11671 22:59:45.744178 arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 pass
11672 22:59:45.744297 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 skip
11673 22:59:45.747784 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 skip
11674 22:59:45.748173 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 skip
11675 22:59:45.748275 arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 pass
11676 22:59:45.748362 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 skip
11677 22:59:45.748461 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 skip
11678 22:59:45.748563 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 skip
11679 22:59:45.748663 arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 pass
11680 22:59:45.748797 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 skip
11681 22:59:45.749105 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 skip
11682 22:59:45.749203 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 skip
11683 22:59:45.749299 arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 pass
11684 22:59:45.749581 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 skip
11685 22:59:45.749694 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 skip
11686 22:59:45.749792 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 skip
11687 22:59:45.750075 arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 pass
11688 22:59:45.750178 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 skip
11689 22:59:45.750264 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 skip
11690 22:59:45.750365 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 skip
11691 22:59:45.750654 arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 pass
11692 22:59:45.750744 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 skip
11693 22:59:45.750840 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 skip
11694 22:59:45.751122 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 skip
11695 22:59:45.751214 arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 pass
11696 22:59:45.751313 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 skip
11697 22:59:45.751408 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 skip
11698 22:59:45.751709 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 skip
11699 22:59:45.755911 arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 pass
11700 22:59:45.756013 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 skip
11701 22:59:45.756285 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 skip
11702 22:59:45.756387 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 skip
11703 22:59:45.756473 arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 pass
11704 22:59:45.756571 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 skip
11705 22:59:45.756668 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 skip
11706 22:59:45.756968 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 skip
11707 22:59:45.757056 arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 pass
11708 22:59:45.757157 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 skip
11709 22:59:45.757262 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 skip
11710 22:59:45.757560 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 skip
11711 22:59:45.757659 arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 pass
11712 22:59:45.757759 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 skip
11713 22:59:45.757860 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 skip
11714 22:59:45.758209 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 skip
11715 22:59:45.758336 arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 pass
11716 22:59:45.758631 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 skip
11717 22:59:45.758730 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 skip
11718 22:59:45.758832 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 skip
11719 22:59:45.758931 arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 pass
11720 22:59:45.759030 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 skip
11721 22:59:45.759325 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 skip
11722 22:59:45.759440 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 skip
11723 22:59:45.759539 arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 pass
11724 22:59:45.763792 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 skip
11725 22:59:45.764088 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 skip
11726 22:59:45.764173 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 skip
11727 22:59:45.764248 arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 pass
11728 22:59:45.764609 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 skip
11729 22:59:45.764886 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 skip
11730 22:59:45.765048 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 skip
11731 22:59:45.765209 arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 pass
11732 22:59:45.765333 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 skip
11733 22:59:45.765448 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 skip
11734 22:59:45.765595 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 skip
11735 22:59:45.775448 arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 pass
11736 22:59:45.775940 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 skip
11737 22:59:45.776041 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 skip
11738 22:59:45.776142 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 skip
11739 22:59:45.776227 arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 pass
11740 22:59:45.776577 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 skip
11741 22:59:45.776677 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 skip
11742 22:59:45.776994 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 skip
11743 22:59:45.777144 arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 pass
11744 22:59:45.777253 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 skip
11745 22:59:45.777354 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 skip
11746 22:59:45.777663 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 skip
11747 22:59:45.777879 arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 pass
11748 22:59:45.778018 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 skip
11749 22:59:45.778200 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 skip
11750 22:59:45.778425 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 skip
11751 22:59:45.778722 arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 pass
11752 22:59:45.778910 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 skip
11753 22:59:45.779087 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 skip
11754 22:59:45.779307 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 skip
11755 22:59:45.779473 arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 pass
11756 22:59:45.779650 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 skip
11757 22:59:45.779781 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 skip
11758 22:59:45.779927 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 skip
11759 22:59:45.780050 arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 pass
11760 22:59:45.783772 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 skip
11761 22:59:45.784173 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 skip
11762 22:59:45.784280 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 skip
11763 22:59:45.784388 arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 pass
11764 22:59:45.784479 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 skip
11765 22:59:45.784584 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 skip
11766 22:59:45.784692 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 skip
11767 22:59:45.784796 arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 pass
11768 22:59:45.784954 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 skip
11769 22:59:45.785282 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 skip
11770 22:59:45.785521 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 skip
11771 22:59:45.785704 arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 pass
11772 22:59:45.785899 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 skip
11773 22:59:45.786061 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 skip
11774 22:59:45.786202 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 skip
11775 22:59:45.786340 arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 pass
11776 22:59:45.786477 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 skip
11777 22:59:45.786604 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 skip
11778 22:59:45.786706 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 skip
11779 22:59:45.786821 arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 pass
11780 22:59:45.786918 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 skip
11781 22:59:45.787011 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 skip
11782 22:59:45.787134 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 skip
11783 22:59:45.787258 arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 pass
11784 22:59:45.787379 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 skip
11785 22:59:45.787522 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 skip
11786 22:59:45.787643 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 skip
11787 22:59:45.787753 arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 pass
11788 22:59:45.791753 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 skip
11789 22:59:45.792062 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 skip
11790 22:59:45.792168 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 skip
11791 22:59:45.792274 arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 pass
11792 22:59:45.792369 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 skip
11793 22:59:45.792471 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 skip
11794 22:59:45.792574 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 skip
11795 22:59:45.792816 arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 pass
11796 22:59:45.792923 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 skip
11797 22:59:45.793030 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 skip
11798 22:59:45.793137 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 skip
11799 22:59:45.793244 arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 pass
11800 22:59:45.793539 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 skip
11801 22:59:45.793652 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 skip
11802 22:59:45.793758 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 skip
11803 22:59:45.794048 arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 pass
11804 22:59:45.794154 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 skip
11805 22:59:45.794258 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 skip
11806 22:59:45.794347 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 skip
11807 22:59:45.794448 arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 pass
11808 22:59:45.794547 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 skip
11809 22:59:45.794651 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 skip
11810 22:59:45.794754 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 skip
11811 22:59:45.795054 arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 pass
11812 22:59:45.795376 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 skip
11813 22:59:45.795481 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 skip
11814 22:59:45.795589 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 skip
11815 22:59:45.799735 arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 pass
11816 22:59:45.800102 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 skip
11817 22:59:45.800306 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 skip
11818 22:59:45.800487 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 skip
11819 22:59:45.800654 arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 pass
11820 22:59:45.800821 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 skip
11821 22:59:45.800999 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 skip
11822 22:59:45.801152 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 skip
11823 22:59:45.801310 arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 pass
11824 22:59:45.801438 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 skip
11825 22:59:45.801555 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 skip
11826 22:59:45.801686 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 skip
11827 22:59:45.801831 arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 pass
11828 22:59:45.801941 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 skip
11829 22:59:45.802036 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 skip
11830 22:59:45.802153 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 skip
11831 22:59:45.802261 arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 pass
11832 22:59:45.802389 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 skip
11833 22:59:45.802530 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 skip
11834 22:59:45.802626 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 skip
11835 22:59:45.802716 arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 pass
11836 22:59:45.802820 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 skip
11837 22:59:45.803137 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 skip
11838 22:59:45.803294 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 skip
11839 22:59:45.803383 arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 pass
11840 22:59:45.803475 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 skip
11841 22:59:45.803572 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 skip
11842 22:59:45.803689 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 skip
11843 22:59:45.807841 arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 pass
11844 22:59:45.808118 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 skip
11845 22:59:45.808203 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 skip
11846 22:59:45.808330 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 skip
11847 22:59:45.808429 arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 pass
11848 22:59:45.808525 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 skip
11849 22:59:45.808608 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 skip
11850 22:59:45.808702 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 skip
11851 22:59:45.809009 arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 pass
11852 22:59:45.809112 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 skip
11853 22:59:45.809233 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 skip
11854 22:59:45.809336 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 skip
11855 22:59:45.809447 arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 pass
11856 22:59:45.809537 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 skip
11857 22:59:45.809634 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 skip
11858 22:59:45.809739 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 skip
11859 22:59:45.809821 arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 pass
11860 22:59:45.809916 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 skip
11861 22:59:45.810021 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 skip
11862 22:59:45.810321 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 skip
11863 22:59:45.810427 arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 pass
11864 22:59:45.810526 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 skip
11865 22:59:45.810606 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 skip
11866 22:59:45.810693 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 skip
11867 22:59:45.810788 arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 pass
11868 22:59:45.810868 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 skip
11869 22:59:45.824631 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 skip
11870 22:59:45.825068 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 skip
11871 22:59:45.825193 arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 pass
11872 22:59:45.825326 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 skip
11873 22:59:45.825444 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 skip
11874 22:59:45.825560 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 skip
11875 22:59:45.825672 arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 pass
11876 22:59:45.825749 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 skip
11877 22:59:45.825841 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 skip
11878 22:59:45.825927 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 skip
11879 22:59:45.826036 arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 pass
11880 22:59:45.826140 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 skip
11881 22:59:45.826235 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 skip
11882 22:59:45.826320 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 skip
11883 22:59:45.826594 arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 pass
11884 22:59:45.826688 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 skip
11885 22:59:45.826796 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 skip
11886 22:59:45.826918 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 skip
11887 22:59:45.827015 arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 pass
11888 22:59:45.827127 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 skip
11889 22:59:45.827215 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 skip
11890 22:59:45.827345 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 skip
11891 22:59:45.827446 arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 pass
11892 22:59:45.827559 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 skip
11893 22:59:45.827651 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 skip
11894 22:59:45.831784 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 skip
11895 22:59:45.832107 arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 pass
11896 22:59:45.832227 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 skip
11897 22:59:45.832337 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 skip
11898 22:59:45.832453 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 skip
11899 22:59:45.832554 arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 pass
11900 22:59:45.832656 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 skip
11901 22:59:45.832761 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 skip
11902 22:59:45.832867 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 skip
11903 22:59:45.832983 arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 pass
11904 22:59:45.833086 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 skip
11905 22:59:45.833203 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 skip
11906 22:59:45.833303 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 skip
11907 22:59:45.833431 arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 pass
11908 22:59:45.833538 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 skip
11909 22:59:45.833635 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 skip
11910 22:59:45.833714 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 skip
11911 22:59:45.833788 arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 pass
11912 22:59:45.833871 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 skip
11913 22:59:45.833967 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 skip
11914 22:59:45.834353 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 skip
11915 22:59:45.834549 arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 pass
11916 22:59:45.834749 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 skip
11917 22:59:45.834922 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 skip
11918 22:59:45.835084 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 skip
11919 22:59:45.835280 arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 pass
11920 22:59:45.835430 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 skip
11921 22:59:45.835594 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 skip
11922 22:59:45.835718 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 skip
11923 22:59:45.835833 arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 pass
11924 22:59:45.835973 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 skip
11925 22:59:45.836093 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 skip
11926 22:59:45.839767 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 skip
11927 22:59:45.840177 arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 pass
11928 22:59:45.840271 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 skip
11929 22:59:45.840357 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 skip
11930 22:59:45.840448 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 skip
11931 22:59:45.840545 arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 pass
11932 22:59:45.840651 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 skip
11933 22:59:45.840749 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 skip
11934 22:59:45.840833 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 skip
11935 22:59:45.840932 arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 pass
11936 22:59:45.841048 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 skip
11937 22:59:45.841136 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 skip
11938 22:59:45.841409 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 skip
11939 22:59:45.841506 arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 pass
11940 22:59:45.841600 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 skip
11941 22:59:45.841700 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 skip
11942 22:59:45.841984 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 skip
11943 22:59:45.842077 arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 pass
11944 22:59:45.842165 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 skip
11945 22:59:45.842240 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 skip
11946 22:59:45.842317 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 skip
11947 22:59:45.842426 arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 pass
11948 22:59:45.842712 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 skip
11949 22:59:45.842798 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 skip
11950 22:59:45.842883 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 skip
11951 22:59:45.842963 arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 pass
11952 22:59:45.843238 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 skip
11953 22:59:45.843335 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 skip
11954 22:59:45.843455 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 skip
11955 22:59:45.843552 arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 pass
11956 22:59:45.847740 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 skip
11957 22:59:45.848004 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 skip
11958 22:59:45.848113 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 skip
11959 22:59:45.848219 arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 pass
11960 22:59:45.848512 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 skip
11961 22:59:45.848608 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 skip
11962 22:59:45.848703 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 skip
11963 22:59:45.848961 arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 pass
11964 22:59:45.849040 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 skip
11965 22:59:45.849292 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 skip
11966 22:59:45.849378 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 skip
11967 22:59:45.849467 arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 pass
11968 22:59:45.849745 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 skip
11969 22:59:45.849852 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 skip
11970 22:59:45.850131 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 skip
11971 22:59:45.850221 arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 pass
11972 22:59:45.850312 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 skip
11973 22:59:45.850398 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 skip
11974 22:59:45.850676 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 skip
11975 22:59:45.850788 arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 pass
11976 22:59:45.850906 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 skip
11977 22:59:45.851232 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 skip
11978 22:59:45.851425 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 skip
11979 22:59:45.851615 arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 pass
11980 22:59:45.851755 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 skip
11981 22:59:45.855812 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 skip
11982 22:59:45.856255 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 skip
11983 22:59:45.856443 arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 pass
11984 22:59:45.856651 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 skip
11985 22:59:45.856881 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 skip
11986 22:59:45.857065 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 skip
11987 22:59:45.857232 arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 pass
11988 22:59:45.857408 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 skip
11989 22:59:45.857559 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 skip
11990 22:59:45.857766 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 skip
11991 22:59:45.857936 arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 pass
11992 22:59:45.858107 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 skip
11993 22:59:45.858241 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 skip
11994 22:59:45.858368 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 skip
11995 22:59:45.858539 arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 pass
11996 22:59:45.858735 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 skip
11997 22:59:45.858891 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 skip
11998 22:59:45.859038 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 skip
11999 22:59:45.859209 arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 pass
12000 22:59:45.859392 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 skip
12001 22:59:45.859530 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 skip
12002 22:59:45.859674 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 skip
12003 22:59:45.881502 arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 pass
12004 22:59:45.881926 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 skip
12005 22:59:45.882020 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 skip
12006 22:59:45.882106 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 skip
12007 22:59:45.882205 arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 pass
12008 22:59:45.882319 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 skip
12009 22:59:45.882637 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 skip
12010 22:59:45.882748 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 skip
12011 22:59:45.882852 arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 pass
12012 22:59:45.882951 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 skip
12013 22:59:45.883231 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 skip
12014 22:59:45.883330 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 skip
12015 22:59:45.883619 arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 pass
12016 22:59:45.883972 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 skip
12017 22:59:45.884167 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 skip
12018 22:59:45.884384 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 skip
12019 22:59:45.884556 arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 pass
12020 22:59:45.884745 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 skip
12021 22:59:45.884907 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 skip
12022 22:59:45.885078 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 skip
12023 22:59:45.885249 arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 pass
12024 22:59:45.885440 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 skip
12025 22:59:45.885606 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 skip
12026 22:59:45.885826 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 skip
12027 22:59:45.886000 arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 pass
12028 22:59:45.886180 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 skip
12029 22:59:45.886343 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 skip
12030 22:59:45.886579 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 skip
12031 22:59:45.886758 arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 pass
12032 22:59:45.886999 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 skip
12033 22:59:45.887145 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 skip
12034 22:59:45.887314 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 skip
12035 22:59:45.887542 arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 pass
12036 22:59:45.887738 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 skip
12037 22:59:45.887871 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 skip
12038 22:59:45.891802 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 skip
12039 22:59:45.891910 arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 pass
12040 22:59:45.892207 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 skip
12041 22:59:45.892307 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 skip
12042 22:59:45.892431 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 skip
12043 22:59:45.892601 arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 pass
12044 22:59:45.892781 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 skip
12045 22:59:45.892918 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 skip
12046 22:59:45.893059 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 skip
12047 22:59:45.893180 arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 pass
12048 22:59:45.893317 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 skip
12049 22:59:45.893438 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 skip
12050 22:59:45.893579 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 skip
12051 22:59:45.893790 arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 pass
12052 22:59:45.894023 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 skip
12053 22:59:45.894176 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 skip
12054 22:59:45.894350 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 skip
12055 22:59:45.894567 arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 pass
12056 22:59:45.894783 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 skip
12057 22:59:45.894977 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 skip
12058 22:59:45.895119 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 skip
12059 22:59:45.895293 arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 pass
12060 22:59:45.895460 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 skip
12061 22:59:45.895637 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 skip
12062 22:59:45.899776 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 skip
12063 22:59:45.900192 arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 pass
12064 22:59:45.900297 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 skip
12065 22:59:45.900387 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 skip
12066 22:59:45.900490 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 skip
12067 22:59:45.900581 arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 pass
12068 22:59:45.900883 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 skip
12069 22:59:45.900989 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 skip
12070 22:59:45.901279 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 skip
12071 22:59:45.901385 arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 pass
12072 22:59:45.901472 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 skip
12073 22:59:45.901572 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 skip
12074 22:59:45.901667 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 skip
12075 22:59:45.901766 arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 pass
12076 22:59:45.901865 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 skip
12077 22:59:45.902175 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 skip
12078 22:59:45.902475 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 skip
12079 22:59:45.902577 arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 pass
12080 22:59:45.902676 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 skip
12081 22:59:45.902775 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 skip
12082 22:59:45.903130 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 skip
12083 22:59:45.903309 arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 pass
12084 22:59:45.903497 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 skip
12085 22:59:45.903683 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 skip
12086 22:59:45.903872 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 skip
12087 22:59:45.911743 arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 pass
12088 22:59:45.912049 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 skip
12089 22:59:45.912152 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 skip
12090 22:59:45.912261 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 skip
12091 22:59:45.912359 arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 pass
12092 22:59:45.912653 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 skip
12093 22:59:45.912767 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 skip
12094 22:59:45.913065 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 skip
12095 22:59:45.913166 arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 pass
12096 22:59:45.913263 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 skip
12097 22:59:45.913556 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 skip
12098 22:59:45.913679 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 skip
12099 22:59:45.913781 arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 pass
12100 22:59:45.914077 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 skip
12101 22:59:45.914191 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 skip
12102 22:59:45.914560 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 skip
12103 22:59:45.914754 arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 pass
12104 22:59:45.914946 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 skip
12105 22:59:45.915105 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 skip
12106 22:59:45.915259 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 skip
12107 22:59:45.915429 arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 pass
12108 22:59:45.915605 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 skip
12109 22:59:45.915768 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 skip
12110 22:59:45.919725 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 skip
12111 22:59:45.920031 arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 pass
12112 22:59:45.920152 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 skip
12113 22:59:45.920260 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 skip
12114 22:59:45.920552 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 skip
12115 22:59:45.920647 arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 pass
12116 22:59:45.920752 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 skip
12117 22:59:45.920858 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 skip
12118 22:59:45.920962 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 skip
12119 22:59:45.921063 arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 pass
12120 22:59:45.921276 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 skip
12121 22:59:45.921399 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 skip
12122 22:59:45.921698 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 skip
12123 22:59:45.921802 arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 pass
12124 22:59:45.921909 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 skip
12125 22:59:45.922011 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 skip
12126 22:59:45.922206 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 skip
12127 22:59:45.922329 arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 pass
12128 22:59:45.922420 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 skip
12129 22:59:45.922524 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 skip
12130 22:59:45.922829 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 skip
12131 22:59:45.922935 arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 pass
12132 22:59:45.923041 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 skip
12133 22:59:45.923146 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 skip
12134 22:59:45.923250 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 skip
12135 22:59:45.923354 arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 pass
12136 22:59:45.923644 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 skip
12137 22:59:45.934011 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 skip
12138 22:59:45.934391 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 skip
12139 22:59:45.934488 arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 pass
12140 22:59:45.934568 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 skip
12141 22:59:45.934647 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 skip
12142 22:59:45.934736 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 skip
12143 22:59:45.934812 arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 pass
12144 22:59:45.934898 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 skip
12145 22:59:45.934986 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 skip
12146 22:59:45.935315 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 skip
12147 22:59:45.935601 arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 pass
12148 22:59:45.935762 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 skip
12149 22:59:45.935926 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 skip
12150 22:59:45.936117 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 skip
12151 22:59:45.936260 arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 pass
12152 22:59:45.936407 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 skip
12153 22:59:45.936621 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 skip
12154 22:59:45.936818 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 skip
12155 22:59:45.937028 arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 pass
12156 22:59:45.937250 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 skip
12157 22:59:45.937387 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 skip
12158 22:59:45.937573 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 skip
12159 22:59:45.937768 arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 pass
12160 22:59:45.937933 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 skip
12161 22:59:45.938181 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 skip
12162 22:59:45.938439 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 skip
12163 22:59:45.938621 arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 pass
12164 22:59:45.938765 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 skip
12165 22:59:45.938927 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 skip
12166 22:59:45.939147 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 skip
12167 22:59:45.939364 arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 pass
12168 22:59:45.939546 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 skip
12169 22:59:45.939723 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 skip
12170 22:59:45.939899 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 skip
12171 22:59:45.940031 arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 pass
12172 22:59:45.940147 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 skip
12173 22:59:45.940261 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 skip
12174 22:59:45.940379 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 skip
12175 22:59:45.940520 arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 pass
12176 22:59:45.940643 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 skip
12177 22:59:45.943828 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 skip
12178 22:59:45.944274 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 skip
12179 22:59:45.944487 arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 pass
12180 22:59:45.944693 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 skip
12181 22:59:45.944930 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 skip
12182 22:59:45.945120 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 skip
12183 22:59:45.945305 arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 pass
12184 22:59:45.945477 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 skip
12185 22:59:45.945680 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 skip
12186 22:59:45.945847 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 skip
12187 22:59:45.946033 arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 pass
12188 22:59:45.946215 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 skip
12189 22:59:45.946378 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 skip
12190 22:59:45.946578 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 skip
12191 22:59:45.946748 arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 pass
12192 22:59:45.946910 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 skip
12193 22:59:45.947073 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 skip
12194 22:59:45.947230 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 skip
12195 22:59:45.947394 arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 pass
12196 22:59:45.947575 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 skip
12197 22:59:45.947704 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 skip
12198 22:59:45.947821 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 skip
12199 22:59:45.947937 arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 pass
12200 22:59:45.948050 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 skip
12201 22:59:45.948162 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 skip
12202 22:59:45.951810 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 skip
12203 22:59:45.952208 arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 pass
12204 22:59:45.952315 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 skip
12205 22:59:45.952406 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 skip
12206 22:59:45.952513 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 skip
12207 22:59:45.952608 arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 pass
12208 22:59:45.952697 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 skip
12209 22:59:45.952801 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 skip
12210 22:59:45.952907 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 skip
12211 22:59:45.952997 arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 pass
12212 22:59:45.953102 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 skip
12213 22:59:45.953207 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 skip
12214 22:59:45.953312 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 skip
12215 22:59:45.953418 arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 pass
12216 22:59:45.953522 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 skip
12217 22:59:45.953633 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 skip
12218 22:59:45.953747 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 skip
12219 22:59:45.953852 arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 pass
12220 22:59:45.953956 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 skip
12221 22:59:45.954251 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 skip
12222 22:59:45.954346 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 skip
12223 22:59:45.954446 arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 pass
12224 22:59:45.954528 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 skip
12225 22:59:45.954635 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 skip
12226 22:59:45.954726 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 skip
12227 22:59:45.954829 arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 pass
12228 22:59:45.955123 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 skip
12229 22:59:45.955217 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 skip
12230 22:59:45.955306 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 skip
12231 22:59:45.955410 arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 pass
12232 22:59:45.955499 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 skip
12233 22:59:45.955590 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 skip
12234 22:59:45.955697 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 skip
12235 22:59:45.955787 arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 pass
12236 22:59:45.959953 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 skip
12237 22:59:45.960053 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 skip
12238 22:59:45.960157 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 skip
12239 22:59:45.960439 arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 pass
12240 22:59:45.960533 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 skip
12241 22:59:45.960622 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 skip
12242 22:59:45.960726 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 skip
12243 22:59:45.960816 arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 pass
12244 22:59:45.960905 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 skip
12245 22:59:45.961008 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 skip
12246 22:59:45.961098 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 skip
12247 22:59:45.961203 arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 pass
12248 22:59:45.961293 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 skip
12249 22:59:45.961398 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 skip
12250 22:59:45.961488 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 skip
12251 22:59:45.961592 arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 pass
12252 22:59:45.961689 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 skip
12253 22:59:45.961795 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 skip
12254 22:59:45.961886 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 skip
12255 22:59:45.961990 arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 pass
12256 22:59:45.962080 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 skip
12257 22:59:45.962184 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 skip
12258 22:59:45.962288 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 skip
12259 22:59:45.962401 arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 pass
12260 22:59:45.962502 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 skip
12261 22:59:45.962592 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 skip
12262 22:59:45.962752 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 skip
12263 22:59:45.962874 arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 pass
12264 22:59:45.962966 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 skip
12265 22:59:45.963070 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 skip
12266 22:59:45.963174 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 skip
12267 22:59:45.963279 arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 pass
12268 22:59:45.963383 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 skip
12269 22:59:45.963487 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 skip
12270 22:59:45.963776 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 skip
12271 22:59:45.981849 arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 pass
12272 22:59:45.982234 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 skip
12273 22:59:45.982331 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 skip
12274 22:59:45.982420 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 skip
12275 22:59:45.982500 arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 pass
12276 22:59:45.982593 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 skip
12277 22:59:45.982671 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 skip
12278 22:59:45.982763 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 skip
12279 22:59:45.982852 arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 pass
12280 22:59:45.982935 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 skip
12281 22:59:45.983220 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 skip
12282 22:59:45.983551 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 skip
12283 22:59:45.983655 arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 pass
12284 22:59:45.983944 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 skip
12285 22:59:45.984060 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 skip
12286 22:59:45.984381 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 skip
12287 22:59:45.984483 arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 pass
12288 22:59:45.984581 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 skip
12289 22:59:45.984887 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 skip
12290 22:59:45.985004 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 skip
12291 22:59:45.985091 arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 pass
12292 22:59:45.985191 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 skip
12293 22:59:45.985370 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 skip
12294 22:59:45.985699 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 skip
12295 22:59:45.985815 arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 pass
12296 22:59:45.985913 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 skip
12297 22:59:45.986011 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 skip
12298 22:59:45.986318 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 skip
12299 22:59:45.986434 arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 pass
12300 22:59:45.986536 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 skip
12301 22:59:45.986852 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 skip
12302 22:59:45.987075 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 skip
12303 22:59:45.987247 arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 pass
12304 22:59:45.987424 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 skip
12305 22:59:45.987578 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 skip
12306 22:59:45.987745 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 skip
12307 22:59:45.987871 arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 pass
12308 22:59:45.991851 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 skip
12309 22:59:45.992296 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 skip
12310 22:59:45.992481 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 skip
12311 22:59:45.992656 arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 pass
12312 22:59:45.992867 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 skip
12313 22:59:45.993090 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 skip
12314 22:59:45.993268 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 skip
12315 22:59:45.993432 arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 pass
12316 22:59:45.993706 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 skip
12317 22:59:45.993918 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 skip
12318 22:59:45.994116 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 skip
12319 22:59:45.994327 arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 pass
12320 22:59:45.994521 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 skip
12321 22:59:45.994741 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 skip
12322 22:59:45.994915 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 skip
12323 22:59:45.995076 arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 pass
12324 22:59:45.995227 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 skip
12325 22:59:45.995363 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 skip
12326 22:59:45.995504 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 skip
12327 22:59:45.995636 arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 pass
12328 22:59:45.995786 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 skip
12329 22:59:45.995908 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 skip
12330 22:59:45.996024 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 skip
12331 22:59:45.996140 arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 pass
12332 22:59:45.996256 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 skip
12333 22:59:45.999790 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 skip
12334 22:59:46.000093 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 skip
12335 22:59:46.000194 arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 pass
12336 22:59:46.000295 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 skip
12337 22:59:46.000395 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 skip
12338 22:59:46.000684 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 skip
12339 22:59:46.000802 arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 pass
12340 22:59:46.000899 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 skip
12341 22:59:46.001219 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 skip
12342 22:59:46.001475 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 skip
12343 22:59:46.001660 arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 pass
12344 22:59:46.001831 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 skip
12345 22:59:46.002022 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 skip
12346 22:59:46.002187 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 skip
12347 22:59:46.002348 arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 pass
12348 22:59:46.002542 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 skip
12349 22:59:46.002698 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 skip
12350 22:59:46.002853 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 skip
12351 22:59:46.003000 arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 pass
12352 22:59:46.003186 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 skip
12353 22:59:46.003348 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 skip
12354 22:59:46.003493 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 skip
12355 22:59:46.003659 arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 pass
12356 22:59:46.003808 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 skip
12357 22:59:46.003931 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 skip
12358 22:59:46.004048 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 skip
12359 22:59:46.007767 arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 pass
12360 22:59:46.008238 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 skip
12361 22:59:46.008416 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 skip
12362 22:59:46.008589 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 skip
12363 22:59:46.008774 arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 pass
12364 22:59:46.008936 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 skip
12365 22:59:46.009067 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 skip
12366 22:59:46.009249 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 skip
12367 22:59:46.009419 arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 pass
12368 22:59:46.009624 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 skip
12369 22:59:46.009818 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 skip
12370 22:59:46.010027 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 skip
12371 22:59:46.010205 arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 pass
12372 22:59:46.010398 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 skip
12373 22:59:46.010643 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 skip
12374 22:59:46.010946 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 skip
12375 22:59:46.011142 arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 pass
12376 22:59:46.011331 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 skip
12377 22:59:46.011497 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 skip
12378 22:59:46.011642 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 skip
12379 22:59:46.011784 arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 pass
12380 22:59:46.011933 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 skip
12381 22:59:46.012058 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 skip
12382 22:59:46.012177 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 skip
12383 22:59:46.012297 arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 pass
12384 22:59:46.012415 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 skip
12385 22:59:46.015842 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 skip
12386 22:59:46.016259 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 skip
12387 22:59:46.016364 arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 pass
12388 22:59:46.016453 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 skip
12389 22:59:46.016552 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 skip
12390 22:59:46.016639 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 skip
12391 22:59:46.016737 arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 pass
12392 22:59:46.016837 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 skip
12393 22:59:46.017137 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 skip
12394 22:59:46.017252 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 skip
12395 22:59:46.017353 arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 pass
12396 22:59:46.017667 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 skip
12397 22:59:46.017782 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 skip
12398 22:59:46.018118 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 skip
12399 22:59:46.018297 arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 pass
12400 22:59:46.018479 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 skip
12401 22:59:46.018694 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 skip
12402 22:59:46.018868 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 skip
12403 22:59:46.019048 arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 pass
12404 22:59:46.019190 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 skip
12405 22:59:46.033125 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 skip
12406 22:59:46.033404 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 skip
12407 22:59:46.033750 arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 pass
12408 22:59:46.033937 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 skip
12409 22:59:46.034094 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 skip
12410 22:59:46.034252 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 skip
12411 22:59:46.034408 arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 pass
12412 22:59:46.034572 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 skip
12413 22:59:46.034809 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 skip
12414 22:59:46.034994 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 skip
12415 22:59:46.035185 arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 pass
12416 22:59:46.035390 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 skip
12417 22:59:46.035561 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 skip
12418 22:59:46.035714 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 skip
12419 22:59:46.035833 arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 pass
12420 22:59:46.035957 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 skip
12421 22:59:46.036073 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 skip
12422 22:59:46.036217 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 skip
12423 22:59:46.036339 arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 pass
12424 22:59:46.036455 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 skip
12425 22:59:46.036571 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 skip
12426 22:59:46.036686 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 skip
12427 22:59:46.039799 arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 pass
12428 22:59:46.040220 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 skip
12429 22:59:46.040418 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 skip
12430 22:59:46.040591 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 skip
12431 22:59:46.040776 arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 pass
12432 22:59:46.040930 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 skip
12433 22:59:46.041085 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 skip
12434 22:59:46.041236 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 skip
12435 22:59:46.041389 arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 pass
12436 22:59:46.041553 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 skip
12437 22:59:46.041708 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 skip
12438 22:59:46.041852 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 skip
12439 22:59:46.042004 arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 pass
12440 22:59:46.042157 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 skip
12441 22:59:46.042345 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 skip
12442 22:59:46.042501 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 skip
12443 22:59:46.042662 arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 pass
12444 22:59:46.042825 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 skip
12445 22:59:46.042974 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 skip
12446 22:59:46.043126 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 skip
12447 22:59:46.043323 arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 pass
12448 22:59:46.043520 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 skip
12449 22:59:46.043654 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 skip
12450 22:59:46.043770 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 skip
12451 22:59:46.043885 arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 pass
12452 22:59:46.043996 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 skip
12453 22:59:46.044134 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 skip
12454 22:59:46.044254 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 skip
12455 22:59:46.044367 arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 pass
12456 22:59:46.047983 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 skip
12457 22:59:46.048260 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 skip
12458 22:59:46.048466 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 skip
12459 22:59:46.048653 arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 pass
12460 22:59:46.048877 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 skip
12461 22:59:46.049089 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 skip
12462 22:59:46.049300 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 skip
12463 22:59:46.049551 arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 pass
12464 22:59:46.049769 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 skip
12465 22:59:46.049964 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 skip
12466 22:59:46.050161 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 skip
12467 22:59:46.050393 arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 pass
12468 22:59:46.050596 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 skip
12469 22:59:46.050803 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 skip
12470 22:59:46.050995 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 skip
12471 22:59:46.051164 arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 pass
12472 22:59:46.051344 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 skip
12473 22:59:46.051551 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 skip
12474 22:59:46.051696 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 skip
12475 22:59:46.051816 arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 pass
12476 22:59:46.051931 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 skip
12477 22:59:46.052048 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 skip
12478 22:59:46.052165 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 skip
12479 22:59:46.052280 arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 pass
12480 22:59:46.052396 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 skip
12481 22:59:46.055785 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 skip
12482 22:59:46.056234 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 skip
12483 22:59:46.056434 arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 pass
12484 22:59:46.056585 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 skip
12485 22:59:46.056790 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 skip
12486 22:59:46.056959 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 skip
12487 22:59:46.057159 arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 pass
12488 22:59:46.057336 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 skip
12489 22:59:46.057539 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 skip
12490 22:59:46.057724 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 skip
12491 22:59:46.057927 arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 pass
12492 22:59:46.058129 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 skip
12493 22:59:46.058321 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 skip
12494 22:59:46.058516 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 skip
12495 22:59:46.058689 arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 pass
12496 22:59:46.058895 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 skip
12497 22:59:46.059108 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 skip
12498 22:59:46.059317 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 skip
12499 22:59:46.059499 arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 pass
12500 22:59:46.059688 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 skip
12501 22:59:46.059902 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 skip
12502 22:59:46.060041 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 skip
12503 22:59:46.060187 arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 pass
12504 22:59:46.060332 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 skip
12505 22:59:46.060474 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 skip
12506 22:59:46.060616 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 skip
12507 22:59:46.060758 arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 pass
12508 22:59:46.060903 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 skip
12509 22:59:46.061045 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 skip
12510 22:59:46.063971 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 skip
12511 22:59:46.064166 arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 pass
12512 22:59:46.064405 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 skip
12513 22:59:46.064623 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 skip
12514 22:59:46.064829 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 skip
12515 22:59:46.065079 arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 pass
12516 22:59:46.065274 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 skip
12517 22:59:46.065423 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 skip
12518 22:59:46.065583 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 skip
12519 22:59:46.065788 arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 pass
12520 22:59:46.066010 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 skip
12521 22:59:46.066240 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 skip
12522 22:59:46.066454 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 skip
12523 22:59:46.066677 arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 pass
12524 22:59:46.066880 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 skip
12525 22:59:46.067133 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 skip
12526 22:59:46.067356 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 skip
12527 22:59:46.067562 arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 pass
12528 22:59:46.067724 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 skip
12529 22:59:46.067849 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 skip
12530 22:59:46.067965 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 skip
12531 22:59:46.068081 arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 pass
12532 22:59:46.068194 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 skip
12533 22:59:46.068309 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 skip
12534 22:59:46.068451 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 skip
12535 22:59:46.068572 arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 pass
12536 22:59:46.068689 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 skip
12537 22:59:46.071772 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 skip
12538 22:59:46.072175 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 skip
12539 22:59:46.082197 arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 pass
12540 22:59:46.082513 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 skip
12541 22:59:46.082624 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 skip
12542 22:59:46.082731 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 skip
12543 22:59:46.082819 arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 pass
12544 22:59:46.082927 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 skip
12545 22:59:46.083029 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 skip
12546 22:59:46.083369 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 skip
12547 22:59:46.083563 arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 pass
12548 22:59:46.083764 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 skip
12549 22:59:46.084121 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 skip
12550 22:59:46.084384 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 skip
12551 22:59:46.084597 arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 pass
12552 22:59:46.084804 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 skip
12553 22:59:46.084995 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 skip
12554 22:59:46.085211 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 skip
12555 22:59:46.085392 arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 pass
12556 22:59:46.085605 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 skip
12557 22:59:46.085821 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 skip
12558 22:59:46.086031 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 skip
12559 22:59:46.086221 arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 pass
12560 22:59:46.086434 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 skip
12561 22:59:46.086691 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 skip
12562 22:59:46.086884 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 skip
12563 22:59:46.087063 arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 pass
12564 22:59:46.087237 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 skip
12565 22:59:46.087393 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 skip
12566 22:59:46.087550 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 skip
12567 22:59:46.087717 arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 pass
12568 22:59:46.087847 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 skip
12569 22:59:46.087963 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 skip
12570 22:59:46.088079 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 skip
12571 22:59:46.088224 arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 pass
12572 22:59:46.088345 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 skip
12573 22:59:46.088463 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 skip
12574 22:59:46.088582 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 skip
12575 22:59:46.088698 arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 pass
12576 22:59:46.088813 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 skip
12577 22:59:46.088926 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 skip
12578 22:59:46.089253 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 skip
12579 22:59:46.089379 arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 pass
12580 22:59:46.089495 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 skip
12581 22:59:46.091899 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 skip
12582 22:59:46.092099 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 skip
12583 22:59:46.092569 arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 pass
12584 22:59:46.092769 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 skip
12585 22:59:46.092975 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 skip
12586 22:59:46.093149 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 skip
12587 22:59:46.093307 arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 pass
12588 22:59:46.093497 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 skip
12589 22:59:46.093686 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 skip
12590 22:59:46.093848 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 skip
12591 22:59:46.094005 arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 pass
12592 22:59:46.094160 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 skip
12593 22:59:46.094314 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 skip
12594 22:59:46.094468 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 skip
12595 22:59:46.094655 arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 pass
12596 22:59:46.094815 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 skip
12597 22:59:46.094971 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 skip
12598 22:59:46.095125 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 skip
12599 22:59:46.095279 arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 pass
12600 22:59:46.095433 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 skip
12601 22:59:46.095587 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 skip
12602 22:59:46.095741 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 skip
12603 22:59:46.095928 arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 pass
12604 22:59:46.096086 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 skip
12605 22:59:46.096244 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 skip
12606 22:59:46.096399 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 skip
12607 22:59:46.096553 arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 pass
12608 22:59:46.096707 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 skip
12609 22:59:46.096863 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 skip
12610 22:59:46.099784 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 skip
12611 22:59:46.100270 arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 pass
12612 22:59:46.100466 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 skip
12613 22:59:46.100652 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 skip
12614 22:59:46.100871 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 skip
12615 22:59:46.101037 arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 pass
12616 22:59:46.101190 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 skip
12617 22:59:46.101342 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 skip
12618 22:59:46.101493 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 skip
12619 22:59:46.101698 arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 pass
12620 22:59:46.101856 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 skip
12621 22:59:46.102011 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 skip
12622 22:59:46.102157 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 skip
12623 22:59:46.102312 arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 pass
12624 22:59:46.102460 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 skip
12625 22:59:46.102596 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 skip
12626 22:59:46.102776 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 skip
12627 22:59:46.102924 arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 pass
12628 22:59:46.103080 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 skip
12629 22:59:46.103264 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 skip
12630 22:59:46.103426 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 skip
12631 22:59:46.103575 arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 pass
12632 22:59:46.103724 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 skip
12633 22:59:46.103886 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 skip
12634 22:59:46.104050 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 skip
12635 22:59:46.104174 arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 pass
12636 22:59:46.104294 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 skip
12637 22:59:46.104411 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 skip
12638 22:59:46.104526 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 skip
12639 22:59:46.104643 arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 pass
12640 22:59:46.107788 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 skip
12641 22:59:46.108203 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 skip
12642 22:59:46.108400 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 skip
12643 22:59:46.108638 arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 pass
12644 22:59:46.108845 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 skip
12645 22:59:46.109042 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 skip
12646 22:59:46.109249 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 skip
12647 22:59:46.109401 arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 pass
12648 22:59:46.109577 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 skip
12649 22:59:46.109752 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 skip
12650 22:59:46.109943 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 skip
12651 22:59:46.110109 arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 pass
12652 22:59:46.110252 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 skip
12653 22:59:46.110419 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 skip
12654 22:59:46.110650 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 skip
12655 22:59:46.110830 arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 pass
12656 22:59:46.111008 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 skip
12657 22:59:46.111195 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 skip
12658 22:59:46.111380 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 skip
12659 22:59:46.111566 arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 pass
12660 22:59:46.111788 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 skip
12661 22:59:46.111976 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 skip
12662 22:59:46.112163 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 skip
12663 22:59:46.112349 arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 pass
12664 22:59:46.112532 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 skip
12665 22:59:46.115763 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 skip
12666 22:59:46.116183 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 skip
12667 22:59:46.116363 arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 pass
12668 22:59:46.116555 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 skip
12669 22:59:46.116723 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 skip
12670 22:59:46.116915 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 skip
12671 22:59:46.117083 arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 pass
12672 22:59:46.117245 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 skip
12673 22:59:46.130557 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 skip
12674 22:59:46.130891 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 skip
12675 22:59:46.131343 arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 pass
12676 22:59:46.131559 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 skip
12677 22:59:46.131740 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 skip
12678 22:59:46.131914 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 skip
12679 22:59:46.132088 arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 pass
12680 22:59:46.132263 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 skip
12681 22:59:46.132458 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 skip
12682 22:59:46.132637 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 skip
12683 22:59:46.132814 arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 pass
12684 22:59:46.132984 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 skip
12685 22:59:46.133159 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 skip
12686 22:59:46.133333 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 skip
12687 22:59:46.133543 arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 pass
12688 22:59:46.133737 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 skip
12689 22:59:46.133909 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 skip
12690 22:59:46.134084 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 skip
12691 22:59:46.134256 arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 pass
12692 22:59:46.134428 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 skip
12693 22:59:46.134600 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 skip
12694 22:59:46.134809 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 skip
12695 22:59:46.134992 arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 pass
12696 22:59:46.135164 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 skip
12697 22:59:46.135340 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 skip
12698 22:59:46.135511 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 skip
12699 22:59:46.135684 arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 pass
12700 22:59:46.135858 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 skip
12701 22:59:46.136032 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 skip
12702 22:59:46.136237 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 skip
12703 22:59:46.136410 arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 pass
12704 22:59:46.136582 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 skip
12705 22:59:46.136754 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 skip
12706 22:59:46.137151 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 skip
12707 22:59:46.139855 arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 pass
12708 22:59:46.140259 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 skip
12709 22:59:46.140365 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 skip
12710 22:59:46.140455 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 skip
12711 22:59:46.140552 arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 pass
12712 22:59:46.140653 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 skip
12713 22:59:46.140751 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 skip
12714 22:59:46.140850 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 skip
12715 22:59:46.140956 arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 pass
12716 22:59:46.141058 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 skip
12717 22:59:46.141321 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 skip
12718 22:59:46.141438 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 skip
12719 22:59:46.141540 arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 pass
12720 22:59:46.141638 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 skip
12721 22:59:46.141946 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 skip
12722 22:59:46.142046 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 skip
12723 22:59:46.142142 arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 pass
12724 22:59:46.142223 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 skip
12725 22:59:46.142317 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 skip
12726 22:59:46.142411 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 skip
12727 22:59:46.142696 arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 pass
12728 22:59:46.142792 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 skip
12729 22:59:46.142894 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 skip
12730 22:59:46.143000 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 skip
12731 22:59:46.143100 arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 pass
12732 22:59:46.143390 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 skip
12733 22:59:46.143483 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 skip
12734 22:59:46.143581 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 skip
12735 22:59:46.147764 arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 pass
12736 22:59:46.148107 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 skip
12737 22:59:46.148271 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 skip
12738 22:59:46.148421 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 skip
12739 22:59:46.148541 arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 pass
12740 22:59:46.148677 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 skip
12741 22:59:46.148799 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 skip
12742 22:59:46.148940 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 skip
12743 22:59:46.149057 arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 pass
12744 22:59:46.149377 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 skip
12745 22:59:46.149483 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 skip
12746 22:59:46.149570 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 skip
12747 22:59:46.149680 arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 pass
12748 22:59:46.149770 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 skip
12749 22:59:46.149870 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 skip
12750 22:59:46.149971 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 skip
12751 22:59:46.150082 arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 pass
12752 22:59:46.150382 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 skip
12753 22:59:46.150497 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 skip
12754 22:59:46.150597 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 skip
12755 22:59:46.150682 arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 pass
12756 22:59:46.150989 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 skip
12757 22:59:46.151202 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 skip
12758 22:59:46.151413 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 skip
12759 22:59:46.151592 arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 pass
12760 22:59:46.151765 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 skip
12761 22:59:46.151958 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 skip
12762 22:59:46.155778 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 skip
12763 22:59:46.156146 arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 pass
12764 22:59:46.156247 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 skip
12765 22:59:46.156350 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 skip
12766 22:59:46.156437 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 skip
12767 22:59:46.156538 arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 pass
12768 22:59:46.156640 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 skip
12769 22:59:46.156743 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 skip
12770 22:59:46.156841 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 skip
12771 22:59:46.156940 arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 pass
12772 22:59:46.157241 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 skip
12773 22:59:46.157349 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 skip
12774 22:59:46.157451 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 skip
12775 22:59:46.157550 arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 pass
12776 22:59:46.157657 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 skip
12777 22:59:46.157959 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 skip
12778 22:59:46.158074 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 skip
12779 22:59:46.158162 arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 pass
12780 22:59:46.158261 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 skip
12781 22:59:46.158361 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 skip
12782 22:59:46.158469 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 skip
12783 22:59:46.161914 arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 pass
12784 22:59:46.162057 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 skip
12785 22:59:46.162147 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 skip
12786 22:59:46.162231 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 skip
12787 22:59:46.162314 arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 pass
12788 22:59:46.162396 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 skip
12789 22:59:46.162480 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 skip
12790 22:59:46.162567 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 skip
12791 22:59:46.163765 arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 pass
12792 22:59:46.164071 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 skip
12793 22:59:46.164169 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 skip
12794 22:59:46.164269 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 skip
12795 22:59:46.164353 arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 pass
12796 22:59:46.164630 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 skip
12797 22:59:46.164721 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 skip
12798 22:59:46.164821 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 skip
12799 22:59:46.164922 arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 pass
12800 22:59:46.165030 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 skip
12801 22:59:46.165127 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 skip
12802 22:59:46.165448 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 skip
12803 22:59:46.165547 arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 pass
12804 22:59:46.165656 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 skip
12805 22:59:46.165752 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 skip
12806 22:59:46.166041 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 skip
12807 22:59:46.183994 arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 pass
12808 22:59:46.184465 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 skip
12809 22:59:46.184567 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 skip
12810 22:59:46.184672 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 skip
12811 22:59:46.184759 arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 pass
12812 22:59:46.184842 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 skip
12813 22:59:46.184941 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 skip
12814 22:59:46.185028 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 skip
12815 22:59:46.185129 arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 pass
12816 22:59:46.185215 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 skip
12817 22:59:46.185315 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 skip
12818 22:59:46.185612 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 skip
12819 22:59:46.185773 arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 pass
12820 22:59:46.185931 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 skip
12821 22:59:46.186052 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 skip
12822 22:59:46.186193 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 skip
12823 22:59:46.186312 arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 pass
12824 22:59:46.186452 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 skip
12825 22:59:46.186588 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 skip
12826 22:59:46.186724 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 skip
12827 22:59:46.186868 arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 pass
12828 22:59:46.187012 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 skip
12829 22:59:46.187150 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 skip
12830 22:59:46.187293 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 skip
12831 22:59:46.187475 arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 pass
12832 22:59:46.187648 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 skip
12833 22:59:46.191830 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 skip
12834 22:59:46.192323 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 skip
12835 22:59:46.192462 arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 pass
12836 22:59:46.192629 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 skip
12837 22:59:46.192793 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 skip
12838 22:59:46.192976 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 skip
12839 22:59:46.193127 arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 pass
12840 22:59:46.193269 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 skip
12841 22:59:46.193400 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 skip
12842 22:59:46.193539 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 skip
12843 22:59:46.193666 arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 pass
12844 22:59:46.193803 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 skip
12845 22:59:46.194151 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 skip
12846 22:59:46.194256 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 skip
12847 22:59:46.194335 arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 pass
12848 22:59:46.194409 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 skip
12849 22:59:46.194483 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 skip
12850 22:59:46.194557 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 skip
12851 22:59:46.194629 arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 pass
12852 22:59:46.194719 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 skip
12853 22:59:46.194798 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 skip
12854 22:59:46.194880 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 skip
12855 22:59:46.194972 arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 pass
12856 22:59:46.195051 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 skip
12857 22:59:46.195363 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 skip
12858 22:59:46.195503 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 skip
12859 22:59:46.195614 arm64_sve-ptrace pass
12860 22:59:46.195702 arm64_sve-probe-vls_Enumerated_16_vector_lengths pass
12861 22:59:46.199999 arm64_sve-probe-vls_All_vector_lengths_valid pass
12862 22:59:46.200227 arm64_sve-probe-vls pass
12863 22:59:46.200309 arm64_vec-syscfg_SVE_default_vector_length_64 pass
12864 22:59:46.200403 arm64_vec-syscfg_SVE_minimum_vector_length_16 pass
12865 22:59:46.200486 arm64_vec-syscfg_SVE_maximum_vector_length_256 pass
12866 22:59:46.200561 arm64_vec-syscfg_SVE_current_VL_is_64 pass
12867 22:59:46.200647 arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 pass
12868 22:59:46.200721 arm64_vec-syscfg_SVE_prctl_set_min_max pass
12869 22:59:46.200809 arm64_vec-syscfg_SVE_vector_length_used_default pass
12870 22:59:46.200896 arm64_vec-syscfg_SVE_vector_length_was_inherited pass
12871 22:59:46.201168 arm64_vec-syscfg_SVE_vector_length_set_on_exec pass
12872 22:59:46.201330 arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors pass
12873 22:59:46.201456 arm64_vec-syscfg_SME_default_vector_length_32 pass
12874 22:59:46.201558 arm64_vec-syscfg_SME_minimum_vector_length_16 pass
12875 22:59:46.201638 arm64_vec-syscfg_SME_maximum_vector_length_256 pass
12876 22:59:46.201736 arm64_vec-syscfg_SME_current_VL_is_32 pass
12877 22:59:46.201820 arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 pass
12878 22:59:46.202061 arm64_vec-syscfg_SME_prctl_set_min_max pass
12879 22:59:46.202151 arm64_vec-syscfg_SME_vector_length_used_default pass
12880 22:59:46.202231 arm64_vec-syscfg_SME_vector_length_was_inherited pass
12881 22:59:46.202309 arm64_vec-syscfg_SME_vector_length_set_on_exec pass
12882 22:59:46.202601 arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors pass
12883 22:59:46.202742 arm64_vec-syscfg pass
12884 22:59:46.202861 arm64_za-fork_fork_test pass
12885 22:59:46.202998 arm64_za-fork pass
12886 22:59:46.203102 arm64_za-ptrace_Set_VL_16 pass
12887 22:59:46.203196 arm64_za-ptrace_Disabled_ZA_for_VL_16 pass
12888 22:59:46.203288 arm64_za-ptrace_Data_match_for_VL_16 pass
12889 22:59:46.203398 arm64_za-ptrace_Set_VL_32 pass
12890 22:59:46.203492 arm64_za-ptrace_Disabled_ZA_for_VL_32 pass
12891 22:59:46.203583 arm64_za-ptrace_Data_match_for_VL_32 pass
12892 22:59:46.203670 arm64_za-ptrace_Set_VL_48 pass
12893 22:59:46.203771 arm64_za-ptrace_Disabled_ZA_for_VL_48 skip
12894 22:59:46.207763 arm64_za-ptrace_Get_and_set_data_for_VL_48 skip
12895 22:59:46.208131 arm64_za-ptrace_Set_VL_64 pass
12896 22:59:46.208229 arm64_za-ptrace_Disabled_ZA_for_VL_64 pass
12897 22:59:46.208313 arm64_za-ptrace_Data_match_for_VL_64 pass
12898 22:59:46.208394 arm64_za-ptrace_Set_VL_80 pass
12899 22:59:46.208751 arm64_za-ptrace_Disabled_ZA_for_VL_80 skip
12900 22:59:46.208852 arm64_za-ptrace_Get_and_set_data_for_VL_80 skip
12901 22:59:46.208937 arm64_za-ptrace_Set_VL_96 pass
12902 22:59:46.209022 arm64_za-ptrace_Disabled_ZA_for_VL_96 skip
12903 22:59:46.209110 arm64_za-ptrace_Get_and_set_data_for_VL_96 skip
12904 22:59:46.209193 arm64_za-ptrace_Set_VL_112 pass
12905 22:59:46.209276 arm64_za-ptrace_Disabled_ZA_for_VL_112 skip
12906 22:59:46.209359 arm64_za-ptrace_Get_and_set_data_for_VL_112 skip
12907 22:59:46.209458 arm64_za-ptrace_Set_VL_128 pass
12908 22:59:46.209540 arm64_za-ptrace_Disabled_ZA_for_VL_128 pass
12909 22:59:46.209623 arm64_za-ptrace_Data_match_for_VL_128 pass
12910 22:59:46.209714 arm64_za-ptrace_Set_VL_144 pass
12911 22:59:46.209812 arm64_za-ptrace_Disabled_ZA_for_VL_144 skip
12912 22:59:46.209893 arm64_za-ptrace_Get_and_set_data_for_VL_144 skip
12913 22:59:46.209977 arm64_za-ptrace_Set_VL_160 pass
12914 22:59:46.210061 arm64_za-ptrace_Disabled_ZA_for_VL_160 skip
12915 22:59:46.210149 arm64_za-ptrace_Get_and_set_data_for_VL_160 skip
12916 22:59:46.210232 arm64_za-ptrace_Set_VL_176 pass
12917 22:59:46.210317 arm64_za-ptrace_Disabled_ZA_for_VL_176 skip
12918 22:59:46.210419 arm64_za-ptrace_Get_and_set_data_for_VL_176 skip
12919 22:59:46.210505 arm64_za-ptrace_Set_VL_192 pass
12920 22:59:46.210589 arm64_za-ptrace_Disabled_ZA_for_VL_192 skip
12921 22:59:46.210672 arm64_za-ptrace_Get_and_set_data_for_VL_192 skip
12922 22:59:46.210754 arm64_za-ptrace_Set_VL_208 pass
12923 22:59:46.210835 arm64_za-ptrace_Disabled_ZA_for_VL_208 skip
12924 22:59:46.210918 arm64_za-ptrace_Get_and_set_data_for_VL_208 skip
12925 22:59:46.211020 arm64_za-ptrace_Set_VL_224 pass
12926 22:59:46.211104 arm64_za-ptrace_Disabled_ZA_for_VL_224 skip
12927 22:59:46.211193 arm64_za-ptrace_Get_and_set_data_for_VL_224 skip
12928 22:59:46.211276 arm64_za-ptrace_Set_VL_240 pass
12929 22:59:46.211359 arm64_za-ptrace_Disabled_ZA_for_VL_240 skip
12930 22:59:46.211458 arm64_za-ptrace_Get_and_set_data_for_VL_240 skip
12931 22:59:46.211544 arm64_za-ptrace_Set_VL_256 pass
12932 22:59:46.211627 arm64_za-ptrace_Disabled_ZA_for_VL_256 pass
12933 22:59:46.211712 arm64_za-ptrace_Data_match_for_VL_256 pass
12934 22:59:46.211812 arm64_za-ptrace_Set_VL_272 pass
12935 22:59:46.211898 arm64_za-ptrace_Disabled_ZA_for_VL_272 skip
12936 22:59:46.215809 arm64_za-ptrace_Get_and_set_data_for_VL_272 skip
12937 22:59:46.216149 arm64_za-ptrace_Set_VL_288 pass
12938 22:59:46.216252 arm64_za-ptrace_Disabled_ZA_for_VL_288 skip
12939 22:59:46.216347 arm64_za-ptrace_Get_and_set_data_for_VL_288 skip
12940 22:59:46.216440 arm64_za-ptrace_Set_VL_304 pass
12941 22:59:46.216551 arm64_za-ptrace_Disabled_ZA_for_VL_304 skip
12942 22:59:46.216646 arm64_za-ptrace_Get_and_set_data_for_VL_304 skip
12943 22:59:46.216739 arm64_za-ptrace_Set_VL_320 pass
12944 22:59:46.216833 arm64_za-ptrace_Disabled_ZA_for_VL_320 skip
12945 22:59:46.216944 arm64_za-ptrace_Get_and_set_data_for_VL_320 skip
12946 22:59:46.217040 arm64_za-ptrace_Set_VL_336 pass
12947 22:59:46.217134 arm64_za-ptrace_Disabled_ZA_for_VL_336 skip
12948 22:59:46.217228 arm64_za-ptrace_Get_and_set_data_for_VL_336 skip
12949 22:59:46.217321 arm64_za-ptrace_Set_VL_352 pass
12950 22:59:46.217432 arm64_za-ptrace_Disabled_ZA_for_VL_352 skip
12951 22:59:46.217527 arm64_za-ptrace_Get_and_set_data_for_VL_352 skip
12952 22:59:46.217621 arm64_za-ptrace_Set_VL_368 pass
12953 22:59:46.217724 arm64_za-ptrace_Disabled_ZA_for_VL_368 skip
12954 22:59:46.217835 arm64_za-ptrace_Get_and_set_data_for_VL_368 skip
12955 22:59:46.217931 arm64_za-ptrace_Set_VL_384 pass
12956 22:59:46.218023 arm64_za-ptrace_Disabled_ZA_for_VL_384 skip
12957 22:59:46.218116 arm64_za-ptrace_Get_and_set_data_for_VL_384 skip
12958 22:59:46.218209 arm64_za-ptrace_Set_VL_400 pass
12959 22:59:46.218319 arm64_za-ptrace_Disabled_ZA_for_VL_400 skip
12960 22:59:46.218413 arm64_za-ptrace_Get_and_set_data_for_VL_400 skip
12961 22:59:46.218507 arm64_za-ptrace_Set_VL_416 pass
12962 22:59:46.218603 arm64_za-ptrace_Disabled_ZA_for_VL_416 skip
12963 22:59:46.218714 arm64_za-ptrace_Get_and_set_data_for_VL_416 skip
12964 22:59:46.218809 arm64_za-ptrace_Set_VL_432 pass
12965 22:59:46.218903 arm64_za-ptrace_Disabled_ZA_for_VL_432 skip
12966 22:59:46.219013 arm64_za-ptrace_Get_and_set_data_for_VL_432 skip
12967 22:59:46.219109 arm64_za-ptrace_Set_VL_448 pass
12968 22:59:46.219203 arm64_za-ptrace_Disabled_ZA_for_VL_448 skip
12969 22:59:46.219313 arm64_za-ptrace_Get_and_set_data_for_VL_448 skip
12970 22:59:46.219408 arm64_za-ptrace_Set_VL_464 pass
12971 22:59:46.219517 arm64_za-ptrace_Disabled_ZA_for_VL_464 skip
12972 22:59:46.219612 arm64_za-ptrace_Get_and_set_data_for_VL_464 skip
12973 22:59:46.219720 arm64_za-ptrace_Set_VL_480 pass
12974 22:59:46.223779 arm64_za-ptrace_Disabled_ZA_for_VL_480 skip
12975 22:59:46.224110 arm64_za-ptrace_Get_and_set_data_for_VL_480 skip
12976 22:59:46.224210 arm64_za-ptrace_Set_VL_496 pass
12977 22:59:46.224291 arm64_za-ptrace_Disabled_ZA_for_VL_496 skip
12978 22:59:46.239979 arm64_za-ptrace_Get_and_set_data_for_VL_496 skip
12979 22:59:46.240216 arm64_za-ptrace_Set_VL_512 pass
12980 22:59:46.240578 arm64_za-ptrace_Disabled_ZA_for_VL_512 skip
12981 22:59:46.240777 arm64_za-ptrace_Get_and_set_data_for_VL_512 skip
12982 22:59:46.240978 arm64_za-ptrace_Set_VL_528 pass
12983 22:59:46.241160 arm64_za-ptrace_Disabled_ZA_for_VL_528 skip
12984 22:59:46.241328 arm64_za-ptrace_Get_and_set_data_for_VL_528 skip
12985 22:59:46.241565 arm64_za-ptrace_Set_VL_544 pass
12986 22:59:46.241778 arm64_za-ptrace_Disabled_ZA_for_VL_544 skip
12987 22:59:46.241953 arm64_za-ptrace_Get_and_set_data_for_VL_544 skip
12988 22:59:46.242137 arm64_za-ptrace_Set_VL_560 pass
12989 22:59:46.242332 arm64_za-ptrace_Disabled_ZA_for_VL_560 skip
12990 22:59:46.242521 arm64_za-ptrace_Get_and_set_data_for_VL_560 skip
12991 22:59:46.242698 arm64_za-ptrace_Set_VL_576 pass
12992 22:59:46.242866 arm64_za-ptrace_Disabled_ZA_for_VL_576 skip
12993 22:59:46.243086 arm64_za-ptrace_Get_and_set_data_for_VL_576 skip
12994 22:59:46.243287 arm64_za-ptrace_Set_VL_592 pass
12995 22:59:46.243478 arm64_za-ptrace_Disabled_ZA_for_VL_592 skip
12996 22:59:46.243633 arm64_za-ptrace_Get_and_set_data_for_VL_592 skip
12997 22:59:46.243759 arm64_za-ptrace_Set_VL_608 pass
12998 22:59:46.243875 arm64_za-ptrace_Disabled_ZA_for_VL_608 skip
12999 22:59:46.243992 arm64_za-ptrace_Get_and_set_data_for_VL_608 skip
13000 22:59:46.244107 arm64_za-ptrace_Set_VL_624 pass
13001 22:59:46.244225 arm64_za-ptrace_Disabled_ZA_for_VL_624 skip
13002 22:59:46.244342 arm64_za-ptrace_Get_and_set_data_for_VL_624 skip
13003 22:59:46.244458 arm64_za-ptrace_Set_VL_640 pass
13004 22:59:46.244573 arm64_za-ptrace_Disabled_ZA_for_VL_640 skip
13005 22:59:46.244689 arm64_za-ptrace_Get_and_set_data_for_VL_640 skip
13006 22:59:46.244804 arm64_za-ptrace_Set_VL_656 pass
13007 22:59:46.244948 arm64_za-ptrace_Disabled_ZA_for_VL_656 skip
13008 22:59:46.245071 arm64_za-ptrace_Get_and_set_data_for_VL_656 skip
13009 22:59:46.245191 arm64_za-ptrace_Set_VL_672 pass
13010 22:59:46.245306 arm64_za-ptrace_Disabled_ZA_for_VL_672 skip
13011 22:59:46.245421 arm64_za-ptrace_Get_and_set_data_for_VL_672 skip
13012 22:59:46.247911 arm64_za-ptrace_Set_VL_688 pass
13013 22:59:46.248070 arm64_za-ptrace_Disabled_ZA_for_VL_688 skip
13014 22:59:46.248424 arm64_za-ptrace_Get_and_set_data_for_VL_688 skip
13015 22:59:46.248595 arm64_za-ptrace_Set_VL_704 pass
13016 22:59:46.248736 arm64_za-ptrace_Disabled_ZA_for_VL_704 skip
13017 22:59:46.248866 arm64_za-ptrace_Get_and_set_data_for_VL_704 skip
13018 22:59:46.249024 arm64_za-ptrace_Set_VL_720 pass
13019 22:59:46.249243 arm64_za-ptrace_Disabled_ZA_for_VL_720 skip
13020 22:59:46.249396 arm64_za-ptrace_Get_and_set_data_for_VL_720 skip
13021 22:59:46.249527 arm64_za-ptrace_Set_VL_736 pass
13022 22:59:46.249685 arm64_za-ptrace_Disabled_ZA_for_VL_736 skip
13023 22:59:46.249848 arm64_za-ptrace_Get_and_set_data_for_VL_736 skip
13024 22:59:46.250010 arm64_za-ptrace_Set_VL_752 pass
13025 22:59:46.250207 arm64_za-ptrace_Disabled_ZA_for_VL_752 skip
13026 22:59:46.250401 arm64_za-ptrace_Get_and_set_data_for_VL_752 skip
13027 22:59:46.250556 arm64_za-ptrace_Set_VL_768 pass
13028 22:59:46.250728 arm64_za-ptrace_Disabled_ZA_for_VL_768 skip
13029 22:59:46.250888 arm64_za-ptrace_Get_and_set_data_for_VL_768 skip
13030 22:59:46.251095 arm64_za-ptrace_Set_VL_784 pass
13031 22:59:46.251326 arm64_za-ptrace_Disabled_ZA_for_VL_784 skip
13032 22:59:46.251543 arm64_za-ptrace_Get_and_set_data_for_VL_784 skip
13033 22:59:46.251755 arm64_za-ptrace_Set_VL_800 pass
13034 22:59:46.251895 arm64_za-ptrace_Disabled_ZA_for_VL_800 skip
13035 22:59:46.252038 arm64_za-ptrace_Get_and_set_data_for_VL_800 skip
13036 22:59:46.252180 arm64_za-ptrace_Set_VL_816 pass
13037 22:59:46.252322 arm64_za-ptrace_Disabled_ZA_for_VL_816 skip
13038 22:59:46.252464 arm64_za-ptrace_Get_and_set_data_for_VL_816 skip
13039 22:59:46.252606 arm64_za-ptrace_Set_VL_832 pass
13040 22:59:46.252747 arm64_za-ptrace_Disabled_ZA_for_VL_832 skip
13041 22:59:46.252888 arm64_za-ptrace_Get_and_set_data_for_VL_832 skip
13042 22:59:46.253027 arm64_za-ptrace_Set_VL_848 pass
13043 22:59:46.253168 arm64_za-ptrace_Disabled_ZA_for_VL_848 skip
13044 22:59:46.253309 arm64_za-ptrace_Get_and_set_data_for_VL_848 skip
13045 22:59:46.255766 arm64_za-ptrace_Set_VL_864 pass
13046 22:59:46.256084 arm64_za-ptrace_Disabled_ZA_for_VL_864 skip
13047 22:59:46.256182 arm64_za-ptrace_Get_and_set_data_for_VL_864 skip
13048 22:59:46.256262 arm64_za-ptrace_Set_VL_880 pass
13049 22:59:46.256341 arm64_za-ptrace_Disabled_ZA_for_VL_880 skip
13050 22:59:46.256416 arm64_za-ptrace_Get_and_set_data_for_VL_880 skip
13051 22:59:46.256489 arm64_za-ptrace_Set_VL_896 pass
13052 22:59:46.256606 arm64_za-ptrace_Disabled_ZA_for_VL_896 skip
13053 22:59:46.256722 arm64_za-ptrace_Get_and_set_data_for_VL_896 skip
13054 22:59:46.256810 arm64_za-ptrace_Set_VL_912 pass
13055 22:59:46.256905 arm64_za-ptrace_Disabled_ZA_for_VL_912 skip
13056 22:59:46.256986 arm64_za-ptrace_Get_and_set_data_for_VL_912 skip
13057 22:59:46.257078 arm64_za-ptrace_Set_VL_928 pass
13058 22:59:46.257165 arm64_za-ptrace_Disabled_ZA_for_VL_928 skip
13059 22:59:46.257262 arm64_za-ptrace_Get_and_set_data_for_VL_928 skip
13060 22:59:46.257354 arm64_za-ptrace_Set_VL_944 pass
13061 22:59:46.257435 arm64_za-ptrace_Disabled_ZA_for_VL_944 skip
13062 22:59:46.257532 arm64_za-ptrace_Get_and_set_data_for_VL_944 skip
13063 22:59:46.257604 arm64_za-ptrace_Set_VL_960 pass
13064 22:59:46.257735 arm64_za-ptrace_Disabled_ZA_for_VL_960 skip
13065 22:59:46.257848 arm64_za-ptrace_Get_and_set_data_for_VL_960 skip
13066 22:59:46.257961 arm64_za-ptrace_Set_VL_976 pass
13067 22:59:46.258061 arm64_za-ptrace_Disabled_ZA_for_VL_976 skip
13068 22:59:46.258179 arm64_za-ptrace_Get_and_set_data_for_VL_976 skip
13069 22:59:46.258275 arm64_za-ptrace_Set_VL_992 pass
13070 22:59:46.258397 arm64_za-ptrace_Disabled_ZA_for_VL_992 skip
13071 22:59:46.258493 arm64_za-ptrace_Get_and_set_data_for_VL_992 skip
13072 22:59:46.258596 arm64_za-ptrace_Set_VL_1008 pass
13073 22:59:46.258711 arm64_za-ptrace_Disabled_ZA_for_VL_1008 skip
13074 22:59:46.258809 arm64_za-ptrace_Get_and_set_data_for_VL_1008 skip
13075 22:59:46.258909 arm64_za-ptrace_Set_VL_1024 pass
13076 22:59:46.259032 arm64_za-ptrace_Disabled_ZA_for_VL_1024 skip
13077 22:59:46.259125 arm64_za-ptrace_Get_and_set_data_for_VL_1024 skip
13078 22:59:46.259222 arm64_za-ptrace_Set_VL_1040 pass
13079 22:59:46.259337 arm64_za-ptrace_Disabled_ZA_for_VL_1040 skip
13080 22:59:46.259423 arm64_za-ptrace_Get_and_set_data_for_VL_1040 skip
13081 22:59:46.259504 arm64_za-ptrace_Set_VL_1056 pass
13082 22:59:46.259595 arm64_za-ptrace_Disabled_ZA_for_VL_1056 skip
13083 22:59:46.259660 arm64_za-ptrace_Get_and_set_data_for_VL_1056 skip
13084 22:59:46.263763 arm64_za-ptrace_Set_VL_1072 pass
13085 22:59:46.264052 arm64_za-ptrace_Disabled_ZA_for_VL_1072 skip
13086 22:59:46.264152 arm64_za-ptrace_Get_and_set_data_for_VL_1072 skip
13087 22:59:46.264265 arm64_za-ptrace_Set_VL_1088 pass
13088 22:59:46.264357 arm64_za-ptrace_Disabled_ZA_for_VL_1088 skip
13089 22:59:46.264425 arm64_za-ptrace_Get_and_set_data_for_VL_1088 skip
13090 22:59:46.264504 arm64_za-ptrace_Set_VL_1104 pass
13091 22:59:46.264596 arm64_za-ptrace_Disabled_ZA_for_VL_1104 skip
13092 22:59:46.264728 arm64_za-ptrace_Get_and_set_data_for_VL_1104 skip
13093 22:59:46.264850 arm64_za-ptrace_Set_VL_1120 pass
13094 22:59:46.264938 arm64_za-ptrace_Disabled_ZA_for_VL_1120 skip
13095 22:59:46.265060 arm64_za-ptrace_Get_and_set_data_for_VL_1120 skip
13096 22:59:46.265202 arm64_za-ptrace_Set_VL_1136 pass
13097 22:59:46.265299 arm64_za-ptrace_Disabled_ZA_for_VL_1136 skip
13098 22:59:46.265398 arm64_za-ptrace_Get_and_set_data_for_VL_1136 skip
13099 22:59:46.265520 arm64_za-ptrace_Set_VL_1152 pass
13100 22:59:46.265625 arm64_za-ptrace_Disabled_ZA_for_VL_1152 skip
13101 22:59:46.265747 arm64_za-ptrace_Get_and_set_data_for_VL_1152 skip
13102 22:59:46.265847 arm64_za-ptrace_Set_VL_1168 pass
13103 22:59:46.265933 arm64_za-ptrace_Disabled_ZA_for_VL_1168 skip
13104 22:59:46.266032 arm64_za-ptrace_Get_and_set_data_for_VL_1168 skip
13105 22:59:46.266144 arm64_za-ptrace_Set_VL_1184 pass
13106 22:59:46.266238 arm64_za-ptrace_Disabled_ZA_for_VL_1184 skip
13107 22:59:46.266306 arm64_za-ptrace_Get_and_set_data_for_VL_1184 skip
13108 22:59:46.266372 arm64_za-ptrace_Set_VL_1200 pass
13109 22:59:46.266466 arm64_za-ptrace_Disabled_ZA_for_VL_1200 skip
13110 22:59:46.266544 arm64_za-ptrace_Get_and_set_data_for_VL_1200 skip
13111 22:59:46.266621 arm64_za-ptrace_Set_VL_1216 pass
13112 22:59:46.266718 arm64_za-ptrace_Disabled_ZA_for_VL_1216 skip
13113 22:59:46.266835 arm64_za-ptrace_Get_and_set_data_for_VL_1216 skip
13114 22:59:46.266919 arm64_za-ptrace_Set_VL_1232 pass
13115 22:59:46.267012 arm64_za-ptrace_Disabled_ZA_for_VL_1232 skip
13116 22:59:46.267122 arm64_za-ptrace_Get_and_set_data_for_VL_1232 skip
13117 22:59:46.267208 arm64_za-ptrace_Set_VL_1248 pass
13118 22:59:46.267288 arm64_za-ptrace_Disabled_ZA_for_VL_1248 skip
13119 22:59:46.267390 arm64_za-ptrace_Get_and_set_data_for_VL_1248 skip
13120 22:59:46.267466 arm64_za-ptrace_Set_VL_1264 pass
13121 22:59:46.269752 arm64_za-ptrace_Disabled_ZA_for_VL_1264 skip
13122 22:59:46.269846 arm64_za-ptrace_Get_and_set_data_for_VL_1264 skip
13123 22:59:46.271790 arm64_za-ptrace_Set_VL_1280 pass
13124 22:59:46.272087 arm64_za-ptrace_Disabled_ZA_for_VL_1280 skip
13125 22:59:46.272305 arm64_za-ptrace_Get_and_set_data_for_VL_1280 skip
13126 22:59:46.272469 arm64_za-ptrace_Set_VL_1296 pass
13127 22:59:46.272621 arm64_za-ptrace_Disabled_ZA_for_VL_1296 skip
13128 22:59:46.272817 arm64_za-ptrace_Get_and_set_data_for_VL_1296 skip
13129 22:59:46.272983 arm64_za-ptrace_Set_VL_1312 pass
13130 22:59:46.273150 arm64_za-ptrace_Disabled_ZA_for_VL_1312 skip
13131 22:59:46.273313 arm64_za-ptrace_Get_and_set_data_for_VL_1312 skip
13132 22:59:46.273498 arm64_za-ptrace_Set_VL_1328 pass
13133 22:59:46.273673 arm64_za-ptrace_Disabled_ZA_for_VL_1328 skip
13134 22:59:46.273838 arm64_za-ptrace_Get_and_set_data_for_VL_1328 skip
13135 22:59:46.273996 arm64_za-ptrace_Set_VL_1344 pass
13136 22:59:46.274153 arm64_za-ptrace_Disabled_ZA_for_VL_1344 skip
13137 22:59:46.274346 arm64_za-ptrace_Get_and_set_data_for_VL_1344 skip
13138 22:59:46.274510 arm64_za-ptrace_Set_VL_1360 pass
13139 22:59:46.274671 arm64_za-ptrace_Disabled_ZA_for_VL_1360 skip
13140 22:59:46.274835 arm64_za-ptrace_Get_and_set_data_for_VL_1360 skip
13141 22:59:46.275012 arm64_za-ptrace_Set_VL_1376 pass
13142 22:59:46.275202 arm64_za-ptrace_Disabled_ZA_for_VL_1376 skip
13143 22:59:46.275374 arm64_za-ptrace_Get_and_set_data_for_VL_1376 skip
13144 22:59:46.275576 arm64_za-ptrace_Set_VL_1392 pass
13145 22:59:46.275722 arm64_za-ptrace_Disabled_ZA_for_VL_1392 skip
13146 22:59:46.275840 arm64_za-ptrace_Get_and_set_data_for_VL_1392 skip
13147 22:59:46.275955 arm64_za-ptrace_Set_VL_1408 pass
13148 22:59:46.276070 arm64_za-ptrace_Disabled_ZA_for_VL_1408 skip
13149 22:59:46.276186 arm64_za-ptrace_Get_and_set_data_for_VL_1408 skip
13150 22:59:46.276301 arm64_za-ptrace_Set_VL_1424 pass
13151 22:59:46.276416 arm64_za-ptrace_Disabled_ZA_for_VL_1424 skip
13152 22:59:46.276532 arm64_za-ptrace_Get_and_set_data_for_VL_1424 skip
13153 22:59:46.276646 arm64_za-ptrace_Set_VL_1440 pass
13154 22:59:46.279817 arm64_za-ptrace_Disabled_ZA_for_VL_1440 skip
13155 22:59:46.280162 arm64_za-ptrace_Get_and_set_data_for_VL_1440 skip
13156 22:59:46.280284 arm64_za-ptrace_Set_VL_1456 pass
13157 22:59:46.280399 arm64_za-ptrace_Disabled_ZA_for_VL_1456 skip
13158 22:59:46.280531 arm64_za-ptrace_Get_and_set_data_for_VL_1456 skip
13159 22:59:46.280693 arm64_za-ptrace_Set_VL_1472 pass
13160 22:59:46.280832 arm64_za-ptrace_Disabled_ZA_for_VL_1472 skip
13161 22:59:46.280969 arm64_za-ptrace_Get_and_set_data_for_VL_1472 skip
13162 22:59:46.281071 arm64_za-ptrace_Set_VL_1488 pass
13163 22:59:46.281179 arm64_za-ptrace_Disabled_ZA_for_VL_1488 skip
13164 22:59:46.281391 arm64_za-ptrace_Get_and_set_data_for_VL_1488 skip
13165 22:59:46.281584 arm64_za-ptrace_Set_VL_1504 pass
13166 22:59:46.281789 arm64_za-ptrace_Disabled_ZA_for_VL_1504 skip
13167 22:59:46.281986 arm64_za-ptrace_Get_and_set_data_for_VL_1504 skip
13168 22:59:46.282148 arm64_za-ptrace_Set_VL_1520 pass
13169 22:59:46.282274 arm64_za-ptrace_Disabled_ZA_for_VL_1520 skip
13170 22:59:46.282392 arm64_za-ptrace_Get_and_set_data_for_VL_1520 skip
13171 22:59:46.282534 arm64_za-ptrace_Set_VL_1536 pass
13172 22:59:46.282657 arm64_za-ptrace_Disabled_ZA_for_VL_1536 skip
13173 22:59:46.307830 arm64_za-ptrace_Get_and_set_data_for_VL_1536 skip
13174 22:59:46.308291 arm64_za-ptrace_Set_VL_1552 pass
13175 22:59:46.308477 arm64_za-ptrace_Disabled_ZA_for_VL_1552 skip
13176 22:59:46.308619 arm64_za-ptrace_Get_and_set_data_for_VL_1552 skip
13177 22:59:46.308811 arm64_za-ptrace_Set_VL_1568 pass
13178 22:59:46.309035 arm64_za-ptrace_Disabled_ZA_for_VL_1568 skip
13179 22:59:46.309228 arm64_za-ptrace_Get_and_set_data_for_VL_1568 skip
13180 22:59:46.309424 arm64_za-ptrace_Set_VL_1584 pass
13181 22:59:46.309607 arm64_za-ptrace_Disabled_ZA_for_VL_1584 skip
13182 22:59:46.309803 arm64_za-ptrace_Get_and_set_data_for_VL_1584 skip
13183 22:59:46.310002 arm64_za-ptrace_Set_VL_1600 pass
13184 22:59:46.310190 arm64_za-ptrace_Disabled_ZA_for_VL_1600 skip
13185 22:59:46.310401 arm64_za-ptrace_Get_and_set_data_for_VL_1600 skip
13186 22:59:46.310575 arm64_za-ptrace_Set_VL_1616 pass
13187 22:59:46.310746 arm64_za-ptrace_Disabled_ZA_for_VL_1616 skip
13188 22:59:46.310885 arm64_za-ptrace_Get_and_set_data_for_VL_1616 skip
13189 22:59:46.311074 arm64_za-ptrace_Set_VL_1632 pass
13190 22:59:46.311270 arm64_za-ptrace_Disabled_ZA_for_VL_1632 skip
13191 22:59:46.311447 arm64_za-ptrace_Get_and_set_data_for_VL_1632 skip
13192 22:59:46.311586 arm64_za-ptrace_Set_VL_1648 pass
13193 22:59:46.311710 arm64_za-ptrace_Disabled_ZA_for_VL_1648 skip
13194 22:59:46.311828 arm64_za-ptrace_Get_and_set_data_for_VL_1648 skip
13195 22:59:46.311942 arm64_za-ptrace_Set_VL_1664 pass
13196 22:59:46.312056 arm64_za-ptrace_Disabled_ZA_for_VL_1664 skip
13197 22:59:46.312201 arm64_za-ptrace_Get_and_set_data_for_VL_1664 skip
13198 22:59:46.312323 arm64_za-ptrace_Set_VL_1680 pass
13199 22:59:46.312439 arm64_za-ptrace_Disabled_ZA_for_VL_1680 skip
13200 22:59:46.312554 arm64_za-ptrace_Get_and_set_data_for_VL_1680 skip
13201 22:59:46.312669 arm64_za-ptrace_Set_VL_1696 pass
13202 22:59:46.312782 arm64_za-ptrace_Disabled_ZA_for_VL_1696 skip
13203 22:59:46.312897 arm64_za-ptrace_Get_and_set_data_for_VL_1696 skip
13204 22:59:46.313013 arm64_za-ptrace_Set_VL_1712 pass
13205 22:59:46.313127 arm64_za-ptrace_Disabled_ZA_for_VL_1712 skip
13206 22:59:46.313243 arm64_za-ptrace_Get_and_set_data_for_VL_1712 skip
13207 22:59:46.313363 arm64_za-ptrace_Set_VL_1728 pass
13208 22:59:46.315817 arm64_za-ptrace_Disabled_ZA_for_VL_1728 skip
13209 22:59:46.316265 arm64_za-ptrace_Get_and_set_data_for_VL_1728 skip
13210 22:59:46.316475 arm64_za-ptrace_Set_VL_1744 pass
13211 22:59:46.316643 arm64_za-ptrace_Disabled_ZA_for_VL_1744 skip
13212 22:59:46.316778 arm64_za-ptrace_Get_and_set_data_for_VL_1744 skip
13213 22:59:46.316956 arm64_za-ptrace_Set_VL_1760 pass
13214 22:59:46.317100 arm64_za-ptrace_Disabled_ZA_for_VL_1760 skip
13215 22:59:46.317248 arm64_za-ptrace_Get_and_set_data_for_VL_1760 skip
13216 22:59:46.317405 arm64_za-ptrace_Set_VL_1776 pass
13217 22:59:46.317564 arm64_za-ptrace_Disabled_ZA_for_VL_1776 skip
13218 22:59:46.318041 arm64_za-ptrace_Get_and_set_data_for_VL_1776 skip
13219 22:59:46.318212 arm64_za-ptrace_Set_VL_1792 pass
13220 22:59:46.318404 arm64_za-ptrace_Disabled_ZA_for_VL_1792 skip
13221 22:59:46.318568 arm64_za-ptrace_Get_and_set_data_for_VL_1792 skip
13222 22:59:46.318730 arm64_za-ptrace_Set_VL_1808 pass
13223 22:59:46.318887 arm64_za-ptrace_Disabled_ZA_for_VL_1808 skip
13224 22:59:46.319039 arm64_za-ptrace_Get_and_set_data_for_VL_1808 skip
13225 22:59:46.319193 arm64_za-ptrace_Set_VL_1824 pass
13226 22:59:46.319355 arm64_za-ptrace_Disabled_ZA_for_VL_1824 skip
13227 22:59:46.319517 arm64_za-ptrace_Get_and_set_data_for_VL_1824 skip
13228 22:59:46.319657 arm64_za-ptrace_Set_VL_1840 pass
13229 22:59:46.319772 arm64_za-ptrace_Disabled_ZA_for_VL_1840 skip
13230 22:59:46.319884 arm64_za-ptrace_Get_and_set_data_for_VL_1840 skip
13231 22:59:46.320051 arm64_za-ptrace_Set_VL_1856 pass
13232 22:59:46.320181 arm64_za-ptrace_Disabled_ZA_for_VL_1856 skip
13233 22:59:46.320322 arm64_za-ptrace_Get_and_set_data_for_VL_1856 skip
13234 22:59:46.320442 arm64_za-ptrace_Set_VL_1872 pass
13235 22:59:46.321759 arm64_za-ptrace_Disabled_ZA_for_VL_1872 skip
13236 22:59:46.321916 arm64_za-ptrace_Get_and_set_data_for_VL_1872 skip
13237 22:59:46.322038 arm64_za-ptrace_Set_VL_1888 pass
13238 22:59:46.322156 arm64_za-ptrace_Disabled_ZA_for_VL_1888 skip
13239 22:59:46.322273 arm64_za-ptrace_Get_and_set_data_for_VL_1888 skip
13240 22:59:46.322391 arm64_za-ptrace_Set_VL_1904 pass
13241 22:59:46.322508 arm64_za-ptrace_Disabled_ZA_for_VL_1904 skip
13242 22:59:46.322626 arm64_za-ptrace_Get_and_set_data_for_VL_1904 skip
13243 22:59:46.322744 arm64_za-ptrace_Set_VL_1920 pass
13244 22:59:46.322860 arm64_za-ptrace_Disabled_ZA_for_VL_1920 skip
13245 22:59:46.322977 arm64_za-ptrace_Get_and_set_data_for_VL_1920 skip
13246 22:59:46.323094 arm64_za-ptrace_Set_VL_1936 pass
13247 22:59:46.323820 arm64_za-ptrace_Disabled_ZA_for_VL_1936 skip
13248 22:59:46.324232 arm64_za-ptrace_Get_and_set_data_for_VL_1936 skip
13249 22:59:46.324423 arm64_za-ptrace_Set_VL_1952 pass
13250 22:59:46.324619 arm64_za-ptrace_Disabled_ZA_for_VL_1952 skip
13251 22:59:46.324819 arm64_za-ptrace_Get_and_set_data_for_VL_1952 skip
13252 22:59:46.325024 arm64_za-ptrace_Set_VL_1968 pass
13253 22:59:46.325187 arm64_za-ptrace_Disabled_ZA_for_VL_1968 skip
13254 22:59:46.325360 arm64_za-ptrace_Get_and_set_data_for_VL_1968 skip
13255 22:59:46.325527 arm64_za-ptrace_Set_VL_1984 pass
13256 22:59:46.325695 arm64_za-ptrace_Disabled_ZA_for_VL_1984 skip
13257 22:59:46.325850 arm64_za-ptrace_Get_and_set_data_for_VL_1984 skip
13258 22:59:46.326009 arm64_za-ptrace_Set_VL_2000 pass
13259 22:59:46.326145 arm64_za-ptrace_Disabled_ZA_for_VL_2000 skip
13260 22:59:46.326328 arm64_za-ptrace_Get_and_set_data_for_VL_2000 skip
13261 22:59:46.326433 arm64_za-ptrace_Set_VL_2016 pass
13262 22:59:46.326543 arm64_za-ptrace_Disabled_ZA_for_VL_2016 skip
13263 22:59:46.326652 arm64_za-ptrace_Get_and_set_data_for_VL_2016 skip
13264 22:59:46.326781 arm64_za-ptrace_Set_VL_2032 pass
13265 22:59:46.326942 arm64_za-ptrace_Disabled_ZA_for_VL_2032 skip
13266 22:59:46.327091 arm64_za-ptrace_Get_and_set_data_for_VL_2032 skip
13267 22:59:46.327231 arm64_za-ptrace_Set_VL_2048 pass
13268 22:59:46.327365 arm64_za-ptrace_Disabled_ZA_for_VL_2048 skip
13269 22:59:46.327505 arm64_za-ptrace_Get_and_set_data_for_VL_2048 skip
13270 22:59:46.327636 arm64_za-ptrace_Set_VL_2064 pass
13271 22:59:46.327738 arm64_za-ptrace_Disabled_ZA_for_VL_2064 skip
13272 22:59:46.327826 arm64_za-ptrace_Get_and_set_data_for_VL_2064 skip
13273 22:59:46.327913 arm64_za-ptrace_Set_VL_2080 pass
13274 22:59:46.328021 arm64_za-ptrace_Disabled_ZA_for_VL_2080 skip
13275 22:59:46.328114 arm64_za-ptrace_Get_and_set_data_for_VL_2080 skip
13276 22:59:46.328202 arm64_za-ptrace_Set_VL_2096 pass
13277 22:59:46.328288 arm64_za-ptrace_Disabled_ZA_for_VL_2096 skip
13278 22:59:46.328374 arm64_za-ptrace_Get_and_set_data_for_VL_2096 skip
13279 22:59:46.328460 arm64_za-ptrace_Set_VL_2112 pass
13280 22:59:46.328546 arm64_za-ptrace_Disabled_ZA_for_VL_2112 skip
13281 22:59:46.328632 arm64_za-ptrace_Get_and_set_data_for_VL_2112 skip
13282 22:59:46.328719 arm64_za-ptrace_Set_VL_2128 pass
13283 22:59:46.328805 arm64_za-ptrace_Disabled_ZA_for_VL_2128 skip
13284 22:59:46.328891 arm64_za-ptrace_Get_and_set_data_for_VL_2128 skip
13285 22:59:46.331849 arm64_za-ptrace_Set_VL_2144 pass
13286 22:59:46.332161 arm64_za-ptrace_Disabled_ZA_for_VL_2144 skip
13287 22:59:46.332267 arm64_za-ptrace_Get_and_set_data_for_VL_2144 skip
13288 22:59:46.332364 arm64_za-ptrace_Set_VL_2160 pass
13289 22:59:46.332454 arm64_za-ptrace_Disabled_ZA_for_VL_2160 skip
13290 22:59:46.332559 arm64_za-ptrace_Get_and_set_data_for_VL_2160 skip
13291 22:59:46.332647 arm64_za-ptrace_Set_VL_2176 pass
13292 22:59:46.332731 arm64_za-ptrace_Disabled_ZA_for_VL_2176 skip
13293 22:59:46.332833 arm64_za-ptrace_Get_and_set_data_for_VL_2176 skip
13294 22:59:46.332920 arm64_za-ptrace_Set_VL_2192 pass
13295 22:59:46.333005 arm64_za-ptrace_Disabled_ZA_for_VL_2192 skip
13296 22:59:46.333103 arm64_za-ptrace_Get_and_set_data_for_VL_2192 skip
13297 22:59:46.333188 arm64_za-ptrace_Set_VL_2208 pass
13298 22:59:46.333272 arm64_za-ptrace_Disabled_ZA_for_VL_2208 skip
13299 22:59:46.333361 arm64_za-ptrace_Get_and_set_data_for_VL_2208 skip
13300 22:59:46.333460 arm64_za-ptrace_Set_VL_2224 pass
13301 22:59:46.333545 arm64_za-ptrace_Disabled_ZA_for_VL_2224 skip
13302 22:59:46.333629 arm64_za-ptrace_Get_and_set_data_for_VL_2224 skip
13303 22:59:46.333721 arm64_za-ptrace_Set_VL_2240 pass
13304 22:59:46.333822 arm64_za-ptrace_Disabled_ZA_for_VL_2240 skip
13305 22:59:46.333909 arm64_za-ptrace_Get_and_set_data_for_VL_2240 skip
13306 22:59:46.333993 arm64_za-ptrace_Set_VL_2256 pass
13307 22:59:46.334077 arm64_za-ptrace_Disabled_ZA_for_VL_2256 skip
13308 22:59:46.334179 arm64_za-ptrace_Get_and_set_data_for_VL_2256 skip
13309 22:59:46.334265 arm64_za-ptrace_Set_VL_2272 pass
13310 22:59:46.334348 arm64_za-ptrace_Disabled_ZA_for_VL_2272 skip
13311 22:59:46.334448 arm64_za-ptrace_Get_and_set_data_for_VL_2272 skip
13312 22:59:46.334534 arm64_za-ptrace_Set_VL_2288 pass
13313 22:59:46.334620 arm64_za-ptrace_Disabled_ZA_for_VL_2288 skip
13314 22:59:46.334721 arm64_za-ptrace_Get_and_set_data_for_VL_2288 skip
13315 22:59:46.334807 arm64_za-ptrace_Set_VL_2304 pass
13316 22:59:46.334907 arm64_za-ptrace_Disabled_ZA_for_VL_2304 skip
13317 22:59:46.334993 arm64_za-ptrace_Get_and_set_data_for_VL_2304 skip
13318 22:59:46.335090 arm64_za-ptrace_Set_VL_2320 pass
13319 22:59:46.335188 arm64_za-ptrace_Disabled_ZA_for_VL_2320 skip
13320 22:59:46.335289 arm64_za-ptrace_Get_and_set_data_for_VL_2320 skip
13321 22:59:46.335909 arm64_za-ptrace_Set_VL_2336 pass
13322 22:59:46.336014 arm64_za-ptrace_Disabled_ZA_for_VL_2336 skip
13323 22:59:46.336104 arm64_za-ptrace_Get_and_set_data_for_VL_2336 skip
13324 22:59:46.336190 arm64_za-ptrace_Set_VL_2352 pass
13325 22:59:46.339826 arm64_za-ptrace_Disabled_ZA_for_VL_2352 skip
13326 22:59:46.339938 arm64_za-ptrace_Get_and_set_data_for_VL_2352 skip
13327 22:59:46.340228 arm64_za-ptrace_Set_VL_2368 pass
13328 22:59:46.340333 arm64_za-ptrace_Disabled_ZA_for_VL_2368 skip
13329 22:59:46.340420 arm64_za-ptrace_Get_and_set_data_for_VL_2368 skip
13330 22:59:46.340503 arm64_za-ptrace_Set_VL_2384 pass
13331 22:59:46.340604 arm64_za-ptrace_Disabled_ZA_for_VL_2384 skip
13332 22:59:46.340692 arm64_za-ptrace_Get_and_set_data_for_VL_2384 skip
13333 22:59:46.340779 arm64_za-ptrace_Set_VL_2400 pass
13334 22:59:46.340864 arm64_za-ptrace_Disabled_ZA_for_VL_2400 skip
13335 22:59:46.340965 arm64_za-ptrace_Get_and_set_data_for_VL_2400 skip
13336 22:59:46.341053 arm64_za-ptrace_Set_VL_2416 pass
13337 22:59:46.341152 arm64_za-ptrace_Disabled_ZA_for_VL_2416 skip
13338 22:59:46.341241 arm64_za-ptrace_Get_and_set_data_for_VL_2416 skip
13339 22:59:46.341338 arm64_za-ptrace_Set_VL_2432 pass
13340 22:59:46.341437 arm64_za-ptrace_Disabled_ZA_for_VL_2432 skip
13341 22:59:46.341527 arm64_za-ptrace_Get_and_set_data_for_VL_2432 skip
13342 22:59:46.341612 arm64_za-ptrace_Set_VL_2448 pass
13343 22:59:46.341705 arm64_za-ptrace_Disabled_ZA_for_VL_2448 skip
13344 22:59:46.341807 arm64_za-ptrace_Get_and_set_data_for_VL_2448 skip
13345 22:59:46.341892 arm64_za-ptrace_Set_VL_2464 pass
13346 22:59:46.341978 arm64_za-ptrace_Disabled_ZA_for_VL_2464 skip
13347 22:59:46.342075 arm64_za-ptrace_Get_and_set_data_for_VL_2464 skip
13348 22:59:46.342162 arm64_za-ptrace_Set_VL_2480 pass
13349 22:59:46.342245 arm64_za-ptrace_Disabled_ZA_for_VL_2480 skip
13350 22:59:46.342342 arm64_za-ptrace_Get_and_set_data_for_VL_2480 skip
13351 22:59:46.342428 arm64_za-ptrace_Set_VL_2496 pass
13352 22:59:46.342533 arm64_za-ptrace_Disabled_ZA_for_VL_2496 skip
13353 22:59:46.342622 arm64_za-ptrace_Get_and_set_data_for_VL_2496 skip
13354 22:59:46.342708 arm64_za-ptrace_Set_VL_2512 pass
13355 22:59:46.342805 arm64_za-ptrace_Disabled_ZA_for_VL_2512 skip
13356 22:59:46.342887 arm64_za-ptrace_Get_and_set_data_for_VL_2512 skip
13357 22:59:46.342971 arm64_za-ptrace_Set_VL_2528 pass
13358 22:59:46.343071 arm64_za-ptrace_Disabled_ZA_for_VL_2528 skip
13359 22:59:46.343157 arm64_za-ptrace_Get_and_set_data_for_VL_2528 skip
13360 22:59:46.343238 arm64_za-ptrace_Set_VL_2544 pass
13361 22:59:46.343336 arm64_za-ptrace_Disabled_ZA_for_VL_2544 skip
13362 22:59:46.343425 arm64_za-ptrace_Get_and_set_data_for_VL_2544 skip
13363 22:59:46.343524 arm64_za-ptrace_Set_VL_2560 pass
13364 22:59:46.343611 arm64_za-ptrace_Disabled_ZA_for_VL_2560 skip
13365 22:59:46.348168 arm64_za-ptrace_Get_and_set_data_for_VL_2560 skip
13366 22:59:46.363177 arm64_za-ptrace_Set_VL_2576 pass
13367 22:59:46.363629 arm64_za-ptrace_Disabled_ZA_for_VL_2576 skip
13368 22:59:46.363786 arm64_za-ptrace_Get_and_set_data_for_VL_2576 skip
13369 22:59:46.363936 arm64_za-ptrace_Set_VL_2592 pass
13370 22:59:46.364127 arm64_za-ptrace_Disabled_ZA_for_VL_2592 skip
13371 22:59:46.364299 arm64_za-ptrace_Get_and_set_data_for_VL_2592 skip
13372 22:59:46.364465 arm64_za-ptrace_Set_VL_2608 pass
13373 22:59:46.364663 arm64_za-ptrace_Disabled_ZA_for_VL_2608 skip
13374 22:59:46.364831 arm64_za-ptrace_Get_and_set_data_for_VL_2608 skip
13375 22:59:46.365004 arm64_za-ptrace_Set_VL_2624 pass
13376 22:59:46.365172 arm64_za-ptrace_Disabled_ZA_for_VL_2624 skip
13377 22:59:46.365372 arm64_za-ptrace_Get_and_set_data_for_VL_2624 skip
13378 22:59:46.365545 arm64_za-ptrace_Set_VL_2640 pass
13379 22:59:46.365728 arm64_za-ptrace_Disabled_ZA_for_VL_2640 skip
13380 22:59:46.365893 arm64_za-ptrace_Get_and_set_data_for_VL_2640 skip
13381 22:59:46.366055 arm64_za-ptrace_Set_VL_2656 pass
13382 22:59:46.366210 arm64_za-ptrace_Disabled_ZA_for_VL_2656 skip
13383 22:59:46.366362 arm64_za-ptrace_Get_and_set_data_for_VL_2656 skip
13384 22:59:46.366552 arm64_za-ptrace_Set_VL_2672 pass
13385 22:59:46.366714 arm64_za-ptrace_Disabled_ZA_for_VL_2672 skip
13386 22:59:46.366870 arm64_za-ptrace_Get_and_set_data_for_VL_2672 skip
13387 22:59:46.367027 arm64_za-ptrace_Set_VL_2688 pass
13388 22:59:46.367179 arm64_za-ptrace_Disabled_ZA_for_VL_2688 skip
13389 22:59:46.367332 arm64_za-ptrace_Get_and_set_data_for_VL_2688 skip
13390 22:59:46.367489 arm64_za-ptrace_Set_VL_2704 pass
13391 22:59:46.367637 arm64_za-ptrace_Disabled_ZA_for_VL_2704 skip
13392 22:59:46.367757 arm64_za-ptrace_Get_and_set_data_for_VL_2704 skip
13393 22:59:46.367872 arm64_za-ptrace_Set_VL_2720 pass
13394 22:59:46.368015 arm64_za-ptrace_Disabled_ZA_for_VL_2720 skip
13395 22:59:46.368133 arm64_za-ptrace_Get_and_set_data_for_VL_2720 skip
13396 22:59:46.368248 arm64_za-ptrace_Set_VL_2736 pass
13397 22:59:46.368361 arm64_za-ptrace_Disabled_ZA_for_VL_2736 skip
13398 22:59:46.368474 arm64_za-ptrace_Get_and_set_data_for_VL_2736 skip
13399 22:59:46.368588 arm64_za-ptrace_Set_VL_2752 pass
13400 22:59:46.368701 arm64_za-ptrace_Disabled_ZA_for_VL_2752 skip
13401 22:59:46.368816 arm64_za-ptrace_Get_and_set_data_for_VL_2752 skip
13402 22:59:46.368931 arm64_za-ptrace_Set_VL_2768 pass
13403 22:59:46.369044 arm64_za-ptrace_Disabled_ZA_for_VL_2768 skip
13404 22:59:46.371773 arm64_za-ptrace_Get_and_set_data_for_VL_2768 skip
13405 22:59:46.372152 arm64_za-ptrace_Set_VL_2784 pass
13406 22:59:46.372301 arm64_za-ptrace_Disabled_ZA_for_VL_2784 skip
13407 22:59:46.372452 arm64_za-ptrace_Get_and_set_data_for_VL_2784 skip
13408 22:59:46.372627 arm64_za-ptrace_Set_VL_2800 pass
13409 22:59:46.372764 arm64_za-ptrace_Disabled_ZA_for_VL_2800 skip
13410 22:59:46.372928 arm64_za-ptrace_Get_and_set_data_for_VL_2800 skip
13411 22:59:46.373089 arm64_za-ptrace_Set_VL_2816 pass
13412 22:59:46.373285 arm64_za-ptrace_Disabled_ZA_for_VL_2816 skip
13413 22:59:46.373448 arm64_za-ptrace_Get_and_set_data_for_VL_2816 skip
13414 22:59:46.373587 arm64_za-ptrace_Set_VL_2832 pass
13415 22:59:46.373801 arm64_za-ptrace_Disabled_ZA_for_VL_2832 skip
13416 22:59:46.373992 arm64_za-ptrace_Get_and_set_data_for_VL_2832 skip
13417 22:59:46.374182 arm64_za-ptrace_Set_VL_2848 pass
13418 22:59:46.374365 arm64_za-ptrace_Disabled_ZA_for_VL_2848 skip
13419 22:59:46.374502 arm64_za-ptrace_Get_and_set_data_for_VL_2848 skip
13420 22:59:46.374667 arm64_za-ptrace_Set_VL_2864 pass
13421 22:59:46.374826 arm64_za-ptrace_Disabled_ZA_for_VL_2864 skip
13422 22:59:46.374966 arm64_za-ptrace_Get_and_set_data_for_VL_2864 skip
13423 22:59:46.375096 arm64_za-ptrace_Set_VL_2880 pass
13424 22:59:46.375280 arm64_za-ptrace_Disabled_ZA_for_VL_2880 skip
13425 22:59:46.375449 arm64_za-ptrace_Get_and_set_data_for_VL_2880 skip
13426 22:59:46.375595 arm64_za-ptrace_Set_VL_2896 pass
13427 22:59:46.375712 arm64_za-ptrace_Disabled_ZA_for_VL_2896 skip
13428 22:59:46.375856 arm64_za-ptrace_Get_and_set_data_for_VL_2896 skip
13429 22:59:46.375975 arm64_za-ptrace_Set_VL_2912 pass
13430 22:59:46.376090 arm64_za-ptrace_Disabled_ZA_for_VL_2912 skip
13431 22:59:46.376205 arm64_za-ptrace_Get_and_set_data_for_VL_2912 skip
13432 22:59:46.376320 arm64_za-ptrace_Set_VL_2928 pass
13433 22:59:46.376433 arm64_za-ptrace_Disabled_ZA_for_VL_2928 skip
13434 22:59:46.376546 arm64_za-ptrace_Get_and_set_data_for_VL_2928 skip
13435 22:59:46.376658 arm64_za-ptrace_Set_VL_2944 pass
13436 22:59:46.376770 arm64_za-ptrace_Disabled_ZA_for_VL_2944 skip
13437 22:59:46.376883 arm64_za-ptrace_Get_and_set_data_for_VL_2944 skip
13438 22:59:46.376997 arm64_za-ptrace_Set_VL_2960 pass
13439 22:59:46.379828 arm64_za-ptrace_Disabled_ZA_for_VL_2960 skip
13440 22:59:46.380249 arm64_za-ptrace_Get_and_set_data_for_VL_2960 skip
13441 22:59:46.380417 arm64_za-ptrace_Set_VL_2976 pass
13442 22:59:46.380575 arm64_za-ptrace_Disabled_ZA_for_VL_2976 skip
13443 22:59:46.380715 arm64_za-ptrace_Get_and_set_data_for_VL_2976 skip
13444 22:59:46.380862 arm64_za-ptrace_Set_VL_2992 pass
13445 22:59:46.381045 arm64_za-ptrace_Disabled_ZA_for_VL_2992 skip
13446 22:59:46.381211 arm64_za-ptrace_Get_and_set_data_for_VL_2992 skip
13447 22:59:46.381375 arm64_za-ptrace_Set_VL_3008 pass
13448 22:59:46.381536 arm64_za-ptrace_Disabled_ZA_for_VL_3008 skip
13449 22:59:46.381706 arm64_za-ptrace_Get_and_set_data_for_VL_3008 skip
13450 22:59:46.381875 arm64_za-ptrace_Set_VL_3024 pass
13451 22:59:46.382036 arm64_za-ptrace_Disabled_ZA_for_VL_3024 skip
13452 22:59:46.382234 arm64_za-ptrace_Get_and_set_data_for_VL_3024 skip
13453 22:59:46.382409 arm64_za-ptrace_Set_VL_3040 pass
13454 22:59:46.382574 arm64_za-ptrace_Disabled_ZA_for_VL_3040 skip
13455 22:59:46.382734 arm64_za-ptrace_Get_and_set_data_for_VL_3040 skip
13456 22:59:46.382896 arm64_za-ptrace_Set_VL_3056 pass
13457 22:59:46.383041 arm64_za-ptrace_Disabled_ZA_for_VL_3056 skip
13458 22:59:46.383224 arm64_za-ptrace_Get_and_set_data_for_VL_3056 skip
13459 22:59:46.383450 arm64_za-ptrace_Set_VL_3072 pass
13460 22:59:46.383617 arm64_za-ptrace_Disabled_ZA_for_VL_3072 skip
13461 22:59:46.383738 arm64_za-ptrace_Get_and_set_data_for_VL_3072 skip
13462 22:59:46.383854 arm64_za-ptrace_Set_VL_3088 pass
13463 22:59:46.384013 arm64_za-ptrace_Disabled_ZA_for_VL_3088 skip
13464 22:59:46.384178 arm64_za-ptrace_Get_and_set_data_for_VL_3088 skip
13465 22:59:46.384301 arm64_za-ptrace_Set_VL_3104 pass
13466 22:59:46.384420 arm64_za-ptrace_Disabled_ZA_for_VL_3104 skip
13467 22:59:46.384537 arm64_za-ptrace_Get_and_set_data_for_VL_3104 skip
13468 22:59:46.384653 arm64_za-ptrace_Set_VL_3120 pass
13469 22:59:46.384767 arm64_za-ptrace_Disabled_ZA_for_VL_3120 skip
13470 22:59:46.384884 arm64_za-ptrace_Get_and_set_data_for_VL_3120 skip
13471 22:59:46.385000 arm64_za-ptrace_Set_VL_3136 pass
13472 22:59:46.385115 arm64_za-ptrace_Disabled_ZA_for_VL_3136 skip
13473 22:59:46.385229 arm64_za-ptrace_Get_and_set_data_for_VL_3136 skip
13474 22:59:46.385343 arm64_za-ptrace_Set_VL_3152 pass
13475 22:59:46.385459 arm64_za-ptrace_Disabled_ZA_for_VL_3152 skip
13476 22:59:46.385574 arm64_za-ptrace_Get_and_set_data_for_VL_3152 skip
13477 22:59:46.387971 arm64_za-ptrace_Set_VL_3168 pass
13478 22:59:46.388126 arm64_za-ptrace_Disabled_ZA_for_VL_3168 skip
13479 22:59:46.388293 arm64_za-ptrace_Get_and_set_data_for_VL_3168 skip
13480 22:59:46.388445 arm64_za-ptrace_Set_VL_3184 pass
13481 22:59:46.388594 arm64_za-ptrace_Disabled_ZA_for_VL_3184 skip
13482 22:59:46.388757 arm64_za-ptrace_Get_and_set_data_for_VL_3184 skip
13483 22:59:46.388914 arm64_za-ptrace_Set_VL_3200 pass
13484 22:59:46.389064 arm64_za-ptrace_Disabled_ZA_for_VL_3200 skip
13485 22:59:46.389220 arm64_za-ptrace_Get_and_set_data_for_VL_3200 skip
13486 22:59:46.389382 arm64_za-ptrace_Set_VL_3216 pass
13487 22:59:46.389567 arm64_za-ptrace_Disabled_ZA_for_VL_3216 skip
13488 22:59:46.389733 arm64_za-ptrace_Get_and_set_data_for_VL_3216 skip
13489 22:59:46.389864 arm64_za-ptrace_Set_VL_3232 pass
13490 22:59:46.389985 arm64_za-ptrace_Disabled_ZA_for_VL_3232 skip
13491 22:59:46.390096 arm64_za-ptrace_Get_and_set_data_for_VL_3232 skip
13492 22:59:46.390233 arm64_za-ptrace_Set_VL_3248 pass
13493 22:59:46.390361 arm64_za-ptrace_Disabled_ZA_for_VL_3248 skip
13494 22:59:46.390481 arm64_za-ptrace_Get_and_set_data_for_VL_3248 skip
13495 22:59:46.390625 arm64_za-ptrace_Set_VL_3264 pass
13496 22:59:46.390744 arm64_za-ptrace_Disabled_ZA_for_VL_3264 skip
13497 22:59:46.390859 arm64_za-ptrace_Get_and_set_data_for_VL_3264 skip
13498 22:59:46.390971 arm64_za-ptrace_Set_VL_3280 pass
13499 22:59:46.391077 arm64_za-ptrace_Disabled_ZA_for_VL_3280 skip
13500 22:59:46.391197 arm64_za-ptrace_Get_and_set_data_for_VL_3280 skip
13501 22:59:46.391312 arm64_za-ptrace_Set_VL_3296 pass
13502 22:59:46.391426 arm64_za-ptrace_Disabled_ZA_for_VL_3296 skip
13503 22:59:46.391540 arm64_za-ptrace_Get_and_set_data_for_VL_3296 skip
13504 22:59:46.391646 arm64_za-ptrace_Set_VL_3312 pass
13505 22:59:46.391735 arm64_za-ptrace_Disabled_ZA_for_VL_3312 skip
13506 22:59:46.391843 arm64_za-ptrace_Get_and_set_data_for_VL_3312 skip
13507 22:59:46.391949 arm64_za-ptrace_Set_VL_3328 pass
13508 22:59:46.392064 arm64_za-ptrace_Disabled_ZA_for_VL_3328 skip
13509 22:59:46.392153 arm64_za-ptrace_Get_and_set_data_for_VL_3328 skip
13510 22:59:46.392240 arm64_za-ptrace_Set_VL_3344 pass
13511 22:59:46.392327 arm64_za-ptrace_Disabled_ZA_for_VL_3344 skip
13512 22:59:46.392414 arm64_za-ptrace_Get_and_set_data_for_VL_3344 skip
13513 22:59:46.392506 arm64_za-ptrace_Set_VL_3360 pass
13514 22:59:46.395805 arm64_za-ptrace_Disabled_ZA_for_VL_3360 skip
13515 22:59:46.396250 arm64_za-ptrace_Get_and_set_data_for_VL_3360 skip
13516 22:59:46.396440 arm64_za-ptrace_Set_VL_3376 pass
13517 22:59:46.396570 arm64_za-ptrace_Disabled_ZA_for_VL_3376 skip
13518 22:59:46.396701 arm64_za-ptrace_Get_and_set_data_for_VL_3376 skip
13519 22:59:46.396833 arm64_za-ptrace_Set_VL_3392 pass
13520 22:59:46.397001 arm64_za-ptrace_Disabled_ZA_for_VL_3392 skip
13521 22:59:46.397147 arm64_za-ptrace_Get_and_set_data_for_VL_3392 skip
13522 22:59:46.397309 arm64_za-ptrace_Set_VL_3408 pass
13523 22:59:46.397473 arm64_za-ptrace_Disabled_ZA_for_VL_3408 skip
13524 22:59:46.397627 arm64_za-ptrace_Get_and_set_data_for_VL_3408 skip
13525 22:59:46.397791 arm64_za-ptrace_Set_VL_3424 pass
13526 22:59:46.397955 arm64_za-ptrace_Disabled_ZA_for_VL_3424 skip
13527 22:59:46.398160 arm64_za-ptrace_Get_and_set_data_for_VL_3424 skip
13528 22:59:46.398313 arm64_za-ptrace_Set_VL_3440 pass
13529 22:59:46.398451 arm64_za-ptrace_Disabled_ZA_for_VL_3440 skip
13530 22:59:46.398567 arm64_za-ptrace_Get_and_set_data_for_VL_3440 skip
13531 22:59:46.398709 arm64_za-ptrace_Set_VL_3456 pass
13532 22:59:46.398841 arm64_za-ptrace_Disabled_ZA_for_VL_3456 skip
13533 22:59:46.398953 arm64_za-ptrace_Get_and_set_data_for_VL_3456 skip
13534 22:59:46.399073 arm64_za-ptrace_Set_VL_3472 pass
13535 22:59:46.399177 arm64_za-ptrace_Disabled_ZA_for_VL_3472 skip
13536 22:59:46.399291 arm64_za-ptrace_Get_and_set_data_for_VL_3472 skip
13537 22:59:46.399410 arm64_za-ptrace_Set_VL_3488 pass
13538 22:59:46.399526 arm64_za-ptrace_Disabled_ZA_for_VL_3488 skip
13539 22:59:46.399651 arm64_za-ptrace_Get_and_set_data_for_VL_3488 skip
13540 22:59:46.399745 arm64_za-ptrace_Set_VL_3504 pass
13541 22:59:46.399833 arm64_za-ptrace_Disabled_ZA_for_VL_3504 skip
13542 22:59:46.399920 arm64_za-ptrace_Get_and_set_data_for_VL_3504 skip
13543 22:59:46.400008 arm64_za-ptrace_Set_VL_3520 pass
13544 22:59:46.400094 arm64_za-ptrace_Disabled_ZA_for_VL_3520 skip
13545 22:59:46.400181 arm64_za-ptrace_Get_and_set_data_for_VL_3520 skip
13546 22:59:46.400268 arm64_za-ptrace_Set_VL_3536 pass
13547 22:59:46.400354 arm64_za-ptrace_Disabled_ZA_for_VL_3536 skip
13548 22:59:46.400441 arm64_za-ptrace_Get_and_set_data_for_VL_3536 skip
13549 22:59:46.400527 arm64_za-ptrace_Set_VL_3552 pass
13550 22:59:46.400613 arm64_za-ptrace_Disabled_ZA_for_VL_3552 skip
13551 22:59:46.400698 arm64_za-ptrace_Get_and_set_data_for_VL_3552 skip
13552 22:59:46.400785 arm64_za-ptrace_Set_VL_3568 pass
13553 22:59:46.403790 arm64_za-ptrace_Disabled_ZA_for_VL_3568 skip
13554 22:59:46.404225 arm64_za-ptrace_Get_and_set_data_for_VL_3568 skip
13555 22:59:46.404376 arm64_za-ptrace_Set_VL_3584 pass
13556 22:59:46.404499 arm64_za-ptrace_Disabled_ZA_for_VL_3584 skip
13557 22:59:46.404630 arm64_za-ptrace_Get_and_set_data_for_VL_3584 skip
13558 22:59:46.419624 arm64_za-ptrace_Set_VL_3600 pass
13559 22:59:46.420229 arm64_za-ptrace_Disabled_ZA_for_VL_3600 skip
13560 22:59:46.420438 arm64_za-ptrace_Get_and_set_data_for_VL_3600 skip
13561 22:59:46.420612 arm64_za-ptrace_Set_VL_3616 pass
13562 22:59:46.420774 arm64_za-ptrace_Disabled_ZA_for_VL_3616 skip
13563 22:59:46.420970 arm64_za-ptrace_Get_and_set_data_for_VL_3616 skip
13564 22:59:46.421136 arm64_za-ptrace_Set_VL_3632 pass
13565 22:59:46.421299 arm64_za-ptrace_Disabled_ZA_for_VL_3632 skip
13566 22:59:46.421460 arm64_za-ptrace_Get_and_set_data_for_VL_3632 skip
13567 22:59:46.421627 arm64_za-ptrace_Set_VL_3648 pass
13568 22:59:46.421804 arm64_za-ptrace_Disabled_ZA_for_VL_3648 skip
13569 22:59:46.421966 arm64_za-ptrace_Get_and_set_data_for_VL_3648 skip
13570 22:59:46.422128 arm64_za-ptrace_Set_VL_3664 pass
13571 22:59:46.422324 arm64_za-ptrace_Disabled_ZA_for_VL_3664 skip
13572 22:59:46.422494 arm64_za-ptrace_Get_and_set_data_for_VL_3664 skip
13573 22:59:46.422656 arm64_za-ptrace_Set_VL_3680 pass
13574 22:59:46.422819 arm64_za-ptrace_Disabled_ZA_for_VL_3680 skip
13575 22:59:46.422980 arm64_za-ptrace_Get_and_set_data_for_VL_3680 skip
13576 22:59:46.423142 arm64_za-ptrace_Set_VL_3696 pass
13577 22:59:46.423305 arm64_za-ptrace_Disabled_ZA_for_VL_3696 skip
13578 22:59:46.423467 arm64_za-ptrace_Get_and_set_data_for_VL_3696 skip
13579 22:59:46.423629 arm64_za-ptrace_Set_VL_3712 pass
13580 22:59:46.423787 arm64_za-ptrace_Disabled_ZA_for_VL_3712 skip
13581 22:59:46.423946 arm64_za-ptrace_Get_and_set_data_for_VL_3712 skip
13582 22:59:46.424141 arm64_za-ptrace_Set_VL_3728 pass
13583 22:59:46.424305 arm64_za-ptrace_Disabled_ZA_for_VL_3728 skip
13584 22:59:46.424466 arm64_za-ptrace_Get_and_set_data_for_VL_3728 skip
13585 22:59:46.424628 arm64_za-ptrace_Set_VL_3744 pass
13586 22:59:46.424787 arm64_za-ptrace_Disabled_ZA_for_VL_3744 skip
13587 22:59:46.424947 arm64_za-ptrace_Get_and_set_data_for_VL_3744 skip
13588 22:59:46.425107 arm64_za-ptrace_Set_VL_3760 pass
13589 22:59:46.425266 arm64_za-ptrace_Disabled_ZA_for_VL_3760 skip
13590 22:59:46.425425 arm64_za-ptrace_Get_and_set_data_for_VL_3760 skip
13591 22:59:46.425587 arm64_za-ptrace_Set_VL_3776 pass
13592 22:59:46.425757 arm64_za-ptrace_Disabled_ZA_for_VL_3776 skip
13593 22:59:46.427879 arm64_za-ptrace_Get_and_set_data_for_VL_3776 skip
13594 22:59:46.428087 arm64_za-ptrace_Set_VL_3792 pass
13595 22:59:46.428255 arm64_za-ptrace_Disabled_ZA_for_VL_3792 skip
13596 22:59:46.428647 arm64_za-ptrace_Get_and_set_data_for_VL_3792 skip
13597 22:59:46.428824 arm64_za-ptrace_Set_VL_3808 pass
13598 22:59:46.428987 arm64_za-ptrace_Disabled_ZA_for_VL_3808 skip
13599 22:59:46.429148 arm64_za-ptrace_Get_and_set_data_for_VL_3808 skip
13600 22:59:46.429309 arm64_za-ptrace_Set_VL_3824 pass
13601 22:59:46.429471 arm64_za-ptrace_Disabled_ZA_for_VL_3824 skip
13602 22:59:46.429677 arm64_za-ptrace_Get_and_set_data_for_VL_3824 skip
13603 22:59:46.429846 arm64_za-ptrace_Set_VL_3840 pass
13604 22:59:46.430019 arm64_za-ptrace_Disabled_ZA_for_VL_3840 skip
13605 22:59:46.430181 arm64_za-ptrace_Get_and_set_data_for_VL_3840 skip
13606 22:59:46.430341 arm64_za-ptrace_Set_VL_3856 pass
13607 22:59:46.430493 arm64_za-ptrace_Disabled_ZA_for_VL_3856 skip
13608 22:59:46.430639 arm64_za-ptrace_Get_and_set_data_for_VL_3856 skip
13609 22:59:46.430794 arm64_za-ptrace_Set_VL_3872 pass
13610 22:59:46.430997 arm64_za-ptrace_Disabled_ZA_for_VL_3872 skip
13611 22:59:46.431152 arm64_za-ptrace_Get_and_set_data_for_VL_3872 skip
13612 22:59:46.431302 arm64_za-ptrace_Set_VL_3888 pass
13613 22:59:46.431457 arm64_za-ptrace_Disabled_ZA_for_VL_3888 skip
13614 22:59:46.431612 arm64_za-ptrace_Get_and_set_data_for_VL_3888 skip
13615 22:59:46.431773 arm64_za-ptrace_Set_VL_3904 pass
13616 22:59:46.431943 arm64_za-ptrace_Disabled_ZA_for_VL_3904 skip
13617 22:59:46.432125 arm64_za-ptrace_Get_and_set_data_for_VL_3904 skip
13618 22:59:46.432279 arm64_za-ptrace_Set_VL_3920 pass
13619 22:59:46.432451 arm64_za-ptrace_Disabled_ZA_for_VL_3920 skip
13620 22:59:46.432627 arm64_za-ptrace_Get_and_set_data_for_VL_3920 skip
13621 22:59:46.432803 arm64_za-ptrace_Set_VL_3936 pass
13622 22:59:46.433015 arm64_za-ptrace_Disabled_ZA_for_VL_3936 skip
13623 22:59:46.433183 arm64_za-ptrace_Get_and_set_data_for_VL_3936 skip
13624 22:59:46.433354 arm64_za-ptrace_Set_VL_3952 pass
13625 22:59:46.433527 arm64_za-ptrace_Disabled_ZA_for_VL_3952 skip
13626 22:59:46.435841 arm64_za-ptrace_Get_and_set_data_for_VL_3952 skip
13627 22:59:46.436257 arm64_za-ptrace_Set_VL_3968 pass
13628 22:59:46.436443 arm64_za-ptrace_Disabled_ZA_for_VL_3968 skip
13629 22:59:46.436623 arm64_za-ptrace_Get_and_set_data_for_VL_3968 skip
13630 22:59:46.436799 arm64_za-ptrace_Set_VL_3984 pass
13631 22:59:46.437008 arm64_za-ptrace_Disabled_ZA_for_VL_3984 skip
13632 22:59:46.437177 arm64_za-ptrace_Get_and_set_data_for_VL_3984 skip
13633 22:59:46.437335 arm64_za-ptrace_Set_VL_4000 pass
13634 22:59:46.437494 arm64_za-ptrace_Disabled_ZA_for_VL_4000 skip
13635 22:59:46.437644 arm64_za-ptrace_Get_and_set_data_for_VL_4000 skip
13636 22:59:46.437832 arm64_za-ptrace_Set_VL_4016 pass
13637 22:59:46.438041 arm64_za-ptrace_Disabled_ZA_for_VL_4016 skip
13638 22:59:46.438219 arm64_za-ptrace_Get_and_set_data_for_VL_4016 skip
13639 22:59:46.438391 arm64_za-ptrace_Set_VL_4032 pass
13640 22:59:46.438560 arm64_za-ptrace_Disabled_ZA_for_VL_4032 skip
13641 22:59:46.438733 arm64_za-ptrace_Get_and_set_data_for_VL_4032 skip
13642 22:59:46.438903 arm64_za-ptrace_Set_VL_4048 pass
13643 22:59:46.439075 arm64_za-ptrace_Disabled_ZA_for_VL_4048 skip
13644 22:59:46.439248 arm64_za-ptrace_Get_and_set_data_for_VL_4048 skip
13645 22:59:46.439417 arm64_za-ptrace_Set_VL_4064 pass
13646 22:59:46.439628 arm64_za-ptrace_Disabled_ZA_for_VL_4064 skip
13647 22:59:46.439807 arm64_za-ptrace_Get_and_set_data_for_VL_4064 skip
13648 22:59:46.439978 arm64_za-ptrace_Set_VL_4080 pass
13649 22:59:46.440148 arm64_za-ptrace_Disabled_ZA_for_VL_4080 skip
13650 22:59:46.440318 arm64_za-ptrace_Get_and_set_data_for_VL_4080 skip
13651 22:59:46.440492 arm64_za-ptrace_Set_VL_4096 pass
13652 22:59:46.440656 arm64_za-ptrace_Disabled_ZA_for_VL_4096 skip
13653 22:59:46.440817 arm64_za-ptrace_Get_and_set_data_for_VL_4096 skip
13654 22:59:46.440988 arm64_za-ptrace_Set_VL_4112 pass
13655 22:59:46.441156 arm64_za-ptrace_Disabled_ZA_for_VL_4112 skip
13656 22:59:46.441330 arm64_za-ptrace_Get_and_set_data_for_VL_4112 skip
13657 22:59:46.441503 arm64_za-ptrace_Set_VL_4128 pass
13658 22:59:46.441687 arm64_za-ptrace_Disabled_ZA_for_VL_4128 skip
13659 22:59:46.443851 arm64_za-ptrace_Get_and_set_data_for_VL_4128 skip
13660 22:59:46.444257 arm64_za-ptrace_Set_VL_4144 pass
13661 22:59:46.444429 arm64_za-ptrace_Disabled_ZA_for_VL_4144 skip
13662 22:59:46.444636 arm64_za-ptrace_Get_and_set_data_for_VL_4144 skip
13663 22:59:46.444816 arm64_za-ptrace_Set_VL_4160 pass
13664 22:59:46.444988 arm64_za-ptrace_Disabled_ZA_for_VL_4160 skip
13665 22:59:46.445197 arm64_za-ptrace_Get_and_set_data_for_VL_4160 skip
13666 22:59:46.445378 arm64_za-ptrace_Set_VL_4176 pass
13667 22:59:46.445557 arm64_za-ptrace_Disabled_ZA_for_VL_4176 skip
13668 22:59:46.445744 arm64_za-ptrace_Get_and_set_data_for_VL_4176 skip
13669 22:59:46.445956 arm64_za-ptrace_Set_VL_4192 pass
13670 22:59:46.446136 arm64_za-ptrace_Disabled_ZA_for_VL_4192 skip
13671 22:59:46.446315 arm64_za-ptrace_Get_and_set_data_for_VL_4192 skip
13672 22:59:46.446490 arm64_za-ptrace_Set_VL_4208 pass
13673 22:59:46.446658 arm64_za-ptrace_Disabled_ZA_for_VL_4208 skip
13674 22:59:46.446813 arm64_za-ptrace_Get_and_set_data_for_VL_4208 skip
13675 22:59:46.446968 arm64_za-ptrace_Set_VL_4224 pass
13676 22:59:46.447157 arm64_za-ptrace_Disabled_ZA_for_VL_4224 skip
13677 22:59:46.447306 arm64_za-ptrace_Get_and_set_data_for_VL_4224 skip
13678 22:59:46.447460 arm64_za-ptrace_Set_VL_4240 pass
13679 22:59:46.447636 arm64_za-ptrace_Disabled_ZA_for_VL_4240 skip
13680 22:59:46.447811 arm64_za-ptrace_Get_and_set_data_for_VL_4240 skip
13681 22:59:46.447986 arm64_za-ptrace_Set_VL_4256 pass
13682 22:59:46.448161 arm64_za-ptrace_Disabled_ZA_for_VL_4256 skip
13683 22:59:46.448331 arm64_za-ptrace_Get_and_set_data_for_VL_4256 skip
13684 22:59:46.448506 arm64_za-ptrace_Set_VL_4272 pass
13685 22:59:46.448716 arm64_za-ptrace_Disabled_ZA_for_VL_4272 skip
13686 22:59:46.448894 arm64_za-ptrace_Get_and_set_data_for_VL_4272 skip
13687 22:59:46.449064 arm64_za-ptrace_Set_VL_4288 pass
13688 22:59:46.449238 arm64_za-ptrace_Disabled_ZA_for_VL_4288 skip
13689 22:59:46.451756 arm64_za-ptrace_Get_and_set_data_for_VL_4288 skip
13690 22:59:46.452207 arm64_za-ptrace_Set_VL_4304 pass
13691 22:59:46.452417 arm64_za-ptrace_Disabled_ZA_for_VL_4304 skip
13692 22:59:46.452595 arm64_za-ptrace_Get_and_set_data_for_VL_4304 skip
13693 22:59:46.452801 arm64_za-ptrace_Set_VL_4320 pass
13694 22:59:46.452980 arm64_za-ptrace_Disabled_ZA_for_VL_4320 skip
13695 22:59:46.453156 arm64_za-ptrace_Get_and_set_data_for_VL_4320 skip
13696 22:59:46.453331 arm64_za-ptrace_Set_VL_4336 pass
13697 22:59:46.453503 arm64_za-ptrace_Disabled_ZA_for_VL_4336 skip
13698 22:59:46.453691 arm64_za-ptrace_Get_and_set_data_for_VL_4336 skip
13699 22:59:46.453903 arm64_za-ptrace_Set_VL_4352 pass
13700 22:59:46.454082 arm64_za-ptrace_Disabled_ZA_for_VL_4352 skip
13701 22:59:46.454248 arm64_za-ptrace_Get_and_set_data_for_VL_4352 skip
13702 22:59:46.454403 arm64_za-ptrace_Set_VL_4368 pass
13703 22:59:46.454578 arm64_za-ptrace_Disabled_ZA_for_VL_4368 skip
13704 22:59:46.454753 arm64_za-ptrace_Get_and_set_data_for_VL_4368 skip
13705 22:59:46.454929 arm64_za-ptrace_Set_VL_4384 pass
13706 22:59:46.455098 arm64_za-ptrace_Disabled_ZA_for_VL_4384 skip
13707 22:59:46.455307 arm64_za-ptrace_Get_and_set_data_for_VL_4384 skip
13708 22:59:46.455488 arm64_za-ptrace_Set_VL_4400 pass
13709 22:59:46.455664 arm64_za-ptrace_Disabled_ZA_for_VL_4400 skip
13710 22:59:46.455831 arm64_za-ptrace_Get_and_set_data_for_VL_4400 skip
13711 22:59:46.455986 arm64_za-ptrace_Set_VL_4416 pass
13712 22:59:46.456140 arm64_za-ptrace_Disabled_ZA_for_VL_4416 skip
13713 22:59:46.456294 arm64_za-ptrace_Get_and_set_data_for_VL_4416 skip
13714 22:59:46.456442 arm64_za-ptrace_Set_VL_4432 pass
13715 22:59:46.456586 arm64_za-ptrace_Disabled_ZA_for_VL_4432 skip
13716 22:59:46.456758 arm64_za-ptrace_Get_and_set_data_for_VL_4432 skip
13717 22:59:46.456932 arm64_za-ptrace_Set_VL_4448 pass
13718 22:59:46.457139 arm64_za-ptrace_Disabled_ZA_for_VL_4448 skip
13719 22:59:46.457314 arm64_za-ptrace_Get_and_set_data_for_VL_4448 skip
13720 22:59:46.457487 arm64_za-ptrace_Set_VL_4464 pass
13721 22:59:46.459774 arm64_za-ptrace_Disabled_ZA_for_VL_4464 skip
13722 22:59:46.460043 arm64_za-ptrace_Get_and_set_data_for_VL_4464 skip
13723 22:59:46.460115 arm64_za-ptrace_Set_VL_4480 pass
13724 22:59:46.460191 arm64_za-ptrace_Disabled_ZA_for_VL_4480 skip
13725 22:59:46.460435 arm64_za-ptrace_Get_and_set_data_for_VL_4480 skip
13726 22:59:46.460503 arm64_za-ptrace_Set_VL_4496 pass
13727 22:59:46.460582 arm64_za-ptrace_Disabled_ZA_for_VL_4496 skip
13728 22:59:46.460666 arm64_za-ptrace_Get_and_set_data_for_VL_4496 skip
13729 22:59:46.460926 arm64_za-ptrace_Set_VL_4512 pass
13730 22:59:46.461006 arm64_za-ptrace_Disabled_ZA_for_VL_4512 skip
13731 22:59:46.461080 arm64_za-ptrace_Get_and_set_data_for_VL_4512 skip
13732 22:59:46.461155 arm64_za-ptrace_Set_VL_4528 pass
13733 22:59:46.461229 arm64_za-ptrace_Disabled_ZA_for_VL_4528 skip
13734 22:59:46.461497 arm64_za-ptrace_Get_and_set_data_for_VL_4528 skip
13735 22:59:46.461606 arm64_za-ptrace_Set_VL_4544 pass
13736 22:59:46.461733 arm64_za-ptrace_Disabled_ZA_for_VL_4544 skip
13737 22:59:46.461840 arm64_za-ptrace_Get_and_set_data_for_VL_4544 skip
13738 22:59:46.461943 arm64_za-ptrace_Set_VL_4560 pass
13739 22:59:46.462074 arm64_za-ptrace_Disabled_ZA_for_VL_4560 skip
13740 22:59:46.462181 arm64_za-ptrace_Get_and_set_data_for_VL_4560 skip
13741 22:59:46.462315 arm64_za-ptrace_Set_VL_4576 pass
13742 22:59:46.462416 arm64_za-ptrace_Disabled_ZA_for_VL_4576 skip
13743 22:59:46.462525 arm64_za-ptrace_Get_and_set_data_for_VL_4576 skip
13744 22:59:46.462637 arm64_za-ptrace_Set_VL_4592 pass
13745 22:59:46.462755 arm64_za-ptrace_Disabled_ZA_for_VL_4592 skip
13746 22:59:46.462888 arm64_za-ptrace_Get_and_set_data_for_VL_4592 skip
13747 22:59:46.462974 arm64_za-ptrace_Set_VL_4608 pass
13748 22:59:46.463066 arm64_za-ptrace_Disabled_ZA_for_VL_4608 skip
13749 22:59:46.463145 arm64_za-ptrace_Get_and_set_data_for_VL_4608 skip
13750 22:59:46.463600 arm64_za-ptrace_Set_VL_4624 pass
13751 22:59:46.479151 arm64_za-ptrace_Disabled_ZA_for_VL_4624 skip
13752 22:59:46.479365 arm64_za-ptrace_Get_and_set_data_for_VL_4624 skip
13753 22:59:46.479478 arm64_za-ptrace_Set_VL_4640 pass
13754 22:59:46.479589 arm64_za-ptrace_Disabled_ZA_for_VL_4640 skip
13755 22:59:46.479662 arm64_za-ptrace_Get_and_set_data_for_VL_4640 skip
13756 22:59:46.479729 arm64_za-ptrace_Set_VL_4656 pass
13757 22:59:46.479799 arm64_za-ptrace_Disabled_ZA_for_VL_4656 skip
13758 22:59:46.479888 arm64_za-ptrace_Get_and_set_data_for_VL_4656 skip
13759 22:59:46.479976 arm64_za-ptrace_Set_VL_4672 pass
13760 22:59:46.480077 arm64_za-ptrace_Disabled_ZA_for_VL_4672 skip
13761 22:59:46.480180 arm64_za-ptrace_Get_and_set_data_for_VL_4672 skip
13762 22:59:46.480282 arm64_za-ptrace_Set_VL_4688 pass
13763 22:59:46.480371 arm64_za-ptrace_Disabled_ZA_for_VL_4688 skip
13764 22:59:46.480449 arm64_za-ptrace_Get_and_set_data_for_VL_4688 skip
13765 22:59:46.480541 arm64_za-ptrace_Set_VL_4704 pass
13766 22:59:46.480620 arm64_za-ptrace_Disabled_ZA_for_VL_4704 skip
13767 22:59:46.480712 arm64_za-ptrace_Get_and_set_data_for_VL_4704 skip
13768 22:59:46.480791 arm64_za-ptrace_Set_VL_4720 pass
13769 22:59:46.480882 arm64_za-ptrace_Disabled_ZA_for_VL_4720 skip
13770 22:59:46.480976 arm64_za-ptrace_Get_and_set_data_for_VL_4720 skip
13771 22:59:46.481067 arm64_za-ptrace_Set_VL_4736 pass
13772 22:59:46.481365 arm64_za-ptrace_Disabled_ZA_for_VL_4736 skip
13773 22:59:46.481508 arm64_za-ptrace_Get_and_set_data_for_VL_4736 skip
13774 22:59:46.481641 arm64_za-ptrace_Set_VL_4752 pass
13775 22:59:46.481801 arm64_za-ptrace_Disabled_ZA_for_VL_4752 skip
13776 22:59:46.481920 arm64_za-ptrace_Get_and_set_data_for_VL_4752 skip
13777 22:59:46.482012 arm64_za-ptrace_Set_VL_4768 pass
13778 22:59:46.482095 arm64_za-ptrace_Disabled_ZA_for_VL_4768 skip
13779 22:59:46.482197 arm64_za-ptrace_Get_and_set_data_for_VL_4768 skip
13780 22:59:46.482285 arm64_za-ptrace_Set_VL_4784 pass
13781 22:59:46.482372 arm64_za-ptrace_Disabled_ZA_for_VL_4784 skip
13782 22:59:46.482458 arm64_za-ptrace_Get_and_set_data_for_VL_4784 skip
13783 22:59:46.482556 arm64_za-ptrace_Set_VL_4800 pass
13784 22:59:46.482646 arm64_za-ptrace_Disabled_ZA_for_VL_4800 skip
13785 22:59:46.482743 arm64_za-ptrace_Get_and_set_data_for_VL_4800 skip
13786 22:59:46.483032 arm64_za-ptrace_Set_VL_4816 pass
13787 22:59:46.483148 arm64_za-ptrace_Disabled_ZA_for_VL_4816 skip
13788 22:59:46.483233 arm64_za-ptrace_Get_and_set_data_for_VL_4816 skip
13789 22:59:46.483315 arm64_za-ptrace_Set_VL_4832 pass
13790 22:59:46.483397 arm64_za-ptrace_Disabled_ZA_for_VL_4832 skip
13791 22:59:46.483480 arm64_za-ptrace_Get_and_set_data_for_VL_4832 skip
13792 22:59:46.483582 arm64_za-ptrace_Set_VL_4848 pass
13793 22:59:46.483673 arm64_za-ptrace_Disabled_ZA_for_VL_4848 skip
13794 22:59:46.483760 arm64_za-ptrace_Get_and_set_data_for_VL_4848 skip
13795 22:59:46.483848 arm64_za-ptrace_Set_VL_4864 pass
13796 22:59:46.483952 arm64_za-ptrace_Disabled_ZA_for_VL_4864 skip
13797 22:59:46.487785 arm64_za-ptrace_Get_and_set_data_for_VL_4864 skip
13798 22:59:46.488113 arm64_za-ptrace_Set_VL_4880 pass
13799 22:59:46.488215 arm64_za-ptrace_Disabled_ZA_for_VL_4880 skip
13800 22:59:46.488303 arm64_za-ptrace_Get_and_set_data_for_VL_4880 skip
13801 22:59:46.488404 arm64_za-ptrace_Set_VL_4896 pass
13802 22:59:46.488492 arm64_za-ptrace_Disabled_ZA_for_VL_4896 skip
13803 22:59:46.488594 arm64_za-ptrace_Get_and_set_data_for_VL_4896 skip
13804 22:59:46.488685 arm64_za-ptrace_Set_VL_4912 pass
13805 22:59:46.488769 arm64_za-ptrace_Disabled_ZA_for_VL_4912 skip
13806 22:59:46.488868 arm64_za-ptrace_Get_and_set_data_for_VL_4912 skip
13807 22:59:46.488967 arm64_za-ptrace_Set_VL_4928 pass
13808 22:59:46.489051 arm64_za-ptrace_Disabled_ZA_for_VL_4928 skip
13809 22:59:46.489148 arm64_za-ptrace_Get_and_set_data_for_VL_4928 skip
13810 22:59:46.489233 arm64_za-ptrace_Set_VL_4944 pass
13811 22:59:46.489331 arm64_za-ptrace_Disabled_ZA_for_VL_4944 skip
13812 22:59:46.489431 arm64_za-ptrace_Get_and_set_data_for_VL_4944 skip
13813 22:59:46.489517 arm64_za-ptrace_Set_VL_4960 pass
13814 22:59:46.489615 arm64_za-ptrace_Disabled_ZA_for_VL_4960 skip
13815 22:59:46.489712 arm64_za-ptrace_Get_and_set_data_for_VL_4960 skip
13816 22:59:46.489811 arm64_za-ptrace_Set_VL_4976 pass
13817 22:59:46.489896 arm64_za-ptrace_Disabled_ZA_for_VL_4976 skip
13818 22:59:46.489996 arm64_za-ptrace_Get_and_set_data_for_VL_4976 skip
13819 22:59:46.490099 arm64_za-ptrace_Set_VL_4992 pass
13820 22:59:46.490199 arm64_za-ptrace_Disabled_ZA_for_VL_4992 skip
13821 22:59:46.490499 arm64_za-ptrace_Get_and_set_data_for_VL_4992 skip
13822 22:59:46.490599 arm64_za-ptrace_Set_VL_5008 pass
13823 22:59:46.490703 arm64_za-ptrace_Disabled_ZA_for_VL_5008 skip
13824 22:59:46.490792 arm64_za-ptrace_Get_and_set_data_for_VL_5008 skip
13825 22:59:46.490890 arm64_za-ptrace_Set_VL_5024 pass
13826 22:59:46.490975 arm64_za-ptrace_Disabled_ZA_for_VL_5024 skip
13827 22:59:46.491070 arm64_za-ptrace_Get_and_set_data_for_VL_5024 skip
13828 22:59:46.491364 arm64_za-ptrace_Set_VL_5040 pass
13829 22:59:46.491502 arm64_za-ptrace_Disabled_ZA_for_VL_5040 skip
13830 22:59:46.491632 arm64_za-ptrace_Get_and_set_data_for_VL_5040 skip
13831 22:59:46.491726 arm64_za-ptrace_Set_VL_5056 pass
13832 22:59:46.491826 arm64_za-ptrace_Disabled_ZA_for_VL_5056 skip
13833 22:59:46.495853 arm64_za-ptrace_Get_and_set_data_for_VL_5056 skip
13834 22:59:46.496170 arm64_za-ptrace_Set_VL_5072 pass
13835 22:59:46.496670 arm64_za-ptrace_Disabled_ZA_for_VL_5072 skip
13836 22:59:46.496868 arm64_za-ptrace_Get_and_set_data_for_VL_5072 skip
13837 22:59:46.497031 arm64_za-ptrace_Set_VL_5088 pass
13838 22:59:46.497192 arm64_za-ptrace_Disabled_ZA_for_VL_5088 skip
13839 22:59:46.497352 arm64_za-ptrace_Get_and_set_data_for_VL_5088 skip
13840 22:59:46.497510 arm64_za-ptrace_Set_VL_5104 pass
13841 22:59:46.497938 arm64_za-ptrace_Disabled_ZA_for_VL_5104 skip
13842 22:59:46.498128 arm64_za-ptrace_Get_and_set_data_for_VL_5104 skip
13843 22:59:46.498291 arm64_za-ptrace_Set_VL_5120 pass
13844 22:59:46.498450 arm64_za-ptrace_Disabled_ZA_for_VL_5120 skip
13845 22:59:46.498604 arm64_za-ptrace_Get_and_set_data_for_VL_5120 skip
13846 22:59:46.498753 arm64_za-ptrace_Set_VL_5136 pass
13847 22:59:46.498909 arm64_za-ptrace_Disabled_ZA_for_VL_5136 skip
13848 22:59:46.499072 arm64_za-ptrace_Get_and_set_data_for_VL_5136 skip
13849 22:59:46.499230 arm64_za-ptrace_Set_VL_5152 pass
13850 22:59:46.499390 arm64_za-ptrace_Disabled_ZA_for_VL_5152 skip
13851 22:59:46.499544 arm64_za-ptrace_Get_and_set_data_for_VL_5152 skip
13852 22:59:46.499679 arm64_za-ptrace_Set_VL_5168 pass
13853 22:59:46.499797 arm64_za-ptrace_Disabled_ZA_for_VL_5168 skip
13854 22:59:46.499913 arm64_za-ptrace_Get_and_set_data_for_VL_5168 skip
13855 22:59:46.500054 arm64_za-ptrace_Set_VL_5184 pass
13856 22:59:46.500372 arm64_za-ptrace_Disabled_ZA_for_VL_5184 skip
13857 22:59:46.500473 arm64_za-ptrace_Get_and_set_data_for_VL_5184 skip
13858 22:59:46.500551 arm64_za-ptrace_Set_VL_5200 pass
13859 22:59:46.500628 arm64_za-ptrace_Disabled_ZA_for_VL_5200 skip
13860 22:59:46.500701 arm64_za-ptrace_Get_and_set_data_for_VL_5200 skip
13861 22:59:46.500772 arm64_za-ptrace_Set_VL_5216 pass
13862 22:59:46.500846 arm64_za-ptrace_Disabled_ZA_for_VL_5216 skip
13863 22:59:46.500921 arm64_za-ptrace_Get_and_set_data_for_VL_5216 skip
13864 22:59:46.501001 arm64_za-ptrace_Set_VL_5232 pass
13865 22:59:46.501076 arm64_za-ptrace_Disabled_ZA_for_VL_5232 skip
13866 22:59:46.501151 arm64_za-ptrace_Get_and_set_data_for_VL_5232 skip
13867 22:59:46.501229 arm64_za-ptrace_Set_VL_5248 pass
13868 22:59:46.501305 arm64_za-ptrace_Disabled_ZA_for_VL_5248 skip
13869 22:59:46.501385 arm64_za-ptrace_Get_and_set_data_for_VL_5248 skip
13870 22:59:46.501469 arm64_za-ptrace_Set_VL_5264 pass
13871 22:59:46.501548 arm64_za-ptrace_Disabled_ZA_for_VL_5264 skip
13872 22:59:46.501626 arm64_za-ptrace_Get_and_set_data_for_VL_5264 skip
13873 22:59:46.501716 arm64_za-ptrace_Set_VL_5280 pass
13874 22:59:46.501792 arm64_za-ptrace_Disabled_ZA_for_VL_5280 skip
13875 22:59:46.503941 arm64_za-ptrace_Get_and_set_data_for_VL_5280 skip
13876 22:59:46.504290 arm64_za-ptrace_Set_VL_5296 pass
13877 22:59:46.504401 arm64_za-ptrace_Disabled_ZA_for_VL_5296 skip
13878 22:59:46.504489 arm64_za-ptrace_Get_and_set_data_for_VL_5296 skip
13879 22:59:46.504575 arm64_za-ptrace_Set_VL_5312 pass
13880 22:59:46.504681 arm64_za-ptrace_Disabled_ZA_for_VL_5312 skip
13881 22:59:46.504771 arm64_za-ptrace_Get_and_set_data_for_VL_5312 skip
13882 22:59:46.504857 arm64_za-ptrace_Set_VL_5328 pass
13883 22:59:46.504959 arm64_za-ptrace_Disabled_ZA_for_VL_5328 skip
13884 22:59:46.505046 arm64_za-ptrace_Get_and_set_data_for_VL_5328 skip
13885 22:59:46.505131 arm64_za-ptrace_Set_VL_5344 pass
13886 22:59:46.505232 arm64_za-ptrace_Disabled_ZA_for_VL_5344 skip
13887 22:59:46.505319 arm64_za-ptrace_Get_and_set_data_for_VL_5344 skip
13888 22:59:46.505419 arm64_za-ptrace_Set_VL_5360 pass
13889 22:59:46.505506 arm64_za-ptrace_Disabled_ZA_for_VL_5360 skip
13890 22:59:46.505607 arm64_za-ptrace_Get_and_set_data_for_VL_5360 skip
13891 22:59:46.505705 arm64_za-ptrace_Set_VL_5376 pass
13892 22:59:46.506073 arm64_za-ptrace_Disabled_ZA_for_VL_5376 skip
13893 22:59:46.506179 arm64_za-ptrace_Get_and_set_data_for_VL_5376 skip
13894 22:59:46.506467 arm64_za-ptrace_Set_VL_5392 pass
13895 22:59:46.506561 arm64_za-ptrace_Disabled_ZA_for_VL_5392 skip
13896 22:59:46.506634 arm64_za-ptrace_Get_and_set_data_for_VL_5392 skip
13897 22:59:46.506705 arm64_za-ptrace_Set_VL_5408 pass
13898 22:59:46.506776 arm64_za-ptrace_Disabled_ZA_for_VL_5408 skip
13899 22:59:46.506859 arm64_za-ptrace_Get_and_set_data_for_VL_5408 skip
13900 22:59:46.506931 arm64_za-ptrace_Set_VL_5424 pass
13901 22:59:46.507001 arm64_za-ptrace_Disabled_ZA_for_VL_5424 skip
13902 22:59:46.507070 arm64_za-ptrace_Get_and_set_data_for_VL_5424 skip
13903 22:59:46.507151 arm64_za-ptrace_Set_VL_5440 pass
13904 22:59:46.507222 arm64_za-ptrace_Disabled_ZA_for_VL_5440 skip
13905 22:59:46.507293 arm64_za-ptrace_Get_and_set_data_for_VL_5440 skip
13906 22:59:46.507375 arm64_za-ptrace_Set_VL_5456 pass
13907 22:59:46.507447 arm64_za-ptrace_Disabled_ZA_for_VL_5456 skip
13908 22:59:46.507528 arm64_za-ptrace_Get_and_set_data_for_VL_5456 skip
13909 22:59:46.507600 arm64_za-ptrace_Set_VL_5472 pass
13910 22:59:46.507683 arm64_za-ptrace_Disabled_ZA_for_VL_5472 skip
13911 22:59:46.511878 arm64_za-ptrace_Get_and_set_data_for_VL_5472 skip
13912 22:59:46.512066 arm64_za-ptrace_Set_VL_5488 pass
13913 22:59:46.512363 arm64_za-ptrace_Disabled_ZA_for_VL_5488 skip
13914 22:59:46.512468 arm64_za-ptrace_Get_and_set_data_for_VL_5488 skip
13915 22:59:46.512560 arm64_za-ptrace_Set_VL_5504 pass
13916 22:59:46.512647 arm64_za-ptrace_Disabled_ZA_for_VL_5504 skip
13917 22:59:46.512755 arm64_za-ptrace_Get_and_set_data_for_VL_5504 skip
13918 22:59:46.512844 arm64_za-ptrace_Set_VL_5520 pass
13919 22:59:46.512930 arm64_za-ptrace_Disabled_ZA_for_VL_5520 skip
13920 22:59:46.513015 arm64_za-ptrace_Get_and_set_data_for_VL_5520 skip
13921 22:59:46.513101 arm64_za-ptrace_Set_VL_5536 pass
13922 22:59:46.513202 arm64_za-ptrace_Disabled_ZA_for_VL_5536 skip
13923 22:59:46.513290 arm64_za-ptrace_Get_and_set_data_for_VL_5536 skip
13924 22:59:46.513375 arm64_za-ptrace_Set_VL_5552 pass
13925 22:59:46.513477 arm64_za-ptrace_Disabled_ZA_for_VL_5552 skip
13926 22:59:46.513565 arm64_za-ptrace_Get_and_set_data_for_VL_5552 skip
13927 22:59:46.513676 arm64_za-ptrace_Set_VL_5568 pass
13928 22:59:46.513771 arm64_za-ptrace_Disabled_ZA_for_VL_5568 skip
13929 22:59:46.513873 arm64_za-ptrace_Get_and_set_data_for_VL_5568 skip
13930 22:59:46.513961 arm64_za-ptrace_Set_VL_5584 pass
13931 22:59:46.514046 arm64_za-ptrace_Disabled_ZA_for_VL_5584 skip
13932 22:59:46.514147 arm64_za-ptrace_Get_and_set_data_for_VL_5584 skip
13933 22:59:46.514235 arm64_za-ptrace_Set_VL_5600 pass
13934 22:59:46.514320 arm64_za-ptrace_Disabled_ZA_for_VL_5600 skip
13935 22:59:46.514419 arm64_za-ptrace_Get_and_set_data_for_VL_5600 skip
13936 22:59:46.514498 arm64_za-ptrace_Set_VL_5616 pass
13937 22:59:46.514583 arm64_za-ptrace_Disabled_ZA_for_VL_5616 skip
13938 22:59:46.514671 arm64_za-ptrace_Get_and_set_data_for_VL_5616 skip
13939 22:59:46.514752 arm64_za-ptrace_Set_VL_5632 pass
13940 22:59:46.514849 arm64_za-ptrace_Disabled_ZA_for_VL_5632 skip
13941 22:59:46.514950 arm64_za-ptrace_Get_and_set_data_for_VL_5632 skip
13942 22:59:46.515051 arm64_za-ptrace_Set_VL_5648 pass
13943 22:59:46.534228 arm64_za-ptrace_Disabled_ZA_for_VL_5648 skip
13944 22:59:46.534449 arm64_za-ptrace_Get_and_set_data_for_VL_5648 skip
13945 22:59:46.534784 arm64_za-ptrace_Set_VL_5664 pass
13946 22:59:46.534897 arm64_za-ptrace_Disabled_ZA_for_VL_5664 skip
13947 22:59:46.534988 arm64_za-ptrace_Get_and_set_data_for_VL_5664 skip
13948 22:59:46.535074 arm64_za-ptrace_Set_VL_5680 pass
13949 22:59:46.535159 arm64_za-ptrace_Disabled_ZA_for_VL_5680 skip
13950 22:59:46.535260 arm64_za-ptrace_Get_and_set_data_for_VL_5680 skip
13951 22:59:46.535346 arm64_za-ptrace_Set_VL_5696 pass
13952 22:59:46.535432 arm64_za-ptrace_Disabled_ZA_for_VL_5696 skip
13953 22:59:46.535515 arm64_za-ptrace_Get_and_set_data_for_VL_5696 skip
13954 22:59:46.535612 arm64_za-ptrace_Set_VL_5712 pass
13955 22:59:46.535704 arm64_za-ptrace_Disabled_ZA_for_VL_5712 skip
13956 22:59:46.535787 arm64_za-ptrace_Get_and_set_data_for_VL_5712 skip
13957 22:59:46.535889 arm64_za-ptrace_Set_VL_5728 pass
13958 22:59:46.535976 arm64_za-ptrace_Disabled_ZA_for_VL_5728 skip
13959 22:59:46.536078 arm64_za-ptrace_Get_and_set_data_for_VL_5728 skip
13960 22:59:46.536164 arm64_za-ptrace_Set_VL_5744 pass
13961 22:59:46.536260 arm64_za-ptrace_Disabled_ZA_for_VL_5744 skip
13962 22:59:46.536346 arm64_za-ptrace_Get_and_set_data_for_VL_5744 skip
13963 22:59:46.536429 arm64_za-ptrace_Set_VL_5760 pass
13964 22:59:46.536526 arm64_za-ptrace_Disabled_ZA_for_VL_5760 skip
13965 22:59:46.536613 arm64_za-ptrace_Get_and_set_data_for_VL_5760 skip
13966 22:59:46.536714 arm64_za-ptrace_Set_VL_5776 pass
13967 22:59:46.536799 arm64_za-ptrace_Disabled_ZA_for_VL_5776 skip
13968 22:59:46.536879 arm64_za-ptrace_Get_and_set_data_for_VL_5776 skip
13969 22:59:46.536975 arm64_za-ptrace_Set_VL_5792 pass
13970 22:59:46.537059 arm64_za-ptrace_Disabled_ZA_for_VL_5792 skip
13971 22:59:46.537154 arm64_za-ptrace_Get_and_set_data_for_VL_5792 skip
13972 22:59:46.537238 arm64_za-ptrace_Set_VL_5808 pass
13973 22:59:46.537321 arm64_za-ptrace_Disabled_ZA_for_VL_5808 skip
13974 22:59:46.537418 arm64_za-ptrace_Get_and_set_data_for_VL_5808 skip
13975 22:59:46.537502 arm64_za-ptrace_Set_VL_5824 pass
13976 22:59:46.537585 arm64_za-ptrace_Disabled_ZA_for_VL_5824 skip
13977 22:59:46.537690 arm64_za-ptrace_Get_and_set_data_for_VL_5824 skip
13978 22:59:46.537775 arm64_za-ptrace_Set_VL_5840 pass
13979 22:59:46.537858 arm64_za-ptrace_Disabled_ZA_for_VL_5840 skip
13980 22:59:46.537953 arm64_za-ptrace_Get_and_set_data_for_VL_5840 skip
13981 22:59:46.538037 arm64_za-ptrace_Set_VL_5856 pass
13982 22:59:46.538119 arm64_za-ptrace_Disabled_ZA_for_VL_5856 skip
13983 22:59:46.538219 arm64_za-ptrace_Get_and_set_data_for_VL_5856 skip
13984 22:59:46.538304 arm64_za-ptrace_Set_VL_5872 pass
13985 22:59:46.538389 arm64_za-ptrace_Disabled_ZA_for_VL_5872 skip
13986 22:59:46.538487 arm64_za-ptrace_Get_and_set_data_for_VL_5872 skip
13987 22:59:46.538572 arm64_za-ptrace_Set_VL_5888 pass
13988 22:59:46.538671 arm64_za-ptrace_Disabled_ZA_for_VL_5888 skip
13989 22:59:46.539004 arm64_za-ptrace_Get_and_set_data_for_VL_5888 skip
13990 22:59:46.539175 arm64_za-ptrace_Set_VL_5904 pass
13991 22:59:46.539307 arm64_za-ptrace_Disabled_ZA_for_VL_5904 skip
13992 22:59:46.539456 arm64_za-ptrace_Get_and_set_data_for_VL_5904 skip
13993 22:59:46.539589 arm64_za-ptrace_Set_VL_5920 pass
13994 22:59:46.539735 arm64_za-ptrace_Disabled_ZA_for_VL_5920 skip
13995 22:59:46.543777 arm64_za-ptrace_Get_and_set_data_for_VL_5920 skip
13996 22:59:46.544123 arm64_za-ptrace_Set_VL_5936 pass
13997 22:59:46.544224 arm64_za-ptrace_Disabled_ZA_for_VL_5936 skip
13998 22:59:46.544311 arm64_za-ptrace_Get_and_set_data_for_VL_5936 skip
13999 22:59:46.544400 arm64_za-ptrace_Set_VL_5952 pass
14000 22:59:46.544476 arm64_za-ptrace_Disabled_ZA_for_VL_5952 skip
14001 22:59:46.544559 arm64_za-ptrace_Get_and_set_data_for_VL_5952 skip
14002 22:59:46.544647 arm64_za-ptrace_Set_VL_5968 pass
14003 22:59:46.544743 arm64_za-ptrace_Disabled_ZA_for_VL_5968 skip
14004 22:59:46.544830 arm64_za-ptrace_Get_and_set_data_for_VL_5968 skip
14005 22:59:46.545109 arm64_za-ptrace_Set_VL_5984 pass
14006 22:59:46.545188 arm64_za-ptrace_Disabled_ZA_for_VL_5984 skip
14007 22:59:46.545264 arm64_za-ptrace_Get_and_set_data_for_VL_5984 skip
14008 22:59:46.545340 arm64_za-ptrace_Set_VL_6000 pass
14009 22:59:46.545592 arm64_za-ptrace_Disabled_ZA_for_VL_6000 skip
14010 22:59:46.545672 arm64_za-ptrace_Get_and_set_data_for_VL_6000 skip
14011 22:59:46.545792 arm64_za-ptrace_Set_VL_6016 pass
14012 22:59:46.545891 arm64_za-ptrace_Disabled_ZA_for_VL_6016 skip
14013 22:59:46.546011 arm64_za-ptrace_Get_and_set_data_for_VL_6016 skip
14014 22:59:46.546116 arm64_za-ptrace_Set_VL_6032 pass
14015 22:59:46.546207 arm64_za-ptrace_Disabled_ZA_for_VL_6032 skip
14016 22:59:46.546291 arm64_za-ptrace_Get_and_set_data_for_VL_6032 skip
14017 22:59:46.546369 arm64_za-ptrace_Set_VL_6048 pass
14018 22:59:46.546642 arm64_za-ptrace_Disabled_ZA_for_VL_6048 skip
14019 22:59:46.546745 arm64_za-ptrace_Get_and_set_data_for_VL_6048 skip
14020 22:59:46.546854 arm64_za-ptrace_Set_VL_6064 pass
14021 22:59:46.546942 arm64_za-ptrace_Disabled_ZA_for_VL_6064 skip
14022 22:59:46.547012 arm64_za-ptrace_Get_and_set_data_for_VL_6064 skip
14023 22:59:46.547087 arm64_za-ptrace_Set_VL_6080 pass
14024 22:59:46.547198 arm64_za-ptrace_Disabled_ZA_for_VL_6080 skip
14025 22:59:46.547290 arm64_za-ptrace_Get_and_set_data_for_VL_6080 skip
14026 22:59:46.547385 arm64_za-ptrace_Set_VL_6096 pass
14027 22:59:46.547657 arm64_za-ptrace_Disabled_ZA_for_VL_6096 skip
14028 22:59:46.547736 arm64_za-ptrace_Get_and_set_data_for_VL_6096 skip
14029 22:59:46.547797 arm64_za-ptrace_Set_VL_6112 pass
14030 22:59:46.551754 arm64_za-ptrace_Disabled_ZA_for_VL_6112 skip
14031 22:59:46.552068 arm64_za-ptrace_Get_and_set_data_for_VL_6112 skip
14032 22:59:46.552171 arm64_za-ptrace_Set_VL_6128 pass
14033 22:59:46.552264 arm64_za-ptrace_Disabled_ZA_for_VL_6128 skip
14034 22:59:46.552363 arm64_za-ptrace_Get_and_set_data_for_VL_6128 skip
14035 22:59:46.552452 arm64_za-ptrace_Set_VL_6144 pass
14036 22:59:46.552540 arm64_za-ptrace_Disabled_ZA_for_VL_6144 skip
14037 22:59:46.552642 arm64_za-ptrace_Get_and_set_data_for_VL_6144 skip
14038 22:59:46.552732 arm64_za-ptrace_Set_VL_6160 pass
14039 22:59:46.552836 arm64_za-ptrace_Disabled_ZA_for_VL_6160 skip
14040 22:59:46.553125 arm64_za-ptrace_Get_and_set_data_for_VL_6160 skip
14041 22:59:46.553229 arm64_za-ptrace_Set_VL_6176 pass
14042 22:59:46.553330 arm64_za-ptrace_Disabled_ZA_for_VL_6176 skip
14043 22:59:46.553432 arm64_za-ptrace_Get_and_set_data_for_VL_6176 skip
14044 22:59:46.553519 arm64_za-ptrace_Set_VL_6192 pass
14045 22:59:46.553617 arm64_za-ptrace_Disabled_ZA_for_VL_6192 skip
14046 22:59:46.553729 arm64_za-ptrace_Get_and_set_data_for_VL_6192 skip
14047 22:59:46.553823 arm64_za-ptrace_Set_VL_6208 pass
14048 22:59:46.553922 arm64_za-ptrace_Disabled_ZA_for_VL_6208 skip
14049 22:59:46.554021 arm64_za-ptrace_Get_and_set_data_for_VL_6208 skip
14050 22:59:46.554124 arm64_za-ptrace_Set_VL_6224 pass
14051 22:59:46.554225 arm64_za-ptrace_Disabled_ZA_for_VL_6224 skip
14052 22:59:46.554340 arm64_za-ptrace_Get_and_set_data_for_VL_6224 skip
14053 22:59:46.554516 arm64_za-ptrace_Set_VL_6240 pass
14054 22:59:46.554608 arm64_za-ptrace_Disabled_ZA_for_VL_6240 skip
14055 22:59:46.554958 arm64_za-ptrace_Get_and_set_data_for_VL_6240 skip
14056 22:59:46.555146 arm64_za-ptrace_Set_VL_6256 pass
14057 22:59:46.555286 arm64_za-ptrace_Disabled_ZA_for_VL_6256 skip
14058 22:59:46.555471 arm64_za-ptrace_Get_and_set_data_for_VL_6256 skip
14059 22:59:46.555612 arm64_za-ptrace_Set_VL_6272 pass
14060 22:59:46.555732 arm64_za-ptrace_Disabled_ZA_for_VL_6272 skip
14061 22:59:46.555849 arm64_za-ptrace_Get_and_set_data_for_VL_6272 skip
14062 22:59:46.555972 arm64_za-ptrace_Set_VL_6288 pass
14063 22:59:46.559775 arm64_za-ptrace_Disabled_ZA_for_VL_6288 skip
14064 22:59:46.560214 arm64_za-ptrace_Get_and_set_data_for_VL_6288 skip
14065 22:59:46.560409 arm64_za-ptrace_Set_VL_6304 pass
14066 22:59:46.560568 arm64_za-ptrace_Disabled_ZA_for_VL_6304 skip
14067 22:59:46.560743 arm64_za-ptrace_Get_and_set_data_for_VL_6304 skip
14068 22:59:46.560857 arm64_za-ptrace_Set_VL_6320 pass
14069 22:59:46.560972 arm64_za-ptrace_Disabled_ZA_for_VL_6320 skip
14070 22:59:46.561099 arm64_za-ptrace_Get_and_set_data_for_VL_6320 skip
14071 22:59:46.561218 arm64_za-ptrace_Set_VL_6336 pass
14072 22:59:46.561327 arm64_za-ptrace_Disabled_ZA_for_VL_6336 skip
14073 22:59:46.561462 arm64_za-ptrace_Get_and_set_data_for_VL_6336 skip
14074 22:59:46.561595 arm64_za-ptrace_Set_VL_6352 pass
14075 22:59:46.561774 arm64_za-ptrace_Disabled_ZA_for_VL_6352 skip
14076 22:59:46.561921 arm64_za-ptrace_Get_and_set_data_for_VL_6352 skip
14077 22:59:46.562051 arm64_za-ptrace_Set_VL_6368 pass
14078 22:59:46.562165 arm64_za-ptrace_Disabled_ZA_for_VL_6368 skip
14079 22:59:46.562304 arm64_za-ptrace_Get_and_set_data_for_VL_6368 skip
14080 22:59:46.562425 arm64_za-ptrace_Set_VL_6384 pass
14081 22:59:46.562568 arm64_za-ptrace_Disabled_ZA_for_VL_6384 skip
14082 22:59:46.562701 arm64_za-ptrace_Get_and_set_data_for_VL_6384 skip
14083 22:59:46.562827 arm64_za-ptrace_Set_VL_6400 pass
14084 22:59:46.562924 arm64_za-ptrace_Disabled_ZA_for_VL_6400 skip
14085 22:59:46.563042 arm64_za-ptrace_Get_and_set_data_for_VL_6400 skip
14086 22:59:46.563140 arm64_za-ptrace_Set_VL_6416 pass
14087 22:59:46.563243 arm64_za-ptrace_Disabled_ZA_for_VL_6416 skip
14088 22:59:46.563339 arm64_za-ptrace_Get_and_set_data_for_VL_6416 skip
14089 22:59:46.563429 arm64_za-ptrace_Set_VL_6432 pass
14090 22:59:46.563521 arm64_za-ptrace_Disabled_ZA_for_VL_6432 skip
14091 22:59:46.563599 arm64_za-ptrace_Get_and_set_data_for_VL_6432 skip
14092 22:59:46.563659 arm64_za-ptrace_Set_VL_6448 pass
14093 22:59:46.563718 arm64_za-ptrace_Disabled_ZA_for_VL_6448 skip
14094 22:59:46.563776 arm64_za-ptrace_Get_and_set_data_for_VL_6448 skip
14095 22:59:46.563833 arm64_za-ptrace_Set_VL_6464 pass
14096 22:59:46.563890 arm64_za-ptrace_Disabled_ZA_for_VL_6464 skip
14097 22:59:46.563947 arm64_za-ptrace_Get_and_set_data_for_VL_6464 skip
14098 22:59:46.564020 arm64_za-ptrace_Set_VL_6480 pass
14099 22:59:46.564082 arm64_za-ptrace_Disabled_ZA_for_VL_6480 skip
14100 22:59:46.567761 arm64_za-ptrace_Get_and_set_data_for_VL_6480 skip
14101 22:59:46.568175 arm64_za-ptrace_Set_VL_6496 pass
14102 22:59:46.568299 arm64_za-ptrace_Disabled_ZA_for_VL_6496 skip
14103 22:59:46.568403 arm64_za-ptrace_Get_and_set_data_for_VL_6496 skip
14104 22:59:46.568498 arm64_za-ptrace_Set_VL_6512 pass
14105 22:59:46.568609 arm64_za-ptrace_Disabled_ZA_for_VL_6512 skip
14106 22:59:46.568702 arm64_za-ptrace_Get_and_set_data_for_VL_6512 skip
14107 22:59:46.568805 arm64_za-ptrace_Set_VL_6528 pass
14108 22:59:46.568936 arm64_za-ptrace_Disabled_ZA_for_VL_6528 skip
14109 22:59:46.569091 arm64_za-ptrace_Get_and_set_data_for_VL_6528 skip
14110 22:59:46.569235 arm64_za-ptrace_Set_VL_6544 pass
14111 22:59:46.569385 arm64_za-ptrace_Disabled_ZA_for_VL_6544 skip
14112 22:59:46.569560 arm64_za-ptrace_Get_and_set_data_for_VL_6544 skip
14113 22:59:46.569723 arm64_za-ptrace_Set_VL_6560 pass
14114 22:59:46.569862 arm64_za-ptrace_Disabled_ZA_for_VL_6560 skip
14115 22:59:46.569990 arm64_za-ptrace_Get_and_set_data_for_VL_6560 skip
14116 22:59:46.570158 arm64_za-ptrace_Set_VL_6576 pass
14117 22:59:46.570383 arm64_za-ptrace_Disabled_ZA_for_VL_6576 skip
14118 22:59:46.570542 arm64_za-ptrace_Get_and_set_data_for_VL_6576 skip
14119 22:59:46.570755 arm64_za-ptrace_Set_VL_6592 pass
14120 22:59:46.570963 arm64_za-ptrace_Disabled_ZA_for_VL_6592 skip
14121 22:59:46.571150 arm64_za-ptrace_Get_and_set_data_for_VL_6592 skip
14122 22:59:46.571333 arm64_za-ptrace_Set_VL_6608 pass
14123 22:59:46.571484 arm64_za-ptrace_Disabled_ZA_for_VL_6608 skip
14124 22:59:46.571670 arm64_za-ptrace_Get_and_set_data_for_VL_6608 skip
14125 22:59:46.571798 arm64_za-ptrace_Set_VL_6624 pass
14126 22:59:46.571917 arm64_za-ptrace_Disabled_ZA_for_VL_6624 skip
14127 22:59:46.572034 arm64_za-ptrace_Get_and_set_data_for_VL_6624 skip
14128 22:59:46.572185 arm64_za-ptrace_Set_VL_6640 pass
14129 22:59:46.572334 arm64_za-ptrace_Disabled_ZA_for_VL_6640 skip
14130 22:59:46.572453 arm64_za-ptrace_Get_and_set_data_for_VL_6640 skip
14131 22:59:46.572567 arm64_za-ptrace_Set_VL_6656 pass
14132 22:59:46.572682 arm64_za-ptrace_Disabled_ZA_for_VL_6656 skip
14133 22:59:46.572797 arm64_za-ptrace_Get_and_set_data_for_VL_6656 skip
14134 22:59:46.575799 arm64_za-ptrace_Set_VL_6672 pass
14135 22:59:46.576178 arm64_za-ptrace_Disabled_ZA_for_VL_6672 skip
14136 22:59:46.592023 arm64_za-ptrace_Get_and_set_data_for_VL_6672 skip
14137 22:59:46.592224 arm64_za-ptrace_Set_VL_6688 pass
14138 22:59:46.592384 arm64_za-ptrace_Disabled_ZA_for_VL_6688 skip
14139 22:59:46.592570 arm64_za-ptrace_Get_and_set_data_for_VL_6688 skip
14140 22:59:46.592730 arm64_za-ptrace_Set_VL_6704 pass
14141 22:59:46.592891 arm64_za-ptrace_Disabled_ZA_for_VL_6704 skip
14142 22:59:46.593053 arm64_za-ptrace_Get_and_set_data_for_VL_6704 skip
14143 22:59:46.593244 arm64_za-ptrace_Set_VL_6720 pass
14144 22:59:46.593416 arm64_za-ptrace_Disabled_ZA_for_VL_6720 skip
14145 22:59:46.593613 arm64_za-ptrace_Get_and_set_data_for_VL_6720 skip
14146 22:59:46.593836 arm64_za-ptrace_Set_VL_6736 pass
14147 22:59:46.594023 arm64_za-ptrace_Disabled_ZA_for_VL_6736 skip
14148 22:59:46.594212 arm64_za-ptrace_Get_and_set_data_for_VL_6736 skip
14149 22:59:46.594390 arm64_za-ptrace_Set_VL_6752 pass
14150 22:59:46.594548 arm64_za-ptrace_Disabled_ZA_for_VL_6752 skip
14151 22:59:46.594745 arm64_za-ptrace_Get_and_set_data_for_VL_6752 skip
14152 22:59:46.594906 arm64_za-ptrace_Set_VL_6768 pass
14153 22:59:46.595066 arm64_za-ptrace_Disabled_ZA_for_VL_6768 skip
14154 22:59:46.595217 arm64_za-ptrace_Get_and_set_data_for_VL_6768 skip
14155 22:59:46.595374 arm64_za-ptrace_Set_VL_6784 pass
14156 22:59:46.595530 arm64_za-ptrace_Disabled_ZA_for_VL_6784 skip
14157 22:59:46.595677 arm64_za-ptrace_Get_and_set_data_for_VL_6784 skip
14158 22:59:46.595817 arm64_za-ptrace_Set_VL_6800 pass
14159 22:59:46.595971 arm64_za-ptrace_Disabled_ZA_for_VL_6800 skip
14160 22:59:46.596127 arm64_za-ptrace_Get_and_set_data_for_VL_6800 skip
14161 22:59:46.596270 arm64_za-ptrace_Set_VL_6816 pass
14162 22:59:46.596418 arm64_za-ptrace_Disabled_ZA_for_VL_6816 skip
14163 22:59:46.596551 arm64_za-ptrace_Get_and_set_data_for_VL_6816 skip
14164 22:59:46.596682 arm64_za-ptrace_Set_VL_6832 pass
14165 22:59:46.596879 arm64_za-ptrace_Disabled_ZA_for_VL_6832 skip
14166 22:59:46.597033 arm64_za-ptrace_Get_and_set_data_for_VL_6832 skip
14167 22:59:46.597188 arm64_za-ptrace_Set_VL_6848 pass
14168 22:59:46.597348 arm64_za-ptrace_Disabled_ZA_for_VL_6848 skip
14169 22:59:46.597497 arm64_za-ptrace_Get_and_set_data_for_VL_6848 skip
14170 22:59:46.597666 arm64_za-ptrace_Set_VL_6864 pass
14171 22:59:46.597823 arm64_za-ptrace_Disabled_ZA_for_VL_6864 skip
14172 22:59:46.597956 arm64_za-ptrace_Get_and_set_data_for_VL_6864 skip
14173 22:59:46.598078 arm64_za-ptrace_Set_VL_6880 pass
14174 22:59:46.598196 arm64_za-ptrace_Disabled_ZA_for_VL_6880 skip
14175 22:59:46.598335 arm64_za-ptrace_Get_and_set_data_for_VL_6880 skip
14176 22:59:46.598550 arm64_za-ptrace_Set_VL_6896 pass
14177 22:59:46.598725 arm64_za-ptrace_Disabled_ZA_for_VL_6896 skip
14178 22:59:46.598872 arm64_za-ptrace_Get_and_set_data_for_VL_6896 skip
14179 22:59:46.599013 arm64_za-ptrace_Set_VL_6912 pass
14180 22:59:46.599152 arm64_za-ptrace_Disabled_ZA_for_VL_6912 skip
14181 22:59:46.599514 arm64_za-ptrace_Get_and_set_data_for_VL_6912 skip
14182 22:59:46.599652 arm64_za-ptrace_Set_VL_6928 pass
14183 22:59:46.599796 arm64_za-ptrace_Disabled_ZA_for_VL_6928 skip
14184 22:59:46.599939 arm64_za-ptrace_Get_and_set_data_for_VL_6928 skip
14185 22:59:46.600080 arm64_za-ptrace_Set_VL_6944 pass
14186 22:59:46.600221 arm64_za-ptrace_Disabled_ZA_for_VL_6944 skip
14187 22:59:46.600361 arm64_za-ptrace_Get_and_set_data_for_VL_6944 skip
14188 22:59:46.600502 arm64_za-ptrace_Set_VL_6960 pass
14189 22:59:46.600642 arm64_za-ptrace_Disabled_ZA_for_VL_6960 skip
14190 22:59:46.600782 arm64_za-ptrace_Get_and_set_data_for_VL_6960 skip
14191 22:59:46.600927 arm64_za-ptrace_Set_VL_6976 pass
14192 22:59:46.601068 arm64_za-ptrace_Disabled_ZA_for_VL_6976 skip
14193 22:59:46.601208 arm64_za-ptrace_Get_and_set_data_for_VL_6976 skip
14194 22:59:46.601349 arm64_za-ptrace_Set_VL_6992 pass
14195 22:59:46.601492 arm64_za-ptrace_Disabled_ZA_for_VL_6992 skip
14196 22:59:46.601634 arm64_za-ptrace_Get_and_set_data_for_VL_6992 skip
14197 22:59:46.601789 arm64_za-ptrace_Set_VL_7008 pass
14198 22:59:46.601931 arm64_za-ptrace_Disabled_ZA_for_VL_7008 skip
14199 22:59:46.602072 arm64_za-ptrace_Get_and_set_data_for_VL_7008 skip
14200 22:59:46.602214 arm64_za-ptrace_Set_VL_7024 pass
14201 22:59:46.602355 arm64_za-ptrace_Disabled_ZA_for_VL_7024 skip
14202 22:59:46.603709 arm64_za-ptrace_Get_and_set_data_for_VL_7024 skip
14203 22:59:46.604118 arm64_za-ptrace_Set_VL_7040 pass
14204 22:59:46.604305 arm64_za-ptrace_Disabled_ZA_for_VL_7040 skip
14205 22:59:46.604455 arm64_za-ptrace_Get_and_set_data_for_VL_7040 skip
14206 22:59:46.604698 arm64_za-ptrace_Set_VL_7056 pass
14207 22:59:46.604861 arm64_za-ptrace_Disabled_ZA_for_VL_7056 skip
14208 22:59:46.604990 arm64_za-ptrace_Get_and_set_data_for_VL_7056 skip
14209 22:59:46.605115 arm64_za-ptrace_Set_VL_7072 pass
14210 22:59:46.605243 arm64_za-ptrace_Disabled_ZA_for_VL_7072 skip
14211 22:59:46.605370 arm64_za-ptrace_Get_and_set_data_for_VL_7072 skip
14212 22:59:46.605535 arm64_za-ptrace_Set_VL_7088 pass
14213 22:59:46.605706 arm64_za-ptrace_Disabled_ZA_for_VL_7088 skip
14214 22:59:46.605905 arm64_za-ptrace_Get_and_set_data_for_VL_7088 skip
14215 22:59:46.606102 arm64_za-ptrace_Set_VL_7104 pass
14216 22:59:46.606289 arm64_za-ptrace_Disabled_ZA_for_VL_7104 skip
14217 22:59:46.606468 arm64_za-ptrace_Get_and_set_data_for_VL_7104 skip
14218 22:59:46.606619 arm64_za-ptrace_Set_VL_7120 pass
14219 22:59:46.606777 arm64_za-ptrace_Disabled_ZA_for_VL_7120 skip
14220 22:59:46.606978 arm64_za-ptrace_Get_and_set_data_for_VL_7120 skip
14221 22:59:46.607147 arm64_za-ptrace_Set_VL_7136 pass
14222 22:59:46.607307 arm64_za-ptrace_Disabled_ZA_for_VL_7136 skip
14223 22:59:46.607470 arm64_za-ptrace_Get_and_set_data_for_VL_7136 skip
14224 22:59:46.607603 arm64_za-ptrace_Set_VL_7152 pass
14225 22:59:46.607720 arm64_za-ptrace_Disabled_ZA_for_VL_7152 skip
14226 22:59:46.607835 arm64_za-ptrace_Get_and_set_data_for_VL_7152 skip
14227 22:59:46.607976 arm64_za-ptrace_Set_VL_7168 pass
14228 22:59:46.608127 arm64_za-ptrace_Disabled_ZA_for_VL_7168 skip
14229 22:59:46.608246 arm64_za-ptrace_Get_and_set_data_for_VL_7168 skip
14230 22:59:46.608361 arm64_za-ptrace_Set_VL_7184 pass
14231 22:59:46.608476 arm64_za-ptrace_Disabled_ZA_for_VL_7184 skip
14232 22:59:46.608590 arm64_za-ptrace_Get_and_set_data_for_VL_7184 skip
14233 22:59:46.608705 arm64_za-ptrace_Set_VL_7200 pass
14234 22:59:46.608845 arm64_za-ptrace_Disabled_ZA_for_VL_7200 skip
14235 22:59:46.608967 arm64_za-ptrace_Get_and_set_data_for_VL_7200 skip
14236 22:59:46.609083 arm64_za-ptrace_Set_VL_7216 pass
14237 22:59:46.609199 arm64_za-ptrace_Disabled_ZA_for_VL_7216 skip
14238 22:59:46.609314 arm64_za-ptrace_Get_and_set_data_for_VL_7216 skip
14239 22:59:46.611789 arm64_za-ptrace_Set_VL_7232 pass
14240 22:59:46.612193 arm64_za-ptrace_Disabled_ZA_for_VL_7232 skip
14241 22:59:46.612384 arm64_za-ptrace_Get_and_set_data_for_VL_7232 skip
14242 22:59:46.612538 arm64_za-ptrace_Set_VL_7248 pass
14243 22:59:46.612697 arm64_za-ptrace_Disabled_ZA_for_VL_7248 skip
14244 22:59:46.612859 arm64_za-ptrace_Get_and_set_data_for_VL_7248 skip
14245 22:59:46.613004 arm64_za-ptrace_Set_VL_7264 pass
14246 22:59:46.613141 arm64_za-ptrace_Disabled_ZA_for_VL_7264 skip
14247 22:59:46.613288 arm64_za-ptrace_Get_and_set_data_for_VL_7264 skip
14248 22:59:46.613443 arm64_za-ptrace_Set_VL_7280 pass
14249 22:59:46.613596 arm64_za-ptrace_Disabled_ZA_for_VL_7280 skip
14250 22:59:46.613790 arm64_za-ptrace_Get_and_set_data_for_VL_7280 skip
14251 22:59:46.613955 arm64_za-ptrace_Set_VL_7296 pass
14252 22:59:46.614117 arm64_za-ptrace_Disabled_ZA_for_VL_7296 skip
14253 22:59:46.614303 arm64_za-ptrace_Get_and_set_data_for_VL_7296 skip
14254 22:59:46.614482 arm64_za-ptrace_Set_VL_7312 pass
14255 22:59:46.614662 arm64_za-ptrace_Disabled_ZA_for_VL_7312 skip
14256 22:59:46.614844 arm64_za-ptrace_Get_and_set_data_for_VL_7312 skip
14257 22:59:46.615020 arm64_za-ptrace_Set_VL_7328 pass
14258 22:59:46.615184 arm64_za-ptrace_Disabled_ZA_for_VL_7328 skip
14259 22:59:46.615386 arm64_za-ptrace_Get_and_set_data_for_VL_7328 skip
14260 22:59:46.615541 arm64_za-ptrace_Set_VL_7344 pass
14261 22:59:46.615661 arm64_za-ptrace_Disabled_ZA_for_VL_7344 skip
14262 22:59:46.615775 arm64_za-ptrace_Get_and_set_data_for_VL_7344 skip
14263 22:59:46.615890 arm64_za-ptrace_Set_VL_7360 pass
14264 22:59:46.616004 arm64_za-ptrace_Disabled_ZA_for_VL_7360 skip
14265 22:59:46.616118 arm64_za-ptrace_Get_and_set_data_for_VL_7360 skip
14266 22:59:46.616232 arm64_za-ptrace_Set_VL_7376 pass
14267 22:59:46.616345 arm64_za-ptrace_Disabled_ZA_for_VL_7376 skip
14268 22:59:46.616460 arm64_za-ptrace_Get_and_set_data_for_VL_7376 skip
14269 22:59:46.616573 arm64_za-ptrace_Set_VL_7392 pass
14270 22:59:46.616687 arm64_za-ptrace_Disabled_ZA_for_VL_7392 skip
14271 22:59:46.616799 arm64_za-ptrace_Get_and_set_data_for_VL_7392 skip
14272 22:59:46.616915 arm64_za-ptrace_Set_VL_7408 pass
14273 22:59:46.617028 arm64_za-ptrace_Disabled_ZA_for_VL_7408 skip
14274 22:59:46.617139 arm64_za-ptrace_Get_and_set_data_for_VL_7408 skip
14275 22:59:46.617252 arm64_za-ptrace_Set_VL_7424 pass
14276 22:59:46.617389 arm64_za-ptrace_Disabled_ZA_for_VL_7424 skip
14277 22:59:46.619784 arm64_za-ptrace_Get_and_set_data_for_VL_7424 skip
14278 22:59:46.619975 arm64_za-ptrace_Set_VL_7440 pass
14279 22:59:46.620424 arm64_za-ptrace_Disabled_ZA_for_VL_7440 skip
14280 22:59:46.620617 arm64_za-ptrace_Get_and_set_data_for_VL_7440 skip
14281 22:59:46.620775 arm64_za-ptrace_Set_VL_7456 pass
14282 22:59:46.620916 arm64_za-ptrace_Disabled_ZA_for_VL_7456 skip
14283 22:59:46.621067 arm64_za-ptrace_Get_and_set_data_for_VL_7456 skip
14284 22:59:46.621254 arm64_za-ptrace_Set_VL_7472 pass
14285 22:59:46.621416 arm64_za-ptrace_Disabled_ZA_for_VL_7472 skip
14286 22:59:46.621580 arm64_za-ptrace_Get_and_set_data_for_VL_7472 skip
14287 22:59:46.621792 arm64_za-ptrace_Set_VL_7488 pass
14288 22:59:46.621999 arm64_za-ptrace_Disabled_ZA_for_VL_7488 skip
14289 22:59:46.622205 arm64_za-ptrace_Get_and_set_data_for_VL_7488 skip
14290 22:59:46.622458 arm64_za-ptrace_Set_VL_7504 pass
14291 22:59:46.622649 arm64_za-ptrace_Disabled_ZA_for_VL_7504 skip
14292 22:59:46.622846 arm64_za-ptrace_Get_and_set_data_for_VL_7504 skip
14293 22:59:46.623024 arm64_za-ptrace_Set_VL_7520 pass
14294 22:59:46.623184 arm64_za-ptrace_Disabled_ZA_for_VL_7520 skip
14295 22:59:46.623351 arm64_za-ptrace_Get_and_set_data_for_VL_7520 skip
14296 22:59:46.623485 arm64_za-ptrace_Set_VL_7536 pass
14297 22:59:46.623617 arm64_za-ptrace_Disabled_ZA_for_VL_7536 skip
14298 22:59:46.623735 arm64_za-ptrace_Get_and_set_data_for_VL_7536 skip
14299 22:59:46.623851 arm64_za-ptrace_Set_VL_7552 pass
14300 22:59:46.623967 arm64_za-ptrace_Disabled_ZA_for_VL_7552 skip
14301 22:59:46.624082 arm64_za-ptrace_Get_and_set_data_for_VL_7552 skip
14302 22:59:46.624228 arm64_za-ptrace_Set_VL_7568 pass
14303 22:59:46.624351 arm64_za-ptrace_Disabled_ZA_for_VL_7568 skip
14304 22:59:46.624466 arm64_za-ptrace_Get_and_set_data_for_VL_7568 skip
14305 22:59:46.624581 arm64_za-ptrace_Set_VL_7584 pass
14306 22:59:46.624695 arm64_za-ptrace_Disabled_ZA_for_VL_7584 skip
14307 22:59:46.624809 arm64_za-ptrace_Get_and_set_data_for_VL_7584 skip
14308 22:59:46.624926 arm64_za-ptrace_Set_VL_7600 pass
14309 22:59:46.625040 arm64_za-ptrace_Disabled_ZA_for_VL_7600 skip
14310 22:59:46.625154 arm64_za-ptrace_Get_and_set_data_for_VL_7600 skip
14311 22:59:46.625267 arm64_za-ptrace_Set_VL_7616 pass
14312 22:59:46.627780 arm64_za-ptrace_Disabled_ZA_for_VL_7616 skip
14313 22:59:46.628105 arm64_za-ptrace_Get_and_set_data_for_VL_7616 skip
14314 22:59:46.628230 arm64_za-ptrace_Set_VL_7632 pass
14315 22:59:46.628333 arm64_za-ptrace_Disabled_ZA_for_VL_7632 skip
14316 22:59:46.628445 arm64_za-ptrace_Get_and_set_data_for_VL_7632 skip
14317 22:59:46.628537 arm64_za-ptrace_Set_VL_7648 pass
14318 22:59:46.628632 arm64_za-ptrace_Disabled_ZA_for_VL_7648 skip
14319 22:59:46.628738 arm64_za-ptrace_Get_and_set_data_for_VL_7648 skip
14320 22:59:46.628842 arm64_za-ptrace_Set_VL_7664 pass
14321 22:59:46.628992 arm64_za-ptrace_Disabled_ZA_for_VL_7664 skip
14322 22:59:46.629167 arm64_za-ptrace_Get_and_set_data_for_VL_7664 skip
14323 22:59:46.629332 arm64_za-ptrace_Set_VL_7680 pass
14324 22:59:46.629462 arm64_za-ptrace_Disabled_ZA_for_VL_7680 skip
14325 22:59:46.629604 arm64_za-ptrace_Get_and_set_data_for_VL_7680 skip
14326 22:59:46.629739 arm64_za-ptrace_Set_VL_7696 pass
14327 22:59:46.629885 arm64_za-ptrace_Disabled_ZA_for_VL_7696 skip
14328 22:59:46.654565 arm64_za-ptrace_Get_and_set_data_for_VL_7696 skip
14329 22:59:46.654913 arm64_za-ptrace_Set_VL_7712 pass
14330 22:59:46.655089 arm64_za-ptrace_Disabled_ZA_for_VL_7712 skip
14331 22:59:46.655428 arm64_za-ptrace_Get_and_set_data_for_VL_7712 skip
14332 22:59:46.655514 arm64_za-ptrace_Set_VL_7728 pass
14333 22:59:46.655581 arm64_za-ptrace_Disabled_ZA_for_VL_7728 skip
14334 22:59:46.655645 arm64_za-ptrace_Get_and_set_data_for_VL_7728 skip
14335 22:59:46.655710 arm64_za-ptrace_Set_VL_7744 pass
14336 22:59:46.655775 arm64_za-ptrace_Disabled_ZA_for_VL_7744 skip
14337 22:59:46.655841 arm64_za-ptrace_Get_and_set_data_for_VL_7744 skip
14338 22:59:46.655907 arm64_za-ptrace_Set_VL_7760 pass
14339 22:59:46.655991 arm64_za-ptrace_Disabled_ZA_for_VL_7760 skip
14340 22:59:46.656066 arm64_za-ptrace_Get_and_set_data_for_VL_7760 skip
14341 22:59:46.656140 arm64_za-ptrace_Set_VL_7776 pass
14342 22:59:46.656204 arm64_za-ptrace_Disabled_ZA_for_VL_7776 skip
14343 22:59:46.656282 arm64_za-ptrace_Get_and_set_data_for_VL_7776 skip
14344 22:59:46.656351 arm64_za-ptrace_Set_VL_7792 pass
14345 22:59:46.656426 arm64_za-ptrace_Disabled_ZA_for_VL_7792 skip
14346 22:59:46.656503 arm64_za-ptrace_Get_and_set_data_for_VL_7792 skip
14347 22:59:46.656581 arm64_za-ptrace_Set_VL_7808 pass
14348 22:59:46.656672 arm64_za-ptrace_Disabled_ZA_for_VL_7808 skip
14349 22:59:46.656761 arm64_za-ptrace_Get_and_set_data_for_VL_7808 skip
14350 22:59:46.656845 arm64_za-ptrace_Set_VL_7824 pass
14351 22:59:46.656928 arm64_za-ptrace_Disabled_ZA_for_VL_7824 skip
14352 22:59:46.657019 arm64_za-ptrace_Get_and_set_data_for_VL_7824 skip
14353 22:59:46.657308 arm64_za-ptrace_Set_VL_7840 pass
14354 22:59:46.657424 arm64_za-ptrace_Disabled_ZA_for_VL_7840 skip
14355 22:59:46.657532 arm64_za-ptrace_Get_and_set_data_for_VL_7840 skip
14356 22:59:46.657613 arm64_za-ptrace_Set_VL_7856 pass
14357 22:59:46.657699 arm64_za-ptrace_Disabled_ZA_for_VL_7856 skip
14358 22:59:46.657794 arm64_za-ptrace_Get_and_set_data_for_VL_7856 skip
14359 22:59:46.657877 arm64_za-ptrace_Set_VL_7872 pass
14360 22:59:46.657968 arm64_za-ptrace_Disabled_ZA_for_VL_7872 skip
14361 22:59:46.658049 arm64_za-ptrace_Get_and_set_data_for_VL_7872 skip
14362 22:59:46.658140 arm64_za-ptrace_Set_VL_7888 pass
14363 22:59:46.658234 arm64_za-ptrace_Disabled_ZA_for_VL_7888 skip
14364 22:59:46.658324 arm64_za-ptrace_Get_and_set_data_for_VL_7888 skip
14365 22:59:46.658416 arm64_za-ptrace_Set_VL_7904 pass
14366 22:59:46.658548 arm64_za-ptrace_Disabled_ZA_for_VL_7904 skip
14367 22:59:46.658667 arm64_za-ptrace_Get_and_set_data_for_VL_7904 skip
14368 22:59:46.658776 arm64_za-ptrace_Set_VL_7920 pass
14369 22:59:46.658876 arm64_za-ptrace_Disabled_ZA_for_VL_7920 skip
14370 22:59:46.658984 arm64_za-ptrace_Get_and_set_data_for_VL_7920 skip
14371 22:59:46.659085 arm64_za-ptrace_Set_VL_7936 pass
14372 22:59:46.659184 arm64_za-ptrace_Disabled_ZA_for_VL_7936 skip
14373 22:59:46.659285 arm64_za-ptrace_Get_and_set_data_for_VL_7936 skip
14374 22:59:46.659385 arm64_za-ptrace_Set_VL_7952 pass
14375 22:59:46.659484 arm64_za-ptrace_Disabled_ZA_for_VL_7952 skip
14376 22:59:46.663758 arm64_za-ptrace_Get_and_set_data_for_VL_7952 skip
14377 22:59:46.664099 arm64_za-ptrace_Set_VL_7968 pass
14378 22:59:46.664206 arm64_za-ptrace_Disabled_ZA_for_VL_7968 skip
14379 22:59:46.664293 arm64_za-ptrace_Get_and_set_data_for_VL_7968 skip
14380 22:59:46.664398 arm64_za-ptrace_Set_VL_7984 pass
14381 22:59:46.664487 arm64_za-ptrace_Disabled_ZA_for_VL_7984 skip
14382 22:59:46.664575 arm64_za-ptrace_Get_and_set_data_for_VL_7984 skip
14383 22:59:46.664663 arm64_za-ptrace_Set_VL_8000 pass
14384 22:59:46.664766 arm64_za-ptrace_Disabled_ZA_for_VL_8000 skip
14385 22:59:46.664852 arm64_za-ptrace_Get_and_set_data_for_VL_8000 skip
14386 22:59:46.664938 arm64_za-ptrace_Set_VL_8016 pass
14387 22:59:46.665042 arm64_za-ptrace_Disabled_ZA_for_VL_8016 skip
14388 22:59:46.665127 arm64_za-ptrace_Get_and_set_data_for_VL_8016 skip
14389 22:59:46.665226 arm64_za-ptrace_Set_VL_8032 pass
14390 22:59:46.665312 arm64_za-ptrace_Disabled_ZA_for_VL_8032 skip
14391 22:59:46.665408 arm64_za-ptrace_Get_and_set_data_for_VL_8032 skip
14392 22:59:46.665494 arm64_za-ptrace_Set_VL_8048 pass
14393 22:59:46.665590 arm64_za-ptrace_Disabled_ZA_for_VL_8048 skip
14394 22:59:46.665682 arm64_za-ptrace_Get_and_set_data_for_VL_8048 skip
14395 22:59:46.665780 arm64_za-ptrace_Set_VL_8064 pass
14396 22:59:46.665881 arm64_za-ptrace_Disabled_ZA_for_VL_8064 skip
14397 22:59:46.665983 arm64_za-ptrace_Get_and_set_data_for_VL_8064 skip
14398 22:59:46.666079 arm64_za-ptrace_Set_VL_8080 pass
14399 22:59:46.666431 arm64_za-ptrace_Disabled_ZA_for_VL_8080 skip
14400 22:59:46.666531 arm64_za-ptrace_Get_and_set_data_for_VL_8080 skip
14401 22:59:46.666615 arm64_za-ptrace_Set_VL_8096 pass
14402 22:59:46.666713 arm64_za-ptrace_Disabled_ZA_for_VL_8096 skip
14403 22:59:46.666799 arm64_za-ptrace_Get_and_set_data_for_VL_8096 skip
14404 22:59:46.666884 arm64_za-ptrace_Set_VL_8112 pass
14405 22:59:46.666988 arm64_za-ptrace_Disabled_ZA_for_VL_8112 skip
14406 22:59:46.667075 arm64_za-ptrace_Get_and_set_data_for_VL_8112 skip
14407 22:59:46.667161 arm64_za-ptrace_Set_VL_8128 pass
14408 22:59:46.667260 arm64_za-ptrace_Disabled_ZA_for_VL_8128 skip
14409 22:59:46.667347 arm64_za-ptrace_Get_and_set_data_for_VL_8128 skip
14410 22:59:46.667429 arm64_za-ptrace_Set_VL_8144 pass
14411 22:59:46.667527 arm64_za-ptrace_Disabled_ZA_for_VL_8144 skip
14412 22:59:46.667614 arm64_za-ptrace_Get_and_set_data_for_VL_8144 skip
14413 22:59:46.667713 arm64_za-ptrace_Set_VL_8160 pass
14414 22:59:46.671732 arm64_za-ptrace_Disabled_ZA_for_VL_8160 skip
14415 22:59:46.672032 arm64_za-ptrace_Get_and_set_data_for_VL_8160 skip
14416 22:59:46.672133 arm64_za-ptrace_Set_VL_8176 pass
14417 22:59:46.672234 arm64_za-ptrace_Disabled_ZA_for_VL_8176 skip
14418 22:59:46.672320 arm64_za-ptrace_Get_and_set_data_for_VL_8176 skip
14419 22:59:46.672420 arm64_za-ptrace_Set_VL_8192 pass
14420 22:59:46.672697 arm64_za-ptrace_Disabled_ZA_for_VL_8192 skip
14421 22:59:46.672789 arm64_za-ptrace_Get_and_set_data_for_VL_8192 skip
14422 22:59:46.672873 arm64_za-ptrace pass
14423 22:59:46.672971 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory pass
14424 22:59:46.673281 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory pass
14425 22:59:46.673611 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory pass
14426 22:59:46.673732 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory pass
14427 22:59:46.674018 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory fail
14428 22:59:46.674327 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory fail
14429 22:59:46.674555 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory pass
14430 22:59:46.674768 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory pass
14431 22:59:46.675185 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory pass
14432 22:59:46.675296 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory pass
14433 22:59:46.675588 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory fail
14434 22:59:46.679773 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory fail
14435 22:59:46.680104 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory pass
14436 22:59:46.680214 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory fail
14437 22:59:46.680500 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory fail
14438 22:59:46.680803 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory pass
14439 22:59:46.681140 arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory pass
14440 22:59:46.681441 arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory pass
14441 22:59:46.681750 arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory pass
14442 22:59:46.682091 arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory pass
14443 22:59:46.682281 arm64_check_buffer_fill fail
14444 22:59:46.682438 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory fail
14445 22:59:46.682800 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory fail
14446 22:59:46.683188 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory fail
14447 22:59:46.683379 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory fail
14448 22:59:46.687876 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory fail
14449 22:59:46.688287 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory fail
14450 22:59:46.688394 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory fail
14451 22:59:46.688687 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory fail
14452 22:59:46.688796 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory fail
14453 22:59:46.689116 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory fail
14454 22:59:46.689235 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory fail
14455 22:59:46.689586 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory fail
14456 22:59:46.689710 arm64_check_child_memory fail
14457 22:59:46.689812 arm64_check_gcr_el1_cswitch fail
14458 22:59:46.689897 arm64_check_ksm_options fail
14459 22:59:46.690207 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off pass
14460 22:59:46.690515 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off pass
14461 22:59:46.690823 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off pass
14462 22:59:46.691106 arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off pass
14463 22:59:46.691387 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14464 22:59:46.703086 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14465 22:59:46.703382 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14466 22:59:46.703871 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14467 22:59:46.704181 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14468 22:59:46.704458 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14469 22:59:46.704978 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14470 22:59:46.705202 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14471 22:59:46.705438 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14472 22:59:46.705696 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14473 22:59:46.705919 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
14474 22:59:46.706332 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14475 22:59:46.706543 arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14476 22:59:46.706753 arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14477 22:59:46.707098 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
14478 22:59:46.707317 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on fail
14479 22:59:46.707798 arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory fail
14480 22:59:46.712148 arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory fail
14481 22:59:46.712245 arm64_check_mmap_options fail
14482 22:59:46.712344 arm64_check_prctl_check_basic_read pass
14483 22:59:46.712436 arm64_check_prctl_NONE pass
14484 22:59:46.712558 arm64_check_prctl_SYNC pass
14485 22:59:46.712652 arm64_check_prctl_ASYNC pass
14486 22:59:46.712774 arm64_check_prctl_SYNC_ASYNC pass
14487 22:59:46.712866 arm64_check_prctl pass
14488 22:59:46.712947 arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode fail
14489 22:59:46.713043 arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode fail
14490 22:59:46.713178 arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode pass
14491 22:59:46.713288 arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode fail
14492 22:59:46.713378 arm64_check_tags_inclusion fail
14493 22:59:46.713666 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14494 22:59:46.713779 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14495 22:59:46.714078 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14496 22:59:46.714175 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14497 22:59:46.714459 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14498 22:59:46.714563 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14499 22:59:46.714842 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14500 22:59:46.715131 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14501 22:59:46.715236 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14502 22:59:46.715521 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14503 22:59:46.719813 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14504 22:59:46.720121 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14505 22:59:46.720236 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14506 22:59:46.720570 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14507 22:59:46.720771 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14508 22:59:46.720976 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14509 22:59:46.721149 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14510 22:59:46.721346 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14511 22:59:46.721548 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14512 22:59:46.721765 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14513 22:59:46.721964 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14514 22:59:46.722166 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14515 22:59:46.722367 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14516 22:59:46.722561 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14517 22:59:46.722755 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14518 22:59:46.723144 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14519 22:59:46.723255 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14520 22:59:46.723534 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14521 22:59:46.727762 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14522 22:59:46.728055 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14523 22:59:46.728173 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14524 22:59:46.728484 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14525 22:59:46.728772 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14526 22:59:46.728884 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14527 22:59:46.729202 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14528 22:59:46.729308 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14529 22:59:46.729634 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14530 22:59:46.729872 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14531 22:59:46.730070 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14532 22:59:46.730265 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14533 22:59:46.730452 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14534 22:59:46.730662 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14535 22:59:46.730857 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14536 22:59:46.731047 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14537 22:59:46.731407 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14538 22:59:46.731661 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14539 22:59:46.735755 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14540 22:59:46.736057 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14541 22:59:46.736165 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14542 22:59:46.736469 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14543 22:59:46.736797 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14544 22:59:46.736916 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14545 22:59:46.737010 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14546 22:59:46.737276 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14547 22:59:46.737386 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14548 22:59:46.737683 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14549 22:59:46.737985 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
14550 22:59:46.738081 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
14551 22:59:46.738178 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
14552 22:59:46.738509 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
14553 22:59:46.738729 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
14554 22:59:46.738925 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
14555 22:59:46.755650 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
14556 22:59:46.756190 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
14557 22:59:46.756416 arm64_check_user_mem pass
14558 22:59:46.756658 arm64_btitest_nohint_func_call_using_br_x0 pass
14559 22:59:46.756847 arm64_btitest_nohint_func_call_using_br_x16 pass
14560 22:59:46.757099 arm64_btitest_nohint_func_call_using_blr pass
14561 22:59:46.757300 arm64_btitest_bti_none_func_call_using_br_x0 pass
14562 22:59:46.757506 arm64_btitest_bti_none_func_call_using_br_x16 pass
14563 22:59:46.757708 arm64_btitest_bti_none_func_call_using_blr pass
14564 22:59:46.757912 arm64_btitest_bti_c_func_call_using_br_x0 pass
14565 22:59:46.758113 arm64_btitest_bti_c_func_call_using_br_x16 pass
14566 22:59:46.758316 arm64_btitest_bti_c_func_call_using_blr pass
14567 22:59:46.758492 arm64_btitest_bti_j_func_call_using_br_x0 pass
14568 22:59:46.758716 arm64_btitest_bti_j_func_call_using_br_x16 pass
14569 22:59:46.758887 arm64_btitest_bti_j_func_call_using_blr pass
14570 22:59:46.759045 arm64_btitest_bti_jc_func_call_using_br_x0 pass
14571 22:59:46.759201 arm64_btitest_bti_jc_func_call_using_br_x16 pass
14572 22:59:46.759383 arm64_btitest_bti_jc_func_call_using_blr pass
14573 22:59:46.759558 arm64_btitest_paciasp_func_call_using_br_x0 pass
14574 22:59:46.759733 arm64_btitest_paciasp_func_call_using_br_x16 pass
14575 22:59:46.759872 arm64_btitest_paciasp_func_call_using_blr pass
14576 22:59:46.759995 arm64_btitest pass
14577 22:59:46.760117 arm64_nobtitest_nohint_func_call_using_br_x0 pass
14578 22:59:46.760237 arm64_nobtitest_nohint_func_call_using_br_x16 pass
14579 22:59:46.760360 arm64_nobtitest_nohint_func_call_using_blr pass
14580 22:59:46.760519 arm64_nobtitest_bti_none_func_call_using_br_x0 pass
14581 22:59:46.760648 arm64_nobtitest_bti_none_func_call_using_br_x16 pass
14582 22:59:46.760771 arm64_nobtitest_bti_none_func_call_using_blr pass
14583 22:59:46.760893 arm64_nobtitest_bti_c_func_call_using_br_x0 pass
14584 22:59:46.761018 arm64_nobtitest_bti_c_func_call_using_br_x16 pass
14585 22:59:46.761142 arm64_nobtitest_bti_c_func_call_using_blr pass
14586 22:59:46.761265 arm64_nobtitest_bti_j_func_call_using_br_x0 pass
14587 22:59:46.761386 arm64_nobtitest_bti_j_func_call_using_br_x16 pass
14588 22:59:46.761508 arm64_nobtitest_bti_j_func_call_using_blr pass
14589 22:59:46.761631 arm64_nobtitest_bti_jc_func_call_using_br_x0 pass
14590 22:59:46.761765 arm64_nobtitest_bti_jc_func_call_using_br_x16 pass
14591 22:59:46.761886 arm64_nobtitest_bti_jc_func_call_using_blr pass
14592 22:59:46.762005 arm64_nobtitest_paciasp_func_call_using_br_x0 pass
14593 22:59:46.762120 arm64_nobtitest_paciasp_func_call_using_br_x16 pass
14594 22:59:46.762240 arm64_nobtitest_paciasp_func_call_using_blr pass
14595 22:59:46.762355 arm64_nobtitest pass
14596 22:59:46.762470 arm64_hwcap_cpuinfo_match_RNG pass
14597 22:59:46.762815 arm64_hwcap_sigill_RNG pass
14598 22:59:46.762943 arm64_hwcap_cpuinfo_match_SME pass
14599 22:59:46.763781 arm64_hwcap_sigill_SME pass
14600 22:59:46.764130 arm64_hwcap_cpuinfo_match_SVE pass
14601 22:59:46.764303 arm64_hwcap_sigill_SVE pass
14602 22:59:46.764401 arm64_hwcap_cpuinfo_match_SVE_2 pass
14603 22:59:46.764490 arm64_hwcap_sigill_SVE_2 pass
14604 22:59:46.764579 arm64_hwcap_cpuinfo_match_SVE_AES pass
14605 22:59:46.764688 arm64_hwcap_sigill_SVE_AES pass
14606 22:59:46.764782 arm64_hwcap_cpuinfo_match_SVE2_PMULL pass
14607 22:59:46.764872 arm64_hwcap_sigill_SVE2_PMULL pass
14608 22:59:46.764958 arm64_hwcap_cpuinfo_match_SVE2_BITPERM pass
14609 22:59:46.765047 arm64_hwcap_sigill_SVE2_BITPERM pass
14610 22:59:46.765139 arm64_hwcap_cpuinfo_match_SVE2_SHA3 pass
14611 22:59:46.765248 arm64_hwcap_sigill_SVE2_SHA3 pass
14612 22:59:46.765340 arm64_hwcap_cpuinfo_match_SVE2_SM4 pass
14613 22:59:46.765422 arm64_hwcap_sigill_SVE2_SM4 pass
14614 22:59:46.765502 arm64_hwcap_cpuinfo_match_SVE2_I8MM pass
14615 22:59:46.765584 arm64_hwcap_sigill_SVE2_I8MM pass
14616 22:59:46.765674 arm64_hwcap_cpuinfo_match_SVE2_F32MM pass
14617 22:59:46.765749 arm64_hwcap_sigill_SVE2_F32MM pass
14618 22:59:46.765838 arm64_hwcap_cpuinfo_match_SVE2_F64MM pass
14619 22:59:46.765946 arm64_hwcap_sigill_SVE2_F64MM pass
14620 22:59:46.766038 arm64_hwcap_cpuinfo_match_SVE2_BF16 pass
14621 22:59:46.766129 arm64_hwcap_sigill_SVE2_BF16 pass
14622 22:59:46.766217 arm64_hwcap_cpuinfo_match_SVE2_EBF16 pass
14623 22:59:46.766307 arm64_hwcap_sigill_SVE2_EBF16 skip
14624 22:59:46.766396 arm64_hwcap pass
14625 22:59:46.766485 arm64_ptrace_read_tpidr_one pass
14626 22:59:46.766573 arm64_ptrace_write_tpidr_one pass
14627 22:59:46.766661 arm64_ptrace_verify_tpidr_one pass
14628 22:59:46.766769 arm64_ptrace_count_tpidrs pass
14629 22:59:46.766860 arm64_ptrace_tpidr2_write pass
14630 22:59:46.766950 arm64_ptrace_tpidr2_read pass
14631 22:59:46.767035 arm64_ptrace_write_tpidr_only pass
14632 22:59:46.767124 arm64_ptrace pass
14633 22:59:46.767208 arm64_syscall-abi_getpid_FPSIMD pass
14634 22:59:46.767295 arm64_syscall-abi_getpid_SVE_VL_256 pass
14635 22:59:46.767383 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA pass
14636 22:59:46.767523 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM pass
14637 22:59:46.767655 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA pass
14638 22:59:46.767750 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA pass
14639 22:59:46.767840 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM pass
14640 22:59:46.767932 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA pass
14641 22:59:46.768022 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA pass
14642 22:59:46.768111 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM pass
14643 22:59:46.768205 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA pass
14644 22:59:46.768297 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA pass
14645 22:59:46.771789 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM pass
14646 22:59:46.772237 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA pass
14647 22:59:46.772426 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA pass
14648 22:59:46.772586 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM pass
14649 22:59:46.772732 arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA pass
14650 22:59:46.772919 arm64_syscall-abi_getpid_SVE_VL_240 pass
14651 22:59:46.773088 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA pass
14652 22:59:46.773253 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM pass
14653 22:59:46.773404 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA pass
14654 22:59:46.773550 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA pass
14655 22:59:46.773713 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM pass
14656 22:59:46.773859 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA pass
14657 22:59:46.773978 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA pass
14658 22:59:46.774091 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM pass
14659 22:59:46.774216 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA pass
14660 22:59:46.774418 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA pass
14661 22:59:46.774594 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM pass
14662 22:59:46.774764 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA pass
14663 22:59:46.774887 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA pass
14664 22:59:46.775001 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM pass
14665 22:59:46.775124 arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA pass
14666 22:59:46.775268 arm64_syscall-abi_getpid_SVE_VL_224 pass
14667 22:59:46.775424 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA pass
14668 22:59:46.775657 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM pass
14669 22:59:46.775807 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA pass
14670 22:59:46.775949 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA pass
14671 22:59:46.776101 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM pass
14672 22:59:46.776222 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA pass
14673 22:59:46.776335 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA pass
14674 22:59:46.776448 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM pass
14675 22:59:46.776561 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA pass
14676 22:59:46.776674 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA pass
14677 22:59:46.776786 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM pass
14678 22:59:46.776898 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA pass
14679 22:59:46.777011 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA pass
14680 22:59:46.777151 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM pass
14681 22:59:46.779810 arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA pass
14682 22:59:46.780289 arm64_syscall-abi_getpid_SVE_VL_208 pass
14683 22:59:46.780494 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA pass
14684 22:59:46.780696 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM pass
14685 22:59:46.780913 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA pass
14686 22:59:46.781132 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA pass
14687 22:59:46.781312 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM pass
14688 22:59:46.781512 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA pass
14689 22:59:46.781735 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA pass
14690 22:59:46.781940 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM pass
14691 22:59:46.782215 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA pass
14692 22:59:46.782428 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA pass
14693 22:59:46.782645 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM pass
14694 22:59:46.782813 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA pass
14695 22:59:46.782965 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA pass
14696 22:59:46.783116 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM pass
14697 22:59:46.783267 arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA pass
14698 22:59:46.783419 arm64_syscall-abi_getpid_SVE_VL_192 pass
14699 22:59:46.783613 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA pass
14700 22:59:46.783777 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM pass
14701 22:59:46.783907 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA pass
14702 22:59:46.784023 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA pass
14703 22:59:46.784171 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM pass
14704 22:59:46.784292 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA pass
14705 22:59:46.784409 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA pass
14706 22:59:46.784525 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM pass
14707 22:59:46.784640 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA pass
14708 22:59:46.784756 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA pass
14709 22:59:46.784871 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM pass
14710 22:59:46.784986 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA pass
14711 22:59:46.785099 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA pass
14712 22:59:46.785213 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM pass
14713 22:59:46.785329 arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA pass
14714 22:59:46.785444 arm64_syscall-abi_getpid_SVE_VL_176 pass
14715 22:59:46.785557 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA pass
14716 22:59:46.785681 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM pass
14717 22:59:46.787826 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA pass
14718 22:59:46.788000 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA pass
14719 22:59:46.788395 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM pass
14720 22:59:46.788578 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA pass
14721 22:59:46.788702 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA pass
14722 22:59:46.788843 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM pass
14723 22:59:46.788977 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA pass
14724 22:59:46.789120 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA pass
14725 22:59:46.801239 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM pass
14726 22:59:46.801519 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA pass
14727 22:59:46.801733 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA pass
14728 22:59:46.801908 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM pass
14729 22:59:46.802042 arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA pass
14730 22:59:46.802195 arm64_syscall-abi_getpid_SVE_VL_160 pass
14731 22:59:46.802386 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA pass
14732 22:59:46.802552 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM pass
14733 22:59:46.802696 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA pass
14734 22:59:46.802830 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA pass
14735 22:59:46.802993 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM pass
14736 22:59:46.803133 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA pass
14737 22:59:46.803287 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA pass
14738 22:59:46.803450 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM pass
14739 22:59:46.803624 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA pass
14740 22:59:46.803752 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA pass
14741 22:59:46.803872 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM pass
14742 22:59:46.803990 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA pass
14743 22:59:46.807846 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA pass
14744 22:59:46.808200 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM pass
14745 22:59:46.808305 arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA pass
14746 22:59:46.808392 arm64_syscall-abi_getpid_SVE_VL_144 pass
14747 22:59:46.808492 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA pass
14748 22:59:46.808575 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM pass
14749 22:59:46.808670 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA pass
14750 22:59:46.808760 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA pass
14751 22:59:46.808849 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM pass
14752 22:59:46.809110 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA pass
14753 22:59:46.809185 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA pass
14754 22:59:46.809268 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM pass
14755 22:59:46.809354 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA pass
14756 22:59:46.809619 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA pass
14757 22:59:46.809727 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM pass
14758 22:59:46.810011 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA pass
14759 22:59:46.810286 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA pass
14760 22:59:46.810355 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM pass
14761 22:59:46.810432 arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA pass
14762 22:59:46.810531 arm64_syscall-abi_getpid_SVE_VL_128 pass
14763 22:59:46.810652 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA pass
14764 22:59:46.810758 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM pass
14765 22:59:46.810878 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA pass
14766 22:59:46.810971 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA pass
14767 22:59:46.811074 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM pass
14768 22:59:46.811161 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA pass
14769 22:59:46.811267 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA pass
14770 22:59:46.811365 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM pass
14771 22:59:46.811465 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA pass
14772 22:59:46.811566 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA pass
14773 22:59:46.811657 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM pass
14774 22:59:46.815711 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA pass
14775 22:59:46.816023 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA pass
14776 22:59:46.816222 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM pass
14777 22:59:46.816420 arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA pass
14778 22:59:46.816590 arm64_syscall-abi_getpid_SVE_VL_112 pass
14779 22:59:46.816776 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA pass
14780 22:59:46.817026 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM pass
14781 22:59:46.817194 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA pass
14782 22:59:46.817333 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA pass
14783 22:59:46.817496 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM pass
14784 22:59:46.817673 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA pass
14785 22:59:46.817871 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA pass
14786 22:59:46.818036 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM pass
14787 22:59:46.818200 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA pass
14788 22:59:46.818368 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA pass
14789 22:59:46.818541 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM pass
14790 22:59:46.818756 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA pass
14791 22:59:46.819007 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA pass
14792 22:59:46.819193 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM pass
14793 22:59:46.819358 arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA pass
14794 22:59:46.819515 arm64_syscall-abi_getpid_SVE_VL_96 pass
14795 22:59:46.819686 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA pass
14796 22:59:46.819815 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM pass
14797 22:59:46.819931 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA pass
14798 22:59:46.820045 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA pass
14799 22:59:46.820160 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM pass
14800 22:59:46.820302 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA pass
14801 22:59:46.820422 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA pass
14802 22:59:46.820539 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM pass
14803 22:59:46.820654 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA pass
14804 22:59:46.823753 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA pass
14805 22:59:46.824057 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM pass
14806 22:59:46.824176 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA pass
14807 22:59:46.824299 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA pass
14808 22:59:46.824397 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM pass
14809 22:59:46.824514 arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA pass
14810 22:59:46.824600 arm64_syscall-abi_getpid_SVE_VL_80 pass
14811 22:59:46.824680 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA pass
14812 22:59:46.824781 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM pass
14813 22:59:46.824884 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA pass
14814 22:59:46.824985 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA pass
14815 22:59:46.825260 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM pass
14816 22:59:46.825340 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA pass
14817 22:59:46.825607 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA pass
14818 22:59:46.825718 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM pass
14819 22:59:46.825831 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA pass
14820 22:59:46.825924 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA pass
14821 22:59:46.826033 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM pass
14822 22:59:46.826555 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA pass
14823 22:59:46.826666 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA pass
14824 22:59:46.826759 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM pass
14825 22:59:46.826841 arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA pass
14826 22:59:46.827115 arm64_syscall-abi_getpid_SVE_VL_64 pass
14827 22:59:46.827205 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA pass
14828 22:59:46.827287 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM pass
14829 22:59:46.827361 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA pass
14830 22:59:46.827428 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA pass
14831 22:59:46.827518 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM pass
14832 22:59:46.827594 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA pass
14833 22:59:46.827679 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA pass
14834 22:59:46.827767 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM pass
14835 22:59:46.831743 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA pass
14836 22:59:46.832036 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA pass
14837 22:59:46.832135 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM pass
14838 22:59:46.832252 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA pass
14839 22:59:46.832353 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA pass
14840 22:59:46.832447 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM pass
14841 22:59:46.832713 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA pass
14842 22:59:46.832823 arm64_syscall-abi_getpid_SVE_VL_48 pass
14843 22:59:46.832924 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA pass
14844 22:59:46.833022 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM pass
14845 22:59:46.833091 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA pass
14846 22:59:46.833178 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA pass
14847 22:59:46.833255 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM pass
14848 22:59:46.833378 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA pass
14849 22:59:46.833478 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA pass
14850 22:59:46.833578 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM pass
14851 22:59:46.833909 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA pass
14852 22:59:46.834099 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA pass
14853 22:59:46.834269 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM pass
14854 22:59:46.834451 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA pass
14855 22:59:46.834636 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA pass
14856 22:59:46.834861 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM pass
14857 22:59:46.835019 arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA pass
14858 22:59:46.835174 arm64_syscall-abi_getpid_SVE_VL_32 pass
14859 22:59:46.835325 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA pass
14860 22:59:46.835506 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM pass
14861 22:59:46.835660 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA pass
14862 22:59:46.835782 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA pass
14863 22:59:46.835898 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM pass
14864 22:59:46.836013 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA pass
14865 22:59:46.836152 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA pass
14866 22:59:46.839809 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM pass
14867 22:59:46.839945 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA pass
14868 22:59:46.840270 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA pass
14869 22:59:46.840378 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM pass
14870 22:59:46.840464 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA pass
14871 22:59:46.840559 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA pass
14872 22:59:46.840641 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM pass
14873 22:59:46.840725 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA pass
14874 22:59:46.840818 arm64_syscall-abi_getpid_SVE_VL_16 pass
14875 22:59:46.840886 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA pass
14876 22:59:46.840948 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM pass
14877 22:59:46.849491 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA pass
14878 22:59:46.849815 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA pass
14879 22:59:46.850009 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM pass
14880 22:59:46.850200 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA pass
14881 22:59:46.850395 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA pass
14882 22:59:46.850568 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM pass
14883 22:59:46.850725 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA pass
14884 22:59:46.850953 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA pass
14885 22:59:46.851145 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM pass
14886 22:59:46.851331 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA pass
14887 22:59:46.851509 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA pass
14888 22:59:46.851724 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM pass
14889 22:59:46.851979 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA pass
14890 22:59:46.852171 arm64_syscall-abi_sched_yield_FPSIMD pass
14891 22:59:46.852327 arm64_syscall-abi_sched_yield_SVE_VL_256 pass
14892 22:59:46.852491 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA pass
14893 22:59:46.852653 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM pass
14894 22:59:46.852815 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA pass
14895 22:59:46.852974 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA pass
14896 22:59:46.853212 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM pass
14897 22:59:46.853389 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA pass
14898 22:59:46.853570 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA pass
14899 22:59:46.853807 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM pass
14900 22:59:46.854002 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA pass
14901 22:59:46.854183 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA pass
14902 22:59:46.854352 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM pass
14903 22:59:46.854543 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA pass
14904 22:59:46.854734 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA pass
14905 22:59:46.854876 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM pass
14906 22:59:46.855074 arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA pass
14907 22:59:46.855251 arm64_syscall-abi_sched_yield_SVE_VL_240 pass
14908 22:59:46.855422 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA pass
14909 22:59:46.855589 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM pass
14910 22:59:46.855721 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA pass
14911 22:59:46.855838 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA pass
14912 22:59:46.856206 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM pass
14913 22:59:46.856348 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA pass
14914 22:59:46.856470 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA pass
14915 22:59:46.856588 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM pass
14916 22:59:46.856705 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA pass
14917 22:59:46.856823 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA pass
14918 22:59:46.856941 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM pass
14919 22:59:46.857058 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA pass
14920 22:59:46.857173 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA pass
14921 22:59:46.857290 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM pass
14922 22:59:46.857411 arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA pass
14923 22:59:46.859741 arm64_syscall-abi_sched_yield_SVE_VL_224 pass
14924 22:59:46.860139 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA pass
14925 22:59:46.860245 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM pass
14926 22:59:46.860449 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA pass
14927 22:59:46.860597 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA pass
14928 22:59:46.860781 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM pass
14929 22:59:46.860932 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA pass
14930 22:59:46.861082 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA pass
14931 22:59:46.861211 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM pass
14932 22:59:46.861359 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA pass
14933 22:59:46.861490 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA pass
14934 22:59:46.861638 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM pass
14935 22:59:46.861782 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA pass
14936 22:59:46.861930 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA pass
14937 22:59:46.862065 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM pass
14938 22:59:46.862248 arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA pass
14939 22:59:46.862444 arm64_syscall-abi_sched_yield_SVE_VL_208 pass
14940 22:59:46.862644 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA pass
14941 22:59:46.862796 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM pass
14942 22:59:46.862932 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA pass
14943 22:59:46.863113 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA pass
14944 22:59:46.863242 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM pass
14945 22:59:46.863363 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA pass
14946 22:59:46.863528 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA pass
14947 22:59:46.863689 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM pass
14948 22:59:46.863865 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA pass
14949 22:59:46.867744 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA pass
14950 22:59:46.868170 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM pass
14951 22:59:46.868346 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA pass
14952 22:59:46.868493 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA pass
14953 22:59:46.868659 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM pass
14954 22:59:46.868805 arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA pass
14955 22:59:46.868943 arm64_syscall-abi_sched_yield_SVE_VL_192 pass
14956 22:59:46.869183 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA pass
14957 22:59:46.869354 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM pass
14958 22:59:46.869510 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA pass
14959 22:59:46.869685 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA pass
14960 22:59:46.869928 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM pass
14961 22:59:46.870124 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA pass
14962 22:59:46.870293 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA pass
14963 22:59:46.870458 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM pass
14964 22:59:46.870616 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA pass
14965 22:59:46.870766 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA pass
14966 22:59:46.870970 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM pass
14967 22:59:46.871155 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA pass
14968 22:59:46.871313 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA pass
14969 22:59:46.871501 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM pass
14970 22:59:46.871640 arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA pass
14971 22:59:46.871758 arm64_syscall-abi_sched_yield_SVE_VL_176 pass
14972 22:59:46.871873 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA pass
14973 22:59:46.871997 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM pass
14974 22:59:46.872140 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA pass
14975 22:59:46.872261 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA pass
14976 22:59:46.872375 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM pass
14977 22:59:46.872490 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA pass
14978 22:59:46.872604 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA pass
14979 22:59:46.875793 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM pass
14980 22:59:46.876253 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA pass
14981 22:59:46.876451 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA pass
14982 22:59:46.876632 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM pass
14983 22:59:46.876825 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA pass
14984 22:59:46.876963 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA pass
14985 22:59:46.877150 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM pass
14986 22:59:46.877321 arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA pass
14987 22:59:46.877473 arm64_syscall-abi_sched_yield_SVE_VL_160 pass
14988 22:59:46.877623 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA pass
14989 22:59:46.877768 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM pass
14990 22:59:46.877894 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA pass
14991 22:59:46.878021 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA pass
14992 22:59:46.878189 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM pass
14993 22:59:46.878326 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA pass
14994 22:59:46.878409 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA pass
14995 22:59:46.878488 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM pass
14996 22:59:46.878566 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA pass
14997 22:59:46.878648 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA pass
14998 22:59:46.878739 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM pass
14999 22:59:46.878822 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA pass
15000 22:59:46.878907 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA pass
15001 22:59:46.878989 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM pass
15002 22:59:46.879102 arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA pass
15003 22:59:46.879213 arm64_syscall-abi_sched_yield_SVE_VL_144 pass
15004 22:59:46.879316 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA pass
15005 22:59:46.879419 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM pass
15006 22:59:46.879512 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA pass
15007 22:59:46.879629 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA pass
15008 22:59:46.883796 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM pass
15009 22:59:46.884265 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA pass
15010 22:59:46.884503 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA pass
15011 22:59:46.884703 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM pass
15012 22:59:46.884929 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA pass
15013 22:59:46.885078 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA pass
15014 22:59:46.885200 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM pass
15015 22:59:46.885355 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA pass
15016 22:59:46.885485 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA pass
15017 22:59:46.896664 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM pass
15018 22:59:46.897009 arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA pass
15019 22:59:46.897113 arm64_syscall-abi_sched_yield_SVE_VL_128 pass
15020 22:59:46.897204 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA pass
15021 22:59:46.897307 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM pass
15022 22:59:46.897382 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA pass
15023 22:59:46.897469 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA pass
15024 22:59:46.897571 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM pass
15025 22:59:46.897639 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA pass
15026 22:59:46.897736 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA pass
15027 22:59:46.897825 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM pass
15028 22:59:46.897921 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA pass
15029 22:59:46.898208 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA pass
15030 22:59:46.898305 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM pass
15031 22:59:46.898432 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA pass
15032 22:59:46.898538 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA pass
15033 22:59:46.898653 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM pass
15034 22:59:46.898755 arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA pass
15035 22:59:46.898856 arm64_syscall-abi_sched_yield_SVE_VL_112 pass
15036 22:59:46.898968 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA pass
15037 22:59:46.899332 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM pass
15038 22:59:46.899535 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA pass
15039 22:59:46.899765 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA pass
15040 22:59:46.899910 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM pass
15041 22:59:46.903755 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA pass
15042 22:59:46.904207 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA pass
15043 22:59:46.904334 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM pass
15044 22:59:46.904442 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA pass
15045 22:59:46.904532 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA pass
15046 22:59:46.904640 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM pass
15047 22:59:46.904715 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA pass
15048 22:59:46.904790 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA pass
15049 22:59:46.904882 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM pass
15050 22:59:46.904971 arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA pass
15051 22:59:46.905245 arm64_syscall-abi_sched_yield_SVE_VL_96 pass
15052 22:59:46.905332 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA pass
15053 22:59:46.905473 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM pass
15054 22:59:46.905574 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA pass
15055 22:59:46.905697 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA pass
15056 22:59:46.905797 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM pass
15057 22:59:46.905897 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA pass
15058 22:59:46.905976 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA pass
15059 22:59:46.906079 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM pass
15060 22:59:46.906183 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA pass
15061 22:59:46.906470 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA pass
15062 22:59:46.906563 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM pass
15063 22:59:46.906848 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA pass
15064 22:59:46.906949 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA pass
15065 22:59:46.907028 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM pass
15066 22:59:46.907123 arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA pass
15067 22:59:46.907235 arm64_syscall-abi_sched_yield_SVE_VL_80 pass
15068 22:59:46.907353 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA pass
15069 22:59:46.907477 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM pass
15070 22:59:46.907586 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA pass
15071 22:59:46.911729 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA pass
15072 22:59:46.912046 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM pass
15073 22:59:46.912155 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA pass
15074 22:59:46.912261 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA pass
15075 22:59:46.912362 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM pass
15076 22:59:46.912468 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA pass
15077 22:59:46.912569 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA pass
15078 22:59:46.912670 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM pass
15079 22:59:46.912776 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA pass
15080 22:59:46.913036 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA pass
15081 22:59:46.913157 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM pass
15082 22:59:46.913259 arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA pass
15083 22:59:46.913363 arm64_syscall-abi_sched_yield_SVE_VL_64 pass
15084 22:59:46.913550 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA pass
15085 22:59:46.913677 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM pass
15086 22:59:46.913781 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA pass
15087 22:59:46.914076 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA pass
15088 22:59:46.914196 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM pass
15089 22:59:46.914298 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA pass
15090 22:59:46.914397 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA pass
15091 22:59:46.914511 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM pass
15092 22:59:46.914730 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA pass
15093 22:59:46.914851 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA pass
15094 22:59:46.914953 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM pass
15095 22:59:46.915062 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA pass
15096 22:59:46.915360 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA pass
15097 22:59:46.915484 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM pass
15098 22:59:46.915575 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA pass
15099 22:59:46.915677 arm64_syscall-abi_sched_yield_SVE_VL_48 pass
15100 22:59:46.919723 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA pass
15101 22:59:46.920050 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM pass
15102 22:59:46.920156 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA pass
15103 22:59:46.920263 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA pass
15104 22:59:46.920364 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM pass
15105 22:59:46.920470 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA pass
15106 22:59:46.920569 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA pass
15107 22:59:46.920668 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM pass
15108 22:59:46.920769 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA pass
15109 22:59:46.921074 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA pass
15110 22:59:46.921176 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM pass
15111 22:59:46.921280 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA pass
15112 22:59:46.921415 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA pass
15113 22:59:46.921519 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM pass
15114 22:59:46.921622 arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA pass
15115 22:59:46.921732 arm64_syscall-abi_sched_yield_SVE_VL_32 pass
15116 22:59:46.921835 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA pass
15117 22:59:46.922104 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM pass
15118 22:59:46.922187 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA pass
15119 22:59:46.922310 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA pass
15120 22:59:46.922419 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM pass
15121 22:59:46.922627 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA pass
15122 22:59:46.922865 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA pass
15123 22:59:46.923037 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM pass
15124 22:59:46.923198 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA pass
15125 22:59:46.923383 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA pass
15126 22:59:46.923540 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM pass
15127 22:59:46.923671 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA pass
15128 22:59:46.923788 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA pass
15129 22:59:46.923927 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM pass
15130 22:59:46.924047 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA pass
15131 22:59:46.928006 arm64_syscall-abi_sched_yield_SVE_VL_16 pass
15132 22:59:46.928223 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA pass
15133 22:59:46.928418 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM pass
15134 22:59:46.928587 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA pass
15135 22:59:46.928779 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA pass
15136 22:59:46.928946 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM pass
15137 22:59:46.929107 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA pass
15138 22:59:46.929299 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA pass
15139 22:59:46.929452 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM pass
15140 22:59:46.929609 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA pass
15141 22:59:46.929788 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA pass
15142 22:59:46.929985 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM pass
15143 22:59:46.930157 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA pass
15144 22:59:46.930322 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA pass
15145 22:59:46.930517 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM pass
15146 22:59:46.930684 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA pass
15147 22:59:46.930870 arm64_syscall-abi pass
15148 22:59:46.931032 arm64_tpidr2_default_value pass
15149 22:59:46.931184 arm64_tpidr2_write_read pass
15150 22:59:46.931307 arm64_tpidr2_write_sleep_read pass
15151 22:59:46.931424 arm64_tpidr2_write_fork_read pass
15152 22:59:46.931550 arm64_tpidr2_write_clone_read pass
15153 22:59:46.931666 arm64_tpidr2 pass
15154 22:59:46.945369 + ../../utils/send-to-lava.sh ./output/result.txt
15155 22:59:46.989506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tags_test RESULT=pass>
15156 22:59:46.990485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tags_test RESULT=pass
15158 22:59:47.023439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass
15160 22:59:47.023850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass>
15161 22:59:47.057603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass>
15162 22:59:47.058068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass
15164 22:59:47.089541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass>
15165 22:59:47.089961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass
15167 22:59:47.122636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass>
15168 22:59:47.123118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass
15170 22:59:47.156944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass>
15171 22:59:47.157379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass
15173 22:59:47.188656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass>
15174 22:59:47.189176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass
15176 22:59:47.223210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass>
15177 22:59:47.223661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass
15179 22:59:47.256917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=pass>
15180 22:59:47.257413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=pass
15182 22:59:47.289221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=pass>
15183 22:59:47.289643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=pass
15185 22:59:47.325407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass
15187 22:59:47.325827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass>
15188 22:59:47.357973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass>
15189 22:59:47.358335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass
15191 22:59:47.389694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass
15193 22:59:47.390087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass>
15194 22:59:47.421397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass>
15195 22:59:47.421776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass
15197 22:59:47.453482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass
15199 22:59:47.453891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass>
15200 22:59:47.485177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass>
15201 22:59:47.485597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass
15203 22:59:47.518426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass>
15204 22:59:47.518925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass
15206 22:59:47.550568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass>
15207 22:59:47.551040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass
15209 22:59:47.582476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=pass
15211 22:59:47.582972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=pass>
15212 22:59:47.614873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip
15214 22:59:47.615358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip>
15215 22:59:47.646423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_za RESULT=pass
15217 22:59:47.646914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_za RESULT=pass>
15218 22:59:47.678737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_vl RESULT=pass>
15219 22:59:47.679139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_vl RESULT=pass
15221 22:59:47.710422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ssve_regs RESULT=pass>
15222 22:59:47.710830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ssve_regs RESULT=pass
15224 22:59:47.741795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_regs RESULT=pass>
15225 22:59:47.742209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_regs RESULT=pass
15227 22:59:47.774129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_vl RESULT=pass
15229 22:59:47.774633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_vl RESULT=pass>
15230 22:59:47.806919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_no_regs RESULT=pass
15232 22:59:47.807400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_no_regs RESULT=pass>
15233 22:59:47.839144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_regs RESULT=pass>
15234 22:59:47.839578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_regs RESULT=pass
15236 22:59:47.870988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_corrupt_pac RESULT=pass>
15237 22:59:47.871368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_corrupt_pac RESULT=pass
15239 22:59:47.903691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop RESULT=pass
15241 22:59:47.904209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop RESULT=pass>
15242 22:59:47.937082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop_generic RESULT=pass>
15243 22:59:47.937459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop_generic RESULT=pass
15245 22:59:47.968960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_single_thread_different_keys RESULT=pass>
15246 22:59:47.969324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_single_thread_different_keys RESULT=pass
15248 22:59:48.000697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_exec_changed_keys RESULT=pass
15250 22:59:48.001102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_exec_changed_keys RESULT=pass>
15251 22:59:48.033391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys RESULT=pass>
15252 22:59:48.033833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys RESULT=pass
15254 22:59:48.066399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys_generic RESULT=pass
15256 22:59:48.066874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys_generic RESULT=pass>
15257 22:59:48.099182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac RESULT=pass>
15258 22:59:48.099590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac RESULT=pass
15260 22:59:48.131379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass
15262 22:59:48.131882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass>
15263 22:59:48.164754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-256-0 RESULT=pass>
15264 22:59:48.165225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-256-0 RESULT=pass
15266 22:59:48.197503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-240-0 RESULT=pass>
15267 22:59:48.197948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-240-0 RESULT=pass
15269 22:59:48.231469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-224-0 RESULT=pass>
15270 22:59:48.231853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-224-0 RESULT=pass
15272 22:59:48.265495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-208-0 RESULT=pass>
15273 22:59:48.265766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-208-0 RESULT=pass
15275 22:59:48.298870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-192-0 RESULT=pass>
15276 22:59:48.299378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-192-0 RESULT=pass
15278 22:59:48.331017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-176-0 RESULT=pass>
15279 22:59:48.331530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-176-0 RESULT=pass
15281 22:59:48.364802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-160-0 RESULT=pass>
15282 22:59:48.365278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-160-0 RESULT=pass
15284 22:59:48.396158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-144-0 RESULT=pass>
15285 22:59:48.396644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-144-0 RESULT=pass
15287 22:59:48.427247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-128-0 RESULT=pass>
15288 22:59:48.427724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-128-0 RESULT=pass
15290 22:59:48.460821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-112-0 RESULT=pass>
15291 22:59:48.461357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-112-0 RESULT=pass
15293 22:59:48.494075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-96-0 RESULT=pass>
15294 22:59:48.494550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-96-0 RESULT=pass
15296 22:59:48.526062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-80-0 RESULT=pass>
15297 22:59:48.526576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-80-0 RESULT=pass
15299 22:59:48.558635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-0 RESULT=pass>
15300 22:59:48.559141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-0 RESULT=pass
15302 22:59:48.591300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-48-0 RESULT=pass>
15303 22:59:48.591811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-48-0 RESULT=pass
15305 22:59:48.625140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-0 RESULT=pass>
15306 22:59:48.625638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-0 RESULT=pass
15308 22:59:48.658056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-0 RESULT=pass>
15309 22:59:48.658472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-0 RESULT=pass
15311 22:59:48.691209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-256-0 RESULT=pass>
15312 22:59:48.691682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-256-0 RESULT=pass
15314 22:59:48.723659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-256-0 RESULT=pass>
15315 22:59:48.724144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-256-0 RESULT=pass
15317 22:59:48.756121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-128-0 RESULT=pass>
15318 22:59:48.756595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-128-0 RESULT=pass
15320 22:59:48.788308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-128-0 RESULT=pass>
15321 22:59:48.788778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-128-0 RESULT=pass
15323 22:59:48.822271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-0 RESULT=pass
15325 22:59:48.822870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-0 RESULT=pass>
15326 22:59:48.853885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-0 RESULT=pass>
15327 22:59:48.854391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-0 RESULT=pass
15329 22:59:48.885913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-0 RESULT=pass>
15330 22:59:48.886395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-0 RESULT=pass
15332 22:59:48.918500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-0 RESULT=pass>
15333 22:59:48.919019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-0 RESULT=pass
15335 22:59:48.949610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-0 RESULT=pass>
15336 22:59:48.950139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-0 RESULT=pass
15338 22:59:48.982300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-0 RESULT=pass>
15339 22:59:48.982827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-0 RESULT=pass
15341 22:59:49.013801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress RESULT=pass>
15342 22:59:49.014311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress RESULT=pass
15344 22:59:49.046637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 RESULT=pass>
15345 22:59:49.047144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 RESULT=pass
15347 22:59:49.079686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state RESULT=pass
15349 22:59:49.080277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state RESULT=pass>
15350 22:59:49.111103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set RESULT=pass>
15351 22:59:49.111613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set RESULT=pass
15353 22:59:49.144535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass
15355 22:59:49.145154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass>
15356 22:59:49.177395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_16 RESULT=pass>
15357 22:59:49.177938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_16 RESULT=pass
15359 22:59:49.209944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 RESULT=pass>
15360 22:59:49.210453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 RESULT=pass
15362 22:59:49.242089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 RESULT=pass>
15363 22:59:49.242557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 RESULT=pass
15365 22:59:49.275527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 RESULT=pass
15367 22:59:49.276127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 RESULT=pass>
15368 22:59:49.306429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_32 RESULT=pass>
15369 22:59:49.306940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_32 RESULT=pass
15371 22:59:49.339383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 RESULT=pass>
15372 22:59:49.339894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 RESULT=pass
15374 22:59:49.371271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 RESULT=pass
15376 22:59:49.371859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 RESULT=pass>
15377 22:59:49.403431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 RESULT=pass>
15378 22:59:49.403899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 RESULT=pass
15380 22:59:49.436415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_48 RESULT=pass>
15381 22:59:49.436892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_48 RESULT=pass
15383 22:59:49.468644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 RESULT=pass>
15384 22:59:49.469120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48 RESULT=pass
15386 22:59:49.501478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 RESULT=pass
15388 22:59:49.501980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48 RESULT=pass>
15389 22:59:49.534584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 RESULT=pass
15391 22:59:49.535180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48 RESULT=pass>
15392 22:59:49.566602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_64 RESULT=pass>
15393 22:59:49.567109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_64 RESULT=pass
15395 22:59:49.598952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 RESULT=pass>
15396 22:59:49.599503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 RESULT=pass
15398 22:59:49.631480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 RESULT=pass>
15399 22:59:49.631999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 RESULT=pass
15401 22:59:49.664178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 RESULT=pass>
15402 22:59:49.664694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 RESULT=pass
15404 22:59:49.697901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_80 RESULT=pass>
15405 22:59:49.698418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_80 RESULT=pass
15407 22:59:49.730387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 RESULT=pass>
15408 22:59:49.730900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80 RESULT=pass
15410 22:59:49.762471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 RESULT=pass>
15411 22:59:49.762919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80 RESULT=pass
15413 22:59:49.795619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 RESULT=pass>
15414 22:59:49.796137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80 RESULT=pass
15416 22:59:49.827435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_96 RESULT=pass>
15417 22:59:49.827973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_96 RESULT=pass
15419 22:59:49.861248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 RESULT=pass>
15420 22:59:49.861704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96 RESULT=pass
15422 22:59:49.893773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 RESULT=pass>
15423 22:59:49.894230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96 RESULT=pass
15425 22:59:49.926536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 RESULT=pass
15427 22:59:49.927094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96 RESULT=pass>
15428 22:59:49.959449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_112 RESULT=pass
15430 22:59:49.959980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_112 RESULT=pass>
15431 22:59:49.989795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 RESULT=pass>
15432 22:59:49.990145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112 RESULT=pass
15434 22:59:50.021050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 RESULT=pass>
15435 22:59:50.021346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112 RESULT=pass
15437 22:59:50.053120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 RESULT=pass
15439 22:59:50.053596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112 RESULT=pass>
15440 22:59:50.085755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_128 RESULT=pass>
15441 22:59:50.086163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_128 RESULT=pass
15443 22:59:50.118936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 RESULT=pass>
15444 22:59:50.119304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128 RESULT=pass
15446 22:59:50.151334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 RESULT=pass
15448 22:59:50.151690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128 RESULT=pass>
15449 22:59:50.182811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 RESULT=pass
15451 22:59:50.183212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128 RESULT=pass>
15452 22:59:50.213579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_144 RESULT=pass
15454 22:59:50.213899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_144 RESULT=pass>
15455 22:59:50.244482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 RESULT=pass>
15456 22:59:50.244780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144 RESULT=pass
15458 22:59:50.274902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 RESULT=pass
15460 22:59:50.275267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144 RESULT=pass>
15461 22:59:50.305980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 RESULT=pass
15463 22:59:50.306418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144 RESULT=pass>
15464 22:59:50.339660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_160 RESULT=pass
15466 22:59:50.340030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_160 RESULT=pass>
15467 22:59:50.370502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 RESULT=pass>
15468 22:59:50.370790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160 RESULT=pass
15470 22:59:50.400945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 RESULT=pass>
15471 22:59:50.401405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160 RESULT=pass
15473 22:59:50.432377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 RESULT=pass
15475 22:59:50.432923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160 RESULT=pass>
15476 22:59:50.462978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_176 RESULT=pass
15478 22:59:50.463538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_176 RESULT=pass>
15479 22:59:50.493596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 RESULT=pass>
15480 22:59:50.494050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176 RESULT=pass
15482 22:59:50.526042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 RESULT=pass
15484 22:59:50.526615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176 RESULT=pass>
15485 22:59:50.558305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 RESULT=pass>
15486 22:59:50.558733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176 RESULT=pass
15488 22:59:50.588925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_192 RESULT=pass
15490 22:59:50.589421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_192 RESULT=pass>
15491 22:59:50.619283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 RESULT=pass>
15492 22:59:50.619636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192 RESULT=pass
15494 22:59:50.650445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 RESULT=pass
15496 22:59:50.650886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192 RESULT=pass>
15497 22:59:50.682141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 RESULT=pass
15499 22:59:50.682578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192 RESULT=pass>
15500 22:59:50.713141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_208 RESULT=pass
15502 22:59:50.713569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_208 RESULT=pass>
15503 22:59:50.747260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 RESULT=pass>
15504 22:59:50.747752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208 RESULT=pass
15506 22:59:50.781899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 RESULT=pass>
15507 22:59:50.782368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208 RESULT=pass
15509 22:59:50.812891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 RESULT=pass>
15510 22:59:50.813331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208 RESULT=pass
15512 22:59:50.843298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_224 RESULT=pass>
15513 22:59:50.843766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_224 RESULT=pass
15515 22:59:50.874134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 RESULT=pass>
15516 22:59:50.874576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224 RESULT=pass
15518 22:59:50.905097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 RESULT=pass
15520 22:59:50.905638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224 RESULT=pass>
15521 22:59:50.936986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 RESULT=pass>
15522 22:59:50.937499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224 RESULT=pass
15524 22:59:50.973469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_240 RESULT=pass>
15525 22:59:50.973950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_240 RESULT=pass
15527 22:59:51.005092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 RESULT=pass
15529 22:59:51.005642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240 RESULT=pass>
15530 22:59:51.036830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 RESULT=pass
15532 22:59:51.037365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240 RESULT=pass>
15533 22:59:51.067270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 RESULT=pass>
15534 22:59:51.067704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240 RESULT=pass
15536 22:59:51.097543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_256 RESULT=pass>
15537 22:59:51.098000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_256 RESULT=pass
15539 22:59:51.128135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 RESULT=pass>
15540 22:59:51.128588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256 RESULT=pass
15542 22:59:51.171225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 RESULT=pass>
15543 22:59:51.171685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256 RESULT=pass
15545 22:59:51.213274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 RESULT=pass
15547 22:59:51.213742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256 RESULT=pass>
15548 22:59:51.248917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_272 RESULT=pass>
15549 22:59:51.249346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_272 RESULT=pass
15551 22:59:51.283931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip
15553 22:59:51.284400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip>
15554 22:59:51.319473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip>
15555 22:59:51.319906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip
15557 22:59:51.355003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip
15559 22:59:51.355455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip>
15560 22:59:51.388631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_288 RESULT=pass>
15561 22:59:51.389069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_288 RESULT=pass
15563 22:59:51.425304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip>
15564 22:59:51.425742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip
15566 22:59:51.460233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip>
15567 22:59:51.460677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip
15569 22:59:51.494952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip>
15570 22:59:51.495396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip
15572 22:59:51.528862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_304 RESULT=pass
15574 22:59:51.529324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_304 RESULT=pass>
15575 22:59:51.562767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip>
15576 22:59:51.563197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip
15578 22:59:51.596449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip
15580 22:59:51.596902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip>
15581 22:59:51.629465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip>
15582 22:59:51.629881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip
15584 22:59:51.663410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_320 RESULT=pass>
15585 22:59:51.663903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_320 RESULT=pass
15587 22:59:51.697255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip>
15588 22:59:51.697702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip
15590 22:59:51.731307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip
15592 22:59:51.731868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip>
15593 22:59:51.765951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip>
15594 22:59:51.766431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip
15596 22:59:51.799556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_336 RESULT=pass>
15597 22:59:51.799911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_336 RESULT=pass
15599 22:59:51.833369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip
15601 22:59:51.833922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip>
15602 22:59:51.868544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip>
15603 22:59:51.869014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip
15605 22:59:51.904750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip
15607 22:59:51.905339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip>
15608 22:59:51.936903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_352 RESULT=pass
15610 22:59:51.937343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_352 RESULT=pass>
15611 22:59:51.968650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip>
15612 22:59:51.969092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip
15614 22:59:52.000461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip>
15615 22:59:52.000941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip
15617 22:59:52.033741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip>
15618 22:59:52.034178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip
15620 22:59:52.069642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_368 RESULT=pass>
15621 22:59:52.070065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_368 RESULT=pass
15623 22:59:52.104811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip>
15624 22:59:52.105251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip
15626 22:59:52.138156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip>
15627 22:59:52.138593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip
15629 22:59:52.169680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip>
15630 22:59:52.170142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip
15632 22:59:52.200767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_384 RESULT=pass>
15633 22:59:52.201248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_384 RESULT=pass
15635 22:59:52.231470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip>
15636 22:59:52.231935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip
15638 22:59:52.263364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip>
15639 22:59:52.263870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip
15641 22:59:52.299515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip>
15642 22:59:52.299997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip
15644 22:59:52.332737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_400 RESULT=pass>
15645 22:59:52.333214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_400 RESULT=pass
15647 22:59:52.364898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip>
15648 22:59:52.365360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip
15650 22:59:52.396644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip>
15651 22:59:52.397078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip
15653 22:59:52.428023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip
15655 22:59:52.428474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip>
15656 22:59:52.459273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_416 RESULT=pass
15658 22:59:52.459709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_416 RESULT=pass>
15659 22:59:52.491728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip
15661 22:59:52.492186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip>
15662 22:59:52.525141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip>
15663 22:59:52.525607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip
15665 22:59:52.558715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip
15667 22:59:52.559297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip>
15668 22:59:52.590118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_432 RESULT=pass
15670 22:59:52.590684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_432 RESULT=pass>
15671 22:59:52.621523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip>
15672 22:59:52.622001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip
15674 22:59:52.652568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip
15676 22:59:52.653113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip>
15677 22:59:52.683567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip>
15678 22:59:52.684025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip
15680 22:59:52.715499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_448 RESULT=pass
15682 22:59:52.715965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_448 RESULT=pass>
15683 22:59:52.746882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip>
15684 22:59:52.747295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip
15686 22:59:52.778092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip
15688 22:59:52.778654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip>
15689 22:59:52.809655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip>
15690 22:59:52.810102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip
15692 22:59:52.840689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_464 RESULT=pass>
15693 22:59:52.841086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_464 RESULT=pass
15695 22:59:52.871308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip>
15696 22:59:52.871716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip
15698 22:59:52.902944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip>
15699 22:59:52.903352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip
15701 22:59:52.934680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip>
15702 22:59:52.935091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip
15704 22:59:52.965466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_480 RESULT=pass
15706 22:59:52.965910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_480 RESULT=pass>
15707 22:59:52.996514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip>
15708 22:59:52.996909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip
15710 22:59:53.027671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip>
15711 22:59:53.028085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip
15713 22:59:53.059507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip>
15714 22:59:53.059932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip
15716 22:59:53.090679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_496 RESULT=pass>
15717 22:59:53.091088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_496 RESULT=pass
15719 22:59:53.121850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip>
15720 22:59:53.122313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip
15722 22:59:53.152957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip>
15723 22:59:53.153400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip
15725 22:59:53.183687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip>
15726 22:59:53.184098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip
15728 22:59:53.214873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_512 RESULT=pass>
15729 22:59:53.215286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_512 RESULT=pass
15731 22:59:53.246376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip>
15732 22:59:53.246849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip
15734 22:59:53.277111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip>
15735 22:59:53.277453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip
15737 22:59:53.308579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip>
15738 22:59:53.308968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip
15740 22:59:53.339648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_528 RESULT=pass>
15741 22:59:53.340022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_528 RESULT=pass
15743 22:59:53.370133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip>
15744 22:59:53.370494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip
15746 22:59:53.400870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip>
15747 22:59:53.401250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip
15749 22:59:53.431280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip>
15750 22:59:53.431631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip
15752 22:59:53.464666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_544 RESULT=pass
15754 22:59:53.465446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_544 RESULT=pass>
15755 22:59:53.498064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip>
15756 22:59:53.498482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip
15758 22:59:53.530574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip
15760 22:59:53.531029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip>
15761 22:59:53.563085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip>
15762 22:59:53.563559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip
15764 22:59:53.597349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_560 RESULT=pass>
15765 22:59:53.597780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_560 RESULT=pass
15767 22:59:53.628560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip>
15768 22:59:53.628981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip
15770 22:59:53.660918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip>
15771 22:59:53.661342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip
15773 22:59:53.695980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip
15775 22:59:53.696343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip>
15776 22:59:53.729006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_576 RESULT=pass
15778 22:59:53.729582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_576 RESULT=pass>
15779 22:59:53.760785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip>
15780 22:59:53.761250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip
15782 22:59:53.791715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip
15784 22:59:53.792289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip>
15785 22:59:53.823160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip>
15786 22:59:53.823635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip
15788 22:59:53.853730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_592 RESULT=pass>
15789 22:59:53.854223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_592 RESULT=pass
15791 22:59:53.884627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip>
15792 22:59:53.885121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip
15794 22:59:53.917069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip>
15795 22:59:53.917515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip
15797 22:59:53.949638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip
15799 22:59:53.950235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip>
15800 22:59:53.981315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_608 RESULT=pass>
15801 22:59:53.981799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_608 RESULT=pass
15803 22:59:54.012481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip>
15804 22:59:54.012955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip
15806 22:59:54.043831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip
15808 22:59:54.044393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip>
15809 22:59:54.076068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip
15811 22:59:54.076652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip>
15812 22:59:54.106113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_624 RESULT=pass>
15813 22:59:54.106590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_624 RESULT=pass
15815 22:59:54.137167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip>
15816 22:59:54.137635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip
15818 22:59:54.167555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip>
15819 22:59:54.168029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip
15821 22:59:54.198956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip>
15822 22:59:54.199483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip
15824 22:59:54.229771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_640 RESULT=pass>
15825 22:59:54.230240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_640 RESULT=pass
15827 22:59:54.260830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip>
15828 22:59:54.261322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip
15830 22:59:54.292044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip
15832 22:59:54.292566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip>
15833 22:59:54.324025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip
15835 22:59:54.324568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip>
15836 22:59:54.354442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_656 RESULT=pass>
15837 22:59:54.354905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_656 RESULT=pass
15839 22:59:54.385867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip
15841 22:59:54.386426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip>
15842 22:59:54.416837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip>
15843 22:59:54.417299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip
15845 22:59:54.448120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip
15847 22:59:54.448696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip>
15848 22:59:54.478507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_672 RESULT=pass>
15849 22:59:54.478989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_672 RESULT=pass
15851 22:59:54.509316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip
15853 22:59:54.509889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip>
15854 22:59:54.540008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip
15856 22:59:54.540560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip>
15857 22:59:54.572340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip>
15858 22:59:54.572804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip
15860 22:59:54.603715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_688 RESULT=pass
15862 22:59:54.604267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_688 RESULT=pass>
15863 22:59:54.635200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip>
15864 22:59:54.635669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip
15866 22:59:54.666631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip>
15867 22:59:54.667095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip
15869 22:59:54.698151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip
15871 22:59:54.698714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip>
15872 22:59:54.729030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_704 RESULT=pass>
15873 22:59:54.729463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_704 RESULT=pass
15875 22:59:54.760605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip
15877 22:59:54.761061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip>
15878 22:59:54.791807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip>
15879 22:59:54.792279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip
15881 22:59:54.825443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip
15883 22:59:54.826007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip>
15884 22:59:54.856180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_720 RESULT=pass
15886 22:59:54.856619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_720 RESULT=pass>
15887 22:59:54.886481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip>
15888 22:59:54.886838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip
15890 22:59:54.917877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip>
15891 22:59:54.918246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip
15893 22:59:54.948616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip>
15894 22:59:54.948997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip
15896 22:59:54.979279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_736 RESULT=pass>
15897 22:59:54.979624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_736 RESULT=pass
15899 22:59:55.010363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip>
15900 22:59:55.010731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip
15902 22:59:55.041104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip>
15903 22:59:55.041435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip
15905 22:59:55.072822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip>
15906 22:59:55.073176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip
15908 22:59:55.103463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_752 RESULT=pass>
15909 22:59:55.103822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_752 RESULT=pass
15911 22:59:55.137760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip>
15912 22:59:55.138129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip
15914 22:59:55.169373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip
15916 22:59:55.169831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip>
15917 22:59:55.209866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip>
15918 22:59:55.210156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip
15920 22:59:55.241074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_768 RESULT=pass>
15921 22:59:55.241360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_768 RESULT=pass
15923 22:59:55.280951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip>
15924 22:59:55.281327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip
15926 22:59:55.312970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip>
15927 22:59:55.313324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip
15929 22:59:55.344995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip>
15930 22:59:55.345422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip
15932 22:59:55.375227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_784 RESULT=pass>
15933 22:59:55.375579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_784 RESULT=pass
15935 22:59:55.405515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip>
15936 22:59:55.405881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip
15938 22:59:55.436475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip>
15939 22:59:55.436924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip
15941 22:59:55.467397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip>
15942 22:59:55.467882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip
15944 22:59:55.498133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_800 RESULT=pass
15946 22:59:55.498688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_800 RESULT=pass>
15947 22:59:55.529720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip>
15948 22:59:55.530170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip
15950 22:59:55.561012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip>
15951 22:59:55.561454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip
15953 22:59:55.592849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip>
15954 22:59:55.593313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip
15956 22:59:55.624214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_816 RESULT=pass>
15957 22:59:55.624655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_816 RESULT=pass
15959 22:59:55.655222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip
15961 22:59:55.655823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip>
15962 22:59:55.686139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip
15964 22:59:55.686678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip>
15965 22:59:55.717465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip
15967 22:59:55.718033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip>
15968 22:59:55.747923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_832 RESULT=pass
15970 22:59:55.748345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_832 RESULT=pass>
15971 22:59:55.778419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip
15973 22:59:55.778864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip>
15974 22:59:55.809134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip>
15975 22:59:55.809537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip
15977 22:59:55.841201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip>
15978 22:59:55.841611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip
15980 22:59:55.872334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_848 RESULT=pass
15982 22:59:55.872779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_848 RESULT=pass>
15983 22:59:55.903553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip
15985 22:59:55.904011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip>
15986 22:59:55.934982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip>
15987 22:59:55.935383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip
15989 22:59:55.965917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip>
15990 22:59:55.966313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip
15992 22:59:55.997100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_864 RESULT=pass>
15993 22:59:55.997549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_864 RESULT=pass
15995 22:59:56.027542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip>
15996 22:59:56.028010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip
15998 22:59:56.058596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip
16000 22:59:56.059202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip>
16001 22:59:56.090038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip>
16002 22:59:56.090479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip
16004 22:59:56.121447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_880 RESULT=pass>
16005 22:59:56.121927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_880 RESULT=pass
16007 22:59:56.152686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip>
16008 22:59:56.153164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip
16010 22:59:56.185377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip>
16011 22:59:56.185876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip
16013 22:59:56.216623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip
16015 22:59:56.217170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip>
16016 22:59:56.247872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_896 RESULT=pass
16018 22:59:56.248436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_896 RESULT=pass>
16019 22:59:56.280468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip>
16020 22:59:56.280927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip
16022 22:59:56.312956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip
16024 22:59:56.313504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip>
16025 22:59:56.346384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip>
16026 22:59:56.346881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip
16028 22:59:56.377769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_912 RESULT=pass
16030 22:59:56.378296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_912 RESULT=pass>
16031 22:59:56.409014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip>
16032 22:59:56.409408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip
16034 22:59:56.440900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip>
16035 22:59:56.441239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip
16037 22:59:56.472528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip
16039 22:59:56.473130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip>
16040 22:59:56.504431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_928 RESULT=pass>
16041 22:59:56.504900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_928 RESULT=pass
16043 22:59:56.536228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip>
16044 22:59:56.536618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip
16046 22:59:56.567964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip
16048 22:59:56.568588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip>
16049 22:59:56.602747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip
16051 22:59:56.603378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip>
16052 22:59:56.634197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_944 RESULT=pass>
16053 22:59:56.634553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_944 RESULT=pass
16055 22:59:56.665784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip
16057 22:59:56.666257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip>
16058 22:59:56.697926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip>
16059 22:59:56.698372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip
16061 22:59:56.729564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip
16063 22:59:56.730119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip>
16064 22:59:56.762570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_960 RESULT=pass
16066 22:59:56.763029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_960 RESULT=pass>
16067 22:59:56.794158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip
16069 22:59:56.794583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip>
16070 22:59:56.825604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip>
16071 22:59:56.825898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip
16073 22:59:56.856876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip>
16074 22:59:56.857195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip
16076 22:59:56.889012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_976 RESULT=pass
16078 22:59:56.889583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_976 RESULT=pass>
16079 22:59:56.920990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip>
16080 22:59:56.921446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip
16082 22:59:56.953998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip>
16083 22:59:56.954448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip
16085 22:59:56.986115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip
16087 22:59:56.986659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip>
16088 22:59:57.017542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_992 RESULT=pass>
16089 22:59:57.017996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_992 RESULT=pass
16091 22:59:57.049155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip>
16092 22:59:57.049599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip
16094 22:59:57.081017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip>
16095 22:59:57.081461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip
16097 22:59:57.112702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip>
16098 22:59:57.113103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip
16100 22:59:57.145870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1008 RESULT=pass>
16101 22:59:57.146305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1008 RESULT=pass
16103 22:59:57.177713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip>
16104 22:59:57.178123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip
16106 22:59:57.209719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip
16108 22:59:57.210270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip>
16109 22:59:57.241259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip>
16110 22:59:57.241699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip
16112 22:59:57.272785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1024 RESULT=pass
16114 22:59:57.273350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1024 RESULT=pass>
16115 22:59:57.307463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip>
16116 22:59:57.307875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip
16118 22:59:57.340423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip>
16119 22:59:57.340891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip
16121 22:59:57.373141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip>
16122 22:59:57.373606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip
16124 22:59:57.403940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1040 RESULT=pass
16126 22:59:57.404504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1040 RESULT=pass>
16127 22:59:57.435634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip>
16128 22:59:57.436083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip
16130 22:59:57.466788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip>
16131 22:59:57.467265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip
16133 22:59:57.497920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip>
16134 22:59:57.498370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip
16136 22:59:57.529083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1056 RESULT=pass>
16137 22:59:57.529546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1056 RESULT=pass
16139 22:59:57.560362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip>
16140 22:59:57.560813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip
16142 22:59:57.591004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip>
16143 22:59:57.591399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip
16145 22:59:57.622194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip
16147 22:59:57.622633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip>
16148 22:59:57.653803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1072 RESULT=pass
16150 22:59:57.654423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1072 RESULT=pass>
16151 22:59:57.684879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip>
16152 22:59:57.685337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip
16154 22:59:57.716581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip>
16155 22:59:57.717030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip
16157 22:59:57.748324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip
16159 22:59:57.748900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip>
16160 22:59:57.780346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1088 RESULT=pass>
16161 22:59:57.780755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1088 RESULT=pass
16163 22:59:57.812640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip>
16164 22:59:57.812946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip
16166 22:59:57.844483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip
16168 22:59:57.845052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip>
16169 22:59:57.875258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip>
16170 22:59:57.875542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip
16172 22:59:57.907105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1104 RESULT=pass>
16173 22:59:57.907462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1104 RESULT=pass
16175 22:59:57.938671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip
16177 22:59:57.939211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip>
16178 22:59:57.970451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip
16180 22:59:57.970940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip>
16181 22:59:58.001121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip>
16182 22:59:58.001520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip
16184 22:59:58.032519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1120 RESULT=pass
16186 22:59:58.032960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1120 RESULT=pass>
16187 22:59:58.063460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip>
16188 22:59:58.063928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip
16190 22:59:58.094272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip>
16191 22:59:58.094712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip
16193 22:59:58.125144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip>
16194 22:59:58.125587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip
16196 22:59:58.156613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1136 RESULT=pass>
16197 22:59:58.157090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1136 RESULT=pass
16199 22:59:58.187660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip
16201 22:59:58.188207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip>
16202 22:59:58.218523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip>
16203 22:59:58.218985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip
16205 22:59:58.249594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip>
16206 22:59:58.250047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip
16208 22:59:58.280735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1152 RESULT=pass>
16209 22:59:58.281182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1152 RESULT=pass
16211 22:59:58.311618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip
16213 22:59:58.312185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip>
16214 22:59:58.343250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip
16216 22:59:58.343796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip>
16217 22:59:58.374547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip>
16218 22:59:58.374994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip
16220 22:59:58.405706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1168 RESULT=pass
16222 22:59:58.406139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1168 RESULT=pass>
16223 22:59:58.437294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip
16225 22:59:58.437761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip>
16226 22:59:58.469051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip
16228 22:59:58.469500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip>
16229 22:59:58.500420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip>
16230 22:59:58.500813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip
16232 22:59:58.531078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1184 RESULT=pass>
16233 22:59:58.531484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1184 RESULT=pass
16235 22:59:58.562389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip>
16236 22:59:58.562850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip
16238 22:59:58.593179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip>
16239 22:59:58.593654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip
16241 22:59:58.624834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip>
16242 22:59:58.625299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip
16244 22:59:58.656688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1200 RESULT=pass>
16245 22:59:58.657087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1200 RESULT=pass
16247 22:59:58.688376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip>
16248 22:59:58.688783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip
16250 22:59:58.719646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip>
16251 22:59:58.720117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip
16253 22:59:58.751017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip>
16254 22:59:58.751404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip
16256 22:59:58.781350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1216 RESULT=pass
16258 22:59:58.781718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1216 RESULT=pass>
16259 22:59:58.811987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip
16261 22:59:58.812289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip>
16262 22:59:58.842555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip>
16263 22:59:58.842947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip
16265 22:59:58.873121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip>
16266 22:59:58.873475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip
16268 22:59:58.904658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1232 RESULT=pass
16270 22:59:58.905147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1232 RESULT=pass>
16271 22:59:58.935587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip>
16272 22:59:58.936043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip
16274 22:59:58.966306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip>
16275 22:59:58.966699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip
16277 22:59:58.996916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip>
16278 22:59:58.997285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip
16280 22:59:59.027487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1248 RESULT=pass
16282 22:59:59.027941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1248 RESULT=pass>
16283 22:59:59.058034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip>
16284 22:59:59.058416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip
16286 22:59:59.088613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip>
16287 22:59:59.088982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip
16289 22:59:59.119091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip>
16290 22:59:59.119440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip
16292 22:59:59.150258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1264 RESULT=pass
16294 22:59:59.150726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1264 RESULT=pass>
16295 22:59:59.181294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip
16297 22:59:59.181897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip>
16298 22:59:59.212360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip>
16299 22:59:59.212812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip
16301 22:59:59.243228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip>
16302 22:59:59.243691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip
16304 22:59:59.273952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1280 RESULT=pass>
16305 22:59:59.274375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1280 RESULT=pass
16307 22:59:59.305103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip>
16308 22:59:59.305589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip
16310 22:59:59.337255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip>
16311 22:59:59.337703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip
16313 22:59:59.369187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip
16315 22:59:59.369753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip>
16316 22:59:59.399964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1296 RESULT=pass
16318 22:59:59.400555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1296 RESULT=pass>
16319 22:59:59.431976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip
16321 22:59:59.432421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip>
16322 22:59:59.464196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip
16324 22:59:59.464761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip>
16325 22:59:59.495934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip
16327 22:59:59.496527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip>
16328 22:59:59.527521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1312 RESULT=pass
16330 22:59:59.528055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1312 RESULT=pass>
16331 22:59:59.558826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip
16333 22:59:59.559364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip>
16334 22:59:59.590479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip>
16335 22:59:59.590928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip
16337 22:59:59.622142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip>
16338 22:59:59.622593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip
16340 22:59:59.654409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1328 RESULT=pass
16342 22:59:59.654956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1328 RESULT=pass>
16343 22:59:59.685994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip>
16344 22:59:59.686446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip
16346 22:59:59.717816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip>
16347 22:59:59.718276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip
16349 22:59:59.749520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip>
16350 22:59:59.749987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip
16352 22:59:59.791199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1344 RESULT=pass>
16353 22:59:59.791681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1344 RESULT=pass
16355 22:59:59.823160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip>
16356 22:59:59.823613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip
16358 22:59:59.854565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip>
16359 22:59:59.855009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip
16361 22:59:59.886106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip>
16362 22:59:59.886562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip
16364 22:59:59.919109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1360 RESULT=pass>
16365 22:59:59.919576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1360 RESULT=pass
16367 22:59:59.952179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip
16369 22:59:59.952928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip>
16370 22:59:59.985290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip>
16371 22:59:59.985755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip
16373 23:00:00.018809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip>
16374 23:00:00.019182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip
16376 23:00:00.051976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1376 RESULT=pass
16378 23:00:00.052517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1376 RESULT=pass>
16379 23:00:00.085620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip>
16380 23:00:00.085980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip
16382 23:00:00.119385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip>
16383 23:00:00.119779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip
16385 23:00:00.153024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip>
16386 23:00:00.153379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip
16388 23:00:00.187927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1392 RESULT=pass
16390 23:00:00.188430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1392 RESULT=pass>
16391 23:00:00.221412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip>
16392 23:00:00.221759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip
16394 23:00:00.255278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip>
16395 23:00:00.255637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip
16397 23:00:00.287438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip
16399 23:00:00.287918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip>
16400 23:00:00.318723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1408 RESULT=pass>
16401 23:00:00.319165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1408 RESULT=pass
16403 23:00:00.349568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip>
16404 23:00:00.349945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip
16406 23:00:00.381587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip
16408 23:00:00.382061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip>
16409 23:00:00.413457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip
16411 23:00:00.413909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip>
16412 23:00:00.445180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1424 RESULT=pass
16414 23:00:00.445611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1424 RESULT=pass>
16415 23:00:00.476812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip>
16416 23:00:00.477210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip
16418 23:00:00.508867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip>
16419 23:00:00.509266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip
16421 23:00:00.540699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip>
16422 23:00:00.541155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip
16424 23:00:00.572384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1440 RESULT=pass
16426 23:00:00.572915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1440 RESULT=pass>
16427 23:00:00.603543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip>
16428 23:00:00.604034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip
16430 23:00:00.635154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip
16432 23:00:00.635647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip>
16433 23:00:00.666641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip>
16434 23:00:00.667005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip
16436 23:00:00.698231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1456 RESULT=pass>
16437 23:00:00.698601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1456 RESULT=pass
16439 23:00:00.730027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip>
16440 23:00:00.730384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip
16442 23:00:00.761186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip>
16443 23:00:00.761536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip
16445 23:00:00.791681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip
16447 23:00:00.792107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip>
16448 23:00:00.821842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1472 RESULT=pass>
16449 23:00:00.822289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1472 RESULT=pass
16451 23:00:00.852647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip
16453 23:00:00.853197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip>
16454 23:00:00.883425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip>
16455 23:00:00.883882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip
16457 23:00:00.914355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip>
16458 23:00:00.914762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip
16460 23:00:00.945995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1488 RESULT=pass
16462 23:00:00.946442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1488 RESULT=pass>
16463 23:00:00.976832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip>
16464 23:00:00.977221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip
16466 23:00:01.007440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip>
16467 23:00:01.007847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip
16469 23:00:01.038766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip
16471 23:00:01.039214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip>
16472 23:00:01.069391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1504 RESULT=pass>
16473 23:00:01.069781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1504 RESULT=pass
16475 23:00:01.100689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip>
16476 23:00:01.101147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip
16478 23:00:01.131614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip>
16479 23:00:01.132083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip
16481 23:00:01.162406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip>
16482 23:00:01.162872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip
16484 23:00:01.196021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1520 RESULT=pass
16486 23:00:01.196575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1520 RESULT=pass>
16487 23:00:01.227050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip>
16488 23:00:01.227528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip
16490 23:00:01.257832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip
16492 23:00:01.258379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip>
16493 23:00:01.289724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip>
16494 23:00:01.290174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip
16496 23:00:01.322305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1536 RESULT=pass>
16497 23:00:01.322781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1536 RESULT=pass
16499 23:00:01.354899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip
16501 23:00:01.355332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip>
16502 23:00:01.389789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip>
16503 23:00:01.390224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip
16505 23:00:01.423409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip>
16506 23:00:01.423855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip
16508 23:00:01.459851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1552 RESULT=pass
16510 23:00:01.460308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1552 RESULT=pass>
16511 23:00:01.491960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip
16513 23:00:01.492417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip>
16514 23:00:01.523586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip>
16515 23:00:01.524001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip
16517 23:00:01.554997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip
16519 23:00:01.555482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip>
16520 23:00:01.585280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1568 RESULT=pass>
16521 23:00:01.585679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1568 RESULT=pass
16523 23:00:01.615660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip
16525 23:00:01.615955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip>
16526 23:00:01.645874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip>
16527 23:00:01.646236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip
16529 23:00:01.677185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip
16531 23:00:01.677636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip>
16532 23:00:01.707551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1584 RESULT=pass>
16533 23:00:01.707897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1584 RESULT=pass
16535 23:00:01.738091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip>
16536 23:00:01.738468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip
16538 23:00:01.768862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip
16540 23:00:01.769309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip>
16541 23:00:01.799345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip>
16542 23:00:01.799695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip
16544 23:00:01.829945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1600 RESULT=pass>
16545 23:00:01.830235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1600 RESULT=pass
16547 23:00:01.861000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip>
16548 23:00:01.861423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip
16550 23:00:01.891661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip
16552 23:00:01.892092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip>
16553 23:00:01.926225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip>
16554 23:00:01.926629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip
16556 23:00:01.958207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1616 RESULT=pass>
16557 23:00:01.958628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1616 RESULT=pass
16559 23:00:01.989638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip
16561 23:00:01.990075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip>
16562 23:00:02.029179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip>
16563 23:00:02.029617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip
16565 23:00:02.072277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip>
16566 23:00:02.072728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip
16568 23:00:02.120354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1632 RESULT=pass>
16569 23:00:02.120824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1632 RESULT=pass
16571 23:00:02.171026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip
16573 23:00:02.171514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip>
16574 23:00:02.216134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip
16576 23:00:02.216622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip>
16577 23:00:02.251054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip
16579 23:00:02.251535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip>
16580 23:00:02.307256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1648 RESULT=pass>
16581 23:00:02.307663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1648 RESULT=pass
16583 23:00:02.347246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip
16585 23:00:02.347733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip>
16586 23:00:02.383898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip
16588 23:00:02.384269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip>
16589 23:00:02.417711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip>
16590 23:00:02.418119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip
16592 23:00:02.452597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1664 RESULT=pass
16594 23:00:02.453080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1664 RESULT=pass>
16595 23:00:02.487486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip>
16596 23:00:02.487964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip
16598 23:00:02.530127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip>
16599 23:00:02.530600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip
16601 23:00:02.575894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip
16603 23:00:02.576359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip>
16604 23:00:02.613346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1680 RESULT=pass>
16605 23:00:02.613804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1680 RESULT=pass
16607 23:00:02.653206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip>
16608 23:00:02.653729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip
16610 23:00:02.696346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip>
16611 23:00:02.696729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip
16613 23:00:02.727744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip>
16614 23:00:02.728142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip
16616 23:00:02.761580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1696 RESULT=pass
16618 23:00:02.761971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1696 RESULT=pass>
16619 23:00:02.798286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip
16621 23:00:02.798760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip>
16622 23:00:02.839244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip
16624 23:00:02.839699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip>
16625 23:00:02.893114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip
16627 23:00:02.893500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip>
16628 23:00:02.937920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1712 RESULT=pass>
16629 23:00:02.938384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1712 RESULT=pass
16631 23:00:02.974429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip>
16632 23:00:02.974869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip
16634 23:00:03.009486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip>
16635 23:00:03.009990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip
16637 23:00:03.043552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip>
16638 23:00:03.044042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip
16640 23:00:03.075870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1728 RESULT=pass
16642 23:00:03.076480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1728 RESULT=pass>
16643 23:00:03.108531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip>
16644 23:00:03.109008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip
16646 23:00:03.142259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip>
16647 23:00:03.142685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip
16649 23:00:03.177226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip
16651 23:00:03.177688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip>
16652 23:00:03.211019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1744 RESULT=pass>
16653 23:00:03.211462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1744 RESULT=pass
16655 23:00:03.244767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip>
16656 23:00:03.245215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip
16658 23:00:03.278738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip>
16659 23:00:03.279197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip
16661 23:00:03.311612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip>
16662 23:00:03.312011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip
16664 23:00:03.360857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1760 RESULT=pass
16666 23:00:03.361603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1760 RESULT=pass>
16667 23:00:03.395540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip
16669 23:00:03.396119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip>
16670 23:00:03.429966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip
16672 23:00:03.430412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip>
16673 23:00:03.474100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip>
16674 23:00:03.474509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip
16676 23:00:03.513807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1776 RESULT=pass
16678 23:00:03.514192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1776 RESULT=pass>
16679 23:00:03.548699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip
16681 23:00:03.549078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip>
16682 23:00:03.590323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip>
16683 23:00:03.590623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip
16685 23:00:03.633912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip>
16686 23:00:03.634324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip
16688 23:00:03.676599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1792 RESULT=pass
16690 23:00:03.677040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1792 RESULT=pass>
16691 23:00:03.710319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip>
16692 23:00:03.710738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip
16694 23:00:03.744627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip
16696 23:00:03.745273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip>
16697 23:00:03.778492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip
16699 23:00:03.779255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip>
16700 23:00:03.811246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1808 RESULT=pass>
16701 23:00:03.811758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1808 RESULT=pass
16703 23:00:03.848963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip>
16704 23:00:03.849420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip
16706 23:00:03.885578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip>
16707 23:00:03.885990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip
16709 23:00:03.922171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip
16711 23:00:03.922661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip>
16712 23:00:03.962360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1824 RESULT=pass
16714 23:00:03.962826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1824 RESULT=pass>
16715 23:00:03.997414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip>
16716 23:00:03.997817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip
16718 23:00:04.031445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip
16720 23:00:04.031937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip>
16721 23:00:04.071503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip>
16722 23:00:04.071987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip
16724 23:00:04.122957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1840 RESULT=pass>
16725 23:00:04.123459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1840 RESULT=pass
16727 23:00:04.159822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip
16729 23:00:04.160591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip>
16730 23:00:04.193878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip
16732 23:00:04.194350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip>
16733 23:00:04.227118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip
16735 23:00:04.227602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip>
16736 23:00:04.263602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1856 RESULT=pass
16738 23:00:04.264002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1856 RESULT=pass>
16739 23:00:04.301317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip>
16740 23:00:04.301685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip
16742 23:00:04.342530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip
16744 23:00:04.342856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip>
16745 23:00:04.377634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip>
16746 23:00:04.378064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip
16748 23:00:04.412586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1872 RESULT=pass>
16749 23:00:04.413083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1872 RESULT=pass
16751 23:00:04.446808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip
16753 23:00:04.447170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip>
16754 23:00:04.480609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip
16756 23:00:04.481191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip>
16757 23:00:04.513760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip>
16758 23:00:04.514131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip
16760 23:00:04.547111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1888 RESULT=pass
16762 23:00:04.547470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1888 RESULT=pass>
16763 23:00:04.591250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip
16765 23:00:04.591805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip>
16766 23:00:04.629326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip>
16767 23:00:04.629812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip
16769 23:00:04.662440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip>
16770 23:00:04.662863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip
16772 23:00:04.695428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1904 RESULT=pass
16774 23:00:04.695949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1904 RESULT=pass>
16775 23:00:04.728392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip>
16776 23:00:04.728848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip
16778 23:00:04.761013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip
16780 23:00:04.761510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip>
16781 23:00:04.793670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip>
16782 23:00:04.794179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip
16784 23:00:04.829132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1920 RESULT=pass>
16785 23:00:04.829613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1920 RESULT=pass
16787 23:00:04.862123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip
16789 23:00:04.862638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip>
16790 23:00:04.895755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip>
16791 23:00:04.896234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip
16793 23:00:04.933498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip>
16794 23:00:04.934025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip
16796 23:00:04.965638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1936 RESULT=pass>
16797 23:00:04.966127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1936 RESULT=pass
16799 23:00:05.002546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip>
16800 23:00:05.003037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip
16802 23:00:05.037559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip
16804 23:00:05.038190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip>
16805 23:00:05.073564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip>
16806 23:00:05.074004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip
16808 23:00:05.112552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1952 RESULT=pass
16810 23:00:05.113027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1952 RESULT=pass>
16811 23:00:05.146792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip
16813 23:00:05.147356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip>
16814 23:00:05.180429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip>
16815 23:00:05.180855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip
16817 23:00:05.216239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip>
16818 23:00:05.216818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip
16820 23:00:05.255364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1968 RESULT=pass>
16821 23:00:05.255783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1968 RESULT=pass
16823 23:00:05.302305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip>
16824 23:00:05.302717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip
16826 23:00:05.340771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip
16828 23:00:05.341219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip>
16829 23:00:05.374509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip
16831 23:00:05.375002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip>
16832 23:00:05.407101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1984 RESULT=pass>
16833 23:00:05.407559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_1984 RESULT=pass
16835 23:00:05.440038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip
16837 23:00:05.440750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip>
16838 23:00:05.477911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip
16840 23:00:05.478645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip>
16841 23:00:05.511960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip
16843 23:00:05.512391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip>
16844 23:00:05.561006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2000 RESULT=pass>
16845 23:00:05.561434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2000 RESULT=pass
16847 23:00:05.593430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip>
16848 23:00:05.593869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip
16850 23:00:05.626496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip>
16851 23:00:05.626906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip
16853 23:00:05.660512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip
16855 23:00:05.660955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip>
16856 23:00:05.694671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2016 RESULT=pass>
16857 23:00:05.695102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2016 RESULT=pass
16859 23:00:05.733146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip>
16860 23:00:05.733579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip
16862 23:00:05.766792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip>
16863 23:00:05.767135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip
16865 23:00:05.802940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip
16867 23:00:05.803433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip>
16868 23:00:05.837795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2032 RESULT=pass>
16869 23:00:05.838280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2032 RESULT=pass
16871 23:00:05.872491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip
16873 23:00:05.873145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip>
16874 23:00:05.907415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip
16876 23:00:05.908086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip>
16877 23:00:05.943025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip
16879 23:00:05.943487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip>
16880 23:00:05.977843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2048 RESULT=pass>
16881 23:00:05.978252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2048 RESULT=pass
16883 23:00:06.011657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip
16885 23:00:06.012165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip>
16886 23:00:06.058428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip
16888 23:00:06.058913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip>
16889 23:00:06.091712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip>
16890 23:00:06.092197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip
16892 23:00:06.125204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2064 RESULT=pass
16894 23:00:06.125591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2064 RESULT=pass>
16895 23:00:06.174662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip>
16896 23:00:06.175092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip
16898 23:00:06.218974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip>
16899 23:00:06.219374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip
16901 23:00:06.263335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip>
16902 23:00:06.263779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip
16904 23:00:06.302291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2080 RESULT=pass
16906 23:00:06.302668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2080 RESULT=pass>
16907 23:00:06.337141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip>
16908 23:00:06.337530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip
16910 23:00:06.377313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip>
16911 23:00:06.377683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip
16913 23:00:06.424636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip>
16914 23:00:06.425028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip
16916 23:00:06.467698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2096 RESULT=pass
16918 23:00:06.468154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2096 RESULT=pass>
16919 23:00:06.502064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip>
16920 23:00:06.502493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip
16922 23:00:06.539532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip
16924 23:00:06.540063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip>
16925 23:00:06.583346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip>
16926 23:00:06.583814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip
16928 23:00:06.625842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2112 RESULT=pass>
16929 23:00:06.626243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2112 RESULT=pass
16931 23:00:06.669712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip>
16932 23:00:06.670128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip
16934 23:00:06.705337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip>
16935 23:00:06.705762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip
16937 23:00:06.741122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip
16939 23:00:06.741620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip>
16940 23:00:06.776851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2128 RESULT=pass>
16941 23:00:06.777281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2128 RESULT=pass
16943 23:00:06.812062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip
16945 23:00:06.812423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip>
16946 23:00:06.853663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip>
16947 23:00:06.854018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip
16949 23:00:06.897633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip>
16950 23:00:06.898054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip
16952 23:00:06.932448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2144 RESULT=pass>
16953 23:00:06.932879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2144 RESULT=pass
16955 23:00:06.971778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip
16957 23:00:06.972389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip>
16958 23:00:07.009643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip>
16959 23:00:07.010035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip
16961 23:00:07.043191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip>
16962 23:00:07.043654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip
16964 23:00:07.077364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2160 RESULT=pass>
16965 23:00:07.077828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2160 RESULT=pass
16967 23:00:07.112919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip>
16968 23:00:07.113388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip
16970 23:00:07.149219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip>
16971 23:00:07.149660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip
16973 23:00:07.183727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip>
16974 23:00:07.184156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip
16976 23:00:07.217582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2176 RESULT=pass>
16977 23:00:07.218040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2176 RESULT=pass
16979 23:00:07.251431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip>
16980 23:00:07.251880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip
16982 23:00:07.286861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip
16984 23:00:07.287335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip>
16985 23:00:07.322201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip>
16986 23:00:07.322638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip
16988 23:00:07.355356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2192 RESULT=pass
16990 23:00:07.355824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2192 RESULT=pass>
16991 23:00:07.389380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip>
16992 23:00:07.389798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip
16994 23:00:07.422280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip>
16995 23:00:07.422701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip
16997 23:00:07.455284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip
16999 23:00:07.455757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip>
17000 23:00:07.488728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2208 RESULT=pass>
17001 23:00:07.489166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2208 RESULT=pass
17003 23:00:07.522200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip>
17004 23:00:07.522627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip
17006 23:00:07.554308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip>
17007 23:00:07.554742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip
17009 23:00:07.586195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip>
17010 23:00:07.586633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip
17012 23:00:07.619682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2224 RESULT=pass
17014 23:00:07.620156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2224 RESULT=pass>
17015 23:00:07.653085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip>
17016 23:00:07.653522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip
17018 23:00:07.685494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip>
17019 23:00:07.685937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip
17021 23:00:07.716623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip>
17022 23:00:07.717038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip
17024 23:00:07.748768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2240 RESULT=pass
17026 23:00:07.749367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2240 RESULT=pass>
17027 23:00:07.780995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip>
17028 23:00:07.781487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip
17030 23:00:07.814040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip>
17031 23:00:07.814629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip
17033 23:00:07.844943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip>
17034 23:00:07.845322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip
17036 23:00:07.877935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2256 RESULT=pass>
17037 23:00:07.878335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2256 RESULT=pass
17039 23:00:07.912489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip>
17040 23:00:07.912887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip
17042 23:00:07.947018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip>
17043 23:00:07.947517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip
17045 23:00:07.982515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip
17047 23:00:07.983048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip>
17048 23:00:08.016864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2272 RESULT=pass>
17049 23:00:08.017336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2272 RESULT=pass
17051 23:00:08.053174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip>
17052 23:00:08.053608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip
17054 23:00:08.093458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip>
17055 23:00:08.093973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip
17057 23:00:08.140881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip>
17058 23:00:08.141226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip
17060 23:00:08.182303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2288 RESULT=pass>
17061 23:00:08.182714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2288 RESULT=pass
17063 23:00:08.236538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip>
17064 23:00:08.236896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip
17066 23:00:08.273085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip>
17067 23:00:08.273464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip
17069 23:00:08.312078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip
17071 23:00:08.312461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip>
17072 23:00:08.349764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2304 RESULT=pass>
17073 23:00:08.350180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2304 RESULT=pass
17075 23:00:08.392731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip
17077 23:00:08.393129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip>
17078 23:00:08.450841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip>
17079 23:00:08.451259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip
17081 23:00:08.498135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip>
17082 23:00:08.498518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip
17084 23:00:08.535998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2320 RESULT=pass
17086 23:00:08.536370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2320 RESULT=pass>
17087 23:00:08.581746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip
17089 23:00:08.582227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip>
17090 23:00:08.632802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip>
17091 23:00:08.633206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip
17093 23:00:08.678588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip>
17094 23:00:08.678923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip
17096 23:00:08.718874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2336 RESULT=pass
17098 23:00:08.719312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2336 RESULT=pass>
17099 23:00:08.757995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip>
17100 23:00:08.758389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip
17102 23:00:08.797310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip
17104 23:00:08.797788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip>
17105 23:00:08.844799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip>
17106 23:00:08.845229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip
17108 23:00:08.887231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2352 RESULT=pass>
17109 23:00:08.887661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2352 RESULT=pass
17111 23:00:08.928092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip
17113 23:00:08.928581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip>
17114 23:00:08.969272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip>
17115 23:00:08.969697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip
17117 23:00:09.014823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip>
17118 23:00:09.015271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip
17120 23:00:09.058459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2368 RESULT=pass
17122 23:00:09.058920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2368 RESULT=pass>
17123 23:00:09.100298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip>
17124 23:00:09.100682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip
17126 23:00:09.143974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip
17128 23:00:09.144425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip>
17129 23:00:09.182091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip>
17130 23:00:09.182484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip
17132 23:00:09.221962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2384 RESULT=pass
17134 23:00:09.222376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2384 RESULT=pass>
17135 23:00:09.264584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip>
17136 23:00:09.264942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip
17138 23:00:09.305619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip>
17139 23:00:09.306017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip
17141 23:00:09.344719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip>
17142 23:00:09.345144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip
17144 23:00:09.382783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2400 RESULT=pass
17146 23:00:09.383175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2400 RESULT=pass>
17147 23:00:09.430671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip>
17148 23:00:09.431092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip
17150 23:00:09.477825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip>
17151 23:00:09.478213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip
17153 23:00:09.532593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip>
17154 23:00:09.532976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip
17156 23:00:09.580809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2416 RESULT=pass
17158 23:00:09.581261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2416 RESULT=pass>
17159 23:00:09.634384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip>
17160 23:00:09.634739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip
17162 23:00:09.677780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip>
17163 23:00:09.678207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip
17165 23:00:09.719272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip>
17166 23:00:09.719703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip
17168 23:00:09.765834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2432 RESULT=pass>
17169 23:00:09.766278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2432 RESULT=pass
17171 23:00:09.805033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip>
17172 23:00:09.805395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip
17174 23:00:09.854928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip>
17175 23:00:09.855280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip
17177 23:00:09.901452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip
17179 23:00:09.901927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip>
17180 23:00:09.945188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2448 RESULT=pass>
17181 23:00:09.945594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2448 RESULT=pass
17183 23:00:09.998327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip>
17184 23:00:09.998875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip
17186 23:00:10.053766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip>
17187 23:00:10.054199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip
17189 23:00:10.102244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip>
17190 23:00:10.102658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip
17192 23:00:10.143565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2464 RESULT=pass>
17193 23:00:10.143950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2464 RESULT=pass
17195 23:00:10.186733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip
17197 23:00:10.187092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip>
17198 23:00:10.235984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip
17200 23:00:10.236351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip>
17201 23:00:10.286305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip>
17202 23:00:10.286712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip
17204 23:00:10.329802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2480 RESULT=pass>
17205 23:00:10.330228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2480 RESULT=pass
17207 23:00:10.364804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip>
17208 23:00:10.365234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip
17210 23:00:10.403995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip
17212 23:00:10.404463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip>
17213 23:00:10.441363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip>
17214 23:00:10.441858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip
17216 23:00:10.483826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2496 RESULT=pass
17218 23:00:10.484425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2496 RESULT=pass>
17219 23:00:10.536538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip>
17220 23:00:10.536953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip
17222 23:00:10.572799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip>
17223 23:00:10.573241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip
17225 23:00:10.611956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip
17227 23:00:10.612421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip>
17228 23:00:10.648685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2512 RESULT=pass
17230 23:00:10.649138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2512 RESULT=pass>
17231 23:00:10.685802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip
17233 23:00:10.686181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip>
17234 23:00:10.733675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip
17236 23:00:10.734094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip>
17237 23:00:10.781026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip>
17238 23:00:10.781432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip
17240 23:00:10.816845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2528 RESULT=pass
17242 23:00:10.817432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2528 RESULT=pass>
17243 23:00:10.863282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip>
17244 23:00:10.863740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip
17246 23:00:10.898918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip>
17247 23:00:10.899355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip
17249 23:00:10.936560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip>
17250 23:00:10.936994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip
17252 23:00:10.971985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2544 RESULT=pass
17254 23:00:10.972582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2544 RESULT=pass>
17255 23:00:11.008182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip
17257 23:00:11.008794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip>
17258 23:00:11.046031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip
17260 23:00:11.046652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip>
17261 23:00:11.079587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip>
17262 23:00:11.080047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip
17264 23:00:11.116429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2560 RESULT=pass
17266 23:00:11.117103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2560 RESULT=pass>
17267 23:00:11.155187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip
17269 23:00:11.155853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip>
17270 23:00:11.194874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip>
17271 23:00:11.195372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip
17273 23:00:11.229806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip
17275 23:00:11.230299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip>
17276 23:00:11.269585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2576 RESULT=pass
17278 23:00:11.270067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2576 RESULT=pass>
17279 23:00:11.306423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip>
17280 23:00:11.306810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip
17282 23:00:11.347031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip>
17283 23:00:11.347586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip
17285 23:00:11.385944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip>
17286 23:00:11.386441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip
17288 23:00:11.425338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2592 RESULT=pass>
17289 23:00:11.425922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2592 RESULT=pass
17291 23:00:11.461827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip
17293 23:00:11.462339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip>
17294 23:00:11.497555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip>
17295 23:00:11.498025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip
17297 23:00:11.531754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip>
17298 23:00:11.532228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip
17300 23:00:11.565497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2608 RESULT=pass>
17301 23:00:11.566001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2608 RESULT=pass
17303 23:00:11.600833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip
17305 23:00:11.601419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip>
17306 23:00:11.634035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip>
17307 23:00:11.634559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip
17309 23:00:11.669079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip>
17310 23:00:11.669602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip
17312 23:00:11.703315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2624 RESULT=pass
17314 23:00:11.703790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2624 RESULT=pass>
17315 23:00:11.737066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip
17317 23:00:11.737519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip>
17318 23:00:11.770735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip>
17319 23:00:11.771165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip
17321 23:00:11.803243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip>
17322 23:00:11.803724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip
17324 23:00:11.840507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2640 RESULT=pass
17326 23:00:11.840985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2640 RESULT=pass>
17327 23:00:11.874086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip>
17328 23:00:11.874470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip
17330 23:00:11.909158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip>
17331 23:00:11.909635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip
17333 23:00:11.942513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip>
17334 23:00:11.943005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip
17336 23:00:11.978804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2656 RESULT=pass>
17337 23:00:11.979308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2656 RESULT=pass
17339 23:00:12.013598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip
17341 23:00:12.014198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip>
17342 23:00:12.050486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip
17344 23:00:12.051221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip>
17345 23:00:12.091809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip>
17346 23:00:12.092278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip
17348 23:00:12.126818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2672 RESULT=pass
17350 23:00:12.127383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2672 RESULT=pass>
17351 23:00:12.159989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip
17353 23:00:12.160587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip>
17354 23:00:12.193888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip>
17355 23:00:12.194366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip
17357 23:00:12.230460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip>
17358 23:00:12.230859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip
17360 23:00:12.264934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2688 RESULT=pass
17362 23:00:12.265419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2688 RESULT=pass>
17363 23:00:12.301953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip>
17364 23:00:12.302408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip
17366 23:00:12.339269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip>
17367 23:00:12.339746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip
17369 23:00:12.375781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip>
17370 23:00:12.376172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip
17372 23:00:12.412428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2704 RESULT=pass
17374 23:00:12.412865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2704 RESULT=pass>
17375 23:00:12.452959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip>
17376 23:00:12.453339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip
17378 23:00:12.501744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip>
17379 23:00:12.503001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip
17381 23:00:12.547057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip
17383 23:00:12.547580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip>
17384 23:00:12.586520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2720 RESULT=pass>
17385 23:00:12.586878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2720 RESULT=pass
17387 23:00:12.620984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip>
17388 23:00:12.621337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip
17390 23:00:12.654269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip>
17391 23:00:12.654613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip
17393 23:00:12.686167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip>
17394 23:00:12.686538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip
17396 23:00:12.718006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2736 RESULT=pass>
17397 23:00:12.718390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2736 RESULT=pass
17399 23:00:12.749278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip>
17400 23:00:12.749675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip
17402 23:00:12.782781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip>
17403 23:00:12.783173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip
17405 23:00:12.817057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip>
17406 23:00:12.817497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip
17408 23:00:12.852999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2752 RESULT=pass>
17409 23:00:12.853511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2752 RESULT=pass
17411 23:00:12.892081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip
17413 23:00:12.892722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip>
17414 23:00:12.928784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip>
17415 23:00:12.929231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip
17417 23:00:12.963964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip
17419 23:00:12.964595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip>
17420 23:00:13.000345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2768 RESULT=pass>
17421 23:00:13.000797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2768 RESULT=pass
17423 23:00:13.034566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip
17425 23:00:13.035051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip>
17426 23:00:13.071210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip>
17427 23:00:13.071586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip
17429 23:00:13.106842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip>
17430 23:00:13.107232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip
17432 23:00:13.140942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2784 RESULT=pass
17434 23:00:13.141323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2784 RESULT=pass>
17435 23:00:13.172444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip>
17436 23:00:13.172870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip
17438 23:00:13.204443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip>
17439 23:00:13.204882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip
17441 23:00:13.236857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip>
17442 23:00:13.237272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip
17444 23:00:13.273431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2800 RESULT=pass>
17445 23:00:13.273897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2800 RESULT=pass
17447 23:00:13.306017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip>
17448 23:00:13.306397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip
17450 23:00:13.338110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip
17452 23:00:13.338587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip>
17453 23:00:13.369763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip>
17454 23:00:13.370210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip
17456 23:00:13.401693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2816 RESULT=pass>
17457 23:00:13.402146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2816 RESULT=pass
17459 23:00:13.439369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip>
17460 23:00:13.439857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip
17462 23:00:13.476554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip>
17463 23:00:13.477052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip
17465 23:00:13.511523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip
17467 23:00:13.512292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip>
17468 23:00:13.543439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2832 RESULT=pass>
17469 23:00:13.543901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2832 RESULT=pass
17471 23:00:13.577720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip
17473 23:00:13.578211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip>
17474 23:00:13.613316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip
17476 23:00:13.613698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip>
17477 23:00:13.645510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip>
17478 23:00:13.645892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip
17480 23:00:13.678718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2848 RESULT=pass>
17481 23:00:13.679230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2848 RESULT=pass
17483 23:00:13.722564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip>
17484 23:00:13.723049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip
17486 23:00:13.756631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip
17488 23:00:13.757109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip>
17489 23:00:13.788385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip>
17490 23:00:13.788803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip
17492 23:00:13.821632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2864 RESULT=pass
17494 23:00:13.822094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2864 RESULT=pass>
17495 23:00:13.854532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip
17497 23:00:13.855046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip>
17498 23:00:13.887595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip
17500 23:00:13.888155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip>
17501 23:00:13.921019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip>
17502 23:00:13.921485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip
17504 23:00:13.952720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2880 RESULT=pass
17506 23:00:13.953257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2880 RESULT=pass>
17507 23:00:13.983557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip>
17508 23:00:13.983993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip
17510 23:00:14.018797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip
17512 23:00:14.019428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip>
17513 23:00:14.050273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip>
17514 23:00:14.050684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip
17516 23:00:14.082114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2896 RESULT=pass
17518 23:00:14.082564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2896 RESULT=pass>
17519 23:00:14.113219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip
17521 23:00:14.113673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip>
17522 23:00:14.144637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip>
17523 23:00:14.145040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip
17525 23:00:14.176443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip>
17526 23:00:14.176858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip
17528 23:00:14.207560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2912 RESULT=pass
17530 23:00:14.208184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2912 RESULT=pass>
17531 23:00:14.238871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip>
17532 23:00:14.239282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip
17534 23:00:14.270151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip>
17535 23:00:14.270572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip
17537 23:00:14.301245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip>
17538 23:00:14.301658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip
17540 23:00:14.334356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2928 RESULT=pass>
17541 23:00:14.334795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2928 RESULT=pass
17543 23:00:14.368687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip>
17544 23:00:14.369098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip
17546 23:00:14.402466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip
17548 23:00:14.403136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip>
17549 23:00:14.436449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip>
17550 23:00:14.436918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip
17552 23:00:14.469828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2944 RESULT=pass
17554 23:00:14.470398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2944 RESULT=pass>
17555 23:00:14.502257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip>
17556 23:00:14.502728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip
17558 23:00:14.536778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip
17560 23:00:14.537408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip>
17561 23:00:14.571453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip>
17562 23:00:14.571905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip
17564 23:00:14.606358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2960 RESULT=pass>
17565 23:00:14.606832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2960 RESULT=pass
17567 23:00:14.639930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip
17569 23:00:14.640528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip>
17570 23:00:14.673636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip>
17571 23:00:14.674125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip
17573 23:00:14.707336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip>
17574 23:00:14.707761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip
17576 23:00:14.741241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2976 RESULT=pass>
17577 23:00:14.741704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2976 RESULT=pass
17579 23:00:14.774931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip>
17580 23:00:14.775374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip
17582 23:00:14.807354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip>
17583 23:00:14.807797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip
17585 23:00:14.841583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip>
17586 23:00:14.842019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip
17588 23:00:14.875594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2992 RESULT=pass>
17589 23:00:14.876071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_2992 RESULT=pass
17591 23:00:14.909012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip>
17592 23:00:14.909468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip
17594 23:00:14.941160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip
17596 23:00:14.941771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip>
17597 23:00:14.973478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip>
17598 23:00:14.973938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip
17600 23:00:15.005639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3008 RESULT=pass>
17601 23:00:15.006026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3008 RESULT=pass
17603 23:00:15.037793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip
17605 23:00:15.038203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip>
17606 23:00:15.070083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip
17608 23:00:15.070694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip>
17609 23:00:15.102760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip
17611 23:00:15.103329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip>
17612 23:00:15.135327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3024 RESULT=pass>
17613 23:00:15.135740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3024 RESULT=pass
17615 23:00:15.176042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip
17617 23:00:15.176481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip>
17618 23:00:15.224008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip
17620 23:00:15.224434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip>
17621 23:00:15.258915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip
17623 23:00:15.259354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip>
17624 23:00:15.304357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3040 RESULT=pass>
17625 23:00:15.304782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3040 RESULT=pass
17627 23:00:15.341745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip>
17628 23:00:15.342165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip
17630 23:00:15.374534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip
17632 23:00:15.374939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip>
17633 23:00:15.408553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip
17635 23:00:15.409018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip>
17636 23:00:15.441445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3056 RESULT=pass>
17637 23:00:15.441879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3056 RESULT=pass
17639 23:00:15.473889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip>
17640 23:00:15.474318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip
17642 23:00:15.506354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip>
17643 23:00:15.506847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip
17645 23:00:15.537988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip>
17646 23:00:15.538466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip
17648 23:00:15.569887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3072 RESULT=pass
17650 23:00:15.570514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3072 RESULT=pass>
17651 23:00:15.602071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip
17653 23:00:15.602492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip>
17654 23:00:15.634797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip
17656 23:00:15.635210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip>
17657 23:00:15.667101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip>
17658 23:00:15.667493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip
17660 23:00:15.699504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3088 RESULT=pass>
17661 23:00:15.699890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3088 RESULT=pass
17663 23:00:15.732198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip
17665 23:00:15.732669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip>
17666 23:00:15.765841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip>
17667 23:00:15.766231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip
17669 23:00:15.798374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip>
17670 23:00:15.798850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip
17672 23:00:15.830220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3104 RESULT=pass
17674 23:00:15.830804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3104 RESULT=pass>
17675 23:00:15.861601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip>
17676 23:00:15.862057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip
17678 23:00:15.893119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip>
17679 23:00:15.893583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip
17681 23:00:15.928143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip
17683 23:00:15.928777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip>
17684 23:00:15.961020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3120 RESULT=pass>
17685 23:00:15.961484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3120 RESULT=pass
17687 23:00:15.992991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip
17689 23:00:15.993621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip>
17690 23:00:16.024615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip>
17691 23:00:16.025091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip
17693 23:00:16.056737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip>
17694 23:00:16.057215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip
17696 23:00:16.088028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3136 RESULT=pass
17698 23:00:16.088492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3136 RESULT=pass>
17699 23:00:16.120345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip>
17700 23:00:16.120789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip
17702 23:00:16.152833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip
17704 23:00:16.153312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip>
17705 23:00:16.184918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip
17707 23:00:16.185397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip>
17708 23:00:16.217491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3152 RESULT=pass
17710 23:00:16.218216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3152 RESULT=pass>
17711 23:00:16.253995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip>
17712 23:00:16.254407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip
17714 23:00:16.293728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip>
17715 23:00:16.294193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip
17717 23:00:16.329102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip
17719 23:00:16.329571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip>
17720 23:00:16.363822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3168 RESULT=pass
17722 23:00:16.364293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3168 RESULT=pass>
17723 23:00:16.429777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip>
17724 23:00:16.430202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip
17726 23:00:16.503173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip>
17727 23:00:16.503594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip
17729 23:00:16.540879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip>
17730 23:00:16.541371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip
17732 23:00:16.577593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3184 RESULT=pass>
17733 23:00:16.578106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3184 RESULT=pass
17735 23:00:16.613523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip
17737 23:00:16.614180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip>
17738 23:00:16.645920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip>
17739 23:00:16.646363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip
17741 23:00:16.678049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip
17743 23:00:16.678520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip>
17744 23:00:16.709931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3200 RESULT=pass>
17745 23:00:16.710361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3200 RESULT=pass
17747 23:00:16.741732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip>
17748 23:00:16.742194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip
17750 23:00:16.774861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip>
17751 23:00:16.775322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip
17753 23:00:16.806813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip>
17754 23:00:16.807266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip
17756 23:00:16.838852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3216 RESULT=pass
17758 23:00:16.839464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3216 RESULT=pass>
17759 23:00:16.871273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip
17761 23:00:16.871915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip>
17762 23:00:16.903595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip
17764 23:00:16.904222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip>
17765 23:00:16.936078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip
17767 23:00:16.936564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip>
17768 23:00:16.968485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3232 RESULT=pass
17770 23:00:16.968967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3232 RESULT=pass>
17771 23:00:17.001715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip
17773 23:00:17.002194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip>
17774 23:00:17.035618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip>
17775 23:00:17.036067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip
17777 23:00:17.069046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip>
17778 23:00:17.069473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip
17780 23:00:17.101493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3248 RESULT=pass
17782 23:00:17.102141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3248 RESULT=pass>
17783 23:00:17.132764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip>
17784 23:00:17.133245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip
17786 23:00:17.164390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip>
17787 23:00:17.164848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip
17789 23:00:17.197176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip>
17790 23:00:17.197582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip
17792 23:00:17.229109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3264 RESULT=pass>
17793 23:00:17.229506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3264 RESULT=pass
17795 23:00:17.260741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip
17797 23:00:17.261204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip>
17798 23:00:17.293473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip>
17799 23:00:17.293881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip
17801 23:00:17.325616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip>
17802 23:00:17.326097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip
17804 23:00:17.358339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3280 RESULT=pass>
17805 23:00:17.358800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3280 RESULT=pass
17807 23:00:17.390407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip>
17808 23:00:17.390950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip
17810 23:00:17.422566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip
17812 23:00:17.423124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip>
17813 23:00:17.453295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip>
17814 23:00:17.453757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip
17816 23:00:17.484743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3296 RESULT=pass>
17817 23:00:17.485210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3296 RESULT=pass
17819 23:00:17.515685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip
17821 23:00:17.516238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip>
17822 23:00:17.547128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip>
17823 23:00:17.547609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip
17825 23:00:17.579261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip>
17826 23:00:17.579744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip
17828 23:00:17.611111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3312 RESULT=pass
17830 23:00:17.611736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3312 RESULT=pass>
17831 23:00:17.642871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip
17833 23:00:17.643415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip>
17834 23:00:17.674734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip>
17835 23:00:17.675177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip
17837 23:00:17.706137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip>
17838 23:00:17.706651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip
17840 23:00:17.737825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3328 RESULT=pass>
17841 23:00:17.738265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3328 RESULT=pass
17843 23:00:17.769606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip>
17844 23:00:17.770104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip
17846 23:00:17.802616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip>
17847 23:00:17.803090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip
17849 23:00:17.834958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip
17851 23:00:17.835416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip>
17852 23:00:17.867030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3344 RESULT=pass>
17853 23:00:17.867471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3344 RESULT=pass
17855 23:00:17.900066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip
17857 23:00:17.900661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip>
17858 23:00:17.936775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip>
17859 23:00:17.937264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip
17861 23:00:17.972079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip
17863 23:00:17.972540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip>
17864 23:00:18.008943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3360 RESULT=pass
17866 23:00:18.009365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3360 RESULT=pass>
17867 23:00:18.042157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip>
17868 23:00:18.042613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip
17870 23:00:18.074845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip>
17871 23:00:18.075399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip
17873 23:00:18.109622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip
17875 23:00:18.110084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip>
17876 23:00:18.144509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3376 RESULT=pass>
17877 23:00:18.145047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3376 RESULT=pass
17879 23:00:18.181828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip>
17880 23:00:18.182333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip
17882 23:00:18.215113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip>
17883 23:00:18.215606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip
17885 23:00:18.250198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip>
17886 23:00:18.250622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip
17888 23:00:18.283665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3392 RESULT=pass
17890 23:00:18.284102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3392 RESULT=pass>
17891 23:00:18.318366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip>
17892 23:00:18.318792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip
17894 23:00:18.352877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip>
17895 23:00:18.353276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip
17897 23:00:18.399173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip>
17898 23:00:18.399645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip
17900 23:00:18.431934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3408 RESULT=pass
17902 23:00:18.432412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3408 RESULT=pass>
17903 23:00:18.465047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip>
17904 23:00:18.465538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip
17906 23:00:18.497671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip>
17907 23:00:18.498169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip
17909 23:00:18.530463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip>
17910 23:00:18.530926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip
17912 23:00:18.564093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3424 RESULT=pass
17914 23:00:18.564500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3424 RESULT=pass>
17915 23:00:18.613347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip>
17916 23:00:18.613769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip
17918 23:00:18.649028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip>
17919 23:00:18.649467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip
17921 23:00:18.683529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip
17923 23:00:18.684100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip>
17924 23:00:18.718398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3440 RESULT=pass>
17925 23:00:18.718863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3440 RESULT=pass
17927 23:00:18.752802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip
17929 23:00:18.753391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip>
17930 23:00:18.786484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip
17932 23:00:18.787024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip>
17933 23:00:18.819689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip>
17934 23:00:18.820091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip
17936 23:00:18.853703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3456 RESULT=pass>
17937 23:00:18.854102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3456 RESULT=pass
17939 23:00:18.893734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip>
17940 23:00:18.894216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip
17942 23:00:18.926050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip>
17943 23:00:18.926544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip
17945 23:00:18.957227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip>
17946 23:00:18.957604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip
17948 23:00:18.988554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3472 RESULT=pass>
17949 23:00:18.989039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3472 RESULT=pass
17951 23:00:19.020568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip
17953 23:00:19.021147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip>
17954 23:00:19.051319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip>
17955 23:00:19.051750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip
17957 23:00:19.082746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip
17959 23:00:19.083276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip>
17960 23:00:19.113666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3488 RESULT=pass>
17961 23:00:19.114081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3488 RESULT=pass
17963 23:00:19.144988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip>
17964 23:00:19.145418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip
17966 23:00:19.176027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip
17968 23:00:19.176642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip>
17969 23:00:19.217433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip>
17970 23:00:19.217786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip
17972 23:00:19.252890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3504 RESULT=pass
17974 23:00:19.253625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3504 RESULT=pass>
17975 23:00:19.287848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip>
17976 23:00:19.288259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip
17978 23:00:19.323088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip>
17979 23:00:19.323546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip
17981 23:00:19.360992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip>
17982 23:00:19.361462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip
17984 23:00:19.397186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3520 RESULT=pass
17986 23:00:19.397733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3520 RESULT=pass>
17987 23:00:19.432528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip>
17988 23:00:19.432992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip
17990 23:00:19.467387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip>
17991 23:00:19.467839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip
17993 23:00:19.502812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip>
17994 23:00:19.503274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip
17996 23:00:19.539163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3536 RESULT=pass>
17997 23:00:19.539599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3536 RESULT=pass
17999 23:00:19.574859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip>
18000 23:00:19.575202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip
18002 23:00:19.609779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip>
18003 23:00:19.610159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip
18005 23:00:19.644551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip>
18006 23:00:19.644925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip
18008 23:00:19.678711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3552 RESULT=pass>
18009 23:00:19.679059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3552 RESULT=pass
18011 23:00:19.713989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip>
18012 23:00:19.714397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip
18014 23:00:19.749297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip>
18015 23:00:19.749655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip
18017 23:00:19.784534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip>
18018 23:00:19.784882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip
18020 23:00:19.821177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3568 RESULT=pass>
18021 23:00:19.821537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3568 RESULT=pass
18023 23:00:19.856607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip>
18024 23:00:19.856967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip
18026 23:00:19.892756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip>
18027 23:00:19.893199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip
18029 23:00:19.928455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip>
18030 23:00:19.928971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip
18032 23:00:19.965724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3584 RESULT=pass
18034 23:00:19.966451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3584 RESULT=pass>
18035 23:00:20.002421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip>
18036 23:00:20.002829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip
18038 23:00:20.040944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip>
18039 23:00:20.041361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip
18041 23:00:20.078100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip>
18042 23:00:20.078522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip
18044 23:00:20.114380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3600 RESULT=pass
18046 23:00:20.114837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3600 RESULT=pass>
18047 23:00:20.151381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip>
18048 23:00:20.151796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip
18050 23:00:20.190165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip>
18051 23:00:20.190583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip
18053 23:00:20.227388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip
18055 23:00:20.228060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip>
18056 23:00:20.264480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3616 RESULT=pass>
18057 23:00:20.264976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3616 RESULT=pass
18059 23:00:20.301596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip>
18060 23:00:20.302003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip
18062 23:00:20.337173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip>
18063 23:00:20.337661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip
18065 23:00:20.372964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip>
18066 23:00:20.373446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip
18068 23:00:20.409033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3632 RESULT=pass
18070 23:00:20.409686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3632 RESULT=pass>
18071 23:00:20.444504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip>
18072 23:00:20.444989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip
18074 23:00:20.480409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip>
18075 23:00:20.480863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip
18077 23:00:20.515618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip>
18078 23:00:20.516073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip
18080 23:00:20.551425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3648 RESULT=pass>
18081 23:00:20.551853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3648 RESULT=pass
18083 23:00:20.586605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip>
18084 23:00:20.587028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip
18086 23:00:20.621303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip>
18087 23:00:20.621685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip
18089 23:00:20.655749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip
18091 23:00:20.656391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip>
18092 23:00:20.692075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3664 RESULT=pass
18094 23:00:20.692711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3664 RESULT=pass>
18095 23:00:20.729527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip>
18096 23:00:20.729927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip
18098 23:00:20.766418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip>
18099 23:00:20.766845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip
18101 23:00:20.803324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip>
18102 23:00:20.803755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip
18104 23:00:20.841161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3680 RESULT=pass>
18105 23:00:20.841583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3680 RESULT=pass
18107 23:00:20.878509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip>
18108 23:00:20.878963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip
18110 23:00:20.916953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip
18112 23:00:20.917525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip>
18113 23:00:20.954831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip>
18114 23:00:20.955284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip
18116 23:00:20.996501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3696 RESULT=pass>
18117 23:00:20.996941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3696 RESULT=pass
18119 23:00:21.034186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip>
18120 23:00:21.034618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip
18122 23:00:21.072830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip>
18123 23:00:21.073253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip
18125 23:00:21.109656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip>
18126 23:00:21.110078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip
18128 23:00:21.144816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3712 RESULT=pass>
18129 23:00:21.145273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3712 RESULT=pass
18131 23:00:21.184975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip>
18132 23:00:21.185442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip
18134 23:00:21.222121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip
18136 23:00:21.222574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip>
18137 23:00:21.259696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip
18139 23:00:21.260198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip>
18140 23:00:21.306212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3728 RESULT=pass
18142 23:00:21.306658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3728 RESULT=pass>
18143 23:00:21.349470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip>
18144 23:00:21.349845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip
18146 23:00:21.386739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip>
18147 23:00:21.387104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip
18149 23:00:21.423958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip
18151 23:00:21.424267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip>
18152 23:00:21.473569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3744 RESULT=pass>
18153 23:00:21.473964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3744 RESULT=pass
18155 23:00:21.529596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip>
18156 23:00:21.529985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip
18158 23:00:21.606191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip>
18159 23:00:21.606624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip
18161 23:00:21.640669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip>
18162 23:00:21.641134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip
18164 23:00:21.673931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3760 RESULT=pass
18166 23:00:21.674689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3760 RESULT=pass>
18167 23:00:21.705788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip>
18168 23:00:21.706213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip
18170 23:00:21.737165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip
18172 23:00:21.737837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip>
18173 23:00:21.771170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip>
18174 23:00:21.771598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip
18176 23:00:21.803582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3776 RESULT=pass
18178 23:00:21.804057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3776 RESULT=pass>
18179 23:00:21.836130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip
18181 23:00:21.836598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip>
18182 23:00:21.868393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip
18184 23:00:21.868965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip>
18185 23:00:21.901356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip>
18186 23:00:21.901817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip
18188 23:00:21.935301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3792 RESULT=pass>
18189 23:00:21.935755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3792 RESULT=pass
18191 23:00:21.968988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip>
18192 23:00:21.969428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip
18194 23:00:22.002692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip
18196 23:00:22.003102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip>
18197 23:00:22.036085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip
18199 23:00:22.036859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip>
18200 23:00:22.073210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3808 RESULT=pass
18202 23:00:22.073670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3808 RESULT=pass>
18203 23:00:22.106899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip>
18204 23:00:22.107316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip
18206 23:00:22.140118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip
18208 23:00:22.140568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip>
18209 23:00:22.173103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip>
18210 23:00:22.173530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip
18212 23:00:22.207972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3824 RESULT=pass
18214 23:00:22.208413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3824 RESULT=pass>
18215 23:00:22.241947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip
18217 23:00:22.242360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip>
18218 23:00:22.276922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip>
18219 23:00:22.277342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip
18221 23:00:22.309973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip>
18222 23:00:22.310387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip
18224 23:00:22.341695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3840 RESULT=pass>
18225 23:00:22.342131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3840 RESULT=pass
18227 23:00:22.376940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip
18229 23:00:22.377405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip>
18230 23:00:22.412689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip>
18231 23:00:22.413084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip
18233 23:00:22.445641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip>
18234 23:00:22.446100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip
18236 23:00:22.483603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3856 RESULT=pass>
18237 23:00:22.484093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3856 RESULT=pass
18239 23:00:22.524977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip
18241 23:00:22.525604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip>
18242 23:00:22.560528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip>
18243 23:00:22.561011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip
18245 23:00:22.594643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip
18247 23:00:22.595199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip>
18248 23:00:22.632641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3872 RESULT=pass
18250 23:00:22.633258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3872 RESULT=pass>
18251 23:00:22.664876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip>
18252 23:00:22.665370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip
18254 23:00:22.702446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip>
18255 23:00:22.702929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip
18257 23:00:22.735640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip
18259 23:00:22.736095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip>
18260 23:00:22.771105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3888 RESULT=pass>
18261 23:00:22.771581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3888 RESULT=pass
18263 23:00:22.804827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip>
18264 23:00:22.805302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip
18266 23:00:22.853085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip>
18267 23:00:22.853558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip
18269 23:00:22.887738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip
18271 23:00:22.888385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip>
18272 23:00:22.921010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3904 RESULT=pass>
18273 23:00:22.921483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3904 RESULT=pass
18275 23:00:22.952987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip
18277 23:00:22.953622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip>
18278 23:00:22.985519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip>
18279 23:00:22.985940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip
18281 23:00:23.018537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip>
18282 23:00:23.019018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip
18284 23:00:23.053066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3920 RESULT=pass
18286 23:00:23.053678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3920 RESULT=pass>
18287 23:00:23.086518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip
18289 23:00:23.087252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip>
18290 23:00:23.119110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip
18292 23:00:23.119720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip>
18293 23:00:23.155823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip
18295 23:00:23.156386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip>
18296 23:00:23.193722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3936 RESULT=pass>
18297 23:00:23.194277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3936 RESULT=pass
18299 23:00:23.228347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip
18301 23:00:23.228909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip>
18302 23:00:23.265087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip>
18303 23:00:23.265465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip
18305 23:00:23.298420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip>
18306 23:00:23.298815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip
18308 23:00:23.332828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3952 RESULT=pass>
18309 23:00:23.333204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3952 RESULT=pass
18311 23:00:23.377621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip>
18312 23:00:23.378141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip
18314 23:00:23.413211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip>
18315 23:00:23.413678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip
18317 23:00:23.452486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip>
18318 23:00:23.452951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip
18320 23:00:23.486457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3968 RESULT=pass>
18321 23:00:23.486961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3968 RESULT=pass
18323 23:00:23.518353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip
18325 23:00:23.518927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip>
18326 23:00:23.553939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip
18328 23:00:23.554547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip>
18329 23:00:23.587034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip>
18330 23:00:23.587522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip
18332 23:00:23.621890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3984 RESULT=pass>
18333 23:00:23.622309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_3984 RESULT=pass
18335 23:00:23.658491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip>
18336 23:00:23.658925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip
18338 23:00:23.691721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip
18340 23:00:23.692171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip>
18341 23:00:23.725914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip
18343 23:00:23.726657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip>
18344 23:00:23.759353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4000 RESULT=pass>
18345 23:00:23.759832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4000 RESULT=pass
18347 23:00:23.796237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip
18349 23:00:23.796811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip>
18350 23:00:23.830336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip>
18351 23:00:23.830788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip
18353 23:00:23.873177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip>
18354 23:00:23.873663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip
18356 23:00:23.905050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4016 RESULT=pass
18358 23:00:23.905629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4016 RESULT=pass>
18359 23:00:23.937812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip>
18360 23:00:23.938267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip
18362 23:00:23.970762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip>
18363 23:00:23.971210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip
18365 23:00:24.011981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip
18367 23:00:24.012429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip>
18368 23:00:24.049501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4032 RESULT=pass>
18369 23:00:24.049939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4032 RESULT=pass
18371 23:00:24.081661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip>
18372 23:00:24.082091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip
18374 23:00:24.114177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip
18376 23:00:24.114622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip>
18377 23:00:24.146785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip>
18378 23:00:24.147198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip
18380 23:00:24.183898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4048 RESULT=pass
18382 23:00:24.184364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4048 RESULT=pass>
18383 23:00:24.217851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip
18385 23:00:24.218295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip>
18386 23:00:24.251653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip
18388 23:00:24.252201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip>
18389 23:00:24.285899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip
18391 23:00:24.286440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip>
18392 23:00:24.319596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4064 RESULT=pass>
18393 23:00:24.319988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4064 RESULT=pass
18395 23:00:24.352944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip>
18396 23:00:24.353459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip
18398 23:00:24.386056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip>
18399 23:00:24.386555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip
18401 23:00:24.419808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip
18403 23:00:24.420461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip>
18404 23:00:24.453926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4080 RESULT=pass
18406 23:00:24.454527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4080 RESULT=pass>
18407 23:00:24.489717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip>
18408 23:00:24.490139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip
18410 23:00:24.536432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip>
18411 23:00:24.536875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip
18413 23:00:24.575960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip
18415 23:00:24.576532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip>
18416 23:00:24.609887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4096 RESULT=pass>
18417 23:00:24.610328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4096 RESULT=pass
18419 23:00:24.644720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip>
18420 23:00:24.645158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip
18422 23:00:24.680741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip>
18423 23:00:24.681186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip
18425 23:00:24.718321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip>
18426 23:00:24.718840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip
18428 23:00:24.752336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4112 RESULT=pass>
18429 23:00:24.752867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4112 RESULT=pass
18431 23:00:24.789655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip
18433 23:00:24.790372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip>
18434 23:00:24.825400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip>
18435 23:00:24.825858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip
18437 23:00:24.860189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip>
18438 23:00:24.860626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip
18440 23:00:24.901572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4128 RESULT=pass>
18441 23:00:24.902057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4128 RESULT=pass
18443 23:00:24.935057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip
18445 23:00:24.935619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip>
18446 23:00:24.982488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip>
18447 23:00:24.983071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip
18449 23:00:25.035241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip
18451 23:00:25.035908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip>
18452 23:00:25.070659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4144 RESULT=pass>
18453 23:00:25.071102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4144 RESULT=pass
18455 23:00:25.115032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip>
18456 23:00:25.115489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip
18458 23:00:25.155985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip
18460 23:00:25.156569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip>
18461 23:00:25.189275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip>
18462 23:00:25.189695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip
18464 23:00:25.225155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4160 RESULT=pass>
18465 23:00:25.225613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4160 RESULT=pass
18467 23:00:25.264924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip>
18468 23:00:25.265331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip
18470 23:00:25.298742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip>
18471 23:00:25.299243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip
18473 23:00:25.331741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip
18475 23:00:25.332242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip>
18476 23:00:25.366327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4176 RESULT=pass
18478 23:00:25.366792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4176 RESULT=pass>
18479 23:00:25.400384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip>
18480 23:00:25.400752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip
18482 23:00:25.438135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip>
18483 23:00:25.438550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip
18485 23:00:25.477887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip>
18486 23:00:25.478307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip
18488 23:00:25.508996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4192 RESULT=pass
18490 23:00:25.509399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4192 RESULT=pass>
18491 23:00:25.540895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip
18493 23:00:25.541429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip>
18494 23:00:25.572650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip
18496 23:00:25.573196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip>
18497 23:00:25.605269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip>
18498 23:00:25.605699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip
18500 23:00:25.638105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4208 RESULT=pass>
18501 23:00:25.638570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4208 RESULT=pass
18503 23:00:25.670999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip>
18504 23:00:25.671472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip
18506 23:00:25.703185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip
18508 23:00:25.703739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip>
18509 23:00:25.735979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip
18511 23:00:25.736596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip>
18512 23:00:25.768271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4224 RESULT=pass>
18513 23:00:25.768685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4224 RESULT=pass
18515 23:00:25.800601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip>
18516 23:00:25.801014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip
18518 23:00:25.833400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip>
18519 23:00:25.833818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip
18521 23:00:25.866158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip>
18522 23:00:25.866618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip
18524 23:00:25.899897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4240 RESULT=pass
18526 23:00:25.900359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4240 RESULT=pass>
18527 23:00:25.933215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip
18529 23:00:25.933868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip>
18530 23:00:25.966604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip>
18531 23:00:25.967020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip
18533 23:00:25.998925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip
18535 23:00:25.999457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip>
18536 23:00:26.031143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4256 RESULT=pass>
18537 23:00:26.031581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4256 RESULT=pass
18539 23:00:26.064001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip
18541 23:00:26.064536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip>
18542 23:00:26.097241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip>
18543 23:00:26.097690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip
18545 23:00:26.130596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip>
18546 23:00:26.131059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip
18548 23:00:26.163121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4272 RESULT=pass>
18549 23:00:26.163576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4272 RESULT=pass
18551 23:00:26.197133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip>
18552 23:00:26.197594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip
18554 23:00:26.229687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip>
18555 23:00:26.230125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip
18557 23:00:26.264352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip>
18558 23:00:26.264796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip
18560 23:00:26.298467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4288 RESULT=pass
18562 23:00:26.299091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4288 RESULT=pass>
18563 23:00:26.332459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip>
18564 23:00:26.332916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip
18566 23:00:26.367225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip>
18567 23:00:26.367636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip
18569 23:00:26.401124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip>
18570 23:00:26.401519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip
18572 23:00:26.434375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4304 RESULT=pass>
18573 23:00:26.434823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4304 RESULT=pass
18575 23:00:26.467064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip>
18576 23:00:26.467511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip
18578 23:00:26.499170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip>
18579 23:00:26.499601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip
18581 23:00:26.531688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip>
18582 23:00:26.532128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip
18584 23:00:26.567243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4320 RESULT=pass
18586 23:00:26.567774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4320 RESULT=pass>
18587 23:00:26.601765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip>
18588 23:00:26.602222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip
18590 23:00:26.636313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip>
18591 23:00:26.636764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip
18593 23:00:26.670346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip>
18594 23:00:26.670791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip
18596 23:00:26.704447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4336 RESULT=pass>
18597 23:00:26.704896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4336 RESULT=pass
18599 23:00:26.738361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip
18601 23:00:26.738980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip>
18602 23:00:26.773714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip>
18603 23:00:26.774194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip
18605 23:00:26.806998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip>
18606 23:00:26.807489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip
18608 23:00:26.840197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4352 RESULT=pass>
18609 23:00:26.840679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4352 RESULT=pass
18611 23:00:26.872853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip>
18612 23:00:26.873343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip
18614 23:00:26.906712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip>
18615 23:00:26.907207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip
18617 23:00:26.940932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip
18619 23:00:26.941497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip>
18620 23:00:26.974450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4368 RESULT=pass>
18621 23:00:26.974888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4368 RESULT=pass
18623 23:00:27.008847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip
18625 23:00:27.009448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip>
18626 23:00:27.043023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip
18628 23:00:27.043597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip>
18629 23:00:27.075888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip
18631 23:00:27.076482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip>
18632 23:00:27.109112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4384 RESULT=pass>
18633 23:00:27.109606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4384 RESULT=pass
18635 23:00:27.141460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip
18637 23:00:27.142079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip>
18638 23:00:27.173261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip
18640 23:00:27.173831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip>
18641 23:00:27.205205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip>
18642 23:00:27.205640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip
18644 23:00:27.238127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4400 RESULT=pass
18646 23:00:27.238699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4400 RESULT=pass>
18647 23:00:27.270217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip>
18648 23:00:27.270669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip
18650 23:00:27.303579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip>
18651 23:00:27.304010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip
18653 23:00:27.338354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip>
18654 23:00:27.338779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip
18656 23:00:27.372721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4416 RESULT=pass>
18657 23:00:27.373164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4416 RESULT=pass
18659 23:00:27.407697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip>
18660 23:00:27.408128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip
18662 23:00:27.441881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip>
18663 23:00:27.442314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip
18665 23:00:27.475515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip>
18666 23:00:27.475943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip
18668 23:00:27.516142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4432 RESULT=pass
18670 23:00:27.516742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4432 RESULT=pass>
18671 23:00:27.564559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip>
18672 23:00:27.565052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip
18674 23:00:27.599041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip>
18675 23:00:27.599478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip
18677 23:00:27.632558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip>
18678 23:00:27.633000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip
18680 23:00:27.668101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4448 RESULT=pass>
18681 23:00:27.668491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4448 RESULT=pass
18683 23:00:27.704487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip>
18684 23:00:27.704897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip
18686 23:00:27.745326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip
18688 23:00:27.745940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip>
18689 23:00:27.782027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip
18691 23:00:27.782619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip>
18692 23:00:27.818201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4464 RESULT=pass>
18693 23:00:27.818683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4464 RESULT=pass
18695 23:00:27.853050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip>
18696 23:00:27.853514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip
18698 23:00:27.887465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip>
18699 23:00:27.887887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip
18701 23:00:27.920772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip>
18702 23:00:27.921197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip
18704 23:00:27.953675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4480 RESULT=pass>
18705 23:00:27.954111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4480 RESULT=pass
18707 23:00:27.988439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip>
18708 23:00:27.988936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip
18710 23:00:28.025393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip>
18711 23:00:28.025866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip
18713 23:00:28.058127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip
18715 23:00:28.058811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip>
18716 23:00:28.090972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4496 RESULT=pass
18718 23:00:28.091570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4496 RESULT=pass>
18719 23:00:28.122918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip
18721 23:00:28.123484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip>
18722 23:00:28.155347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip>
18723 23:00:28.155805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip
18725 23:00:28.189913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip>
18726 23:00:28.190366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip
18728 23:00:28.230927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4512 RESULT=pass
18730 23:00:28.231405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4512 RESULT=pass>
18731 23:00:28.264711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip>
18732 23:00:28.265190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip
18734 23:00:28.298889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip>
18735 23:00:28.299334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip
18737 23:00:28.333267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip>
18738 23:00:28.333703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip
18740 23:00:28.368553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4528 RESULT=pass>
18741 23:00:28.369009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4528 RESULT=pass
18743 23:00:28.401509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip>
18744 23:00:28.402036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip
18746 23:00:28.433724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip
18748 23:00:28.434288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip>
18749 23:00:28.466799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip>
18750 23:00:28.467253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip
18752 23:00:28.499448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4544 RESULT=pass
18754 23:00:28.500046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4544 RESULT=pass>
18755 23:00:28.532845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip>
18756 23:00:28.533313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip
18758 23:00:28.564677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip>
18759 23:00:28.565150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip
18761 23:00:28.597214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip>
18762 23:00:28.597687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip
18764 23:00:28.629697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4560 RESULT=pass>
18765 23:00:28.630150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4560 RESULT=pass
18767 23:00:28.661490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip>
18768 23:00:28.661981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip
18770 23:00:28.694812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip
18772 23:00:28.695290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip>
18773 23:00:28.729823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip>
18774 23:00:28.730252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip
18776 23:00:28.765049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4576 RESULT=pass
18778 23:00:28.765524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4576 RESULT=pass>
18779 23:00:28.800470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip
18781 23:00:28.801092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip>
18782 23:00:28.835159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip>
18783 23:00:28.835641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip
18785 23:00:28.870034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip>
18786 23:00:28.870517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip
18788 23:00:28.905798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4592 RESULT=pass>
18789 23:00:28.906286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4592 RESULT=pass
18791 23:00:28.941587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip
18793 23:00:28.942166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip>
18794 23:00:28.977300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip>
18795 23:00:28.977782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip
18797 23:00:29.014165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip>
18798 23:00:29.014632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip
18800 23:00:29.050622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4608 RESULT=pass>
18801 23:00:29.051065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4608 RESULT=pass
18803 23:00:29.086720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip>
18804 23:00:29.087167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip
18806 23:00:29.123528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip>
18807 23:00:29.123950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip
18809 23:00:29.166187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip
18811 23:00:29.166656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip>
18812 23:00:29.201710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4624 RESULT=pass>
18813 23:00:29.202157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4624 RESULT=pass
18815 23:00:29.237372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip
18817 23:00:29.237860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip>
18818 23:00:29.273752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip>
18819 23:00:29.274185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip
18821 23:00:29.310138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip
18823 23:00:29.310613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip>
18824 23:00:29.346170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4640 RESULT=pass
18826 23:00:29.346649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4640 RESULT=pass>
18827 23:00:29.382892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip>
18828 23:00:29.383311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip
18830 23:00:29.420677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip>
18831 23:00:29.421072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip
18833 23:00:29.456906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip>
18834 23:00:29.457377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip
18836 23:00:29.492881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4656 RESULT=pass>
18837 23:00:29.493327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4656 RESULT=pass
18839 23:00:29.528838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip>
18840 23:00:29.529268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip
18842 23:00:29.562933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip>
18843 23:00:29.563384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip
18845 23:00:29.597979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip
18847 23:00:29.598464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip>
18848 23:00:29.633716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4672 RESULT=pass>
18849 23:00:29.634158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4672 RESULT=pass
18851 23:00:29.669764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip>
18852 23:00:29.670209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip
18854 23:00:29.706127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip>
18855 23:00:29.706612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip
18857 23:00:29.741998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip>
18858 23:00:29.742459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip
18860 23:00:29.778234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4688 RESULT=pass>
18861 23:00:29.778651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4688 RESULT=pass
18863 23:00:29.814528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip
18865 23:00:29.815008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip>
18866 23:00:29.850719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip
18868 23:00:29.851192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip>
18869 23:00:29.887095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip>
18870 23:00:29.887535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip
18872 23:00:29.922969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4704 RESULT=pass>
18873 23:00:29.923422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4704 RESULT=pass
18875 23:00:29.959379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip
18877 23:00:29.959854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip>
18878 23:00:29.995971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip
18880 23:00:29.996436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip>
18881 23:00:30.032711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip>
18882 23:00:30.033136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip
18884 23:00:30.069563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4720 RESULT=pass>
18885 23:00:30.070031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4720 RESULT=pass
18887 23:00:30.105393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip
18889 23:00:30.106042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip>
18890 23:00:30.141608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip
18892 23:00:30.142062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip>
18893 23:00:30.177761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip
18895 23:00:30.178218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip>
18896 23:00:30.213487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4736 RESULT=pass>
18897 23:00:30.213922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4736 RESULT=pass
18899 23:00:30.251047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip
18901 23:00:30.251512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip>
18902 23:00:30.289675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip>
18903 23:00:30.290063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip
18905 23:00:30.337008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip
18907 23:00:30.337482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip>
18908 23:00:30.378511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4752 RESULT=pass
18910 23:00:30.379241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4752 RESULT=pass>
18911 23:00:30.414114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip>
18912 23:00:30.414568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip
18914 23:00:30.453121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip>
18915 23:00:30.453536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip
18917 23:00:30.487475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip
18919 23:00:30.488068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip>
18920 23:00:30.522366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4768 RESULT=pass
18922 23:00:30.522952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4768 RESULT=pass>
18923 23:00:30.556773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip
18925 23:00:30.557314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip>
18926 23:00:30.591459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip>
18927 23:00:30.591868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip
18929 23:00:30.627125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip>
18930 23:00:30.627529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip
18932 23:00:30.664598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4784 RESULT=pass>
18933 23:00:30.665021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4784 RESULT=pass
18935 23:00:30.699523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip>
18936 23:00:30.699931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip
18938 23:00:30.734246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip>
18939 23:00:30.734677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip
18941 23:00:30.769040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip
18943 23:00:30.769616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip>
18944 23:00:30.803257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4800 RESULT=pass
18946 23:00:30.803710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4800 RESULT=pass>
18947 23:00:30.838144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip>
18948 23:00:30.838610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip
18950 23:00:30.872633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip>
18951 23:00:30.873076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip
18953 23:00:30.907822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip
18955 23:00:30.908293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip>
18956 23:00:30.943469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4816 RESULT=pass>
18957 23:00:30.943923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4816 RESULT=pass
18959 23:00:30.978846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip
18961 23:00:30.979513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip>
18962 23:00:31.013493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip
18964 23:00:31.014050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip>
18965 23:00:31.047987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip
18967 23:00:31.048572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip>
18968 23:00:31.082476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4832 RESULT=pass>
18969 23:00:31.082947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4832 RESULT=pass
18971 23:00:31.116958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip
18973 23:00:31.117428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip>
18974 23:00:31.151494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip>
18975 23:00:31.151938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip
18977 23:00:31.186310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip>
18978 23:00:31.186746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip
18980 23:00:31.221525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4848 RESULT=pass>
18981 23:00:31.221971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4848 RESULT=pass
18983 23:00:31.255977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip
18985 23:00:31.256443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip>
18986 23:00:31.291817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip
18988 23:00:31.292574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip>
18989 23:00:31.327093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip
18991 23:00:31.327551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip>
18992 23:00:31.363586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4864 RESULT=pass>
18993 23:00:31.364061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4864 RESULT=pass
18995 23:00:31.402448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip>
18996 23:00:31.402852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip
18998 23:00:31.440780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip
19000 23:00:31.441239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip>
19001 23:00:31.476757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip
19003 23:00:31.477380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip>
19004 23:00:31.510662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4880 RESULT=pass>
19005 23:00:31.511134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4880 RESULT=pass
19007 23:00:31.545232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip
19009 23:00:31.545810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip>
19010 23:00:31.582306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip>
19011 23:00:31.582655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip
19013 23:00:31.637627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip>
19014 23:00:31.637996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip
19016 23:00:31.674675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4896 RESULT=pass>
19017 23:00:31.675018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4896 RESULT=pass
19019 23:00:31.709769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip>
19020 23:00:31.710115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip
19022 23:00:31.746404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip
19024 23:00:31.746839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip>
19025 23:00:31.782436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip>
19026 23:00:31.782781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip
19028 23:00:31.819577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4912 RESULT=pass>
19029 23:00:31.819932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4912 RESULT=pass
19031 23:00:31.856770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip
19033 23:00:31.857192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip>
19034 23:00:31.893230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip>
19035 23:00:31.893704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip
19037 23:00:31.929286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip>
19038 23:00:31.929698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip
19040 23:00:31.965538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4928 RESULT=pass
19042 23:00:31.966078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4928 RESULT=pass>
19043 23:00:32.001670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip>
19044 23:00:32.002062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip
19046 23:00:32.038168 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip>
19047 23:00:32.038602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip
19049 23:00:32.074562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip>
19050 23:00:32.074915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip
19052 23:00:32.111349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4944 RESULT=pass>
19053 23:00:32.111674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4944 RESULT=pass
19055 23:00:32.146723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip>
19056 23:00:32.147118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip
19058 23:00:32.181358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip>
19059 23:00:32.181682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip
19061 23:00:32.216641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip
19063 23:00:32.217097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip>
19064 23:00:32.251373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4960 RESULT=pass>
19065 23:00:32.251814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4960 RESULT=pass
19067 23:00:32.286855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip
19069 23:00:32.287312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip>
19070 23:00:32.321621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip>
19071 23:00:32.322049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip
19073 23:00:32.356732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip
19075 23:00:32.357396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip>
19076 23:00:32.391983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4976 RESULT=pass
19078 23:00:32.392619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4976 RESULT=pass>
19079 23:00:32.428486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip>
19080 23:00:32.428920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip
19082 23:00:32.464941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip>
19083 23:00:32.465373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip
19085 23:00:32.501376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip>
19086 23:00:32.501897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip
19088 23:00:32.538272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4992 RESULT=pass
19090 23:00:32.538813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_4992 RESULT=pass>
19091 23:00:32.574023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip>
19092 23:00:32.574379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip
19094 23:00:32.610856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip
19096 23:00:32.611325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip>
19097 23:00:32.645925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip
19099 23:00:32.646377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip>
19100 23:00:32.682101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5008 RESULT=pass>
19101 23:00:32.682473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5008 RESULT=pass
19103 23:00:32.721222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip>
19104 23:00:32.721701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip
19106 23:00:32.760653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip
19108 23:00:32.761233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip>
19109 23:00:32.799352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip>
19110 23:00:32.799819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip
19112 23:00:32.838554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5024 RESULT=pass>
19113 23:00:32.839034 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5024 RESULT=pass
19115 23:00:32.877713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip>
19116 23:00:32.878191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip
19118 23:00:32.916951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip>
19119 23:00:32.917318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip
19121 23:00:32.952826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip>
19122 23:00:32.953281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip
19124 23:00:32.989459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5040 RESULT=pass
19126 23:00:32.990046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5040 RESULT=pass>
19127 23:00:33.028174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip
19129 23:00:33.028794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip>
19130 23:00:33.064394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip
19132 23:00:33.064862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip>
19133 23:00:33.100410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip>
19134 23:00:33.100720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip
19136 23:00:33.137125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5056 RESULT=pass
19138 23:00:33.137465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5056 RESULT=pass>
19139 23:00:33.174354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip>
19140 23:00:33.174672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip
19142 23:00:33.210486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip>
19143 23:00:33.210843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip
19145 23:00:33.246437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip>
19146 23:00:33.246819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip
19148 23:00:33.283000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5072 RESULT=pass
19150 23:00:33.283527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5072 RESULT=pass>
19151 23:00:33.318340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip>
19152 23:00:33.318716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip
19154 23:00:33.354983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip>
19155 23:00:33.355466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip
19157 23:00:33.390935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip
19159 23:00:33.391396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip>
19160 23:00:33.426230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5088 RESULT=pass>
19161 23:00:33.426531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5088 RESULT=pass
19163 23:00:33.461910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip>
19164 23:00:33.462281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip
19166 23:00:33.497952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip>
19167 23:00:33.498262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip
19169 23:00:33.534073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip>
19170 23:00:33.534488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip
19172 23:00:33.570658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5104 RESULT=pass>
19173 23:00:33.571066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5104 RESULT=pass
19175 23:00:33.607270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip>
19176 23:00:33.607749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip
19178 23:00:33.645131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip>
19179 23:00:33.645597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip
19181 23:00:33.681508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip>
19182 23:00:33.682003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip
19184 23:00:33.717321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5120 RESULT=pass>
19185 23:00:33.717805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5120 RESULT=pass
19187 23:00:33.753704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip
19189 23:00:33.754112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip>
19190 23:00:33.789704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip>
19191 23:00:33.790109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip
19193 23:00:33.825354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip>
19194 23:00:33.825808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip
19196 23:00:33.861933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5136 RESULT=pass
19198 23:00:33.862512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5136 RESULT=pass>
19199 23:00:33.897029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip>
19200 23:00:33.897481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip
19202 23:00:33.932314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip>
19203 23:00:33.932707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip
19205 23:00:33.968790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip
19207 23:00:33.969368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip>
19208 23:00:34.005154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5152 RESULT=pass
19210 23:00:34.005601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5152 RESULT=pass>
19211 23:00:34.041318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip>
19212 23:00:34.041758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip
19214 23:00:34.077541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip
19216 23:00:34.078013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip>
19217 23:00:34.113826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip
19219 23:00:34.114381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip>
19220 23:00:34.150182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5168 RESULT=pass
19222 23:00:34.150656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5168 RESULT=pass>
19223 23:00:34.203432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip
19225 23:00:34.204100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip>
19226 23:00:34.238914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip
19228 23:00:34.239524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip>
19229 23:00:34.287533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip>
19230 23:00:34.287987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip
19232 23:00:34.323940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5184 RESULT=pass
19234 23:00:34.324549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5184 RESULT=pass>
19235 23:00:34.358455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip
19237 23:00:34.358850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip>
19238 23:00:34.391608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip>
19239 23:00:34.392109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip
19241 23:00:34.425837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip
19243 23:00:34.426468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip>
19244 23:00:34.460451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5200 RESULT=pass>
19245 23:00:34.460926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5200 RESULT=pass
19247 23:00:34.495161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip>
19248 23:00:34.495648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip
19250 23:00:34.530049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip
19252 23:00:34.530647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip>
19253 23:00:34.563704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip>
19254 23:00:34.564141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip
19256 23:00:34.598917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5216 RESULT=pass
19258 23:00:34.599461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5216 RESULT=pass>
19259 23:00:34.633279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip>
19260 23:00:34.633679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip
19262 23:00:34.667050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip>
19263 23:00:34.667464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip
19265 23:00:34.700828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip>
19266 23:00:34.701302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip
19268 23:00:34.735033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5232 RESULT=pass
19270 23:00:34.735577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5232 RESULT=pass>
19271 23:00:34.769418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip>
19272 23:00:34.769867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip
19274 23:00:34.805035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip>
19275 23:00:34.805503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip
19277 23:00:34.839959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip
19279 23:00:34.840544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip>
19280 23:00:34.874422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5248 RESULT=pass>
19281 23:00:34.874835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5248 RESULT=pass
19283 23:00:34.907820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip
19285 23:00:34.908290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip>
19286 23:00:34.942131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip>
19287 23:00:34.942590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip
19289 23:00:34.976890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip
19291 23:00:34.977453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip>
19292 23:00:35.010883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5264 RESULT=pass
19294 23:00:35.011331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5264 RESULT=pass>
19295 23:00:35.045234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip
19297 23:00:35.045709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip>
19298 23:00:35.079399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip>
19299 23:00:35.079860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip
19301 23:00:35.113023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip>
19302 23:00:35.113506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip
19304 23:00:35.146773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5280 RESULT=pass
19306 23:00:35.147329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5280 RESULT=pass>
19307 23:00:35.181714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip>
19308 23:00:35.182124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip
19310 23:00:35.215663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip
19312 23:00:35.216232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip>
19313 23:00:35.250961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip>
19314 23:00:35.251400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip
19316 23:00:35.287078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5296 RESULT=pass
19318 23:00:35.287562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5296 RESULT=pass>
19319 23:00:35.320985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip>
19320 23:00:35.321431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip
19322 23:00:35.355646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip
19324 23:00:35.356127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip>
19325 23:00:35.388953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip>
19326 23:00:35.389347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip
19328 23:00:35.422328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5312 RESULT=pass>
19329 23:00:35.422777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5312 RESULT=pass
19331 23:00:35.456771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip>
19332 23:00:35.457159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip
19334 23:00:35.490530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip>
19335 23:00:35.490965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip
19337 23:00:35.523375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip>
19338 23:00:35.523829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip
19340 23:00:35.557488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5328 RESULT=pass>
19341 23:00:35.557935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5328 RESULT=pass
19343 23:00:35.591312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip>
19344 23:00:35.591817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip
19346 23:00:35.624432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip>
19347 23:00:35.624932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip
19349 23:00:35.658949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip>
19350 23:00:35.659431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip
19352 23:00:35.691588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5344 RESULT=pass
19354 23:00:35.692060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5344 RESULT=pass>
19355 23:00:35.724923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip>
19356 23:00:35.725339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip
19358 23:00:35.757576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip>
19359 23:00:35.758061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip
19361 23:00:35.791261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip>
19362 23:00:35.791766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip
19364 23:00:35.830100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5360 RESULT=pass>
19365 23:00:35.830591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5360 RESULT=pass
19367 23:00:35.865115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip>
19368 23:00:35.865619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip
19370 23:00:35.900176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip
19372 23:00:35.900712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip>
19373 23:00:35.933366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip
19375 23:00:35.933945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip>
19376 23:00:35.967615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5376 RESULT=pass
19378 23:00:35.968194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5376 RESULT=pass>
19379 23:00:36.002662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip>
19380 23:00:36.003104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip
19382 23:00:36.037775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip>
19383 23:00:36.038184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip
19385 23:00:36.072403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip>
19386 23:00:36.072801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip
19388 23:00:36.121236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5392 RESULT=pass>
19389 23:00:36.121764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5392 RESULT=pass
19391 23:00:36.157554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip>
19392 23:00:36.158080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip
19394 23:00:36.190423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip
19396 23:00:36.190895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip>
19397 23:00:36.220916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip>
19398 23:00:36.221347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip
19400 23:00:36.252725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5408 RESULT=pass>
19401 23:00:36.253173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5408 RESULT=pass
19403 23:00:36.284741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip
19405 23:00:36.285199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip>
19406 23:00:36.317886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip>
19407 23:00:36.318315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip
19409 23:00:36.355217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip>
19410 23:00:36.355692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip
19412 23:00:36.392231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5424 RESULT=pass>
19413 23:00:36.392701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5424 RESULT=pass
19415 23:00:36.425671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip>
19416 23:00:36.426133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip
19418 23:00:36.459395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip>
19419 23:00:36.459908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip
19421 23:00:36.495464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip>
19422 23:00:36.495957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip
19424 23:00:36.528299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5440 RESULT=pass>
19425 23:00:36.528778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5440 RESULT=pass
19427 23:00:36.560549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip
19429 23:00:36.561016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip>
19430 23:00:36.592284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip>
19431 23:00:36.592696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip
19433 23:00:36.624926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip>
19434 23:00:36.625369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip
19436 23:00:36.657597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5456 RESULT=pass
19438 23:00:36.658353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5456 RESULT=pass>
19439 23:00:36.691061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip
19441 23:00:36.691621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip>
19442 23:00:36.723402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip>
19443 23:00:36.723942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip
19445 23:00:36.755716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip
19447 23:00:36.756315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip>
19448 23:00:36.788080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5472 RESULT=pass
19450 23:00:36.788882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5472 RESULT=pass>
19451 23:00:36.821633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip
19453 23:00:36.822463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip>
19454 23:00:36.855488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip>
19455 23:00:36.855940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip
19457 23:00:36.892455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip>
19458 23:00:36.892834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip
19460 23:00:36.927803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5488 RESULT=pass
19462 23:00:36.928163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5488 RESULT=pass>
19463 23:00:36.961762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip>
19464 23:00:36.962239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip
19466 23:00:36.995299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip>
19467 23:00:36.995713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip
19469 23:00:37.027971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip
19471 23:00:37.028439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip>
19472 23:00:37.059915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5504 RESULT=pass
19474 23:00:37.060577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5504 RESULT=pass>
19475 23:00:37.091647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip>
19476 23:00:37.092107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip
19478 23:00:37.124734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip
19480 23:00:37.125314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip>
19481 23:00:37.156123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip
19483 23:00:37.156564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip>
19484 23:00:37.187704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5520 RESULT=pass
19486 23:00:37.188153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5520 RESULT=pass>
19487 23:00:37.219240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip
19489 23:00:37.219705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip>
19490 23:00:37.250233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip>
19491 23:00:37.250648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip
19493 23:00:37.281262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip
19495 23:00:37.281726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip>
19496 23:00:37.312142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5536 RESULT=pass
19498 23:00:37.312757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5536 RESULT=pass>
19499 23:00:37.343594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip
19501 23:00:37.344105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip>
19502 23:00:37.374282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip>
19503 23:00:37.374717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip
19505 23:00:37.405343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip>
19506 23:00:37.405800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip
19508 23:00:37.437326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5552 RESULT=pass
19510 23:00:37.437883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5552 RESULT=pass>
19511 23:00:37.468529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip>
19512 23:00:37.468968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip
19514 23:00:37.499531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip>
19515 23:00:37.499968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip
19517 23:00:37.531069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip>
19518 23:00:37.531514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip
19520 23:00:37.562196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5568 RESULT=pass
19522 23:00:37.562725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5568 RESULT=pass>
19523 23:00:37.593480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip>
19524 23:00:37.593897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip
19526 23:00:37.624954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip>
19527 23:00:37.625354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip
19529 23:00:37.656733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip>
19530 23:00:37.657121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip
19532 23:00:37.688625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5584 RESULT=pass
19534 23:00:37.689066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5584 RESULT=pass>
19535 23:00:37.719279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip
19537 23:00:37.719868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip>
19538 23:00:37.751055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip>
19539 23:00:37.751453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip
19541 23:00:37.781874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip>
19542 23:00:37.782271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip
19544 23:00:37.814731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5600 RESULT=pass>
19545 23:00:37.815145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5600 RESULT=pass
19547 23:00:37.848058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip
19549 23:00:37.848699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip>
19550 23:00:37.879310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip>
19551 23:00:37.879771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip
19553 23:00:37.911017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip>
19554 23:00:37.911461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip
19556 23:00:37.944412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5616 RESULT=pass
19558 23:00:37.944975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5616 RESULT=pass>
19559 23:00:37.976321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip
19561 23:00:37.976855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip>
19562 23:00:38.007556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip>
19563 23:00:38.007988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip
19565 23:00:38.039069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip>
19566 23:00:38.039505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip
19568 23:00:38.071068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5632 RESULT=pass
19570 23:00:38.071607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5632 RESULT=pass>
19571 23:00:38.102511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip
19573 23:00:38.103064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip>
19574 23:00:38.134882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip>
19575 23:00:38.135426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip
19577 23:00:38.168316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip>
19578 23:00:38.168771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip
19580 23:00:38.199263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5648 RESULT=pass
19582 23:00:38.199687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5648 RESULT=pass>
19583 23:00:38.230695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip>
19584 23:00:38.231089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip
19586 23:00:38.262739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip>
19587 23:00:38.263142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip
19589 23:00:38.295206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip>
19590 23:00:38.295620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip
19592 23:00:38.327023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5664 RESULT=pass
19594 23:00:38.327608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5664 RESULT=pass>
19595 23:00:38.358529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip>
19596 23:00:38.359022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip
19598 23:00:38.389797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip>
19599 23:00:38.390189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip
19601 23:00:38.420945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip>
19602 23:00:38.421360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip
19604 23:00:38.452378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5680 RESULT=pass>
19605 23:00:38.452801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5680 RESULT=pass
19607 23:00:38.484249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip>
19608 23:00:38.484678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip
19610 23:00:38.515489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip>
19611 23:00:38.515962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip
19613 23:00:38.546706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip
19615 23:00:38.547246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip>
19616 23:00:38.577714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5696 RESULT=pass
19618 23:00:38.578244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5696 RESULT=pass>
19619 23:00:38.608853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip>
19620 23:00:38.609328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip
19622 23:00:38.640327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip>
19623 23:00:38.640800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip
19625 23:00:38.672457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip>
19626 23:00:38.672933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip
19628 23:00:38.704358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5712 RESULT=pass
19630 23:00:38.704990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5712 RESULT=pass>
19631 23:00:38.735544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip>
19632 23:00:38.736013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip
19634 23:00:38.766169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip>
19635 23:00:38.766637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip
19637 23:00:38.797814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip
19639 23:00:38.798369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip>
19640 23:00:38.828856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5728 RESULT=pass
19642 23:00:38.829297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5728 RESULT=pass>
19643 23:00:38.860480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip
19645 23:00:38.861039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip>
19646 23:00:38.891669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip>
19647 23:00:38.892120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip
19649 23:00:38.922820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip
19651 23:00:38.923360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip>
19652 23:00:38.954046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5744 RESULT=pass
19654 23:00:38.954495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5744 RESULT=pass>
19655 23:00:38.985111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip>
19656 23:00:38.985517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip
19658 23:00:39.016052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip
19660 23:00:39.016471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip>
19661 23:00:39.047020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip>
19662 23:00:39.047413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip
19664 23:00:39.077745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5760 RESULT=pass>
19665 23:00:39.078148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5760 RESULT=pass
19667 23:00:39.108794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip>
19668 23:00:39.109201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip
19670 23:00:39.140925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip>
19671 23:00:39.141328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip
19673 23:00:39.172756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip>
19674 23:00:39.173159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip
19676 23:00:39.204118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5776 RESULT=pass
19678 23:00:39.204555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5776 RESULT=pass>
19679 23:00:39.235608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip>
19680 23:00:39.236009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip
19682 23:00:39.269364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip>
19683 23:00:39.269774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip
19685 23:00:39.302871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip
19687 23:00:39.303322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip>
19688 23:00:39.336671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5792 RESULT=pass>
19689 23:00:39.337148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5792 RESULT=pass
19691 23:00:39.371301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip
19693 23:00:39.371900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip>
19694 23:00:39.406553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip>
19695 23:00:39.407019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip
19697 23:00:39.449066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip>
19698 23:00:39.449548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip
19700 23:00:39.485964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5808 RESULT=pass>
19701 23:00:39.486378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5808 RESULT=pass
19703 23:00:39.520901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip>
19704 23:00:39.521297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip
19706 23:00:39.554368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip>
19707 23:00:39.554784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip
19709 23:00:39.586534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip
19711 23:00:39.586983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip>
19712 23:00:39.617264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5824 RESULT=pass
19714 23:00:39.617721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5824 RESULT=pass>
19715 23:00:39.648400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip>
19716 23:00:39.648837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip
19718 23:00:39.680456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip>
19719 23:00:39.680892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip
19721 23:00:39.712131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip
19723 23:00:39.712665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip>
19724 23:00:39.744812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5840 RESULT=pass
19726 23:00:39.745345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5840 RESULT=pass>
19727 23:00:39.775909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip
19729 23:00:39.776476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip>
19730 23:00:39.807500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip>
19731 23:00:39.807941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip
19733 23:00:39.839670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip>
19734 23:00:39.840121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip
19736 23:00:39.871625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5856 RESULT=pass
19738 23:00:39.872351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5856 RESULT=pass>
19739 23:00:39.904310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip>
19740 23:00:39.904757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip
19742 23:00:39.935566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip
19744 23:00:39.935983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip>
19745 23:00:39.968794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip
19747 23:00:39.969247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip>
19748 23:00:40.000902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5872 RESULT=pass>
19749 23:00:40.001349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5872 RESULT=pass
19751 23:00:40.032978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip>
19752 23:00:40.033426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip
19754 23:00:40.065336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip>
19755 23:00:40.065797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip
19757 23:00:40.098111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip>
19758 23:00:40.098581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip
19760 23:00:40.129567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5888 RESULT=pass>
19761 23:00:40.130029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5888 RESULT=pass
19763 23:00:40.160899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip>
19764 23:00:40.161334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip
19766 23:00:40.193820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip>
19767 23:00:40.194275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip
19769 23:00:40.225773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip>
19770 23:00:40.226283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip
19772 23:00:40.260297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5904 RESULT=pass
19774 23:00:40.260837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5904 RESULT=pass>
19775 23:00:40.293265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip
19777 23:00:40.293817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip>
19778 23:00:40.326643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip>
19779 23:00:40.327204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip
19781 23:00:40.360756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip
19783 23:00:40.361321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip>
19784 23:00:40.395206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5920 RESULT=pass
19786 23:00:40.395953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5920 RESULT=pass>
19787 23:00:40.427694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip>
19788 23:00:40.428112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip
19790 23:00:40.459453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip>
19791 23:00:40.459856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip
19793 23:00:40.492759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip>
19794 23:00:40.493177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip
19796 23:00:40.524915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5936 RESULT=pass>
19797 23:00:40.525329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5936 RESULT=pass
19799 23:00:40.556104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip
19801 23:00:40.556632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip>
19802 23:00:40.587221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip>
19803 23:00:40.587690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip
19805 23:00:40.619322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip>
19806 23:00:40.619789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip
19808 23:00:40.650162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5952 RESULT=pass>
19809 23:00:40.650579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5952 RESULT=pass
19811 23:00:40.681627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip>
19812 23:00:40.682045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip
19814 23:00:40.713032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip
19816 23:00:40.713588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip>
19817 23:00:40.743971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip
19819 23:00:40.744433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip>
19820 23:00:40.776578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5968 RESULT=pass>
19821 23:00:40.777133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5968 RESULT=pass
19823 23:00:40.808873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip>
19824 23:00:40.809329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip
19826 23:00:40.840891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip>
19827 23:00:40.841310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip
19829 23:00:40.872534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip
19831 23:00:40.873082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip>
19832 23:00:40.903708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5984 RESULT=pass
19834 23:00:40.904263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_5984 RESULT=pass>
19835 23:00:40.934853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip>
19836 23:00:40.935327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip
19838 23:00:40.966010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip
19840 23:00:40.966641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip>
19841 23:00:40.996923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip>
19842 23:00:40.997402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip
19844 23:00:41.028552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6000 RESULT=pass>
19845 23:00:41.028994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6000 RESULT=pass
19847 23:00:41.059121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip>
19848 23:00:41.059557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip
19850 23:00:41.089918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip>
19851 23:00:41.090345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip
19853 23:00:41.121120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip
19855 23:00:41.121570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip>
19856 23:00:41.151622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6016 RESULT=pass
19858 23:00:41.152069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6016 RESULT=pass>
19859 23:00:41.183271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip>
19860 23:00:41.183688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip
19862 23:00:41.216661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip>
19863 23:00:41.217101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip
19865 23:00:41.248310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip>
19866 23:00:41.248715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip
19868 23:00:41.279406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6032 RESULT=pass>
19869 23:00:41.279877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6032 RESULT=pass
19871 23:00:41.310704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip>
19872 23:00:41.311158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip
19874 23:00:41.343710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip
19876 23:00:41.344261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip>
19877 23:00:41.382094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip
19879 23:00:41.382659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip>
19880 23:00:41.414880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6048 RESULT=pass
19882 23:00:41.415496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6048 RESULT=pass>
19883 23:00:41.446598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip>
19884 23:00:41.447112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip
19886 23:00:41.477824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip>
19887 23:00:41.478257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip
19889 23:00:41.509065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip>
19890 23:00:41.509523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip
19892 23:00:41.540828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6064 RESULT=pass
19894 23:00:41.541403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6064 RESULT=pass>
19895 23:00:41.572428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip>
19896 23:00:41.572872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip
19898 23:00:41.604600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip>
19899 23:00:41.605055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip
19901 23:00:41.635571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip>
19902 23:00:41.636030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip
19904 23:00:41.666348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6080 RESULT=pass>
19905 23:00:41.666812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6080 RESULT=pass
19907 23:00:41.697906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip>
19908 23:00:41.698351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip
19910 23:00:41.729598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip>
19911 23:00:41.730046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip
19913 23:00:41.761074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip>
19914 23:00:41.761537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip
19916 23:00:41.793588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6096 RESULT=pass>
19917 23:00:41.794064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6096 RESULT=pass
19919 23:00:41.824997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip>
19920 23:00:41.825419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip
19922 23:00:41.856986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip>
19923 23:00:41.857372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip
19925 23:00:41.888514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip>
19926 23:00:41.888945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip
19928 23:00:41.919718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6112 RESULT=pass>
19929 23:00:41.920163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6112 RESULT=pass
19931 23:00:41.950619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip>
19932 23:00:41.951052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip
19934 23:00:41.981713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip
19936 23:00:41.982380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip>
19937 23:00:42.012875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip>
19938 23:00:42.013274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip
19940 23:00:42.044086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6128 RESULT=pass>
19941 23:00:42.044510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6128 RESULT=pass
19943 23:00:42.075390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip
19945 23:00:42.075841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip>
19946 23:00:42.106058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip>
19947 23:00:42.106490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip
19949 23:00:42.136965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip
19951 23:00:42.137419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip>
19952 23:00:42.167102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6144 RESULT=pass>
19953 23:00:42.167568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6144 RESULT=pass
19955 23:00:42.198719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip>
19956 23:00:42.199171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip
19958 23:00:42.230865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip
19960 23:00:42.231409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip>
19961 23:00:42.261484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip
19963 23:00:42.261944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip>
19964 23:00:42.292156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6160 RESULT=pass
19966 23:00:42.292602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6160 RESULT=pass>
19967 23:00:42.324328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip>
19968 23:00:42.324776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip
19970 23:00:42.355364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip>
19971 23:00:42.355801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip
19973 23:00:42.386625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip>
19974 23:00:42.387025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip
19976 23:00:42.418235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6176 RESULT=pass>
19977 23:00:42.418641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6176 RESULT=pass
19979 23:00:42.450045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip>
19980 23:00:42.450448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip
19982 23:00:42.481381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip>
19983 23:00:42.481786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip
19985 23:00:42.512816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip
19987 23:00:42.513258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip>
19988 23:00:42.544738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6192 RESULT=pass
19990 23:00:42.545186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6192 RESULT=pass>
19991 23:00:42.576047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip
19993 23:00:42.576664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip>
19994 23:00:42.607699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip>
19995 23:00:42.608167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip
19997 23:00:42.639789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip>
19998 23:00:42.640216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip
20000 23:00:42.670634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6208 RESULT=pass>
20001 23:00:42.671064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6208 RESULT=pass
20003 23:00:42.701370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip>
20004 23:00:42.701859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip
20006 23:00:42.732847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip>
20007 23:00:42.733315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip
20009 23:00:42.764786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip
20011 23:00:42.765403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip>
20012 23:00:42.796573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6224 RESULT=pass>
20013 23:00:42.797045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6224 RESULT=pass
20015 23:00:42.827310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip>
20016 23:00:42.827760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip
20018 23:00:42.858708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip>
20019 23:00:42.859161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip
20021 23:00:42.889777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip>
20022 23:00:42.890176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip
20024 23:00:42.920590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6240 RESULT=pass>
20025 23:00:42.921009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6240 RESULT=pass
20027 23:00:42.954264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip
20029 23:00:42.954723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip>
20030 23:00:42.985931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip>
20031 23:00:42.986379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip
20033 23:00:43.017090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip>
20034 23:00:43.017520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip
20036 23:00:43.049133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6256 RESULT=pass
20038 23:00:43.049683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6256 RESULT=pass>
20039 23:00:43.081798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip
20041 23:00:43.082261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip>
20042 23:00:43.113678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip
20044 23:00:43.114282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip>
20045 23:00:43.145929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip>
20046 23:00:43.146413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip
20048 23:00:43.177731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6272 RESULT=pass>
20049 23:00:43.178224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6272 RESULT=pass
20051 23:00:43.209485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip
20053 23:00:43.210050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip>
20054 23:00:43.241544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip>
20055 23:00:43.242008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip
20057 23:00:43.272854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip
20059 23:00:43.273381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip>
20060 23:00:43.303104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6288 RESULT=pass
20062 23:00:43.303639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6288 RESULT=pass>
20063 23:00:43.333941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip>
20064 23:00:43.334394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip
20066 23:00:43.365015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip
20068 23:00:43.365551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip>
20069 23:00:43.395493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip>
20070 23:00:43.395948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip
20072 23:00:43.426242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6304 RESULT=pass
20074 23:00:43.426817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6304 RESULT=pass>
20075 23:00:43.456806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip>
20076 23:00:43.457241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip
20078 23:00:43.487310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip>
20079 23:00:43.487773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip
20081 23:00:43.518043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip>
20082 23:00:43.518479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip
20084 23:00:43.549126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6320 RESULT=pass>
20085 23:00:43.549586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6320 RESULT=pass
20087 23:00:43.580120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip
20089 23:00:43.580742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip>
20090 23:00:43.610749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip>
20091 23:00:43.611170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip
20093 23:00:43.641262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip>
20094 23:00:43.641662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip
20096 23:00:43.672057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6336 RESULT=pass
20098 23:00:43.672486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6336 RESULT=pass>
20099 23:00:43.703462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip>
20100 23:00:43.703914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip
20102 23:00:43.735159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip
20104 23:00:43.735751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip>
20105 23:00:43.769006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip>
20106 23:00:43.769463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip
20108 23:00:43.804494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6352 RESULT=pass>
20109 23:00:43.804958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6352 RESULT=pass
20111 23:00:43.836540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip
20113 23:00:43.837098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip>
20114 23:00:43.867645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip
20116 23:00:43.868187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip>
20117 23:00:43.899459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip
20119 23:00:43.900036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip>
20120 23:00:43.930435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6368 RESULT=pass
20122 23:00:43.930982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6368 RESULT=pass>
20123 23:00:43.961998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip
20125 23:00:43.962442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip>
20126 23:00:43.994071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip
20128 23:00:43.994512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip>
20129 23:00:44.025593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip>
20130 23:00:44.026077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip
20132 23:00:44.057916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6384 RESULT=pass
20134 23:00:44.058503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6384 RESULT=pass>
20135 23:00:44.089314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip
20137 23:00:44.089883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip>
20138 23:00:44.120395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip
20140 23:00:44.121018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip>
20141 23:00:44.151665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip>
20142 23:00:44.152110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip
20144 23:00:44.182469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6400 RESULT=pass
20146 23:00:44.183041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6400 RESULT=pass>
20147 23:00:44.213802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip>
20148 23:00:44.214205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip
20150 23:00:44.246012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip>
20151 23:00:44.246415 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip
20153 23:00:44.278013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip
20155 23:00:44.278453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip>
20156 23:00:44.310275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6416 RESULT=pass
20158 23:00:44.310708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6416 RESULT=pass>
20159 23:00:44.342274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip
20161 23:00:44.342852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip>
20162 23:00:44.374095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip>
20163 23:00:44.374540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip
20165 23:00:44.406939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip>
20166 23:00:44.407409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip
20168 23:00:44.438481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6432 RESULT=pass
20170 23:00:44.438937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6432 RESULT=pass>
20171 23:00:44.470049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip>
20172 23:00:44.470502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip
20174 23:00:44.502427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip>
20175 23:00:44.502888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip
20177 23:00:44.534337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip>
20178 23:00:44.534783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip
20180 23:00:44.565501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6448 RESULT=pass>
20181 23:00:44.565954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6448 RESULT=pass
20183 23:00:44.597041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip>
20184 23:00:44.597450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip
20186 23:00:44.631324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip>
20187 23:00:44.631803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip
20189 23:00:44.663288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip>
20190 23:00:44.663752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip
20192 23:00:44.694791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6464 RESULT=pass
20194 23:00:44.695336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6464 RESULT=pass>
20195 23:00:44.725913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip
20197 23:00:44.726484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip>
20198 23:00:44.757312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip
20200 23:00:44.757899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip>
20201 23:00:44.788782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip
20203 23:00:44.789321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip>
20204 23:00:44.823609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6480 RESULT=pass>
20205 23:00:44.824132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6480 RESULT=pass
20207 23:00:44.856380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip>
20208 23:00:44.856840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip
20210 23:00:44.887641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip>
20211 23:00:44.888096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip
20213 23:00:44.921191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip>
20214 23:00:44.921651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip
20216 23:00:44.952734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6496 RESULT=pass
20218 23:00:44.953273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6496 RESULT=pass>
20219 23:00:44.984345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip
20221 23:00:44.984797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip>
20222 23:00:45.016389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip
20224 23:00:45.016977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip>
20225 23:00:45.047751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip>
20226 23:00:45.048187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip
20228 23:00:45.081720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6512 RESULT=pass>
20229 23:00:45.082084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6512 RESULT=pass
20231 23:00:45.113014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip
20233 23:00:45.113567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip>
20234 23:00:45.143966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip
20236 23:00:45.144513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip>
20237 23:00:45.175292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip>
20238 23:00:45.175726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip
20240 23:00:45.207705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6528 RESULT=pass
20242 23:00:45.208276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6528 RESULT=pass>
20243 23:00:45.240131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip
20245 23:00:45.240674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip>
20246 23:00:45.274887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip>
20247 23:00:45.275435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip
20249 23:00:45.308187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip
20251 23:00:45.308960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip>
20252 23:00:45.343227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6544 RESULT=pass
20254 23:00:45.343701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6544 RESULT=pass>
20255 23:00:45.377984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip
20257 23:00:45.378443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip>
20258 23:00:45.413029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip
20260 23:00:45.413583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip>
20261 23:00:45.445468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip>
20262 23:00:45.445939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip
20264 23:00:45.476752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6560 RESULT=pass>
20265 23:00:45.477202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6560 RESULT=pass
20267 23:00:45.507598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip>
20268 23:00:45.508061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip
20270 23:00:45.539469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip>
20271 23:00:45.539929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip
20273 23:00:45.571616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip
20275 23:00:45.572174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip>
20276 23:00:45.603252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6576 RESULT=pass>
20277 23:00:45.603693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6576 RESULT=pass
20279 23:00:45.634707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip
20281 23:00:45.635256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip>
20282 23:00:45.666238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip>
20283 23:00:45.666643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip
20285 23:00:45.697538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip>
20286 23:00:45.697948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip
20288 23:00:45.728610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6592 RESULT=pass
20290 23:00:45.729043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6592 RESULT=pass>
20291 23:00:45.759793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip
20293 23:00:45.760381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip>
20294 23:00:45.791129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip>
20295 23:00:45.791594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip
20297 23:00:45.822613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip>
20298 23:00:45.823064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip
20300 23:00:45.855396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6608 RESULT=pass>
20301 23:00:45.855825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6608 RESULT=pass
20303 23:00:45.886036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip
20305 23:00:45.886504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip>
20306 23:00:45.917200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip
20308 23:00:45.917756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip>
20309 23:00:45.949147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip
20311 23:00:45.949721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip>
20312 23:00:45.980239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6624 RESULT=pass>
20313 23:00:45.980720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6624 RESULT=pass
20315 23:00:46.011706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip
20317 23:00:46.012161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip>
20318 23:00:46.043087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip>
20319 23:00:46.043530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip
20321 23:00:46.074146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip
20323 23:00:46.074695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip>
20324 23:00:46.105448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6640 RESULT=pass>
20325 23:00:46.105901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6640 RESULT=pass
20327 23:00:46.136530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip>
20328 23:00:46.136928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip
20330 23:00:46.168003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip
20332 23:00:46.168443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip>
20333 23:00:46.199939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip
20335 23:00:46.200507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip>
20336 23:00:46.232411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6656 RESULT=pass
20338 23:00:46.232935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6656 RESULT=pass>
20339 23:00:46.264356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip>
20340 23:00:46.264798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip
20342 23:00:46.297136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip
20344 23:00:46.297695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip>
20345 23:00:46.328991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip>
20346 23:00:46.329439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip
20348 23:00:46.361638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6672 RESULT=pass>
20349 23:00:46.362066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6672 RESULT=pass
20351 23:00:46.399249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip>
20352 23:00:46.399691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip
20354 23:00:46.433713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip
20356 23:00:46.434161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip>
20357 23:00:46.468836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip
20359 23:00:46.469430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip>
20360 23:00:46.500866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6688 RESULT=pass>
20361 23:00:46.501252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6688 RESULT=pass
20363 23:00:46.532405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip>
20364 23:00:46.532860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip
20366 23:00:46.563479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip>
20367 23:00:46.563942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip
20369 23:00:46.595081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip>
20370 23:00:46.595541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip
20372 23:00:46.626589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6704 RESULT=pass>
20373 23:00:46.627056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6704 RESULT=pass
20375 23:00:46.658631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip>
20376 23:00:46.659026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip
20378 23:00:46.690220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip>
20379 23:00:46.690616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip
20381 23:00:46.723646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip>
20382 23:00:46.724109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip
20384 23:00:46.754499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6720 RESULT=pass>
20385 23:00:46.754901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6720 RESULT=pass
20387 23:00:46.786031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip>
20388 23:00:46.786490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip
20390 23:00:46.817425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip
20392 23:00:46.817971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip>
20393 23:00:46.851560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip
20395 23:00:46.852021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip>
20396 23:00:46.885080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6736 RESULT=pass
20398 23:00:46.885640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6736 RESULT=pass>
20399 23:00:46.916916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip
20401 23:00:46.917349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip>
20402 23:00:46.949078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip
20404 23:00:46.949625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip>
20405 23:00:46.980749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip
20407 23:00:46.981299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip>
20408 23:00:47.012423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6752 RESULT=pass>
20409 23:00:47.012874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6752 RESULT=pass
20411 23:00:47.043349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip>
20412 23:00:47.043804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip
20414 23:00:47.075282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip
20416 23:00:47.075814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip>
20417 23:00:47.114642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip
20419 23:00:47.115088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip>
20420 23:00:47.147447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6768 RESULT=pass>
20421 23:00:47.147888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6768 RESULT=pass
20423 23:00:47.180860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip>
20424 23:00:47.181289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip
20426 23:00:47.213190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip
20428 23:00:47.213636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip>
20429 23:00:47.244517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip>
20430 23:00:47.244938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip
20432 23:00:47.275414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6784 RESULT=pass>
20433 23:00:47.275880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6784 RESULT=pass
20435 23:00:47.307159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip
20437 23:00:47.307717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip>
20438 23:00:47.339036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip
20440 23:00:47.339694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip>
20441 23:00:47.370382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip>
20442 23:00:47.370918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip
20444 23:00:47.401760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6800 RESULT=pass>
20445 23:00:47.402295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6800 RESULT=pass
20447 23:00:47.433938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip>
20448 23:00:47.434418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip
20450 23:00:47.465725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip>
20451 23:00:47.466184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip
20453 23:00:47.498043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip>
20454 23:00:47.498517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip
20456 23:00:47.530220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6816 RESULT=pass>
20457 23:00:47.530686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6816 RESULT=pass
20459 23:00:47.562369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip
20461 23:00:47.562953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip>
20462 23:00:47.594257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip>
20463 23:00:47.594704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip
20465 23:00:47.626463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip>
20466 23:00:47.626925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip
20468 23:00:47.658098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6832 RESULT=pass
20470 23:00:47.658634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6832 RESULT=pass>
20471 23:00:47.690062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip>
20472 23:00:47.690500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip
20474 23:00:47.722093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip>
20475 23:00:47.722536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip
20477 23:00:47.754149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip>
20478 23:00:47.754551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip
20480 23:00:47.785888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6848 RESULT=pass
20482 23:00:47.786428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6848 RESULT=pass>
20483 23:00:47.817360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip>
20484 23:00:47.817769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip
20486 23:00:47.849135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip>
20487 23:00:47.849528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip
20489 23:00:47.880605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip>
20490 23:00:47.881020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip
20492 23:00:47.912805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6864 RESULT=pass>
20493 23:00:47.913204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6864 RESULT=pass
20495 23:00:47.944884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip>
20496 23:00:47.945272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip
20498 23:00:47.976762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip>
20499 23:00:47.977146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip
20501 23:00:48.008308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip>
20502 23:00:48.008697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip
20504 23:00:48.039955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6880 RESULT=pass
20506 23:00:48.040388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6880 RESULT=pass>
20507 23:00:48.072125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip
20509 23:00:48.072653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip>
20510 23:00:48.104278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip>
20511 23:00:48.104706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip
20513 23:00:48.136294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip>
20514 23:00:48.136743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip
20516 23:00:48.168903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6896 RESULT=pass
20518 23:00:48.169505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6896 RESULT=pass>
20519 23:00:48.200678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip>
20520 23:00:48.201122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip
20522 23:00:48.233973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip
20524 23:00:48.234438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip>
20525 23:00:48.266481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip>
20526 23:00:48.266874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip
20528 23:00:48.298035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6912 RESULT=pass
20530 23:00:48.298473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6912 RESULT=pass>
20531 23:00:48.329718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip>
20532 23:00:48.330149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip
20534 23:00:48.362499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip
20536 23:00:48.363027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip>
20537 23:00:48.394777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip>
20538 23:00:48.395227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip
20540 23:00:48.426123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6928 RESULT=pass>
20541 23:00:48.426524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6928 RESULT=pass
20543 23:00:48.457967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip>
20544 23:00:48.458370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip
20546 23:00:48.489286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip>
20547 23:00:48.489700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip
20549 23:00:48.521657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip>
20550 23:00:48.522114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip
20552 23:00:48.553563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6944 RESULT=pass>
20553 23:00:48.554035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6944 RESULT=pass
20555 23:00:48.586493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip>
20556 23:00:48.587054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip
20558 23:00:48.618500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip>
20559 23:00:48.618903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip
20561 23:00:48.649774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip
20563 23:00:48.650317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip>
20564 23:00:48.681216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6960 RESULT=pass
20566 23:00:48.681751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6960 RESULT=pass>
20567 23:00:48.712911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip>
20568 23:00:48.713361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip
20570 23:00:48.744413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip
20572 23:00:48.744854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip>
20573 23:00:48.776005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip
20575 23:00:48.776446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip>
20576 23:00:48.810357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6976 RESULT=pass>
20577 23:00:48.810771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6976 RESULT=pass
20579 23:00:48.841621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip
20581 23:00:48.842073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip>
20582 23:00:48.873068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip
20584 23:00:48.873499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip>
20585 23:00:48.905066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip
20587 23:00:48.905519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip>
20588 23:00:48.937509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6992 RESULT=pass
20590 23:00:48.937944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_6992 RESULT=pass>
20591 23:00:48.969096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip
20593 23:00:48.969656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip>
20594 23:00:49.001017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip>
20595 23:00:49.001453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip
20597 23:00:49.032756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip>
20598 23:00:49.033214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip
20600 23:00:49.064120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7008 RESULT=pass
20602 23:00:49.064656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7008 RESULT=pass>
20603 23:00:49.096383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip>
20604 23:00:49.096850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip
20606 23:00:49.128512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip
20608 23:00:49.129057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip>
20609 23:00:49.160169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip
20611 23:00:49.160721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip>
20612 23:00:49.194001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7024 RESULT=pass
20614 23:00:49.194398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7024 RESULT=pass>
20615 23:00:49.225798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip>
20616 23:00:49.226247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip
20618 23:00:49.257330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip>
20619 23:00:49.257731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip
20621 23:00:49.289258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip
20623 23:00:49.289722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip>
20624 23:00:49.319546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7040 RESULT=pass>
20625 23:00:49.319970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7040 RESULT=pass
20627 23:00:49.350535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip
20629 23:00:49.351156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip>
20630 23:00:49.381786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip>
20631 23:00:49.382242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip
20633 23:00:49.412834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip>
20634 23:00:49.413300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip
20636 23:00:49.443644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7056 RESULT=pass
20638 23:00:49.444175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7056 RESULT=pass>
20639 23:00:49.474896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip>
20640 23:00:49.475352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip
20642 23:00:49.506805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip>
20643 23:00:49.507266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip
20645 23:00:49.538504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip>
20646 23:00:49.538956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip
20648 23:00:49.569944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7072 RESULT=pass
20650 23:00:49.570544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7072 RESULT=pass>
20651 23:00:49.601925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip>
20652 23:00:49.602325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip
20654 23:00:49.634286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip>
20655 23:00:49.634769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip
20657 23:00:49.666591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip
20659 23:00:49.667132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip>
20660 23:00:49.697463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7088 RESULT=pass>
20661 23:00:49.697915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7088 RESULT=pass
20663 23:00:49.728749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip>
20664 23:00:49.729199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip
20666 23:00:49.759294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip>
20667 23:00:49.759732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip
20669 23:00:49.789758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip
20671 23:00:49.790310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip>
20672 23:00:49.820964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7104 RESULT=pass
20674 23:00:49.821499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7104 RESULT=pass>
20675 23:00:49.851525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip>
20676 23:00:49.851987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip
20678 23:00:49.882502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip>
20679 23:00:49.882966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip
20681 23:00:49.914117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip>
20682 23:00:49.914544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip
20684 23:00:49.945763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7120 RESULT=pass>
20685 23:00:49.946148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7120 RESULT=pass
20687 23:00:49.977002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip
20689 23:00:49.977427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip>
20690 23:00:50.008186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip
20692 23:00:50.008803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip>
20693 23:00:50.042393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip>
20694 23:00:50.042862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip
20696 23:00:50.073124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7136 RESULT=pass>
20697 23:00:50.073609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7136 RESULT=pass
20699 23:00:50.104368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip
20701 23:00:50.104931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip>
20702 23:00:50.137243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip
20704 23:00:50.137834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip>
20705 23:00:50.168521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip
20707 23:00:50.169140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip>
20708 23:00:50.199939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7152 RESULT=pass
20710 23:00:50.200518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7152 RESULT=pass>
20711 23:00:50.231924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip
20713 23:00:50.232586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip>
20714 23:00:50.265241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip>
20715 23:00:50.265805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip
20717 23:00:50.300811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip>
20718 23:00:50.301272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip
20720 23:00:50.338393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7168 RESULT=pass>
20721 23:00:50.338846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7168 RESULT=pass
20723 23:00:50.375253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip>
20724 23:00:50.375723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip
20726 23:00:50.430568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip>
20727 23:00:50.430982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip
20729 23:00:50.479498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip>
20730 23:00:50.479886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip
20732 23:00:50.514399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7184 RESULT=pass
20734 23:00:50.514849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7184 RESULT=pass>
20735 23:00:50.546564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip>
20736 23:00:50.546992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip
20738 23:00:50.577383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip>
20739 23:00:50.577772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip
20741 23:00:50.609740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip>
20742 23:00:50.610208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip
20744 23:00:50.641072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7200 RESULT=pass
20746 23:00:50.641520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7200 RESULT=pass>
20747 23:00:50.671923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip
20749 23:00:50.672359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip>
20750 23:00:50.703343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip>
20751 23:00:50.703823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip
20753 23:00:50.734451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip>
20754 23:00:50.734923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip
20756 23:00:50.765282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7216 RESULT=pass>
20757 23:00:50.765775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7216 RESULT=pass
20759 23:00:50.796977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip>
20760 23:00:50.797453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip
20762 23:00:50.828643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip
20764 23:00:50.829249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip>
20765 23:00:50.860594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip>
20766 23:00:50.861035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip
20768 23:00:50.891505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7232 RESULT=pass
20770 23:00:50.891965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7232 RESULT=pass>
20771 23:00:50.922471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip
20773 23:00:50.923154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip>
20774 23:00:50.953373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip>
20775 23:00:50.953857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip
20777 23:00:50.984120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip
20779 23:00:50.984684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip>
20780 23:00:51.015917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7248 RESULT=pass>
20781 23:00:51.016363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7248 RESULT=pass
20783 23:00:51.047371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip>
20784 23:00:51.047825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip
20786 23:00:51.079869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip
20788 23:00:51.080435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip>
20789 23:00:51.120536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip>
20790 23:00:51.120946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip
20792 23:00:51.152212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7264 RESULT=pass>
20793 23:00:51.152636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7264 RESULT=pass
20795 23:00:51.183676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip
20797 23:00:51.184108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip>
20798 23:00:51.215620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip>
20799 23:00:51.216015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip
20801 23:00:51.248624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip>
20802 23:00:51.249016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip
20804 23:00:51.281361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7280 RESULT=pass
20806 23:00:51.281817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7280 RESULT=pass>
20807 23:00:51.316935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip>
20808 23:00:51.317374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip
20810 23:00:51.351938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip
20812 23:00:51.352519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip>
20813 23:00:51.399522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip>
20814 23:00:51.399906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip
20816 23:00:51.441924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7296 RESULT=pass
20818 23:00:51.442342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7296 RESULT=pass>
20819 23:00:51.478650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip>
20820 23:00:51.478989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip
20822 23:00:51.515368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip
20824 23:00:51.515787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip>
20825 23:00:51.550708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip>
20826 23:00:51.551078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip
20828 23:00:51.585801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7312 RESULT=pass>
20829 23:00:51.586152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7312 RESULT=pass
20831 23:00:51.619703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip>
20832 23:00:51.620181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip
20834 23:00:51.651624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip
20836 23:00:51.652228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip>
20837 23:00:51.684694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip
20839 23:00:51.685249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip>
20840 23:00:51.716179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7328 RESULT=pass>
20841 23:00:51.716606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7328 RESULT=pass
20843 23:00:51.748102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip
20845 23:00:51.748545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip>
20846 23:00:51.780133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip
20848 23:00:51.780703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip>
20849 23:00:51.811597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip>
20850 23:00:51.812125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip
20852 23:00:51.842145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7344 RESULT=pass
20854 23:00:51.842592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7344 RESULT=pass>
20855 23:00:51.872878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip
20857 23:00:51.873319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip>
20858 23:00:51.904087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip
20860 23:00:51.904529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip>
20861 23:00:51.934880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip>
20862 23:00:51.935289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip
20864 23:00:51.965589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7360 RESULT=pass>
20865 23:00:51.966009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7360 RESULT=pass
20867 23:00:51.997099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip
20869 23:00:51.997715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip>
20870 23:00:52.028552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip
20872 23:00:52.029135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip>
20873 23:00:52.059192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip>
20874 23:00:52.059669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip
20876 23:00:52.091548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7376 RESULT=pass
20878 23:00:52.092191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7376 RESULT=pass>
20879 23:00:52.123352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip
20881 23:00:52.123906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip>
20882 23:00:52.155038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip>
20883 23:00:52.155503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip
20885 23:00:52.186353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip>
20886 23:00:52.186810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip
20888 23:00:52.217852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7392 RESULT=pass
20890 23:00:52.218410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7392 RESULT=pass>
20891 23:00:52.275909 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip
20893 23:00:52.276550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip>
20894 23:00:52.308891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip>
20895 23:00:52.309361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip
20897 23:00:52.342811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip>
20898 23:00:52.343227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip
20900 23:00:52.375346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7408 RESULT=pass
20902 23:00:52.375800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7408 RESULT=pass>
20903 23:00:52.407663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip>
20904 23:00:52.408115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip
20906 23:00:52.439301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip
20908 23:00:52.439854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip>
20909 23:00:52.470536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip>
20910 23:00:52.471001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip
20912 23:00:52.501973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7424 RESULT=pass>
20913 23:00:52.502445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7424 RESULT=pass
20915 23:00:52.533390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip>
20916 23:00:52.533845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip
20918 23:00:52.565545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip>
20919 23:00:52.566005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip
20921 23:00:52.597511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip
20923 23:00:52.598064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip>
20924 23:00:52.629581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7440 RESULT=pass>
20925 23:00:52.630026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7440 RESULT=pass
20927 23:00:52.661688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip>
20928 23:00:52.662088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip
20930 23:00:52.694163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip>
20931 23:00:52.694619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip
20933 23:00:52.726710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip>
20934 23:00:52.727161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip
20936 23:00:52.758444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7456 RESULT=pass
20938 23:00:52.758908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7456 RESULT=pass>
20939 23:00:52.790394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip>
20940 23:00:52.790830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip
20942 23:00:52.821929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip
20944 23:00:52.822491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip>
20945 23:00:52.853155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip
20947 23:00:52.853693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip>
20948 23:00:52.883940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7472 RESULT=pass
20950 23:00:52.884533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7472 RESULT=pass>
20951 23:00:52.914574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip
20953 23:00:52.914996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip>
20954 23:00:52.945267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip
20956 23:00:52.945721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip>
20957 23:00:52.976154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip>
20958 23:00:52.976574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip
20960 23:00:53.006899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7488 RESULT=pass>
20961 23:00:53.007306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7488 RESULT=pass
20963 23:00:53.038109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip>
20964 23:00:53.038511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip
20966 23:00:53.070224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip>
20967 23:00:53.070664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip
20969 23:00:53.101917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip>
20970 23:00:53.102361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip
20972 23:00:53.135869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7504 RESULT=pass
20974 23:00:53.136500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7504 RESULT=pass>
20975 23:00:53.167707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip>
20976 23:00:53.168166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip
20978 23:00:53.200055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip
20980 23:00:53.200596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip>
20981 23:00:53.232299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip>
20982 23:00:53.232765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip
20984 23:00:53.263513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7520 RESULT=pass>
20985 23:00:53.263985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7520 RESULT=pass
20987 23:00:53.294975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip>
20988 23:00:53.295437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip
20990 23:00:53.326479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip>
20991 23:00:53.326943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip
20993 23:00:53.358364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip>
20994 23:00:53.358823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip
20996 23:00:53.391101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7536 RESULT=pass>
20997 23:00:53.391555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7536 RESULT=pass
20999 23:00:53.423031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip>
21000 23:00:53.423412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip
21002 23:00:53.454980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip
21004 23:00:53.455423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip>
21005 23:00:53.486632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip>
21006 23:00:53.487113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip
21008 23:00:53.517604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7552 RESULT=pass
21010 23:00:53.518205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7552 RESULT=pass>
21011 23:00:53.548556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip>
21012 23:00:53.549015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip
21014 23:00:53.580913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip>
21015 23:00:53.581377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip
21017 23:00:53.612502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip>
21018 23:00:53.612955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip
21020 23:00:53.643152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7568 RESULT=pass>
21021 23:00:53.643616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7568 RESULT=pass
21023 23:00:53.674276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip>
21024 23:00:53.674695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip
21026 23:00:53.705785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip>
21027 23:00:53.706170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip
21029 23:00:53.738152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip>
21030 23:00:53.738537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip
21032 23:00:53.773886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7584 RESULT=pass
21034 23:00:53.774305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7584 RESULT=pass>
21035 23:00:53.807065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip>
21036 23:00:53.807452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip
21038 23:00:53.838636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip
21040 23:00:53.839055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip>
21041 23:00:53.870704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip>
21042 23:00:53.871140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip
21044 23:00:53.902238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7600 RESULT=pass>
21045 23:00:53.902724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7600 RESULT=pass
21047 23:00:53.933720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip>
21048 23:00:53.934176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip
21050 23:00:53.965408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip>
21051 23:00:53.965868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip
21053 23:00:53.996972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip>
21054 23:00:53.997353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip
21056 23:00:54.028535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7616 RESULT=pass
21058 23:00:54.028954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7616 RESULT=pass>
21059 23:00:54.063413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip>
21060 23:00:54.063828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip
21062 23:00:54.095654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip>
21063 23:00:54.096059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip
21065 23:00:54.127405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip
21067 23:00:54.127939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip>
21068 23:00:54.159019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7632 RESULT=pass
21070 23:00:54.159550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7632 RESULT=pass>
21071 23:00:54.190289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip>
21072 23:00:54.190824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip
21074 23:00:54.222911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip
21076 23:00:54.223531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip>
21077 23:00:54.254419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip>
21078 23:00:54.254872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip
21080 23:00:54.287344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7648 RESULT=pass
21082 23:00:54.287963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7648 RESULT=pass>
21083 23:00:54.319246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip
21085 23:00:54.319847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip>
21086 23:00:54.350973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip>
21087 23:00:54.351409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip
21089 23:00:54.382624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip>
21090 23:00:54.383084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip
21092 23:00:54.414657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7664 RESULT=pass>
21093 23:00:54.415116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7664 RESULT=pass
21095 23:00:54.446225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip
21097 23:00:54.446807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip>
21098 23:00:54.477696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip
21100 23:00:54.478268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip>
21101 23:00:54.509144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip>
21102 23:00:54.509585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip
21104 23:00:54.540299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7680 RESULT=pass>
21105 23:00:54.540740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7680 RESULT=pass
21107 23:00:54.571542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip>
21108 23:00:54.572004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip
21110 23:00:54.604741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip
21112 23:00:54.605288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip>
21113 23:00:54.636301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip>
21114 23:00:54.636762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip
21116 23:00:54.667138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7696 RESULT=pass>
21117 23:00:54.667597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7696 RESULT=pass
21119 23:00:54.698883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip
21121 23:00:54.699452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip>
21122 23:00:54.730387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip>
21123 23:00:54.730859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip
21125 23:00:54.761970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip>
21126 23:00:54.762416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip
21128 23:00:54.792758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7712 RESULT=pass>
21129 23:00:54.793177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7712 RESULT=pass
21131 23:00:54.824633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip
21133 23:00:54.825078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip>
21134 23:00:54.855649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip>
21135 23:00:54.856082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip
21137 23:00:54.886005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip>
21138 23:00:54.886424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip
21140 23:00:54.917024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7728 RESULT=pass
21142 23:00:54.917550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7728 RESULT=pass>
21143 23:00:54.947455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip>
21144 23:00:54.947941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip
21146 23:00:54.978806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip
21148 23:00:54.979350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip>
21149 23:00:55.010041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip
21151 23:00:55.010573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip>
21152 23:00:55.040728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7744 RESULT=pass
21154 23:00:55.041319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7744 RESULT=pass>
21155 23:00:55.073659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip>
21156 23:00:55.074127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip
21158 23:00:55.106725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip>
21159 23:00:55.107181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip
21161 23:00:55.138525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip>
21162 23:00:55.138990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip
21164 23:00:55.169484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7760 RESULT=pass>
21165 23:00:55.170005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7760 RESULT=pass
21167 23:00:55.200705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip>
21168 23:00:55.201191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip
21170 23:00:55.233738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip
21172 23:00:55.234469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip>
21173 23:00:55.267711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip>
21174 23:00:55.268251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip
21176 23:00:55.300514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7776 RESULT=pass>
21177 23:00:55.300992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7776 RESULT=pass
21179 23:00:55.333493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip>
21180 23:00:55.333993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip
21182 23:00:55.378203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip
21184 23:00:55.378681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip>
21185 23:00:55.413073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip>
21186 23:00:55.413482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip
21188 23:00:55.446783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7792 RESULT=pass>
21189 23:00:55.447156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7792 RESULT=pass
21191 23:00:55.478621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip>
21192 23:00:55.478993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip
21194 23:00:55.510822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip>
21195 23:00:55.511237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip
21197 23:00:55.543051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip
21199 23:00:55.543699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip>
21200 23:00:55.576401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7808 RESULT=pass>
21201 23:00:55.576869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7808 RESULT=pass
21203 23:00:55.609395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip
21205 23:00:55.610019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip>
21206 23:00:55.646631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip>
21207 23:00:55.647027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip
21209 23:00:55.684780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip>
21210 23:00:55.685274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip
21212 23:00:55.716557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7824 RESULT=pass>
21213 23:00:55.716967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7824 RESULT=pass
21215 23:00:55.749116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip>
21216 23:00:55.749623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip
21218 23:00:55.781274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip
21220 23:00:55.781858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip>
21221 23:00:55.813724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip>
21222 23:00:55.814198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip
21224 23:00:55.845923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7840 RESULT=pass>
21225 23:00:55.846411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7840 RESULT=pass
21227 23:00:55.879287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip>
21228 23:00:55.879727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip
21230 23:00:55.913102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip>
21231 23:00:55.913519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip
21233 23:00:55.946215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip
21235 23:00:55.946954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip>
21236 23:00:55.978688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7856 RESULT=pass>
21237 23:00:55.979155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7856 RESULT=pass
21239 23:00:56.011424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip>
21240 23:00:56.011882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip
21242 23:00:56.044971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip>
21243 23:00:56.045515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip
21245 23:00:56.079171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip>
21246 23:00:56.079718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip
21248 23:00:56.113822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7872 RESULT=pass>
21249 23:00:56.114272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7872 RESULT=pass
21251 23:00:56.146549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip
21253 23:00:56.147121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip>
21254 23:00:56.179418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip>
21255 23:00:56.179898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip
21257 23:00:56.213054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip>
21258 23:00:56.213477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip
21260 23:00:56.247568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7888 RESULT=pass>
21261 23:00:56.248113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7888 RESULT=pass
21263 23:00:56.282475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip
21265 23:00:56.282951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip>
21266 23:00:56.316767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip
21268 23:00:56.317356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip>
21269 23:00:56.350750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip
21271 23:00:56.351501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip>
21272 23:00:56.384655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7904 RESULT=pass>
21273 23:00:56.385215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7904 RESULT=pass
21275 23:00:56.419300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip>
21276 23:00:56.419801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip
21278 23:00:56.453570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip
21280 23:00:56.454033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip>
21281 23:00:56.487836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip
21283 23:00:56.488464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip>
21284 23:00:56.522053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7920 RESULT=pass>
21285 23:00:56.522535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7920 RESULT=pass
21287 23:00:56.556278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip>
21288 23:00:56.556668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip
21290 23:00:56.590479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip
21292 23:00:56.590936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip>
21293 23:00:56.625014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip>
21294 23:00:56.625515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip
21296 23:00:56.658308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7936 RESULT=pass>
21297 23:00:56.658782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7936 RESULT=pass
21299 23:00:56.691727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip
21301 23:00:56.692293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip>
21302 23:00:56.725798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip>
21303 23:00:56.726216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip
21305 23:00:56.758955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip
21307 23:00:56.759430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip>
21308 23:00:56.791112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7952 RESULT=pass>
21309 23:00:56.791547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7952 RESULT=pass
21311 23:00:56.823663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip
21313 23:00:56.824134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip>
21314 23:00:56.856738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip>
21315 23:00:56.857256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip
21317 23:00:56.891301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip>
21318 23:00:56.891772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip
21320 23:00:56.927148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7968 RESULT=pass>
21321 23:00:56.927713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7968 RESULT=pass
21323 23:00:56.961733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip>
21324 23:00:56.962242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip
21326 23:00:56.996225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip>
21327 23:00:56.996787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip
21329 23:00:57.030338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip
21331 23:00:57.030901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip>
21332 23:00:57.063244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7984 RESULT=pass
21334 23:00:57.063818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_7984 RESULT=pass>
21335 23:00:57.096494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip>
21336 23:00:57.096902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip
21338 23:00:57.130405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip>
21339 23:00:57.130837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip
21341 23:00:57.164994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip>
21342 23:00:57.165481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip
21344 23:00:57.198520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8000 RESULT=pass>
21345 23:00:57.198995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8000 RESULT=pass
21347 23:00:57.230889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip>
21348 23:00:57.231329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip
21350 23:00:57.263156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip>
21351 23:00:57.263589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip
21353 23:00:57.295299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip>
21354 23:00:57.295754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip
21356 23:00:57.328561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8016 RESULT=pass
21358 23:00:57.329093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8016 RESULT=pass>
21359 23:00:57.381602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip
21361 23:00:57.382175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip>
21362 23:00:57.413657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip>
21363 23:00:57.414069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip
21365 23:00:57.446121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip>
21366 23:00:57.446532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip
21368 23:00:57.477952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8032 RESULT=pass>
21369 23:00:57.478380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8032 RESULT=pass
21371 23:00:57.510391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip
21373 23:00:57.510844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip>
21374 23:00:57.542539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip
21376 23:00:57.543095 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip>
21377 23:00:57.574148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip>
21378 23:00:57.574663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip
21380 23:00:57.606223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8048 RESULT=pass
21382 23:00:57.606973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8048 RESULT=pass>
21383 23:00:57.638274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip>
21384 23:00:57.638731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip
21386 23:00:57.670033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip
21388 23:00:57.670566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip>
21389 23:00:57.701570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip>
21390 23:00:57.702013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip
21392 23:00:57.732992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8064 RESULT=pass>
21393 23:00:57.733465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8064 RESULT=pass
21395 23:00:57.764488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip>
21396 23:00:57.764917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip
21398 23:00:57.797460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip>
21399 23:00:57.797927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip
21401 23:00:57.831032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip>
21402 23:00:57.831471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip
21404 23:00:57.861978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8080 RESULT=pass>
21405 23:00:57.862428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8080 RESULT=pass
21407 23:00:57.894683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip>
21408 23:00:57.895126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip
21410 23:00:57.927536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip>
21411 23:00:57.927958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip
21413 23:00:57.960775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip
21415 23:00:57.961325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip>
21416 23:00:57.992674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8096 RESULT=pass>
21417 23:00:57.993099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8096 RESULT=pass
21419 23:00:58.025171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip
21421 23:00:58.025693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip>
21422 23:00:58.056933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip
21424 23:00:58.057482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip>
21425 23:00:58.088266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip>
21426 23:00:58.088709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip
21428 23:00:58.119635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8112 RESULT=pass>
21429 23:00:58.120097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8112 RESULT=pass
21431 23:00:58.153730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip>
21432 23:00:58.154194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip
21434 23:00:58.185435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip>
21435 23:00:58.185855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip
21437 23:00:58.217731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip>
21438 23:00:58.218175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip
21440 23:00:58.249243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8128 RESULT=pass>
21441 23:00:58.249697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8128 RESULT=pass
21443 23:00:58.282831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip
21445 23:00:58.283384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip>
21446 23:00:58.314486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip
21448 23:00:58.315037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip>
21449 23:00:58.346364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip
21451 23:00:58.346920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip>
21452 23:00:58.378211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8144 RESULT=pass
21454 23:00:58.378748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8144 RESULT=pass>
21455 23:00:58.410001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip
21457 23:00:58.410538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip>
21458 23:00:58.441215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip
21460 23:00:58.441768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip>
21461 23:00:58.472687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip
21463 23:00:58.473214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip>
21464 23:00:58.503772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8160 RESULT=pass
21466 23:00:58.504393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8160 RESULT=pass>
21467 23:00:58.534578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip>
21468 23:00:58.535037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip
21470 23:00:58.566150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip
21472 23:00:58.566701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip>
21473 23:00:58.597482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip>
21474 23:00:58.597936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip
21476 23:00:58.629927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8176 RESULT=pass
21478 23:00:58.630490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8176 RESULT=pass>
21479 23:00:58.661220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip>
21480 23:00:58.661668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip
21482 23:00:58.692317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip
21484 23:00:58.692880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip>
21485 23:00:58.723451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip>
21486 23:00:58.723886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip
21488 23:00:58.755301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8192 RESULT=pass>
21489 23:00:58.755783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_8192 RESULT=pass
21491 23:00:58.787598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip>
21492 23:00:58.788027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip
21494 23:00:58.819212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip>
21495 23:00:58.819648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip
21497 23:00:58.850431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip>
21498 23:00:58.850859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip
21500 23:00:58.881371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 RESULT=pass>
21501 23:00:58.881897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 RESULT=pass
21503 23:00:58.912468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state RESULT=pass>
21504 23:00:58.912948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state RESULT=pass
21506 23:00:58.946503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set RESULT=pass>
21507 23:00:58.946972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set RESULT=pass
21509 23:00:58.978536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass>
21510 23:00:58.978923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass
21512 23:00:59.009577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_16 RESULT=pass>
21513 23:00:59.009968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_16 RESULT=pass
21515 23:00:59.041151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 RESULT=pass>
21516 23:00:59.041608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 RESULT=pass
21518 23:00:59.073145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 RESULT=pass
21520 23:00:59.073759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 RESULT=pass>
21521 23:00:59.105748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 RESULT=pass>
21522 23:00:59.106248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 RESULT=pass
21524 23:00:59.137119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_32 RESULT=pass>
21525 23:00:59.137598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_32 RESULT=pass
21527 23:00:59.168716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 RESULT=pass>
21528 23:00:59.169205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 RESULT=pass
21530 23:00:59.205029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 RESULT=pass>
21531 23:00:59.205481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 RESULT=pass
21533 23:00:59.236023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 RESULT=pass
21535 23:00:59.236569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 RESULT=pass>
21536 23:00:59.268694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_48 RESULT=pass>
21537 23:00:59.269125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_48 RESULT=pass
21539 23:00:59.303170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip
21541 23:00:59.303814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip>
21542 23:00:59.337276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip>
21543 23:00:59.337838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip
21545 23:00:59.373023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip
21547 23:00:59.373506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip>
21548 23:00:59.409677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_64 RESULT=pass>
21549 23:00:59.410126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_64 RESULT=pass
21551 23:00:59.450902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 RESULT=pass
21553 23:00:59.451454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 RESULT=pass>
21554 23:00:59.484849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 RESULT=pass>
21555 23:00:59.485357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 RESULT=pass
21557 23:00:59.519723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 RESULT=pass
21559 23:00:59.520197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 RESULT=pass>
21560 23:00:59.553118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_80 RESULT=pass>
21561 23:00:59.553607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_80 RESULT=pass
21563 23:00:59.589008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip>
21564 23:00:59.589503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip
21566 23:00:59.622927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip
21568 23:00:59.623638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip>
21569 23:00:59.654798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip>
21570 23:00:59.655249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip
21572 23:00:59.685430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_96 RESULT=pass>
21573 23:00:59.685875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_96 RESULT=pass
21575 23:00:59.716263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip>
21576 23:00:59.716743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip
21578 23:00:59.746456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip
21580 23:00:59.746909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip>
21581 23:00:59.776570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip>
21582 23:00:59.776972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip
21584 23:00:59.807451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_112 RESULT=pass
21586 23:00:59.808002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_112 RESULT=pass>
21587 23:00:59.837927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip>
21588 23:00:59.838405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip
21590 23:00:59.869032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip>
21591 23:00:59.869485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip
21593 23:00:59.899289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip>
21594 23:00:59.899799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip
21596 23:00:59.929963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_128 RESULT=pass
21598 23:00:59.930551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_128 RESULT=pass>
21599 23:00:59.959946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 RESULT=pass
21601 23:00:59.960407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128 RESULT=pass>
21602 23:00:59.990908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 RESULT=pass>
21603 23:00:59.991315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128 RESULT=pass
21605 23:01:00.022450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 RESULT=pass
21607 23:01:00.023010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128 RESULT=pass>
21608 23:01:00.053060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_144 RESULT=pass
21610 23:01:00.053660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_144 RESULT=pass>
21611 23:01:00.085059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip
21613 23:01:00.085618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip>
21614 23:01:00.117333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip>
21615 23:01:00.117759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip
21617 23:01:00.148966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip>
21618 23:01:00.149382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip
21620 23:01:00.180895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_160 RESULT=pass>
21621 23:01:00.181317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_160 RESULT=pass
21623 23:01:00.212422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip
21625 23:01:00.212879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip>
21626 23:01:00.243380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip>
21627 23:01:00.243799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip
21629 23:01:00.274776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip
21631 23:01:00.275234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip>
21632 23:01:00.309233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_176 RESULT=pass>
21633 23:01:00.309637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_176 RESULT=pass
21635 23:01:00.343446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip
21637 23:01:00.343912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip>
21638 23:01:00.378644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip>
21639 23:01:00.379054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip
21641 23:01:00.413552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip
21643 23:01:00.414034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip>
21644 23:01:00.451444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_192 RESULT=pass>
21645 23:01:00.452004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_192 RESULT=pass
21647 23:01:00.484535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip>
21648 23:01:00.484944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip
21650 23:01:00.516605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip>
21651 23:01:00.517070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip
21653 23:01:00.548922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip>
21654 23:01:00.549310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip
21656 23:01:00.580961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_208 RESULT=pass
21658 23:01:00.581605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_208 RESULT=pass>
21659 23:01:00.612866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip
21661 23:01:00.613324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip>
21662 23:01:00.644435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip
21664 23:01:00.644906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip>
21665 23:01:00.676449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip>
21666 23:01:00.676865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip
21668 23:01:00.709041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_224 RESULT=pass>
21669 23:01:00.709538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_224 RESULT=pass
21671 23:01:00.741030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip>
21672 23:01:00.741439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip
21674 23:01:00.773018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip>
21675 23:01:00.773469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip
21677 23:01:00.804761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip>
21678 23:01:00.805199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip
21680 23:01:00.836684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_240 RESULT=pass
21682 23:01:00.837248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_240 RESULT=pass>
21683 23:01:00.869107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip>
21684 23:01:00.869558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip
21686 23:01:00.901237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip>
21687 23:01:00.901694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip
21689 23:01:00.933431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip>
21690 23:01:00.933881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip
21692 23:01:00.964462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_256 RESULT=pass>
21693 23:01:00.964917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_256 RESULT=pass
21695 23:01:00.995932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 RESULT=pass
21697 23:01:00.996461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256 RESULT=pass>
21698 23:01:01.027100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 RESULT=pass>
21699 23:01:01.027535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256 RESULT=pass
21701 23:01:01.061186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 RESULT=pass>
21702 23:01:01.061643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256 RESULT=pass
21704 23:01:01.093216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_272 RESULT=pass>
21705 23:01:01.093722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_272 RESULT=pass
21707 23:01:01.125098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip>
21708 23:01:01.125518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip
21710 23:01:01.157112 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip>
21711 23:01:01.157512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip
21713 23:01:01.188895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip>
21714 23:01:01.189356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip
21716 23:01:01.221131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_288 RESULT=pass>
21717 23:01:01.221596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_288 RESULT=pass
21719 23:01:01.256932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip>
21720 23:01:01.257418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288 RESULT=skip
21722 23:01:01.289777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip>
21723 23:01:01.290189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288 RESULT=skip
21725 23:01:01.321470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip>
21726 23:01:01.321939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288 RESULT=skip
21728 23:01:01.352834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_304 RESULT=pass>
21729 23:01:01.353245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_304 RESULT=pass
21731 23:01:01.384509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip
21733 23:01:01.384953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304 RESULT=skip>
21734 23:01:01.417452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip>
21735 23:01:01.417903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304 RESULT=skip
21737 23:01:01.449364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip>
21738 23:01:01.449880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304 RESULT=skip
21740 23:01:01.481505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_320 RESULT=pass
21742 23:01:01.482265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_320 RESULT=pass>
21743 23:01:01.515118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip>
21744 23:01:01.515531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320 RESULT=skip
21746 23:01:01.547188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip>
21747 23:01:01.547661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320 RESULT=skip
21749 23:01:01.580364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip>
21750 23:01:01.580832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320 RESULT=skip
21752 23:01:01.613039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_336 RESULT=pass>
21753 23:01:01.613489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_336 RESULT=pass
21755 23:01:01.644685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip>
21756 23:01:01.645154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336 RESULT=skip
21758 23:01:01.676609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip>
21759 23:01:01.677066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336 RESULT=skip
21761 23:01:01.708006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip
21763 23:01:01.708440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336 RESULT=skip>
21764 23:01:01.739715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_352 RESULT=pass>
21765 23:01:01.740136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_352 RESULT=pass
21767 23:01:01.771685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip>
21768 23:01:01.772141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352 RESULT=skip
21770 23:01:01.802872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip>
21771 23:01:01.803352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352 RESULT=skip
21773 23:01:01.834236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip>
21774 23:01:01.834696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352 RESULT=skip
21776 23:01:01.865877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_368 RESULT=pass>
21777 23:01:01.866371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_368 RESULT=pass
21779 23:01:01.897532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip>
21780 23:01:01.897997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368 RESULT=skip
21782 23:01:01.929728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip>
21783 23:01:01.930183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368 RESULT=skip
21785 23:01:01.961077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip>
21786 23:01:01.961525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368 RESULT=skip
21788 23:01:01.992982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_384 RESULT=pass>
21789 23:01:01.993397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_384 RESULT=pass
21791 23:01:02.024399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip>
21792 23:01:02.024812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384 RESULT=skip
21794 23:01:02.055324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip>
21795 23:01:02.055731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384 RESULT=skip
21797 23:01:02.087010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip>
21798 23:01:02.087418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384 RESULT=skip
21800 23:01:02.118561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_400 RESULT=pass>
21801 23:01:02.119050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_400 RESULT=pass
21803 23:01:02.149250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip>
21804 23:01:02.149676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400 RESULT=skip
21806 23:01:02.180799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip>
21807 23:01:02.181201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400 RESULT=skip
21809 23:01:02.212572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip>
21810 23:01:02.212989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400 RESULT=skip
21812 23:01:02.243803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_416 RESULT=pass
21814 23:01:02.244377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_416 RESULT=pass>
21815 23:01:02.276072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip
21817 23:01:02.276620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416 RESULT=skip>
21818 23:01:02.308402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip>
21819 23:01:02.308850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416 RESULT=skip
21821 23:01:02.341054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip>
21822 23:01:02.341466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416 RESULT=skip
21824 23:01:02.373943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_432 RESULT=pass>
21825 23:01:02.374367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_432 RESULT=pass
21827 23:01:02.406537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip>
21828 23:01:02.406948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432 RESULT=skip
21830 23:01:02.438263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip>
21831 23:01:02.438723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432 RESULT=skip
21833 23:01:02.488533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip
21835 23:01:02.489104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432 RESULT=skip>
21836 23:01:02.520811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_448 RESULT=pass>
21837 23:01:02.521283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_448 RESULT=pass
21839 23:01:02.551569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip>
21840 23:01:02.552027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448 RESULT=skip
21842 23:01:02.582687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip
21844 23:01:02.583313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448 RESULT=skip>
21845 23:01:02.614170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip
21847 23:01:02.614806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448 RESULT=skip>
21848 23:01:02.649478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_464 RESULT=pass
21850 23:01:02.650004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_464 RESULT=pass>
21851 23:01:02.681167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip>
21852 23:01:02.681590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464 RESULT=skip
21854 23:01:02.712939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip
21856 23:01:02.713534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464 RESULT=skip>
21857 23:01:02.743282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip>
21858 23:01:02.743683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464 RESULT=skip
21860 23:01:02.774685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_480 RESULT=pass>
21861 23:01:02.775146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_480 RESULT=pass
21863 23:01:02.805283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip
21865 23:01:02.805875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480 RESULT=skip>
21866 23:01:02.835931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip
21868 23:01:02.836462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480 RESULT=skip>
21869 23:01:02.866621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip
21871 23:01:02.867187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480 RESULT=skip>
21872 23:01:02.899016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_496 RESULT=pass
21874 23:01:02.899566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_496 RESULT=pass>
21875 23:01:02.930209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip>
21876 23:01:02.930658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496 RESULT=skip
21878 23:01:02.961393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip>
21879 23:01:02.961785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496 RESULT=skip
21881 23:01:02.992073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip
21883 23:01:02.992511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496 RESULT=skip>
21884 23:01:03.024996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_512 RESULT=pass>
21885 23:01:03.025422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_512 RESULT=pass
21887 23:01:03.056918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip>
21888 23:01:03.057347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512 RESULT=skip
21890 23:01:03.089157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip>
21891 23:01:03.089603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512 RESULT=skip
21893 23:01:03.124985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip
21895 23:01:03.125559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512 RESULT=skip>
21896 23:01:03.155835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_528 RESULT=pass
21898 23:01:03.156373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_528 RESULT=pass>
21899 23:01:03.186442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip
21901 23:01:03.186891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528 RESULT=skip>
21902 23:01:03.218056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip
21904 23:01:03.218670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528 RESULT=skip>
21905 23:01:03.249341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip>
21906 23:01:03.249790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528 RESULT=skip
21908 23:01:03.280818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_544 RESULT=pass>
21909 23:01:03.281271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_544 RESULT=pass
21911 23:01:03.312385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip>
21912 23:01:03.312832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544 RESULT=skip
21914 23:01:03.344107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip
21916 23:01:03.344660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544 RESULT=skip>
21917 23:01:03.375578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip
21919 23:01:03.376132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544 RESULT=skip>
21920 23:01:03.406515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_560 RESULT=pass>
21921 23:01:03.406980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_560 RESULT=pass
21923 23:01:03.438317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip
21925 23:01:03.438875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560 RESULT=skip>
21926 23:01:03.469476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip>
21927 23:01:03.469937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560 RESULT=skip
21929 23:01:03.500998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip
21931 23:01:03.501544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560 RESULT=skip>
21932 23:01:03.532665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_576 RESULT=pass>
21933 23:01:03.533123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_576 RESULT=pass
21935 23:01:03.564962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip
21937 23:01:03.565585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576 RESULT=skip>
21938 23:01:03.596779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip
21940 23:01:03.597398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576 RESULT=skip>
21941 23:01:03.628608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip>
21942 23:01:03.629085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576 RESULT=skip
21944 23:01:03.659864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_592 RESULT=pass
21946 23:01:03.660506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_592 RESULT=pass>
21947 23:01:03.691283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip
21949 23:01:03.691892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592 RESULT=skip>
21950 23:01:03.722748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip>
21951 23:01:03.723206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592 RESULT=skip
21953 23:01:03.754620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip>
21954 23:01:03.755086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592 RESULT=skip
21956 23:01:03.787073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_608 RESULT=pass
21958 23:01:03.787696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_608 RESULT=pass>
21959 23:01:03.819042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip
21961 23:01:03.819661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608 RESULT=skip>
21962 23:01:03.851191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip
21964 23:01:03.851761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608 RESULT=skip>
21965 23:01:03.882622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip>
21966 23:01:03.883020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608 RESULT=skip
21968 23:01:03.913523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_624 RESULT=pass>
21969 23:01:03.913922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_624 RESULT=pass
21971 23:01:03.945427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip>
21972 23:01:03.945905 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624 RESULT=skip
21974 23:01:03.980883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip>
21975 23:01:03.981336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624 RESULT=skip
21977 23:01:04.012889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip>
21978 23:01:04.013328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624 RESULT=skip
21980 23:01:04.043608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_640 RESULT=pass>
21981 23:01:04.044038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_640 RESULT=pass
21983 23:01:04.075407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip>
21984 23:01:04.075852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640 RESULT=skip
21986 23:01:04.108512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip
21988 23:01:04.109021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640 RESULT=skip>
21989 23:01:04.143449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip>
21990 23:01:04.143913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640 RESULT=skip
21992 23:01:04.175373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_656 RESULT=pass>
21993 23:01:04.175832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_656 RESULT=pass
21995 23:01:04.206960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip
21997 23:01:04.207544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656 RESULT=skip>
21998 23:01:04.237776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip>
21999 23:01:04.238180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656 RESULT=skip
22001 23:01:04.269132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip
22003 23:01:04.269731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656 RESULT=skip>
22004 23:01:04.300344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_672 RESULT=pass>
22005 23:01:04.300846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_672 RESULT=pass
22007 23:01:04.331575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip
22009 23:01:04.332123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672 RESULT=skip>
22010 23:01:04.362618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip
22012 23:01:04.363160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672 RESULT=skip>
22013 23:01:04.393834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip>
22014 23:01:04.394245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672 RESULT=skip
22016 23:01:04.424977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_688 RESULT=pass>
22017 23:01:04.425411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_688 RESULT=pass
22019 23:01:04.457058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip
22021 23:01:04.457728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688 RESULT=skip>
22022 23:01:04.487986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip
22024 23:01:04.488598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688 RESULT=skip>
22025 23:01:04.519029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip
22027 23:01:04.519610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688 RESULT=skip>
22028 23:01:04.550867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_704 RESULT=pass>
22029 23:01:04.551313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_704 RESULT=pass
22031 23:01:04.582673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip>
22032 23:01:04.583125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704 RESULT=skip
22034 23:01:04.614455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip>
22035 23:01:04.614904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704 RESULT=skip
22037 23:01:04.645849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip
22039 23:01:04.646311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704 RESULT=skip>
22040 23:01:04.677289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_720 RESULT=pass>
22041 23:01:04.677681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_720 RESULT=pass
22043 23:01:04.708941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip>
22044 23:01:04.709346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720 RESULT=skip
22046 23:01:04.741072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip>
22047 23:01:04.741522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720 RESULT=skip
22049 23:01:04.773316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip>
22050 23:01:04.773804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720 RESULT=skip
22052 23:01:04.805634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_736 RESULT=pass>
22053 23:01:04.806138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_736 RESULT=pass
22055 23:01:04.837855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip>
22056 23:01:04.838312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736 RESULT=skip
22058 23:01:04.869451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip
22060 23:01:04.870029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736 RESULT=skip>
22061 23:01:04.900938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip>
22062 23:01:04.901385 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736 RESULT=skip
22064 23:01:04.932521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_752 RESULT=pass>
22065 23:01:04.932984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_752 RESULT=pass
22067 23:01:04.964197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip>
22068 23:01:04.964682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752 RESULT=skip
22070 23:01:04.997181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip>
22071 23:01:04.997659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752 RESULT=skip
22073 23:01:05.029199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip
22075 23:01:05.029753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752 RESULT=skip>
22076 23:01:05.060768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_768 RESULT=pass>
22077 23:01:05.061211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_768 RESULT=pass
22079 23:01:05.092714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip
22081 23:01:05.093152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768 RESULT=skip>
22082 23:01:05.124991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip>
22083 23:01:05.125435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768 RESULT=skip
22085 23:01:05.157281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip
22087 23:01:05.157843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768 RESULT=skip>
22088 23:01:05.189017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_784 RESULT=pass>
22089 23:01:05.189491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_784 RESULT=pass
22091 23:01:05.220913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip>
22092 23:01:05.221358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784 RESULT=skip
22094 23:01:05.252429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip
22096 23:01:05.252968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784 RESULT=skip>
22097 23:01:05.284290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip>
22098 23:01:05.284686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784 RESULT=skip
22100 23:01:05.316803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_800 RESULT=pass
22102 23:01:05.317240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_800 RESULT=pass>
22103 23:01:05.348456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip>
22104 23:01:05.348848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800 RESULT=skip
22106 23:01:05.380945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip>
22107 23:01:05.381337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800 RESULT=skip
22109 23:01:05.413316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip>
22110 23:01:05.413679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800 RESULT=skip
22112 23:01:05.445603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_816 RESULT=pass
22114 23:01:05.446031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_816 RESULT=pass>
22115 23:01:05.477975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip
22117 23:01:05.478517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816 RESULT=skip>
22118 23:01:05.509742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip>
22119 23:01:05.510204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816 RESULT=skip
22121 23:01:05.541088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip>
22122 23:01:05.541532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816 RESULT=skip
22124 23:01:05.573172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_832 RESULT=pass
22126 23:01:05.573792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_832 RESULT=pass>
22127 23:01:05.605054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip>
22128 23:01:05.605497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832 RESULT=skip
22130 23:01:05.636881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip>
22131 23:01:05.637319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832 RESULT=skip
22133 23:01:05.668226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip
22135 23:01:05.668881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832 RESULT=skip>
22136 23:01:05.699596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_848 RESULT=pass
22138 23:01:05.700056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_848 RESULT=pass>
22139 23:01:05.731443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip>
22140 23:01:05.731858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848 RESULT=skip
22142 23:01:05.763424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip
22144 23:01:05.764029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848 RESULT=skip>
22145 23:01:05.795618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip
22147 23:01:05.796172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848 RESULT=skip>
22148 23:01:05.827878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_864 RESULT=pass
22150 23:01:05.828546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_864 RESULT=pass>
22151 23:01:05.859389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip
22153 23:01:05.860011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864 RESULT=skip>
22154 23:01:05.890453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip
22156 23:01:05.891061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864 RESULT=skip>
22157 23:01:05.921261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip
22159 23:01:05.921890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864 RESULT=skip>
22160 23:01:05.952714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_880 RESULT=pass
22162 23:01:05.953338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_880 RESULT=pass>
22163 23:01:05.983737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip
22165 23:01:05.984293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880 RESULT=skip>
22166 23:01:06.016619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip
22168 23:01:06.017157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880 RESULT=skip>
22169 23:01:06.049398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip>
22170 23:01:06.049872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880 RESULT=skip
22172 23:01:06.081249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_896 RESULT=pass>
22173 23:01:06.081693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_896 RESULT=pass
22175 23:01:06.113010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip
22177 23:01:06.113557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896 RESULT=skip>
22178 23:01:06.144889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip>
22179 23:01:06.145353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896 RESULT=skip
22181 23:01:06.177485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip>
22182 23:01:06.177950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896 RESULT=skip
22184 23:01:06.209066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_912 RESULT=pass
22186 23:01:06.209613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_912 RESULT=pass>
22187 23:01:06.240961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip>
22188 23:01:06.241411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912 RESULT=skip
22190 23:01:06.272596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip>
22191 23:01:06.273015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912 RESULT=skip
22193 23:01:06.304090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip
22195 23:01:06.304655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912 RESULT=skip>
22196 23:01:06.335775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_928 RESULT=pass
22198 23:01:06.336334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_928 RESULT=pass>
22199 23:01:06.367667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip>
22200 23:01:06.368115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928 RESULT=skip
22202 23:01:06.400035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip
22204 23:01:06.400653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928 RESULT=skip>
22205 23:01:06.435403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip>
22206 23:01:06.435892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928 RESULT=skip
22208 23:01:06.467411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_944 RESULT=pass
22210 23:01:06.467977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_944 RESULT=pass>
22211 23:01:06.509061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip>
22212 23:01:06.509487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944 RESULT=skip
22214 23:01:06.545271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip
22216 23:01:06.545662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944 RESULT=skip>
22217 23:01:06.581171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip>
22218 23:01:06.581567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944 RESULT=skip
22220 23:01:06.621125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_960 RESULT=pass
22222 23:01:06.621519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_960 RESULT=pass>
22223 23:01:06.661516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip>
22224 23:01:06.661990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960 RESULT=skip
22226 23:01:06.696142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip
22228 23:01:06.696692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960 RESULT=skip>
22229 23:01:06.729857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip>
22230 23:01:06.730311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960 RESULT=skip
22232 23:01:06.762608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_976 RESULT=pass>
22233 23:01:06.763097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_976 RESULT=pass
22235 23:01:06.795471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip>
22236 23:01:06.795923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976 RESULT=skip
22238 23:01:06.829407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip>
22239 23:01:06.829846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976 RESULT=skip
22241 23:01:06.863598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip>
22242 23:01:06.864025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976 RESULT=skip
22244 23:01:06.897099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_992 RESULT=pass
22246 23:01:06.897828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_992 RESULT=pass>
22247 23:01:06.929795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip>
22248 23:01:06.930252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992 RESULT=skip
22250 23:01:06.962439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip
22252 23:01:06.962995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992 RESULT=skip>
22253 23:01:06.995431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip
22255 23:01:06.995968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992 RESULT=skip>
22256 23:01:07.027610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 RESULT=pass
22258 23:01:07.028163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1008 RESULT=pass>
22259 23:01:07.060875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip
22261 23:01:07.061418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008 RESULT=skip>
22262 23:01:07.094272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip
22264 23:01:07.094813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008 RESULT=skip>
22265 23:01:07.126880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip
22267 23:01:07.127339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008 RESULT=skip>
22268 23:01:07.160096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 RESULT=pass>
22269 23:01:07.160531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1024 RESULT=pass
22271 23:01:07.193331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip>
22272 23:01:07.193770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024 RESULT=skip
22274 23:01:07.226662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip
22276 23:01:07.227327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024 RESULT=skip>
22277 23:01:07.260957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip>
22278 23:01:07.261417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024 RESULT=skip
22280 23:01:07.294194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 RESULT=pass
22282 23:01:07.294760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1040 RESULT=pass>
22283 23:01:07.326888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip
22285 23:01:07.327339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040 RESULT=skip>
22286 23:01:07.360506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip>
22287 23:01:07.360892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040 RESULT=skip
22289 23:01:07.392665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip>
22290 23:01:07.393057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040 RESULT=skip
22292 23:01:07.424482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 RESULT=pass
22294 23:01:07.424913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1056 RESULT=pass>
22295 23:01:07.455931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip
22297 23:01:07.456359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056 RESULT=skip>
22298 23:01:07.489182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip>
22299 23:01:07.489575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056 RESULT=skip
22301 23:01:07.521707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip>
22302 23:01:07.522098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056 RESULT=skip
22304 23:01:07.554752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 RESULT=pass
22306 23:01:07.555357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1072 RESULT=pass>
22307 23:01:07.613718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip>
22308 23:01:07.614155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072 RESULT=skip
22310 23:01:07.648362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip>
22311 23:01:07.648831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072 RESULT=skip
22313 23:01:07.681106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip
22315 23:01:07.681740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072 RESULT=skip>
22316 23:01:07.714314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 RESULT=pass>
22317 23:01:07.714773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1088 RESULT=pass
22319 23:01:07.746217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip>
22320 23:01:07.746686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088 RESULT=skip
22322 23:01:07.778924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip
22324 23:01:07.779380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088 RESULT=skip>
22325 23:01:07.811686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip>
22326 23:01:07.812118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088 RESULT=skip
22328 23:01:07.845495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 RESULT=pass>
22329 23:01:07.845926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1104 RESULT=pass
22331 23:01:07.878316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip
22333 23:01:07.878901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104 RESULT=skip>
22334 23:01:07.910776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip
22336 23:01:07.911350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104 RESULT=skip>
22337 23:01:07.942893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip>
22338 23:01:07.943337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104 RESULT=skip
22340 23:01:07.975284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 RESULT=pass
22342 23:01:07.975859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1120 RESULT=pass>
22343 23:01:08.007227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip
22345 23:01:08.007844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120 RESULT=skip>
22346 23:01:08.039983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip
22348 23:01:08.040435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120 RESULT=skip>
22349 23:01:08.073370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip>
22350 23:01:08.073865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120 RESULT=skip
22352 23:01:08.105315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 RESULT=pass>
22353 23:01:08.105803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1136 RESULT=pass
22355 23:01:08.138273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip>
22356 23:01:08.138702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136 RESULT=skip
22358 23:01:08.173945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip>
22359 23:01:08.174358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136 RESULT=skip
22361 23:01:08.209791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip>
22362 23:01:08.210258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136 RESULT=skip
22364 23:01:08.244000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 RESULT=pass
22366 23:01:08.244479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1152 RESULT=pass>
22367 23:01:08.277671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip>
22368 23:01:08.278074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152 RESULT=skip
22370 23:01:08.310152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip>
22371 23:01:08.310556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152 RESULT=skip
22373 23:01:08.342875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip>
22374 23:01:08.343278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152 RESULT=skip
22376 23:01:08.374902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 RESULT=pass>
22377 23:01:08.375294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1168 RESULT=pass
22379 23:01:08.407114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip>
22380 23:01:08.407619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168 RESULT=skip
22382 23:01:08.439324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip>
22383 23:01:08.439743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168 RESULT=skip
22385 23:01:08.471664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip>
22386 23:01:08.472059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168 RESULT=skip
22388 23:01:08.503676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 RESULT=pass>
22389 23:01:08.504072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1184 RESULT=pass
22391 23:01:08.536405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip>
22392 23:01:08.536804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184 RESULT=skip
22394 23:01:08.567574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip>
22395 23:01:08.567969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184 RESULT=skip
22397 23:01:08.612593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip>
22398 23:01:08.613045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184 RESULT=skip
22400 23:01:08.655199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 RESULT=pass>
22401 23:01:08.655694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1200 RESULT=pass
22403 23:01:08.686839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip
22405 23:01:08.687318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200 RESULT=skip>
22406 23:01:08.717348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip>
22407 23:01:08.717756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200 RESULT=skip
22409 23:01:08.749202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip
22411 23:01:08.749797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200 RESULT=skip>
22412 23:01:08.781486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 RESULT=pass
22414 23:01:08.782102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1216 RESULT=pass>
22415 23:01:08.815589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip>
22416 23:01:08.816067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216 RESULT=skip
22418 23:01:08.859293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip>
22419 23:01:08.859769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216 RESULT=skip
22421 23:01:08.899467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip>
22422 23:01:08.899915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216 RESULT=skip
22424 23:01:08.937164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 RESULT=pass>
22425 23:01:08.937568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1232 RESULT=pass
22427 23:01:08.974786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip
22429 23:01:08.975429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232 RESULT=skip>
22430 23:01:09.016868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip>
22431 23:01:09.017322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232 RESULT=skip
22433 23:01:09.050556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip>
22434 23:01:09.051019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232 RESULT=skip
22436 23:01:09.083999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 RESULT=pass
22438 23:01:09.084553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1248 RESULT=pass>
22439 23:01:09.117269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip
22441 23:01:09.117834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248 RESULT=skip>
22442 23:01:09.150900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip>
22443 23:01:09.151309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248 RESULT=skip
22445 23:01:09.183757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip
22447 23:01:09.184213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248 RESULT=skip>
22448 23:01:09.217106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 RESULT=pass>
22449 23:01:09.217581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1264 RESULT=pass
22451 23:01:09.250387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip>
22452 23:01:09.250842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264 RESULT=skip
22454 23:01:09.284353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip>
22455 23:01:09.284812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264 RESULT=skip
22457 23:01:09.317281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip
22459 23:01:09.317762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264 RESULT=skip>
22460 23:01:09.351065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 RESULT=pass
22462 23:01:09.351506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1280 RESULT=pass>
22463 23:01:09.383906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip
22465 23:01:09.384354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280 RESULT=skip>
22466 23:01:09.417022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip
22468 23:01:09.417668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280 RESULT=skip>
22469 23:01:09.450201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip>
22470 23:01:09.450692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280 RESULT=skip
22472 23:01:09.483015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 RESULT=pass>
22473 23:01:09.483450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1296 RESULT=pass
22475 23:01:09.515071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip>
22476 23:01:09.515521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296 RESULT=skip
22478 23:01:09.548292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip>
22479 23:01:09.548712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296 RESULT=skip
22481 23:01:09.582197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip>
22482 23:01:09.582618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296 RESULT=skip
22484 23:01:09.616737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 RESULT=pass>
22485 23:01:09.617150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1312 RESULT=pass
22487 23:01:09.649239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip>
22488 23:01:09.649621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312 RESULT=skip
22490 23:01:09.682809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip>
22491 23:01:09.683199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312 RESULT=skip
22493 23:01:09.715345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip
22495 23:01:09.715944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312 RESULT=skip>
22496 23:01:09.748198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 RESULT=pass
22498 23:01:09.748830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1328 RESULT=pass>
22499 23:01:09.781282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip>
22500 23:01:09.781697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328 RESULT=skip
22502 23:01:09.815089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip>
22503 23:01:09.815550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328 RESULT=skip
22505 23:01:09.848939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip>
22506 23:01:09.849421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328 RESULT=skip
22508 23:01:09.882507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 RESULT=pass>
22509 23:01:09.882966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1344 RESULT=pass
22511 23:01:09.916174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip
22513 23:01:09.916749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344 RESULT=skip>
22514 23:01:09.949481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip
22516 23:01:09.950122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344 RESULT=skip>
22517 23:01:09.983700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip>
22518 23:01:09.984182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344 RESULT=skip
22520 23:01:10.017357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 RESULT=pass
22522 23:01:10.018013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1360 RESULT=pass>
22523 23:01:10.050672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip
22525 23:01:10.051339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360 RESULT=skip>
22526 23:01:10.085065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip>
22527 23:01:10.085519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360 RESULT=skip
22529 23:01:10.119667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip
22531 23:01:10.120229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360 RESULT=skip>
22532 23:01:10.155603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 RESULT=pass
22534 23:01:10.156079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1376 RESULT=pass>
22535 23:01:10.191166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip>
22536 23:01:10.191635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376 RESULT=skip
22538 23:01:10.226807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip
22540 23:01:10.227258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376 RESULT=skip>
22541 23:01:10.261881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip>
22542 23:01:10.262311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376 RESULT=skip
22544 23:01:10.296386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 RESULT=pass>
22545 23:01:10.296822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1392 RESULT=pass
22547 23:01:10.331519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip
22549 23:01:10.331968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392 RESULT=skip>
22550 23:01:10.367255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip>
22551 23:01:10.367697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392 RESULT=skip
22553 23:01:10.402275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip>
22554 23:01:10.402748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392 RESULT=skip
22556 23:01:10.437797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 RESULT=pass
22558 23:01:10.438306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1408 RESULT=pass>
22559 23:01:10.471530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip>
22560 23:01:10.471952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408 RESULT=skip
22562 23:01:10.504695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip
22564 23:01:10.505266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408 RESULT=skip>
22565 23:01:10.538266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip>
22566 23:01:10.538740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408 RESULT=skip
22568 23:01:10.571371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 RESULT=pass>
22569 23:01:10.571815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1424 RESULT=pass
22571 23:01:10.605283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip
22573 23:01:10.605850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424 RESULT=skip>
22574 23:01:10.638130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip
22576 23:01:10.638723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424 RESULT=skip>
22577 23:01:10.671203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip
22579 23:01:10.671745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424 RESULT=skip>
22580 23:01:10.703616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 RESULT=pass>
22581 23:01:10.704065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1440 RESULT=pass
22583 23:01:10.736971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip>
22584 23:01:10.737418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440 RESULT=skip
22586 23:01:10.770161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip>
22587 23:01:10.770612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440 RESULT=skip
22589 23:01:10.803330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip>
22590 23:01:10.803750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440 RESULT=skip
22592 23:01:10.836300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 RESULT=pass>
22593 23:01:10.836776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1456 RESULT=pass
22595 23:01:10.869492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip
22597 23:01:10.869964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456 RESULT=skip>
22598 23:01:10.902745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip
22600 23:01:10.903191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456 RESULT=skip>
22601 23:01:10.936497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip>
22602 23:01:10.936939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456 RESULT=skip
22604 23:01:10.970642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 RESULT=pass
22606 23:01:10.971199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1472 RESULT=pass>
22607 23:01:11.003106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip>
22608 23:01:11.003557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472 RESULT=skip
22610 23:01:11.037084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip
22612 23:01:11.037637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472 RESULT=skip>
22613 23:01:11.069990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip>
22614 23:01:11.070494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472 RESULT=skip
22616 23:01:11.102968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 RESULT=pass>
22617 23:01:11.103445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1488 RESULT=pass
22619 23:01:11.137171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip>
22620 23:01:11.137632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488 RESULT=skip
22622 23:01:11.170743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip>
22623 23:01:11.171227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488 RESULT=skip
22625 23:01:11.205445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip>
22626 23:01:11.205898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488 RESULT=skip
22628 23:01:11.238808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 RESULT=pass>
22629 23:01:11.239253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1504 RESULT=pass
22631 23:01:11.271430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip>
22632 23:01:11.271821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504 RESULT=skip
22634 23:01:11.303596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip>
22635 23:01:11.304047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504 RESULT=skip
22637 23:01:11.336322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip>
22638 23:01:11.336766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504 RESULT=skip
22640 23:01:11.368721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 RESULT=pass>
22641 23:01:11.369155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1520 RESULT=pass
22643 23:01:11.401047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip>
22644 23:01:11.401494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520 RESULT=skip
22646 23:01:11.435461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip>
22647 23:01:11.436018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520 RESULT=skip
22649 23:01:11.469156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip>
22650 23:01:11.469695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520 RESULT=skip
22652 23:01:11.501744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 RESULT=pass
22654 23:01:11.502379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1536 RESULT=pass>
22655 23:01:11.535046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip>
22656 23:01:11.535479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536 RESULT=skip
22658 23:01:11.567806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip
22660 23:01:11.568363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536 RESULT=skip>
22661 23:01:11.602839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip
22663 23:01:11.603300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536 RESULT=skip>
22664 23:01:11.635631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 RESULT=pass
22666 23:01:11.636094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1552 RESULT=pass>
22667 23:01:11.669161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip>
22668 23:01:11.669585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552 RESULT=skip
22670 23:01:11.702335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip
22672 23:01:11.702805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552 RESULT=skip>
22673 23:01:11.735469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip>
22674 23:01:11.735933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552 RESULT=skip
22676 23:01:11.769852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 RESULT=pass
22678 23:01:11.770508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1568 RESULT=pass>
22679 23:01:11.803228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip>
22680 23:01:11.803654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568 RESULT=skip
22682 23:01:11.836937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip>
22683 23:01:11.837414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568 RESULT=skip
22685 23:01:11.872962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip>
22686 23:01:11.873457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568 RESULT=skip
22688 23:01:11.906503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 RESULT=pass>
22689 23:01:11.906953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1584 RESULT=pass
22691 23:01:11.941826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip>
22692 23:01:11.942309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584 RESULT=skip
22694 23:01:11.976590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip>
22695 23:01:11.977050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584 RESULT=skip
22697 23:01:12.010273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip>
22698 23:01:12.010695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584 RESULT=skip
22700 23:01:12.045156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 RESULT=pass
22702 23:01:12.045619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1600 RESULT=pass>
22703 23:01:12.079460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip>
22704 23:01:12.079904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600 RESULT=skip
22706 23:01:12.116579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip>
22707 23:01:12.116994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600 RESULT=skip
22709 23:01:12.150338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip>
22710 23:01:12.150840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600 RESULT=skip
22712 23:01:12.184009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 RESULT=pass
22714 23:01:12.184580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1616 RESULT=pass>
22715 23:01:12.218139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip>
22716 23:01:12.218590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616 RESULT=skip
22718 23:01:12.251908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip
22720 23:01:12.252364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616 RESULT=skip>
22721 23:01:12.286078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip
22723 23:01:12.286544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616 RESULT=skip>
22724 23:01:12.320305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 RESULT=pass>
22725 23:01:12.320718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1632 RESULT=pass
22727 23:01:12.354619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip>
22728 23:01:12.355039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632 RESULT=skip
22730 23:01:12.389219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip
22732 23:01:12.389702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632 RESULT=skip>
22733 23:01:12.422954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip>
22734 23:01:12.423411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632 RESULT=skip
22736 23:01:12.456992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 RESULT=pass>
22737 23:01:12.457442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1648 RESULT=pass
22739 23:01:12.491080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip
22741 23:01:12.491626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648 RESULT=skip>
22742 23:01:12.525681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip>
22743 23:01:12.526132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648 RESULT=skip
22745 23:01:12.560446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip
22747 23:01:12.560995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648 RESULT=skip>
22748 23:01:12.594380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 RESULT=pass>
22749 23:01:12.594833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1664 RESULT=pass
22751 23:01:12.629176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip>
22752 23:01:12.629617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664 RESULT=skip
22754 23:01:12.663670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip>
22755 23:01:12.664119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664 RESULT=skip
22757 23:01:12.698866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip>
22758 23:01:12.699291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664 RESULT=skip
22760 23:01:12.761428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 RESULT=pass>
22761 23:01:12.761868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1680 RESULT=pass
22763 23:01:12.795888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip>
22764 23:01:12.796367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680 RESULT=skip
22766 23:01:12.830363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip>
22767 23:01:12.830816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680 RESULT=skip
22769 23:01:12.864409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip>
22770 23:01:12.864863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680 RESULT=skip
22772 23:01:12.897781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 RESULT=pass>
22773 23:01:12.898234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1696 RESULT=pass
22775 23:01:12.931386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip>
22776 23:01:12.931781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696 RESULT=skip
22778 23:01:12.964780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip>
22779 23:01:12.965237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696 RESULT=skip
22781 23:01:12.998569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip>
22782 23:01:12.999021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696 RESULT=skip
22784 23:01:13.031583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 RESULT=pass
22786 23:01:13.032162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1712 RESULT=pass>
22787 23:01:13.065217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip>
22788 23:01:13.065674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712 RESULT=skip
22790 23:01:13.098909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip>
22791 23:01:13.099329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712 RESULT=skip
22793 23:01:13.132933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip>
22794 23:01:13.133350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712 RESULT=skip
22796 23:01:13.166526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 RESULT=pass>
22797 23:01:13.166987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1728 RESULT=pass
22799 23:01:13.199485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip>
22800 23:01:13.199910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728 RESULT=skip
22802 23:01:13.232801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip
22804 23:01:13.233253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728 RESULT=skip>
22805 23:01:13.265280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip
22807 23:01:13.265632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728 RESULT=skip>
22808 23:01:13.297595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 RESULT=pass>
22809 23:01:13.298131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1744 RESULT=pass
22811 23:01:13.331071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip>
22812 23:01:13.331533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744 RESULT=skip
22814 23:01:13.368198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip
22816 23:01:13.368865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744 RESULT=skip>
22817 23:01:13.401198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip>
22818 23:01:13.401590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744 RESULT=skip
22820 23:01:13.434187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 RESULT=pass
22822 23:01:13.434629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1760 RESULT=pass>
22823 23:01:13.465993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip>
22824 23:01:13.466403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760 RESULT=skip
22826 23:01:13.500418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip>
22827 23:01:13.500847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760 RESULT=skip
22829 23:01:13.534740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip
22831 23:01:13.535208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760 RESULT=skip>
22832 23:01:13.566381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 RESULT=pass>
22833 23:01:13.566812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1776 RESULT=pass
22835 23:01:13.597628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip
22837 23:01:13.598111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776 RESULT=skip>
22838 23:01:13.629984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip>
22839 23:01:13.630393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776 RESULT=skip
22841 23:01:13.661664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip>
22842 23:01:13.662085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776 RESULT=skip
22844 23:01:13.693059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 RESULT=pass>
22845 23:01:13.693474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1792 RESULT=pass
22847 23:01:13.725001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip
22849 23:01:13.725636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792 RESULT=skip>
22850 23:01:13.756982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip>
22851 23:01:13.757418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792 RESULT=skip
22853 23:01:13.789581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip>
22854 23:01:13.790029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792 RESULT=skip
22856 23:01:13.820930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 RESULT=pass
22858 23:01:13.821539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1808 RESULT=pass>
22859 23:01:13.852120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip
22861 23:01:13.852672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808 RESULT=skip>
22862 23:01:13.883408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip>
22863 23:01:13.883872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808 RESULT=skip
22865 23:01:13.915081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip>
22866 23:01:13.915542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808 RESULT=skip
22868 23:01:13.946289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 RESULT=pass>
22869 23:01:13.946758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1824 RESULT=pass
22871 23:01:13.977639 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip
22873 23:01:13.978272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824 RESULT=skip>
22874 23:01:14.008796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip>
22875 23:01:14.009266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824 RESULT=skip
22877 23:01:14.040916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip>
22878 23:01:14.041370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824 RESULT=skip
22880 23:01:14.072814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 RESULT=pass
22882 23:01:14.073368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1840 RESULT=pass>
22883 23:01:14.104375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip>
22884 23:01:14.104833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840 RESULT=skip
22886 23:01:14.136743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip
22888 23:01:14.137356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840 RESULT=skip>
22889 23:01:14.168145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip
22891 23:01:14.168752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840 RESULT=skip>
22892 23:01:14.199214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 RESULT=pass>
22893 23:01:14.199611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1856 RESULT=pass
22895 23:01:14.230525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip
22897 23:01:14.231169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856 RESULT=skip>
22898 23:01:14.261725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip>
22899 23:01:14.262165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856 RESULT=skip
22901 23:01:14.293344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip>
22902 23:01:14.293784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856 RESULT=skip
22904 23:01:14.325306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 RESULT=pass>
22905 23:01:14.325679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1872 RESULT=pass
22907 23:01:14.357181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip>
22908 23:01:14.357615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872 RESULT=skip
22910 23:01:14.390803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip>
22911 23:01:14.391209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872 RESULT=skip
22913 23:01:14.427082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip>
22914 23:01:14.427522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872 RESULT=skip
22916 23:01:14.461189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 RESULT=pass>
22917 23:01:14.461578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1888 RESULT=pass
22919 23:01:14.493710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip>
22920 23:01:14.494096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888 RESULT=skip
22922 23:01:14.525512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip>
22923 23:01:14.525876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888 RESULT=skip
22925 23:01:14.557619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip
22927 23:01:14.558245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888 RESULT=skip>
22928 23:01:14.588940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 RESULT=pass
22930 23:01:14.589540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1904 RESULT=pass>
22931 23:01:14.621019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip>
22932 23:01:14.621471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904 RESULT=skip
22934 23:01:14.653317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip
22936 23:01:14.653942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904 RESULT=skip>
22937 23:01:14.685200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip>
22938 23:01:14.685657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904 RESULT=skip
22940 23:01:14.716842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 RESULT=pass
22942 23:01:14.717405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1920 RESULT=pass>
22943 23:01:14.749691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip>
22944 23:01:14.750170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920 RESULT=skip
22946 23:01:14.781621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip>
22947 23:01:14.782100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920 RESULT=skip
22949 23:01:14.814818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip
22951 23:01:14.815466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920 RESULT=skip>
22952 23:01:14.846817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 RESULT=pass
22954 23:01:14.847262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1936 RESULT=pass>
22955 23:01:14.878845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip>
22956 23:01:14.879269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936 RESULT=skip
22958 23:01:14.910730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip>
22959 23:01:14.911234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936 RESULT=skip
22961 23:01:14.942439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip
22963 23:01:14.943016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936 RESULT=skip>
22964 23:01:14.973769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 RESULT=pass>
22965 23:01:14.974212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1952 RESULT=pass
22967 23:01:15.005245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip>
22968 23:01:15.005687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952 RESULT=skip
22970 23:01:15.036458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip
22972 23:01:15.037002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952 RESULT=skip>
22973 23:01:15.067262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip>
22974 23:01:15.067735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952 RESULT=skip
22976 23:01:15.099559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 RESULT=pass
22978 23:01:15.100192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1968 RESULT=pass>
22979 23:01:15.130836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip
22981 23:01:15.131445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968 RESULT=skip>
22982 23:01:15.161967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip
22984 23:01:15.162583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968 RESULT=skip>
22985 23:01:15.193352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip>
22986 23:01:15.193815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968 RESULT=skip
22988 23:01:15.225589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 RESULT=pass>
22989 23:01:15.226073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_1984 RESULT=pass
22991 23:01:15.257968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip>
22992 23:01:15.258395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984 RESULT=skip
22994 23:01:15.289238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip
22996 23:01:15.289695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984 RESULT=skip>
22997 23:01:15.321708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip
22999 23:01:15.322177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984 RESULT=skip>
23000 23:01:15.354624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 RESULT=pass>
23001 23:01:15.355110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2000 RESULT=pass
23003 23:01:15.392515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip
23005 23:01:15.393152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000 RESULT=skip>
23006 23:01:15.427245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip
23008 23:01:15.427833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000 RESULT=skip>
23009 23:01:15.461036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip>
23010 23:01:15.461453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000 RESULT=skip
23012 23:01:15.494980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 RESULT=pass>
23013 23:01:15.495433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2016 RESULT=pass
23015 23:01:15.528433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip>
23016 23:01:15.528906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016 RESULT=skip
23018 23:01:15.560404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip>
23019 23:01:15.560880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016 RESULT=skip
23021 23:01:15.591428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip
23023 23:01:15.592041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016 RESULT=skip>
23024 23:01:15.622584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 RESULT=pass>
23025 23:01:15.623027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2032 RESULT=pass
23027 23:01:15.653562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip>
23028 23:01:15.653980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032 RESULT=skip
23030 23:01:15.685599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip
23032 23:01:15.686172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032 RESULT=skip>
23033 23:01:15.716927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip>
23034 23:01:15.717368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032 RESULT=skip
23036 23:01:15.747287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 RESULT=pass>
23037 23:01:15.747794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2048 RESULT=pass
23039 23:01:15.779488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip>
23040 23:01:15.779972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048 RESULT=skip
23042 23:01:15.811229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip>
23043 23:01:15.811703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048 RESULT=skip
23045 23:01:15.844146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip
23047 23:01:15.844707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048 RESULT=skip>
23048 23:01:15.876378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 RESULT=pass>
23049 23:01:15.876845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2064 RESULT=pass
23051 23:01:15.907724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip>
23052 23:01:15.908195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064 RESULT=skip
23054 23:01:15.939104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip
23056 23:01:15.939763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064 RESULT=skip>
23057 23:01:15.970609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip
23059 23:01:15.971233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064 RESULT=skip>
23060 23:01:16.001324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 RESULT=pass>
23061 23:01:16.001786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2080 RESULT=pass
23063 23:01:16.033299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip>
23064 23:01:16.033753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080 RESULT=skip
23066 23:01:16.065253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip>
23067 23:01:16.065683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080 RESULT=skip
23069 23:01:16.096651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip>
23070 23:01:16.097061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080 RESULT=skip
23072 23:01:16.127620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 RESULT=pass
23074 23:01:16.128076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2096 RESULT=pass>
23075 23:01:16.158910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip
23077 23:01:16.159364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096 RESULT=skip>
23078 23:01:16.189466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip>
23079 23:01:16.189879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096 RESULT=skip
23081 23:01:16.220549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip>
23082 23:01:16.220966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096 RESULT=skip
23084 23:01:16.251783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 RESULT=pass
23086 23:01:16.252343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2112 RESULT=pass>
23087 23:01:16.282844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip>
23088 23:01:16.283303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112 RESULT=skip
23090 23:01:16.314422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip>
23091 23:01:16.314849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112 RESULT=skip
23093 23:01:16.345527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip>
23094 23:01:16.345996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112 RESULT=skip
23096 23:01:16.376505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 RESULT=pass
23098 23:01:16.377143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2128 RESULT=pass>
23099 23:01:16.407560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip
23101 23:01:16.408100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128 RESULT=skip>
23102 23:01:16.440191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip
23104 23:01:16.440729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128 RESULT=skip>
23105 23:01:16.472607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip>
23106 23:01:16.473067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128 RESULT=skip
23108 23:01:16.503587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 RESULT=pass
23110 23:01:16.504264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2144 RESULT=pass>
23111 23:01:16.535133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip>
23112 23:01:16.535600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144 RESULT=skip
23114 23:01:16.567202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip
23116 23:01:16.567807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144 RESULT=skip>
23117 23:01:16.599502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip
23119 23:01:16.600086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144 RESULT=skip>
23120 23:01:16.631256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 RESULT=pass
23122 23:01:16.631844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2160 RESULT=pass>
23123 23:01:16.665702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip
23125 23:01:16.666257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160 RESULT=skip>
23126 23:01:16.697805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip>
23127 23:01:16.698252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160 RESULT=skip
23129 23:01:16.729231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip>
23130 23:01:16.729693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160 RESULT=skip
23132 23:01:16.760771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 RESULT=pass>
23133 23:01:16.761228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2176 RESULT=pass
23135 23:01:16.792026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip
23137 23:01:16.792580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176 RESULT=skip>
23138 23:01:16.823362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip>
23139 23:01:16.823812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176 RESULT=skip
23141 23:01:16.855346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip>
23142 23:01:16.855792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176 RESULT=skip
23144 23:01:16.886773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 RESULT=pass>
23145 23:01:16.887206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2192 RESULT=pass
23147 23:01:16.917818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip
23149 23:01:16.918351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192 RESULT=skip>
23150 23:01:16.949180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip>
23151 23:01:16.949618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192 RESULT=skip
23153 23:01:16.980669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip>
23154 23:01:16.981111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192 RESULT=skip
23156 23:01:17.011739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 RESULT=pass>
23157 23:01:17.012172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2208 RESULT=pass
23159 23:01:17.043259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip>
23160 23:01:17.043683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208 RESULT=skip
23162 23:01:17.074827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip>
23163 23:01:17.075262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208 RESULT=skip
23165 23:01:17.106407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip>
23166 23:01:17.106804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208 RESULT=skip
23168 23:01:17.137879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 RESULT=pass
23170 23:01:17.138315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2224 RESULT=pass>
23171 23:01:17.169281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip>
23172 23:01:17.169694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224 RESULT=skip
23174 23:01:17.200726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip>
23175 23:01:17.201180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224 RESULT=skip
23177 23:01:17.233059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip>
23178 23:01:17.233500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224 RESULT=skip
23180 23:01:17.265880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 RESULT=pass
23182 23:01:17.266435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2240 RESULT=pass>
23183 23:01:17.297785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip>
23184 23:01:17.298211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240 RESULT=skip
23186 23:01:17.329396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip>
23187 23:01:17.329824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240 RESULT=skip
23189 23:01:17.361229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip>
23190 23:01:17.361670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240 RESULT=skip
23192 23:01:17.393261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 RESULT=pass>
23193 23:01:17.393688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2256 RESULT=pass
23195 23:01:17.424863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip>
23196 23:01:17.425318 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256 RESULT=skip
23198 23:01:17.456993 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip
23200 23:01:17.457536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256 RESULT=skip>
23201 23:01:17.489177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip
23203 23:01:17.489732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256 RESULT=skip>
23204 23:01:17.521497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 RESULT=pass
23206 23:01:17.522044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2272 RESULT=pass>
23207 23:01:17.553163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip>
23208 23:01:17.553560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272 RESULT=skip
23210 23:01:17.585819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip
23212 23:01:17.586385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272 RESULT=skip>
23213 23:01:17.617161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip>
23214 23:01:17.617608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272 RESULT=skip
23216 23:01:17.648971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 RESULT=pass
23218 23:01:17.649528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2288 RESULT=pass>
23219 23:01:17.659221 <47>[ 227.479836] systemd-journald[105]: Sent WATCHDOG=1 notification.
23220 23:01:17.691502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip
23222 23:01:17.692035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288 RESULT=skip>
23223 23:01:17.724284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip>
23224 23:01:17.724736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288 RESULT=skip
23226 23:01:17.756210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip
23228 23:01:17.756782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288 RESULT=skip>
23229 23:01:17.788057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 RESULT=pass
23231 23:01:17.788617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2304 RESULT=pass>
23232 23:01:17.819638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip>
23233 23:01:17.820095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304 RESULT=skip
23235 23:01:17.881666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip
23237 23:01:17.882225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304 RESULT=skip>
23238 23:01:17.913659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip>
23239 23:01:17.914120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304 RESULT=skip
23241 23:01:17.945203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 RESULT=pass
23243 23:01:17.945666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2320 RESULT=pass>
23244 23:01:17.976585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip
23246 23:01:17.977043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320 RESULT=skip>
23247 23:01:18.007552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip>
23248 23:01:18.008011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320 RESULT=skip
23250 23:01:18.039056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip
23252 23:01:18.039640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320 RESULT=skip>
23253 23:01:18.070516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 RESULT=pass>
23254 23:01:18.070955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2336 RESULT=pass
23256 23:01:18.102051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip
23258 23:01:18.102682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336 RESULT=skip>
23259 23:01:18.132936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip
23261 23:01:18.133463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336 RESULT=skip>
23262 23:01:18.165396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip>
23263 23:01:18.165854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336 RESULT=skip
23265 23:01:18.196696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 RESULT=pass
23267 23:01:18.197243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2352 RESULT=pass>
23268 23:01:18.228767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip
23270 23:01:18.229203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352 RESULT=skip>
23271 23:01:18.260109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip
23273 23:01:18.260546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352 RESULT=skip>
23274 23:01:18.292004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip
23276 23:01:18.292441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352 RESULT=skip>
23277 23:01:18.324803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 RESULT=pass
23279 23:01:18.325248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2368 RESULT=pass>
23280 23:01:18.355995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip
23282 23:01:18.356437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368 RESULT=skip>
23283 23:01:18.387245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip>
23284 23:01:18.387693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368 RESULT=skip
23286 23:01:18.419464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip
23288 23:01:18.419936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368 RESULT=skip>
23289 23:01:18.450848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 RESULT=pass>
23290 23:01:18.451296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2384 RESULT=pass
23292 23:01:18.482721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip>
23293 23:01:18.483161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384 RESULT=skip
23295 23:01:18.517602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip>
23296 23:01:18.518037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384 RESULT=skip
23298 23:01:18.553332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip>
23299 23:01:18.553760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384 RESULT=skip
23301 23:01:18.590181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 RESULT=pass
23303 23:01:18.590653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2400 RESULT=pass>
23304 23:01:18.625717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip
23306 23:01:18.626270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400 RESULT=skip>
23307 23:01:18.661351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip>
23308 23:01:18.661693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400 RESULT=skip
23310 23:01:18.697333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip>
23311 23:01:18.697690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400 RESULT=skip
23313 23:01:18.732994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 RESULT=pass>
23314 23:01:18.733342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2416 RESULT=pass
23316 23:01:18.769279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip>
23317 23:01:18.769623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416 RESULT=skip
23319 23:01:18.807158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip>
23320 23:01:18.807578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416 RESULT=skip
23322 23:01:18.844054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip
23324 23:01:18.844609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416 RESULT=skip>
23325 23:01:18.881395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 RESULT=pass
23327 23:01:18.881850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2432 RESULT=pass>
23328 23:01:18.917991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip>
23329 23:01:18.918414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432 RESULT=skip
23331 23:01:18.953926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip>
23332 23:01:18.954404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432 RESULT=skip
23334 23:01:18.990393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip>
23335 23:01:18.990867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432 RESULT=skip
23337 23:01:19.025723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 RESULT=pass>
23338 23:01:19.026200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2448 RESULT=pass
23340 23:01:19.061469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip>
23341 23:01:19.061963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448 RESULT=skip
23343 23:01:19.097311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip>
23344 23:01:19.097786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448 RESULT=skip
23346 23:01:19.133614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip>
23347 23:01:19.134095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448 RESULT=skip
23349 23:01:19.169545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 RESULT=pass
23351 23:01:19.170128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2464 RESULT=pass>
23352 23:01:19.205406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip>
23353 23:01:19.205876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464 RESULT=skip
23355 23:01:19.241132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip>
23356 23:01:19.241595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464 RESULT=skip
23358 23:01:19.276463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip
23360 23:01:19.276946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464 RESULT=skip>
23361 23:01:19.311230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 RESULT=pass
23363 23:01:19.311694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2480 RESULT=pass>
23364 23:01:19.346889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip>
23365 23:01:19.347300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480 RESULT=skip
23367 23:01:19.382558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip>
23368 23:01:19.382979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480 RESULT=skip
23370 23:01:19.418445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip>
23371 23:01:19.418923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480 RESULT=skip
23373 23:01:19.454785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 RESULT=pass
23375 23:01:19.455386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2496 RESULT=pass>
23376 23:01:19.489978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip>
23377 23:01:19.490489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496 RESULT=skip
23379 23:01:19.525517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip>
23380 23:01:19.525992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496 RESULT=skip
23382 23:01:19.561042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip>
23383 23:01:19.561454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496 RESULT=skip
23385 23:01:19.596849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 RESULT=pass>
23386 23:01:19.597216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2512 RESULT=pass
23388 23:01:19.632375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip>
23389 23:01:19.632721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512 RESULT=skip
23391 23:01:19.667183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip>
23392 23:01:19.667669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512 RESULT=skip
23394 23:01:19.702408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip
23396 23:01:19.702833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512 RESULT=skip>
23397 23:01:19.738814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 RESULT=pass>
23398 23:01:19.739193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2528 RESULT=pass
23400 23:01:19.772065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip
23402 23:01:19.772626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528 RESULT=skip>
23403 23:01:19.804429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip
23405 23:01:19.805073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528 RESULT=skip>
23406 23:01:19.836511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip>
23407 23:01:19.836970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528 RESULT=skip
23409 23:01:19.868612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 RESULT=pass
23411 23:01:19.869197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2544 RESULT=pass>
23412 23:01:19.900876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip>
23413 23:01:19.901320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544 RESULT=skip
23415 23:01:19.933888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip
23417 23:01:19.934456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544 RESULT=skip>
23418 23:01:19.966259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip>
23419 23:01:19.966718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544 RESULT=skip
23421 23:01:19.998101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 RESULT=pass>
23422 23:01:19.998566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2560 RESULT=pass
23424 23:01:20.029866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip>
23425 23:01:20.030314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560 RESULT=skip
23427 23:01:20.061964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip>
23428 23:01:20.062417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560 RESULT=skip
23430 23:01:20.094661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip
23432 23:01:20.095196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560 RESULT=skip>
23433 23:01:20.125210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 RESULT=pass>
23434 23:01:20.125661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2576 RESULT=pass
23436 23:01:20.157101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip>
23437 23:01:20.157546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576 RESULT=skip
23439 23:01:20.189131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip
23441 23:01:20.189699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576 RESULT=skip>
23442 23:01:20.221202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip>
23443 23:01:20.221701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576 RESULT=skip
23445 23:01:20.253381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 RESULT=pass>
23446 23:01:20.253871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2592 RESULT=pass
23448 23:01:20.284695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip>
23449 23:01:20.285151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592 RESULT=skip
23451 23:01:20.316277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip>
23452 23:01:20.316749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592 RESULT=skip
23454 23:01:20.359549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip>
23455 23:01:20.360015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592 RESULT=skip
23457 23:01:20.401364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 RESULT=pass>
23458 23:01:20.401784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2608 RESULT=pass
23460 23:01:20.433763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip>
23461 23:01:20.434167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608 RESULT=skip
23463 23:01:20.465690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip>
23464 23:01:20.466091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608 RESULT=skip
23466 23:01:20.497741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip>
23467 23:01:20.498176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608 RESULT=skip
23469 23:01:20.530497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 RESULT=pass
23471 23:01:20.531074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2624 RESULT=pass>
23472 23:01:20.562398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip
23474 23:01:20.563038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624 RESULT=skip>
23475 23:01:20.594675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip
23477 23:01:20.595146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624 RESULT=skip>
23478 23:01:20.625196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip
23480 23:01:20.625767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624 RESULT=skip>
23481 23:01:20.656705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 RESULT=pass
23483 23:01:20.657252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2640 RESULT=pass>
23484 23:01:20.688732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip>
23485 23:01:20.689204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640 RESULT=skip
23487 23:01:20.720504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip
23489 23:01:20.720951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640 RESULT=skip>
23490 23:01:20.751410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip
23492 23:01:20.752042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640 RESULT=skip>
23493 23:01:20.783355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 RESULT=pass>
23494 23:01:20.783819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2656 RESULT=pass
23496 23:01:20.814911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip
23498 23:01:20.815472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656 RESULT=skip>
23499 23:01:20.846404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip
23501 23:01:20.846870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656 RESULT=skip>
23502 23:01:20.877810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip>
23503 23:01:20.878215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656 RESULT=skip
23505 23:01:20.909295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 RESULT=pass
23507 23:01:20.909942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2672 RESULT=pass>
23508 23:01:20.940332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip>
23509 23:01:20.940788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672 RESULT=skip
23511 23:01:20.972500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip
23513 23:01:20.973048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672 RESULT=skip>
23514 23:01:21.004117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip
23516 23:01:21.004662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672 RESULT=skip>
23517 23:01:21.034788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 RESULT=pass>
23518 23:01:21.035255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2688 RESULT=pass
23520 23:01:21.067378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip
23522 23:01:21.067950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688 RESULT=skip>
23523 23:01:21.098633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip>
23524 23:01:21.099076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688 RESULT=skip
23526 23:01:21.131140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip
23528 23:01:21.131695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688 RESULT=skip>
23529 23:01:21.162025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 RESULT=pass>
23530 23:01:21.162495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2704 RESULT=pass
23532 23:01:21.193631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip>
23533 23:01:21.194099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704 RESULT=skip
23535 23:01:21.225331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip>
23536 23:01:21.225781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704 RESULT=skip
23538 23:01:21.259143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip
23540 23:01:21.259700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704 RESULT=skip>
23541 23:01:21.292889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 RESULT=pass
23543 23:01:21.293457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2720 RESULT=pass>
23544 23:01:21.326933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip>
23545 23:01:21.327455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720 RESULT=skip
23547 23:01:21.359944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip
23549 23:01:21.360519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720 RESULT=skip>
23550 23:01:21.392081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip
23552 23:01:21.392546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720 RESULT=skip>
23553 23:01:21.422618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 RESULT=pass>
23554 23:01:21.423022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2736 RESULT=pass
23556 23:01:21.454074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip>
23557 23:01:21.454542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736 RESULT=skip
23559 23:01:21.485189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip>
23560 23:01:21.485672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736 RESULT=skip
23562 23:01:21.516982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip>
23563 23:01:21.517449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736 RESULT=skip
23565 23:01:21.549894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 RESULT=pass>
23566 23:01:21.550326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2752 RESULT=pass
23568 23:01:21.585110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip
23570 23:01:21.585777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752 RESULT=skip>
23571 23:01:21.618976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip>
23572 23:01:21.619351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752 RESULT=skip
23574 23:01:21.651920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip
23576 23:01:21.652531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752 RESULT=skip>
23577 23:01:21.683472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 RESULT=pass>
23578 23:01:21.683926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2768 RESULT=pass
23580 23:01:21.715297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip>
23581 23:01:21.715755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768 RESULT=skip
23583 23:01:21.747476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip
23585 23:01:21.748096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768 RESULT=skip>
23586 23:01:21.778844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip>
23587 23:01:21.779231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768 RESULT=skip
23589 23:01:21.810642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 RESULT=pass>
23590 23:01:21.811113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2784 RESULT=pass
23592 23:01:21.842817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip>
23593 23:01:21.843244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784 RESULT=skip
23595 23:01:21.874074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip>
23596 23:01:21.874505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784 RESULT=skip
23598 23:01:21.905954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip>
23599 23:01:21.906394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784 RESULT=skip
23601 23:01:21.937364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 RESULT=pass>
23602 23:01:21.937805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2800 RESULT=pass
23604 23:01:21.968971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip>
23605 23:01:21.969407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800 RESULT=skip
23607 23:01:22.001543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip>
23608 23:01:22.001986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800 RESULT=skip
23610 23:01:22.033398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip>
23611 23:01:22.033852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800 RESULT=skip
23613 23:01:22.065462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 RESULT=pass>
23614 23:01:22.065913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2816 RESULT=pass
23616 23:01:22.097282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip>
23617 23:01:22.097693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816 RESULT=skip
23619 23:01:22.129002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip>
23620 23:01:22.129452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816 RESULT=skip
23622 23:01:22.161158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip>
23623 23:01:22.161541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816 RESULT=skip
23625 23:01:22.192996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 RESULT=pass>
23626 23:01:22.193379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2832 RESULT=pass
23628 23:01:22.224780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip>
23629 23:01:22.225159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832 RESULT=skip
23631 23:01:22.257064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip>
23632 23:01:22.257452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832 RESULT=skip
23634 23:01:22.289188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip>
23635 23:01:22.289596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832 RESULT=skip
23637 23:01:22.320844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 RESULT=pass>
23638 23:01:22.321245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2848 RESULT=pass
23640 23:01:22.352598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip>
23641 23:01:22.353006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848 RESULT=skip
23643 23:01:22.384631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip>
23644 23:01:22.385074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848 RESULT=skip
23646 23:01:22.416014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip
23648 23:01:22.416589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848 RESULT=skip>
23649 23:01:22.447325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 RESULT=pass
23651 23:01:22.447867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2864 RESULT=pass>
23652 23:01:22.481043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip
23654 23:01:22.481624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864 RESULT=skip>
23655 23:01:22.512813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip>
23656 23:01:22.513276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864 RESULT=skip
23658 23:01:22.544137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip
23660 23:01:22.544696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864 RESULT=skip>
23661 23:01:22.576810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 RESULT=pass>
23662 23:01:22.577254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2880 RESULT=pass
23664 23:01:22.609358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip
23666 23:01:22.609949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880 RESULT=skip>
23667 23:01:22.641519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip
23669 23:01:22.642099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880 RESULT=skip>
23670 23:01:22.674776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip>
23671 23:01:22.675234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880 RESULT=skip
23673 23:01:22.706433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 RESULT=pass>
23674 23:01:22.706864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2896 RESULT=pass
23676 23:01:22.738590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip
23678 23:01:22.739045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896 RESULT=skip>
23679 23:01:22.769949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip
23681 23:01:22.770397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896 RESULT=skip>
23682 23:01:22.801279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip>
23683 23:01:22.801710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896 RESULT=skip
23685 23:01:22.832798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 RESULT=pass>
23686 23:01:22.833223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2912 RESULT=pass
23688 23:01:22.863726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip>
23689 23:01:22.864139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912 RESULT=skip
23691 23:01:22.896535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip>
23692 23:01:22.896964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912 RESULT=skip
23694 23:01:22.928946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip>
23695 23:01:22.929365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912 RESULT=skip
23697 23:01:22.986208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 RESULT=pass
23699 23:01:22.986771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2928 RESULT=pass>
23700 23:01:23.017504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip>
23701 23:01:23.017962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928 RESULT=skip
23703 23:01:23.049695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip>
23704 23:01:23.050145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928 RESULT=skip
23706 23:01:23.081693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip>
23707 23:01:23.082119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928 RESULT=skip
23709 23:01:23.113175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 RESULT=pass>
23710 23:01:23.113627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2944 RESULT=pass
23712 23:01:23.143742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip>
23713 23:01:23.144192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944 RESULT=skip
23715 23:01:23.178975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip
23717 23:01:23.179523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944 RESULT=skip>
23718 23:01:23.212877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip
23720 23:01:23.213334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944 RESULT=skip>
23721 23:01:23.244988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 RESULT=pass
23723 23:01:23.245434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2960 RESULT=pass>
23724 23:01:23.277187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip>
23725 23:01:23.277600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960 RESULT=skip
23727 23:01:23.308989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip
23729 23:01:23.309431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960 RESULT=skip>
23730 23:01:23.340690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip>
23731 23:01:23.341088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960 RESULT=skip
23733 23:01:23.371787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 RESULT=pass>
23734 23:01:23.372199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2976 RESULT=pass
23736 23:01:23.404346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip>
23737 23:01:23.404753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976 RESULT=skip
23739 23:01:23.435510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip>
23740 23:01:23.435919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976 RESULT=skip
23742 23:01:23.466925 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip>
23743 23:01:23.467378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976 RESULT=skip
23745 23:01:23.498138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 RESULT=pass
23747 23:01:23.498694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_2992 RESULT=pass>
23748 23:01:23.530195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip>
23749 23:01:23.530650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992 RESULT=skip
23751 23:01:23.561530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip>
23752 23:01:23.561946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992 RESULT=skip
23754 23:01:23.592862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip
23756 23:01:23.593448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992 RESULT=skip>
23757 23:01:23.624991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 RESULT=pass
23759 23:01:23.625574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3008 RESULT=pass>
23760 23:01:23.656746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip>
23761 23:01:23.657259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008 RESULT=skip
23763 23:01:23.688513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip>
23764 23:01:23.689041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008 RESULT=skip
23766 23:01:23.720169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip
23768 23:01:23.720842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008 RESULT=skip>
23769 23:01:23.750848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 RESULT=pass
23771 23:01:23.751384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3024 RESULT=pass>
23772 23:01:23.782453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip>
23773 23:01:23.782895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024 RESULT=skip
23775 23:01:23.814019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip>
23776 23:01:23.814476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024 RESULT=skip
23778 23:01:23.846182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip>
23779 23:01:23.846649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024 RESULT=skip
23781 23:01:23.878801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 RESULT=pass
23783 23:01:23.879436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3040 RESULT=pass>
23784 23:01:23.910726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip>
23785 23:01:23.911195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040 RESULT=skip
23787 23:01:23.942692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip>
23788 23:01:23.943073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040 RESULT=skip
23790 23:01:23.974821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip>
23791 23:01:23.975203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040 RESULT=skip
23793 23:01:24.006340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 RESULT=pass>
23794 23:01:24.006719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3056 RESULT=pass
23796 23:01:24.037899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip>
23797 23:01:24.038276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056 RESULT=skip
23799 23:01:24.070349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip>
23800 23:01:24.070726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056 RESULT=skip
23802 23:01:24.102144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip>
23803 23:01:24.102599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056 RESULT=skip
23805 23:01:24.133432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 RESULT=pass>
23806 23:01:24.133812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3072 RESULT=pass
23808 23:01:24.165249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip>
23809 23:01:24.165690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072 RESULT=skip
23811 23:01:24.197038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip>
23812 23:01:24.197489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072 RESULT=skip
23814 23:01:24.229123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip>
23815 23:01:24.229580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072 RESULT=skip
23817 23:01:24.260522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 RESULT=pass
23819 23:01:24.260969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3088 RESULT=pass>
23820 23:01:24.291583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip
23822 23:01:24.292138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088 RESULT=skip>
23823 23:01:24.323039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip>
23824 23:01:24.323457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088 RESULT=skip
23826 23:01:24.354693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip>
23827 23:01:24.355079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088 RESULT=skip
23829 23:01:24.386267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 RESULT=pass>
23830 23:01:24.386650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3104 RESULT=pass
23832 23:01:24.417838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip>
23833 23:01:24.418265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104 RESULT=skip
23835 23:01:24.449561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip>
23836 23:01:24.450000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104 RESULT=skip
23838 23:01:24.481010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip>
23839 23:01:24.481479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104 RESULT=skip
23841 23:01:24.512572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 RESULT=pass>
23842 23:01:24.513012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3120 RESULT=pass
23844 23:01:24.543646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip>
23845 23:01:24.544067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120 RESULT=skip
23847 23:01:24.576597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip>
23848 23:01:24.577055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120 RESULT=skip
23850 23:01:24.609298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip>
23851 23:01:24.609769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120 RESULT=skip
23853 23:01:24.641327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 RESULT=pass>
23854 23:01:24.641795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3136 RESULT=pass
23856 23:01:24.672746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip>
23857 23:01:24.673216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136 RESULT=skip
23859 23:01:24.704401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip>
23860 23:01:24.704817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136 RESULT=skip
23862 23:01:24.736086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip
23864 23:01:24.736690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136 RESULT=skip>
23865 23:01:24.767274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 RESULT=pass>
23866 23:01:24.767684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3152 RESULT=pass
23868 23:01:24.798547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip>
23869 23:01:24.799002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152 RESULT=skip
23871 23:01:24.830129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip>
23872 23:01:24.830567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152 RESULT=skip
23874 23:01:24.864205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip
23876 23:01:24.864658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152 RESULT=skip>
23877 23:01:24.897838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 RESULT=pass
23879 23:01:24.898298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3168 RESULT=pass>
23880 23:01:24.930200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip>
23881 23:01:24.930679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168 RESULT=skip
23883 23:01:24.962163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip>
23884 23:01:24.962622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168 RESULT=skip
23886 23:01:24.993662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip>
23887 23:01:24.994120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168 RESULT=skip
23889 23:01:25.025325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 RESULT=pass>
23890 23:01:25.025680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3184 RESULT=pass
23892 23:01:25.057258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip>
23893 23:01:25.057703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184 RESULT=skip
23895 23:01:25.089217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip>
23896 23:01:25.089676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184 RESULT=skip
23898 23:01:25.120513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip>
23899 23:01:25.120915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184 RESULT=skip
23901 23:01:25.152015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 RESULT=pass
23903 23:01:25.152453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3200 RESULT=pass>
23904 23:01:25.183463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip>
23905 23:01:25.183874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200 RESULT=skip
23907 23:01:25.215010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip>
23908 23:01:25.215420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200 RESULT=skip
23910 23:01:25.247695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip>
23911 23:01:25.248147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200 RESULT=skip
23913 23:01:25.279298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 RESULT=pass>
23914 23:01:25.279750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3216 RESULT=pass
23916 23:01:25.310463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip>
23917 23:01:25.310875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216 RESULT=skip
23919 23:01:25.341406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip>
23920 23:01:25.341817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216 RESULT=skip
23922 23:01:25.373088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip>
23923 23:01:25.373576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216 RESULT=skip
23925 23:01:25.404570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 RESULT=pass>
23926 23:01:25.405053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3232 RESULT=pass
23928 23:01:25.437156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip>
23929 23:01:25.437661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232 RESULT=skip
23931 23:01:25.469260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip
23933 23:01:25.469838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232 RESULT=skip>
23934 23:01:25.502030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip>
23935 23:01:25.502444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232 RESULT=skip
23937 23:01:25.537449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 RESULT=pass
23939 23:01:25.538028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3248 RESULT=pass>
23940 23:01:25.569239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip>
23941 23:01:25.569701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248 RESULT=skip
23943 23:01:25.600928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip
23945 23:01:25.601503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248 RESULT=skip>
23946 23:01:25.632867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip>
23947 23:01:25.633320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248 RESULT=skip
23949 23:01:25.664632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 RESULT=pass>
23950 23:01:25.665100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3264 RESULT=pass
23952 23:01:25.696346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip
23954 23:01:25.696973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264 RESULT=skip>
23955 23:01:25.727323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip>
23956 23:01:25.727787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264 RESULT=skip
23958 23:01:25.758707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip>
23959 23:01:25.759107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264 RESULT=skip
23961 23:01:25.790494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 RESULT=pass
23963 23:01:25.790937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3280 RESULT=pass>
23964 23:01:25.821979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip>
23965 23:01:25.822382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280 RESULT=skip
23967 23:01:25.854244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip>
23968 23:01:25.854646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280 RESULT=skip
23970 23:01:25.885913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip>
23971 23:01:25.886367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280 RESULT=skip
23973 23:01:25.918655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 RESULT=pass
23975 23:01:25.919218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3296 RESULT=pass>
23976 23:01:25.950719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip
23978 23:01:25.951257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296 RESULT=skip>
23979 23:01:25.982165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip>
23980 23:01:25.982604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296 RESULT=skip
23982 23:01:26.013413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip
23984 23:01:26.013979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296 RESULT=skip>
23985 23:01:26.044353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 RESULT=pass
23987 23:01:26.044898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3312 RESULT=pass>
23988 23:01:26.075584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip>
23989 23:01:26.076051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312 RESULT=skip
23991 23:01:26.107767 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip
23993 23:01:26.108349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312 RESULT=skip>
23994 23:01:26.139275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip>
23995 23:01:26.139732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312 RESULT=skip
23997 23:01:26.171014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 RESULT=pass>
23998 23:01:26.171482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3328 RESULT=pass
24000 23:01:26.203214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip>
24001 23:01:26.203675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328 RESULT=skip
24003 23:01:26.234986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip>
24004 23:01:26.235462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328 RESULT=skip
24006 23:01:26.266545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip>
24007 23:01:26.267026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328 RESULT=skip
24009 23:01:26.298132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 RESULT=pass
24011 23:01:26.298755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3344 RESULT=pass>
24012 23:01:26.329295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip>
24013 23:01:26.329777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344 RESULT=skip
24015 23:01:26.361179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip>
24016 23:01:26.361636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344 RESULT=skip
24018 23:01:26.393007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip>
24019 23:01:26.393411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344 RESULT=skip
24021 23:01:26.424754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 RESULT=pass
24023 23:01:26.425204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3360 RESULT=pass>
24024 23:01:26.458141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip>
24025 23:01:26.458572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360 RESULT=skip
24027 23:01:26.491580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip>
24028 23:01:26.492026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360 RESULT=skip
24030 23:01:26.527025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip
24032 23:01:26.527471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360 RESULT=skip>
24033 23:01:26.561111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 RESULT=pass>
24034 23:01:26.561537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3376 RESULT=pass
24036 23:01:26.596573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip>
24037 23:01:26.597037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376 RESULT=skip
24039 23:01:26.631338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip
24041 23:01:26.631968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376 RESULT=skip>
24042 23:01:26.663212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip>
24043 23:01:26.663710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376 RESULT=skip
24045 23:01:26.694652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 RESULT=pass>
24046 23:01:26.695106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3392 RESULT=pass
24048 23:01:26.725884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip
24050 23:01:26.726460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392 RESULT=skip>
24051 23:01:26.756962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip>
24052 23:01:26.757398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392 RESULT=skip
24054 23:01:26.788473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip
24056 23:01:26.789055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392 RESULT=skip>
24057 23:01:26.819479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 RESULT=pass
24059 23:01:26.820051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3408 RESULT=pass>
24060 23:01:26.852043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip
24062 23:01:26.852646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408 RESULT=skip>
24063 23:01:26.883443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip>
24064 23:01:26.883904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408 RESULT=skip
24066 23:01:26.915239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip
24068 23:01:26.915690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408 RESULT=skip>
24069 23:01:26.946708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 RESULT=pass>
24070 23:01:26.947130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3424 RESULT=pass
24072 23:01:26.978045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip
24074 23:01:26.978611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424 RESULT=skip>
24075 23:01:27.009952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip>
24076 23:01:27.010440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424 RESULT=skip
24078 23:01:27.041974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip
24080 23:01:27.042578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424 RESULT=skip>
24081 23:01:27.072626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 RESULT=pass>
24082 23:01:27.073079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3440 RESULT=pass
24084 23:01:27.103673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip
24086 23:01:27.104230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440 RESULT=skip>
24087 23:01:27.136088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip
24089 23:01:27.136532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440 RESULT=skip>
24090 23:01:27.168087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip
24092 23:01:27.168524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440 RESULT=skip>
24093 23:01:27.199795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 RESULT=pass
24095 23:01:27.200245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3456 RESULT=pass>
24096 23:01:27.233683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip>
24097 23:01:27.234158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456 RESULT=skip
24099 23:01:27.267215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip>
24100 23:01:27.267679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456 RESULT=skip
24102 23:01:27.302938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip>
24103 23:01:27.303402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456 RESULT=skip
24105 23:01:27.338228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 RESULT=pass>
24106 23:01:27.338635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3472 RESULT=pass
24108 23:01:27.371651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip
24110 23:01:27.372259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472 RESULT=skip>
24111 23:01:27.406912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip>
24112 23:01:27.407383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472 RESULT=skip
24114 23:01:27.440578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip
24116 23:01:27.441197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472 RESULT=skip>
24117 23:01:27.474461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 RESULT=pass
24119 23:01:27.475190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3488 RESULT=pass>
24120 23:01:27.505948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip>
24121 23:01:27.506493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488 RESULT=skip
24123 23:01:27.537839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip>
24124 23:01:27.538254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488 RESULT=skip
24126 23:01:27.570871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip>
24127 23:01:27.571227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488 RESULT=skip
24129 23:01:27.604361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 RESULT=pass
24131 23:01:27.604895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3504 RESULT=pass>
24132 23:01:27.644742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip>
24133 23:01:27.645232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504 RESULT=skip
24135 23:01:27.685300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip
24137 23:01:27.685887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504 RESULT=skip>
24138 23:01:27.717535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip
24140 23:01:27.718125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504 RESULT=skip>
24141 23:01:27.750959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 RESULT=pass
24143 23:01:27.751519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3520 RESULT=pass>
24144 23:01:27.782138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip>
24145 23:01:27.782608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520 RESULT=skip
24147 23:01:27.813225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip
24149 23:01:27.813871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520 RESULT=skip>
24150 23:01:27.844953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip
24152 23:01:27.845495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520 RESULT=skip>
24153 23:01:27.875779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 RESULT=pass
24155 23:01:27.876321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3536 RESULT=pass>
24156 23:01:27.907310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip
24158 23:01:27.907848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536 RESULT=skip>
24159 23:01:27.938853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip>
24160 23:01:27.939296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536 RESULT=skip
24162 23:01:27.969644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip>
24163 23:01:27.970098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536 RESULT=skip
24165 23:01:28.001521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 RESULT=pass
24167 23:01:28.002075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3552 RESULT=pass>
24168 23:01:28.032674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip>
24169 23:01:28.033124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552 RESULT=skip
24171 23:01:28.077904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip>
24172 23:01:28.078362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552 RESULT=skip
24174 23:01:28.119299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip>
24175 23:01:28.119787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552 RESULT=skip
24177 23:01:28.154275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 RESULT=pass>
24178 23:01:28.154679 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3568 RESULT=pass
24180 23:01:28.188782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip>
24181 23:01:28.189184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568 RESULT=skip
24183 23:01:28.220885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip>
24184 23:01:28.221270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568 RESULT=skip
24186 23:01:28.253711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip
24188 23:01:28.254247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568 RESULT=skip>
24189 23:01:28.285673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 RESULT=pass>
24190 23:01:28.286149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3584 RESULT=pass
24192 23:01:28.318239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip
24194 23:01:28.318840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584 RESULT=skip>
24195 23:01:28.349768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip
24197 23:01:28.350307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584 RESULT=skip>
24198 23:01:28.381832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip>
24199 23:01:28.382295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584 RESULT=skip
24201 23:01:28.414038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 RESULT=pass
24203 23:01:28.414483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3600 RESULT=pass>
24204 23:01:28.445181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip>
24205 23:01:28.445642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600 RESULT=skip
24207 23:01:28.477115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip>
24208 23:01:28.477551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600 RESULT=skip
24210 23:01:28.508811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip>
24211 23:01:28.509211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600 RESULT=skip
24213 23:01:28.539660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 RESULT=pass
24215 23:01:28.540119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3616 RESULT=pass>
24216 23:01:28.570630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip>
24217 23:01:28.571038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616 RESULT=skip
24219 23:01:28.601820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip
24221 23:01:28.602268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616 RESULT=skip>
24222 23:01:28.633796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip>
24223 23:01:28.634242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616 RESULT=skip
24225 23:01:28.665369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 RESULT=pass
24227 23:01:28.665797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3632 RESULT=pass>
24228 23:01:28.697064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip>
24229 23:01:28.697496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632 RESULT=skip
24231 23:01:28.728833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip>
24232 23:01:28.729273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632 RESULT=skip
24234 23:01:28.760706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip>
24235 23:01:28.761135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632 RESULT=skip
24237 23:01:28.792929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 RESULT=pass
24239 23:01:28.793457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3648 RESULT=pass>
24240 23:01:28.824714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip>
24241 23:01:28.825142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648 RESULT=skip
24243 23:01:28.856342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip>
24244 23:01:28.856769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648 RESULT=skip
24246 23:01:28.888006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip
24248 23:01:28.888531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648 RESULT=skip>
24249 23:01:28.919267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 RESULT=pass
24251 23:01:28.919795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3664 RESULT=pass>
24252 23:01:28.950547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip
24254 23:01:28.951152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664 RESULT=skip>
24255 23:01:28.981378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip>
24256 23:01:28.981852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664 RESULT=skip
24258 23:01:29.012947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip>
24259 23:01:29.013398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664 RESULT=skip
24261 23:01:29.044697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 RESULT=pass>
24262 23:01:29.045129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3680 RESULT=pass
24264 23:01:29.076325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip
24266 23:01:29.076934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680 RESULT=skip>
24267 23:01:29.107206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip>
24268 23:01:29.107640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680 RESULT=skip
24270 23:01:29.138371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip
24272 23:01:29.138955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680 RESULT=skip>
24273 23:01:29.169236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 RESULT=pass>
24274 23:01:29.169702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3696 RESULT=pass
24276 23:01:29.201206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip>
24277 23:01:29.201663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696 RESULT=skip
24279 23:01:29.233176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip
24281 23:01:29.233742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696 RESULT=skip>
24282 23:01:29.264343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip>
24283 23:01:29.264804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696 RESULT=skip
24285 23:01:29.295296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 RESULT=pass
24287 23:01:29.295843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3712 RESULT=pass>
24288 23:01:29.326093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip>
24289 23:01:29.326562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712 RESULT=skip
24291 23:01:29.356964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip>
24292 23:01:29.357405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712 RESULT=skip
24294 23:01:29.388920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip
24296 23:01:29.389358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712 RESULT=skip>
24297 23:01:29.419529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 RESULT=pass>
24298 23:01:29.420017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3728 RESULT=pass
24300 23:01:29.451651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip>
24301 23:01:29.452050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728 RESULT=skip
24303 23:01:29.483386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip>
24304 23:01:29.483853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728 RESULT=skip
24306 23:01:29.514967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip>
24307 23:01:29.515400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728 RESULT=skip
24309 23:01:29.546551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 RESULT=pass>
24310 23:01:29.546982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3744 RESULT=pass
24312 23:01:29.578082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip>
24313 23:01:29.578505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744 RESULT=skip
24315 23:01:29.609717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip>
24316 23:01:29.610156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744 RESULT=skip
24318 23:01:29.641287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip>
24319 23:01:29.641958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744 RESULT=skip
24321 23:01:29.673276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 RESULT=pass
24323 23:01:29.673885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3760 RESULT=pass>
24324 23:01:29.704794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip
24326 23:01:29.705381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760 RESULT=skip>
24327 23:01:29.737046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip>
24328 23:01:29.737504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760 RESULT=skip
24330 23:01:29.769166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip
24332 23:01:29.769782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760 RESULT=skip>
24333 23:01:29.801786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 RESULT=pass>
24334 23:01:29.802183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3776 RESULT=pass
24336 23:01:29.835178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip>
24337 23:01:29.835598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776 RESULT=skip
24339 23:01:29.868168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip
24341 23:01:29.868609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776 RESULT=skip>
24342 23:01:29.900865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip>
24343 23:01:29.901271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776 RESULT=skip
24345 23:01:29.932893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 RESULT=pass
24347 23:01:29.933334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3792 RESULT=pass>
24348 23:01:29.965273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip
24350 23:01:29.965723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792 RESULT=skip>
24351 23:01:29.997214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip
24353 23:01:29.997779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792 RESULT=skip>
24354 23:01:30.028786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip>
24355 23:01:30.029238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792 RESULT=skip
24357 23:01:30.061272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 RESULT=pass
24359 23:01:30.061826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3808 RESULT=pass>
24360 23:01:30.092716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip
24362 23:01:30.093339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808 RESULT=skip>
24363 23:01:30.123783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip>
24364 23:01:30.124231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808 RESULT=skip
24366 23:01:30.155505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip>
24367 23:01:30.155980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808 RESULT=skip
24369 23:01:30.187049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 RESULT=pass
24371 23:01:30.187635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3824 RESULT=pass>
24372 23:01:30.218372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip
24374 23:01:30.218910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824 RESULT=skip>
24375 23:01:30.250483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip
24377 23:01:30.251024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824 RESULT=skip>
24378 23:01:30.281904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip
24380 23:01:30.282441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824 RESULT=skip>
24381 23:01:30.313374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 RESULT=pass
24383 23:01:30.313821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3840 RESULT=pass>
24384 23:01:30.345034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip>
24385 23:01:30.345500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840 RESULT=skip
24387 23:01:30.378458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip
24389 23:01:30.379099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840 RESULT=skip>
24390 23:01:30.410958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip>
24391 23:01:30.411404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840 RESULT=skip
24393 23:01:30.445602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 RESULT=pass
24395 23:01:30.446167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3856 RESULT=pass>
24396 23:01:30.482453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip
24398 23:01:30.482952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856 RESULT=skip>
24399 23:01:30.517145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip>
24400 23:01:30.517616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856 RESULT=skip
24402 23:01:30.552085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip
24404 23:01:30.552675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856 RESULT=skip>
24405 23:01:30.583904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 RESULT=pass
24407 23:01:30.584460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3872 RESULT=pass>
24408 23:01:30.617455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip>
24409 23:01:30.617937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872 RESULT=skip
24411 23:01:30.650187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip
24413 23:01:30.650842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872 RESULT=skip>
24414 23:01:30.681721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip
24416 23:01:30.682347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872 RESULT=skip>
24417 23:01:30.713036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 RESULT=pass>
24418 23:01:30.713511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3888 RESULT=pass
24420 23:01:30.744990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip>
24421 23:01:30.745462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888 RESULT=skip
24423 23:01:30.778522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip>
24424 23:01:30.778987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888 RESULT=skip
24426 23:01:30.812701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip>
24427 23:01:30.813218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888 RESULT=skip
24429 23:01:30.861614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 RESULT=pass
24431 23:01:30.862077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3904 RESULT=pass>
24432 23:01:30.898523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip>
24433 23:01:30.898945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904 RESULT=skip
24435 23:01:30.934911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip>
24436 23:01:30.935346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904 RESULT=skip
24438 23:01:30.970971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip>
24439 23:01:30.971414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904 RESULT=skip
24441 23:01:31.008975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 RESULT=pass
24443 23:01:31.009735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3920 RESULT=pass>
24444 23:01:31.058136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip
24446 23:01:31.058874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920 RESULT=skip>
24447 23:01:31.094377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip>
24448 23:01:31.094758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920 RESULT=skip
24450 23:01:31.131332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip>
24451 23:01:31.131758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920 RESULT=skip
24453 23:01:31.169506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 RESULT=pass
24455 23:01:31.169973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3936 RESULT=pass>
24456 23:01:31.205521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip
24458 23:01:31.205982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936 RESULT=skip>
24459 23:01:31.241653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip>
24460 23:01:31.242069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936 RESULT=skip
24462 23:01:31.278106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip>
24463 23:01:31.278578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936 RESULT=skip
24465 23:01:31.312665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 RESULT=pass>
24466 23:01:31.313100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3952 RESULT=pass
24468 23:01:31.347029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip>
24469 23:01:31.347444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952 RESULT=skip
24471 23:01:31.382433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip>
24472 23:01:31.382852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952 RESULT=skip
24474 23:01:31.417223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip>
24475 23:01:31.417632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952 RESULT=skip
24477 23:01:31.451506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 RESULT=pass>
24478 23:01:31.451928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3968 RESULT=pass
24480 23:01:31.486662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip>
24481 23:01:31.487124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968 RESULT=skip
24483 23:01:31.521740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip>
24484 23:01:31.522219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968 RESULT=skip
24486 23:01:31.557783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip>
24487 23:01:31.558234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968 RESULT=skip
24489 23:01:31.593098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 RESULT=pass>
24490 23:01:31.593572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_3984 RESULT=pass
24492 23:01:31.628986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip>
24493 23:01:31.629442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984 RESULT=skip
24495 23:01:31.664767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip>
24496 23:01:31.665181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984 RESULT=skip
24498 23:01:31.700120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip
24500 23:01:31.700574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984 RESULT=skip>
24501 23:01:31.735238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 RESULT=pass>
24502 23:01:31.735678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4000 RESULT=pass
24504 23:01:31.770190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip>
24505 23:01:31.770556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000 RESULT=skip
24507 23:01:31.804959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip>
24508 23:01:31.805302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000 RESULT=skip
24510 23:01:31.840076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip
24512 23:01:31.840497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000 RESULT=skip>
24513 23:01:31.875255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 RESULT=pass>
24514 23:01:31.875598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4016 RESULT=pass
24516 23:01:31.912887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip
24518 23:01:31.913404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016 RESULT=skip>
24519 23:01:31.945695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip
24521 23:01:31.946258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016 RESULT=skip>
24522 23:01:31.977789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip>
24523 23:01:31.978236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016 RESULT=skip
24525 23:01:32.010318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 RESULT=pass>
24526 23:01:32.010725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4032 RESULT=pass
24528 23:01:32.042440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip
24530 23:01:32.043067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032 RESULT=skip>
24531 23:01:32.073864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip>
24532 23:01:32.074308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032 RESULT=skip
24534 23:01:32.105124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip>
24535 23:01:32.105570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032 RESULT=skip
24537 23:01:32.136603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 RESULT=pass
24539 23:01:32.137153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4048 RESULT=pass>
24540 23:01:32.167765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip
24542 23:01:32.168304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048 RESULT=skip>
24543 23:01:32.199368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip
24545 23:01:32.199910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048 RESULT=skip>
24546 23:01:32.231975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip
24548 23:01:32.232540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048 RESULT=skip>
24549 23:01:32.264980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 RESULT=pass>
24550 23:01:32.265444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4064 RESULT=pass
24552 23:01:32.296948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip
24554 23:01:32.297499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064 RESULT=skip>
24555 23:01:32.328902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip>
24556 23:01:32.329334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064 RESULT=skip
24558 23:01:32.361161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip
24560 23:01:32.361714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064 RESULT=skip>
24561 23:01:32.392521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 RESULT=pass>
24562 23:01:32.392967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4080 RESULT=pass
24564 23:01:32.423559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip>
24565 23:01:32.424018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080 RESULT=skip
24567 23:01:32.456304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip>
24568 23:01:32.456770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080 RESULT=skip
24570 23:01:32.487771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip
24572 23:01:32.488319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080 RESULT=skip>
24573 23:01:32.518805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 RESULT=pass>
24574 23:01:32.519221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4096 RESULT=pass
24576 23:01:32.550573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip>
24577 23:01:32.550996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096 RESULT=skip
24579 23:01:32.582476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip>
24580 23:01:32.582954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096 RESULT=skip
24582 23:01:32.616810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip>
24583 23:01:32.617290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096 RESULT=skip
24585 23:01:32.649226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 RESULT=pass
24587 23:01:32.649829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4112 RESULT=pass>
24588 23:01:32.681507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip>
24589 23:01:32.681941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112 RESULT=skip
24591 23:01:32.715061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip
24593 23:01:32.715623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112 RESULT=skip>
24594 23:01:32.746875 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip>
24595 23:01:32.747314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112 RESULT=skip
24597 23:01:32.778772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 RESULT=pass
24599 23:01:32.779319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4128 RESULT=pass>
24600 23:01:32.810192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip>
24601 23:01:32.810633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128 RESULT=skip
24603 23:01:32.842143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip>
24604 23:01:32.842622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128 RESULT=skip
24606 23:01:32.874233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip>
24607 23:01:32.874690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128 RESULT=skip
24609 23:01:32.906282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 RESULT=pass>
24610 23:01:32.906792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4144 RESULT=pass
24612 23:01:32.938509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip
24614 23:01:32.939067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144 RESULT=skip>
24615 23:01:32.970526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip
24617 23:01:32.971077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144 RESULT=skip>
24618 23:01:33.002713 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip
24620 23:01:33.003237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144 RESULT=skip>
24621 23:01:33.034952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 RESULT=pass>
24622 23:01:33.035393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4160 RESULT=pass
24624 23:01:33.067203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip>
24625 23:01:33.067643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160 RESULT=skip
24627 23:01:33.099223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip>
24628 23:01:33.099663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160 RESULT=skip
24630 23:01:33.131276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip>
24631 23:01:33.131708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160 RESULT=skip
24633 23:01:33.163535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 RESULT=pass
24635 23:01:33.164062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4176 RESULT=pass>
24636 23:01:33.219244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip
24638 23:01:33.219867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176 RESULT=skip>
24639 23:01:33.252271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip>
24640 23:01:33.252734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176 RESULT=skip
24642 23:01:33.284793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip>
24643 23:01:33.285256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176 RESULT=skip
24645 23:01:33.319417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 RESULT=pass>
24646 23:01:33.319893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4192 RESULT=pass
24648 23:01:33.351269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip>
24649 23:01:33.351720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192 RESULT=skip
24651 23:01:33.383679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip>
24652 23:01:33.384138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192 RESULT=skip
24654 23:01:33.415242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip>
24655 23:01:33.415707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192 RESULT=skip
24657 23:01:33.446301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 RESULT=pass>
24658 23:01:33.446768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4208 RESULT=pass
24660 23:01:33.477298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip>
24661 23:01:33.477739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208 RESULT=skip
24663 23:01:33.509665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip>
24664 23:01:33.510100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208 RESULT=skip
24666 23:01:33.541192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip>
24667 23:01:33.541609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208 RESULT=skip
24669 23:01:33.572916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 RESULT=pass>
24670 23:01:33.573374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4224 RESULT=pass
24672 23:01:33.603999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip
24674 23:01:33.604433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224 RESULT=skip>
24675 23:01:33.636721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip>
24676 23:01:33.637154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224 RESULT=skip
24678 23:01:33.669024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip>
24679 23:01:33.669461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224 RESULT=skip
24681 23:01:33.700097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 RESULT=pass
24683 23:01:33.700684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4240 RESULT=pass>
24684 23:01:33.731577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip>
24685 23:01:33.731997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240 RESULT=skip
24687 23:01:33.763586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip>
24688 23:01:33.764061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240 RESULT=skip
24690 23:01:33.798099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip>
24691 23:01:33.798443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240 RESULT=skip
24693 23:01:33.832982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 RESULT=pass>
24694 23:01:33.833407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4256 RESULT=pass
24696 23:01:33.868032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip
24698 23:01:33.868672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256 RESULT=skip>
24699 23:01:33.903987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip
24701 23:01:33.904434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256 RESULT=skip>
24702 23:01:33.939012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip>
24703 23:01:33.939435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256 RESULT=skip
24705 23:01:33.973665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 RESULT=pass>
24706 23:01:33.974046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4272 RESULT=pass
24708 23:01:34.008704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip>
24709 23:01:34.009059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272 RESULT=skip
24711 23:01:34.043139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip>
24712 23:01:34.043491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272 RESULT=skip
24714 23:01:34.079700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip>
24715 23:01:34.080054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272 RESULT=skip
24717 23:01:34.117526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 RESULT=pass
24719 23:01:34.117980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4288 RESULT=pass>
24720 23:01:34.154175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip>
24721 23:01:34.154546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288 RESULT=skip
24723 23:01:34.190628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip>
24724 23:01:34.190989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288 RESULT=skip
24726 23:01:34.227154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip>
24727 23:01:34.227497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288 RESULT=skip
24729 23:01:34.263350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 RESULT=pass>
24730 23:01:34.263695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4304 RESULT=pass
24732 23:01:34.300952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip>
24733 23:01:34.301404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304 RESULT=skip
24735 23:01:34.338585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip>
24736 23:01:34.339065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304 RESULT=skip
24738 23:01:34.372877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip>
24739 23:01:34.373296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304 RESULT=skip
24741 23:01:34.408181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 RESULT=pass
24743 23:01:34.408926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4320 RESULT=pass>
24744 23:01:34.442820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip>
24745 23:01:34.443277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320 RESULT=skip
24747 23:01:34.477096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip>
24748 23:01:34.477549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320 RESULT=skip
24750 23:01:34.511675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip>
24751 23:01:34.512143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320 RESULT=skip
24753 23:01:34.547561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 RESULT=pass
24755 23:01:34.548139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4336 RESULT=pass>
24756 23:01:34.583479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip
24758 23:01:34.584099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336 RESULT=skip>
24759 23:01:34.618776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip
24761 23:01:34.619398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336 RESULT=skip>
24762 23:01:34.652600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip
24764 23:01:34.653074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336 RESULT=skip>
24765 23:01:34.685009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 RESULT=pass>
24766 23:01:34.685474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4352 RESULT=pass
24768 23:01:34.719753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip>
24769 23:01:34.720212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352 RESULT=skip
24771 23:01:34.753353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip>
24772 23:01:34.753741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352 RESULT=skip
24774 23:01:34.786675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip>
24775 23:01:34.787082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352 RESULT=skip
24777 23:01:34.820435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 RESULT=pass
24779 23:01:34.821073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4368 RESULT=pass>
24780 23:01:34.854204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip>
24781 23:01:34.854661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368 RESULT=skip
24783 23:01:34.885978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip>
24784 23:01:34.886420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368 RESULT=skip
24786 23:01:34.917519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip>
24787 23:01:34.917972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368 RESULT=skip
24789 23:01:34.948676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 RESULT=pass>
24790 23:01:34.949118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4384 RESULT=pass
24792 23:01:34.980331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip>
24793 23:01:34.980759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384 RESULT=skip
24795 23:01:35.011710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip>
24796 23:01:35.012095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384 RESULT=skip
24798 23:01:35.043226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip>
24799 23:01:35.043611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384 RESULT=skip
24801 23:01:35.074513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 RESULT=pass>
24802 23:01:35.074938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4400 RESULT=pass
24804 23:01:35.105486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip>
24805 23:01:35.105938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400 RESULT=skip
24807 23:01:35.136947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip>
24808 23:01:35.137451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400 RESULT=skip
24810 23:01:35.167992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip
24812 23:01:35.168569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400 RESULT=skip>
24813 23:01:35.200471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 RESULT=pass>
24814 23:01:35.200933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4416 RESULT=pass
24816 23:01:35.231600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip
24818 23:01:35.232296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416 RESULT=skip>
24819 23:01:35.263171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip
24821 23:01:35.263865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416 RESULT=skip>
24822 23:01:35.294443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip>
24823 23:01:35.294901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416 RESULT=skip
24825 23:01:35.325721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 RESULT=pass
24827 23:01:35.326271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4432 RESULT=pass>
24828 23:01:35.357090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip>
24829 23:01:35.357550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432 RESULT=skip
24831 23:01:35.389551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip
24833 23:01:35.390196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432 RESULT=skip>
24834 23:01:35.421319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip
24836 23:01:35.421952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432 RESULT=skip>
24837 23:01:35.454642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 RESULT=pass>
24838 23:01:35.455220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4448 RESULT=pass
24840 23:01:35.486395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip>
24841 23:01:35.486826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448 RESULT=skip
24843 23:01:35.521822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip>
24844 23:01:35.522312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448 RESULT=skip
24846 23:01:35.561773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip>
24847 23:01:35.562207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448 RESULT=skip
24849 23:01:35.596779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 RESULT=pass>
24850 23:01:35.597139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4464 RESULT=pass
24852 23:01:35.631187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip>
24853 23:01:35.631529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464 RESULT=skip
24855 23:01:35.666702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip>
24856 23:01:35.667131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464 RESULT=skip
24858 23:01:35.701879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip>
24859 23:01:35.702297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464 RESULT=skip
24861 23:01:35.734155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 RESULT=pass
24863 23:01:35.734715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4480 RESULT=pass>
24864 23:01:35.766736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip>
24865 23:01:35.767220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480 RESULT=skip
24867 23:01:35.798593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip>
24868 23:01:35.799035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480 RESULT=skip
24870 23:01:35.830557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip
24872 23:01:35.831009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480 RESULT=skip>
24873 23:01:35.862235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 RESULT=pass
24875 23:01:35.862681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4496 RESULT=pass>
24876 23:01:35.893452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip
24878 23:01:35.893926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496 RESULT=skip>
24879 23:01:35.925054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip>
24880 23:01:35.925471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496 RESULT=skip
24882 23:01:35.957184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip
24884 23:01:35.957664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496 RESULT=skip>
24885 23:01:35.991439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 RESULT=pass
24887 23:01:35.992063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4512 RESULT=pass>
24888 23:01:36.022995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip>
24889 23:01:36.023461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512 RESULT=skip
24891 23:01:36.054615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip>
24892 23:01:36.054996 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512 RESULT=skip
24894 23:01:36.085958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip>
24895 23:01:36.086362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512 RESULT=skip
24897 23:01:36.117458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 RESULT=pass
24899 23:01:36.118012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4528 RESULT=pass>
24900 23:01:36.148520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip>
24901 23:01:36.148976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528 RESULT=skip
24903 23:01:36.180722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip>
24904 23:01:36.181185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528 RESULT=skip
24906 23:01:36.212104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip
24908 23:01:36.212708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528 RESULT=skip>
24909 23:01:36.245845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 RESULT=pass>
24910 23:01:36.246220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4544 RESULT=pass
24912 23:01:36.277739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip>
24913 23:01:36.278194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544 RESULT=skip
24915 23:01:36.309685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip
24917 23:01:36.310239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544 RESULT=skip>
24918 23:01:36.341785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip>
24919 23:01:36.342241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544 RESULT=skip
24921 23:01:36.373553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 RESULT=pass
24923 23:01:36.374102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4560 RESULT=pass>
24924 23:01:36.405163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip>
24925 23:01:36.405588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560 RESULT=skip
24927 23:01:36.436711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip>
24928 23:01:36.437159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560 RESULT=skip
24930 23:01:36.468353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip>
24931 23:01:36.468794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560 RESULT=skip
24933 23:01:36.511405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 RESULT=pass>
24934 23:01:36.511871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4576 RESULT=pass
24936 23:01:36.548116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip
24938 23:01:36.548679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576 RESULT=skip>
24939 23:01:36.599406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip>
24940 23:01:36.599844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576 RESULT=skip
24942 23:01:36.640084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip
24944 23:01:36.640525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576 RESULT=skip>
24945 23:01:36.678506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 RESULT=pass
24947 23:01:36.679157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4592 RESULT=pass>
24948 23:01:36.711438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip
24950 23:01:36.711813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592 RESULT=skip>
24951 23:01:36.743963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip
24953 23:01:36.744360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592 RESULT=skip>
24954 23:01:36.776534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip>
24955 23:01:36.776981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592 RESULT=skip
24957 23:01:36.807963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 RESULT=pass
24959 23:01:36.808517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4608 RESULT=pass>
24960 23:01:36.839952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip
24962 23:01:36.840410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608 RESULT=skip>
24963 23:01:36.875731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip
24965 23:01:36.876203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608 RESULT=skip>
24966 23:01:36.910905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip>
24967 23:01:36.911322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608 RESULT=skip
24969 23:01:36.944850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 RESULT=pass>
24970 23:01:36.945290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4624 RESULT=pass
24972 23:01:36.978810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip>
24973 23:01:36.979247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624 RESULT=skip
24975 23:01:37.013110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip>
24976 23:01:37.013564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624 RESULT=skip
24978 23:01:37.047617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip>
24979 23:01:37.048009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624 RESULT=skip
24981 23:01:37.081734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 RESULT=pass>
24982 23:01:37.082173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4640 RESULT=pass
24984 23:01:37.115637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip>
24985 23:01:37.116059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640 RESULT=skip
24987 23:01:37.149718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip
24989 23:01:37.150343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640 RESULT=skip>
24990 23:01:37.181914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip>
24991 23:01:37.182395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640 RESULT=skip
24993 23:01:37.213477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 RESULT=pass>
24994 23:01:37.213983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4656 RESULT=pass
24996 23:01:37.246589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip
24998 23:01:37.247154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656 RESULT=skip>
24999 23:01:37.279399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip
25001 23:01:37.279965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656 RESULT=skip>
25002 23:01:37.313088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip>
25003 23:01:37.313569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656 RESULT=skip
25005 23:01:37.346191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 RESULT=pass>
25006 23:01:37.346663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4672 RESULT=pass
25008 23:01:37.378387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip>
25009 23:01:37.378850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672 RESULT=skip
25011 23:01:37.411019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip>
25012 23:01:37.411469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672 RESULT=skip
25014 23:01:37.447404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip>
25015 23:01:37.447931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672 RESULT=skip
25017 23:01:37.482655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 RESULT=pass
25019 23:01:37.483391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4688 RESULT=pass>
25020 23:01:37.517481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip>
25021 23:01:37.517975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688 RESULT=skip
25023 23:01:37.556625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip
25025 23:01:37.556992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688 RESULT=skip>
25026 23:01:37.590057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip
25028 23:01:37.590626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688 RESULT=skip>
25029 23:01:37.625465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 RESULT=pass
25031 23:01:37.626118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4704 RESULT=pass>
25032 23:01:37.663540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip
25034 23:01:37.664026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704 RESULT=skip>
25035 23:01:37.697368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip>
25036 23:01:37.697859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704 RESULT=skip
25038 23:01:37.731023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip
25040 23:01:37.731494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704 RESULT=skip>
25041 23:01:37.764259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 RESULT=pass>
25042 23:01:37.764760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4720 RESULT=pass
25044 23:01:37.797187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip
25046 23:01:37.797779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720 RESULT=skip>
25047 23:01:37.830073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip>
25048 23:01:37.830567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720 RESULT=skip
25050 23:01:37.865249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip
25052 23:01:37.866018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720 RESULT=skip>
25053 23:01:37.897302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 RESULT=pass
25055 23:01:37.898046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4736 RESULT=pass>
25056 23:01:37.929696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip>
25057 23:01:37.930154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736 RESULT=skip
25059 23:01:37.961467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip>
25060 23:01:37.961871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736 RESULT=skip
25062 23:01:37.993256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip>
25063 23:01:37.993664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736 RESULT=skip
25065 23:01:38.024795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 RESULT=pass>
25066 23:01:38.025217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4752 RESULT=pass
25068 23:01:38.056709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip
25070 23:01:38.057179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752 RESULT=skip>
25071 23:01:38.089420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip>
25072 23:01:38.089846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752 RESULT=skip
25074 23:01:38.122456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip
25076 23:01:38.122917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752 RESULT=skip>
25077 23:01:38.154213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 RESULT=pass
25079 23:01:38.154665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4768 RESULT=pass>
25080 23:01:38.185564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip>
25081 23:01:38.186039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768 RESULT=skip
25083 23:01:38.217357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip>
25084 23:01:38.217766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768 RESULT=skip
25086 23:01:38.249429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip>
25087 23:01:38.249851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768 RESULT=skip
25089 23:01:38.281259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 RESULT=pass>
25090 23:01:38.281688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4784 RESULT=pass
25092 23:01:38.337117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip>
25093 23:01:38.337580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784 RESULT=skip
25095 23:01:38.369088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip
25097 23:01:38.369782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784 RESULT=skip>
25098 23:01:38.400858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip>
25099 23:01:38.401296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784 RESULT=skip
25101 23:01:38.434366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 RESULT=pass
25103 23:01:38.434839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4800 RESULT=pass>
25104 23:01:38.466214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip>
25105 23:01:38.466683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800 RESULT=skip
25107 23:01:38.497803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip>
25108 23:01:38.498260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800 RESULT=skip
25110 23:01:38.531369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip
25112 23:01:38.531941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800 RESULT=skip>
25113 23:01:38.563010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 RESULT=pass>
25114 23:01:38.563478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4816 RESULT=pass
25116 23:01:38.597013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip>
25117 23:01:38.597451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816 RESULT=skip
25119 23:01:38.629251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip>
25120 23:01:38.629692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816 RESULT=skip
25122 23:01:38.661680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip>
25123 23:01:38.662152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816 RESULT=skip
25125 23:01:38.694515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 RESULT=pass>
25126 23:01:38.694979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4832 RESULT=pass
25128 23:01:38.726284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip>
25129 23:01:38.726735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832 RESULT=skip
25131 23:01:38.758771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip>
25132 23:01:38.759224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832 RESULT=skip
25134 23:01:38.790212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip>
25135 23:01:38.790671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832 RESULT=skip
25137 23:01:38.821440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 RESULT=pass>
25138 23:01:38.821921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4848 RESULT=pass
25140 23:01:38.853053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip>
25141 23:01:38.853507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848 RESULT=skip
25143 23:01:38.886239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip
25145 23:01:38.886756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848 RESULT=skip>
25146 23:01:38.921125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip>
25147 23:01:38.921477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848 RESULT=skip
25149 23:01:38.956553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 RESULT=pass>
25150 23:01:38.956897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4864 RESULT=pass
25152 23:01:38.989805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip>
25153 23:01:38.990184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864 RESULT=skip
25155 23:01:39.021722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip>
25156 23:01:39.022137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864 RESULT=skip
25158 23:01:39.053710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip>
25159 23:01:39.054119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864 RESULT=skip
25161 23:01:39.085171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 RESULT=pass>
25162 23:01:39.085584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4880 RESULT=pass
25164 23:01:39.116939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip>
25165 23:01:39.117396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880 RESULT=skip
25167 23:01:39.150832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip>
25168 23:01:39.151290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880 RESULT=skip
25170 23:01:39.182558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip
25172 23:01:39.183167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880 RESULT=skip>
25173 23:01:39.213782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 RESULT=pass>
25174 23:01:39.214254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4896 RESULT=pass
25176 23:01:39.245967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip>
25177 23:01:39.246413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896 RESULT=skip
25179 23:01:39.277940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip>
25180 23:01:39.278399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896 RESULT=skip
25182 23:01:39.311309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip>
25183 23:01:39.311807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896 RESULT=skip
25185 23:01:39.346124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 RESULT=pass
25187 23:01:39.346663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4912 RESULT=pass>
25188 23:01:39.380712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip>
25189 23:01:39.381160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912 RESULT=skip
25191 23:01:39.420399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip
25193 23:01:39.421028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912 RESULT=skip>
25194 23:01:39.456479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip>
25195 23:01:39.456945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912 RESULT=skip
25197 23:01:39.497238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 RESULT=pass>
25198 23:01:39.497592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4928 RESULT=pass
25200 23:01:39.537083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip>
25201 23:01:39.537552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928 RESULT=skip
25203 23:01:39.571468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip
25205 23:01:39.572007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928 RESULT=skip>
25206 23:01:39.606502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip>
25207 23:01:39.606985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928 RESULT=skip
25209 23:01:39.639509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 RESULT=pass>
25210 23:01:39.639935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4944 RESULT=pass
25212 23:01:39.669988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip>
25213 23:01:39.670426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944 RESULT=skip
25215 23:01:39.703446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip>
25216 23:01:39.703911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944 RESULT=skip
25218 23:01:39.735405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip>
25219 23:01:39.735875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944 RESULT=skip
25221 23:01:39.767382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 RESULT=pass>
25222 23:01:39.767848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4960 RESULT=pass
25224 23:01:39.798343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip>
25225 23:01:39.798862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960 RESULT=skip
25227 23:01:39.829079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip>
25228 23:01:39.829630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960 RESULT=skip
25230 23:01:39.859942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip
25232 23:01:39.860396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960 RESULT=skip>
25233 23:01:39.890146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 RESULT=pass>
25234 23:01:39.890524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4976 RESULT=pass
25236 23:01:39.921272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip>
25237 23:01:39.921785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976 RESULT=skip
25239 23:01:39.953821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip>
25240 23:01:39.954258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976 RESULT=skip
25242 23:01:39.986659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip>
25243 23:01:39.987085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976 RESULT=skip
25245 23:01:40.019105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 RESULT=pass>
25246 23:01:40.019538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_4992 RESULT=pass
25248 23:01:40.051847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip
25250 23:01:40.052473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992 RESULT=skip>
25251 23:01:40.085060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip>
25252 23:01:40.085479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992 RESULT=skip
25254 23:01:40.119641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip>
25255 23:01:40.120189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992 RESULT=skip
25257 23:01:40.153606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 RESULT=pass
25259 23:01:40.154071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5008 RESULT=pass>
25260 23:01:40.187292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip
25262 23:01:40.187963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008 RESULT=skip>
25263 23:01:40.220702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip>
25264 23:01:40.221165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008 RESULT=skip
25266 23:01:40.253438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip>
25267 23:01:40.253934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008 RESULT=skip
25269 23:01:40.287913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 RESULT=pass
25271 23:01:40.288530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5024 RESULT=pass>
25272 23:01:40.322246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip
25274 23:01:40.322813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024 RESULT=skip>
25275 23:01:40.356490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip>
25276 23:01:40.356962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024 RESULT=skip
25278 23:01:40.396838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip>
25279 23:01:40.397278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024 RESULT=skip
25281 23:01:40.436592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 RESULT=pass>
25282 23:01:40.437033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5040 RESULT=pass
25284 23:01:40.479178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip
25286 23:01:40.479773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040 RESULT=skip>
25287 23:01:40.522296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip>
25288 23:01:40.522677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040 RESULT=skip
25290 23:01:40.565060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip>
25291 23:01:40.565455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040 RESULT=skip
25293 23:01:40.611285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 RESULT=pass>
25294 23:01:40.611698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5056 RESULT=pass
25296 23:01:40.659121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip>
25297 23:01:40.659523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056 RESULT=skip
25299 23:01:40.697411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip>
25300 23:01:40.697879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056 RESULT=skip
25302 23:01:40.731447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip>
25303 23:01:40.731928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056 RESULT=skip
25305 23:01:40.764652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 RESULT=pass
25307 23:01:40.765219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5072 RESULT=pass>
25308 23:01:40.798833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip
25310 23:01:40.799407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072 RESULT=skip>
25311 23:01:40.832425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip>
25312 23:01:40.832898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072 RESULT=skip
25314 23:01:40.870045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip>
25315 23:01:40.870502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072 RESULT=skip
25317 23:01:40.908967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 RESULT=pass>
25318 23:01:40.909526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5088 RESULT=pass
25320 23:01:40.941001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip
25322 23:01:40.941561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088 RESULT=skip>
25323 23:01:40.972908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip>
25324 23:01:40.973324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088 RESULT=skip
25326 23:01:41.005084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip>
25327 23:01:41.005536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088 RESULT=skip
25329 23:01:41.037143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 RESULT=pass>
25330 23:01:41.037566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5104 RESULT=pass
25332 23:01:41.069204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip>
25333 23:01:41.069619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104 RESULT=skip
25335 23:01:41.101613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip>
25336 23:01:41.102047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104 RESULT=skip
25338 23:01:41.134101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip
25340 23:01:41.134557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104 RESULT=skip>
25341 23:01:41.166460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 RESULT=pass>
25342 23:01:41.166867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5120 RESULT=pass
25344 23:01:41.198387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip
25346 23:01:41.198933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120 RESULT=skip>
25347 23:01:41.230548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip>
25348 23:01:41.231004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120 RESULT=skip
25350 23:01:41.264652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip
25352 23:01:41.265223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120 RESULT=skip>
25353 23:01:41.298128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 RESULT=pass>
25354 23:01:41.298618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5136 RESULT=pass
25356 23:01:41.330269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip
25358 23:01:41.330748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136 RESULT=skip>
25359 23:01:41.362645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip>
25360 23:01:41.363101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136 RESULT=skip
25362 23:01:41.395235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip
25364 23:01:41.395806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136 RESULT=skip>
25365 23:01:41.428150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 RESULT=pass
25367 23:01:41.428916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5152 RESULT=pass>
25368 23:01:41.460515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip>
25369 23:01:41.460929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152 RESULT=skip
25371 23:01:41.494103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip>
25372 23:01:41.494525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152 RESULT=skip
25374 23:01:41.527588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip
25376 23:01:41.528049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152 RESULT=skip>
25377 23:01:41.561507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 RESULT=pass>
25378 23:01:41.561935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5168 RESULT=pass
25380 23:01:41.597018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip>
25381 23:01:41.597440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168 RESULT=skip
25383 23:01:41.630024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip>
25384 23:01:41.630398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168 RESULT=skip
25386 23:01:41.662204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip>
25387 23:01:41.662560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168 RESULT=skip
25389 23:01:41.695104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 RESULT=pass>
25390 23:01:41.695496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5184 RESULT=pass
25392 23:01:41.727693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip>
25393 23:01:41.728158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184 RESULT=skip
25395 23:01:41.759369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip>
25396 23:01:41.759823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184 RESULT=skip
25398 23:01:41.792530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip>
25399 23:01:41.792933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184 RESULT=skip
25401 23:01:41.825042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 RESULT=pass>
25402 23:01:41.825486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5200 RESULT=pass
25404 23:01:41.857199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip>
25405 23:01:41.857674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200 RESULT=skip
25407 23:01:41.888585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip>
25408 23:01:41.889011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200 RESULT=skip
25410 23:01:41.924022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip
25412 23:01:41.924580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200 RESULT=skip>
25413 23:01:41.957181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 RESULT=pass>
25414 23:01:41.957607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5216 RESULT=pass
25416 23:01:41.989315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip>
25417 23:01:41.989743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216 RESULT=skip
25419 23:01:42.020890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip>
25420 23:01:42.021327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216 RESULT=skip
25422 23:01:42.052023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip
25424 23:01:42.052451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216 RESULT=skip>
25425 23:01:42.083555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 RESULT=pass
25427 23:01:42.083980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5232 RESULT=pass>
25428 23:01:42.115307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip>
25429 23:01:42.115737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232 RESULT=skip
25431 23:01:42.147533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip>
25432 23:01:42.147920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232 RESULT=skip
25434 23:01:42.180361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip>
25435 23:01:42.180751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232 RESULT=skip
25437 23:01:42.211614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 RESULT=pass>
25438 23:01:42.212107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5248 RESULT=pass
25440 23:01:42.243753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip
25442 23:01:42.244379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248 RESULT=skip>
25443 23:01:42.275729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip>
25444 23:01:42.276185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248 RESULT=skip
25446 23:01:42.310778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip
25448 23:01:42.311433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248 RESULT=skip>
25449 23:01:42.344038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 RESULT=pass
25451 23:01:42.344654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5264 RESULT=pass>
25452 23:01:42.377178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip>
25453 23:01:42.377656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264 RESULT=skip
25455 23:01:42.412554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip>
25456 23:01:42.413027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264 RESULT=skip
25458 23:01:42.449081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip>
25459 23:01:42.449572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264 RESULT=skip
25461 23:01:42.486697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 RESULT=pass>
25462 23:01:42.487147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5280 RESULT=pass
25464 23:01:42.522616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip>
25465 23:01:42.523081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280 RESULT=skip
25467 23:01:42.560018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip
25469 23:01:42.560475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280 RESULT=skip>
25470 23:01:42.597607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip
25472 23:01:42.598094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280 RESULT=skip>
25473 23:01:42.634836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 RESULT=pass
25475 23:01:42.635299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5296 RESULT=pass>
25476 23:01:42.671743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip
25478 23:01:42.672247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296 RESULT=skip>
25479 23:01:42.710069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip
25481 23:01:42.710671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296 RESULT=skip>
25482 23:01:42.747551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip
25484 23:01:42.748176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296 RESULT=skip>
25485 23:01:42.788815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 RESULT=pass>
25486 23:01:42.789287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5312 RESULT=pass
25488 23:01:42.826691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip
25490 23:01:42.827334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312 RESULT=skip>
25491 23:01:42.864945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip>
25492 23:01:42.865450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312 RESULT=skip
25494 23:01:42.902991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip>
25495 23:01:42.903502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312 RESULT=skip
25497 23:01:42.940860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 RESULT=pass>
25498 23:01:42.941312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5328 RESULT=pass
25500 23:01:42.978440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip
25502 23:01:42.979020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328 RESULT=skip>
25503 23:01:43.015803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip
25505 23:01:43.016396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328 RESULT=skip>
25506 23:01:43.053920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip
25508 23:01:43.054509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328 RESULT=skip>
25509 23:01:43.091530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 RESULT=pass>
25510 23:01:43.092015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5344 RESULT=pass
25512 23:01:43.129447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip>
25513 23:01:43.129941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344 RESULT=skip
25515 23:01:43.168063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip
25517 23:01:43.168660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344 RESULT=skip>
25518 23:01:43.204810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip>
25519 23:01:43.205279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344 RESULT=skip
25521 23:01:43.242072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 RESULT=pass>
25522 23:01:43.242582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5360 RESULT=pass
25524 23:01:43.278492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip>
25525 23:01:43.278970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360 RESULT=skip
25527 23:01:43.315891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip
25529 23:01:43.316395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360 RESULT=skip>
25530 23:01:43.353057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip
25532 23:01:43.353563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360 RESULT=skip>
25533 23:01:43.390538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 RESULT=pass>
25534 23:01:43.390994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5376 RESULT=pass
25536 23:01:43.445441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip
25538 23:01:43.446050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376 RESULT=skip>
25539 23:01:43.481735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip>
25540 23:01:43.482222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376 RESULT=skip
25542 23:01:43.514927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip>
25543 23:01:43.515419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376 RESULT=skip
25545 23:01:43.546936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 RESULT=pass>
25546 23:01:43.547365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5392 RESULT=pass
25548 23:01:43.579806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip
25550 23:01:43.580295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392 RESULT=skip>
25551 23:01:43.615781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip
25553 23:01:43.616590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392 RESULT=skip>
25554 23:01:43.650999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip>
25555 23:01:43.651471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392 RESULT=skip
25557 23:01:43.683225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 RESULT=pass
25559 23:01:43.683715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5408 RESULT=pass>
25560 23:01:43.715179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip>
25561 23:01:43.715565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408 RESULT=skip
25563 23:01:43.747859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip
25565 23:01:43.748334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408 RESULT=skip>
25566 23:01:43.796568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip
25568 23:01:43.797235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408 RESULT=skip>
25569 23:01:43.828390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 RESULT=pass
25571 23:01:43.829033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5424 RESULT=pass>
25572 23:01:43.859553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip
25574 23:01:43.860069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424 RESULT=skip>
25575 23:01:43.892045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip
25577 23:01:43.892690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424 RESULT=skip>
25578 23:01:43.924661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip
25580 23:01:43.925232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424 RESULT=skip>
25581 23:01:43.958171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 RESULT=pass
25583 23:01:43.958639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5440 RESULT=pass>
25584 23:01:43.991189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip
25586 23:01:43.991817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440 RESULT=skip>
25587 23:01:44.023651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip
25589 23:01:44.024233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440 RESULT=skip>
25590 23:01:44.055982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip
25592 23:01:44.056596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440 RESULT=skip>
25593 23:01:44.088963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 RESULT=pass>
25594 23:01:44.089419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5456 RESULT=pass
25596 23:01:44.121109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip
25598 23:01:44.121675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456 RESULT=skip>
25599 23:01:44.153114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip>
25600 23:01:44.153561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456 RESULT=skip
25602 23:01:44.184686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip>
25603 23:01:44.185146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456 RESULT=skip
25605 23:01:44.217105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 RESULT=pass>
25606 23:01:44.217518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5472 RESULT=pass
25608 23:01:44.248985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip>
25609 23:01:44.249392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472 RESULT=skip
25611 23:01:44.281054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip
25613 23:01:44.281509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472 RESULT=skip>
25614 23:01:44.314023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip>
25615 23:01:44.314494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472 RESULT=skip
25617 23:01:44.349418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 RESULT=pass>
25618 23:01:44.349906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5488 RESULT=pass
25620 23:01:44.381727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip>
25621 23:01:44.382196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488 RESULT=skip
25623 23:01:44.414542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip>
25624 23:01:44.414997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488 RESULT=skip
25626 23:01:44.446285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip>
25627 23:01:44.446694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488 RESULT=skip
25629 23:01:44.477591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 RESULT=pass
25631 23:01:44.478152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5504 RESULT=pass>
25632 23:01:44.509184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip>
25633 23:01:44.509709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504 RESULT=skip
25635 23:01:44.542371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip>
25636 23:01:44.542845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504 RESULT=skip
25638 23:01:44.574259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip>
25639 23:01:44.574722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504 RESULT=skip
25641 23:01:44.606496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 RESULT=pass>
25642 23:01:44.606893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5520 RESULT=pass
25644 23:01:44.638060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip
25646 23:01:44.638496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520 RESULT=skip>
25647 23:01:44.669469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip>
25648 23:01:44.669886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520 RESULT=skip
25650 23:01:44.700910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip>
25651 23:01:44.701310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520 RESULT=skip
25653 23:01:44.732474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 RESULT=pass>
25654 23:01:44.732881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5536 RESULT=pass
25656 23:01:44.764720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip
25658 23:01:44.765155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536 RESULT=skip>
25659 23:01:44.797599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip>
25660 23:01:44.798065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536 RESULT=skip
25662 23:01:44.830999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip>
25663 23:01:44.831427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536 RESULT=skip
25665 23:01:44.863067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 RESULT=pass
25667 23:01:44.863528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5552 RESULT=pass>
25668 23:01:44.894744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip>
25669 23:01:44.895196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552 RESULT=skip
25671 23:01:44.928935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip>
25672 23:01:44.929464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552 RESULT=skip
25674 23:01:44.965217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip
25676 23:01:44.965698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552 RESULT=skip>
25677 23:01:44.998311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 RESULT=pass>
25678 23:01:44.998690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5568 RESULT=pass
25680 23:01:45.030536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip
25682 23:01:45.030901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568 RESULT=skip>
25683 23:01:45.061723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip>
25684 23:01:45.062126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568 RESULT=skip
25686 23:01:45.094733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip>
25687 23:01:45.097196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568 RESULT=skip
25689 23:01:45.127427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 RESULT=pass
25691 23:01:45.128018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5584 RESULT=pass>
25692 23:01:45.159018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip
25694 23:01:45.159604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584 RESULT=skip>
25695 23:01:45.190560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip>
25696 23:01:45.191004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584 RESULT=skip
25698 23:01:45.222021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip
25700 23:01:45.222580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584 RESULT=skip>
25701 23:01:45.254836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 RESULT=pass
25703 23:01:45.255382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5600 RESULT=pass>
25704 23:01:45.287676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip>
25705 23:01:45.288121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600 RESULT=skip
25707 23:01:45.322567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip>
25708 23:01:45.323021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600 RESULT=skip
25710 23:01:45.354519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip>
25711 23:01:45.354971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600 RESULT=skip
25713 23:01:45.386527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 RESULT=pass>
25714 23:01:45.386979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5616 RESULT=pass
25716 23:01:45.421859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip>
25717 23:01:45.422400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616 RESULT=skip
25719 23:01:45.455966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip
25721 23:01:45.456308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616 RESULT=skip>
25722 23:01:45.494449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip>
25723 23:01:45.494840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616 RESULT=skip
25725 23:01:45.532419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 RESULT=pass>
25726 23:01:45.532871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5632 RESULT=pass
25728 23:01:45.565626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip>
25729 23:01:45.566040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632 RESULT=skip
25731 23:01:45.598935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip>
25732 23:01:45.599349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632 RESULT=skip
25734 23:01:45.632276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip>
25735 23:01:45.632683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632 RESULT=skip
25737 23:01:45.665472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 RESULT=pass
25739 23:01:45.666135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5648 RESULT=pass>
25740 23:01:45.699483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip>
25741 23:01:45.699881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648 RESULT=skip
25743 23:01:45.734416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip>
25744 23:01:45.734841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648 RESULT=skip
25746 23:01:45.768888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip>
25747 23:01:45.769373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648 RESULT=skip
25749 23:01:45.800893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 RESULT=pass>
25750 23:01:45.801347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5664 RESULT=pass
25752 23:01:45.833633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip>
25753 23:01:45.834144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664 RESULT=skip
25755 23:01:45.868629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip
25757 23:01:45.869081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664 RESULT=skip>
25758 23:01:45.901184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip>
25759 23:01:45.901596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664 RESULT=skip
25761 23:01:45.934131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 RESULT=pass>
25762 23:01:45.934555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5680 RESULT=pass
25764 23:01:45.967197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip>
25765 23:01:45.967696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680 RESULT=skip
25767 23:01:46.000883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip
25769 23:01:46.001446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680 RESULT=skip>
25770 23:01:46.033072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip
25772 23:01:46.033535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680 RESULT=skip>
25773 23:01:46.066574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 RESULT=pass
25775 23:01:46.067205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5696 RESULT=pass>
25776 23:01:46.098639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip>
25777 23:01:46.099110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696 RESULT=skip
25779 23:01:46.130947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip
25781 23:01:46.131417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696 RESULT=skip>
25782 23:01:46.162327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip>
25783 23:01:46.162737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696 RESULT=skip
25785 23:01:46.193832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 RESULT=pass>
25786 23:01:46.194313 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5712 RESULT=pass
25788 23:01:46.226511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip
25790 23:01:46.227163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712 RESULT=skip>
25791 23:01:46.259845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip
25793 23:01:46.260499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712 RESULT=skip>
25794 23:01:46.294129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip
25796 23:01:46.294699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712 RESULT=skip>
25797 23:01:46.327375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 RESULT=pass>
25798 23:01:46.327859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5728 RESULT=pass
25800 23:01:46.359506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip
25802 23:01:46.360134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728 RESULT=skip>
25803 23:01:46.391016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip
25805 23:01:46.391487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728 RESULT=skip>
25806 23:01:46.422328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip>
25807 23:01:46.422744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728 RESULT=skip
25809 23:01:46.453439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 RESULT=pass>
25810 23:01:46.453884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5744 RESULT=pass
25812 23:01:46.487544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip>
25813 23:01:46.487971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744 RESULT=skip
25815 23:01:46.520811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip>
25816 23:01:46.521218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744 RESULT=skip
25818 23:01:46.555002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip>
25819 23:01:46.555456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744 RESULT=skip
25821 23:01:46.587546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 RESULT=pass>
25822 23:01:46.588066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5760 RESULT=pass
25824 23:01:46.627496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip>
25825 23:01:46.627962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760 RESULT=skip
25827 23:01:46.663078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip>
25828 23:01:46.663505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760 RESULT=skip
25830 23:01:46.699965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip
25832 23:01:46.700423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760 RESULT=skip>
25833 23:01:46.735110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 RESULT=pass
25835 23:01:46.735490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5776 RESULT=pass>
25836 23:01:46.772695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip>
25837 23:01:46.773091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776 RESULT=skip
25839 23:01:46.809327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip>
25840 23:01:46.809739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776 RESULT=skip
25842 23:01:46.841248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip
25844 23:01:46.841684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776 RESULT=skip>
25845 23:01:46.872906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 RESULT=pass>
25846 23:01:46.873278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5792 RESULT=pass
25848 23:01:46.905003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip>
25849 23:01:46.905467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792 RESULT=skip
25851 23:01:46.940079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip
25853 23:01:46.940800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792 RESULT=skip>
25854 23:01:46.971676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip>
25855 23:01:46.972093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792 RESULT=skip
25857 23:01:47.002729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 RESULT=pass>
25858 23:01:47.003100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5808 RESULT=pass
25860 23:01:47.037577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip
25862 23:01:47.038005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808 RESULT=skip>
25863 23:01:47.069049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip>
25864 23:01:47.069522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808 RESULT=skip
25866 23:01:47.100408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip>
25867 23:01:47.100885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808 RESULT=skip
25869 23:01:47.132545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 RESULT=pass>
25870 23:01:47.133009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5824 RESULT=pass
25872 23:01:47.163283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip>
25873 23:01:47.163740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824 RESULT=skip
25875 23:01:47.194320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip>
25876 23:01:47.194766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824 RESULT=skip
25878 23:01:47.227410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip
25880 23:01:47.227962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824 RESULT=skip>
25881 23:01:47.259531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 RESULT=pass>
25882 23:01:47.259994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5840 RESULT=pass
25884 23:01:47.290800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip>
25885 23:01:47.291240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840 RESULT=skip
25887 23:01:47.322451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip>
25888 23:01:47.322902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840 RESULT=skip
25890 23:01:47.353356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip>
25891 23:01:47.353787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840 RESULT=skip
25893 23:01:47.384792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 RESULT=pass>
25894 23:01:47.385243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5856 RESULT=pass
25896 23:01:47.415572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip>
25897 23:01:47.416027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856 RESULT=skip
25899 23:01:47.446789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip>
25900 23:01:47.447249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856 RESULT=skip
25902 23:01:47.477178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip>
25903 23:01:47.477629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856 RESULT=skip
25905 23:01:47.510991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 RESULT=pass>
25906 23:01:47.511448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5872 RESULT=pass
25908 23:01:47.543119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip>
25909 23:01:47.543561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872 RESULT=skip
25911 23:01:47.575304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip>
25912 23:01:47.575756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872 RESULT=skip
25914 23:01:47.606226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip>
25915 23:01:47.606676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872 RESULT=skip
25917 23:01:47.637754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 RESULT=pass>
25918 23:01:47.638188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5888 RESULT=pass
25920 23:01:47.668858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip>
25921 23:01:47.669326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888 RESULT=skip
25923 23:01:47.700731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip>
25924 23:01:47.701260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888 RESULT=skip
25926 23:01:47.732808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip
25928 23:01:47.733527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888 RESULT=skip>
25929 23:01:47.763278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 RESULT=pass>
25930 23:01:47.763817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5904 RESULT=pass
25932 23:01:47.794339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip>
25933 23:01:47.794749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904 RESULT=skip
25935 23:01:47.826037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip>
25936 23:01:47.826403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904 RESULT=skip
25938 23:01:47.857141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip>
25939 23:01:47.857497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904 RESULT=skip
25941 23:01:47.888545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 RESULT=pass>
25942 23:01:47.888999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5920 RESULT=pass
25944 23:01:47.919863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip
25946 23:01:47.920464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920 RESULT=skip>
25947 23:01:47.952328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip>
25948 23:01:47.952780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920 RESULT=skip
25950 23:01:47.983700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip>
25951 23:01:47.984139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920 RESULT=skip
25953 23:01:48.015546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 RESULT=pass>
25954 23:01:48.015999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5936 RESULT=pass
25956 23:01:48.047680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip>
25957 23:01:48.048126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936 RESULT=skip
25959 23:01:48.079961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip
25961 23:01:48.080406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936 RESULT=skip>
25962 23:01:48.110741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip>
25963 23:01:48.111121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936 RESULT=skip
25965 23:01:48.142065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 RESULT=pass>
25966 23:01:48.142473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5952 RESULT=pass
25968 23:01:48.173805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip>
25969 23:01:48.174276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952 RESULT=skip
25971 23:01:48.205420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip>
25972 23:01:48.205947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952 RESULT=skip
25974 23:01:48.237030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip>
25975 23:01:48.237492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952 RESULT=skip
25977 23:01:48.271192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 RESULT=pass>
25978 23:01:48.271682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5968 RESULT=pass
25980 23:01:48.304914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip>
25981 23:01:48.305389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968 RESULT=skip
25983 23:01:48.336408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip>
25984 23:01:48.336933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968 RESULT=skip
25986 23:01:48.368056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip
25988 23:01:48.368488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968 RESULT=skip>
25989 23:01:48.400654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 RESULT=pass>
25990 23:01:48.401061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_5984 RESULT=pass
25992 23:01:48.432432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip>
25993 23:01:48.432887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984 RESULT=skip
25995 23:01:48.464065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip
25997 23:01:48.464419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984 RESULT=skip>
25998 23:01:48.495285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip>
25999 23:01:48.495641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984 RESULT=skip
26001 23:01:48.526394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 RESULT=pass>
26002 23:01:48.526787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6000 RESULT=pass
26004 23:01:48.580563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip>
26005 23:01:48.581083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000 RESULT=skip
26007 23:01:48.612174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip
26009 23:01:48.612774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000 RESULT=skip>
26010 23:01:48.643812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip
26012 23:01:48.644672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000 RESULT=skip>
26013 23:01:48.674862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 RESULT=pass>
26014 23:01:48.675348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6016 RESULT=pass
26016 23:01:48.705731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip>
26017 23:01:48.706187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016 RESULT=skip
26019 23:01:48.737019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip>
26020 23:01:48.737469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016 RESULT=skip
26022 23:01:48.769442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip>
26023 23:01:48.769918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016 RESULT=skip
26025 23:01:48.801080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 RESULT=pass
26027 23:01:48.801637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6032 RESULT=pass>
26028 23:01:48.832490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip
26030 23:01:48.833039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032 RESULT=skip>
26031 23:01:48.866243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip>
26032 23:01:48.866705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032 RESULT=skip
26034 23:01:48.897768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip
26036 23:01:48.898213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032 RESULT=skip>
26037 23:01:48.930843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 RESULT=pass>
26038 23:01:48.931264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6048 RESULT=pass
26040 23:01:48.965219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip>
26041 23:01:48.965601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048 RESULT=skip
26043 23:01:49.009209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip>
26044 23:01:49.009620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048 RESULT=skip
26046 23:01:49.042389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip
26048 23:01:49.042830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048 RESULT=skip>
26049 23:01:49.074832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 RESULT=pass
26051 23:01:49.075402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6064 RESULT=pass>
26052 23:01:49.106892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip>
26053 23:01:49.107359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064 RESULT=skip
26055 23:01:49.138813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip>
26056 23:01:49.139270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064 RESULT=skip
26058 23:01:49.171159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip
26060 23:01:49.171715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064 RESULT=skip>
26061 23:01:49.203689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 RESULT=pass>
26062 23:01:49.204169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6080 RESULT=pass
26064 23:01:49.236888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip>
26065 23:01:49.237324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080 RESULT=skip
26067 23:01:49.269120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip>
26068 23:01:49.269575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080 RESULT=skip
26070 23:01:49.301600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip>
26071 23:01:49.302062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080 RESULT=skip
26073 23:01:49.333871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 RESULT=pass>
26074 23:01:49.334347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6096 RESULT=pass
26076 23:01:49.367002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip
26078 23:01:49.367645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096 RESULT=skip>
26079 23:01:49.398632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip
26081 23:01:49.399109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096 RESULT=skip>
26082 23:01:49.430042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip>
26083 23:01:49.430475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096 RESULT=skip
26085 23:01:49.462410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 RESULT=pass>
26086 23:01:49.462865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6112 RESULT=pass
26088 23:01:49.494916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip>
26089 23:01:49.495342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112 RESULT=skip
26091 23:01:49.526338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip>
26092 23:01:49.526710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112 RESULT=skip
26094 23:01:49.558320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip
26096 23:01:49.558682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112 RESULT=skip>
26097 23:01:49.589902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 RESULT=pass>
26098 23:01:49.590355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6128 RESULT=pass
26100 23:01:49.621390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip
26102 23:01:49.621828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128 RESULT=skip>
26103 23:01:49.654472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip>
26104 23:01:49.654918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128 RESULT=skip
26106 23:01:49.687065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip>
26107 23:01:49.687514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128 RESULT=skip
26109 23:01:49.719232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 RESULT=pass>
26110 23:01:49.719688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6144 RESULT=pass
26112 23:01:49.751381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip>
26113 23:01:49.751842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144 RESULT=skip
26115 23:01:49.784106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip
26117 23:01:49.784650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144 RESULT=skip>
26118 23:01:49.817508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip>
26119 23:01:49.817971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144 RESULT=skip
26121 23:01:49.850100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 RESULT=pass>
26122 23:01:49.850583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6160 RESULT=pass
26124 23:01:49.882376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip
26126 23:01:49.882965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160 RESULT=skip>
26127 23:01:49.914702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip
26129 23:01:49.915248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160 RESULT=skip>
26130 23:01:49.947206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip>
26131 23:01:49.947662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160 RESULT=skip
26133 23:01:49.979943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 RESULT=pass
26135 23:01:49.980546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6176 RESULT=pass>
26136 23:01:50.013054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip>
26137 23:01:50.013526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176 RESULT=skip
26139 23:01:50.051440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip>
26140 23:01:50.051856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176 RESULT=skip
26142 23:01:50.087535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip
26144 23:01:50.087995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176 RESULT=skip>
26145 23:01:50.119499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 RESULT=pass
26147 23:01:50.120047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6192 RESULT=pass>
26148 23:01:50.152550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip>
26149 23:01:50.152992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192 RESULT=skip
26151 23:01:50.184860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip>
26152 23:01:50.185326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192 RESULT=skip
26154 23:01:50.217286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip>
26155 23:01:50.217693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192 RESULT=skip
26157 23:01:50.249869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 RESULT=pass>
26158 23:01:50.250314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6208 RESULT=pass
26160 23:01:50.282127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip>
26161 23:01:50.282562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208 RESULT=skip
26163 23:01:50.314063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip>
26164 23:01:50.314493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208 RESULT=skip
26166 23:01:50.345995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip
26168 23:01:50.346463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208 RESULT=skip>
26169 23:01:50.377625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 RESULT=pass>
26170 23:01:50.378035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6224 RESULT=pass
26172 23:01:50.409626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip>
26173 23:01:50.410063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224 RESULT=skip
26175 23:01:50.442254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip
26177 23:01:50.442913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224 RESULT=skip>
26178 23:01:50.474805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip>
26179 23:01:50.475247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224 RESULT=skip
26181 23:01:50.507981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 RESULT=pass
26183 23:01:50.508421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6240 RESULT=pass>
26184 23:01:50.541122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip>
26185 23:01:50.541581 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240 RESULT=skip
26187 23:01:50.573985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip>
26188 23:01:50.574459 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240 RESULT=skip
26190 23:01:50.607083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip>
26191 23:01:50.607554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240 RESULT=skip
26193 23:01:50.640470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 RESULT=pass>
26194 23:01:50.640953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6256 RESULT=pass
26196 23:01:50.673085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip>
26197 23:01:50.673558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256 RESULT=skip
26199 23:01:50.706328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip>
26200 23:01:50.706729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256 RESULT=skip
26202 23:01:50.738542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip>
26203 23:01:50.738932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256 RESULT=skip
26205 23:01:50.770794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 RESULT=pass>
26206 23:01:50.771185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6272 RESULT=pass
26208 23:01:50.802824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip>
26209 23:01:50.803211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272 RESULT=skip
26211 23:01:50.835131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip>
26212 23:01:50.835540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272 RESULT=skip
26214 23:01:50.868644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip>
26215 23:01:50.869063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272 RESULT=skip
26217 23:01:50.901093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 RESULT=pass>
26218 23:01:50.901493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6288 RESULT=pass
26220 23:01:50.933184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip>
26221 23:01:50.933580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288 RESULT=skip
26223 23:01:50.965631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip>
26224 23:01:50.966084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288 RESULT=skip
26226 23:01:50.998086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip>
26227 23:01:50.998525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288 RESULT=skip
26229 23:01:51.031120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 RESULT=pass>
26230 23:01:51.031519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6304 RESULT=pass
26232 23:01:51.063345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip>
26233 23:01:51.063736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304 RESULT=skip
26235 23:01:51.095490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip>
26236 23:01:51.095929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304 RESULT=skip
26238 23:01:51.127607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip>
26239 23:01:51.128047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304 RESULT=skip
26241 23:01:51.159405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 RESULT=pass>
26242 23:01:51.159789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6320 RESULT=pass
26244 23:01:51.191618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip>
26245 23:01:51.192013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320 RESULT=skip
26247 23:01:51.224400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip>
26248 23:01:51.224780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320 RESULT=skip
26250 23:01:51.256835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip
26252 23:01:51.257371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320 RESULT=skip>
26253 23:01:51.289388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 RESULT=pass>
26254 23:01:51.289827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6336 RESULT=pass
26256 23:01:51.321609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip>
26257 23:01:51.322030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336 RESULT=skip
26259 23:01:51.354539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip
26261 23:01:51.354996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336 RESULT=skip>
26262 23:01:51.387199 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip>
26263 23:01:51.387667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336 RESULT=skip
26265 23:01:51.419430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 RESULT=pass>
26266 23:01:51.419914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6352 RESULT=pass
26268 23:01:51.450726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip>
26269 23:01:51.451190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352 RESULT=skip
26271 23:01:51.483952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip
26273 23:01:51.484637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352 RESULT=skip>
26274 23:01:51.515988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip
26276 23:01:51.516536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352 RESULT=skip>
26277 23:01:51.548562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 RESULT=pass
26279 23:01:51.549119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6368 RESULT=pass>
26280 23:01:51.580945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip>
26281 23:01:51.581491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368 RESULT=skip
26283 23:01:51.612757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip
26285 23:01:51.613334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368 RESULT=skip>
26286 23:01:51.643793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip
26288 23:01:51.644419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368 RESULT=skip>
26289 23:01:51.677513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 RESULT=pass
26291 23:01:51.678163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6384 RESULT=pass>
26292 23:01:51.713452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip
26294 23:01:51.713923 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384 RESULT=skip>
26295 23:01:51.749111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip>
26296 23:01:51.749551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384 RESULT=skip
26298 23:01:51.781719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip>
26299 23:01:51.782075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384 RESULT=skip
26301 23:01:51.813904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 RESULT=pass>
26302 23:01:51.814308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6400 RESULT=pass
26304 23:01:51.845926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip
26306 23:01:51.846333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400 RESULT=skip>
26307 23:01:51.878274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip
26309 23:01:51.878691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400 RESULT=skip>
26310 23:01:51.910817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip>
26311 23:01:51.911224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400 RESULT=skip
26313 23:01:51.942622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 RESULT=pass>
26314 23:01:51.943009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6416 RESULT=pass
26316 23:01:51.974615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip
26318 23:01:51.975157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416 RESULT=skip>
26319 23:01:52.006236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip>
26320 23:01:52.006727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416 RESULT=skip
26322 23:01:52.038175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip>
26323 23:01:52.038655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416 RESULT=skip
26325 23:01:52.069390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 RESULT=pass>
26326 23:01:52.069921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6432 RESULT=pass
26328 23:01:52.100700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip>
26329 23:01:52.101174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432 RESULT=skip
26331 23:01:52.132688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip
26333 23:01:52.133318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432 RESULT=skip>
26334 23:01:52.163825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip
26336 23:01:52.164425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432 RESULT=skip>
26337 23:01:52.195363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 RESULT=pass>
26338 23:01:52.195763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6448 RESULT=pass
26340 23:01:52.226752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip>
26341 23:01:52.227218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448 RESULT=skip
26343 23:01:52.258099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip>
26344 23:01:52.258562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448 RESULT=skip
26346 23:01:52.289292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip>
26347 23:01:52.289738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448 RESULT=skip
26349 23:01:52.321928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 RESULT=pass
26351 23:01:52.322518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6464 RESULT=pass>
26352 23:01:52.353578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip>
26353 23:01:52.354038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464 RESULT=skip
26355 23:01:52.384770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip>
26356 23:01:52.385233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464 RESULT=skip
26358 23:01:52.416666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip
26360 23:01:52.417307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464 RESULT=skip>
26361 23:01:52.447990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 RESULT=pass
26363 23:01:52.448623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6480 RESULT=pass>
26364 23:01:52.479609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip>
26365 23:01:52.480004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480 RESULT=skip
26367 23:01:52.511408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip>
26368 23:01:52.511808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480 RESULT=skip
26370 23:01:52.543133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip>
26371 23:01:52.543610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480 RESULT=skip
26373 23:01:52.576562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 RESULT=pass
26375 23:01:52.577008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6496 RESULT=pass>
26376 23:01:52.608624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip>
26377 23:01:52.609019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496 RESULT=skip
26379 23:01:52.640444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip>
26380 23:01:52.640843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496 RESULT=skip
26382 23:01:52.672274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip>
26383 23:01:52.672675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496 RESULT=skip
26385 23:01:52.703368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 RESULT=pass>
26386 23:01:52.703843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6512 RESULT=pass
26388 23:01:52.735109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip>
26389 23:01:52.735559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512 RESULT=skip
26391 23:01:52.767228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip>
26392 23:01:52.767670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512 RESULT=skip
26394 23:01:52.798637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip>
26395 23:01:52.799088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512 RESULT=skip
26397 23:01:52.829971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 RESULT=pass>
26398 23:01:52.830391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6528 RESULT=pass
26400 23:01:52.861692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip
26402 23:01:52.862149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528 RESULT=skip>
26403 23:01:52.893030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip>
26404 23:01:52.893453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528 RESULT=skip
26406 23:01:52.925440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip>
26407 23:01:52.925866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528 RESULT=skip
26409 23:01:52.957067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 RESULT=pass
26411 23:01:52.957625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6544 RESULT=pass>
26412 23:01:52.988126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip
26414 23:01:52.988667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544 RESULT=skip>
26415 23:01:53.020642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip>
26416 23:01:53.021073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544 RESULT=skip
26418 23:01:53.052653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip>
26419 23:01:53.053066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544 RESULT=skip
26421 23:01:53.084934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 RESULT=pass>
26422 23:01:53.085402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6560 RESULT=pass
26424 23:01:53.116490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip
26426 23:01:53.117030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560 RESULT=skip>
26427 23:01:53.148777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip
26429 23:01:53.149322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560 RESULT=skip>
26430 23:01:53.182296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip>
26431 23:01:53.182791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560 RESULT=skip
26433 23:01:53.213970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 RESULT=pass>
26434 23:01:53.214445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6576 RESULT=pass
26436 23:01:53.245349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip>
26437 23:01:53.245815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576 RESULT=skip
26439 23:01:53.277161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip
26441 23:01:53.277718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576 RESULT=skip>
26442 23:01:53.308456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip>
26443 23:01:53.308894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576 RESULT=skip
26445 23:01:53.341418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 RESULT=pass>
26446 23:01:53.341886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6592 RESULT=pass
26448 23:01:53.373429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip>
26449 23:01:53.373842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592 RESULT=skip
26451 23:01:53.405133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip>
26452 23:01:53.405538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592 RESULT=skip
26454 23:01:53.437130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip>
26455 23:01:53.437598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592 RESULT=skip
26457 23:01:53.469186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 RESULT=pass>
26458 23:01:53.469667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6608 RESULT=pass
26460 23:01:53.501130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip>
26461 23:01:53.501551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608 RESULT=skip
26463 23:01:53.534082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip>
26464 23:01:53.534553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608 RESULT=skip
26466 23:01:53.567623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip
26468 23:01:53.567976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608 RESULT=skip>
26469 23:01:53.600032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 RESULT=pass
26471 23:01:53.600486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6624 RESULT=pass>
26472 23:01:53.633189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip
26474 23:01:53.633633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624 RESULT=skip>
26475 23:01:53.677097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip>
26476 23:01:53.677504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624 RESULT=skip
26478 23:01:53.722750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip
26480 23:01:53.723392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624 RESULT=skip>
26481 23:01:53.754191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 RESULT=pass
26483 23:01:53.754755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6640 RESULT=pass>
26484 23:01:53.785688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip>
26485 23:01:53.786130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640 RESULT=skip
26487 23:01:53.818529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip>
26488 23:01:53.818929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640 RESULT=skip
26490 23:01:53.850444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip>
26491 23:01:53.850845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640 RESULT=skip
26493 23:01:53.882634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 RESULT=pass
26495 23:01:53.883076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6656 RESULT=pass>
26496 23:01:53.914931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip>
26497 23:01:53.915305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656 RESULT=skip
26499 23:01:53.946588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip>
26500 23:01:53.947041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656 RESULT=skip
26502 23:01:53.979515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip>
26503 23:01:53.979962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656 RESULT=skip
26505 23:01:54.011278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 RESULT=pass>
26506 23:01:54.011741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6672 RESULT=pass
26508 23:01:54.042862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip
26510 23:01:54.043475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672 RESULT=skip>
26511 23:01:54.073774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip>
26512 23:01:54.074215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672 RESULT=skip
26514 23:01:54.105528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip>
26515 23:01:54.106019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672 RESULT=skip
26517 23:01:54.137207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 RESULT=pass
26519 23:01:54.137759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6688 RESULT=pass>
26520 23:01:54.168877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip>
26521 23:01:54.169288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688 RESULT=skip
26523 23:01:54.201557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip>
26524 23:01:54.201985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688 RESULT=skip
26526 23:01:54.233912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip>
26527 23:01:54.234323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688 RESULT=skip
26529 23:01:54.266475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 RESULT=pass>
26530 23:01:54.266886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6704 RESULT=pass
26532 23:01:54.298461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip
26534 23:01:54.298905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704 RESULT=skip>
26535 23:01:54.329813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip>
26536 23:01:54.330210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704 RESULT=skip
26538 23:01:54.361080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip>
26539 23:01:54.361505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704 RESULT=skip
26541 23:01:54.393248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 RESULT=pass
26543 23:01:54.393720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6720 RESULT=pass>
26544 23:01:54.424608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip>
26545 23:01:54.425014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720 RESULT=skip
26547 23:01:54.456573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip>
26548 23:01:54.456971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720 RESULT=skip
26550 23:01:54.488323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip
26552 23:01:54.489017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720 RESULT=skip>
26553 23:01:54.519621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 RESULT=pass>
26554 23:01:54.520015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6736 RESULT=pass
26556 23:01:54.550970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip>
26557 23:01:54.551456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736 RESULT=skip
26559 23:01:54.583023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip
26561 23:01:54.583653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736 RESULT=skip>
26562 23:01:54.615386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip>
26563 23:01:54.615854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736 RESULT=skip
26565 23:01:54.648650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 RESULT=pass
26567 23:01:54.649271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6752 RESULT=pass>
26568 23:01:54.679641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip>
26569 23:01:54.680089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752 RESULT=skip
26571 23:01:54.712986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip
26573 23:01:54.713659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752 RESULT=skip>
26574 23:01:54.744957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip>
26575 23:01:54.745411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752 RESULT=skip
26577 23:01:54.776370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 RESULT=pass
26579 23:01:54.776787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6768 RESULT=pass>
26580 23:01:54.807968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip
26582 23:01:54.808507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768 RESULT=skip>
26583 23:01:54.840679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip>
26584 23:01:54.841127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768 RESULT=skip
26586 23:01:54.872944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip>
26587 23:01:54.873391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768 RESULT=skip
26589 23:01:54.905049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 RESULT=pass>
26590 23:01:54.905501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6784 RESULT=pass
26592 23:01:54.937017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip>
26593 23:01:54.937425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784 RESULT=skip
26595 23:01:54.969004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip>
26596 23:01:54.969473 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784 RESULT=skip
26598 23:01:55.001849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip>
26599 23:01:55.002315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784 RESULT=skip
26601 23:01:55.033762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 RESULT=pass
26603 23:01:55.034204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6800 RESULT=pass>
26604 23:01:55.066011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip
26606 23:01:55.066462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800 RESULT=skip>
26607 23:01:55.099093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip
26609 23:01:55.099528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800 RESULT=skip>
26610 23:01:55.131584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip
26612 23:01:55.132028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800 RESULT=skip>
26613 23:01:55.163760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 RESULT=pass
26615 23:01:55.164193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6816 RESULT=pass>
26616 23:01:55.196121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip
26618 23:01:55.196545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816 RESULT=skip>
26619 23:01:55.228545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip>
26620 23:01:55.228945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816 RESULT=skip
26622 23:01:55.260134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip
26624 23:01:55.260754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816 RESULT=skip>
26625 23:01:55.292421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 RESULT=pass>
26626 23:01:55.292904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6832 RESULT=pass
26628 23:01:55.324791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip
26630 23:01:55.325343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832 RESULT=skip>
26631 23:01:55.357387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip
26633 23:01:55.357846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832 RESULT=skip>
26634 23:01:55.389583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip>
26635 23:01:55.390043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832 RESULT=skip
26637 23:01:55.421712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 RESULT=pass
26639 23:01:55.422153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6848 RESULT=pass>
26640 23:01:55.454179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip
26642 23:01:55.454619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848 RESULT=skip>
26643 23:01:55.488695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip
26645 23:01:55.489377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848 RESULT=skip>
26646 23:01:55.524448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip>
26647 23:01:55.524861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848 RESULT=skip
26649 23:01:55.560007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 RESULT=pass
26651 23:01:55.560597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6864 RESULT=pass>
26652 23:01:55.593338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip>
26653 23:01:55.593826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864 RESULT=skip
26655 23:01:55.626518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip
26657 23:01:55.627159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864 RESULT=skip>
26658 23:01:55.658743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip>
26659 23:01:55.659144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864 RESULT=skip
26661 23:01:55.691021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 RESULT=pass
26663 23:01:55.691647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6880 RESULT=pass>
26664 23:01:55.722680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip>
26665 23:01:55.723129 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880 RESULT=skip
26667 23:01:55.754013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip>
26668 23:01:55.754464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880 RESULT=skip
26670 23:01:55.785643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip
26672 23:01:55.786198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880 RESULT=skip>
26673 23:01:55.816990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 RESULT=pass>
26674 23:01:55.817446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6896 RESULT=pass
26676 23:01:55.848195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip>
26677 23:01:55.848673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896 RESULT=skip
26679 23:01:55.880856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip>
26680 23:01:55.881304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896 RESULT=skip
26682 23:01:55.912443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip>
26683 23:01:55.912848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896 RESULT=skip
26685 23:01:55.944481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 RESULT=pass
26687 23:01:55.945119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6912 RESULT=pass>
26688 23:01:55.976856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip
26690 23:01:55.977480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912 RESULT=skip>
26691 23:01:56.008858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip>
26692 23:01:56.009319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912 RESULT=skip
26694 23:01:56.041722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip
26696 23:01:56.042288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912 RESULT=skip>
26697 23:01:56.073355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 RESULT=pass>
26698 23:01:56.073804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6928 RESULT=pass
26700 23:01:56.104972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip>
26701 23:01:56.105416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928 RESULT=skip
26703 23:01:56.137072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip
26705 23:01:56.137635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928 RESULT=skip>
26706 23:01:56.168675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip>
26707 23:01:56.169123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928 RESULT=skip
26709 23:01:56.199807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 RESULT=pass
26711 23:01:56.200234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6944 RESULT=pass>
26712 23:01:56.231956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip
26714 23:01:56.232372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944 RESULT=skip>
26715 23:01:56.264040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip
26717 23:01:56.264582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944 RESULT=skip>
26718 23:01:56.296144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip
26720 23:01:56.296572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944 RESULT=skip>
26721 23:01:56.328395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 RESULT=pass
26723 23:01:56.329005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6960 RESULT=pass>
26724 23:01:56.359971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip
26726 23:01:56.360356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960 RESULT=skip>
26727 23:01:56.392612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip>
26728 23:01:56.393071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960 RESULT=skip
26730 23:01:56.424545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip>
26731 23:01:56.424941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960 RESULT=skip
26733 23:01:56.456799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 RESULT=pass
26735 23:01:56.457219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6976 RESULT=pass>
26736 23:01:56.488142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip
26738 23:01:56.488554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976 RESULT=skip>
26739 23:01:56.520597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip
26741 23:01:56.521152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976 RESULT=skip>
26742 23:01:56.552635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip>
26743 23:01:56.553035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976 RESULT=skip
26745 23:01:56.585716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 RESULT=pass>
26746 23:01:56.586120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_6992 RESULT=pass
26748 23:01:56.617683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip>
26749 23:01:56.618143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992 RESULT=skip
26751 23:01:56.649453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip>
26752 23:01:56.649901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992 RESULT=skip
26754 23:01:56.689688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip>
26755 23:01:56.690148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992 RESULT=skip
26757 23:01:56.733131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 RESULT=pass>
26758 23:01:56.733627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7008 RESULT=pass
26760 23:01:56.769202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip>
26761 23:01:56.769620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008 RESULT=skip
26763 23:01:56.804518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip>
26764 23:01:56.804936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008 RESULT=skip
26766 23:01:56.838641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip
26768 23:01:56.839100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008 RESULT=skip>
26769 23:01:56.870312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 RESULT=pass
26771 23:01:56.870778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7024 RESULT=pass>
26772 23:01:56.902600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip>
26773 23:01:56.903018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024 RESULT=skip
26775 23:01:56.935830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip
26777 23:01:56.936301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024 RESULT=skip>
26778 23:01:56.969187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip
26780 23:01:56.969777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024 RESULT=skip>
26781 23:01:57.002818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 RESULT=pass
26783 23:01:57.003290 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7040 RESULT=pass>
26784 23:01:57.034841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip>
26785 23:01:57.035236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040 RESULT=skip
26787 23:01:57.069526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip
26789 23:01:57.069967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040 RESULT=skip>
26790 23:01:57.102069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip>
26791 23:01:57.102513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040 RESULT=skip
26793 23:01:57.134458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 RESULT=pass
26795 23:01:57.135057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7056 RESULT=pass>
26796 23:01:57.168015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip
26798 23:01:57.168609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056 RESULT=skip>
26799 23:01:57.200652 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip>
26800 23:01:57.201115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056 RESULT=skip
26802 23:01:57.232452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip>
26803 23:01:57.232925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056 RESULT=skip
26805 23:01:57.264363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 RESULT=pass>
26806 23:01:57.264812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7072 RESULT=pass
26808 23:01:57.296136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip
26810 23:01:57.296707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072 RESULT=skip>
26811 23:01:57.327951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip
26813 23:01:57.328402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072 RESULT=skip>
26814 23:01:57.360983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip
26816 23:01:57.361430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072 RESULT=skip>
26817 23:01:57.393014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 RESULT=pass>
26818 23:01:57.393432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7088 RESULT=pass
26820 23:01:57.425477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip>
26821 23:01:57.425944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088 RESULT=skip
26823 23:01:57.457609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip>
26824 23:01:57.458018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088 RESULT=skip
26826 23:01:57.489372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip
26828 23:01:57.489936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088 RESULT=skip>
26829 23:01:57.521527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 RESULT=pass
26831 23:01:57.522081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7104 RESULT=pass>
26832 23:01:57.553195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip>
26833 23:01:57.553600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104 RESULT=skip
26835 23:01:57.585129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip>
26836 23:01:57.585605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104 RESULT=skip
26838 23:01:57.617508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip>
26839 23:01:57.617991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104 RESULT=skip
26841 23:01:57.649271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 RESULT=pass
26843 23:01:57.649872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7120 RESULT=pass>
26844 23:01:57.681205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip
26846 23:01:57.681805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120 RESULT=skip>
26847 23:01:57.713525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip>
26848 23:01:57.713992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120 RESULT=skip
26850 23:01:57.745394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip>
26851 23:01:57.745866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120 RESULT=skip
26853 23:01:57.777672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 RESULT=pass
26855 23:01:57.778213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7136 RESULT=pass>
26856 23:01:57.809492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip
26858 23:01:57.810071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136 RESULT=skip>
26859 23:01:57.843277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip
26861 23:01:57.843907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136 RESULT=skip>
26862 23:01:57.875599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip>
26863 23:01:57.876031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136 RESULT=skip
26865 23:01:57.907569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 RESULT=pass
26867 23:01:57.908126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7152 RESULT=pass>
26868 23:01:57.939746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip
26870 23:01:57.940208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152 RESULT=skip>
26871 23:01:57.973264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip>
26872 23:01:57.973700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152 RESULT=skip
26874 23:01:58.007515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip
26876 23:01:58.008150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152 RESULT=skip>
26877 23:01:58.041283 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 RESULT=pass
26879 23:01:58.041922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7168 RESULT=pass>
26880 23:01:58.073122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip>
26881 23:01:58.073524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168 RESULT=skip
26883 23:01:58.105046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip
26885 23:01:58.105490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168 RESULT=skip>
26886 23:01:58.137632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip>
26887 23:01:58.138041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168 RESULT=skip
26889 23:01:58.169672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 RESULT=pass>
26890 23:01:58.170090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7184 RESULT=pass
26892 23:01:58.201264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip>
26893 23:01:58.201692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184 RESULT=skip
26895 23:01:58.233498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip>
26896 23:01:58.233963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184 RESULT=skip
26898 23:01:58.265254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip
26900 23:01:58.265816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184 RESULT=skip>
26901 23:01:58.297024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 RESULT=pass>
26902 23:01:58.297466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7200 RESULT=pass
26904 23:01:58.328791 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip>
26905 23:01:58.329243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200 RESULT=skip
26907 23:01:58.360933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip
26909 23:01:58.361492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200 RESULT=skip>
26910 23:01:58.393278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip>
26911 23:01:58.393744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200 RESULT=skip
26913 23:01:58.424907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 RESULT=pass>
26914 23:01:58.425368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7216 RESULT=pass
26916 23:01:58.457587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip>
26917 23:01:58.458016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216 RESULT=skip
26919 23:01:58.490413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip>
26920 23:01:58.490887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216 RESULT=skip
26922 23:01:58.522666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip
26924 23:01:58.523308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216 RESULT=skip>
26925 23:01:58.554449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 RESULT=pass>
26926 23:01:58.554930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7232 RESULT=pass
26928 23:01:58.586989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip
26930 23:01:58.587447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232 RESULT=skip>
26931 23:01:58.619274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip
26933 23:01:58.619773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232 RESULT=skip>
26934 23:01:58.651676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip
26936 23:01:58.652147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232 RESULT=skip>
26937 23:01:58.685231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 RESULT=pass
26939 23:01:58.685710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7248 RESULT=pass>
26940 23:01:58.716530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip
26942 23:01:58.716990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248 RESULT=skip>
26943 23:01:58.748222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip>
26944 23:01:58.748692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248 RESULT=skip
26946 23:01:58.789535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip>
26947 23:01:58.790032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248 RESULT=skip
26949 23:01:58.849021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 RESULT=pass>
26950 23:01:58.849496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7264 RESULT=pass
26952 23:01:58.883797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip
26954 23:01:58.884349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264 RESULT=skip>
26955 23:01:58.916717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip>
26956 23:01:58.917141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264 RESULT=skip
26958 23:01:58.949340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip>
26959 23:01:58.949798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264 RESULT=skip
26961 23:01:58.981952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 RESULT=pass
26963 23:01:58.982520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7280 RESULT=pass>
26964 23:01:59.014775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip
26966 23:01:59.015337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280 RESULT=skip>
26967 23:01:59.048091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip
26969 23:01:59.048541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280 RESULT=skip>
26970 23:01:59.082564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip>
26971 23:01:59.083024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280 RESULT=skip
26973 23:01:59.115098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 RESULT=pass>
26974 23:01:59.115572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7296 RESULT=pass
26976 23:01:59.148750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip>
26977 23:01:59.149216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296 RESULT=skip
26979 23:01:59.181784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip>
26980 23:01:59.182204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296 RESULT=skip
26982 23:01:59.215251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip>
26983 23:01:59.215668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296 RESULT=skip
26985 23:01:59.248256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 RESULT=pass>
26986 23:01:59.248665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7312 RESULT=pass
26988 23:01:59.281111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip>
26989 23:01:59.281513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312 RESULT=skip
26991 23:01:59.313867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip>
26992 23:01:59.314338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312 RESULT=skip
26994 23:01:59.346640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip>
26995 23:01:59.347053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312 RESULT=skip
26997 23:01:59.379448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 RESULT=pass>
26998 23:01:59.379893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7328 RESULT=pass
27000 23:01:59.412226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip
27002 23:01:59.412679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328 RESULT=skip>
27003 23:01:59.444744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip
27005 23:01:59.445438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328 RESULT=skip>
27006 23:01:59.477586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip
27008 23:01:59.478225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328 RESULT=skip>
27009 23:01:59.511605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 RESULT=pass>
27010 23:01:59.512093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7344 RESULT=pass
27012 23:01:59.545009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip
27014 23:01:59.545466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344 RESULT=skip>
27015 23:01:59.578015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip
27017 23:01:59.578659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344 RESULT=skip>
27018 23:01:59.611535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip>
27019 23:01:59.611964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344 RESULT=skip
27021 23:01:59.645592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 RESULT=pass
27023 23:01:59.646195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7360 RESULT=pass>
27024 23:01:59.678462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip>
27025 23:01:59.678874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360 RESULT=skip
27027 23:01:59.711488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip>
27028 23:01:59.711965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360 RESULT=skip
27030 23:01:59.745049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip>
27031 23:01:59.745527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360 RESULT=skip
27033 23:01:59.778109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 RESULT=pass>
27034 23:01:59.778525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7376 RESULT=pass
27036 23:01:59.811041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip
27038 23:01:59.811493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376 RESULT=skip>
27039 23:01:59.844001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip
27041 23:01:59.844421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376 RESULT=skip>
27042 23:01:59.876918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip>
27043 23:01:59.877441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376 RESULT=skip
27045 23:01:59.909878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 RESULT=pass
27047 23:01:59.910295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7392 RESULT=pass>
27048 23:01:59.942015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip>
27049 23:01:59.942397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392 RESULT=skip
27051 23:01:59.974620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip
27053 23:01:59.975047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392 RESULT=skip>
27054 23:02:00.007185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip>
27055 23:02:00.007610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392 RESULT=skip
27057 23:02:00.038958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 RESULT=pass>
27058 23:02:00.039392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7408 RESULT=pass
27060 23:02:00.071183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip>
27061 23:02:00.071626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408 RESULT=skip
27063 23:02:00.104302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip>
27064 23:02:00.104730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408 RESULT=skip
27066 23:02:00.136839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip>
27067 23:02:00.137230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408 RESULT=skip
27069 23:02:00.169337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 RESULT=pass
27071 23:02:00.169924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7424 RESULT=pass>
27072 23:02:00.201134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip>
27073 23:02:00.201565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424 RESULT=skip
27075 23:02:00.232789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip>
27076 23:02:00.233234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424 RESULT=skip
27078 23:02:00.264879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip>
27079 23:02:00.265327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424 RESULT=skip
27081 23:02:00.296187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 RESULT=pass>
27082 23:02:00.296635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7440 RESULT=pass
27084 23:02:00.327722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip>
27085 23:02:00.328182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440 RESULT=skip
27087 23:02:00.359947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip
27089 23:02:00.360510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440 RESULT=skip>
27090 23:02:00.392711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip>
27091 23:02:00.393112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440 RESULT=skip
27093 23:02:00.425096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 RESULT=pass>
27094 23:02:00.425552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7456 RESULT=pass
27096 23:02:00.457377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip>
27097 23:02:00.457823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456 RESULT=skip
27099 23:02:00.489917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip
27101 23:02:00.490578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456 RESULT=skip>
27102 23:02:00.522288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip
27104 23:02:00.522999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456 RESULT=skip>
27105 23:02:00.554958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 RESULT=pass>
27106 23:02:00.555389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7472 RESULT=pass
27108 23:02:00.587340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip>
27109 23:02:00.587769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472 RESULT=skip
27111 23:02:00.620289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip>
27112 23:02:00.620734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472 RESULT=skip
27114 23:02:00.652812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip>
27115 23:02:00.653187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472 RESULT=skip
27117 23:02:00.685600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 RESULT=pass>
27118 23:02:00.686058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7488 RESULT=pass
27120 23:02:00.718052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip>
27121 23:02:00.718488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488 RESULT=skip
27123 23:02:00.749988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip>
27124 23:02:00.750410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488 RESULT=skip
27126 23:02:00.783094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip>
27127 23:02:00.783551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488 RESULT=skip
27129 23:02:00.814479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 RESULT=pass>
27130 23:02:00.814878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7504 RESULT=pass
27132 23:02:00.845592 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip
27134 23:02:00.846371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504 RESULT=skip>
27135 23:02:00.877112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip
27137 23:02:00.877713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504 RESULT=skip>
27138 23:02:00.908980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip
27140 23:02:00.909542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504 RESULT=skip>
27141 23:02:00.941367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 RESULT=pass>
27142 23:02:00.941828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7520 RESULT=pass
27144 23:02:00.973773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip
27146 23:02:00.974322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520 RESULT=skip>
27147 23:02:01.005515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip
27149 23:02:01.005962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520 RESULT=skip>
27150 23:02:01.038316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip>
27151 23:02:01.038736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520 RESULT=skip
27153 23:02:01.070293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 RESULT=pass>
27154 23:02:01.070729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7536 RESULT=pass
27156 23:02:01.104746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip
27158 23:02:01.105386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536 RESULT=skip>
27159 23:02:01.138646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip
27161 23:02:01.139271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536 RESULT=skip>
27162 23:02:01.170671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip
27164 23:02:01.171132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536 RESULT=skip>
27165 23:02:01.202555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 RESULT=pass
27167 23:02:01.203100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7552 RESULT=pass>
27168 23:02:01.234017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip>
27169 23:02:01.234472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552 RESULT=skip
27171 23:02:01.267270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip>
27172 23:02:01.267754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552 RESULT=skip
27174 23:02:01.300463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip>
27175 23:02:01.300913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552 RESULT=skip
27177 23:02:01.331743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 RESULT=pass
27179 23:02:01.332273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7568 RESULT=pass>
27180 23:02:01.364521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip
27182 23:02:01.365059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568 RESULT=skip>
27183 23:02:01.396933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip>
27184 23:02:01.397345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568 RESULT=skip
27186 23:02:01.429023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip>
27187 23:02:01.429440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568 RESULT=skip
27189 23:02:01.461229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 RESULT=pass
27191 23:02:01.461802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7584 RESULT=pass>
27192 23:02:01.493124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip>
27193 23:02:01.493550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584 RESULT=skip
27195 23:02:01.525128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip>
27196 23:02:01.525546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584 RESULT=skip
27198 23:02:01.557206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip
27200 23:02:01.557927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584 RESULT=skip>
27201 23:02:01.590231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 RESULT=pass
27203 23:02:01.590792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7600 RESULT=pass>
27204 23:02:01.623615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip>
27205 23:02:01.624071 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600 RESULT=skip
27207 23:02:01.658286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip>
27208 23:02:01.658745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600 RESULT=skip
27210 23:02:01.692443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip>
27211 23:02:01.692896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600 RESULT=skip
27213 23:02:01.727218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 RESULT=pass>
27214 23:02:01.727644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7616 RESULT=pass
27216 23:02:01.765369 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip>
27217 23:02:01.765807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616 RESULT=skip
27219 23:02:01.797144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip>
27220 23:02:01.797611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616 RESULT=skip
27222 23:02:01.829482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip>
27223 23:02:01.829893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616 RESULT=skip
27225 23:02:01.861214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 RESULT=pass
27227 23:02:01.861640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7632 RESULT=pass>
27228 23:02:01.892942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip>
27229 23:02:01.893342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632 RESULT=skip
27231 23:02:01.924641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip
27233 23:02:01.925050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632 RESULT=skip>
27234 23:02:01.956565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip>
27235 23:02:01.957024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632 RESULT=skip
27237 23:02:01.988714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 RESULT=pass
27239 23:02:01.989278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7648 RESULT=pass>
27240 23:02:02.020026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip
27242 23:02:02.020489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648 RESULT=skip>
27243 23:02:02.051959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip
27245 23:02:02.052406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648 RESULT=skip>
27246 23:02:02.084412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip
27248 23:02:02.084852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648 RESULT=skip>
27249 23:02:02.116516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 RESULT=pass
27251 23:02:02.116986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7664 RESULT=pass>
27252 23:02:02.149074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip
27254 23:02:02.149634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664 RESULT=skip>
27255 23:02:02.182386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip>
27256 23:02:02.182842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664 RESULT=skip
27258 23:02:02.214965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip
27260 23:02:02.215521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664 RESULT=skip>
27261 23:02:02.246898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 RESULT=pass>
27262 23:02:02.247367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7680 RESULT=pass
27264 23:02:02.278927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip
27266 23:02:02.279510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680 RESULT=skip>
27267 23:02:02.310811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip>
27268 23:02:02.311259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680 RESULT=skip
27270 23:02:02.343904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip
27272 23:02:02.344350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680 RESULT=skip>
27273 23:02:02.376625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 RESULT=pass
27275 23:02:02.377204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7696 RESULT=pass>
27276 23:02:02.409191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip
27278 23:02:02.409661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696 RESULT=skip>
27279 23:02:02.441187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip
27281 23:02:02.441657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696 RESULT=skip>
27282 23:02:02.473573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip>
27283 23:02:02.473990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696 RESULT=skip
27285 23:02:02.505009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 RESULT=pass>
27286 23:02:02.505479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7712 RESULT=pass
27288 23:02:02.535971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip
27290 23:02:02.536415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712 RESULT=skip>
27291 23:02:02.567146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip>
27292 23:02:02.567561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712 RESULT=skip
27294 23:02:02.598847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip>
27295 23:02:02.599266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712 RESULT=skip
27297 23:02:02.631053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 RESULT=pass
27299 23:02:02.631615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7728 RESULT=pass>
27300 23:02:02.662633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip>
27301 23:02:02.663059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728 RESULT=skip
27303 23:02:02.694310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip
27305 23:02:02.694870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728 RESULT=skip>
27306 23:02:02.725939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip>
27307 23:02:02.726388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728 RESULT=skip
27309 23:02:02.758301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 RESULT=pass
27311 23:02:02.758764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7744 RESULT=pass>
27312 23:02:02.790073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip
27314 23:02:02.790545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744 RESULT=skip>
27315 23:02:02.821720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip
27317 23:02:02.822284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744 RESULT=skip>
27318 23:02:02.853413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip>
27319 23:02:02.853893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744 RESULT=skip
27321 23:02:02.885208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 RESULT=pass>
27322 23:02:02.885668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7760 RESULT=pass
27324 23:02:02.917315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip>
27325 23:02:02.917783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760 RESULT=skip
27327 23:02:02.949251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip
27329 23:02:02.949713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760 RESULT=skip>
27330 23:02:02.981006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip>
27331 23:02:02.981414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760 RESULT=skip
27333 23:02:03.013700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 RESULT=pass
27335 23:02:03.014257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7776 RESULT=pass>
27336 23:02:03.046231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip>
27337 23:02:03.046689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776 RESULT=skip
27339 23:02:03.078990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip>
27340 23:02:03.079446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776 RESULT=skip
27342 23:02:03.111633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip>
27343 23:02:03.112079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776 RESULT=skip
27345 23:02:03.144057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 RESULT=pass
27347 23:02:03.144480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7792 RESULT=pass>
27348 23:02:03.176682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip>
27349 23:02:03.177138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792 RESULT=skip
27351 23:02:03.209138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip>
27352 23:02:03.209531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792 RESULT=skip
27354 23:02:03.241004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip
27356 23:02:03.241445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792 RESULT=skip>
27357 23:02:03.272940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 RESULT=pass>
27358 23:02:03.273320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7808 RESULT=pass
27360 23:02:03.304559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip>
27361 23:02:03.304940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808 RESULT=skip
27363 23:02:03.336678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip
27365 23:02:03.337118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808 RESULT=skip>
27366 23:02:03.369408 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip
27368 23:02:03.370010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808 RESULT=skip>
27369 23:02:03.400967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 RESULT=pass
27371 23:02:03.401518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7824 RESULT=pass>
27372 23:02:03.432428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip>
27373 23:02:03.432887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824 RESULT=skip
27375 23:02:03.464024 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip
27377 23:02:03.464574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824 RESULT=skip>
27378 23:02:03.496563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip
27380 23:02:03.497005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824 RESULT=skip>
27381 23:02:03.529908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 RESULT=pass
27383 23:02:03.530349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7840 RESULT=pass>
27384 23:02:03.563165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip>
27385 23:02:03.563596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840 RESULT=skip
27387 23:02:03.597350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip>
27388 23:02:03.597769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840 RESULT=skip
27390 23:02:03.629981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip>
27391 23:02:03.630388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840 RESULT=skip
27393 23:02:03.661837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 RESULT=pass
27395 23:02:03.662283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7856 RESULT=pass>
27396 23:02:03.693831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip
27398 23:02:03.694247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856 RESULT=skip>
27399 23:02:03.726110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip
27401 23:02:03.726560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856 RESULT=skip>
27402 23:02:03.758211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip>
27403 23:02:03.758626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856 RESULT=skip
27405 23:02:03.790400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 RESULT=pass>
27406 23:02:03.790804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7872 RESULT=pass
27408 23:02:03.822252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip>
27409 23:02:03.822675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872 RESULT=skip
27411 23:02:03.854002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip>
27412 23:02:03.854393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872 RESULT=skip
27414 23:02:03.885017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip>
27415 23:02:03.885489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872 RESULT=skip
27417 23:02:03.940623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 RESULT=pass
27419 23:02:03.941090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7888 RESULT=pass>
27420 23:02:03.972321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip>
27421 23:02:03.972793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888 RESULT=skip
27423 23:02:04.004347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip>
27424 23:02:04.004910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888 RESULT=skip
27426 23:02:04.037735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip>
27427 23:02:04.038202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888 RESULT=skip
27429 23:02:04.070602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 RESULT=pass
27431 23:02:04.071051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7904 RESULT=pass>
27432 23:02:04.102594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip>
27433 23:02:04.103008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904 RESULT=skip
27435 23:02:04.135097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip>
27436 23:02:04.135527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904 RESULT=skip
27438 23:02:04.167162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip>
27439 23:02:04.167580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904 RESULT=skip
27441 23:02:04.198864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 RESULT=pass>
27442 23:02:04.199276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7920 RESULT=pass
27444 23:02:04.231019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip>
27445 23:02:04.231476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920 RESULT=skip
27447 23:02:04.263649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip>
27448 23:02:04.264113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920 RESULT=skip
27450 23:02:04.296503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip>
27451 23:02:04.296958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920 RESULT=skip
27453 23:02:04.328834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 RESULT=pass>
27454 23:02:04.329280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7936 RESULT=pass
27456 23:02:04.361073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip>
27457 23:02:04.361511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936 RESULT=skip
27459 23:02:04.393632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip>
27460 23:02:04.394088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936 RESULT=skip
27462 23:02:04.426440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip>
27463 23:02:04.426877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936 RESULT=skip
27465 23:02:04.459235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 RESULT=pass
27467 23:02:04.459765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7952 RESULT=pass>
27468 23:02:04.491815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip
27470 23:02:04.492371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952 RESULT=skip>
27471 23:02:04.525147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip>
27472 23:02:04.525584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952 RESULT=skip
27474 23:02:04.557661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip>
27475 23:02:04.558096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952 RESULT=skip
27477 23:02:04.589581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 RESULT=pass>
27478 23:02:04.590030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7968 RESULT=pass
27480 23:02:04.621749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip>
27481 23:02:04.622245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968 RESULT=skip
27483 23:02:04.654245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip>
27484 23:02:04.654744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968 RESULT=skip
27486 23:02:04.686215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip
27488 23:02:04.686821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968 RESULT=skip>
27489 23:02:04.718000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 RESULT=pass
27491 23:02:04.718438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_7984 RESULT=pass>
27492 23:02:04.750641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip
27494 23:02:04.751078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984 RESULT=skip>
27495 23:02:04.783138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip>
27496 23:02:04.783559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984 RESULT=skip
27498 23:02:04.816351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip
27500 23:02:04.816817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984 RESULT=skip>
27501 23:02:04.851096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 RESULT=pass>
27502 23:02:04.851511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8000 RESULT=pass
27504 23:02:04.886029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip>
27505 23:02:04.886464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000 RESULT=skip
27507 23:02:04.918753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip>
27508 23:02:04.919175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000 RESULT=skip
27510 23:02:04.951296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip
27512 23:02:04.951845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000 RESULT=skip>
27513 23:02:04.982992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 RESULT=pass>
27514 23:02:04.983428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8016 RESULT=pass
27516 23:02:05.015575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip>
27517 23:02:05.016015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016 RESULT=skip
27519 23:02:05.050646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip
27521 23:02:05.051090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016 RESULT=skip>
27522 23:02:05.086125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip>
27523 23:02:05.086556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016 RESULT=skip
27525 23:02:05.122315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 RESULT=pass>
27526 23:02:05.122760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8032 RESULT=pass
27528 23:02:05.157877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip>
27529 23:02:05.158276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032 RESULT=skip
27531 23:02:05.193380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip>
27532 23:02:05.193879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032 RESULT=skip
27534 23:02:05.229407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip>
27535 23:02:05.229842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032 RESULT=skip
27537 23:02:05.265433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 RESULT=pass
27539 23:02:05.266003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8048 RESULT=pass>
27540 23:02:05.301814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip
27542 23:02:05.302266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048 RESULT=skip>
27543 23:02:05.338645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip
27545 23:02:05.339192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048 RESULT=skip>
27546 23:02:05.374551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip
27548 23:02:05.375007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048 RESULT=skip>
27549 23:02:05.413256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 RESULT=pass>
27550 23:02:05.413676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8064 RESULT=pass
27552 23:02:05.449096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip
27554 23:02:05.449557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064 RESULT=skip>
27555 23:02:05.485435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip
27557 23:02:05.486140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064 RESULT=skip>
27558 23:02:05.522328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip
27560 23:02:05.522931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064 RESULT=skip>
27561 23:02:05.558023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 RESULT=pass>
27562 23:02:05.558426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8080 RESULT=pass
27564 23:02:05.593942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip>
27565 23:02:05.594440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080 RESULT=skip
27567 23:02:05.630808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip>
27568 23:02:05.631277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080 RESULT=skip
27570 23:02:05.667222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip>
27571 23:02:05.667650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080 RESULT=skip
27573 23:02:05.704413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 RESULT=pass>
27574 23:02:05.704854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8096 RESULT=pass
27576 23:02:05.740823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip
27578 23:02:05.741295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096 RESULT=skip>
27579 23:02:05.775371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip
27581 23:02:05.775833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096 RESULT=skip>
27582 23:02:05.810430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip
27584 23:02:05.810889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096 RESULT=skip>
27585 23:02:05.845341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 RESULT=pass>
27586 23:02:05.845774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8112 RESULT=pass
27588 23:02:05.880647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip>
27589 23:02:05.881144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112 RESULT=skip
27591 23:02:05.917222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip>
27592 23:02:05.917681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112 RESULT=skip
27594 23:02:05.953822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip>
27595 23:02:05.954259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112 RESULT=skip
27597 23:02:05.990456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 RESULT=pass>
27598 23:02:05.990898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8128 RESULT=pass
27600 23:02:06.026168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip
27602 23:02:06.026711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128 RESULT=skip>
27603 23:02:06.062430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip
27605 23:02:06.063001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128 RESULT=skip>
27606 23:02:06.098756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip
27608 23:02:06.099350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128 RESULT=skip>
27609 23:02:06.135610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 RESULT=pass>
27610 23:02:06.136110 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8144 RESULT=pass
27612 23:02:06.172732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip>
27613 23:02:06.173211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144 RESULT=skip
27615 23:02:06.209469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip>
27616 23:02:06.209928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144 RESULT=skip
27618 23:02:06.246866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip
27620 23:02:06.247319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144 RESULT=skip>
27621 23:02:06.283958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 RESULT=pass
27623 23:02:06.284518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8160 RESULT=pass>
27624 23:02:06.319971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip
27626 23:02:06.320526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160 RESULT=skip>
27627 23:02:06.356006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip
27629 23:02:06.356639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160 RESULT=skip>
27630 23:02:06.391586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip>
27631 23:02:06.392052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160 RESULT=skip
27633 23:02:06.428963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 RESULT=pass
27635 23:02:06.429590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8176 RESULT=pass>
27636 23:02:06.465868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip>
27637 23:02:06.466322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176 RESULT=skip
27639 23:02:06.502245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip>
27640 23:02:06.502660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176 RESULT=skip
27642 23:02:06.538400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip
27644 23:02:06.538855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176 RESULT=skip>
27645 23:02:06.574182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 RESULT=pass
27647 23:02:06.574633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_8192 RESULT=pass>
27648 23:02:06.610974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip>
27649 23:02:06.611402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192 RESULT=skip
27651 23:02:06.647469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip>
27652 23:02:06.647914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192 RESULT=skip
27654 23:02:06.684957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip
27656 23:02:06.685406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192 RESULT=skip>
27657 23:02:06.721057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace RESULT=pass
27659 23:02:06.721440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace RESULT=pass>
27660 23:02:06.753718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_Enumerated_16_vector_lengths RESULT=pass>
27661 23:02:06.754135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_Enumerated_16_vector_lengths RESULT=pass
27663 23:02:06.788722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_All_vector_lengths_valid RESULT=pass>
27664 23:02:06.789133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_All_vector_lengths_valid RESULT=pass
27666 23:02:06.824511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls RESULT=pass>
27667 23:02:06.824893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls RESULT=pass
27669 23:02:06.860098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_default_vector_length_64 RESULT=pass
27671 23:02:06.860662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_default_vector_length_64 RESULT=pass>
27672 23:02:06.898326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_minimum_vector_length_16 RESULT=pass>
27673 23:02:06.898824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_minimum_vector_length_16 RESULT=pass
27675 23:02:06.934297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_maximum_vector_length_256 RESULT=pass>
27676 23:02:06.934790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_maximum_vector_length_256 RESULT=pass
27678 23:02:06.970749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_current_VL_is_64 RESULT=pass
27680 23:02:06.971201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_current_VL_is_64 RESULT=pass>
27681 23:02:07.004904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 RESULT=pass>
27682 23:02:07.005320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 RESULT=pass
27684 23:02:07.041175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_min_max RESULT=pass
27686 23:02:07.041763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_min_max RESULT=pass>
27687 23:02:07.076738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_used_default RESULT=pass>
27688 23:02:07.077214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_used_default RESULT=pass
27690 23:02:07.111202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_was_inherited RESULT=pass
27692 23:02:07.111671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_was_inherited RESULT=pass>
27693 23:02:07.147171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_set_on_exec RESULT=pass>
27694 23:02:07.147605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_set_on_exec RESULT=pass
27696 23:02:07.182648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors RESULT=pass
27698 23:02:07.183221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors RESULT=pass>
27699 23:02:07.218412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_default_vector_length_32 RESULT=pass
27701 23:02:07.218862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_default_vector_length_32 RESULT=pass>
27702 23:02:07.253828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_minimum_vector_length_16 RESULT=pass>
27703 23:02:07.254292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_minimum_vector_length_16 RESULT=pass
27705 23:02:07.295801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_maximum_vector_length_256 RESULT=pass>
27706 23:02:07.296257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_maximum_vector_length_256 RESULT=pass
27708 23:02:07.350562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_current_VL_is_32 RESULT=pass
27710 23:02:07.351125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_current_VL_is_32 RESULT=pass>
27711 23:02:07.397220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 RESULT=pass
27713 23:02:07.397776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 RESULT=pass>
27714 23:02:07.431778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_min_max RESULT=pass
27716 23:02:07.432211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_min_max RESULT=pass>
27717 23:02:07.467493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_used_default RESULT=pass>
27718 23:02:07.467900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_used_default RESULT=pass
27720 23:02:07.502621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_was_inherited RESULT=pass>
27721 23:02:07.503035 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_was_inherited RESULT=pass
27723 23:02:07.537526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_set_on_exec RESULT=pass
27725 23:02:07.537967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_set_on_exec RESULT=pass>
27726 23:02:07.572664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors RESULT=pass>
27727 23:02:07.573067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors RESULT=pass
27729 23:02:07.606946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg RESULT=pass
27731 23:02:07.607483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg RESULT=pass>
27732 23:02:07.641010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork_fork_test RESULT=pass>
27733 23:02:07.641477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork_fork_test RESULT=pass
27735 23:02:07.677084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork RESULT=pass>
27736 23:02:07.677544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork RESULT=pass
27738 23:02:07.712438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_16 RESULT=pass>
27739 23:02:07.712893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_16 RESULT=pass
27741 23:02:07.748725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_16 RESULT=pass
27743 23:02:07.749286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_16 RESULT=pass>
27744 23:02:07.783500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_16 RESULT=pass>
27745 23:02:07.783942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_16 RESULT=pass
27747 23:02:07.815488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_32 RESULT=pass>
27748 23:02:07.815947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_32 RESULT=pass
27750 23:02:07.847577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_32 RESULT=pass>
27751 23:02:07.848066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_32 RESULT=pass
27753 23:02:07.879927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_32 RESULT=pass
27755 23:02:07.880493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_32 RESULT=pass>
27756 23:02:07.913471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_48 RESULT=pass
27758 23:02:07.914040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_48 RESULT=pass>
27759 23:02:07.944719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_48 RESULT=skip
27761 23:02:07.945287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_48 RESULT=skip>
27762 23:02:07.978114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_48 RESULT=skip
27764 23:02:07.978862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_48 RESULT=skip>
27765 23:02:08.012786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_64 RESULT=pass
27767 23:02:08.013515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_64 RESULT=pass>
27768 23:02:08.047625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_64 RESULT=pass>
27769 23:02:08.048070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_64 RESULT=pass
27771 23:02:08.084602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_64 RESULT=pass>
27772 23:02:08.085045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_64 RESULT=pass
27774 23:02:08.118141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_80 RESULT=pass>
27775 23:02:08.118571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_80 RESULT=pass
27777 23:02:08.149683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_80 RESULT=skip>
27778 23:02:08.150141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_80 RESULT=skip
27780 23:02:08.181387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_80 RESULT=skip>
27781 23:02:08.181863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_80 RESULT=skip
27783 23:02:08.214137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_96 RESULT=pass>
27784 23:02:08.214633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_96 RESULT=pass
27786 23:02:08.247433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_96 RESULT=skip
27788 23:02:08.248069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_96 RESULT=skip>
27789 23:02:08.282518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_96 RESULT=skip
27791 23:02:08.283099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_96 RESULT=skip>
27792 23:02:08.313841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_112 RESULT=pass>
27793 23:02:08.314304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_112 RESULT=pass
27795 23:02:08.345969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_112 RESULT=skip
27797 23:02:08.346528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_112 RESULT=skip>
27798 23:02:08.377074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_112 RESULT=skip
27800 23:02:08.377636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_112 RESULT=skip>
27801 23:02:08.408377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_128 RESULT=pass
27803 23:02:08.408932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_128 RESULT=pass>
27804 23:02:08.440378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_128 RESULT=pass
27806 23:02:08.440934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_128 RESULT=pass>
27807 23:02:08.472066 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_128 RESULT=pass
27809 23:02:08.472627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_128 RESULT=pass>
27810 23:02:08.503328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_144 RESULT=pass
27812 23:02:08.503877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_144 RESULT=pass>
27813 23:02:08.536402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_144 RESULT=skip>
27814 23:02:08.536864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_144 RESULT=skip
27816 23:02:08.568523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_144 RESULT=skip
27818 23:02:08.569069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_144 RESULT=skip>
27819 23:02:08.599807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_160 RESULT=pass
27821 23:02:08.600403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_160 RESULT=pass>
27822 23:02:08.631276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_160 RESULT=skip
27824 23:02:08.631819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_160 RESULT=skip>
27825 23:02:08.663008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_160 RESULT=skip
27827 23:02:08.663559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_160 RESULT=skip>
27828 23:02:08.694016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_176 RESULT=pass
27830 23:02:08.694485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_176 RESULT=pass>
27831 23:02:08.726125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_176 RESULT=skip>
27832 23:02:08.726607 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_176 RESULT=skip
27834 23:02:08.758260 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_176 RESULT=skip
27836 23:02:08.758734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_176 RESULT=skip>
27837 23:02:08.789961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_192 RESULT=pass>
27838 23:02:08.790398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_192 RESULT=pass
27840 23:02:08.822101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_192 RESULT=skip>
27841 23:02:08.822541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_192 RESULT=skip
27843 23:02:08.854589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_192 RESULT=skip>
27844 23:02:08.855070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_192 RESULT=skip
27846 23:02:08.886892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_208 RESULT=pass>
27847 23:02:08.887345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_208 RESULT=pass
27849 23:02:08.920834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_208 RESULT=skip
27851 23:02:08.921453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_208 RESULT=skip>
27852 23:02:08.954920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_208 RESULT=skip>
27853 23:02:08.955285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_208 RESULT=skip
27855 23:02:08.988915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_224 RESULT=pass>
27856 23:02:08.989386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_224 RESULT=pass
27858 23:02:09.037381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_224 RESULT=skip>
27859 23:02:09.037811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_224 RESULT=skip
27861 23:02:09.077528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_224 RESULT=skip>
27862 23:02:09.077958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_224 RESULT=skip
27864 23:02:09.111062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_240 RESULT=pass>
27865 23:02:09.111510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_240 RESULT=pass
27867 23:02:09.145158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_240 RESULT=skip
27869 23:02:09.145737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_240 RESULT=skip>
27870 23:02:09.178790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_240 RESULT=skip>
27871 23:02:09.179256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_240 RESULT=skip
27873 23:02:09.212131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_256 RESULT=pass>
27874 23:02:09.212600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_256 RESULT=pass
27876 23:02:09.246158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_256 RESULT=pass
27878 23:02:09.246715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_256 RESULT=pass>
27879 23:02:09.283179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_256 RESULT=pass>
27880 23:02:09.283596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_256 RESULT=pass
27882 23:02:09.317991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_272 RESULT=pass
27884 23:02:09.318463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_272 RESULT=pass>
27885 23:02:09.353205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_272 RESULT=skip>
27886 23:02:09.353644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_272 RESULT=skip
27888 23:02:09.388727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_272 RESULT=skip
27890 23:02:09.389189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_272 RESULT=skip>
27891 23:02:09.422934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_288 RESULT=pass>
27892 23:02:09.423400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_288 RESULT=pass
27894 23:02:09.457258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_288 RESULT=skip>
27895 23:02:09.457693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_288 RESULT=skip
27897 23:02:09.493033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_288 RESULT=skip
27899 23:02:09.493499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_288 RESULT=skip>
27900 23:02:09.526877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_304 RESULT=pass
27902 23:02:09.527327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_304 RESULT=pass>
27903 23:02:09.560250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_304 RESULT=skip>
27904 23:02:09.560725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_304 RESULT=skip
27906 23:02:09.594471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_304 RESULT=skip>
27907 23:02:09.594917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_304 RESULT=skip
27909 23:02:09.628777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_320 RESULT=pass>
27910 23:02:09.629276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_320 RESULT=pass
27912 23:02:09.662231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_320 RESULT=skip>
27913 23:02:09.662671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_320 RESULT=skip
27915 23:02:09.696315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_320 RESULT=skip
27917 23:02:09.696872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_320 RESULT=skip>
27918 23:02:09.729901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_336 RESULT=pass
27920 23:02:09.730494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_336 RESULT=pass>
27921 23:02:09.763363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_336 RESULT=skip>
27922 23:02:09.763834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_336 RESULT=skip
27924 23:02:09.797638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_336 RESULT=skip>
27925 23:02:09.798097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_336 RESULT=skip
27927 23:02:09.831923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_352 RESULT=pass
27929 23:02:09.832503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_352 RESULT=pass>
27930 23:02:09.865620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_352 RESULT=skip>
27931 23:02:09.866112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_352 RESULT=skip
27933 23:02:09.899321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_352 RESULT=skip>
27934 23:02:09.899759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_352 RESULT=skip
27936 23:02:09.933162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_368 RESULT=pass>
27937 23:02:09.933599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_368 RESULT=pass
27939 23:02:09.967065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_368 RESULT=skip>
27940 23:02:09.967498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_368 RESULT=skip
27942 23:02:10.001850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_368 RESULT=skip
27944 23:02:10.002291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_368 RESULT=skip>
27945 23:02:10.035530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_384 RESULT=pass>
27946 23:02:10.036009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_384 RESULT=pass
27948 23:02:10.069000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_384 RESULT=skip>
27949 23:02:10.069498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_384 RESULT=skip
27951 23:02:10.103253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_384 RESULT=skip
27953 23:02:10.103859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_384 RESULT=skip>
27954 23:02:10.139947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_400 RESULT=pass
27956 23:02:10.140455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_400 RESULT=pass>
27957 23:02:10.173812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_400 RESULT=skip
27959 23:02:10.174245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_400 RESULT=skip>
27960 23:02:10.208303 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_400 RESULT=skip>
27961 23:02:10.208749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_400 RESULT=skip
27963 23:02:10.243334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_416 RESULT=pass
27965 23:02:10.243789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_416 RESULT=pass>
27966 23:02:10.277486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_416 RESULT=skip
27968 23:02:10.277949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_416 RESULT=skip>
27969 23:02:10.313463 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_416 RESULT=skip
27971 23:02:10.314085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_416 RESULT=skip>
27972 23:02:10.348931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_432 RESULT=pass>
27973 23:02:10.349435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_432 RESULT=pass
27975 23:02:10.384756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_432 RESULT=skip
27977 23:02:10.385371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_432 RESULT=skip>
27978 23:02:10.419100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_432 RESULT=skip
27980 23:02:10.419654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_432 RESULT=skip>
27981 23:02:10.453000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_448 RESULT=pass>
27982 23:02:10.453476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_448 RESULT=pass
27984 23:02:10.488264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_448 RESULT=skip>
27985 23:02:10.488743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_448 RESULT=skip
27987 23:02:10.524043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_448 RESULT=skip
27989 23:02:10.524883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_448 RESULT=skip>
27990 23:02:10.558783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_464 RESULT=pass>
27991 23:02:10.559214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_464 RESULT=pass
27993 23:02:10.594096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_464 RESULT=skip
27995 23:02:10.594567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_464 RESULT=skip>
27996 23:02:10.629061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_464 RESULT=skip>
27997 23:02:10.629540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_464 RESULT=skip
27999 23:02:10.662982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_480 RESULT=pass>
28000 23:02:10.663429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_480 RESULT=pass
28002 23:02:10.697173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_480 RESULT=skip>
28003 23:02:10.697616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_480 RESULT=skip
28005 23:02:10.733154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_480 RESULT=skip
28007 23:02:10.733846 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_480 RESULT=skip>
28008 23:02:10.766882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_496 RESULT=pass>
28009 23:02:10.767410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_496 RESULT=pass
28011 23:02:10.801191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_496 RESULT=skip>
28012 23:02:10.801644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_496 RESULT=skip
28014 23:02:10.835265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_496 RESULT=skip
28016 23:02:10.835790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_496 RESULT=skip>
28017 23:02:10.869232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_512 RESULT=pass
28019 23:02:10.869785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_512 RESULT=pass>
28020 23:02:10.902764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_512 RESULT=skip
28022 23:02:10.903231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_512 RESULT=skip>
28023 23:02:10.938735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_512 RESULT=skip>
28024 23:02:10.939126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_512 RESULT=skip
28026 23:02:10.972867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_528 RESULT=pass
28028 23:02:10.973500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_528 RESULT=pass>
28029 23:02:11.006855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_528 RESULT=skip
28031 23:02:11.007490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_528 RESULT=skip>
28032 23:02:11.041039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_528 RESULT=skip>
28033 23:02:11.041518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_528 RESULT=skip
28035 23:02:11.078532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_544 RESULT=pass>
28036 23:02:11.079022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_544 RESULT=pass
28038 23:02:11.115702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_544 RESULT=skip
28040 23:02:11.116250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_544 RESULT=skip>
28041 23:02:11.153863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_544 RESULT=skip>
28042 23:02:11.154317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_544 RESULT=skip
28044 23:02:11.190365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_560 RESULT=pass>
28045 23:02:11.190826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_560 RESULT=pass
28047 23:02:11.227685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_560 RESULT=skip
28049 23:02:11.228152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_560 RESULT=skip>
28050 23:02:11.265657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_560 RESULT=skip>
28051 23:02:11.266115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_560 RESULT=skip
28053 23:02:11.303203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_576 RESULT=pass>
28054 23:02:11.303650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_576 RESULT=pass
28056 23:02:11.341088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_576 RESULT=skip
28058 23:02:11.341644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_576 RESULT=skip>
28059 23:02:11.377133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_576 RESULT=skip>
28060 23:02:11.377571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_576 RESULT=skip
28062 23:02:11.411258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_592 RESULT=pass
28064 23:02:11.411883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_592 RESULT=pass>
28065 23:02:11.449030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_592 RESULT=skip
28067 23:02:11.449709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_592 RESULT=skip>
28068 23:02:11.483401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_592 RESULT=skip>
28069 23:02:11.483920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_592 RESULT=skip
28071 23:02:11.518222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_608 RESULT=pass>
28072 23:02:11.518740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_608 RESULT=pass
28074 23:02:11.555581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_608 RESULT=skip>
28075 23:02:11.556028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_608 RESULT=skip
28077 23:02:11.594853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_608 RESULT=skip>
28078 23:02:11.595340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_608 RESULT=skip
28080 23:02:11.633545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_624 RESULT=pass
28082 23:02:11.634153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_624 RESULT=pass>
28083 23:02:11.672993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_624 RESULT=skip>
28084 23:02:11.673434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_624 RESULT=skip
28086 23:02:11.710445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_624 RESULT=skip>
28087 23:02:11.710882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_624 RESULT=skip
28089 23:02:11.748803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_640 RESULT=pass>
28090 23:02:11.749310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_640 RESULT=pass
28092 23:02:11.786907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_640 RESULT=skip
28094 23:02:11.787551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_640 RESULT=skip>
28095 23:02:11.825277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_640 RESULT=skip
28097 23:02:11.825939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_640 RESULT=skip>
28098 23:02:11.859544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_656 RESULT=pass>
28099 23:02:11.860054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_656 RESULT=pass
28101 23:02:11.896868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_656 RESULT=skip>
28102 23:02:11.897362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_656 RESULT=skip
28104 23:02:11.931230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_656 RESULT=skip>
28105 23:02:11.931717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_656 RESULT=skip
28107 23:02:11.966229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_672 RESULT=pass>
28108 23:02:11.966657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_672 RESULT=pass
28110 23:02:12.001125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_672 RESULT=skip>
28111 23:02:12.001535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_672 RESULT=skip
28113 23:02:12.037882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_672 RESULT=skip
28115 23:02:12.038497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_672 RESULT=skip>
28116 23:02:12.074376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_688 RESULT=pass>
28117 23:02:12.074832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_688 RESULT=pass
28119 23:02:12.111297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_688 RESULT=skip>
28120 23:02:12.111753 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_688 RESULT=skip
28122 23:02:12.146772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_688 RESULT=skip>
28123 23:02:12.147263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_688 RESULT=skip
28125 23:02:12.181780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_704 RESULT=pass>
28126 23:02:12.182261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_704 RESULT=pass
28128 23:02:12.218803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_704 RESULT=skip
28130 23:02:12.219438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_704 RESULT=skip>
28131 23:02:12.255286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_704 RESULT=skip>
28132 23:02:12.255729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_704 RESULT=skip
28134 23:02:12.290993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_720 RESULT=pass>
28135 23:02:12.291450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_720 RESULT=pass
28137 23:02:12.325872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_720 RESULT=skip>
28138 23:02:12.326326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_720 RESULT=skip
28140 23:02:12.360365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_720 RESULT=skip
28142 23:02:12.360913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_720 RESULT=skip>
28143 23:02:12.396296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_736 RESULT=pass>
28144 23:02:12.396731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_736 RESULT=pass
28146 23:02:12.431985 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_736 RESULT=skip
28148 23:02:12.432459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_736 RESULT=skip>
28149 23:02:12.469664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_736 RESULT=skip>
28150 23:02:12.470101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_736 RESULT=skip
28152 23:02:12.505063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_752 RESULT=pass>
28153 23:02:12.505499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_752 RESULT=pass
28155 23:02:12.540520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_752 RESULT=skip>
28156 23:02:12.540957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_752 RESULT=skip
28158 23:02:12.577063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_752 RESULT=skip
28160 23:02:12.577504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_752 RESULT=skip>
28161 23:02:12.613990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_768 RESULT=pass>
28162 23:02:12.614398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_768 RESULT=pass
28164 23:02:12.651161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_768 RESULT=skip
28166 23:02:12.651619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_768 RESULT=skip>
28167 23:02:12.689389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_768 RESULT=skip>
28168 23:02:12.689832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_768 RESULT=skip
28170 23:02:12.725175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_784 RESULT=pass
28172 23:02:12.725629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_784 RESULT=pass>
28173 23:02:12.761454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_784 RESULT=skip
28175 23:02:12.761921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_784 RESULT=skip>
28176 23:02:12.797763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_784 RESULT=skip
28178 23:02:12.798219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_784 RESULT=skip>
28179 23:02:12.829465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_800 RESULT=pass>
28180 23:02:12.829912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_800 RESULT=pass
28182 23:02:12.862452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_800 RESULT=skip>
28183 23:02:12.862897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_800 RESULT=skip
28185 23:02:12.895670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_800 RESULT=skip
28187 23:02:12.896125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_800 RESULT=skip>
28188 23:02:12.928679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_816 RESULT=pass>
28189 23:02:12.929123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_816 RESULT=pass
28191 23:02:12.961690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_816 RESULT=skip
28193 23:02:12.962249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_816 RESULT=skip>
28194 23:02:12.993535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_816 RESULT=skip>
28195 23:02:12.994007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_816 RESULT=skip
28197 23:02:13.027404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_832 RESULT=pass>
28198 23:02:13.027881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_832 RESULT=pass
28200 23:02:13.059706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_832 RESULT=skip>
28201 23:02:13.060157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_832 RESULT=skip
28203 23:02:13.092853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_832 RESULT=skip
28205 23:02:13.093317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_832 RESULT=skip>
28206 23:02:13.125712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_848 RESULT=pass
28208 23:02:13.126249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_848 RESULT=pass>
28209 23:02:13.157770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_848 RESULT=skip>
28210 23:02:13.158196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_848 RESULT=skip
28212 23:02:13.189806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_848 RESULT=skip>
28213 23:02:13.190233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_848 RESULT=skip
28215 23:02:13.222145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_864 RESULT=pass
28217 23:02:13.222608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_864 RESULT=pass>
28218 23:02:13.254614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_864 RESULT=skip
28220 23:02:13.255074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_864 RESULT=skip>
28221 23:02:13.286687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_864 RESULT=skip>
28222 23:02:13.287150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_864 RESULT=skip
28224 23:02:13.318902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_880 RESULT=pass>
28225 23:02:13.319376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_880 RESULT=pass
28227 23:02:13.351089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_880 RESULT=skip
28229 23:02:13.351702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_880 RESULT=skip>
28230 23:02:13.384429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_880 RESULT=skip>
28231 23:02:13.384891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_880 RESULT=skip
28233 23:02:13.418843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_896 RESULT=pass>
28234 23:02:13.419288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_896 RESULT=pass
28236 23:02:13.454714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_896 RESULT=skip>
28237 23:02:13.455151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_896 RESULT=skip
28239 23:02:13.490325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_896 RESULT=skip
28241 23:02:13.490783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_896 RESULT=skip>
28242 23:02:13.524862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_912 RESULT=pass>
28243 23:02:13.525291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_912 RESULT=pass
28245 23:02:13.559908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_912 RESULT=skip
28247 23:02:13.560385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_912 RESULT=skip>
28248 23:02:13.593159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_912 RESULT=skip
28250 23:02:13.593603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_912 RESULT=skip>
28251 23:02:13.624782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_928 RESULT=pass>
28252 23:02:13.625259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_928 RESULT=pass
28254 23:02:13.656361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_928 RESULT=skip
28256 23:02:13.656928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_928 RESULT=skip>
28257 23:02:13.687873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_928 RESULT=skip
28259 23:02:13.688443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_928 RESULT=skip>
28260 23:02:13.719586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_944 RESULT=pass
28262 23:02:13.720126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_944 RESULT=pass>
28263 23:02:13.751477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_944 RESULT=skip
28265 23:02:13.752019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_944 RESULT=skip>
28266 23:02:13.783089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_944 RESULT=skip
28268 23:02:13.783622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_944 RESULT=skip>
28269 23:02:13.814815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_960 RESULT=pass>
28270 23:02:13.815284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_960 RESULT=pass
28272 23:02:13.846670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_960 RESULT=skip>
28273 23:02:13.847137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_960 RESULT=skip
28275 23:02:13.878151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_960 RESULT=skip
28277 23:02:13.878693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_960 RESULT=skip>
28278 23:02:13.910365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_976 RESULT=pass
28280 23:02:13.910885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_976 RESULT=pass>
28281 23:02:13.942344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_976 RESULT=skip
28283 23:02:13.942880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_976 RESULT=skip>
28284 23:02:13.974204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_976 RESULT=skip
28286 23:02:13.974730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_976 RESULT=skip>
28287 23:02:14.005200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_992 RESULT=pass>
28288 23:02:14.005641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_992 RESULT=pass
28290 23:02:14.036493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_992 RESULT=skip>
28291 23:02:14.036948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_992 RESULT=skip
28293 23:02:14.069019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_992 RESULT=skip
28295 23:02:14.069558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_992 RESULT=skip>
28296 23:02:14.099917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1008 RESULT=pass
28298 23:02:14.100474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1008 RESULT=pass>
28299 23:02:14.131134 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1008 RESULT=skip>
28300 23:02:14.131582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1008 RESULT=skip
28302 23:02:14.188185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1008 RESULT=skip>
28303 23:02:14.188649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1008 RESULT=skip
28305 23:02:14.220011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1024 RESULT=pass
28307 23:02:14.220452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1024 RESULT=pass>
28308 23:02:14.252339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1024 RESULT=skip>
28309 23:02:14.252736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1024 RESULT=skip
28311 23:02:14.285960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1024 RESULT=skip
28313 23:02:14.286483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1024 RESULT=skip>
28314 23:02:14.317328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1040 RESULT=pass
28316 23:02:14.317908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1040 RESULT=pass>
28317 23:02:14.348815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1040 RESULT=skip
28319 23:02:14.349372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1040 RESULT=skip>
28320 23:02:14.380843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1040 RESULT=skip
28322 23:02:14.381409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1040 RESULT=skip>
28323 23:02:14.412468 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1056 RESULT=pass>
28324 23:02:14.412924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1056 RESULT=pass
28326 23:02:14.445509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1056 RESULT=skip
28328 23:02:14.446069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1056 RESULT=skip>
28329 23:02:14.477815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1056 RESULT=skip>
28330 23:02:14.478246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1056 RESULT=skip
28332 23:02:14.509174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1072 RESULT=pass>
28333 23:02:14.509618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1072 RESULT=pass
28335 23:02:14.540826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1072 RESULT=skip>
28336 23:02:14.541230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1072 RESULT=skip
28338 23:02:14.572621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1072 RESULT=skip>
28339 23:02:14.573032 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1072 RESULT=skip
28341 23:02:14.604368 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1088 RESULT=pass>
28342 23:02:14.604833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1088 RESULT=pass
28344 23:02:14.636970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1088 RESULT=skip
28346 23:02:14.637519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1088 RESULT=skip>
28347 23:02:14.668536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1088 RESULT=skip
28349 23:02:14.669076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1088 RESULT=skip>
28350 23:02:14.699883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1104 RESULT=pass
28352 23:02:14.700416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1104 RESULT=pass>
28353 23:02:14.732101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1104 RESULT=skip
28355 23:02:14.732641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1104 RESULT=skip>
28356 23:02:14.763595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1104 RESULT=skip>
28357 23:02:14.764041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1104 RESULT=skip
28359 23:02:14.795404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1120 RESULT=pass>
28360 23:02:14.795868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1120 RESULT=pass
28362 23:02:14.828158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1120 RESULT=skip>
28363 23:02:14.828622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1120 RESULT=skip
28365 23:02:14.862572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1120 RESULT=skip>
28366 23:02:14.862994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1120 RESULT=skip
28368 23:02:14.897460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1136 RESULT=pass
28370 23:02:14.898042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1136 RESULT=pass>
28371 23:02:14.933485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1136 RESULT=skip
28373 23:02:14.934041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1136 RESULT=skip>
28374 23:02:14.969461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1136 RESULT=skip>
28375 23:02:14.969924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1136 RESULT=skip
28377 23:02:15.006042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1152 RESULT=pass>
28378 23:02:15.006518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1152 RESULT=pass
28380 23:02:15.041450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1152 RESULT=skip>
28381 23:02:15.041926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1152 RESULT=skip
28383 23:02:15.077196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1152 RESULT=skip>
28384 23:02:15.077665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1152 RESULT=skip
28386 23:02:15.112983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1168 RESULT=pass
28388 23:02:15.113550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1168 RESULT=pass>
28389 23:02:15.145400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1168 RESULT=skip
28391 23:02:15.145945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1168 RESULT=skip>
28392 23:02:15.177211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1168 RESULT=skip>
28393 23:02:15.177683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1168 RESULT=skip
28395 23:02:15.208888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1184 RESULT=pass>
28396 23:02:15.209362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1184 RESULT=pass
28398 23:02:15.240865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1184 RESULT=skip
28400 23:02:15.241496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1184 RESULT=skip>
28401 23:02:15.271853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1184 RESULT=skip
28403 23:02:15.272421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1184 RESULT=skip>
28404 23:02:15.303310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1200 RESULT=pass
28406 23:02:15.303852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1200 RESULT=pass>
28407 23:02:15.335245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1200 RESULT=skip>
28408 23:02:15.335705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1200 RESULT=skip
28410 23:02:15.367470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1200 RESULT=skip
28412 23:02:15.368010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1200 RESULT=skip>
28413 23:02:15.398869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1216 RESULT=pass
28415 23:02:15.399412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1216 RESULT=pass>
28416 23:02:15.430700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1216 RESULT=skip>
28417 23:02:15.431147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1216 RESULT=skip
28419 23:02:15.462504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1216 RESULT=skip>
28420 23:02:15.462907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1216 RESULT=skip
28422 23:02:15.494711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1232 RESULT=pass
28424 23:02:15.495149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1232 RESULT=pass>
28425 23:02:15.530396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1232 RESULT=skip
28427 23:02:15.530961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1232 RESULT=skip>
28428 23:02:15.575152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1232 RESULT=skip>
28429 23:02:15.575599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1232 RESULT=skip
28431 23:02:15.610442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1248 RESULT=pass
28433 23:02:15.610822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1248 RESULT=pass>
28434 23:02:15.645588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1248 RESULT=skip>
28435 23:02:15.646017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1248 RESULT=skip
28437 23:02:15.680633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1248 RESULT=skip
28439 23:02:15.681101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1248 RESULT=skip>
28440 23:02:15.714098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1264 RESULT=pass>
28441 23:02:15.714477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1264 RESULT=pass
28443 23:02:15.747414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1264 RESULT=skip>
28444 23:02:15.747782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1264 RESULT=skip
28446 23:02:15.780010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1264 RESULT=skip
28448 23:02:15.780437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1264 RESULT=skip>
28449 23:02:15.810990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1280 RESULT=pass>
28450 23:02:15.811376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1280 RESULT=pass
28452 23:02:15.842526 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1280 RESULT=skip>
28453 23:02:15.842921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1280 RESULT=skip
28455 23:02:15.874331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1280 RESULT=skip>
28456 23:02:15.874804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1280 RESULT=skip
28458 23:02:15.905154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1296 RESULT=pass>
28459 23:02:15.905555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1296 RESULT=pass
28461 23:02:15.937184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1296 RESULT=skip>
28462 23:02:15.937601 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1296 RESULT=skip
28464 23:02:15.968633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1296 RESULT=skip>
28465 23:02:15.969124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1296 RESULT=skip
28467 23:02:16.000508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1312 RESULT=pass
28469 23:02:16.001056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1312 RESULT=pass>
28470 23:02:16.032355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1312 RESULT=skip
28472 23:02:16.032948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1312 RESULT=skip>
28473 23:02:16.063874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1312 RESULT=skip
28475 23:02:16.064430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1312 RESULT=skip>
28476 23:02:16.095114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1328 RESULT=pass
28478 23:02:16.095679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1328 RESULT=pass>
28479 23:02:16.126492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1328 RESULT=skip
28481 23:02:16.127048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1328 RESULT=skip>
28482 23:02:16.158069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1328 RESULT=skip
28484 23:02:16.158643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1328 RESULT=skip>
28485 23:02:16.190145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1344 RESULT=pass
28487 23:02:16.190689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1344 RESULT=pass>
28488 23:02:16.221602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1344 RESULT=skip
28490 23:02:16.222145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1344 RESULT=skip>
28491 23:02:16.253077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1344 RESULT=skip
28493 23:02:16.253715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1344 RESULT=skip>
28494 23:02:16.284951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1360 RESULT=pass
28496 23:02:16.285576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1360 RESULT=pass>
28497 23:02:16.316014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1360 RESULT=skip
28499 23:02:16.316582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1360 RESULT=skip>
28500 23:02:16.347681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1360 RESULT=skip
28502 23:02:16.348307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1360 RESULT=skip>
28503 23:02:16.379998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1376 RESULT=pass
28505 23:02:16.380637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1376 RESULT=pass>
28506 23:02:16.411458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1376 RESULT=skip
28508 23:02:16.412016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1376 RESULT=skip>
28509 23:02:16.442143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1376 RESULT=skip
28511 23:02:16.442707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1376 RESULT=skip>
28512 23:02:16.472991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1392 RESULT=pass>
28513 23:02:16.473450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1392 RESULT=pass
28515 23:02:16.504378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1392 RESULT=skip
28517 23:02:16.504926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1392 RESULT=skip>
28518 23:02:16.537348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1392 RESULT=skip>
28519 23:02:16.537815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1392 RESULT=skip
28521 23:02:16.569215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1408 RESULT=pass>
28522 23:02:16.569677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1408 RESULT=pass
28524 23:02:16.600443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1408 RESULT=skip
28526 23:02:16.601347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1408 RESULT=skip>
28527 23:02:16.637063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1408 RESULT=skip>
28528 23:02:16.637541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1408 RESULT=skip
28530 23:02:16.685234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1424 RESULT=pass
28532 23:02:16.686028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1424 RESULT=pass>
28533 23:02:16.722349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1424 RESULT=skip>
28534 23:02:16.722746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1424 RESULT=skip
28536 23:02:16.765587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1424 RESULT=skip>
28537 23:02:16.766010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1424 RESULT=skip
28539 23:02:16.797742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1440 RESULT=pass>
28540 23:02:16.798155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1440 RESULT=pass
28542 23:02:16.829208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1440 RESULT=skip
28544 23:02:16.829810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1440 RESULT=skip>
28545 23:02:16.860985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1440 RESULT=skip>
28546 23:02:16.861442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1440 RESULT=skip
28548 23:02:16.892496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1456 RESULT=pass>
28549 23:02:16.892948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1456 RESULT=pass
28551 23:02:16.924188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1456 RESULT=skip>
28552 23:02:16.924677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1456 RESULT=skip
28554 23:02:16.957131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1456 RESULT=skip
28556 23:02:16.957698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1456 RESULT=skip>
28557 23:02:16.989308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1472 RESULT=pass
28559 23:02:16.989895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1472 RESULT=pass>
28560 23:02:17.020935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1472 RESULT=skip>
28561 23:02:17.021334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1472 RESULT=skip
28563 23:02:17.052787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1472 RESULT=skip>
28564 23:02:17.053247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1472 RESULT=skip
28566 23:02:17.083775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1488 RESULT=pass
28568 23:02:17.084390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1488 RESULT=pass>
28569 23:02:17.115668 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1488 RESULT=skip>
28570 23:02:17.116089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1488 RESULT=skip
28572 23:02:17.147385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1488 RESULT=skip>
28573 23:02:17.147822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1488 RESULT=skip
28575 23:02:17.178320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1504 RESULT=pass
28577 23:02:17.178845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1504 RESULT=pass>
28578 23:02:17.209538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1504 RESULT=skip
28580 23:02:17.210068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1504 RESULT=skip>
28581 23:02:17.241719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1504 RESULT=skip>
28582 23:02:17.242146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1504 RESULT=skip
28584 23:02:17.273175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1520 RESULT=pass
28586 23:02:17.273720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1520 RESULT=pass>
28587 23:02:17.304780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1520 RESULT=skip>
28588 23:02:17.305212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1520 RESULT=skip
28590 23:02:17.336044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1520 RESULT=skip
28592 23:02:17.336632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1520 RESULT=skip>
28593 23:02:17.367064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1536 RESULT=pass>
28594 23:02:17.367498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1536 RESULT=pass
28596 23:02:17.398857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1536 RESULT=skip>
28597 23:02:17.399296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1536 RESULT=skip
28599 23:02:17.431009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1536 RESULT=skip
28601 23:02:17.431608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1536 RESULT=skip>
28602 23:02:17.461699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1552 RESULT=pass>
28603 23:02:17.462146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1552 RESULT=pass
28605 23:02:17.493571 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1552 RESULT=skip
28607 23:02:17.494154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1552 RESULT=skip>
28608 23:02:17.524793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1552 RESULT=skip
28610 23:02:17.525348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1552 RESULT=skip>
28611 23:02:17.555841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1568 RESULT=pass
28613 23:02:17.556314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1568 RESULT=pass>
28614 23:02:17.589456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1568 RESULT=skip
28616 23:02:17.590023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1568 RESULT=skip>
28617 23:02:17.621113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1568 RESULT=skip>
28618 23:02:17.621532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1568 RESULT=skip
28620 23:02:17.651606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1584 RESULT=pass>
28621 23:02:17.652028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1584 RESULT=pass
28623 23:02:17.657142 <47>[ 287.477832] systemd-journald[105]: Sent WATCHDOG=1 notification.
28624 23:02:17.687432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1584 RESULT=skip>
28625 23:02:17.687920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1584 RESULT=skip
28627 23:02:17.718477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1584 RESULT=skip>
28628 23:02:17.718890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1584 RESULT=skip
28630 23:02:17.749709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1600 RESULT=pass
28632 23:02:17.750147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1600 RESULT=pass>
28633 23:02:17.781152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1600 RESULT=skip
28635 23:02:17.781593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1600 RESULT=skip>
28636 23:02:17.812968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1600 RESULT=skip>
28637 23:02:17.813440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1600 RESULT=skip
28639 23:02:17.843898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1616 RESULT=pass
28641 23:02:17.844538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1616 RESULT=pass>
28642 23:02:17.877014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1616 RESULT=skip
28644 23:02:17.877736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1616 RESULT=skip>
28645 23:02:17.909571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1616 RESULT=skip>
28646 23:02:17.910023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1616 RESULT=skip
28648 23:02:17.940845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1632 RESULT=pass
28650 23:02:17.941375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1632 RESULT=pass>
28651 23:02:17.972003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1632 RESULT=skip
28653 23:02:17.972561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1632 RESULT=skip>
28654 23:02:18.003573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1632 RESULT=skip>
28655 23:02:18.004030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1632 RESULT=skip
28657 23:02:18.034328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1648 RESULT=pass
28659 23:02:18.034888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1648 RESULT=pass>
28660 23:02:18.065188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1648 RESULT=skip>
28661 23:02:18.065616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1648 RESULT=skip
28663 23:02:18.096422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1648 RESULT=skip>
28664 23:02:18.096929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1648 RESULT=skip
28666 23:02:18.127012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1664 RESULT=pass
28668 23:02:18.127735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1664 RESULT=pass>
28669 23:02:18.158376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1664 RESULT=skip
28671 23:02:18.158966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1664 RESULT=skip>
28672 23:02:18.189640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1664 RESULT=skip
28674 23:02:18.190203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1664 RESULT=skip>
28675 23:02:18.220670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1680 RESULT=pass>
28676 23:02:18.221138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1680 RESULT=pass
28678 23:02:18.252913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1680 RESULT=skip>
28679 23:02:18.253365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1680 RESULT=skip
28681 23:02:18.283979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1680 RESULT=skip
28683 23:02:18.284536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1680 RESULT=skip>
28684 23:02:18.315518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1696 RESULT=pass
28686 23:02:18.316065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1696 RESULT=pass>
28687 23:02:18.346728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1696 RESULT=skip
28689 23:02:18.347271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1696 RESULT=skip>
28690 23:02:18.377681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1696 RESULT=skip
28692 23:02:18.378229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1696 RESULT=skip>
28693 23:02:18.408921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1712 RESULT=pass
28695 23:02:18.409548 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1712 RESULT=pass>
28696 23:02:18.441056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1712 RESULT=skip>
28697 23:02:18.441514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1712 RESULT=skip
28699 23:02:18.471443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1712 RESULT=skip>
28700 23:02:18.471889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1712 RESULT=skip
28702 23:02:18.502098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1728 RESULT=pass>
28703 23:02:18.502541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1728 RESULT=pass
28705 23:02:18.532841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1728 RESULT=skip>
28706 23:02:18.533308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1728 RESULT=skip
28708 23:02:18.564784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1728 RESULT=skip
28710 23:02:18.565409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1728 RESULT=skip>
28711 23:02:18.598065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1744 RESULT=pass>
28712 23:02:18.598512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1744 RESULT=pass
28714 23:02:18.630527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1744 RESULT=skip>
28715 23:02:18.631015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1744 RESULT=skip
28717 23:02:18.662063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1744 RESULT=skip>
28718 23:02:18.662543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1744 RESULT=skip
28720 23:02:18.696047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1760 RESULT=pass
28722 23:02:18.696669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1760 RESULT=pass>
28723 23:02:18.728355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1760 RESULT=skip>
28724 23:02:18.728819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1760 RESULT=skip
28726 23:02:18.760452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1760 RESULT=skip
28728 23:02:18.761024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1760 RESULT=skip>
28729 23:02:18.791935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1776 RESULT=pass
28731 23:02:18.792510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1776 RESULT=pass>
28732 23:02:18.823451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1776 RESULT=skip>
28733 23:02:18.823917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1776 RESULT=skip
28735 23:02:18.855391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1776 RESULT=skip>
28736 23:02:18.855844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1776 RESULT=skip
28738 23:02:18.886998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1792 RESULT=pass>
28739 23:02:18.887450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1792 RESULT=pass
28741 23:02:18.918576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1792 RESULT=skip
28743 23:02:18.919020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1792 RESULT=skip>
28744 23:02:18.949915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1792 RESULT=skip>
28745 23:02:18.950394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1792 RESULT=skip
28747 23:02:18.981406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1808 RESULT=pass
28749 23:02:18.981970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1808 RESULT=pass>
28750 23:02:19.013705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1808 RESULT=skip
28752 23:02:19.014268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1808 RESULT=skip>
28753 23:02:19.045234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1808 RESULT=skip
28755 23:02:19.045829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1808 RESULT=skip>
28756 23:02:19.076764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1824 RESULT=pass>
28757 23:02:19.077232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1824 RESULT=pass
28759 23:02:19.108851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1824 RESULT=skip>
28760 23:02:19.109307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1824 RESULT=skip
28762 23:02:19.141060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1824 RESULT=skip
28764 23:02:19.141610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1824 RESULT=skip>
28765 23:02:19.173306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1840 RESULT=pass
28767 23:02:19.173845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1840 RESULT=pass>
28768 23:02:19.205345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1840 RESULT=skip>
28769 23:02:19.205803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1840 RESULT=skip
28771 23:02:19.237235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1840 RESULT=skip>
28772 23:02:19.237704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1840 RESULT=skip
28774 23:02:19.285271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1856 RESULT=pass>
28775 23:02:19.285799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1856 RESULT=pass
28777 23:02:19.323567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1856 RESULT=skip>
28778 23:02:19.324010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1856 RESULT=skip
28780 23:02:19.359217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1856 RESULT=skip
28782 23:02:19.359767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1856 RESULT=skip>
28783 23:02:19.393470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1872 RESULT=pass
28785 23:02:19.393947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1872 RESULT=pass>
28786 23:02:19.426882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1872 RESULT=skip>
28787 23:02:19.427286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1872 RESULT=skip
28789 23:02:19.460386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1872 RESULT=skip>
28790 23:02:19.460936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1872 RESULT=skip
28792 23:02:19.495378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1888 RESULT=pass>
28793 23:02:19.495833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1888 RESULT=pass
28795 23:02:19.530210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1888 RESULT=skip
28797 23:02:19.530762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1888 RESULT=skip>
28798 23:02:19.564289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1888 RESULT=skip>
28799 23:02:19.564775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1888 RESULT=skip
28801 23:02:19.597758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1904 RESULT=pass>
28802 23:02:19.598243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1904 RESULT=pass
28804 23:02:19.632532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1904 RESULT=skip
28806 23:02:19.633036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1904 RESULT=skip>
28807 23:02:19.665347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1904 RESULT=skip>
28808 23:02:19.665785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1904 RESULT=skip
28810 23:02:19.696986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1920 RESULT=pass>
28811 23:02:19.697454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1920 RESULT=pass
28813 23:02:19.728567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1920 RESULT=skip>
28814 23:02:19.729029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1920 RESULT=skip
28816 23:02:19.760641 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1920 RESULT=skip
28818 23:02:19.761192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1920 RESULT=skip>
28819 23:02:19.792638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1936 RESULT=pass
28821 23:02:19.793175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1936 RESULT=pass>
28822 23:02:19.824613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1936 RESULT=skip
28824 23:02:19.825170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1936 RESULT=skip>
28825 23:02:19.855663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1936 RESULT=skip
28827 23:02:19.856213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1936 RESULT=skip>
28828 23:02:19.887356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1952 RESULT=pass>
28829 23:02:19.887831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1952 RESULT=pass
28831 23:02:19.918856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1952 RESULT=skip>
28832 23:02:19.919299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1952 RESULT=skip
28834 23:02:19.950082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1952 RESULT=skip>
28835 23:02:19.950526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1952 RESULT=skip
28837 23:02:19.981728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1968 RESULT=pass
28839 23:02:19.982618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1968 RESULT=pass>
28840 23:02:20.013016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1968 RESULT=skip>
28841 23:02:20.013464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1968 RESULT=skip
28843 23:02:20.045030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1968 RESULT=skip>
28844 23:02:20.045472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1968 RESULT=skip
28846 23:02:20.077287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_1984 RESULT=pass>
28847 23:02:20.077748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_1984 RESULT=pass
28849 23:02:20.108577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1984 RESULT=skip
28851 23:02:20.109109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_1984 RESULT=skip>
28852 23:02:20.140492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1984 RESULT=skip>
28853 23:02:20.140928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_1984 RESULT=skip
28855 23:02:20.171730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2000 RESULT=pass
28857 23:02:20.172314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2000 RESULT=pass>
28858 23:02:20.203776 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2000 RESULT=skip
28860 23:02:20.204404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2000 RESULT=skip>
28861 23:02:20.235642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2000 RESULT=skip>
28862 23:02:20.236097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2000 RESULT=skip
28864 23:02:20.267175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2016 RESULT=pass>
28865 23:02:20.267634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2016 RESULT=pass
28867 23:02:20.299201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2016 RESULT=skip
28869 23:02:20.299667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2016 RESULT=skip>
28870 23:02:20.331606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2016 RESULT=skip
28872 23:02:20.332055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2016 RESULT=skip>
28873 23:02:20.362818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2032 RESULT=pass>
28874 23:02:20.363228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2032 RESULT=pass
28876 23:02:20.394759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2032 RESULT=skip>
28877 23:02:20.395194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2032 RESULT=skip
28879 23:02:20.425982 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2032 RESULT=skip>
28880 23:02:20.426393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2032 RESULT=skip
28882 23:02:20.457576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2048 RESULT=pass>
28883 23:02:20.457991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2048 RESULT=pass
28885 23:02:20.488823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2048 RESULT=skip>
28886 23:02:20.489227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2048 RESULT=skip
28888 23:02:20.521961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2048 RESULT=skip>
28889 23:02:20.522420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2048 RESULT=skip
28891 23:02:20.553584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2064 RESULT=pass>
28892 23:02:20.554063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2064 RESULT=pass
28894 23:02:20.584681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2064 RESULT=skip
28896 23:02:20.585135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2064 RESULT=skip>
28897 23:02:20.616994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2064 RESULT=skip
28899 23:02:20.617553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2064 RESULT=skip>
28900 23:02:20.648729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2080 RESULT=pass>
28901 23:02:20.649196 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2080 RESULT=pass
28903 23:02:20.681005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2080 RESULT=skip
28905 23:02:20.681569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2080 RESULT=skip>
28906 23:02:20.712965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2080 RESULT=skip
28908 23:02:20.713397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2080 RESULT=skip>
28909 23:02:20.744655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2096 RESULT=pass
28911 23:02:20.745073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2096 RESULT=pass>
28912 23:02:20.776454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2096 RESULT=skip>
28913 23:02:20.776898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2096 RESULT=skip
28915 23:02:20.807577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2096 RESULT=skip>
28916 23:02:20.807975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2096 RESULT=skip
28918 23:02:20.839234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2112 RESULT=pass>
28919 23:02:20.839691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2112 RESULT=pass
28921 23:02:20.870989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2112 RESULT=skip
28923 23:02:20.871564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2112 RESULT=skip>
28924 23:02:20.902915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2112 RESULT=skip
28926 23:02:20.903336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2112 RESULT=skip>
28927 23:02:20.935210 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2128 RESULT=pass
28929 23:02:20.935638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2128 RESULT=pass>
28930 23:02:20.967384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2128 RESULT=skip>
28931 23:02:20.967781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2128 RESULT=skip
28933 23:02:20.999078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2128 RESULT=skip>
28934 23:02:20.999503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2128 RESULT=skip
28936 23:02:21.030512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2144 RESULT=pass>
28937 23:02:21.030908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2144 RESULT=pass
28939 23:02:21.062123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2144 RESULT=skip>
28940 23:02:21.062604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2144 RESULT=skip
28942 23:02:21.094835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2144 RESULT=skip>
28943 23:02:21.095304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2144 RESULT=skip
28945 23:02:21.126669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2160 RESULT=pass>
28946 23:02:21.127133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2160 RESULT=pass
28948 23:02:21.158244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2160 RESULT=skip
28950 23:02:21.158766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2160 RESULT=skip>
28951 23:02:21.189970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2160 RESULT=skip
28953 23:02:21.190554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2160 RESULT=skip>
28954 23:02:21.221246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2176 RESULT=pass
28956 23:02:21.221801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2176 RESULT=pass>
28957 23:02:21.252634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2176 RESULT=skip>
28958 23:02:21.253111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2176 RESULT=skip
28960 23:02:21.285097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2176 RESULT=skip
28962 23:02:21.285810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2176 RESULT=skip>
28963 23:02:21.318436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2192 RESULT=pass>
28964 23:02:21.318922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2192 RESULT=pass
28966 23:02:21.351117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2192 RESULT=skip>
28967 23:02:21.351528 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2192 RESULT=skip
28969 23:02:21.383389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2192 RESULT=skip
28971 23:02:21.383933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2192 RESULT=skip>
28972 23:02:21.415278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2208 RESULT=pass
28974 23:02:21.415792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2208 RESULT=pass>
28975 23:02:21.447279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2208 RESULT=skip>
28976 23:02:21.447704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2208 RESULT=skip
28978 23:02:21.478859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2208 RESULT=skip>
28979 23:02:21.479288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2208 RESULT=skip
28981 23:02:21.510433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2224 RESULT=pass>
28982 23:02:21.510904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2224 RESULT=pass
28984 23:02:21.542859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2224 RESULT=skip>
28985 23:02:21.543301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2224 RESULT=skip
28987 23:02:21.574873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2224 RESULT=skip>
28988 23:02:21.575315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2224 RESULT=skip
28990 23:02:21.606596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2240 RESULT=pass
28992 23:02:21.607175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2240 RESULT=pass>
28993 23:02:21.638995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2240 RESULT=skip>
28994 23:02:21.639481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2240 RESULT=skip
28996 23:02:21.670829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2240 RESULT=skip>
28997 23:02:21.671300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2240 RESULT=skip
28999 23:02:21.703673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2256 RESULT=pass
29001 23:02:21.704225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2256 RESULT=pass>
29002 23:02:21.736693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2256 RESULT=skip>
29003 23:02:21.737172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2256 RESULT=skip
29005 23:02:21.769501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2256 RESULT=skip>
29006 23:02:21.769991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2256 RESULT=skip
29008 23:02:21.802636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2272 RESULT=pass>
29009 23:02:21.803106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2272 RESULT=pass
29011 23:02:21.834859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2272 RESULT=skip>
29012 23:02:21.835321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2272 RESULT=skip
29014 23:02:21.866704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2272 RESULT=skip>
29015 23:02:21.867148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2272 RESULT=skip
29017 23:02:21.898546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2288 RESULT=pass
29019 23:02:21.899077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2288 RESULT=pass>
29020 23:02:21.930413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2288 RESULT=skip
29022 23:02:21.930946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2288 RESULT=skip>
29023 23:02:21.962348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2288 RESULT=skip
29025 23:02:21.962805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2288 RESULT=skip>
29026 23:02:21.994338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2304 RESULT=pass>
29027 23:02:21.994761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2304 RESULT=pass
29029 23:02:22.026035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2304 RESULT=skip>
29030 23:02:22.026492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2304 RESULT=skip
29032 23:02:22.057712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2304 RESULT=skip
29034 23:02:22.058248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2304 RESULT=skip>
29035 23:02:22.089376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2320 RESULT=pass
29037 23:02:22.089946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2320 RESULT=pass>
29038 23:02:22.121437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2320 RESULT=skip
29040 23:02:22.121983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2320 RESULT=skip>
29041 23:02:22.153555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2320 RESULT=skip>
29042 23:02:22.154021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2320 RESULT=skip
29044 23:02:22.185408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2336 RESULT=pass>
29045 23:02:22.185867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2336 RESULT=pass
29047 23:02:22.217145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2336 RESULT=skip
29049 23:02:22.217697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2336 RESULT=skip>
29050 23:02:22.248445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2336 RESULT=skip>
29051 23:02:22.248877 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2336 RESULT=skip
29053 23:02:22.279223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2352 RESULT=pass>
29054 23:02:22.279674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2352 RESULT=pass
29056 23:02:22.310952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2352 RESULT=skip>
29057 23:02:22.311388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2352 RESULT=skip
29059 23:02:22.342924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2352 RESULT=skip>
29060 23:02:22.343362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2352 RESULT=skip
29062 23:02:22.376675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2368 RESULT=pass
29064 23:02:22.377124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2368 RESULT=pass>
29065 23:02:22.409022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2368 RESULT=skip>
29066 23:02:22.409411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2368 RESULT=skip
29068 23:02:22.440680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2368 RESULT=skip>
29069 23:02:22.441074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2368 RESULT=skip
29071 23:02:22.473093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2384 RESULT=pass
29073 23:02:22.473559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2384 RESULT=pass>
29074 23:02:22.504829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2384 RESULT=skip>
29075 23:02:22.505286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2384 RESULT=skip
29077 23:02:22.537892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2384 RESULT=skip>
29078 23:02:22.538363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2384 RESULT=skip
29080 23:02:22.570766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2400 RESULT=pass
29082 23:02:22.571335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2400 RESULT=pass>
29083 23:02:22.602726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2400 RESULT=skip
29085 23:02:22.603267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2400 RESULT=skip>
29086 23:02:22.634958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2400 RESULT=skip
29088 23:02:22.635532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2400 RESULT=skip>
29089 23:02:22.666487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2416 RESULT=pass
29091 23:02:22.667036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2416 RESULT=pass>
29092 23:02:22.698139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2416 RESULT=skip
29094 23:02:22.698696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2416 RESULT=skip>
29095 23:02:22.730291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2416 RESULT=skip>
29096 23:02:22.730698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2416 RESULT=skip
29098 23:02:22.762745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2432 RESULT=pass>
29099 23:02:22.763192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2432 RESULT=pass
29101 23:02:22.795052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2432 RESULT=skip>
29102 23:02:22.795494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2432 RESULT=skip
29104 23:02:22.827059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2432 RESULT=skip>
29105 23:02:22.827499 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2432 RESULT=skip
29107 23:02:22.858763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2448 RESULT=pass>
29108 23:02:22.859178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2448 RESULT=pass
29110 23:02:22.890569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2448 RESULT=skip>
29111 23:02:22.890982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2448 RESULT=skip
29113 23:02:22.922946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2448 RESULT=skip>
29114 23:02:22.923366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2448 RESULT=skip
29116 23:02:22.954968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2464 RESULT=pass>
29117 23:02:22.955386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2464 RESULT=pass
29119 23:02:22.986325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2464 RESULT=skip>
29120 23:02:22.986780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2464 RESULT=skip
29122 23:02:23.017455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2464 RESULT=skip
29124 23:02:23.018079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2464 RESULT=skip>
29125 23:02:23.048741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2480 RESULT=pass>
29126 23:02:23.049354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2480 RESULT=pass
29128 23:02:23.080313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2480 RESULT=skip>
29129 23:02:23.080722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2480 RESULT=skip
29131 23:02:23.112038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2480 RESULT=skip
29133 23:02:23.112570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2480 RESULT=skip>
29134 23:02:23.145079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2496 RESULT=pass>
29135 23:02:23.145510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2496 RESULT=pass
29137 23:02:23.177502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2496 RESULT=skip>
29138 23:02:23.177966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2496 RESULT=skip
29140 23:02:23.209332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2496 RESULT=skip
29142 23:02:23.209947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2496 RESULT=skip>
29143 23:02:23.242213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2512 RESULT=pass>
29144 23:02:23.242735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2512 RESULT=pass
29146 23:02:23.274152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2512 RESULT=skip>
29147 23:02:23.274563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2512 RESULT=skip
29149 23:02:23.304898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2512 RESULT=skip>
29150 23:02:23.305326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2512 RESULT=skip
29152 23:02:23.336286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2528 RESULT=pass>
29153 23:02:23.336704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2528 RESULT=pass
29155 23:02:23.367730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2528 RESULT=skip
29157 23:02:23.368183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2528 RESULT=skip>
29158 23:02:23.399792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2528 RESULT=skip
29160 23:02:23.400349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2528 RESULT=skip>
29161 23:02:23.430424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2544 RESULT=pass>
29162 23:02:23.430892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2544 RESULT=pass
29164 23:02:23.461005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2544 RESULT=skip>
29165 23:02:23.461466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2544 RESULT=skip
29167 23:02:23.491844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2544 RESULT=skip
29169 23:02:23.492400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2544 RESULT=skip>
29170 23:02:23.523077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2560 RESULT=pass>
29171 23:02:23.523520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2560 RESULT=pass
29173 23:02:23.553801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2560 RESULT=skip
29175 23:02:23.554336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2560 RESULT=skip>
29176 23:02:23.585553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2560 RESULT=skip>
29177 23:02:23.586041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2560 RESULT=skip
29179 23:02:23.617179 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2576 RESULT=pass
29181 23:02:23.617738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2576 RESULT=pass>
29182 23:02:23.649123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2576 RESULT=skip>
29183 23:02:23.649562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2576 RESULT=skip
29185 23:02:23.680930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2576 RESULT=skip
29187 23:02:23.681481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2576 RESULT=skip>
29188 23:02:23.712304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2592 RESULT=pass>
29189 23:02:23.712747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2592 RESULT=pass
29191 23:02:23.745224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2592 RESULT=skip
29193 23:02:23.745781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2592 RESULT=skip>
29194 23:02:23.777449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2592 RESULT=skip>
29195 23:02:23.777928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2592 RESULT=skip
29197 23:02:23.809212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2608 RESULT=pass
29199 23:02:23.809767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2608 RESULT=pass>
29200 23:02:23.841275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2608 RESULT=skip>
29201 23:02:23.841690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2608 RESULT=skip
29203 23:02:23.873205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2608 RESULT=skip>
29204 23:02:23.873659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2608 RESULT=skip
29206 23:02:23.905622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2624 RESULT=pass
29208 23:02:23.906212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2624 RESULT=pass>
29209 23:02:23.937189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2624 RESULT=skip
29211 23:02:23.937756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2624 RESULT=skip>
29212 23:02:23.969138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2624 RESULT=skip
29214 23:02:23.969776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2624 RESULT=skip>
29215 23:02:24.001032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2640 RESULT=pass>
29216 23:02:24.001511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2640 RESULT=pass
29218 23:02:24.034643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2640 RESULT=skip>
29219 23:02:24.035025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2640 RESULT=skip
29221 23:02:24.066280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2640 RESULT=skip
29223 23:02:24.066850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2640 RESULT=skip>
29224 23:02:24.097467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2656 RESULT=pass>
29225 23:02:24.097952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2656 RESULT=pass
29227 23:02:24.129579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2656 RESULT=skip>
29228 23:02:24.130021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2656 RESULT=skip
29230 23:02:24.162992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2656 RESULT=skip
29232 23:02:24.163446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2656 RESULT=skip>
29233 23:02:24.194850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2672 RESULT=pass
29235 23:02:24.195286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2672 RESULT=pass>
29236 23:02:24.225895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2672 RESULT=skip>
29237 23:02:24.226315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2672 RESULT=skip
29239 23:02:24.257218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2672 RESULT=skip
29241 23:02:24.257792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2672 RESULT=skip>
29242 23:02:24.288406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2688 RESULT=pass>
29243 23:02:24.288844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2688 RESULT=pass
29245 23:02:24.319127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2688 RESULT=skip>
29246 23:02:24.319579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2688 RESULT=skip
29248 23:02:24.351545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2688 RESULT=skip
29250 23:02:24.352179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2688 RESULT=skip>
29251 23:02:24.390028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2704 RESULT=pass
29253 23:02:24.390640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2704 RESULT=pass>
29254 23:02:24.441467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2704 RESULT=skip>
29255 23:02:24.441843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2704 RESULT=skip
29257 23:02:24.473460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2704 RESULT=skip
29259 23:02:24.474048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2704 RESULT=skip>
29260 23:02:24.504672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2720 RESULT=pass>
29261 23:02:24.505127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2720 RESULT=pass
29263 23:02:24.536052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2720 RESULT=skip
29265 23:02:24.536622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2720 RESULT=skip>
29266 23:02:24.567742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2720 RESULT=skip
29268 23:02:24.568191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2720 RESULT=skip>
29269 23:02:24.600319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2736 RESULT=pass
29271 23:02:24.600754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2736 RESULT=pass>
29272 23:02:24.633086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2736 RESULT=skip
29274 23:02:24.633530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2736 RESULT=skip>
29275 23:02:24.665327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2736 RESULT=skip
29277 23:02:24.665913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2736 RESULT=skip>
29278 23:02:24.696064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2752 RESULT=pass
29280 23:02:24.696611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2752 RESULT=pass>
29281 23:02:24.726875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2752 RESULT=skip
29283 23:02:24.727307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2752 RESULT=skip>
29284 23:02:24.757562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2752 RESULT=skip>
29285 23:02:24.758021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2752 RESULT=skip
29287 23:02:24.789405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2768 RESULT=pass>
29288 23:02:24.789863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2768 RESULT=pass
29290 23:02:24.820720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2768 RESULT=skip
29292 23:02:24.821274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2768 RESULT=skip>
29293 23:02:24.854784 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2768 RESULT=skip>
29294 23:02:24.855268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2768 RESULT=skip
29296 23:02:24.889235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2784 RESULT=pass>
29297 23:02:24.889693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2784 RESULT=pass
29299 23:02:24.921060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2784 RESULT=skip
29301 23:02:24.921598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2784 RESULT=skip>
29302 23:02:24.953009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2784 RESULT=skip>
29303 23:02:24.953467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2784 RESULT=skip
29305 23:02:24.985316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2800 RESULT=pass>
29306 23:02:24.985778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2800 RESULT=pass
29308 23:02:25.017696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2800 RESULT=skip
29310 23:02:25.018142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2800 RESULT=skip>
29311 23:02:25.050947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2800 RESULT=skip
29313 23:02:25.051513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2800 RESULT=skip>
29314 23:02:25.082143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2816 RESULT=pass
29316 23:02:25.082681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2816 RESULT=pass>
29317 23:02:25.113616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2816 RESULT=skip>
29318 23:02:25.114067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2816 RESULT=skip
29320 23:02:25.145231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2816 RESULT=skip>
29321 23:02:25.145682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2816 RESULT=skip
29323 23:02:25.176968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2832 RESULT=pass
29325 23:02:25.177519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2832 RESULT=pass>
29326 23:02:25.208948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2832 RESULT=skip
29328 23:02:25.209499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2832 RESULT=skip>
29329 23:02:25.240055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2832 RESULT=skip
29331 23:02:25.240590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2832 RESULT=skip>
29332 23:02:25.271545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2848 RESULT=pass
29334 23:02:25.272217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2848 RESULT=pass>
29335 23:02:25.304209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2848 RESULT=skip>
29336 23:02:25.304666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2848 RESULT=skip
29338 23:02:25.336029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2848 RESULT=skip
29340 23:02:25.336563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2848 RESULT=skip>
29341 23:02:25.367600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2864 RESULT=pass
29343 23:02:25.368126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2864 RESULT=pass>
29344 23:02:25.399586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2864 RESULT=skip>
29345 23:02:25.400027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2864 RESULT=skip
29347 23:02:25.431102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2864 RESULT=skip
29349 23:02:25.431628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2864 RESULT=skip>
29350 23:02:25.463479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2880 RESULT=pass>
29351 23:02:25.463943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2880 RESULT=pass
29353 23:02:25.495643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2880 RESULT=skip
29355 23:02:25.496179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2880 RESULT=skip>
29356 23:02:25.527266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2880 RESULT=skip>
29357 23:02:25.527702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2880 RESULT=skip
29359 23:02:25.562989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2896 RESULT=pass>
29360 23:02:25.563454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2896 RESULT=pass
29362 23:02:25.596732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2896 RESULT=skip
29364 23:02:25.597351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2896 RESULT=skip>
29365 23:02:25.631193 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2896 RESULT=skip
29367 23:02:25.631777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2896 RESULT=skip>
29368 23:02:25.666835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2912 RESULT=pass>
29369 23:02:25.667299 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2912 RESULT=pass
29371 23:02:25.701691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2912 RESULT=skip>
29372 23:02:25.702156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2912 RESULT=skip
29374 23:02:25.740289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2912 RESULT=skip>
29375 23:02:25.740736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2912 RESULT=skip
29377 23:02:25.774798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2928 RESULT=pass>
29378 23:02:25.775227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2928 RESULT=pass
29380 23:02:25.805779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2928 RESULT=skip
29382 23:02:25.806406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2928 RESULT=skip>
29383 23:02:25.837420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2928 RESULT=skip
29385 23:02:25.837987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2928 RESULT=skip>
29386 23:02:25.868459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2944 RESULT=pass>
29387 23:02:25.868924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2944 RESULT=pass
29389 23:02:25.900617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2944 RESULT=skip
29391 23:02:25.901248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2944 RESULT=skip>
29392 23:02:25.932081 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2944 RESULT=skip>
29393 23:02:25.932513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2944 RESULT=skip
29395 23:02:25.963364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2960 RESULT=pass
29397 23:02:25.963830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2960 RESULT=pass>
29398 23:02:25.994929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2960 RESULT=skip
29400 23:02:25.995378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2960 RESULT=skip>
29401 23:02:26.026799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2960 RESULT=skip
29403 23:02:26.027363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2960 RESULT=skip>
29404 23:02:26.057937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2976 RESULT=pass>
29405 23:02:26.058400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2976 RESULT=pass
29407 23:02:26.089568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2976 RESULT=skip>
29408 23:02:26.090006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2976 RESULT=skip
29410 23:02:26.121198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2976 RESULT=skip>
29411 23:02:26.121640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2976 RESULT=skip
29413 23:02:26.152316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_2992 RESULT=pass>
29414 23:02:26.152744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_2992 RESULT=pass
29416 23:02:26.183710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2992 RESULT=skip
29418 23:02:26.184166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_2992 RESULT=skip>
29419 23:02:26.214866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2992 RESULT=skip>
29420 23:02:26.215325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_2992 RESULT=skip
29422 23:02:26.246999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3008 RESULT=pass>
29423 23:02:26.247455 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3008 RESULT=pass
29425 23:02:26.278045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3008 RESULT=skip>
29426 23:02:26.278519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3008 RESULT=skip
29428 23:02:26.309572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3008 RESULT=skip
29430 23:02:26.310161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3008 RESULT=skip>
29431 23:02:26.341212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3024 RESULT=pass
29433 23:02:26.341777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3024 RESULT=pass>
29434 23:02:26.372536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3024 RESULT=skip>
29435 23:02:26.372980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3024 RESULT=skip
29437 23:02:26.403498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3024 RESULT=skip
29439 23:02:26.404123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3024 RESULT=skip>
29440 23:02:26.434243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3040 RESULT=pass
29442 23:02:26.434883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3040 RESULT=pass>
29443 23:02:26.467698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3040 RESULT=skip
29445 23:02:26.468332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3040 RESULT=skip>
29446 23:02:26.499976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3040 RESULT=skip
29448 23:02:26.500543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3040 RESULT=skip>
29449 23:02:26.531512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3056 RESULT=pass>
29450 23:02:26.531965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3056 RESULT=pass
29452 23:02:26.562994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3056 RESULT=skip>
29453 23:02:26.563428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3056 RESULT=skip
29455 23:02:26.594321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3056 RESULT=skip>
29456 23:02:26.594751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3056 RESULT=skip
29458 23:02:26.625215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3072 RESULT=pass>
29459 23:02:26.625678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3072 RESULT=pass
29461 23:02:26.667055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3072 RESULT=skip>
29462 23:02:26.667495 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3072 RESULT=skip
29464 23:02:26.706775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3072 RESULT=skip>
29465 23:02:26.707239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3072 RESULT=skip
29467 23:02:26.740271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3088 RESULT=pass>
29468 23:02:26.740770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3088 RESULT=pass
29470 23:02:26.774141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3088 RESULT=skip
29472 23:02:26.774738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3088 RESULT=skip>
29473 23:02:26.807696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3088 RESULT=skip
29475 23:02:26.808238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3088 RESULT=skip>
29476 23:02:26.839867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3104 RESULT=pass
29478 23:02:26.840333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3104 RESULT=pass>
29479 23:02:26.871614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3104 RESULT=skip
29481 23:02:26.872068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3104 RESULT=skip>
29482 23:02:26.902625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3104 RESULT=skip>
29483 23:02:26.903082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3104 RESULT=skip
29485 23:02:26.933584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3120 RESULT=pass
29487 23:02:26.934126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3120 RESULT=pass>
29488 23:02:26.964862 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3120 RESULT=skip
29490 23:02:26.965427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3120 RESULT=skip>
29491 23:02:26.995839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3120 RESULT=skip
29493 23:02:26.996401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3120 RESULT=skip>
29494 23:02:27.027214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3136 RESULT=pass
29496 23:02:27.027659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3136 RESULT=pass>
29497 23:02:27.059135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3136 RESULT=skip>
29498 23:02:27.059595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3136 RESULT=skip
29500 23:02:27.091030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3136 RESULT=skip>
29501 23:02:27.091479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3136 RESULT=skip
29503 23:02:27.122573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3152 RESULT=pass>
29504 23:02:27.123015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3152 RESULT=pass
29506 23:02:27.154431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3152 RESULT=skip
29508 23:02:27.154879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3152 RESULT=skip>
29509 23:02:27.186166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3152 RESULT=skip
29511 23:02:27.186607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3152 RESULT=skip>
29512 23:02:27.217515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3168 RESULT=pass
29514 23:02:27.218085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3168 RESULT=pass>
29515 23:02:27.249054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3168 RESULT=skip
29517 23:02:27.249616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3168 RESULT=skip>
29518 23:02:27.281508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3168 RESULT=skip>
29519 23:02:27.281962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3168 RESULT=skip
29521 23:02:27.312957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3184 RESULT=pass>
29522 23:02:27.313416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3184 RESULT=pass
29524 23:02:27.344550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3184 RESULT=skip>
29525 23:02:27.344970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3184 RESULT=skip
29527 23:02:27.375494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3184 RESULT=skip>
29528 23:02:27.375902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3184 RESULT=skip
29530 23:02:27.406129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3200 RESULT=pass>
29531 23:02:27.406527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3200 RESULT=pass
29533 23:02:27.436882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3200 RESULT=skip
29535 23:02:27.437304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3200 RESULT=skip>
29536 23:02:27.467708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3200 RESULT=skip>
29537 23:02:27.468139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3200 RESULT=skip
29539 23:02:27.500036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3216 RESULT=pass
29541 23:02:27.500555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3216 RESULT=pass>
29542 23:02:27.532525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3216 RESULT=skip
29544 23:02:27.533047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3216 RESULT=skip>
29545 23:02:27.564298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3216 RESULT=skip>
29546 23:02:27.564720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3216 RESULT=skip
29548 23:02:27.595452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3232 RESULT=pass>
29549 23:02:27.595843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3232 RESULT=pass
29551 23:02:27.627013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3232 RESULT=skip
29553 23:02:27.627440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3232 RESULT=skip>
29554 23:02:27.658731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3232 RESULT=skip
29556 23:02:27.659324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3232 RESULT=skip>
29557 23:02:27.690252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3248 RESULT=pass>
29558 23:02:27.690754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3248 RESULT=pass
29560 23:02:27.723070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3248 RESULT=skip
29562 23:02:27.723760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3248 RESULT=skip>
29563 23:02:27.757182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3248 RESULT=skip>
29564 23:02:27.757614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3248 RESULT=skip
29566 23:02:27.789069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3264 RESULT=pass
29568 23:02:27.789679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3264 RESULT=pass>
29569 23:02:27.820934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3264 RESULT=skip>
29570 23:02:27.821410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3264 RESULT=skip
29572 23:02:27.852419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3264 RESULT=skip
29574 23:02:27.853059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3264 RESULT=skip>
29575 23:02:27.883531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3280 RESULT=pass>
29576 23:02:27.884025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3280 RESULT=pass
29578 23:02:27.917940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3280 RESULT=skip>
29579 23:02:27.918399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3280 RESULT=skip
29581 23:02:27.949708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3280 RESULT=skip>
29582 23:02:27.950151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3280 RESULT=skip
29584 23:02:27.981377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3296 RESULT=pass
29586 23:02:27.981970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3296 RESULT=pass>
29587 23:02:28.012700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3296 RESULT=skip>
29588 23:02:28.013160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3296 RESULT=skip
29590 23:02:28.044330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3296 RESULT=skip>
29591 23:02:28.044761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3296 RESULT=skip
29593 23:02:28.074596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3312 RESULT=pass>
29594 23:02:28.075077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3312 RESULT=pass
29596 23:02:28.105524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3312 RESULT=skip
29598 23:02:28.106102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3312 RESULT=skip>
29599 23:02:28.137309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3312 RESULT=skip>
29600 23:02:28.137782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3312 RESULT=skip
29602 23:02:28.168890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3328 RESULT=pass>
29603 23:02:28.169348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3328 RESULT=pass
29605 23:02:28.200975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3328 RESULT=skip
29607 23:02:28.201622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3328 RESULT=skip>
29608 23:02:28.233074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3328 RESULT=skip>
29609 23:02:28.233510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3328 RESULT=skip
29611 23:02:28.265221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3344 RESULT=pass>
29612 23:02:28.265668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3344 RESULT=pass
29614 23:02:28.299207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3344 RESULT=skip
29616 23:02:28.299880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3344 RESULT=skip>
29617 23:02:28.331972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3344 RESULT=skip
29619 23:02:28.332574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3344 RESULT=skip>
29620 23:02:28.363910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3360 RESULT=pass>
29621 23:02:28.364400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3360 RESULT=pass
29623 23:02:28.395832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3360 RESULT=skip
29625 23:02:28.396456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3360 RESULT=skip>
29626 23:02:28.427610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3360 RESULT=skip>
29627 23:02:28.428064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3360 RESULT=skip
29629 23:02:28.459576 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3376 RESULT=pass
29631 23:02:28.460117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3376 RESULT=pass>
29632 23:02:28.491534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3376 RESULT=skip>
29633 23:02:28.492053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3376 RESULT=skip
29635 23:02:28.523324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3376 RESULT=skip
29637 23:02:28.524030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3376 RESULT=skip>
29638 23:02:28.555370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3392 RESULT=pass>
29639 23:02:28.555918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3392 RESULT=pass
29641 23:02:28.586970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3392 RESULT=skip>
29642 23:02:28.587479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3392 RESULT=skip
29644 23:02:28.618636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3392 RESULT=skip
29646 23:02:28.619266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3392 RESULT=skip>
29647 23:02:28.650212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3408 RESULT=pass
29649 23:02:28.650858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3408 RESULT=pass>
29650 23:02:28.682160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3408 RESULT=skip
29652 23:02:28.682763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3408 RESULT=skip>
29653 23:02:28.714328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3408 RESULT=skip>
29654 23:02:28.714791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3408 RESULT=skip
29656 23:02:28.746772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3424 RESULT=pass>
29657 23:02:28.747262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3424 RESULT=pass
29659 23:02:28.778111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3424 RESULT=skip
29661 23:02:28.778798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3424 RESULT=skip>
29662 23:02:28.810565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3424 RESULT=skip
29664 23:02:28.811115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3424 RESULT=skip>
29665 23:02:28.841200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3440 RESULT=pass>
29666 23:02:28.841696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3440 RESULT=pass
29668 23:02:28.872794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3440 RESULT=skip
29670 23:02:28.873338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3440 RESULT=skip>
29671 23:02:28.904743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3440 RESULT=skip
29673 23:02:28.905309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3440 RESULT=skip>
29674 23:02:28.935433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3456 RESULT=pass>
29675 23:02:28.935918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3456 RESULT=pass
29677 23:02:28.966299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3456 RESULT=skip>
29678 23:02:28.966775 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3456 RESULT=skip
29680 23:02:28.997353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3456 RESULT=skip
29682 23:02:28.997902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3456 RESULT=skip>
29683 23:02:29.027990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3472 RESULT=pass
29685 23:02:29.028539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3472 RESULT=pass>
29686 23:02:29.059200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3472 RESULT=skip
29688 23:02:29.059767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3472 RESULT=skip>
29689 23:02:29.090519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3472 RESULT=skip
29691 23:02:29.091067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3472 RESULT=skip>
29692 23:02:29.121405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3488 RESULT=pass>
29693 23:02:29.121902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3488 RESULT=pass
29695 23:02:29.153026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3488 RESULT=skip>
29696 23:02:29.153484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3488 RESULT=skip
29698 23:02:29.184627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3488 RESULT=skip
29700 23:02:29.185194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3488 RESULT=skip>
29701 23:02:29.215795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3504 RESULT=pass
29703 23:02:29.216337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3504 RESULT=pass>
29704 23:02:29.247022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3504 RESULT=skip
29706 23:02:29.247563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3504 RESULT=skip>
29707 23:02:29.278041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3504 RESULT=skip
29709 23:02:29.278608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3504 RESULT=skip>
29710 23:02:29.309801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3520 RESULT=pass>
29711 23:02:29.310249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3520 RESULT=pass
29713 23:02:29.341708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3520 RESULT=skip>
29714 23:02:29.342142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3520 RESULT=skip
29716 23:02:29.373470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3520 RESULT=skip>
29717 23:02:29.373936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3520 RESULT=skip
29719 23:02:29.405626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3536 RESULT=pass
29721 23:02:29.406190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3536 RESULT=pass>
29722 23:02:29.437268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3536 RESULT=skip
29724 23:02:29.437883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3536 RESULT=skip>
29725 23:02:29.468591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3536 RESULT=skip>
29726 23:02:29.469019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3536 RESULT=skip
29728 23:02:29.499435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3552 RESULT=pass>
29729 23:02:29.499893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3552 RESULT=pass
29731 23:02:29.552486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3552 RESULT=skip>
29732 23:02:29.552938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3552 RESULT=skip
29734 23:02:29.584449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3552 RESULT=skip>
29735 23:02:29.584915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3552 RESULT=skip
29737 23:02:29.615524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3568 RESULT=pass>
29738 23:02:29.615998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3568 RESULT=pass
29740 23:02:29.646925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3568 RESULT=skip
29742 23:02:29.647546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3568 RESULT=skip>
29743 23:02:29.678025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3568 RESULT=skip>
29744 23:02:29.678483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3568 RESULT=skip
29746 23:02:29.709042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3584 RESULT=pass
29748 23:02:29.709603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3584 RESULT=pass>
29749 23:02:29.739902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3584 RESULT=skip
29751 23:02:29.740458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3584 RESULT=skip>
29752 23:02:29.772898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3584 RESULT=skip
29754 23:02:29.773530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3584 RESULT=skip>
29755 23:02:29.804276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3600 RESULT=pass
29757 23:02:29.804727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3600 RESULT=pass>
29758 23:02:29.835368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3600 RESULT=skip
29760 23:02:29.835821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3600 RESULT=skip>
29761 23:02:29.866698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3600 RESULT=skip
29763 23:02:29.867252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3600 RESULT=skip>
29764 23:02:29.898101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3616 RESULT=pass
29766 23:02:29.898532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3616 RESULT=pass>
29767 23:02:29.930626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3616 RESULT=skip>
29768 23:02:29.931040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3616 RESULT=skip
29770 23:02:29.964924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3616 RESULT=skip>
29771 23:02:29.965411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3616 RESULT=skip
29773 23:02:29.996824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3632 RESULT=pass>
29774 23:02:29.997290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3632 RESULT=pass
29776 23:02:30.029229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3632 RESULT=skip>
29777 23:02:30.029628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3632 RESULT=skip
29779 23:02:30.063071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3632 RESULT=skip>
29780 23:02:30.063480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3632 RESULT=skip
29782 23:02:30.095884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3648 RESULT=pass
29784 23:02:30.096450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3648 RESULT=pass>
29785 23:02:30.128684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3648 RESULT=skip
29787 23:02:30.129233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3648 RESULT=skip>
29788 23:02:30.160818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3648 RESULT=skip>
29789 23:02:30.161229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3648 RESULT=skip
29791 23:02:30.193096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3664 RESULT=pass
29793 23:02:30.193686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3664 RESULT=pass>
29794 23:02:30.224273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3664 RESULT=skip>
29795 23:02:30.224751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3664 RESULT=skip
29797 23:02:30.255454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3664 RESULT=skip>
29798 23:02:30.255930 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3664 RESULT=skip
29800 23:02:30.286839 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3680 RESULT=pass>
29801 23:02:30.287304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3680 RESULT=pass
29803 23:02:30.317996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3680 RESULT=skip>
29804 23:02:30.318465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3680 RESULT=skip
29806 23:02:30.350438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3680 RESULT=skip>
29807 23:02:30.350883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3680 RESULT=skip
29809 23:02:30.381757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3696 RESULT=pass>
29810 23:02:30.382218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3696 RESULT=pass
29812 23:02:30.413331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3696 RESULT=skip
29814 23:02:30.413890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3696 RESULT=skip>
29815 23:02:30.445435 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3696 RESULT=skip
29817 23:02:30.446167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3696 RESULT=skip>
29818 23:02:30.478876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3712 RESULT=pass>
29819 23:02:30.479374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3712 RESULT=pass
29821 23:02:30.510466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3712 RESULT=skip>
29822 23:02:30.510920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3712 RESULT=skip
29824 23:02:30.543469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3712 RESULT=skip>
29825 23:02:30.543871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3712 RESULT=skip
29827 23:02:30.577490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3728 RESULT=pass>
29828 23:02:30.577975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3728 RESULT=pass
29830 23:02:30.614737 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3728 RESULT=skip
29832 23:02:30.615332 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3728 RESULT=skip>
29833 23:02:30.650834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3728 RESULT=skip>
29834 23:02:30.651266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3728 RESULT=skip
29836 23:02:30.685361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3744 RESULT=pass
29838 23:02:30.685833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3744 RESULT=pass>
29839 23:02:30.721799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3744 RESULT=skip>
29840 23:02:30.722294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3744 RESULT=skip
29842 23:02:30.758707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3744 RESULT=skip
29844 23:02:30.759348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3744 RESULT=skip>
29845 23:02:30.791647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3760 RESULT=pass
29847 23:02:30.792273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3760 RESULT=pass>
29848 23:02:30.824763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3760 RESULT=skip
29850 23:02:30.825217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3760 RESULT=skip>
29851 23:02:30.857064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3760 RESULT=skip
29853 23:02:30.857624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3760 RESULT=skip>
29854 23:02:30.888726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3776 RESULT=pass>
29855 23:02:30.889160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3776 RESULT=pass
29857 23:02:30.920752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3776 RESULT=skip
29859 23:02:30.921322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3776 RESULT=skip>
29860 23:02:30.952755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3776 RESULT=skip>
29861 23:02:30.953233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3776 RESULT=skip
29863 23:02:30.985363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3792 RESULT=pass
29865 23:02:30.985934 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3792 RESULT=pass>
29866 23:02:31.017232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3792 RESULT=skip>
29867 23:02:31.017699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3792 RESULT=skip
29869 23:02:31.049011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3792 RESULT=skip>
29870 23:02:31.049451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3792 RESULT=skip
29872 23:02:31.080586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3808 RESULT=pass
29874 23:02:31.081131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3808 RESULT=pass>
29875 23:02:31.112799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3808 RESULT=skip
29877 23:02:31.113348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3808 RESULT=skip>
29878 23:02:31.144467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3808 RESULT=skip>
29879 23:02:31.144924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3808 RESULT=skip
29881 23:02:31.176230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3824 RESULT=pass>
29882 23:02:31.176688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3824 RESULT=pass
29884 23:02:31.208562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3824 RESULT=skip
29886 23:02:31.209110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3824 RESULT=skip>
29887 23:02:31.240573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3824 RESULT=skip
29889 23:02:31.241115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3824 RESULT=skip>
29890 23:02:31.272165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3840 RESULT=pass
29892 23:02:31.272756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3840 RESULT=pass>
29893 23:02:31.304341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3840 RESULT=skip>
29894 23:02:31.304821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3840 RESULT=skip
29896 23:02:31.336801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3840 RESULT=skip
29898 23:02:31.337380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3840 RESULT=skip>
29899 23:02:31.368716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3856 RESULT=pass>
29900 23:02:31.369167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3856 RESULT=pass
29902 23:02:31.401496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3856 RESULT=skip>
29903 23:02:31.401982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3856 RESULT=skip
29905 23:02:31.433426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3856 RESULT=skip
29907 23:02:31.433999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3856 RESULT=skip>
29908 23:02:31.466466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3872 RESULT=pass>
29909 23:02:31.466929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3872 RESULT=pass
29911 23:02:31.498801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3872 RESULT=skip>
29912 23:02:31.499250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3872 RESULT=skip
29914 23:02:31.530908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3872 RESULT=skip>
29915 23:02:31.531357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3872 RESULT=skip
29917 23:02:31.562833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3888 RESULT=pass>
29918 23:02:31.563248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3888 RESULT=pass
29920 23:02:31.594960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3888 RESULT=skip>
29921 23:02:31.595367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3888 RESULT=skip
29923 23:02:31.627245 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3888 RESULT=skip>
29924 23:02:31.627671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3888 RESULT=skip
29926 23:02:31.662286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3904 RESULT=pass>
29927 23:02:31.662728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3904 RESULT=pass
29929 23:02:31.695803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3904 RESULT=skip
29931 23:02:31.696269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3904 RESULT=skip>
29932 23:02:31.730568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3904 RESULT=skip>
29933 23:02:31.730980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3904 RESULT=skip
29935 23:02:31.764874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3920 RESULT=pass>
29936 23:02:31.765343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3920 RESULT=pass
29938 23:02:31.798944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3920 RESULT=skip>
29939 23:02:31.799404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3920 RESULT=skip
29941 23:02:31.832420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3920 RESULT=skip
29943 23:02:31.833039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3920 RESULT=skip>
29944 23:02:31.865259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3936 RESULT=pass
29946 23:02:31.865826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3936 RESULT=pass>
29947 23:02:31.897135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3936 RESULT=skip
29949 23:02:31.897591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3936 RESULT=skip>
29950 23:02:31.928731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3936 RESULT=skip
29952 23:02:31.929289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3936 RESULT=skip>
29953 23:02:31.961408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3952 RESULT=pass>
29954 23:02:31.961870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3952 RESULT=pass
29956 23:02:31.992686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3952 RESULT=skip
29958 23:02:31.993255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3952 RESULT=skip>
29959 23:02:32.023723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3952 RESULT=skip>
29960 23:02:32.024131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3952 RESULT=skip
29962 23:02:32.054598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3968 RESULT=pass
29964 23:02:32.055042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3968 RESULT=pass>
29965 23:02:32.085158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3968 RESULT=skip>
29966 23:02:32.085593 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3968 RESULT=skip
29968 23:02:32.116267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3968 RESULT=skip>
29969 23:02:32.116694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3968 RESULT=skip
29971 23:02:32.147304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_3984 RESULT=pass>
29972 23:02:32.147794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_3984 RESULT=pass
29974 23:02:32.178682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3984 RESULT=skip>
29975 23:02:32.179153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_3984 RESULT=skip
29977 23:02:32.210124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3984 RESULT=skip>
29978 23:02:32.210573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_3984 RESULT=skip
29980 23:02:32.241053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4000 RESULT=pass
29982 23:02:32.241571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4000 RESULT=pass>
29983 23:02:32.272290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4000 RESULT=skip
29985 23:02:32.272805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4000 RESULT=skip>
29986 23:02:32.303149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4000 RESULT=skip>
29987 23:02:32.303594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4000 RESULT=skip
29989 23:02:32.333861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4016 RESULT=pass>
29990 23:02:32.334302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4016 RESULT=pass
29992 23:02:32.365526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4016 RESULT=skip
29994 23:02:32.366052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4016 RESULT=skip>
29995 23:02:32.397219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4016 RESULT=skip>
29996 23:02:32.397662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4016 RESULT=skip
29998 23:02:32.428799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4032 RESULT=pass
30000 23:02:32.429318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4032 RESULT=pass>
30001 23:02:32.461388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4032 RESULT=skip>
30002 23:02:32.461793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4032 RESULT=skip
30004 23:02:32.493565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4032 RESULT=skip>
30005 23:02:32.494016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4032 RESULT=skip
30007 23:02:32.524924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4048 RESULT=pass
30009 23:02:32.525453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4048 RESULT=pass>
30010 23:02:32.556324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4048 RESULT=skip>
30011 23:02:32.556781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4048 RESULT=skip
30013 23:02:32.587231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4048 RESULT=skip>
30014 23:02:32.587663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4048 RESULT=skip
30016 23:02:32.618111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4064 RESULT=pass
30018 23:02:32.618658 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4064 RESULT=pass>
30019 23:02:32.648886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4064 RESULT=skip>
30020 23:02:32.649333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4064 RESULT=skip
30022 23:02:32.680767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4064 RESULT=skip>
30023 23:02:32.681202 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4064 RESULT=skip
30025 23:02:32.711423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4080 RESULT=pass>
30026 23:02:32.711923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4080 RESULT=pass
30028 23:02:32.743342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4080 RESULT=skip>
30029 23:02:32.743824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4080 RESULT=skip
30031 23:02:32.775566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4080 RESULT=skip
30033 23:02:32.776121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4080 RESULT=skip>
30034 23:02:32.806904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4096 RESULT=pass>
30035 23:02:32.807326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4096 RESULT=pass
30037 23:02:32.838197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4096 RESULT=skip>
30038 23:02:32.838635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4096 RESULT=skip
30040 23:02:32.870448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4096 RESULT=skip>
30041 23:02:32.870891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4096 RESULT=skip
30043 23:02:32.901430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4112 RESULT=pass
30045 23:02:32.902054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4112 RESULT=pass>
30046 23:02:32.932929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4112 RESULT=skip
30048 23:02:32.933544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4112 RESULT=skip>
30049 23:02:32.964074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4112 RESULT=skip
30051 23:02:32.964728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4112 RESULT=skip>
30052 23:02:32.995219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4128 RESULT=pass>
30053 23:02:32.995692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4128 RESULT=pass
30055 23:02:33.026985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4128 RESULT=skip>
30056 23:02:33.027425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4128 RESULT=skip
30058 23:02:33.057563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4128 RESULT=skip>
30059 23:02:33.057992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4128 RESULT=skip
30061 23:02:33.088336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4144 RESULT=pass>
30062 23:02:33.088805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4144 RESULT=pass
30064 23:02:33.119310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4144 RESULT=skip
30066 23:02:33.119762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4144 RESULT=skip>
30067 23:02:33.151010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4144 RESULT=skip>
30068 23:02:33.151454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4144 RESULT=skip
30070 23:02:33.182103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4160 RESULT=pass
30072 23:02:33.182661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4160 RESULT=pass>
30073 23:02:33.213208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4160 RESULT=skip
30075 23:02:33.213751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4160 RESULT=skip>
30076 23:02:33.244700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4160 RESULT=skip>
30077 23:02:33.245164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4160 RESULT=skip
30079 23:02:33.275416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4176 RESULT=pass>
30080 23:02:33.275882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4176 RESULT=pass
30082 23:02:33.306689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4176 RESULT=skip
30084 23:02:33.307229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4176 RESULT=skip>
30085 23:02:33.337197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4176 RESULT=skip>
30086 23:02:33.337671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4176 RESULT=skip
30088 23:02:33.368086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4192 RESULT=pass>
30089 23:02:33.368541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4192 RESULT=pass
30091 23:02:33.399606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4192 RESULT=skip>
30092 23:02:33.400067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4192 RESULT=skip
30094 23:02:33.432635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4192 RESULT=skip>
30095 23:02:33.433112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4192 RESULT=skip
30097 23:02:33.463661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4208 RESULT=pass
30099 23:02:33.464246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4208 RESULT=pass>
30100 23:02:33.494257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4208 RESULT=skip>
30101 23:02:33.494732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4208 RESULT=skip
30103 23:02:33.525471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4208 RESULT=skip
30105 23:02:33.526105 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4208 RESULT=skip>
30106 23:02:33.555927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4224 RESULT=pass
30108 23:02:33.556545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4224 RESULT=pass>
30109 23:02:33.586963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4224 RESULT=skip
30111 23:02:33.587648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4224 RESULT=skip>
30112 23:02:33.618180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4224 RESULT=skip
30114 23:02:33.618767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4224 RESULT=skip>
30115 23:02:33.649103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4240 RESULT=pass>
30116 23:02:33.649537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4240 RESULT=pass
30118 23:02:33.680759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4240 RESULT=skip
30120 23:02:33.681333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4240 RESULT=skip>
30121 23:02:33.711322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4240 RESULT=skip>
30122 23:02:33.711781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4240 RESULT=skip
30124 23:02:33.742962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4256 RESULT=pass
30126 23:02:33.743500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4256 RESULT=pass>
30127 23:02:33.773663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4256 RESULT=skip>
30128 23:02:33.774117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4256 RESULT=skip
30130 23:02:33.804783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4256 RESULT=skip
30132 23:02:33.805326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4256 RESULT=skip>
30133 23:02:33.835262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4272 RESULT=pass>
30134 23:02:33.835715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4272 RESULT=pass
30136 23:02:33.866940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4272 RESULT=skip>
30137 23:02:33.867393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4272 RESULT=skip
30139 23:02:33.898281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4272 RESULT=skip
30141 23:02:33.898812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4272 RESULT=skip>
30142 23:02:33.929387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4288 RESULT=pass
30144 23:02:33.929924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4288 RESULT=pass>
30145 23:02:33.960571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4288 RESULT=skip>
30146 23:02:33.960970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4288 RESULT=skip
30148 23:02:33.991140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4288 RESULT=skip>
30149 23:02:33.991575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4288 RESULT=skip
30151 23:02:34.022955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4304 RESULT=pass>
30152 23:02:34.023393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4304 RESULT=pass
30154 23:02:34.053950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4304 RESULT=skip>
30155 23:02:34.054379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4304 RESULT=skip
30157 23:02:34.084612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4304 RESULT=skip>
30158 23:02:34.085047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4304 RESULT=skip
30160 23:02:34.115082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4320 RESULT=pass
30162 23:02:34.115595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4320 RESULT=pass>
30163 23:02:34.145499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4320 RESULT=skip>
30164 23:02:34.145922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4320 RESULT=skip
30166 23:02:34.175934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4320 RESULT=skip
30168 23:02:34.176374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4320 RESULT=skip>
30169 23:02:34.206299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4336 RESULT=pass>
30170 23:02:34.206707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4336 RESULT=pass
30172 23:02:34.237052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4336 RESULT=skip
30174 23:02:34.237510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4336 RESULT=skip>
30175 23:02:34.267382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4336 RESULT=skip>
30176 23:02:34.267838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4336 RESULT=skip
30178 23:02:34.297844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4352 RESULT=pass
30180 23:02:34.298377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4352 RESULT=pass>
30181 23:02:34.329016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4352 RESULT=skip
30183 23:02:34.329557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4352 RESULT=skip>
30184 23:02:34.359951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4352 RESULT=skip
30186 23:02:34.360516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4352 RESULT=skip>
30187 23:02:34.391630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4368 RESULT=pass
30189 23:02:34.392160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4368 RESULT=pass>
30190 23:02:34.422577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4368 RESULT=skip>
30191 23:02:34.423047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4368 RESULT=skip
30193 23:02:34.453903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4368 RESULT=skip>
30194 23:02:34.454352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4368 RESULT=skip
30196 23:02:34.485317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4384 RESULT=pass
30198 23:02:34.485763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4384 RESULT=pass>
30199 23:02:34.516885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4384 RESULT=skip
30201 23:02:34.517328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4384 RESULT=skip>
30202 23:02:34.548556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4384 RESULT=skip>
30203 23:02:34.548960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4384 RESULT=skip
30205 23:02:34.579672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4400 RESULT=pass
30207 23:02:34.580114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4400 RESULT=pass>
30208 23:02:34.611079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4400 RESULT=skip
30210 23:02:34.611513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4400 RESULT=skip>
30211 23:02:34.663058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4400 RESULT=skip>
30212 23:02:34.663477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4400 RESULT=skip
30214 23:02:34.694927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4416 RESULT=pass>
30215 23:02:34.695317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4416 RESULT=pass
30217 23:02:34.725781 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4416 RESULT=skip
30219 23:02:34.726200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4416 RESULT=skip>
30220 23:02:34.757068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4416 RESULT=skip
30222 23:02:34.757644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4416 RESULT=skip>
30223 23:02:34.787513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4432 RESULT=pass>
30224 23:02:34.788009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4432 RESULT=pass
30226 23:02:34.819807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4432 RESULT=skip>
30227 23:02:34.820264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4432 RESULT=skip
30229 23:02:34.850783 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4432 RESULT=skip
30231 23:02:34.851343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4432 RESULT=skip>
30232 23:02:34.882588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4448 RESULT=pass
30234 23:02:34.883189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4448 RESULT=pass>
30235 23:02:34.913551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4448 RESULT=skip
30237 23:02:34.914196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4448 RESULT=skip>
30238 23:02:34.945146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4448 RESULT=skip>
30239 23:02:34.945610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4448 RESULT=skip
30241 23:02:34.975995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4464 RESULT=pass
30243 23:02:34.976608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4464 RESULT=pass>
30244 23:02:35.006529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4464 RESULT=skip>
30245 23:02:35.006994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4464 RESULT=skip
30247 23:02:35.038270 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4464 RESULT=skip
30249 23:02:35.038896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4464 RESULT=skip>
30250 23:02:35.070296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4480 RESULT=pass
30252 23:02:35.070914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4480 RESULT=pass>
30253 23:02:35.101208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4480 RESULT=skip
30255 23:02:35.101852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4480 RESULT=skip>
30256 23:02:35.132373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4480 RESULT=skip>
30257 23:02:35.132825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4480 RESULT=skip
30259 23:02:35.162673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4496 RESULT=pass>
30260 23:02:35.163133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4496 RESULT=pass
30262 23:02:35.193945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4496 RESULT=skip>
30263 23:02:35.194399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4496 RESULT=skip
30265 23:02:35.225846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4496 RESULT=skip
30267 23:02:35.226291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4496 RESULT=skip>
30268 23:02:35.256619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4512 RESULT=pass
30270 23:02:35.257061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4512 RESULT=pass>
30271 23:02:35.287404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4512 RESULT=skip
30273 23:02:35.287843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4512 RESULT=skip>
30274 23:02:35.318150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4512 RESULT=skip
30276 23:02:35.318602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4512 RESULT=skip>
30277 23:02:35.349718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4528 RESULT=pass
30279 23:02:35.350287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4528 RESULT=pass>
30280 23:02:35.381285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4528 RESULT=skip>
30281 23:02:35.381746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4528 RESULT=skip
30283 23:02:35.412540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4528 RESULT=skip>
30284 23:02:35.412994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4528 RESULT=skip
30286 23:02:35.444708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4544 RESULT=pass
30288 23:02:35.445247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4544 RESULT=pass>
30289 23:02:35.476640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4544 RESULT=skip>
30290 23:02:35.477113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4544 RESULT=skip
30292 23:02:35.507440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4544 RESULT=skip
30294 23:02:35.508054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4544 RESULT=skip>
30295 23:02:35.537831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4560 RESULT=pass>
30296 23:02:35.538354 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4560 RESULT=pass
30298 23:02:35.569557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4560 RESULT=skip
30300 23:02:35.570130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4560 RESULT=skip>
30301 23:02:35.601137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4560 RESULT=skip>
30302 23:02:35.601609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4560 RESULT=skip
30304 23:02:35.632762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4576 RESULT=pass
30306 23:02:35.633364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4576 RESULT=pass>
30307 23:02:35.664375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4576 RESULT=skip>
30308 23:02:35.664868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4576 RESULT=skip
30310 23:02:35.697553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4576 RESULT=skip
30312 23:02:35.698118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4576 RESULT=skip>
30313 23:02:35.729469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4592 RESULT=pass
30315 23:02:35.729848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4592 RESULT=pass>
30316 23:02:35.761093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4592 RESULT=skip
30318 23:02:35.761477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4592 RESULT=skip>
30319 23:02:35.792958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4592 RESULT=skip>
30320 23:02:35.793412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4592 RESULT=skip
30322 23:02:35.824785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4608 RESULT=pass>
30323 23:02:35.825250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4608 RESULT=pass
30325 23:02:35.856704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4608 RESULT=skip>
30326 23:02:35.857137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4608 RESULT=skip
30328 23:02:35.890183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4608 RESULT=skip>
30329 23:02:35.890673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4608 RESULT=skip
30331 23:02:35.922603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4624 RESULT=pass>
30332 23:02:35.923053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4624 RESULT=pass
30334 23:02:35.955085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4624 RESULT=skip>
30335 23:02:35.955530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4624 RESULT=skip
30337 23:02:35.987003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4624 RESULT=skip>
30338 23:02:35.987449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4624 RESULT=skip
30340 23:02:36.019256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4640 RESULT=pass>
30341 23:02:36.019715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4640 RESULT=pass
30343 23:02:36.052137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4640 RESULT=skip
30345 23:02:36.052674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4640 RESULT=skip>
30346 23:02:36.084388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4640 RESULT=skip>
30347 23:02:36.084825 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4640 RESULT=skip
30349 23:02:36.116355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4656 RESULT=pass
30351 23:02:36.116884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4656 RESULT=pass>
30352 23:02:36.148603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4656 RESULT=skip
30354 23:02:36.149131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4656 RESULT=skip>
30355 23:02:36.180493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4656 RESULT=skip
30357 23:02:36.181032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4656 RESULT=skip>
30358 23:02:36.211530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4672 RESULT=pass
30360 23:02:36.212156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4672 RESULT=pass>
30361 23:02:36.242357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4672 RESULT=skip
30363 23:02:36.242918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4672 RESULT=skip>
30364 23:02:36.273432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4672 RESULT=skip>
30365 23:02:36.273883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4672 RESULT=skip
30367 23:02:36.305514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4688 RESULT=pass
30369 23:02:36.306066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4688 RESULT=pass>
30370 23:02:36.337561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4688 RESULT=skip>
30371 23:02:36.338019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4688 RESULT=skip
30373 23:02:36.369216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4688 RESULT=skip>
30374 23:02:36.369659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4688 RESULT=skip
30376 23:02:36.400799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4704 RESULT=pass
30378 23:02:36.401334 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4704 RESULT=pass>
30379 23:02:36.432989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4704 RESULT=skip
30381 23:02:36.433564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4704 RESULT=skip>
30382 23:02:36.465519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4704 RESULT=skip
30384 23:02:36.466080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4704 RESULT=skip>
30385 23:02:36.496931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4720 RESULT=pass
30387 23:02:36.497475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4720 RESULT=pass>
30388 23:02:36.528701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4720 RESULT=skip
30390 23:02:36.529265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4720 RESULT=skip>
30391 23:02:36.559965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4720 RESULT=skip
30393 23:02:36.560513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4720 RESULT=skip>
30394 23:02:36.591169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4736 RESULT=pass
30396 23:02:36.591708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4736 RESULT=pass>
30397 23:02:36.622754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4736 RESULT=skip>
30398 23:02:36.623215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4736 RESULT=skip
30400 23:02:36.653668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4736 RESULT=skip
30402 23:02:36.654110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4736 RESULT=skip>
30403 23:02:36.687040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4752 RESULT=pass>
30404 23:02:36.687474 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4752 RESULT=pass
30406 23:02:36.721188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4752 RESULT=skip>
30407 23:02:36.721623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4752 RESULT=skip
30409 23:02:36.753337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4752 RESULT=skip>
30410 23:02:36.753765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4752 RESULT=skip
30412 23:02:36.785345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4768 RESULT=pass>
30413 23:02:36.785778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4768 RESULT=pass
30415 23:02:36.818086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4768 RESULT=skip>
30416 23:02:36.818559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4768 RESULT=skip
30418 23:02:36.850534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4768 RESULT=skip
30420 23:02:36.851103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4768 RESULT=skip>
30421 23:02:36.882420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4784 RESULT=pass>
30422 23:02:36.882884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4784 RESULT=pass
30424 23:02:36.914906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4784 RESULT=skip>
30425 23:02:36.915348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4784 RESULT=skip
30427 23:02:36.947336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4784 RESULT=skip>
30428 23:02:36.947778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4784 RESULT=skip
30430 23:02:36.979026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4800 RESULT=pass>
30431 23:02:36.979469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4800 RESULT=pass
30433 23:02:37.010175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4800 RESULT=skip>
30434 23:02:37.010656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4800 RESULT=skip
30436 23:02:37.042145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4800 RESULT=skip>
30437 23:02:37.042625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4800 RESULT=skip
30439 23:02:37.074109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4816 RESULT=pass
30441 23:02:37.074693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4816 RESULT=pass>
30442 23:02:37.105961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4816 RESULT=skip>
30443 23:02:37.106403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4816 RESULT=skip
30445 23:02:37.137494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4816 RESULT=skip
30447 23:02:37.137946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4816 RESULT=skip>
30448 23:02:37.169149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4832 RESULT=pass>
30449 23:02:37.169563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4832 RESULT=pass
30451 23:02:37.201120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4832 RESULT=skip>
30452 23:02:37.201516 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4832 RESULT=skip
30454 23:02:37.233433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4832 RESULT=skip>
30455 23:02:37.233886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4832 RESULT=skip
30457 23:02:37.265734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4848 RESULT=pass>
30458 23:02:37.266190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4848 RESULT=pass
30460 23:02:37.298885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4848 RESULT=skip>
30461 23:02:37.299420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4848 RESULT=skip
30463 23:02:37.332194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4848 RESULT=skip
30465 23:02:37.332790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4848 RESULT=skip>
30466 23:02:37.364221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4864 RESULT=pass>
30467 23:02:37.364696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4864 RESULT=pass
30469 23:02:37.395628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4864 RESULT=skip
30471 23:02:37.396218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4864 RESULT=skip>
30472 23:02:37.433237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4864 RESULT=skip>
30473 23:02:37.433656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4864 RESULT=skip
30475 23:02:37.469690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4880 RESULT=pass
30477 23:02:37.470258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4880 RESULT=pass>
30478 23:02:37.501714 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4880 RESULT=skip
30480 23:02:37.502273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4880 RESULT=skip>
30481 23:02:37.532812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4880 RESULT=skip
30483 23:02:37.533361 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4880 RESULT=skip>
30484 23:02:37.563511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4896 RESULT=pass
30486 23:02:37.564041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4896 RESULT=pass>
30487 23:02:37.596494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4896 RESULT=skip>
30488 23:02:37.596940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4896 RESULT=skip
30490 23:02:37.630131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4896 RESULT=skip>
30491 23:02:37.630605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4896 RESULT=skip
30493 23:02:37.661886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4912 RESULT=pass
30495 23:02:37.662469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4912 RESULT=pass>
30496 23:02:37.693414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4912 RESULT=skip
30498 23:02:37.694014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4912 RESULT=skip>
30499 23:02:37.726622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4912 RESULT=skip
30501 23:02:37.727157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4912 RESULT=skip>
30502 23:02:37.760523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4928 RESULT=pass>
30503 23:02:37.760963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4928 RESULT=pass
30505 23:02:37.794241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4928 RESULT=skip
30507 23:02:37.794882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4928 RESULT=skip>
30508 23:02:37.826640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4928 RESULT=skip>
30509 23:02:37.827114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4928 RESULT=skip
30511 23:02:37.859109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4944 RESULT=pass>
30512 23:02:37.859600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4944 RESULT=pass
30514 23:02:37.898425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4944 RESULT=skip>
30515 23:02:37.898916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4944 RESULT=skip
30517 23:02:37.936889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4944 RESULT=skip>
30518 23:02:37.937374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4944 RESULT=skip
30520 23:02:37.981421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4960 RESULT=pass>
30521 23:02:37.981867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4960 RESULT=pass
30523 23:02:38.014651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4960 RESULT=skip
30525 23:02:38.015121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4960 RESULT=skip>
30526 23:02:38.047000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4960 RESULT=skip>
30527 23:02:38.047431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4960 RESULT=skip
30529 23:02:38.079638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4976 RESULT=pass>
30530 23:02:38.080077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4976 RESULT=pass
30532 23:02:38.111822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4976 RESULT=skip
30534 23:02:38.112270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4976 RESULT=skip>
30535 23:02:38.144496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4976 RESULT=skip>
30536 23:02:38.144915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4976 RESULT=skip
30538 23:02:38.175940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_4992 RESULT=pass
30540 23:02:38.176401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_4992 RESULT=pass>
30541 23:02:38.209086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4992 RESULT=skip>
30542 23:02:38.209574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_4992 RESULT=skip
30544 23:02:38.241235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4992 RESULT=skip>
30545 23:02:38.241696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_4992 RESULT=skip
30547 23:02:38.272885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5008 RESULT=pass>
30548 23:02:38.273322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5008 RESULT=pass
30550 23:02:38.305865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5008 RESULT=skip
30552 23:02:38.306555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5008 RESULT=skip>
30553 23:02:38.337337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5008 RESULT=skip>
30554 23:02:38.337808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5008 RESULT=skip
30556 23:02:38.368390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5024 RESULT=pass>
30557 23:02:38.368869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5024 RESULT=pass
30559 23:02:38.399385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5024 RESULT=skip>
30560 23:02:38.399856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5024 RESULT=skip
30562 23:02:38.431538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5024 RESULT=skip
30564 23:02:38.432106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5024 RESULT=skip>
30565 23:02:38.463115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5040 RESULT=pass
30567 23:02:38.463663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5040 RESULT=pass>
30568 23:02:38.494283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5040 RESULT=skip>
30569 23:02:38.494751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5040 RESULT=skip
30571 23:02:38.526422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5040 RESULT=skip>
30572 23:02:38.526894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5040 RESULT=skip
30574 23:02:38.558405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5056 RESULT=pass>
30575 23:02:38.558859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5056 RESULT=pass
30577 23:02:38.590173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5056 RESULT=skip>
30578 23:02:38.590645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5056 RESULT=skip
30580 23:02:38.622702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5056 RESULT=skip>
30581 23:02:38.623164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5056 RESULT=skip
30583 23:02:38.654185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5072 RESULT=pass>
30584 23:02:38.654673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5072 RESULT=pass
30586 23:02:38.685994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5072 RESULT=skip
30588 23:02:38.686471 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5072 RESULT=skip>
30589 23:02:38.717069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5072 RESULT=skip
30591 23:02:38.717531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5072 RESULT=skip>
30592 23:02:38.747606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5088 RESULT=pass>
30593 23:02:38.748028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5088 RESULT=pass
30595 23:02:38.778470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5088 RESULT=skip
30597 23:02:38.778928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5088 RESULT=skip>
30598 23:02:38.809963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5088 RESULT=skip>
30599 23:02:38.810374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5088 RESULT=skip
30601 23:02:38.840880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5104 RESULT=pass>
30602 23:02:38.841285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5104 RESULT=pass
30604 23:02:38.871978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5104 RESULT=skip
30606 23:02:38.872406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5104 RESULT=skip>
30607 23:02:38.905166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5104 RESULT=skip>
30608 23:02:38.905570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5104 RESULT=skip
30610 23:02:38.936571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5120 RESULT=pass>
30611 23:02:38.937049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5120 RESULT=pass
30613 23:02:38.968660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5120 RESULT=skip
30615 23:02:38.969239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5120 RESULT=skip>
30616 23:02:39.001216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5120 RESULT=skip
30618 23:02:39.001661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5120 RESULT=skip>
30619 23:02:39.033067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5136 RESULT=pass
30621 23:02:39.033498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5136 RESULT=pass>
30622 23:02:39.064977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5136 RESULT=skip
30624 23:02:39.065413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5136 RESULT=skip>
30625 23:02:39.096937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5136 RESULT=skip>
30626 23:02:39.097403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5136 RESULT=skip
30628 23:02:39.128799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5152 RESULT=pass
30630 23:02:39.129427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5152 RESULT=pass>
30631 23:02:39.161128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5152 RESULT=skip
30633 23:02:39.161685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5152 RESULT=skip>
30634 23:02:39.193056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5152 RESULT=skip
30636 23:02:39.193610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5152 RESULT=skip>
30637 23:02:39.224367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5168 RESULT=pass>
30638 23:02:39.224809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5168 RESULT=pass
30640 23:02:39.254599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5168 RESULT=skip
30642 23:02:39.255132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5168 RESULT=skip>
30643 23:02:39.285169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5168 RESULT=skip>
30644 23:02:39.285633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5168 RESULT=skip
30646 23:02:39.316666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5184 RESULT=pass>
30647 23:02:39.317113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5184 RESULT=pass
30649 23:02:39.347795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5184 RESULT=skip>
30650 23:02:39.348238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5184 RESULT=skip
30652 23:02:39.382099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5184 RESULT=skip>
30653 23:02:39.382645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5184 RESULT=skip
30655 23:02:39.416680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5200 RESULT=pass>
30656 23:02:39.417171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5200 RESULT=pass
30658 23:02:39.451042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5200 RESULT=skip>
30659 23:02:39.451477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5200 RESULT=skip
30661 23:02:39.485662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5200 RESULT=skip>
30662 23:02:39.486136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5200 RESULT=skip
30664 23:02:39.521079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5216 RESULT=pass>
30665 23:02:39.521543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5216 RESULT=pass
30667 23:02:39.555622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5216 RESULT=skip
30669 23:02:39.556080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5216 RESULT=skip>
30670 23:02:39.590208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5216 RESULT=skip
30672 23:02:39.590755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5216 RESULT=skip>
30673 23:02:39.622727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5232 RESULT=pass
30675 23:02:39.623354 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5232 RESULT=pass>
30676 23:02:39.654022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5232 RESULT=skip>
30677 23:02:39.654472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5232 RESULT=skip
30679 23:02:39.686738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5232 RESULT=skip>
30680 23:02:39.687216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5232 RESULT=skip
30682 23:02:39.723017 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5248 RESULT=pass>
30683 23:02:39.723458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5248 RESULT=pass
30685 23:02:39.781778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5248 RESULT=skip>
30686 23:02:39.782217 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5248 RESULT=skip
30688 23:02:39.813054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5248 RESULT=skip>
30689 23:02:39.813465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5248 RESULT=skip
30691 23:02:39.844511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5264 RESULT=pass>
30692 23:02:39.844974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5264 RESULT=pass
30694 23:02:39.875480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5264 RESULT=skip>
30695 23:02:39.875925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5264 RESULT=skip
30697 23:02:39.906119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5264 RESULT=skip>
30698 23:02:39.906552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5264 RESULT=skip
30700 23:02:39.937075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5280 RESULT=pass
30702 23:02:39.937627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5280 RESULT=pass>
30703 23:02:39.967483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5280 RESULT=skip>
30704 23:02:39.967890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5280 RESULT=skip
30706 23:02:39.998340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5280 RESULT=skip
30708 23:02:39.998887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5280 RESULT=skip>
30709 23:02:40.029065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5296 RESULT=pass
30711 23:02:40.029615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5296 RESULT=pass>
30712 23:02:40.061182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5296 RESULT=skip
30714 23:02:40.061631 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5296 RESULT=skip>
30715 23:02:40.092346 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5296 RESULT=skip>
30716 23:02:40.092807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5296 RESULT=skip
30718 23:02:40.122599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5312 RESULT=pass>
30719 23:02:40.123029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5312 RESULT=pass
30721 23:02:40.153233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5312 RESULT=skip>
30722 23:02:40.153635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5312 RESULT=skip
30724 23:02:40.185029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5312 RESULT=skip
30726 23:02:40.185639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5312 RESULT=skip>
30727 23:02:40.216682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5328 RESULT=pass>
30728 23:02:40.217152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5328 RESULT=pass
30730 23:02:40.248505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5328 RESULT=skip>
30731 23:02:40.249033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5328 RESULT=skip
30733 23:02:40.281914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5328 RESULT=skip>
30734 23:02:40.282367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5328 RESULT=skip
30736 23:02:40.317366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5344 RESULT=pass>
30737 23:02:40.317784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5344 RESULT=pass
30739 23:02:40.357300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5344 RESULT=skip>
30740 23:02:40.357688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5344 RESULT=skip
30742 23:02:40.389772 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5344 RESULT=skip
30744 23:02:40.390216 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5344 RESULT=skip>
30745 23:02:40.421285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5360 RESULT=pass
30747 23:02:40.421731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5360 RESULT=pass>
30748 23:02:40.455262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5360 RESULT=skip
30750 23:02:40.455721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5360 RESULT=skip>
30751 23:02:40.488008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5360 RESULT=skip
30753 23:02:40.488454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5360 RESULT=skip>
30754 23:02:40.519433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5376 RESULT=pass>
30755 23:02:40.519869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5376 RESULT=pass
30757 23:02:40.551007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5376 RESULT=skip>
30758 23:02:40.551466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5376 RESULT=skip
30760 23:02:40.583811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5376 RESULT=skip
30762 23:02:40.584284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5376 RESULT=skip>
30763 23:02:40.618877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5392 RESULT=pass>
30764 23:02:40.619424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5392 RESULT=pass
30766 23:02:40.656803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5392 RESULT=skip
30768 23:02:40.657366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5392 RESULT=skip>
30769 23:02:40.690244 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5392 RESULT=skip
30771 23:02:40.690828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5392 RESULT=skip>
30772 23:02:40.723394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5408 RESULT=pass>
30773 23:02:40.723878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5408 RESULT=pass
30775 23:02:40.756831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5408 RESULT=skip>
30776 23:02:40.757328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5408 RESULT=skip
30778 23:02:40.790124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5408 RESULT=skip
30780 23:02:40.790690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5408 RESULT=skip>
30781 23:02:40.820887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5424 RESULT=pass
30783 23:02:40.821342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5424 RESULT=pass>
30784 23:02:40.851806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5424 RESULT=skip
30786 23:02:40.852285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5424 RESULT=skip>
30787 23:02:40.883419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5424 RESULT=skip>
30788 23:02:40.883850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5424 RESULT=skip
30790 23:02:40.916426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5440 RESULT=pass
30792 23:02:40.916879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5440 RESULT=pass>
30793 23:02:40.949059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5440 RESULT=skip
30795 23:02:40.949620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5440 RESULT=skip>
30796 23:02:40.982458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5440 RESULT=skip>
30797 23:02:40.982921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5440 RESULT=skip
30799 23:02:41.014136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5456 RESULT=pass
30801 23:02:41.014674 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5456 RESULT=pass>
30802 23:02:41.046097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5456 RESULT=skip>
30803 23:02:41.046555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5456 RESULT=skip
30805 23:02:41.077941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5456 RESULT=skip
30807 23:02:41.078492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5456 RESULT=skip>
30808 23:02:41.109805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5472 RESULT=pass>
30809 23:02:41.110259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5472 RESULT=pass
30811 23:02:41.141596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5472 RESULT=skip
30813 23:02:41.142153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5472 RESULT=skip>
30814 23:02:41.173064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5472 RESULT=skip
30816 23:02:41.173600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5472 RESULT=skip>
30817 23:02:41.204794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5488 RESULT=pass>
30818 23:02:41.205254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5488 RESULT=pass
30820 23:02:41.235677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5488 RESULT=skip
30822 23:02:41.236228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5488 RESULT=skip>
30823 23:02:41.266700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5488 RESULT=skip
30825 23:02:41.267291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5488 RESULT=skip>
30826 23:02:41.300493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5504 RESULT=pass>
30827 23:02:41.300980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5504 RESULT=pass
30829 23:02:41.333512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5504 RESULT=skip>
30830 23:02:41.333987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5504 RESULT=skip
30832 23:02:41.364902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5504 RESULT=skip>
30833 23:02:41.365374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5504 RESULT=skip
30835 23:02:41.396696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5520 RESULT=pass
30837 23:02:41.397251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5520 RESULT=pass>
30838 23:02:41.427538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5520 RESULT=skip
30840 23:02:41.428080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5520 RESULT=skip>
30841 23:02:41.458422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5520 RESULT=skip>
30842 23:02:41.458866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5520 RESULT=skip
30844 23:02:41.489524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5536 RESULT=pass>
30845 23:02:41.489961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5536 RESULT=pass
30847 23:02:41.520969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5536 RESULT=skip
30849 23:02:41.521492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5536 RESULT=skip>
30850 23:02:41.552499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5536 RESULT=skip>
30851 23:02:41.552922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5536 RESULT=skip
30853 23:02:41.583211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5552 RESULT=pass
30855 23:02:41.583785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5552 RESULT=pass>
30856 23:02:41.613876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5552 RESULT=skip>
30857 23:02:41.614304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5552 RESULT=skip
30859 23:02:41.645034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5552 RESULT=skip>
30860 23:02:41.645469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5552 RESULT=skip
30862 23:02:41.676499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5568 RESULT=pass>
30863 23:02:41.676925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5568 RESULT=pass
30865 23:02:41.710561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5568 RESULT=skip>
30866 23:02:41.711012 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5568 RESULT=skip
30868 23:02:41.743365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5568 RESULT=skip>
30869 23:02:41.743831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5568 RESULT=skip
30871 23:02:41.777986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5584 RESULT=pass
30873 23:02:41.778532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5584 RESULT=pass>
30874 23:02:41.813612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5584 RESULT=skip
30876 23:02:41.814162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5584 RESULT=skip>
30877 23:02:41.851311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5584 RESULT=skip>
30878 23:02:41.851765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5584 RESULT=skip
30880 23:02:41.885433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5600 RESULT=pass>
30881 23:02:41.885870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5600 RESULT=pass
30883 23:02:41.917330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5600 RESULT=skip
30885 23:02:41.917808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5600 RESULT=skip>
30886 23:02:41.949518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5600 RESULT=skip>
30887 23:02:41.949935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5600 RESULT=skip
30889 23:02:41.980847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5616 RESULT=pass
30891 23:02:41.981357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5616 RESULT=pass>
30892 23:02:42.012369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5616 RESULT=skip
30894 23:02:42.012995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5616 RESULT=skip>
30895 23:02:42.044396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5616 RESULT=skip>
30896 23:02:42.044852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5616 RESULT=skip
30898 23:02:42.075543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5632 RESULT=pass
30900 23:02:42.076086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5632 RESULT=pass>
30901 23:02:42.107213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5632 RESULT=skip>
30902 23:02:42.107613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5632 RESULT=skip
30904 23:02:42.139716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5632 RESULT=skip>
30905 23:02:42.140178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5632 RESULT=skip
30907 23:02:42.170995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5648 RESULT=pass>
30908 23:02:42.171457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5648 RESULT=pass
30910 23:02:42.202455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5648 RESULT=skip>
30911 23:02:42.202894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5648 RESULT=skip
30913 23:02:42.234126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5648 RESULT=skip>
30914 23:02:42.234580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5648 RESULT=skip
30916 23:02:42.265386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5664 RESULT=pass>
30917 23:02:42.265823 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5664 RESULT=pass
30919 23:02:42.297526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5664 RESULT=skip
30921 23:02:42.298102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5664 RESULT=skip>
30922 23:02:42.329335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5664 RESULT=skip
30924 23:02:42.329930 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5664 RESULT=skip>
30925 23:02:42.361151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5680 RESULT=pass
30927 23:02:42.361704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5680 RESULT=pass>
30928 23:02:42.392614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5680 RESULT=skip>
30929 23:02:42.393053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5680 RESULT=skip
30931 23:02:42.423637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5680 RESULT=skip
30933 23:02:42.424213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5680 RESULT=skip>
30934 23:02:42.455099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5696 RESULT=pass>
30935 23:02:42.455565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5696 RESULT=pass
30937 23:02:42.486734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5696 RESULT=skip
30939 23:02:42.487277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5696 RESULT=skip>
30940 23:02:42.517967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5696 RESULT=skip>
30941 23:02:42.518418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5696 RESULT=skip
30943 23:02:42.549246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5712 RESULT=pass>
30944 23:02:42.549699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5712 RESULT=pass
30946 23:02:42.580621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5712 RESULT=skip
30948 23:02:42.581159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5712 RESULT=skip>
30949 23:02:42.612797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5712 RESULT=skip
30951 23:02:42.613342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5712 RESULT=skip>
30952 23:02:42.644616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5728 RESULT=pass
30954 23:02:42.645141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5728 RESULT=pass>
30955 23:02:42.675951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5728 RESULT=skip
30957 23:02:42.676537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5728 RESULT=skip>
30958 23:02:42.708497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5728 RESULT=skip
30960 23:02:42.709051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5728 RESULT=skip>
30961 23:02:42.740130 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5744 RESULT=pass>
30962 23:02:42.740583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5744 RESULT=pass
30964 23:02:42.771315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5744 RESULT=skip
30966 23:02:42.771865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5744 RESULT=skip>
30967 23:02:42.804436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5744 RESULT=skip>
30968 23:02:42.804892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5744 RESULT=skip
30970 23:02:42.835289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5760 RESULT=pass>
30971 23:02:42.835756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5760 RESULT=pass
30973 23:02:42.866954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5760 RESULT=skip
30975 23:02:42.867499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5760 RESULT=skip>
30976 23:02:42.898240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5760 RESULT=skip>
30977 23:02:42.898675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5760 RESULT=skip
30979 23:02:42.929421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5776 RESULT=pass>
30980 23:02:42.929884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5776 RESULT=pass
30982 23:02:42.961638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5776 RESULT=skip
30984 23:02:42.962215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5776 RESULT=skip>
30985 23:02:42.994088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5776 RESULT=skip>
30986 23:02:42.994517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5776 RESULT=skip
30988 23:02:43.026239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5792 RESULT=pass>
30989 23:02:43.026687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5792 RESULT=pass
30991 23:02:43.063971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5792 RESULT=skip
30993 23:02:43.064633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5792 RESULT=skip>
30994 23:02:43.096783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5792 RESULT=skip>
30995 23:02:43.097245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5792 RESULT=skip
30997 23:02:43.128770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5808 RESULT=pass>
30998 23:02:43.129234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5808 RESULT=pass
31000 23:02:43.161244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5808 RESULT=skip>
31001 23:02:43.161705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5808 RESULT=skip
31003 23:02:43.196582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5808 RESULT=skip
31005 23:02:43.197076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5808 RESULT=skip>
31006 23:02:43.231846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5824 RESULT=pass
31008 23:02:43.232240 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5824 RESULT=pass>
31009 23:02:43.264479 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5824 RESULT=skip>
31010 23:02:43.264857 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5824 RESULT=skip
31012 23:02:43.296506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5824 RESULT=skip>
31013 23:02:43.296954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5824 RESULT=skip
31015 23:02:43.328211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5840 RESULT=pass>
31016 23:02:43.328670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5840 RESULT=pass
31018 23:02:43.359051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5840 RESULT=skip>
31019 23:02:43.359498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5840 RESULT=skip
31021 23:02:43.390343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5840 RESULT=skip
31023 23:02:43.390883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5840 RESULT=skip>
31024 23:02:43.421774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5856 RESULT=pass
31026 23:02:43.422306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5856 RESULT=pass>
31027 23:02:43.452900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5856 RESULT=skip
31029 23:02:43.453434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5856 RESULT=skip>
31030 23:02:43.484135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5856 RESULT=skip
31032 23:02:43.484667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5856 RESULT=skip>
31033 23:02:43.514915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5872 RESULT=pass
31035 23:02:43.515445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5872 RESULT=pass>
31036 23:02:43.545836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5872 RESULT=skip>
31037 23:02:43.546277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5872 RESULT=skip
31039 23:02:43.578836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5872 RESULT=skip
31041 23:02:43.579405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5872 RESULT=skip>
31042 23:02:43.611105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5888 RESULT=pass
31044 23:02:43.611667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5888 RESULT=pass>
31045 23:02:43.642732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5888 RESULT=skip>
31046 23:02:43.643218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5888 RESULT=skip
31048 23:02:43.674348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5888 RESULT=skip>
31049 23:02:43.674832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5888 RESULT=skip
31051 23:02:43.705546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5904 RESULT=pass
31053 23:02:43.706120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5904 RESULT=pass>
31054 23:02:43.737253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5904 RESULT=skip>
31055 23:02:43.737692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5904 RESULT=skip
31057 23:02:43.768874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5904 RESULT=skip>
31058 23:02:43.769294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5904 RESULT=skip
31060 23:02:43.800365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5920 RESULT=pass
31062 23:02:43.800828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5920 RESULT=pass>
31063 23:02:43.832170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5920 RESULT=skip
31065 23:02:43.832785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5920 RESULT=skip>
31066 23:02:43.863141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5920 RESULT=skip>
31067 23:02:43.863605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5920 RESULT=skip
31069 23:02:43.893977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5936 RESULT=pass>
31070 23:02:43.894451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5936 RESULT=pass
31072 23:02:43.925437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5936 RESULT=skip>
31073 23:02:43.925849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5936 RESULT=skip
31075 23:02:43.957603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5936 RESULT=skip>
31076 23:02:43.958068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5936 RESULT=skip
31078 23:02:43.990157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5952 RESULT=pass>
31079 23:02:43.990630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5952 RESULT=pass
31081 23:02:44.023166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5952 RESULT=skip>
31082 23:02:44.023634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5952 RESULT=skip
31084 23:02:44.054519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5952 RESULT=skip
31086 23:02:44.055074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5952 RESULT=skip>
31087 23:02:44.085964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5968 RESULT=pass
31089 23:02:44.086421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5968 RESULT=pass>
31090 23:02:44.116999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5968 RESULT=skip
31092 23:02:44.117460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5968 RESULT=skip>
31093 23:02:44.148013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5968 RESULT=skip
31095 23:02:44.148470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5968 RESULT=skip>
31096 23:02:44.179689 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_5984 RESULT=pass
31098 23:02:44.180238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_5984 RESULT=pass>
31099 23:02:44.211029 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5984 RESULT=skip>
31100 23:02:44.211461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_5984 RESULT=skip
31102 23:02:44.242911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5984 RESULT=skip
31104 23:02:44.243449 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_5984 RESULT=skip>
31105 23:02:44.274815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6000 RESULT=pass>
31106 23:02:44.275278 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6000 RESULT=pass
31108 23:02:44.306829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6000 RESULT=skip>
31109 23:02:44.307290 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6000 RESULT=skip
31111 23:02:44.339204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6000 RESULT=skip>
31112 23:02:44.339659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6000 RESULT=skip
31114 23:02:44.371160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6016 RESULT=pass
31116 23:02:44.371747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6016 RESULT=pass>
31117 23:02:44.403122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6016 RESULT=skip>
31118 23:02:44.403508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6016 RESULT=skip
31120 23:02:44.434835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6016 RESULT=skip
31122 23:02:44.435304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6016 RESULT=skip>
31123 23:02:44.465561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6032 RESULT=pass
31125 23:02:44.466156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6032 RESULT=pass>
31126 23:02:44.496497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6032 RESULT=skip
31128 23:02:44.496940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6032 RESULT=skip>
31129 23:02:44.531987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6032 RESULT=skip
31131 23:02:44.532470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6032 RESULT=skip>
31132 23:02:44.565070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6048 RESULT=pass
31134 23:02:44.565540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6048 RESULT=pass>
31135 23:02:44.595988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6048 RESULT=skip
31137 23:02:44.596439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6048 RESULT=skip>
31138 23:02:44.627047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6048 RESULT=skip>
31139 23:02:44.627485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6048 RESULT=skip
31141 23:02:44.658815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6064 RESULT=pass>
31142 23:02:44.659294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6064 RESULT=pass
31144 23:02:44.692966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6064 RESULT=skip>
31145 23:02:44.693527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6064 RESULT=skip
31147 23:02:44.727373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6064 RESULT=skip>
31148 23:02:44.727751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6064 RESULT=skip
31150 23:02:44.759683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6080 RESULT=pass
31152 23:02:44.760223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6080 RESULT=pass>
31153 23:02:44.790464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6080 RESULT=skip>
31154 23:02:44.790901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6080 RESULT=skip
31156 23:02:44.821317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6080 RESULT=skip
31158 23:02:44.821904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6080 RESULT=skip>
31159 23:02:44.853027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6096 RESULT=pass
31161 23:02:44.853766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6096 RESULT=pass>
31162 23:02:44.903544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6096 RESULT=skip
31164 23:02:44.904098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6096 RESULT=skip>
31165 23:02:44.934701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6096 RESULT=skip
31167 23:02:44.935256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6096 RESULT=skip>
31168 23:02:44.965411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6112 RESULT=pass
31170 23:02:44.965966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6112 RESULT=pass>
31171 23:02:44.998715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6112 RESULT=skip>
31172 23:02:44.999152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6112 RESULT=skip
31174 23:02:45.030856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6112 RESULT=skip>
31175 23:02:45.031286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6112 RESULT=skip
31177 23:02:45.062099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6128 RESULT=pass>
31178 23:02:45.062534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6128 RESULT=pass
31180 23:02:45.093972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6128 RESULT=skip>
31181 23:02:45.094386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6128 RESULT=skip
31183 23:02:45.125919 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6128 RESULT=skip
31185 23:02:45.126371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6128 RESULT=skip>
31186 23:02:45.157845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6144 RESULT=pass>
31187 23:02:45.158266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6144 RESULT=pass
31189 23:02:45.189677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6144 RESULT=skip
31191 23:02:45.190122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6144 RESULT=skip>
31192 23:02:45.221806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6144 RESULT=skip>
31193 23:02:45.222221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6144 RESULT=skip
31195 23:02:45.253328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6160 RESULT=pass
31197 23:02:45.253780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6160 RESULT=pass>
31198 23:02:45.285465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6160 RESULT=skip>
31199 23:02:45.285891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6160 RESULT=skip
31201 23:02:45.317083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6160 RESULT=skip>
31202 23:02:45.317483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6160 RESULT=skip
31204 23:02:45.348845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6176 RESULT=pass>
31205 23:02:45.349327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6176 RESULT=pass
31207 23:02:45.381020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6176 RESULT=skip
31209 23:02:45.381632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6176 RESULT=skip>
31210 23:02:45.412409 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6176 RESULT=skip>
31211 23:02:45.412853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6176 RESULT=skip
31213 23:02:45.445040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6192 RESULT=pass
31215 23:02:45.445626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6192 RESULT=pass>
31216 23:02:45.476903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6192 RESULT=skip>
31217 23:02:45.477326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6192 RESULT=skip
31219 23:02:45.508920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6192 RESULT=skip
31221 23:02:45.509487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6192 RESULT=skip>
31222 23:02:45.540645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6208 RESULT=pass>
31223 23:02:45.541111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6208 RESULT=pass
31225 23:02:45.572856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6208 RESULT=skip>
31226 23:02:45.573325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6208 RESULT=skip
31228 23:02:45.605030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6208 RESULT=skip
31230 23:02:45.605596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6208 RESULT=skip>
31231 23:02:45.637251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6224 RESULT=pass>
31232 23:02:45.637719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6224 RESULT=pass
31234 23:02:45.670045 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6224 RESULT=skip>
31235 23:02:45.670535 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6224 RESULT=skip
31237 23:02:45.702926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6224 RESULT=skip>
31238 23:02:45.703401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6224 RESULT=skip
31240 23:02:45.734519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6240 RESULT=pass>
31241 23:02:45.735000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6240 RESULT=pass
31243 23:02:45.766880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6240 RESULT=skip>
31244 23:02:45.767323 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6240 RESULT=skip
31246 23:02:45.799703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6240 RESULT=skip>
31247 23:02:45.800122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6240 RESULT=skip
31249 23:02:45.831036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6256 RESULT=pass>
31250 23:02:45.831476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6256 RESULT=pass
31252 23:02:45.862568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6256 RESULT=skip>
31253 23:02:45.863047 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6256 RESULT=skip
31255 23:02:45.893749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6256 RESULT=skip>
31256 23:02:45.894303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6256 RESULT=skip
31258 23:02:45.924714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6272 RESULT=pass>
31259 23:02:45.925181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6272 RESULT=pass
31261 23:02:45.955694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6272 RESULT=skip
31263 23:02:45.956243 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6272 RESULT=skip>
31264 23:02:45.986781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6272 RESULT=skip>
31265 23:02:45.987249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6272 RESULT=skip
31267 23:02:46.017808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6288 RESULT=pass
31269 23:02:46.018355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6288 RESULT=pass>
31270 23:02:46.049247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6288 RESULT=skip>
31271 23:02:46.049705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6288 RESULT=skip
31273 23:02:46.080724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6288 RESULT=skip>
31274 23:02:46.081201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6288 RESULT=skip
31276 23:02:46.112720 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6304 RESULT=pass>
31277 23:02:46.113182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6304 RESULT=pass
31279 23:02:46.144710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6304 RESULT=skip>
31280 23:02:46.145152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6304 RESULT=skip
31282 23:02:46.175504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6304 RESULT=skip>
31283 23:02:46.175913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6304 RESULT=skip
31285 23:02:46.206666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6320 RESULT=pass>
31286 23:02:46.207122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6320 RESULT=pass
31288 23:02:46.238860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6320 RESULT=skip>
31289 23:02:46.239319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6320 RESULT=skip
31291 23:02:46.270317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6320 RESULT=skip>
31292 23:02:46.270752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6320 RESULT=skip
31294 23:02:46.302078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6336 RESULT=pass>
31295 23:02:46.302500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6336 RESULT=pass
31297 23:02:46.333531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6336 RESULT=skip>
31298 23:02:46.333956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6336 RESULT=skip
31300 23:02:46.367714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6336 RESULT=skip>
31301 23:02:46.368165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6336 RESULT=skip
31303 23:02:46.398935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6352 RESULT=pass>
31304 23:02:46.399371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6352 RESULT=pass
31306 23:02:46.430033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6352 RESULT=skip>
31307 23:02:46.430480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6352 RESULT=skip
31309 23:02:46.460964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6352 RESULT=skip>
31310 23:02:46.461405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6352 RESULT=skip
31312 23:02:46.491799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6368 RESULT=pass
31314 23:02:46.492372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6368 RESULT=pass>
31315 23:02:46.522886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6368 RESULT=skip>
31316 23:02:46.523321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6368 RESULT=skip
31318 23:02:46.555023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6368 RESULT=skip>
31319 23:02:46.555524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6368 RESULT=skip
31321 23:02:46.586280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6384 RESULT=pass>
31322 23:02:46.586764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6384 RESULT=pass
31324 23:02:46.619162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6384 RESULT=skip
31326 23:02:46.619710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6384 RESULT=skip>
31327 23:02:46.651232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6384 RESULT=skip>
31328 23:02:46.651749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6384 RESULT=skip
31330 23:02:46.683692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6400 RESULT=pass
31332 23:02:46.684241 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6400 RESULT=pass>
31333 23:02:46.718663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6400 RESULT=skip
31335 23:02:46.719430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6400 RESULT=skip>
31336 23:02:46.754598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6400 RESULT=skip>
31337 23:02:46.755138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6400 RESULT=skip
31339 23:02:46.793207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6416 RESULT=pass
31341 23:02:46.793684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6416 RESULT=pass>
31342 23:02:46.832108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6416 RESULT=skip
31344 23:02:46.832549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6416 RESULT=skip>
31345 23:02:46.868659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6416 RESULT=skip>
31346 23:02:46.869056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6416 RESULT=skip
31348 23:02:46.919237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6432 RESULT=pass
31350 23:02:46.919903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6432 RESULT=pass>
31351 23:02:46.955684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6432 RESULT=skip>
31352 23:02:46.956095 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6432 RESULT=skip
31354 23:02:46.990240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6432 RESULT=skip
31356 23:02:46.990713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6432 RESULT=skip>
31357 23:02:47.023711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6448 RESULT=pass
31359 23:02:47.024094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6448 RESULT=pass>
31360 23:02:47.056738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6448 RESULT=skip
31362 23:02:47.057201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6448 RESULT=skip>
31363 23:02:47.089133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6448 RESULT=skip>
31364 23:02:47.089486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6448 RESULT=skip
31366 23:02:47.121528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6464 RESULT=pass>
31367 23:02:47.121907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6464 RESULT=pass
31369 23:02:47.153695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6464 RESULT=skip
31371 23:02:47.154060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6464 RESULT=skip>
31372 23:02:47.185626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6464 RESULT=skip
31374 23:02:47.186154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6464 RESULT=skip>
31375 23:02:47.216906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6480 RESULT=pass>
31376 23:02:47.217367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6480 RESULT=pass
31378 23:02:47.249031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6480 RESULT=skip>
31379 23:02:47.249479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6480 RESULT=skip
31381 23:02:47.281007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6480 RESULT=skip>
31382 23:02:47.281439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6480 RESULT=skip
31384 23:02:47.314155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6496 RESULT=pass>
31385 23:02:47.314599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6496 RESULT=pass
31387 23:02:47.346373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6496 RESULT=skip
31389 23:02:47.346937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6496 RESULT=skip>
31390 23:02:47.378268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6496 RESULT=skip
31392 23:02:47.378797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6496 RESULT=skip>
31393 23:02:47.410606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6512 RESULT=pass>
31394 23:02:47.411027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6512 RESULT=pass
31396 23:02:47.442945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6512 RESULT=skip>
31397 23:02:47.443396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6512 RESULT=skip
31399 23:02:47.475970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6512 RESULT=skip
31401 23:02:47.476431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6512 RESULT=skip>
31402 23:02:47.508967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6528 RESULT=pass>
31403 23:02:47.509372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6528 RESULT=pass
31405 23:02:47.542030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6528 RESULT=skip>
31406 23:02:47.542485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6528 RESULT=skip
31408 23:02:47.574999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6528 RESULT=skip>
31409 23:02:47.575392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6528 RESULT=skip
31411 23:02:47.607524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6544 RESULT=pass>
31412 23:02:47.607916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6544 RESULT=pass
31414 23:02:47.640954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6544 RESULT=skip>
31415 23:02:47.641358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6544 RESULT=skip
31417 23:02:47.673550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6544 RESULT=skip>
31418 23:02:47.673968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6544 RESULT=skip
31420 23:02:47.705155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6560 RESULT=pass>
31421 23:02:47.705565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6560 RESULT=pass
31423 23:02:47.737047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6560 RESULT=skip>
31424 23:02:47.737458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6560 RESULT=skip
31426 23:02:47.769344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6560 RESULT=skip>
31427 23:02:47.769762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6560 RESULT=skip
31429 23:02:47.803383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6576 RESULT=pass>
31430 23:02:47.803828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6576 RESULT=pass
31432 23:02:47.836817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6576 RESULT=skip
31434 23:02:47.837490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6576 RESULT=skip>
31435 23:02:47.873280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6576 RESULT=skip>
31436 23:02:47.873672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6576 RESULT=skip
31438 23:02:47.914446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6592 RESULT=pass
31440 23:02:47.915030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6592 RESULT=pass>
31441 23:02:47.951032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6592 RESULT=skip>
31442 23:02:47.951513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6592 RESULT=skip
31444 23:02:47.985340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6592 RESULT=skip
31446 23:02:47.985985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6592 RESULT=skip>
31447 23:02:48.017880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6608 RESULT=pass>
31448 23:02:48.018311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6608 RESULT=pass
31450 23:02:48.050696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6608 RESULT=skip>
31451 23:02:48.051175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6608 RESULT=skip
31453 23:02:48.083238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6608 RESULT=skip
31455 23:02:48.083867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6608 RESULT=skip>
31456 23:02:48.114919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6624 RESULT=pass>
31457 23:02:48.115399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6624 RESULT=pass
31459 23:02:48.146597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6624 RESULT=skip>
31460 23:02:48.147074 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6624 RESULT=skip
31462 23:02:48.179205 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6624 RESULT=skip
31464 23:02:48.179677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6624 RESULT=skip>
31465 23:02:48.211426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6640 RESULT=pass>
31466 23:02:48.211866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6640 RESULT=pass
31468 23:02:48.243434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6640 RESULT=skip
31470 23:02:48.244098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6640 RESULT=skip>
31471 23:02:48.275546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6640 RESULT=skip>
31472 23:02:48.275992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6640 RESULT=skip
31474 23:02:48.310360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6656 RESULT=pass>
31475 23:02:48.310860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6656 RESULT=pass
31477 23:02:48.345461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6656 RESULT=skip>
31478 23:02:48.345961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6656 RESULT=skip
31480 23:02:48.378469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6656 RESULT=skip
31482 23:02:48.379106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6656 RESULT=skip>
31483 23:02:48.413146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6672 RESULT=pass
31485 23:02:48.413792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6672 RESULT=pass>
31486 23:02:48.449153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6672 RESULT=skip
31488 23:02:48.449737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6672 RESULT=skip>
31489 23:02:48.483893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6672 RESULT=skip
31491 23:02:48.484487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6672 RESULT=skip>
31492 23:02:48.516905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6688 RESULT=pass>
31493 23:02:48.517358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6688 RESULT=pass
31495 23:02:48.549810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6688 RESULT=skip>
31496 23:02:48.550271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6688 RESULT=skip
31498 23:02:48.581397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6688 RESULT=skip>
31499 23:02:48.581855 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6688 RESULT=skip
31501 23:02:48.613618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6704 RESULT=pass>
31502 23:02:48.614079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6704 RESULT=pass
31504 23:02:48.645719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6704 RESULT=skip>
31505 23:02:48.646185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6704 RESULT=skip
31507 23:02:48.677260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6704 RESULT=skip>
31508 23:02:48.677703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6704 RESULT=skip
31510 23:02:48.708955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6720 RESULT=pass
31512 23:02:48.709577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6720 RESULT=pass>
31513 23:02:48.739931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6720 RESULT=skip
31515 23:02:48.740575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6720 RESULT=skip>
31516 23:02:48.772471 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6720 RESULT=skip
31518 23:02:48.773026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6720 RESULT=skip>
31519 23:02:48.804628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6736 RESULT=pass>
31520 23:02:48.805072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6736 RESULT=pass
31522 23:02:48.836729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6736 RESULT=skip>
31523 23:02:48.837224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6736 RESULT=skip
31525 23:02:48.868924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6736 RESULT=skip>
31526 23:02:48.869381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6736 RESULT=skip
31528 23:02:48.901212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6752 RESULT=pass
31530 23:02:48.901829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6752 RESULT=pass>
31531 23:02:48.933272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6752 RESULT=skip
31533 23:02:48.933836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6752 RESULT=skip>
31534 23:02:48.965874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6752 RESULT=skip
31536 23:02:48.966333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6752 RESULT=skip>
31537 23:02:48.998023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6768 RESULT=pass
31539 23:02:48.998611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6768 RESULT=pass>
31540 23:02:49.031713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6768 RESULT=skip>
31541 23:02:49.032146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6768 RESULT=skip
31543 23:02:49.067100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6768 RESULT=skip>
31544 23:02:49.067557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6768 RESULT=skip
31546 23:02:49.102357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6784 RESULT=pass>
31547 23:02:49.102809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6784 RESULT=pass
31549 23:02:49.138118 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6784 RESULT=skip
31551 23:02:49.138681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6784 RESULT=skip>
31552 23:02:49.173512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6784 RESULT=skip>
31553 23:02:49.174127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6784 RESULT=skip
31555 23:02:49.208830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6800 RESULT=pass>
31556 23:02:49.209306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6800 RESULT=pass
31558 23:02:49.242751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6800 RESULT=skip
31560 23:02:49.243314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6800 RESULT=skip>
31561 23:02:49.275623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6800 RESULT=skip>
31562 23:02:49.276073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6800 RESULT=skip
31564 23:02:49.309366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6816 RESULT=pass>
31565 23:02:49.309817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6816 RESULT=pass
31567 23:02:49.342795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6816 RESULT=skip>
31568 23:02:49.343250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6816 RESULT=skip
31570 23:02:49.375365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6816 RESULT=skip>
31571 23:02:49.375811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6816 RESULT=skip
31573 23:02:49.408090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6832 RESULT=pass
31575 23:02:49.408630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6832 RESULT=pass>
31576 23:02:49.443321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6832 RESULT=skip>
31577 23:02:49.443761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6832 RESULT=skip
31579 23:02:49.477005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6832 RESULT=skip
31581 23:02:49.477662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6832 RESULT=skip>
31582 23:02:49.509213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6848 RESULT=pass
31584 23:02:49.509855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6848 RESULT=pass>
31585 23:02:49.541699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6848 RESULT=skip>
31586 23:02:49.542164 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6848 RESULT=skip
31588 23:02:49.576116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6848 RESULT=skip
31590 23:02:49.576573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6848 RESULT=skip>
31591 23:02:49.609990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6864 RESULT=pass
31593 23:02:49.610446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6864 RESULT=pass>
31594 23:02:49.642854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6864 RESULT=skip
31596 23:02:49.643299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6864 RESULT=skip>
31597 23:02:49.676355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6864 RESULT=skip
31599 23:02:49.676999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6864 RESULT=skip>
31600 23:02:49.709276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6880 RESULT=pass
31602 23:02:49.709963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6880 RESULT=pass>
31603 23:02:49.742684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6880 RESULT=skip
31605 23:02:49.743314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6880 RESULT=skip>
31606 23:02:49.777202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6880 RESULT=skip>
31607 23:02:49.777696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6880 RESULT=skip
31609 23:02:49.809945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6896 RESULT=pass>
31610 23:02:49.810422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6896 RESULT=pass
31612 23:02:49.843494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6896 RESULT=skip
31614 23:02:49.843973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6896 RESULT=skip>
31615 23:02:49.877907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6896 RESULT=skip
31617 23:02:49.878577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6896 RESULT=skip>
31618 23:02:49.911200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6912 RESULT=pass>
31619 23:02:49.911677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6912 RESULT=pass
31621 23:02:49.944941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6912 RESULT=skip>
31622 23:02:49.945438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6912 RESULT=skip
31624 23:02:49.978257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6912 RESULT=skip>
31625 23:02:49.978674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6912 RESULT=skip
31627 23:02:50.033794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6928 RESULT=pass
31629 23:02:50.034248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6928 RESULT=pass>
31630 23:02:50.068372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6928 RESULT=skip>
31631 23:02:50.068788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6928 RESULT=skip
31633 23:02:50.102334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6928 RESULT=skip
31635 23:02:50.102810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6928 RESULT=skip>
31636 23:02:50.136210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6944 RESULT=pass>
31637 23:02:50.136695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6944 RESULT=pass
31639 23:02:50.169011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6944 RESULT=skip>
31640 23:02:50.169449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6944 RESULT=skip
31642 23:02:50.202967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6944 RESULT=skip>
31643 23:02:50.203426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6944 RESULT=skip
31645 23:02:50.237078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6960 RESULT=pass>
31646 23:02:50.237544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6960 RESULT=pass
31648 23:02:50.272094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6960 RESULT=skip
31650 23:02:50.272646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6960 RESULT=skip>
31651 23:02:50.307305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6960 RESULT=skip
31653 23:02:50.307856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6960 RESULT=skip>
31654 23:02:50.343261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6976 RESULT=pass>
31655 23:02:50.343728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6976 RESULT=pass
31657 23:02:50.381350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6976 RESULT=skip>
31658 23:02:50.381788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6976 RESULT=skip
31660 23:02:50.428682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6976 RESULT=skip
31662 23:02:50.429320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6976 RESULT=skip>
31663 23:02:50.463945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_6992 RESULT=pass
31665 23:02:50.464562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_6992 RESULT=pass>
31666 23:02:50.498602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6992 RESULT=skip>
31667 23:02:50.499033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_6992 RESULT=skip
31669 23:02:50.534257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6992 RESULT=skip>
31670 23:02:50.534692 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_6992 RESULT=skip
31672 23:02:50.570829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7008 RESULT=pass
31674 23:02:50.571198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7008 RESULT=pass>
31675 23:02:50.605720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7008 RESULT=skip
31677 23:02:50.606209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7008 RESULT=skip>
31678 23:02:50.641885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7008 RESULT=skip
31680 23:02:50.642342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7008 RESULT=skip>
31681 23:02:50.678615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7024 RESULT=pass
31683 23:02:50.679083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7024 RESULT=pass>
31684 23:02:50.714614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7024 RESULT=skip>
31685 23:02:50.715117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7024 RESULT=skip
31687 23:02:50.750053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7024 RESULT=skip>
31688 23:02:50.750547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7024 RESULT=skip
31690 23:02:50.783492 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7040 RESULT=pass
31692 23:02:50.783851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7040 RESULT=pass>
31693 23:02:50.817519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7040 RESULT=skip
31695 23:02:50.818097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7040 RESULT=skip>
31696 23:02:50.852929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7040 RESULT=skip>
31697 23:02:50.853377 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7040 RESULT=skip
31699 23:02:50.885707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7056 RESULT=pass
31701 23:02:50.886154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7056 RESULT=pass>
31702 23:02:50.919124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7056 RESULT=skip>
31703 23:02:50.919554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7056 RESULT=skip
31705 23:02:50.952505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7056 RESULT=skip>
31706 23:02:50.952997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7056 RESULT=skip
31708 23:02:50.985231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7072 RESULT=pass
31710 23:02:50.985870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7072 RESULT=pass>
31711 23:02:51.018645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7072 RESULT=skip
31713 23:02:51.019264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7072 RESULT=skip>
31714 23:02:51.051770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7072 RESULT=skip
31716 23:02:51.052394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7072 RESULT=skip>
31717 23:02:51.085129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7088 RESULT=pass>
31718 23:02:51.085591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7088 RESULT=pass
31720 23:02:51.118834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7088 RESULT=skip>
31721 23:02:51.119292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7088 RESULT=skip
31723 23:02:51.152336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7088 RESULT=skip
31725 23:02:51.152803 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7088 RESULT=skip>
31726 23:02:51.186267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7104 RESULT=pass>
31727 23:02:51.186695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7104 RESULT=pass
31729 23:02:51.219791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7104 RESULT=skip
31731 23:02:51.220250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7104 RESULT=skip>
31732 23:02:51.253770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7104 RESULT=skip>
31733 23:02:51.254192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7104 RESULT=skip
31735 23:02:51.287938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7120 RESULT=pass
31737 23:02:51.288621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7120 RESULT=pass>
31738 23:02:51.322069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7120 RESULT=skip>
31739 23:02:51.322511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7120 RESULT=skip
31741 23:02:51.355521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7120 RESULT=skip>
31742 23:02:51.355928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7120 RESULT=skip
31744 23:02:51.388794 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7136 RESULT=pass>
31745 23:02:51.389213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7136 RESULT=pass
31747 23:02:51.422113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7136 RESULT=skip>
31748 23:02:51.422537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7136 RESULT=skip
31750 23:02:51.456708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7136 RESULT=skip>
31751 23:02:51.457113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7136 RESULT=skip
31753 23:02:51.492864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7152 RESULT=pass>
31754 23:02:51.493296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7152 RESULT=pass
31756 23:02:51.525995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7152 RESULT=skip>
31757 23:02:51.526404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7152 RESULT=skip
31759 23:02:51.559511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7152 RESULT=skip>
31760 23:02:51.559964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7152 RESULT=skip
31762 23:02:51.593877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7168 RESULT=pass>
31763 23:02:51.594294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7168 RESULT=pass
31765 23:02:51.627598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7168 RESULT=skip>
31766 23:02:51.628041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7168 RESULT=skip
31768 23:02:51.662322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7168 RESULT=skip
31770 23:02:51.662969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7168 RESULT=skip>
31771 23:02:51.695962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7184 RESULT=pass
31773 23:02:51.696710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7184 RESULT=pass>
31774 23:02:51.732880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7184 RESULT=skip>
31775 23:02:51.733366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7184 RESULT=skip
31777 23:02:51.768727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7184 RESULT=skip>
31778 23:02:51.769206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7184 RESULT=skip
31780 23:02:51.805884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7200 RESULT=pass>
31781 23:02:51.806296 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7200 RESULT=pass
31783 23:02:51.844508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7200 RESULT=skip>
31784 23:02:51.844943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7200 RESULT=skip
31786 23:02:51.881163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7200 RESULT=skip
31788 23:02:51.881753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7200 RESULT=skip>
31789 23:02:51.914705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7216 RESULT=pass
31791 23:02:51.915263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7216 RESULT=pass>
31792 23:02:51.949364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7216 RESULT=skip>
31793 23:02:51.949895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7216 RESULT=skip
31795 23:02:51.982988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7216 RESULT=skip>
31796 23:02:51.983433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7216 RESULT=skip
31798 23:02:52.016568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7232 RESULT=pass>
31799 23:02:52.017021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7232 RESULT=pass
31801 23:02:52.050176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7232 RESULT=skip>
31802 23:02:52.050629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7232 RESULT=skip
31804 23:02:52.083519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7232 RESULT=skip>
31805 23:02:52.083970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7232 RESULT=skip
31807 23:02:52.116786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7248 RESULT=pass
31809 23:02:52.117268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7248 RESULT=pass>
31810 23:02:52.149848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7248 RESULT=skip
31812 23:02:52.150328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7248 RESULT=skip>
31813 23:02:52.183398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7248 RESULT=skip>
31814 23:02:52.183824 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7248 RESULT=skip
31816 23:02:52.216270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7264 RESULT=pass>
31817 23:02:52.216729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7264 RESULT=pass
31819 23:02:52.249527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7264 RESULT=skip
31821 23:02:52.249986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7264 RESULT=skip>
31822 23:02:52.283521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7264 RESULT=skip
31824 23:02:52.283975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7264 RESULT=skip>
31825 23:02:52.316684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7280 RESULT=pass
31827 23:02:52.317137 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7280 RESULT=pass>
31828 23:02:52.350225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7280 RESULT=skip>
31829 23:02:52.350657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7280 RESULT=skip
31831 23:02:52.384040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7280 RESULT=skip
31833 23:02:52.384513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7280 RESULT=skip>
31834 23:02:52.417555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7296 RESULT=pass>
31835 23:02:52.418010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7296 RESULT=pass
31837 23:02:52.451117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7296 RESULT=skip
31839 23:02:52.451576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7296 RESULT=skip>
31840 23:02:52.484686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7296 RESULT=skip
31842 23:02:52.485138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7296 RESULT=skip>
31843 23:02:52.517916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7312 RESULT=pass>
31844 23:02:52.518345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7312 RESULT=pass
31846 23:02:52.552749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7312 RESULT=skip
31848 23:02:52.553333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7312 RESULT=skip>
31849 23:02:52.585853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7312 RESULT=skip>
31850 23:02:52.586273 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7312 RESULT=skip
31852 23:02:52.619173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7328 RESULT=pass>
31853 23:02:52.619602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7328 RESULT=pass
31855 23:02:52.652598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7328 RESULT=skip
31857 23:02:52.653072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7328 RESULT=skip>
31858 23:02:52.685758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7328 RESULT=skip>
31859 23:02:52.686201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7328 RESULT=skip
31861 23:02:52.719549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7344 RESULT=pass
31863 23:02:52.720011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7344 RESULT=pass>
31864 23:02:52.754078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7344 RESULT=skip
31866 23:02:52.754530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7344 RESULT=skip>
31867 23:02:52.787320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7344 RESULT=skip
31869 23:02:52.787792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7344 RESULT=skip>
31870 23:02:52.820448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7360 RESULT=pass
31872 23:02:52.821082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7360 RESULT=pass>
31873 23:02:52.854091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7360 RESULT=skip>
31874 23:02:52.854509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7360 RESULT=skip
31876 23:02:52.887754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7360 RESULT=skip>
31877 23:02:52.888233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7360 RESULT=skip
31879 23:02:52.922109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7376 RESULT=pass
31881 23:02:52.922744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7376 RESULT=pass>
31882 23:02:52.954991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7376 RESULT=skip>
31883 23:02:52.955461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7376 RESULT=skip
31885 23:02:52.988634 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7376 RESULT=skip>
31886 23:02:52.989113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7376 RESULT=skip
31888 23:02:53.022153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7392 RESULT=pass
31890 23:02:53.022712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7392 RESULT=pass>
31891 23:02:53.055797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7392 RESULT=skip
31893 23:02:53.056355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7392 RESULT=skip>
31894 23:02:53.089061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7392 RESULT=skip>
31895 23:02:53.089530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7392 RESULT=skip
31897 23:02:53.121945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7408 RESULT=pass>
31898 23:02:53.122413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7408 RESULT=pass
31900 23:02:53.155412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7408 RESULT=skip
31902 23:02:53.156003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7408 RESULT=skip>
31903 23:02:53.188004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7408 RESULT=skip
31905 23:02:53.188578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7408 RESULT=skip>
31906 23:02:53.220662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7424 RESULT=pass>
31907 23:02:53.221124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7424 RESULT=pass
31909 23:02:53.253712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7424 RESULT=skip>
31910 23:02:53.254184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7424 RESULT=skip
31912 23:02:53.287139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7424 RESULT=skip
31914 23:02:53.287707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7424 RESULT=skip>
31915 23:02:53.319861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7440 RESULT=pass
31917 23:02:53.320403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7440 RESULT=pass>
31918 23:02:53.353722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7440 RESULT=skip
31920 23:02:53.354278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7440 RESULT=skip>
31921 23:02:53.386570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7440 RESULT=skip
31923 23:02:53.387129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7440 RESULT=skip>
31924 23:02:53.419176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7456 RESULT=pass>
31925 23:02:53.419638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7456 RESULT=pass
31927 23:02:53.451686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7456 RESULT=skip
31929 23:02:53.452239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7456 RESULT=skip>
31930 23:02:53.485322 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7456 RESULT=skip
31932 23:02:53.485926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7456 RESULT=skip>
31933 23:02:53.518102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7472 RESULT=pass>
31934 23:02:53.518574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7472 RESULT=pass
31936 23:02:53.551923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7472 RESULT=skip
31938 23:02:53.552564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7472 RESULT=skip>
31939 23:02:53.586081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7472 RESULT=skip
31941 23:02:53.586732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7472 RESULT=skip>
31942 23:02:53.620778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7488 RESULT=pass>
31943 23:02:53.621353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7488 RESULT=pass
31945 23:02:53.653699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7488 RESULT=skip>
31946 23:02:53.654180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7488 RESULT=skip
31948 23:02:53.687297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7488 RESULT=skip>
31949 23:02:53.687759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7488 RESULT=skip
31951 23:02:53.723827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7504 RESULT=pass>
31952 23:02:53.724365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7504 RESULT=pass
31954 23:02:53.764020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7504 RESULT=skip
31956 23:02:53.764703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7504 RESULT=skip>
31957 23:02:53.797506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7504 RESULT=skip
31959 23:02:53.798159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7504 RESULT=skip>
31960 23:02:53.830895 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7520 RESULT=pass
31962 23:02:53.831355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7520 RESULT=pass>
31963 23:02:53.868579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7520 RESULT=skip>
31964 23:02:53.868967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7520 RESULT=skip
31966 23:02:53.900804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7520 RESULT=skip>
31967 23:02:53.901175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7520 RESULT=skip
31969 23:02:53.933076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7536 RESULT=pass>
31970 23:02:53.933439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7536 RESULT=pass
31972 23:02:53.965006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7536 RESULT=skip
31974 23:02:53.965406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7536 RESULT=skip>
31975 23:02:53.996981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7536 RESULT=skip>
31976 23:02:53.997403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7536 RESULT=skip
31978 23:02:54.028756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7552 RESULT=pass
31980 23:02:54.029200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7552 RESULT=pass>
31981 23:02:54.060579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7552 RESULT=skip>
31982 23:02:54.061053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7552 RESULT=skip
31984 23:02:54.092390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7552 RESULT=skip
31986 23:02:54.093014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7552 RESULT=skip>
31987 23:02:54.123050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7568 RESULT=pass>
31988 23:02:54.123477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7568 RESULT=pass
31990 23:02:54.153970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7568 RESULT=skip>
31991 23:02:54.154425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7568 RESULT=skip
31993 23:02:54.185574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7568 RESULT=skip
31995 23:02:54.186053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7568 RESULT=skip>
31996 23:02:54.216851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7584 RESULT=pass>
31997 23:02:54.217320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7584 RESULT=pass
31999 23:02:54.249038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7584 RESULT=skip
32001 23:02:54.249625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7584 RESULT=skip>
32002 23:02:54.281067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7584 RESULT=skip
32004 23:02:54.281711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7584 RESULT=skip>
32005 23:02:54.313073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7600 RESULT=pass
32007 23:02:54.313628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7600 RESULT=pass>
32008 23:02:54.344823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7600 RESULT=skip>
32009 23:02:54.345239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7600 RESULT=skip
32011 23:02:54.376637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7600 RESULT=skip
32013 23:02:54.377173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7600 RESULT=skip>
32014 23:02:54.408650 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7616 RESULT=pass
32016 23:02:54.409185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7616 RESULT=pass>
32017 23:02:54.439618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7616 RESULT=skip>
32018 23:02:54.440063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7616 RESULT=skip
32020 23:02:54.471507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7616 RESULT=skip>
32021 23:02:54.471967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7616 RESULT=skip
32023 23:02:54.503154 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7632 RESULT=pass>
32024 23:02:54.503636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7632 RESULT=pass
32026 23:02:54.534928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7632 RESULT=skip
32028 23:02:54.535505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7632 RESULT=skip>
32029 23:02:54.566406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7632 RESULT=skip
32031 23:02:54.567004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7632 RESULT=skip>
32032 23:02:54.597672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7648 RESULT=pass>
32033 23:02:54.598152 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7648 RESULT=pass
32035 23:02:54.629479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7648 RESULT=skip
32037 23:02:54.629953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7648 RESULT=skip>
32038 23:02:54.661090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7648 RESULT=skip>
32039 23:02:54.661500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7648 RESULT=skip
32041 23:02:54.692099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7664 RESULT=pass>
32042 23:02:54.692519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7664 RESULT=pass
32044 23:02:54.723115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7664 RESULT=skip>
32045 23:02:54.723549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7664 RESULT=skip
32047 23:02:54.754570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7664 RESULT=skip
32049 23:02:54.755031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7664 RESULT=skip>
32050 23:02:54.785910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7680 RESULT=pass
32052 23:02:54.786491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7680 RESULT=pass>
32053 23:02:54.818030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7680 RESULT=skip>
32054 23:02:54.818467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7680 RESULT=skip
32056 23:02:54.850475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7680 RESULT=skip>
32057 23:02:54.850982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7680 RESULT=skip
32059 23:02:54.883664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7696 RESULT=pass>
32060 23:02:54.884100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7696 RESULT=pass
32062 23:02:54.915156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7696 RESULT=skip>
32063 23:02:54.915624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7696 RESULT=skip
32065 23:02:54.946610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7696 RESULT=skip
32067 23:02:54.947053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7696 RESULT=skip>
32068 23:02:54.977785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7712 RESULT=pass
32070 23:02:54.978222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7712 RESULT=pass>
32071 23:02:55.009439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7712 RESULT=skip>
32072 23:02:55.009897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7712 RESULT=skip
32074 23:02:55.041066 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7712 RESULT=skip>
32075 23:02:55.041518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7712 RESULT=skip
32077 23:02:55.072138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7728 RESULT=pass
32079 23:02:55.072722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7728 RESULT=pass>
32080 23:02:55.109772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7728 RESULT=skip>
32081 23:02:55.110258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7728 RESULT=skip
32083 23:02:55.163226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7728 RESULT=skip
32085 23:02:55.163623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7728 RESULT=skip>
32086 23:02:55.194370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7744 RESULT=pass>
32087 23:02:55.194733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7744 RESULT=pass
32089 23:02:55.225844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7744 RESULT=skip>
32090 23:02:55.226218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7744 RESULT=skip
32092 23:02:55.257473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7744 RESULT=skip>
32093 23:02:55.257854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7744 RESULT=skip
32095 23:02:55.288718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7760 RESULT=pass>
32096 23:02:55.289233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7760 RESULT=pass
32098 23:02:55.319450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7760 RESULT=skip
32100 23:02:55.319856 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7760 RESULT=skip>
32101 23:02:55.350527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7760 RESULT=skip
32103 23:02:55.350892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7760 RESULT=skip>
32104 23:02:55.382188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7776 RESULT=pass
32106 23:02:55.382651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7776 RESULT=pass>
32107 23:02:55.413509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7776 RESULT=skip
32109 23:02:55.413963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7776 RESULT=skip>
32110 23:02:55.445181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7776 RESULT=skip
32112 23:02:55.445638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7776 RESULT=skip>
32113 23:02:55.476361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7792 RESULT=pass
32115 23:02:55.476821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7792 RESULT=pass>
32116 23:02:55.506983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7792 RESULT=skip
32118 23:02:55.507435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7792 RESULT=skip>
32119 23:02:55.537904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7792 RESULT=skip
32121 23:02:55.538364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7792 RESULT=skip>
32122 23:02:55.568934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7808 RESULT=pass
32124 23:02:55.569388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7808 RESULT=pass>
32125 23:02:55.600765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7808 RESULT=skip
32127 23:02:55.601210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7808 RESULT=skip>
32128 23:02:55.632894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7808 RESULT=skip
32130 23:02:55.633532 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7808 RESULT=skip>
32131 23:02:55.664854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7824 RESULT=pass>
32132 23:02:55.665327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7824 RESULT=pass
32134 23:02:55.698287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7824 RESULT=skip>
32135 23:02:55.698709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7824 RESULT=skip
32137 23:02:55.733787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7824 RESULT=skip
32139 23:02:55.734503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7824 RESULT=skip>
32140 23:02:55.770350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7840 RESULT=pass
32142 23:02:55.770850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7840 RESULT=pass>
32143 23:02:55.806456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7840 RESULT=skip>
32144 23:02:55.807001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7840 RESULT=skip
32146 23:02:55.841469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7840 RESULT=skip>
32147 23:02:55.841942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7840 RESULT=skip
32149 23:02:55.878358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7856 RESULT=pass
32151 23:02:55.878915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7856 RESULT=pass>
32152 23:02:55.910280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7856 RESULT=skip>
32153 23:02:55.910760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7856 RESULT=skip
32155 23:02:55.941155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7856 RESULT=skip
32157 23:02:55.941609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7856 RESULT=skip>
32158 23:02:55.972952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7872 RESULT=pass
32160 23:02:55.973570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7872 RESULT=pass>
32161 23:02:56.003472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7872 RESULT=skip>
32162 23:02:56.003912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7872 RESULT=skip
32164 23:02:56.038115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7872 RESULT=skip>
32165 23:02:56.038578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7872 RESULT=skip
32167 23:02:56.070097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7888 RESULT=pass>
32168 23:02:56.070553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7888 RESULT=pass
32170 23:02:56.101729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7888 RESULT=skip>
32171 23:02:56.102153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7888 RESULT=skip
32173 23:02:56.132808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7888 RESULT=skip>
32174 23:02:56.133268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7888 RESULT=skip
32176 23:02:56.164250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7904 RESULT=pass>
32177 23:02:56.164727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7904 RESULT=pass
32179 23:02:56.194910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7904 RESULT=skip>
32180 23:02:56.195358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7904 RESULT=skip
32182 23:02:56.225829 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7904 RESULT=skip
32184 23:02:56.226373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7904 RESULT=skip>
32185 23:02:56.256656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7920 RESULT=pass
32187 23:02:56.257190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7920 RESULT=pass>
32188 23:02:56.287489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7920 RESULT=skip>
32189 23:02:56.287918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7920 RESULT=skip
32191 23:02:56.318512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7920 RESULT=skip
32193 23:02:56.319058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7920 RESULT=skip>
32194 23:02:56.349711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7936 RESULT=pass
32196 23:02:56.350149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7936 RESULT=pass>
32197 23:02:56.381019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7936 RESULT=skip>
32198 23:02:56.381401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7936 RESULT=skip
32200 23:02:56.411517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7936 RESULT=skip
32202 23:02:56.411976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7936 RESULT=skip>
32203 23:02:56.443065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7952 RESULT=pass>
32204 23:02:56.443533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7952 RESULT=pass
32206 23:02:56.475391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7952 RESULT=skip
32208 23:02:56.475986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7952 RESULT=skip>
32209 23:02:56.506997 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7952 RESULT=skip
32211 23:02:56.507624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7952 RESULT=skip>
32212 23:02:56.538305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7968 RESULT=pass>
32213 23:02:56.538769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7968 RESULT=pass
32215 23:02:56.570472 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7968 RESULT=skip
32217 23:02:56.571033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7968 RESULT=skip>
32218 23:02:56.601689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7968 RESULT=skip>
32219 23:02:56.602153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7968 RESULT=skip
32221 23:02:56.634961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_7984 RESULT=pass>
32222 23:02:56.635432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_7984 RESULT=pass
32224 23:02:56.666296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7984 RESULT=skip>
32225 23:02:56.666682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_7984 RESULT=skip
32227 23:02:56.701458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7984 RESULT=skip>
32228 23:02:56.701858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_7984 RESULT=skip
32230 23:02:56.746023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8000 RESULT=pass>
32231 23:02:56.746420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8000 RESULT=pass
32233 23:02:56.798359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8000 RESULT=skip
32235 23:02:56.798919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8000 RESULT=skip>
32236 23:02:56.833067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8000 RESULT=skip
32238 23:02:56.833626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8000 RESULT=skip>
32239 23:02:56.866635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8016 RESULT=pass
32241 23:02:56.867001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8016 RESULT=pass>
32242 23:02:56.898927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8016 RESULT=skip
32244 23:02:56.899359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8016 RESULT=skip>
32245 23:02:56.930517 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8016 RESULT=skip
32247 23:02:56.930980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8016 RESULT=skip>
32248 23:02:56.965177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8032 RESULT=pass>
32249 23:02:56.965688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8032 RESULT=pass
32251 23:02:56.999036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8032 RESULT=skip>
32252 23:02:56.999451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8032 RESULT=skip
32254 23:02:57.032407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8032 RESULT=skip>
32255 23:02:57.032873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8032 RESULT=skip
32257 23:02:57.064021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8048 RESULT=pass
32259 23:02:57.064462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8048 RESULT=pass>
32260 23:02:57.094973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8048 RESULT=skip>
32261 23:02:57.095468 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8048 RESULT=skip
32263 23:02:57.126449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8048 RESULT=skip
32265 23:02:57.127008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8048 RESULT=skip>
32266 23:02:57.157256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8064 RESULT=pass>
32267 23:02:57.157698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8064 RESULT=pass
32269 23:02:57.188832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8064 RESULT=skip
32271 23:02:57.189390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8064 RESULT=skip>
32272 23:02:57.220189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8064 RESULT=skip>
32273 23:02:57.220665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8064 RESULT=skip
32275 23:02:57.250797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8080 RESULT=pass>
32276 23:02:57.251247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8080 RESULT=pass
32278 23:02:57.281723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8080 RESULT=skip>
32279 23:02:57.282177 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8080 RESULT=skip
32281 23:02:57.312873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8080 RESULT=skip>
32282 23:02:57.313336 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8080 RESULT=skip
32284 23:02:57.343477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8096 RESULT=pass>
32285 23:02:57.343918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8096 RESULT=pass
32287 23:02:57.374805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8096 RESULT=skip
32289 23:02:57.375345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8096 RESULT=skip>
32290 23:02:57.406608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8096 RESULT=skip
32292 23:02:57.407149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8096 RESULT=skip>
32293 23:02:57.437555 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8112 RESULT=pass>
32294 23:02:57.438026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8112 RESULT=pass
32296 23:02:57.469588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8112 RESULT=skip
32298 23:02:57.470153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8112 RESULT=skip>
32299 23:02:57.500826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8112 RESULT=skip>
32300 23:02:57.501264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8112 RESULT=skip
32302 23:02:57.531984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8128 RESULT=pass
32304 23:02:57.532432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8128 RESULT=pass>
32305 23:02:57.563086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8128 RESULT=skip
32307 23:02:57.563534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8128 RESULT=skip>
32308 23:02:57.594108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8128 RESULT=skip>
32309 23:02:57.594507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8128 RESULT=skip
32311 23:02:57.625038 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8144 RESULT=pass
32313 23:02:57.625487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8144 RESULT=pass>
32314 23:02:57.655995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8144 RESULT=skip
32316 23:02:57.656410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8144 RESULT=skip>
32317 23:02:57.687620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8144 RESULT=skip>
32318 23:02:57.688007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8144 RESULT=skip
32320 23:02:57.718409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8160 RESULT=pass
32322 23:02:57.718852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8160 RESULT=pass>
32323 23:02:57.750703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8160 RESULT=skip
32325 23:02:57.751312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8160 RESULT=skip>
32326 23:02:57.781705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8160 RESULT=skip
32328 23:02:57.782312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8160 RESULT=skip>
32329 23:02:57.812732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8176 RESULT=pass>
32330 23:02:57.813184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8176 RESULT=pass
32332 23:02:57.844002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8176 RESULT=skip
32334 23:02:57.844531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8176 RESULT=skip>
32335 23:02:57.876331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8176 RESULT=skip>
32336 23:02:57.876756 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8176 RESULT=skip
32338 23:02:57.910052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_8192 RESULT=pass
32340 23:02:57.910613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_8192 RESULT=pass>
32341 23:02:57.941357 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8192 RESULT=skip>
32342 23:02:57.941804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_8192 RESULT=skip
32344 23:02:57.973725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8192 RESULT=skip
32346 23:02:57.974292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_8192 RESULT=skip>
32347 23:02:58.004554 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace RESULT=pass
32349 23:02:58.005084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace RESULT=pass>
32350 23:02:58.035705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory RESULT=pass>
32351 23:02:58.036149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory RESULT=pass
32353 23:02:58.067941 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory RESULT=pass
32355 23:02:58.068519 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory RESULT=pass>
32356 23:02:58.100732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory RESULT=pass>
32357 23:02:58.101155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory RESULT=pass
32359 23:02:58.132956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory RESULT=pass>
32360 23:02:58.133369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory RESULT=pass
32362 23:02:58.164994 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail>
32363 23:02:58.165465 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail
32365 23:02:58.196768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail>
32366 23:02:58.197229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail
32368 23:02:58.228940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass>
32369 23:02:58.229334 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass
32371 23:02:58.261269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass>
32372 23:02:58.261681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass
32374 23:02:58.295188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass>
32375 23:02:58.295659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass
32377 23:02:58.327087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass>
32378 23:02:58.327523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass
32380 23:02:58.358861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail>
32381 23:02:58.359307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory RESULT=fail
32383 23:02:58.390895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail>
32384 23:02:58.391335 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory RESULT=fail
32386 23:02:58.422551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory RESULT=pass>
32387 23:02:58.423004 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory RESULT=pass
32389 23:02:58.454441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory RESULT=fail>
32390 23:02:58.454841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory RESULT=fail
32392 23:02:58.486198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory RESULT=fail>
32393 23:02:58.486660 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory RESULT=fail
32395 23:02:58.517926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory RESULT=pass>
32396 23:02:58.518369 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory RESULT=pass
32398 23:02:58.549983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=pass>
32399 23:02:58.550425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=pass
32401 23:02:58.583082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
32402 23:02:58.583515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
32404 23:02:58.616523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory RESULT=pass>
32405 23:02:58.616973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory RESULT=pass
32407 23:02:58.648613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
32408 23:02:58.649053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
32410 23:02:58.679766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill RESULT=fail
32412 23:02:58.680304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill RESULT=fail>
32413 23:02:58.711844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail
32415 23:02:58.712391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail>
32416 23:02:58.743988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail
32418 23:02:58.744521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail>
32419 23:02:58.775868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32421 23:02:58.776415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32422 23:02:58.808055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32424 23:02:58.808651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32425 23:02:58.840396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32426 23:02:58.840850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32428 23:02:58.873131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32429 23:02:58.873589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32431 23:02:58.905414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail>
32432 23:02:58.905889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail
32434 23:02:58.937165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail>
32435 23:02:58.937633 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail
32437 23:02:58.969150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32438 23:02:58.969605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32440 23:02:59.001053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail>
32441 23:02:59.001450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=fail
32443 23:02:59.033298 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32444 23:02:59.033739 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32446 23:02:59.066034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail>
32447 23:02:59.066485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=fail
32449 23:02:59.098053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory RESULT=fail
32451 23:02:59.098593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory RESULT=fail>
32452 23:02:59.129418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=fail>
32453 23:02:59.129876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=fail
32455 23:02:59.160519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_ksm_options RESULT=fail
32457 23:02:59.161083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_ksm_options RESULT=fail>
32458 23:02:59.192042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass
32460 23:02:59.192650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
32461 23:02:59.224461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass>
32462 23:02:59.224900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass
32464 23:02:59.256779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
32465 23:02:59.257218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass
32467 23:02:59.290296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass>
32468 23:02:59.290778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass
32470 23:02:59.322926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32471 23:02:59.323329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32473 23:02:59.355262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32474 23:02:59.355725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32476 23:02:59.386997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32477 23:02:59.387484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32479 23:02:59.419312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32480 23:02:59.419814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32482 23:02:59.451255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32483 23:02:59.451749 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32485 23:02:59.485913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32487 23:02:59.486490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32488 23:02:59.518793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32489 23:02:59.519276 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32491 23:02:59.552266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32493 23:02:59.552858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32494 23:02:59.586606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32495 23:02:59.587073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32497 23:02:59.621116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32498 23:02:59.621591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32500 23:02:59.654011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32501 23:02:59.654540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32503 23:02:59.687230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32504 23:02:59.687659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32506 23:02:59.721618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32507 23:02:59.722200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32509 23:02:59.754605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32510 23:02:59.755049 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32512 23:02:59.786935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
32513 23:02:59.787447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
32515 23:02:59.819102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail>
32516 23:02:59.819574 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=fail
32518 23:02:59.851359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail>
32519 23:02:59.851836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail
32521 23:02:59.884150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=fail
32523 23:02:59.884715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=fail>
32524 23:02:59.916628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options RESULT=fail
32526 23:02:59.917209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options RESULT=fail>
32527 23:02:59.948183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass>
32528 23:02:59.948629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass
32530 23:02:59.979120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass>
32531 23:02:59.979577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass
32533 23:03:00.010560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=pass
32535 23:03:00.011102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=pass>
32536 23:03:00.041434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=pass>
32537 23:03:00.041885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=pass
32539 23:03:00.073103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=pass
32541 23:03:00.073654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=pass>
32542 23:03:00.104069 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl RESULT=pass
32544 23:03:00.104592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl RESULT=pass>
32545 23:03:00.136459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode RESULT=fail>
32546 23:03:00.136846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode RESULT=fail
32548 23:03:00.168418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode RESULT=fail>
32549 23:03:00.168868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode RESULT=fail
32551 23:03:00.199595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode RESULT=pass>
32552 23:03:00.200057 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode RESULT=pass
32554 23:03:00.253459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode RESULT=fail>
32555 23:03:00.253925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode RESULT=fail
32557 23:03:00.287528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion RESULT=fail>
32558 23:03:00.287977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion RESULT=fail
32560 23:03:00.323173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32561 23:03:00.323588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32563 23:03:00.359971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32565 23:03:00.360399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32566 23:03:00.391966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32568 23:03:00.392565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32569 23:03:00.423651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32570 23:03:00.424063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32572 23:03:00.455171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32573 23:03:00.455643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32575 23:03:00.486893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32577 23:03:00.487365 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32578 23:03:00.517665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32579 23:03:00.518119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32581 23:03:00.549208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32582 23:03:00.549681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32584 23:03:00.582461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32585 23:03:00.582944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32587 23:03:00.615773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32589 23:03:00.616330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32590 23:03:00.650541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32591 23:03:00.651014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32593 23:03:00.686338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32594 23:03:00.686784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32596 23:03:00.722350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32597 23:03:00.722745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32599 23:03:00.758324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32600 23:03:00.758764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32602 23:03:00.798283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32603 23:03:00.798672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32605 23:03:00.837845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32606 23:03:00.838347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32608 23:03:00.873280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32610 23:03:00.873865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32611 23:03:00.908265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32613 23:03:00.908887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32614 23:03:00.941920 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32615 23:03:00.942300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32617 23:03:00.976530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32619 23:03:00.976881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32620 23:03:01.010773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32621 23:03:01.011230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32623 23:03:01.045025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32624 23:03:01.045486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32626 23:03:01.079250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32627 23:03:01.079653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32629 23:03:01.113244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32630 23:03:01.113693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32632 23:03:01.147258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32633 23:03:01.147717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32635 23:03:01.181981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32636 23:03:01.182439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32638 23:03:01.216487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32639 23:03:01.216904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32641 23:03:01.249613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32642 23:03:01.250085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32644 23:03:01.282965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32646 23:03:01.283556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32647 23:03:01.317992 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32648 23:03:01.318409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32650 23:03:01.351133 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32652 23:03:01.351589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32653 23:03:01.383691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32654 23:03:01.384112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32656 23:03:01.417725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32657 23:03:01.418146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32659 23:03:01.450670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32660 23:03:01.451082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32662 23:03:01.482963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32663 23:03:01.483371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32665 23:03:01.516764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32666 23:03:01.517247 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32668 23:03:01.549021 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32669 23:03:01.549520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32671 23:03:01.581059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32672 23:03:01.581538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32674 23:03:01.612662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32675 23:03:01.613126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32677 23:03:01.644807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32678 23:03:01.645264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32680 23:03:01.676423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32681 23:03:01.676846 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32683 23:03:01.707948 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32685 23:03:01.708411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32686 23:03:01.741232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32688 23:03:01.741727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32689 23:03:01.774061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32690 23:03:01.774484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32692 23:03:01.805727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32693 23:03:01.806203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32695 23:03:01.837472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32696 23:03:01.837935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32698 23:03:01.870296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32699 23:03:01.870707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32701 23:03:01.903219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32702 23:03:01.903640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32704 23:03:01.936378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32705 23:03:01.936769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32707 23:03:01.968760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32708 23:03:01.969220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32710 23:03:02.001096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32711 23:03:02.001544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32713 23:03:02.032989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32714 23:03:02.033440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32716 23:03:02.065248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32717 23:03:02.065701 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32719 23:03:02.097187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32720 23:03:02.097625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32722 23:03:02.128943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32723 23:03:02.129392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32725 23:03:02.161161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32726 23:03:02.161602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32728 23:03:02.193204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
32729 23:03:02.193665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
32731 23:03:02.224927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
32732 23:03:02.225370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
32734 23:03:02.256731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
32735 23:03:02.257169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
32737 23:03:02.288908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
32738 23:03:02.289341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
32740 23:03:02.320803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
32742 23:03:02.321339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
32743 23:03:02.352424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
32744 23:03:02.352861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
32746 23:03:02.383279 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
32747 23:03:02.383659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
32749 23:03:02.414466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
32750 23:03:02.414853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
32752 23:03:02.445941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem RESULT=pass>
32753 23:03:02.446332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem RESULT=pass
32755 23:03:02.477133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=pass>
32756 23:03:02.477587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=pass
32758 23:03:02.508554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=pass>
32759 23:03:02.509006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=pass
32761 23:03:02.539436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=pass>
32762 23:03:02.539885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=pass
32764 23:03:02.570143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=pass>
32765 23:03:02.570590 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=pass
32767 23:03:02.601114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=pass
32769 23:03:02.601757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=pass>
32770 23:03:02.632382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=pass
32772 23:03:02.632926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=pass>
32773 23:03:02.663212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=pass
32775 23:03:02.663757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=pass>
32776 23:03:02.694511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=pass
32778 23:03:02.695049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=pass>
32779 23:03:02.726246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=pass>
32780 23:03:02.726715 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=pass
32782 23:03:02.757906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=pass
32784 23:03:02.758450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=pass>
32785 23:03:02.789681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=pass>
32786 23:03:02.790128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=pass
32788 23:03:02.822572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=pass>
32789 23:03:02.823051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=pass
32791 23:03:02.854428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=pass
32793 23:03:02.854978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=pass>
32794 23:03:02.885719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=pass
32796 23:03:02.886261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=pass>
32797 23:03:02.917171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=pass>
32798 23:03:02.917657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=pass
32800 23:03:02.949537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=pass>
32801 23:03:02.950010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=pass
32803 23:03:02.981190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=pass>
32804 23:03:02.981655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=pass
32806 23:03:03.013706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=pass
32808 23:03:03.014246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=pass>
32809 23:03:03.045528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest RESULT=pass>
32810 23:03:03.046003 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest RESULT=pass
32812 23:03:03.078955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=pass>
32813 23:03:03.079430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=pass
32815 23:03:03.111144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=pass
32817 23:03:03.111697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=pass>
32818 23:03:03.142899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=pass>
32819 23:03:03.143376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=pass
32821 23:03:03.174387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=pass>
32822 23:03:03.174836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=pass
32824 23:03:03.206059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=pass>
32825 23:03:03.206522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=pass
32827 23:03:03.239545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=pass
32829 23:03:03.240214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=pass>
32830 23:03:03.273116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=pass>
32831 23:03:03.273555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=pass
32833 23:03:03.307372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=pass
32835 23:03:03.307949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=pass>
32836 23:03:03.341511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=pass
32838 23:03:03.342108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=pass>
32839 23:03:03.374804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=pass>
32840 23:03:03.375216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=pass
32842 23:03:03.408307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=pass
32844 23:03:03.408776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=pass>
32845 23:03:03.442106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=pass>
32846 23:03:03.442524 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=pass
32848 23:03:03.476592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=pass>
32849 23:03:03.477031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=pass
32851 23:03:03.510188 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=pass
32853 23:03:03.510787 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=pass>
32854 23:03:03.543669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=pass>
32855 23:03:03.544128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=pass
32857 23:03:03.577795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=pass
32859 23:03:03.578350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=pass>
32860 23:03:03.610659 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=pass
32862 23:03:03.611283 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=pass>
32863 23:03:03.641977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=pass>
32864 23:03:03.642426 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=pass
32866 23:03:03.673910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest RESULT=pass>
32867 23:03:03.674358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest RESULT=pass
32869 23:03:03.705069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass>
32870 23:03:03.705479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass
32872 23:03:03.738837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=pass
32874 23:03:03.739385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=pass>
32875 23:03:03.770477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass
32877 23:03:03.770941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass>
32878 23:03:03.801912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass>
32879 23:03:03.802380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass
32881 23:03:03.834203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass>
32882 23:03:03.834667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass
32884 23:03:03.865813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass>
32885 23:03:03.866265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass
32887 23:03:03.897579 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass
32889 23:03:03.898129 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass>
32890 23:03:03.929338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=pass
32892 23:03:03.929891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=pass>
32893 23:03:03.961720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass
32895 23:03:03.962265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass>
32896 23:03:03.995089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=pass>
32897 23:03:03.995531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=pass
32899 23:03:04.027280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass>
32900 23:03:04.027720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass
32902 23:03:04.058525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=pass
32904 23:03:04.059060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=pass>
32905 23:03:04.090294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass>
32906 23:03:04.090747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass
32908 23:03:04.122480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=pass>
32909 23:03:04.122933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=pass
32911 23:03:04.153954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass>
32912 23:03:04.154405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass
32914 23:03:04.185078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=pass
32916 23:03:04.185693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=pass>
32917 23:03:04.216891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass>
32918 23:03:04.217368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass
32920 23:03:04.248464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=pass
32922 23:03:04.249019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=pass>
32923 23:03:04.279634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass
32925 23:03:04.280172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass>
32926 23:03:04.311048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=pass>
32927 23:03:04.311425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=pass
32929 23:03:04.343612 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass>
32930 23:03:04.344019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass
32932 23:03:04.376413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=pass>
32933 23:03:04.376853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=pass
32935 23:03:04.407629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass>
32936 23:03:04.408122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass
32938 23:03:04.439144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=pass
32940 23:03:04.439756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=pass>
32941 23:03:04.471359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass
32943 23:03:04.471986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass>
32944 23:03:04.503378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=pass>
32945 23:03:04.503838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=pass
32947 23:03:04.534935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass>
32948 23:03:04.535389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass
32950 23:03:04.565929 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip
32952 23:03:04.566515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip>
32953 23:03:04.596656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap RESULT=pass>
32954 23:03:04.597112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap RESULT=pass
32956 23:03:04.627628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass
32958 23:03:04.628161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass>
32959 23:03:04.658632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass>
32960 23:03:04.659039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass
32962 23:03:04.689657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass>
32963 23:03:04.690104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass
32965 23:03:04.721126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass
32967 23:03:04.721736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass>
32968 23:03:04.752647 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass>
32969 23:03:04.753101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass
32971 23:03:04.783726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass
32973 23:03:04.784278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass>
32974 23:03:04.814694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass>
32975 23:03:04.815160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass
32977 23:03:04.846722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace RESULT=pass>
32978 23:03:04.847213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace RESULT=pass
32980 23:03:04.879186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass>
32981 23:03:04.879674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass
32983 23:03:04.911146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256 RESULT=pass>
32984 23:03:04.911637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256 RESULT=pass
32986 23:03:04.943288 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass
32988 23:03:04.943911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass>
32989 23:03:04.974622 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM RESULT=pass
32991 23:03:04.975260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM RESULT=pass>
32992 23:03:05.005673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA RESULT=pass
32994 23:03:05.006293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA RESULT=pass>
32995 23:03:05.037030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass
32997 23:03:05.037667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass>
32998 23:03:05.068652 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM RESULT=pass
33000 23:03:05.069280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM RESULT=pass>
33001 23:03:05.100746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA RESULT=pass
33003 23:03:05.101372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA RESULT=pass>
33004 23:03:05.134677 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass
33006 23:03:05.135251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass>
33007 23:03:05.166743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM RESULT=pass
33009 23:03:05.167284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM RESULT=pass>
33010 23:03:05.197879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA RESULT=pass>
33011 23:03:05.198315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA RESULT=pass
33013 23:03:05.229158 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass>
33014 23:03:05.229602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass
33016 23:03:05.260482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM RESULT=pass
33018 23:03:05.261020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM RESULT=pass>
33019 23:03:05.291446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA RESULT=pass
33021 23:03:05.291922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA RESULT=pass>
33022 23:03:05.323358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass
33024 23:03:05.323822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass>
33025 23:03:05.376183 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM RESULT=pass
33027 23:03:05.376729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM RESULT=pass>
33028 23:03:05.407688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA RESULT=pass>
33029 23:03:05.408111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA RESULT=pass
33031 23:03:05.439101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240 RESULT=pass>
33032 23:03:05.439512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240 RESULT=pass
33034 23:03:05.470902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass>
33035 23:03:05.471341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass
33037 23:03:05.502377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM RESULT=pass>
33038 23:03:05.502785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM RESULT=pass
33040 23:03:05.534963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA RESULT=pass>
33041 23:03:05.535382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA RESULT=pass
33043 23:03:05.566405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass>
33044 23:03:05.566850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass
33046 23:03:05.599591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM RESULT=pass
33048 23:03:05.600162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM RESULT=pass>
33049 23:03:05.633736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA RESULT=pass>
33050 23:03:05.634190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA RESULT=pass
33052 23:03:05.668312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass>
33053 23:03:05.668742 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass
33055 23:03:05.701703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM RESULT=pass>
33056 23:03:05.702105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM RESULT=pass
33058 23:03:05.735504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA RESULT=pass>
33059 23:03:05.735899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA RESULT=pass
33061 23:03:05.769632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass
33063 23:03:05.770138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass>
33064 23:03:05.803552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM RESULT=pass>
33065 23:03:05.804026 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM RESULT=pass
33067 23:03:05.838131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA RESULT=pass
33069 23:03:05.838699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA RESULT=pass>
33070 23:03:05.872718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass>
33071 23:03:05.873154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass
33073 23:03:05.908166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM RESULT=pass
33075 23:03:05.908745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM RESULT=pass>
33076 23:03:05.944109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA RESULT=pass
33078 23:03:05.944571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA RESULT=pass>
33079 23:03:05.980972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224 RESULT=pass>
33080 23:03:05.981397 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224 RESULT=pass
33082 23:03:06.017704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass>
33083 23:03:06.018088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass
33085 23:03:06.051513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM RESULT=pass>
33086 23:03:06.052001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM RESULT=pass
33088 23:03:06.085027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA RESULT=pass>
33089 23:03:06.085501 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA RESULT=pass
33091 23:03:06.118122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass>
33092 23:03:06.118609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass
33094 23:03:06.151576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM RESULT=pass>
33095 23:03:06.152048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM RESULT=pass
33097 23:03:06.185478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA RESULT=pass>
33098 23:03:06.185942 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA RESULT=pass
33100 23:03:06.220165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass
33102 23:03:06.220705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass>
33103 23:03:06.253932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM RESULT=pass
33105 23:03:06.254475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM RESULT=pass>
33106 23:03:06.286172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA RESULT=pass>
33107 23:03:06.286602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA RESULT=pass
33109 23:03:06.317613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass>
33110 23:03:06.318056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass
33112 23:03:06.349249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM RESULT=pass>
33113 23:03:06.349690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM RESULT=pass
33115 23:03:06.380873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA RESULT=pass>
33116 23:03:06.381304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA RESULT=pass
33118 23:03:06.412141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass
33120 23:03:06.412671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass>
33121 23:03:06.444294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM RESULT=pass>
33122 23:03:06.444691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM RESULT=pass
33124 23:03:06.476818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA RESULT=pass>
33125 23:03:06.477250 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA RESULT=pass
33127 23:03:06.508766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208 RESULT=pass>
33128 23:03:06.509186 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208 RESULT=pass
33130 23:03:06.540588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass>
33131 23:03:06.540940 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass
33133 23:03:06.572400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM RESULT=pass>
33134 23:03:06.572868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM RESULT=pass
33136 23:03:06.604675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA RESULT=pass>
33137 23:03:06.605142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA RESULT=pass
33139 23:03:06.636602 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass>
33140 23:03:06.637058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass
33142 23:03:06.668637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM RESULT=pass
33144 23:03:06.669181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM RESULT=pass>
33145 23:03:06.700043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA RESULT=pass
33147 23:03:06.700582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA RESULT=pass>
33148 23:03:06.731432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass>
33149 23:03:06.731858 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass
33151 23:03:06.763764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM RESULT=pass>
33152 23:03:06.764199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM RESULT=pass
33154 23:03:06.797208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA RESULT=pass>
33155 23:03:06.797700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA RESULT=pass
33157 23:03:06.831475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass>
33158 23:03:06.831955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass
33160 23:03:06.864371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM RESULT=pass
33162 23:03:06.864929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM RESULT=pass>
33163 23:03:06.911664 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA RESULT=pass
33165 23:03:06.912230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA RESULT=pass>
33166 23:03:06.946940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass>
33167 23:03:06.947356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass
33169 23:03:06.981081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM RESULT=pass
33171 23:03:06.981516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM RESULT=pass>
33172 23:03:07.013020 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA RESULT=pass>
33173 23:03:07.013412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA RESULT=pass
33175 23:03:07.044648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192 RESULT=pass>
33176 23:03:07.045048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192 RESULT=pass
33178 23:03:07.076382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass>
33179 23:03:07.076789 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass
33181 23:03:07.108558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM RESULT=pass
33183 23:03:07.108996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM RESULT=pass>
33184 23:03:07.140311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA RESULT=pass>
33185 23:03:07.140711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA RESULT=pass
33187 23:03:07.172256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass
33189 23:03:07.172687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass>
33190 23:03:07.204573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM RESULT=pass>
33191 23:03:07.204965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM RESULT=pass
33193 23:03:07.236791 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA RESULT=pass
33195 23:03:07.237226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA RESULT=pass>
33196 23:03:07.268802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass>
33197 23:03:07.269245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass
33199 23:03:07.300803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM RESULT=pass
33201 23:03:07.301353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM RESULT=pass>
33202 23:03:07.331984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA RESULT=pass
33204 23:03:07.332557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA RESULT=pass>
33205 23:03:07.363120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass
33207 23:03:07.363676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass>
33208 23:03:07.394137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM RESULT=pass
33210 23:03:07.394701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM RESULT=pass>
33211 23:03:07.425723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA RESULT=pass
33213 23:03:07.426275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA RESULT=pass>
33214 23:03:07.457402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass
33216 23:03:07.457954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass>
33217 23:03:07.489544 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM RESULT=pass>
33218 23:03:07.490002 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM RESULT=pass
33220 23:03:07.521621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA RESULT=pass
33222 23:03:07.522177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA RESULT=pass>
33223 23:03:07.553345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176 RESULT=pass>
33224 23:03:07.553811 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176 RESULT=pass
33226 23:03:07.585511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass>
33227 23:03:07.585992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass
33229 23:03:07.617627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM RESULT=pass
33231 23:03:07.618188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM RESULT=pass>
33232 23:03:07.649636 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA RESULT=pass
33234 23:03:07.650188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA RESULT=pass>
33235 23:03:07.681207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass
33237 23:03:07.681758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass>
33238 23:03:07.713022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM RESULT=pass
33240 23:03:07.713562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM RESULT=pass>
33241 23:03:07.744416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA RESULT=pass
33243 23:03:07.744951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA RESULT=pass>
33244 23:03:07.775690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass>
33245 23:03:07.776128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass
33247 23:03:07.807286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM RESULT=pass>
33248 23:03:07.807744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM RESULT=pass
33250 23:03:07.838828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA RESULT=pass>
33251 23:03:07.839295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA RESULT=pass
33253 23:03:07.870101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass>
33254 23:03:07.870498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass
33256 23:03:07.901386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM RESULT=pass>
33257 23:03:07.901828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM RESULT=pass
33259 23:03:07.933128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA RESULT=pass
33261 23:03:07.933683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA RESULT=pass>
33262 23:03:07.964582 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass
33264 23:03:07.965099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass>
33265 23:03:07.996900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM RESULT=pass>
33266 23:03:07.997338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM RESULT=pass
33268 23:03:08.028677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA RESULT=pass>
33269 23:03:08.029115 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA RESULT=pass
33271 23:03:08.060055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160 RESULT=pass
33273 23:03:08.060648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160 RESULT=pass>
33274 23:03:08.091141 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass>
33275 23:03:08.091566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass
33277 23:03:08.122869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM RESULT=pass>
33278 23:03:08.123305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM RESULT=pass
33280 23:03:08.153632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA RESULT=pass>
33281 23:03:08.154078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA RESULT=pass
33283 23:03:08.184959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass>
33284 23:03:08.185418 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass
33286 23:03:08.216608 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM RESULT=pass
33288 23:03:08.217159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM RESULT=pass>
33289 23:03:08.248711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA RESULT=pass>
33290 23:03:08.249117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA RESULT=pass
33292 23:03:08.282139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass>
33293 23:03:08.282569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass
33295 23:03:08.315208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM RESULT=pass>
33296 23:03:08.315617 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM RESULT=pass
33298 23:03:08.347462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA RESULT=pass>
33299 23:03:08.347853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA RESULT=pass
33301 23:03:08.379167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass
33303 23:03:08.379584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass>
33304 23:03:08.410591 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM RESULT=pass
33306 23:03:08.411018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM RESULT=pass>
33307 23:03:08.441662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA RESULT=pass
33309 23:03:08.442098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA RESULT=pass>
33310 23:03:08.473002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass>
33311 23:03:08.473445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass
33313 23:03:08.505372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM RESULT=pass
33315 23:03:08.506009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM RESULT=pass>
33316 23:03:08.536886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA RESULT=pass>
33317 23:03:08.537330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA RESULT=pass
33319 23:03:08.567780 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144 RESULT=pass
33321 23:03:08.568319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144 RESULT=pass>
33322 23:03:08.598247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass>
33323 23:03:08.598681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass
33325 23:03:08.629169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM RESULT=pass>
33326 23:03:08.629578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM RESULT=pass
33328 23:03:08.661027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA RESULT=pass>
33329 23:03:08.661452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA RESULT=pass
33331 23:03:08.692469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass>
33332 23:03:08.692863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass
33334 23:03:08.723262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM RESULT=pass>
33335 23:03:08.723703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM RESULT=pass
33337 23:03:08.754393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA RESULT=pass>
33338 23:03:08.754840 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA RESULT=pass
33340 23:03:08.785831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass>
33341 23:03:08.786262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass
33343 23:03:08.817595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM RESULT=pass>
33344 23:03:08.818036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM RESULT=pass
33346 23:03:08.849450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA RESULT=pass>
33347 23:03:08.849916 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA RESULT=pass
33349 23:03:08.881234 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass>
33350 23:03:08.881700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass
33352 23:03:08.913246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM RESULT=pass
33354 23:03:08.913826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM RESULT=pass>
33355 23:03:08.944947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA RESULT=pass>
33356 23:03:08.945405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA RESULT=pass
33358 23:03:08.977049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass>
33359 23:03:08.977500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass
33361 23:03:09.009453 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM RESULT=pass>
33362 23:03:09.009917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM RESULT=pass
33364 23:03:09.040922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA RESULT=pass>
33365 23:03:09.041388 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA RESULT=pass
33367 23:03:09.071771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128 RESULT=pass>
33368 23:03:09.072214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128 RESULT=pass
33370 23:03:09.102880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass>
33371 23:03:09.103319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass
33373 23:03:09.134260 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM RESULT=pass>
33374 23:03:09.134694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM RESULT=pass
33376 23:03:09.165784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA RESULT=pass
33378 23:03:09.166342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA RESULT=pass>
33379 23:03:09.197456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass>
33380 23:03:09.197854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass
33382 23:03:09.229706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM RESULT=pass>
33383 23:03:09.230162 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM RESULT=pass
33385 23:03:09.262223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA RESULT=pass>
33386 23:03:09.262654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA RESULT=pass
33388 23:03:09.296739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass>
33389 23:03:09.297211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass
33391 23:03:09.330092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM RESULT=pass>
33392 23:03:09.330512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM RESULT=pass
33394 23:03:09.362329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA RESULT=pass>
33395 23:03:09.362784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA RESULT=pass
33397 23:03:09.394110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass>
33398 23:03:09.394550 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass
33400 23:03:09.425085 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM RESULT=pass>
33401 23:03:09.425503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM RESULT=pass
33403 23:03:09.455438 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA RESULT=pass>
33404 23:03:09.455969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA RESULT=pass
33406 23:03:09.486507 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass
33408 23:03:09.487063 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass>
33409 23:03:09.518055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM RESULT=pass>
33410 23:03:09.518504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM RESULT=pass
33412 23:03:09.549341 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA RESULT=pass
33414 23:03:09.549910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA RESULT=pass>
33415 23:03:09.580422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112 RESULT=pass>
33416 23:03:09.580893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112 RESULT=pass
33418 23:03:09.611122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass
33420 23:03:09.611710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass>
33421 23:03:09.642040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM RESULT=pass
33423 23:03:09.642579 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM RESULT=pass>
33424 23:03:09.674276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA RESULT=pass>
33425 23:03:09.674744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA RESULT=pass
33427 23:03:09.705566 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass
33429 23:03:09.706139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass>
33430 23:03:09.736854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM RESULT=pass>
33431 23:03:09.737342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM RESULT=pass
33433 23:03:09.768599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA RESULT=pass>
33434 23:03:09.769060 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA RESULT=pass
33436 23:03:09.799253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass
33438 23:03:09.799705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass>
33439 23:03:09.830090 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM RESULT=pass>
33440 23:03:09.830560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM RESULT=pass
33442 23:03:09.861299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA RESULT=pass>
33443 23:03:09.861771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA RESULT=pass
33445 23:03:09.892953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass
33447 23:03:09.893510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass>
33448 23:03:09.924708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM RESULT=pass
33450 23:03:09.925336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM RESULT=pass>
33451 23:03:09.955946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA RESULT=pass
33453 23:03:09.956613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA RESULT=pass>
33454 23:03:09.987061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass
33456 23:03:09.987594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass>
33457 23:03:10.018412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM RESULT=pass>
33458 23:03:10.018899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM RESULT=pass
33460 23:03:10.049292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA RESULT=pass
33462 23:03:10.049767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA RESULT=pass>
33463 23:03:10.079445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96 RESULT=pass>
33464 23:03:10.079851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96 RESULT=pass
33466 23:03:10.110748 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass
33468 23:03:10.111202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass>
33469 23:03:10.141974 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM RESULT=pass>
33470 23:03:10.142414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM RESULT=pass
33472 23:03:10.173404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA RESULT=pass
33474 23:03:10.173959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA RESULT=pass>
33475 23:03:10.205030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass
33477 23:03:10.205572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass>
33478 23:03:10.236512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM RESULT=pass>
33479 23:03:10.236950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM RESULT=pass
33481 23:03:10.267651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA RESULT=pass
33483 23:03:10.268108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA RESULT=pass>
33484 23:03:10.299345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass>
33485 23:03:10.299817 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass
33487 23:03:10.330750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM RESULT=pass>
33488 23:03:10.331221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM RESULT=pass
33490 23:03:10.362024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA RESULT=pass>
33491 23:03:10.362569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA RESULT=pass
33493 23:03:10.395208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass>
33494 23:03:10.395674 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass
33496 23:03:10.426935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM RESULT=pass
33498 23:03:10.427490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM RESULT=pass>
33499 23:03:10.458150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA RESULT=pass
33501 23:03:10.458606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA RESULT=pass>
33502 23:03:10.514876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass
33504 23:03:10.515382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass>
33505 23:03:10.549813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM RESULT=pass>
33506 23:03:10.550174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM RESULT=pass
33508 23:03:10.584340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA RESULT=pass
33510 23:03:10.584831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA RESULT=pass>
33511 23:03:10.618681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80 RESULT=pass
33513 23:03:10.619122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80 RESULT=pass>
33514 23:03:10.651172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass>
33515 23:03:10.651603 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass
33517 23:03:10.683795 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM RESULT=pass>
33518 23:03:10.684215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM RESULT=pass
33520 23:03:10.716847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA RESULT=pass
33522 23:03:10.717299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA RESULT=pass>
33523 23:03:10.749151 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass>
33524 23:03:10.749618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass
33526 23:03:10.782070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM RESULT=pass
33528 23:03:10.782622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM RESULT=pass>
33529 23:03:10.814647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA RESULT=pass
33531 23:03:10.815146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA RESULT=pass>
33532 23:03:10.850211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass
33534 23:03:10.850559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass>
33535 23:03:10.881557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM RESULT=pass>
33536 23:03:10.881954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM RESULT=pass
33538 23:03:10.914143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA RESULT=pass>
33539 23:03:10.914587 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA RESULT=pass
33541 23:03:10.946802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass>
33542 23:03:10.947173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass
33544 23:03:10.978740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM RESULT=pass>
33545 23:03:10.979151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM RESULT=pass
33547 23:03:11.010364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA RESULT=pass
33549 23:03:11.010822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA RESULT=pass>
33550 23:03:11.042213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass
33552 23:03:11.042780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass>
33553 23:03:11.074423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM RESULT=pass>
33554 23:03:11.074880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM RESULT=pass
33556 23:03:11.106137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA RESULT=pass
33558 23:03:11.106574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA RESULT=pass>
33559 23:03:11.137634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64 RESULT=pass
33561 23:03:11.138190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64 RESULT=pass>
33562 23:03:11.169192 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass
33564 23:03:11.169760 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass>
33565 23:03:11.200775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM RESULT=pass>
33566 23:03:11.201223 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM RESULT=pass
33568 23:03:11.232954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA RESULT=pass>
33569 23:03:11.233437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA RESULT=pass
33571 23:03:11.265023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass>
33572 23:03:11.265437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass
33574 23:03:11.296487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM RESULT=pass>
33575 23:03:11.296890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM RESULT=pass
33577 23:03:11.328009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA RESULT=pass
33579 23:03:11.328463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA RESULT=pass>
33580 23:03:11.360711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass>
33581 23:03:11.361114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass
33583 23:03:11.392307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM RESULT=pass>
33584 23:03:11.392705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM RESULT=pass
33586 23:03:11.423562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA RESULT=pass>
33587 23:03:11.423960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA RESULT=pass
33589 23:03:11.454712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass>
33590 23:03:11.455184 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass
33592 23:03:11.485956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM RESULT=pass>
33593 23:03:11.486402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM RESULT=pass
33595 23:03:11.517131 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA RESULT=pass>
33596 23:03:11.517573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA RESULT=pass
33598 23:03:11.548062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass
33600 23:03:11.548578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass>
33601 23:03:11.579697 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM RESULT=pass>
33602 23:03:11.580132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM RESULT=pass
33604 23:03:11.611012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA RESULT=pass>
33605 23:03:11.611447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA RESULT=pass
33607 23:03:11.642821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48 RESULT=pass>
33608 23:03:11.643257 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48 RESULT=pass
33610 23:03:11.674251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass>
33611 23:03:11.674725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass
33613 23:03:11.705444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM RESULT=pass>
33614 23:03:11.705891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM RESULT=pass
33616 23:03:11.737387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA RESULT=pass>
33617 23:03:11.737827 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA RESULT=pass
33619 23:03:11.769372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass>
33620 23:03:11.769933 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass
33622 23:03:11.800981 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM RESULT=pass>
33623 23:03:11.801425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM RESULT=pass
33625 23:03:11.832691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA RESULT=pass>
33626 23:03:11.833168 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA RESULT=pass
33628 23:03:11.864401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass>
33629 23:03:11.864883 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass
33631 23:03:11.896249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM RESULT=pass
33633 23:03:11.896810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM RESULT=pass>
33634 23:03:11.928931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA RESULT=pass>
33635 23:03:11.929327 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA RESULT=pass
33637 23:03:11.960367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass
33639 23:03:11.960905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass>
33640 23:03:11.991104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM RESULT=pass>
33641 23:03:11.991526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM RESULT=pass
33643 23:03:12.021845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA RESULT=pass>
33644 23:03:12.022282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA RESULT=pass
33646 23:03:12.053193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass>
33647 23:03:12.053640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass
33649 23:03:12.085197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM RESULT=pass>
33650 23:03:12.085672 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM RESULT=pass
33652 23:03:12.116811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA RESULT=pass>
33653 23:03:12.117253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA RESULT=pass
33655 23:03:12.147873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32 RESULT=pass
33657 23:03:12.148454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32 RESULT=pass>
33658 23:03:12.179108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass
33660 23:03:12.179657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass>
33661 23:03:12.210431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM RESULT=pass>
33662 23:03:12.210892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM RESULT=pass
33664 23:03:12.242335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA RESULT=pass>
33665 23:03:12.242798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA RESULT=pass
33667 23:03:12.273823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass>
33668 23:03:12.274271 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass
33670 23:03:12.306135 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM RESULT=pass
33672 23:03:12.306675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM RESULT=pass>
33673 23:03:12.338287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA RESULT=pass>
33674 23:03:12.338722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA RESULT=pass
33676 23:03:12.370322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass>
33677 23:03:12.370818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass
33679 23:03:12.401717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM RESULT=pass
33681 23:03:12.402193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM RESULT=pass>
33682 23:03:12.432761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA RESULT=pass>
33683 23:03:12.433198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA RESULT=pass
33685 23:03:12.464557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass>
33686 23:03:12.465039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass
33688 23:03:12.495615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM RESULT=pass>
33689 23:03:12.496096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM RESULT=pass
33691 23:03:12.527383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA RESULT=pass
33693 23:03:12.527855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA RESULT=pass>
33694 23:03:12.559216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass
33696 23:03:12.559684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass>
33697 23:03:12.591227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM RESULT=pass
33699 23:03:12.591780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM RESULT=pass>
33700 23:03:12.622429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA RESULT=pass>
33701 23:03:12.622837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA RESULT=pass
33703 23:03:12.653461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16 RESULT=pass
33705 23:03:12.653941 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16 RESULT=pass>
33706 23:03:12.684813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass
33708 23:03:12.685222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass>
33709 23:03:12.715728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM RESULT=pass>
33710 23:03:12.716093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM RESULT=pass
33712 23:03:12.747282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA RESULT=pass
33714 23:03:12.747823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA RESULT=pass>
33715 23:03:12.778428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass>
33716 23:03:12.778835 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass
33718 23:03:12.809871 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM RESULT=pass
33720 23:03:12.810435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM RESULT=pass>
33721 23:03:12.842315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA RESULT=pass
33723 23:03:12.842919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA RESULT=pass>
33724 23:03:12.874604 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass>
33725 23:03:12.875046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass
33727 23:03:12.906539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM RESULT=pass
33729 23:03:12.907084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM RESULT=pass>
33730 23:03:12.938206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA RESULT=pass
33732 23:03:12.938742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA RESULT=pass>
33733 23:03:12.971359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass
33735 23:03:12.971933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass>
33736 23:03:13.003304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM RESULT=pass>
33737 23:03:13.003724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM RESULT=pass
33739 23:03:13.034999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA RESULT=pass
33741 23:03:13.035538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA RESULT=pass>
33742 23:03:13.066101 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass
33744 23:03:13.066696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass>
33745 23:03:13.098299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM RESULT=pass>
33746 23:03:13.098738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM RESULT=pass
33748 23:03:13.129491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA RESULT=pass>
33749 23:03:13.129979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA RESULT=pass
33751 23:03:13.161073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass
33753 23:03:13.161608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass>
33754 23:03:13.192570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256 RESULT=pass
33756 23:03:13.193161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256 RESULT=pass>
33757 23:03:13.223210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass>
33758 23:03:13.223684 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA RESULT=pass
33760 23:03:13.254352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM RESULT=pass
33762 23:03:13.254924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM RESULT=pass>
33763 23:03:13.285753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA RESULT=pass>
33764 23:03:13.286208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA RESULT=pass
33766 23:03:13.317578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass>
33767 23:03:13.318043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA RESULT=pass
33769 23:03:13.349724 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM RESULT=pass>
33770 23:03:13.350190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM RESULT=pass
33772 23:03:13.382072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA RESULT=pass
33774 23:03:13.382617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA RESULT=pass>
33775 23:03:13.413057 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass>
33776 23:03:13.413457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA RESULT=pass
33778 23:03:13.445094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM RESULT=pass>
33779 23:03:13.445523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM RESULT=pass
33781 23:03:13.476465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA RESULT=pass>
33782 23:03:13.476864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA RESULT=pass
33784 23:03:13.507338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass>
33785 23:03:13.507728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA RESULT=pass
33787 23:03:13.537904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM RESULT=pass>
33788 23:03:13.538303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM RESULT=pass
33790 23:03:13.569064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA RESULT=pass>
33791 23:03:13.569480 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA RESULT=pass
33793 23:03:13.601562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass>
33794 23:03:13.602007 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA RESULT=pass
33796 23:03:13.633235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM RESULT=pass>
33797 23:03:13.633670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM RESULT=pass
33799 23:03:13.664851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA RESULT=pass>
33800 23:03:13.665274 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA RESULT=pass
33802 23:03:13.695892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240 RESULT=pass
33804 23:03:13.696430 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240 RESULT=pass>
33805 23:03:13.727306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass>
33806 23:03:13.727732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA RESULT=pass
33808 23:03:13.759127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM RESULT=pass
33810 23:03:13.759649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM RESULT=pass>
33811 23:03:13.791105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA RESULT=pass
33813 23:03:13.791750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA RESULT=pass>
33814 23:03:13.822765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass>
33815 23:03:13.823218 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA RESULT=pass
33817 23:03:13.853589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM RESULT=pass>
33818 23:03:13.854083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM RESULT=pass
33820 23:03:13.886180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA RESULT=pass>
33821 23:03:13.886632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA RESULT=pass
33823 23:03:13.917719 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass
33825 23:03:13.918315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA RESULT=pass>
33826 23:03:13.949191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM RESULT=pass
33828 23:03:13.949742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM RESULT=pass>
33829 23:03:13.980333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA RESULT=pass
33831 23:03:13.980867 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA RESULT=pass>
33832 23:03:14.011390 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass>
33833 23:03:14.011856 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA RESULT=pass
33835 23:03:14.042381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM RESULT=pass>
33836 23:03:14.042831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM RESULT=pass
33838 23:03:14.073080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA RESULT=pass
33840 23:03:14.073707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA RESULT=pass>
33841 23:03:14.105429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass>
33842 23:03:14.105903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA RESULT=pass
33844 23:03:14.136079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM RESULT=pass
33846 23:03:14.136623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM RESULT=pass>
33847 23:03:14.166892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA RESULT=pass
33849 23:03:14.167432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA RESULT=pass>
33850 23:03:14.198389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224 RESULT=pass>
33851 23:03:14.198832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224 RESULT=pass
33853 23:03:14.229585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass>
33854 23:03:14.230001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA RESULT=pass
33856 23:03:14.261108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM RESULT=pass
33858 23:03:14.261738 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM RESULT=pass>
33859 23:03:14.292807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA RESULT=pass>
33860 23:03:14.293245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA RESULT=pass
33862 23:03:14.327077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass
33864 23:03:14.327537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA RESULT=pass>
33865 23:03:14.359598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM RESULT=pass>
33866 23:03:14.360175 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM RESULT=pass
33868 23:03:14.391601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA RESULT=pass>
33869 23:03:14.392025 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA RESULT=pass
33871 23:03:14.423346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass
33873 23:03:14.423802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA RESULT=pass>
33874 23:03:14.454781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM RESULT=pass>
33875 23:03:14.455201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM RESULT=pass
33877 23:03:14.485722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA RESULT=pass
33879 23:03:14.486344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA RESULT=pass>
33880 23:03:14.516892 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass
33882 23:03:14.517510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA RESULT=pass>
33883 23:03:14.548865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM RESULT=pass>
33884 23:03:14.549332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM RESULT=pass
33886 23:03:14.581050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA RESULT=pass
33888 23:03:14.581685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA RESULT=pass>
33889 23:03:14.613544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass
33891 23:03:14.614117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA RESULT=pass>
33892 23:03:14.644908 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM RESULT=pass>
33893 23:03:14.645399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM RESULT=pass
33895 23:03:14.676644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA RESULT=pass>
33896 23:03:14.677070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA RESULT=pass
33898 23:03:14.708680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208 RESULT=pass
33900 23:03:14.709127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208 RESULT=pass>
33901 23:03:14.740561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass
33903 23:03:14.741032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA RESULT=pass>
33904 23:03:14.772880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM RESULT=pass
33906 23:03:14.773349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM RESULT=pass>
33907 23:03:14.804792 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA RESULT=pass
33909 23:03:14.805250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA RESULT=pass>
33910 23:03:14.835700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass>
33911 23:03:14.836108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA RESULT=pass
33913 23:03:14.866831 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM RESULT=pass>
33914 23:03:14.867297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM RESULT=pass
33916 23:03:14.897789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA RESULT=pass>
33917 23:03:14.898231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA RESULT=pass
33919 23:03:14.929551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass>
33920 23:03:14.930022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA RESULT=pass
33922 23:03:14.961310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM RESULT=pass
33924 23:03:14.961902 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM RESULT=pass>
33925 23:03:14.992565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA RESULT=pass
33927 23:03:14.993119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA RESULT=pass>
33928 23:03:15.022894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass>
33929 23:03:15.023351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA RESULT=pass
33931 23:03:15.054008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM RESULT=pass
33933 23:03:15.054642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM RESULT=pass>
33934 23:03:15.084966 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA RESULT=pass>
33935 23:03:15.085440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA RESULT=pass
33937 23:03:15.117207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass>
33938 23:03:15.117681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA RESULT=pass
33940 23:03:15.148500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM RESULT=pass
33942 23:03:15.149073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM RESULT=pass>
33943 23:03:15.178594 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA RESULT=pass>
33944 23:03:15.179030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA RESULT=pass
33946 23:03:15.209619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192 RESULT=pass>
33947 23:03:15.210033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192 RESULT=pass
33949 23:03:15.240500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass>
33950 23:03:15.240894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA RESULT=pass
33952 23:03:15.270949 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM RESULT=pass>
33953 23:03:15.271409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM RESULT=pass
33955 23:03:15.301673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA RESULT=pass>
33956 23:03:15.302141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA RESULT=pass
33958 23:03:15.332693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass>
33959 23:03:15.333121 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA RESULT=pass
33961 23:03:15.363394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM RESULT=pass>
33962 23:03:15.363867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM RESULT=pass
33964 23:03:15.394600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA RESULT=pass>
33965 23:03:15.395053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA RESULT=pass
33967 23:03:15.425504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass>
33968 23:03:15.425960 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA RESULT=pass
33970 23:03:15.456130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM RESULT=pass
33972 23:03:15.456661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM RESULT=pass>
33973 23:03:15.486942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA RESULT=pass>
33974 23:03:15.487382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA RESULT=pass
33976 23:03:15.518053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass>
33977 23:03:15.518537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA RESULT=pass
33979 23:03:15.548905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM RESULT=pass>
33980 23:03:15.549391 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM RESULT=pass
33982 23:03:15.584942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA RESULT=pass>
33983 23:03:15.585413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA RESULT=pass
33985 23:03:15.634342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass
33987 23:03:15.634939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA RESULT=pass>
33988 23:03:15.666803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM RESULT=pass
33990 23:03:15.667358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM RESULT=pass>
33991 23:03:15.699962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA RESULT=pass
33993 23:03:15.700608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA RESULT=pass>
33994 23:03:15.733631 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176 RESULT=pass
33996 23:03:15.734204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176 RESULT=pass>
33997 23:03:15.767707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass
33999 23:03:15.768287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA RESULT=pass>
34000 23:03:15.802530 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM RESULT=pass
34002 23:03:15.803088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM RESULT=pass>
34003 23:03:15.839078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA RESULT=pass
34005 23:03:15.839638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA RESULT=pass>
34006 23:03:15.872116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass>
34007 23:03:15.872588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA RESULT=pass
34009 23:03:15.903236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM RESULT=pass>
34010 23:03:15.903698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM RESULT=pass
34012 23:03:15.934498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA RESULT=pass>
34013 23:03:15.934986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA RESULT=pass
34015 23:03:15.965575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass
34017 23:03:15.966053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA RESULT=pass>
34018 23:03:15.996696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM RESULT=pass>
34019 23:03:15.997150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM RESULT=pass
34021 23:03:16.028310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA RESULT=pass
34023 23:03:16.028859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA RESULT=pass>
34024 23:03:16.059167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass
34026 23:03:16.059712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA RESULT=pass>
34027 23:03:16.090191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM RESULT=pass>
34028 23:03:16.090656 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM RESULT=pass
34030 23:03:16.121578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA RESULT=pass>
34031 23:03:16.122043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA RESULT=pass
34033 23:03:16.153858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass>
34034 23:03:16.154315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA RESULT=pass
34036 23:03:16.185167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM RESULT=pass>
34037 23:03:16.185624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM RESULT=pass
34039 23:03:16.216885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA RESULT=pass
34041 23:03:16.217474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA RESULT=pass>
34042 23:03:16.247767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160 RESULT=pass>
34043 23:03:16.248227 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160 RESULT=pass
34045 23:03:16.278983 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass>
34046 23:03:16.279425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA RESULT=pass
34048 23:03:16.309722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM RESULT=pass>
34049 23:03:16.310167 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM RESULT=pass
34051 23:03:16.340980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA RESULT=pass>
34052 23:03:16.341419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA RESULT=pass
34054 23:03:16.372337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass>
34055 23:03:16.372795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA RESULT=pass
34057 23:03:16.403752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM RESULT=pass
34059 23:03:16.404213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM RESULT=pass>
34060 23:03:16.435866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA RESULT=pass
34062 23:03:16.436424 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA RESULT=pass>
34063 23:03:16.467254 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass
34065 23:03:16.467700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA RESULT=pass>
34066 23:03:16.498807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM RESULT=pass>
34067 23:03:16.499253 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM RESULT=pass
34069 23:03:16.530541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA RESULT=pass
34071 23:03:16.531084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA RESULT=pass>
34072 23:03:16.561911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass>
34073 23:03:16.562366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA RESULT=pass
34075 23:03:16.593692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM RESULT=pass>
34076 23:03:16.594156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM RESULT=pass
34078 23:03:16.625377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA RESULT=pass>
34079 23:03:16.625826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA RESULT=pass
34081 23:03:16.657632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass>
34082 23:03:16.658067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA RESULT=pass
34084 23:03:16.691159 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM RESULT=pass
34086 23:03:16.691625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM RESULT=pass>
34087 23:03:16.726067 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA RESULT=pass>
34088 23:03:16.726538 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA RESULT=pass
34090 23:03:16.757967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144 RESULT=pass>
34091 23:03:16.758457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144 RESULT=pass
34093 23:03:16.793145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass>
34094 23:03:16.793612 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA RESULT=pass
34096 23:03:16.826464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM RESULT=pass>
34097 23:03:16.826893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM RESULT=pass
34099 23:03:16.861091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA RESULT=pass>
34100 23:03:16.861508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA RESULT=pass
34102 23:03:16.893633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass>
34103 23:03:16.894018 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA RESULT=pass
34105 23:03:16.926370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM RESULT=pass>
34106 23:03:16.926784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM RESULT=pass
34108 23:03:16.958717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA RESULT=pass>
34109 23:03:16.959092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA RESULT=pass
34111 23:03:16.991324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass
34113 23:03:16.991699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA RESULT=pass>
34114 23:03:17.022881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM RESULT=pass>
34115 23:03:17.023245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM RESULT=pass
34117 23:03:17.056005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA RESULT=pass
34119 23:03:17.056470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA RESULT=pass>
34120 23:03:17.087531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass
34122 23:03:17.088005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA RESULT=pass>
34123 23:03:17.118981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM RESULT=pass
34125 23:03:17.119439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM RESULT=pass>
34126 23:03:17.151764 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA RESULT=pass
34128 23:03:17.152327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA RESULT=pass>
34129 23:03:17.186329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass>
34130 23:03:17.186782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA RESULT=pass
34132 23:03:17.218872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM RESULT=pass
34134 23:03:17.219504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM RESULT=pass>
34135 23:03:17.250989 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA RESULT=pass>
34136 23:03:17.251441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA RESULT=pass
34138 23:03:17.282801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128 RESULT=pass
34140 23:03:17.283246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128 RESULT=pass>
34141 23:03:17.314882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass>
34142 23:03:17.315332 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA RESULT=pass
34144 23:03:17.347172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM RESULT=pass>
34145 23:03:17.347573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM RESULT=pass
34147 23:03:17.379155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA RESULT=pass>
34148 23:03:17.379629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA RESULT=pass
34150 23:03:17.410935 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass
34152 23:03:17.411639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA RESULT=pass>
34153 23:03:17.442591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM RESULT=pass>
34154 23:03:17.443027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM RESULT=pass
34156 23:03:17.474768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA RESULT=pass>
34157 23:03:17.475209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA RESULT=pass
34159 23:03:17.506938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass>
34160 23:03:17.507344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA RESULT=pass
34162 23:03:17.539059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM RESULT=pass
34164 23:03:17.539496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM RESULT=pass>
34165 23:03:17.570961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA RESULT=pass
34167 23:03:17.571403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA RESULT=pass>
34168 23:03:17.602340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass
34170 23:03:17.602778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA RESULT=pass>
34171 23:03:17.633810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM RESULT=pass
34173 23:03:17.634242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM RESULT=pass>
34174 23:03:17.674967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA RESULT=pass>
34175 23:03:17.675351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA RESULT=pass
34177 23:03:17.707060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass>
34178 23:03:17.707457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA RESULT=pass
34180 23:03:17.739002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM RESULT=pass>
34181 23:03:17.739386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM RESULT=pass
34183 23:03:17.770695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA RESULT=pass
34185 23:03:17.771122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA RESULT=pass>
34186 23:03:17.802568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112 RESULT=pass>
34187 23:03:17.802947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112 RESULT=pass
34189 23:03:17.834249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass>
34190 23:03:17.834634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA RESULT=pass
34192 23:03:17.866494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM RESULT=pass>
34193 23:03:17.866931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM RESULT=pass
34195 23:03:17.898182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA RESULT=pass
34197 23:03:17.898754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA RESULT=pass>
34198 23:03:17.932549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass>
34199 23:03:17.932991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA RESULT=pass
34201 23:03:17.964410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM RESULT=pass>
34202 23:03:17.964859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM RESULT=pass
34204 23:03:17.996029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA RESULT=pass
34206 23:03:17.996568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA RESULT=pass>
34207 23:03:18.027959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass
34209 23:03:18.028502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA RESULT=pass>
34210 23:03:18.060001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM RESULT=pass
34212 23:03:18.060578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM RESULT=pass>
34213 23:03:18.092680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA RESULT=pass>
34214 23:03:18.093113 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA RESULT=pass
34216 23:03:18.124646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass>
34217 23:03:18.125156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA RESULT=pass
34219 23:03:18.155963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM RESULT=pass
34221 23:03:18.156395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM RESULT=pass>
34222 23:03:18.187663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA RESULT=pass>
34223 23:03:18.188055 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA RESULT=pass
34225 23:03:18.220347 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass>
34226 23:03:18.220729 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA RESULT=pass
34228 23:03:18.251828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM RESULT=pass
34230 23:03:18.252265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM RESULT=pass>
34231 23:03:18.283539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA RESULT=pass>
34232 23:03:18.283922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA RESULT=pass
34234 23:03:18.314849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96 RESULT=pass>
34235 23:03:18.315291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96 RESULT=pass
34237 23:03:18.346171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass>
34238 23:03:18.346635 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA RESULT=pass
34240 23:03:18.377188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM RESULT=pass>
34241 23:03:18.377671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM RESULT=pass
34243 23:03:18.408473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA RESULT=pass>
34244 23:03:18.408921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA RESULT=pass
34246 23:03:18.441087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass>
34247 23:03:18.441564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA RESULT=pass
34249 23:03:18.472587 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM RESULT=pass>
34250 23:03:18.473050 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM RESULT=pass
34252 23:03:18.504698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA RESULT=pass
34254 23:03:18.505256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA RESULT=pass>
34255 23:03:18.536261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass>
34256 23:03:18.536726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA RESULT=pass
34258 23:03:18.567977 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM RESULT=pass
34260 23:03:18.568549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM RESULT=pass>
34261 23:03:18.600370 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA RESULT=pass
34263 23:03:18.601002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA RESULT=pass>
34264 23:03:18.631924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass
34266 23:03:18.632572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA RESULT=pass>
34267 23:03:18.663351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM RESULT=pass
34269 23:03:18.663901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM RESULT=pass>
34270 23:03:18.694600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA RESULT=pass>
34271 23:03:18.695063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA RESULT=pass
34273 23:03:18.726798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass
34275 23:03:18.727372 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA RESULT=pass>
34276 23:03:18.758193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM RESULT=pass>
34277 23:03:18.758666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM RESULT=pass
34279 23:03:18.789605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA RESULT=pass
34281 23:03:18.790164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA RESULT=pass>
34282 23:03:18.821140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80 RESULT=pass
34284 23:03:18.821722 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80 RESULT=pass>
34285 23:03:18.852747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass>
34286 23:03:18.853198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA RESULT=pass
34288 23:03:18.884766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM RESULT=pass>
34289 23:03:18.885214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM RESULT=pass
34291 23:03:18.916906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA RESULT=pass>
34292 23:03:18.917376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA RESULT=pass
34294 23:03:18.948841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass>
34295 23:03:18.949324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA RESULT=pass
34297 23:03:18.980677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM RESULT=pass>
34298 23:03:18.981144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM RESULT=pass
34300 23:03:19.012108 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA RESULT=pass
34302 23:03:19.012661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA RESULT=pass>
34303 23:03:19.043608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass>
34304 23:03:19.044088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA RESULT=pass
34306 23:03:19.075142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM RESULT=pass
34308 23:03:19.075769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM RESULT=pass>
34309 23:03:19.106932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA RESULT=pass
34311 23:03:19.107564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA RESULT=pass>
34312 23:03:19.138490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass>
34313 23:03:19.138946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA RESULT=pass
34315 23:03:19.170019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM RESULT=pass>
34316 23:03:19.170486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM RESULT=pass
34318 23:03:19.201594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA RESULT=pass
34320 23:03:19.202229 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA RESULT=pass>
34321 23:03:19.233786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass>
34322 23:03:19.234248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA RESULT=pass
34324 23:03:19.265176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM RESULT=pass
34326 23:03:19.265739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM RESULT=pass>
34327 23:03:19.297053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA RESULT=pass>
34328 23:03:19.297498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA RESULT=pass
34330 23:03:19.328821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64 RESULT=pass
34332 23:03:19.329358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64 RESULT=pass>
34333 23:03:19.361189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass
34335 23:03:19.361835 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA RESULT=pass>
34336 23:03:19.393122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM RESULT=pass>
34337 23:03:19.393598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM RESULT=pass
34339 23:03:19.426886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA RESULT=pass>
34340 23:03:19.427346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA RESULT=pass
34342 23:03:19.460155 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass
34344 23:03:19.460873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA RESULT=pass>
34345 23:03:19.493723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM RESULT=pass
34347 23:03:19.494308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM RESULT=pass>
34348 23:03:19.526001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA RESULT=pass>
34349 23:03:19.526427 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA RESULT=pass
34351 23:03:19.557445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass>
34352 23:03:19.557906 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass
34354 23:03:19.589690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM RESULT=pass
34356 23:03:19.590257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM RESULT=pass>
34357 23:03:19.621833 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA RESULT=pass>
34358 23:03:19.622357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA RESULT=pass
34360 23:03:19.653221 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass
34362 23:03:19.653805 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass>
34363 23:03:19.684987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM RESULT=pass
34365 23:03:19.685462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM RESULT=pass>
34366 23:03:19.717239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA RESULT=pass>
34367 23:03:19.717691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA RESULT=pass
34369 23:03:19.749637 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass>
34370 23:03:19.750109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass
34372 23:03:19.784442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM RESULT=pass>
34373 23:03:19.784922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM RESULT=pass
34375 23:03:19.816571 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA RESULT=pass>
34376 23:03:19.817039 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA RESULT=pass
34378 23:03:19.848275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48 RESULT=pass>
34379 23:03:19.848730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48 RESULT=pass
34381 23:03:19.879904 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass
34383 23:03:19.880494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA RESULT=pass>
34384 23:03:19.912562 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM RESULT=pass
34386 23:03:19.913113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM RESULT=pass>
34387 23:03:19.944437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA RESULT=pass
34389 23:03:19.944997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA RESULT=pass>
34390 23:03:19.976499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass>
34391 23:03:19.976944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA RESULT=pass
34393 23:03:20.008318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM RESULT=pass>
34394 23:03:20.008757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM RESULT=pass
34396 23:03:20.039672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA RESULT=pass>
34397 23:03:20.040124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA RESULT=pass
34399 23:03:20.070936 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass
34401 23:03:20.071485 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA RESULT=pass>
34402 23:03:20.102639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM RESULT=pass>
34403 23:03:20.103085 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM RESULT=pass
34405 23:03:20.134320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA RESULT=pass>
34406 23:03:20.134761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA RESULT=pass
34408 23:03:20.166226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass
34410 23:03:20.166806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA RESULT=pass>
34411 23:03:20.197732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM RESULT=pass>
34412 23:03:20.198166 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM RESULT=pass
34414 23:03:20.231427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA RESULT=pass>
34415 23:03:20.231921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA RESULT=pass
34417 23:03:20.264337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass
34419 23:03:20.264968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA RESULT=pass>
34420 23:03:20.295984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM RESULT=pass
34422 23:03:20.296552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM RESULT=pass>
34423 23:03:20.327355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA RESULT=pass>
34424 23:03:20.327839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA RESULT=pass
34426 23:03:20.358509 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32 RESULT=pass
34428 23:03:20.359068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32 RESULT=pass>
34429 23:03:20.389628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass
34431 23:03:20.390187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA RESULT=pass>
34432 23:03:20.420993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM RESULT=pass>
34433 23:03:20.421460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM RESULT=pass
34435 23:03:20.452547 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA RESULT=pass
34437 23:03:20.453164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA RESULT=pass>
34438 23:03:20.483771 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass>
34439 23:03:20.484233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA RESULT=pass
34441 23:03:20.516029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM RESULT=pass
34443 23:03:20.516492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM RESULT=pass>
34444 23:03:20.547963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA RESULT=pass
34446 23:03:20.548525 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA RESULT=pass>
34447 23:03:20.579406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass>
34448 23:03:20.579902 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass
34450 23:03:20.611026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM RESULT=pass>
34451 23:03:20.611510 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM RESULT=pass
34453 23:03:20.642272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA RESULT=pass
34455 23:03:20.642819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA RESULT=pass>
34456 23:03:20.674716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass
34458 23:03:20.675264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass>
34459 23:03:20.750157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM RESULT=pass
34461 23:03:20.750721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM RESULT=pass>
34462 23:03:20.792479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA RESULT=pass
34464 23:03:20.793069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA RESULT=pass>
34465 23:03:20.829874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass>
34466 23:03:20.830233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass
34468 23:03:20.868005 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM RESULT=pass
34470 23:03:20.868490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM RESULT=pass>
34471 23:03:20.905138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA RESULT=pass>
34472 23:03:20.905498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA RESULT=pass
34474 23:03:20.939497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16 RESULT=pass>
34475 23:03:20.939845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16 RESULT=pass
34477 23:03:20.973843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass>
34478 23:03:20.974206 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA RESULT=pass
34480 23:03:21.009007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM RESULT=pass>
34481 23:03:21.009363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM RESULT=pass
34483 23:03:21.043324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA RESULT=pass
34485 23:03:21.043768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA RESULT=pass>
34486 23:03:21.078108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass>
34487 23:03:21.078548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA RESULT=pass
34489 23:03:21.112433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM RESULT=pass>
34490 23:03:21.112800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM RESULT=pass
34492 23:03:21.146310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA RESULT=pass>
34493 23:03:21.146683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA RESULT=pass
34495 23:03:21.180661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass>
34496 23:03:21.181006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass
34498 23:03:21.214904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM RESULT=pass>
34499 23:03:21.215264 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM RESULT=pass
34501 23:03:21.248968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA RESULT=pass>
34502 23:03:21.249314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA RESULT=pass
34504 23:03:21.282998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass
34506 23:03:21.283422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass>
34507 23:03:21.319688 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM RESULT=pass
34509 23:03:21.320194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM RESULT=pass>
34510 23:03:21.351918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA RESULT=pass
34512 23:03:21.352336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA RESULT=pass>
34513 23:03:21.390770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass>
34514 23:03:21.391189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass
34516 23:03:21.432979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM RESULT=pass>
34517 23:03:21.433447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM RESULT=pass
34519 23:03:21.465230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA RESULT=pass
34521 23:03:21.465906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA RESULT=pass>
34522 23:03:21.498038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi RESULT=pass>
34523 23:03:21.498527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi RESULT=pass
34525 23:03:21.529359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_default_value RESULT=pass>
34526 23:03:21.529838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_default_value RESULT=pass
34528 23:03:21.562122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_read RESULT=pass>
34529 23:03:21.562621 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_read RESULT=pass
34531 23:03:21.597050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_sleep_read RESULT=pass>
34532 23:03:21.597494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_sleep_read RESULT=pass
34534 23:03:21.633178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_fork_read RESULT=pass>
34535 23:03:21.633595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_fork_read RESULT=pass
34537 23:03:21.668881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_clone_read RESULT=pass>
34538 23:03:21.669317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_clone_read RESULT=pass
34540 23:03:21.705393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2 RESULT=pass
34542 23:03:21.705873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2 RESULT=pass>
34543 23:03:21.708518 + set +x
34544 23:03:21.708771 <LAVA_SIGNAL_ENDRUN 1_kselftest-arm64_qemu 566287_1.1.3.5>
34545 23:03:21.709100 Received signal: <ENDRUN> 1_kselftest-arm64_qemu 566287_1.1.3.5
34546 23:03:21.709244 Ending use of test pattern.
34547 23:03:21.709367 Ending test lava.1_kselftest-arm64_qemu (566287_1.1.3.5), duration 328.16
34549 23:03:21.711701 ok: lava_test_shell seems to have completed
34550 23:03:21.798434 arm64_btitest: pass
arm64_btitest_bti_c_func_call_using_blr: pass
arm64_btitest_bti_c_func_call_using_br_x0: pass
arm64_btitest_bti_c_func_call_using_br_x16: pass
arm64_btitest_bti_j_func_call_using_blr: pass
arm64_btitest_bti_j_func_call_using_br_x0: pass
arm64_btitest_bti_j_func_call_using_br_x16: pass
arm64_btitest_bti_jc_func_call_using_blr: pass
arm64_btitest_bti_jc_func_call_using_br_x0: pass
arm64_btitest_bti_jc_func_call_using_br_x16: pass
arm64_btitest_bti_none_func_call_using_blr: pass
arm64_btitest_bti_none_func_call_using_br_x0: pass
arm64_btitest_bti_none_func_call_using_br_x16: pass
arm64_btitest_nohint_func_call_using_blr: pass
arm64_btitest_nohint_func_call_using_br_x0: pass
arm64_btitest_nohint_func_call_using_br_x16: pass
arm64_btitest_paciasp_func_call_using_blr: pass
arm64_btitest_paciasp_func_call_using_br_x0: pass
arm64_btitest_paciasp_func_call_using_br_x16: pass
arm64_check_buffer_fill: fail
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_child_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory: fail
arm64_check_gcr_el1_cswitch: fail
arm64_check_ksm_options: fail
arm64_check_mmap_options: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory: fail
arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: fail
arm64_check_prctl: pass
arm64_check_prctl_ASYNC: pass
arm64_check_prctl_NONE: pass
arm64_check_prctl_SYNC: pass
arm64_check_prctl_SYNC_ASYNC: pass
arm64_check_prctl_check_basic_read: pass
arm64_check_tags_inclusion: fail
arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode: fail
arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode: pass
arm64_check_user_mem: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_fake_sigreturn_bad_magic: pass
arm64_fake_sigreturn_bad_size: pass
arm64_fake_sigreturn_bad_size_for_magic0: pass
arm64_fake_sigreturn_duplicated_fpsimd: pass
arm64_fake_sigreturn_misaligned_sp: pass
arm64_fake_sigreturn_missing_fpsimd: pass
arm64_fake_sigreturn_sme_change_vl: pass
arm64_fake_sigreturn_sve_change_vl: pass
arm64_fp-stress: pass
arm64_fp-stress_FPSIMD-0-0: pass
arm64_fp-stress_SSVE-VL-128-0: pass
arm64_fp-stress_SSVE-VL-16-0: pass
arm64_fp-stress_SSVE-VL-256-0: pass
arm64_fp-stress_SSVE-VL-32-0: pass
arm64_fp-stress_SSVE-VL-64-0: pass
arm64_fp-stress_SVE-VL-112-0: pass
arm64_fp-stress_SVE-VL-128-0: pass
arm64_fp-stress_SVE-VL-144-0: pass
arm64_fp-stress_SVE-VL-16-0: pass
arm64_fp-stress_SVE-VL-160-0: pass
arm64_fp-stress_SVE-VL-176-0: pass
arm64_fp-stress_SVE-VL-192-0: pass
arm64_fp-stress_SVE-VL-208-0: pass
arm64_fp-stress_SVE-VL-224-0: pass
arm64_fp-stress_SVE-VL-240-0: pass
arm64_fp-stress_SVE-VL-256-0: pass
arm64_fp-stress_SVE-VL-32-0: pass
arm64_fp-stress_SVE-VL-48-0: pass
arm64_fp-stress_SVE-VL-64-0: pass
arm64_fp-stress_SVE-VL-80-0: pass
arm64_fp-stress_SVE-VL-96-0: pass
arm64_fp-stress_ZA-VL-128-0: pass
arm64_fp-stress_ZA-VL-16-0: pass
arm64_fp-stress_ZA-VL-256-0: pass
arm64_fp-stress_ZA-VL-32-0: pass
arm64_fp-stress_ZA-VL-64-0: pass
arm64_hwcap: pass
arm64_hwcap_cpuinfo_match_RNG: pass
arm64_hwcap_cpuinfo_match_SME: pass
arm64_hwcap_cpuinfo_match_SVE: pass
arm64_hwcap_cpuinfo_match_SVE2_BF16: pass
arm64_hwcap_cpuinfo_match_SVE2_BITPERM: pass
arm64_hwcap_cpuinfo_match_SVE2_EBF16: pass
arm64_hwcap_cpuinfo_match_SVE2_F32MM: pass
arm64_hwcap_cpuinfo_match_SVE2_F64MM: pass
arm64_hwcap_cpuinfo_match_SVE2_I8MM: pass
arm64_hwcap_cpuinfo_match_SVE2_PMULL: pass
arm64_hwcap_cpuinfo_match_SVE2_SHA3: pass
arm64_hwcap_cpuinfo_match_SVE2_SM4: pass
arm64_hwcap_cpuinfo_match_SVE_2: pass
arm64_hwcap_cpuinfo_match_SVE_AES: pass
arm64_hwcap_sigill_RNG: pass
arm64_hwcap_sigill_SME: pass
arm64_hwcap_sigill_SVE: pass
arm64_hwcap_sigill_SVE2_BF16: pass
arm64_hwcap_sigill_SVE2_BITPERM: pass
arm64_hwcap_sigill_SVE2_EBF16: skip
arm64_hwcap_sigill_SVE2_F32MM: pass
arm64_hwcap_sigill_SVE2_F64MM: pass
arm64_hwcap_sigill_SVE2_I8MM: pass
arm64_hwcap_sigill_SVE2_PMULL: pass
arm64_hwcap_sigill_SVE2_SHA3: pass
arm64_hwcap_sigill_SVE2_SM4: pass
arm64_hwcap_sigill_SVE_2: pass
arm64_hwcap_sigill_SVE_AES: pass
arm64_mangle_pstate_invalid_compat_toggle: pass
arm64_mangle_pstate_invalid_daif_bits: pass
arm64_mangle_pstate_invalid_mode_el1h: pass
arm64_mangle_pstate_invalid_mode_el1t: pass
arm64_mangle_pstate_invalid_mode_el2h: pass
arm64_mangle_pstate_invalid_mode_el2t: pass
arm64_mangle_pstate_invalid_mode_el3h: pass
arm64_mangle_pstate_invalid_mode_el3t: pass
arm64_nobtitest: pass
arm64_nobtitest_bti_c_func_call_using_blr: pass
arm64_nobtitest_bti_c_func_call_using_br_x0: pass
arm64_nobtitest_bti_c_func_call_using_br_x16: pass
arm64_nobtitest_bti_j_func_call_using_blr: pass
arm64_nobtitest_bti_j_func_call_using_br_x0: pass
arm64_nobtitest_bti_j_func_call_using_br_x16: pass
arm64_nobtitest_bti_jc_func_call_using_blr: pass
arm64_nobtitest_bti_jc_func_call_using_br_x0: pass
arm64_nobtitest_bti_jc_func_call_using_br_x16: pass
arm64_nobtitest_bti_none_func_call_using_blr: pass
arm64_nobtitest_bti_none_func_call_using_br_x0: pass
arm64_nobtitest_bti_none_func_call_using_br_x16: pass
arm64_nobtitest_nohint_func_call_using_blr: pass
arm64_nobtitest_nohint_func_call_using_br_x0: pass
arm64_nobtitest_nohint_func_call_using_br_x16: pass
arm64_nobtitest_paciasp_func_call_using_blr: pass
arm64_nobtitest_paciasp_func_call_using_br_x0: pass
arm64_nobtitest_paciasp_func_call_using_br_x16: pass
arm64_pac: pass
arm64_pac_global_context_switch_keep_keys: pass
arm64_pac_global_context_switch_keep_keys_generic: pass
arm64_pac_global_corrupt_pac: pass
arm64_pac_global_exec_changed_keys: pass
arm64_pac_global_pac_instructions_not_nop: pass
arm64_pac_global_pac_instructions_not_nop_generic: pass
arm64_pac_global_single_thread_different_keys: pass
arm64_ptrace: pass
arm64_ptrace_count_tpidrs: pass
arm64_ptrace_read_tpidr_one: pass
arm64_ptrace_tpidr2_read: pass
arm64_ptrace_tpidr2_write: pass
arm64_ptrace_verify_tpidr_one: pass
arm64_ptrace_write_tpidr_one: pass
arm64_ptrace_write_tpidr_only: pass
arm64_run_tags_test_sh: pass
arm64_sme_trap_no_sm: pass
arm64_sme_trap_non_streaming: skip
arm64_sme_trap_za: pass
arm64_sme_vl: pass
arm64_ssve_regs: pass
arm64_sve-probe-vls: pass
arm64_sve-probe-vls_All_vector_lengths_valid: pass
arm64_sve-probe-vls_Enumerated_16_vector_lengths: pass
arm64_sve-ptrace: pass
arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0: pass
arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared: pass
arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set: pass
arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state: pass
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_672: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_688: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_704: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_720: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_736: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_752: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_768: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_784: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_800: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_816: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_832: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_848: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_864: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_880: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_896: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_912: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_928: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_944: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_960: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_976: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_672: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_688: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_704: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_720: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_736: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_752: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_768: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_784: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_800: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_816: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_832: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_848: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_864: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_880: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_896: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_912: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_928: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_944: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_960: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_976: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_672: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_688: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_704: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_720: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_736: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_752: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_768: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_784: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_800: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_816: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_832: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_848: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_864: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_880: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_896: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_912: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_928: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_944: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_960: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_976: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_992: skip
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_112: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_128: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_144: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_160: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_176: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_192: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_208: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_224: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_240: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_256: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_48: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_80: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_96: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_SVE_VL_1008: pass
arm64_sve-ptrace_Set_SVE_VL_1024: pass
arm64_sve-ptrace_Set_SVE_VL_1040: pass
arm64_sve-ptrace_Set_SVE_VL_1056: pass
arm64_sve-ptrace_Set_SVE_VL_1072: pass
arm64_sve-ptrace_Set_SVE_VL_1088: pass
arm64_sve-ptrace_Set_SVE_VL_1104: pass
arm64_sve-ptrace_Set_SVE_VL_112: pass
arm64_sve-ptrace_Set_SVE_VL_1120: pass
arm64_sve-ptrace_Set_SVE_VL_1136: pass
arm64_sve-ptrace_Set_SVE_VL_1152: pass
arm64_sve-ptrace_Set_SVE_VL_1168: pass
arm64_sve-ptrace_Set_SVE_VL_1184: pass
arm64_sve-ptrace_Set_SVE_VL_1200: pass
arm64_sve-ptrace_Set_SVE_VL_1216: pass
arm64_sve-ptrace_Set_SVE_VL_1232: pass
arm64_sve-ptrace_Set_SVE_VL_1248: pass
arm64_sve-ptrace_Set_SVE_VL_1264: pass
arm64_sve-ptrace_Set_SVE_VL_128: pass
arm64_sve-ptrace_Set_SVE_VL_1280: pass
arm64_sve-ptrace_Set_SVE_VL_1296: pass
arm64_sve-ptrace_Set_SVE_VL_1312: pass
arm64_sve-ptrace_Set_SVE_VL_1328: pass
arm64_sve-ptrace_Set_SVE_VL_1344: pass
arm64_sve-ptrace_Set_SVE_VL_1360: pass
arm64_sve-ptrace_Set_SVE_VL_1376: pass
arm64_sve-ptrace_Set_SVE_VL_1392: pass
arm64_sve-ptrace_Set_SVE_VL_1408: pass
arm64_sve-ptrace_Set_SVE_VL_1424: pass
arm64_sve-ptrace_Set_SVE_VL_144: pass
arm64_sve-ptrace_Set_SVE_VL_1440: pass
arm64_sve-ptrace_Set_SVE_VL_1456: pass
arm64_sve-ptrace_Set_SVE_VL_1472: pass
arm64_sve-ptrace_Set_SVE_VL_1488: pass
arm64_sve-ptrace_Set_SVE_VL_1504: pass
arm64_sve-ptrace_Set_SVE_VL_1520: pass
arm64_sve-ptrace_Set_SVE_VL_1536: pass
arm64_sve-ptrace_Set_SVE_VL_1552: pass
arm64_sve-ptrace_Set_SVE_VL_1568: pass
arm64_sve-ptrace_Set_SVE_VL_1584: pass
arm64_sve-ptrace_Set_SVE_VL_16: pass
arm64_sve-ptrace_Set_SVE_VL_160: pass
arm64_sve-ptrace_Set_SVE_VL_1600: pass
arm64_sve-ptrace_Set_SVE_VL_1616: pass
arm64_sve-ptrace_Set_SVE_VL_1632: pass
arm64_sve-ptrace_Set_SVE_VL_1648: pass
arm64_sve-ptrace_Set_SVE_VL_1664: pass
arm64_sve-ptrace_Set_SVE_VL_1680: pass
arm64_sve-ptrace_Set_SVE_VL_1696: pass
arm64_sve-ptrace_Set_SVE_VL_1712: pass
arm64_sve-ptrace_Set_SVE_VL_1728: pass
arm64_sve-ptrace_Set_SVE_VL_1744: pass
arm64_sve-ptrace_Set_SVE_VL_176: pass
arm64_sve-ptrace_Set_SVE_VL_1760: pass
arm64_sve-ptrace_Set_SVE_VL_1776: pass
arm64_sve-ptrace_Set_SVE_VL_1792: pass
arm64_sve-ptrace_Set_SVE_VL_1808: pass
arm64_sve-ptrace_Set_SVE_VL_1824: pass
arm64_sve-ptrace_Set_SVE_VL_1840: pass
arm64_sve-ptrace_Set_SVE_VL_1856: pass
arm64_sve-ptrace_Set_SVE_VL_1872: pass
arm64_sve-ptrace_Set_SVE_VL_1888: pass
arm64_sve-ptrace_Set_SVE_VL_1904: pass
arm64_sve-ptrace_Set_SVE_VL_192: pass
arm64_sve-ptrace_Set_SVE_VL_1920: pass
arm64_sve-ptrace_Set_SVE_VL_1936: pass
arm64_sve-ptrace_Set_SVE_VL_1952: pass
arm64_sve-ptrace_Set_SVE_VL_1968: pass
arm64_sve-ptrace_Set_SVE_VL_1984: pass
arm64_sve-ptrace_Set_SVE_VL_2000: pass
arm64_sve-ptrace_Set_SVE_VL_2016: pass
arm64_sve-ptrace_Set_SVE_VL_2032: pass
arm64_sve-ptrace_Set_SVE_VL_2048: pass
arm64_sve-ptrace_Set_SVE_VL_2064: pass
arm64_sve-ptrace_Set_SVE_VL_208: pass
arm64_sve-ptrace_Set_SVE_VL_2080: pass
arm64_sve-ptrace_Set_SVE_VL_2096: pass
arm64_sve-ptrace_Set_SVE_VL_2112: pass
arm64_sve-ptrace_Set_SVE_VL_2128: pass
arm64_sve-ptrace_Set_SVE_VL_2144: pass
arm64_sve-ptrace_Set_SVE_VL_2160: pass
arm64_sve-ptrace_Set_SVE_VL_2176: pass
arm64_sve-ptrace_Set_SVE_VL_2192: pass
arm64_sve-ptrace_Set_SVE_VL_2208: pass
arm64_sve-ptrace_Set_SVE_VL_2224: pass
arm64_sve-ptrace_Set_SVE_VL_224: pass
arm64_sve-ptrace_Set_SVE_VL_2240: pass
arm64_sve-ptrace_Set_SVE_VL_2256: pass
arm64_sve-ptrace_Set_SVE_VL_2272: pass
arm64_sve-ptrace_Set_SVE_VL_2288: pass
arm64_sve-ptrace_Set_SVE_VL_2304: pass
arm64_sve-ptrace_Set_SVE_VL_2320: pass
arm64_sve-ptrace_Set_SVE_VL_2336: pass
arm64_sve-ptrace_Set_SVE_VL_2352: pass
arm64_sve-ptrace_Set_SVE_VL_2368: pass
arm64_sve-ptrace_Set_SVE_VL_2384: pass
arm64_sve-ptrace_Set_SVE_VL_240: pass
arm64_sve-ptrace_Set_SVE_VL_2400: pass
arm64_sve-ptrace_Set_SVE_VL_2416: pass
arm64_sve-ptrace_Set_SVE_VL_2432: pass
arm64_sve-ptrace_Set_SVE_VL_2448: pass
arm64_sve-ptrace_Set_SVE_VL_2464: pass
arm64_sve-ptrace_Set_SVE_VL_2480: pass
arm64_sve-ptrace_Set_SVE_VL_2496: pass
arm64_sve-ptrace_Set_SVE_VL_2512: pass
arm64_sve-ptrace_Set_SVE_VL_2528: pass
arm64_sve-ptrace_Set_SVE_VL_2544: pass
arm64_sve-ptrace_Set_SVE_VL_256: pass
arm64_sve-ptrace_Set_SVE_VL_2560: pass
arm64_sve-ptrace_Set_SVE_VL_2576: pass
arm64_sve-ptrace_Set_SVE_VL_2592: pass
arm64_sve-ptrace_Set_SVE_VL_2608: pass
arm64_sve-ptrace_Set_SVE_VL_2624: pass
arm64_sve-ptrace_Set_SVE_VL_2640: pass
arm64_sve-ptrace_Set_SVE_VL_2656: pass
arm64_sve-ptrace_Set_SVE_VL_2672: pass
arm64_sve-ptrace_Set_SVE_VL_2688: pass
arm64_sve-ptrace_Set_SVE_VL_2704: pass
arm64_sve-ptrace_Set_SVE_VL_272: pass
arm64_sve-ptrace_Set_SVE_VL_2720: pass
arm64_sve-ptrace_Set_SVE_VL_2736: pass
arm64_sve-ptrace_Set_SVE_VL_2752: pass
arm64_sve-ptrace_Set_SVE_VL_2768: pass
arm64_sve-ptrace_Set_SVE_VL_2784: pass
arm64_sve-ptrace_Set_SVE_VL_2800: pass
arm64_sve-ptrace_Set_SVE_VL_2816: pass
arm64_sve-ptrace_Set_SVE_VL_2832: pass
arm64_sve-ptrace_Set_SVE_VL_2848: pass
arm64_sve-ptrace_Set_SVE_VL_2864: pass
arm64_sve-ptrace_Set_SVE_VL_288: pass
arm64_sve-ptrace_Set_SVE_VL_2880: pass
arm64_sve-ptrace_Set_SVE_VL_2896: pass
arm64_sve-ptrace_Set_SVE_VL_2912: pass
arm64_sve-ptrace_Set_SVE_VL_2928: pass
arm64_sve-ptrace_Set_SVE_VL_2944: pass
arm64_sve-ptrace_Set_SVE_VL_2960: pass
arm64_sve-ptrace_Set_SVE_VL_2976: pass
arm64_sve-ptrace_Set_SVE_VL_2992: pass
arm64_sve-ptrace_Set_SVE_VL_3008: pass
arm64_sve-ptrace_Set_SVE_VL_3024: pass
arm64_sve-ptrace_Set_SVE_VL_304: pass
arm64_sve-ptrace_Set_SVE_VL_3040: pass
arm64_sve-ptrace_Set_SVE_VL_3056: pass
arm64_sve-ptrace_Set_SVE_VL_3072: pass
arm64_sve-ptrace_Set_SVE_VL_3088: pass
arm64_sve-ptrace_Set_SVE_VL_3104: pass
arm64_sve-ptrace_Set_SVE_VL_3120: pass
arm64_sve-ptrace_Set_SVE_VL_3136: pass
arm64_sve-ptrace_Set_SVE_VL_3152: pass
arm64_sve-ptrace_Set_SVE_VL_3168: pass
arm64_sve-ptrace_Set_SVE_VL_3184: pass
arm64_sve-ptrace_Set_SVE_VL_32: pass
arm64_sve-ptrace_Set_SVE_VL_320: pass
arm64_sve-ptrace_Set_SVE_VL_3200: pass
arm64_sve-ptrace_Set_SVE_VL_3216: pass
arm64_sve-ptrace_Set_SVE_VL_3232: pass
arm64_sve-ptrace_Set_SVE_VL_3248: pass
arm64_sve-ptrace_Set_SVE_VL_3264: pass
arm64_sve-ptrace_Set_SVE_VL_3280: pass
arm64_sve-ptrace_Set_SVE_VL_3296: pass
arm64_sve-ptrace_Set_SVE_VL_3312: pass
arm64_sve-ptrace_Set_SVE_VL_3328: pass
arm64_sve-ptrace_Set_SVE_VL_3344: pass
arm64_sve-ptrace_Set_SVE_VL_336: pass
arm64_sve-ptrace_Set_SVE_VL_3360: pass
arm64_sve-ptrace_Set_SVE_VL_3376: pass
arm64_sve-ptrace_Set_SVE_VL_3392: pass
arm64_sve-ptrace_Set_SVE_VL_3408: pass
arm64_sve-ptrace_Set_SVE_VL_3424: pass
arm64_sve-ptrace_Set_SVE_VL_3440: pass
arm64_sve-ptrace_Set_SVE_VL_3456: pass
arm64_sve-ptrace_Set_SVE_VL_3472: pass
arm64_sve-ptrace_Set_SVE_VL_3488: pass
arm64_sve-ptrace_Set_SVE_VL_3504: pass
arm64_sve-ptrace_Set_SVE_VL_352: pass
arm64_sve-ptrace_Set_SVE_VL_3520: pass
arm64_sve-ptrace_Set_SVE_VL_3536: pass
arm64_sve-ptrace_Set_SVE_VL_3552: pass
arm64_sve-ptrace_Set_SVE_VL_3568: pass
arm64_sve-ptrace_Set_SVE_VL_3584: pass
arm64_sve-ptrace_Set_SVE_VL_3600: pass
arm64_sve-ptrace_Set_SVE_VL_3616: pass
arm64_sve-ptrace_Set_SVE_VL_3632: pass
arm64_sve-ptrace_Set_SVE_VL_3648: pass
arm64_sve-ptrace_Set_SVE_VL_3664: pass
arm64_sve-ptrace_Set_SVE_VL_368: pass
arm64_sve-ptrace_Set_SVE_VL_3680: pass
arm64_sve-ptrace_Set_SVE_VL_3696: pass
arm64_sve-ptrace_Set_SVE_VL_3712: pass
arm64_sve-ptrace_Set_SVE_VL_3728: pass
arm64_sve-ptrace_Set_SVE_VL_3744: pass
arm64_sve-ptrace_Set_SVE_VL_3760: pass
arm64_sve-ptrace_Set_SVE_VL_3776: pass
arm64_sve-ptrace_Set_SVE_VL_3792: pass
arm64_sve-ptrace_Set_SVE_VL_3808: pass
arm64_sve-ptrace_Set_SVE_VL_3824: pass
arm64_sve-ptrace_Set_SVE_VL_384: pass
arm64_sve-ptrace_Set_SVE_VL_3840: pass
arm64_sve-ptrace_Set_SVE_VL_3856: pass
arm64_sve-ptrace_Set_SVE_VL_3872: pass
arm64_sve-ptrace_Set_SVE_VL_3888: pass
arm64_sve-ptrace_Set_SVE_VL_3904: pass
arm64_sve-ptrace_Set_SVE_VL_3920: pass
arm64_sve-ptrace_Set_SVE_VL_3936: pass
arm64_sve-ptrace_Set_SVE_VL_3952: pass
arm64_sve-ptrace_Set_SVE_VL_3968: pass
arm64_sve-ptrace_Set_SVE_VL_3984: pass
arm64_sve-ptrace_Set_SVE_VL_400: pass
arm64_sve-ptrace_Set_SVE_VL_4000: pass
arm64_sve-ptrace_Set_SVE_VL_4016: pass
arm64_sve-ptrace_Set_SVE_VL_4032: pass
arm64_sve-ptrace_Set_SVE_VL_4048: pass
arm64_sve-ptrace_Set_SVE_VL_4064: pass
arm64_sve-ptrace_Set_SVE_VL_4080: pass
arm64_sve-ptrace_Set_SVE_VL_4096: pass
arm64_sve-ptrace_Set_SVE_VL_4112: pass
arm64_sve-ptrace_Set_SVE_VL_4128: pass
arm64_sve-ptrace_Set_SVE_VL_4144: pass
arm64_sve-ptrace_Set_SVE_VL_416: pass
arm64_sve-ptrace_Set_SVE_VL_4160: pass
arm64_sve-ptrace_Set_SVE_VL_4176: pass
arm64_sve-ptrace_Set_SVE_VL_4192: pass
arm64_sve-ptrace_Set_SVE_VL_4208: pass
arm64_sve-ptrace_Set_SVE_VL_4224: pass
arm64_sve-ptrace_Set_SVE_VL_4240: pass
arm64_sve-ptrace_Set_SVE_VL_4256: pass
arm64_sve-ptrace_Set_SVE_VL_4272: pass
arm64_sve-ptrace_Set_SVE_VL_4288: pass
arm64_sve-ptrace_Set_SVE_VL_4304: pass
arm64_sve-ptrace_Set_SVE_VL_432: pass
arm64_sve-ptrace_Set_SVE_VL_4320: pass
arm64_sve-ptrace_Set_SVE_VL_4336: pass
arm64_sve-ptrace_Set_SVE_VL_4352: pass
arm64_sve-ptrace_Set_SVE_VL_4368: pass
arm64_sve-ptrace_Set_SVE_VL_4384: pass
arm64_sve-ptrace_Set_SVE_VL_4400: pass
arm64_sve-ptrace_Set_SVE_VL_4416: pass
arm64_sve-ptrace_Set_SVE_VL_4432: pass
arm64_sve-ptrace_Set_SVE_VL_4448: pass
arm64_sve-ptrace_Set_SVE_VL_4464: pass
arm64_sve-ptrace_Set_SVE_VL_448: pass
arm64_sve-ptrace_Set_SVE_VL_4480: pass
arm64_sve-ptrace_Set_SVE_VL_4496: pass
arm64_sve-ptrace_Set_SVE_VL_4512: pass
arm64_sve-ptrace_Set_SVE_VL_4528: pass
arm64_sve-ptrace_Set_SVE_VL_4544: pass
arm64_sve-ptrace_Set_SVE_VL_4560: pass
arm64_sve-ptrace_Set_SVE_VL_4576: pass
arm64_sve-ptrace_Set_SVE_VL_4592: pass
arm64_sve-ptrace_Set_SVE_VL_4608: pass
arm64_sve-ptrace_Set_SVE_VL_4624: pass
arm64_sve-ptrace_Set_SVE_VL_464: pass
arm64_sve-ptrace_Set_SVE_VL_4640: pass
arm64_sve-ptrace_Set_SVE_VL_4656: pass
arm64_sve-ptrace_Set_SVE_VL_4672: pass
arm64_sve-ptrace_Set_SVE_VL_4688: pass
arm64_sve-ptrace_Set_SVE_VL_4704: pass
arm64_sve-ptrace_Set_SVE_VL_4720: pass
arm64_sve-ptrace_Set_SVE_VL_4736: pass
arm64_sve-ptrace_Set_SVE_VL_4752: pass
arm64_sve-ptrace_Set_SVE_VL_4768: pass
arm64_sve-ptrace_Set_SVE_VL_4784: pass
arm64_sve-ptrace_Set_SVE_VL_48: pass
arm64_sve-ptrace_Set_SVE_VL_480: pass
arm64_sve-ptrace_Set_SVE_VL_4800: pass
arm64_sve-ptrace_Set_SVE_VL_4816: pass
arm64_sve-ptrace_Set_SVE_VL_4832: pass
arm64_sve-ptrace_Set_SVE_VL_4848: pass
arm64_sve-ptrace_Set_SVE_VL_4864: pass
arm64_sve-ptrace_Set_SVE_VL_4880: pass
arm64_sve-ptrace_Set_SVE_VL_4896: pass
arm64_sve-ptrace_Set_SVE_VL_4912: pass
arm64_sve-ptrace_Set_SVE_VL_4928: pass
arm64_sve-ptrace_Set_SVE_VL_4944: pass
arm64_sve-ptrace_Set_SVE_VL_496: pass
arm64_sve-ptrace_Set_SVE_VL_4960: pass
arm64_sve-ptrace_Set_SVE_VL_4976: pass
arm64_sve-ptrace_Set_SVE_VL_4992: pass
arm64_sve-ptrace_Set_SVE_VL_5008: pass
arm64_sve-ptrace_Set_SVE_VL_5024: pass
arm64_sve-ptrace_Set_SVE_VL_5040: pass
arm64_sve-ptrace_Set_SVE_VL_5056: pass
arm64_sve-ptrace_Set_SVE_VL_5072: pass
arm64_sve-ptrace_Set_SVE_VL_5088: pass
arm64_sve-ptrace_Set_SVE_VL_5104: pass
arm64_sve-ptrace_Set_SVE_VL_512: pass
arm64_sve-ptrace_Set_SVE_VL_5120: pass
arm64_sve-ptrace_Set_SVE_VL_5136: pass
arm64_sve-ptrace_Set_SVE_VL_5152: pass
arm64_sve-ptrace_Set_SVE_VL_5168: pass
arm64_sve-ptrace_Set_SVE_VL_5184: pass
arm64_sve-ptrace_Set_SVE_VL_5200: pass
arm64_sve-ptrace_Set_SVE_VL_5216: pass
arm64_sve-ptrace_Set_SVE_VL_5232: pass
arm64_sve-ptrace_Set_SVE_VL_5248: pass
arm64_sve-ptrace_Set_SVE_VL_5264: pass
arm64_sve-ptrace_Set_SVE_VL_528: pass
arm64_sve-ptrace_Set_SVE_VL_5280: pass
arm64_sve-ptrace_Set_SVE_VL_5296: pass
arm64_sve-ptrace_Set_SVE_VL_5312: pass
arm64_sve-ptrace_Set_SVE_VL_5328: pass
arm64_sve-ptrace_Set_SVE_VL_5344: pass
arm64_sve-ptrace_Set_SVE_VL_5360: pass
arm64_sve-ptrace_Set_SVE_VL_5376: pass
arm64_sve-ptrace_Set_SVE_VL_5392: pass
arm64_sve-ptrace_Set_SVE_VL_5408: pass
arm64_sve-ptrace_Set_SVE_VL_5424: pass
arm64_sve-ptrace_Set_SVE_VL_544: pass
arm64_sve-ptrace_Set_SVE_VL_5440: pass
arm64_sve-ptrace_Set_SVE_VL_5456: pass
arm64_sve-ptrace_Set_SVE_VL_5472: pass
arm64_sve-ptrace_Set_SVE_VL_5488: pass
arm64_sve-ptrace_Set_SVE_VL_5504: pass
arm64_sve-ptrace_Set_SVE_VL_5520: pass
arm64_sve-ptrace_Set_SVE_VL_5536: pass
arm64_sve-ptrace_Set_SVE_VL_5552: pass
arm64_sve-ptrace_Set_SVE_VL_5568: pass
arm64_sve-ptrace_Set_SVE_VL_5584: pass
arm64_sve-ptrace_Set_SVE_VL_560: pass
arm64_sve-ptrace_Set_SVE_VL_5600: pass
arm64_sve-ptrace_Set_SVE_VL_5616: pass
arm64_sve-ptrace_Set_SVE_VL_5632: pass
arm64_sve-ptrace_Set_SVE_VL_5648: pass
arm64_sve-ptrace_Set_SVE_VL_5664: pass
arm64_sve-ptrace_Set_SVE_VL_5680: pass
arm64_sve-ptrace_Set_SVE_VL_5696: pass
arm64_sve-ptrace_Set_SVE_VL_5712: pass
arm64_sve-ptrace_Set_SVE_VL_5728: pass
arm64_sve-ptrace_Set_SVE_VL_5744: pass
arm64_sve-ptrace_Set_SVE_VL_576: pass
arm64_sve-ptrace_Set_SVE_VL_5760: pass
arm64_sve-ptrace_Set_SVE_VL_5776: pass
arm64_sve-ptrace_Set_SVE_VL_5792: pass
arm64_sve-ptrace_Set_SVE_VL_5808: pass
arm64_sve-ptrace_Set_SVE_VL_5824: pass
arm64_sve-ptrace_Set_SVE_VL_5840: pass
arm64_sve-ptrace_Set_SVE_VL_5856: pass
arm64_sve-ptrace_Set_SVE_VL_5872: pass
arm64_sve-ptrace_Set_SVE_VL_5888: pass
arm64_sve-ptrace_Set_SVE_VL_5904: pass
arm64_sve-ptrace_Set_SVE_VL_592: pass
arm64_sve-ptrace_Set_SVE_VL_5920: pass
arm64_sve-ptrace_Set_SVE_VL_5936: pass
arm64_sve-ptrace_Set_SVE_VL_5952: pass
arm64_sve-ptrace_Set_SVE_VL_5968: pass
arm64_sve-ptrace_Set_SVE_VL_5984: pass
arm64_sve-ptrace_Set_SVE_VL_6000: pass
arm64_sve-ptrace_Set_SVE_VL_6016: pass
arm64_sve-ptrace_Set_SVE_VL_6032: pass
arm64_sve-ptrace_Set_SVE_VL_6048: pass
arm64_sve-ptrace_Set_SVE_VL_6064: pass
arm64_sve-ptrace_Set_SVE_VL_608: pass
arm64_sve-ptrace_Set_SVE_VL_6080: pass
arm64_sve-ptrace_Set_SVE_VL_6096: pass
arm64_sve-ptrace_Set_SVE_VL_6112: pass
arm64_sve-ptrace_Set_SVE_VL_6128: pass
arm64_sve-ptrace_Set_SVE_VL_6144: pass
arm64_sve-ptrace_Set_SVE_VL_6160: pass
arm64_sve-ptrace_Set_SVE_VL_6176: pass
arm64_sve-ptrace_Set_SVE_VL_6192: pass
arm64_sve-ptrace_Set_SVE_VL_6208: pass
arm64_sve-ptrace_Set_SVE_VL_6224: pass
arm64_sve-ptrace_Set_SVE_VL_624: pass
arm64_sve-ptrace_Set_SVE_VL_6240: pass
arm64_sve-ptrace_Set_SVE_VL_6256: pass
arm64_sve-ptrace_Set_SVE_VL_6272: pass
arm64_sve-ptrace_Set_SVE_VL_6288: pass
arm64_sve-ptrace_Set_SVE_VL_6304: pass
arm64_sve-ptrace_Set_SVE_VL_6320: pass
arm64_sve-ptrace_Set_SVE_VL_6336: pass
arm64_sve-ptrace_Set_SVE_VL_6352: pass
arm64_sve-ptrace_Set_SVE_VL_6368: pass
arm64_sve-ptrace_Set_SVE_VL_6384: pass
arm64_sve-ptrace_Set_SVE_VL_64: pass
arm64_sve-ptrace_Set_SVE_VL_640: pass
arm64_sve-ptrace_Set_SVE_VL_6400: pass
arm64_sve-ptrace_Set_SVE_VL_6416: pass
arm64_sve-ptrace_Set_SVE_VL_6432: pass
arm64_sve-ptrace_Set_SVE_VL_6448: pass
arm64_sve-ptrace_Set_SVE_VL_6464: pass
arm64_sve-ptrace_Set_SVE_VL_6480: pass
arm64_sve-ptrace_Set_SVE_VL_6496: pass
arm64_sve-ptrace_Set_SVE_VL_6512: pass
arm64_sve-ptrace_Set_SVE_VL_6528: pass
arm64_sve-ptrace_Set_SVE_VL_6544: pass
arm64_sve-ptrace_Set_SVE_VL_656: pass
arm64_sve-ptrace_Set_SVE_VL_6560: pass
arm64_sve-ptrace_Set_SVE_VL_6576: pass
arm64_sve-ptrace_Set_SVE_VL_6592: pass
arm64_sve-ptrace_Set_SVE_VL_6608: pass
arm64_sve-ptrace_Set_SVE_VL_6624: pass
arm64_sve-ptrace_Set_SVE_VL_6640: pass
arm64_sve-ptrace_Set_SVE_VL_6656: pass
arm64_sve-ptrace_Set_SVE_VL_6672: pass
arm64_sve-ptrace_Set_SVE_VL_6688: pass
arm64_sve-ptrace_Set_SVE_VL_6704: pass
arm64_sve-ptrace_Set_SVE_VL_672: pass
arm64_sve-ptrace_Set_SVE_VL_6720: pass
arm64_sve-ptrace_Set_SVE_VL_6736: pass
arm64_sve-ptrace_Set_SVE_VL_6752: pass
arm64_sve-ptrace_Set_SVE_VL_6768: pass
arm64_sve-ptrace_Set_SVE_VL_6784: pass
arm64_sve-ptrace_Set_SVE_VL_6800: pass
arm64_sve-ptrace_Set_SVE_VL_6816: pass
arm64_sve-ptrace_Set_SVE_VL_6832: pass
arm64_sve-ptrace_Set_SVE_VL_6848: pass
arm64_sve-ptrace_Set_SVE_VL_6864: pass
arm64_sve-ptrace_Set_SVE_VL_688: pass
arm64_sve-ptrace_Set_SVE_VL_6880: pass
arm64_sve-ptrace_Set_SVE_VL_6896: pass
arm64_sve-ptrace_Set_SVE_VL_6912: pass
arm64_sve-ptrace_Set_SVE_VL_6928: pass
arm64_sve-ptrace_Set_SVE_VL_6944: pass
arm64_sve-ptrace_Set_SVE_VL_6960: pass
arm64_sve-ptrace_Set_SVE_VL_6976: pass
arm64_sve-ptrace_Set_SVE_VL_6992: pass
arm64_sve-ptrace_Set_SVE_VL_7008: pass
arm64_sve-ptrace_Set_SVE_VL_7024: pass
arm64_sve-ptrace_Set_SVE_VL_704: pass
arm64_sve-ptrace_Set_SVE_VL_7040: pass
arm64_sve-ptrace_Set_SVE_VL_7056: pass
arm64_sve-ptrace_Set_SVE_VL_7072: pass
arm64_sve-ptrace_Set_SVE_VL_7088: pass
arm64_sve-ptrace_Set_SVE_VL_7104: pass
arm64_sve-ptrace_Set_SVE_VL_7120: pass
arm64_sve-ptrace_Set_SVE_VL_7136: pass
arm64_sve-ptrace_Set_SVE_VL_7152: pass
arm64_sve-ptrace_Set_SVE_VL_7168: pass
arm64_sve-ptrace_Set_SVE_VL_7184: pass
arm64_sve-ptrace_Set_SVE_VL_720: pass
arm64_sve-ptrace_Set_SVE_VL_7200: pass
arm64_sve-ptrace_Set_SVE_VL_7216: pass
arm64_sve-ptrace_Set_SVE_VL_7232: pass
arm64_sve-ptrace_Set_SVE_VL_7248: pass
arm64_sve-ptrace_Set_SVE_VL_7264: pass
arm64_sve-ptrace_Set_SVE_VL_7280: pass
arm64_sve-ptrace_Set_SVE_VL_7296: pass
arm64_sve-ptrace_Set_SVE_VL_7312: pass
arm64_sve-ptrace_Set_SVE_VL_7328: pass
arm64_sve-ptrace_Set_SVE_VL_7344: pass
arm64_sve-ptrace_Set_SVE_VL_736: pass
arm64_sve-ptrace_Set_SVE_VL_7360: pass
arm64_sve-ptrace_Set_SVE_VL_7376: pass
arm64_sve-ptrace_Set_SVE_VL_7392: pass
arm64_sve-ptrace_Set_SVE_VL_7408: pass
arm64_sve-ptrace_Set_SVE_VL_7424: pass
arm64_sve-ptrace_Set_SVE_VL_7440: pass
arm64_sve-ptrace_Set_SVE_VL_7456: pass
arm64_sve-ptrace_Set_SVE_VL_7472: pass
arm64_sve-ptrace_Set_SVE_VL_7488: pass
arm64_sve-ptrace_Set_SVE_VL_7504: pass
arm64_sve-ptrace_Set_SVE_VL_752: pass
arm64_sve-ptrace_Set_SVE_VL_7520: pass
arm64_sve-ptrace_Set_SVE_VL_7536: pass
arm64_sve-ptrace_Set_SVE_VL_7552: pass
arm64_sve-ptrace_Set_SVE_VL_7568: pass
arm64_sve-ptrace_Set_SVE_VL_7584: pass
arm64_sve-ptrace_Set_SVE_VL_7600: pass
arm64_sve-ptrace_Set_SVE_VL_7616: pass
arm64_sve-ptrace_Set_SVE_VL_7632: pass
arm64_sve-ptrace_Set_SVE_VL_7648: pass
arm64_sve-ptrace_Set_SVE_VL_7664: pass
arm64_sve-ptrace_Set_SVE_VL_768: pass
arm64_sve-ptrace_Set_SVE_VL_7680: pass
arm64_sve-ptrace_Set_SVE_VL_7696: pass
arm64_sve-ptrace_Set_SVE_VL_7712: pass
arm64_sve-ptrace_Set_SVE_VL_7728: pass
arm64_sve-ptrace_Set_SVE_VL_7744: pass
arm64_sve-ptrace_Set_SVE_VL_7760: pass
arm64_sve-ptrace_Set_SVE_VL_7776: pass
arm64_sve-ptrace_Set_SVE_VL_7792: pass
arm64_sve-ptrace_Set_SVE_VL_7808: pass
arm64_sve-ptrace_Set_SVE_VL_7824: pass
arm64_sve-ptrace_Set_SVE_VL_784: pass
arm64_sve-ptrace_Set_SVE_VL_7840: pass
arm64_sve-ptrace_Set_SVE_VL_7856: pass
arm64_sve-ptrace_Set_SVE_VL_7872: pass
arm64_sve-ptrace_Set_SVE_VL_7888: pass
arm64_sve-ptrace_Set_SVE_VL_7904: pass
arm64_sve-ptrace_Set_SVE_VL_7920: pass
arm64_sve-ptrace_Set_SVE_VL_7936: pass
arm64_sve-ptrace_Set_SVE_VL_7952: pass
arm64_sve-ptrace_Set_SVE_VL_7968: pass
arm64_sve-ptrace_Set_SVE_VL_7984: pass
arm64_sve-ptrace_Set_SVE_VL_80: pass
arm64_sve-ptrace_Set_SVE_VL_800: pass
arm64_sve-ptrace_Set_SVE_VL_8000: pass
arm64_sve-ptrace_Set_SVE_VL_8016: pass
arm64_sve-ptrace_Set_SVE_VL_8032: pass
arm64_sve-ptrace_Set_SVE_VL_8048: pass
arm64_sve-ptrace_Set_SVE_VL_8064: pass
arm64_sve-ptrace_Set_SVE_VL_8080: pass
arm64_sve-ptrace_Set_SVE_VL_8096: pass
arm64_sve-ptrace_Set_SVE_VL_8112: pass
arm64_sve-ptrace_Set_SVE_VL_8128: pass
arm64_sve-ptrace_Set_SVE_VL_8144: pass
arm64_sve-ptrace_Set_SVE_VL_816: pass
arm64_sve-ptrace_Set_SVE_VL_8160: pass
arm64_sve-ptrace_Set_SVE_VL_8176: pass
arm64_sve-ptrace_Set_SVE_VL_8192: pass
arm64_sve-ptrace_Set_SVE_VL_832: pass
arm64_sve-ptrace_Set_SVE_VL_848: pass
arm64_sve-ptrace_Set_SVE_VL_864: pass
arm64_sve-ptrace_Set_SVE_VL_880: pass
arm64_sve-ptrace_Set_SVE_VL_896: pass
arm64_sve-ptrace_Set_SVE_VL_912: pass
arm64_sve-ptrace_Set_SVE_VL_928: pass
arm64_sve-ptrace_Set_SVE_VL_944: pass
arm64_sve-ptrace_Set_SVE_VL_96: pass
arm64_sve-ptrace_Set_SVE_VL_960: pass
arm64_sve-ptrace_Set_SVE_VL_976: pass
arm64_sve-ptrace_Set_SVE_VL_992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_1984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_2992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_3984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_48: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_4992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_5984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6288: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6304: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6320: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6336: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6352: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6368: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6384: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6400: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6416: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6432: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6448: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6464: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6480: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6496: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6512: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6528: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6544: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6560: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6576: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6592: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6608: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6624: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6640: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6656: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_672: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_688: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_6992: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7008: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7024: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_704: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7040: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7056: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7072: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7088: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7104: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7120: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7136: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7152: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7168: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7184: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_720: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7200: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7216: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7232: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7248: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7264: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7280: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7296: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7312: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7328: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7344: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_736: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7360: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7376: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7392: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7408: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7424: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7440: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7456: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7472: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7488: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7504: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_752: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7520: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7536: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7552: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7568: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7584: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7600: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7616: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7632: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7648: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7664: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_768: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7680: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7696: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7712: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7728: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7744: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7760: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7776: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7792: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7808: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7824: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_784: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7840: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7856: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7872: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7888: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7904: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7920: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7936: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7952: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7968: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_7984: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_80: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_800: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8000: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8016: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8032: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8048: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8064: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8080: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8096: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_816: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_8192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_832: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_848: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_864: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_880: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_896: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_912: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_928: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_944: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_96: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_960: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_976: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_992: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_112: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_128: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_144: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_160: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_176: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_192: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_208: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_224: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_240: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_256: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_48: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_80: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_96: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_112: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_128: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_144: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_160: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_176: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_192: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_208: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_224: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_240: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_256: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_48: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_80: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_96: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_128: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_256: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64: pass
arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0: pass
arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared: pass
arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set: pass
arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state: pass
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_1984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_2992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_3984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_4992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_5984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6288: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6304: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6320: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6336: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6352: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6368: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6384: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6400: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6416: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6432: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6448: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6464: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6480: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6496: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6512: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6528: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6544: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6560: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6576: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6592: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6608: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6624: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6640: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6656: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_672: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_688: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_6992: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7008: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7024: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_704: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7040: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7056: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7072: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7088: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7104: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7120: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7136: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7152: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7168: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7184: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_720: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7200: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7216: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7232: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7248: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7264: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7280: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7296: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7312: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7328: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7344: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_736: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7360: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7376: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7392: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7408: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7424: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7440: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7456: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7472: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7488: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7504: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_752: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7520: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7536: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7552: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7568: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7584: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7600: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7616: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7632: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7648: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7664: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_768: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7680: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7696: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7712: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7728: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7744: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7760: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7776: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7792: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7808: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7824: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_784: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7840: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7856: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7872: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7888: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7904: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7920: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7936: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7952: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7968: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_7984: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_800: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8000: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8016: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8032: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8048: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8064: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8080: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8096: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_816: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_8192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_832: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_848: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_864: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_880: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_896: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_912: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_928: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_944: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_960: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_976: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_992: skip
arm64_sve_regs: pass
arm64_sve_vl: pass
arm64_syscall-abi: pass
arm64_syscall-abi_getpid_FPSIMD: pass
arm64_syscall-abi_getpid_SVE_VL_112: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_112_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_128_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_144_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16: pass
arm64_syscall-abi_getpid_SVE_VL_160: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_160_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_176_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_192_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_208_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_224_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_240_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_256_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_48_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_80_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_128_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_256_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_96_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_FPSIMD: pass
arm64_syscall-abi_sched_yield_SVE_VL_112: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_112_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_128_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_144_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16: pass
arm64_syscall-abi_sched_yield_SVE_VL_160: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_160_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_176_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_192_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_208_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_224_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_240_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_256_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_48_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_80_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_128_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_256_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_96_SME_VL_64_ZA: pass
arm64_tags_test: pass
arm64_tpidr2: pass
arm64_tpidr2_default_value: pass
arm64_tpidr2_write_clone_read: pass
arm64_tpidr2_write_fork_read: pass
arm64_tpidr2_write_read: pass
arm64_tpidr2_write_sleep_read: pass
arm64_vec-syscfg: pass
arm64_vec-syscfg_SME_current_VL_is_32: pass
arm64_vec-syscfg_SME_default_vector_length_32: pass
arm64_vec-syscfg_SME_maximum_vector_length_256: pass
arm64_vec-syscfg_SME_minimum_vector_length_16: pass
arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors: pass
arm64_vec-syscfg_SME_prctl_set_min_max: pass
arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32: pass
arm64_vec-syscfg_SME_vector_length_set_on_exec: pass
arm64_vec-syscfg_SME_vector_length_used_default: pass
arm64_vec-syscfg_SME_vector_length_was_inherited: pass
arm64_vec-syscfg_SVE_current_VL_is_64: pass
arm64_vec-syscfg_SVE_default_vector_length_64: pass
arm64_vec-syscfg_SVE_maximum_vector_length_256: pass
arm64_vec-syscfg_SVE_minimum_vector_length_16: pass
arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors: pass
arm64_vec-syscfg_SVE_prctl_set_min_max: pass
arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64: pass
arm64_vec-syscfg_SVE_vector_length_set_on_exec: pass
arm64_vec-syscfg_SVE_vector_length_used_default: pass
arm64_vec-syscfg_SVE_vector_length_was_inherited: pass
arm64_za-fork: pass
arm64_za-fork_fork_test: pass
arm64_za-ptrace: pass
arm64_za-ptrace_Data_match_for_VL_128: pass
arm64_za-ptrace_Data_match_for_VL_16: pass
arm64_za-ptrace_Data_match_for_VL_256: pass
arm64_za-ptrace_Data_match_for_VL_32: pass
arm64_za-ptrace_Data_match_for_VL_64: pass
arm64_za-ptrace_Disabled_ZA_for_VL_1008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_128: pass
arm64_za-ptrace_Disabled_ZA_for_VL_1280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_16: pass
arm64_za-ptrace_Disabled_ZA_for_VL_160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_1984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_256: pass
arm64_za-ptrace_Disabled_ZA_for_VL_2560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_2992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_32: pass
arm64_za-ptrace_Disabled_ZA_for_VL_320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_3984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_48: skip
arm64_za-ptrace_Disabled_ZA_for_VL_480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_4992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_5984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6288: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6304: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6320: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6336: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6352: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6368: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6384: skip
arm64_za-ptrace_Disabled_ZA_for_VL_64: pass
arm64_za-ptrace_Disabled_ZA_for_VL_640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6400: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6416: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6432: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6448: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6464: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6480: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6496: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6512: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6528: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6544: skip
arm64_za-ptrace_Disabled_ZA_for_VL_656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6560: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6576: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6592: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6608: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6624: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6640: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6656: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_672: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_688: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_6992: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7008: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7024: skip
arm64_za-ptrace_Disabled_ZA_for_VL_704: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7040: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7056: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7072: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7088: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7104: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7120: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7136: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7152: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7168: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7184: skip
arm64_za-ptrace_Disabled_ZA_for_VL_720: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7200: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7216: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7232: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7248: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7264: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7280: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7296: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7312: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7328: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7344: skip
arm64_za-ptrace_Disabled_ZA_for_VL_736: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7360: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7376: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7392: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7408: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7424: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7440: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7456: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7472: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7488: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7504: skip
arm64_za-ptrace_Disabled_ZA_for_VL_752: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7520: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7536: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7552: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7568: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7584: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7600: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7616: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7632: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7648: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7664: skip
arm64_za-ptrace_Disabled_ZA_for_VL_768: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7680: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7696: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7712: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7728: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7744: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7760: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7776: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7792: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7808: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7824: skip
arm64_za-ptrace_Disabled_ZA_for_VL_784: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7840: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7856: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7872: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7888: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7904: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7920: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7936: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7952: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7968: skip
arm64_za-ptrace_Disabled_ZA_for_VL_7984: skip
arm64_za-ptrace_Disabled_ZA_for_VL_80: skip
arm64_za-ptrace_Disabled_ZA_for_VL_800: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8000: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8016: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8032: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8048: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8064: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8080: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8096: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_816: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_8192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_832: skip
arm64_za-ptrace_Disabled_ZA_for_VL_848: skip
arm64_za-ptrace_Disabled_ZA_for_VL_864: skip
arm64_za-ptrace_Disabled_ZA_for_VL_880: skip
arm64_za-ptrace_Disabled_ZA_for_VL_896: skip
arm64_za-ptrace_Disabled_ZA_for_VL_912: skip
arm64_za-ptrace_Disabled_ZA_for_VL_928: skip
arm64_za-ptrace_Disabled_ZA_for_VL_944: skip
arm64_za-ptrace_Disabled_ZA_for_VL_96: skip
arm64_za-ptrace_Disabled_ZA_for_VL_960: skip
arm64_za-ptrace_Disabled_ZA_for_VL_976: skip
arm64_za-ptrace_Disabled_ZA_for_VL_992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_1984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_2992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_3984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_48: skip
arm64_za-ptrace_Get_and_set_data_for_VL_480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_4992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_5984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6288: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6304: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6320: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6336: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6352: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6368: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6384: skip
arm64_za-ptrace_Get_and_set_data_for_VL_640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6400: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6416: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6432: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6448: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6464: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6480: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6496: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6512: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6528: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6544: skip
arm64_za-ptrace_Get_and_set_data_for_VL_656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6560: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6576: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6592: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6608: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6624: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6640: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6656: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_672: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_688: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_6992: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7008: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7024: skip
arm64_za-ptrace_Get_and_set_data_for_VL_704: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7040: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7056: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7072: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7088: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7104: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7120: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7136: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7152: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7168: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7184: skip
arm64_za-ptrace_Get_and_set_data_for_VL_720: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7200: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7216: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7232: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7248: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7264: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7280: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7296: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7312: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7328: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7344: skip
arm64_za-ptrace_Get_and_set_data_for_VL_736: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7360: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7376: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7392: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7408: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7424: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7440: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7456: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7472: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7488: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7504: skip
arm64_za-ptrace_Get_and_set_data_for_VL_752: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7520: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7536: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7552: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7568: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7584: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7600: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7616: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7632: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7648: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7664: skip
arm64_za-ptrace_Get_and_set_data_for_VL_768: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7680: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7696: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7712: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7728: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7744: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7760: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7776: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7792: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7808: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7824: skip
arm64_za-ptrace_Get_and_set_data_for_VL_784: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7840: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7856: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7872: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7888: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7904: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7920: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7936: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7952: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7968: skip
arm64_za-ptrace_Get_and_set_data_for_VL_7984: skip
arm64_za-ptrace_Get_and_set_data_for_VL_80: skip
arm64_za-ptrace_Get_and_set_data_for_VL_800: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8000: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8016: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8032: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8048: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8064: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8080: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8096: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_816: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_8192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_832: skip
arm64_za-ptrace_Get_and_set_data_for_VL_848: skip
arm64_za-ptrace_Get_and_set_data_for_VL_864: skip
arm64_za-ptrace_Get_and_set_data_for_VL_880: skip
arm64_za-ptrace_Get_and_set_data_for_VL_896: skip
arm64_za-ptrace_Get_and_set_data_for_VL_912: skip
arm64_za-ptrace_Get_and_set_data_for_VL_928: skip
arm64_za-ptrace_Get_and_set_data_for_VL_944: skip
arm64_za-ptrace_Get_and_set_data_for_VL_96: skip
arm64_za-ptrace_Get_and_set_data_for_VL_960: skip
arm64_za-ptrace_Get_and_set_data_for_VL_976: skip
arm64_za-ptrace_Get_and_set_data_for_VL_992: skip
arm64_za-ptrace_Set_VL_1008: pass
arm64_za-ptrace_Set_VL_1024: pass
arm64_za-ptrace_Set_VL_1040: pass
arm64_za-ptrace_Set_VL_1056: pass
arm64_za-ptrace_Set_VL_1072: pass
arm64_za-ptrace_Set_VL_1088: pass
arm64_za-ptrace_Set_VL_1104: pass
arm64_za-ptrace_Set_VL_112: pass
arm64_za-ptrace_Set_VL_1120: pass
arm64_za-ptrace_Set_VL_1136: pass
arm64_za-ptrace_Set_VL_1152: pass
arm64_za-ptrace_Set_VL_1168: pass
arm64_za-ptrace_Set_VL_1184: pass
arm64_za-ptrace_Set_VL_1200: pass
arm64_za-ptrace_Set_VL_1216: pass
arm64_za-ptrace_Set_VL_1232: pass
arm64_za-ptrace_Set_VL_1248: pass
arm64_za-ptrace_Set_VL_1264: pass
arm64_za-ptrace_Set_VL_128: pass
arm64_za-ptrace_Set_VL_1280: pass
arm64_za-ptrace_Set_VL_1296: pass
arm64_za-ptrace_Set_VL_1312: pass
arm64_za-ptrace_Set_VL_1328: pass
arm64_za-ptrace_Set_VL_1344: pass
arm64_za-ptrace_Set_VL_1360: pass
arm64_za-ptrace_Set_VL_1376: pass
arm64_za-ptrace_Set_VL_1392: pass
arm64_za-ptrace_Set_VL_1408: pass
arm64_za-ptrace_Set_VL_1424: pass
arm64_za-ptrace_Set_VL_144: pass
arm64_za-ptrace_Set_VL_1440: pass
arm64_za-ptrace_Set_VL_1456: pass
arm64_za-ptrace_Set_VL_1472: pass
arm64_za-ptrace_Set_VL_1488: pass
arm64_za-ptrace_Set_VL_1504: pass
arm64_za-ptrace_Set_VL_1520: pass
arm64_za-ptrace_Set_VL_1536: pass
arm64_za-ptrace_Set_VL_1552: pass
arm64_za-ptrace_Set_VL_1568: pass
arm64_za-ptrace_Set_VL_1584: pass
arm64_za-ptrace_Set_VL_16: pass
arm64_za-ptrace_Set_VL_160: pass
arm64_za-ptrace_Set_VL_1600: pass
arm64_za-ptrace_Set_VL_1616: pass
arm64_za-ptrace_Set_VL_1632: pass
arm64_za-ptrace_Set_VL_1648: pass
arm64_za-ptrace_Set_VL_1664: pass
arm64_za-ptrace_Set_VL_1680: pass
arm64_za-ptrace_Set_VL_1696: pass
arm64_za-ptrace_Set_VL_1712: pass
arm64_za-ptrace_Set_VL_1728: pass
arm64_za-ptrace_Set_VL_1744: pass
arm64_za-ptrace_Set_VL_176: pass
arm64_za-ptrace_Set_VL_1760: pass
arm64_za-ptrace_Set_VL_1776: pass
arm64_za-ptrace_Set_VL_1792: pass
arm64_za-ptrace_Set_VL_1808: pass
arm64_za-ptrace_Set_VL_1824: pass
arm64_za-ptrace_Set_VL_1840: pass
arm64_za-ptrace_Set_VL_1856: pass
arm64_za-ptrace_Set_VL_1872: pass
arm64_za-ptrace_Set_VL_1888: pass
arm64_za-ptrace_Set_VL_1904: pass
arm64_za-ptrace_Set_VL_192: pass
arm64_za-ptrace_Set_VL_1920: pass
arm64_za-ptrace_Set_VL_1936: pass
arm64_za-ptrace_Set_VL_1952: pass
arm64_za-ptrace_Set_VL_1968: pass
arm64_za-ptrace_Set_VL_1984: pass
arm64_za-ptrace_Set_VL_2000: pass
arm64_za-ptrace_Set_VL_2016: pass
arm64_za-ptrace_Set_VL_2032: pass
arm64_za-ptrace_Set_VL_2048: pass
arm64_za-ptrace_Set_VL_2064: pass
arm64_za-ptrace_Set_VL_208: pass
arm64_za-ptrace_Set_VL_2080: pass
arm64_za-ptrace_Set_VL_2096: pass
arm64_za-ptrace_Set_VL_2112: pass
arm64_za-ptrace_Set_VL_2128: pass
arm64_za-ptrace_Set_VL_2144: pass
arm64_za-ptrace_Set_VL_2160: pass
arm64_za-ptrace_Set_VL_2176: pass
arm64_za-ptrace_Set_VL_2192: pass
arm64_za-ptrace_Set_VL_2208: pass
arm64_za-ptrace_Set_VL_2224: pass
arm64_za-ptrace_Set_VL_224: pass
arm64_za-ptrace_Set_VL_2240: pass
arm64_za-ptrace_Set_VL_2256: pass
arm64_za-ptrace_Set_VL_2272: pass
arm64_za-ptrace_Set_VL_2288: pass
arm64_za-ptrace_Set_VL_2304: pass
arm64_za-ptrace_Set_VL_2320: pass
arm64_za-ptrace_Set_VL_2336: pass
arm64_za-ptrace_Set_VL_2352: pass
arm64_za-ptrace_Set_VL_2368: pass
arm64_za-ptrace_Set_VL_2384: pass
arm64_za-ptrace_Set_VL_240: pass
arm64_za-ptrace_Set_VL_2400: pass
arm64_za-ptrace_Set_VL_2416: pass
arm64_za-ptrace_Set_VL_2432: pass
arm64_za-ptrace_Set_VL_2448: pass
arm64_za-ptrace_Set_VL_2464: pass
arm64_za-ptrace_Set_VL_2480: pass
arm64_za-ptrace_Set_VL_2496: pass
arm64_za-ptrace_Set_VL_2512: pass
arm64_za-ptrace_Set_VL_2528: pass
arm64_za-ptrace_Set_VL_2544: pass
arm64_za-ptrace_Set_VL_256: pass
arm64_za-ptrace_Set_VL_2560: pass
arm64_za-ptrace_Set_VL_2576: pass
arm64_za-ptrace_Set_VL_2592: pass
arm64_za-ptrace_Set_VL_2608: pass
arm64_za-ptrace_Set_VL_2624: pass
arm64_za-ptrace_Set_VL_2640: pass
arm64_za-ptrace_Set_VL_2656: pass
arm64_za-ptrace_Set_VL_2672: pass
arm64_za-ptrace_Set_VL_2688: pass
arm64_za-ptrace_Set_VL_2704: pass
arm64_za-ptrace_Set_VL_272: pass
arm64_za-ptrace_Set_VL_2720: pass
arm64_za-ptrace_Set_VL_2736: pass
arm64_za-ptrace_Set_VL_2752: pass
arm64_za-ptrace_Set_VL_2768: pass
arm64_za-ptrace_Set_VL_2784: pass
arm64_za-ptrace_Set_VL_2800: pass
arm64_za-ptrace_Set_VL_2816: pass
arm64_za-ptrace_Set_VL_2832: pass
arm64_za-ptrace_Set_VL_2848: pass
arm64_za-ptrace_Set_VL_2864: pass
arm64_za-ptrace_Set_VL_288: pass
arm64_za-ptrace_Set_VL_2880: pass
arm64_za-ptrace_Set_VL_2896: pass
arm64_za-ptrace_Set_VL_2912: pass
arm64_za-ptrace_Set_VL_2928: pass
arm64_za-ptrace_Set_VL_2944: pass
arm64_za-ptrace_Set_VL_2960: pass
arm64_za-ptrace_Set_VL_2976: pass
arm64_za-ptrace_Set_VL_2992: pass
arm64_za-ptrace_Set_VL_3008: pass
arm64_za-ptrace_Set_VL_3024: pass
arm64_za-ptrace_Set_VL_304: pass
arm64_za-ptrace_Set_VL_3040: pass
arm64_za-ptrace_Set_VL_3056: pass
arm64_za-ptrace_Set_VL_3072: pass
arm64_za-ptrace_Set_VL_3088: pass
arm64_za-ptrace_Set_VL_3104: pass
arm64_za-ptrace_Set_VL_3120: pass
arm64_za-ptrace_Set_VL_3136: pass
arm64_za-ptrace_Set_VL_3152: pass
arm64_za-ptrace_Set_VL_3168: pass
arm64_za-ptrace_Set_VL_3184: pass
arm64_za-ptrace_Set_VL_32: pass
arm64_za-ptrace_Set_VL_320: pass
arm64_za-ptrace_Set_VL_3200: pass
arm64_za-ptrace_Set_VL_3216: pass
arm64_za-ptrace_Set_VL_3232: pass
arm64_za-ptrace_Set_VL_3248: pass
arm64_za-ptrace_Set_VL_3264: pass
arm64_za-ptrace_Set_VL_3280: pass
arm64_za-ptrace_Set_VL_3296: pass
arm64_za-ptrace_Set_VL_3312: pass
arm64_za-ptrace_Set_VL_3328: pass
arm64_za-ptrace_Set_VL_3344: pass
arm64_za-ptrace_Set_VL_336: pass
arm64_za-ptrace_Set_VL_3360: pass
arm64_za-ptrace_Set_VL_3376: pass
arm64_za-ptrace_Set_VL_3392: pass
arm64_za-ptrace_Set_VL_3408: pass
arm64_za-ptrace_Set_VL_3424: pass
arm64_za-ptrace_Set_VL_3440: pass
arm64_za-ptrace_Set_VL_3456: pass
arm64_za-ptrace_Set_VL_3472: pass
arm64_za-ptrace_Set_VL_3488: pass
arm64_za-ptrace_Set_VL_3504: pass
arm64_za-ptrace_Set_VL_352: pass
arm64_za-ptrace_Set_VL_3520: pass
arm64_za-ptrace_Set_VL_3536: pass
arm64_za-ptrace_Set_VL_3552: pass
arm64_za-ptrace_Set_VL_3568: pass
arm64_za-ptrace_Set_VL_3584: pass
arm64_za-ptrace_Set_VL_3600: pass
arm64_za-ptrace_Set_VL_3616: pass
arm64_za-ptrace_Set_VL_3632: pass
arm64_za-ptrace_Set_VL_3648: pass
arm64_za-ptrace_Set_VL_3664: pass
arm64_za-ptrace_Set_VL_368: pass
arm64_za-ptrace_Set_VL_3680: pass
arm64_za-ptrace_Set_VL_3696: pass
arm64_za-ptrace_Set_VL_3712: pass
arm64_za-ptrace_Set_VL_3728: pass
arm64_za-ptrace_Set_VL_3744: pass
arm64_za-ptrace_Set_VL_3760: pass
arm64_za-ptrace_Set_VL_3776: pass
arm64_za-ptrace_Set_VL_3792: pass
arm64_za-ptrace_Set_VL_3808: pass
arm64_za-ptrace_Set_VL_3824: pass
arm64_za-ptrace_Set_VL_384: pass
arm64_za-ptrace_Set_VL_3840: pass
arm64_za-ptrace_Set_VL_3856: pass
arm64_za-ptrace_Set_VL_3872: pass
arm64_za-ptrace_Set_VL_3888: pass
arm64_za-ptrace_Set_VL_3904: pass
arm64_za-ptrace_Set_VL_3920: pass
arm64_za-ptrace_Set_VL_3936: pass
arm64_za-ptrace_Set_VL_3952: pass
arm64_za-ptrace_Set_VL_3968: pass
arm64_za-ptrace_Set_VL_3984: pass
arm64_za-ptrace_Set_VL_400: pass
arm64_za-ptrace_Set_VL_4000: pass
arm64_za-ptrace_Set_VL_4016: pass
arm64_za-ptrace_Set_VL_4032: pass
arm64_za-ptrace_Set_VL_4048: pass
arm64_za-ptrace_Set_VL_4064: pass
arm64_za-ptrace_Set_VL_4080: pass
arm64_za-ptrace_Set_VL_4096: pass
arm64_za-ptrace_Set_VL_4112: pass
arm64_za-ptrace_Set_VL_4128: pass
arm64_za-ptrace_Set_VL_4144: pass
arm64_za-ptrace_Set_VL_416: pass
arm64_za-ptrace_Set_VL_4160: pass
arm64_za-ptrace_Set_VL_4176: pass
arm64_za-ptrace_Set_VL_4192: pass
arm64_za-ptrace_Set_VL_4208: pass
arm64_za-ptrace_Set_VL_4224: pass
arm64_za-ptrace_Set_VL_4240: pass
arm64_za-ptrace_Set_VL_4256: pass
arm64_za-ptrace_Set_VL_4272: pass
arm64_za-ptrace_Set_VL_4288: pass
arm64_za-ptrace_Set_VL_4304: pass
arm64_za-ptrace_Set_VL_432: pass
arm64_za-ptrace_Set_VL_4320: pass
arm64_za-ptrace_Set_VL_4336: pass
arm64_za-ptrace_Set_VL_4352: pass
arm64_za-ptrace_Set_VL_4368: pass
arm64_za-ptrace_Set_VL_4384: pass
arm64_za-ptrace_Set_VL_4400: pass
arm64_za-ptrace_Set_VL_4416: pass
arm64_za-ptrace_Set_VL_4432: pass
arm64_za-ptrace_Set_VL_4448: pass
arm64_za-ptrace_Set_VL_4464: pass
arm64_za-ptrace_Set_VL_448: pass
arm64_za-ptrace_Set_VL_4480: pass
arm64_za-ptrace_Set_VL_4496: pass
arm64_za-ptrace_Set_VL_4512: pass
arm64_za-ptrace_Set_VL_4528: pass
arm64_za-ptrace_Set_VL_4544: pass
arm64_za-ptrace_Set_VL_4560: pass
arm64_za-ptrace_Set_VL_4576: pass
arm64_za-ptrace_Set_VL_4592: pass
arm64_za-ptrace_Set_VL_4608: pass
arm64_za-ptrace_Set_VL_4624: pass
arm64_za-ptrace_Set_VL_464: pass
arm64_za-ptrace_Set_VL_4640: pass
arm64_za-ptrace_Set_VL_4656: pass
arm64_za-ptrace_Set_VL_4672: pass
arm64_za-ptrace_Set_VL_4688: pass
arm64_za-ptrace_Set_VL_4704: pass
arm64_za-ptrace_Set_VL_4720: pass
arm64_za-ptrace_Set_VL_4736: pass
arm64_za-ptrace_Set_VL_4752: pass
arm64_za-ptrace_Set_VL_4768: pass
arm64_za-ptrace_Set_VL_4784: pass
arm64_za-ptrace_Set_VL_48: pass
arm64_za-ptrace_Set_VL_480: pass
arm64_za-ptrace_Set_VL_4800: pass
arm64_za-ptrace_Set_VL_4816: pass
arm64_za-ptrace_Set_VL_4832: pass
arm64_za-ptrace_Set_VL_4848: pass
arm64_za-ptrace_Set_VL_4864: pass
arm64_za-ptrace_Set_VL_4880: pass
arm64_za-ptrace_Set_VL_4896: pass
arm64_za-ptrace_Set_VL_4912: pass
arm64_za-ptrace_Set_VL_4928: pass
arm64_za-ptrace_Set_VL_4944: pass
arm64_za-ptrace_Set_VL_496: pass
arm64_za-ptrace_Set_VL_4960: pass
arm64_za-ptrace_Set_VL_4976: pass
arm64_za-ptrace_Set_VL_4992: pass
arm64_za-ptrace_Set_VL_5008: pass
arm64_za-ptrace_Set_VL_5024: pass
arm64_za-ptrace_Set_VL_5040: pass
arm64_za-ptrace_Set_VL_5056: pass
arm64_za-ptrace_Set_VL_5072: pass
arm64_za-ptrace_Set_VL_5088: pass
arm64_za-ptrace_Set_VL_5104: pass
arm64_za-ptrace_Set_VL_512: pass
arm64_za-ptrace_Set_VL_5120: pass
arm64_za-ptrace_Set_VL_5136: pass
arm64_za-ptrace_Set_VL_5152: pass
arm64_za-ptrace_Set_VL_5168: pass
arm64_za-ptrace_Set_VL_5184: pass
arm64_za-ptrace_Set_VL_5200: pass
arm64_za-ptrace_Set_VL_5216: pass
arm64_za-ptrace_Set_VL_5232: pass
arm64_za-ptrace_Set_VL_5248: pass
arm64_za-ptrace_Set_VL_5264: pass
arm64_za-ptrace_Set_VL_528: pass
arm64_za-ptrace_Set_VL_5280: pass
arm64_za-ptrace_Set_VL_5296: pass
arm64_za-ptrace_Set_VL_5312: pass
arm64_za-ptrace_Set_VL_5328: pass
arm64_za-ptrace_Set_VL_5344: pass
arm64_za-ptrace_Set_VL_5360: pass
arm64_za-ptrace_Set_VL_5376: pass
arm64_za-ptrace_Set_VL_5392: pass
arm64_za-ptrace_Set_VL_5408: pass
arm64_za-ptrace_Set_VL_5424: pass
arm64_za-ptrace_Set_VL_544: pass
arm64_za-ptrace_Set_VL_5440: pass
arm64_za-ptrace_Set_VL_5456: pass
arm64_za-ptrace_Set_VL_5472: pass
arm64_za-ptrace_Set_VL_5488: pass
arm64_za-ptrace_Set_VL_5504: pass
arm64_za-ptrace_Set_VL_5520: pass
arm64_za-ptrace_Set_VL_5536: pass
arm64_za-ptrace_Set_VL_5552: pass
arm64_za-ptrace_Set_VL_5568: pass
arm64_za-ptrace_Set_VL_5584: pass
arm64_za-ptrace_Set_VL_560: pass
arm64_za-ptrace_Set_VL_5600: pass
arm64_za-ptrace_Set_VL_5616: pass
arm64_za-ptrace_Set_VL_5632: pass
arm64_za-ptrace_Set_VL_5648: pass
arm64_za-ptrace_Set_VL_5664: pass
arm64_za-ptrace_Set_VL_5680: pass
arm64_za-ptrace_Set_VL_5696: pass
arm64_za-ptrace_Set_VL_5712: pass
arm64_za-ptrace_Set_VL_5728: pass
arm64_za-ptrace_Set_VL_5744: pass
arm64_za-ptrace_Set_VL_576: pass
arm64_za-ptrace_Set_VL_5760: pass
arm64_za-ptrace_Set_VL_5776: pass
arm64_za-ptrace_Set_VL_5792: pass
arm64_za-ptrace_Set_VL_5808: pass
arm64_za-ptrace_Set_VL_5824: pass
arm64_za-ptrace_Set_VL_5840: pass
arm64_za-ptrace_Set_VL_5856: pass
arm64_za-ptrace_Set_VL_5872: pass
arm64_za-ptrace_Set_VL_5888: pass
arm64_za-ptrace_Set_VL_5904: pass
arm64_za-ptrace_Set_VL_592: pass
arm64_za-ptrace_Set_VL_5920: pass
arm64_za-ptrace_Set_VL_5936: pass
arm64_za-ptrace_Set_VL_5952: pass
arm64_za-ptrace_Set_VL_5968: pass
arm64_za-ptrace_Set_VL_5984: pass
arm64_za-ptrace_Set_VL_6000: pass
arm64_za-ptrace_Set_VL_6016: pass
arm64_za-ptrace_Set_VL_6032: pass
arm64_za-ptrace_Set_VL_6048: pass
arm64_za-ptrace_Set_VL_6064: pass
arm64_za-ptrace_Set_VL_608: pass
arm64_za-ptrace_Set_VL_6080: pass
arm64_za-ptrace_Set_VL_6096: pass
arm64_za-ptrace_Set_VL_6112: pass
arm64_za-ptrace_Set_VL_6128: pass
arm64_za-ptrace_Set_VL_6144: pass
arm64_za-ptrace_Set_VL_6160: pass
arm64_za-ptrace_Set_VL_6176: pass
arm64_za-ptrace_Set_VL_6192: pass
arm64_za-ptrace_Set_VL_6208: pass
arm64_za-ptrace_Set_VL_6224: pass
arm64_za-ptrace_Set_VL_624: pass
arm64_za-ptrace_Set_VL_6240: pass
arm64_za-ptrace_Set_VL_6256: pass
arm64_za-ptrace_Set_VL_6272: pass
arm64_za-ptrace_Set_VL_6288: pass
arm64_za-ptrace_Set_VL_6304: pass
arm64_za-ptrace_Set_VL_6320: pass
arm64_za-ptrace_Set_VL_6336: pass
arm64_za-ptrace_Set_VL_6352: pass
arm64_za-ptrace_Set_VL_6368: pass
arm64_za-ptrace_Set_VL_6384: pass
arm64_za-ptrace_Set_VL_64: pass
arm64_za-ptrace_Set_VL_640: pass
arm64_za-ptrace_Set_VL_6400: pass
arm64_za-ptrace_Set_VL_6416: pass
arm64_za-ptrace_Set_VL_6432: pass
arm64_za-ptrace_Set_VL_6448: pass
arm64_za-ptrace_Set_VL_6464: pass
arm64_za-ptrace_Set_VL_6480: pass
arm64_za-ptrace_Set_VL_6496: pass
arm64_za-ptrace_Set_VL_6512: pass
arm64_za-ptrace_Set_VL_6528: pass
arm64_za-ptrace_Set_VL_6544: pass
arm64_za-ptrace_Set_VL_656: pass
arm64_za-ptrace_Set_VL_6560: pass
arm64_za-ptrace_Set_VL_6576: pass
arm64_za-ptrace_Set_VL_6592: pass
arm64_za-ptrace_Set_VL_6608: pass
arm64_za-ptrace_Set_VL_6624: pass
arm64_za-ptrace_Set_VL_6640: pass
arm64_za-ptrace_Set_VL_6656: pass
arm64_za-ptrace_Set_VL_6672: pass
arm64_za-ptrace_Set_VL_6688: pass
arm64_za-ptrace_Set_VL_6704: pass
arm64_za-ptrace_Set_VL_672: pass
arm64_za-ptrace_Set_VL_6720: pass
arm64_za-ptrace_Set_VL_6736: pass
arm64_za-ptrace_Set_VL_6752: pass
arm64_za-ptrace_Set_VL_6768: pass
arm64_za-ptrace_Set_VL_6784: pass
arm64_za-ptrace_Set_VL_6800: pass
arm64_za-ptrace_Set_VL_6816: pass
arm64_za-ptrace_Set_VL_6832: pass
arm64_za-ptrace_Set_VL_6848: pass
arm64_za-ptrace_Set_VL_6864: pass
arm64_za-ptrace_Set_VL_688: pass
arm64_za-ptrace_Set_VL_6880: pass
arm64_za-ptrace_Set_VL_6896: pass
arm64_za-ptrace_Set_VL_6912: pass
arm64_za-ptrace_Set_VL_6928: pass
arm64_za-ptrace_Set_VL_6944: pass
arm64_za-ptrace_Set_VL_6960: pass
arm64_za-ptrace_Set_VL_6976: pass
arm64_za-ptrace_Set_VL_6992: pass
arm64_za-ptrace_Set_VL_7008: pass
arm64_za-ptrace_Set_VL_7024: pass
arm64_za-ptrace_Set_VL_704: pass
arm64_za-ptrace_Set_VL_7040: pass
arm64_za-ptrace_Set_VL_7056: pass
arm64_za-ptrace_Set_VL_7072: pass
arm64_za-ptrace_Set_VL_7088: pass
arm64_za-ptrace_Set_VL_7104: pass
arm64_za-ptrace_Set_VL_7120: pass
arm64_za-ptrace_Set_VL_7136: pass
arm64_za-ptrace_Set_VL_7152: pass
arm64_za-ptrace_Set_VL_7168: pass
arm64_za-ptrace_Set_VL_7184: pass
arm64_za-ptrace_Set_VL_720: pass
arm64_za-ptrace_Set_VL_7200: pass
arm64_za-ptrace_Set_VL_7216: pass
arm64_za-ptrace_Set_VL_7232: pass
arm64_za-ptrace_Set_VL_7248: pass
arm64_za-ptrace_Set_VL_7264: pass
arm64_za-ptrace_Set_VL_7280: pass
arm64_za-ptrace_Set_VL_7296: pass
arm64_za-ptrace_Set_VL_7312: pass
arm64_za-ptrace_Set_VL_7328: pass
arm64_za-ptrace_Set_VL_7344: pass
arm64_za-ptrace_Set_VL_736: pass
arm64_za-ptrace_Set_VL_7360: pass
arm64_za-ptrace_Set_VL_7376: pass
arm64_za-ptrace_Set_VL_7392: pass
arm64_za-ptrace_Set_VL_7408: pass
arm64_za-ptrace_Set_VL_7424: pass
arm64_za-ptrace_Set_VL_7440: pass
arm64_za-ptrace_Set_VL_7456: pass
arm64_za-ptrace_Set_VL_7472: pass
arm64_za-ptrace_Set_VL_7488: pass
arm64_za-ptrace_Set_VL_7504: pass
arm64_za-ptrace_Set_VL_752: pass
arm64_za-ptrace_Set_VL_7520: pass
arm64_za-ptrace_Set_VL_7536: pass
arm64_za-ptrace_Set_VL_7552: pass
arm64_za-ptrace_Set_VL_7568: pass
arm64_za-ptrace_Set_VL_7584: pass
arm64_za-ptrace_Set_VL_7600: pass
arm64_za-ptrace_Set_VL_7616: pass
arm64_za-ptrace_Set_VL_7632: pass
arm64_za-ptrace_Set_VL_7648: pass
arm64_za-ptrace_Set_VL_7664: pass
arm64_za-ptrace_Set_VL_768: pass
arm64_za-ptrace_Set_VL_7680: pass
arm64_za-ptrace_Set_VL_7696: pass
arm64_za-ptrace_Set_VL_7712: pass
arm64_za-ptrace_Set_VL_7728: pass
arm64_za-ptrace_Set_VL_7744: pass
arm64_za-ptrace_Set_VL_7760: pass
arm64_za-ptrace_Set_VL_7776: pass
arm64_za-ptrace_Set_VL_7792: pass
arm64_za-ptrace_Set_VL_7808: pass
arm64_za-ptrace_Set_VL_7824: pass
arm64_za-ptrace_Set_VL_784: pass
arm64_za-ptrace_Set_VL_7840: pass
arm64_za-ptrace_Set_VL_7856: pass
arm64_za-ptrace_Set_VL_7872: pass
arm64_za-ptrace_Set_VL_7888: pass
arm64_za-ptrace_Set_VL_7904: pass
arm64_za-ptrace_Set_VL_7920: pass
arm64_za-ptrace_Set_VL_7936: pass
arm64_za-ptrace_Set_VL_7952: pass
arm64_za-ptrace_Set_VL_7968: pass
arm64_za-ptrace_Set_VL_7984: pass
arm64_za-ptrace_Set_VL_80: pass
arm64_za-ptrace_Set_VL_800: pass
arm64_za-ptrace_Set_VL_8000: pass
arm64_za-ptrace_Set_VL_8016: pass
arm64_za-ptrace_Set_VL_8032: pass
arm64_za-ptrace_Set_VL_8048: pass
arm64_za-ptrace_Set_VL_8064: pass
arm64_za-ptrace_Set_VL_8080: pass
arm64_za-ptrace_Set_VL_8096: pass
arm64_za-ptrace_Set_VL_8112: pass
arm64_za-ptrace_Set_VL_8128: pass
arm64_za-ptrace_Set_VL_8144: pass
arm64_za-ptrace_Set_VL_816: pass
arm64_za-ptrace_Set_VL_8160: pass
arm64_za-ptrace_Set_VL_8176: pass
arm64_za-ptrace_Set_VL_8192: pass
arm64_za-ptrace_Set_VL_832: pass
arm64_za-ptrace_Set_VL_848: pass
arm64_za-ptrace_Set_VL_864: pass
arm64_za-ptrace_Set_VL_880: pass
arm64_za-ptrace_Set_VL_896: pass
arm64_za-ptrace_Set_VL_912: pass
arm64_za-ptrace_Set_VL_928: pass
arm64_za-ptrace_Set_VL_944: pass
arm64_za-ptrace_Set_VL_96: pass
arm64_za-ptrace_Set_VL_960: pass
arm64_za-ptrace_Set_VL_976: pass
arm64_za-ptrace_Set_VL_992: pass
arm64_za_no_regs: pass
arm64_za_regs: pass
34551 23:03:21.801465 end: 3.1 lava-test-shell (duration 00:05:30) [common]
34552 23:03:21.801559 end: 3 lava-test-retry (duration 00:05:30) [common]
34553 23:03:21.801650 start: 4 finalize (timeout 00:03:25) [common]
34554 23:03:21.801735 start: 4.1 power-off (timeout 00:00:30) [common]
34555 23:03:21.801817 end: 4.1 power-off (duration 00:00:00) [common]
34556 23:03:21.801894 start: 4.2 read-feedback (timeout 00:03:25) [common]
34558 23:03:21.802329 Listened to connection for namespace 'common' for up to 1s
34559 23:03:22.807100 Finalising connection for namespace 'common'
34561 23:03:22.907879 / # poweroff
34562 23:03:22.908344 Already disconnected
34563 23:03:22.908513 poweroff
34564 23:03:23.310345 end: 4.2 read-feedback (duration 00:00:02) [common]
34565 23:03:23.310596 Already disconnected
34566 23:03:23.310755 end: 4 finalize (duration 00:00:02) [common]
34567 23:03:23.310925 Cleaning after the job
34568 23:03:23.311103 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/566287/deployimages-7l7yzo33/kernel
34569 23:03:23.318063 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/566287/deployimages-7l7yzo33/ramdisk
34570 23:03:23.333974 Stopping the qemu container lava-docker-qemu-566287-2.1.1-ns0d7d0k4f
34571 23:03:24.000443 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/566287
34572 23:03:24.093766 Job finished correctly