Boot log: mt8192-asurada-spherion-r0
- Kernel Errors: 30
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 24
- Errors: 0
1 10:01:05.490451 lava-dispatcher, installed at version: 2023.05.1
2 10:01:05.490664 start: 0 validate
3 10:01:05.490797 Start time: 2023-06-10 10:01:05.490790+00:00 (UTC)
4 10:01:05.490924 Using caching service: 'http://localhost/cache/?uri=%s'
5 10:01:05.491053 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-igt%2F20230527.0%2Farm64%2Frootfs.cpio.gz exists
6 10:01:05.759495 Using caching service: 'http://localhost/cache/?uri=%s'
7 10:01:05.760230 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.31-45-gce658d9231044%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 10:01:32.041428 Using caching service: 'http://localhost/cache/?uri=%s'
9 10:01:32.042108 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.31-45-gce658d9231044%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8192-asurada-spherion-r0.dtb exists
10 10:01:32.295566 Using caching service: 'http://localhost/cache/?uri=%s'
11 10:01:32.296241 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-6.1.y-cip%2Fv6.1.31-45-gce658d9231044%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 10:01:35.545628 validate duration: 30.05
14 10:01:35.545879 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 10:01:35.545975 start: 1.1 download-retry (timeout 00:10:00) [common]
16 10:01:35.546058 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 10:01:35.546177 Not decompressing ramdisk as can be used compressed.
18 10:01:35.546260 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-igt/20230527.0/arm64/rootfs.cpio.gz
19 10:01:35.546322 saving as /var/lib/lava/dispatcher/tmp/10670673/tftp-deploy-cw7483qk/ramdisk/rootfs.cpio.gz
20 10:01:35.546381 total size: 43394293 (41MB)
21 10:01:35.812166 progress 0% (0MB)
22 10:01:35.823409 progress 5% (2MB)
23 10:01:35.834684 progress 10% (4MB)
24 10:01:35.845947 progress 15% (6MB)
25 10:01:35.857336 progress 20% (8MB)
26 10:01:35.868799 progress 25% (10MB)
27 10:01:35.879784 progress 30% (12MB)
28 10:01:35.890702 progress 35% (14MB)
29 10:01:35.901632 progress 40% (16MB)
30 10:01:35.912581 progress 45% (18MB)
31 10:01:35.923661 progress 50% (20MB)
32 10:01:35.934533 progress 55% (22MB)
33 10:01:35.945519 progress 60% (24MB)
34 10:01:35.960655 progress 65% (26MB)
35 10:01:35.978366 progress 70% (29MB)
36 10:01:35.995794 progress 75% (31MB)
37 10:01:36.013852 progress 80% (33MB)
38 10:01:36.025796 progress 85% (35MB)
39 10:01:36.036687 progress 90% (37MB)
40 10:01:36.047697 progress 95% (39MB)
41 10:01:36.058787 progress 100% (41MB)
42 10:01:36.059067 41MB downloaded in 0.51s (80.72MB/s)
43 10:01:36.059272 end: 1.1.1 http-download (duration 00:00:01) [common]
45 10:01:36.059648 end: 1.1 download-retry (duration 00:00:01) [common]
46 10:01:36.059765 start: 1.2 download-retry (timeout 00:09:59) [common]
47 10:01:36.059879 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 10:01:36.060046 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.31-45-gce658d9231044/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 10:01:36.060144 saving as /var/lib/lava/dispatcher/tmp/10670673/tftp-deploy-cw7483qk/kernel/Image
50 10:01:36.060233 total size: 45746688 (43MB)
51 10:01:36.060322 No compression specified
52 10:01:36.061962 progress 0% (0MB)
53 10:01:36.073679 progress 5% (2MB)
54 10:01:36.085406 progress 10% (4MB)
55 10:01:36.097126 progress 15% (6MB)
56 10:01:36.108761 progress 20% (8MB)
57 10:01:36.120299 progress 25% (10MB)
58 10:01:36.131676 progress 30% (13MB)
59 10:01:36.143285 progress 35% (15MB)
60 10:01:36.155170 progress 40% (17MB)
61 10:01:36.166931 progress 45% (19MB)
62 10:01:36.178803 progress 50% (21MB)
63 10:01:36.190321 progress 55% (24MB)
64 10:01:36.202149 progress 60% (26MB)
65 10:01:36.213915 progress 65% (28MB)
66 10:01:36.225522 progress 70% (30MB)
67 10:01:36.237171 progress 75% (32MB)
68 10:01:36.248515 progress 80% (34MB)
69 10:01:36.260223 progress 85% (37MB)
70 10:01:36.271811 progress 90% (39MB)
71 10:01:36.283545 progress 95% (41MB)
72 10:01:36.294982 progress 100% (43MB)
73 10:01:36.295153 43MB downloaded in 0.23s (185.72MB/s)
74 10:01:36.295304 end: 1.2.1 http-download (duration 00:00:00) [common]
76 10:01:36.295532 end: 1.2 download-retry (duration 00:00:00) [common]
77 10:01:36.295620 start: 1.3 download-retry (timeout 00:09:59) [common]
78 10:01:36.295711 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 10:01:36.295851 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.31-45-gce658d9231044/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8192-asurada-spherion-r0.dtb
80 10:01:36.295924 saving as /var/lib/lava/dispatcher/tmp/10670673/tftp-deploy-cw7483qk/dtb/mt8192-asurada-spherion-r0.dtb
81 10:01:36.295986 total size: 46924 (0MB)
82 10:01:36.296045 No compression specified
83 10:01:36.297206 progress 69% (0MB)
84 10:01:36.297487 progress 100% (0MB)
85 10:01:36.297673 0MB downloaded in 0.00s (26.56MB/s)
86 10:01:36.297796 end: 1.3.1 http-download (duration 00:00:00) [common]
88 10:01:36.298018 end: 1.3 download-retry (duration 00:00:00) [common]
89 10:01:36.298123 start: 1.4 download-retry (timeout 00:09:59) [common]
90 10:01:36.298223 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 10:01:36.298338 downloading http://storage.kernelci.org/cip/linux-6.1.y-cip/v6.1.31-45-gce658d9231044/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 10:01:36.298407 saving as /var/lib/lava/dispatcher/tmp/10670673/tftp-deploy-cw7483qk/modules/modules.tar
93 10:01:36.298469 total size: 8540248 (8MB)
94 10:01:36.298528 Using unxz to decompress xz
95 10:01:36.302298 progress 0% (0MB)
96 10:01:36.325242 progress 5% (0MB)
97 10:01:36.351199 progress 10% (0MB)
98 10:01:36.376551 progress 15% (1MB)
99 10:01:36.403400 progress 20% (1MB)
100 10:01:36.429316 progress 25% (2MB)
101 10:01:36.453714 progress 30% (2MB)
102 10:01:36.480709 progress 35% (2MB)
103 10:01:36.506933 progress 40% (3MB)
104 10:01:36.532343 progress 45% (3MB)
105 10:01:36.561774 progress 50% (4MB)
106 10:01:36.587757 progress 55% (4MB)
107 10:01:36.614887 progress 60% (4MB)
108 10:01:36.640881 progress 65% (5MB)
109 10:01:36.666019 progress 70% (5MB)
110 10:01:36.690053 progress 75% (6MB)
111 10:01:36.713472 progress 80% (6MB)
112 10:01:36.737318 progress 85% (6MB)
113 10:01:36.766516 progress 90% (7MB)
114 10:01:36.791763 progress 95% (7MB)
115 10:01:36.816937 progress 100% (8MB)
116 10:01:36.822317 8MB downloaded in 0.52s (15.55MB/s)
117 10:01:36.822605 end: 1.4.1 http-download (duration 00:00:01) [common]
119 10:01:36.822865 end: 1.4 download-retry (duration 00:00:01) [common]
120 10:01:36.822961 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 10:01:36.823059 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 10:01:36.823143 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 10:01:36.823229 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 10:01:36.823455 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro
125 10:01:36.823583 makedir: /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin
126 10:01:36.823685 makedir: /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/tests
127 10:01:36.823781 makedir: /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/results
128 10:01:36.823896 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-add-keys
129 10:01:36.824042 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-add-sources
130 10:01:36.824172 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-background-process-start
131 10:01:36.824301 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-background-process-stop
132 10:01:36.824425 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-common-functions
133 10:01:36.824547 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-echo-ipv4
134 10:01:36.824669 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-install-packages
135 10:01:36.824790 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-installed-packages
136 10:01:36.824951 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-os-build
137 10:01:36.825074 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-probe-channel
138 10:01:36.825196 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-probe-ip
139 10:01:36.825319 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-target-ip
140 10:01:36.825441 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-target-mac
141 10:01:36.825562 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-target-storage
142 10:01:36.825691 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-test-case
143 10:01:36.825814 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-test-event
144 10:01:36.825935 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-test-feedback
145 10:01:36.826058 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-test-raise
146 10:01:36.826182 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-test-reference
147 10:01:36.826305 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-test-runner
148 10:01:36.826427 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-test-set
149 10:01:36.826550 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-test-shell
150 10:01:36.826675 Updating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-install-packages (oe)
151 10:01:36.826834 Updating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/bin/lava-installed-packages (oe)
152 10:01:36.826955 Creating /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/environment
153 10:01:36.827055 LAVA metadata
154 10:01:36.827130 - LAVA_JOB_ID=10670673
155 10:01:36.827195 - LAVA_DISPATCHER_IP=192.168.201.1
156 10:01:36.827303 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 10:01:36.827372 skipped lava-vland-overlay
158 10:01:36.827447 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 10:01:36.827528 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 10:01:36.827589 skipped lava-multinode-overlay
161 10:01:36.827663 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 10:01:36.827757 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 10:01:36.827831 Loading test definitions
164 10:01:36.827922 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 10:01:36.827997 Using /lava-10670673 at stage 0
166 10:01:36.828293 uuid=10670673_1.5.2.3.1 testdef=None
167 10:01:36.828383 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 10:01:36.828470 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 10:01:36.829036 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 10:01:36.829260 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 10:01:36.829867 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 10:01:36.830099 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 10:01:36.830688 runner path: /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/0/tests/0_igt-kms-mediatek test_uuid 10670673_1.5.2.3.1
176 10:01:36.830844 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 10:01:36.831054 Creating lava-test-runner.conf files
179 10:01:36.831118 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10670673/lava-overlay-2wrnazro/lava-10670673/0 for stage 0
180 10:01:36.831205 - 0_igt-kms-mediatek
181 10:01:36.831300 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 10:01:36.831387 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 10:01:36.837999 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 10:01:36.838109 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 10:01:36.838199 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 10:01:36.838285 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 10:01:36.838376 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 10:01:38.182789 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
189 10:01:38.183187 start: 1.5.4 extract-modules (timeout 00:09:57) [common]
190 10:01:38.183330 extracting modules file /var/lib/lava/dispatcher/tmp/10670673/tftp-deploy-cw7483qk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10670673/extract-overlay-ramdisk-7aa_huqq/ramdisk
191 10:01:38.399033 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 10:01:38.399207 start: 1.5.5 apply-overlay-tftp (timeout 00:09:57) [common]
193 10:01:38.399302 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10670673/compress-overlay-k2k6wy1_/overlay-1.5.2.4.tar.gz to ramdisk
194 10:01:38.399376 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10670673/compress-overlay-k2k6wy1_/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10670673/extract-overlay-ramdisk-7aa_huqq/ramdisk
195 10:01:38.405832 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 10:01:38.405952 start: 1.5.6 configure-preseed-file (timeout 00:09:57) [common]
197 10:01:38.406047 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 10:01:38.406141 start: 1.5.7 compress-ramdisk (timeout 00:09:57) [common]
199 10:01:38.406222 Building ramdisk /var/lib/lava/dispatcher/tmp/10670673/extract-overlay-ramdisk-7aa_huqq/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10670673/extract-overlay-ramdisk-7aa_huqq/ramdisk
200 10:01:39.373967 >> 369045 blocks
201 10:01:45.198399 rename /var/lib/lava/dispatcher/tmp/10670673/extract-overlay-ramdisk-7aa_huqq/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10670673/tftp-deploy-cw7483qk/ramdisk/ramdisk.cpio.gz
202 10:01:45.198826 end: 1.5.7 compress-ramdisk (duration 00:00:07) [common]
203 10:01:45.198955 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
204 10:01:45.199057 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
205 10:01:45.199163 Calling: 'lzma' '--keep' '/var/lib/lava/dispatcher/tmp/10670673/tftp-deploy-cw7483qk/kernel/Image'
206 10:01:57.029742 Returned 0 in 11 seconds
207 10:01:57.130351 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/10670673/tftp-deploy-cw7483qk/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/10670673/tftp-deploy-cw7483qk/dtb/mt8192-asurada-spherion-r0.dtb -i /var/lib/lava/dispatcher/tmp/10670673/tftp-deploy-cw7483qk/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/10670673/tftp-deploy-cw7483qk/kernel/image.itb
208 10:01:57.912133 output: FIT description: Kernel Image image with one or more FDT blobs
209 10:01:57.912481 output: Created: Sat Jun 10 11:01:57 2023
210 10:01:57.912560 output: Image 0 (kernel-1)
211 10:01:57.912627 output: Description:
212 10:01:57.912693 output: Created: Sat Jun 10 11:01:57 2023
213 10:01:57.912757 output: Type: Kernel Image
214 10:01:57.912861 output: Compression: lzma compressed
215 10:01:57.912949 output: Data Size: 10087317 Bytes = 9850.90 KiB = 9.62 MiB
216 10:01:57.913009 output: Architecture: AArch64
217 10:01:57.913068 output: OS: Linux
218 10:01:57.913123 output: Load Address: 0x00000000
219 10:01:57.913180 output: Entry Point: 0x00000000
220 10:01:57.913238 output: Hash algo: crc32
221 10:01:57.913294 output: Hash value: c9e456fd
222 10:01:57.913347 output: Image 1 (fdt-1)
223 10:01:57.913400 output: Description: mt8192-asurada-spherion-r0
224 10:01:57.913454 output: Created: Sat Jun 10 11:01:57 2023
225 10:01:57.913507 output: Type: Flat Device Tree
226 10:01:57.913561 output: Compression: uncompressed
227 10:01:57.913614 output: Data Size: 46924 Bytes = 45.82 KiB = 0.04 MiB
228 10:01:57.913668 output: Architecture: AArch64
229 10:01:57.913721 output: Hash algo: crc32
230 10:01:57.913774 output: Hash value: 1df858fa
231 10:01:57.913827 output: Image 2 (ramdisk-1)
232 10:01:57.913880 output: Description: unavailable
233 10:01:57.913932 output: Created: Sat Jun 10 11:01:57 2023
234 10:01:57.913985 output: Type: RAMDisk Image
235 10:01:57.914038 output: Compression: Unknown Compression
236 10:01:57.914092 output: Data Size: 56372532 Bytes = 55051.30 KiB = 53.76 MiB
237 10:01:57.914145 output: Architecture: AArch64
238 10:01:57.914197 output: OS: Linux
239 10:01:57.914250 output: Load Address: unavailable
240 10:01:57.914303 output: Entry Point: unavailable
241 10:01:57.914356 output: Hash algo: crc32
242 10:01:57.914408 output: Hash value: 0a9dfc2f
243 10:01:57.914461 output: Default Configuration: 'conf-1'
244 10:01:57.914513 output: Configuration 0 (conf-1)
245 10:01:57.914566 output: Description: mt8192-asurada-spherion-r0
246 10:01:57.914619 output: Kernel: kernel-1
247 10:01:57.914671 output: Init Ramdisk: ramdisk-1
248 10:01:57.914724 output: FDT: fdt-1
249 10:01:57.914777 output: Loadables: kernel-1
250 10:01:57.914829 output:
251 10:01:57.915015 end: 1.5.8.1 prepare-fit (duration 00:00:13) [common]
252 10:01:57.915114 end: 1.5.8 prepare-kernel (duration 00:00:13) [common]
253 10:01:57.915221 end: 1.5 prepare-tftp-overlay (duration 00:00:21) [common]
254 10:01:57.915316 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
255 10:01:57.915392 No LXC device requested
256 10:01:57.915470 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 10:01:57.915574 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
258 10:01:57.915667 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 10:01:57.915736 Checking files for TFTP limit of 4294967296 bytes.
260 10:01:57.916213 end: 1 tftp-deploy (duration 00:00:22) [common]
261 10:01:57.916317 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 10:01:57.916409 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 10:01:57.916532 substitutions:
264 10:01:57.916597 - {DTB}: 10670673/tftp-deploy-cw7483qk/dtb/mt8192-asurada-spherion-r0.dtb
265 10:01:57.916662 - {INITRD}: 10670673/tftp-deploy-cw7483qk/ramdisk/ramdisk.cpio.gz
266 10:01:57.916722 - {KERNEL}: 10670673/tftp-deploy-cw7483qk/kernel/Image
267 10:01:57.916780 - {LAVA_MAC}: None
268 10:01:57.916881 - {PRESEED_CONFIG}: None
269 10:01:57.916937 - {PRESEED_LOCAL}: None
270 10:01:57.916992 - {RAMDISK}: 10670673/tftp-deploy-cw7483qk/ramdisk/ramdisk.cpio.gz
271 10:01:57.917047 - {ROOT_PART}: None
272 10:01:57.917102 - {ROOT}: None
273 10:01:57.917156 - {SERVER_IP}: 192.168.201.1
274 10:01:57.917210 - {TEE}: None
275 10:01:57.917263 Parsed boot commands:
276 10:01:57.917318 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 10:01:57.917488 Parsed boot commands: tftpboot 192.168.201.1 10670673/tftp-deploy-cw7483qk/kernel/image.itb 10670673/tftp-deploy-cw7483qk/kernel/cmdline
278 10:01:57.917577 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 10:01:57.917662 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 10:01:57.917750 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 10:01:57.917837 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 10:01:57.917907 Not connected, no need to disconnect.
283 10:01:57.917980 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 10:01:57.918061 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 10:01:57.918130 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost mt8192-asurada-spherion-r0-cbg-0'
286 10:01:57.921558 Setting prompt string to ['lava-test: # ']
287 10:01:57.921919 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 10:01:57.922028 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 10:01:57.922128 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 10:01:57.922218 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 10:01:57.922413 Calling: 'pduclient' '--daemon=localhost' '--hostname=mt8192-asurada-spherion-r0-cbg-0' '--port=1' '--command=reboot'
292 10:02:03.055625 >> Command sent successfully.
293 10:02:03.058013 Returned 0 in 5 seconds
294 10:02:03.158424 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
296 10:02:03.159013 end: 2.2.2 reset-device (duration 00:00:05) [common]
297 10:02:03.159116 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
298 10:02:03.159209 Setting prompt string to 'Starting depthcharge on Spherion...'
299 10:02:03.159277 Changing prompt to 'Starting depthcharge on Spherion...'
300 10:02:03.159348 depthcharge-start: Wait for prompt Starting depthcharge on Spherion... (timeout 00:05:00)
301 10:02:03.159614 [Enter `^Ec?' for help]
302 10:02:03.332609
303 10:02:03.332777
304 10:02:03.332895 F0: 102B 0000
305 10:02:03.332961
306 10:02:03.333021 F3: 1001 0000 [0200]
307 10:02:03.335946
308 10:02:03.336031 F3: 1001 0000
309 10:02:03.336099
310 10:02:03.336164 F7: 102D 0000
311 10:02:03.336224
312 10:02:03.339053 F1: 0000 0000
313 10:02:03.339139
314 10:02:03.339205 V0: 0000 0000 [0001]
315 10:02:03.339270
316 10:02:03.342808 00: 0007 8000
317 10:02:03.342899
318 10:02:03.342965 01: 0000 0000
319 10:02:03.343030
320 10:02:03.345488 BP: 0C00 0209 [0000]
321 10:02:03.345573
322 10:02:03.345640 G0: 1182 0000
323 10:02:03.345703
324 10:02:03.349551 EC: 0000 0021 [4000]
325 10:02:03.349638
326 10:02:03.349705 S7: 0000 0000 [0000]
327 10:02:03.349766
328 10:02:03.353249 CC: 0000 0000 [0001]
329 10:02:03.353335
330 10:02:03.353402 T0: 0000 0040 [010F]
331 10:02:03.353464
332 10:02:03.353523 Jump to BL
333 10:02:03.353583
334 10:02:03.379923
335 10:02:03.380079
336 10:02:03.380179
337 10:02:03.387489 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 bootblock starting (log level: 8)...
338 10:02:03.390915 ARM64: Exception handlers installed.
339 10:02:03.394492 ARM64: Testing exception
340 10:02:03.397991 ARM64: Done test exception
341 10:02:03.404282 Backing address range [0x00000000:0x1000000000000) with new page table @0x0010d000
342 10:02:03.414939 Mapping address range [0x00000000:0x200000000) as cacheable | read-write | secure | device
343 10:02:03.421730 Backing address range [0x00000000:0x8000000000) with new page table @0x0010e000
344 10:02:03.431881 Mapping address range [0x00100000:0x00120000) as cacheable | read-write | secure | normal
345 10:02:03.438007 Backing address range [0x00000000:0x40000000) with new page table @0x0010f000
346 10:02:03.445119 Backing address range [0x00000000:0x00200000) with new page table @0x00110000
347 10:02:03.456731 Mapping address range [0x00200000:0x00300000) as cacheable | read-write | secure | normal
348 10:02:03.464099 Backing address range [0x00200000:0x00400000) with new page table @0x00111000
349 10:02:03.482365 Mapping address range [0x00114000:0x00115000) as non-cacheable | read-write | secure | normal
350 10:02:03.485959 WDT: Last reset was cold boot
351 10:02:03.488838 SPI1(PAD0) initialized at 2873684 Hz
352 10:02:03.491982 SPI5(PAD0) initialized at 992727 Hz
353 10:02:03.495400 VBOOT: Loading verstage.
354 10:02:03.502463 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
355 10:02:03.505908 FMAP: Found "FLASH" version 1.1 at 0x20000.
356 10:02:03.509414 FMAP: base = 0x0 size = 0x800000 #areas = 25
357 10:02:03.512355 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
358 10:02:03.519644 CBFS: mcache @0x00107c00 built for 77 files, used 0x1104 of 0x1800 bytes
359 10:02:03.526470 CBFS: Found 'fallback/verstage' @0x75500 size 0xa1eb in mcache @0x00108150
360 10:02:03.537357 read SPI 0x96554 0xa1eb: 4592 us, 9026 KB/s, 72.208 Mbps
361 10:02:03.537496
362 10:02:03.537570
363 10:02:03.547657 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 verstage starting (log level: 8)...
364 10:02:03.551315 ARM64: Exception handlers installed.
365 10:02:03.554356 ARM64: Testing exception
366 10:02:03.554449 ARM64: Done test exception
367 10:02:03.561082 FMAP: area RW_NVRAM found @ 57b000 (8192 bytes)
368 10:02:03.564307 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
369 10:02:03.578417 Probing TPM: . done!
370 10:02:03.578556 TPM ready after 0 ms
371 10:02:03.585739 Connected to device vid:did:rid of 1ae0:0028:00
372 10:02:03.592630 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.153/cr50_v3.94_pp.113-620c9b9523
373 10:02:03.651661 Initialized TPM device CR50 revision 0
374 10:02:03.663511 tlcl_send_startup: Startup return code is 0
375 10:02:03.663663 TPM: setup succeeded
376 10:02:03.675368 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
377 10:02:03.684470 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
378 10:02:03.696032 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
379 10:02:03.706053 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
380 10:02:03.709681 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
381 10:02:03.712965 in-header: 03 07 00 00 08 00 00 00
382 10:02:03.716939 in-data: aa e4 47 04 13 02 00 00
383 10:02:03.720631 Chrome EC: UHEPI supported
384 10:02:03.724040 out: cmd=0xa4: 03 4c a4 00 00 00 0c 00 00 01 00 00 00 00 00 00 00 00 00 00
385 10:02:03.729474 in-header: 03 95 00 00 08 00 00 00
386 10:02:03.733131 in-data: 18 20 20 08 00 00 00 00
387 10:02:03.733230 Phase 1
388 10:02:03.737286 FMAP: area GBB found @ 3f5000 (12032 bytes)
389 10:02:03.744195 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
390 10:02:03.752139 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
391 10:02:03.752271 Recovery requested (1009000e)
392 10:02:03.764033 TPM: Extending digest for VBOOT: boot mode into PCR 0
393 10:02:03.767780 tlcl_extend: response is 0
394 10:02:03.776680 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
395 10:02:03.783051 tlcl_extend: response is 0
396 10:02:03.789296 CBFS: Found 'fallback/romstage' @0x80 size 0x2173b in mcache @0x00107c2c
397 10:02:03.809145 read SPI 0x210d4 0x2173b: 15137 us, 9051 KB/s, 72.408 Mbps
398 10:02:03.815832 BS: bootblock times (exec / console): total (unknown) / 148 ms
399 10:02:03.815964
400 10:02:03.816033
401 10:02:03.825765 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 romstage starting (log level: 8)...
402 10:02:03.829179 ARM64: Exception handlers installed.
403 10:02:03.832692 ARM64: Testing exception
404 10:02:03.832784 ARM64: Done test exception
405 10:02:03.855021 pmic_efuse_setting: Set efuses in 11 msecs
406 10:02:03.858503 pmwrap_interface_init: Select PMIF_VLD_RDY
407 10:02:03.864403 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M00: 0x1c070c9a
408 10:02:03.868105 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M01: 0x1c070c9a
409 10:02:03.872010 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M02: 0x1c070c9a
410 10:02:03.878820 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M03: 0x1c070c9a
411 10:02:03.883227 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M04: 0x1c070c9a
412 10:02:03.886124 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M05: 0x1c070c9a
413 10:02:03.893886 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M06: 0x1c070c9a
414 10:02:03.897799 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M07: 0x1c070c9a
415 10:02:03.901261 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M08: 0xc9c
416 10:02:03.908484 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M09: 0x1c070c9a
417 10:02:03.912489 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M10: 0x1c070c9a
418 10:02:03.916005 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M11: 0xc9c
419 10:02:03.919515 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M12: 0xc9c
420 10:02:03.927668 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M01 FPM SWITCH: 0x1c070c8a
421 10:02:03.930934 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M02 FPM SWITCH: 0x1c070c8a
422 10:02:03.938136 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M03 FPM SWITCH: 0x1c070c8a
423 10:02:03.946549 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M04 FPM SWITCH: 0x1c070c8a
424 10:02:03.949211 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M05 FPM SWITCH: 0x1c070c8a
425 10:02:03.957000 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M06 FPM SWITCH: 0x1c070c8a
426 10:02:03.960919 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M07 FPM SWITCH: 0x1c070c8a
427 10:02:03.967944 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M08 FPM SWITCH: 0xc8c
428 10:02:03.971560 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M09 FPM SWITCH: 0x1c070c8a
429 10:02:03.979921 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M10 FPM SWITCH: 0x1c070c8a
430 10:02:03.982953 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M11 FPM SWITCH: 0xc8c
431 10:02:03.990203 [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M12 FPM SWITCH: 0xc8c
432 10:02:03.994191 [SRCLKEN_RC]__rc_ctrl_bblpm_switch,193: M02 BBLPM SWITCH: 0x1c070caa
433 10:02:03.998009 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M00: 0x1c070c92
434 10:02:04.004829 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M02: 0x1c070ca2
435 10:02:04.008722 [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M07: 0x1c070c82
436 10:02:04.012465 [SRCLKEN_RC]rc_dump_reg_info,132: SRCLKEN_RC_CFG:0x10
437 10:02:04.019748 [SRCLKEN_RC]rc_dump_reg_info,133: RC_CENTRAL_CFG1:0x401425
438 10:02:04.023117 [SRCLKEN_RC]rc_dump_reg_info,134: RC_CENTRAL_CFG2:0x1010
439 10:02:04.030601 [SRCLKEN_RC]rc_dump_reg_info,135: RC_CENTRAL_CFG3:0x400f
440 10:02:04.034145 [SRCLKEN_RC]rc_dump_reg_info,136: RC_CENTRAL_CFG4:0x20000
441 10:02:04.038038 [SRCLKEN_RC]rc_dump_reg_info,137: RC_DCXO_FPM_CFG:0x8
442 10:02:04.045493 [SRCLKEN_RC]rc_dump_reg_info,138: SUBSYS_INTF_CFG:0x1041efb
443 10:02:04.048927 [SRCLKEN_RC]rc_dump_reg_info,139: RC_SPI_STA_0:0x40010698
444 10:02:04.053072 [SRCLKEN_RC]rc_dump_reg_info,140: RC_PI_PO_STA:0xd15c3
445 10:02:04.056289 [SRCLKEN_RC]rc_dump_reg_info,144: M00: 0x1c070c92
446 10:02:04.063642 [SRCLKEN_RC]rc_dump_reg_info,144: M01: 0x1c070c8a
447 10:02:04.067439 [SRCLKEN_RC]rc_dump_reg_info,144: M02: 0x1c070ca2
448 10:02:04.071375 [SRCLKEN_RC]rc_dump_reg_info,144: M03: 0x1c070c8a
449 10:02:04.074559 [SRCLKEN_RC]rc_dump_reg_info,144: M04: 0x1c070c8a
450 10:02:04.078289 [SRCLKEN_RC]rc_dump_reg_info,144: M05: 0x1c070c8a
451 10:02:04.085560 [SRCLKEN_RC]rc_dump_reg_info,144: M06: 0x1c070c8a
452 10:02:04.089717 [SRCLKEN_RC]rc_dump_reg_info,144: M07: 0x1c070c82
453 10:02:04.093500 [SRCLKEN_RC]rc_dump_reg_info,144: M08: 0xc8c
454 10:02:04.097076 [SRCLKEN_RC]rc_dump_reg_info,144: M09: 0x1c070c8a
455 10:02:04.100720 [SRCLKEN_RC]rc_dump_reg_info,144: M10: 0x1c070c8a
456 10:02:04.104604 [SRCLKEN_RC]rc_dump_reg_info,144: M11: 0xc8c
457 10:02:04.108027 [SRCLKEN_RC]rc_dump_reg_info,144: M12: 0xc8c
458 10:02:04.119337 [CLKBUF]dump_clkbuf_log,60: DCXO_CW00/09/12/13/15/19=0x624d 0x53f0 0x8100 0x4c 0xf0f 0x9248
459 10:02:04.126595 [CLKBUF]dump_clkbuf_log,71: spi_con1/ldo_rf_op/ldo_bb_op/ldo_rf_en/ldo_bb_en=0x1 0x1 0x1 0x1 0x1
460 10:02:04.130594 [CLKBUF]dump_clkbuf_log,74: clk buf vrfck_hv_en=0x0
461 10:02:04.137971 [CLKBUF]dump_clkbuf_log,60: DCXO_CW00/09/12/13/15/19=0x4005 0x1f0 0x8100 0x4c 0xf0f 0x9248
462 10:02:04.148697 [CLKBUF]dump_clkbuf_log,71: spi_con1/ldo_rf_op/ldo_bb_op/ldo_rf_en/ldo_bb_en=0x1 0x1 0x1 0x0 0x0
463 10:02:04.152775 [CLKBUF]dump_clkbuf_log,74: clk buf vrfck_hv_en=0x0
464 10:02:04.156374 [RTC]rtc_boot,324: PMIC_RG_SCK_TOP_CON0,0x50c:0x1
465 10:02:04.159630 [RTC]rtc_boot,327: PMIC_RG_SCK_TOP_CON0,0x50c:0x1
466 10:02:04.167921 [RTC]rtc_enable_dcxo,68: con=0x486, osc32con=0xde70, sec=0x1a
467 10:02:04.171602 [RTC]rtc_check_state,173: con=486, pwrkey1=a357, pwrkey2=67d2
468 10:02:04.179997 [RTC]rtc_osc_init,62: osc32con val = 0xde70
469 10:02:04.183750 [RTC]rtc_eosc_cali,20: PMIC_RG_FQMTR_CKSEL=0x4a
470 10:02:04.192497 [RTC]rtc_get_frequency_meter,154: input=15, output=758
471 10:02:04.201867 [RTC]rtc_get_frequency_meter,154: input=23, output=939
472 10:02:04.211228 [RTC]rtc_get_frequency_meter,154: input=19, output=851
473 10:02:04.220736 [RTC]rtc_get_frequency_meter,154: input=17, output=806
474 10:02:04.231278 [RTC]rtc_get_frequency_meter,154: input=16, output=782
475 10:02:04.240371 [RTC]rtc_get_frequency_meter,154: input=16, output=783
476 10:02:04.250002 [RTC]rtc_get_frequency_meter,154: input=17, output=804
477 10:02:04.253550 [RTC]rtc_eosc_cali,47: left: 16, middle: 16, right: 17
478 10:02:04.257691 [RTC]rtc_osc_init,66: EOSC32 cali val = 0xde70
479 10:02:04.261044 [RTC]rtc_boot_common,202: RTC_STATE_REBOOT
480 10:02:04.268565 [RTC]rtc_boot_common,220: irqsta=0, bbpu=81, con=486
481 10:02:04.272026 [RTC]rtc_bbpu_power_on,298: rtc_write_trigger=1
482 10:02:04.276250 [RTC]rtc_bbpu_power_on,300: done BBPU=0x81
483 10:02:04.279473 ADC[4]: Raw value=906573 ID=7
484 10:02:04.279582 ADC[3]: Raw value=213441 ID=1
485 10:02:04.283307 RAM Code: 0x71
486 10:02:04.287282 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
487 10:02:04.290987 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
488 10:02:04.302129 CBFS: Found 'sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE' @0x75280 size 0x8 in mcache @0x00108014
489 10:02:04.305658 DRAM-K: ddr_type: DSC, config_dvfs: 1, ddr_geometry: 2CH_2RK_8GB_4_4_BYTE
490 10:02:04.309041 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
491 10:02:04.312863 in-header: 03 07 00 00 08 00 00 00
492 10:02:04.317182 in-data: aa e4 47 04 13 02 00 00
493 10:02:04.320776 Chrome EC: UHEPI supported
494 10:02:04.327774 out: cmd=0xa4: 03 4c a4 00 00 00 0c 00 00 01 00 00 00 00 00 00 00 00 00 00
495 10:02:04.331471 in-header: 03 95 00 00 08 00 00 00
496 10:02:04.331644 in-data: 18 20 20 08 00 00 00 00
497 10:02:04.335895 MRC: failed to locate region type 0.
498 10:02:04.342648 DRAM-K: Invalid data in flash (size: 0xffffffffffffffff, expected: 0xcf0)
499 10:02:04.346467 DRAM-K: Running full calibration
500 10:02:04.354445 DRAM-K: ddr_type: DSC, config_dvfs: 1, ddr_geometry: 2CH_2RK_8GB_4_4_BYTE
501 10:02:04.354595 header.status = 0x0
502 10:02:04.358613 header.version = 0x6 (expected: 0x6)
503 10:02:04.362170 header.size = 0xd00 (expected: 0xd00)
504 10:02:04.362282 header.flags = 0x0
505 10:02:04.368798 CBFS: Found 'fallback/dram' @0x51540 size 0x1c583 in mcache @0x00107e40
506 10:02:04.387196 read SPI 0x72590 0x1c583: 12499 us, 9288 KB/s, 74.304 Mbps
507 10:02:04.394726 dram_init: MediaTek DRAM firmware version: 1.6.3, accepting param version 6
508 10:02:04.398253 dram_init: ddr_geometry: 2
509 10:02:04.398380 [EMI] MDL number = 2
510 10:02:04.401663 [EMI] Get MDL freq = 0
511 10:02:04.401772 dram_init: ddr_type: 0
512 10:02:04.405467 is_discrete_lpddr4: 1
513 10:02:04.409283 [Set_DRAM_Pinmux_Sel] DRAMPinmux = 0
514 10:02:04.409411
515 10:02:04.409482
516 10:02:04.409544 [Bian_co] ETT version 0.0.0.1
517 10:02:04.416643 dram_type 6, R0 cbt_mode 1, R1 cbt_mode 1 VENDOR=6
518 10:02:04.416786
519 10:02:04.420077 dramc_set_vcore_voltage set vcore to 650000
520 10:02:04.420183 Read voltage for 800, 4
521 10:02:04.424358 Vio18 = 0
522 10:02:04.424473 Vcore = 650000
523 10:02:04.424545 Vdram = 0
524 10:02:04.424607 Vddq = 0
525 10:02:04.428144 Vmddr = 0
526 10:02:04.428257 dram_init: config_dvfs: 1
527 10:02:04.435452 [FAST_K] DramcSave_Time_For_Cal_Init SHU6, femmc_Ready=0
528 10:02:04.439167 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
529 10:02:04.442997 [SwImpedanceCal] DRVP=10, DRVN=16, ODTN=9
530 10:02:04.446354 freq_region=0, Reg: DRVP=10, DRVN=16, ODTN=9
531 10:02:04.450474 [SwImpedanceCal] DRVP=16, DRVN=24, ODTN=9
532 10:02:04.454178 freq_region=1, Reg: DRVP=16, DRVN=24, ODTN=9
533 10:02:04.457460 MEM_TYPE=3, freq_sel=18
534 10:02:04.461143 sv_algorithm_assistance_LP4_1600
535 10:02:04.464317 ============ PULL DRAM RESETB DOWN ============
536 10:02:04.467799 ========== PULL DRAM RESETB DOWN end =========
537 10:02:04.474510 [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2
538 10:02:04.478101 ===================================
539 10:02:04.478220 LPDDR4 DRAM CONFIGURATION
540 10:02:04.482065 ===================================
541 10:02:04.485309 EX_ROW_EN[0] = 0x0
542 10:02:04.485435 EX_ROW_EN[1] = 0x0
543 10:02:04.489082 LP4Y_EN = 0x0
544 10:02:04.489263 WORK_FSP = 0x0
545 10:02:04.492357 WL = 0x2
546 10:02:04.492469 RL = 0x2
547 10:02:04.496026 BL = 0x2
548 10:02:04.496134 RPST = 0x0
549 10:02:04.496203 RD_PRE = 0x0
550 10:02:04.499714 WR_PRE = 0x1
551 10:02:04.499825 WR_PST = 0x0
552 10:02:04.502617 DBI_WR = 0x0
553 10:02:04.505960 DBI_RD = 0x0
554 10:02:04.506065 OTF = 0x1
555 10:02:04.509926 ===================================
556 10:02:04.512780 ===================================
557 10:02:04.512930 ANA top config
558 10:02:04.516486 ===================================
559 10:02:04.519460 DLL_ASYNC_EN = 0
560 10:02:04.522890 ALL_SLAVE_EN = 1
561 10:02:04.526172 NEW_RANK_MODE = 1
562 10:02:04.526284 DLL_IDLE_MODE = 1
563 10:02:04.529613 LP45_APHY_COMB_EN = 1
564 10:02:04.532822 TX_ODT_DIS = 1
565 10:02:04.536454 NEW_8X_MODE = 1
566 10:02:04.540166 ===================================
567 10:02:04.543317 ===================================
568 10:02:04.546638 data_rate = 1600
569 10:02:04.546752 CKR = 1
570 10:02:04.550199 DQ_P2S_RATIO = 8
571 10:02:04.553665 ===================================
572 10:02:04.556916 CA_P2S_RATIO = 8
573 10:02:04.560113 DQ_CA_OPEN = 0
574 10:02:04.564000 DQ_SEMI_OPEN = 0
575 10:02:04.564121 CA_SEMI_OPEN = 0
576 10:02:04.567099 CA_FULL_RATE = 0
577 10:02:04.570157 DQ_CKDIV4_EN = 1
578 10:02:04.573932 CA_CKDIV4_EN = 1
579 10:02:04.577305 CA_PREDIV_EN = 0
580 10:02:04.580353 PH8_DLY = 0
581 10:02:04.580457 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
582 10:02:04.583729 DQ_AAMCK_DIV = 4
583 10:02:04.587649 CA_AAMCK_DIV = 4
584 10:02:04.590256 CA_ADMCK_DIV = 4
585 10:02:04.594083 DQ_TRACK_CA_EN = 0
586 10:02:04.597732 CA_PICK = 800
587 10:02:04.597844 CA_MCKIO = 800
588 10:02:04.601165 MCKIO_SEMI = 0
589 10:02:04.604857 PLL_FREQ = 3068
590 10:02:04.608383 DQ_UI_PI_RATIO = 32
591 10:02:04.608504 CA_UI_PI_RATIO = 0
592 10:02:04.612173 ===================================
593 10:02:04.616284 ===================================
594 10:02:04.619617 memory_type:LPDDR4
595 10:02:04.619738 GP_NUM : 10
596 10:02:04.623542 SRAM_EN : 1
597 10:02:04.623657 MD32_EN : 0
598 10:02:04.627277 ===================================
599 10:02:04.631156 [ANA_INIT] >>>>>>>>>>>>>>
600 10:02:04.635075 <<<<<< [CONFIGURE PHASE]: ANA_TX
601 10:02:04.637921 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
602 10:02:04.641468 ===================================
603 10:02:04.641591 data_rate = 1600,PCW = 0X7600
604 10:02:04.644854 ===================================
605 10:02:04.648239 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
606 10:02:04.654760 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
607 10:02:04.661350 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
608 10:02:04.664985 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
609 10:02:04.668221 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
610 10:02:04.671817 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
611 10:02:04.674939 [ANA_INIT] flow start
612 10:02:04.675055 [ANA_INIT] PLL >>>>>>>>
613 10:02:04.678171 [ANA_INIT] PLL <<<<<<<<
614 10:02:04.681859 [ANA_INIT] MIDPI >>>>>>>>
615 10:02:04.684929 [ANA_INIT] MIDPI <<<<<<<<
616 10:02:04.685035 [ANA_INIT] DLL >>>>>>>>
617 10:02:04.688133 [ANA_INIT] flow end
618 10:02:04.691515 ============ LP4 DIFF to SE enter ============
619 10:02:04.694955 ============ LP4 DIFF to SE exit ============
620 10:02:04.698470 [ANA_INIT] <<<<<<<<<<<<<
621 10:02:04.701556 [Flow] Enable top DCM control >>>>>
622 10:02:04.705486 [Flow] Enable top DCM control <<<<<
623 10:02:04.708138 Enable DLL master slave shuffle
624 10:02:04.711302 ==============================================================
625 10:02:04.714648 Gating Mode config
626 10:02:04.721743 ==============================================================
627 10:02:04.721886 Config description:
628 10:02:04.731876 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
629 10:02:04.738338 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
630 10:02:04.745276 SELPH_MODE 0: By rank 1: By Phase
631 10:02:04.748285 ==============================================================
632 10:02:04.751752 GAT_TRACK_EN = 1
633 10:02:04.754832 RX_GATING_MODE = 2
634 10:02:04.758505 RX_GATING_TRACK_MODE = 2
635 10:02:04.761926 SELPH_MODE = 1
636 10:02:04.764983 PICG_EARLY_EN = 1
637 10:02:04.768936 VALID_LAT_VALUE = 1
638 10:02:04.772553 ==============================================================
639 10:02:04.775619 Enter into Gating configuration >>>>
640 10:02:04.778875 Exit from Gating configuration <<<<
641 10:02:04.782111 Enter into DVFS_PRE_config >>>>>
642 10:02:04.792050 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
643 10:02:04.795301 Exit from DVFS_PRE_config <<<<<
644 10:02:04.798654 Enter into PICG configuration >>>>
645 10:02:04.802117 Exit from PICG configuration <<<<
646 10:02:04.805125 [RX_INPUT] configuration >>>>>
647 10:02:04.808610 [RX_INPUT] configuration <<<<<
648 10:02:04.812094 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
649 10:02:04.818587 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
650 10:02:04.825488 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
651 10:02:04.832549 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
652 10:02:04.839058 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
653 10:02:04.842133 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
654 10:02:04.848747 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
655 10:02:04.852108 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
656 10:02:04.856169 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
657 10:02:04.858800 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
658 10:02:04.862477 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
659 10:02:04.869077 [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2
660 10:02:04.872340 ===================================
661 10:02:04.875652 LPDDR4 DRAM CONFIGURATION
662 10:02:04.878981 ===================================
663 10:02:04.879095 EX_ROW_EN[0] = 0x0
664 10:02:04.882336 EX_ROW_EN[1] = 0x0
665 10:02:04.882438 LP4Y_EN = 0x0
666 10:02:04.886238 WORK_FSP = 0x0
667 10:02:04.886347 WL = 0x2
668 10:02:04.888975 RL = 0x2
669 10:02:04.889068 BL = 0x2
670 10:02:04.892237 RPST = 0x0
671 10:02:04.892345 RD_PRE = 0x0
672 10:02:04.895685 WR_PRE = 0x1
673 10:02:04.895784 WR_PST = 0x0
674 10:02:04.899149 DBI_WR = 0x0
675 10:02:04.899252 DBI_RD = 0x0
676 10:02:04.902340 OTF = 0x1
677 10:02:04.906105 ===================================
678 10:02:04.909272 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
679 10:02:04.912931 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
680 10:02:04.919656 [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2
681 10:02:04.922490 ===================================
682 10:02:04.922603 LPDDR4 DRAM CONFIGURATION
683 10:02:04.925958 ===================================
684 10:02:04.929295 EX_ROW_EN[0] = 0x10
685 10:02:04.933153 EX_ROW_EN[1] = 0x0
686 10:02:04.933279 LP4Y_EN = 0x0
687 10:02:04.935993 WORK_FSP = 0x0
688 10:02:04.936090 WL = 0x2
689 10:02:04.939530 RL = 0x2
690 10:02:04.939633 BL = 0x2
691 10:02:04.942318 RPST = 0x0
692 10:02:04.942419 RD_PRE = 0x0
693 10:02:04.945879 WR_PRE = 0x1
694 10:02:04.945986 WR_PST = 0x0
695 10:02:04.949365 DBI_WR = 0x0
696 10:02:04.949469 DBI_RD = 0x0
697 10:02:04.952643 OTF = 0x1
698 10:02:04.955938 ===================================
699 10:02:04.962615 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
700 10:02:04.966015 nWR fixed to 40
701 10:02:04.966140 [ModeRegInit_LP4] CH0 RK0
702 10:02:04.969383 [ModeRegInit_LP4] CH0 RK1
703 10:02:04.972783 [ModeRegInit_LP4] CH1 RK0
704 10:02:04.972938 [ModeRegInit_LP4] CH1 RK1
705 10:02:04.976438 match AC timing 13
706 10:02:04.979360 dramType 5, freq 800, readDBI 0, DivMode 1, cbtMode 1
707 10:02:04.982500 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
708 10:02:04.989599 [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8
709 10:02:04.992760 [TX_path_calculate] data rate=1600, WL=8, DQS_TotalUI=17
710 10:02:04.999531 [TX_path_calculate] DQS = (2,1) DQS_OE = (1,6)
711 10:02:04.999676 [EMI DOE] emi_dcm 0
712 10:02:05.002804 [UpdateDFSTbltoDDR3200] Get Highest Freq is 1600
713 10:02:05.006117 ==
714 10:02:05.006233 Dram Type= 6, Freq= 0, CH_0, rank 0
715 10:02:05.012781 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
716 10:02:05.012966 ==
717 10:02:05.016215 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
718 10:02:05.023096 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
719 10:02:05.032157 [CA 0] Center 36 (6~67) winsize 62
720 10:02:05.035872 [CA 1] Center 36 (6~67) winsize 62
721 10:02:05.039266 [CA 2] Center 34 (4~65) winsize 62
722 10:02:05.042476 [CA 3] Center 34 (4~64) winsize 61
723 10:02:05.045412 [CA 4] Center 33 (2~64) winsize 63
724 10:02:05.049419 [CA 5] Center 32 (2~62) winsize 61
725 10:02:05.049545
726 10:02:05.052339 [CmdBusTrainingLP45] Vref(ca) range 1: 34
727 10:02:05.052445
728 10:02:05.055933 [CATrainingPosCal] consider 1 rank data
729 10:02:05.059029 u2DelayCellTimex100 = 270/100 ps
730 10:02:05.062435 CA0 delay=36 (6~67),Diff = 4 PI (28 cell)
731 10:02:05.066278 CA1 delay=36 (6~67),Diff = 4 PI (28 cell)
732 10:02:05.072678 CA2 delay=34 (4~65),Diff = 2 PI (14 cell)
733 10:02:05.076039 CA3 delay=34 (4~64),Diff = 2 PI (14 cell)
734 10:02:05.079621 CA4 delay=33 (2~64),Diff = 1 PI (7 cell)
735 10:02:05.082422 CA5 delay=32 (2~62),Diff = 0 PI (0 cell)
736 10:02:05.082537
737 10:02:05.085810 CA PerBit enable=1, Macro0, CA PI delay=32
738 10:02:05.085914
739 10:02:05.089322 [CBTSetCACLKResult] CA Dly = 32
740 10:02:05.089422 CS Dly: 4 (0~35)
741 10:02:05.089493 ==
742 10:02:05.092682 Dram Type= 6, Freq= 0, CH_0, rank 1
743 10:02:05.099447 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
744 10:02:05.099591 ==
745 10:02:05.102905 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
746 10:02:05.109050 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
747 10:02:05.119006 [CA 0] Center 36 (6~67) winsize 62
748 10:02:05.121749 [CA 1] Center 36 (6~67) winsize 62
749 10:02:05.125758 [CA 2] Center 34 (3~65) winsize 63
750 10:02:05.128514 [CA 3] Center 33 (3~64) winsize 62
751 10:02:05.131656 [CA 4] Center 33 (2~64) winsize 63
752 10:02:05.135237 [CA 5] Center 32 (2~63) winsize 62
753 10:02:05.135354
754 10:02:05.138656 [CmdBusTrainingLP45] Vref(ca) range 1: 34
755 10:02:05.138758
756 10:02:05.142131 [CATrainingPosCal] consider 2 rank data
757 10:02:05.145217 u2DelayCellTimex100 = 270/100 ps
758 10:02:05.148294 CA0 delay=36 (6~67),Diff = 4 PI (28 cell)
759 10:02:05.151715 CA1 delay=36 (6~67),Diff = 4 PI (28 cell)
760 10:02:05.158299 CA2 delay=34 (4~65),Diff = 2 PI (14 cell)
761 10:02:05.162300 CA3 delay=34 (4~64),Diff = 2 PI (14 cell)
762 10:02:05.165103 CA4 delay=33 (2~64),Diff = 1 PI (7 cell)
763 10:02:05.168348 CA5 delay=32 (2~62),Diff = 0 PI (0 cell)
764 10:02:05.168462
765 10:02:05.172092 CA PerBit enable=1, Macro0, CA PI delay=32
766 10:02:05.172201
767 10:02:05.175650 [CBTSetCACLKResult] CA Dly = 32
768 10:02:05.175754 CS Dly: 4 (0~36)
769 10:02:05.175823
770 10:02:05.179161 ----->DramcWriteLeveling(PI) begin...
771 10:02:05.179268 ==
772 10:02:05.182449 Dram Type= 6, Freq= 0, CH_0, rank 0
773 10:02:05.186189 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
774 10:02:05.189711 ==
775 10:02:05.189865 Write leveling (Byte 0): 32 => 32
776 10:02:05.193994 Write leveling (Byte 1): 30 => 30
777 10:02:05.197042 DramcWriteLeveling(PI) end<-----
778 10:02:05.197156
779 10:02:05.197225 ==
780 10:02:05.200489 Dram Type= 6, Freq= 0, CH_0, rank 0
781 10:02:05.204000 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
782 10:02:05.204118 ==
783 10:02:05.207961 [Gating] SW mode calibration
784 10:02:05.214503 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
785 10:02:05.221047 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
786 10:02:05.225060 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
787 10:02:05.228583 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 0)
788 10:02:05.234792 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (1 1) (0 0)
789 10:02:05.237903 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
790 10:02:05.241401 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
791 10:02:05.248351 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
792 10:02:05.251488 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
793 10:02:05.254570 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
794 10:02:05.258398 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
795 10:02:05.264986 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
796 10:02:05.268171 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
797 10:02:05.272041 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
798 10:02:05.278562 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
799 10:02:05.281657 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
800 10:02:05.284792 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
801 10:02:05.292027 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
802 10:02:05.295025 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
803 10:02:05.298737 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 1)
804 10:02:05.305234 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
805 10:02:05.308334 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
806 10:02:05.311590 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
807 10:02:05.318938 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
808 10:02:05.322024 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
809 10:02:05.324815 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
810 10:02:05.328278 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
811 10:02:05.335327 0 9 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
812 10:02:05.338615 0 9 8 | B1->B0 | 2323 2b2b | 0 1 | (0 0) (0 0)
813 10:02:05.341722 0 9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
814 10:02:05.348460 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
815 10:02:05.351693 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
816 10:02:05.355220 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
817 10:02:05.361724 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
818 10:02:05.365447 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
819 10:02:05.368222 0 10 4 | B1->B0 | 3434 3232 | 1 0 | (1 1) (0 0)
820 10:02:05.375205 0 10 8 | B1->B0 | 2f2f 2323 | 0 0 | (0 1) (0 0)
821 10:02:05.378486 0 10 12 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
822 10:02:05.382410 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
823 10:02:05.388721 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
824 10:02:05.392205 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
825 10:02:05.395414 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
826 10:02:05.401980 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
827 10:02:05.405050 0 11 4 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
828 10:02:05.408576 0 11 8 | B1->B0 | 2f2f 3d3d | 0 0 | (0 0) (0 0)
829 10:02:05.412094 0 11 12 | B1->B0 | 4343 4646 | 0 0 | (0 0) (0 0)
830 10:02:05.418596 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
831 10:02:05.422094 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
832 10:02:05.424984 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
833 10:02:05.431926 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
834 10:02:05.435363 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
835 10:02:05.438455 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
836 10:02:05.445631 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 1)
837 10:02:05.448450 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
838 10:02:05.452235 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
839 10:02:05.458713 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
840 10:02:05.461885 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
841 10:02:05.465614 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
842 10:02:05.471956 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
843 10:02:05.475856 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
844 10:02:05.478723 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
845 10:02:05.482113 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
846 10:02:05.489034 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
847 10:02:05.491898 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
848 10:02:05.495550 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
849 10:02:05.502199 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
850 10:02:05.505919 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
851 10:02:05.508750 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
852 10:02:05.515469 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
853 10:02:05.515611 Total UI for P1: 0, mck2ui 16
854 10:02:05.522296 best dqsien dly found for B0: ( 0, 14, 4)
855 10:02:05.525557 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
856 10:02:05.528766 Total UI for P1: 0, mck2ui 16
857 10:02:05.532711 best dqsien dly found for B1: ( 0, 14, 8)
858 10:02:05.536273 best DQS0 dly(MCK, UI, PI) = (0, 14, 4)
859 10:02:05.539454 best DQS1 dly(MCK, UI, PI) = (0, 14, 8)
860 10:02:05.539571
861 10:02:05.542743 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 4)
862 10:02:05.546156 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 8)
863 10:02:05.550146 [Gating] SW calibration Done
864 10:02:05.550270 ==
865 10:02:05.552696 Dram Type= 6, Freq= 0, CH_0, rank 0
866 10:02:05.556269 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
867 10:02:05.556379 ==
868 10:02:05.559334 RX Vref Scan: 0
869 10:02:05.559433
870 10:02:05.559504 RX Vref 0 -> 0, step: 1
871 10:02:05.559566
872 10:02:05.562965 RX Delay -130 -> 252, step: 16
873 10:02:05.566108 iDelay=222, Bit 0, Center 85 (-34 ~ 205) 240
874 10:02:05.573393 iDelay=222, Bit 1, Center 93 (-18 ~ 205) 224
875 10:02:05.576254 iDelay=222, Bit 2, Center 85 (-34 ~ 205) 240
876 10:02:05.579903 iDelay=222, Bit 3, Center 85 (-34 ~ 205) 240
877 10:02:05.583487 iDelay=222, Bit 4, Center 93 (-18 ~ 205) 224
878 10:02:05.586586 iDelay=222, Bit 5, Center 77 (-34 ~ 189) 224
879 10:02:05.593431 iDelay=222, Bit 6, Center 93 (-18 ~ 205) 224
880 10:02:05.596146 iDelay=222, Bit 7, Center 101 (-18 ~ 221) 240
881 10:02:05.599488 iDelay=222, Bit 8, Center 77 (-34 ~ 189) 224
882 10:02:05.603161 iDelay=222, Bit 9, Center 77 (-34 ~ 189) 224
883 10:02:05.606306 iDelay=222, Bit 10, Center 77 (-34 ~ 189) 224
884 10:02:05.612836 iDelay=222, Bit 11, Center 77 (-34 ~ 189) 224
885 10:02:05.616366 iDelay=222, Bit 12, Center 85 (-34 ~ 205) 240
886 10:02:05.619614 iDelay=222, Bit 13, Center 85 (-34 ~ 205) 240
887 10:02:05.622947 iDelay=222, Bit 14, Center 93 (-18 ~ 205) 224
888 10:02:05.626325 iDelay=222, Bit 15, Center 85 (-34 ~ 205) 240
889 10:02:05.629699 ==
890 10:02:05.629817 Dram Type= 6, Freq= 0, CH_0, rank 0
891 10:02:05.636578 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
892 10:02:05.636719 ==
893 10:02:05.636790 DQS Delay:
894 10:02:05.639796 DQS0 = 0, DQS1 = 0
895 10:02:05.639891 DQM Delay:
896 10:02:05.643241 DQM0 = 89, DQM1 = 82
897 10:02:05.643344 DQ Delay:
898 10:02:05.646509 DQ0 =85, DQ1 =93, DQ2 =85, DQ3 =85
899 10:02:05.649635 DQ4 =93, DQ5 =77, DQ6 =93, DQ7 =101
900 10:02:05.652951 DQ8 =77, DQ9 =77, DQ10 =77, DQ11 =77
901 10:02:05.656269 DQ12 =85, DQ13 =85, DQ14 =93, DQ15 =85
902 10:02:05.656380
903 10:02:05.656451
904 10:02:05.656513 ==
905 10:02:05.660087 Dram Type= 6, Freq= 0, CH_0, rank 0
906 10:02:05.663624 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
907 10:02:05.663739 ==
908 10:02:05.663811
909 10:02:05.663875
910 10:02:05.666808 TX Vref Scan disable
911 10:02:05.670147 == TX Byte 0 ==
912 10:02:05.673111 Update DQ dly =582 (2 ,1, 38) DQ OEN =(1 ,6)
913 10:02:05.676692 Update DQM dly =582 (2 ,1, 38) DQM OEN =(1 ,6)
914 10:02:05.679942 == TX Byte 1 ==
915 10:02:05.683515 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
916 10:02:05.686967 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
917 10:02:05.687087 ==
918 10:02:05.689893 Dram Type= 6, Freq= 0, CH_0, rank 0
919 10:02:05.693332 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
920 10:02:05.693456 ==
921 10:02:05.707706 TX Vref=22, minBit 11, minWin=26, winSum=444
922 10:02:05.711032 TX Vref=24, minBit 10, minWin=27, winSum=452
923 10:02:05.714365 TX Vref=26, minBit 0, minWin=28, winSum=456
924 10:02:05.718197 TX Vref=28, minBit 10, minWin=27, winSum=456
925 10:02:05.720880 TX Vref=30, minBit 9, minWin=27, winSum=454
926 10:02:05.727548 TX Vref=32, minBit 0, minWin=28, winSum=453
927 10:02:05.731331 [TxChooseVref] Worse bit 0, Min win 28, Win sum 456, Final Vref 26
928 10:02:05.731482
929 10:02:05.734359 Final TX Range 1 Vref 26
930 10:02:05.734481
931 10:02:05.734576 ==
932 10:02:05.737513 Dram Type= 6, Freq= 0, CH_0, rank 0
933 10:02:05.741281 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
934 10:02:05.741415 ==
935 10:02:05.744433
936 10:02:05.744537
937 10:02:05.744604 TX Vref Scan disable
938 10:02:05.747948 == TX Byte 0 ==
939 10:02:05.751908 Update DQ dly =583 (2 ,1, 39) DQ OEN =(1 ,6)
940 10:02:05.754504 Update DQM dly =583 (2 ,1, 39) DQM OEN =(1 ,6)
941 10:02:05.758149 == TX Byte 1 ==
942 10:02:05.761869 Update DQ dly =578 (2 ,1, 34) DQ OEN =(1 ,6)
943 10:02:05.764697 Update DQM dly =578 (2 ,1, 34) DQM OEN =(1 ,6)
944 10:02:05.764812
945 10:02:05.768415 [DATLAT]
946 10:02:05.768517 Freq=800, CH0 RK0
947 10:02:05.768586
948 10:02:05.771641 DATLAT Default: 0xa
949 10:02:05.771739 0, 0xFFFF, sum = 0
950 10:02:05.774910 1, 0xFFFF, sum = 0
951 10:02:05.775013 2, 0xFFFF, sum = 0
952 10:02:05.778591 3, 0xFFFF, sum = 0
953 10:02:05.778698 4, 0xFFFF, sum = 0
954 10:02:05.781393 5, 0xFFFF, sum = 0
955 10:02:05.781516 6, 0xFFFF, sum = 0
956 10:02:05.784713 7, 0xFFFF, sum = 0
957 10:02:05.784867 8, 0xFFFF, sum = 0
958 10:02:05.787939 9, 0x0, sum = 1
959 10:02:05.788038 10, 0x0, sum = 2
960 10:02:05.791402 11, 0x0, sum = 3
961 10:02:05.791509 12, 0x0, sum = 4
962 10:02:05.794635 best_step = 10
963 10:02:05.794744
964 10:02:05.794813 ==
965 10:02:05.797977 Dram Type= 6, Freq= 0, CH_0, rank 0
966 10:02:05.801298 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
967 10:02:05.801426 ==
968 10:02:05.804761 RX Vref Scan: 1
969 10:02:05.804902
970 10:02:05.804971 Set Vref Range= 32 -> 127
971 10:02:05.805034
972 10:02:05.807941 RX Vref 32 -> 127, step: 1
973 10:02:05.808033
974 10:02:05.811505 RX Delay -79 -> 252, step: 8
975 10:02:05.811665
976 10:02:05.815135 Set Vref, RX VrefLevel [Byte0]: 32
977 10:02:05.818351 [Byte1]: 32
978 10:02:05.818455
979 10:02:05.821539 Set Vref, RX VrefLevel [Byte0]: 33
980 10:02:05.825888 [Byte1]: 33
981 10:02:05.826006
982 10:02:05.828457 Set Vref, RX VrefLevel [Byte0]: 34
983 10:02:05.832005 [Byte1]: 34
984 10:02:05.835766
985 10:02:05.839079 Set Vref, RX VrefLevel [Byte0]: 35
986 10:02:05.839190 [Byte1]: 35
987 10:02:05.843771
988 10:02:05.843891 Set Vref, RX VrefLevel [Byte0]: 36
989 10:02:05.847170 [Byte1]: 36
990 10:02:05.851372
991 10:02:05.851492 Set Vref, RX VrefLevel [Byte0]: 37
992 10:02:05.854699 [Byte1]: 37
993 10:02:05.858779
994 10:02:05.858905 Set Vref, RX VrefLevel [Byte0]: 38
995 10:02:05.862132 [Byte1]: 38
996 10:02:05.865863
997 10:02:05.865982 Set Vref, RX VrefLevel [Byte0]: 39
998 10:02:05.869062 [Byte1]: 39
999 10:02:05.873897
1000 10:02:05.874030 Set Vref, RX VrefLevel [Byte0]: 40
1001 10:02:05.877058 [Byte1]: 40
1002 10:02:05.880756
1003 10:02:05.880910 Set Vref, RX VrefLevel [Byte0]: 41
1004 10:02:05.884158 [Byte1]: 41
1005 10:02:05.888512
1006 10:02:05.888633 Set Vref, RX VrefLevel [Byte0]: 42
1007 10:02:05.892012 [Byte1]: 42
1008 10:02:05.896020
1009 10:02:05.896147 Set Vref, RX VrefLevel [Byte0]: 43
1010 10:02:05.899252 [Byte1]: 43
1011 10:02:05.903254
1012 10:02:05.903377 Set Vref, RX VrefLevel [Byte0]: 44
1013 10:02:05.906868 [Byte1]: 44
1014 10:02:05.911114
1015 10:02:05.911232 Set Vref, RX VrefLevel [Byte0]: 45
1016 10:02:05.914432 [Byte1]: 45
1017 10:02:05.918874
1018 10:02:05.918999 Set Vref, RX VrefLevel [Byte0]: 46
1019 10:02:05.921754 [Byte1]: 46
1020 10:02:05.926117
1021 10:02:05.926236 Set Vref, RX VrefLevel [Byte0]: 47
1022 10:02:05.929806 [Byte1]: 47
1023 10:02:05.933722
1024 10:02:05.933881 Set Vref, RX VrefLevel [Byte0]: 48
1025 10:02:05.937618 [Byte1]: 48
1026 10:02:05.941171
1027 10:02:05.941288 Set Vref, RX VrefLevel [Byte0]: 49
1028 10:02:05.945260 [Byte1]: 49
1029 10:02:05.949041
1030 10:02:05.949155 Set Vref, RX VrefLevel [Byte0]: 50
1031 10:02:05.952675 [Byte1]: 50
1032 10:02:05.956598
1033 10:02:05.956717 Set Vref, RX VrefLevel [Byte0]: 51
1034 10:02:05.959813 [Byte1]: 51
1035 10:02:05.964183
1036 10:02:05.964301 Set Vref, RX VrefLevel [Byte0]: 52
1037 10:02:05.967465 [Byte1]: 52
1038 10:02:05.971700
1039 10:02:05.971812 Set Vref, RX VrefLevel [Byte0]: 53
1040 10:02:05.974849 [Byte1]: 53
1041 10:02:05.978789
1042 10:02:05.978903 Set Vref, RX VrefLevel [Byte0]: 54
1043 10:02:05.982513 [Byte1]: 54
1044 10:02:05.986739
1045 10:02:05.986857 Set Vref, RX VrefLevel [Byte0]: 55
1046 10:02:05.990130 [Byte1]: 55
1047 10:02:05.994058
1048 10:02:05.994190 Set Vref, RX VrefLevel [Byte0]: 56
1049 10:02:05.997746 [Byte1]: 56
1050 10:02:06.001926
1051 10:02:06.002053 Set Vref, RX VrefLevel [Byte0]: 57
1052 10:02:06.004715 [Byte1]: 57
1053 10:02:06.009102
1054 10:02:06.009215 Set Vref, RX VrefLevel [Byte0]: 58
1055 10:02:06.012587 [Byte1]: 58
1056 10:02:06.016712
1057 10:02:06.016842 Set Vref, RX VrefLevel [Byte0]: 59
1058 10:02:06.020096 [Byte1]: 59
1059 10:02:06.024755
1060 10:02:06.024916 Set Vref, RX VrefLevel [Byte0]: 60
1061 10:02:06.028151 [Byte1]: 60
1062 10:02:06.031779
1063 10:02:06.031906 Set Vref, RX VrefLevel [Byte0]: 61
1064 10:02:06.035642 [Byte1]: 61
1065 10:02:06.039398
1066 10:02:06.039512 Set Vref, RX VrefLevel [Byte0]: 62
1067 10:02:06.043081 [Byte1]: 62
1068 10:02:06.046787
1069 10:02:06.046907 Set Vref, RX VrefLevel [Byte0]: 63
1070 10:02:06.050442 [Byte1]: 63
1071 10:02:06.054575
1072 10:02:06.054704 Set Vref, RX VrefLevel [Byte0]: 64
1073 10:02:06.057913 [Byte1]: 64
1074 10:02:06.062039
1075 10:02:06.062159 Set Vref, RX VrefLevel [Byte0]: 65
1076 10:02:06.065526 [Byte1]: 65
1077 10:02:06.069665
1078 10:02:06.069788 Set Vref, RX VrefLevel [Byte0]: 66
1079 10:02:06.072765 [Byte1]: 66
1080 10:02:06.077590
1081 10:02:06.077709 Set Vref, RX VrefLevel [Byte0]: 67
1082 10:02:06.080770 [Byte1]: 67
1083 10:02:06.084692
1084 10:02:06.084831 Set Vref, RX VrefLevel [Byte0]: 68
1085 10:02:06.088126 [Byte1]: 68
1086 10:02:06.092314
1087 10:02:06.092437 Set Vref, RX VrefLevel [Byte0]: 69
1088 10:02:06.096101 [Byte1]: 69
1089 10:02:06.099717
1090 10:02:06.099841 Set Vref, RX VrefLevel [Byte0]: 70
1091 10:02:06.102879 [Byte1]: 70
1092 10:02:06.107152
1093 10:02:06.107273 Set Vref, RX VrefLevel [Byte0]: 71
1094 10:02:06.111208 [Byte1]: 71
1095 10:02:06.115234
1096 10:02:06.115349 Set Vref, RX VrefLevel [Byte0]: 72
1097 10:02:06.118003 [Byte1]: 72
1098 10:02:06.122278
1099 10:02:06.122394 Set Vref, RX VrefLevel [Byte0]: 73
1100 10:02:06.125904 [Byte1]: 73
1101 10:02:06.129929
1102 10:02:06.130047 Set Vref, RX VrefLevel [Byte0]: 74
1103 10:02:06.133313 [Byte1]: 74
1104 10:02:06.137358
1105 10:02:06.137477 Set Vref, RX VrefLevel [Byte0]: 75
1106 10:02:06.140862 [Byte1]: 75
1107 10:02:06.145335
1108 10:02:06.145462 Set Vref, RX VrefLevel [Byte0]: 76
1109 10:02:06.148121 [Byte1]: 76
1110 10:02:06.152434
1111 10:02:06.152630 Set Vref, RX VrefLevel [Byte0]: 77
1112 10:02:06.156094 [Byte1]: 77
1113 10:02:06.160113
1114 10:02:06.160277 Final RX Vref Byte 0 = 60 to rank0
1115 10:02:06.163968 Final RX Vref Byte 1 = 60 to rank0
1116 10:02:06.166841 Final RX Vref Byte 0 = 60 to rank1
1117 10:02:06.170703 Final RX Vref Byte 1 = 60 to rank1==
1118 10:02:06.173280 Dram Type= 6, Freq= 0, CH_0, rank 0
1119 10:02:06.180172 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1120 10:02:06.180311 ==
1121 10:02:06.180385 DQS Delay:
1122 10:02:06.180447 DQS0 = 0, DQS1 = 0
1123 10:02:06.183596 DQM Delay:
1124 10:02:06.183693 DQM0 = 92, DQM1 = 86
1125 10:02:06.186867 DQ Delay:
1126 10:02:06.190420 DQ0 =92, DQ1 =96, DQ2 =88, DQ3 =88
1127 10:02:06.190532 DQ4 =96, DQ5 =80, DQ6 =100, DQ7 =96
1128 10:02:06.193720 DQ8 =76, DQ9 =76, DQ10 =84, DQ11 =80
1129 10:02:06.200048 DQ12 =92, DQ13 =92, DQ14 =96, DQ15 =92
1130 10:02:06.200189
1131 10:02:06.200260
1132 10:02:06.206995 [DQSOSCAuto] RK0, (LSB)MR18= 0x4b41, (MSB)MR19= 0x606, tDQSOscB0 = 393 ps tDQSOscB1 = 391 ps
1133 10:02:06.210648 CH0 RK0: MR19=606, MR18=4B41
1134 10:02:06.217458 CH0_RK0: MR19=0x606, MR18=0x4B41, DQSOSC=391, MR23=63, INC=96, DEC=64
1135 10:02:06.217600
1136 10:02:06.220167 ----->DramcWriteLeveling(PI) begin...
1137 10:02:06.220260 ==
1138 10:02:06.223387 Dram Type= 6, Freq= 0, CH_0, rank 1
1139 10:02:06.226987 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1140 10:02:06.227097 ==
1141 10:02:06.230229 Write leveling (Byte 0): 34 => 34
1142 10:02:06.234017 Write leveling (Byte 1): 29 => 29
1143 10:02:06.237175 DramcWriteLeveling(PI) end<-----
1144 10:02:06.237287
1145 10:02:06.237354 ==
1146 10:02:06.240202 Dram Type= 6, Freq= 0, CH_0, rank 1
1147 10:02:06.243445 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1148 10:02:06.243554 ==
1149 10:02:06.247079 [Gating] SW mode calibration
1150 10:02:06.253769 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
1151 10:02:06.297949 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
1152 10:02:06.298299 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
1153 10:02:06.299084 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)
1154 10:02:06.299346 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)
1155 10:02:06.299416 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1156 10:02:06.299660 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1157 10:02:06.299904 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1158 10:02:06.300743 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1159 10:02:06.301031 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1160 10:02:06.301103 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1161 10:02:06.341899 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1162 10:02:06.342251 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1163 10:02:06.342507 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1164 10:02:06.342861 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1165 10:02:06.342945 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1166 10:02:06.343498 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1167 10:02:06.343778 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1168 10:02:06.344131 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1169 10:02:06.344410 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1170 10:02:06.344481 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)
1171 10:02:06.355593 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1172 10:02:06.356034 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1173 10:02:06.359023 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1174 10:02:06.362515 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1175 10:02:06.365972 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1176 10:02:06.369086 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1177 10:02:06.373030 0 9 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1178 10:02:06.379057 0 9 8 | B1->B0 | 2d2d 2a2a | 0 0 | (0 0) (0 0)
1179 10:02:06.382265 0 9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1180 10:02:06.385675 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1181 10:02:06.392145 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1182 10:02:06.395809 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1183 10:02:06.399068 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1184 10:02:06.405839 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1185 10:02:06.409405 0 10 4 | B1->B0 | 3232 3434 | 0 1 | (0 0) (1 0)
1186 10:02:06.412243 0 10 8 | B1->B0 | 2525 2626 | 0 1 | (1 0) (1 0)
1187 10:02:06.419203 0 10 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (1 0)
1188 10:02:06.422474 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1189 10:02:06.425978 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1190 10:02:06.429497 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1191 10:02:06.433253 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1192 10:02:06.440232 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1193 10:02:06.444111 0 11 4 | B1->B0 | 2424 2323 | 0 0 | (0 0) (0 0)
1194 10:02:06.447441 0 11 8 | B1->B0 | 3b3b 3a3a | 0 0 | (0 0) (0 0)
1195 10:02:06.454431 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1196 10:02:06.457956 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1197 10:02:06.461035 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1198 10:02:06.464718 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1199 10:02:06.470897 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1200 10:02:06.474404 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1201 10:02:06.478252 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1202 10:02:06.484324 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
1203 10:02:06.487739 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 1)
1204 10:02:06.491379 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1205 10:02:06.498021 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1206 10:02:06.501134 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1207 10:02:06.505431 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1208 10:02:06.508339 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1209 10:02:06.514855 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1210 10:02:06.517936 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1211 10:02:06.521444 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1212 10:02:06.528185 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1213 10:02:06.531578 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1214 10:02:06.534548 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1215 10:02:06.541307 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1216 10:02:06.544748 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1217 10:02:06.548496 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1218 10:02:06.554581 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
1219 10:02:06.558380 0 14 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1220 10:02:06.561609 Total UI for P1: 0, mck2ui 16
1221 10:02:06.565120 best dqsien dly found for B0: ( 0, 14, 8)
1222 10:02:06.567760 Total UI for P1: 0, mck2ui 16
1223 10:02:06.571219 best dqsien dly found for B1: ( 0, 14, 8)
1224 10:02:06.574515 best DQS0 dly(MCK, UI, PI) = (0, 14, 8)
1225 10:02:06.578010 best DQS1 dly(MCK, UI, PI) = (0, 14, 8)
1226 10:02:06.578131
1227 10:02:06.581503 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 8)
1228 10:02:06.584673 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 8)
1229 10:02:06.588149 [Gating] SW calibration Done
1230 10:02:06.588262 ==
1231 10:02:06.591669 Dram Type= 6, Freq= 0, CH_0, rank 1
1232 10:02:06.595085 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1233 10:02:06.595214 ==
1234 10:02:06.597915 RX Vref Scan: 0
1235 10:02:06.598004
1236 10:02:06.601361 RX Vref 0 -> 0, step: 1
1237 10:02:06.601453
1238 10:02:06.604481 RX Delay -130 -> 252, step: 16
1239 10:02:06.608106 iDelay=222, Bit 0, Center 93 (-18 ~ 205) 224
1240 10:02:06.611328 iDelay=222, Bit 1, Center 93 (-18 ~ 205) 224
1241 10:02:06.614864 iDelay=222, Bit 2, Center 93 (-18 ~ 205) 224
1242 10:02:06.617909 iDelay=222, Bit 3, Center 93 (-18 ~ 205) 224
1243 10:02:06.621770 iDelay=222, Bit 4, Center 93 (-18 ~ 205) 224
1244 10:02:06.627675 iDelay=222, Bit 5, Center 93 (-18 ~ 205) 224
1245 10:02:06.631381 iDelay=222, Bit 6, Center 93 (-18 ~ 205) 224
1246 10:02:06.634764 iDelay=222, Bit 7, Center 101 (-18 ~ 221) 240
1247 10:02:06.638045 iDelay=222, Bit 8, Center 77 (-34 ~ 189) 224
1248 10:02:06.641356 iDelay=222, Bit 9, Center 77 (-34 ~ 189) 224
1249 10:02:06.648008 iDelay=222, Bit 10, Center 85 (-18 ~ 189) 208
1250 10:02:06.651235 iDelay=222, Bit 11, Center 77 (-34 ~ 189) 224
1251 10:02:06.654681 iDelay=222, Bit 12, Center 93 (-18 ~ 205) 224
1252 10:02:06.658193 iDelay=222, Bit 13, Center 93 (-18 ~ 205) 224
1253 10:02:06.664770 iDelay=222, Bit 14, Center 93 (-18 ~ 205) 224
1254 10:02:06.667969 iDelay=222, Bit 15, Center 93 (-18 ~ 205) 224
1255 10:02:06.668092 ==
1256 10:02:06.671108 Dram Type= 6, Freq= 0, CH_0, rank 1
1257 10:02:06.674624 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1258 10:02:06.674741 ==
1259 10:02:06.674814 DQS Delay:
1260 10:02:06.677874 DQS0 = 0, DQS1 = 0
1261 10:02:06.677969 DQM Delay:
1262 10:02:06.681209 DQM0 = 94, DQM1 = 86
1263 10:02:06.681302 DQ Delay:
1264 10:02:06.684433 DQ0 =93, DQ1 =93, DQ2 =93, DQ3 =93
1265 10:02:06.687675 DQ4 =93, DQ5 =93, DQ6 =93, DQ7 =101
1266 10:02:06.691422 DQ8 =77, DQ9 =77, DQ10 =85, DQ11 =77
1267 10:02:06.694720 DQ12 =93, DQ13 =93, DQ14 =93, DQ15 =93
1268 10:02:06.694842
1269 10:02:06.694916
1270 10:02:06.694977 ==
1271 10:02:06.697784 Dram Type= 6, Freq= 0, CH_0, rank 1
1272 10:02:06.701499 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1273 10:02:06.704685 ==
1274 10:02:06.704850
1275 10:02:06.704939
1276 10:02:06.705000 TX Vref Scan disable
1277 10:02:06.707923 == TX Byte 0 ==
1278 10:02:06.711098 Update DQ dly =585 (2 ,1, 41) DQ OEN =(1 ,6)
1279 10:02:06.714693 Update DQM dly =585 (2 ,1, 41) DQM OEN =(1 ,6)
1280 10:02:06.718135 == TX Byte 1 ==
1281 10:02:06.720919 Update DQ dly =579 (2 ,1, 35) DQ OEN =(1 ,6)
1282 10:02:06.724650 Update DQM dly =579 (2 ,1, 35) DQM OEN =(1 ,6)
1283 10:02:06.727797 ==
1284 10:02:06.727909 Dram Type= 6, Freq= 0, CH_0, rank 1
1285 10:02:06.734096 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1286 10:02:06.734232 ==
1287 10:02:06.747621 TX Vref=22, minBit 1, minWin=28, winSum=450
1288 10:02:06.750914 TX Vref=24, minBit 10, minWin=27, winSum=451
1289 10:02:06.753746 TX Vref=26, minBit 8, minWin=27, winSum=451
1290 10:02:06.757152 TX Vref=28, minBit 8, minWin=28, winSum=457
1291 10:02:06.761047 TX Vref=30, minBit 2, minWin=28, winSum=455
1292 10:02:06.763832 TX Vref=32, minBit 2, minWin=28, winSum=455
1293 10:02:06.770708 [TxChooseVref] Worse bit 8, Min win 28, Win sum 457, Final Vref 28
1294 10:02:06.770853
1295 10:02:06.774554 Final TX Range 1 Vref 28
1296 10:02:06.774656
1297 10:02:06.774720 ==
1298 10:02:06.777215 Dram Type= 6, Freq= 0, CH_0, rank 1
1299 10:02:06.780950 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1300 10:02:06.781061 ==
1301 10:02:06.781127
1302 10:02:06.781187
1303 10:02:06.783901 TX Vref Scan disable
1304 10:02:06.787339 == TX Byte 0 ==
1305 10:02:06.790922 Update DQ dly =585 (2 ,1, 41) DQ OEN =(1 ,6)
1306 10:02:06.793862 Update DQM dly =585 (2 ,1, 41) DQM OEN =(1 ,6)
1307 10:02:06.797362 == TX Byte 1 ==
1308 10:02:06.800513 Update DQ dly =578 (2 ,1, 34) DQ OEN =(1 ,6)
1309 10:02:06.804056 Update DQM dly =578 (2 ,1, 34) DQM OEN =(1 ,6)
1310 10:02:06.807198
1311 10:02:06.807308 [DATLAT]
1312 10:02:06.807374 Freq=800, CH0 RK1
1313 10:02:06.807435
1314 10:02:06.810656 DATLAT Default: 0xa
1315 10:02:06.810750 0, 0xFFFF, sum = 0
1316 10:02:06.814320 1, 0xFFFF, sum = 0
1317 10:02:06.814423 2, 0xFFFF, sum = 0
1318 10:02:06.817268 3, 0xFFFF, sum = 0
1319 10:02:06.817361 4, 0xFFFF, sum = 0
1320 10:02:06.821319 5, 0xFFFF, sum = 0
1321 10:02:06.821428 6, 0xFFFF, sum = 0
1322 10:02:06.824425 7, 0xFFFF, sum = 0
1323 10:02:06.824519 8, 0xFFFF, sum = 0
1324 10:02:06.827790 9, 0x0, sum = 1
1325 10:02:06.827885 10, 0x0, sum = 2
1326 10:02:06.830691 11, 0x0, sum = 3
1327 10:02:06.830781 12, 0x0, sum = 4
1328 10:02:06.834372 best_step = 10
1329 10:02:06.834475
1330 10:02:06.834540 ==
1331 10:02:06.837869 Dram Type= 6, Freq= 0, CH_0, rank 1
1332 10:02:06.841045 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1333 10:02:06.841146 ==
1334 10:02:06.844218 RX Vref Scan: 0
1335 10:02:06.844323
1336 10:02:06.844387 RX Vref 0 -> 0, step: 1
1337 10:02:06.844449
1338 10:02:06.847796 RX Delay -79 -> 252, step: 8
1339 10:02:06.854608 iDelay=209, Bit 0, Center 92 (-15 ~ 200) 216
1340 10:02:06.857307 iDelay=209, Bit 1, Center 96 (-7 ~ 200) 208
1341 10:02:06.860854 iDelay=209, Bit 2, Center 88 (-23 ~ 200) 224
1342 10:02:06.864266 iDelay=209, Bit 3, Center 88 (-23 ~ 200) 224
1343 10:02:06.867372 iDelay=209, Bit 4, Center 92 (-15 ~ 200) 216
1344 10:02:06.874435 iDelay=209, Bit 5, Center 88 (-23 ~ 200) 224
1345 10:02:06.877594 iDelay=209, Bit 6, Center 100 (-7 ~ 208) 216
1346 10:02:06.881060 iDelay=209, Bit 7, Center 100 (-7 ~ 208) 216
1347 10:02:06.884050 iDelay=209, Bit 8, Center 76 (-31 ~ 184) 216
1348 10:02:06.888183 iDelay=209, Bit 9, Center 72 (-31 ~ 176) 208
1349 10:02:06.891229 iDelay=209, Bit 10, Center 84 (-23 ~ 192) 216
1350 10:02:06.897228 iDelay=209, Bit 11, Center 76 (-31 ~ 184) 216
1351 10:02:06.900538 iDelay=209, Bit 12, Center 88 (-23 ~ 200) 224
1352 10:02:06.904110 iDelay=209, Bit 13, Center 92 (-15 ~ 200) 216
1353 10:02:06.907731 iDelay=209, Bit 14, Center 92 (-15 ~ 200) 216
1354 10:02:06.914116 iDelay=209, Bit 15, Center 92 (-15 ~ 200) 216
1355 10:02:06.914260 ==
1356 10:02:06.917855 Dram Type= 6, Freq= 0, CH_0, rank 1
1357 10:02:06.920732 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1358 10:02:06.920874 ==
1359 10:02:06.920942 DQS Delay:
1360 10:02:06.924065 DQS0 = 0, DQS1 = 0
1361 10:02:06.924158 DQM Delay:
1362 10:02:06.927905 DQM0 = 93, DQM1 = 84
1363 10:02:06.928010 DQ Delay:
1364 10:02:06.930994 DQ0 =92, DQ1 =96, DQ2 =88, DQ3 =88
1365 10:02:06.934660 DQ4 =92, DQ5 =88, DQ6 =100, DQ7 =100
1366 10:02:06.937321 DQ8 =76, DQ9 =72, DQ10 =84, DQ11 =76
1367 10:02:06.941382 DQ12 =88, DQ13 =92, DQ14 =92, DQ15 =92
1368 10:02:06.941503
1369 10:02:06.941572
1370 10:02:06.947654 [DQSOSCAuto] RK1, (LSB)MR18= 0x4010, (MSB)MR19= 0x606, tDQSOscB0 = 405 ps tDQSOscB1 = 393 ps
1371 10:02:06.951100 CH0 RK1: MR19=606, MR18=4010
1372 10:02:06.958125 CH0_RK1: MR19=0x606, MR18=0x4010, DQSOSC=393, MR23=63, INC=95, DEC=63
1373 10:02:06.961149 [RxdqsGatingPostProcess] freq 800
1374 10:02:06.967828 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
1375 10:02:06.967982 Pre-setting of DQS Precalculation
1376 10:02:06.974408 [DualRankRxdatlatCal] RK0: 10, RK1: 10, Final_Datlat 10
1377 10:02:06.974549 ==
1378 10:02:06.977849 Dram Type= 6, Freq= 0, CH_1, rank 0
1379 10:02:06.981110 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1380 10:02:06.981220 ==
1381 10:02:06.987953 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
1382 10:02:06.994266 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
1383 10:02:07.002865 [CA 0] Center 36 (6~67) winsize 62
1384 10:02:07.005645 [CA 1] Center 36 (6~67) winsize 62
1385 10:02:07.008712 [CA 2] Center 34 (4~65) winsize 62
1386 10:02:07.012419 [CA 3] Center 34 (4~65) winsize 62
1387 10:02:07.015529 [CA 4] Center 35 (5~65) winsize 61
1388 10:02:07.018682 [CA 5] Center 34 (4~64) winsize 61
1389 10:02:07.018796
1390 10:02:07.022692 [CmdBusTrainingLP45] Vref(ca) range 1: 32
1391 10:02:07.022802
1392 10:02:07.025391 [CATrainingPosCal] consider 1 rank data
1393 10:02:07.029002 u2DelayCellTimex100 = 270/100 ps
1394 10:02:07.032022 CA0 delay=36 (6~67),Diff = 2 PI (14 cell)
1395 10:02:07.035334 CA1 delay=36 (6~67),Diff = 2 PI (14 cell)
1396 10:02:07.042290 CA2 delay=34 (4~65),Diff = 0 PI (0 cell)
1397 10:02:07.045741 CA3 delay=34 (4~65),Diff = 0 PI (0 cell)
1398 10:02:07.048674 CA4 delay=35 (5~65),Diff = 1 PI (7 cell)
1399 10:02:07.052151 CA5 delay=34 (4~64),Diff = 0 PI (0 cell)
1400 10:02:07.052270
1401 10:02:07.055671 CA PerBit enable=1, Macro0, CA PI delay=34
1402 10:02:07.055775
1403 10:02:07.059040 [CBTSetCACLKResult] CA Dly = 34
1404 10:02:07.059141 CS Dly: 5 (0~36)
1405 10:02:07.062044 ==
1406 10:02:07.062134 Dram Type= 6, Freq= 0, CH_1, rank 1
1407 10:02:07.068867 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1408 10:02:07.069000 ==
1409 10:02:07.072240 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
1410 10:02:07.079015 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34
1411 10:02:07.089133 [CA 0] Center 36 (6~67) winsize 62
1412 10:02:07.093555 [CA 1] Center 36 (6~67) winsize 62
1413 10:02:07.096860 [CA 2] Center 35 (5~66) winsize 62
1414 10:02:07.100938 [CA 3] Center 35 (5~65) winsize 61
1415 10:02:07.104361 [CA 4] Center 35 (4~66) winsize 63
1416 10:02:07.104511 [CA 5] Center 34 (4~65) winsize 62
1417 10:02:07.104609
1418 10:02:07.107951 [CmdBusTrainingLP45] Vref(ca) range 1: 32
1419 10:02:07.108074
1420 10:02:07.111658 [CATrainingPosCal] consider 2 rank data
1421 10:02:07.115585 u2DelayCellTimex100 = 270/100 ps
1422 10:02:07.119676 CA0 delay=36 (6~67),Diff = 2 PI (14 cell)
1423 10:02:07.123737 CA1 delay=36 (6~67),Diff = 2 PI (14 cell)
1424 10:02:07.126291 CA2 delay=35 (5~65),Diff = 1 PI (7 cell)
1425 10:02:07.129914 CA3 delay=35 (5~65),Diff = 1 PI (7 cell)
1426 10:02:07.132890 CA4 delay=35 (5~65),Diff = 1 PI (7 cell)
1427 10:02:07.136607 CA5 delay=34 (4~64),Diff = 0 PI (0 cell)
1428 10:02:07.136729
1429 10:02:07.143308 CA PerBit enable=1, Macro0, CA PI delay=34
1430 10:02:07.143451
1431 10:02:07.143520 [CBTSetCACLKResult] CA Dly = 34
1432 10:02:07.146338 CS Dly: 6 (0~38)
1433 10:02:07.146433
1434 10:02:07.150078 ----->DramcWriteLeveling(PI) begin...
1435 10:02:07.150178 ==
1436 10:02:07.153408 Dram Type= 6, Freq= 0, CH_1, rank 0
1437 10:02:07.156937 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1438 10:02:07.157048 ==
1439 10:02:07.160308 Write leveling (Byte 0): 26 => 26
1440 10:02:07.163520 Write leveling (Byte 1): 26 => 26
1441 10:02:07.166662 DramcWriteLeveling(PI) end<-----
1442 10:02:07.166763
1443 10:02:07.166830 ==
1444 10:02:07.170134 Dram Type= 6, Freq= 0, CH_1, rank 0
1445 10:02:07.173231 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1446 10:02:07.173328 ==
1447 10:02:07.176642 [Gating] SW mode calibration
1448 10:02:07.183300 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
1449 10:02:07.190158 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
1450 10:02:07.193015 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 1)
1451 10:02:07.200280 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)
1452 10:02:07.203619 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1453 10:02:07.206946 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1454 10:02:07.210064 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1455 10:02:07.216607 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1456 10:02:07.220237 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1457 10:02:07.223188 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1458 10:02:07.229995 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1459 10:02:07.233360 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1460 10:02:07.236977 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1461 10:02:07.243381 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1462 10:02:07.246600 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1463 10:02:07.249912 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1464 10:02:07.256553 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1465 10:02:07.260025 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1466 10:02:07.263638 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1467 10:02:07.270527 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 0)
1468 10:02:07.273501 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1469 10:02:07.276758 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1470 10:02:07.283450 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1471 10:02:07.287271 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1472 10:02:07.290023 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1473 10:02:07.293640 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1474 10:02:07.300340 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1475 10:02:07.303728 0 9 4 | B1->B0 | 2323 2525 | 1 1 | (1 1) (1 1)
1476 10:02:07.307129 0 9 8 | B1->B0 | 3333 3434 | 0 1 | (0 0) (1 1)
1477 10:02:07.313888 0 9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1478 10:02:07.317114 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1479 10:02:07.320340 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1480 10:02:07.326864 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1481 10:02:07.330301 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1482 10:02:07.333548 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1483 10:02:07.340483 0 10 4 | B1->B0 | 3030 2f2f | 1 0 | (0 0) (1 0)
1484 10:02:07.343492 0 10 8 | B1->B0 | 2727 2323 | 0 0 | (0 0) (0 0)
1485 10:02:07.347444 0 10 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1486 10:02:07.353793 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1487 10:02:07.356921 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1488 10:02:07.360500 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1489 10:02:07.367296 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1490 10:02:07.370975 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1491 10:02:07.373854 0 11 4 | B1->B0 | 2d2d 3636 | 0 0 | (0 0) (0 0)
1492 10:02:07.377574 0 11 8 | B1->B0 | 4545 4646 | 0 0 | (0 0) (0 0)
1493 10:02:07.383709 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1494 10:02:07.387304 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1495 10:02:07.390532 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1496 10:02:07.397144 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1497 10:02:07.400559 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1498 10:02:07.403760 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1499 10:02:07.410744 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
1500 10:02:07.414300 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1501 10:02:07.417254 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1502 10:02:07.423846 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1503 10:02:07.427016 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1504 10:02:07.430719 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1505 10:02:07.437313 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1506 10:02:07.440786 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1507 10:02:07.443985 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1508 10:02:07.450856 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1509 10:02:07.454203 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1510 10:02:07.457957 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1511 10:02:07.460774 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1512 10:02:07.467353 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1513 10:02:07.471225 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1514 10:02:07.473977 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
1515 10:02:07.480632 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
1516 10:02:07.483862 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1517 10:02:07.487411 Total UI for P1: 0, mck2ui 16
1518 10:02:07.491326 best dqsien dly found for B0: ( 0, 14, 2)
1519 10:02:07.493824 Total UI for P1: 0, mck2ui 16
1520 10:02:07.497133 best dqsien dly found for B1: ( 0, 14, 2)
1521 10:02:07.500909 best DQS0 dly(MCK, UI, PI) = (0, 14, 2)
1522 10:02:07.503874 best DQS1 dly(MCK, UI, PI) = (0, 14, 2)
1523 10:02:07.504002
1524 10:02:07.507266 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 2)
1525 10:02:07.511275 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 2)
1526 10:02:07.514645 [Gating] SW calibration Done
1527 10:02:07.514780 ==
1528 10:02:07.517743 Dram Type= 6, Freq= 0, CH_1, rank 0
1529 10:02:07.521601 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1530 10:02:07.521738 ==
1531 10:02:07.524418 RX Vref Scan: 0
1532 10:02:07.524532
1533 10:02:07.527469 RX Vref 0 -> 0, step: 1
1534 10:02:07.527588
1535 10:02:07.527684 RX Delay -130 -> 252, step: 16
1536 10:02:07.534274 iDelay=222, Bit 0, Center 93 (-18 ~ 205) 224
1537 10:02:07.537882 iDelay=222, Bit 1, Center 85 (-18 ~ 189) 208
1538 10:02:07.540971 iDelay=222, Bit 2, Center 77 (-34 ~ 189) 224
1539 10:02:07.544248 iDelay=222, Bit 3, Center 93 (-18 ~ 205) 224
1540 10:02:07.547680 iDelay=222, Bit 4, Center 93 (-18 ~ 205) 224
1541 10:02:07.554285 iDelay=222, Bit 5, Center 109 (-2 ~ 221) 224
1542 10:02:07.557954 iDelay=222, Bit 6, Center 101 (-18 ~ 221) 240
1543 10:02:07.561026 iDelay=222, Bit 7, Center 93 (-18 ~ 205) 224
1544 10:02:07.564382 iDelay=222, Bit 8, Center 77 (-34 ~ 189) 224
1545 10:02:07.567855 iDelay=222, Bit 9, Center 77 (-34 ~ 189) 224
1546 10:02:07.574504 iDelay=222, Bit 10, Center 85 (-18 ~ 189) 208
1547 10:02:07.578245 iDelay=222, Bit 11, Center 77 (-34 ~ 189) 224
1548 10:02:07.581066 iDelay=222, Bit 12, Center 93 (-18 ~ 205) 224
1549 10:02:07.584539 iDelay=222, Bit 13, Center 93 (-18 ~ 205) 224
1550 10:02:07.587647 iDelay=222, Bit 14, Center 93 (-18 ~ 205) 224
1551 10:02:07.594470 iDelay=222, Bit 15, Center 93 (-18 ~ 205) 224
1552 10:02:07.594653 ==
1553 10:02:07.597706 Dram Type= 6, Freq= 0, CH_1, rank 0
1554 10:02:07.601259 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1555 10:02:07.601406 ==
1556 10:02:07.601504 DQS Delay:
1557 10:02:07.604313 DQS0 = 0, DQS1 = 0
1558 10:02:07.604449 DQM Delay:
1559 10:02:07.607675 DQM0 = 93, DQM1 = 86
1560 10:02:07.607800 DQ Delay:
1561 10:02:07.611116 DQ0 =93, DQ1 =85, DQ2 =77, DQ3 =93
1562 10:02:07.614352 DQ4 =93, DQ5 =109, DQ6 =101, DQ7 =93
1563 10:02:07.617901 DQ8 =77, DQ9 =77, DQ10 =85, DQ11 =77
1564 10:02:07.621606 DQ12 =93, DQ13 =93, DQ14 =93, DQ15 =93
1565 10:02:07.621742
1566 10:02:07.621836
1567 10:02:07.621925 ==
1568 10:02:07.624745 Dram Type= 6, Freq= 0, CH_1, rank 0
1569 10:02:07.627797 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1570 10:02:07.627923 ==
1571 10:02:07.628019
1572 10:02:07.631508
1573 10:02:07.631630 TX Vref Scan disable
1574 10:02:07.634853 == TX Byte 0 ==
1575 10:02:07.638235 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
1576 10:02:07.641465 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
1577 10:02:07.644538 == TX Byte 1 ==
1578 10:02:07.648162 Update DQ dly =576 (2 ,1, 32) DQ OEN =(1 ,6)
1579 10:02:07.651607 Update DQM dly =576 (2 ,1, 32) DQM OEN =(1 ,6)
1580 10:02:07.651747 ==
1581 10:02:07.654810 Dram Type= 6, Freq= 0, CH_1, rank 0
1582 10:02:07.660984 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1583 10:02:07.661161 ==
1584 10:02:07.673007 TX Vref=22, minBit 0, minWin=26, winSum=430
1585 10:02:07.676398 TX Vref=24, minBit 1, minWin=26, winSum=438
1586 10:02:07.679765 TX Vref=26, minBit 3, minWin=26, winSum=441
1587 10:02:07.683037 TX Vref=28, minBit 3, minWin=26, winSum=447
1588 10:02:07.686531 TX Vref=30, minBit 1, minWin=27, winSum=444
1589 10:02:07.689856 TX Vref=32, minBit 3, minWin=26, winSum=442
1590 10:02:07.696320 [TxChooseVref] Worse bit 1, Min win 27, Win sum 444, Final Vref 30
1591 10:02:07.696508
1592 10:02:07.699980 Final TX Range 1 Vref 30
1593 10:02:07.700114
1594 10:02:07.700214 ==
1595 10:02:07.702868 Dram Type= 6, Freq= 0, CH_1, rank 0
1596 10:02:07.706589 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1597 10:02:07.706733 ==
1598 10:02:07.706833
1599 10:02:07.706925
1600 10:02:07.709867 TX Vref Scan disable
1601 10:02:07.713172 == TX Byte 0 ==
1602 10:02:07.716149 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
1603 10:02:07.719557 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
1604 10:02:07.722876 == TX Byte 1 ==
1605 10:02:07.726255 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
1606 10:02:07.729722 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
1607 10:02:07.729863
1608 10:02:07.733293 [DATLAT]
1609 10:02:07.733421 Freq=800, CH1 RK0
1610 10:02:07.733519
1611 10:02:07.736452 DATLAT Default: 0xa
1612 10:02:07.736570 0, 0xFFFF, sum = 0
1613 10:02:07.739583 1, 0xFFFF, sum = 0
1614 10:02:07.739708 2, 0xFFFF, sum = 0
1615 10:02:07.742949 3, 0xFFFF, sum = 0
1616 10:02:07.743071 4, 0xFFFF, sum = 0
1617 10:02:07.746433 5, 0xFFFF, sum = 0
1618 10:02:07.746564 6, 0xFFFF, sum = 0
1619 10:02:07.750439 7, 0xFFFF, sum = 0
1620 10:02:07.750570 8, 0xFFFF, sum = 0
1621 10:02:07.752959 9, 0x0, sum = 1
1622 10:02:07.753073 10, 0x0, sum = 2
1623 10:02:07.756199 11, 0x0, sum = 3
1624 10:02:07.756323 12, 0x0, sum = 4
1625 10:02:07.759867 best_step = 10
1626 10:02:07.759992
1627 10:02:07.760087 ==
1628 10:02:07.762877 Dram Type= 6, Freq= 0, CH_1, rank 0
1629 10:02:07.766373 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1630 10:02:07.766514 ==
1631 10:02:07.769565 RX Vref Scan: 1
1632 10:02:07.769686
1633 10:02:07.769782 Set Vref Range= 32 -> 127
1634 10:02:07.769873
1635 10:02:07.773147 RX Vref 32 -> 127, step: 1
1636 10:02:07.773264
1637 10:02:07.776670 RX Delay -79 -> 252, step: 8
1638 10:02:07.776810
1639 10:02:07.779766 Set Vref, RX VrefLevel [Byte0]: 32
1640 10:02:07.783117 [Byte1]: 32
1641 10:02:07.783248
1642 10:02:07.786504 Set Vref, RX VrefLevel [Byte0]: 33
1643 10:02:07.790078 [Byte1]: 33
1644 10:02:07.790216
1645 10:02:07.793294 Set Vref, RX VrefLevel [Byte0]: 34
1646 10:02:07.796748 [Byte1]: 34
1647 10:02:07.800287
1648 10:02:07.800438 Set Vref, RX VrefLevel [Byte0]: 35
1649 10:02:07.803572 [Byte1]: 35
1650 10:02:07.807962
1651 10:02:07.808119 Set Vref, RX VrefLevel [Byte0]: 36
1652 10:02:07.811341 [Byte1]: 36
1653 10:02:07.815783
1654 10:02:07.815933 Set Vref, RX VrefLevel [Byte0]: 37
1655 10:02:07.818490 [Byte1]: 37
1656 10:02:07.823151
1657 10:02:07.823293 Set Vref, RX VrefLevel [Byte0]: 38
1658 10:02:07.826522 [Byte1]: 38
1659 10:02:07.830842
1660 10:02:07.831011 Set Vref, RX VrefLevel [Byte0]: 39
1661 10:02:07.833784 [Byte1]: 39
1662 10:02:07.838418
1663 10:02:07.838569 Set Vref, RX VrefLevel [Byte0]: 40
1664 10:02:07.841514 [Byte1]: 40
1665 10:02:07.845420
1666 10:02:07.845624 Set Vref, RX VrefLevel [Byte0]: 41
1667 10:02:07.849183 [Byte1]: 41
1668 10:02:07.853507
1669 10:02:07.853656 Set Vref, RX VrefLevel [Byte0]: 42
1670 10:02:07.857102 [Byte1]: 42
1671 10:02:07.860541
1672 10:02:07.860676 Set Vref, RX VrefLevel [Byte0]: 43
1673 10:02:07.863974 [Byte1]: 43
1674 10:02:07.868639
1675 10:02:07.868790 Set Vref, RX VrefLevel [Byte0]: 44
1676 10:02:07.871902 [Byte1]: 44
1677 10:02:07.876257
1678 10:02:07.876413 Set Vref, RX VrefLevel [Byte0]: 45
1679 10:02:07.879410 [Byte1]: 45
1680 10:02:07.883599
1681 10:02:07.883743 Set Vref, RX VrefLevel [Byte0]: 46
1682 10:02:07.886566 [Byte1]: 46
1683 10:02:07.891476
1684 10:02:07.891631 Set Vref, RX VrefLevel [Byte0]: 47
1685 10:02:07.894206 [Byte1]: 47
1686 10:02:07.898819
1687 10:02:07.898947 Set Vref, RX VrefLevel [Byte0]: 48
1688 10:02:07.901984 [Byte1]: 48
1689 10:02:07.905838
1690 10:02:07.905956 Set Vref, RX VrefLevel [Byte0]: 49
1691 10:02:07.909350 [Byte1]: 49
1692 10:02:07.913442
1693 10:02:07.913558 Set Vref, RX VrefLevel [Byte0]: 50
1694 10:02:07.917306 [Byte1]: 50
1695 10:02:07.921357
1696 10:02:07.921473 Set Vref, RX VrefLevel [Byte0]: 51
1697 10:02:07.924488 [Byte1]: 51
1698 10:02:07.928993
1699 10:02:07.929110 Set Vref, RX VrefLevel [Byte0]: 52
1700 10:02:07.932153 [Byte1]: 52
1701 10:02:07.936163
1702 10:02:07.936279 Set Vref, RX VrefLevel [Byte0]: 53
1703 10:02:07.942614 [Byte1]: 53
1704 10:02:07.942746
1705 10:02:07.946388 Set Vref, RX VrefLevel [Byte0]: 54
1706 10:02:07.949364 [Byte1]: 54
1707 10:02:07.949469
1708 10:02:07.952934 Set Vref, RX VrefLevel [Byte0]: 55
1709 10:02:07.956106 [Byte1]: 55
1710 10:02:07.956219
1711 10:02:07.959659 Set Vref, RX VrefLevel [Byte0]: 56
1712 10:02:07.962882 [Byte1]: 56
1713 10:02:07.966610
1714 10:02:07.966731 Set Vref, RX VrefLevel [Byte0]: 57
1715 10:02:07.969710 [Byte1]: 57
1716 10:02:07.973785
1717 10:02:07.973932 Set Vref, RX VrefLevel [Byte0]: 58
1718 10:02:07.977427 [Byte1]: 58
1719 10:02:07.981763
1720 10:02:07.981891 Set Vref, RX VrefLevel [Byte0]: 59
1721 10:02:07.984842 [Byte1]: 59
1722 10:02:07.989459
1723 10:02:07.989582 Set Vref, RX VrefLevel [Byte0]: 60
1724 10:02:07.992329 [Byte1]: 60
1725 10:02:07.996769
1726 10:02:07.996961 Set Vref, RX VrefLevel [Byte0]: 61
1727 10:02:07.999935 [Byte1]: 61
1728 10:02:08.004082
1729 10:02:08.004205 Set Vref, RX VrefLevel [Byte0]: 62
1730 10:02:08.007410 [Byte1]: 62
1731 10:02:08.011857
1732 10:02:08.011985 Set Vref, RX VrefLevel [Byte0]: 63
1733 10:02:08.015155 [Byte1]: 63
1734 10:02:08.019636
1735 10:02:08.019766 Set Vref, RX VrefLevel [Byte0]: 64
1736 10:02:08.023170 [Byte1]: 64
1737 10:02:08.026914
1738 10:02:08.027038 Set Vref, RX VrefLevel [Byte0]: 65
1739 10:02:08.029851 [Byte1]: 65
1740 10:02:08.034761
1741 10:02:08.034891 Set Vref, RX VrefLevel [Byte0]: 66
1742 10:02:08.037539 [Byte1]: 66
1743 10:02:08.042428
1744 10:02:08.042553 Set Vref, RX VrefLevel [Byte0]: 67
1745 10:02:08.045408 [Byte1]: 67
1746 10:02:08.049865
1747 10:02:08.049986 Set Vref, RX VrefLevel [Byte0]: 68
1748 10:02:08.052789 [Byte1]: 68
1749 10:02:08.057482
1750 10:02:08.057613 Set Vref, RX VrefLevel [Byte0]: 69
1751 10:02:08.060569 [Byte1]: 69
1752 10:02:08.064435
1753 10:02:08.064548 Set Vref, RX VrefLevel [Byte0]: 70
1754 10:02:08.068125 [Byte1]: 70
1755 10:02:08.072139
1756 10:02:08.072257 Set Vref, RX VrefLevel [Byte0]: 71
1757 10:02:08.075939 [Byte1]: 71
1758 10:02:08.079756
1759 10:02:08.079876 Final RX Vref Byte 0 = 55 to rank0
1760 10:02:08.082925 Final RX Vref Byte 1 = 57 to rank0
1761 10:02:08.086678 Final RX Vref Byte 0 = 55 to rank1
1762 10:02:08.089976 Final RX Vref Byte 1 = 57 to rank1==
1763 10:02:08.092984 Dram Type= 6, Freq= 0, CH_1, rank 0
1764 10:02:08.096208 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1765 10:02:08.099646 ==
1766 10:02:08.099765 DQS Delay:
1767 10:02:08.099835 DQS0 = 0, DQS1 = 0
1768 10:02:08.103042 DQM Delay:
1769 10:02:08.103140 DQM0 = 94, DQM1 = 89
1770 10:02:08.106228 DQ Delay:
1771 10:02:08.109810 DQ0 =96, DQ1 =88, DQ2 =88, DQ3 =88
1772 10:02:08.109943 DQ4 =96, DQ5 =108, DQ6 =100, DQ7 =92
1773 10:02:08.113347 DQ8 =80, DQ9 =80, DQ10 =88, DQ11 =84
1774 10:02:08.116348 DQ12 =96, DQ13 =96, DQ14 =96, DQ15 =96
1775 10:02:08.119576
1776 10:02:08.119686
1777 10:02:08.126815 [DQSOSCAuto] RK0, (LSB)MR18= 0x2945, (MSB)MR19= 0x606, tDQSOscB0 = 392 ps tDQSOscB1 = 399 ps
1778 10:02:08.130014 CH1 RK0: MR19=606, MR18=2945
1779 10:02:08.136566 CH1_RK0: MR19=0x606, MR18=0x2945, DQSOSC=392, MR23=63, INC=96, DEC=64
1780 10:02:08.136715
1781 10:02:08.140135 ----->DramcWriteLeveling(PI) begin...
1782 10:02:08.140241 ==
1783 10:02:08.143911 Dram Type= 6, Freq= 0, CH_1, rank 1
1784 10:02:08.146963 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1785 10:02:08.147070 ==
1786 10:02:08.150359 Write leveling (Byte 0): 28 => 28
1787 10:02:08.153907 Write leveling (Byte 1): 28 => 28
1788 10:02:08.156560 DramcWriteLeveling(PI) end<-----
1789 10:02:08.156667
1790 10:02:08.156733 ==
1791 10:02:08.160203 Dram Type= 6, Freq= 0, CH_1, rank 1
1792 10:02:08.164183 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1793 10:02:08.164303 ==
1794 10:02:08.167430 [Gating] SW mode calibration
1795 10:02:08.173680 [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
1796 10:02:08.180223 RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)
1797 10:02:08.183670 0 6 0 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 1)
1798 10:02:08.186731 0 6 4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)
1799 10:02:08.193624 0 6 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1800 10:02:08.196705 0 6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1801 10:02:08.199980 0 6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1802 10:02:08.206588 0 6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1803 10:02:08.210170 0 6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1804 10:02:08.213731 0 6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1805 10:02:08.216722 0 7 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1806 10:02:08.223376 0 7 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1807 10:02:08.227045 0 7 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1808 10:02:08.230111 0 7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1809 10:02:08.237271 0 7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1810 10:02:08.240232 0 7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1811 10:02:08.243918 0 7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1812 10:02:08.250517 0 7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1813 10:02:08.253677 0 8 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1814 10:02:08.256728 0 8 4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 1)
1815 10:02:08.263722 0 8 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1816 10:02:08.267361 0 8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1817 10:02:08.270231 0 8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1818 10:02:08.276744 0 8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1819 10:02:08.280339 0 8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1820 10:02:08.284071 0 8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1821 10:02:08.290164 0 9 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1822 10:02:08.293915 0 9 4 | B1->B0 | 2e2e 2323 | 0 0 | (0 0) (1 1)
1823 10:02:08.296738 0 9 8 | B1->B0 | 3434 3434 | 1 0 | (1 1) (0 0)
1824 10:02:08.300469 0 9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1825 10:02:08.307084 0 9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1826 10:02:08.310077 0 9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1827 10:02:08.313725 0 9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1828 10:02:08.320265 0 9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1829 10:02:08.323725 0 10 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
1830 10:02:08.327016 0 10 4 | B1->B0 | 2d2d 2f2f | 1 1 | (1 0) (1 0)
1831 10:02:08.333627 0 10 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1832 10:02:08.336699 0 10 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1833 10:02:08.340268 0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1834 10:02:08.346648 0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1835 10:02:08.350551 0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1836 10:02:08.353706 0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
1837 10:02:08.360617 0 11 0 | B1->B0 | 2424 2323 | 0 0 | (0 0) (0 0)
1838 10:02:08.363572 0 11 4 | B1->B0 | 3b3b 2727 | 0 0 | (1 1) (0 0)
1839 10:02:08.367081 0 11 8 | B1->B0 | 4646 4141 | 0 0 | (0 0) (0 0)
1840 10:02:08.370608 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1841 10:02:08.377213 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1842 10:02:08.380533 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1843 10:02:08.384515 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1844 10:02:08.390345 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1845 10:02:08.393923 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1846 10:02:08.397342 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
1847 10:02:08.403618 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1848 10:02:08.407717 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1849 10:02:08.410736 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1850 10:02:08.417526 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1851 10:02:08.420542 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1852 10:02:08.423802 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1853 10:02:08.430711 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1854 10:02:08.433820 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1855 10:02:08.437053 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1856 10:02:08.444006 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1857 10:02:08.447054 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1858 10:02:08.450644 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1859 10:02:08.453722 0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1860 10:02:08.460680 0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1861 10:02:08.463723 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
1862 10:02:08.467552 0 14 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)
1863 10:02:08.470643 Total UI for P1: 0, mck2ui 16
1864 10:02:08.474138 best dqsien dly found for B1: ( 0, 14, 2)
1865 10:02:08.480600 0 14 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
1866 10:02:08.484027 Total UI for P1: 0, mck2ui 16
1867 10:02:08.487337 best dqsien dly found for B0: ( 0, 14, 4)
1868 10:02:08.491003 best DQS0 dly(MCK, UI, PI) = (0, 14, 4)
1869 10:02:08.493999 best DQS1 dly(MCK, UI, PI) = (0, 14, 2)
1870 10:02:08.494111
1871 10:02:08.497236 best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 4)
1872 10:02:08.500338 best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 2)
1873 10:02:08.504090 [Gating] SW calibration Done
1874 10:02:08.504207 ==
1875 10:02:08.507352 Dram Type= 6, Freq= 0, CH_1, rank 1
1876 10:02:08.510513 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1877 10:02:08.510626 ==
1878 10:02:08.514396 RX Vref Scan: 0
1879 10:02:08.514503
1880 10:02:08.514595 RX Vref 0 -> 0, step: 1
1881 10:02:08.514677
1882 10:02:08.517324 RX Delay -130 -> 252, step: 16
1883 10:02:08.520557 iDelay=222, Bit 0, Center 101 (-2 ~ 205) 208
1884 10:02:08.527455 iDelay=222, Bit 1, Center 85 (-18 ~ 189) 208
1885 10:02:08.530572 iDelay=222, Bit 2, Center 77 (-34 ~ 189) 224
1886 10:02:08.534405 iDelay=222, Bit 3, Center 85 (-18 ~ 189) 208
1887 10:02:08.537420 iDelay=222, Bit 4, Center 85 (-18 ~ 189) 208
1888 10:02:08.541229 iDelay=222, Bit 5, Center 109 (-2 ~ 221) 224
1889 10:02:08.547130 iDelay=222, Bit 6, Center 101 (-2 ~ 205) 208
1890 10:02:08.550976 iDelay=222, Bit 7, Center 93 (-18 ~ 205) 224
1891 10:02:08.554275 iDelay=222, Bit 8, Center 77 (-34 ~ 189) 224
1892 10:02:08.557424 iDelay=222, Bit 9, Center 77 (-34 ~ 189) 224
1893 10:02:08.560657 iDelay=222, Bit 10, Center 85 (-18 ~ 189) 208
1894 10:02:08.567946 iDelay=222, Bit 11, Center 85 (-18 ~ 189) 208
1895 10:02:08.570913 iDelay=222, Bit 12, Center 93 (-18 ~ 205) 224
1896 10:02:08.574262 iDelay=222, Bit 13, Center 93 (-18 ~ 205) 224
1897 10:02:08.577873 iDelay=222, Bit 14, Center 93 (-18 ~ 205) 224
1898 10:02:08.581338 iDelay=222, Bit 15, Center 93 (-18 ~ 205) 224
1899 10:02:08.581454 ==
1900 10:02:08.584145 Dram Type= 6, Freq= 0, CH_1, rank 1
1901 10:02:08.591103 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1902 10:02:08.591252 ==
1903 10:02:08.591323 DQS Delay:
1904 10:02:08.594120 DQS0 = 0, DQS1 = 0
1905 10:02:08.594207 DQM Delay:
1906 10:02:08.594272 DQM0 = 92, DQM1 = 87
1907 10:02:08.597513 DQ Delay:
1908 10:02:08.601032 DQ0 =101, DQ1 =85, DQ2 =77, DQ3 =85
1909 10:02:08.604267 DQ4 =85, DQ5 =109, DQ6 =101, DQ7 =93
1910 10:02:08.607838 DQ8 =77, DQ9 =77, DQ10 =85, DQ11 =85
1911 10:02:08.611074 DQ12 =93, DQ13 =93, DQ14 =93, DQ15 =93
1912 10:02:08.611179
1913 10:02:08.611248
1914 10:02:08.611307 ==
1915 10:02:08.614166 Dram Type= 6, Freq= 0, CH_1, rank 1
1916 10:02:08.617836 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1917 10:02:08.617941 ==
1918 10:02:08.618010
1919 10:02:08.618070
1920 10:02:08.621043 TX Vref Scan disable
1921 10:02:08.621134 == TX Byte 0 ==
1922 10:02:08.628082 Update DQ dly =580 (2 ,1, 36) DQ OEN =(1 ,6)
1923 10:02:08.631239 Update DQM dly =580 (2 ,1, 36) DQM OEN =(1 ,6)
1924 10:02:08.631352 == TX Byte 1 ==
1925 10:02:08.637667 Update DQ dly =578 (2 ,1, 34) DQ OEN =(1 ,6)
1926 10:02:08.641236 Update DQM dly =578 (2 ,1, 34) DQM OEN =(1 ,6)
1927 10:02:08.641347 ==
1928 10:02:08.644364 Dram Type= 6, Freq= 0, CH_1, rank 1
1929 10:02:08.647528 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1930 10:02:08.647636 ==
1931 10:02:08.661724 TX Vref=22, minBit 3, minWin=26, winSum=444
1932 10:02:08.665342 TX Vref=24, minBit 1, minWin=27, winSum=447
1933 10:02:08.668511 TX Vref=26, minBit 2, minWin=27, winSum=451
1934 10:02:08.671741 TX Vref=28, minBit 2, minWin=27, winSum=451
1935 10:02:08.675260 TX Vref=30, minBit 2, minWin=27, winSum=450
1936 10:02:08.678742 TX Vref=32, minBit 2, minWin=27, winSum=451
1937 10:02:08.685882 [TxChooseVref] Worse bit 2, Min win 27, Win sum 451, Final Vref 26
1938 10:02:08.686033
1939 10:02:08.688876 Final TX Range 1 Vref 26
1940 10:02:08.688974
1941 10:02:08.689043 ==
1942 10:02:08.691846 Dram Type= 6, Freq= 0, CH_1, rank 1
1943 10:02:08.695203 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1944 10:02:08.695308 ==
1945 10:02:08.695377
1946 10:02:08.695438
1947 10:02:08.698581 TX Vref Scan disable
1948 10:02:08.701751 == TX Byte 0 ==
1949 10:02:08.705521 Update DQ dly =580 (2 ,1, 36) DQ OEN =(1 ,6)
1950 10:02:08.708445 Update DQM dly =580 (2 ,1, 36) DQM OEN =(1 ,6)
1951 10:02:08.712335 == TX Byte 1 ==
1952 10:02:08.715005 Update DQ dly =578 (2 ,1, 34) DQ OEN =(1 ,6)
1953 10:02:08.718502 Update DQM dly =578 (2 ,1, 34) DQM OEN =(1 ,6)
1954 10:02:08.718620
1955 10:02:08.721992 [DATLAT]
1956 10:02:08.722090 Freq=800, CH1 RK1
1957 10:02:08.722160
1958 10:02:08.725142 DATLAT Default: 0xa
1959 10:02:08.725232 0, 0xFFFF, sum = 0
1960 10:02:08.728977 1, 0xFFFF, sum = 0
1961 10:02:08.729086 2, 0xFFFF, sum = 0
1962 10:02:08.731952 3, 0xFFFF, sum = 0
1963 10:02:08.732043 4, 0xFFFF, sum = 0
1964 10:02:08.735528 5, 0xFFFF, sum = 0
1965 10:02:08.735629 6, 0xFFFF, sum = 0
1966 10:02:08.738970 7, 0xFFFF, sum = 0
1967 10:02:08.739067 8, 0xFFFF, sum = 0
1968 10:02:08.741971 9, 0x0, sum = 1
1969 10:02:08.742071 10, 0x0, sum = 2
1970 10:02:08.745267 11, 0x0, sum = 3
1971 10:02:08.745363 12, 0x0, sum = 4
1972 10:02:08.749047 best_step = 10
1973 10:02:08.749150
1974 10:02:08.749218 ==
1975 10:02:08.751986 Dram Type= 6, Freq= 0, CH_1, rank 1
1976 10:02:08.755652 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
1977 10:02:08.755782 ==
1978 10:02:08.758766 RX Vref Scan: 0
1979 10:02:08.758865
1980 10:02:08.758931 RX Vref 0 -> 0, step: 1
1981 10:02:08.758993
1982 10:02:08.762352 RX Delay -79 -> 252, step: 8
1983 10:02:08.768771 iDelay=209, Bit 0, Center 104 (9 ~ 200) 192
1984 10:02:08.771960 iDelay=209, Bit 1, Center 92 (-7 ~ 192) 200
1985 10:02:08.775430 iDelay=209, Bit 2, Center 84 (-15 ~ 184) 200
1986 10:02:08.778900 iDelay=209, Bit 3, Center 92 (-7 ~ 192) 200
1987 10:02:08.782076 iDelay=209, Bit 4, Center 92 (-7 ~ 192) 200
1988 10:02:08.785691 iDelay=209, Bit 5, Center 112 (17 ~ 208) 192
1989 10:02:08.792331 iDelay=209, Bit 6, Center 108 (9 ~ 208) 200
1990 10:02:08.795725 iDelay=209, Bit 7, Center 96 (-7 ~ 200) 208
1991 10:02:08.798808 iDelay=209, Bit 8, Center 80 (-23 ~ 184) 208
1992 10:02:08.802313 iDelay=209, Bit 9, Center 80 (-23 ~ 184) 208
1993 10:02:08.805425 iDelay=209, Bit 10, Center 96 (-7 ~ 200) 208
1994 10:02:08.808773 iDelay=209, Bit 11, Center 84 (-23 ~ 192) 216
1995 10:02:08.815898 iDelay=209, Bit 12, Center 100 (-7 ~ 208) 216
1996 10:02:08.818699 iDelay=209, Bit 13, Center 96 (-7 ~ 200) 208
1997 10:02:08.822199 iDelay=209, Bit 14, Center 96 (-7 ~ 200) 208
1998 10:02:08.825257 iDelay=209, Bit 15, Center 100 (-7 ~ 208) 216
1999 10:02:08.825368 ==
2000 10:02:08.829250 Dram Type= 6, Freq= 0, CH_1, rank 1
2001 10:02:08.835561 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2002 10:02:08.835702 ==
2003 10:02:08.835773 DQS Delay:
2004 10:02:08.835839 DQS0 = 0, DQS1 = 0
2005 10:02:08.839360 DQM Delay:
2006 10:02:08.839461 DQM0 = 97, DQM1 = 91
2007 10:02:08.842164 DQ Delay:
2008 10:02:08.845672 DQ0 =104, DQ1 =92, DQ2 =84, DQ3 =92
2009 10:02:08.849246 DQ4 =92, DQ5 =112, DQ6 =108, DQ7 =96
2010 10:02:08.852138 DQ8 =80, DQ9 =80, DQ10 =96, DQ11 =84
2011 10:02:08.855538 DQ12 =100, DQ13 =96, DQ14 =96, DQ15 =100
2012 10:02:08.855649
2013 10:02:08.855768
2014 10:02:08.862524 [DQSOSCAuto] RK1, (LSB)MR18= 0x4a13, (MSB)MR19= 0x606, tDQSOscB0 = 405 ps tDQSOscB1 = 391 ps
2015 10:02:08.865717 CH1 RK1: MR19=606, MR18=4A13
2016 10:02:08.872150 CH1_RK1: MR19=0x606, MR18=0x4A13, DQSOSC=391, MR23=63, INC=96, DEC=64
2017 10:02:08.875441 [RxdqsGatingPostProcess] freq 800
2018 10:02:08.879373 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
2019 10:02:08.882655 Pre-setting of DQS Precalculation
2020 10:02:08.888943 [DualRankRxdatlatCal] RK0: 10, RK1: 10, Final_Datlat 10
2021 10:02:08.896084 sync_frequency_calibration_params sync calibration params of frequency 800 to shu:4
2022 10:02:08.902261 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
2023 10:02:08.902409
2024 10:02:08.902480
2025 10:02:08.906128 [Calibration Summary] 1600 Mbps
2026 10:02:08.906236 CH 0, Rank 0
2027 10:02:08.909214 SW Impedance : PASS
2028 10:02:08.912531 DUTY Scan : NO K
2029 10:02:08.912640 ZQ Calibration : PASS
2030 10:02:08.916230 Jitter Meter : NO K
2031 10:02:08.919724 CBT Training : PASS
2032 10:02:08.919837 Write leveling : PASS
2033 10:02:08.922566 RX DQS gating : PASS
2034 10:02:08.922661 RX DQ/DQS(RDDQC) : PASS
2035 10:02:08.925693 TX DQ/DQS : PASS
2036 10:02:08.929022 RX DATLAT : PASS
2037 10:02:08.929127 RX DQ/DQS(Engine): PASS
2038 10:02:08.932445 TX OE : NO K
2039 10:02:08.932546 All Pass.
2040 10:02:08.932612
2041 10:02:08.935964 CH 0, Rank 1
2042 10:02:08.936067 SW Impedance : PASS
2043 10:02:08.939067 DUTY Scan : NO K
2044 10:02:08.942881 ZQ Calibration : PASS
2045 10:02:08.942994 Jitter Meter : NO K
2046 10:02:08.946322 CBT Training : PASS
2047 10:02:08.949471 Write leveling : PASS
2048 10:02:08.949581 RX DQS gating : PASS
2049 10:02:08.952986 RX DQ/DQS(RDDQC) : PASS
2050 10:02:08.956124 TX DQ/DQS : PASS
2051 10:02:08.956226 RX DATLAT : PASS
2052 10:02:08.959408 RX DQ/DQS(Engine): PASS
2053 10:02:08.959510 TX OE : NO K
2054 10:02:08.962384 All Pass.
2055 10:02:08.962479
2056 10:02:08.962546 CH 1, Rank 0
2057 10:02:08.966120 SW Impedance : PASS
2058 10:02:08.966220 DUTY Scan : NO K
2059 10:02:08.969093 ZQ Calibration : PASS
2060 10:02:08.972872 Jitter Meter : NO K
2061 10:02:08.972983 CBT Training : PASS
2062 10:02:08.975791 Write leveling : PASS
2063 10:02:08.979205 RX DQS gating : PASS
2064 10:02:08.979318 RX DQ/DQS(RDDQC) : PASS
2065 10:02:08.982979 TX DQ/DQS : PASS
2066 10:02:08.985909 RX DATLAT : PASS
2067 10:02:08.986017 RX DQ/DQS(Engine): PASS
2068 10:02:08.989262 TX OE : NO K
2069 10:02:08.989361 All Pass.
2070 10:02:08.989429
2071 10:02:08.992877 CH 1, Rank 1
2072 10:02:08.992981 SW Impedance : PASS
2073 10:02:08.996307 DUTY Scan : NO K
2074 10:02:08.999193 ZQ Calibration : PASS
2075 10:02:08.999303 Jitter Meter : NO K
2076 10:02:09.002362 CBT Training : PASS
2077 10:02:09.005612 Write leveling : PASS
2078 10:02:09.005722 RX DQS gating : PASS
2079 10:02:09.009059 RX DQ/DQS(RDDQC) : PASS
2080 10:02:09.009167 TX DQ/DQS : PASS
2081 10:02:09.012656 RX DATLAT : PASS
2082 10:02:09.015712 RX DQ/DQS(Engine): PASS
2083 10:02:09.015814 TX OE : NO K
2084 10:02:09.019313 All Pass.
2085 10:02:09.019414
2086 10:02:09.019483 DramC Write-DBI off
2087 10:02:09.022669 PER_BANK_REFRESH: Hybrid Mode
2088 10:02:09.026110 TX_TRACKING: ON
2089 10:02:09.029296 [GetDramInforAfterCalByMRR] Vendor 6.
2090 10:02:09.032627 [GetDramInforAfterCalByMRR] Revision 606.
2091 10:02:09.036103 [GetDramInforAfterCalByMRR] Revision 2 0.
2092 10:02:09.036222 MR0 0x3b3b
2093 10:02:09.036299 MR8 0x5151
2094 10:02:09.039443 RK0, DieNum 2, Density 16Gb, RKsize 32Gb.
2095 10:02:09.042703
2096 10:02:09.042809 MR0 0x3b3b
2097 10:02:09.042875 MR8 0x5151
2098 10:02:09.046054 RK1, DieNum 2, Density 16Gb, RKsize 32Gb.
2099 10:02:09.046148
2100 10:02:09.055902 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 44, TRFC_05T 0, TXREFCNT 58, TRFCpb 16, TRFCpb_05T 0
2101 10:02:09.059347 [FAST_K] Save calibration result to emmc
2102 10:02:09.063224 [FAST_K] Save calibration result to emmc
2103 10:02:09.066082 dram_init: config_dvfs: 1
2104 10:02:09.069277 dramc_set_vcore_voltage set vcore to 662500
2105 10:02:09.072716 Read voltage for 1200, 2
2106 10:02:09.072879 Vio18 = 0
2107 10:02:09.072949 Vcore = 662500
2108 10:02:09.076512 Vdram = 0
2109 10:02:09.076614 Vddq = 0
2110 10:02:09.076681 Vmddr = 0
2111 10:02:09.082744 [FAST_K] DramcSave_Time_For_Cal_Init SHU5, femmc_Ready=0
2112 10:02:09.086065 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
2113 10:02:09.089384 MEM_TYPE=3, freq_sel=15
2114 10:02:09.093052 sv_algorithm_assistance_LP4_1600
2115 10:02:09.095908 ============ PULL DRAM RESETB DOWN ============
2116 10:02:09.099400 ========== PULL DRAM RESETB DOWN end =========
2117 10:02:09.106048 [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4
2118 10:02:09.109500 ===================================
2119 10:02:09.109624 LPDDR4 DRAM CONFIGURATION
2120 10:02:09.112589 ===================================
2121 10:02:09.116074 EX_ROW_EN[0] = 0x0
2122 10:02:09.120095 EX_ROW_EN[1] = 0x0
2123 10:02:09.120216 LP4Y_EN = 0x0
2124 10:02:09.123094 WORK_FSP = 0x0
2125 10:02:09.123191 WL = 0x4
2126 10:02:09.126439 RL = 0x4
2127 10:02:09.126532 BL = 0x2
2128 10:02:09.129755 RPST = 0x0
2129 10:02:09.129849 RD_PRE = 0x0
2130 10:02:09.132844 WR_PRE = 0x1
2131 10:02:09.132952 WR_PST = 0x0
2132 10:02:09.136028 DBI_WR = 0x0
2133 10:02:09.136125 DBI_RD = 0x0
2134 10:02:09.139595 OTF = 0x1
2135 10:02:09.143807 ===================================
2136 10:02:09.146427 ===================================
2137 10:02:09.146527 ANA top config
2138 10:02:09.149657 ===================================
2139 10:02:09.153027 DLL_ASYNC_EN = 0
2140 10:02:09.156285 ALL_SLAVE_EN = 0
2141 10:02:09.156391 NEW_RANK_MODE = 1
2142 10:02:09.160059 DLL_IDLE_MODE = 1
2143 10:02:09.163084 LP45_APHY_COMB_EN = 1
2144 10:02:09.167023 TX_ODT_DIS = 1
2145 10:02:09.167138 NEW_8X_MODE = 1
2146 10:02:09.169621 ===================================
2147 10:02:09.172842 ===================================
2148 10:02:09.176214 data_rate = 2400
2149 10:02:09.179759 CKR = 1
2150 10:02:09.182883 DQ_P2S_RATIO = 8
2151 10:02:09.186212 ===================================
2152 10:02:09.189733 CA_P2S_RATIO = 8
2153 10:02:09.193181 DQ_CA_OPEN = 0
2154 10:02:09.193300 DQ_SEMI_OPEN = 0
2155 10:02:09.196272 CA_SEMI_OPEN = 0
2156 10:02:09.199584 CA_FULL_RATE = 0
2157 10:02:09.203397 DQ_CKDIV4_EN = 0
2158 10:02:09.206519 CA_CKDIV4_EN = 0
2159 10:02:09.209630 CA_PREDIV_EN = 0
2160 10:02:09.209746 PH8_DLY = 17
2161 10:02:09.212968 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
2162 10:02:09.216493 DQ_AAMCK_DIV = 4
2163 10:02:09.220020 CA_AAMCK_DIV = 4
2164 10:02:09.223125 CA_ADMCK_DIV = 4
2165 10:02:09.226561 DQ_TRACK_CA_EN = 0
2166 10:02:09.226673 CA_PICK = 1200
2167 10:02:09.230101 CA_MCKIO = 1200
2168 10:02:09.233512 MCKIO_SEMI = 0
2169 10:02:09.236730 PLL_FREQ = 2366
2170 10:02:09.239657 DQ_UI_PI_RATIO = 32
2171 10:02:09.243108 CA_UI_PI_RATIO = 0
2172 10:02:09.246851 ===================================
2173 10:02:09.249722 ===================================
2174 10:02:09.249835 memory_type:LPDDR4
2175 10:02:09.253690 GP_NUM : 10
2176 10:02:09.256555 SRAM_EN : 1
2177 10:02:09.256658 MD32_EN : 0
2178 10:02:09.259741 ===================================
2179 10:02:09.263392 [ANA_INIT] >>>>>>>>>>>>>>
2180 10:02:09.266671 <<<<<< [CONFIGURE PHASE]: ANA_TX
2181 10:02:09.270727 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
2182 10:02:09.273780 ===================================
2183 10:02:09.276596 data_rate = 2400,PCW = 0X5b00
2184 10:02:09.279943 ===================================
2185 10:02:09.283303 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
2186 10:02:09.286790 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
2187 10:02:09.293273 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
2188 10:02:09.296516 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
2189 10:02:09.300345 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
2190 10:02:09.303313 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
2191 10:02:09.307296 [ANA_INIT] flow start
2192 10:02:09.310189 [ANA_INIT] PLL >>>>>>>>
2193 10:02:09.310305 [ANA_INIT] PLL <<<<<<<<
2194 10:02:09.313131 [ANA_INIT] MIDPI >>>>>>>>
2195 10:02:09.317063 [ANA_INIT] MIDPI <<<<<<<<
2196 10:02:09.317178 [ANA_INIT] DLL >>>>>>>>
2197 10:02:09.320329 [ANA_INIT] DLL <<<<<<<<
2198 10:02:09.323315 [ANA_INIT] flow end
2199 10:02:09.326960 ============ LP4 DIFF to SE enter ============
2200 10:02:09.330257 ============ LP4 DIFF to SE exit ============
2201 10:02:09.333601 [ANA_INIT] <<<<<<<<<<<<<
2202 10:02:09.336580 [Flow] Enable top DCM control >>>>>
2203 10:02:09.340243 [Flow] Enable top DCM control <<<<<
2204 10:02:09.343749 Enable DLL master slave shuffle
2205 10:02:09.346776 ==============================================================
2206 10:02:09.350064 Gating Mode config
2207 10:02:09.357235 ==============================================================
2208 10:02:09.357386 Config description:
2209 10:02:09.366995 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
2210 10:02:09.374036 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
2211 10:02:09.376928 SELPH_MODE 0: By rank 1: By Phase
2212 10:02:09.383799 ==============================================================
2213 10:02:09.386828 GAT_TRACK_EN = 1
2214 10:02:09.390237 RX_GATING_MODE = 2
2215 10:02:09.393542 RX_GATING_TRACK_MODE = 2
2216 10:02:09.396930 SELPH_MODE = 1
2217 10:02:09.400427 PICG_EARLY_EN = 1
2218 10:02:09.400574 VALID_LAT_VALUE = 1
2219 10:02:09.407059 ==============================================================
2220 10:02:09.410582 Enter into Gating configuration >>>>
2221 10:02:09.413909 Exit from Gating configuration <<<<
2222 10:02:09.417653 Enter into DVFS_PRE_config >>>>>
2223 10:02:09.427237 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
2224 10:02:09.430729 Exit from DVFS_PRE_config <<<<<
2225 10:02:09.434083 Enter into PICG configuration >>>>
2226 10:02:09.437861 Exit from PICG configuration <<<<
2227 10:02:09.440621 [RX_INPUT] configuration >>>>>
2228 10:02:09.444164 [RX_INPUT] configuration <<<<<
2229 10:02:09.447596 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
2230 10:02:09.453951 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
2231 10:02:09.460750 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
2232 10:02:09.467345 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
2233 10:02:09.473901 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
2234 10:02:09.477496 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
2235 10:02:09.484224 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
2236 10:02:09.487238 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
2237 10:02:09.490819 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
2238 10:02:09.493765 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
2239 10:02:09.497468 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
2240 10:02:09.504026 [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4
2241 10:02:09.507111 ===================================
2242 10:02:09.510517 LPDDR4 DRAM CONFIGURATION
2243 10:02:09.514378 ===================================
2244 10:02:09.514501 EX_ROW_EN[0] = 0x0
2245 10:02:09.517529 EX_ROW_EN[1] = 0x0
2246 10:02:09.517624 LP4Y_EN = 0x0
2247 10:02:09.520789 WORK_FSP = 0x0
2248 10:02:09.520927 WL = 0x4
2249 10:02:09.524473 RL = 0x4
2250 10:02:09.524575 BL = 0x2
2251 10:02:09.527123 RPST = 0x0
2252 10:02:09.527212 RD_PRE = 0x0
2253 10:02:09.530593 WR_PRE = 0x1
2254 10:02:09.530695 WR_PST = 0x0
2255 10:02:09.534071 DBI_WR = 0x0
2256 10:02:09.534167 DBI_RD = 0x0
2257 10:02:09.537407 OTF = 0x1
2258 10:02:09.540538 ===================================
2259 10:02:09.544414 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
2260 10:02:09.547335 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
2261 10:02:09.553731 [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4
2262 10:02:09.557396 ===================================
2263 10:02:09.557521 LPDDR4 DRAM CONFIGURATION
2264 10:02:09.560710 ===================================
2265 10:02:09.564126 EX_ROW_EN[0] = 0x10
2266 10:02:09.567491 EX_ROW_EN[1] = 0x0
2267 10:02:09.567598 LP4Y_EN = 0x0
2268 10:02:09.570711 WORK_FSP = 0x0
2269 10:02:09.570805 WL = 0x4
2270 10:02:09.573879 RL = 0x4
2271 10:02:09.573974 BL = 0x2
2272 10:02:09.577077 RPST = 0x0
2273 10:02:09.577172 RD_PRE = 0x0
2274 10:02:09.580564 WR_PRE = 0x1
2275 10:02:09.580658 WR_PST = 0x0
2276 10:02:09.584204 DBI_WR = 0x0
2277 10:02:09.584299 DBI_RD = 0x0
2278 10:02:09.587122 OTF = 0x1
2279 10:02:09.590932 ===================================
2280 10:02:09.596981 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
2281 10:02:09.597147 ==
2282 10:02:09.601056 Dram Type= 6, Freq= 0, CH_0, rank 0
2283 10:02:09.604025 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2284 10:02:09.604148 ==
2285 10:02:09.607726 [Duty_Offset_Calibration]
2286 10:02:09.607824 B0:2 B1:1 CA:1
2287 10:02:09.607891
2288 10:02:09.610432 [DutyScan_Calibration_Flow] k_type=0
2289 10:02:09.620577
2290 10:02:09.620737 ==CLK 0==
2291 10:02:09.623688 Final CLK duty delay cell = 0
2292 10:02:09.626920 [0] MAX Duty = 5187%(X100), DQS PI = 24
2293 10:02:09.630428 [0] MIN Duty = 4844%(X100), DQS PI = 48
2294 10:02:09.633913 [0] AVG Duty = 5015%(X100)
2295 10:02:09.634027
2296 10:02:09.637183 CH0 CLK Duty spec in!! Max-Min= 343%
2297 10:02:09.640336 [DutyScan_Calibration_Flow] ====Done====
2298 10:02:09.640444
2299 10:02:09.643800 [DutyScan_Calibration_Flow] k_type=1
2300 10:02:09.659208
2301 10:02:09.659366 ==DQS 0 ==
2302 10:02:09.662513 Final DQS duty delay cell = -4
2303 10:02:09.666050 [-4] MAX Duty = 5124%(X100), DQS PI = 22
2304 10:02:09.669128 [-4] MIN Duty = 4782%(X100), DQS PI = 0
2305 10:02:09.673198 [-4] AVG Duty = 4953%(X100)
2306 10:02:09.673313
2307 10:02:09.673381 ==DQS 1 ==
2308 10:02:09.676708 Final DQS duty delay cell = 0
2309 10:02:09.679217 [0] MAX Duty = 5156%(X100), DQS PI = 62
2310 10:02:09.682920 [0] MIN Duty = 5031%(X100), DQS PI = 32
2311 10:02:09.686331 [0] AVG Duty = 5093%(X100)
2312 10:02:09.686437
2313 10:02:09.689522 CH0 DQS 0 Duty spec in!! Max-Min= 342%
2314 10:02:09.689617
2315 10:02:09.693007 CH0 DQS 1 Duty spec in!! Max-Min= 125%
2316 10:02:09.696076 [DutyScan_Calibration_Flow] ====Done====
2317 10:02:09.696178
2318 10:02:09.699601 [DutyScan_Calibration_Flow] k_type=3
2319 10:02:09.716649
2320 10:02:09.716816 ==DQM 0 ==
2321 10:02:09.719254 Final DQM duty delay cell = 0
2322 10:02:09.722621 [0] MAX Duty = 5156%(X100), DQS PI = 30
2323 10:02:09.726379 [0] MIN Duty = 4906%(X100), DQS PI = 58
2324 10:02:09.729725 [0] AVG Duty = 5031%(X100)
2325 10:02:09.729840
2326 10:02:09.729908 ==DQM 1 ==
2327 10:02:09.732758 Final DQM duty delay cell = 0
2328 10:02:09.735865 [0] MAX Duty = 5156%(X100), DQS PI = 60
2329 10:02:09.739180 [0] MIN Duty = 5031%(X100), DQS PI = 50
2330 10:02:09.742911 [0] AVG Duty = 5093%(X100)
2331 10:02:09.743029
2332 10:02:09.746385 CH0 DQM 0 Duty spec in!! Max-Min= 250%
2333 10:02:09.746486
2334 10:02:09.749786 CH0 DQM 1 Duty spec in!! Max-Min= 125%
2335 10:02:09.752494 [DutyScan_Calibration_Flow] ====Done====
2336 10:02:09.752599
2337 10:02:09.756372 [DutyScan_Calibration_Flow] k_type=2
2338 10:02:09.773002
2339 10:02:09.773167 ==DQ 0 ==
2340 10:02:09.776035 Final DQ duty delay cell = 0
2341 10:02:09.779369 [0] MAX Duty = 5062%(X100), DQS PI = 30
2342 10:02:09.782567 [0] MIN Duty = 4875%(X100), DQS PI = 62
2343 10:02:09.782677 [0] AVG Duty = 4968%(X100)
2344 10:02:09.786755
2345 10:02:09.786865 ==DQ 1 ==
2346 10:02:09.789509 Final DQ duty delay cell = 0
2347 10:02:09.792934 [0] MAX Duty = 5093%(X100), DQS PI = 8
2348 10:02:09.796033 [0] MIN Duty = 4969%(X100), DQS PI = 2
2349 10:02:09.796139 [0] AVG Duty = 5031%(X100)
2350 10:02:09.796228
2351 10:02:09.799576 CH0 DQ 0 Duty spec in!! Max-Min= 187%
2352 10:02:09.799701
2353 10:02:09.803139 CH0 DQ 1 Duty spec in!! Max-Min= 124%
2354 10:02:09.809301 [DutyScan_Calibration_Flow] ====Done====
2355 10:02:09.809467 ==
2356 10:02:09.813007 Dram Type= 6, Freq= 0, CH_1, rank 0
2357 10:02:09.816301 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2358 10:02:09.816412 ==
2359 10:02:09.819782 [Duty_Offset_Calibration]
2360 10:02:09.819885 B0:1 B1:0 CA:0
2361 10:02:09.819973
2362 10:02:09.822991 [DutyScan_Calibration_Flow] k_type=0
2363 10:02:09.832231
2364 10:02:09.832392 ==CLK 0==
2365 10:02:09.835158 Final CLK duty delay cell = -4
2366 10:02:09.838382 [-4] MAX Duty = 5031%(X100), DQS PI = 22
2367 10:02:09.841935 [-4] MIN Duty = 4907%(X100), DQS PI = 10
2368 10:02:09.845168 [-4] AVG Duty = 4969%(X100)
2369 10:02:09.845280
2370 10:02:09.848542 CH1 CLK Duty spec in!! Max-Min= 124%
2371 10:02:09.851760 [DutyScan_Calibration_Flow] ====Done====
2372 10:02:09.851869
2373 10:02:09.855289 [DutyScan_Calibration_Flow] k_type=1
2374 10:02:09.871807
2375 10:02:09.871968 ==DQS 0 ==
2376 10:02:09.874889 Final DQS duty delay cell = 0
2377 10:02:09.878396 [0] MAX Duty = 5094%(X100), DQS PI = 26
2378 10:02:09.881401 [0] MIN Duty = 4875%(X100), DQS PI = 0
2379 10:02:09.881513 [0] AVG Duty = 4984%(X100)
2380 10:02:09.885479
2381 10:02:09.885578 ==DQS 1 ==
2382 10:02:09.888304 Final DQS duty delay cell = 0
2383 10:02:09.891641 [0] MAX Duty = 5218%(X100), DQS PI = 20
2384 10:02:09.895195 [0] MIN Duty = 4969%(X100), DQS PI = 10
2385 10:02:09.895306 [0] AVG Duty = 5093%(X100)
2386 10:02:09.898117
2387 10:02:09.901399 CH1 DQS 0 Duty spec in!! Max-Min= 219%
2388 10:02:09.901514
2389 10:02:09.905094 CH1 DQS 1 Duty spec in!! Max-Min= 249%
2390 10:02:09.908079 [DutyScan_Calibration_Flow] ====Done====
2391 10:02:09.908186
2392 10:02:09.911633 [DutyScan_Calibration_Flow] k_type=3
2393 10:02:09.928084
2394 10:02:09.928243 ==DQM 0 ==
2395 10:02:09.931336 Final DQM duty delay cell = 0
2396 10:02:09.934913 [0] MAX Duty = 5156%(X100), DQS PI = 6
2397 10:02:09.938117 [0] MIN Duty = 5031%(X100), DQS PI = 0
2398 10:02:09.938236 [0] AVG Duty = 5093%(X100)
2399 10:02:09.938306
2400 10:02:09.941788 ==DQM 1 ==
2401 10:02:09.944780 Final DQM duty delay cell = 0
2402 10:02:09.948238 [0] MAX Duty = 5031%(X100), DQS PI = 14
2403 10:02:09.951625 [0] MIN Duty = 4907%(X100), DQS PI = 36
2404 10:02:09.951741 [0] AVG Duty = 4969%(X100)
2405 10:02:09.951812
2406 10:02:09.958777 CH1 DQM 0 Duty spec in!! Max-Min= 125%
2407 10:02:09.958917
2408 10:02:09.961588 CH1 DQM 1 Duty spec in!! Max-Min= 124%
2409 10:02:09.965012 [DutyScan_Calibration_Flow] ====Done====
2410 10:02:09.965123
2411 10:02:09.968187 [DutyScan_Calibration_Flow] k_type=2
2412 10:02:09.983925
2413 10:02:09.984087 ==DQ 0 ==
2414 10:02:09.987642 Final DQ duty delay cell = -4
2415 10:02:09.990467 [-4] MAX Duty = 5094%(X100), DQS PI = 10
2416 10:02:09.994425 [-4] MIN Duty = 4938%(X100), DQS PI = 0
2417 10:02:09.997114 [-4] AVG Duty = 5016%(X100)
2418 10:02:09.997223
2419 10:02:09.997294 ==DQ 1 ==
2420 10:02:10.000578 Final DQ duty delay cell = 0
2421 10:02:10.003752 [0] MAX Duty = 5125%(X100), DQS PI = 20
2422 10:02:10.007063 [0] MIN Duty = 4969%(X100), DQS PI = 12
2423 10:02:10.007173 [0] AVG Duty = 5047%(X100)
2424 10:02:10.010606
2425 10:02:10.013668 CH1 DQ 0 Duty spec in!! Max-Min= 156%
2426 10:02:10.013779
2427 10:02:10.017360 CH1 DQ 1 Duty spec in!! Max-Min= 156%
2428 10:02:10.020266 [DutyScan_Calibration_Flow] ====Done====
2429 10:02:10.023628 nWR fixed to 30
2430 10:02:10.023742 [ModeRegInit_LP4] CH0 RK0
2431 10:02:10.027424 [ModeRegInit_LP4] CH0 RK1
2432 10:02:10.030522 [ModeRegInit_LP4] CH1 RK0
2433 10:02:10.034146 [ModeRegInit_LP4] CH1 RK1
2434 10:02:10.034260 match AC timing 7
2435 10:02:10.037532 dramType 5, freq 1200, readDBI 0, DivMode 1, cbtMode 1
2436 10:02:10.043668 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
2437 10:02:10.047099 [WriteLatency GET] Version:0-MR_RL_field_value:4-WL:12
2438 10:02:10.050589 [TX_path_calculate] data rate=2400, WL=12, DQS_TotalUI=25
2439 10:02:10.057539 [TX_path_calculate] DQS = (3,1) DQS_OE = (2,6)
2440 10:02:10.057695 ==
2441 10:02:10.061192 Dram Type= 6, Freq= 0, CH_0, rank 0
2442 10:02:10.064200 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2443 10:02:10.064306 ==
2444 10:02:10.070564 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
2445 10:02:10.073899 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39
2446 10:02:10.083996 [CA 0] Center 39 (8~70) winsize 63
2447 10:02:10.087329 [CA 1] Center 39 (8~70) winsize 63
2448 10:02:10.090585 [CA 2] Center 35 (5~66) winsize 62
2449 10:02:10.094468 [CA 3] Center 34 (4~65) winsize 62
2450 10:02:10.097182 [CA 4] Center 33 (3~64) winsize 62
2451 10:02:10.100920 [CA 5] Center 32 (3~62) winsize 60
2452 10:02:10.101049
2453 10:02:10.104109 [CmdBusTrainingLP45] Vref(ca) range 1: 35
2454 10:02:10.104206
2455 10:02:10.107598 [CATrainingPosCal] consider 1 rank data
2456 10:02:10.110855 u2DelayCellTimex100 = 270/100 ps
2457 10:02:10.114169 CA0 delay=39 (8~70),Diff = 7 PI (33 cell)
2458 10:02:10.117627 CA1 delay=39 (8~70),Diff = 7 PI (33 cell)
2459 10:02:10.123995 CA2 delay=35 (5~66),Diff = 3 PI (14 cell)
2460 10:02:10.127473 CA3 delay=34 (4~65),Diff = 2 PI (9 cell)
2461 10:02:10.131063 CA4 delay=33 (3~64),Diff = 1 PI (4 cell)
2462 10:02:10.133983 CA5 delay=32 (3~62),Diff = 0 PI (0 cell)
2463 10:02:10.134079
2464 10:02:10.137720 CA PerBit enable=1, Macro0, CA PI delay=32
2465 10:02:10.137811
2466 10:02:10.141217 [CBTSetCACLKResult] CA Dly = 32
2467 10:02:10.141308 CS Dly: 5 (0~36)
2468 10:02:10.141375 ==
2469 10:02:10.144494 Dram Type= 6, Freq= 0, CH_0, rank 1
2470 10:02:10.151005 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2471 10:02:10.151120 ==
2472 10:02:10.154222 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
2473 10:02:10.161145 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39
2474 10:02:10.169802 [CA 0] Center 38 (8~69) winsize 62
2475 10:02:10.173443 [CA 1] Center 38 (8~69) winsize 62
2476 10:02:10.176352 [CA 2] Center 35 (5~66) winsize 62
2477 10:02:10.179745 [CA 3] Center 34 (4~65) winsize 62
2478 10:02:10.182962 [CA 4] Center 33 (3~64) winsize 62
2479 10:02:10.187167 [CA 5] Center 32 (3~62) winsize 60
2480 10:02:10.187273
2481 10:02:10.189724 [CmdBusTrainingLP45] Vref(ca) range 1: 35
2482 10:02:10.189813
2483 10:02:10.192919 [CATrainingPosCal] consider 2 rank data
2484 10:02:10.196413 u2DelayCellTimex100 = 270/100 ps
2485 10:02:10.199934 CA0 delay=38 (8~69),Diff = 6 PI (28 cell)
2486 10:02:10.203351 CA1 delay=38 (8~69),Diff = 6 PI (28 cell)
2487 10:02:10.209692 CA2 delay=35 (5~66),Diff = 3 PI (14 cell)
2488 10:02:10.212920 CA3 delay=34 (4~65),Diff = 2 PI (9 cell)
2489 10:02:10.216721 CA4 delay=33 (3~64),Diff = 1 PI (4 cell)
2490 10:02:10.219771 CA5 delay=32 (3~62),Diff = 0 PI (0 cell)
2491 10:02:10.219870
2492 10:02:10.222901 CA PerBit enable=1, Macro0, CA PI delay=32
2493 10:02:10.222995
2494 10:02:10.226284 [CBTSetCACLKResult] CA Dly = 32
2495 10:02:10.226377 CS Dly: 6 (0~38)
2496 10:02:10.226445
2497 10:02:10.230017 ----->DramcWriteLeveling(PI) begin...
2498 10:02:10.233477 ==
2499 10:02:10.236421 Dram Type= 6, Freq= 0, CH_0, rank 0
2500 10:02:10.239650 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2501 10:02:10.239747 ==
2502 10:02:10.242923 Write leveling (Byte 0): 32 => 32
2503 10:02:10.246467 Write leveling (Byte 1): 29 => 29
2504 10:02:10.249520 DramcWriteLeveling(PI) end<-----
2505 10:02:10.249616
2506 10:02:10.249681 ==
2507 10:02:10.253097 Dram Type= 6, Freq= 0, CH_0, rank 0
2508 10:02:10.256320 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2509 10:02:10.256415 ==
2510 10:02:10.259923 [Gating] SW mode calibration
2511 10:02:10.267124 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
2512 10:02:10.270083 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
2513 10:02:10.276761 0 15 0 | B1->B0 | 2323 3333 | 0 0 | (0 0) (0 0)
2514 10:02:10.279662 0 15 4 | B1->B0 | 3131 3434 | 1 1 | (1 1) (1 1)
2515 10:02:10.282919 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2516 10:02:10.289919 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2517 10:02:10.292947 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2518 10:02:10.296704 0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2519 10:02:10.303185 0 15 24 | B1->B0 | 3434 3131 | 1 1 | (1 1) (1 0)
2520 10:02:10.306660 0 15 28 | B1->B0 | 3333 2424 | 1 0 | (1 1) (1 0)
2521 10:02:10.309841 1 0 0 | B1->B0 | 2c2c 2323 | 0 0 | (1 0) (0 0)
2522 10:02:10.316463 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2523 10:02:10.320196 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2524 10:02:10.323310 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2525 10:02:10.329888 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2526 10:02:10.334108 1 0 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2527 10:02:10.337045 1 0 24 | B1->B0 | 2323 2929 | 0 1 | (0 0) (0 0)
2528 10:02:10.339881 1 0 28 | B1->B0 | 2828 4545 | 0 0 | (0 0) (0 0)
2529 10:02:10.346639 1 1 0 | B1->B0 | 3636 4646 | 1 0 | (0 0) (0 0)
2530 10:02:10.350399 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2531 10:02:10.353963 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2532 10:02:10.359890 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2533 10:02:10.363182 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2534 10:02:10.367611 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2535 10:02:10.373352 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2536 10:02:10.376684 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
2537 10:02:10.379947 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
2538 10:02:10.386988 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2539 10:02:10.390291 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2540 10:02:10.393388 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2541 10:02:10.400502 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2542 10:02:10.403451 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2543 10:02:10.406625 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2544 10:02:10.413496 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2545 10:02:10.416356 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2546 10:02:10.419738 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2547 10:02:10.426842 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2548 10:02:10.430242 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2549 10:02:10.433200 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2550 10:02:10.440503 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2551 10:02:10.443064 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2552 10:02:10.446402 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
2553 10:02:10.450123 1 4 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
2554 10:02:10.453173 Total UI for P1: 0, mck2ui 16
2555 10:02:10.456733 best dqsien dly found for B0: ( 1, 3, 28)
2556 10:02:10.463546 1 4 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2557 10:02:10.466820 Total UI for P1: 0, mck2ui 16
2558 10:02:10.470119 best dqsien dly found for B1: ( 1, 4, 0)
2559 10:02:10.473370 best DQS0 dly(MCK, UI, PI) = (1, 3, 28)
2560 10:02:10.476798 best DQS1 dly(MCK, UI, PI) = (1, 4, 0)
2561 10:02:10.476924
2562 10:02:10.479992 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 28)
2563 10:02:10.483298 best DQS1 P1 dly(MCK, UI, PI) = (1, 8, 0)
2564 10:02:10.487032 [Gating] SW calibration Done
2565 10:02:10.487165 ==
2566 10:02:10.490241 Dram Type= 6, Freq= 0, CH_0, rank 0
2567 10:02:10.493633 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2568 10:02:10.493756 ==
2569 10:02:10.497048 RX Vref Scan: 0
2570 10:02:10.497163
2571 10:02:10.497259 RX Vref 0 -> 0, step: 1
2572 10:02:10.497350
2573 10:02:10.500423 RX Delay -40 -> 252, step: 8
2574 10:02:10.503348 iDelay=200, Bit 0, Center 119 (48 ~ 191) 144
2575 10:02:10.510710 iDelay=200, Bit 1, Center 123 (48 ~ 199) 152
2576 10:02:10.513245 iDelay=200, Bit 2, Center 119 (48 ~ 191) 144
2577 10:02:10.516780 iDelay=200, Bit 3, Center 119 (48 ~ 191) 144
2578 10:02:10.520248 iDelay=200, Bit 4, Center 119 (48 ~ 191) 144
2579 10:02:10.523405 iDelay=200, Bit 5, Center 115 (48 ~ 183) 136
2580 10:02:10.526889 iDelay=200, Bit 6, Center 127 (56 ~ 199) 144
2581 10:02:10.533686 iDelay=200, Bit 7, Center 127 (56 ~ 199) 144
2582 10:02:10.537073 iDelay=200, Bit 8, Center 99 (32 ~ 167) 136
2583 10:02:10.540357 iDelay=200, Bit 9, Center 107 (40 ~ 175) 136
2584 10:02:10.543558 iDelay=200, Bit 10, Center 111 (48 ~ 175) 128
2585 10:02:10.547181 iDelay=200, Bit 11, Center 107 (40 ~ 175) 136
2586 10:02:10.553747 iDelay=200, Bit 12, Center 119 (48 ~ 191) 144
2587 10:02:10.556971 iDelay=200, Bit 13, Center 123 (56 ~ 191) 136
2588 10:02:10.560253 iDelay=200, Bit 14, Center 123 (56 ~ 191) 136
2589 10:02:10.563663 iDelay=200, Bit 15, Center 119 (48 ~ 191) 144
2590 10:02:10.563786 ==
2591 10:02:10.566958 Dram Type= 6, Freq= 0, CH_0, rank 0
2592 10:02:10.574077 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2593 10:02:10.574223 ==
2594 10:02:10.574325 DQS Delay:
2595 10:02:10.577436 DQS0 = 0, DQS1 = 0
2596 10:02:10.577548 DQM Delay:
2597 10:02:10.577642 DQM0 = 121, DQM1 = 113
2598 10:02:10.580143 DQ Delay:
2599 10:02:10.583670 DQ0 =119, DQ1 =123, DQ2 =119, DQ3 =119
2600 10:02:10.587081 DQ4 =119, DQ5 =115, DQ6 =127, DQ7 =127
2601 10:02:10.590335 DQ8 =99, DQ9 =107, DQ10 =111, DQ11 =107
2602 10:02:10.593519 DQ12 =119, DQ13 =123, DQ14 =123, DQ15 =119
2603 10:02:10.593640
2604 10:02:10.593736
2605 10:02:10.593825 ==
2606 10:02:10.597390 Dram Type= 6, Freq= 0, CH_0, rank 0
2607 10:02:10.600110 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2608 10:02:10.603615 ==
2609 10:02:10.603746
2610 10:02:10.603843
2611 10:02:10.603933 TX Vref Scan disable
2612 10:02:10.606810 == TX Byte 0 ==
2613 10:02:10.610126 Update DQ dly =850 (3 ,2, 18) DQ OEN =(2 ,7)
2614 10:02:10.613898 Update DQM dly =850 (3 ,2, 18) DQM OEN =(2 ,7)
2615 10:02:10.617137 == TX Byte 1 ==
2616 10:02:10.620249 Update DQ dly =845 (3 ,2, 13) DQ OEN =(2 ,7)
2617 10:02:10.623813 Update DQM dly =845 (3 ,2, 13) DQM OEN =(2 ,7)
2618 10:02:10.623934 ==
2619 10:02:10.626860 Dram Type= 6, Freq= 0, CH_0, rank 0
2620 10:02:10.634018 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2621 10:02:10.634162 ==
2622 10:02:10.644435 TX Vref=22, minBit 0, minWin=25, winSum=406
2623 10:02:10.647782 TX Vref=24, minBit 0, minWin=25, winSum=412
2624 10:02:10.651287 TX Vref=26, minBit 10, minWin=25, winSum=419
2625 10:02:10.654315 TX Vref=28, minBit 1, minWin=26, winSum=424
2626 10:02:10.657701 TX Vref=30, minBit 0, minWin=26, winSum=430
2627 10:02:10.664830 TX Vref=32, minBit 0, minWin=26, winSum=423
2628 10:02:10.667810 [TxChooseVref] Worse bit 0, Min win 26, Win sum 430, Final Vref 30
2629 10:02:10.667936
2630 10:02:10.671150 Final TX Range 1 Vref 30
2631 10:02:10.671265
2632 10:02:10.671360 ==
2633 10:02:10.674192 Dram Type= 6, Freq= 0, CH_0, rank 0
2634 10:02:10.677531 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2635 10:02:10.677653 ==
2636 10:02:10.680949
2637 10:02:10.681060
2638 10:02:10.681154 TX Vref Scan disable
2639 10:02:10.684176 == TX Byte 0 ==
2640 10:02:10.687702 Update DQ dly =850 (3 ,2, 18) DQ OEN =(2 ,7)
2641 10:02:10.691004 Update DQM dly =850 (3 ,2, 18) DQM OEN =(2 ,7)
2642 10:02:10.694177 == TX Byte 1 ==
2643 10:02:10.698092 Update DQ dly =844 (3 ,2, 12) DQ OEN =(2 ,7)
2644 10:02:10.701054 Update DQM dly =844 (3 ,2, 12) DQM OEN =(2 ,7)
2645 10:02:10.704708
2646 10:02:10.704874 [DATLAT]
2647 10:02:10.704974 Freq=1200, CH0 RK0
2648 10:02:10.705068
2649 10:02:10.707369 DATLAT Default: 0xd
2650 10:02:10.707477 0, 0xFFFF, sum = 0
2651 10:02:10.710991 1, 0xFFFF, sum = 0
2652 10:02:10.711128 2, 0xFFFF, sum = 0
2653 10:02:10.714372 3, 0xFFFF, sum = 0
2654 10:02:10.714502 4, 0xFFFF, sum = 0
2655 10:02:10.717425 5, 0xFFFF, sum = 0
2656 10:02:10.721127 6, 0xFFFF, sum = 0
2657 10:02:10.721249 7, 0xFFFF, sum = 0
2658 10:02:10.724156 8, 0xFFFF, sum = 0
2659 10:02:10.724270 9, 0xFFFF, sum = 0
2660 10:02:10.727546 10, 0xFFFF, sum = 0
2661 10:02:10.727661 11, 0xFFFF, sum = 0
2662 10:02:10.730871 12, 0x0, sum = 1
2663 10:02:10.730984 13, 0x0, sum = 2
2664 10:02:10.734242 14, 0x0, sum = 3
2665 10:02:10.734356 15, 0x0, sum = 4
2666 10:02:10.734452 best_step = 13
2667 10:02:10.734543
2668 10:02:10.738015 ==
2669 10:02:10.741086 Dram Type= 6, Freq= 0, CH_0, rank 0
2670 10:02:10.744400 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2671 10:02:10.744515 ==
2672 10:02:10.744610 RX Vref Scan: 1
2673 10:02:10.744701
2674 10:02:10.748097 Set Vref Range= 32 -> 127
2675 10:02:10.748205
2676 10:02:10.751366 RX Vref 32 -> 127, step: 1
2677 10:02:10.751479
2678 10:02:10.754430 RX Delay -13 -> 252, step: 4
2679 10:02:10.754541
2680 10:02:10.757779 Set Vref, RX VrefLevel [Byte0]: 32
2681 10:02:10.760754 [Byte1]: 32
2682 10:02:10.760905
2683 10:02:10.764314 Set Vref, RX VrefLevel [Byte0]: 33
2684 10:02:10.767835 [Byte1]: 33
2685 10:02:10.767956
2686 10:02:10.771034 Set Vref, RX VrefLevel [Byte0]: 34
2687 10:02:10.774792 [Byte1]: 34
2688 10:02:10.778468
2689 10:02:10.778592 Set Vref, RX VrefLevel [Byte0]: 35
2690 10:02:10.781994 [Byte1]: 35
2691 10:02:10.786320
2692 10:02:10.786446 Set Vref, RX VrefLevel [Byte0]: 36
2693 10:02:10.789664 [Byte1]: 36
2694 10:02:10.794342
2695 10:02:10.794468 Set Vref, RX VrefLevel [Byte0]: 37
2696 10:02:10.797507 [Byte1]: 37
2697 10:02:10.802347
2698 10:02:10.802479 Set Vref, RX VrefLevel [Byte0]: 38
2699 10:02:10.805617 [Byte1]: 38
2700 10:02:10.810416
2701 10:02:10.810541 Set Vref, RX VrefLevel [Byte0]: 39
2702 10:02:10.813250 [Byte1]: 39
2703 10:02:10.817736
2704 10:02:10.817866 Set Vref, RX VrefLevel [Byte0]: 40
2705 10:02:10.821497 [Byte1]: 40
2706 10:02:10.825551
2707 10:02:10.825679 Set Vref, RX VrefLevel [Byte0]: 41
2708 10:02:10.829289 [Byte1]: 41
2709 10:02:10.833832
2710 10:02:10.833961 Set Vref, RX VrefLevel [Byte0]: 42
2711 10:02:10.837528 [Byte1]: 42
2712 10:02:10.841821
2713 10:02:10.841952 Set Vref, RX VrefLevel [Byte0]: 43
2714 10:02:10.844929 [Byte1]: 43
2715 10:02:10.849448
2716 10:02:10.849578 Set Vref, RX VrefLevel [Byte0]: 44
2717 10:02:10.852941 [Byte1]: 44
2718 10:02:10.857380
2719 10:02:10.857501 Set Vref, RX VrefLevel [Byte0]: 45
2720 10:02:10.861037 [Byte1]: 45
2721 10:02:10.865712
2722 10:02:10.865847 Set Vref, RX VrefLevel [Byte0]: 46
2723 10:02:10.868531 [Byte1]: 46
2724 10:02:10.873309
2725 10:02:10.876786 Set Vref, RX VrefLevel [Byte0]: 47
2726 10:02:10.876943 [Byte1]: 47
2727 10:02:10.881121
2728 10:02:10.881239 Set Vref, RX VrefLevel [Byte0]: 48
2729 10:02:10.884196 [Byte1]: 48
2730 10:02:10.889300
2731 10:02:10.889427 Set Vref, RX VrefLevel [Byte0]: 49
2732 10:02:10.892370 [Byte1]: 49
2733 10:02:10.896558
2734 10:02:10.896680 Set Vref, RX VrefLevel [Byte0]: 50
2735 10:02:10.900076 [Byte1]: 50
2736 10:02:10.904834
2737 10:02:10.904984 Set Vref, RX VrefLevel [Byte0]: 51
2738 10:02:10.908424 [Byte1]: 51
2739 10:02:10.912747
2740 10:02:10.912916 Set Vref, RX VrefLevel [Byte0]: 52
2741 10:02:10.916164 [Byte1]: 52
2742 10:02:10.920427
2743 10:02:10.920553 Set Vref, RX VrefLevel [Byte0]: 53
2744 10:02:10.924133 [Byte1]: 53
2745 10:02:10.928703
2746 10:02:10.928863 Set Vref, RX VrefLevel [Byte0]: 54
2747 10:02:10.931493 [Byte1]: 54
2748 10:02:10.936297
2749 10:02:10.936428 Set Vref, RX VrefLevel [Byte0]: 55
2750 10:02:10.939755 [Byte1]: 55
2751 10:02:10.944068
2752 10:02:10.944195 Set Vref, RX VrefLevel [Byte0]: 56
2753 10:02:10.947307 [Byte1]: 56
2754 10:02:10.952205
2755 10:02:10.952340 Set Vref, RX VrefLevel [Byte0]: 57
2756 10:02:10.955449 [Byte1]: 57
2757 10:02:10.959862
2758 10:02:10.959988 Set Vref, RX VrefLevel [Byte0]: 58
2759 10:02:10.963361 [Byte1]: 58
2760 10:02:10.967999
2761 10:02:10.968099 Set Vref, RX VrefLevel [Byte0]: 59
2762 10:02:10.970988 [Byte1]: 59
2763 10:02:10.975750
2764 10:02:10.975851 Set Vref, RX VrefLevel [Byte0]: 60
2765 10:02:10.978998 [Byte1]: 60
2766 10:02:10.983631
2767 10:02:10.983725 Set Vref, RX VrefLevel [Byte0]: 61
2768 10:02:10.986962 [Byte1]: 61
2769 10:02:10.991855
2770 10:02:10.991961 Set Vref, RX VrefLevel [Byte0]: 62
2771 10:02:10.994870 [Byte1]: 62
2772 10:02:10.999400
2773 10:02:10.999528 Set Vref, RX VrefLevel [Byte0]: 63
2774 10:02:11.002894 [Byte1]: 63
2775 10:02:11.007421
2776 10:02:11.007534 Set Vref, RX VrefLevel [Byte0]: 64
2777 10:02:11.010647 [Byte1]: 64
2778 10:02:11.015153
2779 10:02:11.015256 Set Vref, RX VrefLevel [Byte0]: 65
2780 10:02:11.018650 [Byte1]: 65
2781 10:02:11.023214
2782 10:02:11.023310 Set Vref, RX VrefLevel [Byte0]: 66
2783 10:02:11.026637 [Byte1]: 66
2784 10:02:11.031067
2785 10:02:11.031166 Set Vref, RX VrefLevel [Byte0]: 67
2786 10:02:11.034010 [Byte1]: 67
2787 10:02:11.038788
2788 10:02:11.038888 Set Vref, RX VrefLevel [Byte0]: 68
2789 10:02:11.042465 [Byte1]: 68
2790 10:02:11.046708
2791 10:02:11.046811 Set Vref, RX VrefLevel [Byte0]: 69
2792 10:02:11.050035 [Byte1]: 69
2793 10:02:11.054970
2794 10:02:11.055079 Final RX Vref Byte 0 = 53 to rank0
2795 10:02:11.057908 Final RX Vref Byte 1 = 54 to rank0
2796 10:02:11.061426 Final RX Vref Byte 0 = 53 to rank1
2797 10:02:11.064642 Final RX Vref Byte 1 = 54 to rank1==
2798 10:02:11.068076 Dram Type= 6, Freq= 0, CH_0, rank 0
2799 10:02:11.075032 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2800 10:02:11.075170 ==
2801 10:02:11.075239 DQS Delay:
2802 10:02:11.075300 DQS0 = 0, DQS1 = 0
2803 10:02:11.078004 DQM Delay:
2804 10:02:11.078093 DQM0 = 120, DQM1 = 113
2805 10:02:11.081421 DQ Delay:
2806 10:02:11.084607 DQ0 =120, DQ1 =122, DQ2 =118, DQ3 =118
2807 10:02:11.088355 DQ4 =124, DQ5 =112, DQ6 =126, DQ7 =124
2808 10:02:11.091128 DQ8 =100, DQ9 =102, DQ10 =114, DQ11 =106
2809 10:02:11.094338 DQ12 =120, DQ13 =116, DQ14 =124, DQ15 =122
2810 10:02:11.094435
2811 10:02:11.094502
2812 10:02:11.104404 [DQSOSCAuto] RK0, (LSB)MR18= 0x120b, (MSB)MR19= 0x404, tDQSOscB0 = 405 ps tDQSOscB1 = 403 ps
2813 10:02:11.104550 CH0 RK0: MR19=404, MR18=120B
2814 10:02:11.111219 CH0_RK0: MR19=0x404, MR18=0x120B, DQSOSC=403, MR23=63, INC=40, DEC=26
2815 10:02:11.111345
2816 10:02:11.114626 ----->DramcWriteLeveling(PI) begin...
2817 10:02:11.114724 ==
2818 10:02:11.118033 Dram Type= 6, Freq= 0, CH_0, rank 1
2819 10:02:11.121521 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2820 10:02:11.124287 ==
2821 10:02:11.128060 Write leveling (Byte 0): 35 => 35
2822 10:02:11.128168 Write leveling (Byte 1): 30 => 30
2823 10:02:11.131339 DramcWriteLeveling(PI) end<-----
2824 10:02:11.131429
2825 10:02:11.131495 ==
2826 10:02:11.134682 Dram Type= 6, Freq= 0, CH_0, rank 1
2827 10:02:11.141527 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2828 10:02:11.141652 ==
2829 10:02:11.141721 [Gating] SW mode calibration
2830 10:02:11.151353 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
2831 10:02:11.154634 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
2832 10:02:11.161285 0 15 0 | B1->B0 | 3434 3030 | 0 1 | (1 1) (1 1)
2833 10:02:11.164699 0 15 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2834 10:02:11.167952 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2835 10:02:11.171246 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2836 10:02:11.178187 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2837 10:02:11.181341 0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
2838 10:02:11.184636 0 15 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)
2839 10:02:11.191572 0 15 28 | B1->B0 | 2f2f 2c2c | 0 0 | (0 1) (0 0)
2840 10:02:11.195120 1 0 0 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)
2841 10:02:11.198021 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2842 10:02:11.204508 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2843 10:02:11.207959 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2844 10:02:11.211713 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2845 10:02:11.218207 1 0 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
2846 10:02:11.221035 1 0 24 | B1->B0 | 2424 2323 | 0 0 | (0 0) (0 0)
2847 10:02:11.224674 1 0 28 | B1->B0 | 3c3c 3f3f | 0 1 | (0 0) (0 0)
2848 10:02:11.231080 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2849 10:02:11.234520 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2850 10:02:11.238649 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2851 10:02:11.245085 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2852 10:02:11.247969 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2853 10:02:11.251817 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2854 10:02:11.254737 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2855 10:02:11.261827 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
2856 10:02:11.264761 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 1)
2857 10:02:11.268732 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2858 10:02:11.275252 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2859 10:02:11.278422 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2860 10:02:11.281738 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2861 10:02:11.288308 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2862 10:02:11.291567 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2863 10:02:11.294783 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2864 10:02:11.301459 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2865 10:02:11.304959 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2866 10:02:11.308451 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2867 10:02:11.315024 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2868 10:02:11.318190 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2869 10:02:11.321494 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2870 10:02:11.325397 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
2871 10:02:11.331453 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
2872 10:02:11.335087 1 4 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
2873 10:02:11.338452 1 4 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
2874 10:02:11.342387 Total UI for P1: 0, mck2ui 16
2875 10:02:11.345100 best dqsien dly found for B0: ( 1, 3, 30)
2876 10:02:11.348264 Total UI for P1: 0, mck2ui 16
2877 10:02:11.352038 best dqsien dly found for B1: ( 1, 3, 30)
2878 10:02:11.355204 best DQS0 dly(MCK, UI, PI) = (1, 3, 30)
2879 10:02:11.358346 best DQS1 dly(MCK, UI, PI) = (1, 3, 30)
2880 10:02:11.358466
2881 10:02:11.364916 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 30)
2882 10:02:11.368389 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 30)
2883 10:02:11.368487 [Gating] SW calibration Done
2884 10:02:11.371772 ==
2885 10:02:11.375889 Dram Type= 6, Freq= 0, CH_0, rank 1
2886 10:02:11.378406 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2887 10:02:11.378492 ==
2888 10:02:11.378559 RX Vref Scan: 0
2889 10:02:11.378619
2890 10:02:11.381926 RX Vref 0 -> 0, step: 1
2891 10:02:11.382011
2892 10:02:11.385205 RX Delay -40 -> 252, step: 8
2893 10:02:11.388639 iDelay=200, Bit 0, Center 119 (48 ~ 191) 144
2894 10:02:11.391564 iDelay=200, Bit 1, Center 119 (48 ~ 191) 144
2895 10:02:11.395005 iDelay=200, Bit 2, Center 119 (48 ~ 191) 144
2896 10:02:11.401709 iDelay=200, Bit 3, Center 119 (48 ~ 191) 144
2897 10:02:11.405439 iDelay=200, Bit 4, Center 127 (56 ~ 199) 144
2898 10:02:11.408490 iDelay=200, Bit 5, Center 119 (48 ~ 191) 144
2899 10:02:11.411785 iDelay=200, Bit 6, Center 127 (56 ~ 199) 144
2900 10:02:11.415047 iDelay=200, Bit 7, Center 127 (56 ~ 199) 144
2901 10:02:11.421810 iDelay=200, Bit 8, Center 103 (40 ~ 167) 128
2902 10:02:11.425056 iDelay=200, Bit 9, Center 99 (32 ~ 167) 136
2903 10:02:11.428331 iDelay=200, Bit 10, Center 115 (48 ~ 183) 136
2904 10:02:11.431795 iDelay=200, Bit 11, Center 107 (40 ~ 175) 136
2905 10:02:11.435127 iDelay=200, Bit 12, Center 115 (48 ~ 183) 136
2906 10:02:11.441775 iDelay=200, Bit 13, Center 123 (56 ~ 191) 136
2907 10:02:11.445172 iDelay=200, Bit 14, Center 123 (56 ~ 191) 136
2908 10:02:11.448720 iDelay=200, Bit 15, Center 123 (56 ~ 191) 136
2909 10:02:11.448826 ==
2910 10:02:11.452016 Dram Type= 6, Freq= 0, CH_0, rank 1
2911 10:02:11.455549 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2912 10:02:11.455645 ==
2913 10:02:11.459050 DQS Delay:
2914 10:02:11.459138 DQS0 = 0, DQS1 = 0
2915 10:02:11.462238 DQM Delay:
2916 10:02:11.462326 DQM0 = 122, DQM1 = 113
2917 10:02:11.462393 DQ Delay:
2918 10:02:11.465514 DQ0 =119, DQ1 =119, DQ2 =119, DQ3 =119
2919 10:02:11.472561 DQ4 =127, DQ5 =119, DQ6 =127, DQ7 =127
2920 10:02:11.475524 DQ8 =103, DQ9 =99, DQ10 =115, DQ11 =107
2921 10:02:11.478569 DQ12 =115, DQ13 =123, DQ14 =123, DQ15 =123
2922 10:02:11.478665
2923 10:02:11.478764
2924 10:02:11.478872 ==
2925 10:02:11.482480 Dram Type= 6, Freq= 0, CH_0, rank 1
2926 10:02:11.485166 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2927 10:02:11.485279 ==
2928 10:02:11.485376
2929 10:02:11.485466
2930 10:02:11.488494 TX Vref Scan disable
2931 10:02:11.491756 == TX Byte 0 ==
2932 10:02:11.495377 Update DQ dly =854 (3 ,2, 22) DQ OEN =(2 ,7)
2933 10:02:11.499024 Update DQM dly =854 (3 ,2, 22) DQM OEN =(2 ,7)
2934 10:02:11.499158 == TX Byte 1 ==
2935 10:02:11.505479 Update DQ dly =846 (3 ,2, 14) DQ OEN =(2 ,7)
2936 10:02:11.508682 Update DQM dly =846 (3 ,2, 14) DQM OEN =(2 ,7)
2937 10:02:11.508853 ==
2938 10:02:11.512597 Dram Type= 6, Freq= 0, CH_0, rank 1
2939 10:02:11.515362 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2940 10:02:11.515456 ==
2941 10:02:11.528988 TX Vref=22, minBit 0, minWin=25, winSum=414
2942 10:02:11.532735 TX Vref=24, minBit 1, minWin=24, winSum=417
2943 10:02:11.535832 TX Vref=26, minBit 1, minWin=26, winSum=427
2944 10:02:11.539569 TX Vref=28, minBit 1, minWin=26, winSum=430
2945 10:02:11.542584 TX Vref=30, minBit 5, minWin=25, winSum=426
2946 10:02:11.545676 TX Vref=32, minBit 5, minWin=25, winSum=426
2947 10:02:11.552765 [TxChooseVref] Worse bit 1, Min win 26, Win sum 430, Final Vref 28
2948 10:02:11.552945
2949 10:02:11.555923 Final TX Range 1 Vref 28
2950 10:02:11.556045
2951 10:02:11.556140 ==
2952 10:02:11.559486 Dram Type= 6, Freq= 0, CH_0, rank 1
2953 10:02:11.562791 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2954 10:02:11.562927 ==
2955 10:02:11.563016
2956 10:02:11.563121
2957 10:02:11.565933 TX Vref Scan disable
2958 10:02:11.569127 == TX Byte 0 ==
2959 10:02:11.572791 Update DQ dly =854 (3 ,2, 22) DQ OEN =(2 ,7)
2960 10:02:11.575856 Update DQM dly =854 (3 ,2, 22) DQM OEN =(2 ,7)
2961 10:02:11.579420 == TX Byte 1 ==
2962 10:02:11.582589 Update DQ dly =846 (3 ,2, 14) DQ OEN =(2 ,7)
2963 10:02:11.585850 Update DQM dly =846 (3 ,2, 14) DQM OEN =(2 ,7)
2964 10:02:11.585937
2965 10:02:11.589481 [DATLAT]
2966 10:02:11.589568 Freq=1200, CH0 RK1
2967 10:02:11.589651
2968 10:02:11.592983 DATLAT Default: 0xd
2969 10:02:11.593069 0, 0xFFFF, sum = 0
2970 10:02:11.595884 1, 0xFFFF, sum = 0
2971 10:02:11.595972 2, 0xFFFF, sum = 0
2972 10:02:11.599442 3, 0xFFFF, sum = 0
2973 10:02:11.599561 4, 0xFFFF, sum = 0
2974 10:02:11.602746 5, 0xFFFF, sum = 0
2975 10:02:11.602840 6, 0xFFFF, sum = 0
2976 10:02:11.606151 7, 0xFFFF, sum = 0
2977 10:02:11.606242 8, 0xFFFF, sum = 0
2978 10:02:11.609500 9, 0xFFFF, sum = 0
2979 10:02:11.609588 10, 0xFFFF, sum = 0
2980 10:02:11.613296 11, 0xFFFF, sum = 0
2981 10:02:11.613386 12, 0x0, sum = 1
2982 10:02:11.615920 13, 0x0, sum = 2
2983 10:02:11.616006 14, 0x0, sum = 3
2984 10:02:11.619516 15, 0x0, sum = 4
2985 10:02:11.619606 best_step = 13
2986 10:02:11.619672
2987 10:02:11.619734 ==
2988 10:02:11.623241 Dram Type= 6, Freq= 0, CH_0, rank 1
2989 10:02:11.629508 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
2990 10:02:11.629608 ==
2991 10:02:11.629679 RX Vref Scan: 0
2992 10:02:11.629741
2993 10:02:11.632759 RX Vref 0 -> 0, step: 1
2994 10:02:11.632897
2995 10:02:11.636008 RX Delay -13 -> 252, step: 4
2996 10:02:11.639411 iDelay=195, Bit 0, Center 120 (51 ~ 190) 140
2997 10:02:11.642880 iDelay=195, Bit 1, Center 122 (55 ~ 190) 136
2998 10:02:11.649450 iDelay=195, Bit 2, Center 118 (51 ~ 186) 136
2999 10:02:11.652962 iDelay=195, Bit 3, Center 118 (51 ~ 186) 136
3000 10:02:11.655912 iDelay=195, Bit 4, Center 122 (55 ~ 190) 136
3001 10:02:11.659149 iDelay=195, Bit 5, Center 116 (51 ~ 182) 132
3002 10:02:11.662600 iDelay=195, Bit 6, Center 128 (63 ~ 194) 132
3003 10:02:11.665854 iDelay=195, Bit 7, Center 128 (63 ~ 194) 132
3004 10:02:11.673107 iDelay=195, Bit 8, Center 100 (35 ~ 166) 132
3005 10:02:11.675922 iDelay=195, Bit 9, Center 100 (35 ~ 166) 132
3006 10:02:11.680307 iDelay=195, Bit 10, Center 112 (47 ~ 178) 132
3007 10:02:11.682776 iDelay=195, Bit 11, Center 104 (39 ~ 170) 132
3008 10:02:11.686876 iDelay=195, Bit 12, Center 118 (55 ~ 182) 128
3009 10:02:11.692994 iDelay=195, Bit 13, Center 118 (55 ~ 182) 128
3010 10:02:11.696749 iDelay=195, Bit 14, Center 124 (63 ~ 186) 124
3011 10:02:11.699344 iDelay=195, Bit 15, Center 120 (59 ~ 182) 124
3012 10:02:11.699459 ==
3013 10:02:11.702656 Dram Type= 6, Freq= 0, CH_0, rank 1
3014 10:02:11.706020 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3015 10:02:11.709243 ==
3016 10:02:11.709333 DQS Delay:
3017 10:02:11.709399 DQS0 = 0, DQS1 = 0
3018 10:02:11.713190 DQM Delay:
3019 10:02:11.713292 DQM0 = 121, DQM1 = 112
3020 10:02:11.716606 DQ Delay:
3021 10:02:11.719586 DQ0 =120, DQ1 =122, DQ2 =118, DQ3 =118
3022 10:02:11.722493 DQ4 =122, DQ5 =116, DQ6 =128, DQ7 =128
3023 10:02:11.726577 DQ8 =100, DQ9 =100, DQ10 =112, DQ11 =104
3024 10:02:11.729399 DQ12 =118, DQ13 =118, DQ14 =124, DQ15 =120
3025 10:02:11.729490
3026 10:02:11.729557
3027 10:02:11.736314 [DQSOSCAuto] RK1, (LSB)MR18= 0xeee, (MSB)MR19= 0x403, tDQSOscB0 = 417 ps tDQSOscB1 = 404 ps
3028 10:02:11.739540 CH0 RK1: MR19=403, MR18=EEE
3029 10:02:11.746264 CH0_RK1: MR19=0x403, MR18=0xEEE, DQSOSC=404, MR23=63, INC=40, DEC=26
3030 10:02:11.749496 [RxdqsGatingPostProcess] freq 1200
3031 10:02:11.756628 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
3032 10:02:11.756733 best DQS0 dly(2T, 0.5T) = (0, 11)
3033 10:02:11.759648 best DQS1 dly(2T, 0.5T) = (0, 12)
3034 10:02:11.762930 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3035 10:02:11.766402 best DQS1 P1 dly(2T, 0.5T) = (1, 0)
3036 10:02:11.769737 best DQS0 dly(2T, 0.5T) = (0, 11)
3037 10:02:11.773104 best DQS1 dly(2T, 0.5T) = (0, 11)
3038 10:02:11.776596 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3039 10:02:11.779909 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
3040 10:02:11.782772 Pre-setting of DQS Precalculation
3041 10:02:11.786238 [DualRankRxdatlatCal] RK0: 13, RK1: 13, Final_Datlat 13
3042 10:02:11.786324 ==
3043 10:02:11.789640 Dram Type= 6, Freq= 0, CH_1, rank 0
3044 10:02:11.796454 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3045 10:02:11.796564 ==
3046 10:02:11.799342 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3047 10:02:11.806331 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=27, u1VrefScanEnd=37
3048 10:02:11.814977 [CA 0] Center 37 (7~68) winsize 62
3049 10:02:11.818363 [CA 1] Center 37 (7~68) winsize 62
3050 10:02:11.821617 [CA 2] Center 35 (5~65) winsize 61
3051 10:02:11.825304 [CA 3] Center 34 (4~64) winsize 61
3052 10:02:11.828732 [CA 4] Center 34 (4~64) winsize 61
3053 10:02:11.831927 [CA 5] Center 33 (3~63) winsize 61
3054 10:02:11.832016
3055 10:02:11.835368 [CmdBusTrainingLP45] Vref(ca) range 1: 37
3056 10:02:11.835454
3057 10:02:11.838558 [CATrainingPosCal] consider 1 rank data
3058 10:02:11.841649 u2DelayCellTimex100 = 270/100 ps
3059 10:02:11.845001 CA0 delay=37 (7~68),Diff = 4 PI (19 cell)
3060 10:02:11.848763 CA1 delay=37 (7~68),Diff = 4 PI (19 cell)
3061 10:02:11.854865 CA2 delay=35 (5~65),Diff = 2 PI (9 cell)
3062 10:02:11.858138 CA3 delay=34 (4~64),Diff = 1 PI (4 cell)
3063 10:02:11.862015 CA4 delay=34 (4~64),Diff = 1 PI (4 cell)
3064 10:02:11.865124 CA5 delay=33 (3~63),Diff = 0 PI (0 cell)
3065 10:02:11.865217
3066 10:02:11.868284 CA PerBit enable=1, Macro0, CA PI delay=33
3067 10:02:11.868368
3068 10:02:11.871500 [CBTSetCACLKResult] CA Dly = 33
3069 10:02:11.871589 CS Dly: 8 (0~39)
3070 10:02:11.871656 ==
3071 10:02:11.875637 Dram Type= 6, Freq= 0, CH_1, rank 1
3072 10:02:11.881831 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3073 10:02:11.881935 ==
3074 10:02:11.885195 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3075 10:02:11.891989 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=27, u1VrefScanEnd=37
3076 10:02:11.900833 [CA 0] Center 37 (7~68) winsize 62
3077 10:02:11.904180 [CA 1] Center 37 (7~68) winsize 62
3078 10:02:11.907564 [CA 2] Center 35 (5~65) winsize 61
3079 10:02:11.910826 [CA 3] Center 34 (4~65) winsize 62
3080 10:02:11.913609 [CA 4] Center 34 (4~65) winsize 62
3081 10:02:11.917460 [CA 5] Center 34 (4~64) winsize 61
3082 10:02:11.917583
3083 10:02:11.920564 [CmdBusTrainingLP45] Vref(ca) range 1: 35
3084 10:02:11.920675
3085 10:02:11.924112 [CATrainingPosCal] consider 2 rank data
3086 10:02:11.927601 u2DelayCellTimex100 = 270/100 ps
3087 10:02:11.930863 CA0 delay=37 (7~68),Diff = 4 PI (19 cell)
3088 10:02:11.933906 CA1 delay=37 (7~68),Diff = 4 PI (19 cell)
3089 10:02:11.937825 CA2 delay=35 (5~65),Diff = 2 PI (9 cell)
3090 10:02:11.944135 CA3 delay=34 (4~64),Diff = 1 PI (4 cell)
3091 10:02:11.947671 CA4 delay=34 (4~64),Diff = 1 PI (4 cell)
3092 10:02:11.950912 CA5 delay=33 (4~63),Diff = 0 PI (0 cell)
3093 10:02:11.951042
3094 10:02:11.953984 CA PerBit enable=1, Macro0, CA PI delay=33
3095 10:02:11.954097
3096 10:02:11.957437 [CBTSetCACLKResult] CA Dly = 33
3097 10:02:11.957550 CS Dly: 9 (0~41)
3098 10:02:11.957648
3099 10:02:11.960582 ----->DramcWriteLeveling(PI) begin...
3100 10:02:11.960696 ==
3101 10:02:11.964359 Dram Type= 6, Freq= 0, CH_1, rank 0
3102 10:02:11.970747 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3103 10:02:11.970889 ==
3104 10:02:11.974191 Write leveling (Byte 0): 28 => 28
3105 10:02:11.977664 Write leveling (Byte 1): 27 => 27
3106 10:02:11.977784 DramcWriteLeveling(PI) end<-----
3107 10:02:11.980854
3108 10:02:11.980965 ==
3109 10:02:11.984292 Dram Type= 6, Freq= 0, CH_1, rank 0
3110 10:02:11.987745 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3111 10:02:11.987862 ==
3112 10:02:11.991494 [Gating] SW mode calibration
3113 10:02:11.997922 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
3114 10:02:12.000930 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
3115 10:02:12.007544 0 15 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3116 10:02:12.011149 0 15 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3117 10:02:12.014223 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3118 10:02:12.021169 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3119 10:02:12.024569 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3120 10:02:12.028005 0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3121 10:02:12.034490 0 15 24 | B1->B0 | 3232 2c2c | 0 0 | (0 0) (0 1)
3122 10:02:12.037562 0 15 28 | B1->B0 | 2424 2323 | 0 0 | (1 0) (1 0)
3123 10:02:12.041056 1 0 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3124 10:02:12.044495 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3125 10:02:12.051071 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3126 10:02:12.054617 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3127 10:02:12.058026 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3128 10:02:12.064770 1 0 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3129 10:02:12.067992 1 0 24 | B1->B0 | 3131 3c3c | 1 1 | (0 0) (0 0)
3130 10:02:12.071013 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3131 10:02:12.077930 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3132 10:02:12.081302 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3133 10:02:12.084475 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3134 10:02:12.091240 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3135 10:02:12.094461 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3136 10:02:12.098254 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3137 10:02:12.104862 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
3138 10:02:12.107856 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
3139 10:02:12.111401 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3140 10:02:12.117894 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3141 10:02:12.121702 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3142 10:02:12.125220 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3143 10:02:12.128072 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3144 10:02:12.134896 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3145 10:02:12.138200 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3146 10:02:12.141423 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3147 10:02:12.148164 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3148 10:02:12.151538 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3149 10:02:12.154621 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3150 10:02:12.161487 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3151 10:02:12.164977 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3152 10:02:12.168179 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3153 10:02:12.175099 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
3154 10:02:12.178660 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
3155 10:02:12.181581 Total UI for P1: 0, mck2ui 16
3156 10:02:12.185429 best dqsien dly found for B0: ( 1, 3, 24)
3157 10:02:12.188307 1 4 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3158 10:02:12.191755 Total UI for P1: 0, mck2ui 16
3159 10:02:12.194937 best dqsien dly found for B1: ( 1, 3, 26)
3160 10:02:12.198601 best DQS0 dly(MCK, UI, PI) = (1, 3, 24)
3161 10:02:12.201720 best DQS1 dly(MCK, UI, PI) = (1, 3, 26)
3162 10:02:12.201809
3163 10:02:12.205292 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 24)
3164 10:02:12.212047 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 26)
3165 10:02:12.212141 [Gating] SW calibration Done
3166 10:02:12.212208 ==
3167 10:02:12.214888 Dram Type= 6, Freq= 0, CH_1, rank 0
3168 10:02:12.221682 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3169 10:02:12.221773 ==
3170 10:02:12.221839 RX Vref Scan: 0
3171 10:02:12.221901
3172 10:02:12.225266 RX Vref 0 -> 0, step: 1
3173 10:02:12.225351
3174 10:02:12.228367 RX Delay -40 -> 252, step: 8
3175 10:02:12.232026 iDelay=200, Bit 0, Center 123 (56 ~ 191) 136
3176 10:02:12.235248 iDelay=200, Bit 1, Center 115 (48 ~ 183) 136
3177 10:02:12.238300 iDelay=200, Bit 2, Center 107 (40 ~ 175) 136
3178 10:02:12.241597 iDelay=200, Bit 3, Center 119 (48 ~ 191) 144
3179 10:02:12.248425 iDelay=200, Bit 4, Center 119 (48 ~ 191) 144
3180 10:02:12.251510 iDelay=200, Bit 5, Center 127 (56 ~ 199) 144
3181 10:02:12.254721 iDelay=200, Bit 6, Center 131 (64 ~ 199) 136
3182 10:02:12.258351 iDelay=200, Bit 7, Center 119 (48 ~ 191) 144
3183 10:02:12.262018 iDelay=200, Bit 8, Center 103 (40 ~ 167) 128
3184 10:02:12.268662 iDelay=200, Bit 9, Center 107 (40 ~ 175) 136
3185 10:02:12.271909 iDelay=200, Bit 10, Center 115 (48 ~ 183) 136
3186 10:02:12.274901 iDelay=200, Bit 11, Center 111 (48 ~ 175) 128
3187 10:02:12.278083 iDelay=200, Bit 12, Center 123 (56 ~ 191) 136
3188 10:02:12.284947 iDelay=200, Bit 13, Center 127 (64 ~ 191) 128
3189 10:02:12.288209 iDelay=200, Bit 14, Center 123 (56 ~ 191) 136
3190 10:02:12.291542 iDelay=200, Bit 15, Center 123 (56 ~ 191) 136
3191 10:02:12.291641 ==
3192 10:02:12.295495 Dram Type= 6, Freq= 0, CH_1, rank 0
3193 10:02:12.298537 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3194 10:02:12.298625 ==
3195 10:02:12.301934 DQS Delay:
3196 10:02:12.302023 DQS0 = 0, DQS1 = 0
3197 10:02:12.302089 DQM Delay:
3198 10:02:12.304847 DQM0 = 120, DQM1 = 116
3199 10:02:12.304933 DQ Delay:
3200 10:02:12.308056 DQ0 =123, DQ1 =115, DQ2 =107, DQ3 =119
3201 10:02:12.312016 DQ4 =119, DQ5 =127, DQ6 =131, DQ7 =119
3202 10:02:12.315336 DQ8 =103, DQ9 =107, DQ10 =115, DQ11 =111
3203 10:02:12.321476 DQ12 =123, DQ13 =127, DQ14 =123, DQ15 =123
3204 10:02:12.321577
3205 10:02:12.321646
3206 10:02:12.321707 ==
3207 10:02:12.325133 Dram Type= 6, Freq= 0, CH_1, rank 0
3208 10:02:12.328343 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3209 10:02:12.328430 ==
3210 10:02:12.328496
3211 10:02:12.328558
3212 10:02:12.331932 TX Vref Scan disable
3213 10:02:12.332017 == TX Byte 0 ==
3214 10:02:12.338379 Update DQ dly =845 (3 ,2, 13) DQ OEN =(2 ,7)
3215 10:02:12.341459 Update DQM dly =845 (3 ,2, 13) DQM OEN =(2 ,7)
3216 10:02:12.341550 == TX Byte 1 ==
3217 10:02:12.348329 Update DQ dly =843 (3 ,2, 11) DQ OEN =(2 ,7)
3218 10:02:12.351714 Update DQM dly =843 (3 ,2, 11) DQM OEN =(2 ,7)
3219 10:02:12.351806 ==
3220 10:02:12.354826 Dram Type= 6, Freq= 0, CH_1, rank 0
3221 10:02:12.358696 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3222 10:02:12.358784 ==
3223 10:02:12.370916 TX Vref=22, minBit 1, minWin=24, winSum=408
3224 10:02:12.374370 TX Vref=24, minBit 9, minWin=24, winSum=415
3225 10:02:12.377574 TX Vref=26, minBit 1, minWin=25, winSum=421
3226 10:02:12.381252 TX Vref=28, minBit 1, minWin=26, winSum=426
3227 10:02:12.384164 TX Vref=30, minBit 9, minWin=25, winSum=430
3228 10:02:12.387608 TX Vref=32, minBit 9, minWin=26, winSum=429
3229 10:02:12.394998 [TxChooseVref] Worse bit 9, Min win 26, Win sum 429, Final Vref 32
3230 10:02:12.395102
3231 10:02:12.397549 Final TX Range 1 Vref 32
3232 10:02:12.397635
3233 10:02:12.397701 ==
3234 10:02:12.400935 Dram Type= 6, Freq= 0, CH_1, rank 0
3235 10:02:12.404494 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3236 10:02:12.404637 ==
3237 10:02:12.404745
3238 10:02:12.404861
3239 10:02:12.407673 TX Vref Scan disable
3240 10:02:12.411229 == TX Byte 0 ==
3241 10:02:12.414287 Update DQ dly =845 (3 ,2, 13) DQ OEN =(2 ,7)
3242 10:02:12.417771 Update DQM dly =845 (3 ,2, 13) DQM OEN =(2 ,7)
3243 10:02:12.421400 == TX Byte 1 ==
3244 10:02:12.424505 Update DQ dly =844 (3 ,2, 12) DQ OEN =(2 ,7)
3245 10:02:12.428204 Update DQM dly =844 (3 ,2, 12) DQM OEN =(2 ,7)
3246 10:02:12.428296
3247 10:02:12.431157 [DATLAT]
3248 10:02:12.431243 Freq=1200, CH1 RK0
3249 10:02:12.431310
3250 10:02:12.434608 DATLAT Default: 0xd
3251 10:02:12.434693 0, 0xFFFF, sum = 0
3252 10:02:12.437902 1, 0xFFFF, sum = 0
3253 10:02:12.437988 2, 0xFFFF, sum = 0
3254 10:02:12.441378 3, 0xFFFF, sum = 0
3255 10:02:12.441464 4, 0xFFFF, sum = 0
3256 10:02:12.444593 5, 0xFFFF, sum = 0
3257 10:02:12.444705 6, 0xFFFF, sum = 0
3258 10:02:12.448173 7, 0xFFFF, sum = 0
3259 10:02:12.448259 8, 0xFFFF, sum = 0
3260 10:02:12.451234 9, 0xFFFF, sum = 0
3261 10:02:12.451321 10, 0xFFFF, sum = 0
3262 10:02:12.454836 11, 0xFFFF, sum = 0
3263 10:02:12.454922 12, 0x0, sum = 1
3264 10:02:12.457856 13, 0x0, sum = 2
3265 10:02:12.457942 14, 0x0, sum = 3
3266 10:02:12.461660 15, 0x0, sum = 4
3267 10:02:12.461747 best_step = 13
3268 10:02:12.461813
3269 10:02:12.461872 ==
3270 10:02:12.464781 Dram Type= 6, Freq= 0, CH_1, rank 0
3271 10:02:12.471358 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3272 10:02:12.471450 ==
3273 10:02:12.471518 RX Vref Scan: 1
3274 10:02:12.471579
3275 10:02:12.474851 Set Vref Range= 32 -> 127
3276 10:02:12.474937
3277 10:02:12.477893 RX Vref 32 -> 127, step: 1
3278 10:02:12.477978
3279 10:02:12.478044 RX Delay -5 -> 252, step: 4
3280 10:02:12.481437
3281 10:02:12.481521 Set Vref, RX VrefLevel [Byte0]: 32
3282 10:02:12.484758 [Byte1]: 32
3283 10:02:12.489542
3284 10:02:12.489637 Set Vref, RX VrefLevel [Byte0]: 33
3285 10:02:12.492101 [Byte1]: 33
3286 10:02:12.496791
3287 10:02:12.496923 Set Vref, RX VrefLevel [Byte0]: 34
3288 10:02:12.500341 [Byte1]: 34
3289 10:02:12.504881
3290 10:02:12.504987 Set Vref, RX VrefLevel [Byte0]: 35
3291 10:02:12.508234 [Byte1]: 35
3292 10:02:12.512544
3293 10:02:12.512640 Set Vref, RX VrefLevel [Byte0]: 36
3294 10:02:12.515820 [Byte1]: 36
3295 10:02:12.520464
3296 10:02:12.520555 Set Vref, RX VrefLevel [Byte0]: 37
3297 10:02:12.524392 [Byte1]: 37
3298 10:02:12.528677
3299 10:02:12.528787 Set Vref, RX VrefLevel [Byte0]: 38
3300 10:02:12.531643 [Byte1]: 38
3301 10:02:12.536589
3302 10:02:12.536673 Set Vref, RX VrefLevel [Byte0]: 39
3303 10:02:12.539745 [Byte1]: 39
3304 10:02:12.544163
3305 10:02:12.544244 Set Vref, RX VrefLevel [Byte0]: 40
3306 10:02:12.547519 [Byte1]: 40
3307 10:02:12.551622
3308 10:02:12.551705 Set Vref, RX VrefLevel [Byte0]: 41
3309 10:02:12.555199 [Byte1]: 41
3310 10:02:12.559597
3311 10:02:12.559680 Set Vref, RX VrefLevel [Byte0]: 42
3312 10:02:12.563176 [Byte1]: 42
3313 10:02:12.567604
3314 10:02:12.567691 Set Vref, RX VrefLevel [Byte0]: 43
3315 10:02:12.570733 [Byte1]: 43
3316 10:02:12.575474
3317 10:02:12.575557 Set Vref, RX VrefLevel [Byte0]: 44
3318 10:02:12.578828 [Byte1]: 44
3319 10:02:12.583374
3320 10:02:12.583457 Set Vref, RX VrefLevel [Byte0]: 45
3321 10:02:12.586423 [Byte1]: 45
3322 10:02:12.590953
3323 10:02:12.591044 Set Vref, RX VrefLevel [Byte0]: 46
3324 10:02:12.595005 [Byte1]: 46
3325 10:02:12.599178
3326 10:02:12.599264 Set Vref, RX VrefLevel [Byte0]: 47
3327 10:02:12.602038 [Byte1]: 47
3328 10:02:12.606513
3329 10:02:12.606604 Set Vref, RX VrefLevel [Byte0]: 48
3330 10:02:12.610384 [Byte1]: 48
3331 10:02:12.614834
3332 10:02:12.614957 Set Vref, RX VrefLevel [Byte0]: 49
3333 10:02:12.617751 [Byte1]: 49
3334 10:02:12.622345
3335 10:02:12.622443 Set Vref, RX VrefLevel [Byte0]: 50
3336 10:02:12.625604 [Byte1]: 50
3337 10:02:12.630320
3338 10:02:12.630409 Set Vref, RX VrefLevel [Byte0]: 51
3339 10:02:12.633615 [Byte1]: 51
3340 10:02:12.637996
3341 10:02:12.638085 Set Vref, RX VrefLevel [Byte0]: 52
3342 10:02:12.641678 [Byte1]: 52
3343 10:02:12.646210
3344 10:02:12.646296 Set Vref, RX VrefLevel [Byte0]: 53
3345 10:02:12.649151 [Byte1]: 53
3346 10:02:12.654454
3347 10:02:12.654553 Set Vref, RX VrefLevel [Byte0]: 54
3348 10:02:12.657083 [Byte1]: 54
3349 10:02:12.662130
3350 10:02:12.662217 Set Vref, RX VrefLevel [Byte0]: 55
3351 10:02:12.664736 [Byte1]: 55
3352 10:02:12.669842
3353 10:02:12.669935 Set Vref, RX VrefLevel [Byte0]: 56
3354 10:02:12.672782 [Byte1]: 56
3355 10:02:12.677216
3356 10:02:12.677330 Set Vref, RX VrefLevel [Byte0]: 57
3357 10:02:12.681020 [Byte1]: 57
3358 10:02:12.685342
3359 10:02:12.685425 Set Vref, RX VrefLevel [Byte0]: 58
3360 10:02:12.688767 [Byte1]: 58
3361 10:02:12.693099
3362 10:02:12.693182 Set Vref, RX VrefLevel [Byte0]: 59
3363 10:02:12.696746 [Byte1]: 59
3364 10:02:12.700940
3365 10:02:12.701025 Set Vref, RX VrefLevel [Byte0]: 60
3366 10:02:12.704396 [Byte1]: 60
3367 10:02:12.709175
3368 10:02:12.709269 Set Vref, RX VrefLevel [Byte0]: 61
3369 10:02:12.712160 [Byte1]: 61
3370 10:02:12.716665
3371 10:02:12.716783 Set Vref, RX VrefLevel [Byte0]: 62
3372 10:02:12.720316 [Byte1]: 62
3373 10:02:12.724452
3374 10:02:12.724541 Set Vref, RX VrefLevel [Byte0]: 63
3375 10:02:12.727627 [Byte1]: 63
3376 10:02:12.732470
3377 10:02:12.732587 Set Vref, RX VrefLevel [Byte0]: 64
3378 10:02:12.735599 [Byte1]: 64
3379 10:02:12.740016
3380 10:02:12.740102 Set Vref, RX VrefLevel [Byte0]: 65
3381 10:02:12.743723 [Byte1]: 65
3382 10:02:12.747847
3383 10:02:12.747933 Set Vref, RX VrefLevel [Byte0]: 66
3384 10:02:12.751257 [Byte1]: 66
3385 10:02:12.756554
3386 10:02:12.756641 Set Vref, RX VrefLevel [Byte0]: 67
3387 10:02:12.759186 [Byte1]: 67
3388 10:02:12.763719
3389 10:02:12.763803 Set Vref, RX VrefLevel [Byte0]: 68
3390 10:02:12.766779 [Byte1]: 68
3391 10:02:12.771653
3392 10:02:12.771739 Set Vref, RX VrefLevel [Byte0]: 69
3393 10:02:12.774750 [Byte1]: 69
3394 10:02:12.779858
3395 10:02:12.779946 Final RX Vref Byte 0 = 50 to rank0
3396 10:02:12.782745 Final RX Vref Byte 1 = 54 to rank0
3397 10:02:12.786099 Final RX Vref Byte 0 = 50 to rank1
3398 10:02:12.789505 Final RX Vref Byte 1 = 54 to rank1==
3399 10:02:12.792828 Dram Type= 6, Freq= 0, CH_1, rank 0
3400 10:02:12.799283 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3401 10:02:12.799382 ==
3402 10:02:12.799449 DQS Delay:
3403 10:02:12.799509 DQS0 = 0, DQS1 = 0
3404 10:02:12.802729 DQM Delay:
3405 10:02:12.802841 DQM0 = 119, DQM1 = 117
3406 10:02:12.806664 DQ Delay:
3407 10:02:12.809241 DQ0 =122, DQ1 =114, DQ2 =110, DQ3 =114
3408 10:02:12.812595 DQ4 =118, DQ5 =130, DQ6 =130, DQ7 =120
3409 10:02:12.816450 DQ8 =104, DQ9 =108, DQ10 =118, DQ11 =112
3410 10:02:12.819823 DQ12 =124, DQ13 =124, DQ14 =124, DQ15 =126
3411 10:02:12.819909
3412 10:02:12.819975
3413 10:02:12.826185 [DQSOSCAuto] RK0, (LSB)MR18= 0x113, (MSB)MR19= 0x404, tDQSOscB0 = 402 ps tDQSOscB1 = 409 ps
3414 10:02:12.829494 CH1 RK0: MR19=404, MR18=113
3415 10:02:12.836368 CH1_RK0: MR19=0x404, MR18=0x113, DQSOSC=402, MR23=63, INC=40, DEC=27
3416 10:02:12.836456
3417 10:02:12.839594 ----->DramcWriteLeveling(PI) begin...
3418 10:02:12.839681 ==
3419 10:02:12.842894 Dram Type= 6, Freq= 0, CH_1, rank 1
3420 10:02:12.846246 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3421 10:02:12.846332 ==
3422 10:02:12.849715 Write leveling (Byte 0): 26 => 26
3423 10:02:12.853271 Write leveling (Byte 1): 29 => 29
3424 10:02:12.856078 DramcWriteLeveling(PI) end<-----
3425 10:02:12.856165
3426 10:02:12.856231 ==
3427 10:02:12.859702 Dram Type= 6, Freq= 0, CH_1, rank 1
3428 10:02:12.862974 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3429 10:02:12.866547 ==
3430 10:02:12.866637 [Gating] SW mode calibration
3431 10:02:12.872827 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0
3432 10:02:12.879673 RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)
3433 10:02:12.883178 0 15 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3434 10:02:12.889838 0 15 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3435 10:02:12.893173 0 15 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3436 10:02:12.896506 0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3437 10:02:12.902960 0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3438 10:02:12.906635 0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 0) (1 1)
3439 10:02:12.909874 0 15 24 | B1->B0 | 2a2a 3333 | 1 0 | (1 0) (0 1)
3440 10:02:12.916287 0 15 28 | B1->B0 | 2323 2626 | 0 1 | (1 0) (1 0)
3441 10:02:12.919732 1 0 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3442 10:02:12.923460 1 0 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3443 10:02:12.926320 1 0 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3444 10:02:12.933037 1 0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3445 10:02:12.936514 1 0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3446 10:02:12.939920 1 0 20 | B1->B0 | 2828 2323 | 0 0 | (0 0) (0 0)
3447 10:02:12.946510 1 0 24 | B1->B0 | 3f3f 2828 | 1 0 | (0 0) (0 0)
3448 10:02:12.949789 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3449 10:02:12.953191 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3450 10:02:12.959517 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3451 10:02:12.962985 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3452 10:02:12.966585 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3453 10:02:12.972973 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3454 10:02:12.976233 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3455 10:02:12.979693 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 0)
3456 10:02:12.986017 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 1)
3457 10:02:12.989127 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3458 10:02:12.993206 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3459 10:02:12.999281 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3460 10:02:13.002718 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3461 10:02:13.006423 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3462 10:02:13.012475 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3463 10:02:13.015814 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3464 10:02:13.019452 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3465 10:02:13.025706 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3466 10:02:13.029103 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3467 10:02:13.032473 1 3 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3468 10:02:13.038992 1 3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3469 10:02:13.042667 1 3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3470 10:02:13.045542 1 3 20 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 1)
3471 10:02:13.053021 1 3 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)
3472 10:02:13.053143 Total UI for P1: 0, mck2ui 16
3473 10:02:13.059048 best dqsien dly found for B1: ( 1, 3, 20)
3474 10:02:13.062595 1 3 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)
3475 10:02:13.065482 1 4 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3476 10:02:13.068713 Total UI for P1: 0, mck2ui 16
3477 10:02:13.072373 best dqsien dly found for B0: ( 1, 3, 26)
3478 10:02:13.075574 best DQS0 dly(MCK, UI, PI) = (1, 3, 26)
3479 10:02:13.079350 best DQS1 dly(MCK, UI, PI) = (1, 3, 20)
3480 10:02:13.079442
3481 10:02:13.082299 best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 26)
3482 10:02:13.089182 best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 20)
3483 10:02:13.089288 [Gating] SW calibration Done
3484 10:02:13.089357 ==
3485 10:02:13.092332 Dram Type= 6, Freq= 0, CH_1, rank 1
3486 10:02:13.099179 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3487 10:02:13.099285 ==
3488 10:02:13.099354 RX Vref Scan: 0
3489 10:02:13.099416
3490 10:02:13.102157 RX Vref 0 -> 0, step: 1
3491 10:02:13.102246
3492 10:02:13.105529 RX Delay -40 -> 252, step: 8
3493 10:02:13.108755 iDelay=200, Bit 0, Center 127 (64 ~ 191) 128
3494 10:02:13.111947 iDelay=200, Bit 1, Center 115 (48 ~ 183) 136
3495 10:02:13.115413 iDelay=200, Bit 2, Center 111 (48 ~ 175) 128
3496 10:02:13.121970 iDelay=200, Bit 3, Center 119 (56 ~ 183) 128
3497 10:02:13.125411 iDelay=200, Bit 4, Center 119 (56 ~ 183) 128
3498 10:02:13.128576 iDelay=200, Bit 5, Center 131 (64 ~ 199) 136
3499 10:02:13.131857 iDelay=200, Bit 6, Center 131 (64 ~ 199) 136
3500 10:02:13.135347 iDelay=200, Bit 7, Center 119 (48 ~ 191) 144
3501 10:02:13.141983 iDelay=200, Bit 8, Center 103 (40 ~ 167) 128
3502 10:02:13.145332 iDelay=200, Bit 9, Center 107 (40 ~ 175) 136
3503 10:02:13.148796 iDelay=200, Bit 10, Center 115 (48 ~ 183) 136
3504 10:02:13.152457 iDelay=200, Bit 11, Center 111 (48 ~ 175) 128
3505 10:02:13.155581 iDelay=200, Bit 12, Center 127 (56 ~ 199) 144
3506 10:02:13.162275 iDelay=200, Bit 13, Center 127 (64 ~ 191) 128
3507 10:02:13.165456 iDelay=200, Bit 14, Center 123 (56 ~ 191) 136
3508 10:02:13.168404 iDelay=200, Bit 15, Center 123 (56 ~ 191) 136
3509 10:02:13.168499 ==
3510 10:02:13.171953 Dram Type= 6, Freq= 0, CH_1, rank 1
3511 10:02:13.175086 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3512 10:02:13.178503 ==
3513 10:02:13.178595 DQS Delay:
3514 10:02:13.178661 DQS0 = 0, DQS1 = 0
3515 10:02:13.181974 DQM Delay:
3516 10:02:13.182060 DQM0 = 121, DQM1 = 117
3517 10:02:13.185647 DQ Delay:
3518 10:02:13.188411 DQ0 =127, DQ1 =115, DQ2 =111, DQ3 =119
3519 10:02:13.192098 DQ4 =119, DQ5 =131, DQ6 =131, DQ7 =119
3520 10:02:13.195505 DQ8 =103, DQ9 =107, DQ10 =115, DQ11 =111
3521 10:02:13.198887 DQ12 =127, DQ13 =127, DQ14 =123, DQ15 =123
3522 10:02:13.198977
3523 10:02:13.199043
3524 10:02:13.199104 ==
3525 10:02:13.201983 Dram Type= 6, Freq= 0, CH_1, rank 1
3526 10:02:13.205308 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3527 10:02:13.205401 ==
3528 10:02:13.205468
3529 10:02:13.205545
3530 10:02:13.208600 TX Vref Scan disable
3531 10:02:13.211748 == TX Byte 0 ==
3532 10:02:13.215255 Update DQ dly =844 (3 ,2, 12) DQ OEN =(2 ,7)
3533 10:02:13.218702 Update DQM dly =844 (3 ,2, 12) DQM OEN =(2 ,7)
3534 10:02:13.221663 == TX Byte 1 ==
3535 10:02:13.224775 Update DQ dly =845 (3 ,2, 13) DQ OEN =(2 ,7)
3536 10:02:13.228962 Update DQM dly =845 (3 ,2, 13) DQM OEN =(2 ,7)
3537 10:02:13.229055 ==
3538 10:02:13.231603 Dram Type= 6, Freq= 0, CH_1, rank 1
3539 10:02:13.238757 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3540 10:02:13.238873 ==
3541 10:02:13.249202 TX Vref=22, minBit 9, minWin=25, winSum=420
3542 10:02:13.251952 TX Vref=24, minBit 0, minWin=26, winSum=422
3543 10:02:13.255492 TX Vref=26, minBit 2, minWin=26, winSum=430
3544 10:02:13.258822 TX Vref=28, minBit 9, minWin=26, winSum=434
3545 10:02:13.262128 TX Vref=30, minBit 9, minWin=26, winSum=436
3546 10:02:13.265498 TX Vref=32, minBit 9, minWin=26, winSum=436
3547 10:02:13.271951 [TxChooseVref] Worse bit 9, Min win 26, Win sum 436, Final Vref 30
3548 10:02:13.272056
3549 10:02:13.275030 Final TX Range 1 Vref 30
3550 10:02:13.275116
3551 10:02:13.275181 ==
3552 10:02:13.278487 Dram Type= 6, Freq= 0, CH_1, rank 1
3553 10:02:13.281831 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3554 10:02:13.281920 ==
3555 10:02:13.281986
3556 10:02:13.285066
3557 10:02:13.285149 TX Vref Scan disable
3558 10:02:13.288407 == TX Byte 0 ==
3559 10:02:13.292340 Update DQ dly =844 (3 ,2, 12) DQ OEN =(2 ,7)
3560 10:02:13.294968 Update DQM dly =844 (3 ,2, 12) DQM OEN =(2 ,7)
3561 10:02:13.299044 == TX Byte 1 ==
3562 10:02:13.301815 Update DQ dly =845 (3 ,2, 13) DQ OEN =(2 ,7)
3563 10:02:13.305566 Update DQM dly =845 (3 ,2, 13) DQM OEN =(2 ,7)
3564 10:02:13.305672
3565 10:02:13.308546 [DATLAT]
3566 10:02:13.308636 Freq=1200, CH1 RK1
3567 10:02:13.308703
3568 10:02:13.311984 DATLAT Default: 0xd
3569 10:02:13.312068 0, 0xFFFF, sum = 0
3570 10:02:13.315220 1, 0xFFFF, sum = 0
3571 10:02:13.315306 2, 0xFFFF, sum = 0
3572 10:02:13.318814 3, 0xFFFF, sum = 0
3573 10:02:13.318910 4, 0xFFFF, sum = 0
3574 10:02:13.321806 5, 0xFFFF, sum = 0
3575 10:02:13.321894 6, 0xFFFF, sum = 0
3576 10:02:13.325555 7, 0xFFFF, sum = 0
3577 10:02:13.328617 8, 0xFFFF, sum = 0
3578 10:02:13.328704 9, 0xFFFF, sum = 0
3579 10:02:13.332201 10, 0xFFFF, sum = 0
3580 10:02:13.332288 11, 0xFFFF, sum = 0
3581 10:02:13.335372 12, 0x0, sum = 1
3582 10:02:13.335458 13, 0x0, sum = 2
3583 10:02:13.338472 14, 0x0, sum = 3
3584 10:02:13.338558 15, 0x0, sum = 4
3585 10:02:13.338625 best_step = 13
3586 10:02:13.338688
3587 10:02:13.342139 ==
3588 10:02:13.342223 Dram Type= 6, Freq= 0, CH_1, rank 1
3589 10:02:13.348945 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3590 10:02:13.349038 ==
3591 10:02:13.349104 RX Vref Scan: 0
3592 10:02:13.349164
3593 10:02:13.352449 RX Vref 0 -> 0, step: 1
3594 10:02:13.352533
3595 10:02:13.355558 RX Delay -5 -> 252, step: 4
3596 10:02:13.358844 iDelay=195, Bit 0, Center 120 (59 ~ 182) 124
3597 10:02:13.361794 iDelay=195, Bit 1, Center 116 (55 ~ 178) 124
3598 10:02:13.368672 iDelay=195, Bit 2, Center 110 (51 ~ 170) 120
3599 10:02:13.371830 iDelay=195, Bit 3, Center 116 (55 ~ 178) 124
3600 10:02:13.375325 iDelay=195, Bit 4, Center 116 (55 ~ 178) 124
3601 10:02:13.378755 iDelay=195, Bit 5, Center 132 (71 ~ 194) 124
3602 10:02:13.381872 iDelay=195, Bit 6, Center 130 (67 ~ 194) 128
3603 10:02:13.388748 iDelay=195, Bit 7, Center 120 (59 ~ 182) 124
3604 10:02:13.392150 iDelay=195, Bit 8, Center 106 (47 ~ 166) 120
3605 10:02:13.395775 iDelay=195, Bit 9, Center 108 (47 ~ 170) 124
3606 10:02:13.398860 iDelay=195, Bit 10, Center 118 (59 ~ 178) 120
3607 10:02:13.402037 iDelay=195, Bit 11, Center 112 (51 ~ 174) 124
3608 10:02:13.408523 iDelay=195, Bit 12, Center 126 (63 ~ 190) 128
3609 10:02:13.411894 iDelay=195, Bit 13, Center 124 (67 ~ 182) 116
3610 10:02:13.415008 iDelay=195, Bit 14, Center 124 (67 ~ 182) 116
3611 10:02:13.418591 iDelay=195, Bit 15, Center 128 (67 ~ 190) 124
3612 10:02:13.418686 ==
3613 10:02:13.422015 Dram Type= 6, Freq= 0, CH_1, rank 1
3614 10:02:13.428479 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3615 10:02:13.428582 ==
3616 10:02:13.428650 DQS Delay:
3617 10:02:13.428712 DQS0 = 0, DQS1 = 0
3618 10:02:13.432068 DQM Delay:
3619 10:02:13.432154 DQM0 = 120, DQM1 = 118
3620 10:02:13.435407 DQ Delay:
3621 10:02:13.438551 DQ0 =120, DQ1 =116, DQ2 =110, DQ3 =116
3622 10:02:13.442132 DQ4 =116, DQ5 =132, DQ6 =130, DQ7 =120
3623 10:02:13.445689 DQ8 =106, DQ9 =108, DQ10 =118, DQ11 =112
3624 10:02:13.448435 DQ12 =126, DQ13 =124, DQ14 =124, DQ15 =128
3625 10:02:13.448522
3626 10:02:13.448588
3627 10:02:13.459619 [DQSOSCAuto] RK1, (LSB)MR18= 0x11ed, (MSB)MR19= 0x403, tDQSOscB0 = 417 ps tDQSOscB1 = 403 ps
3628 10:02:13.459741 CH1 RK1: MR19=403, MR18=11ED
3629 10:02:13.465263 CH1_RK1: MR19=0x403, MR18=0x11ED, DQSOSC=403, MR23=63, INC=40, DEC=26
3630 10:02:13.468663 [RxdqsGatingPostProcess] freq 1200
3631 10:02:13.475222 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
3632 10:02:13.478992 best DQS0 dly(2T, 0.5T) = (0, 11)
3633 10:02:13.482335 best DQS1 dly(2T, 0.5T) = (0, 11)
3634 10:02:13.485548 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3635 10:02:13.488526 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
3636 10:02:13.488613 best DQS0 dly(2T, 0.5T) = (0, 11)
3637 10:02:13.491798 best DQS1 dly(2T, 0.5T) = (0, 11)
3638 10:02:13.495235 best DQS0 P1 dly(2T, 0.5T) = (0, 15)
3639 10:02:13.499004 best DQS1 P1 dly(2T, 0.5T) = (0, 15)
3640 10:02:13.501864 Pre-setting of DQS Precalculation
3641 10:02:13.508923 [DualRankRxdatlatCal] RK0: 13, RK1: 13, Final_Datlat 13
3642 10:02:13.514994 sync_frequency_calibration_params sync calibration params of frequency 1200 to shu:2
3643 10:02:13.521811 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
3644 10:02:13.521921
3645 10:02:13.521988
3646 10:02:13.524925 [Calibration Summary] 2400 Mbps
3647 10:02:13.525011 CH 0, Rank 0
3648 10:02:13.528306 SW Impedance : PASS
3649 10:02:13.531587 DUTY Scan : NO K
3650 10:02:13.531674 ZQ Calibration : PASS
3651 10:02:13.535237 Jitter Meter : NO K
3652 10:02:13.538667 CBT Training : PASS
3653 10:02:13.538755 Write leveling : PASS
3654 10:02:13.541922 RX DQS gating : PASS
3655 10:02:13.545222 RX DQ/DQS(RDDQC) : PASS
3656 10:02:13.545310 TX DQ/DQS : PASS
3657 10:02:13.548409 RX DATLAT : PASS
3658 10:02:13.551524 RX DQ/DQS(Engine): PASS
3659 10:02:13.551629 TX OE : NO K
3660 10:02:13.551721 All Pass.
3661 10:02:13.555031
3662 10:02:13.555116 CH 0, Rank 1
3663 10:02:13.558320 SW Impedance : PASS
3664 10:02:13.558404 DUTY Scan : NO K
3665 10:02:13.561261 ZQ Calibration : PASS
3666 10:02:13.565104 Jitter Meter : NO K
3667 10:02:13.565191 CBT Training : PASS
3668 10:02:13.568131 Write leveling : PASS
3669 10:02:13.568217 RX DQS gating : PASS
3670 10:02:13.571605 RX DQ/DQS(RDDQC) : PASS
3671 10:02:13.574950 TX DQ/DQS : PASS
3672 10:02:13.575038 RX DATLAT : PASS
3673 10:02:13.578511 RX DQ/DQS(Engine): PASS
3674 10:02:13.581980 TX OE : NO K
3675 10:02:13.582066 All Pass.
3676 10:02:13.582132
3677 10:02:13.582193 CH 1, Rank 0
3678 10:02:13.584824 SW Impedance : PASS
3679 10:02:13.588201 DUTY Scan : NO K
3680 10:02:13.588285 ZQ Calibration : PASS
3681 10:02:13.591335 Jitter Meter : NO K
3682 10:02:13.595070 CBT Training : PASS
3683 10:02:13.595153 Write leveling : PASS
3684 10:02:13.597845 RX DQS gating : PASS
3685 10:02:13.601433 RX DQ/DQS(RDDQC) : PASS
3686 10:02:13.601517 TX DQ/DQS : PASS
3687 10:02:13.605212 RX DATLAT : PASS
3688 10:02:13.608022 RX DQ/DQS(Engine): PASS
3689 10:02:13.608143 TX OE : NO K
3690 10:02:13.608214 All Pass.
3691 10:02:13.611553
3692 10:02:13.611637 CH 1, Rank 1
3693 10:02:13.614539 SW Impedance : PASS
3694 10:02:13.614623 DUTY Scan : NO K
3695 10:02:13.617903 ZQ Calibration : PASS
3696 10:02:13.617987 Jitter Meter : NO K
3697 10:02:13.621310 CBT Training : PASS
3698 10:02:13.624520 Write leveling : PASS
3699 10:02:13.624603 RX DQS gating : PASS
3700 10:02:13.627902 RX DQ/DQS(RDDQC) : PASS
3701 10:02:13.631733 TX DQ/DQS : PASS
3702 10:02:13.631819 RX DATLAT : PASS
3703 10:02:13.635121 RX DQ/DQS(Engine): PASS
3704 10:02:13.637935 TX OE : NO K
3705 10:02:13.638019 All Pass.
3706 10:02:13.638086
3707 10:02:13.641527 DramC Write-DBI off
3708 10:02:13.641610 PER_BANK_REFRESH: Hybrid Mode
3709 10:02:13.644721 TX_TRACKING: ON
3710 10:02:13.651805 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 72, TRFC_05T 1, TXREFCNT 87, TRFCpb 30, TRFCpb_05T 1
3711 10:02:13.655010 [FAST_K] Save calibration result to emmc
3712 10:02:13.661446 dramc_set_vcore_voltage set vcore to 650000
3713 10:02:13.661532 Read voltage for 600, 5
3714 10:02:13.664864 Vio18 = 0
3715 10:02:13.664947 Vcore = 650000
3716 10:02:13.665013 Vdram = 0
3717 10:02:13.668541 Vddq = 0
3718 10:02:13.668624 Vmddr = 0
3719 10:02:13.671500 [FAST_K] DramcSave_Time_For_Cal_Init SHU4, femmc_Ready=0
3720 10:02:13.678245 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
3721 10:02:13.681073 MEM_TYPE=3, freq_sel=19
3722 10:02:13.684905 sv_algorithm_assistance_LP4_1600
3723 10:02:13.687660 ============ PULL DRAM RESETB DOWN ============
3724 10:02:13.691237 ========== PULL DRAM RESETB DOWN end =========
3725 10:02:13.694953 [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2
3726 10:02:13.698023 ===================================
3727 10:02:13.701385 LPDDR4 DRAM CONFIGURATION
3728 10:02:13.704917 ===================================
3729 10:02:13.707452 EX_ROW_EN[0] = 0x0
3730 10:02:13.707538 EX_ROW_EN[1] = 0x0
3731 10:02:13.711036 LP4Y_EN = 0x0
3732 10:02:13.711122 WORK_FSP = 0x0
3733 10:02:13.714609 WL = 0x2
3734 10:02:13.714692 RL = 0x2
3735 10:02:13.717459 BL = 0x2
3736 10:02:13.717543 RPST = 0x0
3737 10:02:13.720754 RD_PRE = 0x0
3738 10:02:13.724165 WR_PRE = 0x1
3739 10:02:13.724250 WR_PST = 0x0
3740 10:02:13.727717 DBI_WR = 0x0
3741 10:02:13.727802 DBI_RD = 0x0
3742 10:02:13.731556 OTF = 0x1
3743 10:02:13.734406 ===================================
3744 10:02:13.738037 ===================================
3745 10:02:13.738123 ANA top config
3746 10:02:13.741319 ===================================
3747 10:02:13.744254 DLL_ASYNC_EN = 0
3748 10:02:13.747335 ALL_SLAVE_EN = 1
3749 10:02:13.747419 NEW_RANK_MODE = 1
3750 10:02:13.750675 DLL_IDLE_MODE = 1
3751 10:02:13.753825 LP45_APHY_COMB_EN = 1
3752 10:02:13.757382 TX_ODT_DIS = 1
3753 10:02:13.757470 NEW_8X_MODE = 1
3754 10:02:13.760698 ===================================
3755 10:02:13.763780 ===================================
3756 10:02:13.767238 data_rate = 1200
3757 10:02:13.771179 CKR = 1
3758 10:02:13.773539 DQ_P2S_RATIO = 8
3759 10:02:13.776819 ===================================
3760 10:02:13.780393 CA_P2S_RATIO = 8
3761 10:02:13.783681 DQ_CA_OPEN = 0
3762 10:02:13.786780 DQ_SEMI_OPEN = 0
3763 10:02:13.786867 CA_SEMI_OPEN = 0
3764 10:02:13.790391 CA_FULL_RATE = 0
3765 10:02:13.793799 DQ_CKDIV4_EN = 1
3766 10:02:13.796751 CA_CKDIV4_EN = 1
3767 10:02:13.800606 CA_PREDIV_EN = 0
3768 10:02:13.804366 PH8_DLY = 0
3769 10:02:13.804458 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
3770 10:02:13.807365 DQ_AAMCK_DIV = 4
3771 10:02:13.810291 CA_AAMCK_DIV = 4
3772 10:02:13.813756 CA_ADMCK_DIV = 4
3773 10:02:13.817000 DQ_TRACK_CA_EN = 0
3774 10:02:13.820399 CA_PICK = 600
3775 10:02:13.820518 CA_MCKIO = 600
3776 10:02:13.823896 MCKIO_SEMI = 0
3777 10:02:13.827300 PLL_FREQ = 2288
3778 10:02:13.830585 DQ_UI_PI_RATIO = 32
3779 10:02:13.833935 CA_UI_PI_RATIO = 0
3780 10:02:13.837639 ===================================
3781 10:02:13.840482 ===================================
3782 10:02:13.843864 memory_type:LPDDR4
3783 10:02:13.843949 GP_NUM : 10
3784 10:02:13.846730 SRAM_EN : 1
3785 10:02:13.846814 MD32_EN : 0
3786 10:02:13.849959 ===================================
3787 10:02:13.853538 [ANA_INIT] >>>>>>>>>>>>>>
3788 10:02:13.856797 <<<<<< [CONFIGURE PHASE]: ANA_TX
3789 10:02:13.860118 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
3790 10:02:13.863570 ===================================
3791 10:02:13.866649 data_rate = 1200,PCW = 0X5800
3792 10:02:13.870164 ===================================
3793 10:02:13.873935 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
3794 10:02:13.876586 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
3795 10:02:13.883617 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
3796 10:02:13.890124 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
3797 10:02:13.893682 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
3798 10:02:13.897187 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
3799 10:02:13.897274 [ANA_INIT] flow start
3800 10:02:13.899966 [ANA_INIT] PLL >>>>>>>>
3801 10:02:13.903622 [ANA_INIT] PLL <<<<<<<<
3802 10:02:13.903710 [ANA_INIT] MIDPI >>>>>>>>
3803 10:02:13.906653 [ANA_INIT] MIDPI <<<<<<<<
3804 10:02:13.910310 [ANA_INIT] DLL >>>>>>>>
3805 10:02:13.910398 [ANA_INIT] flow end
3806 10:02:13.913466 ============ LP4 DIFF to SE enter ============
3807 10:02:13.920323 ============ LP4 DIFF to SE exit ============
3808 10:02:13.920420 [ANA_INIT] <<<<<<<<<<<<<
3809 10:02:13.923505 [Flow] Enable top DCM control >>>>>
3810 10:02:13.926714 [Flow] Enable top DCM control <<<<<
3811 10:02:13.930134 Enable DLL master slave shuffle
3812 10:02:13.937410 ==============================================================
3813 10:02:13.937508 Gating Mode config
3814 10:02:13.943350 ==============================================================
3815 10:02:13.946641 Config description:
3816 10:02:13.956477 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
3817 10:02:13.963316 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
3818 10:02:13.967016 SELPH_MODE 0: By rank 1: By Phase
3819 10:02:13.973672 ==============================================================
3820 10:02:13.976682 GAT_TRACK_EN = 1
3821 10:02:13.976777 RX_GATING_MODE = 2
3822 10:02:13.980317 RX_GATING_TRACK_MODE = 2
3823 10:02:13.983630 SELPH_MODE = 1
3824 10:02:13.986871 PICG_EARLY_EN = 1
3825 10:02:13.990005 VALID_LAT_VALUE = 1
3826 10:02:13.996679 ==============================================================
3827 10:02:14.000516 Enter into Gating configuration >>>>
3828 10:02:14.003261 Exit from Gating configuration <<<<
3829 10:02:14.007024 Enter into DVFS_PRE_config >>>>>
3830 10:02:14.017461 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
3831 10:02:14.020107 Exit from DVFS_PRE_config <<<<<
3832 10:02:14.023656 Enter into PICG configuration >>>>
3833 10:02:14.027155 Exit from PICG configuration <<<<
3834 10:02:14.029933 [RX_INPUT] configuration >>>>>
3835 10:02:14.030021 [RX_INPUT] configuration <<<<<
3836 10:02:14.037323 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
3837 10:02:14.043312 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
3838 10:02:14.046904 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
3839 10:02:14.053664 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
3840 10:02:14.060164 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
3841 10:02:14.066860 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
3842 10:02:14.070072 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
3843 10:02:14.073200 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
3844 10:02:14.079789 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
3845 10:02:14.083290 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
3846 10:02:14.086920 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
3847 10:02:14.093825 [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2
3848 10:02:14.096799 ===================================
3849 10:02:14.096924 LPDDR4 DRAM CONFIGURATION
3850 10:02:14.100171 ===================================
3851 10:02:14.103317 EX_ROW_EN[0] = 0x0
3852 10:02:14.103415 EX_ROW_EN[1] = 0x0
3853 10:02:14.106985 LP4Y_EN = 0x0
3854 10:02:14.107069 WORK_FSP = 0x0
3855 10:02:14.110710 WL = 0x2
3856 10:02:14.113868 RL = 0x2
3857 10:02:14.113953 BL = 0x2
3858 10:02:14.116918 RPST = 0x0
3859 10:02:14.117000 RD_PRE = 0x0
3860 10:02:14.119995 WR_PRE = 0x1
3861 10:02:14.120078 WR_PST = 0x0
3862 10:02:14.123267 DBI_WR = 0x0
3863 10:02:14.123350 DBI_RD = 0x0
3864 10:02:14.126479 OTF = 0x1
3865 10:02:14.130216 ===================================
3866 10:02:14.133469 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
3867 10:02:14.136828 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
3868 10:02:14.140192 [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2
3869 10:02:14.143844 ===================================
3870 10:02:14.146626 LPDDR4 DRAM CONFIGURATION
3871 10:02:14.150154 ===================================
3872 10:02:14.153427 EX_ROW_EN[0] = 0x10
3873 10:02:14.153512 EX_ROW_EN[1] = 0x0
3874 10:02:14.156765 LP4Y_EN = 0x0
3875 10:02:14.156894 WORK_FSP = 0x0
3876 10:02:14.160625 WL = 0x2
3877 10:02:14.160709 RL = 0x2
3878 10:02:14.163196 BL = 0x2
3879 10:02:14.163278 RPST = 0x0
3880 10:02:14.166611 RD_PRE = 0x0
3881 10:02:14.166694 WR_PRE = 0x1
3882 10:02:14.169956 WR_PST = 0x0
3883 10:02:14.170040 DBI_WR = 0x0
3884 10:02:14.173525 DBI_RD = 0x0
3885 10:02:14.173608 OTF = 0x1
3886 10:02:14.176957 ===================================
3887 10:02:14.183221 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
3888 10:02:14.188191 nWR fixed to 30
3889 10:02:14.191699 [ModeRegInit_LP4] CH0 RK0
3890 10:02:14.191784 [ModeRegInit_LP4] CH0 RK1
3891 10:02:14.194970 [ModeRegInit_LP4] CH1 RK0
3892 10:02:14.198508 [ModeRegInit_LP4] CH1 RK1
3893 10:02:14.198592 match AC timing 17
3894 10:02:14.204795 dramType 5, freq 600, readDBI 0, DivMode 1, cbtMode 1
3895 10:02:14.208165 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3896 10:02:14.211961 [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8
3897 10:02:14.218369 [TX_path_calculate] data rate=1200, WL=8, DQS_TotalUI=17
3898 10:02:14.221861 [TX_path_calculate] DQS = (2,1) DQS_OE = (1,6)
3899 10:02:14.221957 ==
3900 10:02:14.224944 Dram Type= 6, Freq= 0, CH_0, rank 0
3901 10:02:14.228697 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3902 10:02:14.228790 ==
3903 10:02:14.235339 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3904 10:02:14.241452 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
3905 10:02:14.244793 [CA 0] Center 35 (5~66) winsize 62
3906 10:02:14.247985 [CA 1] Center 36 (5~67) winsize 63
3907 10:02:14.251736 [CA 2] Center 33 (3~64) winsize 62
3908 10:02:14.254851 [CA 3] Center 33 (2~64) winsize 63
3909 10:02:14.257924 [CA 4] Center 33 (2~64) winsize 63
3910 10:02:14.261991 [CA 5] Center 32 (2~63) winsize 62
3911 10:02:14.262080
3912 10:02:14.264512 [CmdBusTrainingLP45] Vref(ca) range 1: 35
3913 10:02:14.264598
3914 10:02:14.268575 [CATrainingPosCal] consider 1 rank data
3915 10:02:14.271520 u2DelayCellTimex100 = 270/100 ps
3916 10:02:14.274483 CA0 delay=35 (5~66),Diff = 3 PI (28 cell)
3917 10:02:14.277837 CA1 delay=36 (5~67),Diff = 4 PI (38 cell)
3918 10:02:14.281230 CA2 delay=33 (3~64),Diff = 1 PI (9 cell)
3919 10:02:14.284988 CA3 delay=33 (2~64),Diff = 1 PI (9 cell)
3920 10:02:14.287714 CA4 delay=33 (2~64),Diff = 1 PI (9 cell)
3921 10:02:14.291648 CA5 delay=32 (2~63),Diff = 0 PI (0 cell)
3922 10:02:14.294486
3923 10:02:14.298642 CA PerBit enable=1, Macro0, CA PI delay=32
3924 10:02:14.298730
3925 10:02:14.300907 [CBTSetCACLKResult] CA Dly = 32
3926 10:02:14.301016 CS Dly: 5 (0~36)
3927 10:02:14.301119 ==
3928 10:02:14.304170 Dram Type= 6, Freq= 0, CH_0, rank 1
3929 10:02:14.307610 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3930 10:02:14.307697 ==
3931 10:02:14.314796 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
3932 10:02:14.321179 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
3933 10:02:14.324420 [CA 0] Center 35 (5~66) winsize 62
3934 10:02:14.327729 [CA 1] Center 35 (5~66) winsize 62
3935 10:02:14.330983 [CA 2] Center 34 (3~65) winsize 63
3936 10:02:14.334815 [CA 3] Center 33 (3~64) winsize 62
3937 10:02:14.338030 [CA 4] Center 33 (2~64) winsize 63
3938 10:02:14.341708 [CA 5] Center 32 (2~63) winsize 62
3939 10:02:14.341795
3940 10:02:14.344280 [CmdBusTrainingLP45] Vref(ca) range 1: 35
3941 10:02:14.344365
3942 10:02:14.348040 [CATrainingPosCal] consider 2 rank data
3943 10:02:14.351262 u2DelayCellTimex100 = 270/100 ps
3944 10:02:14.354951 CA0 delay=35 (5~66),Diff = 3 PI (28 cell)
3945 10:02:14.357602 CA1 delay=35 (5~66),Diff = 3 PI (28 cell)
3946 10:02:14.361050 CA2 delay=33 (3~64),Diff = 1 PI (9 cell)
3947 10:02:14.364163 CA3 delay=33 (3~64),Diff = 1 PI (9 cell)
3948 10:02:14.371100 CA4 delay=33 (2~64),Diff = 1 PI (9 cell)
3949 10:02:14.374290 CA5 delay=32 (2~63),Diff = 0 PI (0 cell)
3950 10:02:14.374378
3951 10:02:14.377435 CA PerBit enable=1, Macro0, CA PI delay=32
3952 10:02:14.377520
3953 10:02:14.381142 [CBTSetCACLKResult] CA Dly = 32
3954 10:02:14.381228 CS Dly: 4 (0~35)
3955 10:02:14.381295
3956 10:02:14.384526 ----->DramcWriteLeveling(PI) begin...
3957 10:02:14.384612 ==
3958 10:02:14.387404 Dram Type= 6, Freq= 0, CH_0, rank 0
3959 10:02:14.394588 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3960 10:02:14.394679 ==
3961 10:02:14.397568 Write leveling (Byte 0): 36 => 36
3962 10:02:14.397656 Write leveling (Byte 1): 33 => 33
3963 10:02:14.400946 DramcWriteLeveling(PI) end<-----
3964 10:02:14.401033
3965 10:02:14.404157 ==
3966 10:02:14.404243 Dram Type= 6, Freq= 0, CH_0, rank 0
3967 10:02:14.411057 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
3968 10:02:14.411166 ==
3969 10:02:14.414862 [Gating] SW mode calibration
3970 10:02:14.421008 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
3971 10:02:14.424489 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
3972 10:02:14.431300 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3973 10:02:14.434460 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3974 10:02:14.437354 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
3975 10:02:14.440961 0 9 12 | B1->B0 | 3434 2f2f | 1 0 | (1 1) (0 0)
3976 10:02:14.447568 0 9 16 | B1->B0 | 2f2f 2323 | 0 0 | (1 0) (0 0)
3977 10:02:14.450696 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3978 10:02:14.454386 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3979 10:02:14.461054 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3980 10:02:14.464281 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3981 10:02:14.467910 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3982 10:02:14.474221 0 10 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
3983 10:02:14.477589 0 10 12 | B1->B0 | 2323 3434 | 0 0 | (0 0) (0 0)
3984 10:02:14.480657 0 10 16 | B1->B0 | 3333 4646 | 0 0 | (0 0) (0 0)
3985 10:02:14.487827 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3986 10:02:14.490823 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3987 10:02:14.494377 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3988 10:02:14.500787 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3989 10:02:14.504005 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3990 10:02:14.507374 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
3991 10:02:14.514689 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
3992 10:02:14.517731 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3993 10:02:14.520845 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3994 10:02:14.527298 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3995 10:02:14.530952 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3996 10:02:14.533954 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3997 10:02:14.540709 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3998 10:02:14.544054 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
3999 10:02:14.547057 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4000 10:02:14.554215 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4001 10:02:14.557164 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4002 10:02:14.560630 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4003 10:02:14.567262 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4004 10:02:14.570770 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4005 10:02:14.573993 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4006 10:02:14.580388 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4007 10:02:14.583572 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 0)
4008 10:02:14.587065 Total UI for P1: 0, mck2ui 16
4009 10:02:14.590384 best dqsien dly found for B0: ( 0, 13, 10)
4010 10:02:14.593942 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
4011 10:02:14.597160 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4012 10:02:14.600664 Total UI for P1: 0, mck2ui 16
4013 10:02:14.603428 best dqsien dly found for B1: ( 0, 13, 16)
4014 10:02:14.607273 best DQS0 dly(MCK, UI, PI) = (0, 13, 10)
4015 10:02:14.614087 best DQS1 dly(MCK, UI, PI) = (0, 13, 16)
4016 10:02:14.614195
4017 10:02:14.617418 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 10)
4018 10:02:14.620478 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 16)
4019 10:02:14.624151 [Gating] SW calibration Done
4020 10:02:14.624238 ==
4021 10:02:14.626908 Dram Type= 6, Freq= 0, CH_0, rank 0
4022 10:02:14.630474 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4023 10:02:14.630559 ==
4024 10:02:14.630626 RX Vref Scan: 0
4025 10:02:14.630687
4026 10:02:14.634269 RX Vref 0 -> 0, step: 1
4027 10:02:14.634352
4028 10:02:14.637326 RX Delay -230 -> 252, step: 16
4029 10:02:14.640490 iDelay=218, Bit 0, Center 49 (-102 ~ 201) 304
4030 10:02:14.643782 iDelay=218, Bit 1, Center 57 (-102 ~ 217) 320
4031 10:02:14.650421 iDelay=218, Bit 2, Center 49 (-102 ~ 201) 304
4032 10:02:14.653960 iDelay=218, Bit 3, Center 49 (-102 ~ 201) 304
4033 10:02:14.657152 iDelay=218, Bit 4, Center 49 (-102 ~ 201) 304
4034 10:02:14.660521 iDelay=218, Bit 5, Center 41 (-118 ~ 201) 320
4035 10:02:14.667027 iDelay=218, Bit 6, Center 57 (-102 ~ 217) 320
4036 10:02:14.670272 iDelay=218, Bit 7, Center 57 (-102 ~ 217) 320
4037 10:02:14.673998 iDelay=218, Bit 8, Center 33 (-118 ~ 185) 304
4038 10:02:14.677146 iDelay=218, Bit 9, Center 33 (-118 ~ 185) 304
4039 10:02:14.680762 iDelay=218, Bit 10, Center 49 (-102 ~ 201) 304
4040 10:02:14.687144 iDelay=218, Bit 11, Center 41 (-118 ~ 201) 320
4041 10:02:14.690880 iDelay=218, Bit 12, Center 49 (-102 ~ 201) 304
4042 10:02:14.693628 iDelay=218, Bit 13, Center 49 (-102 ~ 201) 304
4043 10:02:14.697326 iDelay=218, Bit 14, Center 57 (-102 ~ 217) 320
4044 10:02:14.704540 iDelay=218, Bit 15, Center 57 (-102 ~ 217) 320
4045 10:02:14.704640 ==
4046 10:02:14.707230 Dram Type= 6, Freq= 0, CH_0, rank 0
4047 10:02:14.710655 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4048 10:02:14.710749 ==
4049 10:02:14.710817 DQS Delay:
4050 10:02:14.714038 DQS0 = 0, DQS1 = 0
4051 10:02:14.714160 DQM Delay:
4052 10:02:14.716774 DQM0 = 51, DQM1 = 46
4053 10:02:14.716893 DQ Delay:
4054 10:02:14.720317 DQ0 =49, DQ1 =57, DQ2 =49, DQ3 =49
4055 10:02:14.723949 DQ4 =49, DQ5 =41, DQ6 =57, DQ7 =57
4056 10:02:14.726794 DQ8 =33, DQ9 =33, DQ10 =49, DQ11 =41
4057 10:02:14.729995 DQ12 =49, DQ13 =49, DQ14 =57, DQ15 =57
4058 10:02:14.730078
4059 10:02:14.730143
4060 10:02:14.730203 ==
4061 10:02:14.733318 Dram Type= 6, Freq= 0, CH_0, rank 0
4062 10:02:14.736611 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4063 10:02:14.740309 ==
4064 10:02:14.740392
4065 10:02:14.740457
4066 10:02:14.740516 TX Vref Scan disable
4067 10:02:14.743743 == TX Byte 0 ==
4068 10:02:14.746730 Update DQ dly =581 (2 ,1, 37) DQ OEN =(1 ,6)
4069 10:02:14.750553 Update DQM dly =581 (2 ,1, 37) DQM OEN =(1 ,6)
4070 10:02:14.754049 == TX Byte 1 ==
4071 10:02:14.756782 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
4072 10:02:14.760413 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
4073 10:02:14.763494 ==
4074 10:02:14.763577 Dram Type= 6, Freq= 0, CH_0, rank 0
4075 10:02:14.770325 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4076 10:02:14.770410 ==
4077 10:02:14.770474
4078 10:02:14.770533
4079 10:02:14.773167 TX Vref Scan disable
4080 10:02:14.773249 == TX Byte 0 ==
4081 10:02:14.779786 Update DQ dly =581 (2 ,1, 37) DQ OEN =(1 ,6)
4082 10:02:14.783311 Update DQM dly =581 (2 ,1, 37) DQM OEN =(1 ,6)
4083 10:02:14.783393 == TX Byte 1 ==
4084 10:02:14.789856 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
4085 10:02:14.793210 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
4086 10:02:14.793293
4087 10:02:14.793357 [DATLAT]
4088 10:02:14.796661 Freq=600, CH0 RK0
4089 10:02:14.796744
4090 10:02:14.796833 DATLAT Default: 0x9
4091 10:02:14.799935 0, 0xFFFF, sum = 0
4092 10:02:14.800017 1, 0xFFFF, sum = 0
4093 10:02:14.803258 2, 0xFFFF, sum = 0
4094 10:02:14.803341 3, 0xFFFF, sum = 0
4095 10:02:14.806656 4, 0xFFFF, sum = 0
4096 10:02:14.806741 5, 0xFFFF, sum = 0
4097 10:02:14.810245 6, 0xFFFF, sum = 0
4098 10:02:14.813260 7, 0xFFFF, sum = 0
4099 10:02:14.813343 8, 0x0, sum = 1
4100 10:02:14.813409 9, 0x0, sum = 2
4101 10:02:14.816539 10, 0x0, sum = 3
4102 10:02:14.816622 11, 0x0, sum = 4
4103 10:02:14.820164 best_step = 9
4104 10:02:14.820261
4105 10:02:14.820330 ==
4106 10:02:14.823150 Dram Type= 6, Freq= 0, CH_0, rank 0
4107 10:02:14.826400 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4108 10:02:14.826505 ==
4109 10:02:14.829704 RX Vref Scan: 1
4110 10:02:14.829786
4111 10:02:14.829849 RX Vref 0 -> 0, step: 1
4112 10:02:14.829907
4113 10:02:14.833097 RX Delay -163 -> 252, step: 8
4114 10:02:14.833179
4115 10:02:14.837143 Set Vref, RX VrefLevel [Byte0]: 53
4116 10:02:14.839563 [Byte1]: 54
4117 10:02:14.843927
4118 10:02:14.844010 Final RX Vref Byte 0 = 53 to rank0
4119 10:02:14.847116 Final RX Vref Byte 1 = 54 to rank0
4120 10:02:14.850391 Final RX Vref Byte 0 = 53 to rank1
4121 10:02:14.853964 Final RX Vref Byte 1 = 54 to rank1==
4122 10:02:14.857450 Dram Type= 6, Freq= 0, CH_0, rank 0
4123 10:02:14.863942 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4124 10:02:14.864028 ==
4125 10:02:14.864094 DQS Delay:
4126 10:02:14.864154 DQS0 = 0, DQS1 = 0
4127 10:02:14.866967 DQM Delay:
4128 10:02:14.867049 DQM0 = 52, DQM1 = 46
4129 10:02:14.870267 DQ Delay:
4130 10:02:14.873492 DQ0 =52, DQ1 =52, DQ2 =48, DQ3 =52
4131 10:02:14.873576 DQ4 =56, DQ5 =44, DQ6 =60, DQ7 =56
4132 10:02:14.877277 DQ8 =36, DQ9 =36, DQ10 =48, DQ11 =40
4133 10:02:14.883745 DQ12 =52, DQ13 =52, DQ14 =56, DQ15 =52
4134 10:02:14.883834
4135 10:02:14.883899
4136 10:02:14.890296 [DQSOSCAuto] RK0, (LSB)MR18= 0x6e60, (MSB)MR19= 0x808, tDQSOscB0 = 391 ps tDQSOscB1 = 389 ps
4137 10:02:14.893575 CH0 RK0: MR19=808, MR18=6E60
4138 10:02:14.900324 CH0_RK0: MR19=0x808, MR18=0x6E60, DQSOSC=389, MR23=63, INC=173, DEC=115
4139 10:02:14.900478
4140 10:02:14.903321 ----->DramcWriteLeveling(PI) begin...
4141 10:02:14.903406 ==
4142 10:02:14.907035 Dram Type= 6, Freq= 0, CH_0, rank 1
4143 10:02:14.910224 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4144 10:02:14.910341 ==
4145 10:02:14.913446 Write leveling (Byte 0): 35 => 35
4146 10:02:14.917096 Write leveling (Byte 1): 33 => 33
4147 10:02:14.920110 DramcWriteLeveling(PI) end<-----
4148 10:02:14.920195
4149 10:02:14.920259 ==
4150 10:02:14.923480 Dram Type= 6, Freq= 0, CH_0, rank 1
4151 10:02:14.926751 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4152 10:02:14.926837 ==
4153 10:02:14.930640 [Gating] SW mode calibration
4154 10:02:14.936696 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
4155 10:02:14.943766 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
4156 10:02:14.946708 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4157 10:02:14.949937 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4158 10:02:14.956632 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4159 10:02:14.960717 0 9 12 | B1->B0 | 3434 3333 | 0 1 | (0 0) (1 0)
4160 10:02:14.963395 0 9 16 | B1->B0 | 2d2d 2626 | 0 0 | (0 0) (0 0)
4161 10:02:14.970136 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4162 10:02:14.973622 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4163 10:02:14.976739 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4164 10:02:14.983566 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4165 10:02:14.986993 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4166 10:02:14.989934 0 10 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4167 10:02:14.996846 0 10 12 | B1->B0 | 2727 2929 | 0 0 | (0 0) (0 0)
4168 10:02:15.000103 0 10 16 | B1->B0 | 3e3e 3f3f | 0 0 | (0 0) (0 0)
4169 10:02:15.003369 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4170 10:02:15.009778 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4171 10:02:15.013293 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4172 10:02:15.016619 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4173 10:02:15.023197 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4174 10:02:15.027394 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
4175 10:02:15.030079 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4176 10:02:15.036808 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4177 10:02:15.039682 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4178 10:02:15.043216 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4179 10:02:15.049899 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4180 10:02:15.053246 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4181 10:02:15.056687 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4182 10:02:15.060003 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4183 10:02:15.066173 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4184 10:02:15.069862 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4185 10:02:15.072983 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4186 10:02:15.079531 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4187 10:02:15.082993 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4188 10:02:15.086635 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4189 10:02:15.093187 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4190 10:02:15.096461 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4191 10:02:15.099876 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
4192 10:02:15.106416 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
4193 10:02:15.106514 Total UI for P1: 0, mck2ui 16
4194 10:02:15.113241 best dqsien dly found for B0: ( 0, 13, 12)
4195 10:02:15.116735 0 13 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4196 10:02:15.119956 Total UI for P1: 0, mck2ui 16
4197 10:02:15.123562 best dqsien dly found for B1: ( 0, 13, 16)
4198 10:02:15.126747 best DQS0 dly(MCK, UI, PI) = (0, 13, 12)
4199 10:02:15.129910 best DQS1 dly(MCK, UI, PI) = (0, 13, 16)
4200 10:02:15.129998
4201 10:02:15.133066 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 12)
4202 10:02:15.136616 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 16)
4203 10:02:15.140134 [Gating] SW calibration Done
4204 10:02:15.140216 ==
4205 10:02:15.143345 Dram Type= 6, Freq= 0, CH_0, rank 1
4206 10:02:15.146760 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4207 10:02:15.149634 ==
4208 10:02:15.149715 RX Vref Scan: 0
4209 10:02:15.149780
4210 10:02:15.153353 RX Vref 0 -> 0, step: 1
4211 10:02:15.153436
4212 10:02:15.156161 RX Delay -230 -> 252, step: 16
4213 10:02:15.159594 iDelay=218, Bit 0, Center 49 (-102 ~ 201) 304
4214 10:02:15.163135 iDelay=218, Bit 1, Center 49 (-102 ~ 201) 304
4215 10:02:15.166344 iDelay=218, Bit 2, Center 49 (-102 ~ 201) 304
4216 10:02:15.173484 iDelay=218, Bit 3, Center 49 (-102 ~ 201) 304
4217 10:02:15.176480 iDelay=218, Bit 4, Center 57 (-102 ~ 217) 320
4218 10:02:15.180367 iDelay=218, Bit 5, Center 41 (-118 ~ 201) 320
4219 10:02:15.182904 iDelay=218, Bit 6, Center 65 (-86 ~ 217) 304
4220 10:02:15.186795 iDelay=218, Bit 7, Center 65 (-86 ~ 217) 304
4221 10:02:15.193600 iDelay=218, Bit 8, Center 33 (-118 ~ 185) 304
4222 10:02:15.196136 iDelay=218, Bit 9, Center 25 (-134 ~ 185) 320
4223 10:02:15.199572 iDelay=218, Bit 10, Center 49 (-102 ~ 201) 304
4224 10:02:15.203202 iDelay=218, Bit 11, Center 33 (-118 ~ 185) 304
4225 10:02:15.210017 iDelay=218, Bit 12, Center 49 (-102 ~ 201) 304
4226 10:02:15.212724 iDelay=218, Bit 13, Center 49 (-102 ~ 201) 304
4227 10:02:15.216250 iDelay=218, Bit 14, Center 65 (-86 ~ 217) 304
4228 10:02:15.219233 iDelay=218, Bit 15, Center 49 (-102 ~ 201) 304
4229 10:02:15.219343 ==
4230 10:02:15.223032 Dram Type= 6, Freq= 0, CH_0, rank 1
4231 10:02:15.229861 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4232 10:02:15.229945 ==
4233 10:02:15.230010 DQS Delay:
4234 10:02:15.230070 DQS0 = 0, DQS1 = 0
4235 10:02:15.232916 DQM Delay:
4236 10:02:15.233008 DQM0 = 53, DQM1 = 44
4237 10:02:15.236380 DQ Delay:
4238 10:02:15.239647 DQ0 =49, DQ1 =49, DQ2 =49, DQ3 =49
4239 10:02:15.239812 DQ4 =57, DQ5 =41, DQ6 =65, DQ7 =65
4240 10:02:15.243088 DQ8 =33, DQ9 =25, DQ10 =49, DQ11 =33
4241 10:02:15.246118 DQ12 =49, DQ13 =49, DQ14 =65, DQ15 =49
4242 10:02:15.249489
4243 10:02:15.249607
4244 10:02:15.249678 ==
4245 10:02:15.253033 Dram Type= 6, Freq= 0, CH_0, rank 1
4246 10:02:15.256293 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4247 10:02:15.256413 ==
4248 10:02:15.256480
4249 10:02:15.256540
4250 10:02:15.259525 TX Vref Scan disable
4251 10:02:15.259612 == TX Byte 0 ==
4252 10:02:15.266225 Update DQ dly =581 (2 ,1, 37) DQ OEN =(1 ,6)
4253 10:02:15.269528 Update DQM dly =581 (2 ,1, 37) DQM OEN =(1 ,6)
4254 10:02:15.269690 == TX Byte 1 ==
4255 10:02:15.275955 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
4256 10:02:15.279120 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
4257 10:02:15.279224 ==
4258 10:02:15.282552 Dram Type= 6, Freq= 0, CH_0, rank 1
4259 10:02:15.286104 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4260 10:02:15.286188 ==
4261 10:02:15.286252
4262 10:02:15.286311
4263 10:02:15.289745 TX Vref Scan disable
4264 10:02:15.293123 == TX Byte 0 ==
4265 10:02:15.296079 Update DQ dly =580 (2 ,1, 36) DQ OEN =(1 ,6)
4266 10:02:15.299573 Update DQM dly =580 (2 ,1, 36) DQM OEN =(1 ,6)
4267 10:02:15.302749 == TX Byte 1 ==
4268 10:02:15.306066 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
4269 10:02:15.310167 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
4270 10:02:15.310270
4271 10:02:15.313015 [DATLAT]
4272 10:02:15.313111 Freq=600, CH0 RK1
4273 10:02:15.313177
4274 10:02:15.316359 DATLAT Default: 0x9
4275 10:02:15.316443 0, 0xFFFF, sum = 0
4276 10:02:15.319426 1, 0xFFFF, sum = 0
4277 10:02:15.319517 2, 0xFFFF, sum = 0
4278 10:02:15.322464 3, 0xFFFF, sum = 0
4279 10:02:15.322548 4, 0xFFFF, sum = 0
4280 10:02:15.325975 5, 0xFFFF, sum = 0
4281 10:02:15.329308 6, 0xFFFF, sum = 0
4282 10:02:15.329393 7, 0xFFFF, sum = 0
4283 10:02:15.329460 8, 0x0, sum = 1
4284 10:02:15.332717 9, 0x0, sum = 2
4285 10:02:15.332820 10, 0x0, sum = 3
4286 10:02:15.335949 11, 0x0, sum = 4
4287 10:02:15.336032 best_step = 9
4288 10:02:15.336097
4289 10:02:15.336156 ==
4290 10:02:15.339094 Dram Type= 6, Freq= 0, CH_0, rank 1
4291 10:02:15.345500 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4292 10:02:15.345590 ==
4293 10:02:15.345655 RX Vref Scan: 0
4294 10:02:15.345714
4295 10:02:15.348813 RX Vref 0 -> 0, step: 1
4296 10:02:15.348912
4297 10:02:15.352301 RX Delay -179 -> 252, step: 8
4298 10:02:15.355934 iDelay=197, Bit 0, Center 52 (-91 ~ 196) 288
4299 10:02:15.359252 iDelay=197, Bit 1, Center 56 (-83 ~ 196) 280
4300 10:02:15.366261 iDelay=197, Bit 2, Center 52 (-91 ~ 196) 288
4301 10:02:15.369462 iDelay=197, Bit 3, Center 52 (-91 ~ 196) 288
4302 10:02:15.372490 iDelay=197, Bit 4, Center 52 (-91 ~ 196) 288
4303 10:02:15.375992 iDelay=197, Bit 5, Center 44 (-99 ~ 188) 288
4304 10:02:15.379209 iDelay=197, Bit 6, Center 56 (-83 ~ 196) 280
4305 10:02:15.385949 iDelay=197, Bit 7, Center 60 (-75 ~ 196) 272
4306 10:02:15.389069 iDelay=197, Bit 8, Center 36 (-107 ~ 180) 288
4307 10:02:15.392178 iDelay=197, Bit 9, Center 36 (-107 ~ 180) 288
4308 10:02:15.395573 iDelay=197, Bit 10, Center 48 (-91 ~ 188) 280
4309 10:02:15.402634 iDelay=197, Bit 11, Center 36 (-107 ~ 180) 288
4310 10:02:15.405482 iDelay=197, Bit 12, Center 52 (-91 ~ 196) 288
4311 10:02:15.408849 iDelay=197, Bit 13, Center 52 (-91 ~ 196) 288
4312 10:02:15.412643 iDelay=197, Bit 14, Center 56 (-83 ~ 196) 280
4313 10:02:15.415769 iDelay=197, Bit 15, Center 52 (-91 ~ 196) 288
4314 10:02:15.418918 ==
4315 10:02:15.419000 Dram Type= 6, Freq= 0, CH_0, rank 1
4316 10:02:15.425424 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4317 10:02:15.425509 ==
4318 10:02:15.425573 DQS Delay:
4319 10:02:15.429304 DQS0 = 0, DQS1 = 0
4320 10:02:15.429386 DQM Delay:
4321 10:02:15.432504 DQM0 = 53, DQM1 = 46
4322 10:02:15.432585 DQ Delay:
4323 10:02:15.435959 DQ0 =52, DQ1 =56, DQ2 =52, DQ3 =52
4324 10:02:15.438795 DQ4 =52, DQ5 =44, DQ6 =56, DQ7 =60
4325 10:02:15.442645 DQ8 =36, DQ9 =36, DQ10 =48, DQ11 =36
4326 10:02:15.445855 DQ12 =52, DQ13 =52, DQ14 =56, DQ15 =52
4327 10:02:15.445937
4328 10:02:15.445999
4329 10:02:15.452069 [DQSOSCAuto] RK1, (LSB)MR18= 0x6223, (MSB)MR19= 0x808, tDQSOscB0 = 403 ps tDQSOscB1 = 391 ps
4330 10:02:15.455633 CH0 RK1: MR19=808, MR18=6223
4331 10:02:15.462445 CH0_RK1: MR19=0x808, MR18=0x6223, DQSOSC=391, MR23=63, INC=171, DEC=114
4332 10:02:15.465597 [RxdqsGatingPostProcess] freq 600
4333 10:02:15.468552 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
4334 10:02:15.472504 Pre-setting of DQS Precalculation
4335 10:02:15.478850 [DualRankRxdatlatCal] RK0: 9, RK1: 9, Final_Datlat 9
4336 10:02:15.478935 ==
4337 10:02:15.482139 Dram Type= 6, Freq= 0, CH_1, rank 0
4338 10:02:15.486000 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4339 10:02:15.486083 ==
4340 10:02:15.491843 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
4341 10:02:15.498711 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37
4342 10:02:15.501842 [CA 0] Center 36 (5~67) winsize 63
4343 10:02:15.505574 [CA 1] Center 36 (5~67) winsize 63
4344 10:02:15.508388 [CA 2] Center 35 (4~66) winsize 63
4345 10:02:15.511736 [CA 3] Center 34 (4~65) winsize 62
4346 10:02:15.515308 [CA 4] Center 34 (4~65) winsize 62
4347 10:02:15.519080 [CA 5] Center 34 (4~65) winsize 62
4348 10:02:15.519164
4349 10:02:15.522380 [CmdBusTrainingLP45] Vref(ca) range 1: 37
4350 10:02:15.522463
4351 10:02:15.525216 [CATrainingPosCal] consider 1 rank data
4352 10:02:15.528651 u2DelayCellTimex100 = 270/100 ps
4353 10:02:15.531908 CA0 delay=36 (5~67),Diff = 2 PI (19 cell)
4354 10:02:15.534997 CA1 delay=36 (5~67),Diff = 2 PI (19 cell)
4355 10:02:15.538744 CA2 delay=35 (4~66),Diff = 1 PI (9 cell)
4356 10:02:15.541795 CA3 delay=34 (4~65),Diff = 0 PI (0 cell)
4357 10:02:15.545028 CA4 delay=34 (4~65),Diff = 0 PI (0 cell)
4358 10:02:15.548976 CA5 delay=34 (4~65),Diff = 0 PI (0 cell)
4359 10:02:15.549058
4360 10:02:15.554968 CA PerBit enable=1, Macro0, CA PI delay=34
4361 10:02:15.555132
4362 10:02:15.555225 [CBTSetCACLKResult] CA Dly = 34
4363 10:02:15.558288 CS Dly: 5 (0~36)
4364 10:02:15.558369 ==
4365 10:02:15.562015 Dram Type= 6, Freq= 0, CH_1, rank 1
4366 10:02:15.564695 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4367 10:02:15.564798 ==
4368 10:02:15.571292 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
4369 10:02:15.578640 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
4370 10:02:15.582075 [CA 0] Center 36 (5~67) winsize 63
4371 10:02:15.585225 [CA 1] Center 36 (5~67) winsize 63
4372 10:02:15.588699 [CA 2] Center 35 (4~66) winsize 63
4373 10:02:15.591385 [CA 3] Center 35 (4~66) winsize 63
4374 10:02:15.594885 [CA 4] Center 35 (4~66) winsize 63
4375 10:02:15.598382 [CA 5] Center 34 (3~65) winsize 63
4376 10:02:15.598477
4377 10:02:15.601481 [CmdBusTrainingLP45] Vref(ca) range 1: 35
4378 10:02:15.601569
4379 10:02:15.605009 [CATrainingPosCal] consider 2 rank data
4380 10:02:15.607927 u2DelayCellTimex100 = 270/100 ps
4381 10:02:15.611377 CA0 delay=36 (5~67),Diff = 2 PI (19 cell)
4382 10:02:15.615438 CA1 delay=36 (5~67),Diff = 2 PI (19 cell)
4383 10:02:15.618396 CA2 delay=35 (4~66),Diff = 1 PI (9 cell)
4384 10:02:15.621406 CA3 delay=34 (4~65),Diff = 0 PI (0 cell)
4385 10:02:15.624816 CA4 delay=34 (4~65),Diff = 0 PI (0 cell)
4386 10:02:15.628037 CA5 delay=34 (4~65),Diff = 0 PI (0 cell)
4387 10:02:15.631701
4388 10:02:15.635015 CA PerBit enable=1, Macro0, CA PI delay=34
4389 10:02:15.635097
4390 10:02:15.638211 [CBTSetCACLKResult] CA Dly = 34
4391 10:02:15.638293 CS Dly: 5 (0~37)
4392 10:02:15.638359
4393 10:02:15.641750 ----->DramcWriteLeveling(PI) begin...
4394 10:02:15.641833 ==
4395 10:02:15.644702 Dram Type= 6, Freq= 0, CH_1, rank 0
4396 10:02:15.647918 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4397 10:02:15.651255 ==
4398 10:02:15.651337 Write leveling (Byte 0): 30 => 30
4399 10:02:15.654630 Write leveling (Byte 1): 32 => 32
4400 10:02:15.658483 DramcWriteLeveling(PI) end<-----
4401 10:02:15.658566
4402 10:02:15.658631 ==
4403 10:02:15.661294 Dram Type= 6, Freq= 0, CH_1, rank 0
4404 10:02:15.668442 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4405 10:02:15.668527 ==
4406 10:02:15.668592 [Gating] SW mode calibration
4407 10:02:15.678578 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
4408 10:02:15.682068 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
4409 10:02:15.684972 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4410 10:02:15.691436 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4411 10:02:15.694893 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 0) (1 0)
4412 10:02:15.698074 0 9 12 | B1->B0 | 2f2f 3030 | 1 1 | (1 0) (1 0)
4413 10:02:15.704732 0 9 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4414 10:02:15.708135 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4415 10:02:15.711689 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4416 10:02:15.718244 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4417 10:02:15.721851 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4418 10:02:15.724618 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4419 10:02:15.731546 0 10 8 | B1->B0 | 2424 2424 | 0 0 | (0 0) (0 0)
4420 10:02:15.734667 0 10 12 | B1->B0 | 3838 3b3b | 0 0 | (0 0) (0 0)
4421 10:02:15.738075 0 10 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4422 10:02:15.744811 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4423 10:02:15.748392 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4424 10:02:15.751566 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4425 10:02:15.758437 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4426 10:02:15.761220 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4427 10:02:15.764947 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
4428 10:02:15.771396 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
4429 10:02:15.774626 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
4430 10:02:15.778161 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4431 10:02:15.781666 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4432 10:02:15.788046 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4433 10:02:15.791644 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4434 10:02:15.794559 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4435 10:02:15.801161 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4436 10:02:15.804405 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4437 10:02:15.807825 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4438 10:02:15.814624 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4439 10:02:15.817895 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4440 10:02:15.821109 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4441 10:02:15.827679 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4442 10:02:15.831049 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4443 10:02:15.834580 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4444 10:02:15.841356 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
4445 10:02:15.841439 Total UI for P1: 0, mck2ui 16
4446 10:02:15.847966 best dqsien dly found for B0: ( 0, 13, 10)
4447 10:02:15.851089 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4448 10:02:15.854473 Total UI for P1: 0, mck2ui 16
4449 10:02:15.857961 best dqsien dly found for B1: ( 0, 13, 12)
4450 10:02:15.860736 best DQS0 dly(MCK, UI, PI) = (0, 13, 10)
4451 10:02:15.864196 best DQS1 dly(MCK, UI, PI) = (0, 13, 12)
4452 10:02:15.864278
4453 10:02:15.867498 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 10)
4454 10:02:15.871173 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 12)
4455 10:02:15.874144 [Gating] SW calibration Done
4456 10:02:15.874225 ==
4457 10:02:15.877365 Dram Type= 6, Freq= 0, CH_1, rank 0
4458 10:02:15.884069 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4459 10:02:15.884162 ==
4460 10:02:15.884227 RX Vref Scan: 0
4461 10:02:15.884286
4462 10:02:15.887726 RX Vref 0 -> 0, step: 1
4463 10:02:15.887811
4464 10:02:15.890858 RX Delay -230 -> 252, step: 16
4465 10:02:15.894147 iDelay=218, Bit 0, Center 57 (-102 ~ 217) 320
4466 10:02:15.897626 iDelay=218, Bit 1, Center 41 (-118 ~ 201) 320
4467 10:02:15.900762 iDelay=218, Bit 2, Center 41 (-118 ~ 201) 320
4468 10:02:15.907381 iDelay=218, Bit 3, Center 49 (-102 ~ 201) 304
4469 10:02:15.911017 iDelay=218, Bit 4, Center 49 (-102 ~ 201) 304
4470 10:02:15.914273 iDelay=218, Bit 5, Center 65 (-86 ~ 217) 304
4471 10:02:15.917583 iDelay=218, Bit 6, Center 57 (-102 ~ 217) 320
4472 10:02:15.920730 iDelay=218, Bit 7, Center 49 (-102 ~ 201) 304
4473 10:02:15.927434 iDelay=218, Bit 8, Center 33 (-118 ~ 185) 304
4474 10:02:15.930361 iDelay=218, Bit 9, Center 33 (-118 ~ 185) 304
4475 10:02:15.934158 iDelay=218, Bit 10, Center 49 (-102 ~ 201) 304
4476 10:02:15.937309 iDelay=218, Bit 11, Center 41 (-118 ~ 201) 320
4477 10:02:15.944239 iDelay=218, Bit 12, Center 57 (-102 ~ 217) 320
4478 10:02:15.947002 iDelay=218, Bit 13, Center 49 (-102 ~ 201) 304
4479 10:02:15.950676 iDelay=218, Bit 14, Center 49 (-102 ~ 201) 304
4480 10:02:15.953674 iDelay=218, Bit 15, Center 57 (-102 ~ 217) 320
4481 10:02:15.953756 ==
4482 10:02:15.957068 Dram Type= 6, Freq= 0, CH_1, rank 0
4483 10:02:15.963933 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4484 10:02:15.964016 ==
4485 10:02:15.964098 DQS Delay:
4486 10:02:15.967375 DQS0 = 0, DQS1 = 0
4487 10:02:15.967457 DQM Delay:
4488 10:02:15.967521 DQM0 = 51, DQM1 = 46
4489 10:02:15.970214 DQ Delay:
4490 10:02:15.973814 DQ0 =57, DQ1 =41, DQ2 =41, DQ3 =49
4491 10:02:15.977254 DQ4 =49, DQ5 =65, DQ6 =57, DQ7 =49
4492 10:02:15.980104 DQ8 =33, DQ9 =33, DQ10 =49, DQ11 =41
4493 10:02:15.983877 DQ12 =57, DQ13 =49, DQ14 =49, DQ15 =57
4494 10:02:15.983960
4495 10:02:15.984033
4496 10:02:15.984091 ==
4497 10:02:15.987075 Dram Type= 6, Freq= 0, CH_1, rank 0
4498 10:02:15.990567 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4499 10:02:15.990648 ==
4500 10:02:15.990713
4501 10:02:15.990771
4502 10:02:15.993638 TX Vref Scan disable
4503 10:02:15.997021 == TX Byte 0 ==
4504 10:02:16.000402 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
4505 10:02:16.003620 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
4506 10:02:16.006817 == TX Byte 1 ==
4507 10:02:16.010145 Update DQ dly =576 (2 ,1, 32) DQ OEN =(1 ,6)
4508 10:02:16.013817 Update DQM dly =576 (2 ,1, 32) DQM OEN =(1 ,6)
4509 10:02:16.013899 ==
4510 10:02:16.016669 Dram Type= 6, Freq= 0, CH_1, rank 0
4511 10:02:16.020188 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4512 10:02:16.023665 ==
4513 10:02:16.023746
4514 10:02:16.023811
4515 10:02:16.023868 TX Vref Scan disable
4516 10:02:16.027325 == TX Byte 0 ==
4517 10:02:16.030447 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
4518 10:02:16.037260 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
4519 10:02:16.037349 == TX Byte 1 ==
4520 10:02:16.040450 Update DQ dly =576 (2 ,1, 32) DQ OEN =(1 ,6)
4521 10:02:16.047077 Update DQM dly =576 (2 ,1, 32) DQM OEN =(1 ,6)
4522 10:02:16.047158
4523 10:02:16.047222 [DATLAT]
4524 10:02:16.047280 Freq=600, CH1 RK0
4525 10:02:16.047339
4526 10:02:16.050704 DATLAT Default: 0x9
4527 10:02:16.050785 0, 0xFFFF, sum = 0
4528 10:02:16.053644 1, 0xFFFF, sum = 0
4529 10:02:16.053729 2, 0xFFFF, sum = 0
4530 10:02:16.057567 3, 0xFFFF, sum = 0
4531 10:02:16.057673 4, 0xFFFF, sum = 0
4532 10:02:16.060960 5, 0xFFFF, sum = 0
4533 10:02:16.063529 6, 0xFFFF, sum = 0
4534 10:02:16.063612 7, 0xFFFF, sum = 0
4535 10:02:16.063678 8, 0x0, sum = 1
4536 10:02:16.067015 9, 0x0, sum = 2
4537 10:02:16.067099 10, 0x0, sum = 3
4538 10:02:16.070189 11, 0x0, sum = 4
4539 10:02:16.070272 best_step = 9
4540 10:02:16.070336
4541 10:02:16.070395 ==
4542 10:02:16.073783 Dram Type= 6, Freq= 0, CH_1, rank 0
4543 10:02:16.081042 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4544 10:02:16.081131 ==
4545 10:02:16.081198 RX Vref Scan: 1
4546 10:02:16.081257
4547 10:02:16.084060 RX Vref 0 -> 0, step: 1
4548 10:02:16.084142
4549 10:02:16.087286 RX Delay -163 -> 252, step: 8
4550 10:02:16.087368
4551 10:02:16.090242 Set Vref, RX VrefLevel [Byte0]: 50
4552 10:02:16.093948 [Byte1]: 54
4553 10:02:16.094031
4554 10:02:16.097455 Final RX Vref Byte 0 = 50 to rank0
4555 10:02:16.100842 Final RX Vref Byte 1 = 54 to rank0
4556 10:02:16.103641 Final RX Vref Byte 0 = 50 to rank1
4557 10:02:16.106882 Final RX Vref Byte 1 = 54 to rank1==
4558 10:02:16.110439 Dram Type= 6, Freq= 0, CH_1, rank 0
4559 10:02:16.113832 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4560 10:02:16.113916 ==
4561 10:02:16.117068 DQS Delay:
4562 10:02:16.117151 DQS0 = 0, DQS1 = 0
4563 10:02:16.117217 DQM Delay:
4564 10:02:16.120812 DQM0 = 48, DQM1 = 45
4565 10:02:16.120934 DQ Delay:
4566 10:02:16.123371 DQ0 =52, DQ1 =44, DQ2 =36, DQ3 =44
4567 10:02:16.126816 DQ4 =48, DQ5 =60, DQ6 =56, DQ7 =48
4568 10:02:16.129959 DQ8 =36, DQ9 =36, DQ10 =44, DQ11 =36
4569 10:02:16.133548 DQ12 =52, DQ13 =52, DQ14 =56, DQ15 =52
4570 10:02:16.133631
4571 10:02:16.133696
4572 10:02:16.143785 [DQSOSCAuto] RK0, (LSB)MR18= 0x456a, (MSB)MR19= 0x808, tDQSOscB0 = 389 ps tDQSOscB1 = 396 ps
4573 10:02:16.146831 CH1 RK0: MR19=808, MR18=456A
4574 10:02:16.150398 CH1_RK0: MR19=0x808, MR18=0x456A, DQSOSC=389, MR23=63, INC=173, DEC=115
4575 10:02:16.150481
4576 10:02:16.153400 ----->DramcWriteLeveling(PI) begin...
4577 10:02:16.157181 ==
4578 10:02:16.160308 Dram Type= 6, Freq= 0, CH_1, rank 1
4579 10:02:16.163328 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4580 10:02:16.163412 ==
4581 10:02:16.166560 Write leveling (Byte 0): 30 => 30
4582 10:02:16.169921 Write leveling (Byte 1): 33 => 33
4583 10:02:16.173336 DramcWriteLeveling(PI) end<-----
4584 10:02:16.173419
4585 10:02:16.173485 ==
4586 10:02:16.176437 Dram Type= 6, Freq= 0, CH_1, rank 1
4587 10:02:16.180270 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4588 10:02:16.180354 ==
4589 10:02:16.183269 [Gating] SW mode calibration
4590 10:02:16.189849 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0
4591 10:02:16.196624 RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)
4592 10:02:16.199827 0 9 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4593 10:02:16.203442 0 9 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4594 10:02:16.209823 0 9 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
4595 10:02:16.212782 0 9 12 | B1->B0 | 2e2e 3030 | 0 0 | (0 0) (0 0)
4596 10:02:16.216584 0 9 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4597 10:02:16.222751 0 9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4598 10:02:16.226934 0 9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4599 10:02:16.230044 0 9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4600 10:02:16.236347 0 10 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4601 10:02:16.240181 0 10 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
4602 10:02:16.243082 0 10 8 | B1->B0 | 2424 2323 | 0 0 | (0 0) (0 0)
4603 10:02:16.246101 0 10 12 | B1->B0 | 3a3a 3636 | 0 0 | (0 0) (0 0)
4604 10:02:16.253177 0 10 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4605 10:02:16.256573 0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4606 10:02:16.259930 0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4607 10:02:16.266764 0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4608 10:02:16.270105 0 11 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4609 10:02:16.273036 0 11 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4610 10:02:16.279727 0 11 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4611 10:02:16.282698 0 11 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 1)
4612 10:02:16.286145 0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
4613 10:02:16.292759 0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4614 10:02:16.296341 0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4615 10:02:16.299759 0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4616 10:02:16.306183 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4617 10:02:16.309280 0 12 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4618 10:02:16.312933 0 12 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4619 10:02:16.319178 0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4620 10:02:16.322518 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4621 10:02:16.326030 0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4622 10:02:16.332889 0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4623 10:02:16.336617 0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4624 10:02:16.339743 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4625 10:02:16.345718 0 13 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
4626 10:02:16.349428 0 13 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 1)
4627 10:02:16.352495 0 13 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)
4628 10:02:16.355820 Total UI for P1: 0, mck2ui 16
4629 10:02:16.359354 best dqsien dly found for B1: ( 0, 13, 8)
4630 10:02:16.365992 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
4631 10:02:16.366153 Total UI for P1: 0, mck2ui 16
4632 10:02:16.368980 best dqsien dly found for B0: ( 0, 13, 12)
4633 10:02:16.375713 best DQS0 dly(MCK, UI, PI) = (0, 13, 12)
4634 10:02:16.378964 best DQS1 dly(MCK, UI, PI) = (0, 13, 8)
4635 10:02:16.379059
4636 10:02:16.382610 best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 12)
4637 10:02:16.385955 best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 8)
4638 10:02:16.389158 [Gating] SW calibration Done
4639 10:02:16.389267 ==
4640 10:02:16.392689 Dram Type= 6, Freq= 0, CH_1, rank 1
4641 10:02:16.395647 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4642 10:02:16.395730 ==
4643 10:02:16.399408 RX Vref Scan: 0
4644 10:02:16.399731
4645 10:02:16.399990 RX Vref 0 -> 0, step: 1
4646 10:02:16.400231
4647 10:02:16.403045 RX Delay -230 -> 252, step: 16
4648 10:02:16.406380 iDelay=218, Bit 0, Center 49 (-102 ~ 201) 304
4649 10:02:16.412689 iDelay=218, Bit 1, Center 49 (-102 ~ 201) 304
4650 10:02:16.415760 iDelay=218, Bit 2, Center 41 (-102 ~ 185) 288
4651 10:02:16.419218 iDelay=218, Bit 3, Center 49 (-102 ~ 201) 304
4652 10:02:16.422851 iDelay=218, Bit 4, Center 49 (-102 ~ 201) 304
4653 10:02:16.426042 iDelay=218, Bit 5, Center 65 (-86 ~ 217) 304
4654 10:02:16.432388 iDelay=218, Bit 6, Center 57 (-102 ~ 217) 320
4655 10:02:16.435587 iDelay=218, Bit 7, Center 49 (-102 ~ 201) 304
4656 10:02:16.439418 iDelay=218, Bit 8, Center 33 (-118 ~ 185) 304
4657 10:02:16.442530 iDelay=218, Bit 9, Center 49 (-102 ~ 201) 304
4658 10:02:16.449115 iDelay=218, Bit 10, Center 49 (-102 ~ 201) 304
4659 10:02:16.452372 iDelay=218, Bit 11, Center 49 (-102 ~ 201) 304
4660 10:02:16.455809 iDelay=218, Bit 12, Center 57 (-102 ~ 217) 320
4661 10:02:16.459314 iDelay=218, Bit 13, Center 57 (-102 ~ 217) 320
4662 10:02:16.465507 iDelay=218, Bit 14, Center 49 (-102 ~ 201) 304
4663 10:02:16.468738 iDelay=218, Bit 15, Center 57 (-102 ~ 217) 320
4664 10:02:16.468846 ==
4665 10:02:16.472492 Dram Type= 6, Freq= 0, CH_1, rank 1
4666 10:02:16.475856 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4667 10:02:16.475938 ==
4668 10:02:16.476004 DQS Delay:
4669 10:02:16.478852 DQS0 = 0, DQS1 = 0
4670 10:02:16.478933 DQM Delay:
4671 10:02:16.482252 DQM0 = 51, DQM1 = 50
4672 10:02:16.482333 DQ Delay:
4673 10:02:16.485937 DQ0 =49, DQ1 =49, DQ2 =41, DQ3 =49
4674 10:02:16.489504 DQ4 =49, DQ5 =65, DQ6 =57, DQ7 =49
4675 10:02:16.492091 DQ8 =33, DQ9 =49, DQ10 =49, DQ11 =49
4676 10:02:16.495345 DQ12 =57, DQ13 =57, DQ14 =49, DQ15 =57
4677 10:02:16.495427
4678 10:02:16.495491
4679 10:02:16.495550 ==
4680 10:02:16.498797 Dram Type= 6, Freq= 0, CH_1, rank 1
4681 10:02:16.502190 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4682 10:02:16.505767 ==
4683 10:02:16.505848
4684 10:02:16.505912
4685 10:02:16.505970 TX Vref Scan disable
4686 10:02:16.508763 == TX Byte 0 ==
4687 10:02:16.512120 Update DQ dly =576 (2 ,1, 32) DQ OEN =(1 ,6)
4688 10:02:16.515408 Update DQM dly =576 (2 ,1, 32) DQM OEN =(1 ,6)
4689 10:02:16.518772 == TX Byte 1 ==
4690 10:02:16.522085 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
4691 10:02:16.525736 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
4692 10:02:16.529014 ==
4693 10:02:16.532034 Dram Type= 6, Freq= 0, CH_1, rank 1
4694 10:02:16.535545 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4695 10:02:16.535629 ==
4696 10:02:16.535694
4697 10:02:16.535752
4698 10:02:16.538888 TX Vref Scan disable
4699 10:02:16.538969 == TX Byte 0 ==
4700 10:02:16.545720 Update DQ dly =575 (2 ,1, 31) DQ OEN =(1 ,6)
4701 10:02:16.549042 Update DQM dly =575 (2 ,1, 31) DQM OEN =(1 ,6)
4702 10:02:16.549124 == TX Byte 1 ==
4703 10:02:16.555187 Update DQ dly =577 (2 ,1, 33) DQ OEN =(1 ,6)
4704 10:02:16.558724 Update DQM dly =577 (2 ,1, 33) DQM OEN =(1 ,6)
4705 10:02:16.558806
4706 10:02:16.558870 [DATLAT]
4707 10:02:16.562068 Freq=600, CH1 RK1
4708 10:02:16.562150
4709 10:02:16.562213 DATLAT Default: 0x9
4710 10:02:16.565712 0, 0xFFFF, sum = 0
4711 10:02:16.565795 1, 0xFFFF, sum = 0
4712 10:02:16.568631 2, 0xFFFF, sum = 0
4713 10:02:16.568739 3, 0xFFFF, sum = 0
4714 10:02:16.572282 4, 0xFFFF, sum = 0
4715 10:02:16.572365 5, 0xFFFF, sum = 0
4716 10:02:16.575638 6, 0xFFFF, sum = 0
4717 10:02:16.579010 7, 0xFFFF, sum = 0
4718 10:02:16.579092 8, 0x0, sum = 1
4719 10:02:16.579158 9, 0x0, sum = 2
4720 10:02:16.582267 10, 0x0, sum = 3
4721 10:02:16.582350 11, 0x0, sum = 4
4722 10:02:16.585341 best_step = 9
4723 10:02:16.585422
4724 10:02:16.585486 ==
4725 10:02:16.588468 Dram Type= 6, Freq= 0, CH_1, rank 1
4726 10:02:16.592030 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4727 10:02:16.592113 ==
4728 10:02:16.595409 RX Vref Scan: 0
4729 10:02:16.595490
4730 10:02:16.595554 RX Vref 0 -> 0, step: 1
4731 10:02:16.595613
4732 10:02:16.598682 RX Delay -163 -> 252, step: 8
4733 10:02:16.605311 iDelay=205, Bit 0, Center 56 (-83 ~ 196) 280
4734 10:02:16.609135 iDelay=205, Bit 1, Center 44 (-99 ~ 188) 288
4735 10:02:16.612158 iDelay=205, Bit 2, Center 36 (-107 ~ 180) 288
4736 10:02:16.615481 iDelay=205, Bit 3, Center 44 (-99 ~ 188) 288
4737 10:02:16.619020 iDelay=205, Bit 4, Center 48 (-91 ~ 188) 280
4738 10:02:16.625632 iDelay=205, Bit 5, Center 60 (-83 ~ 204) 288
4739 10:02:16.629092 iDelay=205, Bit 6, Center 60 (-83 ~ 204) 288
4740 10:02:16.632170 iDelay=205, Bit 7, Center 44 (-99 ~ 188) 288
4741 10:02:16.635562 iDelay=205, Bit 8, Center 32 (-115 ~ 180) 296
4742 10:02:16.642691 iDelay=205, Bit 9, Center 32 (-115 ~ 180) 296
4743 10:02:16.645653 iDelay=205, Bit 10, Center 48 (-99 ~ 196) 296
4744 10:02:16.648663 iDelay=205, Bit 11, Center 40 (-107 ~ 188) 296
4745 10:02:16.652137 iDelay=205, Bit 12, Center 56 (-91 ~ 204) 296
4746 10:02:16.655287 iDelay=205, Bit 13, Center 52 (-91 ~ 196) 288
4747 10:02:16.662002 iDelay=205, Bit 14, Center 52 (-91 ~ 196) 288
4748 10:02:16.665193 iDelay=205, Bit 15, Center 52 (-99 ~ 204) 304
4749 10:02:16.665279 ==
4750 10:02:16.668527 Dram Type= 6, Freq= 0, CH_1, rank 1
4751 10:02:16.671925 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
4752 10:02:16.672017 ==
4753 10:02:16.675516 DQS Delay:
4754 10:02:16.675598 DQS0 = 0, DQS1 = 0
4755 10:02:16.675663 DQM Delay:
4756 10:02:16.678662 DQM0 = 49, DQM1 = 45
4757 10:02:16.678743 DQ Delay:
4758 10:02:16.681627 DQ0 =56, DQ1 =44, DQ2 =36, DQ3 =44
4759 10:02:16.685265 DQ4 =48, DQ5 =60, DQ6 =60, DQ7 =44
4760 10:02:16.688695 DQ8 =32, DQ9 =32, DQ10 =48, DQ11 =40
4761 10:02:16.691627 DQ12 =56, DQ13 =52, DQ14 =52, DQ15 =52
4762 10:02:16.691709
4763 10:02:16.691773
4764 10:02:16.701712 [DQSOSCAuto] RK1, (LSB)MR18= 0x6e25, (MSB)MR19= 0x808, tDQSOscB0 = 402 ps tDQSOscB1 = 389 ps
4765 10:02:16.705139 CH1 RK1: MR19=808, MR18=6E25
4766 10:02:16.708781 CH1_RK1: MR19=0x808, MR18=0x6E25, DQSOSC=389, MR23=63, INC=173, DEC=115
4767 10:02:16.711841 [RxdqsGatingPostProcess] freq 600
4768 10:02:16.718635 ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1
4769 10:02:16.721526 Pre-setting of DQS Precalculation
4770 10:02:16.725048 [DualRankRxdatlatCal] RK0: 9, RK1: 9, Final_Datlat 9
4771 10:02:16.731623 sync_frequency_calibration_params sync calibration params of frequency 600 to shu:5
4772 10:02:16.741736 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
4773 10:02:16.741893
4774 10:02:16.741985
4775 10:02:16.745607 [Calibration Summary] 1200 Mbps
4776 10:02:16.745743 CH 0, Rank 0
4777 10:02:16.748558 SW Impedance : PASS
4778 10:02:16.748640 DUTY Scan : NO K
4779 10:02:16.751755 ZQ Calibration : PASS
4780 10:02:16.754970 Jitter Meter : NO K
4781 10:02:16.755124 CBT Training : PASS
4782 10:02:16.758206 Write leveling : PASS
4783 10:02:16.758371 RX DQS gating : PASS
4784 10:02:16.761996 RX DQ/DQS(RDDQC) : PASS
4785 10:02:16.765543 TX DQ/DQS : PASS
4786 10:02:16.765709 RX DATLAT : PASS
4787 10:02:16.768650 RX DQ/DQS(Engine): PASS
4788 10:02:16.771924 TX OE : NO K
4789 10:02:16.772104 All Pass.
4790 10:02:16.772210
4791 10:02:16.772304 CH 0, Rank 1
4792 10:02:16.775154 SW Impedance : PASS
4793 10:02:16.778964 DUTY Scan : NO K
4794 10:02:16.779154 ZQ Calibration : PASS
4795 10:02:16.782170 Jitter Meter : NO K
4796 10:02:16.785114 CBT Training : PASS
4797 10:02:16.785235 Write leveling : PASS
4798 10:02:16.788663 RX DQS gating : PASS
4799 10:02:16.792307 RX DQ/DQS(RDDQC) : PASS
4800 10:02:16.792527 TX DQ/DQS : PASS
4801 10:02:16.795338 RX DATLAT : PASS
4802 10:02:16.798607 RX DQ/DQS(Engine): PASS
4803 10:02:16.798808 TX OE : NO K
4804 10:02:16.798942 All Pass.
4805 10:02:16.802219
4806 10:02:16.802476 CH 1, Rank 0
4807 10:02:16.805049 SW Impedance : PASS
4808 10:02:16.805275 DUTY Scan : NO K
4809 10:02:16.808788 ZQ Calibration : PASS
4810 10:02:16.809069 Jitter Meter : NO K
4811 10:02:16.812015 CBT Training : PASS
4812 10:02:16.815558 Write leveling : PASS
4813 10:02:16.815884 RX DQS gating : PASS
4814 10:02:16.818751 RX DQ/DQS(RDDQC) : PASS
4815 10:02:16.822138 TX DQ/DQS : PASS
4816 10:02:16.822505 RX DATLAT : PASS
4817 10:02:16.825408 RX DQ/DQS(Engine): PASS
4818 10:02:16.828781 TX OE : NO K
4819 10:02:16.829314 All Pass.
4820 10:02:16.829632
4821 10:02:16.829922 CH 1, Rank 1
4822 10:02:16.832080 SW Impedance : PASS
4823 10:02:16.835629 DUTY Scan : NO K
4824 10:02:16.836132 ZQ Calibration : PASS
4825 10:02:16.839079 Jitter Meter : NO K
4826 10:02:16.841869 CBT Training : PASS
4827 10:02:16.842261 Write leveling : PASS
4828 10:02:16.845475 RX DQS gating : PASS
4829 10:02:16.848575 RX DQ/DQS(RDDQC) : PASS
4830 10:02:16.849002 TX DQ/DQS : PASS
4831 10:02:16.851290 RX DATLAT : PASS
4832 10:02:16.851373 RX DQ/DQS(Engine): PASS
4833 10:02:16.854778 TX OE : NO K
4834 10:02:16.854867 All Pass.
4835 10:02:16.854939
4836 10:02:16.858403 DramC Write-DBI off
4837 10:02:16.861541 PER_BANK_REFRESH: Hybrid Mode
4838 10:02:16.861637 TX_TRACKING: ON
4839 10:02:16.871923 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 30, TRFC_05T 1, TXREFCNT 44, TRFCpb 9, TRFCpb_05T 1
4840 10:02:16.875018 [FAST_K] Save calibration result to emmc
4841 10:02:16.878003 dramc_set_vcore_voltage set vcore to 662500
4842 10:02:16.881574 Read voltage for 933, 3
4843 10:02:16.881712 Vio18 = 0
4844 10:02:16.881821 Vcore = 662500
4845 10:02:16.885015 Vdram = 0
4846 10:02:16.885168 Vddq = 0
4847 10:02:16.885290 Vmddr = 0
4848 10:02:16.891779 [FAST_K] DramcSave_Time_For_Cal_Init SHU3, femmc_Ready=0
4849 10:02:16.894680 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
4850 10:02:16.898269 MEM_TYPE=3, freq_sel=17
4851 10:02:16.902255 sv_algorithm_assistance_LP4_1600
4852 10:02:16.904877 ============ PULL DRAM RESETB DOWN ============
4853 10:02:16.911958 ========== PULL DRAM RESETB DOWN end =========
4854 10:02:16.915106 [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3
4855 10:02:16.918307 ===================================
4856 10:02:16.921759 LPDDR4 DRAM CONFIGURATION
4857 10:02:16.925217 ===================================
4858 10:02:16.925522 EX_ROW_EN[0] = 0x0
4859 10:02:16.927971 EX_ROW_EN[1] = 0x0
4860 10:02:16.928275 LP4Y_EN = 0x0
4861 10:02:16.932124 WORK_FSP = 0x0
4862 10:02:16.932427 WL = 0x3
4863 10:02:16.934925 RL = 0x3
4864 10:02:16.935230 BL = 0x2
4865 10:02:16.938322 RPST = 0x0
4866 10:02:16.938688 RD_PRE = 0x0
4867 10:02:16.942033 WR_PRE = 0x1
4868 10:02:16.942393 WR_PST = 0x0
4869 10:02:16.944760 DBI_WR = 0x0
4870 10:02:16.945162 DBI_RD = 0x0
4871 10:02:16.948397 OTF = 0x1
4872 10:02:16.952098 ===================================
4873 10:02:16.954986 ===================================
4874 10:02:16.955351 ANA top config
4875 10:02:16.958734 ===================================
4876 10:02:16.961856 DLL_ASYNC_EN = 0
4877 10:02:16.965201 ALL_SLAVE_EN = 1
4878 10:02:16.968501 NEW_RANK_MODE = 1
4879 10:02:16.968901 DLL_IDLE_MODE = 1
4880 10:02:16.971940 LP45_APHY_COMB_EN = 1
4881 10:02:16.975493 TX_ODT_DIS = 1
4882 10:02:16.977987 NEW_8X_MODE = 1
4883 10:02:16.981641 ===================================
4884 10:02:16.984721 ===================================
4885 10:02:16.987935 data_rate = 1866
4886 10:02:16.988208 CKR = 1
4887 10:02:16.991451 DQ_P2S_RATIO = 8
4888 10:02:16.994915 ===================================
4889 10:02:16.997918 CA_P2S_RATIO = 8
4890 10:02:17.001272 DQ_CA_OPEN = 0
4891 10:02:17.004317 DQ_SEMI_OPEN = 0
4892 10:02:17.007821 CA_SEMI_OPEN = 0
4893 10:02:17.007921 CA_FULL_RATE = 0
4894 10:02:17.011195 DQ_CKDIV4_EN = 1
4895 10:02:17.014539 CA_CKDIV4_EN = 1
4896 10:02:17.017607 CA_PREDIV_EN = 0
4897 10:02:17.021310 PH8_DLY = 0
4898 10:02:17.024270 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
4899 10:02:17.024399 DQ_AAMCK_DIV = 4
4900 10:02:17.027895 CA_AAMCK_DIV = 4
4901 10:02:17.031483 CA_ADMCK_DIV = 4
4902 10:02:17.034436 DQ_TRACK_CA_EN = 0
4903 10:02:17.037490 CA_PICK = 933
4904 10:02:17.041015 CA_MCKIO = 933
4905 10:02:17.044686 MCKIO_SEMI = 0
4906 10:02:17.044817 PLL_FREQ = 3732
4907 10:02:17.047615 DQ_UI_PI_RATIO = 32
4908 10:02:17.051384 CA_UI_PI_RATIO = 0
4909 10:02:17.054539 ===================================
4910 10:02:17.057530 ===================================
4911 10:02:17.061282 memory_type:LPDDR4
4912 10:02:17.061381 GP_NUM : 10
4913 10:02:17.064258 SRAM_EN : 1
4914 10:02:17.067692 MD32_EN : 0
4915 10:02:17.071383 ===================================
4916 10:02:17.071476 [ANA_INIT] >>>>>>>>>>>>>>
4917 10:02:17.074907 <<<<<< [CONFIGURE PHASE]: ANA_TX
4918 10:02:17.077882 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
4919 10:02:17.080779 ===================================
4920 10:02:17.084153 data_rate = 1866,PCW = 0X8f00
4921 10:02:17.087782 ===================================
4922 10:02:17.090810 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
4923 10:02:17.097924 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
4924 10:02:17.100933 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
4925 10:02:17.107651 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
4926 10:02:17.110796 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
4927 10:02:17.114353 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
4928 10:02:17.114447 [ANA_INIT] flow start
4929 10:02:17.118181 [ANA_INIT] PLL >>>>>>>>
4930 10:02:17.121168 [ANA_INIT] PLL <<<<<<<<
4931 10:02:17.124231 [ANA_INIT] MIDPI >>>>>>>>
4932 10:02:17.124317 [ANA_INIT] MIDPI <<<<<<<<
4933 10:02:17.127965 [ANA_INIT] DLL >>>>>>>>
4934 10:02:17.128047 [ANA_INIT] flow end
4935 10:02:17.134680 ============ LP4 DIFF to SE enter ============
4936 10:02:17.137818 ============ LP4 DIFF to SE exit ============
4937 10:02:17.140753 [ANA_INIT] <<<<<<<<<<<<<
4938 10:02:17.144622 [Flow] Enable top DCM control >>>>>
4939 10:02:17.147953 [Flow] Enable top DCM control <<<<<
4940 10:02:17.151051 Enable DLL master slave shuffle
4941 10:02:17.154349 ==============================================================
4942 10:02:17.157769 Gating Mode config
4943 10:02:17.161115 ==============================================================
4944 10:02:17.164247 Config description:
4945 10:02:17.174654 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
4946 10:02:17.180925 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
4947 10:02:17.184254 SELPH_MODE 0: By rank 1: By Phase
4948 10:02:17.191626 ==============================================================
4949 10:02:17.194736 GAT_TRACK_EN = 1
4950 10:02:17.197541 RX_GATING_MODE = 2
4951 10:02:17.201115 RX_GATING_TRACK_MODE = 2
4952 10:02:17.204635 SELPH_MODE = 1
4953 10:02:17.207893 PICG_EARLY_EN = 1
4954 10:02:17.208262 VALID_LAT_VALUE = 1
4955 10:02:17.214802 ==============================================================
4956 10:02:17.217421 Enter into Gating configuration >>>>
4957 10:02:17.221337 Exit from Gating configuration <<<<
4958 10:02:17.224562 Enter into DVFS_PRE_config >>>>>
4959 10:02:17.234910 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
4960 10:02:17.237431 Exit from DVFS_PRE_config <<<<<
4961 10:02:17.241617 Enter into PICG configuration >>>>
4962 10:02:17.244244 Exit from PICG configuration <<<<
4963 10:02:17.247946 [RX_INPUT] configuration >>>>>
4964 10:02:17.250715 [RX_INPUT] configuration <<<<<
4965 10:02:17.254984 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
4966 10:02:17.261322 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
4967 10:02:17.268033 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
4968 10:02:17.273825 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
4969 10:02:17.281458 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
4970 10:02:17.287373 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
4971 10:02:17.290459 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
4972 10:02:17.294169 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
4973 10:02:17.297375 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
4974 10:02:17.304147 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
4975 10:02:17.307460 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
4976 10:02:17.310367 [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3
4977 10:02:17.314095 ===================================
4978 10:02:17.317558 LPDDR4 DRAM CONFIGURATION
4979 10:02:17.320926 ===================================
4980 10:02:17.321461 EX_ROW_EN[0] = 0x0
4981 10:02:17.323815 EX_ROW_EN[1] = 0x0
4982 10:02:17.324252 LP4Y_EN = 0x0
4983 10:02:17.327217 WORK_FSP = 0x0
4984 10:02:17.327873 WL = 0x3
4985 10:02:17.330578 RL = 0x3
4986 10:02:17.333967 BL = 0x2
4987 10:02:17.334401 RPST = 0x0
4988 10:02:17.337086 RD_PRE = 0x0
4989 10:02:17.337607 WR_PRE = 0x1
4990 10:02:17.340585 WR_PST = 0x0
4991 10:02:17.341148 DBI_WR = 0x0
4992 10:02:17.344056 DBI_RD = 0x0
4993 10:02:17.344577 OTF = 0x1
4994 10:02:17.347663 ===================================
4995 10:02:17.350202 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
4996 10:02:17.357194 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
4997 10:02:17.361035 [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3
4998 10:02:17.364042 ===================================
4999 10:02:17.366908 LPDDR4 DRAM CONFIGURATION
5000 10:02:17.370342 ===================================
5001 10:02:17.370863 EX_ROW_EN[0] = 0x10
5002 10:02:17.373711 EX_ROW_EN[1] = 0x0
5003 10:02:17.374253 LP4Y_EN = 0x0
5004 10:02:17.377316 WORK_FSP = 0x0
5005 10:02:17.377840 WL = 0x3
5006 10:02:17.380021 RL = 0x3
5007 10:02:17.380440 BL = 0x2
5008 10:02:17.383565 RPST = 0x0
5009 10:02:17.386844 RD_PRE = 0x0
5010 10:02:17.387265 WR_PRE = 0x1
5011 10:02:17.390248 WR_PST = 0x0
5012 10:02:17.390771 DBI_WR = 0x0
5013 10:02:17.393795 DBI_RD = 0x0
5014 10:02:17.394313 OTF = 0x1
5015 10:02:17.396914 ===================================
5016 10:02:17.403550 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
5017 10:02:17.407242 nWR fixed to 30
5018 10:02:17.410481 [ModeRegInit_LP4] CH0 RK0
5019 10:02:17.410907 [ModeRegInit_LP4] CH0 RK1
5020 10:02:17.414101 [ModeRegInit_LP4] CH1 RK0
5021 10:02:17.417326 [ModeRegInit_LP4] CH1 RK1
5022 10:02:17.417747 match AC timing 9
5023 10:02:17.423590 dramType 5, freq 933, readDBI 0, DivMode 1, cbtMode 1
5024 10:02:17.427075 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
5025 10:02:17.430926 [WriteLatency GET] Version:0-MR_RL_field_value:3-WL:10
5026 10:02:17.436872 [TX_path_calculate] data rate=1866, WL=10, DQS_TotalUI=21
5027 10:02:17.440420 [TX_path_calculate] DQS = (2,5) DQS_OE = (2,2)
5028 10:02:17.440982 ==
5029 10:02:17.443971 Dram Type= 6, Freq= 0, CH_0, rank 0
5030 10:02:17.446637 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5031 10:02:17.447066 ==
5032 10:02:17.453858 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5033 10:02:17.460545 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
5034 10:02:17.463327 [CA 0] Center 37 (7~68) winsize 62
5035 10:02:17.466727 [CA 1] Center 37 (7~68) winsize 62
5036 10:02:17.470292 [CA 2] Center 34 (4~65) winsize 62
5037 10:02:17.473099 [CA 3] Center 33 (3~64) winsize 62
5038 10:02:17.476468 [CA 4] Center 33 (3~64) winsize 62
5039 10:02:17.480137 [CA 5] Center 32 (3~62) winsize 60
5040 10:02:17.480664
5041 10:02:17.482894 [CmdBusTrainingLP45] Vref(ca) range 1: 35
5042 10:02:17.483313
5043 10:02:17.486664 [CATrainingPosCal] consider 1 rank data
5044 10:02:17.490215 u2DelayCellTimex100 = 270/100 ps
5045 10:02:17.493628 CA0 delay=37 (7~68),Diff = 5 PI (31 cell)
5046 10:02:17.496523 CA1 delay=37 (7~68),Diff = 5 PI (31 cell)
5047 10:02:17.499873 CA2 delay=34 (4~65),Diff = 2 PI (12 cell)
5048 10:02:17.503169 CA3 delay=33 (3~64),Diff = 1 PI (6 cell)
5049 10:02:17.506950 CA4 delay=33 (3~64),Diff = 1 PI (6 cell)
5050 10:02:17.513165 CA5 delay=32 (3~62),Diff = 0 PI (0 cell)
5051 10:02:17.513691
5052 10:02:17.516415 CA PerBit enable=1, Macro0, CA PI delay=32
5053 10:02:17.516864
5054 10:02:17.520085 [CBTSetCACLKResult] CA Dly = 32
5055 10:02:17.520633 CS Dly: 5 (0~36)
5056 10:02:17.521020 ==
5057 10:02:17.523124 Dram Type= 6, Freq= 0, CH_0, rank 1
5058 10:02:17.526243 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5059 10:02:17.529805 ==
5060 10:02:17.533005 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5061 10:02:17.540085 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
5062 10:02:17.543593 [CA 0] Center 37 (6~68) winsize 63
5063 10:02:17.546527 [CA 1] Center 37 (7~68) winsize 62
5064 10:02:17.550043 [CA 2] Center 34 (4~65) winsize 62
5065 10:02:17.553258 [CA 3] Center 34 (3~65) winsize 63
5066 10:02:17.556291 [CA 4] Center 33 (3~63) winsize 61
5067 10:02:17.559789 [CA 5] Center 32 (2~62) winsize 61
5068 10:02:17.560302
5069 10:02:17.562993 [CmdBusTrainingLP45] Vref(ca) range 1: 35
5070 10:02:17.563413
5071 10:02:17.567062 [CATrainingPosCal] consider 2 rank data
5072 10:02:17.569938 u2DelayCellTimex100 = 270/100 ps
5073 10:02:17.573385 CA0 delay=37 (7~68),Diff = 5 PI (31 cell)
5074 10:02:17.576359 CA1 delay=37 (7~68),Diff = 5 PI (31 cell)
5075 10:02:17.579983 CA2 delay=34 (4~65),Diff = 2 PI (12 cell)
5076 10:02:17.583326 CA3 delay=33 (3~64),Diff = 1 PI (6 cell)
5077 10:02:17.590287 CA4 delay=33 (3~63),Diff = 1 PI (6 cell)
5078 10:02:17.593189 CA5 delay=32 (3~62),Diff = 0 PI (0 cell)
5079 10:02:17.593718
5080 10:02:17.596329 CA PerBit enable=1, Macro0, CA PI delay=32
5081 10:02:17.596876
5082 10:02:17.599367 [CBTSetCACLKResult] CA Dly = 32
5083 10:02:17.599786 CS Dly: 5 (0~37)
5084 10:02:17.600184
5085 10:02:17.603035 ----->DramcWriteLeveling(PI) begin...
5086 10:02:17.603564 ==
5087 10:02:17.606306 Dram Type= 6, Freq= 0, CH_0, rank 0
5088 10:02:17.613428 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5089 10:02:17.613979 ==
5090 10:02:17.616525 Write leveling (Byte 0): 32 => 32
5091 10:02:17.617105 Write leveling (Byte 1): 31 => 31
5092 10:02:17.619573 DramcWriteLeveling(PI) end<-----
5093 10:02:17.619995
5094 10:02:17.622904 ==
5095 10:02:17.623330 Dram Type= 6, Freq= 0, CH_0, rank 0
5096 10:02:17.629544 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5097 10:02:17.629978 ==
5098 10:02:17.633223 [Gating] SW mode calibration
5099 10:02:17.639642 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5100 10:02:17.643223 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5101 10:02:17.649770 0 14 0 | B1->B0 | 2c2c 3434 | 1 1 | (1 1) (1 1)
5102 10:02:17.652696 0 14 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5103 10:02:17.656089 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5104 10:02:17.662710 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5105 10:02:17.666025 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5106 10:02:17.669383 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5107 10:02:17.675903 0 14 24 | B1->B0 | 3434 3434 | 1 0 | (1 1) (0 1)
5108 10:02:17.679441 0 14 28 | B1->B0 | 3434 2424 | 1 1 | (1 1) (1 0)
5109 10:02:17.682614 0 15 0 | B1->B0 | 2d2d 2323 | 1 0 | (1 0) (1 0)
5110 10:02:17.689348 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5111 10:02:17.692782 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5112 10:02:17.696220 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5113 10:02:17.699131 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5114 10:02:17.705901 0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5115 10:02:17.709223 0 15 24 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
5116 10:02:17.712909 0 15 28 | B1->B0 | 2323 3a3a | 0 0 | (0 0) (0 0)
5117 10:02:17.719351 1 0 0 | B1->B0 | 3d3d 4646 | 0 0 | (0 0) (0 0)
5118 10:02:17.722557 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5119 10:02:17.726131 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5120 10:02:17.732579 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5121 10:02:17.736078 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5122 10:02:17.739494 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5123 10:02:17.745515 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
5124 10:02:17.749675 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
5125 10:02:17.753132 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
5126 10:02:17.759219 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5127 10:02:17.762509 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5128 10:02:17.765941 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5129 10:02:17.772276 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5130 10:02:17.775961 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5131 10:02:17.779279 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5132 10:02:17.785938 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5133 10:02:17.789567 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5134 10:02:17.792434 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5135 10:02:17.799844 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5136 10:02:17.802770 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5137 10:02:17.805987 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5138 10:02:17.809468 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5139 10:02:17.815782 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
5140 10:02:17.819385 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
5141 10:02:17.822270 Total UI for P1: 0, mck2ui 16
5142 10:02:17.826147 best dqsien dly found for B0: ( 1, 2, 24)
5143 10:02:17.828857 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
5144 10:02:17.835551 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5145 10:02:17.839358 Total UI for P1: 0, mck2ui 16
5146 10:02:17.842069 best dqsien dly found for B1: ( 1, 2, 30)
5147 10:02:17.845885 best DQS0 dly(MCK, UI, PI) = (1, 2, 24)
5148 10:02:17.848747 best DQS1 dly(MCK, UI, PI) = (1, 2, 30)
5149 10:02:17.849325
5150 10:02:17.852179 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 24)
5151 10:02:17.855959 best DQS1 P1 dly(MCK, UI, PI) = (1, 6, 30)
5152 10:02:17.858894 [Gating] SW calibration Done
5153 10:02:17.859465 ==
5154 10:02:17.861804 Dram Type= 6, Freq= 0, CH_0, rank 0
5155 10:02:17.865393 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5156 10:02:17.865826 ==
5157 10:02:17.868556 RX Vref Scan: 0
5158 10:02:17.869061
5159 10:02:17.872272 RX Vref 0 -> 0, step: 1
5160 10:02:17.872699
5161 10:02:17.873089 RX Delay -80 -> 252, step: 8
5162 10:02:17.878712 iDelay=208, Bit 0, Center 107 (16 ~ 199) 184
5163 10:02:17.882264 iDelay=208, Bit 1, Center 107 (16 ~ 199) 184
5164 10:02:17.885632 iDelay=208, Bit 2, Center 103 (16 ~ 191) 176
5165 10:02:17.888398 iDelay=208, Bit 3, Center 103 (16 ~ 191) 176
5166 10:02:17.892648 iDelay=208, Bit 4, Center 107 (16 ~ 199) 184
5167 10:02:17.898968 iDelay=208, Bit 5, Center 95 (8 ~ 183) 176
5168 10:02:17.902346 iDelay=208, Bit 6, Center 111 (16 ~ 207) 192
5169 10:02:17.905145 iDelay=208, Bit 7, Center 115 (24 ~ 207) 184
5170 10:02:17.908647 iDelay=208, Bit 8, Center 87 (0 ~ 175) 176
5171 10:02:17.911625 iDelay=208, Bit 9, Center 83 (-8 ~ 175) 184
5172 10:02:17.915071 iDelay=208, Bit 10, Center 95 (8 ~ 183) 176
5173 10:02:17.921690 iDelay=208, Bit 11, Center 91 (0 ~ 183) 184
5174 10:02:17.925319 iDelay=208, Bit 12, Center 99 (8 ~ 191) 184
5175 10:02:17.928636 iDelay=208, Bit 13, Center 103 (16 ~ 191) 176
5176 10:02:17.931826 iDelay=208, Bit 14, Center 103 (16 ~ 191) 176
5177 10:02:17.935400 iDelay=208, Bit 15, Center 99 (8 ~ 191) 184
5178 10:02:17.935937 ==
5179 10:02:17.938704 Dram Type= 6, Freq= 0, CH_0, rank 0
5180 10:02:17.945531 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5181 10:02:17.946055 ==
5182 10:02:17.946395 DQS Delay:
5183 10:02:17.948653 DQS0 = 0, DQS1 = 0
5184 10:02:17.949205 DQM Delay:
5185 10:02:17.949546 DQM0 = 106, DQM1 = 95
5186 10:02:17.951676 DQ Delay:
5187 10:02:17.955156 DQ0 =107, DQ1 =107, DQ2 =103, DQ3 =103
5188 10:02:17.958575 DQ4 =107, DQ5 =95, DQ6 =111, DQ7 =115
5189 10:02:17.961707 DQ8 =87, DQ9 =83, DQ10 =95, DQ11 =91
5190 10:02:17.965097 DQ12 =99, DQ13 =103, DQ14 =103, DQ15 =99
5191 10:02:17.965621
5192 10:02:17.965960
5193 10:02:17.966270 ==
5194 10:02:17.968648 Dram Type= 6, Freq= 0, CH_0, rank 0
5195 10:02:17.971443 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5196 10:02:17.971872 ==
5197 10:02:17.972206
5198 10:02:17.974823
5199 10:02:17.975241 TX Vref Scan disable
5200 10:02:17.978253 == TX Byte 0 ==
5201 10:02:17.982344 Update DQ dly =716 (2 ,6, 12) DQ OEN =(2 ,3)
5202 10:02:17.984872 Update DQM dly =716 (2 ,6, 12) DQM OEN =(2 ,3)
5203 10:02:17.988468 == TX Byte 1 ==
5204 10:02:17.991490 Update DQ dly =713 (2 ,5, 41) DQ OEN =(2 ,2)
5205 10:02:17.995281 Update DQM dly =713 (2 ,5, 41) DQM OEN =(2 ,2)
5206 10:02:17.995808 ==
5207 10:02:17.998577 Dram Type= 6, Freq= 0, CH_0, rank 0
5208 10:02:18.005651 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5209 10:02:18.006176 ==
5210 10:02:18.006521
5211 10:02:18.006837
5212 10:02:18.007138 TX Vref Scan disable
5213 10:02:18.009274 == TX Byte 0 ==
5214 10:02:18.012045 Update DQ dly =715 (2 ,6, 11) DQ OEN =(2 ,3)
5215 10:02:18.015624 Update DQM dly =715 (2 ,6, 11) DQM OEN =(2 ,3)
5216 10:02:18.019136 == TX Byte 1 ==
5217 10:02:18.022450 Update DQ dly =713 (2 ,5, 41) DQ OEN =(2 ,2)
5218 10:02:18.025493 Update DQM dly =713 (2 ,5, 41) DQM OEN =(2 ,2)
5219 10:02:18.029089
5220 10:02:18.029697 [DATLAT]
5221 10:02:18.030049 Freq=933, CH0 RK0
5222 10:02:18.030373
5223 10:02:18.032198 DATLAT Default: 0xd
5224 10:02:18.032624 0, 0xFFFF, sum = 0
5225 10:02:18.036246 1, 0xFFFF, sum = 0
5226 10:02:18.036775 2, 0xFFFF, sum = 0
5227 10:02:18.038963 3, 0xFFFF, sum = 0
5228 10:02:18.042065 4, 0xFFFF, sum = 0
5229 10:02:18.042530 5, 0xFFFF, sum = 0
5230 10:02:18.045404 6, 0xFFFF, sum = 0
5231 10:02:18.045936 7, 0xFFFF, sum = 0
5232 10:02:18.049042 8, 0xFFFF, sum = 0
5233 10:02:18.049475 9, 0xFFFF, sum = 0
5234 10:02:18.052063 10, 0x0, sum = 1
5235 10:02:18.052496 11, 0x0, sum = 2
5236 10:02:18.052895 12, 0x0, sum = 3
5237 10:02:18.055506 13, 0x0, sum = 4
5238 10:02:18.055940 best_step = 11
5239 10:02:18.056281
5240 10:02:18.058923 ==
5241 10:02:18.059373 Dram Type= 6, Freq= 0, CH_0, rank 0
5242 10:02:18.065390 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5243 10:02:18.065912 ==
5244 10:02:18.066260 RX Vref Scan: 1
5245 10:02:18.066579
5246 10:02:18.068693 RX Vref 0 -> 0, step: 1
5247 10:02:18.069210
5248 10:02:18.072226 RX Delay -53 -> 252, step: 4
5249 10:02:18.072652
5250 10:02:18.075291 Set Vref, RX VrefLevel [Byte0]: 53
5251 10:02:18.078477 [Byte1]: 54
5252 10:02:18.078944
5253 10:02:18.081897 Final RX Vref Byte 0 = 53 to rank0
5254 10:02:18.085709 Final RX Vref Byte 1 = 54 to rank0
5255 10:02:18.089041 Final RX Vref Byte 0 = 53 to rank1
5256 10:02:18.092480 Final RX Vref Byte 1 = 54 to rank1==
5257 10:02:18.095350 Dram Type= 6, Freq= 0, CH_0, rank 0
5258 10:02:18.099212 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5259 10:02:18.099752 ==
5260 10:02:18.101892 DQS Delay:
5261 10:02:18.102308 DQS0 = 0, DQS1 = 0
5262 10:02:18.105633 DQM Delay:
5263 10:02:18.106160 DQM0 = 105, DQM1 = 98
5264 10:02:18.109163 DQ Delay:
5265 10:02:18.111645 DQ0 =106, DQ1 =106, DQ2 =102, DQ3 =104
5266 10:02:18.115734 DQ4 =104, DQ5 =96, DQ6 =112, DQ7 =110
5267 10:02:18.118443 DQ8 =88, DQ9 =90, DQ10 =98, DQ11 =92
5268 10:02:18.121661 DQ12 =102, DQ13 =102, DQ14 =108, DQ15 =108
5269 10:02:18.122152
5270 10:02:18.122501
5271 10:02:18.128454 [DQSOSCAuto] RK0, (LSB)MR18= 0x2e25, (MSB)MR19= 0x505, tDQSOscB0 = 410 ps tDQSOscB1 = 407 ps
5272 10:02:18.132034 CH0 RK0: MR19=505, MR18=2E25
5273 10:02:18.138924 CH0_RK0: MR19=0x505, MR18=0x2E25, DQSOSC=407, MR23=63, INC=65, DEC=43
5274 10:02:18.139454
5275 10:02:18.141585 ----->DramcWriteLeveling(PI) begin...
5276 10:02:18.142011 ==
5277 10:02:18.144852 Dram Type= 6, Freq= 0, CH_0, rank 1
5278 10:02:18.148284 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5279 10:02:18.148851 ==
5280 10:02:18.152058 Write leveling (Byte 0): 33 => 33
5281 10:02:18.154993 Write leveling (Byte 1): 28 => 28
5282 10:02:18.158686 DramcWriteLeveling(PI) end<-----
5283 10:02:18.159206
5284 10:02:18.159542 ==
5285 10:02:18.162482 Dram Type= 6, Freq= 0, CH_0, rank 1
5286 10:02:18.164858 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5287 10:02:18.165284 ==
5288 10:02:18.168917 [Gating] SW mode calibration
5289 10:02:18.175082 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5290 10:02:18.181455 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5291 10:02:18.185127 0 14 0 | B1->B0 | 3434 3333 | 1 0 | (1 1) (0 0)
5292 10:02:18.191425 0 14 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5293 10:02:18.194471 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5294 10:02:18.197857 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5295 10:02:18.204435 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5296 10:02:18.208469 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5297 10:02:18.211753 0 14 24 | B1->B0 | 3434 3434 | 1 1 | (0 0) (1 1)
5298 10:02:18.218372 0 14 28 | B1->B0 | 2b2b 2626 | 0 0 | (0 0) (1 0)
5299 10:02:18.221606 0 15 0 | B1->B0 | 2323 2727 | 0 0 | (0 0) (0 0)
5300 10:02:18.225082 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5301 10:02:18.230977 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5302 10:02:18.234723 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5303 10:02:18.238140 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5304 10:02:18.241423 0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5305 10:02:18.248452 0 15 24 | B1->B0 | 2828 2424 | 0 0 | (0 0) (0 0)
5306 10:02:18.251308 0 15 28 | B1->B0 | 4141 3f3f | 0 0 | (0 0) (0 0)
5307 10:02:18.254601 1 0 0 | B1->B0 | 4646 4444 | 0 0 | (0 0) (0 0)
5308 10:02:18.261265 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5309 10:02:18.265150 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5310 10:02:18.267932 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5311 10:02:18.274854 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5312 10:02:18.277732 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5313 10:02:18.281298 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5314 10:02:18.287997 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
5315 10:02:18.291317 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 1)
5316 10:02:18.294410 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5317 10:02:18.301193 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5318 10:02:18.304787 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5319 10:02:18.308224 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5320 10:02:18.314746 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5321 10:02:18.318221 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5322 10:02:18.320739 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5323 10:02:18.328199 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5324 10:02:18.331074 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5325 10:02:18.334341 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5326 10:02:18.340981 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5327 10:02:18.344500 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5328 10:02:18.348467 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5329 10:02:18.354266 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5330 10:02:18.357576 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5331 10:02:18.360792 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)
5332 10:02:18.364655 Total UI for P1: 0, mck2ui 16
5333 10:02:18.368227 best dqsien dly found for B1: ( 1, 2, 28)
5334 10:02:18.371389 1 3 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5335 10:02:18.374103 Total UI for P1: 0, mck2ui 16
5336 10:02:18.377750 best dqsien dly found for B0: ( 1, 2, 30)
5337 10:02:18.384464 best DQS0 dly(MCK, UI, PI) = (1, 2, 30)
5338 10:02:18.388073 best DQS1 dly(MCK, UI, PI) = (1, 2, 28)
5339 10:02:18.388593
5340 10:02:18.390784 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 30)
5341 10:02:18.394279 best DQS1 P1 dly(MCK, UI, PI) = (1, 6, 28)
5342 10:02:18.397551 [Gating] SW calibration Done
5343 10:02:18.398068 ==
5344 10:02:18.401076 Dram Type= 6, Freq= 0, CH_0, rank 1
5345 10:02:18.404436 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5346 10:02:18.405017 ==
5347 10:02:18.405367 RX Vref Scan: 0
5348 10:02:18.407927
5349 10:02:18.408448 RX Vref 0 -> 0, step: 1
5350 10:02:18.408787
5351 10:02:18.410788 RX Delay -80 -> 252, step: 8
5352 10:02:18.414084 iDelay=208, Bit 0, Center 103 (8 ~ 199) 192
5353 10:02:18.417665 iDelay=208, Bit 1, Center 107 (16 ~ 199) 184
5354 10:02:18.424667 iDelay=208, Bit 2, Center 99 (8 ~ 191) 184
5355 10:02:18.427775 iDelay=208, Bit 3, Center 99 (8 ~ 191) 184
5356 10:02:18.430661 iDelay=208, Bit 4, Center 107 (16 ~ 199) 184
5357 10:02:18.434636 iDelay=208, Bit 5, Center 95 (0 ~ 191) 192
5358 10:02:18.437413 iDelay=208, Bit 6, Center 111 (24 ~ 199) 176
5359 10:02:18.441022 iDelay=208, Bit 7, Center 111 (16 ~ 207) 192
5360 10:02:18.447774 iDelay=208, Bit 8, Center 87 (0 ~ 175) 176
5361 10:02:18.451202 iDelay=208, Bit 9, Center 87 (0 ~ 175) 176
5362 10:02:18.453827 iDelay=208, Bit 10, Center 91 (0 ~ 183) 184
5363 10:02:18.457670 iDelay=208, Bit 11, Center 87 (0 ~ 175) 176
5364 10:02:18.460738 iDelay=208, Bit 12, Center 99 (8 ~ 191) 184
5365 10:02:18.464356 iDelay=208, Bit 13, Center 99 (8 ~ 191) 184
5366 10:02:18.471426 iDelay=208, Bit 14, Center 103 (16 ~ 191) 176
5367 10:02:18.473933 iDelay=208, Bit 15, Center 103 (16 ~ 191) 176
5368 10:02:18.474355 ==
5369 10:02:18.477220 Dram Type= 6, Freq= 0, CH_0, rank 1
5370 10:02:18.480688 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5371 10:02:18.481271 ==
5372 10:02:18.484460 DQS Delay:
5373 10:02:18.485028 DQS0 = 0, DQS1 = 0
5374 10:02:18.485387 DQM Delay:
5375 10:02:18.487712 DQM0 = 104, DQM1 = 94
5376 10:02:18.488236 DQ Delay:
5377 10:02:18.490674 DQ0 =103, DQ1 =107, DQ2 =99, DQ3 =99
5378 10:02:18.494058 DQ4 =107, DQ5 =95, DQ6 =111, DQ7 =111
5379 10:02:18.497527 DQ8 =87, DQ9 =87, DQ10 =91, DQ11 =87
5380 10:02:18.500946 DQ12 =99, DQ13 =99, DQ14 =103, DQ15 =103
5381 10:02:18.501475
5382 10:02:18.501811
5383 10:02:18.504164 ==
5384 10:02:18.507193 Dram Type= 6, Freq= 0, CH_0, rank 1
5385 10:02:18.510730 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5386 10:02:18.511396 ==
5387 10:02:18.511755
5388 10:02:18.512064
5389 10:02:18.514224 TX Vref Scan disable
5390 10:02:18.514643 == TX Byte 0 ==
5391 10:02:18.517654 Update DQ dly =717 (2 ,6, 13) DQ OEN =(2 ,3)
5392 10:02:18.524018 Update DQM dly =717 (2 ,6, 13) DQM OEN =(2 ,3)
5393 10:02:18.524542 == TX Byte 1 ==
5394 10:02:18.526978 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5395 10:02:18.533683 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5396 10:02:18.534117 ==
5397 10:02:18.536836 Dram Type= 6, Freq= 0, CH_0, rank 1
5398 10:02:18.540342 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5399 10:02:18.540773 ==
5400 10:02:18.541160
5401 10:02:18.541481
5402 10:02:18.543496 TX Vref Scan disable
5403 10:02:18.547204 == TX Byte 0 ==
5404 10:02:18.550187 Update DQ dly =717 (2 ,6, 13) DQ OEN =(2 ,3)
5405 10:02:18.553920 Update DQM dly =717 (2 ,6, 13) DQM OEN =(2 ,3)
5406 10:02:18.556755 == TX Byte 1 ==
5407 10:02:18.560263 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5408 10:02:18.563678 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5409 10:02:18.564106
5410 10:02:18.564445 [DATLAT]
5411 10:02:18.567179 Freq=933, CH0 RK1
5412 10:02:18.567609
5413 10:02:18.570569 DATLAT Default: 0xb
5414 10:02:18.571154 0, 0xFFFF, sum = 0
5415 10:02:18.573503 1, 0xFFFF, sum = 0
5416 10:02:18.573936 2, 0xFFFF, sum = 0
5417 10:02:18.577239 3, 0xFFFF, sum = 0
5418 10:02:18.577669 4, 0xFFFF, sum = 0
5419 10:02:18.580614 5, 0xFFFF, sum = 0
5420 10:02:18.581193 6, 0xFFFF, sum = 0
5421 10:02:18.583852 7, 0xFFFF, sum = 0
5422 10:02:18.584285 8, 0xFFFF, sum = 0
5423 10:02:18.587155 9, 0xFFFF, sum = 0
5424 10:02:18.587692 10, 0x0, sum = 1
5425 10:02:18.590407 11, 0x0, sum = 2
5426 10:02:18.590841 12, 0x0, sum = 3
5427 10:02:18.593989 13, 0x0, sum = 4
5428 10:02:18.594520 best_step = 11
5429 10:02:18.594863
5430 10:02:18.595227 ==
5431 10:02:18.597154 Dram Type= 6, Freq= 0, CH_0, rank 1
5432 10:02:18.600174 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5433 10:02:18.603695 ==
5434 10:02:18.604217 RX Vref Scan: 0
5435 10:02:18.604559
5436 10:02:18.606990 RX Vref 0 -> 0, step: 1
5437 10:02:18.607515
5438 10:02:18.610215 RX Delay -45 -> 252, step: 4
5439 10:02:18.613160 iDelay=195, Bit 0, Center 102 (15 ~ 190) 176
5440 10:02:18.616990 iDelay=195, Bit 1, Center 108 (23 ~ 194) 172
5441 10:02:18.623258 iDelay=195, Bit 2, Center 102 (15 ~ 190) 176
5442 10:02:18.626601 iDelay=195, Bit 3, Center 102 (15 ~ 190) 176
5443 10:02:18.629888 iDelay=195, Bit 4, Center 106 (19 ~ 194) 176
5444 10:02:18.633492 iDelay=195, Bit 5, Center 98 (11 ~ 186) 176
5445 10:02:18.636760 iDelay=195, Bit 6, Center 110 (27 ~ 194) 168
5446 10:02:18.639791 iDelay=195, Bit 7, Center 110 (27 ~ 194) 168
5447 10:02:18.646944 iDelay=195, Bit 8, Center 86 (3 ~ 170) 168
5448 10:02:18.649714 iDelay=195, Bit 9, Center 86 (3 ~ 170) 168
5449 10:02:18.653779 iDelay=195, Bit 10, Center 94 (11 ~ 178) 168
5450 10:02:18.656983 iDelay=195, Bit 11, Center 90 (11 ~ 170) 160
5451 10:02:18.660696 iDelay=195, Bit 12, Center 100 (19 ~ 182) 164
5452 10:02:18.666748 iDelay=195, Bit 13, Center 98 (15 ~ 182) 168
5453 10:02:18.669790 iDelay=195, Bit 14, Center 104 (19 ~ 190) 172
5454 10:02:18.673110 iDelay=195, Bit 15, Center 104 (23 ~ 186) 164
5455 10:02:18.673508 ==
5456 10:02:18.676453 Dram Type= 6, Freq= 0, CH_0, rank 1
5457 10:02:18.680107 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5458 10:02:18.680529 ==
5459 10:02:18.684158 DQS Delay:
5460 10:02:18.684648 DQS0 = 0, DQS1 = 0
5461 10:02:18.686566 DQM Delay:
5462 10:02:18.686960 DQM0 = 104, DQM1 = 95
5463 10:02:18.687272 DQ Delay:
5464 10:02:18.689588 DQ0 =102, DQ1 =108, DQ2 =102, DQ3 =102
5465 10:02:18.693269 DQ4 =106, DQ5 =98, DQ6 =110, DQ7 =110
5466 10:02:18.696189 DQ8 =86, DQ9 =86, DQ10 =94, DQ11 =90
5467 10:02:18.702908 DQ12 =100, DQ13 =98, DQ14 =104, DQ15 =104
5468 10:02:18.703420
5469 10:02:18.703740
5470 10:02:18.709730 [DQSOSCAuto] RK1, (LSB)MR18= 0x2b03, (MSB)MR19= 0x505, tDQSOscB0 = 421 ps tDQSOscB1 = 408 ps
5471 10:02:18.713322 CH0 RK1: MR19=505, MR18=2B03
5472 10:02:18.719962 CH0_RK1: MR19=0x505, MR18=0x2B03, DQSOSC=408, MR23=63, INC=65, DEC=43
5473 10:02:18.723161 [RxdqsGatingPostProcess] freq 933
5474 10:02:18.726840 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
5475 10:02:18.729586 best DQS0 dly(2T, 0.5T) = (0, 10)
5476 10:02:18.733002 best DQS1 dly(2T, 0.5T) = (0, 10)
5477 10:02:18.736204 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5478 10:02:18.739745 best DQS1 P1 dly(2T, 0.5T) = (0, 14)
5479 10:02:18.743203 best DQS0 dly(2T, 0.5T) = (0, 10)
5480 10:02:18.746716 best DQS1 dly(2T, 0.5T) = (0, 10)
5481 10:02:18.749632 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5482 10:02:18.753007 best DQS1 P1 dly(2T, 0.5T) = (0, 14)
5483 10:02:18.756660 Pre-setting of DQS Precalculation
5484 10:02:18.759977 [DualRankRxdatlatCal] RK0: 11, RK1: 11, Final_Datlat 11
5485 10:02:18.760502 ==
5486 10:02:18.763567 Dram Type= 6, Freq= 0, CH_1, rank 0
5487 10:02:18.769849 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5488 10:02:18.770379 ==
5489 10:02:18.772847 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5490 10:02:18.780398 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37
5491 10:02:18.782902 [CA 0] Center 36 (6~67) winsize 62
5492 10:02:18.786285 [CA 1] Center 37 (6~68) winsize 63
5493 10:02:18.789601 [CA 2] Center 34 (4~65) winsize 62
5494 10:02:18.793560 [CA 3] Center 34 (4~64) winsize 61
5495 10:02:18.797053 [CA 4] Center 34 (4~64) winsize 61
5496 10:02:18.799526 [CA 5] Center 33 (3~64) winsize 62
5497 10:02:18.800053
5498 10:02:18.802696 [CmdBusTrainingLP45] Vref(ca) range 1: 37
5499 10:02:18.803142
5500 10:02:18.806458 [CATrainingPosCal] consider 1 rank data
5501 10:02:18.810056 u2DelayCellTimex100 = 270/100 ps
5502 10:02:18.812797 CA0 delay=36 (6~67),Diff = 3 PI (18 cell)
5503 10:02:18.816289 CA1 delay=37 (6~68),Diff = 4 PI (24 cell)
5504 10:02:18.819964 CA2 delay=34 (4~65),Diff = 1 PI (6 cell)
5505 10:02:18.826377 CA3 delay=34 (4~64),Diff = 1 PI (6 cell)
5506 10:02:18.829261 CA4 delay=34 (4~64),Diff = 1 PI (6 cell)
5507 10:02:18.832615 CA5 delay=33 (3~64),Diff = 0 PI (0 cell)
5508 10:02:18.833174
5509 10:02:18.836156 CA PerBit enable=1, Macro0, CA PI delay=33
5510 10:02:18.836688
5511 10:02:18.839780 [CBTSetCACLKResult] CA Dly = 33
5512 10:02:18.840312 CS Dly: 7 (0~38)
5513 10:02:18.840660 ==
5514 10:02:18.842784 Dram Type= 6, Freq= 0, CH_1, rank 1
5515 10:02:18.849457 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5516 10:02:18.850009 ==
5517 10:02:18.853018 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
5518 10:02:18.859631 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
5519 10:02:18.862925 [CA 0] Center 36 (6~67) winsize 62
5520 10:02:18.865852 [CA 1] Center 37 (6~68) winsize 63
5521 10:02:18.869413 [CA 2] Center 34 (4~65) winsize 62
5522 10:02:18.873069 [CA 3] Center 34 (4~65) winsize 62
5523 10:02:18.876339 [CA 4] Center 34 (4~65) winsize 62
5524 10:02:18.879496 [CA 5] Center 34 (4~64) winsize 61
5525 10:02:18.880031
5526 10:02:18.882785 [CmdBusTrainingLP45] Vref(ca) range 1: 35
5527 10:02:18.883234
5528 10:02:18.886038 [CATrainingPosCal] consider 2 rank data
5529 10:02:18.889421 u2DelayCellTimex100 = 270/100 ps
5530 10:02:18.892773 CA0 delay=36 (6~67),Diff = 2 PI (12 cell)
5531 10:02:18.896105 CA1 delay=37 (6~68),Diff = 3 PI (18 cell)
5532 10:02:18.903037 CA2 delay=34 (4~65),Diff = 0 PI (0 cell)
5533 10:02:18.906384 CA3 delay=34 (4~64),Diff = 0 PI (0 cell)
5534 10:02:18.909101 CA4 delay=34 (4~64),Diff = 0 PI (0 cell)
5535 10:02:18.912958 CA5 delay=34 (4~64),Diff = 0 PI (0 cell)
5536 10:02:18.913388
5537 10:02:18.916097 CA PerBit enable=1, Macro0, CA PI delay=34
5538 10:02:18.916616
5539 10:02:18.919246 [CBTSetCACLKResult] CA Dly = 34
5540 10:02:18.919767 CS Dly: 7 (0~39)
5541 10:02:18.920109
5542 10:02:18.922590 ----->DramcWriteLeveling(PI) begin...
5543 10:02:18.925487 ==
5544 10:02:18.928992 Dram Type= 6, Freq= 0, CH_1, rank 0
5545 10:02:18.932581 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5546 10:02:18.933083 ==
5547 10:02:18.936035 Write leveling (Byte 0): 28 => 28
5548 10:02:18.939263 Write leveling (Byte 1): 28 => 28
5549 10:02:18.942793 DramcWriteLeveling(PI) end<-----
5550 10:02:18.943317
5551 10:02:18.943656 ==
5552 10:02:18.945602 Dram Type= 6, Freq= 0, CH_1, rank 0
5553 10:02:18.948985 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5554 10:02:18.949422 ==
5555 10:02:18.952840 [Gating] SW mode calibration
5556 10:02:18.959161 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5557 10:02:18.965721 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5558 10:02:18.968999 0 14 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5559 10:02:18.972415 0 14 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5560 10:02:18.979085 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5561 10:02:18.982536 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5562 10:02:18.985450 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5563 10:02:18.988951 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5564 10:02:18.995756 0 14 24 | B1->B0 | 3333 2d2d | 1 1 | (1 0) (1 1)
5565 10:02:18.999019 0 14 28 | B1->B0 | 2a2a 2323 | 0 0 | (0 0) (1 0)
5566 10:02:19.002444 0 15 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5567 10:02:19.008659 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5568 10:02:19.012018 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5569 10:02:19.015648 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5570 10:02:19.022313 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5571 10:02:19.025134 0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5572 10:02:19.028714 0 15 24 | B1->B0 | 2727 3434 | 0 0 | (0 0) (0 0)
5573 10:02:19.035228 0 15 28 | B1->B0 | 3a3a 4646 | 0 0 | (0 0) (0 0)
5574 10:02:19.039241 1 0 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5575 10:02:19.041782 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5576 10:02:19.048250 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5577 10:02:19.052098 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5578 10:02:19.055570 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5579 10:02:19.062500 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5580 10:02:19.065141 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
5581 10:02:19.068360 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
5582 10:02:19.075541 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5583 10:02:19.078584 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5584 10:02:19.081829 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5585 10:02:19.088751 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5586 10:02:19.091504 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5587 10:02:19.095429 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5588 10:02:19.101718 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5589 10:02:19.104977 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5590 10:02:19.108528 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5591 10:02:19.114813 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5592 10:02:19.118786 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5593 10:02:19.121563 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5594 10:02:19.128432 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5595 10:02:19.131716 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5596 10:02:19.135271 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5597 10:02:19.138099 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5598 10:02:19.144863 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5599 10:02:19.148429 Total UI for P1: 0, mck2ui 16
5600 10:02:19.151440 best dqsien dly found for B0: ( 1, 2, 26)
5601 10:02:19.154986 Total UI for P1: 0, mck2ui 16
5602 10:02:19.158038 best dqsien dly found for B1: ( 1, 2, 26)
5603 10:02:19.161578 best DQS0 dly(MCK, UI, PI) = (1, 2, 26)
5604 10:02:19.164513 best DQS1 dly(MCK, UI, PI) = (1, 2, 26)
5605 10:02:19.164964
5606 10:02:19.168268 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 26)
5607 10:02:19.171262 best DQS1 P1 dly(MCK, UI, PI) = (1, 6, 26)
5608 10:02:19.174685 [Gating] SW calibration Done
5609 10:02:19.175108 ==
5610 10:02:19.178309 Dram Type= 6, Freq= 0, CH_1, rank 0
5611 10:02:19.181456 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5612 10:02:19.182006 ==
5613 10:02:19.184712 RX Vref Scan: 0
5614 10:02:19.185173
5615 10:02:19.185507 RX Vref 0 -> 0, step: 1
5616 10:02:19.188334
5617 10:02:19.188905 RX Delay -80 -> 252, step: 8
5618 10:02:19.195181 iDelay=208, Bit 0, Center 107 (16 ~ 199) 184
5619 10:02:19.198186 iDelay=208, Bit 1, Center 95 (0 ~ 191) 192
5620 10:02:19.201736 iDelay=208, Bit 2, Center 91 (0 ~ 183) 184
5621 10:02:19.204544 iDelay=208, Bit 3, Center 99 (8 ~ 191) 184
5622 10:02:19.208323 iDelay=208, Bit 4, Center 99 (8 ~ 191) 184
5623 10:02:19.211270 iDelay=208, Bit 5, Center 111 (16 ~ 207) 192
5624 10:02:19.218399 iDelay=208, Bit 6, Center 111 (16 ~ 207) 192
5625 10:02:19.221455 iDelay=208, Bit 7, Center 103 (8 ~ 199) 192
5626 10:02:19.224555 iDelay=208, Bit 8, Center 87 (0 ~ 175) 176
5627 10:02:19.228025 iDelay=208, Bit 9, Center 87 (0 ~ 175) 176
5628 10:02:19.231211 iDelay=208, Bit 10, Center 99 (8 ~ 191) 184
5629 10:02:19.234242 iDelay=208, Bit 11, Center 91 (0 ~ 183) 184
5630 10:02:19.240943 iDelay=208, Bit 12, Center 107 (16 ~ 199) 184
5631 10:02:19.244996 iDelay=208, Bit 13, Center 103 (16 ~ 191) 176
5632 10:02:19.247800 iDelay=208, Bit 14, Center 103 (16 ~ 191) 176
5633 10:02:19.251639 iDelay=208, Bit 15, Center 107 (16 ~ 199) 184
5634 10:02:19.252166 ==
5635 10:02:19.254480 Dram Type= 6, Freq= 0, CH_1, rank 0
5636 10:02:19.260977 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5637 10:02:19.261514 ==
5638 10:02:19.261974 DQS Delay:
5639 10:02:19.262311 DQS0 = 0, DQS1 = 0
5640 10:02:19.264720 DQM Delay:
5641 10:02:19.265173 DQM0 = 102, DQM1 = 98
5642 10:02:19.267806 DQ Delay:
5643 10:02:19.270919 DQ0 =107, DQ1 =95, DQ2 =91, DQ3 =99
5644 10:02:19.274062 DQ4 =99, DQ5 =111, DQ6 =111, DQ7 =103
5645 10:02:19.277741 DQ8 =87, DQ9 =87, DQ10 =99, DQ11 =91
5646 10:02:19.281002 DQ12 =107, DQ13 =103, DQ14 =103, DQ15 =107
5647 10:02:19.281593
5648 10:02:19.281940
5649 10:02:19.282261 ==
5650 10:02:19.284395 Dram Type= 6, Freq= 0, CH_1, rank 0
5651 10:02:19.287720 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5652 10:02:19.288151 ==
5653 10:02:19.288491
5654 10:02:19.288848
5655 10:02:19.290854 TX Vref Scan disable
5656 10:02:19.294773 == TX Byte 0 ==
5657 10:02:19.297355 Update DQ dly =711 (2 ,5, 39) DQ OEN =(2 ,2)
5658 10:02:19.301401 Update DQM dly =711 (2 ,5, 39) DQM OEN =(2 ,2)
5659 10:02:19.304155 == TX Byte 1 ==
5660 10:02:19.307704 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5661 10:02:19.310878 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5662 10:02:19.311474 ==
5663 10:02:19.314256 Dram Type= 6, Freq= 0, CH_1, rank 0
5664 10:02:19.317338 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5665 10:02:19.320749 ==
5666 10:02:19.321203
5667 10:02:19.321540
5668 10:02:19.321854 TX Vref Scan disable
5669 10:02:19.324376 == TX Byte 0 ==
5670 10:02:19.327504 Update DQ dly =711 (2 ,5, 39) DQ OEN =(2 ,2)
5671 10:02:19.334596 Update DQM dly =711 (2 ,5, 39) DQM OEN =(2 ,2)
5672 10:02:19.335139 == TX Byte 1 ==
5673 10:02:19.337948 Update DQ dly =710 (2 ,5, 38) DQ OEN =(2 ,2)
5674 10:02:19.344570 Update DQM dly =710 (2 ,5, 38) DQM OEN =(2 ,2)
5675 10:02:19.345142
5676 10:02:19.345489 [DATLAT]
5677 10:02:19.345807 Freq=933, CH1 RK0
5678 10:02:19.346118
5679 10:02:19.348085 DATLAT Default: 0xd
5680 10:02:19.348604 0, 0xFFFF, sum = 0
5681 10:02:19.350744 1, 0xFFFF, sum = 0
5682 10:02:19.351272 2, 0xFFFF, sum = 0
5683 10:02:19.354991 3, 0xFFFF, sum = 0
5684 10:02:19.357593 4, 0xFFFF, sum = 0
5685 10:02:19.358031 5, 0xFFFF, sum = 0
5686 10:02:19.360708 6, 0xFFFF, sum = 0
5687 10:02:19.361228 7, 0xFFFF, sum = 0
5688 10:02:19.363868 8, 0xFFFF, sum = 0
5689 10:02:19.364300 9, 0xFFFF, sum = 0
5690 10:02:19.367375 10, 0x0, sum = 1
5691 10:02:19.367811 11, 0x0, sum = 2
5692 10:02:19.371292 12, 0x0, sum = 3
5693 10:02:19.371828 13, 0x0, sum = 4
5694 10:02:19.372180 best_step = 11
5695 10:02:19.372498
5696 10:02:19.374066 ==
5697 10:02:19.377632 Dram Type= 6, Freq= 0, CH_1, rank 0
5698 10:02:19.380638 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5699 10:02:19.381161 ==
5700 10:02:19.381506 RX Vref Scan: 1
5701 10:02:19.381843
5702 10:02:19.384534 RX Vref 0 -> 0, step: 1
5703 10:02:19.384984
5704 10:02:19.387479 RX Delay -45 -> 252, step: 4
5705 10:02:19.387926
5706 10:02:19.391122 Set Vref, RX VrefLevel [Byte0]: 50
5707 10:02:19.394586 [Byte1]: 54
5708 10:02:19.395115
5709 10:02:19.397493 Final RX Vref Byte 0 = 50 to rank0
5710 10:02:19.401326 Final RX Vref Byte 1 = 54 to rank0
5711 10:02:19.404038 Final RX Vref Byte 0 = 50 to rank1
5712 10:02:19.407808 Final RX Vref Byte 1 = 54 to rank1==
5713 10:02:19.411141 Dram Type= 6, Freq= 0, CH_1, rank 0
5714 10:02:19.414214 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5715 10:02:19.414644 ==
5716 10:02:19.417309 DQS Delay:
5717 10:02:19.417730 DQS0 = 0, DQS1 = 0
5718 10:02:19.421010 DQM Delay:
5719 10:02:19.421530 DQM0 = 103, DQM1 = 99
5720 10:02:19.421870 DQ Delay:
5721 10:02:19.424711 DQ0 =108, DQ1 =96, DQ2 =92, DQ3 =100
5722 10:02:19.427703 DQ4 =102, DQ5 =112, DQ6 =112, DQ7 =102
5723 10:02:19.431116 DQ8 =92, DQ9 =92, DQ10 =100, DQ11 =94
5724 10:02:19.437628 DQ12 =104, DQ13 =104, DQ14 =106, DQ15 =106
5725 10:02:19.438144
5726 10:02:19.438482
5727 10:02:19.444449 [DQSOSCAuto] RK0, (LSB)MR18= 0x1a32, (MSB)MR19= 0x505, tDQSOscB0 = 406 ps tDQSOscB1 = 413 ps
5728 10:02:19.447782 CH1 RK0: MR19=505, MR18=1A32
5729 10:02:19.454189 CH1_RK0: MR19=0x505, MR18=0x1A32, DQSOSC=406, MR23=63, INC=65, DEC=43
5730 10:02:19.454716
5731 10:02:19.457515 ----->DramcWriteLeveling(PI) begin...
5732 10:02:19.457946 ==
5733 10:02:19.460896 Dram Type= 6, Freq= 0, CH_1, rank 1
5734 10:02:19.464366 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5735 10:02:19.464795 ==
5736 10:02:19.466991 Write leveling (Byte 0): 27 => 27
5737 10:02:19.470656 Write leveling (Byte 1): 27 => 27
5738 10:02:19.473924 DramcWriteLeveling(PI) end<-----
5739 10:02:19.474342
5740 10:02:19.474673 ==
5741 10:02:19.477484 Dram Type= 6, Freq= 0, CH_1, rank 1
5742 10:02:19.480527 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5743 10:02:19.481097 ==
5744 10:02:19.484227 [Gating] SW mode calibration
5745 10:02:19.490947 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0
5746 10:02:19.497543 RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)
5747 10:02:19.500557 0 14 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5748 10:02:19.507579 0 14 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5749 10:02:19.510645 0 14 8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5750 10:02:19.513861 0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5751 10:02:19.517309 0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5752 10:02:19.523750 0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
5753 10:02:19.527003 0 14 24 | B1->B0 | 3030 3333 | 0 0 | (0 1) (0 1)
5754 10:02:19.530817 0 14 28 | B1->B0 | 2323 2525 | 0 0 | (1 0) (0 0)
5755 10:02:19.537323 0 15 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5756 10:02:19.540641 0 15 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5757 10:02:19.544201 0 15 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5758 10:02:19.550731 0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5759 10:02:19.553674 0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
5760 10:02:19.557138 0 15 20 | B1->B0 | 2424 2323 | 0 0 | (0 0) (0 0)
5761 10:02:19.564186 0 15 24 | B1->B0 | 3636 2a2a | 0 0 | (0 0) (0 0)
5762 10:02:19.567245 0 15 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5763 10:02:19.570556 1 0 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5764 10:02:19.577306 1 0 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5765 10:02:19.581168 1 0 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5766 10:02:19.584280 1 0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5767 10:02:19.590638 1 0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5768 10:02:19.593983 1 0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5769 10:02:19.597233 1 0 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5770 10:02:19.603907 1 0 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5771 10:02:19.607118 1 1 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5772 10:02:19.610908 1 1 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5773 10:02:19.617550 1 1 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5774 10:02:19.620459 1 1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5775 10:02:19.623817 1 1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5776 10:02:19.630686 1 1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5777 10:02:19.633652 1 1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5778 10:02:19.636948 1 1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5779 10:02:19.643523 1 2 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5780 10:02:19.646674 1 2 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5781 10:02:19.650570 1 2 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5782 10:02:19.653282 1 2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5783 10:02:19.660664 1 2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
5784 10:02:19.663723 1 2 20 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 1)
5785 10:02:19.667069 1 2 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
5786 10:02:19.673758 1 2 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)
5787 10:02:19.676611 Total UI for P1: 0, mck2ui 16
5788 10:02:19.679919 best dqsien dly found for B1: ( 1, 2, 22)
5789 10:02:19.683977 1 3 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
5790 10:02:19.686567 Total UI for P1: 0, mck2ui 16
5791 10:02:19.690120 best dqsien dly found for B0: ( 1, 2, 26)
5792 10:02:19.693226 best DQS0 dly(MCK, UI, PI) = (1, 2, 26)
5793 10:02:19.696938 best DQS1 dly(MCK, UI, PI) = (1, 2, 22)
5794 10:02:19.697463
5795 10:02:19.700102 best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 26)
5796 10:02:19.703841 best DQS1 P1 dly(MCK, UI, PI) = (1, 6, 22)
5797 10:02:19.706900 [Gating] SW calibration Done
5798 10:02:19.707427 ==
5799 10:02:19.710651 Dram Type= 6, Freq= 0, CH_1, rank 1
5800 10:02:19.714140 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5801 10:02:19.716992 ==
5802 10:02:19.717537 RX Vref Scan: 0
5803 10:02:19.717878
5804 10:02:19.720081 RX Vref 0 -> 0, step: 1
5805 10:02:19.720501
5806 10:02:19.723685 RX Delay -80 -> 252, step: 8
5807 10:02:19.726767 iDelay=208, Bit 0, Center 107 (16 ~ 199) 184
5808 10:02:19.730670 iDelay=208, Bit 1, Center 99 (8 ~ 191) 184
5809 10:02:19.733555 iDelay=208, Bit 2, Center 87 (0 ~ 175) 176
5810 10:02:19.736470 iDelay=208, Bit 3, Center 99 (8 ~ 191) 184
5811 10:02:19.740250 iDelay=208, Bit 4, Center 95 (8 ~ 183) 176
5812 10:02:19.747061 iDelay=208, Bit 5, Center 115 (24 ~ 207) 184
5813 10:02:19.749867 iDelay=208, Bit 6, Center 115 (24 ~ 207) 184
5814 10:02:19.753389 iDelay=208, Bit 7, Center 99 (8 ~ 191) 184
5815 10:02:19.756687 iDelay=208, Bit 8, Center 87 (0 ~ 175) 176
5816 10:02:19.760176 iDelay=208, Bit 9, Center 91 (0 ~ 183) 184
5817 10:02:19.763068 iDelay=208, Bit 10, Center 99 (8 ~ 191) 184
5818 10:02:19.769695 iDelay=208, Bit 11, Center 91 (0 ~ 183) 184
5819 10:02:19.773296 iDelay=208, Bit 12, Center 103 (8 ~ 199) 192
5820 10:02:19.776544 iDelay=208, Bit 13, Center 107 (16 ~ 199) 184
5821 10:02:19.780092 iDelay=208, Bit 14, Center 99 (8 ~ 191) 184
5822 10:02:19.783395 iDelay=208, Bit 15, Center 107 (16 ~ 199) 184
5823 10:02:19.783921 ==
5824 10:02:19.786285 Dram Type= 6, Freq= 0, CH_1, rank 1
5825 10:02:19.793235 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5826 10:02:19.793760 ==
5827 10:02:19.794104 DQS Delay:
5828 10:02:19.796788 DQS0 = 0, DQS1 = 0
5829 10:02:19.797365 DQM Delay:
5830 10:02:19.797714 DQM0 = 102, DQM1 = 98
5831 10:02:19.800486 DQ Delay:
5832 10:02:19.803451 DQ0 =107, DQ1 =99, DQ2 =87, DQ3 =99
5833 10:02:19.806188 DQ4 =95, DQ5 =115, DQ6 =115, DQ7 =99
5834 10:02:19.810201 DQ8 =87, DQ9 =91, DQ10 =99, DQ11 =91
5835 10:02:19.813310 DQ12 =103, DQ13 =107, DQ14 =99, DQ15 =107
5836 10:02:19.813836
5837 10:02:19.814171
5838 10:02:19.814481 ==
5839 10:02:19.816132 Dram Type= 6, Freq= 0, CH_1, rank 1
5840 10:02:19.820042 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5841 10:02:19.820577 ==
5842 10:02:19.820975
5843 10:02:19.821293
5844 10:02:19.823436 TX Vref Scan disable
5845 10:02:19.826301 == TX Byte 0 ==
5846 10:02:19.829290 Update DQ dly =712 (2 ,5, 40) DQ OEN =(2 ,2)
5847 10:02:19.832732 Update DQM dly =712 (2 ,5, 40) DQM OEN =(2 ,2)
5848 10:02:19.836397 == TX Byte 1 ==
5849 10:02:19.839752 Update DQ dly =709 (2 ,5, 37) DQ OEN =(2 ,2)
5850 10:02:19.843503 Update DQM dly =709 (2 ,5, 37) DQM OEN =(2 ,2)
5851 10:02:19.844032 ==
5852 10:02:19.846290 Dram Type= 6, Freq= 0, CH_1, rank 1
5853 10:02:19.850203 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5854 10:02:19.852888 ==
5855 10:02:19.853314
5856 10:02:19.853648
5857 10:02:19.853960 TX Vref Scan disable
5858 10:02:19.856531 == TX Byte 0 ==
5859 10:02:19.860417 Update DQ dly =711 (2 ,5, 39) DQ OEN =(2 ,2)
5860 10:02:19.867099 Update DQM dly =711 (2 ,5, 39) DQM OEN =(2 ,2)
5861 10:02:19.867621 == TX Byte 1 ==
5862 10:02:19.870041 Update DQ dly =708 (2 ,5, 36) DQ OEN =(2 ,2)
5863 10:02:19.876800 Update DQM dly =708 (2 ,5, 36) DQM OEN =(2 ,2)
5864 10:02:19.877358
5865 10:02:19.877687 [DATLAT]
5866 10:02:19.877994 Freq=933, CH1 RK1
5867 10:02:19.878295
5868 10:02:19.879920 DATLAT Default: 0xb
5869 10:02:19.880429 0, 0xFFFF, sum = 0
5870 10:02:19.883629 1, 0xFFFF, sum = 0
5871 10:02:19.884173 2, 0xFFFF, sum = 0
5872 10:02:19.886781 3, 0xFFFF, sum = 0
5873 10:02:19.890329 4, 0xFFFF, sum = 0
5874 10:02:19.890859 5, 0xFFFF, sum = 0
5875 10:02:19.893030 6, 0xFFFF, sum = 0
5876 10:02:19.893452 7, 0xFFFF, sum = 0
5877 10:02:19.896933 8, 0xFFFF, sum = 0
5878 10:02:19.897453 9, 0xFFFF, sum = 0
5879 10:02:19.900125 10, 0x0, sum = 1
5880 10:02:19.900652 11, 0x0, sum = 2
5881 10:02:19.902847 12, 0x0, sum = 3
5882 10:02:19.903374 13, 0x0, sum = 4
5883 10:02:19.903741 best_step = 11
5884 10:02:19.904069
5885 10:02:19.906270 ==
5886 10:02:19.910194 Dram Type= 6, Freq= 0, CH_1, rank 1
5887 10:02:19.913314 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5888 10:02:19.913837 ==
5889 10:02:19.914173 RX Vref Scan: 0
5890 10:02:19.914482
5891 10:02:19.916935 RX Vref 0 -> 0, step: 1
5892 10:02:19.917464
5893 10:02:19.919933 RX Delay -45 -> 252, step: 4
5894 10:02:19.923035 iDelay=199, Bit 0, Center 108 (27 ~ 190) 164
5895 10:02:19.929318 iDelay=199, Bit 1, Center 100 (19 ~ 182) 164
5896 10:02:19.933034 iDelay=199, Bit 2, Center 94 (11 ~ 178) 168
5897 10:02:19.936640 iDelay=199, Bit 3, Center 100 (19 ~ 182) 164
5898 10:02:19.939661 iDelay=199, Bit 4, Center 98 (19 ~ 178) 160
5899 10:02:19.943076 iDelay=199, Bit 5, Center 116 (35 ~ 198) 164
5900 10:02:19.950164 iDelay=199, Bit 6, Center 114 (31 ~ 198) 168
5901 10:02:19.953248 iDelay=199, Bit 7, Center 102 (19 ~ 186) 168
5902 10:02:19.956274 iDelay=199, Bit 8, Center 90 (7 ~ 174) 168
5903 10:02:19.959914 iDelay=199, Bit 9, Center 92 (7 ~ 178) 172
5904 10:02:19.963134 iDelay=199, Bit 10, Center 100 (15 ~ 186) 172
5905 10:02:19.966342 iDelay=199, Bit 11, Center 92 (7 ~ 178) 172
5906 10:02:19.973071 iDelay=199, Bit 12, Center 110 (23 ~ 198) 176
5907 10:02:19.976452 iDelay=199, Bit 13, Center 106 (23 ~ 190) 168
5908 10:02:19.979284 iDelay=199, Bit 14, Center 106 (27 ~ 186) 160
5909 10:02:19.983142 iDelay=199, Bit 15, Center 108 (23 ~ 194) 172
5910 10:02:19.983656 ==
5911 10:02:19.985842 Dram Type= 6, Freq= 0, CH_1, rank 1
5912 10:02:19.993107 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1
5913 10:02:19.993629 ==
5914 10:02:19.993971 DQS Delay:
5915 10:02:19.996073 DQS0 = 0, DQS1 = 0
5916 10:02:19.996606 DQM Delay:
5917 10:02:19.997005 DQM0 = 104, DQM1 = 100
5918 10:02:19.999971 DQ Delay:
5919 10:02:20.002677 DQ0 =108, DQ1 =100, DQ2 =94, DQ3 =100
5920 10:02:20.005933 DQ4 =98, DQ5 =116, DQ6 =114, DQ7 =102
5921 10:02:20.009468 DQ8 =90, DQ9 =92, DQ10 =100, DQ11 =92
5922 10:02:20.012641 DQ12 =110, DQ13 =106, DQ14 =106, DQ15 =108
5923 10:02:20.013095
5924 10:02:20.013433
5925 10:02:20.022926 [DQSOSCAuto] RK1, (LSB)MR18= 0x3003, (MSB)MR19= 0x505, tDQSOscB0 = 421 ps tDQSOscB1 = 406 ps
5926 10:02:20.023454 CH1 RK1: MR19=505, MR18=3003
5927 10:02:20.029527 CH1_RK1: MR19=0x505, MR18=0x3003, DQSOSC=406, MR23=63, INC=65, DEC=43
5928 10:02:20.032733 [RxdqsGatingPostProcess] freq 933
5929 10:02:20.039125 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2
5930 10:02:20.042875 best DQS0 dly(2T, 0.5T) = (0, 10)
5931 10:02:20.045900 best DQS1 dly(2T, 0.5T) = (0, 10)
5932 10:02:20.049633 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5933 10:02:20.050289 best DQS1 P1 dly(2T, 0.5T) = (0, 14)
5934 10:02:20.052516 best DQS0 dly(2T, 0.5T) = (0, 10)
5935 10:02:20.056328 best DQS1 dly(2T, 0.5T) = (0, 10)
5936 10:02:20.059122 best DQS0 P1 dly(2T, 0.5T) = (0, 14)
5937 10:02:20.062570 best DQS1 P1 dly(2T, 0.5T) = (0, 14)
5938 10:02:20.066182 Pre-setting of DQS Precalculation
5939 10:02:20.073082 [DualRankRxdatlatCal] RK0: 11, RK1: 11, Final_Datlat 11
5940 10:02:20.079147 sync_frequency_calibration_params sync calibration params of frequency 933 to shu:3
5941 10:02:20.085533 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
5942 10:02:20.086045
5943 10:02:20.086379
5944 10:02:20.089254 [Calibration Summary] 1866 Mbps
5945 10:02:20.089675 CH 0, Rank 0
5946 10:02:20.092431 SW Impedance : PASS
5947 10:02:20.095676 DUTY Scan : NO K
5948 10:02:20.096187 ZQ Calibration : PASS
5949 10:02:20.099314 Jitter Meter : NO K
5950 10:02:20.102680 CBT Training : PASS
5951 10:02:20.103199 Write leveling : PASS
5952 10:02:20.105702 RX DQS gating : PASS
5953 10:02:20.109151 RX DQ/DQS(RDDQC) : PASS
5954 10:02:20.109574 TX DQ/DQS : PASS
5955 10:02:20.112670 RX DATLAT : PASS
5956 10:02:20.113215 RX DQ/DQS(Engine): PASS
5957 10:02:20.115911 TX OE : NO K
5958 10:02:20.116335 All Pass.
5959 10:02:20.116671
5960 10:02:20.119099 CH 0, Rank 1
5961 10:02:20.119615 SW Impedance : PASS
5962 10:02:20.122237 DUTY Scan : NO K
5963 10:02:20.126127 ZQ Calibration : PASS
5964 10:02:20.126643 Jitter Meter : NO K
5965 10:02:20.129144 CBT Training : PASS
5966 10:02:20.132835 Write leveling : PASS
5967 10:02:20.133362 RX DQS gating : PASS
5968 10:02:20.135789 RX DQ/DQS(RDDQC) : PASS
5969 10:02:20.139450 TX DQ/DQS : PASS
5970 10:02:20.139880 RX DATLAT : PASS
5971 10:02:20.142534 RX DQ/DQS(Engine): PASS
5972 10:02:20.145626 TX OE : NO K
5973 10:02:20.146052 All Pass.
5974 10:02:20.146390
5975 10:02:20.146700 CH 1, Rank 0
5976 10:02:20.149285 SW Impedance : PASS
5977 10:02:20.152149 DUTY Scan : NO K
5978 10:02:20.152667 ZQ Calibration : PASS
5979 10:02:20.156374 Jitter Meter : NO K
5980 10:02:20.158778 CBT Training : PASS
5981 10:02:20.159200 Write leveling : PASS
5982 10:02:20.161964 RX DQS gating : PASS
5983 10:02:20.162385 RX DQ/DQS(RDDQC) : PASS
5984 10:02:20.165381 TX DQ/DQS : PASS
5985 10:02:20.169480 RX DATLAT : PASS
5986 10:02:20.170012 RX DQ/DQS(Engine): PASS
5987 10:02:20.172739 TX OE : NO K
5988 10:02:20.173292 All Pass.
5989 10:02:20.173632
5990 10:02:20.175354 CH 1, Rank 1
5991 10:02:20.175776 SW Impedance : PASS
5992 10:02:20.179003 DUTY Scan : NO K
5993 10:02:20.182158 ZQ Calibration : PASS
5994 10:02:20.182681 Jitter Meter : NO K
5995 10:02:20.185369 CBT Training : PASS
5996 10:02:20.188969 Write leveling : PASS
5997 10:02:20.189643 RX DQS gating : PASS
5998 10:02:20.192157 RX DQ/DQS(RDDQC) : PASS
5999 10:02:20.195194 TX DQ/DQS : PASS
6000 10:02:20.195618 RX DATLAT : PASS
6001 10:02:20.199126 RX DQ/DQS(Engine): PASS
6002 10:02:20.202200 TX OE : NO K
6003 10:02:20.202738 All Pass.
6004 10:02:20.203078
6005 10:02:20.203388 DramC Write-DBI off
6006 10:02:20.205336 PER_BANK_REFRESH: Hybrid Mode
6007 10:02:20.209076 TX_TRACKING: ON
6008 10:02:20.215551 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 53, TRFC_05T 1, TXREFCNT 68, TRFCpb 21, TRFCpb_05T 0
6009 10:02:20.218446 [FAST_K] Save calibration result to emmc
6010 10:02:20.225427 dramc_set_vcore_voltage set vcore to 650000
6011 10:02:20.225956 Read voltage for 400, 6
6012 10:02:20.228509 Vio18 = 0
6013 10:02:20.229071 Vcore = 650000
6014 10:02:20.229417 Vdram = 0
6015 10:02:20.232169 Vddq = 0
6016 10:02:20.232592 Vmddr = 0
6017 10:02:20.235502 [FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=0
6018 10:02:20.242090 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
6019 10:02:20.245257 MEM_TYPE=3, freq_sel=20
6020 10:02:20.245779 sv_algorithm_assistance_LP4_800
6021 10:02:20.252588 ============ PULL DRAM RESETB DOWN ============
6022 10:02:20.255216 ========== PULL DRAM RESETB DOWN end =========
6023 10:02:20.258546 [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2
6024 10:02:20.261808 ===================================
6025 10:02:20.264923 LPDDR4 DRAM CONFIGURATION
6026 10:02:20.268751 ===================================
6027 10:02:20.271718 EX_ROW_EN[0] = 0x0
6028 10:02:20.272244 EX_ROW_EN[1] = 0x0
6029 10:02:20.275389 LP4Y_EN = 0x0
6030 10:02:20.275907 WORK_FSP = 0x0
6031 10:02:20.278916 WL = 0x2
6032 10:02:20.279439 RL = 0x2
6033 10:02:20.281479 BL = 0x2
6034 10:02:20.281904 RPST = 0x0
6035 10:02:20.285665 RD_PRE = 0x0
6036 10:02:20.286189 WR_PRE = 0x1
6037 10:02:20.288324 WR_PST = 0x0
6038 10:02:20.288896 DBI_WR = 0x0
6039 10:02:20.292191 DBI_RD = 0x0
6040 10:02:20.292710 OTF = 0x1
6041 10:02:20.294789 ===================================
6042 10:02:20.298406 ===================================
6043 10:02:20.302052 ANA top config
6044 10:02:20.304905 ===================================
6045 10:02:20.308380 DLL_ASYNC_EN = 0
6046 10:02:20.308833 ALL_SLAVE_EN = 1
6047 10:02:20.311415 NEW_RANK_MODE = 1
6048 10:02:20.315428 DLL_IDLE_MODE = 1
6049 10:02:20.318235 LP45_APHY_COMB_EN = 1
6050 10:02:20.322132 TX_ODT_DIS = 1
6051 10:02:20.322657 NEW_8X_MODE = 1
6052 10:02:20.324904 ===================================
6053 10:02:20.328638 ===================================
6054 10:02:20.331456 data_rate = 800
6055 10:02:20.335004 CKR = 1
6056 10:02:20.338555 DQ_P2S_RATIO = 4
6057 10:02:20.341247 ===================================
6058 10:02:20.345340 CA_P2S_RATIO = 4
6059 10:02:20.345859 DQ_CA_OPEN = 0
6060 10:02:20.347974 DQ_SEMI_OPEN = 1
6061 10:02:20.351583 CA_SEMI_OPEN = 1
6062 10:02:20.354886 CA_FULL_RATE = 0
6063 10:02:20.358346 DQ_CKDIV4_EN = 0
6064 10:02:20.361441 CA_CKDIV4_EN = 1
6065 10:02:20.361861 CA_PREDIV_EN = 0
6066 10:02:20.364564 PH8_DLY = 0
6067 10:02:20.368908 SEMI_OPEN_CA_PICK_MCK_RATIO= 4
6068 10:02:20.371313 DQ_AAMCK_DIV = 0
6069 10:02:20.374708 CA_AAMCK_DIV = 0
6070 10:02:20.377919 CA_ADMCK_DIV = 4
6071 10:02:20.378339 DQ_TRACK_CA_EN = 0
6072 10:02:20.381330 CA_PICK = 800
6073 10:02:20.384560 CA_MCKIO = 400
6074 10:02:20.388094 MCKIO_SEMI = 400
6075 10:02:20.391898 PLL_FREQ = 3016
6076 10:02:20.394752 DQ_UI_PI_RATIO = 32
6077 10:02:20.398300 CA_UI_PI_RATIO = 32
6078 10:02:20.401608 ===================================
6079 10:02:20.404889 ===================================
6080 10:02:20.405460 memory_type:LPDDR4
6081 10:02:20.407711 GP_NUM : 10
6082 10:02:20.411021 SRAM_EN : 1
6083 10:02:20.411441 MD32_EN : 0
6084 10:02:20.415257 ===================================
6085 10:02:20.417904 [ANA_INIT] >>>>>>>>>>>>>>
6086 10:02:20.421631 <<<<<< [CONFIGURE PHASE]: ANA_TX
6087 10:02:20.424561 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
6088 10:02:20.428209 ===================================
6089 10:02:20.431068 data_rate = 800,PCW = 0X7400
6090 10:02:20.435280 ===================================
6091 10:02:20.437878 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
6092 10:02:20.441299 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
6093 10:02:20.454284 WARN: tr->DQ_AAMCK_DIV= 0, Because of DQ_SEMI_OPEN, It's don't care.<<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
6094 10:02:20.458030 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
6095 10:02:20.461011 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
6096 10:02:20.464560 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
6097 10:02:20.467894 [ANA_INIT] flow start
6098 10:02:20.471182 [ANA_INIT] PLL >>>>>>>>
6099 10:02:20.471606 [ANA_INIT] PLL <<<<<<<<
6100 10:02:20.474198 [ANA_INIT] MIDPI >>>>>>>>
6101 10:02:20.477856 [ANA_INIT] MIDPI <<<<<<<<
6102 10:02:20.478279 [ANA_INIT] DLL >>>>>>>>
6103 10:02:20.480842 [ANA_INIT] flow end
6104 10:02:20.484375 ============ LP4 DIFF to SE enter ============
6105 10:02:20.487550 ============ LP4 DIFF to SE exit ============
6106 10:02:20.491713 [ANA_INIT] <<<<<<<<<<<<<
6107 10:02:20.494250 [Flow] Enable top DCM control >>>>>
6108 10:02:20.497419 [Flow] Enable top DCM control <<<<<
6109 10:02:20.501255 Enable DLL master slave shuffle
6110 10:02:20.507678 ==============================================================
6111 10:02:20.508230 Gating Mode config
6112 10:02:20.514626 ==============================================================
6113 10:02:20.515161 Config description:
6114 10:02:20.524248 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
6115 10:02:20.531063 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
6116 10:02:20.537596 SELPH_MODE 0: By rank 1: By Phase
6117 10:02:20.540940 ==============================================================
6118 10:02:20.544412 GAT_TRACK_EN = 0
6119 10:02:20.547754 RX_GATING_MODE = 2
6120 10:02:20.551061 RX_GATING_TRACK_MODE = 2
6121 10:02:20.553740 SELPH_MODE = 1
6122 10:02:20.557317 PICG_EARLY_EN = 1
6123 10:02:20.561074 VALID_LAT_VALUE = 1
6124 10:02:20.567289 ==============================================================
6125 10:02:20.571188 Enter into Gating configuration >>>>
6126 10:02:20.574255 Exit from Gating configuration <<<<
6127 10:02:20.574680 Enter into DVFS_PRE_config >>>>>
6128 10:02:20.587257 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
6129 10:02:20.590913 Exit from DVFS_PRE_config <<<<<
6130 10:02:20.593703 Enter into PICG configuration >>>>
6131 10:02:20.597541 Exit from PICG configuration <<<<
6132 10:02:20.598005 [RX_INPUT] configuration >>>>>
6133 10:02:20.600594 [RX_INPUT] configuration <<<<<
6134 10:02:20.607289 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
6135 10:02:20.610472 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
6136 10:02:20.617159 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
6137 10:02:20.623635 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
6138 10:02:20.630884 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
6139 10:02:20.637314 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
6140 10:02:20.640254 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
6141 10:02:20.643929 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
6142 10:02:20.650841 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
6143 10:02:20.653718 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
6144 10:02:20.657020 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
6145 10:02:20.660963 [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2
6146 10:02:20.663889 ===================================
6147 10:02:20.667249 LPDDR4 DRAM CONFIGURATION
6148 10:02:20.670858 ===================================
6149 10:02:20.673717 EX_ROW_EN[0] = 0x0
6150 10:02:20.674160 EX_ROW_EN[1] = 0x0
6151 10:02:20.677183 LP4Y_EN = 0x0
6152 10:02:20.677653 WORK_FSP = 0x0
6153 10:02:20.680697 WL = 0x2
6154 10:02:20.681173 RL = 0x2
6155 10:02:20.683659 BL = 0x2
6156 10:02:20.684085 RPST = 0x0
6157 10:02:20.686724 RD_PRE = 0x0
6158 10:02:20.687157 WR_PRE = 0x1
6159 10:02:20.690156 WR_PST = 0x0
6160 10:02:20.690585 DBI_WR = 0x0
6161 10:02:20.693688 DBI_RD = 0x0
6162 10:02:20.694136 OTF = 0x1
6163 10:02:20.696959 ===================================
6164 10:02:20.703395 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
6165 10:02:20.707216 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
6166 10:02:20.710401 [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2
6167 10:02:20.713256 ===================================
6168 10:02:20.716318 LPDDR4 DRAM CONFIGURATION
6169 10:02:20.720225 ===================================
6170 10:02:20.723128 EX_ROW_EN[0] = 0x10
6171 10:02:20.723556 EX_ROW_EN[1] = 0x0
6172 10:02:20.726619 LP4Y_EN = 0x0
6173 10:02:20.727044 WORK_FSP = 0x0
6174 10:02:20.730414 WL = 0x2
6175 10:02:20.730907 RL = 0x2
6176 10:02:20.733746 BL = 0x2
6177 10:02:20.734175 RPST = 0x0
6178 10:02:20.736628 RD_PRE = 0x0
6179 10:02:20.737074 WR_PRE = 0x1
6180 10:02:20.739807 WR_PST = 0x0
6181 10:02:20.740234 DBI_WR = 0x0
6182 10:02:20.743226 DBI_RD = 0x0
6183 10:02:20.743660 OTF = 0x1
6184 10:02:20.746473 ===================================
6185 10:02:20.753156 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
6186 10:02:20.758154 nWR fixed to 30
6187 10:02:20.761887 [ModeRegInit_LP4] CH0 RK0
6188 10:02:20.762314 [ModeRegInit_LP4] CH0 RK1
6189 10:02:20.764577 [ModeRegInit_LP4] CH1 RK0
6190 10:02:20.768732 [ModeRegInit_LP4] CH1 RK1
6191 10:02:20.769310 match AC timing 19
6192 10:02:20.774832 dramType 5, freq 400, readDBI 0, DivMode 2, cbtMode 1
6193 10:02:20.778464 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
6194 10:02:20.781672 [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8
6195 10:02:20.788388 [TX_path_calculate] data rate=800, WL=8, DQS_TotalUI=17
6196 10:02:20.791039 [TX_path_calculate] DQS = (4,1) DQS_OE = (3,2)
6197 10:02:20.791538 ==
6198 10:02:20.794456 Dram Type= 6, Freq= 0, CH_0, rank 0
6199 10:02:20.797833 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6200 10:02:20.798281 ==
6201 10:02:20.804465 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6202 10:02:20.811046 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
6203 10:02:20.814585 [CA 0] Center 36 (8~64) winsize 57
6204 10:02:20.817457 [CA 1] Center 36 (8~64) winsize 57
6205 10:02:20.821466 [CA 2] Center 36 (8~64) winsize 57
6206 10:02:20.821993 [CA 3] Center 36 (8~64) winsize 57
6207 10:02:20.824628 [CA 4] Center 36 (8~64) winsize 57
6208 10:02:20.827598 [CA 5] Center 36 (8~64) winsize 57
6209 10:02:20.828020
6210 10:02:20.834573 [CmdBusTrainingLP45] Vref(ca) range 1: 35
6211 10:02:20.834997
6212 10:02:20.837655 [CATrainingPosCal] consider 1 rank data
6213 10:02:20.841064 u2DelayCellTimex100 = 270/100 ps
6214 10:02:20.844410 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6215 10:02:20.848206 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6216 10:02:20.851180 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6217 10:02:20.854240 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6218 10:02:20.857277 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6219 10:02:20.861346 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6220 10:02:20.861865
6221 10:02:20.864621 CA PerBit enable=1, Macro0, CA PI delay=36
6222 10:02:20.865219
6223 10:02:20.867457 [CBTSetCACLKResult] CA Dly = 36
6224 10:02:20.870959 CS Dly: 1 (0~32)
6225 10:02:20.871413 ==
6226 10:02:20.874193 Dram Type= 6, Freq= 0, CH_0, rank 1
6227 10:02:20.878277 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6228 10:02:20.878794 ==
6229 10:02:20.884557 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6230 10:02:20.887390 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
6231 10:02:20.891393 [CA 0] Center 36 (8~64) winsize 57
6232 10:02:20.894663 [CA 1] Center 36 (8~64) winsize 57
6233 10:02:20.897825 [CA 2] Center 36 (8~64) winsize 57
6234 10:02:20.900911 [CA 3] Center 36 (8~64) winsize 57
6235 10:02:20.904549 [CA 4] Center 36 (8~64) winsize 57
6236 10:02:20.907253 [CA 5] Center 36 (8~64) winsize 57
6237 10:02:20.907677
6238 10:02:20.911080 [CmdBusTrainingLP45] Vref(ca) range 1: 35
6239 10:02:20.911608
6240 10:02:20.914383 [CATrainingPosCal] consider 2 rank data
6241 10:02:20.917325 u2DelayCellTimex100 = 270/100 ps
6242 10:02:20.920716 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6243 10:02:20.924554 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6244 10:02:20.927726 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6245 10:02:20.933977 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6246 10:02:20.937339 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6247 10:02:20.940771 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6248 10:02:20.941304
6249 10:02:20.943689 CA PerBit enable=1, Macro0, CA PI delay=36
6250 10:02:20.944139
6251 10:02:20.947104 [CBTSetCACLKResult] CA Dly = 36
6252 10:02:20.947526 CS Dly: 1 (0~32)
6253 10:02:20.947856
6254 10:02:20.950521 ----->DramcWriteLeveling(PI) begin...
6255 10:02:20.953962 ==
6256 10:02:20.954405 Dram Type= 6, Freq= 0, CH_0, rank 0
6257 10:02:20.960423 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6258 10:02:20.960900 ==
6259 10:02:20.963928 Write leveling (Byte 0): 40 => 8
6260 10:02:20.967380 Write leveling (Byte 1): 40 => 8
6261 10:02:20.967809 DramcWriteLeveling(PI) end<-----
6262 10:02:20.968148
6263 10:02:20.970685 ==
6264 10:02:20.974146 Dram Type= 6, Freq= 0, CH_0, rank 0
6265 10:02:20.977491 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6266 10:02:20.978027 ==
6267 10:02:20.980743 [Gating] SW mode calibration
6268 10:02:20.987270 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6269 10:02:20.991174 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6270 10:02:20.996992 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6271 10:02:21.000766 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6272 10:02:21.004183 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6273 10:02:21.010865 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
6274 10:02:21.013636 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6275 10:02:21.017750 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6276 10:02:21.023961 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6277 10:02:21.027339 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6278 10:02:21.030577 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6279 10:02:21.033419 Total UI for P1: 0, mck2ui 16
6280 10:02:21.036763 best dqsien dly found for B0: ( 0, 14, 24)
6281 10:02:21.040043 Total UI for P1: 0, mck2ui 16
6282 10:02:21.043474 best dqsien dly found for B1: ( 0, 14, 24)
6283 10:02:21.047135 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6284 10:02:21.050405 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6285 10:02:21.050846
6286 10:02:21.056601 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6287 10:02:21.060361 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6288 10:02:21.063308 [Gating] SW calibration Done
6289 10:02:21.063725 ==
6290 10:02:21.066624 Dram Type= 6, Freq= 0, CH_0, rank 0
6291 10:02:21.070007 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6292 10:02:21.070429 ==
6293 10:02:21.070806 RX Vref Scan: 0
6294 10:02:21.071112
6295 10:02:21.073190 RX Vref 0 -> 0, step: 1
6296 10:02:21.073586
6297 10:02:21.076486 RX Delay -410 -> 252, step: 16
6298 10:02:21.079872 iDelay=230, Bit 0, Center -19 (-250 ~ 213) 464
6299 10:02:21.086407 iDelay=230, Bit 1, Center -11 (-250 ~ 229) 480
6300 10:02:21.090064 iDelay=230, Bit 2, Center -27 (-266 ~ 213) 480
6301 10:02:21.093289 iDelay=230, Bit 3, Center -19 (-250 ~ 213) 464
6302 10:02:21.097191 iDelay=230, Bit 4, Center -19 (-250 ~ 213) 464
6303 10:02:21.103651 iDelay=230, Bit 5, Center -27 (-266 ~ 213) 480
6304 10:02:21.106769 iDelay=230, Bit 6, Center -11 (-250 ~ 229) 480
6305 10:02:21.110373 iDelay=230, Bit 7, Center -11 (-250 ~ 229) 480
6306 10:02:21.113094 iDelay=230, Bit 8, Center -27 (-250 ~ 197) 448
6307 10:02:21.119921 iDelay=230, Bit 9, Center -35 (-266 ~ 197) 464
6308 10:02:21.122916 iDelay=230, Bit 10, Center -19 (-250 ~ 213) 464
6309 10:02:21.126690 iDelay=230, Bit 11, Center -27 (-266 ~ 213) 480
6310 10:02:21.129747 iDelay=230, Bit 12, Center -19 (-250 ~ 213) 464
6311 10:02:21.136838 iDelay=230, Bit 13, Center -19 (-250 ~ 213) 464
6312 10:02:21.139542 iDelay=230, Bit 14, Center -19 (-250 ~ 213) 464
6313 10:02:21.143396 iDelay=230, Bit 15, Center -19 (-250 ~ 213) 464
6314 10:02:21.143830 ==
6315 10:02:21.146578 Dram Type= 6, Freq= 0, CH_0, rank 0
6316 10:02:21.149822 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6317 10:02:21.153100 ==
6318 10:02:21.153618 DQS Delay:
6319 10:02:21.153961 DQS0 = 27, DQS1 = 35
6320 10:02:21.156543 DQM Delay:
6321 10:02:21.157090 DQM0 = 9, DQM1 = 12
6322 10:02:21.159509 DQ Delay:
6323 10:02:21.159927 DQ0 =8, DQ1 =16, DQ2 =0, DQ3 =8
6324 10:02:21.162899 DQ4 =8, DQ5 =0, DQ6 =16, DQ7 =16
6325 10:02:21.166645 DQ8 =8, DQ9 =0, DQ10 =16, DQ11 =8
6326 10:02:21.169727 DQ12 =16, DQ13 =16, DQ14 =16, DQ15 =16
6327 10:02:21.170173
6328 10:02:21.170684
6329 10:02:21.171115 ==
6330 10:02:21.172684 Dram Type= 6, Freq= 0, CH_0, rank 0
6331 10:02:21.179568 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6332 10:02:21.180107 ==
6333 10:02:21.180576
6334 10:02:21.181030
6335 10:02:21.181337 TX Vref Scan disable
6336 10:02:21.182837 == TX Byte 0 ==
6337 10:02:21.186576 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6338 10:02:21.189362 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6339 10:02:21.192885 == TX Byte 1 ==
6340 10:02:21.196070 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6341 10:02:21.199594 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6342 10:02:21.202688 ==
6343 10:02:21.203081 Dram Type= 6, Freq= 0, CH_0, rank 0
6344 10:02:21.209537 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6345 10:02:21.210081 ==
6346 10:02:21.210504
6347 10:02:21.210950
6348 10:02:21.213058 TX Vref Scan disable
6349 10:02:21.213578 == TX Byte 0 ==
6350 10:02:21.215677 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6351 10:02:21.222728 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6352 10:02:21.223110 == TX Byte 1 ==
6353 10:02:21.225891 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6354 10:02:21.229823 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6355 10:02:21.232759
6356 10:02:21.233148 [DATLAT]
6357 10:02:21.233463 Freq=400, CH0 RK0
6358 10:02:21.233745
6359 10:02:21.235941 DATLAT Default: 0xf
6360 10:02:21.236349 0, 0xFFFF, sum = 0
6361 10:02:21.239525 1, 0xFFFF, sum = 0
6362 10:02:21.239914 2, 0xFFFF, sum = 0
6363 10:02:21.242560 3, 0xFFFF, sum = 0
6364 10:02:21.242951 4, 0xFFFF, sum = 0
6365 10:02:21.246577 5, 0xFFFF, sum = 0
6366 10:02:21.246966 6, 0xFFFF, sum = 0
6367 10:02:21.249234 7, 0xFFFF, sum = 0
6368 10:02:21.252787 8, 0xFFFF, sum = 0
6369 10:02:21.253247 9, 0xFFFF, sum = 0
6370 10:02:21.256150 10, 0xFFFF, sum = 0
6371 10:02:21.256682 11, 0xFFFF, sum = 0
6372 10:02:21.259552 12, 0xFFFF, sum = 0
6373 10:02:21.259896 13, 0x0, sum = 1
6374 10:02:21.263000 14, 0x0, sum = 2
6375 10:02:21.263559 15, 0x0, sum = 3
6376 10:02:21.265657 16, 0x0, sum = 4
6377 10:02:21.266155 best_step = 14
6378 10:02:21.266465
6379 10:02:21.266751 ==
6380 10:02:21.269133 Dram Type= 6, Freq= 0, CH_0, rank 0
6381 10:02:21.272504 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6382 10:02:21.273065 ==
6383 10:02:21.276025 RX Vref Scan: 1
6384 10:02:21.276431
6385 10:02:21.279400 RX Vref 0 -> 0, step: 1
6386 10:02:21.279813
6387 10:02:21.280210 RX Delay -311 -> 252, step: 8
6388 10:02:21.280509
6389 10:02:21.282616 Set Vref, RX VrefLevel [Byte0]: 53
6390 10:02:21.286045 [Byte1]: 54
6391 10:02:21.291582
6392 10:02:21.291963 Final RX Vref Byte 0 = 53 to rank0
6393 10:02:21.294465 Final RX Vref Byte 1 = 54 to rank0
6394 10:02:21.297908 Final RX Vref Byte 0 = 53 to rank1
6395 10:02:21.301125 Final RX Vref Byte 1 = 54 to rank1==
6396 10:02:21.304631 Dram Type= 6, Freq= 0, CH_0, rank 0
6397 10:02:21.311829 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6398 10:02:21.312321 ==
6399 10:02:21.312631 DQS Delay:
6400 10:02:21.314330 DQS0 = 28, DQS1 = 36
6401 10:02:21.314712 DQM Delay:
6402 10:02:21.315016 DQM0 = 11, DQM1 = 13
6403 10:02:21.317969 DQ Delay:
6404 10:02:21.321128 DQ0 =12, DQ1 =16, DQ2 =8, DQ3 =8
6405 10:02:21.324223 DQ4 =12, DQ5 =0, DQ6 =20, DQ7 =16
6406 10:02:21.324606 DQ8 =0, DQ9 =4, DQ10 =16, DQ11 =4
6407 10:02:21.328236 DQ12 =20, DQ13 =16, DQ14 =24, DQ15 =20
6408 10:02:21.331079
6409 10:02:21.331601
6410 10:02:21.338107 [DQSOSCAuto] RK0, (LSB)MR18= 0xcfbc, (MSB)MR19= 0xc0c, tDQSOscB0 = 386 ps tDQSOscB1 = 384 ps
6411 10:02:21.341128 CH0 RK0: MR19=C0C, MR18=CFBC
6412 10:02:21.347723 CH0_RK0: MR19=0xC0C, MR18=0xCFBC, DQSOSC=384, MR23=63, INC=400, DEC=267
6413 10:02:21.348114 ==
6414 10:02:21.351030 Dram Type= 6, Freq= 0, CH_0, rank 1
6415 10:02:21.354108 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6416 10:02:21.354496 ==
6417 10:02:21.357767 [Gating] SW mode calibration
6418 10:02:21.365023 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6419 10:02:21.370563 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6420 10:02:21.374442 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6421 10:02:21.377352 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6422 10:02:21.384245 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6423 10:02:21.387702 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6424 10:02:21.390719 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6425 10:02:21.394309 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6426 10:02:21.400663 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6427 10:02:21.403843 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6428 10:02:21.407635 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6429 10:02:21.410460 Total UI for P1: 0, mck2ui 16
6430 10:02:21.414162 best dqsien dly found for B0: ( 0, 14, 24)
6431 10:02:21.417664 Total UI for P1: 0, mck2ui 16
6432 10:02:21.420967 best dqsien dly found for B1: ( 0, 14, 24)
6433 10:02:21.424229 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6434 10:02:21.430736 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6435 10:02:21.431326
6436 10:02:21.434239 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6437 10:02:21.437184 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6438 10:02:21.440864 [Gating] SW calibration Done
6439 10:02:21.441290 ==
6440 10:02:21.444063 Dram Type= 6, Freq= 0, CH_0, rank 1
6441 10:02:21.447360 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6442 10:02:21.447835 ==
6443 10:02:21.450588 RX Vref Scan: 0
6444 10:02:21.451016
6445 10:02:21.451352 RX Vref 0 -> 0, step: 1
6446 10:02:21.451669
6447 10:02:21.454066 RX Delay -410 -> 252, step: 16
6448 10:02:21.457138 iDelay=230, Bit 0, Center -19 (-250 ~ 213) 464
6449 10:02:21.463969 iDelay=230, Bit 1, Center -19 (-250 ~ 213) 464
6450 10:02:21.466912 iDelay=230, Bit 2, Center -19 (-250 ~ 213) 464
6451 10:02:21.471093 iDelay=230, Bit 3, Center -19 (-250 ~ 213) 464
6452 10:02:21.473919 iDelay=230, Bit 4, Center -11 (-250 ~ 229) 480
6453 10:02:21.480440 iDelay=230, Bit 5, Center -27 (-266 ~ 213) 480
6454 10:02:21.483648 iDelay=230, Bit 6, Center -11 (-250 ~ 229) 480
6455 10:02:21.487708 iDelay=230, Bit 7, Center -3 (-234 ~ 229) 464
6456 10:02:21.490400 iDelay=230, Bit 8, Center -35 (-266 ~ 197) 464
6457 10:02:21.497153 iDelay=230, Bit 9, Center -35 (-266 ~ 197) 464
6458 10:02:21.501216 iDelay=230, Bit 10, Center -19 (-250 ~ 213) 464
6459 10:02:21.503555 iDelay=230, Bit 11, Center -35 (-266 ~ 197) 464
6460 10:02:21.506872 iDelay=230, Bit 12, Center -19 (-250 ~ 213) 464
6461 10:02:21.514234 iDelay=230, Bit 13, Center -19 (-250 ~ 213) 464
6462 10:02:21.516903 iDelay=230, Bit 14, Center -11 (-234 ~ 213) 448
6463 10:02:21.520263 iDelay=230, Bit 15, Center -19 (-250 ~ 213) 464
6464 10:02:21.520912 ==
6465 10:02:21.523409 Dram Type= 6, Freq= 0, CH_0, rank 1
6466 10:02:21.530308 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6467 10:02:21.530746 ==
6468 10:02:21.531170 DQS Delay:
6469 10:02:21.533653 DQS0 = 27, DQS1 = 35
6470 10:02:21.534088 DQM Delay:
6471 10:02:21.534543 DQM0 = 11, DQM1 = 11
6472 10:02:21.537231 DQ Delay:
6473 10:02:21.540017 DQ0 =8, DQ1 =8, DQ2 =8, DQ3 =8
6474 10:02:21.540449 DQ4 =16, DQ5 =0, DQ6 =16, DQ7 =24
6475 10:02:21.544070 DQ8 =0, DQ9 =0, DQ10 =16, DQ11 =0
6476 10:02:21.546779 DQ12 =16, DQ13 =16, DQ14 =24, DQ15 =16
6477 10:02:21.547370
6478 10:02:21.547866
6479 10:02:21.550040 ==
6480 10:02:21.553498 Dram Type= 6, Freq= 0, CH_0, rank 1
6481 10:02:21.556644 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6482 10:02:21.557076 ==
6483 10:02:21.557384
6484 10:02:21.557665
6485 10:02:21.560371 TX Vref Scan disable
6486 10:02:21.560754 == TX Byte 0 ==
6487 10:02:21.563398 Update DQ dly =583 (4 ,2, 7) DQ OEN =(3 ,3)
6488 10:02:21.570422 Update DQM dly =583 (4 ,2, 7) DQM OEN =(3 ,3)
6489 10:02:21.570912 == TX Byte 1 ==
6490 10:02:21.574063 Update DQ dly =583 (4 ,2, 7) DQ OEN =(3 ,3)
6491 10:02:21.580064 Update DQM dly =583 (4 ,2, 7) DQM OEN =(3 ,3)
6492 10:02:21.580474 ==
6493 10:02:21.583947 Dram Type= 6, Freq= 0, CH_0, rank 1
6494 10:02:21.586499 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6495 10:02:21.587003 ==
6496 10:02:21.587320
6497 10:02:21.587611
6498 10:02:21.590273 TX Vref Scan disable
6499 10:02:21.590770 == TX Byte 0 ==
6500 10:02:21.593270 Update DQ dly =583 (4 ,2, 7) DQ OEN =(3 ,3)
6501 10:02:21.600105 Update DQM dly =583 (4 ,2, 7) DQM OEN =(3 ,3)
6502 10:02:21.600635 == TX Byte 1 ==
6503 10:02:21.603022 Update DQ dly =583 (4 ,2, 7) DQ OEN =(3 ,3)
6504 10:02:21.610244 Update DQM dly =583 (4 ,2, 7) DQM OEN =(3 ,3)
6505 10:02:21.610901
6506 10:02:21.611275 [DATLAT]
6507 10:02:21.611602 Freq=400, CH0 RK1
6508 10:02:21.611913
6509 10:02:21.613050 DATLAT Default: 0xe
6510 10:02:21.616527 0, 0xFFFF, sum = 0
6511 10:02:21.617105 1, 0xFFFF, sum = 0
6512 10:02:21.619935 2, 0xFFFF, sum = 0
6513 10:02:21.620366 3, 0xFFFF, sum = 0
6514 10:02:21.622909 4, 0xFFFF, sum = 0
6515 10:02:21.623343 5, 0xFFFF, sum = 0
6516 10:02:21.626429 6, 0xFFFF, sum = 0
6517 10:02:21.626860 7, 0xFFFF, sum = 0
6518 10:02:21.629573 8, 0xFFFF, sum = 0
6519 10:02:21.630213 9, 0xFFFF, sum = 0
6520 10:02:21.632835 10, 0xFFFF, sum = 0
6521 10:02:21.633371 11, 0xFFFF, sum = 0
6522 10:02:21.636078 12, 0xFFFF, sum = 0
6523 10:02:21.636509 13, 0x0, sum = 1
6524 10:02:21.640003 14, 0x0, sum = 2
6525 10:02:21.640435 15, 0x0, sum = 3
6526 10:02:21.643472 16, 0x0, sum = 4
6527 10:02:21.644068 best_step = 14
6528 10:02:21.644510
6529 10:02:21.645043 ==
6530 10:02:21.646610 Dram Type= 6, Freq= 0, CH_0, rank 1
6531 10:02:21.649561 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6532 10:02:21.653718 ==
6533 10:02:21.654291 RX Vref Scan: 0
6534 10:02:21.654853
6535 10:02:21.656063 RX Vref 0 -> 0, step: 1
6536 10:02:21.656489
6537 10:02:21.659823 RX Delay -311 -> 252, step: 8
6538 10:02:21.663165 iDelay=217, Bit 0, Center -16 (-239 ~ 208) 448
6539 10:02:21.669360 iDelay=217, Bit 1, Center -16 (-239 ~ 208) 448
6540 10:02:21.672424 iDelay=217, Bit 2, Center -16 (-239 ~ 208) 448
6541 10:02:21.676523 iDelay=217, Bit 3, Center -16 (-239 ~ 208) 448
6542 10:02:21.679262 iDelay=217, Bit 4, Center -12 (-239 ~ 216) 456
6543 10:02:21.686202 iDelay=217, Bit 5, Center -24 (-247 ~ 200) 448
6544 10:02:21.689285 iDelay=217, Bit 6, Center -12 (-231 ~ 208) 440
6545 10:02:21.692691 iDelay=217, Bit 7, Center -8 (-231 ~ 216) 448
6546 10:02:21.696633 iDelay=217, Bit 8, Center -32 (-255 ~ 192) 448
6547 10:02:21.702872 iDelay=217, Bit 9, Center -32 (-255 ~ 192) 448
6548 10:02:21.706471 iDelay=217, Bit 10, Center -20 (-239 ~ 200) 440
6549 10:02:21.709268 iDelay=217, Bit 11, Center -32 (-255 ~ 192) 448
6550 10:02:21.712943 iDelay=217, Bit 12, Center -20 (-239 ~ 200) 440
6551 10:02:21.719021 iDelay=217, Bit 13, Center -16 (-239 ~ 208) 448
6552 10:02:21.722724 iDelay=217, Bit 14, Center -12 (-231 ~ 208) 440
6553 10:02:21.725834 iDelay=217, Bit 15, Center -16 (-239 ~ 208) 448
6554 10:02:21.726265 ==
6555 10:02:21.729130 Dram Type= 6, Freq= 0, CH_0, rank 1
6556 10:02:21.736370 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6557 10:02:21.736872 ==
6558 10:02:21.737353 DQS Delay:
6559 10:02:21.739297 DQS0 = 24, DQS1 = 32
6560 10:02:21.739909 DQM Delay:
6561 10:02:21.740374 DQM0 = 9, DQM1 = 9
6562 10:02:21.742542 DQ Delay:
6563 10:02:21.746120 DQ0 =8, DQ1 =8, DQ2 =8, DQ3 =8
6564 10:02:21.746739 DQ4 =12, DQ5 =0, DQ6 =12, DQ7 =16
6565 10:02:21.749331 DQ8 =0, DQ9 =0, DQ10 =12, DQ11 =0
6566 10:02:21.752355 DQ12 =12, DQ13 =16, DQ14 =20, DQ15 =16
6567 10:02:21.752547
6568 10:02:21.752639
6569 10:02:21.762719 [DQSOSCAuto] RK1, (LSB)MR18= 0xb858, (MSB)MR19= 0xc0c, tDQSOscB0 = 398 ps tDQSOscB1 = 386 ps
6570 10:02:21.765340 CH0 RK1: MR19=C0C, MR18=B858
6571 10:02:21.772372 CH0_RK1: MR19=0xC0C, MR18=0xB858, DQSOSC=386, MR23=63, INC=396, DEC=264
6572 10:02:21.772455 [RxdqsGatingPostProcess] freq 400
6573 10:02:21.779340 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
6574 10:02:21.782480 best DQS0 dly(2T, 0.5T) = (0, 10)
6575 10:02:21.786052 best DQS1 dly(2T, 0.5T) = (0, 10)
6576 10:02:21.788930 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
6577 10:02:21.792207 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
6578 10:02:21.795604 best DQS0 dly(2T, 0.5T) = (0, 10)
6579 10:02:21.799420 best DQS1 dly(2T, 0.5T) = (0, 10)
6580 10:02:21.802159 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
6581 10:02:21.805718 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
6582 10:02:21.808812 Pre-setting of DQS Precalculation
6583 10:02:21.811877 [DualRankRxdatlatCal] RK0: 14, RK1: 14, Final_Datlat 14
6584 10:02:21.812075 ==
6585 10:02:21.815657 Dram Type= 6, Freq= 0, CH_1, rank 0
6586 10:02:21.818810 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6587 10:02:21.822387 ==
6588 10:02:21.825466 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6589 10:02:21.832249 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37
6590 10:02:21.835932 [CA 0] Center 36 (8~64) winsize 57
6591 10:02:21.839205 [CA 1] Center 36 (8~64) winsize 57
6592 10:02:21.842381 [CA 2] Center 36 (8~64) winsize 57
6593 10:02:21.845646 [CA 3] Center 36 (8~64) winsize 57
6594 10:02:21.849210 [CA 4] Center 36 (8~64) winsize 57
6595 10:02:21.852019 [CA 5] Center 36 (8~64) winsize 57
6596 10:02:21.852598
6597 10:02:21.855443 [CmdBusTrainingLP45] Vref(ca) range 1: 37
6598 10:02:21.856022
6599 10:02:21.858927 [CATrainingPosCal] consider 1 rank data
6600 10:02:21.862351 u2DelayCellTimex100 = 270/100 ps
6601 10:02:21.865596 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6602 10:02:21.869033 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6603 10:02:21.871892 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6604 10:02:21.875397 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6605 10:02:21.879045 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6606 10:02:21.881779 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6607 10:02:21.882244
6608 10:02:21.885994 CA PerBit enable=1, Macro0, CA PI delay=36
6609 10:02:21.888488
6610 10:02:21.888923 [CBTSetCACLKResult] CA Dly = 36
6611 10:02:21.891931 CS Dly: 1 (0~32)
6612 10:02:21.892389 ==
6613 10:02:21.895330 Dram Type= 6, Freq= 0, CH_1, rank 1
6614 10:02:21.898890 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6615 10:02:21.899282 ==
6616 10:02:21.905556 pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0
6617 10:02:21.912533 u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35
6618 10:02:21.915451 [CA 0] Center 36 (8~64) winsize 57
6619 10:02:21.915836 [CA 1] Center 36 (8~64) winsize 57
6620 10:02:21.918731 [CA 2] Center 36 (8~64) winsize 57
6621 10:02:21.922513 [CA 3] Center 36 (8~64) winsize 57
6622 10:02:21.925928 [CA 4] Center 36 (8~64) winsize 57
6623 10:02:21.928800 [CA 5] Center 36 (8~64) winsize 57
6624 10:02:21.929231
6625 10:02:21.932504 [CmdBusTrainingLP45] Vref(ca) range 1: 35
6626 10:02:21.932921
6627 10:02:21.935862 [CATrainingPosCal] consider 2 rank data
6628 10:02:21.938782 u2DelayCellTimex100 = 270/100 ps
6629 10:02:21.942225 CA0 delay=36 (8~64),Diff = 0 PI (0 cell)
6630 10:02:21.948945 CA1 delay=36 (8~64),Diff = 0 PI (0 cell)
6631 10:02:21.952203 CA2 delay=36 (8~64),Diff = 0 PI (0 cell)
6632 10:02:21.955342 CA3 delay=36 (8~64),Diff = 0 PI (0 cell)
6633 10:02:21.958480 CA4 delay=36 (8~64),Diff = 0 PI (0 cell)
6634 10:02:21.962070 CA5 delay=36 (8~64),Diff = 0 PI (0 cell)
6635 10:02:21.962624
6636 10:02:21.965635 CA PerBit enable=1, Macro0, CA PI delay=36
6637 10:02:21.966161
6638 10:02:21.968901 [CBTSetCACLKResult] CA Dly = 36
6639 10:02:21.969296 CS Dly: 1 (0~32)
6640 10:02:21.971942
6641 10:02:21.975624 ----->DramcWriteLeveling(PI) begin...
6642 10:02:21.976024 ==
6643 10:02:21.978973 Dram Type= 6, Freq= 0, CH_1, rank 0
6644 10:02:21.982375 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6645 10:02:21.982874 ==
6646 10:02:21.985516 Write leveling (Byte 0): 40 => 8
6647 10:02:21.988921 Write leveling (Byte 1): 40 => 8
6648 10:02:21.992144 DramcWriteLeveling(PI) end<-----
6649 10:02:21.992687
6650 10:02:21.993194 ==
6651 10:02:21.995624 Dram Type= 6, Freq= 0, CH_1, rank 0
6652 10:02:21.998697 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6653 10:02:21.999076 ==
6654 10:02:22.001897 [Gating] SW mode calibration
6655 10:02:22.008792 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6656 10:02:22.015619 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6657 10:02:22.018483 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6658 10:02:22.022233 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6659 10:02:22.025207 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6660 10:02:22.031622 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6661 10:02:22.034900 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6662 10:02:22.038476 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6663 10:02:22.045383 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6664 10:02:22.048501 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6665 10:02:22.052658 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6666 10:02:22.055429 Total UI for P1: 0, mck2ui 16
6667 10:02:22.058335 best dqsien dly found for B0: ( 0, 14, 24)
6668 10:02:22.061812 Total UI for P1: 0, mck2ui 16
6669 10:02:22.064922 best dqsien dly found for B1: ( 0, 14, 24)
6670 10:02:22.068595 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6671 10:02:22.071611 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6672 10:02:22.075447
6673 10:02:22.078210 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6674 10:02:22.081707 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6675 10:02:22.085030 [Gating] SW calibration Done
6676 10:02:22.085608 ==
6677 10:02:22.088734 Dram Type= 6, Freq= 0, CH_1, rank 0
6678 10:02:22.091723 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6679 10:02:22.092294 ==
6680 10:02:22.092617 RX Vref Scan: 0
6681 10:02:22.093019
6682 10:02:22.095539 RX Vref 0 -> 0, step: 1
6683 10:02:22.095960
6684 10:02:22.098265 RX Delay -410 -> 252, step: 16
6685 10:02:22.102075 iDelay=230, Bit 0, Center -11 (-250 ~ 229) 480
6686 10:02:22.108743 iDelay=230, Bit 1, Center -19 (-250 ~ 213) 464
6687 10:02:22.111961 iDelay=230, Bit 2, Center -27 (-250 ~ 197) 448
6688 10:02:22.114762 iDelay=230, Bit 3, Center -19 (-250 ~ 213) 464
6689 10:02:22.118506 iDelay=230, Bit 4, Center -19 (-250 ~ 213) 464
6690 10:02:22.125177 iDelay=230, Bit 5, Center -3 (-234 ~ 229) 464
6691 10:02:22.128351 iDelay=230, Bit 6, Center -11 (-250 ~ 229) 480
6692 10:02:22.131514 iDelay=230, Bit 7, Center -19 (-250 ~ 213) 464
6693 10:02:22.135143 iDelay=230, Bit 8, Center -27 (-250 ~ 197) 448
6694 10:02:22.141520 iDelay=230, Bit 9, Center -27 (-250 ~ 197) 448
6695 10:02:22.145537 iDelay=230, Bit 10, Center -19 (-250 ~ 213) 464
6696 10:02:22.148511 iDelay=230, Bit 11, Center -19 (-250 ~ 213) 464
6697 10:02:22.151734 iDelay=230, Bit 12, Center -11 (-250 ~ 229) 480
6698 10:02:22.158163 iDelay=230, Bit 13, Center -19 (-250 ~ 213) 464
6699 10:02:22.161285 iDelay=230, Bit 14, Center -19 (-250 ~ 213) 464
6700 10:02:22.164749 iDelay=230, Bit 15, Center -11 (-250 ~ 229) 480
6701 10:02:22.165176 ==
6702 10:02:22.167726 Dram Type= 6, Freq= 0, CH_1, rank 0
6703 10:02:22.171458 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6704 10:02:22.174656 ==
6705 10:02:22.175163 DQS Delay:
6706 10:02:22.175574 DQS0 = 27, DQS1 = 27
6707 10:02:22.178036 DQM Delay:
6708 10:02:22.178427 DQM0 = 11, DQM1 = 8
6709 10:02:22.181495 DQ Delay:
6710 10:02:22.181889 DQ0 =16, DQ1 =8, DQ2 =0, DQ3 =8
6711 10:02:22.184406 DQ4 =8, DQ5 =24, DQ6 =16, DQ7 =8
6712 10:02:22.188312 DQ8 =0, DQ9 =0, DQ10 =8, DQ11 =8
6713 10:02:22.191105 DQ12 =16, DQ13 =8, DQ14 =8, DQ15 =16
6714 10:02:22.191526
6715 10:02:22.192005
6716 10:02:22.192316 ==
6717 10:02:22.194532 Dram Type= 6, Freq= 0, CH_1, rank 0
6718 10:02:22.200950 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6719 10:02:22.201364 ==
6720 10:02:22.201711
6721 10:02:22.202008
6722 10:02:22.202291 TX Vref Scan disable
6723 10:02:22.204431 == TX Byte 0 ==
6724 10:02:22.208075 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6725 10:02:22.211049 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6726 10:02:22.214821 == TX Byte 1 ==
6727 10:02:22.217876 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6728 10:02:22.221325 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6729 10:02:22.221721 ==
6730 10:02:22.224250 Dram Type= 6, Freq= 0, CH_1, rank 0
6731 10:02:22.231262 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6732 10:02:22.231662 ==
6733 10:02:22.231970
6734 10:02:22.232253
6735 10:02:22.232642 TX Vref Scan disable
6736 10:02:22.234755 == TX Byte 0 ==
6737 10:02:22.237728 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6738 10:02:22.241638 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6739 10:02:22.244649 == TX Byte 1 ==
6740 10:02:22.247650 Update DQ dly =580 (4 ,2, 4) DQ OEN =(3 ,3)
6741 10:02:22.251140 Update DQM dly =580 (4 ,2, 4) DQM OEN =(3 ,3)
6742 10:02:22.251505
6743 10:02:22.254206 [DATLAT]
6744 10:02:22.254562 Freq=400, CH1 RK0
6745 10:02:22.254896
6746 10:02:22.257831 DATLAT Default: 0xf
6747 10:02:22.258125 0, 0xFFFF, sum = 0
6748 10:02:22.260746 1, 0xFFFF, sum = 0
6749 10:02:22.261008 2, 0xFFFF, sum = 0
6750 10:02:22.264337 3, 0xFFFF, sum = 0
6751 10:02:22.264544 4, 0xFFFF, sum = 0
6752 10:02:22.267559 5, 0xFFFF, sum = 0
6753 10:02:22.267697 6, 0xFFFF, sum = 0
6754 10:02:22.271188 7, 0xFFFF, sum = 0
6755 10:02:22.271301 8, 0xFFFF, sum = 0
6756 10:02:22.274338 9, 0xFFFF, sum = 0
6757 10:02:22.274511 10, 0xFFFF, sum = 0
6758 10:02:22.277792 11, 0xFFFF, sum = 0
6759 10:02:22.280637 12, 0xFFFF, sum = 0
6760 10:02:22.280715 13, 0x0, sum = 1
6761 10:02:22.284255 14, 0x0, sum = 2
6762 10:02:22.284401 15, 0x0, sum = 3
6763 10:02:22.284481 16, 0x0, sum = 4
6764 10:02:22.287793 best_step = 14
6765 10:02:22.287878
6766 10:02:22.287943 ==
6767 10:02:22.290580 Dram Type= 6, Freq= 0, CH_1, rank 0
6768 10:02:22.294323 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6769 10:02:22.294406 ==
6770 10:02:22.297685 RX Vref Scan: 1
6771 10:02:22.297790
6772 10:02:22.297918 RX Vref 0 -> 0, step: 1
6773 10:02:22.300695
6774 10:02:22.300817 RX Delay -295 -> 252, step: 8
6775 10:02:22.300936
6776 10:02:22.304039 Set Vref, RX VrefLevel [Byte0]: 50
6777 10:02:22.307830 [Byte1]: 54
6778 10:02:22.312205
6779 10:02:22.312299 Final RX Vref Byte 0 = 50 to rank0
6780 10:02:22.315617 Final RX Vref Byte 1 = 54 to rank0
6781 10:02:22.318685 Final RX Vref Byte 0 = 50 to rank1
6782 10:02:22.322591 Final RX Vref Byte 1 = 54 to rank1==
6783 10:02:22.325848 Dram Type= 6, Freq= 0, CH_1, rank 0
6784 10:02:22.332057 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6785 10:02:22.332185 ==
6786 10:02:22.332293 DQS Delay:
6787 10:02:22.335827 DQS0 = 28, DQS1 = 32
6788 10:02:22.335912 DQM Delay:
6789 10:02:22.335978 DQM0 = 11, DQM1 = 10
6790 10:02:22.338691 DQ Delay:
6791 10:02:22.342534 DQ0 =12, DQ1 =4, DQ2 =0, DQ3 =12
6792 10:02:22.342624 DQ4 =12, DQ5 =20, DQ6 =20, DQ7 =8
6793 10:02:22.345664 DQ8 =0, DQ9 =0, DQ10 =8, DQ11 =0
6794 10:02:22.348706 DQ12 =16, DQ13 =16, DQ14 =16, DQ15 =24
6795 10:02:22.348795
6796 10:02:22.348869
6797 10:02:22.359043 [DQSOSCAuto] RK0, (LSB)MR18= 0x8dc4, (MSB)MR19= 0xc0c, tDQSOscB0 = 385 ps tDQSOscB1 = 392 ps
6798 10:02:22.362118 CH1 RK0: MR19=C0C, MR18=8DC4
6799 10:02:22.368874 CH1_RK0: MR19=0xC0C, MR18=0x8DC4, DQSOSC=385, MR23=63, INC=398, DEC=265
6800 10:02:22.369027 ==
6801 10:02:22.372692 Dram Type= 6, Freq= 0, CH_1, rank 1
6802 10:02:22.375672 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6803 10:02:22.375783 ==
6804 10:02:22.378849 [Gating] SW mode calibration
6805 10:02:22.385982 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1
6806 10:02:22.389430 RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)
6807 10:02:22.395641 0 11 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6808 10:02:22.399160 0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
6809 10:02:22.402696 0 12 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6810 10:02:22.409152 0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6811 10:02:22.412202 0 13 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6812 10:02:22.415516 0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6813 10:02:22.422357 0 14 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6814 10:02:22.425630 0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
6815 10:02:22.428760 0 15 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
6816 10:02:22.432045 Total UI for P1: 0, mck2ui 16
6817 10:02:22.435554 best dqsien dly found for B0: ( 0, 14, 24)
6818 10:02:22.438863 Total UI for P1: 0, mck2ui 16
6819 10:02:22.442223 best dqsien dly found for B1: ( 0, 14, 24)
6820 10:02:22.445215 best DQS0 dly(MCK, UI, PI) = (0, 14, 24)
6821 10:02:22.448916 best DQS1 dly(MCK, UI, PI) = (0, 14, 24)
6822 10:02:22.449019
6823 10:02:22.455261 best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)
6824 10:02:22.458781 best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)
6825 10:02:22.462312 [Gating] SW calibration Done
6826 10:02:22.462397 ==
6827 10:02:22.465269 Dram Type= 6, Freq= 0, CH_1, rank 1
6828 10:02:22.468411 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6829 10:02:22.468512 ==
6830 10:02:22.468580 RX Vref Scan: 0
6831 10:02:22.468644
6832 10:02:22.472227 RX Vref 0 -> 0, step: 1
6833 10:02:22.472336
6834 10:02:22.475508 RX Delay -410 -> 252, step: 16
6835 10:02:22.478886 iDelay=230, Bit 0, Center -11 (-234 ~ 213) 448
6836 10:02:22.481976 iDelay=230, Bit 1, Center -19 (-250 ~ 213) 464
6837 10:02:22.488528 iDelay=230, Bit 2, Center -27 (-250 ~ 197) 448
6838 10:02:22.491940 iDelay=230, Bit 3, Center -19 (-250 ~ 213) 464
6839 10:02:22.495805 iDelay=230, Bit 4, Center -19 (-250 ~ 213) 464
6840 10:02:22.498700 iDelay=230, Bit 5, Center -3 (-234 ~ 229) 464
6841 10:02:22.505371 iDelay=230, Bit 6, Center -3 (-234 ~ 229) 464
6842 10:02:22.508713 iDelay=230, Bit 7, Center -19 (-250 ~ 213) 464
6843 10:02:22.512265 iDelay=230, Bit 8, Center -27 (-250 ~ 197) 448
6844 10:02:22.515130 iDelay=230, Bit 9, Center -19 (-250 ~ 213) 464
6845 10:02:22.521791 iDelay=230, Bit 10, Center -19 (-250 ~ 213) 464
6846 10:02:22.529479 iDelay=230, Bit 11, Center -19 (-250 ~ 213) 464
6847 10:02:22.529568 iDelay=230, Bit 12, Center -11 (-250 ~ 229) 480
6848 10:02:22.535074 iDelay=230, Bit 13, Center -11 (-250 ~ 229) 480
6849 10:02:22.538981 iDelay=230, Bit 14, Center -19 (-250 ~ 213) 464
6850 10:02:22.541352 iDelay=230, Bit 15, Center -11 (-250 ~ 229) 480
6851 10:02:22.541435 ==
6852 10:02:22.545154 Dram Type= 6, Freq= 0, CH_1, rank 1
6853 10:02:22.548263 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6854 10:02:22.551757 ==
6855 10:02:22.551845 DQS Delay:
6856 10:02:22.551911 DQS0 = 27, DQS1 = 27
6857 10:02:22.554995 DQM Delay:
6858 10:02:22.555077 DQM0 = 12, DQM1 = 10
6859 10:02:22.558065 DQ Delay:
6860 10:02:22.558148 DQ0 =16, DQ1 =8, DQ2 =0, DQ3 =8
6861 10:02:22.561845 DQ4 =8, DQ5 =24, DQ6 =24, DQ7 =8
6862 10:02:22.564725 DQ8 =0, DQ9 =8, DQ10 =8, DQ11 =8
6863 10:02:22.568312 DQ12 =16, DQ13 =16, DQ14 =8, DQ15 =16
6864 10:02:22.568409
6865 10:02:22.568484
6866 10:02:22.568553 ==
6867 10:02:22.571324 Dram Type= 6, Freq= 0, CH_1, rank 1
6868 10:02:22.578445 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6869 10:02:22.578567 ==
6870 10:02:22.578658
6871 10:02:22.578742
6872 10:02:22.578822 TX Vref Scan disable
6873 10:02:22.581275 == TX Byte 0 ==
6874 10:02:22.585116 Update DQ dly =583 (4 ,2, 7) DQ OEN =(3 ,3)
6875 10:02:22.588459 Update DQM dly =583 (4 ,2, 7) DQM OEN =(3 ,3)
6876 10:02:22.591270 == TX Byte 1 ==
6877 10:02:22.594948 Update DQ dly =583 (4 ,2, 7) DQ OEN =(3 ,3)
6878 10:02:22.598227 Update DQM dly =583 (4 ,2, 7) DQM OEN =(3 ,3)
6879 10:02:22.598352 ==
6880 10:02:22.601680 Dram Type= 6, Freq= 0, CH_1, rank 1
6881 10:02:22.608249 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6882 10:02:22.608434 ==
6883 10:02:22.608588
6884 10:02:22.608743
6885 10:02:22.608881 TX Vref Scan disable
6886 10:02:22.611673 == TX Byte 0 ==
6887 10:02:22.615134 Update DQ dly =583 (4 ,2, 7) DQ OEN =(3 ,3)
6888 10:02:22.618100 Update DQM dly =583 (4 ,2, 7) DQM OEN =(3 ,3)
6889 10:02:22.621335 == TX Byte 1 ==
6890 10:02:22.625007 Update DQ dly =583 (4 ,2, 7) DQ OEN =(3 ,3)
6891 10:02:22.628072 Update DQM dly =583 (4 ,2, 7) DQM OEN =(3 ,3)
6892 10:02:22.628218
6893 10:02:22.631874 [DATLAT]
6894 10:02:22.632082 Freq=400, CH1 RK1
6895 10:02:22.632274
6896 10:02:22.634845 DATLAT Default: 0xe
6897 10:02:22.635003 0, 0xFFFF, sum = 0
6898 10:02:22.638010 1, 0xFFFF, sum = 0
6899 10:02:22.638214 2, 0xFFFF, sum = 0
6900 10:02:22.641154 3, 0xFFFF, sum = 0
6901 10:02:22.641367 4, 0xFFFF, sum = 0
6902 10:02:22.644570 5, 0xFFFF, sum = 0
6903 10:02:22.644770 6, 0xFFFF, sum = 0
6904 10:02:22.648119 7, 0xFFFF, sum = 0
6905 10:02:22.648322 8, 0xFFFF, sum = 0
6906 10:02:22.651305 9, 0xFFFF, sum = 0
6907 10:02:22.654462 10, 0xFFFF, sum = 0
6908 10:02:22.654625 11, 0xFFFF, sum = 0
6909 10:02:22.657885 12, 0xFFFF, sum = 0
6910 10:02:22.658037 13, 0x0, sum = 1
6911 10:02:22.661867 14, 0x0, sum = 2
6912 10:02:22.662015 15, 0x0, sum = 3
6913 10:02:22.662151 16, 0x0, sum = 4
6914 10:02:22.664669 best_step = 14
6915 10:02:22.664816
6916 10:02:22.664947 ==
6917 10:02:22.667659 Dram Type= 6, Freq= 0, CH_1, rank 1
6918 10:02:22.671324 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6919 10:02:22.671477 ==
6920 10:02:22.674527 RX Vref Scan: 0
6921 10:02:22.674654
6922 10:02:22.677789 RX Vref 0 -> 0, step: 1
6923 10:02:22.677941
6924 10:02:22.678094 RX Delay -295 -> 252, step: 8
6925 10:02:22.686553 iDelay=217, Bit 0, Center -12 (-231 ~ 208) 440
6926 10:02:22.689536 iDelay=217, Bit 1, Center -20 (-239 ~ 200) 440
6927 10:02:22.692550 iDelay=217, Bit 2, Center -28 (-247 ~ 192) 440
6928 10:02:22.696119 iDelay=217, Bit 3, Center -20 (-239 ~ 200) 440
6929 10:02:22.702637 iDelay=217, Bit 4, Center -20 (-239 ~ 200) 440
6930 10:02:22.706365 iDelay=217, Bit 5, Center -4 (-223 ~ 216) 440
6931 10:02:22.709518 iDelay=217, Bit 6, Center -8 (-231 ~ 216) 448
6932 10:02:22.713057 iDelay=217, Bit 7, Center -20 (-239 ~ 200) 440
6933 10:02:22.719520 iDelay=217, Bit 8, Center -36 (-263 ~ 192) 456
6934 10:02:22.722944 iDelay=217, Bit 9, Center -32 (-255 ~ 192) 448
6935 10:02:22.726498 iDelay=217, Bit 10, Center -20 (-247 ~ 208) 456
6936 10:02:22.729670 iDelay=217, Bit 11, Center -28 (-255 ~ 200) 456
6937 10:02:22.736041 iDelay=217, Bit 12, Center -12 (-239 ~ 216) 456
6938 10:02:22.739341 iDelay=217, Bit 13, Center -16 (-239 ~ 208) 448
6939 10:02:22.743055 iDelay=217, Bit 14, Center -16 (-239 ~ 208) 448
6940 10:02:22.746984 iDelay=217, Bit 15, Center -12 (-239 ~ 216) 456
6941 10:02:22.749395 ==
6942 10:02:22.752554 Dram Type= 6, Freq= 0, CH_1, rank 1
6943 10:02:22.756045 fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2
6944 10:02:22.756248 ==
6945 10:02:22.756443 DQS Delay:
6946 10:02:22.759356 DQS0 = 28, DQS1 = 36
6947 10:02:22.759532 DQM Delay:
6948 10:02:22.762805 DQM0 = 11, DQM1 = 14
6949 10:02:22.762992 DQ Delay:
6950 10:02:22.765894 DQ0 =16, DQ1 =8, DQ2 =0, DQ3 =8
6951 10:02:22.769511 DQ4 =8, DQ5 =24, DQ6 =20, DQ7 =8
6952 10:02:22.773232 DQ8 =0, DQ9 =4, DQ10 =16, DQ11 =8
6953 10:02:22.776174 DQ12 =24, DQ13 =20, DQ14 =20, DQ15 =24
6954 10:02:22.776295
6955 10:02:22.776431
6956 10:02:22.782364 [DQSOSCAuto] RK1, (LSB)MR18= 0xc253, (MSB)MR19= 0xc0c, tDQSOscB0 = 399 ps tDQSOscB1 = 385 ps
6957 10:02:22.786287 CH1 RK1: MR19=C0C, MR18=C253
6958 10:02:22.792615 CH1_RK1: MR19=0xC0C, MR18=0xC253, DQSOSC=385, MR23=63, INC=398, DEC=265
6959 10:02:22.795831 [RxdqsGatingPostProcess] freq 400
6960 10:02:22.799361 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
6961 10:02:22.802797 best DQS0 dly(2T, 0.5T) = (0, 10)
6962 10:02:22.805411 best DQS1 dly(2T, 0.5T) = (0, 10)
6963 10:02:22.809277 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
6964 10:02:22.812358 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
6965 10:02:22.815882 best DQS0 dly(2T, 0.5T) = (0, 10)
6966 10:02:22.818922 best DQS1 dly(2T, 0.5T) = (0, 10)
6967 10:02:22.822500 best DQS0 P1 dly(2T, 0.5T) = (0, 12)
6968 10:02:22.825923 best DQS1 P1 dly(2T, 0.5T) = (0, 12)
6969 10:02:22.829177 Pre-setting of DQS Precalculation
6970 10:02:22.832390 [DualRankRxdatlatCal] RK0: 14, RK1: 14, Final_Datlat 14
6971 10:02:22.842132 sync_frequency_calibration_params sync calibration params of frequency 400 to shu:6
6972 10:02:22.849739 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
6973 10:02:22.849897
6974 10:02:22.850008
6975 10:02:22.852097 [Calibration Summary] 800 Mbps
6976 10:02:22.852285 CH 0, Rank 0
6977 10:02:22.855982 SW Impedance : PASS
6978 10:02:22.856123 DUTY Scan : NO K
6979 10:02:22.858909 ZQ Calibration : PASS
6980 10:02:22.862775 Jitter Meter : NO K
6981 10:02:22.862930 CBT Training : PASS
6982 10:02:22.865350 Write leveling : PASS
6983 10:02:22.869106 RX DQS gating : PASS
6984 10:02:22.869244 RX DQ/DQS(RDDQC) : PASS
6985 10:02:22.872066 TX DQ/DQS : PASS
6986 10:02:22.875764 RX DATLAT : PASS
6987 10:02:22.875901 RX DQ/DQS(Engine): PASS
6988 10:02:22.878699 TX OE : NO K
6989 10:02:22.878838 All Pass.
6990 10:02:22.878954
6991 10:02:22.882513 CH 0, Rank 1
6992 10:02:22.882714 SW Impedance : PASS
6993 10:02:22.886084 DUTY Scan : NO K
6994 10:02:22.886227 ZQ Calibration : PASS
6995 10:02:22.889300 Jitter Meter : NO K
6996 10:02:22.892275 CBT Training : PASS
6997 10:02:22.892411 Write leveling : NO K
6998 10:02:22.895514 RX DQS gating : PASS
6999 10:02:22.899117 RX DQ/DQS(RDDQC) : PASS
7000 10:02:22.899315 TX DQ/DQS : PASS
7001 10:02:22.902149 RX DATLAT : PASS
7002 10:02:22.905918 RX DQ/DQS(Engine): PASS
7003 10:02:22.906122 TX OE : NO K
7004 10:02:22.908967 All Pass.
7005 10:02:22.909309
7006 10:02:22.909563 CH 1, Rank 0
7007 10:02:22.912405 SW Impedance : PASS
7008 10:02:22.912666 DUTY Scan : NO K
7009 10:02:22.915598 ZQ Calibration : PASS
7010 10:02:22.918583 Jitter Meter : NO K
7011 10:02:22.919036 CBT Training : PASS
7012 10:02:22.922342 Write leveling : PASS
7013 10:02:22.925518 RX DQS gating : PASS
7014 10:02:22.926053 RX DQ/DQS(RDDQC) : PASS
7015 10:02:22.929098 TX DQ/DQS : PASS
7016 10:02:22.932105 RX DATLAT : PASS
7017 10:02:22.932585 RX DQ/DQS(Engine): PASS
7018 10:02:22.935638 TX OE : NO K
7019 10:02:22.936034 All Pass.
7020 10:02:22.936348
7021 10:02:22.939018 CH 1, Rank 1
7022 10:02:22.939370 SW Impedance : PASS
7023 10:02:22.942316 DUTY Scan : NO K
7024 10:02:22.942710 ZQ Calibration : PASS
7025 10:02:22.945185 Jitter Meter : NO K
7026 10:02:22.949215 CBT Training : PASS
7027 10:02:22.949611 Write leveling : NO K
7028 10:02:22.952148 RX DQS gating : PASS
7029 10:02:22.955095 RX DQ/DQS(RDDQC) : PASS
7030 10:02:22.955383 TX DQ/DQS : PASS
7031 10:02:22.958497 RX DATLAT : PASS
7032 10:02:22.962172 RX DQ/DQS(Engine): PASS
7033 10:02:22.962349 TX OE : NO K
7034 10:02:22.965077 All Pass.
7035 10:02:22.965253
7036 10:02:22.965398 DramC Write-DBI off
7037 10:02:22.968085 PER_BANK_REFRESH: Hybrid Mode
7038 10:02:22.968286 TX_TRACKING: ON
7039 10:02:22.978285 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 44, TRFC_05T 0, TXREFCNT 58, TRFCpb 16, TRFCpb_05T 0
7040 10:02:22.981506 [FAST_K] Save calibration result to emmc
7041 10:02:22.985091 dramc_set_vcore_voltage set vcore to 725000
7042 10:02:22.988536 Read voltage for 1600, 0
7043 10:02:22.988632 Vio18 = 0
7044 10:02:22.991639 Vcore = 725000
7045 10:02:22.991723 Vdram = 0
7046 10:02:22.991789 Vddq = 0
7047 10:02:22.994943 Vmddr = 0
7048 10:02:22.998435 [FAST_K] DramcSave_Time_For_Cal_Init SHU1, femmc_Ready=0
7049 10:02:23.005109 [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0
7050 10:02:23.005192 MEM_TYPE=3, freq_sel=13
7051 10:02:23.008765 sv_algorithm_assistance_LP4_3733
7052 10:02:23.011880 ============ PULL DRAM RESETB DOWN ============
7053 10:02:23.018441 ========== PULL DRAM RESETB DOWN end =========
7054 10:02:23.022172 [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5
7055 10:02:23.025494 ===================================
7056 10:02:23.028556 LPDDR4 DRAM CONFIGURATION
7057 10:02:23.031872 ===================================
7058 10:02:23.032309 EX_ROW_EN[0] = 0x0
7059 10:02:23.035121 EX_ROW_EN[1] = 0x0
7060 10:02:23.038964 LP4Y_EN = 0x0
7061 10:02:23.039503 WORK_FSP = 0x1
7062 10:02:23.041782 WL = 0x5
7063 10:02:23.042216 RL = 0x5
7064 10:02:23.045348 BL = 0x2
7065 10:02:23.045785 RPST = 0x0
7066 10:02:23.048756 RD_PRE = 0x0
7067 10:02:23.049219 WR_PRE = 0x1
7068 10:02:23.052259 WR_PST = 0x1
7069 10:02:23.052693 DBI_WR = 0x0
7070 10:02:23.055918 DBI_RD = 0x0
7071 10:02:23.056355 OTF = 0x1
7072 10:02:23.058275 ===================================
7073 10:02:23.062089 ===================================
7074 10:02:23.065058 ANA top config
7075 10:02:23.068438 ===================================
7076 10:02:23.069161 DLL_ASYNC_EN = 0
7077 10:02:23.072141 ALL_SLAVE_EN = 0
7078 10:02:23.075143 NEW_RANK_MODE = 1
7079 10:02:23.078674 DLL_IDLE_MODE = 1
7080 10:02:23.079098 LP45_APHY_COMB_EN = 1
7081 10:02:23.081771 TX_ODT_DIS = 0
7082 10:02:23.085342 NEW_8X_MODE = 1
7083 10:02:23.088487 ===================================
7084 10:02:23.091699 ===================================
7085 10:02:23.095319 data_rate = 3200
7086 10:02:23.098491 CKR = 1
7087 10:02:23.101654 DQ_P2S_RATIO = 8
7088 10:02:23.104912 ===================================
7089 10:02:23.105360 CA_P2S_RATIO = 8
7090 10:02:23.108859 DQ_CA_OPEN = 0
7091 10:02:23.111820 DQ_SEMI_OPEN = 0
7092 10:02:23.115084 CA_SEMI_OPEN = 0
7093 10:02:23.118350 CA_FULL_RATE = 0
7094 10:02:23.122126 DQ_CKDIV4_EN = 0
7095 10:02:23.122558 CA_CKDIV4_EN = 0
7096 10:02:23.125189 CA_PREDIV_EN = 0
7097 10:02:23.128280 PH8_DLY = 12
7098 10:02:23.131859 SEMI_OPEN_CA_PICK_MCK_RATIO= 0
7099 10:02:23.135055 DQ_AAMCK_DIV = 4
7100 10:02:23.135375 CA_AAMCK_DIV = 4
7101 10:02:23.138407 CA_ADMCK_DIV = 4
7102 10:02:23.141877 DQ_TRACK_CA_EN = 0
7103 10:02:23.144784 CA_PICK = 1600
7104 10:02:23.148506 CA_MCKIO = 1600
7105 10:02:23.151474 MCKIO_SEMI = 0
7106 10:02:23.155197 PLL_FREQ = 3068
7107 10:02:23.158355 DQ_UI_PI_RATIO = 32
7108 10:02:23.158474 CA_UI_PI_RATIO = 0
7109 10:02:23.161774 ===================================
7110 10:02:23.164795 ===================================
7111 10:02:23.168344 memory_type:LPDDR4
7112 10:02:23.172335 GP_NUM : 10
7113 10:02:23.172668 SRAM_EN : 1
7114 10:02:23.174991 MD32_EN : 0
7115 10:02:23.178711 ===================================
7116 10:02:23.182253 [ANA_INIT] >>>>>>>>>>>>>>
7117 10:02:23.182682 <<<<<< [CONFIGURE PHASE]: ANA_TX
7118 10:02:23.188395 >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL
7119 10:02:23.188904 ===================================
7120 10:02:23.191999 data_rate = 3200,PCW = 0X7600
7121 10:02:23.195071 ===================================
7122 10:02:23.198433 <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL
7123 10:02:23.204951 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
7124 10:02:23.211730 <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration
7125 10:02:23.214602 >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2
7126 10:02:23.218202 >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL
7127 10:02:23.221127 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL
7128 10:02:23.224759 [ANA_INIT] flow start
7129 10:02:23.227788 [ANA_INIT] PLL >>>>>>>>
7130 10:02:23.228013 [ANA_INIT] PLL <<<<<<<<
7131 10:02:23.231350 [ANA_INIT] MIDPI >>>>>>>>
7132 10:02:23.234631 [ANA_INIT] MIDPI <<<<<<<<
7133 10:02:23.234813 [ANA_INIT] DLL >>>>>>>>
7134 10:02:23.237890 [ANA_INIT] DLL <<<<<<<<
7135 10:02:23.240800 [ANA_INIT] flow end
7136 10:02:23.244354 ============ LP4 DIFF to SE enter ============
7137 10:02:23.247819 ============ LP4 DIFF to SE exit ============
7138 10:02:23.251087 [ANA_INIT] <<<<<<<<<<<<<
7139 10:02:23.254360 [Flow] Enable top DCM control >>>>>
7140 10:02:23.257721 [Flow] Enable top DCM control <<<<<
7141 10:02:23.260673 Enable DLL master slave shuffle
7142 10:02:23.264041 ==============================================================
7143 10:02:23.267274 Gating Mode config
7144 10:02:23.273875 ==============================================================
7145 10:02:23.273962 Config description:
7146 10:02:23.284595 RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst Mode
7147 10:02:23.290832 RX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (-like) 2: FIFO mode
7148 10:02:23.294108 SELPH_MODE 0: By rank 1: By Phase
7149 10:02:23.300655 ==============================================================
7150 10:02:23.304247 GAT_TRACK_EN = 1
7151 10:02:23.307459 RX_GATING_MODE = 2
7152 10:02:23.311142 RX_GATING_TRACK_MODE = 2
7153 10:02:23.314873 SELPH_MODE = 1
7154 10:02:23.317556 PICG_EARLY_EN = 1
7155 10:02:23.321109 VALID_LAT_VALUE = 1
7156 10:02:23.324010 ==============================================================
7157 10:02:23.327722 Enter into Gating configuration >>>>
7158 10:02:23.330703 Exit from Gating configuration <<<<
7159 10:02:23.334382 Enter into DVFS_PRE_config >>>>>
7160 10:02:23.344214 Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL.
7161 10:02:23.347806 Exit from DVFS_PRE_config <<<<<
7162 10:02:23.350831 Enter into PICG configuration >>>>
7163 10:02:23.354157 Exit from PICG configuration <<<<
7164 10:02:23.357670 [RX_INPUT] configuration >>>>>
7165 10:02:23.360789 [RX_INPUT] configuration <<<<<
7166 10:02:23.367463 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>
7167 10:02:23.371075 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<
7168 10:02:23.377334 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>
7169 10:02:23.383711 [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<
7170 10:02:23.390468 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>
7171 10:02:23.396943 [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<
7172 10:02:23.400115 [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0
7173 10:02:23.403613 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0
7174 10:02:23.407134 [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0
7175 10:02:23.414061 [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0
7176 10:02:23.417028 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0
7177 10:02:23.420589 [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5
7178 10:02:23.423617 ===================================
7179 10:02:23.427881 LPDDR4 DRAM CONFIGURATION
7180 10:02:23.430429 ===================================
7181 10:02:23.430860 EX_ROW_EN[0] = 0x0
7182 10:02:23.434141 EX_ROW_EN[1] = 0x0
7183 10:02:23.436955 LP4Y_EN = 0x0
7184 10:02:23.437391 WORK_FSP = 0x1
7185 10:02:23.440685 WL = 0x5
7186 10:02:23.441273 RL = 0x5
7187 10:02:23.443854 BL = 0x2
7188 10:02:23.444304 RPST = 0x0
7189 10:02:23.446725 RD_PRE = 0x0
7190 10:02:23.447153 WR_PRE = 0x1
7191 10:02:23.450393 WR_PST = 0x1
7192 10:02:23.450818 DBI_WR = 0x0
7193 10:02:23.453434 DBI_RD = 0x0
7194 10:02:23.453864 OTF = 0x1
7195 10:02:23.457288 ===================================
7196 10:02:23.460557 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0
7197 10:02:23.467149 [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0
7198 10:02:23.470295 [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5
7199 10:02:23.473545 ===================================
7200 10:02:23.477329 LPDDR4 DRAM CONFIGURATION
7201 10:02:23.480724 ===================================
7202 10:02:23.481328 EX_ROW_EN[0] = 0x10
7203 10:02:23.484083 EX_ROW_EN[1] = 0x0
7204 10:02:23.484510 LP4Y_EN = 0x0
7205 10:02:23.487021 WORK_FSP = 0x1
7206 10:02:23.487579 WL = 0x5
7207 10:02:23.490603 RL = 0x5
7208 10:02:23.493748 BL = 0x2
7209 10:02:23.494177 RPST = 0x0
7210 10:02:23.497421 RD_PRE = 0x0
7211 10:02:23.497959 WR_PRE = 0x1
7212 10:02:23.500557 WR_PST = 0x1
7213 10:02:23.501021 DBI_WR = 0x0
7214 10:02:23.503785 DBI_RD = 0x0
7215 10:02:23.504317 OTF = 0x1
7216 10:02:23.507317 ===================================
7217 10:02:23.513366 [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit
7218 10:02:23.513901 ==
7219 10:02:23.517093 Dram Type= 6, Freq= 0, CH_0, rank 0
7220 10:02:23.520339 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7221 10:02:23.520923 ==
7222 10:02:23.523307 [Duty_Offset_Calibration]
7223 10:02:23.527451 B0:2 B1:1 CA:1
7224 10:02:23.527977
7225 10:02:23.530099 [DutyScan_Calibration_Flow] k_type=0
7226 10:02:23.538925
7227 10:02:23.539515 ==CLK 0==
7228 10:02:23.541919 Final CLK duty delay cell = 0
7229 10:02:23.544924 [0] MAX Duty = 5156%(X100), DQS PI = 22
7230 10:02:23.548959 [0] MIN Duty = 4907%(X100), DQS PI = 0
7231 10:02:23.549524 [0] AVG Duty = 5031%(X100)
7232 10:02:23.552044
7233 10:02:23.555603 CH0 CLK Duty spec in!! Max-Min= 249%
7234 10:02:23.558472 [DutyScan_Calibration_Flow] ====Done====
7235 10:02:23.558942
7236 10:02:23.562127 [DutyScan_Calibration_Flow] k_type=1
7237 10:02:23.577590
7238 10:02:23.578147 ==DQS 0 ==
7239 10:02:23.581259 Final DQS duty delay cell = -4
7240 10:02:23.584874 [-4] MAX Duty = 5125%(X100), DQS PI = 24
7241 10:02:23.587876 [-4] MIN Duty = 4657%(X100), DQS PI = 0
7242 10:02:23.591407 [-4] AVG Duty = 4891%(X100)
7243 10:02:23.591985
7244 10:02:23.592358 ==DQS 1 ==
7245 10:02:23.594640 Final DQS duty delay cell = 0
7246 10:02:23.597902 [0] MAX Duty = 5187%(X100), DQS PI = 22
7247 10:02:23.601256 [0] MIN Duty = 5031%(X100), DQS PI = 52
7248 10:02:23.604792 [0] AVG Duty = 5109%(X100)
7249 10:02:23.605380
7250 10:02:23.607294 CH0 DQS 0 Duty spec in!! Max-Min= 468%
7251 10:02:23.607762
7252 10:02:23.610828 CH0 DQS 1 Duty spec in!! Max-Min= 156%
7253 10:02:23.614202 [DutyScan_Calibration_Flow] ====Done====
7254 10:02:23.614677
7255 10:02:23.617414 [DutyScan_Calibration_Flow] k_type=3
7256 10:02:23.634457
7257 10:02:23.635018 ==DQM 0 ==
7258 10:02:23.637881 Final DQM duty delay cell = 0
7259 10:02:23.641176 [0] MAX Duty = 5218%(X100), DQS PI = 32
7260 10:02:23.644292 [0] MIN Duty = 4907%(X100), DQS PI = 56
7261 10:02:23.647886 [0] AVG Duty = 5062%(X100)
7262 10:02:23.648462
7263 10:02:23.648863 ==DQM 1 ==
7264 10:02:23.650940 Final DQM duty delay cell = -4
7265 10:02:23.653824 [-4] MAX Duty = 4969%(X100), DQS PI = 22
7266 10:02:23.657861 [-4] MIN Duty = 4844%(X100), DQS PI = 34
7267 10:02:23.660712 [-4] AVG Duty = 4906%(X100)
7268 10:02:23.661188
7269 10:02:23.663781 CH0 DQM 0 Duty spec in!! Max-Min= 311%
7270 10:02:23.664200
7271 10:02:23.667731 CH0 DQM 1 Duty spec in!! Max-Min= 125%
7272 10:02:23.671148 [DutyScan_Calibration_Flow] ====Done====
7273 10:02:23.671666
7274 10:02:23.674253 [DutyScan_Calibration_Flow] k_type=2
7275 10:02:23.692291
7276 10:02:23.692985 ==DQ 0 ==
7277 10:02:23.695246 Final DQ duty delay cell = 0
7278 10:02:23.698596 [0] MAX Duty = 5062%(X100), DQS PI = 24
7279 10:02:23.701621 [0] MIN Duty = 4907%(X100), DQS PI = 0
7280 10:02:23.702350 [0] AVG Duty = 4984%(X100)
7281 10:02:23.702869
7282 10:02:23.704980 ==DQ 1 ==
7283 10:02:23.708732 Final DQ duty delay cell = 0
7284 10:02:23.712239 [0] MAX Duty = 5125%(X100), DQS PI = 6
7285 10:02:23.715224 [0] MIN Duty = 4938%(X100), DQS PI = 34
7286 10:02:23.715647 [0] AVG Duty = 5031%(X100)
7287 10:02:23.715979
7288 10:02:23.718562 CH0 DQ 0 Duty spec in!! Max-Min= 155%
7289 10:02:23.719104
7290 10:02:23.721899 CH0 DQ 1 Duty spec in!! Max-Min= 187%
7291 10:02:23.728321 [DutyScan_Calibration_Flow] ====Done====
7292 10:02:23.728929 ==
7293 10:02:23.731734 Dram Type= 6, Freq= 0, CH_1, rank 0
7294 10:02:23.734917 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7295 10:02:23.735329 ==
7296 10:02:23.738693 [Duty_Offset_Calibration]
7297 10:02:23.739099 B0:1 B1:0 CA:0
7298 10:02:23.739419
7299 10:02:23.741988 [DutyScan_Calibration_Flow] k_type=0
7300 10:02:23.750896
7301 10:02:23.751380 ==CLK 0==
7302 10:02:23.754142 Final CLK duty delay cell = -4
7303 10:02:23.757920 [-4] MAX Duty = 5000%(X100), DQS PI = 22
7304 10:02:23.760861 [-4] MIN Duty = 4844%(X100), DQS PI = 50
7305 10:02:23.764157 [-4] AVG Duty = 4922%(X100)
7306 10:02:23.764668
7307 10:02:23.767729 CH1 CLK Duty spec in!! Max-Min= 156%
7308 10:02:23.771518 [DutyScan_Calibration_Flow] ====Done====
7309 10:02:23.771926
7310 10:02:23.774377 [DutyScan_Calibration_Flow] k_type=1
7311 10:02:23.791296
7312 10:02:23.791834 ==DQS 0 ==
7313 10:02:23.794327 Final DQS duty delay cell = 0
7314 10:02:23.797690 [0] MAX Duty = 5094%(X100), DQS PI = 22
7315 10:02:23.801390 [0] MIN Duty = 4875%(X100), DQS PI = 0
7316 10:02:23.801824 [0] AVG Duty = 4984%(X100)
7317 10:02:23.804382
7318 10:02:23.804790 ==DQS 1 ==
7319 10:02:23.807900 Final DQS duty delay cell = 0
7320 10:02:23.811296 [0] MAX Duty = 5249%(X100), DQS PI = 16
7321 10:02:23.814234 [0] MIN Duty = 4938%(X100), DQS PI = 8
7322 10:02:23.814646 [0] AVG Duty = 5093%(X100)
7323 10:02:23.817602
7324 10:02:23.821318 CH1 DQS 0 Duty spec in!! Max-Min= 219%
7325 10:02:23.821843
7326 10:02:23.824571 CH1 DQS 1 Duty spec in!! Max-Min= 311%
7327 10:02:23.827364 [DutyScan_Calibration_Flow] ====Done====
7328 10:02:23.827774
7329 10:02:23.831079 [DutyScan_Calibration_Flow] k_type=3
7330 10:02:23.848090
7331 10:02:23.848577 ==DQM 0 ==
7332 10:02:23.851337 Final DQM duty delay cell = 0
7333 10:02:23.854297 [0] MAX Duty = 5187%(X100), DQS PI = 8
7334 10:02:23.857747 [0] MIN Duty = 4969%(X100), DQS PI = 48
7335 10:02:23.858162 [0] AVG Duty = 5078%(X100)
7336 10:02:23.860903
7337 10:02:23.861310 ==DQM 1 ==
7338 10:02:23.864856 Final DQM duty delay cell = 0
7339 10:02:23.867844 [0] MAX Duty = 5093%(X100), DQS PI = 16
7340 10:02:23.871357 [0] MIN Duty = 4907%(X100), DQS PI = 50
7341 10:02:23.874831 [0] AVG Duty = 5000%(X100)
7342 10:02:23.875343
7343 10:02:23.877424 CH1 DQM 0 Duty spec in!! Max-Min= 218%
7344 10:02:23.877838
7345 10:02:23.880732 CH1 DQM 1 Duty spec in!! Max-Min= 186%
7346 10:02:23.884975 [DutyScan_Calibration_Flow] ====Done====
7347 10:02:23.885487
7348 10:02:23.887677 [DutyScan_Calibration_Flow] k_type=2
7349 10:02:23.903883
7350 10:02:23.904389 ==DQ 0 ==
7351 10:02:23.907417 Final DQ duty delay cell = -4
7352 10:02:23.910995 [-4] MAX Duty = 5031%(X100), DQS PI = 8
7353 10:02:23.914530 [-4] MIN Duty = 4875%(X100), DQS PI = 46
7354 10:02:23.914969 [-4] AVG Duty = 4953%(X100)
7355 10:02:23.917299
7356 10:02:23.917822 ==DQ 1 ==
7357 10:02:23.920909 Final DQ duty delay cell = 0
7358 10:02:23.924162 [0] MAX Duty = 5156%(X100), DQS PI = 18
7359 10:02:23.927300 [0] MIN Duty = 4938%(X100), DQS PI = 10
7360 10:02:23.927840 [0] AVG Duty = 5047%(X100)
7361 10:02:23.930876
7362 10:02:23.931401 CH1 DQ 0 Duty spec in!! Max-Min= 156%
7363 10:02:23.934359
7364 10:02:23.937374 CH1 DQ 1 Duty spec in!! Max-Min= 218%
7365 10:02:23.940659 [DutyScan_Calibration_Flow] ====Done====
7366 10:02:23.944595 nWR fixed to 30
7367 10:02:23.945172 [ModeRegInit_LP4] CH0 RK0
7368 10:02:23.947371 [ModeRegInit_LP4] CH0 RK1
7369 10:02:23.950781 [ModeRegInit_LP4] CH1 RK0
7370 10:02:23.953805 [ModeRegInit_LP4] CH1 RK1
7371 10:02:23.954279 match AC timing 5
7372 10:02:23.957251 dramType 5, freq 1600, readDBI 0, DivMode 1, cbtMode 1
7373 10:02:23.964260 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
7374 10:02:23.967369 [WriteLatency GET] Version:0-MR_RL_field_value:5-WL:14
7375 10:02:23.974263 [TX_path_calculate] data rate=3200, WL=14, DQS_TotalUI=29
7376 10:02:23.977176 [TX_path_calculate] DQS = (3,5) DQS_OE = (3,2)
7377 10:02:23.977620 [MiockJmeterHQA]
7378 10:02:23.978084
7379 10:02:23.981111 [DramcMiockJmeter] u1RxGatingPI = 0
7380 10:02:23.984063 0 : 4255, 4027
7381 10:02:23.984612 4 : 4253, 4027
7382 10:02:23.985058 8 : 4252, 4027
7383 10:02:23.986875 12 : 4257, 4029
7384 10:02:23.987308 16 : 4257, 4029
7385 10:02:23.990677 20 : 4253, 4026
7386 10:02:23.991215 24 : 4252, 4027
7387 10:02:23.993452 28 : 4363, 4138
7388 10:02:23.993888 32 : 4253, 4027
7389 10:02:23.997155 36 : 4252, 4027
7390 10:02:23.997657 40 : 4253, 4027
7391 10:02:23.998001 44 : 4253, 4029
7392 10:02:24.000430 48 : 4252, 4027
7393 10:02:24.000880 52 : 4253, 4027
7394 10:02:24.003461 56 : 4363, 4139
7395 10:02:24.003892 60 : 4252, 4030
7396 10:02:24.007656 64 : 4253, 4029
7397 10:02:24.008084 68 : 4252, 4027
7398 10:02:24.010765 72 : 4361, 4137
7399 10:02:24.011291 76 : 4250, 4026
7400 10:02:24.011634 80 : 4250, 4027
7401 10:02:24.014094 84 : 4253, 4028
7402 10:02:24.014522 88 : 4250, 48
7403 10:02:24.016968 92 : 4250, 0
7404 10:02:24.017397 96 : 4250, 0
7405 10:02:24.017735 100 : 4252, 0
7406 10:02:24.020534 104 : 4250, 0
7407 10:02:24.020997 108 : 4252, 0
7408 10:02:24.021343 112 : 4250, 0
7409 10:02:24.023598 116 : 4250, 0
7410 10:02:24.024096 120 : 4255, 0
7411 10:02:24.027026 124 : 4255, 0
7412 10:02:24.027455 128 : 4250, 0
7413 10:02:24.027792 132 : 4250, 0
7414 10:02:24.030753 136 : 4250, 0
7415 10:02:24.031182 140 : 4252, 0
7416 10:02:24.033641 144 : 4361, 0
7417 10:02:24.034069 148 : 4361, 0
7418 10:02:24.034413 152 : 4250, 0
7419 10:02:24.036856 156 : 4250, 0
7420 10:02:24.037290 160 : 4255, 0
7421 10:02:24.040679 164 : 4250, 0
7422 10:02:24.041152 168 : 4250, 0
7423 10:02:24.041496 172 : 4250, 0
7424 10:02:24.043870 176 : 4250, 0
7425 10:02:24.044384 180 : 4253, 0
7426 10:02:24.047184 184 : 4250, 0
7427 10:02:24.047611 188 : 4252, 0
7428 10:02:24.047951 192 : 4250, 0
7429 10:02:24.050209 196 : 4361, 0
7430 10:02:24.050641 200 : 4361, 0
7431 10:02:24.054164 204 : 4250, 1341
7432 10:02:24.054613 208 : 4250, 3908
7433 10:02:24.054954 212 : 4250, 4027
7434 10:02:24.057068 216 : 4250, 4027
7435 10:02:24.057560 220 : 4363, 4139
7436 10:02:24.060370 224 : 4250, 4027
7437 10:02:24.060798 228 : 4250, 4027
7438 10:02:24.064143 232 : 4250, 4026
7439 10:02:24.064571 236 : 4250, 4027
7440 10:02:24.066888 240 : 4361, 4137
7441 10:02:24.067314 244 : 4250, 4026
7442 10:02:24.070339 248 : 4361, 4137
7443 10:02:24.070761 252 : 4250, 4027
7444 10:02:24.073501 256 : 4250, 4027
7445 10:02:24.073923 260 : 4250, 4026
7446 10:02:24.074313 264 : 4250, 4027
7447 10:02:24.077279 268 : 4250, 4027
7448 10:02:24.077724 272 : 4360, 4138
7449 10:02:24.080478 276 : 4250, 4027
7450 10:02:24.080943 280 : 4250, 4026
7451 10:02:24.083473 284 : 4250, 4027
7452 10:02:24.083893 288 : 4250, 4027
7453 10:02:24.087072 292 : 4360, 4137
7454 10:02:24.087468 296 : 4250, 4026
7455 10:02:24.090183 300 : 4361, 4137
7456 10:02:24.090651 304 : 4250, 4027
7457 10:02:24.094052 308 : 4250, 3989
7458 10:02:24.094614 312 : 4250, 2196
7459 10:02:24.094969 316 : 4250, 3
7460 10:02:24.097347
7461 10:02:24.097891 MIOCK jitter meter ch=0
7462 10:02:24.098253
7463 10:02:24.100277 1T = (316-88) = 228 dly cells
7464 10:02:24.107153 Clock freq = 1534 MHz, period = 651 ps, 1 dly cell = 285/100 ps
7465 10:02:24.107698 ==
7466 10:02:24.110772 Dram Type= 6, Freq= 0, CH_0, rank 0
7467 10:02:24.113526 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7468 10:02:24.113950 ==
7469 10:02:24.120140 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
7470 10:02:24.123446 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=1
7471 10:02:24.127064 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=1
7472 10:02:24.134277 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
7473 10:02:24.142604 [CA 0] Center 43 (13~74) winsize 62
7474 10:02:24.145751 [CA 1] Center 43 (13~74) winsize 62
7475 10:02:24.149554 [CA 2] Center 38 (9~68) winsize 60
7476 10:02:24.153026 [CA 3] Center 38 (8~68) winsize 61
7477 10:02:24.156242 [CA 4] Center 37 (7~67) winsize 61
7478 10:02:24.159203 [CA 5] Center 36 (7~65) winsize 59
7479 10:02:24.159621
7480 10:02:24.162753 [CmdBusTrainingLP45] Vref(ca) range 0: 32
7481 10:02:24.163192
7482 10:02:24.165870 [CATrainingPosCal] consider 1 rank data
7483 10:02:24.169141 u2DelayCellTimex100 = 285/100 ps
7484 10:02:24.172450 CA0 delay=43 (13~74),Diff = 7 PI (23 cell)
7485 10:02:24.179090 CA1 delay=43 (13~74),Diff = 7 PI (23 cell)
7486 10:02:24.182575 CA2 delay=38 (9~68),Diff = 2 PI (6 cell)
7487 10:02:24.185795 CA3 delay=38 (8~68),Diff = 2 PI (6 cell)
7488 10:02:24.189332 CA4 delay=37 (7~67),Diff = 1 PI (3 cell)
7489 10:02:24.192713 CA5 delay=36 (7~65),Diff = 0 PI (0 cell)
7490 10:02:24.193182
7491 10:02:24.195973 CA PerBit enable=1, Macro0, CA PI delay=36
7492 10:02:24.196496
7493 10:02:24.199740 [CBTSetCACLKResult] CA Dly = 36
7494 10:02:24.202572 CS Dly: 9 (0~40)
7495 10:02:24.205836 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=0
7496 10:02:24.209089 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=0
7497 10:02:24.209516 ==
7498 10:02:24.212072 Dram Type= 6, Freq= 0, CH_0, rank 1
7499 10:02:24.216252 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7500 10:02:24.219054 ==
7501 10:02:24.222650 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
7502 10:02:24.225562 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=1
7503 10:02:24.232031 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=1
7504 10:02:24.235778 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
7505 10:02:24.245879 [CA 0] Center 42 (12~73) winsize 62
7506 10:02:24.249262 [CA 1] Center 42 (12~73) winsize 62
7507 10:02:24.252728 [CA 2] Center 38 (8~68) winsize 61
7508 10:02:24.255905 [CA 3] Center 37 (8~67) winsize 60
7509 10:02:24.259462 [CA 4] Center 36 (6~66) winsize 61
7510 10:02:24.262545 [CA 5] Center 35 (5~65) winsize 61
7511 10:02:24.263078
7512 10:02:24.266401 [CmdBusTrainingLP45] Vref(ca) range 0: 32
7513 10:02:24.266933
7514 10:02:24.269088 [CATrainingPosCal] consider 2 rank data
7515 10:02:24.272326 u2DelayCellTimex100 = 285/100 ps
7516 10:02:24.276171 CA0 delay=43 (13~73),Diff = 7 PI (23 cell)
7517 10:02:24.282618 CA1 delay=43 (13~73),Diff = 7 PI (23 cell)
7518 10:02:24.285670 CA2 delay=38 (9~68),Diff = 2 PI (6 cell)
7519 10:02:24.289343 CA3 delay=37 (8~67),Diff = 1 PI (3 cell)
7520 10:02:24.292605 CA4 delay=36 (7~66),Diff = 0 PI (0 cell)
7521 10:02:24.295452 CA5 delay=36 (7~65),Diff = 0 PI (0 cell)
7522 10:02:24.295901
7523 10:02:24.298723 CA PerBit enable=1, Macro0, CA PI delay=36
7524 10:02:24.299151
7525 10:02:24.302330 [CBTSetCACLKResult] CA Dly = 36
7526 10:02:24.305315 CS Dly: 10 (0~42)
7527 10:02:24.309169 [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=0
7528 10:02:24.312011 [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=0
7529 10:02:24.312439
7530 10:02:24.315568 ----->DramcWriteLeveling(PI) begin...
7531 10:02:24.316085 ==
7532 10:02:24.319250 Dram Type= 6, Freq= 0, CH_0, rank 0
7533 10:02:24.325237 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7534 10:02:24.325786 ==
7535 10:02:24.328870 Write leveling (Byte 0): 37 => 37
7536 10:02:24.329302 Write leveling (Byte 1): 27 => 27
7537 10:02:24.332014 DramcWriteLeveling(PI) end<-----
7538 10:02:24.332661
7539 10:02:24.333044 ==
7540 10:02:24.335249 Dram Type= 6, Freq= 0, CH_0, rank 0
7541 10:02:24.342342 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7542 10:02:24.342872 ==
7543 10:02:24.346109 [Gating] SW mode calibration
7544 10:02:24.352171 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
7545 10:02:24.355665 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
7546 10:02:24.362804 1 4 0 | B1->B0 | 2323 2423 | 0 1 | (0 0) (0 0)
7547 10:02:24.365474 1 4 4 | B1->B0 | 2323 2322 | 0 1 | (0 0) (0 0)
7548 10:02:24.369137 1 4 8 | B1->B0 | 2323 2828 | 0 1 | (0 0) (0 0)
7549 10:02:24.375411 1 4 12 | B1->B0 | 2323 3837 | 0 1 | (0 0) (1 1)
7550 10:02:24.378416 1 4 16 | B1->B0 | 2323 3535 | 0 0 | (0 0) (0 0)
7551 10:02:24.382213 1 4 20 | B1->B0 | 3434 3535 | 1 0 | (1 1) (0 0)
7552 10:02:24.388740 1 4 24 | B1->B0 | 3434 3534 | 1 1 | (1 1) (0 0)
7553 10:02:24.392440 1 4 28 | B1->B0 | 3434 3535 | 1 1 | (1 1) (1 1)
7554 10:02:24.395419 1 5 0 | B1->B0 | 3434 3535 | 1 0 | (1 1) (1 1)
7555 10:02:24.398850 1 5 4 | B1->B0 | 3434 3837 | 1 1 | (1 1) (0 0)
7556 10:02:24.405220 1 5 8 | B1->B0 | 3434 3332 | 1 1 | (1 1) (0 1)
7557 10:02:24.408729 1 5 12 | B1->B0 | 3434 302f | 1 1 | (1 1) (0 1)
7558 10:02:24.412343 1 5 16 | B1->B0 | 3434 2b2a | 1 1 | (1 1) (0 0)
7559 10:02:24.418322 1 5 20 | B1->B0 | 2424 2a2a | 0 0 | (0 0) (0 0)
7560 10:02:24.422284 1 5 24 | B1->B0 | 2323 2c2b | 0 1 | (0 0) (0 0)
7561 10:02:24.425210 1 5 28 | B1->B0 | 2323 2525 | 0 0 | (0 0) (0 0)
7562 10:02:24.431873 1 6 0 | B1->B0 | 2323 2828 | 0 0 | (0 0) (0 0)
7563 10:02:24.435346 1 6 4 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
7564 10:02:24.438680 1 6 8 | B1->B0 | 2323 2d2d | 0 1 | (0 0) (0 0)
7565 10:02:24.445090 1 6 12 | B1->B0 | 2323 4545 | 0 0 | (0 0) (0 0)
7566 10:02:24.448370 1 6 16 | B1->B0 | 2727 4646 | 0 0 | (0 0) (0 0)
7567 10:02:24.452270 1 6 20 | B1->B0 | 4545 4645 | 0 1 | (0 0) (0 0)
7568 10:02:24.458370 1 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7569 10:02:24.461752 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7570 10:02:24.465395 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7571 10:02:24.471398 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7572 10:02:24.475336 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
7573 10:02:24.478714 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
7574 10:02:24.485418 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
7575 10:02:24.488363 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
7576 10:02:24.491865 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7577 10:02:24.498368 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7578 10:02:24.501283 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7579 10:02:24.504623 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7580 10:02:24.511408 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7581 10:02:24.515124 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7582 10:02:24.518555 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7583 10:02:24.524872 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7584 10:02:24.528405 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7585 10:02:24.531779 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7586 10:02:24.538236 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7587 10:02:24.541649 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7588 10:02:24.544659 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
7589 10:02:24.548683 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
7590 10:02:24.554524 1 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)
7591 10:02:24.558180 1 9 20 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)
7592 10:02:24.561050 Total UI for P1: 0, mck2ui 16
7593 10:02:24.565168 best dqsien dly found for B0: ( 1, 9, 12)
7594 10:02:24.568272 1 9 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7595 10:02:24.571514 Total UI for P1: 0, mck2ui 16
7596 10:02:24.574492 best dqsien dly found for B1: ( 1, 9, 20)
7597 10:02:24.578022 best DQS0 dly(MCK, UI, PI) = (1, 9, 12)
7598 10:02:24.581436 best DQS1 dly(MCK, UI, PI) = (1, 9, 20)
7599 10:02:24.584950
7600 10:02:24.588124 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 12)
7601 10:02:24.591460 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 20)
7602 10:02:24.594986 [Gating] SW calibration Done
7603 10:02:24.595504 ==
7604 10:02:24.598024 Dram Type= 6, Freq= 0, CH_0, rank 0
7605 10:02:24.601308 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7606 10:02:24.601769 ==
7607 10:02:24.604257 RX Vref Scan: 0
7608 10:02:24.604846
7609 10:02:24.605207 RX Vref 0 -> 0, step: 1
7610 10:02:24.605530
7611 10:02:24.607791 RX Delay 0 -> 252, step: 8
7612 10:02:24.611177 iDelay=200, Bit 0, Center 135 (80 ~ 191) 112
7613 10:02:24.614140 iDelay=200, Bit 1, Center 143 (88 ~ 199) 112
7614 10:02:24.620715 iDelay=200, Bit 2, Center 135 (80 ~ 191) 112
7615 10:02:24.624272 iDelay=200, Bit 3, Center 131 (80 ~ 183) 104
7616 10:02:24.628046 iDelay=200, Bit 4, Center 139 (88 ~ 191) 104
7617 10:02:24.631223 iDelay=200, Bit 5, Center 123 (72 ~ 175) 104
7618 10:02:24.634645 iDelay=200, Bit 6, Center 147 (96 ~ 199) 104
7619 10:02:24.641160 iDelay=200, Bit 7, Center 143 (96 ~ 191) 96
7620 10:02:24.644475 iDelay=200, Bit 8, Center 119 (72 ~ 167) 96
7621 10:02:24.647965 iDelay=200, Bit 9, Center 119 (64 ~ 175) 112
7622 10:02:24.651656 iDelay=200, Bit 10, Center 131 (80 ~ 183) 104
7623 10:02:24.654963 iDelay=200, Bit 11, Center 123 (72 ~ 175) 104
7624 10:02:24.657733 iDelay=200, Bit 12, Center 135 (80 ~ 191) 112
7625 10:02:24.664562 iDelay=200, Bit 13, Center 135 (80 ~ 191) 112
7626 10:02:24.668118 iDelay=200, Bit 14, Center 139 (88 ~ 191) 104
7627 10:02:24.671433 iDelay=200, Bit 15, Center 135 (80 ~ 191) 112
7628 10:02:24.671876 ==
7629 10:02:24.674638 Dram Type= 6, Freq= 0, CH_0, rank 0
7630 10:02:24.677893 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7631 10:02:24.678322 ==
7632 10:02:24.681682 DQS Delay:
7633 10:02:24.682108 DQS0 = 0, DQS1 = 0
7634 10:02:24.684155 DQM Delay:
7635 10:02:24.684588 DQM0 = 137, DQM1 = 129
7636 10:02:24.687957 DQ Delay:
7637 10:02:24.691307 DQ0 =135, DQ1 =143, DQ2 =135, DQ3 =131
7638 10:02:24.694444 DQ4 =139, DQ5 =123, DQ6 =147, DQ7 =143
7639 10:02:24.697603 DQ8 =119, DQ9 =119, DQ10 =131, DQ11 =123
7640 10:02:24.701245 DQ12 =135, DQ13 =135, DQ14 =139, DQ15 =135
7641 10:02:24.701781
7642 10:02:24.702223
7643 10:02:24.702628 ==
7644 10:02:24.704290 Dram Type= 6, Freq= 0, CH_0, rank 0
7645 10:02:24.707175 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7646 10:02:24.707695 ==
7647 10:02:24.708163
7648 10:02:24.711120
7649 10:02:24.711539 TX Vref Scan disable
7650 10:02:24.714089 == TX Byte 0 ==
7651 10:02:24.717429 Update DQ dly =992 (3 ,6, 32) DQ OEN =(3 ,3)
7652 10:02:24.721126 Update DQM dly =992 (3 ,6, 32) DQM OEN =(3 ,3)
7653 10:02:24.724545 == TX Byte 1 ==
7654 10:02:24.727814 Update DQ dly =981 (3 ,6, 21) DQ OEN =(3 ,3)
7655 10:02:24.731154 Update DQM dly =981 (3 ,6, 21) DQM OEN =(3 ,3)
7656 10:02:24.731577 ==
7657 10:02:24.734616 Dram Type= 6, Freq= 0, CH_0, rank 0
7658 10:02:24.741249 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7659 10:02:24.741745 ==
7660 10:02:24.752339
7661 10:02:24.756102 TX Vref early break, caculate TX vref
7662 10:02:24.758888 TX Vref=16, minBit 3, minWin=22, winSum=375
7663 10:02:24.762232 TX Vref=18, minBit 0, minWin=23, winSum=385
7664 10:02:24.766276 TX Vref=20, minBit 0, minWin=23, winSum=397
7665 10:02:24.768947 TX Vref=22, minBit 1, minWin=24, winSum=408
7666 10:02:24.772397 TX Vref=24, minBit 0, minWin=25, winSum=415
7667 10:02:24.778858 TX Vref=26, minBit 2, minWin=25, winSum=424
7668 10:02:24.782330 TX Vref=28, minBit 2, minWin=25, winSum=426
7669 10:02:24.785366 TX Vref=30, minBit 2, minWin=24, winSum=410
7670 10:02:24.788722 TX Vref=32, minBit 1, minWin=24, winSum=403
7671 10:02:24.795797 [TxChooseVref] Worse bit 2, Min win 25, Win sum 426, Final Vref 28
7672 10:02:24.796223
7673 10:02:24.798804 Final TX Range 0 Vref 28
7674 10:02:24.799364
7675 10:02:24.799705 ==
7676 10:02:24.801813 Dram Type= 6, Freq= 0, CH_0, rank 0
7677 10:02:24.805221 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7678 10:02:24.805798 ==
7679 10:02:24.806315
7680 10:02:24.806808
7681 10:02:24.808647 TX Vref Scan disable
7682 10:02:24.815369 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =285/100 ps
7683 10:02:24.815881 == TX Byte 0 ==
7684 10:02:24.818638 u2DelayCellOfst[0]=10 cells (3 PI)
7685 10:02:24.821939 u2DelayCellOfst[1]=13 cells (4 PI)
7686 10:02:24.825666 u2DelayCellOfst[2]=10 cells (3 PI)
7687 10:02:24.828566 u2DelayCellOfst[3]=6 cells (2 PI)
7688 10:02:24.832341 u2DelayCellOfst[4]=6 cells (2 PI)
7689 10:02:24.832927 u2DelayCellOfst[5]=0 cells (0 PI)
7690 10:02:24.836176 u2DelayCellOfst[6]=17 cells (5 PI)
7691 10:02:24.838649 u2DelayCellOfst[7]=17 cells (5 PI)
7692 10:02:24.845095 Update DQ dly =991 (3 ,6, 31) DQ OEN =(3 ,3)
7693 10:02:24.849068 Update DQM dly =993 (3 ,6, 33) DQM OEN =(3 ,3)
7694 10:02:24.849590 == TX Byte 1 ==
7695 10:02:24.851958 u2DelayCellOfst[8]=0 cells (0 PI)
7696 10:02:24.854967 u2DelayCellOfst[9]=0 cells (0 PI)
7697 10:02:24.858294 u2DelayCellOfst[10]=6 cells (2 PI)
7698 10:02:24.861635 u2DelayCellOfst[11]=3 cells (1 PI)
7699 10:02:24.865472 u2DelayCellOfst[12]=10 cells (3 PI)
7700 10:02:24.868766 u2DelayCellOfst[13]=6 cells (2 PI)
7701 10:02:24.871919 u2DelayCellOfst[14]=10 cells (3 PI)
7702 10:02:24.875162 u2DelayCellOfst[15]=10 cells (3 PI)
7703 10:02:24.878452 Update DQ dly =980 (3 ,6, 20) DQ OEN =(3 ,3)
7704 10:02:24.881737 Update DQM dly =981 (3 ,6, 21) DQM OEN =(3 ,3)
7705 10:02:24.885160 DramC Write-DBI on
7706 10:02:24.885698 ==
7707 10:02:24.888518 Dram Type= 6, Freq= 0, CH_0, rank 0
7708 10:02:24.892159 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7709 10:02:24.892703 ==
7710 10:02:24.893206
7711 10:02:24.893628
7712 10:02:24.894948 TX Vref Scan disable
7713 10:02:24.898811 == TX Byte 0 ==
7714 10:02:24.901921 Update DQM dly =736 (2 ,6, 32) DQM OEN =(3 ,3)
7715 10:02:24.905101 == TX Byte 1 ==
7716 10:02:24.908403 Update DQM dly =722 (2 ,6, 18) DQM OEN =(3 ,3)
7717 10:02:24.908870 DramC Write-DBI off
7718 10:02:24.909304
7719 10:02:24.912273 [DATLAT]
7720 10:02:24.912854 Freq=1600, CH0 RK0
7721 10:02:24.913315
7722 10:02:24.915133 DATLAT Default: 0xf
7723 10:02:24.915567 0, 0xFFFF, sum = 0
7724 10:02:24.918298 1, 0xFFFF, sum = 0
7725 10:02:24.918742 2, 0xFFFF, sum = 0
7726 10:02:24.922253 3, 0xFFFF, sum = 0
7727 10:02:24.922803 4, 0xFFFF, sum = 0
7728 10:02:24.925156 5, 0xFFFF, sum = 0
7729 10:02:24.925700 6, 0xFFFF, sum = 0
7730 10:02:24.928454 7, 0xFFFF, sum = 0
7731 10:02:24.928957 8, 0xFFFF, sum = 0
7732 10:02:24.932015 9, 0xFFFF, sum = 0
7733 10:02:24.932546 10, 0xFFFF, sum = 0
7734 10:02:24.935368 11, 0xFFFF, sum = 0
7735 10:02:24.938384 12, 0xFFFF, sum = 0
7736 10:02:24.938815 13, 0xFFFF, sum = 0
7737 10:02:24.941985 14, 0x0, sum = 1
7738 10:02:24.942522 15, 0x0, sum = 2
7739 10:02:24.942865 16, 0x0, sum = 3
7740 10:02:24.944777 17, 0x0, sum = 4
7741 10:02:24.945250 best_step = 15
7742 10:02:24.945581
7743 10:02:24.948400 ==
7744 10:02:24.948974 Dram Type= 6, Freq= 0, CH_0, rank 0
7745 10:02:24.955581 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7746 10:02:24.956107 ==
7747 10:02:24.956449 RX Vref Scan: 1
7748 10:02:24.956767
7749 10:02:24.958316 Set Vref Range= 24 -> 127
7750 10:02:24.958775
7751 10:02:24.961757 RX Vref 24 -> 127, step: 1
7752 10:02:24.962185
7753 10:02:24.964778 RX Delay 19 -> 252, step: 4
7754 10:02:24.965242
7755 10:02:24.969026 Set Vref, RX VrefLevel [Byte0]: 24
7756 10:02:24.971650 [Byte1]: 24
7757 10:02:24.972320
7758 10:02:24.975279 Set Vref, RX VrefLevel [Byte0]: 25
7759 10:02:24.978223 [Byte1]: 25
7760 10:02:24.978656
7761 10:02:24.981958 Set Vref, RX VrefLevel [Byte0]: 26
7762 10:02:24.985441 [Byte1]: 26
7763 10:02:24.988090
7764 10:02:24.988518 Set Vref, RX VrefLevel [Byte0]: 27
7765 10:02:24.991961 [Byte1]: 27
7766 10:02:24.995815
7767 10:02:24.996513 Set Vref, RX VrefLevel [Byte0]: 28
7768 10:02:24.999107 [Byte1]: 28
7769 10:02:25.003432
7770 10:02:25.003958 Set Vref, RX VrefLevel [Byte0]: 29
7771 10:02:25.006884 [Byte1]: 29
7772 10:02:25.011188
7773 10:02:25.011702 Set Vref, RX VrefLevel [Byte0]: 30
7774 10:02:25.014149 [Byte1]: 30
7775 10:02:25.018614
7776 10:02:25.019133 Set Vref, RX VrefLevel [Byte0]: 31
7777 10:02:25.022045 [Byte1]: 31
7778 10:02:25.026128
7779 10:02:25.026787 Set Vref, RX VrefLevel [Byte0]: 32
7780 10:02:25.028956 [Byte1]: 32
7781 10:02:25.034214
7782 10:02:25.034736 Set Vref, RX VrefLevel [Byte0]: 33
7783 10:02:25.037028 [Byte1]: 33
7784 10:02:25.041247
7785 10:02:25.041774 Set Vref, RX VrefLevel [Byte0]: 34
7786 10:02:25.044192 [Byte1]: 34
7787 10:02:25.048911
7788 10:02:25.049424 Set Vref, RX VrefLevel [Byte0]: 35
7789 10:02:25.052334 [Byte1]: 35
7790 10:02:25.056581
7791 10:02:25.057276 Set Vref, RX VrefLevel [Byte0]: 36
7792 10:02:25.059805 [Byte1]: 36
7793 10:02:25.064254
7794 10:02:25.064773 Set Vref, RX VrefLevel [Byte0]: 37
7795 10:02:25.067307 [Byte1]: 37
7796 10:02:25.071579
7797 10:02:25.072259 Set Vref, RX VrefLevel [Byte0]: 38
7798 10:02:25.074850 [Byte1]: 38
7799 10:02:25.079194
7800 10:02:25.079727 Set Vref, RX VrefLevel [Byte0]: 39
7801 10:02:25.082331 [Byte1]: 39
7802 10:02:25.086761
7803 10:02:25.087295 Set Vref, RX VrefLevel [Byte0]: 40
7804 10:02:25.090333 [Byte1]: 40
7805 10:02:25.094563
7806 10:02:25.095095 Set Vref, RX VrefLevel [Byte0]: 41
7807 10:02:25.097456 [Byte1]: 41
7808 10:02:25.101658
7809 10:02:25.102190 Set Vref, RX VrefLevel [Byte0]: 42
7810 10:02:25.105453 [Byte1]: 42
7811 10:02:25.109328
7812 10:02:25.109768 Set Vref, RX VrefLevel [Byte0]: 43
7813 10:02:25.112275 [Byte1]: 43
7814 10:02:25.116958
7815 10:02:25.117507 Set Vref, RX VrefLevel [Byte0]: 44
7816 10:02:25.120544 [Byte1]: 44
7817 10:02:25.124127
7818 10:02:25.124571 Set Vref, RX VrefLevel [Byte0]: 45
7819 10:02:25.127399 [Byte1]: 45
7820 10:02:25.131845
7821 10:02:25.132403 Set Vref, RX VrefLevel [Byte0]: 46
7822 10:02:25.135411 [Byte1]: 46
7823 10:02:25.139554
7824 10:02:25.140087 Set Vref, RX VrefLevel [Byte0]: 47
7825 10:02:25.143301 [Byte1]: 47
7826 10:02:25.147137
7827 10:02:25.147559 Set Vref, RX VrefLevel [Byte0]: 48
7828 10:02:25.150504 [Byte1]: 48
7829 10:02:25.154887
7830 10:02:25.155557 Set Vref, RX VrefLevel [Byte0]: 49
7831 10:02:25.157878 [Byte1]: 49
7832 10:02:25.162338
7833 10:02:25.162759 Set Vref, RX VrefLevel [Byte0]: 50
7834 10:02:25.165837 [Byte1]: 50
7835 10:02:25.169708
7836 10:02:25.170228 Set Vref, RX VrefLevel [Byte0]: 51
7837 10:02:25.172880 [Byte1]: 51
7838 10:02:25.177436
7839 10:02:25.177958 Set Vref, RX VrefLevel [Byte0]: 52
7840 10:02:25.181260 [Byte1]: 52
7841 10:02:25.185434
7842 10:02:25.185950 Set Vref, RX VrefLevel [Byte0]: 53
7843 10:02:25.188155 [Byte1]: 53
7844 10:02:25.192681
7845 10:02:25.193242 Set Vref, RX VrefLevel [Byte0]: 54
7846 10:02:25.196238 [Byte1]: 54
7847 10:02:25.200016
7848 10:02:25.200536 Set Vref, RX VrefLevel [Byte0]: 55
7849 10:02:25.203841 [Byte1]: 55
7850 10:02:25.207992
7851 10:02:25.208518 Set Vref, RX VrefLevel [Byte0]: 56
7852 10:02:25.210752 [Byte1]: 56
7853 10:02:25.215276
7854 10:02:25.215963 Set Vref, RX VrefLevel [Byte0]: 57
7855 10:02:25.218596 [Byte1]: 57
7856 10:02:25.223576
7857 10:02:25.224107 Set Vref, RX VrefLevel [Byte0]: 58
7858 10:02:25.226349 [Byte1]: 58
7859 10:02:25.230121
7860 10:02:25.230654 Set Vref, RX VrefLevel [Byte0]: 59
7861 10:02:25.233499 [Byte1]: 59
7862 10:02:25.238299
7863 10:02:25.238822 Set Vref, RX VrefLevel [Byte0]: 60
7864 10:02:25.240998 [Byte1]: 60
7865 10:02:25.245482
7866 10:02:25.245905 Set Vref, RX VrefLevel [Byte0]: 61
7867 10:02:25.248667 [Byte1]: 61
7868 10:02:25.253374
7869 10:02:25.253980 Set Vref, RX VrefLevel [Byte0]: 62
7870 10:02:25.256698 [Byte1]: 62
7871 10:02:25.260776
7872 10:02:25.261359 Set Vref, RX VrefLevel [Byte0]: 63
7873 10:02:25.263912 [Byte1]: 63
7874 10:02:25.268544
7875 10:02:25.269141 Set Vref, RX VrefLevel [Byte0]: 64
7876 10:02:25.271520 [Byte1]: 64
7877 10:02:25.276044
7878 10:02:25.276567 Set Vref, RX VrefLevel [Byte0]: 65
7879 10:02:25.278882 [Byte1]: 65
7880 10:02:25.283886
7881 10:02:25.284408 Set Vref, RX VrefLevel [Byte0]: 66
7882 10:02:25.286961 [Byte1]: 66
7883 10:02:25.290698
7884 10:02:25.291184 Set Vref, RX VrefLevel [Byte0]: 67
7885 10:02:25.294520 [Byte1]: 67
7886 10:02:25.298125
7887 10:02:25.298553 Set Vref, RX VrefLevel [Byte0]: 68
7888 10:02:25.302333 [Byte1]: 68
7889 10:02:25.306318
7890 10:02:25.306742 Set Vref, RX VrefLevel [Byte0]: 69
7891 10:02:25.309524 [Byte1]: 69
7892 10:02:25.313999
7893 10:02:25.314425 Set Vref, RX VrefLevel [Byte0]: 70
7894 10:02:25.316916 [Byte1]: 70
7895 10:02:25.321183
7896 10:02:25.321609 Set Vref, RX VrefLevel [Byte0]: 71
7897 10:02:25.324908 [Byte1]: 71
7898 10:02:25.328694
7899 10:02:25.329190 Set Vref, RX VrefLevel [Byte0]: 72
7900 10:02:25.332093 [Byte1]: 72
7901 10:02:25.336229
7902 10:02:25.336700 Set Vref, RX VrefLevel [Byte0]: 73
7903 10:02:25.339276 [Byte1]: 73
7904 10:02:25.343852
7905 10:02:25.347049 Set Vref, RX VrefLevel [Byte0]: 74
7906 10:02:25.347469 [Byte1]: 74
7907 10:02:25.351093
7908 10:02:25.351512 Set Vref, RX VrefLevel [Byte0]: 75
7909 10:02:25.354617 [Byte1]: 75
7910 10:02:25.358836
7911 10:02:25.359258 Final RX Vref Byte 0 = 56 to rank0
7912 10:02:25.362078 Final RX Vref Byte 1 = 60 to rank0
7913 10:02:25.365565 Final RX Vref Byte 0 = 56 to rank1
7914 10:02:25.368685 Final RX Vref Byte 1 = 60 to rank1==
7915 10:02:25.372125 Dram Type= 6, Freq= 0, CH_0, rank 0
7916 10:02:25.378549 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7917 10:02:25.378982 ==
7918 10:02:25.379320 DQS Delay:
7919 10:02:25.379636 DQS0 = 0, DQS1 = 0
7920 10:02:25.381898 DQM Delay:
7921 10:02:25.382326 DQM0 = 133, DQM1 = 127
7922 10:02:25.385367 DQ Delay:
7923 10:02:25.388929 DQ0 =134, DQ1 =136, DQ2 =134, DQ3 =132
7924 10:02:25.392038 DQ4 =132, DQ5 =124, DQ6 =140, DQ7 =138
7925 10:02:25.395588 DQ8 =116, DQ9 =118, DQ10 =130, DQ11 =120
7926 10:02:25.398751 DQ12 =132, DQ13 =134, DQ14 =138, DQ15 =134
7927 10:02:25.399173
7928 10:02:25.399504
7929 10:02:25.399809
7930 10:02:25.401963 [DramC_TX_OE_Calibration] TA2
7931 10:02:25.405757 Original DQ_B0 (3 6) =30, OEN = 27
7932 10:02:25.408892 Original DQ_B1 (3 6) =30, OEN = 27
7933 10:02:25.412142 24, 0x0, End_B0=24 End_B1=24
7934 10:02:25.412569 25, 0x0, End_B0=25 End_B1=25
7935 10:02:25.415332 26, 0x0, End_B0=26 End_B1=26
7936 10:02:25.419051 27, 0x0, End_B0=27 End_B1=27
7937 10:02:25.422037 28, 0x0, End_B0=28 End_B1=28
7938 10:02:25.422464 29, 0x0, End_B0=29 End_B1=29
7939 10:02:25.425103 30, 0x0, End_B0=30 End_B1=30
7940 10:02:25.428542 31, 0x4545, End_B0=30 End_B1=30
7941 10:02:25.431741 Byte0 end_step=30 best_step=27
7942 10:02:25.435124 Byte1 end_step=30 best_step=27
7943 10:02:25.439005 Byte0 TX OE(2T, 0.5T) = (3, 3)
7944 10:02:25.441880 Byte1 TX OE(2T, 0.5T) = (3, 3)
7945 10:02:25.442302
7946 10:02:25.442633
7947 10:02:25.448487 [DQSOSCAuto] RK0, (LSB)MR18= 0x2521, (MSB)MR19= 0x303, tDQSOscB0 = 393 ps tDQSOscB1 = 391 ps
7948 10:02:25.451992 CH0 RK0: MR19=303, MR18=2521
7949 10:02:25.458505 CH0_RK0: MR19=0x303, MR18=0x2521, DQSOSC=391, MR23=63, INC=24, DEC=16
7950 10:02:25.458935
7951 10:02:25.461792 ----->DramcWriteLeveling(PI) begin...
7952 10:02:25.462240 ==
7953 10:02:25.464944 Dram Type= 6, Freq= 0, CH_0, rank 1
7954 10:02:25.468404 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7955 10:02:25.468859 ==
7956 10:02:25.471826 Write leveling (Byte 0): 36 => 36
7957 10:02:25.475450 Write leveling (Byte 1): 29 => 29
7958 10:02:25.478286 DramcWriteLeveling(PI) end<-----
7959 10:02:25.478705
7960 10:02:25.479038 ==
7961 10:02:25.482129 Dram Type= 6, Freq= 0, CH_0, rank 1
7962 10:02:25.485202 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
7963 10:02:25.485626 ==
7964 10:02:25.488918 [Gating] SW mode calibration
7965 10:02:25.494920 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
7966 10:02:25.502193 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
7967 10:02:25.505227 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7968 10:02:25.508262 1 4 4 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
7969 10:02:25.515099 1 4 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
7970 10:02:25.518424 1 4 12 | B1->B0 | 2323 2626 | 0 0 | (0 0) (0 0)
7971 10:02:25.521739 1 4 16 | B1->B0 | 3030 3535 | 1 0 | (1 1) (1 1)
7972 10:02:25.528313 1 4 20 | B1->B0 | 3434 3534 | 1 1 | (1 1) (1 1)
7973 10:02:25.531670 1 4 24 | B1->B0 | 3434 3737 | 1 1 | (1 1) (0 0)
7974 10:02:25.535093 1 4 28 | B1->B0 | 3434 3535 | 1 1 | (1 1) (1 1)
7975 10:02:25.541421 1 5 0 | B1->B0 | 3434 3535 | 1 1 | (1 1) (1 1)
7976 10:02:25.544913 1 5 4 | B1->B0 | 3434 3636 | 1 1 | (1 1) (0 0)
7977 10:02:25.547940 1 5 8 | B1->B0 | 3434 3636 | 1 1 | (1 0) (1 0)
7978 10:02:25.554608 1 5 12 | B1->B0 | 3434 3131 | 1 1 | (1 0) (0 1)
7979 10:02:25.557915 1 5 16 | B1->B0 | 3232 2323 | 0 0 | (0 1) (1 0)
7980 10:02:25.561023 1 5 20 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)
7981 10:02:25.568181 1 5 24 | B1->B0 | 2323 2727 | 0 0 | (0 0) (0 0)
7982 10:02:25.571204 1 5 28 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
7983 10:02:25.574731 1 6 0 | B1->B0 | 2323 2525 | 0 1 | (0 0) (0 0)
7984 10:02:25.581493 1 6 4 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
7985 10:02:25.584670 1 6 8 | B1->B0 | 2323 2524 | 0 1 | (0 0) (0 0)
7986 10:02:25.587969 1 6 12 | B1->B0 | 2323 3030 | 0 0 | (0 0) (0 0)
7987 10:02:25.594385 1 6 16 | B1->B0 | 3c3c 4646 | 0 0 | (0 0) (0 0)
7988 10:02:25.597628 1 6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7989 10:02:25.601393 1 6 24 | B1->B0 | 4646 4645 | 0 1 | (0 0) (0 0)
7990 10:02:25.608251 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7991 10:02:25.611221 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7992 10:02:25.614501 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7993 10:02:25.620929 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7994 10:02:25.624409 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
7995 10:02:25.628149 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7996 10:02:25.634405 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7997 10:02:25.637750 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7998 10:02:25.640913 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
7999 10:02:25.647813 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8000 10:02:25.650869 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8001 10:02:25.654360 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8002 10:02:25.657938 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8003 10:02:25.664473 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8004 10:02:25.668195 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8005 10:02:25.671018 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8006 10:02:25.678059 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8007 10:02:25.681329 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8008 10:02:25.684297 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8009 10:02:25.690802 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8010 10:02:25.694990 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
8011 10:02:25.697736 1 9 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
8012 10:02:25.704513 1 9 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8013 10:02:25.704982 Total UI for P1: 0, mck2ui 16
8014 10:02:25.711121 best dqsien dly found for B0: ( 1, 9, 14)
8015 10:02:25.711584 Total UI for P1: 0, mck2ui 16
8016 10:02:25.717806 best dqsien dly found for B1: ( 1, 9, 14)
8017 10:02:25.721084 best DQS0 dly(MCK, UI, PI) = (1, 9, 14)
8018 10:02:25.724673 best DQS1 dly(MCK, UI, PI) = (1, 9, 14)
8019 10:02:25.725127
8020 10:02:25.727752 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 14)
8021 10:02:25.731422 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 14)
8022 10:02:25.734512 [Gating] SW calibration Done
8023 10:02:25.734939 ==
8024 10:02:25.737450 Dram Type= 6, Freq= 0, CH_0, rank 1
8025 10:02:25.741100 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8026 10:02:25.741531 ==
8027 10:02:25.744214 RX Vref Scan: 0
8028 10:02:25.744642
8029 10:02:25.745076 RX Vref 0 -> 0, step: 1
8030 10:02:25.745405
8031 10:02:25.747855 RX Delay 0 -> 252, step: 8
8032 10:02:25.750790 iDelay=200, Bit 0, Center 135 (80 ~ 191) 112
8033 10:02:25.757588 iDelay=200, Bit 1, Center 139 (88 ~ 191) 104
8034 10:02:25.760996 iDelay=200, Bit 2, Center 135 (80 ~ 191) 112
8035 10:02:25.764227 iDelay=200, Bit 3, Center 135 (80 ~ 191) 112
8036 10:02:25.767763 iDelay=200, Bit 4, Center 139 (88 ~ 191) 104
8037 10:02:25.771116 iDelay=200, Bit 5, Center 127 (72 ~ 183) 112
8038 10:02:25.774192 iDelay=200, Bit 6, Center 143 (88 ~ 199) 112
8039 10:02:25.780630 iDelay=200, Bit 7, Center 143 (88 ~ 199) 112
8040 10:02:25.784278 iDelay=200, Bit 8, Center 119 (64 ~ 175) 112
8041 10:02:25.787644 iDelay=200, Bit 9, Center 119 (64 ~ 175) 112
8042 10:02:25.790822 iDelay=200, Bit 10, Center 127 (72 ~ 183) 112
8043 10:02:25.797365 iDelay=200, Bit 11, Center 119 (64 ~ 175) 112
8044 10:02:25.800752 iDelay=200, Bit 12, Center 135 (80 ~ 191) 112
8045 10:02:25.803955 iDelay=200, Bit 13, Center 135 (80 ~ 191) 112
8046 10:02:25.807458 iDelay=200, Bit 14, Center 135 (80 ~ 191) 112
8047 10:02:25.810655 iDelay=200, Bit 15, Center 135 (80 ~ 191) 112
8048 10:02:25.813953 ==
8049 10:02:25.814392 Dram Type= 6, Freq= 0, CH_0, rank 1
8050 10:02:25.821053 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8051 10:02:25.821479 ==
8052 10:02:25.821812 DQS Delay:
8053 10:02:25.823901 DQS0 = 0, DQS1 = 0
8054 10:02:25.824311 DQM Delay:
8055 10:02:25.827816 DQM0 = 137, DQM1 = 128
8056 10:02:25.828204 DQ Delay:
8057 10:02:25.831211 DQ0 =135, DQ1 =139, DQ2 =135, DQ3 =135
8058 10:02:25.834400 DQ4 =139, DQ5 =127, DQ6 =143, DQ7 =143
8059 10:02:25.837285 DQ8 =119, DQ9 =119, DQ10 =127, DQ11 =119
8060 10:02:25.840953 DQ12 =135, DQ13 =135, DQ14 =135, DQ15 =135
8061 10:02:25.841384
8062 10:02:25.841737
8063 10:02:25.842060 ==
8064 10:02:25.843828 Dram Type= 6, Freq= 0, CH_0, rank 1
8065 10:02:25.850504 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8066 10:02:25.850905 ==
8067 10:02:25.851197
8068 10:02:25.851481
8069 10:02:25.851765 TX Vref Scan disable
8070 10:02:25.854649 == TX Byte 0 ==
8071 10:02:25.857302 Update DQ dly =993 (3 ,6, 33) DQ OEN =(3 ,3)
8072 10:02:25.863866 Update DQM dly =993 (3 ,6, 33) DQM OEN =(3 ,3)
8073 10:02:25.864300 == TX Byte 1 ==
8074 10:02:25.867459 Update DQ dly =983 (3 ,6, 23) DQ OEN =(3 ,3)
8075 10:02:25.874004 Update DQM dly =983 (3 ,6, 23) DQM OEN =(3 ,3)
8076 10:02:25.874435 ==
8077 10:02:25.877524 Dram Type= 6, Freq= 0, CH_0, rank 1
8078 10:02:25.880843 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8079 10:02:25.881372 ==
8080 10:02:25.894252
8081 10:02:25.897165 TX Vref early break, caculate TX vref
8082 10:02:25.901070 TX Vref=16, minBit 1, minWin=23, winSum=385
8083 10:02:25.903856 TX Vref=18, minBit 1, minWin=23, winSum=398
8084 10:02:25.907200 TX Vref=20, minBit 1, minWin=24, winSum=407
8085 10:02:25.910524 TX Vref=22, minBit 4, minWin=24, winSum=414
8086 10:02:25.913845 TX Vref=24, minBit 1, minWin=24, winSum=417
8087 10:02:25.920636 TX Vref=26, minBit 1, minWin=25, winSum=425
8088 10:02:25.923675 TX Vref=28, minBit 0, minWin=25, winSum=424
8089 10:02:25.927280 TX Vref=30, minBit 0, minWin=25, winSum=420
8090 10:02:25.930202 TX Vref=32, minBit 1, minWin=24, winSum=410
8091 10:02:25.933456 TX Vref=34, minBit 0, minWin=23, winSum=395
8092 10:02:25.940167 [TxChooseVref] Worse bit 1, Min win 25, Win sum 425, Final Vref 26
8093 10:02:25.940653
8094 10:02:25.943241 Final TX Range 0 Vref 26
8095 10:02:25.943834
8096 10:02:25.944254 ==
8097 10:02:25.946732 Dram Type= 6, Freq= 0, CH_0, rank 1
8098 10:02:25.950519 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8099 10:02:25.951138 ==
8100 10:02:25.951672
8101 10:02:25.952180
8102 10:02:25.953334 TX Vref Scan disable
8103 10:02:25.960006 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =285/100 ps
8104 10:02:25.960437 == TX Byte 0 ==
8105 10:02:25.963652 u2DelayCellOfst[0]=13 cells (4 PI)
8106 10:02:25.967054 u2DelayCellOfst[1]=17 cells (5 PI)
8107 10:02:25.969923 u2DelayCellOfst[2]=10 cells (3 PI)
8108 10:02:25.973534 u2DelayCellOfst[3]=10 cells (3 PI)
8109 10:02:25.976488 u2DelayCellOfst[4]=6 cells (2 PI)
8110 10:02:25.979962 u2DelayCellOfst[5]=0 cells (0 PI)
8111 10:02:25.983367 u2DelayCellOfst[6]=13 cells (4 PI)
8112 10:02:25.986684 u2DelayCellOfst[7]=13 cells (4 PI)
8113 10:02:25.990229 Update DQ dly =991 (3 ,6, 31) DQ OEN =(3 ,3)
8114 10:02:25.993557 Update DQM dly =993 (3 ,6, 33) DQM OEN =(3 ,3)
8115 10:02:25.996597 == TX Byte 1 ==
8116 10:02:25.997026 u2DelayCellOfst[8]=3 cells (1 PI)
8117 10:02:25.999723 u2DelayCellOfst[9]=0 cells (0 PI)
8118 10:02:26.003484 u2DelayCellOfst[10]=6 cells (2 PI)
8119 10:02:26.006591 u2DelayCellOfst[11]=3 cells (1 PI)
8120 10:02:26.009563 u2DelayCellOfst[12]=10 cells (3 PI)
8121 10:02:26.013301 u2DelayCellOfst[13]=10 cells (3 PI)
8122 10:02:26.016771 u2DelayCellOfst[14]=13 cells (4 PI)
8123 10:02:26.019475 u2DelayCellOfst[15]=10 cells (3 PI)
8124 10:02:26.023306 Update DQ dly =981 (3 ,6, 21) DQ OEN =(3 ,3)
8125 10:02:26.029898 Update DQM dly =983 (3 ,6, 23) DQM OEN =(3 ,3)
8126 10:02:26.030331 DramC Write-DBI on
8127 10:02:26.030694 ==
8128 10:02:26.032703 Dram Type= 6, Freq= 0, CH_0, rank 1
8129 10:02:26.036287 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8130 10:02:26.039855 ==
8131 10:02:26.040250
8132 10:02:26.040588
8133 10:02:26.040962 TX Vref Scan disable
8134 10:02:26.043725 == TX Byte 0 ==
8135 10:02:26.047239 Update DQM dly =737 (2 ,6, 33) DQM OEN =(3 ,3)
8136 10:02:26.050401 == TX Byte 1 ==
8137 10:02:26.053321 Update DQM dly =724 (2 ,6, 20) DQM OEN =(3 ,3)
8138 10:02:26.056463 DramC Write-DBI off
8139 10:02:26.056941
8140 10:02:26.057287 [DATLAT]
8141 10:02:26.057612 Freq=1600, CH0 RK1
8142 10:02:26.057926
8143 10:02:26.060194 DATLAT Default: 0xf
8144 10:02:26.060592 0, 0xFFFF, sum = 0
8145 10:02:26.063173 1, 0xFFFF, sum = 0
8146 10:02:26.063561 2, 0xFFFF, sum = 0
8147 10:02:26.066267 3, 0xFFFF, sum = 0
8148 10:02:26.069949 4, 0xFFFF, sum = 0
8149 10:02:26.070339 5, 0xFFFF, sum = 0
8150 10:02:26.072956 6, 0xFFFF, sum = 0
8151 10:02:26.073384 7, 0xFFFF, sum = 0
8152 10:02:26.076696 8, 0xFFFF, sum = 0
8153 10:02:26.077170 9, 0xFFFF, sum = 0
8154 10:02:26.079982 10, 0xFFFF, sum = 0
8155 10:02:26.080407 11, 0xFFFF, sum = 0
8156 10:02:26.083106 12, 0xFFFF, sum = 0
8157 10:02:26.083614 13, 0xFFFF, sum = 0
8158 10:02:26.086457 14, 0x0, sum = 1
8159 10:02:26.086883 15, 0x0, sum = 2
8160 10:02:26.089908 16, 0x0, sum = 3
8161 10:02:26.090335 17, 0x0, sum = 4
8162 10:02:26.093647 best_step = 15
8163 10:02:26.094137
8164 10:02:26.094472 ==
8165 10:02:26.096391 Dram Type= 6, Freq= 0, CH_0, rank 1
8166 10:02:26.099829 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8167 10:02:26.100257 ==
8168 10:02:26.100595 RX Vref Scan: 0
8169 10:02:26.103439
8170 10:02:26.103864 RX Vref 0 -> 0, step: 1
8171 10:02:26.104202
8172 10:02:26.106483 RX Delay 19 -> 252, step: 4
8173 10:02:26.110599 iDelay=191, Bit 0, Center 134 (83 ~ 186) 104
8174 10:02:26.116239 iDelay=191, Bit 1, Center 138 (91 ~ 186) 96
8175 10:02:26.119854 iDelay=191, Bit 2, Center 130 (79 ~ 182) 104
8176 10:02:26.123165 iDelay=191, Bit 3, Center 134 (83 ~ 186) 104
8177 10:02:26.126469 iDelay=191, Bit 4, Center 136 (87 ~ 186) 100
8178 10:02:26.129787 iDelay=191, Bit 5, Center 124 (71 ~ 178) 108
8179 10:02:26.136404 iDelay=191, Bit 6, Center 140 (91 ~ 190) 100
8180 10:02:26.139855 iDelay=191, Bit 7, Center 142 (95 ~ 190) 96
8181 10:02:26.143143 iDelay=191, Bit 8, Center 118 (67 ~ 170) 104
8182 10:02:26.146669 iDelay=191, Bit 9, Center 116 (63 ~ 170) 108
8183 10:02:26.149557 iDelay=191, Bit 10, Center 128 (75 ~ 182) 108
8184 10:02:26.156833 iDelay=191, Bit 11, Center 118 (67 ~ 170) 104
8185 10:02:26.159905 iDelay=191, Bit 12, Center 134 (83 ~ 186) 104
8186 10:02:26.162912 iDelay=191, Bit 13, Center 134 (83 ~ 186) 104
8187 10:02:26.166540 iDelay=191, Bit 14, Center 136 (83 ~ 190) 108
8188 10:02:26.169593 iDelay=191, Bit 15, Center 134 (83 ~ 186) 104
8189 10:02:26.170015 ==
8190 10:02:26.173063 Dram Type= 6, Freq= 0, CH_0, rank 1
8191 10:02:26.179517 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8192 10:02:26.179943 ==
8193 10:02:26.180275 DQS Delay:
8194 10:02:26.183003 DQS0 = 0, DQS1 = 0
8195 10:02:26.183428 DQM Delay:
8196 10:02:26.186632 DQM0 = 134, DQM1 = 127
8197 10:02:26.187051 DQ Delay:
8198 10:02:26.189547 DQ0 =134, DQ1 =138, DQ2 =130, DQ3 =134
8199 10:02:26.193081 DQ4 =136, DQ5 =124, DQ6 =140, DQ7 =142
8200 10:02:26.196021 DQ8 =118, DQ9 =116, DQ10 =128, DQ11 =118
8201 10:02:26.199693 DQ12 =134, DQ13 =134, DQ14 =136, DQ15 =134
8202 10:02:26.200111
8203 10:02:26.200442
8204 10:02:26.200749
8205 10:02:26.202955 [DramC_TX_OE_Calibration] TA2
8206 10:02:26.206444 Original DQ_B0 (3 6) =30, OEN = 27
8207 10:02:26.209455 Original DQ_B1 (3 6) =30, OEN = 27
8208 10:02:26.213157 24, 0x0, End_B0=24 End_B1=24
8209 10:02:26.216181 25, 0x0, End_B0=25 End_B1=25
8210 10:02:26.216609 26, 0x0, End_B0=26 End_B1=26
8211 10:02:26.219832 27, 0x0, End_B0=27 End_B1=27
8212 10:02:26.222752 28, 0x0, End_B0=28 End_B1=28
8213 10:02:26.226630 29, 0x0, End_B0=29 End_B1=29
8214 10:02:26.227059 30, 0x0, End_B0=30 End_B1=30
8215 10:02:26.229863 31, 0x4545, End_B0=30 End_B1=30
8216 10:02:26.232925 Byte0 end_step=30 best_step=27
8217 10:02:26.236352 Byte1 end_step=30 best_step=27
8218 10:02:26.239900 Byte0 TX OE(2T, 0.5T) = (3, 3)
8219 10:02:26.242693 Byte1 TX OE(2T, 0.5T) = (3, 3)
8220 10:02:26.243116
8221 10:02:26.243449
8222 10:02:26.249520 [DQSOSCAuto] RK1, (LSB)MR18= 0x1e07, (MSB)MR19= 0x303, tDQSOscB0 = 406 ps tDQSOscB1 = 394 ps
8223 10:02:26.253208 CH0 RK1: MR19=303, MR18=1E07
8224 10:02:26.259929 CH0_RK1: MR19=0x303, MR18=0x1E07, DQSOSC=394, MR23=63, INC=23, DEC=15
8225 10:02:26.263518 [RxdqsGatingPostProcess] freq 1600
8226 10:02:26.266314 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
8227 10:02:26.270092 best DQS0 dly(2T, 0.5T) = (1, 1)
8228 10:02:26.273279 best DQS1 dly(2T, 0.5T) = (1, 1)
8229 10:02:26.276422 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
8230 10:02:26.279385 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
8231 10:02:26.283548 best DQS0 dly(2T, 0.5T) = (1, 1)
8232 10:02:26.286128 best DQS1 dly(2T, 0.5T) = (1, 1)
8233 10:02:26.289714 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
8234 10:02:26.292799 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
8235 10:02:26.296415 Pre-setting of DQS Precalculation
8236 10:02:26.299561 [DualRankRxdatlatCal] RK0: 15, RK1: 15, Final_Datlat 15
8237 10:02:26.300069 ==
8238 10:02:26.302614 Dram Type= 6, Freq= 0, CH_1, rank 0
8239 10:02:26.305964 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8240 10:02:26.309313 ==
8241 10:02:26.312438 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
8242 10:02:26.316121 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=1
8243 10:02:26.322697 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=1
8244 10:02:26.328766 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
8245 10:02:26.336220 [CA 0] Center 41 (12~71) winsize 60
8246 10:02:26.339658 [CA 1] Center 41 (12~71) winsize 60
8247 10:02:26.342542 [CA 2] Center 38 (9~68) winsize 60
8248 10:02:26.345799 [CA 3] Center 37 (8~66) winsize 59
8249 10:02:26.349157 [CA 4] Center 37 (8~67) winsize 60
8250 10:02:26.352489 [CA 5] Center 37 (8~66) winsize 59
8251 10:02:26.352586
8252 10:02:26.355842 [CmdBusTrainingLP45] Vref(ca) range 0: 32
8253 10:02:26.355939
8254 10:02:26.359208 [CATrainingPosCal] consider 1 rank data
8255 10:02:26.362475 u2DelayCellTimex100 = 285/100 ps
8256 10:02:26.369150 CA0 delay=41 (12~71),Diff = 4 PI (13 cell)
8257 10:02:26.372518 CA1 delay=41 (12~71),Diff = 4 PI (13 cell)
8258 10:02:26.375559 CA2 delay=38 (9~68),Diff = 1 PI (3 cell)
8259 10:02:26.379047 CA3 delay=37 (8~66),Diff = 0 PI (0 cell)
8260 10:02:26.382027 CA4 delay=37 (8~67),Diff = 0 PI (0 cell)
8261 10:02:26.385758 CA5 delay=37 (8~66),Diff = 0 PI (0 cell)
8262 10:02:26.385848
8263 10:02:26.388731 CA PerBit enable=1, Macro0, CA PI delay=37
8264 10:02:26.388866
8265 10:02:26.392461 [CBTSetCACLKResult] CA Dly = 37
8266 10:02:26.395563 CS Dly: 11 (0~42)
8267 10:02:26.399065 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=0
8268 10:02:26.401855 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=0
8269 10:02:26.401962 ==
8270 10:02:26.405514 Dram Type= 6, Freq= 0, CH_1, rank 1
8271 10:02:26.408598 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8272 10:02:26.411796 ==
8273 10:02:26.415209 pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0
8274 10:02:26.418468 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=1
8275 10:02:26.425141 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=1
8276 10:02:26.431767 u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32
8277 10:02:26.438878 [CA 0] Center 42 (12~72) winsize 61
8278 10:02:26.442246 [CA 1] Center 42 (12~72) winsize 61
8279 10:02:26.445589 [CA 2] Center 38 (9~68) winsize 60
8280 10:02:26.448943 [CA 3] Center 38 (8~68) winsize 61
8281 10:02:26.452571 [CA 4] Center 38 (8~68) winsize 61
8282 10:02:26.455967 [CA 5] Center 37 (7~67) winsize 61
8283 10:02:26.456064
8284 10:02:26.459473 [CmdBusTrainingLP45] Vref(ca) range 0: 32
8285 10:02:26.459580
8286 10:02:26.462865 [CATrainingPosCal] consider 2 rank data
8287 10:02:26.465983 u2DelayCellTimex100 = 285/100 ps
8288 10:02:26.469253 CA0 delay=41 (12~71),Diff = 4 PI (13 cell)
8289 10:02:26.475906 CA1 delay=41 (12~71),Diff = 4 PI (13 cell)
8290 10:02:26.479343 CA2 delay=38 (9~68),Diff = 1 PI (3 cell)
8291 10:02:26.482390 CA3 delay=37 (8~66),Diff = 0 PI (0 cell)
8292 10:02:26.485599 CA4 delay=37 (8~67),Diff = 0 PI (0 cell)
8293 10:02:26.489118 CA5 delay=37 (8~66),Diff = 0 PI (0 cell)
8294 10:02:26.489217
8295 10:02:26.492411 CA PerBit enable=1, Macro0, CA PI delay=37
8296 10:02:26.492509
8297 10:02:26.496070 [CBTSetCACLKResult] CA Dly = 37
8298 10:02:26.499133 CS Dly: 12 (0~45)
8299 10:02:26.502368 [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=0
8300 10:02:26.506028 [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=0
8301 10:02:26.506096
8302 10:02:26.509257 ----->DramcWriteLeveling(PI) begin...
8303 10:02:26.509327 ==
8304 10:02:26.512393 Dram Type= 6, Freq= 0, CH_1, rank 0
8305 10:02:26.515430 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8306 10:02:26.519149 ==
8307 10:02:26.519245 Write leveling (Byte 0): 26 => 26
8308 10:02:26.522096 Write leveling (Byte 1): 27 => 27
8309 10:02:26.525800 DramcWriteLeveling(PI) end<-----
8310 10:02:26.525895
8311 10:02:26.525980 ==
8312 10:02:26.529079 Dram Type= 6, Freq= 0, CH_1, rank 0
8313 10:02:26.535716 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8314 10:02:26.535815 ==
8315 10:02:26.535903 [Gating] SW mode calibration
8316 10:02:26.545568 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
8317 10:02:26.548729 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
8318 10:02:26.555777 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8319 10:02:26.558877 1 4 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8320 10:02:26.561936 1 4 8 | B1->B0 | 2323 2727 | 0 1 | (0 0) (0 0)
8321 10:02:26.565297 1 4 12 | B1->B0 | 3232 3434 | 1 1 | (0 0) (1 1)
8322 10:02:26.572046 1 4 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8323 10:02:26.575176 1 4 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8324 10:02:26.579149 1 4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8325 10:02:26.585279 1 4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8326 10:02:26.588845 1 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8327 10:02:26.592388 1 5 4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8328 10:02:26.598468 1 5 8 | B1->B0 | 3434 3030 | 1 0 | (1 1) (0 1)
8329 10:02:26.602207 1 5 12 | B1->B0 | 2626 2323 | 0 0 | (1 0) (0 0)
8330 10:02:26.605275 1 5 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8331 10:02:26.611866 1 5 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8332 10:02:26.614937 1 5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8333 10:02:26.618580 1 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8334 10:02:26.625400 1 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8335 10:02:26.628524 1 6 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8336 10:02:26.631657 1 6 8 | B1->B0 | 2828 4444 | 0 0 | (0 0) (0 0)
8337 10:02:26.638284 1 6 12 | B1->B0 | 4444 4646 | 0 0 | (0 0) (0 0)
8338 10:02:26.641952 1 6 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8339 10:02:26.645277 1 6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8340 10:02:26.651533 1 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8341 10:02:26.655028 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8342 10:02:26.658556 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8343 10:02:26.665109 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8344 10:02:26.668207 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)
8345 10:02:26.672073 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)
8346 10:02:26.678374 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)
8347 10:02:26.682224 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8348 10:02:26.685000 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8349 10:02:26.688523 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8350 10:02:26.695257 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8351 10:02:26.698815 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8352 10:02:26.702105 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8353 10:02:26.708534 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8354 10:02:26.711950 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8355 10:02:26.714907 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8356 10:02:26.721672 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8357 10:02:26.725235 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8358 10:02:26.728269 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8359 10:02:26.735272 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8360 10:02:26.738281 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
8361 10:02:26.741852 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)
8362 10:02:26.748184 1 9 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8363 10:02:26.748292 Total UI for P1: 0, mck2ui 16
8364 10:02:26.755201 best dqsien dly found for B0: ( 1, 9, 10)
8365 10:02:26.755299 Total UI for P1: 0, mck2ui 16
8366 10:02:26.762182 best dqsien dly found for B1: ( 1, 9, 10)
8367 10:02:26.764925 best DQS0 dly(MCK, UI, PI) = (1, 9, 10)
8368 10:02:26.768072 best DQS1 dly(MCK, UI, PI) = (1, 9, 10)
8369 10:02:26.768139
8370 10:02:26.771806 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 10)
8371 10:02:26.774889 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 10)
8372 10:02:26.778458 [Gating] SW calibration Done
8373 10:02:26.778552 ==
8374 10:02:26.781999 Dram Type= 6, Freq= 0, CH_1, rank 0
8375 10:02:26.785100 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8376 10:02:26.785169 ==
8377 10:02:26.788071 RX Vref Scan: 0
8378 10:02:26.788165
8379 10:02:26.788252 RX Vref 0 -> 0, step: 1
8380 10:02:26.788336
8381 10:02:26.791431 RX Delay 0 -> 252, step: 8
8382 10:02:26.795083 iDelay=200, Bit 0, Center 143 (96 ~ 191) 96
8383 10:02:26.801730 iDelay=200, Bit 1, Center 131 (80 ~ 183) 104
8384 10:02:26.804551 iDelay=200, Bit 2, Center 123 (72 ~ 175) 104
8385 10:02:26.807861 iDelay=200, Bit 3, Center 135 (80 ~ 191) 112
8386 10:02:26.811465 iDelay=200, Bit 4, Center 131 (80 ~ 183) 104
8387 10:02:26.815125 iDelay=200, Bit 5, Center 147 (96 ~ 199) 104
8388 10:02:26.821690 iDelay=200, Bit 6, Center 147 (96 ~ 199) 104
8389 10:02:26.824841 iDelay=200, Bit 7, Center 135 (80 ~ 191) 112
8390 10:02:26.827864 iDelay=200, Bit 8, Center 119 (72 ~ 167) 96
8391 10:02:26.831123 iDelay=200, Bit 9, Center 123 (72 ~ 175) 104
8392 10:02:26.834797 iDelay=200, Bit 10, Center 131 (80 ~ 183) 104
8393 10:02:26.838082 iDelay=200, Bit 11, Center 127 (80 ~ 175) 96
8394 10:02:26.844474 iDelay=200, Bit 12, Center 139 (88 ~ 191) 104
8395 10:02:26.847992 iDelay=200, Bit 13, Center 139 (88 ~ 191) 104
8396 10:02:26.851467 iDelay=200, Bit 14, Center 139 (88 ~ 191) 104
8397 10:02:26.854942 iDelay=200, Bit 15, Center 139 (88 ~ 191) 104
8398 10:02:26.855036 ==
8399 10:02:26.858379 Dram Type= 6, Freq= 0, CH_1, rank 0
8400 10:02:26.864609 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8401 10:02:26.864708 ==
8402 10:02:26.864837 DQS Delay:
8403 10:02:26.867982 DQS0 = 0, DQS1 = 0
8404 10:02:26.868051 DQM Delay:
8405 10:02:26.871141 DQM0 = 136, DQM1 = 132
8406 10:02:26.871234 DQ Delay:
8407 10:02:26.874464 DQ0 =143, DQ1 =131, DQ2 =123, DQ3 =135
8408 10:02:26.877837 DQ4 =131, DQ5 =147, DQ6 =147, DQ7 =135
8409 10:02:26.881061 DQ8 =119, DQ9 =123, DQ10 =131, DQ11 =127
8410 10:02:26.884556 DQ12 =139, DQ13 =139, DQ14 =139, DQ15 =139
8411 10:02:26.884641
8412 10:02:26.884743
8413 10:02:26.884871 ==
8414 10:02:26.887613 Dram Type= 6, Freq= 0, CH_1, rank 0
8415 10:02:26.894256 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8416 10:02:26.894341 ==
8417 10:02:26.894428
8418 10:02:26.894509
8419 10:02:26.894588 TX Vref Scan disable
8420 10:02:26.897556 == TX Byte 0 ==
8421 10:02:26.901620 Update DQ dly =982 (3 ,6, 22) DQ OEN =(3 ,3)
8422 10:02:26.907328 Update DQM dly =982 (3 ,6, 22) DQM OEN =(3 ,3)
8423 10:02:26.907415 == TX Byte 1 ==
8424 10:02:26.910966 Update DQ dly =982 (3 ,6, 22) DQ OEN =(3 ,3)
8425 10:02:26.917959 Update DQM dly =982 (3 ,6, 22) DQM OEN =(3 ,3)
8426 10:02:26.918046 ==
8427 10:02:26.921399 Dram Type= 6, Freq= 0, CH_1, rank 0
8428 10:02:26.923997 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8429 10:02:26.924083 ==
8430 10:02:26.936201
8431 10:02:26.939726 TX Vref early break, caculate TX vref
8432 10:02:26.943088 TX Vref=16, minBit 1, minWin=23, winSum=380
8433 10:02:26.946542 TX Vref=18, minBit 0, minWin=23, winSum=384
8434 10:02:26.949605 TX Vref=20, minBit 0, minWin=24, winSum=398
8435 10:02:26.953025 TX Vref=22, minBit 0, minWin=24, winSum=406
8436 10:02:26.956501 TX Vref=24, minBit 0, minWin=25, winSum=418
8437 10:02:26.963064 TX Vref=26, minBit 0, minWin=25, winSum=424
8438 10:02:26.966698 TX Vref=28, minBit 0, minWin=25, winSum=427
8439 10:02:26.969581 TX Vref=30, minBit 0, minWin=25, winSum=422
8440 10:02:26.973379 TX Vref=32, minBit 0, minWin=23, winSum=416
8441 10:02:26.976327 TX Vref=34, minBit 0, minWin=24, winSum=404
8442 10:02:26.982786 [TxChooseVref] Worse bit 0, Min win 25, Win sum 427, Final Vref 28
8443 10:02:26.982872
8444 10:02:26.986607 Final TX Range 0 Vref 28
8445 10:02:26.986693
8446 10:02:26.986776 ==
8447 10:02:26.989590 Dram Type= 6, Freq= 0, CH_1, rank 0
8448 10:02:26.992693 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8449 10:02:26.992826 ==
8450 10:02:26.992925
8451 10:02:26.993005
8452 10:02:26.996329 TX Vref Scan disable
8453 10:02:27.002923 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =285/100 ps
8454 10:02:27.003008 == TX Byte 0 ==
8455 10:02:27.006295 u2DelayCellOfst[0]=20 cells (6 PI)
8456 10:02:27.009246 u2DelayCellOfst[1]=13 cells (4 PI)
8457 10:02:27.012485 u2DelayCellOfst[2]=0 cells (0 PI)
8458 10:02:27.016301 u2DelayCellOfst[3]=10 cells (3 PI)
8459 10:02:27.019564 u2DelayCellOfst[4]=10 cells (3 PI)
8460 10:02:27.023013 u2DelayCellOfst[5]=20 cells (6 PI)
8461 10:02:27.025825 u2DelayCellOfst[6]=23 cells (7 PI)
8462 10:02:27.029718 u2DelayCellOfst[7]=10 cells (3 PI)
8463 10:02:27.032319 Update DQ dly =978 (3 ,6, 18) DQ OEN =(3 ,3)
8464 10:02:27.035819 Update DQM dly =981 (3 ,6, 21) DQM OEN =(3 ,3)
8465 10:02:27.039364 == TX Byte 1 ==
8466 10:02:27.039449 u2DelayCellOfst[8]=0 cells (0 PI)
8467 10:02:27.042777 u2DelayCellOfst[9]=3 cells (1 PI)
8468 10:02:27.046017 u2DelayCellOfst[10]=13 cells (4 PI)
8469 10:02:27.049317 u2DelayCellOfst[11]=6 cells (2 PI)
8470 10:02:27.052728 u2DelayCellOfst[12]=13 cells (4 PI)
8471 10:02:27.056092 u2DelayCellOfst[13]=17 cells (5 PI)
8472 10:02:27.059015 u2DelayCellOfst[14]=17 cells (5 PI)
8473 10:02:27.062731 u2DelayCellOfst[15]=17 cells (5 PI)
8474 10:02:27.066231 Update DQ dly =979 (3 ,6, 19) DQ OEN =(3 ,3)
8475 10:02:27.072280 Update DQM dly =981 (3 ,6, 21) DQM OEN =(3 ,3)
8476 10:02:27.072366 DramC Write-DBI on
8477 10:02:27.072451 ==
8478 10:02:27.075733 Dram Type= 6, Freq= 0, CH_1, rank 0
8479 10:02:27.079031 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8480 10:02:27.082455 ==
8481 10:02:27.082566
8482 10:02:27.082662
8483 10:02:27.082752 TX Vref Scan disable
8484 10:02:27.086024 == TX Byte 0 ==
8485 10:02:27.089112 Update DQM dly =723 (2 ,6, 19) DQM OEN =(3 ,3)
8486 10:02:27.092284 == TX Byte 1 ==
8487 10:02:27.095958 Update DQM dly =722 (2 ,6, 18) DQM OEN =(3 ,3)
8488 10:02:27.096112 DramC Write-DBI off
8489 10:02:27.098855
8490 10:02:27.098958 [DATLAT]
8491 10:02:27.099029 Freq=1600, CH1 RK0
8492 10:02:27.099089
8493 10:02:27.102729 DATLAT Default: 0xf
8494 10:02:27.102802 0, 0xFFFF, sum = 0
8495 10:02:27.106094 1, 0xFFFF, sum = 0
8496 10:02:27.106177 2, 0xFFFF, sum = 0
8497 10:02:27.109444 3, 0xFFFF, sum = 0
8498 10:02:27.109527 4, 0xFFFF, sum = 0
8499 10:02:27.112932 5, 0xFFFF, sum = 0
8500 10:02:27.115694 6, 0xFFFF, sum = 0
8501 10:02:27.115777 7, 0xFFFF, sum = 0
8502 10:02:27.119742 8, 0xFFFF, sum = 0
8503 10:02:27.119856 9, 0xFFFF, sum = 0
8504 10:02:27.122668 10, 0xFFFF, sum = 0
8505 10:02:27.122751 11, 0xFFFF, sum = 0
8506 10:02:27.125519 12, 0xFFFF, sum = 0
8507 10:02:27.125601 13, 0xFFFF, sum = 0
8508 10:02:27.129256 14, 0x0, sum = 1
8509 10:02:27.129355 15, 0x0, sum = 2
8510 10:02:27.132224 16, 0x0, sum = 3
8511 10:02:27.132300 17, 0x0, sum = 4
8512 10:02:27.135701 best_step = 15
8513 10:02:27.135771
8514 10:02:27.135831 ==
8515 10:02:27.139046 Dram Type= 6, Freq= 0, CH_1, rank 0
8516 10:02:27.142393 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8517 10:02:27.142462 ==
8518 10:02:27.142522 RX Vref Scan: 1
8519 10:02:27.142582
8520 10:02:27.145444 Set Vref Range= 24 -> 127
8521 10:02:27.145511
8522 10:02:27.149075 RX Vref 24 -> 127, step: 1
8523 10:02:27.149146
8524 10:02:27.152470 RX Delay 27 -> 252, step: 4
8525 10:02:27.152570
8526 10:02:27.155359 Set Vref, RX VrefLevel [Byte0]: 24
8527 10:02:27.158953 [Byte1]: 24
8528 10:02:27.159063
8529 10:02:27.162532 Set Vref, RX VrefLevel [Byte0]: 25
8530 10:02:27.165680 [Byte1]: 25
8531 10:02:27.165750
8532 10:02:27.168959 Set Vref, RX VrefLevel [Byte0]: 26
8533 10:02:27.172679 [Byte1]: 26
8534 10:02:27.176078
8535 10:02:27.176150 Set Vref, RX VrefLevel [Byte0]: 27
8536 10:02:27.179890 [Byte1]: 27
8537 10:02:27.183215
8538 10:02:27.183310 Set Vref, RX VrefLevel [Byte0]: 28
8539 10:02:27.186755 [Byte1]: 28
8540 10:02:27.191003
8541 10:02:27.191099 Set Vref, RX VrefLevel [Byte0]: 29
8542 10:02:27.194190 [Byte1]: 29
8543 10:02:27.198356
8544 10:02:27.198426 Set Vref, RX VrefLevel [Byte0]: 30
8545 10:02:27.202107 [Byte1]: 30
8546 10:02:27.205744
8547 10:02:27.205812 Set Vref, RX VrefLevel [Byte0]: 31
8548 10:02:27.209554 [Byte1]: 31
8549 10:02:27.213694
8550 10:02:27.213790 Set Vref, RX VrefLevel [Byte0]: 32
8551 10:02:27.216806 [Byte1]: 32
8552 10:02:27.221426
8553 10:02:27.221496 Set Vref, RX VrefLevel [Byte0]: 33
8554 10:02:27.224309 [Byte1]: 33
8555 10:02:27.228878
8556 10:02:27.228979 Set Vref, RX VrefLevel [Byte0]: 34
8557 10:02:27.231761 [Byte1]: 34
8558 10:02:27.236046
8559 10:02:27.236146 Set Vref, RX VrefLevel [Byte0]: 35
8560 10:02:27.239442 [Byte1]: 35
8561 10:02:27.244077
8562 10:02:27.244176 Set Vref, RX VrefLevel [Byte0]: 36
8563 10:02:27.246771 [Byte1]: 36
8564 10:02:27.251308
8565 10:02:27.251406 Set Vref, RX VrefLevel [Byte0]: 37
8566 10:02:27.257549 [Byte1]: 37
8567 10:02:27.257652
8568 10:02:27.260998 Set Vref, RX VrefLevel [Byte0]: 38
8569 10:02:27.264083 [Byte1]: 38
8570 10:02:27.264157
8571 10:02:27.267693 Set Vref, RX VrefLevel [Byte0]: 39
8572 10:02:27.270805 [Byte1]: 39
8573 10:02:27.270904
8574 10:02:27.274448 Set Vref, RX VrefLevel [Byte0]: 40
8575 10:02:27.277572 [Byte1]: 40
8576 10:02:27.281046
8577 10:02:27.281116 Set Vref, RX VrefLevel [Byte0]: 41
8578 10:02:27.284791 [Byte1]: 41
8579 10:02:27.289217
8580 10:02:27.289316 Set Vref, RX VrefLevel [Byte0]: 42
8581 10:02:27.291897 [Byte1]: 42
8582 10:02:27.296381
8583 10:02:27.296454 Set Vref, RX VrefLevel [Byte0]: 43
8584 10:02:27.299474 [Byte1]: 43
8585 10:02:27.303857
8586 10:02:27.303927 Set Vref, RX VrefLevel [Byte0]: 44
8587 10:02:27.307454 [Byte1]: 44
8588 10:02:27.311703
8589 10:02:27.311798 Set Vref, RX VrefLevel [Byte0]: 45
8590 10:02:27.314527 [Byte1]: 45
8591 10:02:27.319122
8592 10:02:27.319220 Set Vref, RX VrefLevel [Byte0]: 46
8593 10:02:27.322008 [Byte1]: 46
8594 10:02:27.326550
8595 10:02:27.326645 Set Vref, RX VrefLevel [Byte0]: 47
8596 10:02:27.330009 [Byte1]: 47
8597 10:02:27.334323
8598 10:02:27.334396 Set Vref, RX VrefLevel [Byte0]: 48
8599 10:02:27.337352 [Byte1]: 48
8600 10:02:27.341996
8601 10:02:27.342068 Set Vref, RX VrefLevel [Byte0]: 49
8602 10:02:27.344919 [Byte1]: 49
8603 10:02:27.349392
8604 10:02:27.349466 Set Vref, RX VrefLevel [Byte0]: 50
8605 10:02:27.352466 [Byte1]: 50
8606 10:02:27.356894
8607 10:02:27.356991 Set Vref, RX VrefLevel [Byte0]: 51
8608 10:02:27.359667 [Byte1]: 51
8609 10:02:27.364384
8610 10:02:27.364482 Set Vref, RX VrefLevel [Byte0]: 52
8611 10:02:27.367324 [Byte1]: 52
8612 10:02:27.372059
8613 10:02:27.372133 Set Vref, RX VrefLevel [Byte0]: 53
8614 10:02:27.375308 [Byte1]: 53
8615 10:02:27.379541
8616 10:02:27.379637 Set Vref, RX VrefLevel [Byte0]: 54
8617 10:02:27.382869 [Byte1]: 54
8618 10:02:27.386554
8619 10:02:27.386622 Set Vref, RX VrefLevel [Byte0]: 55
8620 10:02:27.390320 [Byte1]: 55
8621 10:02:27.394105
8622 10:02:27.394200 Set Vref, RX VrefLevel [Byte0]: 56
8623 10:02:27.397946 [Byte1]: 56
8624 10:02:27.402098
8625 10:02:27.402168 Set Vref, RX VrefLevel [Byte0]: 57
8626 10:02:27.405270 [Byte1]: 57
8627 10:02:27.409245
8628 10:02:27.409315 Set Vref, RX VrefLevel [Byte0]: 58
8629 10:02:27.412730 [Byte1]: 58
8630 10:02:27.417158
8631 10:02:27.417233 Set Vref, RX VrefLevel [Byte0]: 59
8632 10:02:27.420297 [Byte1]: 59
8633 10:02:27.424241
8634 10:02:27.424338 Set Vref, RX VrefLevel [Byte0]: 60
8635 10:02:27.427900 [Byte1]: 60
8636 10:02:27.431758
8637 10:02:27.431831 Set Vref, RX VrefLevel [Byte0]: 61
8638 10:02:27.435659 [Byte1]: 61
8639 10:02:27.439852
8640 10:02:27.439921 Set Vref, RX VrefLevel [Byte0]: 62
8641 10:02:27.442762 [Byte1]: 62
8642 10:02:27.446799
8643 10:02:27.446875 Set Vref, RX VrefLevel [Byte0]: 63
8644 10:02:27.450236 [Byte1]: 63
8645 10:02:27.454468
8646 10:02:27.454558 Set Vref, RX VrefLevel [Byte0]: 64
8647 10:02:27.458057 [Byte1]: 64
8648 10:02:27.462384
8649 10:02:27.462486 Set Vref, RX VrefLevel [Byte0]: 65
8650 10:02:27.465479 [Byte1]: 65
8651 10:02:27.469968
8652 10:02:27.470078 Set Vref, RX VrefLevel [Byte0]: 66
8653 10:02:27.472948 [Byte1]: 66
8654 10:02:27.477301
8655 10:02:27.477417 Set Vref, RX VrefLevel [Byte0]: 67
8656 10:02:27.480275 [Byte1]: 67
8657 10:02:27.484969
8658 10:02:27.485043 Set Vref, RX VrefLevel [Byte0]: 68
8659 10:02:27.487975 [Byte1]: 68
8660 10:02:27.492427
8661 10:02:27.492527 Set Vref, RX VrefLevel [Byte0]: 69
8662 10:02:27.495780 [Byte1]: 69
8663 10:02:27.499942
8664 10:02:27.500038 Set Vref, RX VrefLevel [Byte0]: 70
8665 10:02:27.503176 [Byte1]: 70
8666 10:02:27.507751
8667 10:02:27.507845 Set Vref, RX VrefLevel [Byte0]: 71
8668 10:02:27.510433 [Byte1]: 71
8669 10:02:27.514715
8670 10:02:27.514781 Set Vref, RX VrefLevel [Byte0]: 72
8671 10:02:27.518435 [Byte1]: 72
8672 10:02:27.522071
8673 10:02:27.522141 Set Vref, RX VrefLevel [Byte0]: 73
8674 10:02:27.525689 [Byte1]: 73
8675 10:02:27.529839
8676 10:02:27.529940 Set Vref, RX VrefLevel [Byte0]: 74
8677 10:02:27.532991 [Byte1]: 74
8678 10:02:27.537147
8679 10:02:27.537242 Set Vref, RX VrefLevel [Byte0]: 75
8680 10:02:27.540909 [Byte1]: 75
8681 10:02:27.544924
8682 10:02:27.545020 Set Vref, RX VrefLevel [Byte0]: 76
8683 10:02:27.547955 [Byte1]: 76
8684 10:02:27.552165
8685 10:02:27.552241 Set Vref, RX VrefLevel [Byte0]: 77
8686 10:02:27.555522 [Byte1]: 77
8687 10:02:27.559968
8688 10:02:27.560048 Final RX Vref Byte 0 = 60 to rank0
8689 10:02:27.563584 Final RX Vref Byte 1 = 56 to rank0
8690 10:02:27.566857 Final RX Vref Byte 0 = 60 to rank1
8691 10:02:27.570022 Final RX Vref Byte 1 = 56 to rank1==
8692 10:02:27.573595 Dram Type= 6, Freq= 0, CH_1, rank 0
8693 10:02:27.579977 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8694 10:02:27.580083 ==
8695 10:02:27.580175 DQS Delay:
8696 10:02:27.580265 DQS0 = 0, DQS1 = 0
8697 10:02:27.583571 DQM Delay:
8698 10:02:27.583641 DQM0 = 134, DQM1 = 131
8699 10:02:27.586857 DQ Delay:
8700 10:02:27.590749 DQ0 =140, DQ1 =130, DQ2 =122, DQ3 =130
8701 10:02:27.593766 DQ4 =134, DQ5 =144, DQ6 =144, DQ7 =134
8702 10:02:27.596676 DQ8 =116, DQ9 =122, DQ10 =132, DQ11 =124
8703 10:02:27.599749 DQ12 =138, DQ13 =140, DQ14 =140, DQ15 =140
8704 10:02:27.599849
8705 10:02:27.599938
8706 10:02:27.600023
8707 10:02:27.603406 [DramC_TX_OE_Calibration] TA2
8708 10:02:27.607105 Original DQ_B0 (3 6) =30, OEN = 27
8709 10:02:27.609850 Original DQ_B1 (3 6) =30, OEN = 27
8710 10:02:27.613711 24, 0x0, End_B0=24 End_B1=24
8711 10:02:27.613832 25, 0x0, End_B0=25 End_B1=25
8712 10:02:27.616628 26, 0x0, End_B0=26 End_B1=26
8713 10:02:27.620475 27, 0x0, End_B0=27 End_B1=27
8714 10:02:27.623287 28, 0x0, End_B0=28 End_B1=28
8715 10:02:27.623404 29, 0x0, End_B0=29 End_B1=29
8716 10:02:27.626820 30, 0x0, End_B0=30 End_B1=30
8717 10:02:27.629925 31, 0x4545, End_B0=30 End_B1=30
8718 10:02:27.633138 Byte0 end_step=30 best_step=27
8719 10:02:27.636850 Byte1 end_step=30 best_step=27
8720 10:02:27.639903 Byte0 TX OE(2T, 0.5T) = (3, 3)
8721 10:02:27.640005 Byte1 TX OE(2T, 0.5T) = (3, 3)
8722 10:02:27.640096
8723 10:02:27.640187
8724 10:02:27.650470 [DQSOSCAuto] RK0, (LSB)MR18= 0x1522, (MSB)MR19= 0x303, tDQSOscB0 = 392 ps tDQSOscB1 = 399 ps
8725 10:02:27.653402 CH1 RK0: MR19=303, MR18=1522
8726 10:02:27.659930 CH1_RK0: MR19=0x303, MR18=0x1522, DQSOSC=392, MR23=63, INC=24, DEC=16
8727 10:02:27.660032
8728 10:02:27.663553 ----->DramcWriteLeveling(PI) begin...
8729 10:02:27.663635 ==
8730 10:02:27.666404 Dram Type= 6, Freq= 0, CH_1, rank 1
8731 10:02:27.669705 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8732 10:02:27.669785 ==
8733 10:02:27.673638 Write leveling (Byte 0): 25 => 25
8734 10:02:27.676742 Write leveling (Byte 1): 28 => 28
8735 10:02:27.679674 DramcWriteLeveling(PI) end<-----
8736 10:02:27.679751
8737 10:02:27.679814 ==
8738 10:02:27.683338 Dram Type= 6, Freq= 0, CH_1, rank 1
8739 10:02:27.686485 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8740 10:02:27.686559 ==
8741 10:02:27.689799 [Gating] SW mode calibration
8742 10:02:27.696495 [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0
8743 10:02:27.703367 RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)
8744 10:02:27.706755 1 4 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8745 10:02:27.709877 1 4 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8746 10:02:27.716439 1 4 8 | B1->B0 | 2c2c 2323 | 1 0 | (0 0) (0 0)
8747 10:02:27.720123 1 4 12 | B1->B0 | 3434 2c2c | 0 0 | (0 0) (0 0)
8748 10:02:27.723053 1 4 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8749 10:02:27.729875 1 4 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8750 10:02:27.732988 1 4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8751 10:02:27.736504 1 4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8752 10:02:27.743144 1 5 0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)
8753 10:02:27.746094 1 5 4 | B1->B0 | 3434 3434 | 1 1 | (1 0) (1 1)
8754 10:02:27.749851 1 5 8 | B1->B0 | 3333 3434 | 1 1 | (1 0) (1 1)
8755 10:02:27.756093 1 5 12 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)
8756 10:02:27.759418 1 5 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (1 0)
8757 10:02:27.763099 1 5 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8758 10:02:27.769397 1 5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8759 10:02:27.772662 1 5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8760 10:02:27.776368 1 6 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8761 10:02:27.783046 1 6 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)
8762 10:02:27.786163 1 6 8 | B1->B0 | 4242 2828 | 0 1 | (0 0) (0 0)
8763 10:02:27.789651 1 6 12 | B1->B0 | 4646 4141 | 0 0 | (0 0) (0 0)
8764 10:02:27.793085 1 6 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8765 10:02:27.799365 1 6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8766 10:02:27.802669 1 6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8767 10:02:27.805937 1 6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8768 10:02:27.812716 1 7 0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8769 10:02:27.816206 1 7 4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8770 10:02:27.819901 1 7 8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 0)
8771 10:02:27.826121 1 7 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 1)
8772 10:02:27.829220 1 7 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8773 10:02:27.832799 1 7 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8774 10:02:27.839390 1 7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8775 10:02:27.842946 1 7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8776 10:02:27.846063 1 8 0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8777 10:02:27.852616 1 8 4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8778 10:02:27.856234 1 8 8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8779 10:02:27.859239 1 8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8780 10:02:27.866439 1 8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8781 10:02:27.869393 1 8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8782 10:02:27.872551 1 8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8783 10:02:27.879171 1 8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)
8784 10:02:27.883032 1 9 0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 1)
8785 10:02:27.886008 1 9 4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 1)
8786 10:02:27.892505 1 9 8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 1)
8787 10:02:27.896259 1 9 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)
8788 10:02:27.899300 Total UI for P1: 0, mck2ui 16
8789 10:02:27.902692 best dqsien dly found for B1: ( 1, 9, 4)
8790 10:02:27.905994 1 9 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)
8791 10:02:27.909408 1 9 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)
8792 10:02:27.912953 Total UI for P1: 0, mck2ui 16
8793 10:02:27.915953 best dqsien dly found for B0: ( 1, 9, 14)
8794 10:02:27.919334 best DQS0 dly(MCK, UI, PI) = (1, 9, 14)
8795 10:02:27.922394 best DQS1 dly(MCK, UI, PI) = (1, 9, 4)
8796 10:02:27.925984
8797 10:02:27.928971 best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 14)
8798 10:02:27.932682 best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 4)
8799 10:02:27.935930 [Gating] SW calibration Done
8800 10:02:27.936014 ==
8801 10:02:27.939024 Dram Type= 6, Freq= 0, CH_1, rank 1
8802 10:02:27.942557 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8803 10:02:27.942633 ==
8804 10:02:27.942696 RX Vref Scan: 0
8805 10:02:27.945595
8806 10:02:27.945673 RX Vref 0 -> 0, step: 1
8807 10:02:27.945734
8808 10:02:27.949296 RX Delay 0 -> 252, step: 8
8809 10:02:27.952509 iDelay=208, Bit 0, Center 139 (88 ~ 191) 104
8810 10:02:27.955571 iDelay=208, Bit 1, Center 135 (80 ~ 191) 112
8811 10:02:27.962252 iDelay=208, Bit 2, Center 123 (72 ~ 175) 104
8812 10:02:27.965947 iDelay=208, Bit 3, Center 131 (80 ~ 183) 104
8813 10:02:27.968949 iDelay=208, Bit 4, Center 131 (80 ~ 183) 104
8814 10:02:27.972778 iDelay=208, Bit 5, Center 151 (96 ~ 207) 112
8815 10:02:27.975568 iDelay=208, Bit 6, Center 147 (96 ~ 199) 104
8816 10:02:27.982708 iDelay=208, Bit 7, Center 135 (80 ~ 191) 112
8817 10:02:27.985541 iDelay=208, Bit 8, Center 119 (64 ~ 175) 112
8818 10:02:27.989130 iDelay=208, Bit 9, Center 123 (64 ~ 183) 120
8819 10:02:27.992276 iDelay=208, Bit 10, Center 135 (80 ~ 191) 112
8820 10:02:27.995334 iDelay=208, Bit 11, Center 127 (72 ~ 183) 112
8821 10:02:28.002319 iDelay=208, Bit 12, Center 143 (88 ~ 199) 112
8822 10:02:28.005484 iDelay=208, Bit 13, Center 143 (88 ~ 199) 112
8823 10:02:28.008985 iDelay=208, Bit 14, Center 139 (88 ~ 191) 104
8824 10:02:28.012733 iDelay=208, Bit 15, Center 143 (88 ~ 199) 112
8825 10:02:28.012879 ==
8826 10:02:28.015792 Dram Type= 6, Freq= 0, CH_1, rank 1
8827 10:02:28.019023 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8828 10:02:28.022187 ==
8829 10:02:28.022292 DQS Delay:
8830 10:02:28.022355 DQS0 = 0, DQS1 = 0
8831 10:02:28.025597 DQM Delay:
8832 10:02:28.025669 DQM0 = 136, DQM1 = 134
8833 10:02:28.029097 DQ Delay:
8834 10:02:28.032557 DQ0 =139, DQ1 =135, DQ2 =123, DQ3 =131
8835 10:02:28.035962 DQ4 =131, DQ5 =151, DQ6 =147, DQ7 =135
8836 10:02:28.038983 DQ8 =119, DQ9 =123, DQ10 =135, DQ11 =127
8837 10:02:28.042417 DQ12 =143, DQ13 =143, DQ14 =139, DQ15 =143
8838 10:02:28.042490
8839 10:02:28.042587
8840 10:02:28.042649 ==
8841 10:02:28.045435 Dram Type= 6, Freq= 0, CH_1, rank 1
8842 10:02:28.048885 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8843 10:02:28.048974 ==
8844 10:02:28.051941
8845 10:02:28.052010
8846 10:02:28.052070 TX Vref Scan disable
8847 10:02:28.055749 == TX Byte 0 ==
8848 10:02:28.059332 Update DQ dly =982 (3 ,6, 22) DQ OEN =(3 ,3)
8849 10:02:28.062346 Update DQM dly =982 (3 ,6, 22) DQM OEN =(3 ,3)
8850 10:02:28.065360 == TX Byte 1 ==
8851 10:02:28.069004 Update DQ dly =982 (3 ,6, 22) DQ OEN =(3 ,3)
8852 10:02:28.071883 Update DQM dly =982 (3 ,6, 22) DQM OEN =(3 ,3)
8853 10:02:28.071954 ==
8854 10:02:28.075531 Dram Type= 6, Freq= 0, CH_1, rank 1
8855 10:02:28.082010 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8856 10:02:28.082108 ==
8857 10:02:28.093987
8858 10:02:28.097145 TX Vref early break, caculate TX vref
8859 10:02:28.100313 TX Vref=16, minBit 0, minWin=23, winSum=386
8860 10:02:28.103529 TX Vref=18, minBit 0, minWin=23, winSum=394
8861 10:02:28.107554 TX Vref=20, minBit 0, minWin=23, winSum=400
8862 10:02:28.110412 TX Vref=22, minBit 0, minWin=24, winSum=410
8863 10:02:28.113720 TX Vref=24, minBit 2, minWin=25, winSum=419
8864 10:02:28.120417 TX Vref=26, minBit 0, minWin=25, winSum=423
8865 10:02:28.123666 TX Vref=28, minBit 0, minWin=26, winSum=429
8866 10:02:28.126822 TX Vref=30, minBit 1, minWin=25, winSum=418
8867 10:02:28.130307 TX Vref=32, minBit 0, minWin=24, winSum=408
8868 10:02:28.133791 TX Vref=34, minBit 0, minWin=24, winSum=403
8869 10:02:28.140073 [TxChooseVref] Worse bit 0, Min win 26, Win sum 429, Final Vref 28
8870 10:02:28.140158
8871 10:02:28.143417 Final TX Range 0 Vref 28
8872 10:02:28.143497
8873 10:02:28.143564 ==
8874 10:02:28.147004 Dram Type= 6, Freq= 0, CH_1, rank 1
8875 10:02:28.150409 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8876 10:02:28.150535 ==
8877 10:02:28.150597
8878 10:02:28.150657
8879 10:02:28.153429 TX Vref Scan disable
8880 10:02:28.160128 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =285/100 ps
8881 10:02:28.160207 == TX Byte 0 ==
8882 10:02:28.163690 u2DelayCellOfst[0]=17 cells (5 PI)
8883 10:02:28.166816 u2DelayCellOfst[1]=10 cells (3 PI)
8884 10:02:28.170411 u2DelayCellOfst[2]=0 cells (0 PI)
8885 10:02:28.173435 u2DelayCellOfst[3]=6 cells (2 PI)
8886 10:02:28.177138 u2DelayCellOfst[4]=10 cells (3 PI)
8887 10:02:28.180624 u2DelayCellOfst[5]=17 cells (5 PI)
8888 10:02:28.180732 u2DelayCellOfst[6]=17 cells (5 PI)
8889 10:02:28.183733 u2DelayCellOfst[7]=6 cells (2 PI)
8890 10:02:28.190131 Update DQ dly =979 (3 ,6, 19) DQ OEN =(3 ,3)
8891 10:02:28.193791 Update DQM dly =981 (3 ,6, 21) DQM OEN =(3 ,3)
8892 10:02:28.193878 == TX Byte 1 ==
8893 10:02:28.196993 u2DelayCellOfst[8]=0 cells (0 PI)
8894 10:02:28.200534 u2DelayCellOfst[9]=0 cells (0 PI)
8895 10:02:28.203537 u2DelayCellOfst[10]=10 cells (3 PI)
8896 10:02:28.207178 u2DelayCellOfst[11]=6 cells (2 PI)
8897 10:02:28.210040 u2DelayCellOfst[12]=13 cells (4 PI)
8898 10:02:28.213515 u2DelayCellOfst[13]=17 cells (5 PI)
8899 10:02:28.216700 u2DelayCellOfst[14]=17 cells (5 PI)
8900 10:02:28.219881 u2DelayCellOfst[15]=17 cells (5 PI)
8901 10:02:28.223435 Update DQ dly =980 (3 ,6, 20) DQ OEN =(3 ,3)
8902 10:02:28.230055 Update DQM dly =982 (3 ,6, 22) DQM OEN =(3 ,3)
8903 10:02:28.230141 DramC Write-DBI on
8904 10:02:28.230205 ==
8905 10:02:28.233906 Dram Type= 6, Freq= 0, CH_1, rank 1
8906 10:02:28.236393 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8907 10:02:28.236470 ==
8908 10:02:28.239989
8909 10:02:28.240088
8910 10:02:28.240190 TX Vref Scan disable
8911 10:02:28.243359 == TX Byte 0 ==
8912 10:02:28.246966 Update DQM dly =723 (2 ,6, 19) DQM OEN =(3 ,3)
8913 10:02:28.250306 == TX Byte 1 ==
8914 10:02:28.253144 Update DQM dly =723 (2 ,6, 19) DQM OEN =(3 ,3)
8915 10:02:28.253214 DramC Write-DBI off
8916 10:02:28.253275
8917 10:02:28.256632 [DATLAT]
8918 10:02:28.256706 Freq=1600, CH1 RK1
8919 10:02:28.256768
8920 10:02:28.260207 DATLAT Default: 0xf
8921 10:02:28.260277 0, 0xFFFF, sum = 0
8922 10:02:28.263251 1, 0xFFFF, sum = 0
8923 10:02:28.263325 2, 0xFFFF, sum = 0
8924 10:02:28.266843 3, 0xFFFF, sum = 0
8925 10:02:28.266916 4, 0xFFFF, sum = 0
8926 10:02:28.270173 5, 0xFFFF, sum = 0
8927 10:02:28.270248 6, 0xFFFF, sum = 0
8928 10:02:28.273498 7, 0xFFFF, sum = 0
8929 10:02:28.276260 8, 0xFFFF, sum = 0
8930 10:02:28.276368 9, 0xFFFF, sum = 0
8931 10:02:28.279540 10, 0xFFFF, sum = 0
8932 10:02:28.279624 11, 0xFFFF, sum = 0
8933 10:02:28.283176 12, 0xFFFF, sum = 0
8934 10:02:28.283259 13, 0xFFFF, sum = 0
8935 10:02:28.286256 14, 0x0, sum = 1
8936 10:02:28.286339 15, 0x0, sum = 2
8937 10:02:28.289687 16, 0x0, sum = 3
8938 10:02:28.289771 17, 0x0, sum = 4
8939 10:02:28.293070 best_step = 15
8940 10:02:28.293152
8941 10:02:28.293216 ==
8942 10:02:28.296092 Dram Type= 6, Freq= 0, CH_1, rank 1
8943 10:02:28.299812 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8944 10:02:28.299895 ==
8945 10:02:28.299959 RX Vref Scan: 0
8946 10:02:28.302824
8947 10:02:28.302906 RX Vref 0 -> 0, step: 1
8948 10:02:28.302970
8949 10:02:28.306925 RX Delay 19 -> 252, step: 4
8950 10:02:28.309850 iDelay=195, Bit 0, Center 138 (91 ~ 186) 96
8951 10:02:28.313173 iDelay=195, Bit 1, Center 130 (83 ~ 178) 96
8952 10:02:28.319737 iDelay=195, Bit 2, Center 122 (71 ~ 174) 104
8953 10:02:28.322854 iDelay=195, Bit 3, Center 130 (83 ~ 178) 96
8954 10:02:28.326542 iDelay=195, Bit 4, Center 130 (83 ~ 178) 96
8955 10:02:28.329642 iDelay=195, Bit 5, Center 146 (99 ~ 194) 96
8956 10:02:28.333161 iDelay=195, Bit 6, Center 144 (95 ~ 194) 100
8957 10:02:28.339507 iDelay=195, Bit 7, Center 134 (83 ~ 186) 104
8958 10:02:28.342848 iDelay=195, Bit 8, Center 118 (67 ~ 170) 104
8959 10:02:28.346664 iDelay=195, Bit 9, Center 120 (67 ~ 174) 108
8960 10:02:28.349914 iDelay=195, Bit 10, Center 132 (83 ~ 182) 100
8961 10:02:28.352945 iDelay=195, Bit 11, Center 124 (71 ~ 178) 108
8962 10:02:28.359805 iDelay=195, Bit 12, Center 140 (87 ~ 194) 108
8963 10:02:28.363501 iDelay=195, Bit 13, Center 138 (87 ~ 190) 104
8964 10:02:28.366417 iDelay=195, Bit 14, Center 136 (87 ~ 186) 100
8965 10:02:28.369847 iDelay=195, Bit 15, Center 138 (87 ~ 190) 104
8966 10:02:28.369929 ==
8967 10:02:28.372930 Dram Type= 6, Freq= 0, CH_1, rank 1
8968 10:02:28.379671 fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1
8969 10:02:28.379755 ==
8970 10:02:28.379828 DQS Delay:
8971 10:02:28.379894 DQS0 = 0, DQS1 = 0
8972 10:02:28.383362 DQM Delay:
8973 10:02:28.383438 DQM0 = 134, DQM1 = 130
8974 10:02:28.386278 DQ Delay:
8975 10:02:28.389979 DQ0 =138, DQ1 =130, DQ2 =122, DQ3 =130
8976 10:02:28.392999 DQ4 =130, DQ5 =146, DQ6 =144, DQ7 =134
8977 10:02:28.396486 DQ8 =118, DQ9 =120, DQ10 =132, DQ11 =124
8978 10:02:28.399682 DQ12 =140, DQ13 =138, DQ14 =136, DQ15 =138
8979 10:02:28.399787
8980 10:02:28.399881
8981 10:02:28.399970
8982 10:02:28.403378 [DramC_TX_OE_Calibration] TA2
8983 10:02:28.406222 Original DQ_B0 (3 6) =30, OEN = 27
8984 10:02:28.409790 Original DQ_B1 (3 6) =30, OEN = 27
8985 10:02:28.413059 24, 0x0, End_B0=24 End_B1=24
8986 10:02:28.413163 25, 0x0, End_B0=25 End_B1=25
8987 10:02:28.416563 26, 0x0, End_B0=26 End_B1=26
8988 10:02:28.419526 27, 0x0, End_B0=27 End_B1=27
8989 10:02:28.423020 28, 0x0, End_B0=28 End_B1=28
8990 10:02:28.423122 29, 0x0, End_B0=29 End_B1=29
8991 10:02:28.426461 30, 0x0, End_B0=30 End_B1=30
8992 10:02:28.429519 31, 0x4141, End_B0=30 End_B1=30
8993 10:02:28.433369 Byte0 end_step=30 best_step=27
8994 10:02:28.436283 Byte1 end_step=30 best_step=27
8995 10:02:28.439338 Byte0 TX OE(2T, 0.5T) = (3, 3)
8996 10:02:28.439445 Byte1 TX OE(2T, 0.5T) = (3, 3)
8997 10:02:28.442925
8998 10:02:28.442999
8999 10:02:28.449349 [DQSOSCAuto] RK1, (LSB)MR18= 0x250a, (MSB)MR19= 0x303, tDQSOscB0 = 404 ps tDQSOscB1 = 391 ps
9000 10:02:28.452581 CH1 RK1: MR19=303, MR18=250A
9001 10:02:28.459670 CH1_RK1: MR19=0x303, MR18=0x250A, DQSOSC=391, MR23=63, INC=24, DEC=16
9002 10:02:28.462569 [RxdqsGatingPostProcess] freq 1600
9003 10:02:28.465969 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
9004 10:02:28.469403 best DQS0 dly(2T, 0.5T) = (1, 1)
9005 10:02:28.472732 best DQS1 dly(2T, 0.5T) = (1, 1)
9006 10:02:28.476049 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
9007 10:02:28.479730 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
9008 10:02:28.482803 best DQS0 dly(2T, 0.5T) = (1, 1)
9009 10:02:28.485781 best DQS1 dly(2T, 0.5T) = (1, 1)
9010 10:02:28.489461 best DQS0 P1 dly(2T, 0.5T) = (1, 5)
9011 10:02:28.492584 best DQS1 P1 dly(2T, 0.5T) = (1, 5)
9012 10:02:28.496071 Pre-setting of DQS Precalculation
9013 10:02:28.499101 [DualRankRxdatlatCal] RK0: 15, RK1: 15, Final_Datlat 15
9014 10:02:28.506196 sync_frequency_calibration_params sync calibration params of frequency 1600 to shu:0
9015 10:02:28.512925 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
9016 10:02:28.513031
9017 10:02:28.513126
9018 10:02:28.516015 [Calibration Summary] 3200 Mbps
9019 10:02:28.519611 CH 0, Rank 0
9020 10:02:28.519718 SW Impedance : PASS
9021 10:02:28.522637 DUTY Scan : NO K
9022 10:02:28.525984 ZQ Calibration : PASS
9023 10:02:28.526061 Jitter Meter : NO K
9024 10:02:28.529536 CBT Training : PASS
9025 10:02:28.532670 Write leveling : PASS
9026 10:02:28.532751 RX DQS gating : PASS
9027 10:02:28.536476 RX DQ/DQS(RDDQC) : PASS
9028 10:02:28.539255 TX DQ/DQS : PASS
9029 10:02:28.539341 RX DATLAT : PASS
9030 10:02:28.543095 RX DQ/DQS(Engine): PASS
9031 10:02:28.543181 TX OE : PASS
9032 10:02:28.545717 All Pass.
9033 10:02:28.545802
9034 10:02:28.545902 CH 0, Rank 1
9035 10:02:28.549499 SW Impedance : PASS
9036 10:02:28.549592 DUTY Scan : NO K
9037 10:02:28.552501 ZQ Calibration : PASS
9038 10:02:28.555697 Jitter Meter : NO K
9039 10:02:28.555814 CBT Training : PASS
9040 10:02:28.559041 Write leveling : PASS
9041 10:02:28.562316 RX DQS gating : PASS
9042 10:02:28.562411 RX DQ/DQS(RDDQC) : PASS
9043 10:02:28.565785 TX DQ/DQS : PASS
9044 10:02:28.569190 RX DATLAT : PASS
9045 10:02:28.569264 RX DQ/DQS(Engine): PASS
9046 10:02:28.572900 TX OE : PASS
9047 10:02:28.572974 All Pass.
9048 10:02:28.573037
9049 10:02:28.576528 CH 1, Rank 0
9050 10:02:28.576636 SW Impedance : PASS
9051 10:02:28.579148 DUTY Scan : NO K
9052 10:02:28.582631 ZQ Calibration : PASS
9053 10:02:28.582705 Jitter Meter : NO K
9054 10:02:28.586122 CBT Training : PASS
9055 10:02:28.589001 Write leveling : PASS
9056 10:02:28.589077 RX DQS gating : PASS
9057 10:02:28.592827 RX DQ/DQS(RDDQC) : PASS
9058 10:02:28.592900 TX DQ/DQS : PASS
9059 10:02:28.595958 RX DATLAT : PASS
9060 10:02:28.599065 RX DQ/DQS(Engine): PASS
9061 10:02:28.599136 TX OE : PASS
9062 10:02:28.602804 All Pass.
9063 10:02:28.602887
9064 10:02:28.602953 CH 1, Rank 1
9065 10:02:28.605631 SW Impedance : PASS
9066 10:02:28.605715 DUTY Scan : NO K
9067 10:02:28.609386 ZQ Calibration : PASS
9068 10:02:28.612350 Jitter Meter : NO K
9069 10:02:28.612433 CBT Training : PASS
9070 10:02:28.616030 Write leveling : PASS
9071 10:02:28.619073 RX DQS gating : PASS
9072 10:02:28.619184 RX DQ/DQS(RDDQC) : PASS
9073 10:02:28.622281 TX DQ/DQS : PASS
9074 10:02:28.625591 RX DATLAT : PASS
9075 10:02:28.625684 RX DQ/DQS(Engine): PASS
9076 10:02:28.629138 TX OE : PASS
9077 10:02:28.629223 All Pass.
9078 10:02:28.629285
9079 10:02:28.632575 DramC Write-DBI on
9080 10:02:28.635585 PER_BANK_REFRESH: Hybrid Mode
9081 10:02:28.635724 TX_TRACKING: ON
9082 10:02:28.645380 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 115, TRFCpb 44, TRFCpb_05T 0
9083 10:02:28.652628 sync_frequency_calibration_params_to_shu sync calibration params of frequency 1600 to shu:1
9084 10:02:28.658925 calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464
9085 10:02:28.662277 [FAST_K] Save calibration result to emmc
9086 10:02:28.665738 sync common calibartion params.
9087 10:02:28.669016 sync cbt_mode0:1, 1:1
9088 10:02:28.672415 dram_init: ddr_geometry: 2
9089 10:02:28.672518 dram_init: ddr_geometry: 2
9090 10:02:28.675435 dram_init: ddr_geometry: 2
9091 10:02:28.678812 0:dram_rank_size:100000000
9092 10:02:28.678888 1:dram_rank_size:100000000
9093 10:02:28.685648 sync rank num:2, rank0_size:0x100000000, rank1_size:0x100000000
9094 10:02:28.688860 DFS_SHUFFLE_HW_MODE: ON
9095 10:02:28.692295 dramc_set_vcore_voltage set vcore to 725000
9096 10:02:28.695614 Read voltage for 1600, 0
9097 10:02:28.695710 Vio18 = 0
9098 10:02:28.695799 Vcore = 725000
9099 10:02:28.699029 Vdram = 0
9100 10:02:28.699125 Vddq = 0
9101 10:02:28.699217 Vmddr = 0
9102 10:02:28.702151 switch to 3200 Mbps bootup
9103 10:02:28.702247 [DramcRunTimeConfig]
9104 10:02:28.705399 PHYPLL
9105 10:02:28.705497 DPM_CONTROL_AFTERK: ON
9106 10:02:28.709088 PER_BANK_REFRESH: ON
9107 10:02:28.711992 REFRESH_OVERHEAD_REDUCTION: ON
9108 10:02:28.712060 CMD_PICG_NEW_MODE: OFF
9109 10:02:28.715786 XRTWTW_NEW_MODE: ON
9110 10:02:28.715880 XRTRTR_NEW_MODE: ON
9111 10:02:28.718644 TX_TRACKING: ON
9112 10:02:28.718744 RDSEL_TRACKING: OFF
9113 10:02:28.722239 DQS Precalculation for DVFS: ON
9114 10:02:28.725383 RX_TRACKING: OFF
9115 10:02:28.725450 HW_GATING DBG: ON
9116 10:02:28.729024 ZQCS_ENABLE_LP4: ON
9117 10:02:28.729089 RX_PICG_NEW_MODE: ON
9118 10:02:28.732062 TX_PICG_NEW_MODE: ON
9119 10:02:28.732154 ENABLE_RX_DCM_DPHY: ON
9120 10:02:28.735492 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
9121 10:02:28.738681 DUMMY_READ_FOR_TRACKING: OFF
9122 10:02:28.742004 !!! SPM_CONTROL_AFTERK: OFF
9123 10:02:28.745690 !!! SPM could not control APHY
9124 10:02:28.745757 IMPEDANCE_TRACKING: ON
9125 10:02:28.749205 TEMP_SENSOR: ON
9126 10:02:28.749271 HW_SAVE_FOR_SR: OFF
9127 10:02:28.752184 CLK_FREE_FUN_FOR_DRAMC_PSEL: OFF
9128 10:02:28.755801 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: OFF
9129 10:02:28.758891 Read ODT Tracking: ON
9130 10:02:28.762240 Refresh Rate DeBounce: ON
9131 10:02:28.762308 DFS_NO_QUEUE_FLUSH: ON
9132 10:02:28.765407 DFS_NO_QUEUE_FLUSH_LATENCY_CNT: OFF
9133 10:02:28.768472 ENABLE_DFS_RUNTIME_MRW: OFF
9134 10:02:28.772253 DDR_RESERVE_NEW_MODE: ON
9135 10:02:28.772349 MR_CBT_SWITCH_FREQ: ON
9136 10:02:28.775116 =========================
9137 10:02:28.793915 [MEM] 1st complex R/W mem test pass (start addr:0x4c400000)
9138 10:02:28.797883 dram_init: ddr_geometry: 2
9139 10:02:28.815916 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
9140 10:02:28.819284 dram_init: dram init end (result: 0)
9141 10:02:28.825969 DRAM-K: Full calibration passed in 24467 msecs
9142 10:02:28.829345 MRC: failed to locate region type 0.
9143 10:02:28.829447 DRAM rank0 size:0x100000000,
9144 10:02:28.832399 DRAM rank1 size=0x100000000
9145 10:02:28.842433 Mapping address range [0x40000000:0x240000000) as cacheable | read-write | non-secure | normal
9146 10:02:28.849052 Mapping address range [0x40000000:0x40100000) as non-cacheable | read-write | non-secure | normal
9147 10:02:28.855995 Backing address range [0x40000000:0x80000000) with new page table @0x00112000
9148 10:02:28.862415 Backing address range [0x40000000:0x40200000) with new page table @0x00113000
9149 10:02:28.865838 DRAM rank0 size:0x100000000,
9150 10:02:28.869391 DRAM rank1 size=0x100000000
9151 10:02:28.869473 CBMEM:
9152 10:02:28.872951 IMD: root @ 0xfffff000 254 entries.
9153 10:02:28.876092 IMD: root @ 0xffffec00 62 entries.
9154 10:02:28.878948 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
9155 10:02:28.882345 WARNING: RO_VPD is uninitialized or empty.
9156 10:02:28.888785 FMAP: area RW_VPD found @ 577000 (16384 bytes)
9157 10:02:28.895785 CBFS: Found 'fallback/ramstage' @0x21840 size 0xe01e in mcache @0x00107c80
9158 10:02:28.908726 read SPI 0x42894 0xe01e: 6226 us, 9215 KB/s, 73.720 Mbps
9159 10:02:28.920108 BS: romstage times (exec / console): total (unknown) / 24001 ms
9160 10:02:28.920192
9161 10:02:28.920257
9162 10:02:28.929996 coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 ramstage starting (log level: 8)...
9163 10:02:28.933556 ARM64: Exception handlers installed.
9164 10:02:28.936523 ARM64: Testing exception
9165 10:02:28.939665 ARM64: Done test exception
9166 10:02:28.939747 Enumerating buses...
9167 10:02:28.943053 Show all devs... Before device enumeration.
9168 10:02:28.946702 Root Device: enabled 1
9169 10:02:28.949733 CPU_CLUSTER: 0: enabled 1
9170 10:02:28.949835 CPU: 00: enabled 1
9171 10:02:28.953364 Compare with tree...
9172 10:02:28.953463 Root Device: enabled 1
9173 10:02:28.956737 CPU_CLUSTER: 0: enabled 1
9174 10:02:28.959525 CPU: 00: enabled 1
9175 10:02:28.959628 Root Device scanning...
9176 10:02:28.963427 scan_static_bus for Root Device
9177 10:02:28.966675 CPU_CLUSTER: 0 enabled
9178 10:02:28.969733 scan_static_bus for Root Device done
9179 10:02:28.973337 scan_bus: bus Root Device finished in 8 msecs
9180 10:02:28.973416 done
9181 10:02:28.979433 BS: BS_DEV_ENUMERATE run times (exec / console): 0 / 35 ms
9182 10:02:28.983160 FMAP: area RW_MRC_CACHE found @ 57d000 (8192 bytes)
9183 10:02:28.989702 SF: Detected 00 0000 with sector size 0x1000, total 0x800000
9184 10:02:28.993206 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 10 ms
9185 10:02:28.996243 Allocating resources...
9186 10:02:28.999596 Reading resources...
9187 10:02:29.002667 Root Device read_resources bus 0 link: 0
9188 10:02:29.002749 DRAM rank0 size:0x100000000,
9189 10:02:29.006895 DRAM rank1 size=0x100000000
9190 10:02:29.009365 CPU_CLUSTER: 0 read_resources bus 0 link: 0
9191 10:02:29.013012 CPU: 00 missing read_resources
9192 10:02:29.016008 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
9193 10:02:29.023459 Root Device read_resources bus 0 link: 0 done
9194 10:02:29.023542 Done reading resources.
9195 10:02:29.029482 Show resources in subtree (Root Device)...After reading.
9196 10:02:29.032947 Root Device child on link 0 CPU_CLUSTER: 0
9197 10:02:29.036310 CPU_CLUSTER: 0 child on link 0 CPU: 00
9198 10:02:29.045922 CPU_CLUSTER: 0 resource base 40000000 size 200000000 align 0 gran 0 limit 0 flags e0004200 index 0
9199 10:02:29.046006 CPU: 00
9200 10:02:29.049176 Root Device assign_resources, bus 0 link: 0
9201 10:02:29.052927 CPU_CLUSTER: 0 missing set_resources
9202 10:02:29.059480 Root Device assign_resources, bus 0 link: 0 done
9203 10:02:29.059562 Done setting resources.
9204 10:02:29.066603 Show resources in subtree (Root Device)...After assigning values.
9205 10:02:29.069689 Root Device child on link 0 CPU_CLUSTER: 0
9206 10:02:29.072599 CPU_CLUSTER: 0 child on link 0 CPU: 00
9207 10:02:29.082477 CPU_CLUSTER: 0 resource base 40000000 size 200000000 align 0 gran 0 limit 0 flags e0004200 index 0
9208 10:02:29.082561 CPU: 00
9209 10:02:29.086135 Done allocating resources.
9210 10:02:29.089164 BS: BS_DEV_RESOURCES run times (exec / console): 0 / 91 ms
9211 10:02:29.092928 Enabling resources...
9212 10:02:29.093010 done.
9213 10:02:29.099812 BS: BS_DEV_ENABLE run times (exec / console): 0 / 3 ms
9214 10:02:29.099895 Initializing devices...
9215 10:02:29.102803 Root Device init
9216 10:02:29.102889 init hardware done!
9217 10:02:29.106466 0x00000018: ctrlr->caps
9218 10:02:29.109438 52.000 MHz: ctrlr->f_max
9219 10:02:29.109538 0.400 MHz: ctrlr->f_min
9220 10:02:29.112890 0x40ff8080: ctrlr->voltages
9221 10:02:29.112974 sclk: 390625
9222 10:02:29.115916 Bus Width = 1
9223 10:02:29.115997 sclk: 390625
9224 10:02:29.116061 Bus Width = 1
9225 10:02:29.119732 Early init status = 3
9226 10:02:29.126252 out: cmd=0x12e: 03 c9 2e 01 00 00 04 00 01 00 00 00
9227 10:02:29.129843 in-header: 03 fb 00 00 01 00 00 00
9228 10:02:29.129925 in-data: 01
9229 10:02:29.136008 out: cmd=0x12e: 03 ca 2e 01 00 00 04 00 00 00 00 00
9230 10:02:29.139276 in-header: 03 fb 00 00 01 00 00 00
9231 10:02:29.139412 in-data: 01
9232 10:02:29.142663 [SSUSB] Setting up USB HOST controller...
9233 10:02:29.149475 [SSUSB] u3phy_ports_enable u2p:1, u3p:1
9234 10:02:29.149594 [SSUSB] phy power-on done.
9235 10:02:29.155939 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
9236 10:02:29.159540 CBFS: Found 'dpm.dm' @0x2fe00 size 0x20 in mcache @0xffffc13c
9237 10:02:29.165765 mtk_init_mcu: Loaded (and reset) dpm.dm in 9 msecs (40 bytes)
9238 10:02:29.172742 CBFS: Found 'dpm.pm' @0x2fe80 size 0x2ad3 in mcache @0xffffc16c
9239 10:02:29.175824 read SPI 0x50eb0 0x2ad3: 1175 us, 9330 KB/s, 74.640 Mbps
9240 10:02:29.183727 mtk_init_mcu: Loaded (and reset) dpm.pm in 13 msecs (14004 bytes)
9241 10:02:29.190122 CBFS: Found 'spm_firmware.bin' @0x4f580 size 0x1f6a in mcache @0xffffc204
9242 10:02:29.196711 read SPI 0x705bc 0x1f6a: 925 us, 8694 KB/s, 69.552 Mbps
9243 10:02:29.200120 SPM: binary array size = 0x9dc
9244 10:02:29.206889 SPM: spmfw (version pcm_suspend_v1.45_20201028_mtcmosapi_align16)
9245 10:02:29.209939 spm_kick_im_to_fetch: ptr = 0x80000010, pmem/dmem words = 0x9c4/0x18
9246 10:02:29.216559 mtk_init_mcu: Loaded (and reset) spm_firmware.bin in 27 msecs (10173 bytes)
9247 10:02:29.223371 SPM: spm_init done in 34 msecs, spm pc = 0x3f4
9248 10:02:29.226944 configure_display: Starting display init
9249 10:02:29.261708 anx7625_power_on_init: Init interface.
9250 10:02:29.264237 anx7625_disable_pd_protocol: Disabled PD feature.
9251 10:02:29.267854 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
9252 10:02:29.295794 anx7625_start_dp_work: Secure OCM version=00
9253 10:02:29.298939 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
9254 10:02:29.314150 sp_tx_get_edid_block: EDID Block = 1
9255 10:02:29.416634 Extracted contents:
9256 10:02:29.419592 header: 00 ff ff ff ff ff ff 00
9257 10:02:29.422956 serial number: 26 cf 7d 05 00 00 00 00 00 1e
9258 10:02:29.426517 version: 01 04
9259 10:02:29.429614 basic params: 95 1f 11 78 0a
9260 10:02:29.433224 chroma info: 76 90 94 55 54 90 27 21 50 54
9261 10:02:29.436302 established: 00 00 00
9262 10:02:29.443172 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
9263 10:02:29.446288 descriptor 1: 38 36 80 a0 70 38 20 40 18 30 3c 00 35 ae 10 00 00 19
9264 10:02:29.452849 descriptor 2: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
9265 10:02:29.459771 descriptor 3: 00 00 00 fe 00 49 6e 66 6f 56 69 73 69 6f 6e 0a 20 20
9266 10:02:29.465935 descriptor 4: 00 00 00 fe 00 52 31 34 30 4e 57 46 35 20 52 48 20 0a
9267 10:02:29.469541 extensions: 00
9268 10:02:29.469624 checksum: fb
9269 10:02:29.469690
9270 10:02:29.472985 Manufacturer: IVO Model 57d Serial Number 0
9271 10:02:29.476070 Made week 0 of 2020
9272 10:02:29.476153 EDID version: 1.4
9273 10:02:29.479562 Digital display
9274 10:02:29.482555 6 bits per primary color channel
9275 10:02:29.482641 DisplayPort interface
9276 10:02:29.485850 Maximum image size: 31 cm x 17 cm
9277 10:02:29.489370 Gamma: 220%
9278 10:02:29.489452 Check DPMS levels
9279 10:02:29.492416 Supported color formats: RGB 4:4:4, YCrCb 4:2:2
9280 10:02:29.496458 First detailed timing is preferred timing
9281 10:02:29.499333 Established timings supported:
9282 10:02:29.502588 Standard timings supported:
9283 10:02:29.506087 Detailed timings
9284 10:02:29.509292 Hex of detail: 383680a07038204018303c0035ae10000019
9285 10:02:29.512415 Detailed mode (IN HEX): Clock 138800 KHz, 135 mm x ae mm
9286 10:02:29.519234 0780 0798 07c8 0820 hborder 0
9287 10:02:29.522750 0438 043b 0447 0458 vborder 0
9288 10:02:29.525893 -hsync -vsync
9289 10:02:29.525976 Did detailed timing
9290 10:02:29.532233 Hex of detail: 000000000000000000000000000000000000
9291 10:02:29.536058 Manufacturer-specified data, tag 0
9292 10:02:29.538721 Hex of detail: 000000fe00496e666f566973696f6e0a2020
9293 10:02:29.542070 ASCII string: InfoVision
9294 10:02:29.545567 Hex of detail: 000000fe00523134304e574635205248200a
9295 10:02:29.549188 ASCII string: R140NWF5 RH
9296 10:02:29.549269 Checksum
9297 10:02:29.552877 Checksum: 0xfb (valid)
9298 10:02:29.556054 configure_display: 'IVO R140NWF5 RH ' 1920x1080@0Hz
9299 10:02:29.559149 DSI data_rate: 832800000 bps
9300 10:02:29.565646 anx7625_parse_edid: detected IVO panel, use k value 0x3b
9301 10:02:29.568993 anx7625_parse_edid: pixelclock(138800).
9302 10:02:29.572036 hactive(1920), hsync(48), hfp(24), hbp(88)
9303 10:02:29.575754 vactive(1080), vsync(12), vfp(3), vbp(17)
9304 10:02:29.579205 anx7625_dsi_config: config dsi.
9305 10:02:29.585783 anx7625_dsi_video_config: compute M(11370496), N(552960), divider(4).
9306 10:02:29.598715 anx7625_dsi_config: success to config DSI
9307 10:02:29.602075 anx7625_dp_start: MIPI phy setup OK.
9308 10:02:29.605058 mtk_ddp_mode_set display resolution: 1920x1080@0 bpp 4
9309 10:02:29.609128 mtk_ddp_mode_set invalid vrefresh 60
9310 10:02:29.611775 main_disp_path_setup
9311 10:02:29.611855 ovl_layer_smi_id_en
9312 10:02:29.614811 ovl_layer_smi_id_en
9313 10:02:29.614893 ccorr_config
9314 10:02:29.615003 aal_config
9315 10:02:29.618518 gamma_config
9316 10:02:29.618598 postmask_config
9317 10:02:29.621437 dither_config
9318 10:02:29.625019 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
9319 10:02:29.631449 x_res x y_res: 1920 x 1080, size: 8294400 at 0x0
9320 10:02:29.635163 Root Device init finished in 529 msecs
9321 10:02:29.638086 CPU_CLUSTER: 0 init
9322 10:02:29.645056 Mapping address range [0x00200000:0x00300000) as cacheable | read-write | secure | device
9323 10:02:29.648383 INFRA2APU_SRAM_PROT_EN 0x10001e98 = 0x3fffffff
9324 10:02:29.651526 APU_MBOX 0x190000b0 = 0x10001
9325 10:02:29.655166 APU_MBOX 0x190001b0 = 0x10001
9326 10:02:29.658052 APU_MBOX 0x190005b0 = 0x10001
9327 10:02:29.661888 APU_MBOX 0x190006b0 = 0x10001
9328 10:02:29.665011 CBFS: Found 'mcupm.bin' @0x329c0 size 0xe237 in mcache @0xffffc19c
9329 10:02:29.677172 read SPI 0x539f4 0xe237: 6248 us, 9268 KB/s, 74.144 Mbps
9330 10:02:29.689616 mtk_init_mcu: Loaded (and reset) mcupm.bin in 24 msecs (117884 bytes)
9331 10:02:29.696301 CBFS: Found 'sspm.bin' @0x40c40 size 0xe8ef in mcache @0xffffc1d0
9332 10:02:29.708149 read SPI 0x61c74 0xe8ef: 6410 us, 9302 KB/s, 74.416 Mbps
9333 10:02:29.717404 mtk_init_mcu: Loaded (and reset) sspm.bin in 21 msecs (137228 bytes)
9334 10:02:29.720769 CPU_CLUSTER: 0 init finished in 81 msecs
9335 10:02:29.723788 Devices initialized
9336 10:02:29.727462 Show all devs... After init.
9337 10:02:29.727545 Root Device: enabled 1
9338 10:02:29.730695 CPU_CLUSTER: 0: enabled 1
9339 10:02:29.733706 CPU: 00: enabled 1
9340 10:02:29.737289 BS: BS_DEV_INIT run times (exec / console): 206 / 428 ms
9341 10:02:29.740282 FMAP: area RW_ELOG found @ 57f000 (4096 bytes)
9342 10:02:29.744126 ELOG: NV offset 0x57f000 size 0x1000
9343 10:02:29.750053 read SPI 0x57f000 0x1000: 487 us, 8410 KB/s, 67.280 Mbps
9344 10:02:29.756858 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
9345 10:02:29.760013 ELOG: Event(17) added with size 13 at 2023-06-10 10:02:17 UTC
9346 10:02:29.766920 out: cmd=0x121: 03 db 21 01 00 00 00 00
9347 10:02:29.770112 in-header: 03 e7 00 00 2c 00 00 00
9348 10:02:29.780104 in-data: 78 68 00 00 00 00 00 00 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
9349 10:02:29.787048 ELOG: Event(A1) added with size 10 at 2023-06-10 10:02:17 UTC
9350 10:02:29.793439 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
9351 10:02:29.800283 ELOG: Event(A0) added with size 9 at 2023-06-10 10:02:17 UTC
9352 10:02:29.803689 elog_add_boot_reason: Logged dev mode boot
9353 10:02:29.806863 BS: BS_POST_DEVICE entry times (exec / console): 2 / 64 ms
9354 10:02:29.810519 Finalize devices...
9355 10:02:29.810602 Devices finalized
9356 10:02:29.816474 BS: BS_POST_DEVICE run times (exec / console): 0 / 3 ms
9357 10:02:29.820219 Writing coreboot table at 0xffe64000
9358 10:02:29.823250 0. 000000000010a000-0000000000113fff: RAMSTAGE
9359 10:02:29.827015 1. 0000000040000000-00000000400fffff: RAM
9360 10:02:29.833619 2. 0000000040100000-000000004032afff: RAMSTAGE
9361 10:02:29.836928 3. 000000004032b000-00000000545fffff: RAM
9362 10:02:29.840290 4. 0000000054600000-000000005465ffff: BL31
9363 10:02:29.843380 5. 0000000054660000-00000000ffe63fff: RAM
9364 10:02:29.850048 6. 00000000ffe64000-00000000ffffffff: CONFIGURATION TABLES
9365 10:02:29.853140 7. 0000000100000000-000000023fffffff: RAM
9366 10:02:29.856705 Passing 5 GPIOs to payload:
9367 10:02:29.860090 NAME | PORT | POLARITY | VALUE
9368 10:02:29.863250 EC in RW | 0x000000aa | low | undefined
9369 10:02:29.869965 EC interrupt | 0x00000005 | low | undefined
9370 10:02:29.873002 TPM interrupt | 0x000000ab | high | undefined
9371 10:02:29.880075 SD card detect | 0x00000011 | high | undefined
9372 10:02:29.883318 speaker enable | 0x00000093 | high | undefined
9373 10:02:29.886512 out: cmd=0x6: 03 f7 06 00 00 00 00 00
9374 10:02:29.889702 in-header: 03 f9 00 00 02 00 00 00
9375 10:02:29.893180 in-data: 02 00
9376 10:02:29.893275 ADC[4]: Raw value=905096 ID=7
9377 10:02:29.896673 ADC[3]: Raw value=213441 ID=1
9378 10:02:29.899772 RAM Code: 0x71
9379 10:02:29.899943 ADC[6]: Raw value=75701 ID=0
9380 10:02:29.903151 ADC[5]: Raw value=213072 ID=1
9381 10:02:29.906029 SKU Code: 0x1
9382 10:02:29.909605 Wrote coreboot table at: 0xffe64000, 0x3ac bytes, checksum 4e98
9383 10:02:29.912932 coreboot table: 964 bytes.
9384 10:02:29.915985 IMD ROOT 0. 0xfffff000 0x00001000
9385 10:02:29.919712 IMD SMALL 1. 0xffffe000 0x00001000
9386 10:02:29.923195 RO MCACHE 2. 0xffffc000 0x00001104
9387 10:02:29.926789 CONSOLE 3. 0xfff7c000 0x00080000
9388 10:02:29.929439 FMAP 4. 0xfff7b000 0x00000452
9389 10:02:29.932973 TIME STAMP 5. 0xfff7a000 0x00000910
9390 10:02:29.936239 VBOOT WORK 6. 0xfff66000 0x00014000
9391 10:02:29.939676 RAMOOPS 7. 0xffe66000 0x00100000
9392 10:02:29.942942 COREBOOT 8. 0xffe64000 0x00002000
9393 10:02:29.943039 IMD small region:
9394 10:02:29.946596 IMD ROOT 0. 0xffffec00 0x00000400
9395 10:02:29.949693 VPD 1. 0xffffeba0 0x0000004c
9396 10:02:29.952768 MMC STATUS 2. 0xffffeb80 0x00000004
9397 10:02:29.959729 BS: BS_WRITE_TABLES run times (exec / console): 1 / 137 ms
9398 10:02:29.963299 Probing TPM: done!
9399 10:02:29.966231 Connected to device vid:did:rid of 1ae0:0028:00
9400 10:02:29.976659 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.153/cr50_v3.94_pp.113-620c9b9523
9401 10:02:29.979854 Initialized TPM device CR50 revision 0
9402 10:02:29.984278 Checking cr50 for pending updates
9403 10:02:29.987371 Reading cr50 TPM mode
9404 10:02:29.995646 BS: BS_PAYLOAD_LOAD entry times (exec / console): 9 / 22 ms
9405 10:02:30.002268 CBFS: Found 'fallback/payload' @0x3780c0 size 0x4f1b0 in mcache @0xffffd098
9406 10:02:30.042068 read SPI 0x3990ec 0x4f1b0: 34850 us, 9297 KB/s, 74.376 Mbps
9407 10:02:30.045607 Checking segment from ROM address 0x40100000
9408 10:02:30.048850 Checking segment from ROM address 0x4010001c
9409 10:02:30.055634 Loading segment from ROM address 0x40100000
9410 10:02:30.055739 code (compression=0)
9411 10:02:30.066123 New segment dstaddr 0x80000000 memsize 0x21a7280 srcaddr 0x40100038 filesize 0x4f178
9412 10:02:30.072192 Loading Segment: addr: 0x80000000 memsz: 0x00000000021a7280 filesz: 0x000000000004f178
9413 10:02:30.072301 it's not compressed!
9414 10:02:30.079302 [ 0x80000000, 8004f178, 0x821a7280) <- 40100038
9415 10:02:30.082562 Clearing Segment: addr: 0x000000008004f178 memsz: 0x0000000002158108
9416 10:02:30.103236 Loading segment from ROM address 0x4010001c
9417 10:02:30.103343 Entry Point 0x80000000
9418 10:02:30.106038 Loaded segments
9419 10:02:30.109232 BS: BS_PAYLOAD_LOAD run times (exec / console): 49 / 61 ms
9420 10:02:30.116125 Jumping to boot code at 0x80000000(0xffe64000)
9421 10:02:30.122833 CPU0: stack: 0x0010a000 - 0x0010d000, lowest used address 0x0010c500, stack used: 2816 bytes
9422 10:02:30.129842 CBFS: Found 'fallback/bl31' @0x6db40 size 0x74a8 in mcache @0xffffc290
9423 10:02:30.137563 read SPI 0x8eb68 0x74a8: 3224 us, 9263 KB/s, 74.104 Mbps
9424 10:02:30.140546 Checking segment from ROM address 0x40100000
9425 10:02:30.144020 Checking segment from ROM address 0x4010001c
9426 10:02:30.151079 Loading segment from ROM address 0x40100000
9427 10:02:30.151186 code (compression=1)
9428 10:02:30.157236 New segment dstaddr 0x54600000 memsize 0x2e000 srcaddr 0x40100038 filesize 0x7470
9429 10:02:30.167666 Loading Segment: addr: 0x54600000 memsz: 0x000000000002e000 filesz: 0x0000000000007470
9430 10:02:30.167773 using LZMA
9431 10:02:30.175670 [ 0x54600000, 54614abc, 0x5462e000) <- 40100038
9432 10:02:30.182326 Clearing Segment: addr: 0x0000000054614abc memsz: 0x0000000000019544
9433 10:02:30.185417 Loading segment from ROM address 0x4010001c
9434 10:02:30.185500 Entry Point 0x54601000
9435 10:02:30.188784 Loaded segments
9436 10:02:30.192317 NOTICE: MT8192 bl31_setup
9437 10:02:30.199578 NOTICE: BL31: v2.4(debug):v2.4-448-gce3ebc861
9438 10:02:30.202427 NOTICE: BL31: Built : Sat Sep 11 09:59:37 UTC 2021
9439 10:02:30.205825 WARNING: region 0:
9440 10:02:30.209086 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9441 10:02:30.209163 WARNING: region 1:
9442 10:02:30.215871 WARNING: sa:0x8000, ea:0x83ff, apc0: 0x80b6db40 apc1: 0xb6db6d
9443 10:02:30.219285 WARNING: region 2:
9444 10:02:30.222419 WARNING: sa:0x1000, ea:0x113f, apc0: 0x80b6d168 apc1: 0xb6db6d
9445 10:02:30.225912 WARNING: region 3:
9446 10:02:30.229661 WARNING: sa:0x0, ea:0x1bfff, apc0: 0x80b6db68 apc1: 0xb6db6d
9447 10:02:30.232768 WARNING: region 4:
9448 10:02:30.235870 WARNING: sa:0x0, ea:0x1bfff, apc0: 0x80b6db68 apc1: 0xb6db6d
9449 10:02:30.239214 WARNING: region 5:
9450 10:02:30.242721 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9451 10:02:30.246235 WARNING: region 6:
9452 10:02:30.249116 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9453 10:02:30.249223 WARNING: region 7:
9454 10:02:30.255838 WARNING: sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0
9455 10:02:30.262682 INFO: [DEVAPC] (INFRA_AO_SYS0)D0_APC_0: 0x14000000
9456 10:02:30.266308 INFO: [DEVAPC] (INFRA_AO_SYS0)D0_APC_1: 0x0
9457 10:02:30.269786 INFO: [DEVAPC] (INFRA_AO_SYS0)D1_APC_0: 0xffffffff
9458 10:02:30.275983 INFO: [DEVAPC] (INFRA_AO_SYS0)D1_APC_1: 0xfff
9459 10:02:30.279560 INFO: [DEVAPC] (INFRA_AO_SYS0)D2_APC_0: 0xffffffff
9460 10:02:30.282907 INFO: [DEVAPC] (INFRA_AO_SYS0)D2_APC_1: 0x3f00
9461 10:02:30.289535 INFO: [DEVAPC] (INFRA_AO_SYS0)D3_APC_0: 0xffffffff
9462 10:02:30.293127 INFO: [DEVAPC] (INFRA_AO_SYS0)D3_APC_1: 0x3fff
9463 10:02:30.296085 INFO: [DEVAPC] (INFRA_AO_SYS0)D4_APC_0: 0xffffffff
9464 10:02:30.303036 INFO: [DEVAPC] (INFRA_AO_SYS0)D4_APC_1: 0x3fff
9465 10:02:30.306483 INFO: [DEVAPC] (INFRA_AO_SYS0)D5_APC_0: 0xffffffff
9466 10:02:30.309490 INFO: [DEVAPC] (INFRA_AO_SYS0)D5_APC_1: 0x3fff
9467 10:02:30.316961 INFO: [DEVAPC] (INFRA_AO_SYS0)D6_APC_0: 0xffffffff
9468 10:02:30.319539 INFO: [DEVAPC] (INFRA_AO_SYS0)D6_APC_1: 0x3fff
9469 10:02:30.326599 INFO: [DEVAPC] (INFRA_AO_SYS0)D7_APC_0: 0xffffffff
9470 10:02:30.329527 INFO: [DEVAPC] (INFRA_AO_SYS0)D7_APC_1: 0x3fff
9471 10:02:30.332962 INFO: [DEVAPC] (INFRA_AO_SYS0)D8_APC_0: 0xffffffff
9472 10:02:30.339867 INFO: [DEVAPC] (INFRA_AO_SYS0)D8_APC_1: 0x3fff
9473 10:02:30.342939 INFO: [DEVAPC] (INFRA_AO_SYS0)D9_APC_0: 0xffffffff
9474 10:02:30.346635 INFO: [DEVAPC] (INFRA_AO_SYS0)D9_APC_1: 0x3fff
9475 10:02:30.352978 INFO: [DEVAPC] (INFRA_AO_SYS0)D10_APC_0: 0xffffffff
9476 10:02:30.356295 INFO: [DEVAPC] (INFRA_AO_SYS0)D10_APC_1: 0x3fff
9477 10:02:30.363152 INFO: [DEVAPC] (INFRA_AO_SYS0)D11_APC_0: 0xffffffff
9478 10:02:30.366848 INFO: [DEVAPC] (INFRA_AO_SYS0)D11_APC_1: 0x3fff
9479 10:02:30.369963 INFO: [DEVAPC] (INFRA_AO_SYS0)D12_APC_0: 0xffffffff
9480 10:02:30.376705 INFO: [DEVAPC] (INFRA_AO_SYS0)D12_APC_1: 0x3fff
9481 10:02:30.379666 INFO: [DEVAPC] (INFRA_AO_SYS0)D13_APC_0: 0xffffffff
9482 10:02:30.386817 INFO: [DEVAPC] (INFRA_AO_SYS0)D13_APC_1: 0x3fff
9483 10:02:30.389890 INFO: [DEVAPC] (INFRA_AO_SYS0)D14_APC_0: 0xffffffff
9484 10:02:30.393378 INFO: [DEVAPC] (INFRA_AO_SYS0)D14_APC_1: 0x3fff
9485 10:02:30.400008 INFO: [DEVAPC] (INFRA_AO_SYS0)D15_APC_0: 0xffffffff
9486 10:02:30.403130 INFO: [DEVAPC] (INFRA_AO_SYS0)D15_APC_1: 0x3fff
9487 10:02:30.406512 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_0: 0x0
9488 10:02:30.413756 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_1: 0x0
9489 10:02:30.416747 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_2: 0x0
9490 10:02:30.419705 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_3: 0x0
9491 10:02:30.423494 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_4: 0x0
9492 10:02:30.429976 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_5: 0x0
9493 10:02:30.433536 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_6: 0x0
9494 10:02:30.436723 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_7: 0x0
9495 10:02:30.439760 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_8: 0x0
9496 10:02:30.443732 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_9: 0x0
9497 10:02:30.450085 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_10: 0x0
9498 10:02:30.453125 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_11: 0x0
9499 10:02:30.456796 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_12: 0x0
9500 10:02:30.463176 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_13: 0x0
9501 10:02:30.466809 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_14: 0x0
9502 10:02:30.469951 INFO: [DEVAPC] (INFRA_AO_SYS1)D0_APC_15: 0x0
9503 10:02:30.476699 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_0: 0xffffffff
9504 10:02:30.480368 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_1: 0xffffffff
9505 10:02:30.483466 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_2: 0xffffffff
9506 10:02:30.490007 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_3: 0xffffffff
9507 10:02:30.493441 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_4: 0xffffffff
9508 10:02:30.499758 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_5: 0xffffffff
9509 10:02:30.503376 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_6: 0xffffffff
9510 10:02:30.506393 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_7: 0xffffffff
9511 10:02:30.513515 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_8: 0xffffffff
9512 10:02:30.516969 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_9: 0xffffffff
9513 10:02:30.523465 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_10: 0xffffffff
9514 10:02:30.526395 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_11: 0xffffffff
9515 10:02:30.533552 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_12: 0xffffffff
9516 10:02:30.536727 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_13: 0xffffffff
9517 10:02:30.543302 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_14: 0xffffffff
9518 10:02:30.546636 INFO: [DEVAPC] (INFRA_AO_SYS1)D1_APC_15: 0xffffffff
9519 10:02:30.550349 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_0: 0xffffffff
9520 10:02:30.556696 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_1: 0xffffffff
9521 10:02:30.560230 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_2: 0xffffffff
9522 10:02:30.566552 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_3: 0xffffffff
9523 10:02:30.570028 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_4: 0xffffffff
9524 10:02:30.576782 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_5: 0xffffffff
9525 10:02:30.579711 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_6: 0xffffffff
9526 10:02:30.582957 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_7: 0xffffffff
9527 10:02:30.589986 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_8: 0xffffffff
9528 10:02:30.593112 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_9: 0xffffffff
9529 10:02:30.599612 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_10: 0xffffffff
9530 10:02:30.603400 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_11: 0xffffffff
9531 10:02:30.609999 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_12: 0xffffffff
9532 10:02:30.613100 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_13: 0xffffffff
9533 10:02:30.616902 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_14: 0xffffffff
9534 10:02:30.623021 INFO: [DEVAPC] (INFRA_AO_SYS1)D2_APC_15: 0xffffffff
9535 10:02:30.626883 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_0: 0xffffffff
9536 10:02:30.633094 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_1: 0xffffffff
9537 10:02:30.636405 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_2: 0xffffffff
9538 10:02:30.643189 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_3: 0xffffffff
9539 10:02:30.646935 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_4: 0xffffffff
9540 10:02:30.649903 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_5: 0xcfff30ff
9541 10:02:30.656546 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_6: 0xffffffff
9542 10:02:30.659801 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_7: 0xffffffff
9543 10:02:30.666566 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_8: 0xffffffff
9544 10:02:30.669728 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_9: 0xffffffff
9545 10:02:30.676747 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_10: 0xffffffff
9546 10:02:30.680070 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_11: 0xffffffff
9547 10:02:30.683704 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_12: 0xffffffff
9548 10:02:30.690215 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_13: 0xffffffff
9549 10:02:30.693362 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_14: 0xffffffff
9550 10:02:30.700031 INFO: [DEVAPC] (INFRA_AO_SYS1)D3_APC_15: 0xffffffff
9551 10:02:30.703594 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_0: 0x0
9552 10:02:30.706573 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_1: 0x0
9553 10:02:30.713241 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_2: 0x0
9554 10:02:30.716770 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_3: 0x0
9555 10:02:30.719902 INFO: [DEVAPC] (INFRA_AO_SYS2)D0_APC_4: 0x0
9556 10:02:30.723441 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_0: 0xffffffff
9557 10:02:30.730021 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_1: 0xffffffff
9558 10:02:30.733171 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_2: 0xffffffff
9559 10:02:30.740383 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_3: 0xffffffff
9560 10:02:30.743476 INFO: [DEVAPC] (INFRA_AO_SYS2)D1_APC_4: 0xfff
9561 10:02:30.746537 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_0: 0xffffffff
9562 10:02:30.753487 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_1: 0xffffffff
9563 10:02:30.756462 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_2: 0xffffffff
9564 10:02:30.763269 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_3: 0xffffffff
9565 10:02:30.767145 INFO: [DEVAPC] (INFRA_AO_SYS2)D2_APC_4: 0xfff
9566 10:02:30.770365 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_0: 0xffffffff
9567 10:02:30.776959 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_1: 0xffffffff
9568 10:02:30.779785 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_2: 0xffffffff
9569 10:02:30.787073 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_3: 0xffffffff
9570 10:02:30.790018 INFO: [DEVAPC] (INFRA_AO_SYS2)D3_APC_4: 0xfff
9571 10:02:30.793718 INFO: [DEVAPC] (INFRA_AO)MAS_SEC_0: 0x18
9572 10:02:30.796735 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_0: 0x10000000
9573 10:02:30.803314 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_1: 0x1000004
9574 10:02:30.807274 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_2: 0x0
9575 10:02:30.809934 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_3: 0x0
9576 10:02:30.813578 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_4: 0x0
9577 10:02:30.820259 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_5: 0x0
9578 10:02:30.823215 INFO: [DEVAPC] (PERI_AO_SYS0)D0_APC_6: 0x10000
9579 10:02:30.826786 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_0: 0xffffffff
9580 10:02:30.833451 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_1: 0xffffffff
9581 10:02:30.836480 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_2: 0xffffffff
9582 10:02:30.843678 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_3: 0x3fffffff
9583 10:02:30.846715 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_4: 0xffffffff
9584 10:02:30.850542 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_5: 0xffffffff
9585 10:02:30.856926 INFO: [DEVAPC] (PERI_AO_SYS0)D1_APC_6: 0x3ffff
9586 10:02:30.859879 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_0: 0xfffc03fc
9587 10:02:30.863170 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_1: 0xfff3ffff
9588 10:02:30.870115 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_2: 0xfffcfccf
9589 10:02:30.873275 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_3: 0xff3fffff
9590 10:02:30.880400 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_4: 0xffff3ffc
9591 10:02:30.883886 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_5: 0xffffffff
9592 10:02:30.886715 INFO: [DEVAPC] (PERI_AO_SYS0)D2_APC_6: 0x3ffff
9593 10:02:30.893374 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_0: 0xff3f33ff
9594 10:02:30.896842 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_1: 0xffffffff
9595 10:02:30.903633 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_2: 0xffffffff
9596 10:02:30.906564 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_3: 0xffffffff
9597 10:02:30.910486 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_4: 0xffffffff
9598 10:02:30.917006 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_5: 0xffffffff
9599 10:02:30.920500 INFO: [DEVAPC] (PERI_AO_SYS0)D3_APC_6: 0x3ffff
9600 10:02:30.923904 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_0: 0xffffffff
9601 10:02:30.930276 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_1: 0xffffffff
9602 10:02:30.933794 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_2: 0xffffffff
9603 10:02:30.940780 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_3: 0xffffffff
9604 10:02:30.943550 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_4: 0xffffffff
9605 10:02:30.946989 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_5: 0xffffffff
9606 10:02:30.953899 INFO: [DEVAPC] (PERI_AO_SYS0)D4_APC_6: 0x3ffff
9607 10:02:30.957216 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_0: 0xffffffff
9608 10:02:30.960496 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_1: 0xffffffff
9609 10:02:30.967149 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_2: 0xffffffff
9610 10:02:30.970679 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_3: 0xffffffff
9611 10:02:30.977056 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_4: 0xffffffff
9612 10:02:30.980506 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_5: 0xffffffff
9613 10:02:30.983809 INFO: [DEVAPC] (PERI_AO_SYS0)D5_APC_6: 0x3ffff
9614 10:02:30.990276 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_0: 0xffffffff
9615 10:02:30.993812 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_1: 0xffffffff
9616 10:02:31.000235 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_2: 0xffffffff
9617 10:02:31.003922 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_3: 0xffffffff
9618 10:02:31.006732 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_4: 0xffffffff
9619 10:02:31.013571 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_5: 0xffffffff
9620 10:02:31.016944 INFO: [DEVAPC] (PERI_AO_SYS0)D6_APC_6: 0x3ffff
9621 10:02:31.023518 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_0: 0xffffffff
9622 10:02:31.027162 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_1: 0xffffffff
9623 10:02:31.030393 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_2: 0xffffffff
9624 10:02:31.036848 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_3: 0xffffffff
9625 10:02:31.040303 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_4: 0xffffffff
9626 10:02:31.046845 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_5: 0xffffffff
9627 10:02:31.050082 INFO: [DEVAPC] (PERI_AO_SYS0)D7_APC_6: 0x3ffff
9628 10:02:31.053510 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_0: 0xfffff3ff
9629 10:02:31.059861 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_1: 0xffffffff
9630 10:02:31.063453 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_2: 0xffffffff
9631 10:02:31.066931 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_3: 0xffffffff
9632 10:02:31.073897 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_4: 0xffffffff
9633 10:02:31.076513 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_5: 0xffffffff
9634 10:02:31.083448 INFO: [DEVAPC] (PERI_AO_SYS0)D8_APC_6: 0x3ffff
9635 10:02:31.086506 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_0: 0xffffffff
9636 10:02:31.090054 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_1: 0xffffffff
9637 10:02:31.096564 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_2: 0xffffffff
9638 10:02:31.100211 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_3: 0xffffffff
9639 10:02:31.106465 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_4: 0xffffffff
9640 10:02:31.110089 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_5: 0xffffffff
9641 10:02:31.113210 INFO: [DEVAPC] (PERI_AO_SYS0)D9_APC_6: 0x3ffff
9642 10:02:31.119763 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_0: 0xffffffff
9643 10:02:31.123446 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_1: 0xffffffff
9644 10:02:31.129756 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_2: 0xffffffff
9645 10:02:31.132851 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_3: 0xffffffff
9646 10:02:31.136450 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_4: 0xffffffff
9647 10:02:31.143032 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_5: 0xffffffff
9648 10:02:31.146489 INFO: [DEVAPC] (PERI_AO_SYS0)D10_APC_6: 0x3ffff
9649 10:02:31.152643 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_0: 0xffffffff
9650 10:02:31.156380 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_1: 0xffffffff
9651 10:02:31.163130 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_2: 0xffffffff
9652 10:02:31.166076 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_3: 0xffffffff
9653 10:02:31.169657 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_4: 0xffffffff
9654 10:02:31.176180 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_5: 0xffffffff
9655 10:02:31.179655 INFO: [DEVAPC] (PERI_AO_SYS0)D11_APC_6: 0x3ffff
9656 10:02:31.186369 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_0: 0xffffffff
9657 10:02:31.189854 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_1: 0xffffffff
9658 10:02:31.193266 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_2: 0xffffffff
9659 10:02:31.199526 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_3: 0xffffffff
9660 10:02:31.202959 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_4: 0xffffffff
9661 10:02:31.209558 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_5: 0xffffffff
9662 10:02:31.212651 INFO: [DEVAPC] (PERI_AO_SYS0)D12_APC_6: 0x3ffff
9663 10:02:31.219374 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_0: 0xffffffff
9664 10:02:31.222887 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_1: 0xffffffff
9665 10:02:31.225836 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_2: 0xffffffff
9666 10:02:31.232485 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_3: 0xffffffff
9667 10:02:31.235670 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_4: 0xffffffff
9668 10:02:31.242836 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_5: 0xffffffff
9669 10:02:31.245816 INFO: [DEVAPC] (PERI_AO_SYS0)D13_APC_6: 0x3ffff
9670 10:02:31.249326 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_0: 0xffffffff
9671 10:02:31.255602 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_1: 0xffffffff
9672 10:02:31.259302 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_2: 0xffffffff
9673 10:02:31.265727 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_3: 0xffffffff
9674 10:02:31.269434 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_4: 0xffffffff
9675 10:02:31.275732 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_5: 0xffffffff
9676 10:02:31.281741 INFO: [DEVAPC] (PERI_AO_SYS0)D14_APC_6: 0x3ffff
9677 10:02:31.282722 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_0: 0xffffffff
9678 10:02:31.288712 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_1: 0xffffffff
9679 10:02:31.292257 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_2: 0xffffffff
9680 10:02:31.299230 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_3: 0xffffffff
9681 10:02:31.302081 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_4: 0xffffffff
9682 10:02:31.308489 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_5: 0xffffffff
9683 10:02:31.312126 INFO: [DEVAPC] (PERI_AO_SYS0)D15_APC_6: 0x3ffff
9684 10:02:31.315498 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_0: 0x0
9685 10:02:31.318546 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_1: 0x0
9686 10:02:31.325393 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_2: 0x0
9687 10:02:31.329023 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_3: 0x0
9688 10:02:31.332126 INFO: [DEVAPC] (PERI_AO_SYS1)D0_APC_4: 0x0
9689 10:02:31.335209 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_0: 0xffffffff
9690 10:02:31.342257 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_1: 0xffffffff
9691 10:02:31.345245 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_2: 0xffffffff
9692 10:02:31.351782 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_3: 0xffffffff
9693 10:02:31.355534 INFO: [DEVAPC] (PERI_AO_SYS1)D1_APC_4: 0xf
9694 10:02:31.358576 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_0: 0xffffffff
9695 10:02:31.365242 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_1: 0xffffffff
9696 10:02:31.368489 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_2: 0xffffffff
9697 10:02:31.372284 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_3: 0xffffffff
9698 10:02:31.378672 INFO: [DEVAPC] (PERI_AO_SYS1)D2_APC_4: 0xf
9699 10:02:31.382092 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_0: 0xffffffff
9700 10:02:31.385325 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_1: 0xffffffff
9701 10:02:31.392340 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_2: 0xffffffff
9702 10:02:31.394937 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_3: 0xffffffff
9703 10:02:31.398238 INFO: [DEVAPC] (PERI_AO_SYS1)D3_APC_4: 0xf
9704 10:02:31.405504 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_0: 0xffffffff
9705 10:02:31.408421 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_1: 0xffffffff
9706 10:02:31.415343 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_2: 0xffffffff
9707 10:02:31.418126 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_3: 0xffffffff
9708 10:02:31.421808 INFO: [DEVAPC] (PERI_AO_SYS1)D4_APC_4: 0xf
9709 10:02:31.428554 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_0: 0xffffffff
9710 10:02:31.431873 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_1: 0xffffffff
9711 10:02:31.434872 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_2: 0xffffffff
9712 10:02:31.441741 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_3: 0xffffffff
9713 10:02:31.444921 INFO: [DEVAPC] (PERI_AO_SYS1)D5_APC_4: 0xf
9714 10:02:31.448081 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_0: 0xffffffff
9715 10:02:31.454692 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_1: 0xffffffff
9716 10:02:31.458518 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_2: 0xffffffff
9717 10:02:31.464598 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_3: 0xffffffff
9718 10:02:31.468306 INFO: [DEVAPC] (PERI_AO_SYS1)D6_APC_4: 0xf
9719 10:02:31.471634 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_0: 0xffffffff
9720 10:02:31.478027 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_1: 0xffffffff
9721 10:02:31.481233 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_2: 0xffffffff
9722 10:02:31.488161 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_3: 0xffffffff
9723 10:02:31.491099 INFO: [DEVAPC] (PERI_AO_SYS1)D7_APC_4: 0xf
9724 10:02:31.494693 INFO: [DEVAPC] (PERI_AO_SYS2)D0_APC_0: 0x0
9725 10:02:31.498045 INFO: [DEVAPC] (PERI_AO_SYS2)D1_APC_0: 0x3
9726 10:02:31.501325 INFO: [DEVAPC] (PERI_AO_SYS2)D2_APC_0: 0x3
9727 10:02:31.508017 INFO: [DEVAPC] (PERI_AO_SYS2)D3_APC_0: 0x3
9728 10:02:31.511090 INFO: [DEVAPC] (PERI_AO)MAS_SEC_0: 0x0
9729 10:02:31.514395 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_0: 0x400400
9730 10:02:31.517709 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_1: 0x0
9731 10:02:31.524697 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_2: 0x0
9732 10:02:31.527696 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_3: 0x0
9733 10:02:31.531095 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_4: 0x0
9734 10:02:31.534266 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_5: 0x0
9735 10:02:31.540898 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_6: 0x140000
9736 10:02:31.544417 INFO: [DEVAPC] (PERI_AO2_SYS0)D0_APC_7: 0x0
9737 10:02:31.547903 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_0: 0xffffffff
9738 10:02:31.554554 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_1: 0xffffffff
9739 10:02:31.557513 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_2: 0xffffffff
9740 10:02:31.564033 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_3: 0xffffffff
9741 10:02:31.567468 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_4: 0xffffffff
9742 10:02:31.574523 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_5: 0xffffffff
9743 10:02:31.577579 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_6: 0xffffffff
9744 10:02:31.580881 INFO: [DEVAPC] (PERI_AO2_SYS0)D1_APC_7: 0x3f
9745 10:02:31.587734 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_0: 0xfffffff3
9746 10:02:31.590537 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_1: 0xffffefff
9747 10:02:31.597330 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_2: 0xffffffff
9748 10:02:31.601341 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_3: 0xffffffff
9749 10:02:31.603931 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_4: 0xffffffff
9750 10:02:31.610896 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_5: 0xcfffffff
9751 10:02:31.613975 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_6: 0xf3fcffff
9752 10:02:31.620828 INFO: [DEVAPC] (PERI_AO2_SYS0)D2_APC_7: 0x3f
9753 10:02:31.623919 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_0: 0xffffffff
9754 10:02:31.627350 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_1: 0xffffffff
9755 10:02:31.634119 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_2: 0xffffffff
9756 10:02:31.637310 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_3: 0xffffffff
9757 10:02:31.643759 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_4: 0xffffffff
9758 10:02:31.647119 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_5: 0xffffffff
9759 10:02:31.654051 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_6: 0xffffffff
9760 10:02:31.657271 INFO: [DEVAPC] (PERI_AO2_SYS0)D3_APC_7: 0x3f
9761 10:02:31.660475 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_0: 0xffffffff
9762 10:02:31.667093 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_1: 0xffffffff
9763 10:02:31.670678 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_2: 0xffffffff
9764 10:02:31.677326 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_3: 0xffffffff
9765 10:02:31.680267 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_4: 0xffffffff
9766 10:02:31.683805 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_5: 0xffffffff
9767 10:02:31.690639 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_6: 0xffffffff
9768 10:02:31.694000 INFO: [DEVAPC] (PERI_AO2_SYS0)D4_APC_7: 0x3f
9769 10:02:31.697018 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_0: 0xffffffff
9770 10:02:31.703673 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_1: 0xffffffff
9771 10:02:31.707468 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_2: 0xffffffff
9772 10:02:31.713783 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_3: 0xffffffff
9773 10:02:31.717299 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_4: 0xffffffff
9774 10:02:31.724031 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_5: 0xffffffff
9775 10:02:31.726853 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_6: 0xffffffff
9776 10:02:31.730097 INFO: [DEVAPC] (PERI_AO2_SYS0)D5_APC_7: 0x3f
9777 10:02:31.736690 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_0: 0xffffffff
9778 10:02:31.740138 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_1: 0xffffffff
9779 10:02:31.747101 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_2: 0xffffffff
9780 10:02:31.750131 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_3: 0xffffffff
9781 10:02:31.753456 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_4: 0xffffffff
9782 10:02:31.760229 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_5: 0xffffffff
9783 10:02:31.763257 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_6: 0xffffffff
9784 10:02:31.770034 INFO: [DEVAPC] (PERI_AO2_SYS0)D6_APC_7: 0x3f
9785 10:02:31.773316 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_0: 0xffffffff
9786 10:02:31.780019 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_1: 0xffffffff
9787 10:02:31.783014 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_2: 0xffffffff
9788 10:02:31.786865 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_3: 0xffffffff
9789 10:02:31.792980 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_4: 0xffffffff
9790 10:02:31.796692 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_5: 0xffffffff
9791 10:02:31.803418 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_6: 0xffffffff
9792 10:02:31.806525 INFO: [DEVAPC] (PERI_AO2_SYS0)D7_APC_7: 0x3f
9793 10:02:31.809754 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_0: 0xffffffff
9794 10:02:31.816427 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_1: 0xffffffff
9795 10:02:31.819333 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_2: 0xffffffff
9796 10:02:31.826128 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_3: 0xffffffff
9797 10:02:31.829514 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_4: 0xffffffff
9798 10:02:31.833031 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_5: 0xffffffff
9799 10:02:31.839640 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_6: 0xffffffff
9800 10:02:31.843106 INFO: [DEVAPC] (PERI_AO2_SYS0)D8_APC_7: 0x3f
9801 10:02:31.849403 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_0: 0xffffffff
9802 10:02:31.852934 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_1: 0xffffffff
9803 10:02:31.859722 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_2: 0xffffffff
9804 10:02:31.862853 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_3: 0xffffffff
9805 10:02:31.866209 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_4: 0xffffffff
9806 10:02:31.872937 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_5: 0xffffffff
9807 10:02:31.876072 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_6: 0xffffffff
9808 10:02:31.879135 INFO: [DEVAPC] (PERI_AO2_SYS0)D9_APC_7: 0x3f
9809 10:02:31.885693 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_0: 0xffffffff
9810 10:02:31.889369 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_1: 0xffffffff
9811 10:02:31.896132 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_2: 0xffffffff
9812 10:02:31.899303 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_3: 0xffffffff
9813 10:02:31.906316 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_4: 0xffffffff
9814 10:02:31.909413 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_5: 0xffffffff
9815 10:02:31.915945 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_6: 0xffffffff
9816 10:02:31.919090 INFO: [DEVAPC] (PERI_AO2_SYS0)D10_APC_7: 0x3f
9817 10:02:31.922854 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_0: 0xffffffff
9818 10:02:31.928780 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_1: 0xffffffff
9819 10:02:31.932310 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_2: 0xffffffff
9820 10:02:31.938760 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_3: 0xffffffff
9821 10:02:31.942478 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_4: 0xffffffff
9822 10:02:31.948943 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_5: 0xffffffff
9823 10:02:31.952294 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_6: 0xffffffff
9824 10:02:31.955758 INFO: [DEVAPC] (PERI_AO2_SYS0)D11_APC_7: 0x3f
9825 10:02:31.962201 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_0: 0xffffffff
9826 10:02:31.965675 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_1: 0xffffffff
9827 10:02:31.972070 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_2: 0xffffffff
9828 10:02:31.975556 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_3: 0xffffffff
9829 10:02:31.982197 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_4: 0xffffffff
9830 10:02:31.985593 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_5: 0xffffffff
9831 10:02:31.992160 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_6: 0xffffffff
9832 10:02:31.995872 INFO: [DEVAPC] (PERI_AO2_SYS0)D12_APC_7: 0x3f
9833 10:02:31.998908 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_0: 0xffffffff
9834 10:02:32.005700 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_1: 0xffffffff
9835 10:02:32.008716 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_2: 0xffffffff
9836 10:02:32.016295 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_3: 0xffffffff
9837 10:02:32.018887 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_4: 0xffffffff
9838 10:02:32.025500 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_5: 0xffffffff
9839 10:02:32.028864 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_6: 0xffffffff
9840 10:02:32.032210 INFO: [DEVAPC] (PERI_AO2_SYS0)D13_APC_7: 0x3f
9841 10:02:32.038808 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_0: 0xffffffff
9842 10:02:32.042108 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_1: 0xffffffff
9843 10:02:32.048816 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_2: 0xffffffff
9844 10:02:32.052435 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_3: 0xffffffff
9845 10:02:32.059133 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_4: 0xffffffff
9846 10:02:32.062530 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_5: 0xffffffff
9847 10:02:32.065388 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_6: 0xffffffff
9848 10:02:32.071983 INFO: [DEVAPC] (PERI_AO2_SYS0)D14_APC_7: 0x3f
9849 10:02:32.075468 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_0: 0xffffffff
9850 10:02:32.082602 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_1: 0xffffffff
9851 10:02:32.085858 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_2: 0xffffffff
9852 10:02:32.092270 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_3: 0xffffffff
9853 10:02:32.095743 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_4: 0xffffffff
9854 10:02:32.098935 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_5: 0xffffffff
9855 10:02:32.105540 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_6: 0xffffffff
9856 10:02:32.109097 INFO: [DEVAPC] (PERI_AO2_SYS0)D15_APC_7: 0x3f
9857 10:02:32.115660 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D0_APC_0: 0x0
9858 10:02:32.118691 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D0_APC_1: 0x10000
9859 10:02:32.121957 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D1_APC_0: 0xffffffff
9860 10:02:32.128901 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D1_APC_1: 0x3fffff
9861 10:02:32.131754 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D2_APC_0: 0xffffcff3
9862 10:02:32.138367 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D2_APC_1: 0x3fcfff
9863 10:02:32.141938 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D3_APC_0: 0xffffffff
9864 10:02:32.148271 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D3_APC_1: 0x3fffff
9865 10:02:32.151955 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D4_APC_0: 0xffffffff
9866 10:02:32.158504 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D4_APC_1: 0x3fffff
9867 10:02:32.161497 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D5_APC_0: 0xffffffff
9868 10:02:32.168506 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D5_APC_1: 0x3fffff
9869 10:02:32.171994 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D6_APC_0: 0xffffffff
9870 10:02:32.178501 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D6_APC_1: 0x3fffff
9871 10:02:32.181668 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D7_APC_0: 0xffffffff
9872 10:02:32.188467 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D7_APC_1: 0x3fffff
9873 10:02:32.191511 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D8_APC_0: 0xffffffff
9874 10:02:32.198311 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D8_APC_1: 0x3fffff
9875 10:02:32.201658 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D9_APC_0: 0xffffffff
9876 10:02:32.208253 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D9_APC_1: 0x3fffff
9877 10:02:32.211770 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D10_APC_0: 0xffffffff
9878 10:02:32.218540 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D10_APC_1: 0x3fffff
9879 10:02:32.221293 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D11_APC_0: 0xffffffff
9880 10:02:32.228353 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D11_APC_1: 0x3fffff
9881 10:02:32.231277 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D12_APC_0: 0xffffffff
9882 10:02:32.237763 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D12_APC_1: 0x3fffff
9883 10:02:32.241460 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D13_APC_0: 0xffffffff
9884 10:02:32.247969 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D13_APC_1: 0x3fffff
9885 10:02:32.251522 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D14_APC_0: 0xffffffff
9886 10:02:32.257981 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D14_APC_1: 0x3fffff
9887 10:02:32.261664 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D15_APC_0: 0xffffffff
9888 10:02:32.268139 INFO: [DEVAPC] (PERI_PAR_AO_SYS0)D15_APC_1: 0x3fffff
9889 10:02:32.271143 INFO: [DEVAPC] (PERI_PAR_AO)MAS_SEC_0: 0x0
9890 10:02:32.274515 INFO: [APUAPC] vio 0
9891 10:02:32.278099 INFO: [APUAPC] set_apusys_ao_apc - SUCCESS!
9892 10:02:32.284733 INFO: [APUAPC] set_apusys_noc_dapc - SUCCESS!
9893 10:02:32.287471 INFO: [APUAPC] D0_APC_0: 0x400510
9894 10:02:32.287555 INFO: [APUAPC] D0_APC_1: 0x0
9895 10:02:32.290839 INFO: [APUAPC] D0_APC_2: 0x1540
9896 10:02:32.294803 INFO: [APUAPC] D0_APC_3: 0x0
9897 10:02:32.298012 INFO: [APUAPC] D1_APC_0: 0xffffffff
9898 10:02:32.301111 INFO: [APUAPC] D1_APC_1: 0xffffffff
9899 10:02:32.304545 INFO: [APUAPC] D1_APC_2: 0x3fffff
9900 10:02:32.307926 INFO: [APUAPC] D1_APC_3: 0x0
9901 10:02:32.311011 INFO: [APUAPC] D2_APC_0: 0xffffffff
9902 10:02:32.314121 INFO: [APUAPC] D2_APC_1: 0xffffffff
9903 10:02:32.317663 INFO: [APUAPC] D2_APC_2: 0x3fffff
9904 10:02:32.320797 INFO: [APUAPC] D2_APC_3: 0x0
9905 10:02:32.324176 INFO: [APUAPC] D3_APC_0: 0xffffffff
9906 10:02:32.327408 INFO: [APUAPC] D3_APC_1: 0xffffffff
9907 10:02:32.331104 INFO: [APUAPC] D3_APC_2: 0x3fffff
9908 10:02:32.333902 INFO: [APUAPC] D3_APC_3: 0x0
9909 10:02:32.337512 INFO: [APUAPC] D4_APC_0: 0xffffffff
9910 10:02:32.340720 INFO: [APUAPC] D4_APC_1: 0xffffffff
9911 10:02:32.344253 INFO: [APUAPC] D4_APC_2: 0x3fffff
9912 10:02:32.347363 INFO: [APUAPC] D4_APC_3: 0x0
9913 10:02:32.350556 INFO: [APUAPC] D5_APC_0: 0xffffffff
9914 10:02:32.354046 INFO: [APUAPC] D5_APC_1: 0xffffffff
9915 10:02:32.357572 INFO: [APUAPC] D5_APC_2: 0x3fffff
9916 10:02:32.361245 INFO: [APUAPC] D5_APC_3: 0x0
9917 10:02:32.364068 INFO: [APUAPC] D6_APC_0: 0xffffffff
9918 10:02:32.367731 INFO: [APUAPC] D6_APC_1: 0xffffffff
9919 10:02:32.370493 INFO: [APUAPC] D6_APC_2: 0x3fffff
9920 10:02:32.374132 INFO: [APUAPC] D6_APC_3: 0x0
9921 10:02:32.377303 INFO: [APUAPC] D7_APC_0: 0xffffffff
9922 10:02:32.380985 INFO: [APUAPC] D7_APC_1: 0xffffffff
9923 10:02:32.383947 INFO: [APUAPC] D7_APC_2: 0x3fffff
9924 10:02:32.387571 INFO: [APUAPC] D7_APC_3: 0x0
9925 10:02:32.390739 INFO: [APUAPC] D8_APC_0: 0xffffffff
9926 10:02:32.394315 INFO: [APUAPC] D8_APC_1: 0xffffffff
9927 10:02:32.397761 INFO: [APUAPC] D8_APC_2: 0x3fffff
9928 10:02:32.397844 INFO: [APUAPC] D8_APC_3: 0x0
9929 10:02:32.403788 INFO: [APUAPC] D9_APC_0: 0xffffffff
9930 10:02:32.407681 INFO: [APUAPC] D9_APC_1: 0xffffffff
9931 10:02:32.410536 INFO: [APUAPC] D9_APC_2: 0x3fffff
9932 10:02:32.410619 INFO: [APUAPC] D9_APC_3: 0x0
9933 10:02:32.413917 INFO: [APUAPC] D10_APC_0: 0xffffffff
9934 10:02:32.420982 INFO: [APUAPC] D10_APC_1: 0xffffffff
9935 10:02:32.423943 INFO: [APUAPC] D10_APC_2: 0x3fffff
9936 10:02:32.424026 INFO: [APUAPC] D10_APC_3: 0x0
9937 10:02:32.427806 INFO: [APUAPC] D11_APC_0: 0xffffffff
9938 10:02:32.434269 INFO: [APUAPC] D11_APC_1: 0xffffffff
9939 10:02:32.437518 INFO: [APUAPC] D11_APC_2: 0x3fffff
9940 10:02:32.437627 INFO: [APUAPC] D11_APC_3: 0x0
9941 10:02:32.440499 INFO: [APUAPC] D12_APC_0: 0xffffffff
9942 10:02:32.447495 INFO: [APUAPC] D12_APC_1: 0xffffffff
9943 10:02:32.450579 INFO: [APUAPC] D12_APC_2: 0x3fffff
9944 10:02:32.450661 INFO: [APUAPC] D12_APC_3: 0x0
9945 10:02:32.453761 INFO: [APUAPC] D13_APC_0: 0xffffffff
9946 10:02:32.460764 INFO: [APUAPC] D13_APC_1: 0xffffffff
9947 10:02:32.464244 INFO: [APUAPC] D13_APC_2: 0x3fffff
9948 10:02:32.464344 INFO: [APUAPC] D13_APC_3: 0x0
9949 10:02:32.470382 INFO: [APUAPC] D14_APC_0: 0xffffffff
9950 10:02:32.474124 INFO: [APUAPC] D14_APC_1: 0xffffffff
9951 10:02:32.477525 INFO: [APUAPC] D14_APC_2: 0x3fffff
9952 10:02:32.477609 INFO: [APUAPC] D14_APC_3: 0x0
9953 10:02:32.484228 INFO: [APUAPC] D15_APC_0: 0xffffffff
9954 10:02:32.487215 INFO: [APUAPC] D15_APC_1: 0xffffffff
9955 10:02:32.490744 INFO: [APUAPC] D15_APC_2: 0x3fffff
9956 10:02:32.490827 INFO: [APUAPC] D15_APC_3: 0x0
9957 10:02:32.493768 INFO: [APUAPC] APC_CON: 0x4
9958 10:02:32.497473 INFO: [NOCDAPC] D0_APC_0: 0x0
9959 10:02:32.500440 INFO: [NOCDAPC] D0_APC_1: 0x0
9960 10:02:32.504027 INFO: [NOCDAPC] D1_APC_0: 0x0
9961 10:02:32.507140 INFO: [NOCDAPC] D1_APC_1: 0xfff
9962 10:02:32.510838 INFO: [NOCDAPC] D2_APC_0: 0x0
9963 10:02:32.513695 INFO: [NOCDAPC] D2_APC_1: 0xfff
9964 10:02:32.517260 INFO: [NOCDAPC] D3_APC_0: 0x0
9965 10:02:32.520265 INFO: [NOCDAPC] D3_APC_1: 0xfff
9966 10:02:32.520348 INFO: [NOCDAPC] D4_APC_0: 0x0
9967 10:02:32.524061 INFO: [NOCDAPC] D4_APC_1: 0xfff
9968 10:02:32.527003 INFO: [NOCDAPC] D5_APC_0: 0x0
9969 10:02:32.531022 INFO: [NOCDAPC] D5_APC_1: 0xfff
9970 10:02:32.534078 INFO: [NOCDAPC] D6_APC_0: 0x0
9971 10:02:32.537334 INFO: [NOCDAPC] D6_APC_1: 0xfff
9972 10:02:32.540729 INFO: [NOCDAPC] D7_APC_0: 0x0
9973 10:02:32.543993 INFO: [NOCDAPC] D7_APC_1: 0xfff
9974 10:02:32.547690 INFO: [NOCDAPC] D8_APC_0: 0x0
9975 10:02:32.547774 INFO: [NOCDAPC] D8_APC_1: 0xfff
9976 10:02:32.550724 INFO: [NOCDAPC] D9_APC_0: 0x0
9977 10:02:32.554437 INFO: [NOCDAPC] D9_APC_1: 0xfff
9978 10:02:32.557604 INFO: [NOCDAPC] D10_APC_0: 0x0
9979 10:02:32.560651 INFO: [NOCDAPC] D10_APC_1: 0xfff
9980 10:02:32.564244 INFO: [NOCDAPC] D11_APC_0: 0x0
9981 10:02:32.568063 INFO: [NOCDAPC] D11_APC_1: 0xfff
9982 10:02:32.570702 INFO: [NOCDAPC] D12_APC_0: 0x0
9983 10:02:32.574018 INFO: [NOCDAPC] D12_APC_1: 0xfff
9984 10:02:32.577563 INFO: [NOCDAPC] D13_APC_0: 0x0
9985 10:02:32.580967 INFO: [NOCDAPC] D13_APC_1: 0xfff
9986 10:02:32.583917 INFO: [NOCDAPC] D14_APC_0: 0x0
9987 10:02:32.587069 INFO: [NOCDAPC] D14_APC_1: 0xfff
9988 10:02:32.590879 INFO: [NOCDAPC] D15_APC_0: 0x0
9989 10:02:32.593915 INFO: [NOCDAPC] D15_APC_1: 0xfff
9990 10:02:32.593998 INFO: [NOCDAPC] APC_CON: 0x4
9991 10:02:32.597609 INFO: [APUAPC] set_apusys_apc done
9992 10:02:32.601151 INFO: [DEVAPC] devapc_init done
9993 10:02:32.607318 INFO: GICv3 without legacy support detected.
9994 10:02:32.610375 INFO: ARM GICv3 driver initialized in EL3
9995 10:02:32.613607 INFO: Maximum SPI INTID supported: 639
9996 10:02:32.617217 INFO: BL31: Initializing runtime services
9997 10:02:32.624198 WARNING: BL31: cortex_a55: CPU workaround for 1530923 was missing!
9998 10:02:32.627137 INFO: SPM: enable CPC mode
9999 10:02:32.630625 INFO: mcdi ready for mcusys-off-idle and system suspend
10000 10:02:32.637048 INFO: BL31: Preparing for EL3 exit to normal world
10001 10:02:32.640395 INFO: Entry point address = 0x80000000
10002 10:02:32.640479 INFO: SPSR = 0x8
10003 10:02:32.647320
10004 10:02:32.647403
10005 10:02:32.647467
10006 10:02:32.650678 Starting depthcharge on Spherion...
10007 10:02:32.650761
10008 10:02:32.650826 Wipe memory regions:
10009 10:02:32.650885
10010 10:02:32.651510 end: 2.2.3 depthcharge-start (duration 00:00:29) [common]
10011 10:02:32.651614 start: 2.2.4 bootloader-commands (timeout 00:04:25) [common]
10012 10:02:32.651700 Setting prompt string to ['asurada:']
10013 10:02:32.651779 bootloader-commands: Wait for prompt ['asurada:'] (timeout 00:04:25)
10014 10:02:32.654021 [0x00000040000000, 0x00000054600000)
10015 10:02:32.776315
10016 10:02:32.776452 [0x00000054660000, 0x00000080000000)
10017 10:02:33.036845
10018 10:02:33.037013 [0x000000821a7280, 0x000000ffe64000)
10019 10:02:33.781897
10020 10:02:33.782098 [0x00000100000000, 0x00000240000000)
10021 10:02:35.672310
10022 10:02:35.675473 Initializing XHCI USB controller at 0x11200000.
10023 10:02:36.713072
10024 10:02:36.716358 [firmware-asurada-13885.B-collabora] Dec 7 2021 09:38:38
10025 10:02:36.716447
10026 10:02:36.716515
10027 10:02:36.716575
10028 10:02:36.716855 Setting prompt string to ['asurada:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10030 10:02:36.817153 asurada: tftpboot 192.168.201.1 10670673/tftp-deploy-cw7483qk/kernel/image.itb 10670673/tftp-deploy-cw7483qk/kernel/cmdline
10031 10:02:36.817292 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10032 10:02:36.817385 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:21)
10033 10:02:36.821422 tftpboot 192.168.201.1 10670673/tftp-deploy-cw7483qk/kernel/image.ittp-deploy-cw7483qk/kernel/cmdline
10034 10:02:36.821508
10035 10:02:36.821574 Waiting for link
10036 10:02:36.981923
10037 10:02:36.982082 R8152: Initializing
10038 10:02:36.982182
10039 10:02:36.985210 Version 9 (ocp_data = 6010)
10040 10:02:36.985287
10041 10:02:36.988371 R8152: Done initializing
10042 10:02:36.988473
10043 10:02:36.988563 Adding net device
10044 10:02:38.861323
10045 10:02:38.861473 done.
10046 10:02:38.861543
10047 10:02:38.861608 MAC: 00:e0:4c:78:7a:aa
10048 10:02:38.861668
10049 10:02:38.864979 Sending DHCP discover... done.
10050 10:02:38.865069
10051 10:02:38.867937 Waiting for reply... done.
10052 10:02:38.868069
10053 10:02:38.871356 Sending DHCP request... done.
10054 10:02:38.871498
10055 10:02:38.874955 Waiting for reply... done.
10056 10:02:38.875053
10057 10:02:38.875119 My ip is 192.168.201.12
10058 10:02:38.875196
10059 10:02:38.878354 The DHCP server ip is 192.168.201.1
10060 10:02:38.878467
10061 10:02:38.884808 TFTP server IP predefined by user: 192.168.201.1
10062 10:02:38.884939
10063 10:02:38.891331 Bootfile predefined by user: 10670673/tftp-deploy-cw7483qk/kernel/image.itb
10064 10:02:38.891416
10065 10:02:38.891481 Sending tftp read request... done.
10066 10:02:38.895112
10067 10:02:38.898338 Waiting for the transfer...
10068 10:02:38.898435
10069 10:02:39.150416 00000000 ################################################################
10070 10:02:39.150573
10071 10:02:39.400670 00080000 ################################################################
10072 10:02:39.400841
10073 10:02:39.650551 00100000 ################################################################
10074 10:02:39.650697
10075 10:02:39.902702 00180000 ################################################################
10076 10:02:39.902844
10077 10:02:40.156046 00200000 ################################################################
10078 10:02:40.156191
10079 10:02:40.410869 00280000 ################################################################
10080 10:02:40.411018
10081 10:02:40.696965 00300000 ################################################################
10082 10:02:40.697107
10083 10:02:40.947411 00380000 ################################################################
10084 10:02:40.947558
10085 10:02:41.195996 00400000 ################################################################
10086 10:02:41.196168
10087 10:02:41.446029 00480000 ################################################################
10088 10:02:41.446164
10089 10:02:41.696721 00500000 ################################################################
10090 10:02:41.696930
10091 10:02:41.945564 00580000 ################################################################
10092 10:02:41.945702
10093 10:02:42.204692 00600000 ################################################################
10094 10:02:42.204869
10095 10:02:42.458895 00680000 ################################################################
10096 10:02:42.459049
10097 10:02:42.720338 00700000 ################################################################
10098 10:02:42.720502
10099 10:02:42.976453 00780000 ################################################################
10100 10:02:42.976594
10101 10:02:43.249198 00800000 ################################################################
10102 10:02:43.249336
10103 10:02:43.512001 00880000 ################################################################
10104 10:02:43.512143
10105 10:02:43.769504 00900000 ################################################################
10106 10:02:43.769687
10107 10:02:44.054269 00980000 ################################################################
10108 10:02:44.054429
10109 10:02:44.325724 00a00000 ################################################################
10110 10:02:44.325859
10111 10:02:44.615657 00a80000 ################################################################
10112 10:02:44.615790
10113 10:02:44.883726 00b00000 ################################################################
10114 10:02:44.883856
10115 10:02:45.138114 00b80000 ################################################################
10116 10:02:45.138273
10117 10:02:45.392678 00c00000 ################################################################
10118 10:02:45.392870
10119 10:02:45.679705 00c80000 ################################################################
10120 10:02:45.679874
10121 10:02:45.959756 00d00000 ################################################################
10122 10:02:45.959935
10123 10:02:46.239808 00d80000 ################################################################
10124 10:02:46.239941
10125 10:02:46.531485 00e00000 ################################################################
10126 10:02:46.531654
10127 10:02:46.825781 00e80000 ################################################################
10128 10:02:46.825930
10129 10:02:47.111909 00f00000 ################################################################
10130 10:02:47.112052
10131 10:02:47.413366 00f80000 ################################################################
10132 10:02:47.413512
10133 10:02:47.697419 01000000 ################################################################
10134 10:02:47.697575
10135 10:02:47.980920 01080000 ################################################################
10136 10:02:47.981063
10137 10:02:48.279671 01100000 ################################################################
10138 10:02:48.279815
10139 10:02:48.580149 01180000 ################################################################
10140 10:02:48.580296
10141 10:02:48.867922 01200000 ################################################################
10142 10:02:48.868072
10143 10:02:49.156673 01280000 ################################################################
10144 10:02:49.156849
10145 10:02:49.449218 01300000 ################################################################
10146 10:02:49.449369
10147 10:02:49.730474 01380000 ################################################################
10148 10:02:49.730621
10149 10:02:50.018491 01400000 ################################################################
10150 10:02:50.018635
10151 10:02:50.298911 01480000 ################################################################
10152 10:02:50.299051
10153 10:02:50.580825 01500000 ################################################################
10154 10:02:50.580968
10155 10:02:50.862142 01580000 ################################################################
10156 10:02:50.862288
10157 10:02:51.139390 01600000 ################################################################
10158 10:02:51.139539
10159 10:02:51.420539 01680000 ################################################################
10160 10:02:51.420685
10161 10:02:51.703703 01700000 ################################################################
10162 10:02:51.703843
10163 10:02:52.001948 01780000 ################################################################
10164 10:02:52.002149
10165 10:02:52.283116 01800000 ################################################################
10166 10:02:52.283259
10167 10:02:52.563870 01880000 ################################################################
10168 10:02:52.564027
10169 10:02:52.821499 01900000 ################################################################
10170 10:02:52.821653
10171 10:02:53.070373 01980000 ################################################################
10172 10:02:53.070517
10173 10:02:53.321075 01a00000 ################################################################
10174 10:02:53.321213
10175 10:02:53.600181 01a80000 ################################################################
10176 10:02:53.600352
10177 10:02:53.849791 01b00000 ################################################################
10178 10:02:53.849928
10179 10:02:54.098424 01b80000 ################################################################
10180 10:02:54.098594
10181 10:02:54.356994 01c00000 ################################################################
10182 10:02:54.357138
10183 10:02:54.606015 01c80000 ################################################################
10184 10:02:54.606155
10185 10:02:54.854747 01d00000 ################################################################
10186 10:02:54.854886
10187 10:02:55.126615 01d80000 ################################################################
10188 10:02:55.126759
10189 10:02:55.426177 01e00000 ################################################################
10190 10:02:55.426327
10191 10:02:55.726473 01e80000 ################################################################
10192 10:02:55.726647
10193 10:02:56.008690 01f00000 ################################################################
10194 10:02:56.008871
10195 10:02:56.257999 01f80000 ################################################################
10196 10:02:56.258137
10197 10:02:56.506749 02000000 ################################################################
10198 10:02:56.506903
10199 10:02:56.755936 02080000 ################################################################
10200 10:02:56.756070
10201 10:02:57.004738 02100000 ################################################################
10202 10:02:57.004917
10203 10:02:57.253721 02180000 ################################################################
10204 10:02:57.253852
10205 10:02:57.502430 02200000 ################################################################
10206 10:02:57.502564
10207 10:02:57.751130 02280000 ################################################################
10208 10:02:57.751289
10209 10:02:58.005539 02300000 ################################################################
10210 10:02:58.005671
10211 10:02:58.253801 02380000 ################################################################
10212 10:02:58.253963
10213 10:02:58.536723 02400000 ################################################################
10214 10:02:58.536894
10215 10:02:58.808418 02480000 ################################################################
10216 10:02:58.808558
10217 10:02:59.071333 02500000 ################################################################
10218 10:02:59.071463
10219 10:02:59.320940 02580000 ################################################################
10220 10:02:59.321074
10221 10:02:59.570018 02600000 ################################################################
10222 10:02:59.570155
10223 10:02:59.818444 02680000 ################################################################
10224 10:02:59.818584
10225 10:03:00.067213 02700000 ################################################################
10226 10:03:00.067353
10227 10:03:00.315902 02780000 ################################################################
10228 10:03:00.316030
10229 10:03:00.568467 02800000 ################################################################
10230 10:03:00.568624
10231 10:03:00.817180 02880000 ################################################################
10232 10:03:00.817326
10233 10:03:01.066610 02900000 ################################################################
10234 10:03:01.066751
10235 10:03:01.317547 02980000 ################################################################
10236 10:03:01.317709
10237 10:03:01.569017 02a00000 ################################################################
10238 10:03:01.569165
10239 10:03:01.825018 02a80000 ################################################################
10240 10:03:01.825160
10241 10:03:02.083412 02b00000 ################################################################
10242 10:03:02.083554
10243 10:03:02.346979 02b80000 ################################################################
10244 10:03:02.347118
10245 10:03:02.607420 02c00000 ################################################################
10246 10:03:02.607562
10247 10:03:02.873172 02c80000 ################################################################
10248 10:03:02.873308
10249 10:03:03.143925 02d00000 ################################################################
10250 10:03:03.144077
10251 10:03:03.420357 02d80000 ################################################################
10252 10:03:03.420536
10253 10:03:03.686468 02e00000 ################################################################
10254 10:03:03.686618
10255 10:03:03.940882 02e80000 ################################################################
10256 10:03:03.941050
10257 10:03:04.199584 02f00000 ################################################################
10258 10:03:04.199720
10259 10:03:04.450666 02f80000 ################################################################
10260 10:03:04.450801
10261 10:03:04.701313 03000000 ################################################################
10262 10:03:04.701451
10263 10:03:04.957879 03080000 ################################################################
10264 10:03:04.958018
10265 10:03:05.217638 03100000 ################################################################
10266 10:03:05.217852
10267 10:03:05.493086 03180000 ################################################################
10268 10:03:05.493229
10269 10:03:05.752548 03200000 ################################################################
10270 10:03:05.752679
10271 10:03:06.062842 03280000 ################################################################
10272 10:03:06.062994
10273 10:03:06.398347 03300000 ################################################################
10274 10:03:06.398485
10275 10:03:06.728678 03380000 ################################################################
10276 10:03:06.728883
10277 10:03:07.058532 03400000 ################################################################
10278 10:03:07.058674
10279 10:03:07.408545 03480000 ################################################################
10280 10:03:07.408717
10281 10:03:07.735876 03500000 ################################################################
10282 10:03:07.736060
10283 10:03:08.052057 03580000 ################################################################
10284 10:03:08.052200
10285 10:03:08.351281 03600000 ################################################################
10286 10:03:08.351461
10287 10:03:08.636451 03680000 ################################################################
10288 10:03:08.636619
10289 10:03:08.923675 03700000 ################################################################
10290 10:03:08.923840
10291 10:03:09.196739 03780000 ################################################################
10292 10:03:09.196894
10293 10:03:09.485289 03800000 ################################################################
10294 10:03:09.485451
10295 10:03:09.769690 03880000 ################################################################
10296 10:03:09.769833
10297 10:03:10.034759 03900000 ################################################################
10298 10:03:10.034924
10299 10:03:10.306553 03980000 ################################################################
10300 10:03:10.306699
10301 10:03:10.578005 03a00000 ################################################################
10302 10:03:10.578157
10303 10:03:10.851032 03a80000 ################################################################
10304 10:03:10.851189
10305 10:03:11.132989 03b00000 ################################################################
10306 10:03:11.133131
10307 10:03:11.398846 03b80000 ################################################################
10308 10:03:11.399007
10309 10:03:11.663337 03c00000 ################################################################
10310 10:03:11.663500
10311 10:03:11.924590 03c80000 ################################################################
10312 10:03:11.924731
10313 10:03:12.184206 03d00000 ################################################################
10314 10:03:12.184352
10315 10:03:12.434456 03d80000 ################################################################
10316 10:03:12.434594
10317 10:03:12.692887 03e00000 ################################################################
10318 10:03:12.693035
10319 10:03:12.956983 03e80000 ################################################################
10320 10:03:12.957129
10321 10:03:13.172445 03f00000 ####################################################### done.
10322 10:03:13.172978
10323 10:03:13.176206 The bootfile was 66508806 bytes long.
10324 10:03:13.176732
10325 10:03:13.179161 Sending tftp read request... done.
10326 10:03:13.179590
10327 10:03:13.179971 Waiting for the transfer...
10328 10:03:13.180291
10329 10:03:13.182634 00000000 # done.
10330 10:03:13.183065
10331 10:03:13.189353 Command line loaded dynamically from TFTP file: 10670673/tftp-deploy-cw7483qk/kernel/cmdline
10332 10:03:13.189783
10333 10:03:13.202759 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
10334 10:03:13.203353
10335 10:03:13.203728 Loading FIT.
10336 10:03:13.204076
10337 10:03:13.206070 Image ramdisk-1 has 56372532 bytes.
10338 10:03:13.206538
10339 10:03:13.209270 Image fdt-1 has 46924 bytes.
10340 10:03:13.209733
10341 10:03:13.212409 Image kernel-1 has 10087317 bytes.
10342 10:03:13.212905
10343 10:03:13.219328 Compat preference: google,spherion-rev2-sku1 google,spherion-rev2 google,spherion-sku1 google,spherion
10344 10:03:13.219861
10345 10:03:13.239546 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,spherion-rev3 google,spherion-rev2 (match) google,spherion-rev1 google,spherion-rev0 google,spherion mediatek,mt8192
10346 10:03:13.240143
10347 10:03:13.243084 Choosing best match conf-1 for compat google,spherion-rev2.
10348 10:03:13.247950
10349 10:03:13.252355 Connected to device vid:did:rid of 1ae0:0028:00
10350 10:03:13.260632
10351 10:03:13.264225 tpm_get_response: command 0x17b, return code 0x0
10352 10:03:13.264794
10353 10:03:13.267180 ec_init: CrosEC protocol v3 supported (256, 248)
10354 10:03:13.271455
10355 10:03:13.274583 tpm_cleanup: add release locality here.
10356 10:03:13.275194
10357 10:03:13.275726 Shutting down all USB controllers.
10358 10:03:13.277949
10359 10:03:13.278486 Removing current net device
10360 10:03:13.278868
10361 10:03:13.284247 Exiting depthcharge with code 4 at timestamp: 69900665
10362 10:03:13.284872
10363 10:03:13.287858 LZMA decompressing kernel-1 to 0x821a6718
10364 10:03:13.288326
10365 10:03:13.290709 LZMA decompressing kernel-1 to 0x40000000
10366 10:03:14.557992
10367 10:03:14.558140 jumping to kernel
10368 10:03:14.558581 end: 2.2.4 bootloader-commands (duration 00:00:42) [common]
10369 10:03:14.558680 start: 2.2.5 auto-login-action (timeout 00:03:43) [common]
10370 10:03:14.558756 Setting prompt string to ['Linux version [0-9]']
10371 10:03:14.558827 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10372 10:03:14.558894 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
10373 10:03:14.639537
10374 10:03:14.642863 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x412fd050]
10375 10:03:14.646535 start: 2.2.5.1 login-action (timeout 00:03:43) [common]
10376 10:03:14.646626 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
10377 10:03:14.646714 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
10378 10:03:14.646793 Using line separator: #'\n'#
10379 10:03:14.646853 No login prompt set.
10380 10:03:14.646916 Parsing kernel messages
10381 10:03:14.646970 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
10382 10:03:14.647073 [login-action] Waiting for messages, (timeout 00:03:43)
10383 10:03:14.665971 [ 0.000000] Linux version 6.1.31 (KernelCI@build-j19381-arm64-gcc-10-defconfig-arm64-chromebook-d6qsg) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Sat Jun 10 09:51:11 UTC 2023
10384 10:03:14.669609 [ 0.000000] random: crng init done
10385 10:03:14.672948 [ 0.000000] Machine model: Google Spherion (rev0 - 3)
10386 10:03:14.676073 [ 0.000000] efi: UEFI not found.
10387 10:03:14.685971 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
10388 10:03:14.692580 [ 0.000000] OF: reserved mem: initialized node scp@50000000, compatible id shared-dma-pool
10389 10:03:14.702362 [ 0.000000] software IO TLB: Reserved memory: created restricted DMA pool at 0x00000000c0000000, size 64 MiB
10390 10:03:14.712515 [ 0.000000] OF: reserved mem: initialized node wifi@c0000000, compatible id restricted-dma-pool
10391 10:03:14.719148 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
10392 10:03:14.722665 [ 0.000000] printk: bootconsole [mtk8250] enabled
10393 10:03:14.731207 [ 0.000000] NUMA: No NUMA configuration found
10394 10:03:14.737492 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000023fffffff]
10395 10:03:14.744272 [ 0.000000] NUMA: NODE_DATA [mem 0x23efcda00-0x23efcffff]
10396 10:03:14.744358 [ 0.000000] Zone ranges:
10397 10:03:14.750765 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
10398 10:03:14.754401 [ 0.000000] DMA32 empty
10399 10:03:14.760924 [ 0.000000] Normal [mem 0x0000000100000000-0x000000023fffffff]
10400 10:03:14.764133 [ 0.000000] Movable zone start for each node
10401 10:03:14.767477 [ 0.000000] Early memory node ranges
10402 10:03:14.773879 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
10403 10:03:14.780423 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
10404 10:03:14.787116 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
10405 10:03:14.794171 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
10406 10:03:14.800337 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000023fffffff]
10407 10:03:14.807025 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000023fffffff]
10408 10:03:14.863672 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
10409 10:03:14.870237 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
10410 10:03:14.877223 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
10411 10:03:14.880084 [ 0.000000] psci: probing for conduit method from DT.
10412 10:03:14.886720 [ 0.000000] psci: PSCIv1.1 detected in firmware.
10413 10:03:14.890019 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
10414 10:03:14.897143 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
10415 10:03:14.900104 [ 0.000000] psci: SMC Calling Convention v1.2
10416 10:03:14.906628 [ 0.000000] percpu: Embedded 21 pages/cpu s45224 r8192 d32600 u86016
10417 10:03:14.910364 [ 0.000000] Detected VIPT I-cache on CPU0
10418 10:03:14.916532 [ 0.000000] CPU features: detected: GIC system register CPU interface
10419 10:03:14.923312 [ 0.000000] CPU features: detected: Virtualization Host Extensions
10420 10:03:14.929738 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
10421 10:03:14.936712 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
10422 10:03:14.942973 [ 0.000000] CPU features: detected: Qualcomm erratum 1009, or ARM erratum 1286807, 2441009
10423 10:03:14.953322 [ 0.000000] CPU features: detected: ARM errata 1165522, 1319367, or 1530923
10424 10:03:14.956271 [ 0.000000] alternatives: applying boot alternatives
10425 10:03:14.962991 [ 0.000000] Fallback order for Node 0: 0
10426 10:03:14.969583 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 2063616
10427 10:03:14.973134 [ 0.000000] Policy zone: Normal
10428 10:03:14.983069 [ 0.000000] Kernel command line: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
10429 10:03:14.993451 <5>[ 0.000000] Unknown kernel command line parameters "tftpserverip=192.168.201.1", will be passed to user space.
10430 10:03:15.005637 <6>[ 0.000000] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes, linear)
10431 10:03:15.015596 <6>[ 0.000000] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
10432 10:03:15.022357 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
10433 10:03:15.025299 <6>[ 0.000000] software IO TLB: area num 8.
10434 10:03:15.081926 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
10435 10:03:15.231290 <6>[ 0.000000] Memory: 7917888K/8385536K available (17984K kernel code, 4098K rwdata, 14068K rodata, 8384K init, 615K bss, 434880K reserved, 32768K cma-reserved)
10436 10:03:15.237983 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
10437 10:03:15.244491 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
10438 10:03:15.247591 <6>[ 0.000000] rcu: RCU event tracing is enabled.
10439 10:03:15.254496 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
10440 10:03:15.261051 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
10441 10:03:15.264650 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
10442 10:03:15.274523 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
10443 10:03:15.281173 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
10444 10:03:15.287500 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
10445 10:03:15.294365 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
10446 10:03:15.298307 <6>[ 0.000000] GICv3: 608 SPIs implemented
10447 10:03:15.300972 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
10448 10:03:15.307472 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
10449 10:03:15.311032 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
10450 10:03:15.317295 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c040000
10451 10:03:15.330737 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@100[1] /cpus/cpu@200[2] /cpus/cpu@300[3] }
10452 10:03:15.340399 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@400[4] /cpus/cpu@500[5] /cpus/cpu@600[6] /cpus/cpu@700[7] }
10453 10:03:15.351057 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
10454 10:03:15.357764 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
10455 10:03:15.371021 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
10456 10:03:15.377741 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
10457 10:03:15.384462 <6>[ 0.009224] Console: colour dummy device 80x25
10458 10:03:15.394645 <6>[ 0.013979] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
10459 10:03:15.401236 <6>[ 0.024422] pid_max: default: 32768 minimum: 301
10460 10:03:15.404232 <6>[ 0.029295] LSM: Security Framework initializing
10461 10:03:15.411759 <6>[ 0.034233] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
10462 10:03:15.420640 <6>[ 0.042097] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
10463 10:03:15.427584 <6>[ 0.051522] cblist_init_generic: Setting adjustable number of callback queues.
10464 10:03:15.434354 <6>[ 0.059021] cblist_init_generic: Setting shift to 3 and lim to 1.
10465 10:03:15.440952 <6>[ 0.065360] cblist_init_generic: Setting shift to 3 and lim to 1.
10466 10:03:15.447066 <6>[ 0.071766] rcu: Hierarchical SRCU implementation.
10467 10:03:15.450525 <6>[ 0.076781] rcu: Max phase no-delay instances is 1000.
10468 10:03:15.458836 <6>[ 0.083834] EFI services will not be available.
10469 10:03:15.461729 <6>[ 0.088805] smp: Bringing up secondary CPUs ...
10470 10:03:15.470932 <6>[ 0.093860] Detected VIPT I-cache on CPU1
10471 10:03:15.477708 <6>[ 0.093931] GICv3: CPU1: found redistributor 100 region 0:0x000000000c060000
10472 10:03:15.484320 <6>[ 0.093963] CPU1: Booted secondary processor 0x0000000100 [0x412fd050]
10473 10:03:15.487595 <6>[ 0.094304] Detected VIPT I-cache on CPU2
10474 10:03:15.494039 <6>[ 0.094354] GICv3: CPU2: found redistributor 200 region 0:0x000000000c080000
10475 10:03:15.504166 <6>[ 0.094368] CPU2: Booted secondary processor 0x0000000200 [0x412fd050]
10476 10:03:15.507706 <6>[ 0.094627] Detected VIPT I-cache on CPU3
10477 10:03:15.513890 <6>[ 0.094674] GICv3: CPU3: found redistributor 300 region 0:0x000000000c0a0000
10478 10:03:15.520661 <6>[ 0.094687] CPU3: Booted secondary processor 0x0000000300 [0x412fd050]
10479 10:03:15.524252 <6>[ 0.094992] CPU features: detected: Spectre-v4
10480 10:03:15.530519 <6>[ 0.094999] CPU features: detected: Spectre-BHB
10481 10:03:15.533821 <6>[ 0.095005] Detected PIPT I-cache on CPU4
10482 10:03:15.540671 <6>[ 0.095061] GICv3: CPU4: found redistributor 400 region 0:0x000000000c0c0000
10483 10:03:15.547315 <6>[ 0.095078] CPU4: Booted secondary processor 0x0000000400 [0x414fd0b0]
10484 10:03:15.553931 <6>[ 0.095373] Detected PIPT I-cache on CPU5
10485 10:03:15.560490 <6>[ 0.095436] GICv3: CPU5: found redistributor 500 region 0:0x000000000c0e0000
10486 10:03:15.567297 <6>[ 0.095452] CPU5: Booted secondary processor 0x0000000500 [0x414fd0b0]
10487 10:03:15.570847 <6>[ 0.095739] Detected PIPT I-cache on CPU6
10488 10:03:15.577700 <6>[ 0.095806] GICv3: CPU6: found redistributor 600 region 0:0x000000000c100000
10489 10:03:15.583687 <6>[ 0.095822] CPU6: Booted secondary processor 0x0000000600 [0x414fd0b0]
10490 10:03:15.590615 <6>[ 0.096118] Detected PIPT I-cache on CPU7
10491 10:03:15.597349 <6>[ 0.096183] GICv3: CPU7: found redistributor 700 region 0:0x000000000c120000
10492 10:03:15.603758 <6>[ 0.096199] CPU7: Booted secondary processor 0x0000000700 [0x414fd0b0]
10493 10:03:15.607115 <6>[ 0.096245] smp: Brought up 1 node, 8 CPUs
10494 10:03:15.613790 <6>[ 0.237770] SMP: Total of 8 processors activated.
10495 10:03:15.616982 <6>[ 0.242691] CPU features: detected: 32-bit EL0 Support
10496 10:03:15.627067 <6>[ 0.248087] CPU features: detected: Data cache clean to the PoU not required for I/D coherence
10497 10:03:15.633836 <6>[ 0.256923] CPU features: detected: Common not Private translations
10498 10:03:15.637324 <6>[ 0.263399] CPU features: detected: CRC32 instructions
10499 10:03:15.643833 <6>[ 0.268783] CPU features: detected: RCpc load-acquire (LDAPR)
10500 10:03:15.650095 <6>[ 0.274743] CPU features: detected: LSE atomic instructions
10501 10:03:15.656458 <6>[ 0.280524] CPU features: detected: Privileged Access Never
10502 10:03:15.663336 <6>[ 0.286340] CPU features: detected: RAS Extension Support
10503 10:03:15.670031 <6>[ 0.291949] CPU features: detected: Speculative Store Bypassing Safe (SSBS)
10504 10:03:15.673344 <6>[ 0.299172] CPU: All CPU(s) started at EL2
10505 10:03:15.679964 <6>[ 0.303515] alternatives: applying system-wide alternatives
10506 10:03:15.689102 <6>[ 0.314219] devtmpfs: initialized
10507 10:03:15.700998 <6>[ 0.322940] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
10508 10:03:15.711027 <6>[ 0.332903] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
10509 10:03:15.717690 <6>[ 0.340912] pinctrl core: initialized pinctrl subsystem
10510 10:03:15.721242 <6>[ 0.347570] DMI not present or invalid.
10511 10:03:15.728497 <6>[ 0.351976] NET: Registered PF_NETLINK/PF_ROUTE protocol family
10512 10:03:15.737803 <6>[ 0.358821] DMA: preallocated 1024 KiB GFP_KERNEL pool for atomic allocations
10513 10:03:15.744580 <6>[ 0.366401] DMA: preallocated 1024 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
10514 10:03:15.754507 <6>[ 0.374609] DMA: preallocated 1024 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
10515 10:03:15.757253 <6>[ 0.382853] audit: initializing netlink subsys (disabled)
10516 10:03:15.767195 <5>[ 0.388549] audit: type=2000 audit(0.276:1): state=initialized audit_enabled=0 res=1
10517 10:03:15.774088 <6>[ 0.389310] thermal_sys: Registered thermal governor 'step_wise'
10518 10:03:15.780577 <6>[ 0.396514] thermal_sys: Registered thermal governor 'power_allocator'
10519 10:03:15.784131 <6>[ 0.402772] cpuidle: using governor menu
10520 10:03:15.791208 <6>[ 0.413738] NET: Registered PF_QIPCRTR protocol family
10521 10:03:15.797351 <6>[ 0.419253] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
10522 10:03:15.801015 <6>[ 0.426361] ASID allocator initialised with 32768 entries
10523 10:03:15.808373 <6>[ 0.432913] Serial: AMBA PL011 UART driver
10524 10:03:15.817040 <4>[ 0.441556] Trying to register duplicate clock ID: 134
10525 10:03:15.870463 <6>[ 0.498859] KASLR enabled
10526 10:03:15.884567 <6>[ 0.506646] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
10527 10:03:15.891655 <6>[ 0.513659] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
10528 10:03:15.897978 <6>[ 0.520149] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
10529 10:03:15.904600 <6>[ 0.527152] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
10530 10:03:15.911343 <6>[ 0.533638] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
10531 10:03:15.918080 <6>[ 0.540642] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
10532 10:03:15.925030 <6>[ 0.547127] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
10533 10:03:15.931644 <6>[ 0.554132] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
10534 10:03:15.934797 <6>[ 0.561604] ACPI: Interpreter disabled.
10535 10:03:15.942692 <6>[ 0.568041] iommu: Default domain type: Translated
10536 10:03:15.949139 <6>[ 0.573155] iommu: DMA domain TLB invalidation policy: strict mode
10537 10:03:15.952738 <5>[ 0.579816] SCSI subsystem initialized
10538 10:03:15.959279 <6>[ 0.584079] usbcore: registered new interface driver usbfs
10539 10:03:15.965779 <6>[ 0.589811] usbcore: registered new interface driver hub
10540 10:03:15.968941 <6>[ 0.595362] usbcore: registered new device driver usb
10541 10:03:15.976296 <6>[ 0.601463] pps_core: LinuxPPS API ver. 1 registered
10542 10:03:15.986706 <6>[ 0.606655] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
10543 10:03:15.989399 <6>[ 0.616002] PTP clock support registered
10544 10:03:15.992643 <6>[ 0.620240] EDAC MC: Ver: 3.0.0
10545 10:03:16.000254 <6>[ 0.625423] FPGA manager framework
10546 10:03:16.003684 <6>[ 0.629097] Advanced Linux Sound Architecture Driver Initialized.
10547 10:03:16.007512 <6>[ 0.635859] vgaarb: loaded
10548 10:03:16.013802 <6>[ 0.639014] clocksource: Switched to clocksource arch_sys_counter
10549 10:03:16.020475 <5>[ 0.645467] VFS: Disk quotas dquot_6.6.0
10550 10:03:16.026985 <6>[ 0.649651] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
10551 10:03:16.030151 <6>[ 0.656838] pnp: PnP ACPI: disabled
10552 10:03:16.037938 <6>[ 0.663477] NET: Registered PF_INET protocol family
10553 10:03:16.048288 <6>[ 0.669055] IP idents hash table entries: 131072 (order: 8, 1048576 bytes, linear)
10554 10:03:16.059060 <6>[ 0.681359] tcp_listen_portaddr_hash hash table entries: 4096 (order: 4, 65536 bytes, linear)
10555 10:03:16.069425 <6>[ 0.690173] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
10556 10:03:16.075936 <6>[ 0.698145] TCP established hash table entries: 65536 (order: 7, 524288 bytes, linear)
10557 10:03:16.082541 <6>[ 0.706841] TCP bind hash table entries: 65536 (order: 9, 2097152 bytes, linear)
10558 10:03:16.094552 <6>[ 0.716589] TCP: Hash tables configured (established 65536 bind 65536)
10559 10:03:16.101302 <6>[ 0.723386] UDP hash table entries: 4096 (order: 5, 131072 bytes, linear)
10560 10:03:16.107990 <6>[ 0.730582] UDP-Lite hash table entries: 4096 (order: 5, 131072 bytes, linear)
10561 10:03:16.114237 <6>[ 0.738284] NET: Registered PF_UNIX/PF_LOCAL protocol family
10562 10:03:16.121060 <6>[ 0.744447] RPC: Registered named UNIX socket transport module.
10563 10:03:16.124584 <6>[ 0.750601] RPC: Registered udp transport module.
10564 10:03:16.130909 <6>[ 0.755531] RPC: Registered tcp transport module.
10565 10:03:16.137279 <6>[ 0.760463] RPC: Registered tcp NFSv4.1 backchannel transport module.
10566 10:03:16.141109 <6>[ 0.767130] PCI: CLS 0 bytes, default 64
10567 10:03:16.143936 <6>[ 0.771510] Unpacking initramfs...
10568 10:03:16.169232 <6>[ 0.791129] hw perfevents: enabled with armv8_cortex_a55 PMU driver, 7 counters available
10569 10:03:16.179837 <6>[ 0.799798] hw perfevents: enabled with armv8_cortex_a76 PMU driver, 7 counters available
10570 10:03:16.182373 <6>[ 0.808637] kvm [1]: IPA Size Limit: 40 bits
10571 10:03:16.189084 <6>[ 0.813165] kvm [1]: GICv3: no GICV resource entry
10572 10:03:16.192505 <6>[ 0.818184] kvm [1]: disabling GICv2 emulation
10573 10:03:16.199188 <6>[ 0.822868] kvm [1]: GIC system register CPU interface enabled
10574 10:03:16.203004 <6>[ 0.829029] kvm [1]: vgic interrupt IRQ18
10575 10:03:16.208945 <6>[ 0.833379] kvm [1]: VHE mode initialized successfully
10576 10:03:16.215401 <5>[ 0.839804] Initialise system trusted keyrings
10577 10:03:16.221866 <6>[ 0.844615] workingset: timestamp_bits=42 max_order=21 bucket_order=0
10578 10:03:16.229745 <6>[ 0.854702] squashfs: version 4.0 (2009/01/31) Phillip Lougher
10579 10:03:16.236369 <5>[ 0.861081] NFS: Registering the id_resolver key type
10580 10:03:16.239414 <5>[ 0.866383] Key type id_resolver registered
10581 10:03:16.246407 <5>[ 0.870797] Key type id_legacy registered
10582 10:03:16.252855 <6>[ 0.875077] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
10583 10:03:16.259694 <6>[ 0.882000] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
10584 10:03:16.265657 <6>[ 0.889706] 9p: Installing v9fs 9p2000 file system support
10585 10:03:16.302237 <5>[ 0.927260] Key type asymmetric registered
10586 10:03:16.305236 <5>[ 0.931591] Asymmetric key parser 'x509' registered
10587 10:03:16.314972 <6>[ 0.936735] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
10588 10:03:16.318431 <6>[ 0.944347] io scheduler mq-deadline registered
10589 10:03:16.322008 <6>[ 0.949111] io scheduler kyber registered
10590 10:03:16.340178 <6>[ 0.965697] EINJ: ACPI disabled.
10591 10:03:16.371694 <4>[ 0.990571] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10592 10:03:16.381970 <4>[ 1.001202] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10593 10:03:16.396234 <6>[ 1.021823] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
10594 10:03:16.404326 <6>[ 1.029855] printk: console [ttyS0] disabled
10595 10:03:16.432344 <6>[ 1.054538] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 255, base_baud = 1625000) is a ST16650V2
10596 10:03:16.439128 <6>[ 1.064061] printk: console [ttyS0] enabled
10597 10:03:16.442076 <6>[ 1.064061] printk: console [ttyS0] enabled
10598 10:03:16.449083 <6>[ 1.072954] printk: bootconsole [mtk8250] disabled
10599 10:03:16.452083 <6>[ 1.072954] printk: bootconsole [mtk8250] disabled
10600 10:03:16.458736 <6>[ 1.084253] SuperH (H)SCI(F) driver initialized
10601 10:03:16.462269 <6>[ 1.089547] msm_serial: driver initialized
10602 10:03:16.476508 <6>[ 1.098467] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14005000
10603 10:03:16.486184 <6>[ 1.107018] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14006000
10604 10:03:16.493228 <6>[ 1.115560] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@14007000
10605 10:03:16.502851 <6>[ 1.124187] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@14009000
10606 10:03:16.509888 <6>[ 1.132892] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400a000
10607 10:03:16.519538 <6>[ 1.141605] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@1400b000
10608 10:03:16.529612 <6>[ 1.150145] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@1400c000
10609 10:03:16.536395 <6>[ 1.158950] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14014000
10610 10:03:16.546259 <6>[ 1.167495] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@14015000
10611 10:03:16.557733 <6>[ 1.183127] loop: module loaded
10612 10:03:16.564519 <6>[ 1.189088] vgpu11_sshub: Bringing 400000uV into 575000-575000uV
10613 10:03:16.587266 <4>[ 1.212486] mtk-pmic-keys: Failed to locate of_node [id: -1]
10614 10:03:16.594000 <6>[ 1.219366] megasas: 07.719.03.00-rc1
10615 10:03:16.603907 <6>[ 1.229036] spi-nor spi2.0: w25q64jwm (8192 Kbytes)
10616 10:03:16.613055 <6>[ 1.238408] tpm_tis_spi spi1.0: TPM ready IRQ confirmed on attempt 2
10617 10:03:16.630408 <6>[ 1.255319] tpm_tis_spi spi1.0: 2.0 TPM (device-id 0x28, rev-id 0)
10618 10:03:16.687071 <6>[ 1.306005] tpm_tis_spi spi1.0: Cr50 firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.153/cr50_v3.94_pp.113-620c9
10619 10:03:18.525462 <6>[ 3.150680] Freeing initrd memory: 55048K
10620 10:03:18.535914 <6>[ 3.161142] mtk-spi-nor 11234000.spi: spi frequency: 52000000 Hz
10621 10:03:18.546522 <6>[ 3.172055] tun: Universal TUN/TAP device driver, 1.6
10622 10:03:18.549594 <6>[ 3.178105] thunder_xcv, ver 1.0
10623 10:03:18.553026 <6>[ 3.181610] thunder_bgx, ver 1.0
10624 10:03:18.556163 <6>[ 3.185105] nicpf, ver 1.0
10625 10:03:18.567056 <6>[ 3.189117] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
10626 10:03:18.569927 <6>[ 3.196593] hns3: Copyright (c) 2017 Huawei Corporation.
10627 10:03:18.576996 <6>[ 3.202180] hclge is initializing
10628 10:03:18.580087 <6>[ 3.205755] e1000: Intel(R) PRO/1000 Network Driver
10629 10:03:18.586577 <6>[ 3.210883] e1000: Copyright (c) 1999-2006 Intel Corporation.
10630 10:03:18.589838 <6>[ 3.216897] e1000e: Intel(R) PRO/1000 Network Driver
10631 10:03:18.596416 <6>[ 3.222113] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
10632 10:03:18.603075 <6>[ 3.228302] igb: Intel(R) Gigabit Ethernet Network Driver
10633 10:03:18.609875 <6>[ 3.233952] igb: Copyright (c) 2007-2014 Intel Corporation.
10634 10:03:18.616790 <6>[ 3.239789] igbvf: Intel(R) Gigabit Virtual Function Network Driver
10635 10:03:18.623432 <6>[ 3.246307] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
10636 10:03:18.626630 <6>[ 3.252767] sky2: driver version 1.30
10637 10:03:18.633202 <6>[ 3.257745] VFIO - User Level meta-driver version: 0.3
10638 10:03:18.640185 <6>[ 3.265943] usbcore: registered new interface driver usb-storage
10639 10:03:18.647109 <6>[ 3.272395] usbcore: registered new device driver onboard-usb-hub
10640 10:03:18.656001 <6>[ 3.281518] mt6397-rtc mt6359-rtc: registered as rtc0
10641 10:03:18.666021 <6>[ 3.287042] mt6397-rtc mt6359-rtc: setting system clock to 2023-06-10T10:03:06 UTC (1686391386)
10642 10:03:18.668873 <6>[ 3.296629] i2c_dev: i2c /dev entries driver
10643 10:03:18.686195 <6>[ 3.308347] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
10644 10:03:18.692976 <6>[ 3.318529] sdhci: Secure Digital Host Controller Interface driver
10645 10:03:18.699667 <6>[ 3.324965] sdhci: Copyright(c) Pierre Ossman
10646 10:03:18.706169 <6>[ 3.330359] Synopsys Designware Multimedia Card Interface Driver
10647 10:03:18.709289 <6>[ 3.336954] mmc0: CQHCI version 5.10
10648 10:03:18.715871 <6>[ 3.337507] sdhci-pltfm: SDHCI platform and OF driver helper
10649 10:03:18.723327 <6>[ 3.349213] ledtrig-cpu: registered to indicate activity on CPUs
10650 10:03:18.734199 <6>[ 3.356645] SMCCC: SOC_ID: ID = jep106:0426:8192 Revision = 0x00000000
10651 10:03:18.738081 <6>[ 3.364045] usbcore: registered new interface driver usbhid
10652 10:03:18.744463 <6>[ 3.369878] usbhid: USB HID core driver
10653 10:03:18.750597 <6>[ 3.374144] spi_master spi0: will run message pump with realtime priority
10654 10:03:18.798610 <6>[ 3.417507] input: cros_ec as /devices/platform/soc/11010000.spi/spi_master/spi0/spi0.0/11010000.spi:ec@0:keyboard-controller/input/input0
10655 10:03:18.813899 <6>[ 3.432883] input: cros_ec_buttons as /devices/platform/soc/11010000.spi/spi_master/spi0/spi0.0/11010000.spi:ec@0:keyboard-controller/input/input1
10656 10:03:18.821284 <6>[ 3.446466] mmc0: Command Queue Engine enabled
10657 10:03:18.828085 <6>[ 3.448712] cros-ec-spi spi0.0: Chrome EC device registered
10658 10:03:18.831575 <6>[ 3.451206] mmc0: new HS400 Enhanced strobe MMC card at address 0001
10659 10:03:18.839016 <6>[ 3.464341] mmcblk0: mmc0:0001 DA4128 116 GiB
10660 10:03:18.852196 <6>[ 3.474270] mt6359-sound mt6359-sound: mt6359_parse_dt() failed to read mic-type-1, use default (0)
10661 10:03:18.858483 <6>[ 3.477406] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
10662 10:03:18.865388 <6>[ 3.485709] NET: Registered PF_PACKET protocol family
10663 10:03:18.868638 <6>[ 3.490781] mmcblk0boot0: mmc0:0001 DA4128 4.00 MiB
10664 10:03:18.875217 <6>[ 3.494974] 9pnet: Installing 9P2000 support
10665 10:03:18.878170 <6>[ 3.500756] mmcblk0boot1: mmc0:0001 DA4128 4.00 MiB
10666 10:03:18.884959 <5>[ 3.504620] Key type dns_resolver registered
10667 10:03:18.891646 <6>[ 3.510444] mmcblk0rpmb: mmc0:0001 DA4128 16.0 MiB, chardev (507:0)
10668 10:03:18.894843 <6>[ 3.514933] registered taskstats version 1
10669 10:03:18.898228 <5>[ 3.525217] Loading compiled-in X.509 certificates
10670 10:03:18.933231 <4>[ 3.552205] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10671 10:03:18.943201 <4>[ 3.562879] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator
10672 10:03:18.953273 <3>[ 3.575616] mediatek-mutex 14001000.mutex: error -2 can't parse gce-client-reg property (0)
10673 10:03:18.966043 <6>[ 3.591110] xhci-mtk 11200000.usb: uwk - reg:0x420, version:102
10674 10:03:18.972312 <6>[ 3.597881] xhci-mtk 11200000.usb: xHCI Host Controller
10675 10:03:18.979134 <6>[ 3.603379] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
10676 10:03:18.988936 <6>[ 3.611237] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
10677 10:03:18.995972 <6>[ 3.620662] xhci-mtk 11200000.usb: irq 271, io mem 0x11200000
10678 10:03:19.001864 <6>[ 3.626863] xhci-mtk 11200000.usb: xHCI Host Controller
10679 10:03:19.008556 <6>[ 3.632363] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
10680 10:03:19.015439 <6>[ 3.640019] xhci-mtk 11200000.usb: Host supports USB 3.1 Enhanced SuperSpeed
10681 10:03:19.022224 <6>[ 3.647897] hub 1-0:1.0: USB hub found
10682 10:03:19.026055 <6>[ 3.651932] hub 1-0:1.0: 1 port detected
10683 10:03:19.035469 <6>[ 3.656271] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
10684 10:03:19.038730 <6>[ 3.665068] hub 2-0:1.0: USB hub found
10685 10:03:19.042016 <6>[ 3.669102] hub 2-0:1.0: 1 port detected
10686 10:03:19.051101 <6>[ 3.676286] mtk-msdc 11f70000.mmc: Got CD GPIO
10687 10:03:19.068301 <6>[ 3.690092] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_runtime_resume()
10688 10:03:19.074797 <6>[ 3.698155] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_enable_clock()
10689 10:03:19.084884 <4>[ 3.706123] mt8192-audio 11210000.syscon:mt8192-afe-pcm: No cache defaults, reading back from HW
10690 10:03:19.094683 <6>[ 3.715786] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_runtime_suspend()
10691 10:03:19.101484 <6>[ 3.723869] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_disable_clock()
10692 10:03:19.108109 <6>[ 3.731891] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_adda_register()
10693 10:03:19.117854 <6>[ 3.739810] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_pcm_register()
10694 10:03:19.124282 <6>[ 3.747631] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_tdm_register()
10695 10:03:19.134701 <6>[ 3.755452] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 39
10696 10:03:19.144683 <6>[ 3.766028] mtk-iommu 1401d000.m4u: bound 14003000.larb (ops mtk_smi_larb_component_ops)
10697 10:03:19.150945 <6>[ 3.774399] mtk-iommu 1401d000.m4u: bound 14004000.larb (ops mtk_smi_larb_component_ops)
10698 10:03:19.161104 <6>[ 3.782756] mtk-iommu 1401d000.m4u: bound 1f002000.larb (ops mtk_smi_larb_component_ops)
10699 10:03:19.168093 <6>[ 3.791100] mtk-iommu 1401d000.m4u: bound 1602e000.larb (ops mtk_smi_larb_component_ops)
10700 10:03:19.177514 <6>[ 3.799445] mtk-iommu 1401d000.m4u: bound 1600d000.larb (ops mtk_smi_larb_component_ops)
10701 10:03:19.184519 <6>[ 3.807790] mtk-iommu 1401d000.m4u: bound 17010000.larb (ops mtk_smi_larb_component_ops)
10702 10:03:19.194440 <6>[ 3.816134] mtk-iommu 1401d000.m4u: bound 1502e000.larb (ops mtk_smi_larb_component_ops)
10703 10:03:19.200909 <6>[ 3.824477] mtk-iommu 1401d000.m4u: bound 1582e000.larb (ops mtk_smi_larb_component_ops)
10704 10:03:19.211084 <6>[ 3.832821] mtk-iommu 1401d000.m4u: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
10705 10:03:19.220684 <6>[ 3.841168] mtk-iommu 1401d000.m4u: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
10706 10:03:19.227459 <6>[ 3.849514] mtk-iommu 1401d000.m4u: bound 1a00f000.larb (ops mtk_smi_larb_component_ops)
10707 10:03:19.237474 <6>[ 3.857857] mtk-iommu 1401d000.m4u: bound 1a010000.larb (ops mtk_smi_larb_component_ops)
10708 10:03:19.244626 <6>[ 3.866200] mtk-iommu 1401d000.m4u: bound 1a011000.larb (ops mtk_smi_larb_component_ops)
10709 10:03:19.254125 <6>[ 3.874549] mtk-iommu 1401d000.m4u: bound 1b10f000.larb (ops mtk_smi_larb_component_ops)
10710 10:03:19.260858 <6>[ 3.882895] mtk-iommu 1401d000.m4u: bound 1b00f000.larb (ops mtk_smi_larb_component_ops)
10711 10:03:19.267666 <6>[ 3.891823] mediatek-disp-ovl 14005000.ovl: Adding to iommu group 0
10712 10:03:19.274611 <6>[ 3.899325] mediatek-disp-ovl 14006000.ovl: Adding to iommu group 0
10713 10:03:19.281223 <6>[ 3.906416] mediatek-disp-ovl 14014000.ovl: Adding to iommu group 0
10714 10:03:19.291780 <6>[ 3.913567] mediatek-disp-rdma 14007000.rdma: Adding to iommu group 0
10715 10:03:19.298353 <6>[ 3.920895] mediatek-disp-rdma 14015000.rdma: Adding to iommu group 0
10716 10:03:19.308395 <6>[ 3.927809] mediatek-drm mediatek-drm.1.auto: bound 14005000.ovl (ops mtk_disp_ovl_component_ops)
10717 10:03:19.315021 <6>[ 3.936949] mediatek-drm mediatek-drm.1.auto: bound 14006000.ovl (ops mtk_disp_ovl_component_ops)
10718 10:03:19.324742 <6>[ 3.946077] mediatek-drm mediatek-drm.1.auto: bound 14007000.rdma (ops mtk_disp_rdma_component_ops)
10719 10:03:19.334818 <6>[ 3.955379] mediatek-drm mediatek-drm.1.auto: bound 14009000.color (ops mtk_disp_color_component_ops)
10720 10:03:19.344916 <6>[ 3.964853] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ccorr (ops mtk_disp_ccorr_component_ops)
10721 10:03:19.354586 <6>[ 3.974328] mediatek-drm mediatek-drm.1.auto: bound 1400b000.aal (ops mtk_disp_aal_component_ops)
10722 10:03:19.361153 <6>[ 3.983478] mediatek-drm mediatek-drm.1.auto: bound 1400c000.gamma (ops mtk_disp_gamma_component_ops)
10723 10:03:19.371743 <6>[ 3.992953] mediatek-drm mediatek-drm.1.auto: bound 14014000.ovl (ops mtk_disp_ovl_component_ops)
10724 10:03:19.380945 <6>[ 4.002080] mediatek-drm mediatek-drm.1.auto: bound 14015000.rdma (ops mtk_disp_rdma_component_ops)
10725 10:03:19.390583 <6>[ 4.011382] mediatek-drm mediatek-drm.1.auto: Not creating crtc 0 because component 14 is disabled or missing
10726 10:03:19.400734 <6>[ 4.021548] mediatek-drm mediatek-drm.1.auto: Not creating crtc 0 because component 10 is disabled or missing
10727 10:03:19.410997 <6>[ 4.033467] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 0
10728 10:03:19.432895 <6>[ 4.055287] usb 2-1: new SuperSpeed USB device number 2 using xhci-mtk
10729 10:03:19.460579 <6>[ 4.085776] hub 2-1:1.0: USB hub found
10730 10:03:19.463258 <6>[ 4.090180] hub 2-1:1.0: 3 ports detected
10731 10:03:19.584923 <6>[ 4.207289] usb 1-1: new high-speed USB device number 2 using xhci-mtk
10732 10:03:19.739635 <6>[ 4.364966] hub 1-1:1.0: USB hub found
10733 10:03:19.742650 <6>[ 4.369414] hub 1-1:1.0: 4 ports detected
10734 10:03:19.821143 <6>[ 4.443481] usb 2-1.3: new SuperSpeed USB device number 3 using xhci-mtk
10735 10:03:20.064928 <6>[ 4.687291] usb 1-1.4: new high-speed USB device number 3 using xhci-mtk
10736 10:03:20.197972 <6>[ 4.823613] hub 1-1.4:1.0: USB hub found
10737 10:03:20.201369 <6>[ 4.828314] hub 1-1.4:1.0: 2 ports detected
10738 10:03:20.500674 <6>[ 5.123289] usb 1-1.4.1: new high-speed USB device number 4 using xhci-mtk
10739 10:03:20.692387 <6>[ 5.315184] usb 1-1.4.2: new high-speed USB device number 5 using xhci-mtk
10740 10:03:31.701883 <6>[ 16.331841] ALSA device list:
10741 10:03:31.708625 <6>[ 16.335097] No soundcards found.
10742 10:03:31.720973 <6>[ 16.347439] Freeing unused kernel memory: 8384K
10743 10:03:31.723965 <6>[ 16.352355] Run /init as init process
10744 10:03:31.754158 <6>[ 16.381095] NET: Registered PF_INET6 protocol family
10745 10:03:31.760965 <6>[ 16.387689] Segment Routing with IPv6
10746 10:03:31.764645 <6>[ 16.391652] In-situ OAM (IOAM) with IPv6
10747 10:03:31.796451 <30>[ 16.406462] systemd[1]: systemd 247.3-7+deb11u2 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +ZSTD +SECCOMP +BLKID +ELFUTILS +KMOD +IDN2 -IDN +PCRE2 default-hierarchy=unified)
10748 10:03:31.803757 <30>[ 16.430381] systemd[1]: Detected architecture arm64.
10749 10:03:31.804212
10750 10:03:31.810555 Welcome to [1mDebian GNU/Linux 11 (bullseye)[0m!
10751 10:03:31.810985
10752 10:03:31.824792 <30>[ 16.451465] systemd[1]: Set hostname to <debian-bullseye-arm64>.
10753 10:03:31.959528 <30>[ 16.582806] systemd[1]: Queued start job for default target Graphical Interface.
10754 10:03:31.994026 <30>[ 16.620486] systemd[1]: Created slice system-getty.slice.
10755 10:03:32.000286 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m.
10756 10:03:32.017262 <30>[ 16.643899] systemd[1]: Created slice system-modprobe.slice.
10757 10:03:32.023880 [[0;32m OK [0m] Created slice [0;1;39msystem-modprobe.slice[0m.
10758 10:03:32.041767 <30>[ 16.668414] systemd[1]: Created slice system-serial\x2dgetty.slice.
10759 10:03:32.051902 [[0;32m OK [0m] Created slice [0;1;39msystem-serial\x2dgetty.slice[0m.
10760 10:03:32.064978 <30>[ 16.691780] systemd[1]: Created slice User and Session Slice.
10761 10:03:32.071080 [[0;32m OK [0m] Created slice [0;1;39mUser and Session Slice[0m.
10762 10:03:32.092546 <30>[ 16.715844] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
10763 10:03:32.098875 [[0;32m OK [0m] Started [0;1;39mDispatch Password …ts to Console Directory Watch[0m.
10764 10:03:32.120219 <30>[ 16.743791] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
10765 10:03:32.127156 [[0;32m OK [0m] Started [0;1;39mForward Password R…uests to Wall Directory Watch[0m.
10766 10:03:32.147030 <30>[ 16.767344] systemd[1]: Condition check resulted in Arbitrary Executable File Formats File System Automount Point being skipped.
10767 10:03:32.153738 <30>[ 16.779376] systemd[1]: Reached target Local Encrypted Volumes.
10768 10:03:32.160321 [[0;32m OK [0m] Reached target [0;1;39mLocal Encrypted Volumes[0m.
10769 10:03:32.176717 <30>[ 16.803645] systemd[1]: Reached target Paths.
10770 10:03:32.179694 [[0;32m OK [0m] Reached target [0;1;39mPaths[0m.
10771 10:03:32.196262 <30>[ 16.823336] systemd[1]: Reached target Remote File Systems.
10772 10:03:32.202760 [[0;32m OK [0m] Reached target [0;1;39mRemote File Systems[0m.
10773 10:03:32.216501 <30>[ 16.843275] systemd[1]: Reached target Slices.
10774 10:03:32.220063 [[0;32m OK [0m] Reached target [0;1;39mSlices[0m.
10775 10:03:32.236581 <30>[ 16.863340] systemd[1]: Reached target Swap.
10776 10:03:32.239656 [[0;32m OK [0m] Reached target [0;1;39mSwap[0m.
10777 10:03:32.260512 <30>[ 16.883596] systemd[1]: Listening on initctl Compatibility Named Pipe.
10778 10:03:32.266769 [[0;32m OK [0m] Listening on [0;1;39minitctl Compatibility Named Pipe[0m.
10779 10:03:32.273475 <30>[ 16.898245] systemd[1]: Listening on Journal Audit Socket.
10780 10:03:32.276924 [[0;32m OK [0m] Listening on [0;1;39mJournal Audit Socket[0m.
10781 10:03:32.292762 <30>[ 16.919586] systemd[1]: Listening on Journal Socket (/dev/log).
10782 10:03:32.299080 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket (/dev/log)[0m.
10783 10:03:32.316644 <30>[ 16.943613] systemd[1]: Listening on Journal Socket.
10784 10:03:32.323256 [[0;32m OK [0m] Listening on [0;1;39mJournal Socket[0m.
10785 10:03:32.336765 <30>[ 16.963603] systemd[1]: Listening on udev Control Socket.
10786 10:03:32.343190 [[0;32m OK [0m] Listening on [0;1;39mudev Control Socket[0m.
10787 10:03:32.361245 <30>[ 16.987960] systemd[1]: Listening on udev Kernel Socket.
10788 10:03:32.368160 [[0;32m OK [0m] Listening on [0;1;39mudev Kernel Socket[0m.
10789 10:03:32.405177 <30>[ 17.031621] systemd[1]: Mounting Huge Pages File System...
10790 10:03:32.411633 Mounting [0;1;39mHuge Pages File System[0m...
10791 10:03:32.426603 <30>[ 17.053375] systemd[1]: Mounting POSIX Message Queue File System...
10792 10:03:32.433357 Mounting [0;1;39mPOSIX Message Queue File System[0m...
10793 10:03:32.450481 <30>[ 17.077316] systemd[1]: Mounting Kernel Debug File System...
10794 10:03:32.457383 Mounting [0;1;39mKernel Debug File System[0m...
10795 10:03:32.475987 <30>[ 17.099551] systemd[1]: Condition check resulted in Kernel Trace File System being skipped.
10796 10:03:32.487204 <30>[ 17.110458] systemd[1]: Starting Create list of static device nodes for the current kernel...
10797 10:03:32.493593 Starting [0;1;39mCreate list of st…odes for the current kernel[0m...
10798 10:03:32.510939 <30>[ 17.137528] systemd[1]: Starting Load Kernel Module configfs...
10799 10:03:32.517702 Starting [0;1;39mLoad Kernel Module configfs[0m...
10800 10:03:32.534870 <30>[ 17.161757] systemd[1]: Starting Load Kernel Module drm...
10801 10:03:32.541765 Starting [0;1;39mLoad Kernel Module drm[0m...
10802 10:03:32.560278 <30>[ 17.183576] systemd[1]: Condition check resulted in Set Up Additional Binary Formats being skipped.
10803 10:03:32.570450 <30>[ 17.197192] systemd[1]: Starting Journal Service...
10804 10:03:32.573435 Starting [0;1;39mJournal Service[0m...
10805 10:03:32.591240 <30>[ 17.218074] systemd[1]: Starting Load Kernel Modules...
10806 10:03:32.597715 Starting [0;1;39mLoad Kernel Modules[0m...
10807 10:03:32.618872 <30>[ 17.242302] systemd[1]: Starting Remount Root and Kernel File Systems...
10808 10:03:32.624824 Starting [0;1;39mRemount Root and Kernel File Systems[0m...
10809 10:03:32.643065 <30>[ 17.269787] systemd[1]: Starting Coldplug All udev Devices...
10810 10:03:32.649760 Starting [0;1;39mColdplug All udev Devices[0m...
10811 10:03:32.667221 <30>[ 17.294074] systemd[1]: Mounted Huge Pages File System.
10812 10:03:32.673802 [[0;32m OK [0m] Mounted [0;1;39mHuge Pages File System[0m.
10813 10:03:32.689066 <30>[ 17.315702] systemd[1]: Started Journal Service.
10814 10:03:32.695677 [[0;32m OK [0m] Started [0;1;39mJournal Service[0m.
10815 10:03:32.710527 [[0;32m OK [0m] Mounted [0;1;39mPOSIX Message Queue File System[0m.
10816 10:03:32.725193 [[0;32m OK [0m] Mounted [0;1;39mKernel Debug File System[0m.
10817 10:03:32.745349 [[0;32m OK [0m] Finished [0;1;39mCreate list of st… nodes for the current kernel[0m.
10818 10:03:32.762948 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module configfs[0m.
10819 10:03:32.786503 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Module drm[0m.
10820 10:03:32.806030 [[0;32m OK [0m] Finished [0;1;39mLoad Kernel Modules[0m.
10821 10:03:32.825550 [[0;1;31mFAILED[0m] Failed to start [0;1;39mRemount Root and Kernel File Systems[0m.
10822 10:03:32.841068 See 'systemctl status systemd-remount-fs.service' for details.
10823 10:03:32.889426 Mounting [0;1;39mKernel Configuration File System[0m...
10824 10:03:32.911038 Starting [0;1;39mFlush Journal to Persistent Storage[0m...
10825 10:03:32.928703 <46>[ 17.552039] systemd-journald[176]: Received client request to flush runtime journal.
10826 10:03:32.937222 Starting [0;1;39mLoad/Save Random Seed[0m...
10827 10:03:32.960047 Starting [0;1;39mApply Kernel Variables[0m...
10828 10:03:32.975935 Starting [0;1;39mCreate System Users[0m...
10829 10:03:32.997203 [[0;32m OK [0m] Mounted [0;1;39mKernel Configuration File System[0m.
10830 10:03:33.021414 [[0;32m OK [0m] Finished [0;1;39mFlush Journal to Persistent Storage[0m.
10831 10:03:33.037604 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Random Seed[0m.
10832 10:03:33.057954 [[0;32m OK [0m] Finished [0;1;39mColdplug All udev Devices[0m.
10833 10:03:33.073507 [[0;32m OK [0m] Finished [0;1;39mApply Kernel Variables[0m.
10834 10:03:33.090280 [[0;32m OK [0m] Finished [0;1;39mCreate System Users[0m.
10835 10:03:33.129239 Starting [0;1;39mCreate Static Device Nodes in /dev[0m...
10836 10:03:33.151809 [[0;32m OK [0m] Finished [0;1;39mCreate Static Device Nodes in /dev[0m.
10837 10:03:33.164891 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems (Pre)[0m.
10838 10:03:33.180766 [[0;32m OK [0m] Reached target [0;1;39mLocal File Systems[0m.
10839 10:03:33.237081 Starting [0;1;39mCreate Volatile Files and Directories[0m...
10840 10:03:33.260468 Starting [0;1;39mRule-based Manage…for Device Events and Files[0m...
10841 10:03:33.281501 [[0;32m OK [0m] Finished [0;1;39mCreate Volatile Files and Directories[0m.
10842 10:03:33.300524 [[0;32m OK [0m] Started [0;1;39mRule-based Manager for Device Events and Files[0m.
10843 10:03:33.357456 Starting [0;1;39mNetwork Time Synchronization[0m...
10844 10:03:33.377980 Starting [0;1;39mUpdate UTMP about System Boot/Shutdown[0m...
10845 10:03:33.421230 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Boot/Shutdown[0m.
10846 10:03:33.461098 [[0;32m OK [0m] Created slice [0;1;39msystem-systemd\x2dbacklight.slice[0m.
10847 10:03:33.467566 <6>[ 18.092981] mtk-scp 10500000.scp: assigned reserved memory node scp@50000000
10848 10:03:33.481515 <6>[ 18.108583] remoteproc remoteproc0: scp is available
10849 10:03:33.494920 <4>[ 18.118100] remoteproc remoteproc0: Direct firmware load for mediatek/mt8192/scp.img failed with error -2
10850 10:03:33.501483 <6>[ 18.128213] remoteproc remoteproc0: powering up scp
10851 10:03:33.512103 <4>[ 18.135723] remoteproc remoteproc0: Direct firmware load for mediatek/mt8192/scp.img failed with error -2
10852 10:03:33.519097 <3>[ 18.145667] remoteproc remoteproc0: request_firmware failed: -2
10853 10:03:33.529241 <3>[ 18.149290] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10854 10:03:33.542025 Starting [0;1;39mLoad/Save Screen …of leds:white:kbd_backlight[0m..<3>[ 18.166376] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10855 10:03:33.542581 .
10856 10:03:33.552136 <6>[ 18.169455] mtk-pcie-gen3 11230000.pcie: host bridge /soc/pcie@11230000 ranges:
10857 10:03:33.558744 <3>[ 18.175501] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10858 10:03:33.568751 <6>[ 18.183333] mtk-pcie-gen3 11230000.pcie: MEM 0x0012000000..0x00127fffff -> 0x0012000000
10859 10:03:33.575514 <6>[ 18.200038] mtk-pcie-gen3 11230000.pcie: IO 0x0012800000..0x0012ffffff -> 0x0012800000
10860 10:03:33.585547 <6>[ 18.206359] sbs-battery 5-000b: sbs-battery: battery gas gauge device registered
10861 10:03:33.595032 [[0;32m OK [<3>[ 18.217897] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10862 10:03:33.605518 0m] Started [0;<3>[ 18.226312] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10863 10:03:33.615122 1;39mNetwork Tim<4>[ 18.229349] sbs-battery 5-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
10864 10:03:33.618445 <4>[ 18.229349] Fallback method does not support PEC.
10865 10:03:33.628463 e Synchronizatio<3>[ 18.250650] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10866 10:03:33.628998 n[0m.
10867 10:03:33.638557 <3>[ 18.260361] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10868 10:03:33.644983 <3>[ 18.269487] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10869 10:03:33.653678 <6>[ 18.280454] mc: Linux media interface: v0.10
10870 10:03:33.660478 <3>[ 18.282434] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0
10871 10:03:33.670292 <4>[ 18.286153] elants_i2c 4-0010: supply vcc33 not found, using dummy regulator
10872 10:03:33.677510 [[0;32m OK [0m] Finished [0;1;39mLoad/Save Screen …s of leds:white:kbd_backlight[0m.
10873 10:03:33.684159 <4>[ 18.309883] elants_i2c 4-0010: supply vccio not found, using dummy regulator
10874 10:03:33.694342 <3>[ 18.310223] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10875 10:03:33.703926 <3>[ 18.327119] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10876 10:03:33.707531 <6>[ 18.327176] usbcore: registered new interface driver r8152
10877 10:03:33.718321 <6>[ 18.331816] elan_i2c 3-0015: Elan Touchpad: Module ID: 0x0128, Firmware: 0x0002, Sample: 0x0004, IAP: 0x0003
10878 10:03:33.727435 <3>[ 18.336700] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10879 10:03:33.734204 <6>[ 18.337136] videodev: Linux video capture interface: v2.00
10880 10:03:33.740900 <6>[ 18.338322] input: Elan Touchpad as /devices/platform/soc/11d21000.i2c/i2c-3/3-0015/input/input2
10881 10:03:33.747733 <6>[ 18.340657] mtk-pcie-gen3 11230000.pcie: PCI host bridge to bus 0000:00
10882 10:03:33.753852 <6>[ 18.340670] pci_bus 0000:00: root bus resource [bus 00-ff]
10883 10:03:33.760453 <6>[ 18.340678] pci_bus 0000:00: root bus resource [mem 0x12000000-0x127fffff]
10884 10:03:33.770983 <6>[ 18.340684] pci_bus 0000:00: root bus resource [io 0x0000-0x7fffff] (bus address [0x12800000-0x12ffffff])
10885 10:03:33.777524 <6>[ 18.340735] pci 0000:00:00.0: [14c3:6786] type 01 class 0x060400
10886 10:03:33.784638 <6>[ 18.340762] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x00003fff 64bit pref]
10887 10:03:33.790965 <6>[ 18.340854] pci 0000:00:00.0: supports D1 D2
10888 10:03:33.797644 <6>[ 18.340857] pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold
10889 10:03:33.804114 <6>[ 18.389696] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
10890 10:03:33.814841 <3>[ 18.393924] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10891 10:03:33.821343 <6>[ 18.404092] pci 0000:01:00.0: [14c3:7961] type 00 class 0x028000
10892 10:03:33.827737 <3>[ 18.410113] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10893 10:03:33.834448 <6>[ 18.417603] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff 64bit pref]
10894 10:03:33.844211 <3>[ 18.422117] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10895 10:03:33.851045 <6>[ 18.423324] usb 2-1.3: reset SuperSpeed USB device number 3 using xhci-mtk
10896 10:03:33.860986 <6>[ 18.426216] input: Elan Touchscreen as /devices/platform/soc/11f00000.i2c/i2c-4/4-0010/input/input3
10897 10:03:33.867759 <6>[ 18.428982] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x00003fff 64bit pref]
10898 10:03:33.873893 <3>[ 18.437252] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10899 10:03:33.884214 <6>[ 18.445376] pci 0000:01:00.0: reg 0x20: [mem 0x00000000-0x00000fff 64bit pref]
10900 10:03:33.890611 <4>[ 18.446035] r8152 2-1.3:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
10901 10:03:33.901123 <4>[ 18.446046] r8152 2-1.3:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
10902 10:03:33.907437 <3>[ 18.451611] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10903 10:03:33.917813 <3>[ 18.451638] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10904 10:03:33.920561 <6>[ 18.459932] pci 0000:01:00.0: supports D1 D2
10905 10:03:33.930720 <3>[ 18.467288] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1
10906 10:03:33.934422 <6>[ 18.468372] usbcore: registered new interface driver cdc_ether
10907 10:03:33.940519 <6>[ 18.468453] Bluetooth: Core ver 2.22
10908 10:03:33.944333 <6>[ 18.468559] NET: Registered PF_BLUETOOTH protocol family
10909 10:03:33.950383 <6>[ 18.468562] Bluetooth: HCI device and connection manager initialized
10910 10:03:33.957089 <6>[ 18.468585] Bluetooth: HCI socket layer initialized
10911 10:03:33.960529 <6>[ 18.468598] Bluetooth: L2CAP socket layer initialized
10912 10:03:33.967319 <6>[ 18.468618] Bluetooth: SCO socket layer initialized
10913 10:03:33.973790 <6>[ 18.475915] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
10914 10:03:33.983826 <3>[ 18.483192] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10915 10:03:33.990433 <6>[ 18.483851] usbcore: registered new interface driver r8153_ecm
10916 10:03:33.997046 <6>[ 18.500456] usb 1-1.4.1: Found UVC 1.10 device HD User Facing (04f2:b741)
10917 10:03:34.003533 <6>[ 18.503124] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
10918 10:03:34.010313 <6>[ 18.503160] pci 0000:00:00.0: BAR 15: assigned [mem 0x12000000-0x121fffff 64bit pref]
10919 10:03:34.020585 <6>[ 18.503168] pci 0000:00:00.0: BAR 0: assigned [mem 0x12200000-0x12203fff 64bit pref]
10920 10:03:34.026760 <6>[ 18.503181] pci 0000:01:00.0: BAR 0: assigned [mem 0x12000000-0x120fffff 64bit pref]
10921 10:03:34.033666 <6>[ 18.503197] pci 0000:01:00.0: BAR 2: assigned [mem 0x12100000-0x12103fff 64bit pref]
10922 10:03:34.043867 <6>[ 18.503213] pci 0000:01:00.0: BAR 4: assigned [mem 0x12104000-0x12104fff 64bit pref]
10923 10:03:34.046703 <6>[ 18.503228] pci 0000:00:00.0: PCI bridge to [bus 01]
10924 10:03:34.056425 <6>[ 18.503236] pci 0000:00:00.0: bridge window [mem 0x12000000-0x121fffff 64bit pref]
10925 10:03:34.063081 <6>[ 18.503402] pcieport 0000:00:00.0: enabling device (0000 -> 0002)
10926 10:03:34.069874 <6>[ 18.504598] pcieport 0000:00:00.0: PME: Signaling with IRQ 282
10927 10:03:34.072974 <6>[ 18.504982] pcieport 0000:00:00.0: AER: enabled with IRQ 282
10928 10:03:34.080093 <6>[ 18.532545] r8152 2-1.3:1.0 eth0: v1.12.13
10929 10:03:34.089653 <6>[ 18.541598] input: HD User Facing: HD User Facing as /devices/platform/soc/11200000.usb/usb1/1-1/1-1.4/1-1.4.1/1-1.4.1:1.0/input/input4
10930 10:03:34.099432 <5>[ 18.543311] cfg80211: Loading compiled-in X.509 certificates for regulatory database
10931 10:03:34.106134 <6>[ 18.544180] mtk-vcodec-enc 17020000.vcodec: Adding to iommu group 0
10932 10:03:34.109717 <6>[ 18.549248] remoteproc remoteproc0: powering up scp
10933 10:03:34.116304 <6>[ 18.549598] usbcore: registered new interface driver btusb
10934 10:03:34.122998 <6>[ 18.553599] usbcore: registered new interface driver uvcvideo
10935 10:03:34.129889 <5>[ 18.557934] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
10936 10:03:34.139607 <4>[ 18.558012] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
10937 10:03:34.143001 <6>[ 18.558021] cfg80211: failed to load regulatory.db
10938 10:03:34.153176 <4>[ 18.561174] remoteproc remoteproc0: Direct firmware load for mediatek/mt8192/scp.img failed with error -2
10939 10:03:34.160033 <6>[ 18.563317] r8152 2-1.3:1.0 enx00e04c787aaa: renamed from eth0
10940 10:03:34.169763 <4>[ 18.567395] bluetooth hci0: Direct firmware load for mediatek/BT_RAM_CODE_MT7961_1_2_hdr.bin failed with error -2
10941 10:03:34.176705 <3>[ 18.571089] remoteproc remoteproc0: request_firmware failed: -2
10942 10:03:34.183354 <3>[ 18.576692] Bluetooth: hci0: Failed to load firmware file (-2)
10943 10:03:34.186257 <3>[ 18.576703] Bluetooth: hci0: Failed to set up firmware (-2)
10944 10:03:34.200045 <4>[ 18.576713] Bluetooth: hci0: HCI Enhanced Setup Synchronous Connection command is advertised, but not supported.
10945 10:03:34.207244 <3>[ 18.583325] fops_vcodec_open(),166: [MTK_V4L2][ERROR] vpu_load_firmware failed!
10946 10:03:34.210239 [[0;32m OK [0m] Found device [0;1;39m/dev/ttyS0[0m.
10947 10:03:34.227076 <3>[ 18.849789] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10948 10:03:34.233934 <3>[ 18.852258] power_supply sbs-5-000b: driver failed to report `temp' property: -6
10949 10:03:34.243469 <3>[ 18.853122] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10950 10:03:34.251405 <3>[ 18.853916] power_supply sbs-5-000b: driver failed to report `voltage_now' property: -6
10951 10:03:34.260894 <3>[ 18.882382] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10952 10:03:34.289585 <3>[ 18.913302] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10953 10:03:34.300832 <6>[ 18.924147] mt7921e 0000:01:00.0: assigned reserved memory node wifi@c0000000
10954 10:03:34.307814 <6>[ 18.931655] mt7921e 0000:01:00.0: enabling device (0000 -> 0002)
10955 10:03:34.319177 <3>[ 18.942675] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10956 10:03:34.331541 <6>[ 18.958355] mt7921e 0000:01:00.0: ASIC revision: 79610010
10957 10:03:34.347291 <3>[ 18.970899] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5
10958 10:03:34.415535 [[0;32m OK [0m] Reached target [0;1;39mBluetooth[0m.
10959 10:03:34.439676 [[0;32m OK [0m] Reached target [0;1;39mSystem Initializatio<4>[ 19.060819] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10960 10:03:34.442642 n[0m.
10961 10:03:34.461432 [[0;32m OK [0m] Started [0;1;39mDaily Cleanup of Temporary Directories[0m.
10962 10:03:34.476838 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Set[0m.
10963 10:03:34.492356 [[0;32m OK [0m] Reached target [0;1;39mSystem Time Synchronized[0m.
10964 10:03:34.508933 [[0;32m OK [0m] Started [0;1;39mDiscard unused blocks once a week[0m.
10965 10:03:34.524060 [[0;32m OK [0m] Reached target [0;1;39mTimers[0m.
10966 10:03:34.544269 [[0;32m OK [0m] Listening on [0;1;39mD-Bus System Message Bus Socket[0m.
10967 10:03:34.561405 <4>[ 19.182105] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10968 10:03:34.567940 [[0;32m OK [0m] Reached target [0;1;39mSockets[0m.
10969 10:03:34.580644 [[0;32m OK [0m] Reached target [0;1;39mBasic System[0m.
10970 10:03:34.600153 [[0;32m OK [0m] Listening on [0;1;39mLoad/Save RF …itch Status /dev/rfkill Watch[0m.
10971 10:03:34.629068 [[0;32m OK [0m] Started [0;1;39mD-Bus System Message Bus[0m.
10972 10:03:34.659149 Starting [0;1;39mUser Login Management[0m...
10973 10:03:34.681656 <4>[ 19.302345] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10974 10:03:34.694395 Starting [0;1;39mPermit User Sessions[0m...
10975 10:03:34.712106 Starting [0;1;39mLoad/Save RF Kill Switch Status[0m...
10976 10:03:34.728567 [[0;32m OK [0m] Started [0;1;39mLoad/Save RF Kill Switch Status[0m.
10977 10:03:34.749892 [[0;32m OK [0m] Finished [0;1;39mPermit User Sessions[0m.
10978 10:03:34.769230 [[0;32m OK [0m] Started [0;1;39mUser Login Management[0m.
10979 10:03:34.805442 <4>[ 19.426343] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10980 10:03:34.833976 [[0;32m OK [0m] Started [0;1;39mGetty on tty1[0m.
10981 10:03:34.852582 [[0;32m OK [0m] Started [0;1;39mSerial Getty on ttyS0[0m.
10982 10:03:34.868953 [[0;32m OK [0m] Reached target [0;1;39mLogin Prompts[0m.
10983 10:03:34.884328 [[0;32m OK [0m] Reached target [0;1;39mMulti-User System[0m.
10984 10:03:34.900322 [[0;32m OK [0m] Reached target [0;1;39mGraphical Interface[0m.
10985 10:03:34.924985 <4>[ 19.545774] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
10986 10:03:34.954365 Starting [0;1;39mUpdate UTMP about System Runlevel Changes[0m...
10987 10:03:34.980628 [[0;32m OK [0m] Finished [0;1;39mUpdate UTMP about System Runlevel Changes[0m.
10988 10:03:34.998750
10989 10:03:34.999180
10990 10:03:35.001964 Debian GNU/Linux 11 debian-bullseye-arm64 ttyS0
10991 10:03:35.002396
10992 10:03:35.005395 debian-bullseye-arm64 login: root (automatic login)
10993 10:03:35.005825
10994 10:03:35.006163
10995 10:03:35.022275 Linux debian-bullseye-arm64 6.1.31 #1 SMP PREEMPT Sat Jun 10 09:51:11 UTC 2023 aarch64
10996 10:03:35.022365
10997 10:03:35.028918 The programs included with the Debian GNU/Linux system are free software;
10998 10:03:35.035303 the exact distribution terms for each program are described in the
10999 10:03:35.048791 individual files in /us<4>[ 19.667345] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11000 10:03:35.048950 r/share/doc/*/copyright.
11001 10:03:35.049059
11002 10:03:35.054798 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
11003 10:03:35.058352 permitted by applicable law.
11004 10:03:35.058960 Matched prompt #10: / #
11006 10:03:35.059563 Setting prompt string to ['/ #']
11007 10:03:35.059808 end: 2.2.5.1 login-action (duration 00:00:20) [common]
11009 10:03:35.060373 end: 2.2.5 auto-login-action (duration 00:00:21) [common]
11010 10:03:35.060654 start: 2.2.6 expect-shell-connection (timeout 00:03:23) [common]
11011 10:03:35.060893 Setting prompt string to ['/ #']
11012 10:03:35.061046 Forcing a shell prompt, looking for ['/ #']
11014 10:03:35.111410 / #
11015 10:03:35.111602 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
11016 10:03:35.111710 Waiting using forced prompt support (timeout 00:02:30)
11017 10:03:35.116749
11018 10:03:35.117061 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
11019 10:03:35.117180 start: 2.2.7 export-device-env (timeout 00:03:23) [common]
11020 10:03:35.117310 end: 2.2.7 export-device-env (duration 00:00:00) [common]
11021 10:03:35.117433 end: 2.2 depthcharge-retry (duration 00:01:37) [common]
11022 10:03:35.117547 end: 2 depthcharge-action (duration 00:01:37) [common]
11023 10:03:35.117666 start: 3 lava-test-retry (timeout 00:08:00) [common]
11024 10:03:35.117788 start: 3.1 lava-test-shell (timeout 00:08:00) [common]
11025 10:03:35.117895 Using namespace: common
11027 10:03:35.218299 / # #
11028 10:03:35.218934 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
11029 10:03:35.219565 <4>[ 19.789633] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11030 10:03:35.224395 #
11031 10:03:35.225259 Using /lava-10670673
11033 10:03:35.326335 / # export SHELL=/bin/sh
11034 10:03:35.326625 <4>[ 19.909493] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11035 10:03:35.331181 export SHELL=/bin/sh
11037 10:03:35.431879 / # . /lava-10670673/environment
11038 10:03:35.432101 . /lava-10670673/environment<4>[ 20.029235] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11039 10:03:35.437506
11041 10:03:35.538059 / # /lava-10670673/bin/lava-test-runner /lava-10670673/0
11042 10:03:35.538233 Test shell timeout: 10s (minimum of the action and connection timeout)
11043 10:03:35.538750 /lava-10670673/bin/lava-test-runner /lava-10670673/0<4>[ 20.149586] mt7921e 0000:01:00.0: Direct firmware load for mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin failed with error -2
11044 10:03:35.543523
11045 10:03:35.589046 + export TESTRUN_ID=0_igt-kms-medi<8>[ 20.197405] <LAVA_SIGNAL_STARTRUN 0_igt-kms-mediatek 10670673_1.5.2.3.1>
11046 10:03:35.589143 atek
11047 10:03:35.589209 + cd /lava-10670673/0/tests/0_igt-kms-mediatek
11048 10:03:35.589273 + cat uuid
11049 10:03:35.589333 + UUID=10670673_1.5.2.3.1
11050 10:03:35.589393 + set +x
11051 10:03:35.589627 Received signal: <STARTRUN> 0_igt-kms-mediatek 10670673_1.5.2.3.1
11052 10:03:35.589698 Starting test lava.0_igt-kms-mediatek (10670673_1.5.2.3.1)
11053 10:03:35.589781 Skipping test definition patterns.
11054 10:03:35.601102 + IGT_FORCE_DRIVER=mediatek /usr/bin/igt-parser.sh core_auth core_getclient core_getstats core_getversion core_setmaster_vs_auth drm_read kms_addfb_basic kms_atomic kms_flip_event_leak <8>[ 20.229315] <LAVA_SIGNAL_TESTSET START core_auth>
11055 10:03:35.601365 Received signal: <TESTSET> START core_auth
11056 10:03:35.601443 Starting test_set core_auth
11057 10:03:35.604832 kms_prop_blob kms_setmode kms_vblank
11058 10:03:35.626036 <14>[ 20.253341] [IGT] core_auth: executing
11059 10:03:35.632789 IGT-Version: 1.2<14>[ 20.258523] [IGT] core_auth: starting subtest getclient-simple
11060 10:03:35.642673 7.1-g766edf9 (aarch64) (Linux: 6<3>[ 20.267986] mt7921e 0000:01:00.0: hardware init failed
11061 10:03:35.646245 <14>[ 20.268124] [IGT] core_auth: exiting, ret=0
11062 10:03:35.646350 .1.31 aarch64)
11063 10:03:35.648972 Starting subtest: getclient-simple
11064 10:03:35.659426 Opened device: /dev/dri/card<8>[ 20.284549] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=getclient-simple RESULT=pass>
11065 10:03:35.659566 0
11066 10:03:35.659865 Received signal: <TESTCASE> TEST_CASE_ID=getclient-simple RESULT=pass
11068 10:03:35.665857 [1mSubtest getclient-simple: SUCCESS (0.001s)[0m
11069 10:03:35.682925 <14>[ 20.310141] [IGT] core_auth: executing
11070 10:03:35.689640 IGT-Version: 1.2<14>[ 20.314603] [IGT] core_auth: starting subtest getclient-master-drop
11071 10:03:35.695804 7.1-g766edf9 (aa<14>[ 20.322831] [IGT] core_auth: exiting, ret=0
11072 10:03:35.699784 rch64) (Linux: 6.1.31 aarch64)
11073 10:03:35.702720 Starting subtest: getclient-master-drop
11074 10:03:35.709121 Opened <8>[ 20.334055] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=getclient-master-drop RESULT=pass>
11075 10:03:35.709447 Received signal: <TESTCASE> TEST_CASE_ID=getclient-master-drop RESULT=pass
11077 10:03:35.712604 device: /dev/dri/card0
11078 10:03:35.719265 [1mSubtest getclient-master-drop: SUCCESS (0.000s)[0m
11079 10:03:35.734034 <14>[ 20.361317] [IGT] core_auth: executing
11080 10:03:35.740953 IGT-Version: 1.2<14>[ 20.365989] [IGT] core_auth: starting subtest basic-auth
11081 10:03:35.747602 7.1-g766edf9 (aa<14>[ 20.373015] [IGT] core_auth: exiting, ret=0
11082 10:03:35.751409 rch64) (Linux: 6.1.31 aarch64)
11083 10:03:35.751851 Opened device: /dev/dri/card0
11084 10:03:35.760714 Starting subtest:<8>[ 20.384605] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-auth RESULT=pass>
11085 10:03:35.761411 basic-auth
11086 10:03:35.762086 Received signal: <TESTCASE> TEST_CASE_ID=basic-auth RESULT=pass
11088 10:03:35.764248 [1mSubtest basic-auth: SUCCESS (0.000s)[0m
11089 10:03:35.782251 <14>[ 20.409341] [IGT] core_auth: executing
11090 10:03:35.788703 IGT-Version: 1.2<14>[ 20.413931] [IGT] core_auth: starting subtest many-magics
11091 10:03:35.791768 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11092 10:03:35.795136 Opened device: /dev/dri/card0
11093 10:03:35.798631 Starting subtest: many-magics
11094 10:03:35.801542 Reopening device failed after 1020 opens
11095 10:03:35.808383 [1mSubtest many<14>[ 20.434340] [IGT] core_auth: exiting, ret=0
11096 10:03:35.811901 -magics: SUCCESS (0.013s)[0m
11097 10:03:35.819340 Received signal: <TESTCASE> TEST_CASE_ID=many-magics RESULT=pass
11099 10:03:35.822291 <8>[ 20.446336] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=many-magics RESULT=pass>
11100 10:03:35.826087 <8>[ 20.454831] <LAVA_SIGNAL_TESTSET STOP>
11101 10:03:35.826697 Received signal: <TESTSET> STOP
11102 10:03:35.827062 Closing test_set core_auth
11103 10:03:35.867900 <14>[ 20.495180] [IGT] core_getclient: executing
11104 10:03:35.874596 IGT-Version: 1.2<14>[ 20.500107] [IGT] core_getclient: exiting, ret=0
11105 10:03:35.877518 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11106 10:03:35.881445 Opened device: /dev/dri/card0
11107 10:03:35.887790 S<8>[ 20.512266] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getclient RESULT=pass>
11108 10:03:35.888123 Received signal: <TESTCASE> TEST_CASE_ID=core_getclient RESULT=pass
11110 10:03:35.891279 UCCESS (0.006s)
11111 10:03:35.929327 <14>[ 20.556670] [IGT] core_getstats: executing
11112 10:03:35.936301 IGT-Version: 1.2<14>[ 20.561510] [IGT] core_getstats: exiting, ret=0
11113 10:03:35.939211 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11114 10:03:35.942911 Opened device: /dev/dri/card0
11115 10:03:35.949498 S<8>[ 20.573296] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getstats RESULT=pass>
11116 10:03:35.949628 UCCESS (0.006s)
11117 10:03:35.949908 Received signal: <TESTCASE> TEST_CASE_ID=core_getstats RESULT=pass
11119 10:03:35.991537 <14>[ 20.618529] [IGT] core_getversion: executing
11120 10:03:35.997986 IGT-Version: 1.2<14>[ 20.623805] [IGT] core_getversion: exiting, ret=0
11121 10:03:36.001292 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11122 10:03:36.004902 Opened device: /dev/dri/card0
11123 10:03:36.011515 S<8>[ 20.635991] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getversion RESULT=pass>
11124 10:03:36.012191 Received signal: <TESTCASE> TEST_CASE_ID=core_getversion RESULT=pass
11126 10:03:36.014798 UCCESS (0.006s)
11127 10:03:36.054451 <14>[ 20.681176] [IGT] core_setmaster_vs_auth: executing
11128 10:03:36.061060 IGT-Version: 1.2<14>[ 20.687171] [IGT] core_setmaster_vs_auth: exiting, ret=0
11129 10:03:36.067625 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11130 10:03:36.068168 Opened device: /dev/dri/card0
11131 10:03:36.077103 S<8>[ 20.699895] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_setmaster_vs_auth RESULT=pass>
11132 10:03:36.077533 UCCESS (0.007s)
11133 10:03:36.078126 Received signal: <TESTCASE> TEST_CASE_ID=core_setmaster_vs_auth RESULT=pass
11135 10:03:36.101505 <8>[ 20.728897] <LAVA_SIGNAL_TESTSET START drm_read>
11136 10:03:36.102177 Received signal: <TESTSET> START drm_read
11137 10:03:36.102529 Starting test_set drm_read
11138 10:03:36.123244 <14>[ 20.750645] [IGT] drm_read: executing
11139 10:03:36.129951 IGT-Version: 1.2<14>[ 20.755311] [IGT] drm_read: exiting, ret=77
11140 10:03:36.133696 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11141 10:03:36.136837 Opened device: /dev/dri/card0
11142 10:03:36.143256 N<8>[ 20.766510] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-buffer RESULT=skip>
11143 10:03:36.143515 Received signal: <TESTCASE> TEST_CASE_ID=invalid-buffer RESULT=skip
11145 10:03:36.146304 o KMS driver or no outputs, pipes: 8, outputs: 0
11146 10:03:36.149938 [1mSubtest invalid-buffer: SKIP (0.000s)[0m
11147 10:03:36.165822 <14>[ 20.792966] [IGT] drm_read: executing
11148 10:03:36.172366 IGT-Version: 1.2<14>[ 20.797657] [IGT] drm_read: exiting, ret=77
11149 10:03:36.175338 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11150 10:03:36.178511 Opened device: /dev/dri/card0
11151 10:03:36.185215 N<8>[ 20.809275] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=fault-buffer RESULT=skip>
11152 10:03:36.185471 Received signal: <TESTCASE> TEST_CASE_ID=fault-buffer RESULT=skip
11154 10:03:36.188679 o KMS driver or no outputs, pipes: 8, outputs: 0
11155 10:03:36.191867 [1mSubtest fault-buffer: SKIP (0.000s)[0m
11156 10:03:36.208017 <14>[ 20.835482] [IGT] drm_read: executing
11157 10:03:36.215312 IGT-Version: 1.2<14>[ 20.840197] [IGT] drm_read: exiting, ret=77
11158 10:03:36.217638 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11159 10:03:36.221139 Opened device: /dev/dri/card0
11160 10:03:36.227701 N<8>[ 20.851464] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=empty-block RESULT=skip>
11161 10:03:36.228046 Received signal: <TESTCASE> TEST_CASE_ID=empty-block RESULT=skip
11163 10:03:36.231357 o KMS driver or no outputs, pipes: 8, outputs: 0
11164 10:03:36.234329 [1mSubtest empty-block: SKIP (0.000s)[0m
11165 10:03:36.249852 <14>[ 20.876919] [IGT] drm_read: executing
11166 10:03:36.252960 IGT-Version: 1.2<14>[ 20.881456] [IGT] drm_read: exiting, ret=77
11167 10:03:36.259740 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11168 10:03:36.262980 Opened device: /dev/dri/card0
11169 10:03:36.269688 N<8>[ 20.892564] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=empty-nonblock RESULT=skip>
11170 10:03:36.269943 Received signal: <TESTCASE> TEST_CASE_ID=empty-nonblock RESULT=skip
11172 10:03:36.273349 o KMS driver or no outputs, pipes: 8, outputs: 0
11173 10:03:36.276048 [1mSubtest empty-nonblock: SKIP (0.000s)[0m
11174 10:03:36.291939 <14>[ 20.918956] [IGT] drm_read: executing
11175 10:03:36.298381 IGT-Version: 1.2<14>[ 20.923870] [IGT] drm_read: exiting, ret=77
11176 10:03:36.301594 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11177 10:03:36.305384 Opened device: /dev/dri/card0
11178 10:03:36.311599 N<8>[ 20.934977] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-block RESULT=skip>
11179 10:03:36.312292 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-block RESULT=skip
11181 10:03:36.315115 o KMS driver or no outputs, pipes: 8, outputs: 0
11182 10:03:36.321454 [1mSubtest short-buffer-block: SKIP (0.000s)[0m
11183 10:03:36.333999 <14>[ 20.960906] [IGT] drm_read: executing
11184 10:03:36.340110 IGT-Version: 1.2<14>[ 20.965496] [IGT] drm_read: exiting, ret=77
11185 10:03:36.343685 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11186 10:03:36.346638 Opened device: /dev/dri/card0
11187 10:03:36.353620 N<8>[ 20.976708] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-nonblock RESULT=skip>
11188 10:03:36.353901 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-nonblock RESULT=skip
11190 10:03:36.356516 o KMS driver or no outputs, pipes: 8, outputs: 0
11191 10:03:36.363248 [1mSubtest short-buffer-nonblock: SKIP (0.000s)[0m
11192 10:03:36.375424 <14>[ 21.002760] [IGT] drm_read: executing
11193 10:03:36.378634 IGT-Version: 1.2<14>[ 21.007483] [IGT] drm_read: exiting, ret=77
11194 10:03:36.385799 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11195 10:03:36.392398 Opened device: /<8>[ 21.018240] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-wakeup RESULT=skip>
11196 10:03:36.392967 Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-wakeup RESULT=skip
11198 10:03:36.395255 dev/dri/card0
11199 10:03:36.399291 Received signal: <TESTSET> STOP
11200 10:03:36.399700 Closing test_set drm_read
11201 10:03:36.402176 No KMS driver or <8>[ 21.027709] <LAVA_SIGNAL_TESTSET STOP>
11202 10:03:36.402700 no outputs, pipes: 8, outputs: 0
11203 10:03:36.409020 [1mSubtest short-buffer-wakeup: SKIP (0.000s)[0m
11204 10:03:36.427052 <8>[ 21.054190] <LAVA_SIGNAL_TESTSET START kms_addfb_basic>
11205 10:03:36.427834 Received signal: <TESTSET> START kms_addfb_basic
11206 10:03:36.428274 Starting test_set kms_addfb_basic
11207 10:03:36.450494 <14>[ 21.077612] [IGT] kms_addfb_basic: executing
11208 10:03:36.457342 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11209 10:03:36.463877 <14>[ 21.087351] [IGT] kms_addfb_basic: starting subtest unused-handle
11210 10:03:36.464342 Opened device: /dev/dri/card0
11211 10:03:36.466947 Starting subtest: unused-handle
11212 10:03:36.474055 [1mSubtest unused-handle: SUCCESS (0.000s)[0m
11213 10:03:36.477021 Test requiremen<14>[ 21.104690] [IGT] kms_addfb_basic: exiting, ret=0
11214 10:03:36.483701 t not met in function igt_require_i915, file ../lib/drmtest.c:721:
11215 10:03:36.493483 Test require<8>[ 21.116647] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-handle RESULT=pass>
11216 10:03:36.493998 ment: is_i915_device(fd)
11217 10:03:36.494614 Received signal: <TESTCASE> TEST_CASE_ID=unused-handle RESULT=pass
11219 10:03:36.503514 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11220 10:03:36.506741 Test requirement: is_i915_device(fd)
11221 10:03:36.510438 No KMS driver or no outputs, pipes: 8, outputs: 0
11222 10:03:36.516604 <14>[ 21.143242] [IGT] kms_addfb_basic: executing
11223 10:03:36.519889 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11224 10:03:36.526365 <14>[ 21.152781] [IGT] kms_addfb_basic: starting subtest unused-pitches
11225 10:03:36.530103 Opened device: /dev/dri/card0
11226 10:03:36.533603 Starting subtest: unused-pitches
11227 10:03:36.536643 [1mSubtest unused-pitches: SUCCESS (0.000s)[0m
11228 10:03:36.543448 Test requirem<14>[ 21.170285] [IGT] kms_addfb_basic: exiting, ret=0
11229 10:03:36.550253 ent not met in function igt_require_i915, file ../lib/drmtest.c:721:
11230 10:03:36.556915 Received signal: <TESTCASE> TEST_CASE_ID=unused-pitches RESULT=pass
11232 10:03:36.559652 Test requi<8>[ 21.182349] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-pitches RESULT=pass>
11233 10:03:36.560093 rement: is_i915_device(fd)
11234 10:03:36.566369 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11235 10:03:36.569951 Test requirement: is_i915_device(fd)
11236 10:03:36.576385 No KMS driver or no outputs, pipes: 8, outputs: 0
11237 10:03:36.579536 <14>[ 21.207999] [IGT] kms_addfb_basic: executing
11238 10:03:36.586367 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11239 10:03:36.593104 <14>[ 21.217458] [IGT] kms_addfb_basic: starting subtest unused-offsets
11240 10:03:36.596704 Opened device: /dev/dri/card0
11241 10:03:36.599665 Starting subtest: unused-offsets
11242 10:03:36.602699 [1mSubtest unused-offsets: SUCCESS (0.000s)[0m
11243 10:03:36.609809 Test requirem<14>[ 21.235132] [IGT] kms_addfb_basic: exiting, ret=0
11244 10:03:36.616077 ent not met in function igt_require_i915, file ../lib/drmtest.c:721:
11245 10:03:36.623225 Test requi<8>[ 21.246919] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-offsets RESULT=pass>
11246 10:03:36.623585 Received signal: <TESTCASE> TEST_CASE_ID=unused-offsets RESULT=pass
11248 10:03:36.626439 rement: is_i915_device(fd)
11249 10:03:36.633025 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11250 10:03:36.635816 Test requirement: is_i915_device(fd)
11251 10:03:36.639147 No KMS driver or no outputs, pipes: 8, outputs: 0
11252 10:03:36.645891 <14>[ 21.273361] [IGT] kms_addfb_basic: executing
11253 10:03:36.652943 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11254 10:03:36.659696 <14>[ 21.283217] [IGT] kms_addfb_basic: starting subtest unused-modifier
11255 10:03:36.660126 Opened device: /dev/dri/card0
11256 10:03:36.662757 Starting subtest: unused-modifier
11257 10:03:36.669312 [1mSubtest unused-modifier: SUCCESS (0.000s)[0m
11258 10:03:36.676155 Test requirement<14>[ 21.300714] [IGT] kms_addfb_basic: exiting, ret=0
11259 10:03:36.679271 not met in function igt_require_i915, file ../lib/drmtest.c:721:
11260 10:03:36.689709 Test requirem<8>[ 21.313268] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-modifier RESULT=pass>
11261 10:03:36.690394 Received signal: <TESTCASE> TEST_CASE_ID=unused-modifier RESULT=pass
11263 10:03:36.692861 ent: is_i915_device(fd)
11264 10:03:36.699298 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11265 10:03:36.703020 Test requirement: is_i915_device(fd)
11266 10:03:36.706143 No KMS driver or no outputs, pipes: 8, outputs: 0
11267 10:03:36.712655 <14>[ 21.339664] [IGT] kms_addfb_basic: executing
11268 10:03:36.719167 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11269 10:03:36.726020 <14>[ 21.349647] [IGT] kms_addfb_basic: starting subtest clobberred-modifier
11270 10:03:36.729079 Opened device: /dev/dri/card0
11271 10:03:36.732464 Starting subtest: clobberred-modifier
11272 10:03:36.742191 Test requirement not met in function igt_require_i915, fil<14>[ 21.367510] [IGT] kms_addfb_basic: exiting, ret=77
11273 10:03:36.742634 e ../lib/drmtest.c:721:
11274 10:03:36.745445 Test requirement: is_i915_device(fd)
11275 10:03:36.755453 [1mSubtest clobb<8>[ 21.379953] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=clobberred-modifier RESULT=skip>
11276 10:03:36.756148 Received signal: <TESTCASE> TEST_CASE_ID=clobberred-modifier RESULT=skip
11278 10:03:36.759049 erred-modifier: SKIP (0.000s)[0m
11279 10:03:36.765394 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11280 10:03:36.768841 Test requirement: is_i915_device(fd)
11281 10:03:36.779028 Test requirement not met in function igt_require_i91<14>[ 21.405486] [IGT] kms_addfb_basic: executing
11282 10:03:36.782017 5, file ../lib/drmtest.c:721:
11283 10:03:36.791978 Test requirement: is_i915_device(<14>[ 21.415916] [IGT] kms_addfb_basic: starting subtest invalid-smem-bo-on-discrete
11284 10:03:36.792396 fd)
11285 10:03:36.795383 No KMS driver or no outputs, pipes: 8, outputs: 0
11286 10:03:36.802101 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11287 10:03:36.808561 Opened d<14>[ 21.434415] [IGT] kms_addfb_basic: exiting, ret=77
11288 10:03:36.809007 evice: /dev/dri/card0
11289 10:03:36.815228 Starting subtest: invalid-smem-bo-on-discrete
11290 10:03:36.822135 Test requi<8>[ 21.446352] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-smem-bo-on-discrete RESULT=skip>
11291 10:03:36.822810 Received signal: <TESTCASE> TEST_CASE_ID=invalid-smem-bo-on-discrete RESULT=skip
11293 10:03:36.828878 rement not met in function igt_require_intel, file ../lib/drmtest.c:716:
11294 10:03:36.832063 Test requirement: is_intel_device(fd)
11295 10:03:36.838217 [1mSubtest invalid-smem-bo-on-discrete: SKIP (0.000s)[0m
11296 10:03:36.845116 Test requirement not met in functio<14>[ 21.473022] [IGT] kms_addfb_basic: executing
11297 10:03:36.852028 n igt_require_i915, file ../lib/drmtest.c:721:
11298 10:03:36.858973 Test requirement<14>[ 21.483394] [IGT] kms_addfb_basic: starting subtest legacy-format
11299 10:03:36.861932 : is_i915_device(fd)
11300 10:03:36.868410 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11301 10:03:36.871770 Test requirement: is_i915_device(fd)
11302 10:03:36.874859 No KMS driver or no outputs, pipes: 8, outputs: 0
11303 10:03:36.881658 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11304 10:03:36.888415 Opened device:<14>[ 21.513369] [IGT] kms_addfb_basic: exiting, ret=0
11305 10:03:36.888858 /dev/dri/card0
11306 10:03:36.891984 Starting subtest: legacy-format
11307 10:03:36.901725 Successfully fuzzed 10000 {bpp<8>[ 21.525382] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=legacy-format RESULT=pass>
11308 10:03:36.902146 , depth} variations
11309 10:03:36.902735 Received signal: <TESTCASE> TEST_CASE_ID=legacy-format RESULT=pass
11311 10:03:36.908247 [1mSubtest legacy-format: SUCCESS (0.013s)[0m
11312 10:03:36.914763 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11313 10:03:36.917676 Test requirement: is_i915_device(fd)
11314 10:03:36.924307 Test requirement not met in funct<14>[ 21.551696] [IGT] kms_addfb_basic: executing
11315 10:03:36.928412 ion igt_require_i915, file ../lib/drmtest.c:721:
11316 10:03:36.930836 Test requirement: is_i915_device(fd)
11317 10:03:36.937609 No KMS d<14>[ 21.565151] [IGT] kms_addfb_basic: starting subtest no-handle
11318 10:03:36.944093 river or no outputs, pipes: 8, outputs: 0
11319 10:03:36.954159 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31<14>[ 21.579191] [IGT] kms_addfb_basic: exiting, ret=0
11320 10:03:36.954247 aarch64)
11321 10:03:36.957689 Opened device: /dev/dri/card0
11322 10:03:36.957812 Starting subtest: no-handle
11323 10:03:36.967490 [1mSubte<8>[ 21.591553] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=no-handle RESULT=pass>
11324 10:03:36.967804 Received signal: <TESTCASE> TEST_CASE_ID=no-handle RESULT=pass
11326 10:03:36.970853 st no-handle: SUCCESS (0.000s)[0m
11327 10:03:36.977539 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11328 10:03:36.980912 Test requirement: is_i915_device(fd)
11329 10:03:36.990675 Test requirement not met in function igt_require_i9<14>[ 21.616587] [IGT] kms_addfb_basic: executing
11330 10:03:36.990842 15, file ../lib/drmtest.c:721:
11331 10:03:36.994383 Test requirement: is_i915_device(fd)
11332 10:03:37.004116 No KMS driver or no output<14>[ 21.628995] [IGT] kms_addfb_basic: starting subtest basic
11333 10:03:37.004232 s, pipes: 8, outputs: 0
11334 10:03:37.010682 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11335 10:03:37.017480 Opened <14>[ 21.643299] [IGT] kms_addfb_basic: exiting, ret=0
11336 10:03:37.017566 device: /dev/dri/card0
11337 10:03:37.020426 Starting subtest: basic
11338 10:03:37.031250 [1mSubtest basic: SUCCESS (0.0<8>[ 21.655461] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=pass>
11339 10:03:37.031355 00s)[0m
11340 10:03:37.031620 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=pass
11342 10:03:37.037108 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11343 10:03:37.040715 Test requirement: is_i915_device(fd)
11344 10:03:37.053721 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:<14>[ 21.679778] [IGT] kms_addfb_basic: executing
11345 10:03:37.053894 721:
11346 10:03:37.057132 Test requirement: is_i915_device(fd)
11347 10:03:37.060568 No KMS driver or no outputs, pipes: 8, outputs: 0
11348 10:03:37.066903 I<14>[ 21.692703] [IGT] kms_addfb_basic: starting subtest bad-pitch-0
11349 10:03:37.074053 GT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11350 10:03:37.076956 Opened device: /dev/dri/card0
11351 10:03:37.080417 St<14>[ 21.707358] [IGT] kms_addfb_basic: exiting, ret=0
11352 10:03:37.083777 arting subtest: bad-pitch-0
11353 10:03:37.086972 [1mSubtest bad-pitch-0: SUCCESS (0.000s)[0m
11354 10:03:37.093907 Test<8>[ 21.719081] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-0 RESULT=pass>
11355 10:03:37.094705 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-0 RESULT=pass
11357 10:03:37.100492 requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11358 10:03:37.104053 Test requirement: is_i915_device(fd)
11359 10:03:37.110759 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11360 10:03:37.117240 Test req<14>[ 21.744284] [IGT] kms_addfb_basic: executing
11361 10:03:37.120602 uirement: is_i915_device(fd)
11362 10:03:37.123823 No KMS driver or no outputs, pipes: 8, outputs: 0
11363 10:03:37.133647 IGT-Version: 1.<14>[ 21.757168] [IGT] kms_addfb_basic: starting subtest bad-pitch-32
11364 10:03:37.137085 27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11365 10:03:37.140403 Opened device: /dev/dri/card0
11366 10:03:37.147136 Starting subtest<14>[ 21.772020] [IGT] kms_addfb_basic: exiting, ret=0
11367 10:03:37.147602 : bad-pitch-32
11368 10:03:37.150170 [1mSubtest bad-pitch-32: SUCCESS (0.000s)[0m
11369 10:03:37.160463 Test requirement<8>[ 21.783974] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-32 RESULT=pass>
11370 10:03:37.161234 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-32 RESULT=pass
11372 10:03:37.166622 not met in function igt_require_i915, file ../lib/drmtest.c:721:
11373 10:03:37.170089 Test requirement: is_i915_device(fd)
11374 10:03:37.176874 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11375 10:03:37.183344 Test requirement: is<14>[ 21.809870] [IGT] kms_addfb_basic: executing
11376 10:03:37.183847 _i915_device(fd)
11377 10:03:37.187263 No KMS driver or no outputs, pipes: 8, outputs: 0
11378 10:03:37.196196 IGT-Version: 1.27.1-g766edf<14>[ 21.822333] [IGT] kms_addfb_basic: starting subtest bad-pitch-63
11379 10:03:37.199893 9 (aarch64) (Linux: 6.1.31 aarch64)
11380 10:03:37.203023 Opened device: /dev/dri/card0
11381 10:03:37.209560 Starting subtest: bad-pitch-<14>[ 21.836907] [IGT] kms_addfb_basic: exiting, ret=0
11382 10:03:37.209989 63
11383 10:03:37.216254 [1mSubtest bad-pitch-63: SUCCESS (0.000s)[0m
11384 10:03:37.222898 Test requirement not met in <8>[ 21.849107] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-63 RESULT=pass>
11385 10:03:37.223583 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-63 RESULT=pass
11387 10:03:37.229557 function igt_require_i915, file ../lib/drmtest.c:721:
11388 10:03:37.233239 Test requirement: is_i915_device(fd)
11389 10:03:37.239806 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11390 10:03:37.242788 Test requirement: is_i915_device(fd)
11391 10:03:37.249951 No KMS dri<14>[ 21.875067] [IGT] kms_addfb_basic: executing
11392 10:03:37.252843 ver or no outputs, pipes: 8, outputs: 0
11393 10:03:37.262596 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 a<14>[ 21.888385] [IGT] kms_addfb_basic: starting subtest bad-pitch-128
11394 10:03:37.263049 arch64)
11395 10:03:37.266055 Opened device: /dev/dri/card0
11396 10:03:37.269288 Starting subtest: bad-pitch-128
11397 10:03:37.275802 [1mSubtest bad-pitch-1<14>[ 21.902875] [IGT] kms_addfb_basic: exiting, ret=0
11398 10:03:37.279125 28: SUCCESS (0.000s)[0m
11399 10:03:37.289167 Test requirement not met in function igt_require_i915,<8>[ 21.915077] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-128 RESULT=pass>
11400 10:03:37.289853 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-128 RESULT=pass
11402 10:03:37.292520 file ../lib/drmtest.c:721:
11403 10:03:37.295431 Test requirement: is_i915_device(fd)
11404 10:03:37.302646 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11405 10:03:37.306124 Test requirement: is_i915_device(fd)
11406 10:03:37.315703 No KMS driver or no outputs, pipes: <14>[ 21.941273] [IGT] kms_addfb_basic: executing
11407 10:03:37.316217 8, outputs: 0
11408 10:03:37.322575 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11409 10:03:37.328415 Opened device: /<14>[ 21.954376] [IGT] kms_addfb_basic: starting subtest bad-pitch-256
11410 10:03:37.332292 dev/dri/card0
11411 10:03:37.332761 Starting subtest: bad-pitch-256
11412 10:03:37.342070 [1mSubtest bad-pitch-256: SUCCESS (0.000s)[0m<14>[ 21.969250] [IGT] kms_addfb_basic: exiting, ret=0
11413 10:03:37.342498
11414 10:03:37.355229 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:7<8>[ 21.981303] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-256 RESULT=pass>
11415 10:03:37.356010 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-256 RESULT=pass
11417 10:03:37.358913 21:
11418 10:03:37.361661 Test requirement: is_i915_device(fd)
11419 10:03:37.368003 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11420 10:03:37.371462 Test requirement: is_i915_device(fd)
11421 10:03:37.378357 No KMS driver or no outputs, pipes: 8, outpu<14>[ 22.006556] [IGT] kms_addfb_basic: executing
11422 10:03:37.381689 ts: 0
11423 10:03:37.384694 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11424 10:03:37.394344 Opened device: /<14>[ 22.019303] [IGT] kms_addfb_basic: starting subtest bad-pitch-1024
11425 10:03:37.394791 dev/dri/card0
11426 10:03:37.397882 Starting subtest: bad-pitch-1024
11427 10:03:37.407681 [1mSubtest bad-pitch-1024: SUCCESS (0.000s)[<14>[ 22.033411] [IGT] kms_addfb_basic: exiting, ret=0
11428 10:03:37.408112 0m
11429 10:03:37.421796 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c<8>[ 22.045408] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-1024 RESULT=pass>
11430 10:03:37.422234 :721:
11431 10:03:37.422866 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-1024 RESULT=pass
11433 10:03:37.424232 Test requirement: is_i915_device(fd)
11434 10:03:37.430972 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11435 10:03:37.434732 Test requirement: is_i915_device(fd)
11436 10:03:37.444252 No KMS driver or no outputs, pipes: 8, out<14>[ 22.070545] [IGT] kms_addfb_basic: executing
11437 10:03:37.444686 puts: 0
11438 10:03:37.450832 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11439 10:03:37.457997 Opened device: /<14>[ 22.083717] [IGT] kms_addfb_basic: starting subtest bad-pitch-999
11440 10:03:37.461090 dev/dri/card0
11441 10:03:37.461515 Starting subtest: bad-pitch-999
11442 10:03:37.470902 [1mSubtest bad-pitch-999: SUCCESS (0.000s)[0m<14>[ 22.097887] [IGT] kms_addfb_basic: exiting, ret=0
11443 10:03:37.471333
11444 10:03:37.484127 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:7<8>[ 22.109717] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-999 RESULT=pass>
11445 10:03:37.484641 21:
11446 10:03:37.485370 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-999 RESULT=pass
11448 10:03:37.487916 Test requirement: is_i915_device(fd)
11449 10:03:37.497186 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11450 10:03:37.500521 Test requirement: is_i915_device(fd)
11451 10:03:37.504177 No KMS driver or no outputs, pipes: 8, outputs: 0
11452 10:03:37.507521 <14>[ 22.136088] [IGT] kms_addfb_basic: executing
11453 10:03:37.513878 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11454 10:03:37.517369 Opened device: /dev/dri/card0
11455 10:03:37.523903 <14>[ 22.148364] [IGT] kms_addfb_basic: starting subtest bad-pitch-65536
11456 10:03:37.527330 Starting subtest: bad-pitch-65536
11457 10:03:37.530277 [1mSubtest bad-pitch-65536: SUCCESS (0.000s)[0m
11458 10:03:37.536934 Test requirement<14>[ 22.163670] [IGT] kms_addfb_basic: exiting, ret=0
11459 10:03:37.543488 not met in function igt_require_i915, file ../lib/drmtest.c:721:
11460 10:03:37.550064 Test requirem<8>[ 22.176081] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-65536 RESULT=pass>
11461 10:03:37.550806 Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-65536 RESULT=pass
11463 10:03:37.553688 ent: is_i915_device(fd)
11464 10:03:37.560254 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11465 10:03:37.563832 Test requirement: is_i915_device(fd)
11466 10:03:37.569951 No KMS driver or no outputs, pipes: 8, outputs: 0
11467 10:03:37.573753 <14>[ 22.202498] [IGT] kms_addfb_basic: executing
11468 10:03:37.580459 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11469 10:03:37.583903 Opened device: /dev/dri/card0
11470 10:03:37.590115 <14>[ 22.217052] [IGT] kms_addfb_basic: starting subtest invalid-get-prop-any
11471 10:03:37.596733 Starting subtest: invalid-get-prop-any
11472 10:03:37.603517 [1mSubtest invalid-get-<14>[ 22.229292] [IGT] kms_addfb_basic: exiting, ret=0
11473 10:03:37.607274 prop-any: SUCCESS (0.000s)[0m
11474 10:03:37.616666 Test requirement not met in function igt_require<8>[ 22.241243] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop-any RESULT=pass>
11475 10:03:37.617394 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop-any RESULT=pass
11477 10:03:37.620204 _i915, file ../lib/drmtest.c:721:
11478 10:03:37.623834 Test requirement: is_i915_device(fd)
11479 10:03:37.630299 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11480 10:03:37.633636 Test requirement: is_i915_device(fd)
11481 10:03:37.639893 No KMS driver or no outputs, p<14>[ 22.267979] [IGT] kms_addfb_basic: executing
11482 10:03:37.643305 ipes: 8, outputs: 0
11483 10:03:37.650065 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11484 10:03:37.650492 Opened device: /dev/dri/card0
11485 10:03:37.656544 <14>[ 22.283501] [IGT] kms_addfb_basic: starting subtest invalid-get-prop
11486 10:03:37.660262 Starting subtest: invalid-get-prop
11487 10:03:37.669816 [1mSubtest invalid-get-prop<14>[ 22.295539] [IGT] kms_addfb_basic: exiting, ret=0
11488 10:03:37.670264 : SUCCESS (0.000s)[0m
11489 10:03:37.683590 Test requirement not met in function igt_require_i915, f<8>[ 22.307273] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop RESULT=pass>
11490 10:03:37.684293 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop RESULT=pass
11492 10:03:37.686263 ile ../lib/drmtest.c:721:
11493 10:03:37.689836 Test requirement: is_i915_device(fd)
11494 10:03:37.696730 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11495 10:03:37.700065 Test requirement: is_i915_device(fd)
11496 10:03:37.706392 No KMS driver or no outputs, pipes: 8,<14>[ 22.333655] [IGT] kms_addfb_basic: executing
11497 10:03:37.709559 outputs: 0
11498 10:03:37.713232 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11499 10:03:37.716644 Opened device: /dev/dri/card0
11500 10:03:37.723286 <14>[ 22.349444] [IGT] kms_addfb_basic: starting subtest invalid-set-prop-any
11501 10:03:37.726431 Starting subtest: invalid-set-prop-any
11502 10:03:37.736441 [1mSubtest invalid-set-<14>[ 22.361698] [IGT] kms_addfb_basic: exiting, ret=0
11503 10:03:37.736924 prop-any: SUCCESS (0.000s)[0m
11504 10:03:37.749498 Test requirement not met in function igt_require<8>[ 22.373394] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop-any RESULT=pass>
11505 10:03:37.749858 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop-any RESULT=pass
11507 10:03:37.753226 _i915, file ../lib/drmtest.c:721:
11508 10:03:37.756132 Test requirement: is_i915_device(fd)
11509 10:03:37.763079 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11510 10:03:37.766246 Test requirement: is_i915_device(fd)
11511 10:03:37.773037 No KMS driver or no outputs, p<14>[ 22.400324] [IGT] kms_addfb_basic: executing
11512 10:03:37.776563 ipes: 8, outputs: 0
11513 10:03:37.779712 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11514 10:03:37.783038 Opened device: /dev/dri/card0
11515 10:03:37.789829 <14>[ 22.416069] [IGT] kms_addfb_basic: starting subtest invalid-set-prop
11516 10:03:37.792756 Starting subtest: invalid-set-prop
11517 10:03:37.802333 [1mSubtest invalid-set-prop<14>[ 22.428028] [IGT] kms_addfb_basic: exiting, ret=0
11518 10:03:37.802417 : SUCCESS (0.000s)[0m
11519 10:03:37.815822 Test requirement not met in function igt_require_i915, f<8>[ 22.439850] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop RESULT=pass>
11520 10:03:37.816083 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop RESULT=pass
11522 10:03:37.818890 ile ../lib/drmtest.c:721:
11523 10:03:37.822367 Test requirement: is_i915_device(fd)
11524 10:03:37.828651 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11525 10:03:37.832122 Test requirement: is_i915_device(fd)
11526 10:03:37.838857 No KMS driver or no outputs, pipes: 8,<14>[ 22.466273] [IGT] kms_addfb_basic: executing
11527 10:03:37.842315 outputs: 0
11528 10:03:37.845793 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11529 10:03:37.848662 Opened device: /dev/dri/card0
11530 10:03:37.856649 <14>[ 22.484296] [IGT] kms_addfb_basic: starting subtest master-rmfb
11531 10:03:37.860272 Starting subtest: master-rmfb
11532 10:03:37.866993 [1mSubtest maste<14>[ 22.493534] [IGT] kms_addfb_basic: exiting, ret=0
11533 10:03:37.869999 r-rmfb: SUCCESS (0.000s)[0m
11534 10:03:37.880639 Test requirement not met in function igt_require_i<8>[ 22.506016] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=master-rmfb RESULT=pass>
11535 10:03:37.881408 Received signal: <TESTCASE> TEST_CASE_ID=master-rmfb RESULT=pass
11537 10:03:37.883436 915, file ../lib/drmtest.c:721:
11538 10:03:37.886688 Test requirement: is_i915_device(fd)
11539 10:03:37.893214 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11540 10:03:37.897107 Test requirement: is_i915_device(fd)
11541 10:03:37.906780 No KMS driver or no outputs, pip<14>[ 22.531981] [IGT] kms_addfb_basic: executing
11542 10:03:37.907233 es: 8, outputs: 0
11543 10:03:37.913335 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11544 10:03:37.916658 Opened device: /dev/dri/card0
11545 10:03:37.928981 <14>[ 22.552498] [IGT] kms_addfb_basic: starting subtest addfb25-modifier-no-flag
11546 10:03:37.934550 Starting subtest<14>[ 22.560408] [IGT] kms_addfb_basic: exiting, ret=0
11547 10:03:37.934641 : addfb25-modifier-no-flag
11548 10:03:37.948290 [1mSubtest addfb25-modifier-no-flag: SUCCESS (0.000<8>[ 22.572863] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-modifier-no-flag RESULT=pass>
11549 10:03:37.948376 s)[0m
11550 10:03:37.948619 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-modifier-no-flag RESULT=pass
11552 10:03:37.958325 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11553 10:03:37.961649 Test requirement: is_i915_device(fd)
11554 10:03:37.971448 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:72<14>[ 22.598715] [IGT] kms_addfb_basic: executing
11555 10:03:37.971922 1:
11556 10:03:37.975019 Test requirement: is_i915_device(fd)
11557 10:03:37.981555 No KMS driver or no outputs, pipes: 8, outputs: 0
11558 10:03:37.984618 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11559 10:03:37.994524 Opened device: /dev<14>[ 22.618600] [IGT] kms_addfb_basic: starting subtest addfb25-bad-modifier
11560 10:03:37.994617 /dri/card0
11561 10:03:37.997652 Starting subtest: addfb25-bad-modifier
11562 10:03:38.011217 (kms_addfb_basic:430) CRITICAL: Test assertion failure function addfb25_<14>[ 22.636238] [IGT] kms_addfb_basic: exiting, ret=98
11563 10:03:38.014800 tests, file ../tests/kms_addfb_basic.c:662:
11564 10:03:38.024670 (kms_addfb_basic:430) CRITICAL: Fai<8>[ 22.648863] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-bad-modifier RESULT=fail>
11565 10:03:38.024934 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-bad-modifier RESULT=fail
11567 10:03:38.037722 led assertion: igt_ioctl((fd), ((((2U|1U) << (((0+8)+8)+14)) | ((('d')) << (0+8)) | (((0xB8)) << 0) | ((((sizeof(struct drm_mode_fb_cmd2)))) << ((0+8)+8)))), (&f)) == -1
11568 10:03:38.047465 (kms_addfb_basic:430) CRITICAL: error<14>[ 22.674509] [IGT] kms_addfb_basic: executing
11569 10:03:38.047554 : 0 != -1
11570 10:03:38.051634 Stack trace:
11571 10:03:38.054573 #0 ../lib/igt_core.c:1963 __igt_fail_assert()
11572 10:03:38.058134 #1 [<unknown>+0xe31f47e0]
11573 10:03:38.058575 #2 [<unknown>+0xe31f6278]
11574 10:03:38.061615 #3 [<unknown>+0xe31f167c]
11575 10:03:38.067719 #4 [__libc_st<14>[ 22.694455] [IGT] kms_addfb_basic: exiting, ret=77
11576 10:03:38.068200 art_main+0xe8]
11577 10:03:38.071294 #5 [<unknown>+0xe31f16b4]
11578 10:03:38.074419 #6 [<unknown>+0xe31f16b4]
11579 10:03:38.084034 Subtes<8>[ 22.706232] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-x-tiled-mismatch-legacy RESULT=skip>
11580 10:03:38.084295 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-x-tiled-mismatch-legacy RESULT=skip
11582 10:03:38.087767 t addfb25-bad-modifier failed.
11583 10:03:38.087934 **** DEBUG ****
11584 10:03:38.094195 (kms_addfb_basic:430) ioctl_wrappers-DEBUG: Test requirement passed: igt_has_fb_modifiers(fd)
11585 10:03:38.107753 (kms_addfb_basic:430) CRITICAL: Test assertion failure function <14>[ 22.733074] [IGT] kms_addfb_basic: executing
11586 10:03:38.110740 addfb25_tests, file ../tests/kms_addfb_basic.c:662:
11587 10:03:38.127358 (kms_addfb_basic:430) CRITICAL: Failed assertion: igt_ioctl((fd), ((((2U|1U) << (((0+8)+8)+14)) | ((('d')) << (0+8)) | (((0<14>[ 22.753334] [IGT] kms_addfb_basic: exiting, ret=77
11588 10:03:38.140559 xB8)) << 0) | ((((sizeof(struct drm_mode_fb_cmd2)))) << ((0+8)+8)))), (&f)) == -<8>[ 22.765201] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-x-tiled-legacy RESULT=skip>
11589 10:03:38.140691 1
11590 10:03:38.141047 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-x-tiled-legacy RESULT=skip
11592 10:03:38.147272 (kms_addfb_basic:430) CRITICAL: error: 0 != -1
11593 10:03:38.150485 (kms_addfb_basic:430) igt_core-INFO: Stack trace:
11594 10:03:38.157507 (kms_addfb_basic:430) igt_core-INFO: #0 ../lib/igt_core.c:1963 __igt_fail_assert()
11595 10:03:38.163876 (kms_addfb_basic:430<14>[ 22.791169] [IGT] kms_addfb_basic: executing
11596 10:03:38.167383 ) igt_core-INFO: #1 [<unknown>+0xe31f47e0]
11597 10:03:38.174301 (kms_addfb_basic:430) igt_core-INFO: #2 [<unknown>+0xe31f6278]
11598 10:03:38.184210 (kms_addfb_basic:430) igt_core-INFO: #3 [<unknown>+0xe31f167c]<14>[ 22.811350] [IGT] kms_addfb_basic: exiting, ret=77
11599 10:03:38.184652
11600 10:03:38.190459 (kms_addfb_basic:430) igt_core-INFO: #4 [__libc_start_main+0xe8]
11601 10:03:38.201011 (kms_addfb<8>[ 22.822831] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-framebuffer-vs-set-tiling RESULT=skip>
11602 10:03:38.201711 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-framebuffer-vs-set-tiling RESULT=skip
11604 10:03:38.204057 _basic:430) igt_core-INFO: #5 [<unknown>+0xe31f16b4]
11605 10:03:38.210762 (kms_addfb_basic:430) igt_core-INFO: #6 [<unknown>+0xe31f16b4]
11606 10:03:38.214496 **** END ****
11607 10:03:38.217419 [1mSubtest addfb25-bad-modifier: FAIL (0.009s)[0m
11608 10:03:38.224274 Test requirement<14>[ 22.849885] [IGT] kms_addfb_basic: executing
11609 10:03:38.227106 not met in function igt_require_i915, file ../lib/drmtest.c:721:
11610 10:03:38.231002 Test requirement: is_i915_device(fd)
11611 10:03:38.243798 Test requirement not met in function igt_require_i915, file ../lib/drmt<14>[ 22.869991] [IGT] kms_addfb_basic: exiting, ret=77
11612 10:03:38.244339 est.c:721:
11613 10:03:38.247258 Test requirement: is_i915_device(fd)
11614 10:03:38.257444 No KMS driver or no outputs, p<8>[ 22.881968] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-x-tiled-legacy RESULT=skip>
11615 10:03:38.258166 Received signal: <TESTCASE> TEST_CASE_ID=basic-x-tiled-legacy RESULT=skip
11617 10:03:38.261050 ipes: 8, outputs: 0
11618 10:03:38.267072 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11619 10:03:38.267495 Opened device: /dev/dri/card0
11620 10:03:38.273620 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11621 10:03:38.283678 Test requirement: is_i915<14>[ 22.908933] [IGT] kms_addfb_basic: executing
11622 10:03:38.284121 _device(fd)
11623 10:03:38.290376 [1mSubtest addfb25-x-tiled-mismatch-legacy: SKIP (0.000s)[0m
11624 10:03:38.296910 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11625 10:03:38.303622 Test requirement<14>[ 22.929639] [IGT] kms_addfb_basic: exiting, ret=77
11626 10:03:38.304079 : is_i915_device(fd)
11627 10:03:38.310287 No KMS driver or no outputs, pipes: 8, outputs: 0
11628 10:03:38.317021 IGT-Ver<8>[ 22.941266] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=framebuffer-vs-set-tiling RESULT=skip>
11629 10:03:38.317771 Received signal: <TESTCASE> TEST_CASE_ID=framebuffer-vs-set-tiling RESULT=skip
11631 10:03:38.323722 sion: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11632 10:03:38.326755 Opened device: /dev/dri/card0
11633 10:03:38.333356 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11634 10:03:38.337013 Test requirement: is_i915_device(fd)
11635 10:03:38.340229 <14>[ 22.967546] [IGT] kms_addfb_basic: executing
11636 10:03:38.340873
11637 10:03:38.346601 [1mSubtest addfb25-x-tiled-legacy: SKIP (0.000s)[0m
11638 10:03:38.353361 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11639 10:03:38.356534 Test requirement: is_i915_device(fd)
11640 10:03:38.360190 <14>[ 22.987540] [IGT] kms_addfb_basic: exiting, ret=77
11641 10:03:38.360784
11642 10:03:38.366525 No KMS driver or no outputs, pipes: 8, outputs: 0
11643 10:03:38.377050 IGT-Version: 1.27.1-g766edf9<8>[ 22.999389] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tile-pitch-mismatch RESULT=skip>
11644 10:03:38.377913 Received signal: <TESTCASE> TEST_CASE_ID=tile-pitch-mismatch RESULT=skip
11646 10:03:38.380121 (aarch64) (Linux: 6.1.31 aarch64)
11647 10:03:38.380640 Opened device: /dev/dri/card0
11648 10:03:38.389777 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11649 10:03:38.393599 Test requirement: is_i915_device(fd)
11650 10:03:38.396689 [1mSubtest addfb25-<14>[ 23.024795] [IGT] kms_addfb_basic: executing
11651 10:03:38.403360 framebuffer-vs-set-tiling: SKIP (0.000s)[0m
11652 10:03:38.409874 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11653 10:03:38.412788 Test requirement: is_i915_device(fd)
11654 10:03:38.419839 No KMS dr<14>[ 23.045353] [IGT] kms_addfb_basic: exiting, ret=77
11655 10:03:38.422932 iver or no outputs, pipes: 8, outputs: 0
11656 10:03:38.432730 IGT-Version: 1.27.1-g766edf9 (aarch64)<8>[ 23.057246] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-y-tiled-legacy RESULT=skip>
11657 10:03:38.433048 Received signal: <TESTCASE> TEST_CASE_ID=basic-y-tiled-legacy RESULT=skip
11659 10:03:38.436136 (Linux: 6.1.31 aarch64)
11660 10:03:38.440015 Opened device: /dev/dri/card0
11661 10:03:38.446040 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11662 10:03:38.449692 Test requirement: is_i915_device(fd)
11663 10:03:38.456099 Test requirement not met in function igt_requi<14>[ 23.084032] [IGT] kms_addfb_basic: executing
11664 10:03:38.459225 re_i915, file ../lib/drmtest.c:721:
11665 10:03:38.462621 Test requirement: is_i915_device(fd)
11666 10:03:38.469295 [1mSubtest basic-x-tiled-legacy: SKIP (0.000s)[0m
11667 10:03:38.479004 No KMS driver or no outputs, pipes: 8, outputs: <14>[ 23.104807] [IGT] kms_addfb_basic: exiting, ret=77
11668 10:03:38.479580 0
11669 10:03:38.482987 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11670 10:03:38.492358 Opened device<8>[ 23.116277] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=size-max RESULT=skip>
11671 10:03:38.492951 : /dev/dri/card0
11672 10:03:38.493724 Received signal: <TESTCASE> TEST_CASE_ID=size-max RESULT=skip
11674 10:03:38.499037 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11675 10:03:38.502407 Test requirement: is_i915_device(fd)
11676 10:03:38.512310 Test requirement not met in function igt_require_i915, file ../lib/dr<14>[ 23.141032] [IGT] kms_addfb_basic: executing
11677 10:03:38.515913 mtest.c:721:
11678 10:03:38.519040 Test requirement: is_i915_device(fd)
11679 10:03:38.522660 [1mSubtest framebuffer-vs-set-tiling: SKIP (0.000s)[0m
11680 10:03:38.528783 No KMS driver or no outputs, pipes: 8, outputs: 0
11681 10:03:38.535452 IGT-Version: 1.<14>[ 23.161343] [IGT] kms_addfb_basic: exiting, ret=77
11682 10:03:38.539178 27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11683 10:03:38.542340 Opened device: /dev/dri/card0
11684 10:03:38.549049 <8>[ 23.173308] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=too-wide RESULT=skip>
11685 10:03:38.549876 Received signal: <TESTCASE> TEST_CASE_ID=too-wide RESULT=skip
11687 10:03:38.555734 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11688 10:03:38.558739 Test requirement: is_i915_device(fd)
11689 10:03:38.565380 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11690 10:03:38.572013 Test requirement: is<14>[ 23.198950] [IGT] kms_addfb_basic: executing
11691 10:03:38.575367 _i915_device(fd)
11692 10:03:38.578956 [1mSubtest tile-pitch-mismatch: SKIP (0.000s)[0m
11693 10:03:38.582449 No KMS driver or no outputs, pipes: 8, outputs: 0
11694 10:03:38.592167 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 a<14>[ 23.219715] [IGT] kms_addfb_basic: exiting, ret=77
11695 10:03:38.592647 arch64)
11696 10:03:38.594973 Opened device: /dev/dri/card0
11697 10:03:38.605597 Test requirement not met in function igt<8>[ 23.231163] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=too-high RESULT=skip>
11698 10:03:38.606334 Received signal: <TESTCASE> TEST_CASE_ID=too-high RESULT=skip
11700 10:03:38.608519 _require_i915, file ../lib/drmtest.c:721:
11701 10:03:38.611886 Test requirement: is_i915_device(fd)
11702 10:03:38.622029 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11703 10:03:38.625036 Test requirement: is_i915_device(fd)
11704 10:03:38.631675 [1mSubtest basic-y-ti<14>[ 23.257213] [IGT] kms_addfb_basic: executing
11705 10:03:38.632105 led-legacy: SKIP (0.000s)[0m
11706 10:03:38.638470 No KMS driver or no outputs, pipes: 8, outputs: 0
11707 10:03:38.641473 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11708 10:03:38.645364 Opened device: /dev/dri/card0
11709 10:03:38.651898 <14>[ 23.277768] [IGT] kms_addfb_basic: exiting, ret=77
11710 10:03:38.652330
11711 10:03:38.665123 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:72<8>[ 23.289287] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bo-too-small RESULT=skip>
11712 10:03:38.665600 1:
11713 10:03:38.666234 Received signal: <TESTCASE> TEST_CASE_ID=bo-too-small RESULT=skip
11715 10:03:38.668106 Test requirement: is_i915_device(fd)
11716 10:03:38.675102 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11717 10:03:38.678249 Test requirement: is_i915_device(fd)
11718 10:03:38.687678 No KMS driver or no outputs, pipes: 8, output<14>[ 23.314524] [IGT] kms_addfb_basic: executing
11719 10:03:38.687764 s: 0
11720 10:03:38.690964 [1mSubtest size-max: SKIP (0.000s)[0m
11721 10:03:38.697718 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11722 10:03:38.701339 Opened device: /dev/dri/card0
11723 10:03:38.707647 Test requirement not met in functi<14>[ 23.334672] [IGT] kms_addfb_basic: exiting, ret=77
11724 10:03:38.711032 on igt_require_i915, file ../lib/drmtest.c:721:
11725 10:03:38.721201 Test requirement: is_i915_devic<8>[ 23.346509] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=small-bo RESULT=skip>
11726 10:03:38.721308 e(fd)
11727 10:03:38.721569 Received signal: <TESTCASE> TEST_CASE_ID=small-bo RESULT=skip
11729 10:03:38.727262 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11730 10:03:38.730998 Test requirement: is_i915_device(fd)
11731 10:03:38.737701 No KMS driver or no outputs, pipes: 8, outputs: 0
11732 10:03:38.744480 [1mSubtest too-wide: SKIP (0<14>[ 23.371121] [IGT] kms_addfb_basic: executing
11733 10:03:38.744570 .000s)[0m
11734 10:03:38.750569 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11735 10:03:38.754235 Opened device: /dev/dri/card0
11736 10:03:38.763915 Test requirement not met in function igt_require_i915, file ../lib/dr<14>[ 23.391589] [IGT] kms_addfb_basic: exiting, ret=77
11737 10:03:38.764020 mtest.c:721:
11738 10:03:38.767471 Test requirement: is_i915_device(fd)
11739 10:03:38.780476 Test requirement not met in <8>[ 23.403387] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bo-too-small-due-to-tiling RESULT=skip>
11740 10:03:38.780726 Received signal: <TESTCASE> TEST_CASE_ID=bo-too-small-due-to-tiling RESULT=skip
11742 10:03:38.783793 function igt_require_i915, file ../lib/drmtest.c:721:
11743 10:03:38.787177 Test requirement: is_i915_device(fd)
11744 10:03:38.790792 No KMS driver or no outputs, pipes: 8, outputs: 0
11745 10:03:38.797076 [1mSubtest too-high: SKIP (0.000s)[0m
11746 10:03:38.803916 IGT-Version: 1.27.1-g76<14>[ 23.429676] [IGT] kms_addfb_basic: executing
11747 10:03:38.807243 6edf9 (aarch64) (Linux: 6.1.31 aarch64)
11748 10:03:38.807449 Opened device: /dev/dri/card0
11749 10:03:38.816781 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11750 10:03:38.823637 Test requirement: is_<14>[ 23.449741] [IGT] kms_addfb_basic: exiting, ret=77
11751 10:03:38.823814 i915_device(fd)
11752 10:03:38.836852 Test requirement not met in function igt_require_i915, file ../<8>[ 23.461879] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-y-tiled-legacy RESULT=skip>
11753 10:03:38.837314 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-y-tiled-legacy RESULT=skip
11755 10:03:38.840344 lib/drmtest.c:721:
11756 10:03:38.843914 Test requirement: is_i915_device(fd)
11757 10:03:38.847103 No KMS driver or no outputs, pipes: 8, outputs: 0
11758 10:03:38.850311 [1mSubtest bo-too-small: SKIP (0.000s)[0m
11759 10:03:38.860561 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 <14>[ 23.487429] [IGT] kms_addfb_basic: executing
11760 10:03:38.861084 aarch64)
11761 10:03:38.863633 Opened device: /dev/dri/card0
11762 10:03:38.870958 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11763 10:03:38.873889 Test requirement: is_i915_device(fd)
11764 10:03:38.880189 Test requireme<14>[ 23.507705] [IGT] kms_addfb_basic: exiting, ret=77
11765 10:03:38.887050 nt not met in function igt_require_i915, file ../lib/drmtest.c:721:
11766 10:03:38.897266 Test requir<8>[ 23.519664] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-yf-tiled-legacy RESULT=skip>
11767 10:03:38.897823 ement: is_i915_device(fd)
11768 10:03:38.898562 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-yf-tiled-legacy RESULT=skip
11770 10:03:38.903816 No KMS driver or no outputs, pipes: 8, outputs: 0
11771 10:03:38.906921 [1mSubtest small-bo: SKIP (0.000s)[0m
11772 10:03:38.910434 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11773 10:03:38.920340 Opened device: /dev/dri/c<14>[ 23.545491] [IGT] kms_addfb_basic: executing
11774 10:03:38.920927 ard0
11775 10:03:38.927115 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11776 10:03:38.930322 Test requirement: is_i915_device(fd)
11777 10:03:38.940319 Test requirement not met in function igt_require_<14>[ 23.565798] [IGT] kms_addfb_basic: exiting, ret=77
11778 10:03:38.943233 i915, file ../lib/drmtest.c:721:
11779 10:03:38.946881 Test requirement: is_i915_device(fd)
11780 10:03:38.953419 No KMS d<8>[ 23.577742] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-y-tiled-small-legacy RESULT=skip>
11781 10:03:38.954115 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-y-tiled-small-legacy RESULT=skip
11783 10:03:38.957157 river or no outputs, pipes: 8, outputs: 0
11784 10:03:38.963492 [1mSubtest bo-too-small-due-to-tiling: SKIP (0.000s)[0m
11785 10:03:38.970737 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11786 10:03:38.971168 Opened device: /dev/dri/card0
11787 10:03:38.977069 Test requir<14>[ 23.603887] [IGT] kms_addfb_basic: executing
11788 10:03:38.983496 ement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11789 10:03:38.986492 Test requirement: is_i915_device(fd)
11790 10:03:38.996750 Test requirement not met in function igt_require_i915, file ../lib<14>[ 23.624330] [IGT] kms_addfb_basic: exiting, ret=77
11791 10:03:38.999692 /drmtest.c:721:
11792 10:03:39.003533 Test requirement: is_i915_device(fd)
11793 10:03:39.012961 No KMS driver or no outpu<8>[ 23.636239] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-4-tiled RESULT=skip>
11794 10:03:39.013403 ts, pipes: 8, outputs: 0
11795 10:03:39.014036 Received signal: <TESTCASE> TEST_CASE_ID=addfb25-4-tiled RESULT=skip
11797 10:03:39.019800 [1mSu<8>[ 23.645824] <LAVA_SIGNAL_TESTSET STOP>
11798 10:03:39.020505 Received signal: <TESTSET> STOP
11799 10:03:39.020899 Closing test_set kms_addfb_basic
11800 10:03:39.023490 btest addfb25-y-tiled-legacy: SKIP (0.000s)[0m
11801 10:03:39.030128 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11802 10:03:39.030556 Opened device: /dev/dri/card0
11803 10:03:39.039648 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11804 10:03:39.046125 Test requirement: is_i915_dev<8>[ 23.672371] <LAVA_SIGNAL_TESTSET START kms_atomic>
11805 10:03:39.046209 ice(fd)
11806 10:03:39.046447 Received signal: <TESTSET> START kms_atomic
11807 10:03:39.046516 Starting test_set kms_atomic
11808 10:03:39.052688 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11809 10:03:39.056232 Test requirement: is_i915_device(fd)
11810 10:03:39.062821 No KMS driver or no outputs, pipes: 8, outputs: 0
11811 10:03:39.069008 [1mSubtest addfb25-yf-tile<14>[ 23.696111] [IGT] kms_atomic: executing
11812 10:03:39.072702 d-legacy: SKIP (<14>[ 23.701321] [IGT] kms_atomic: exiting, ret=77
11813 10:03:39.075741 0.000s)[0m
11814 10:03:39.079213 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11815 10:03:39.089464 Ope<8>[ 23.712528] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-overlay-legacy RESULT=skip>
11816 10:03:39.089853 Received signal: <TESTCASE> TEST_CASE_ID=plane-overlay-legacy RESULT=skip
11818 10:03:39.092534 ned device: /dev/dri/card0
11819 10:03:39.099204 Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11820 10:03:39.102858 Test requirement: is_i915_device(fd)
11821 10:03:39.109217 Test requirement not met in function igt_require_i915, file<14>[ 23.738597] [IGT] kms_atomic: executing
11822 10:03:39.116290 ../lib/drmtest.<14>[ 23.744180] [IGT] kms_atomic: exiting, ret=77
11823 10:03:39.119335 c:721:
11824 10:03:39.122894 Test requirement: is_i915_device(fd)
11825 10:03:39.132735 No KMS driver or no outputs, pipes<8>[ 23.755610] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-primary-legacy RESULT=skip>
11826 10:03:39.133185 : 8, outputs: 0
11827 10:03:39.133773 Received signal: <TESTCASE> TEST_CASE_ID=plane-primary-legacy RESULT=skip
11829 10:03:39.139279 [1mSubtest addfb25-y-tiled-small-legacy: SKIP (0.000s)[0m
11830 10:03:39.142621 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11831 10:03:39.146078 Opened device: /dev/dri/card0
11832 10:03:39.152487 Test requirement not met in functio<14>[ 23.781434] [IGT] kms_atomic: executing
11833 10:03:39.159155 n igt_require_i9<14>[ 23.787147] [IGT] kms_atomic: exiting, ret=77
11834 10:03:39.162721 15, file ../lib/drmtest.c:721:
11835 10:03:39.165958 Test requirement: is_i915_device(fd)
11836 10:03:39.176056 Test requi<8>[ 23.798572] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-primary-overlay-mutable-zpos RESULT=skip>
11837 10:03:39.176741 Received signal: <TESTCASE> TEST_CASE_ID=plane-primary-overlay-mutable-zpos RESULT=skip
11839 10:03:39.182744 rement not met in function igt_require_i915, file ../lib/drmtest.c:721:
11840 10:03:39.185642 Test requirement: is_i915_device(fd)
11841 10:03:39.189118 No KMS driver or no outputs, pipes: 8, outputs: 0
11842 10:03:39.199289 [1mSubtest addfb25-4-tiled: SKIP (0.000s)[0m<14>[ 23.825732] [IGT] kms_atomic: executing
11843 10:03:39.199717
11844 10:03:39.205091 IGT-Version: 1<14>[ 23.831454] [IGT] kms_atomic: exiting, ret=77
11845 10:03:39.209170 .27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11846 10:03:39.212381 Opened device: /dev/dri/card0
11847 10:03:39.218790 <8>[ 23.842685] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-immutable-zpos RESULT=skip>
11848 10:03:39.218993
11849 10:03:39.219311 Received signal: <TESTCASE> TEST_CASE_ID=plane-immutable-zpos RESULT=skip
11851 10:03:39.222053 No KMS driver or no outputs, pipes: 8, outputs: 0
11852 10:03:39.228606 [1mSubtest plane-overlay-legacy: SKIP (0.000s)[0m
11853 10:03:39.235168 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11854 10:03:39.235252 Opened device: /dev/dri/card0
11855 10:03:39.241824 No KMS driver or no outp<14>[ 23.869724] [IGT] kms_atomic: executing
11856 10:03:39.248515 uts, pipes: 8, o<14>[ 23.876274] [IGT] kms_atomic: exiting, ret=77
11857 10:03:39.248599 utputs: 0
11858 10:03:39.255073 [1mSubtest plane-primary-legacy: SKIP (0.000s)[0m
11859 10:03:39.261946 IGT-Version: 1.2<8>[ 23.888251] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test-only RESULT=skip>
11860 10:03:39.262201 Received signal: <TESTCASE> TEST_CASE_ID=test-only RESULT=skip
11862 10:03:39.265398 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11863 10:03:39.268218 Opened device: /dev/dri/card0
11864 10:03:39.275034 No KMS driver or no outputs, pipes: 8, outputs: 0
11865 10:03:39.278572 [1mSubtest plane-primary-overlay-mutable-zpos: SKIP (0.000s)[0m
11866 10:03:39.284658 IGT-Version<14>[ 23.912025] [IGT] kms_atomic: executing
11867 10:03:39.291767 : 1.27.1-g766edf<14>[ 23.917975] [IGT] kms_atomic: exiting, ret=77
11868 10:03:39.295435 9 (aarch64) (Linux: 6.1.31 aarch64)
11869 10:03:39.299078 Opened device: /dev/dri/card0
11870 10:03:39.304758 No KMS drive<8>[ 23.929092] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-cursor-legacy RESULT=skip>
11871 10:03:39.305477 Received signal: <TESTCASE> TEST_CASE_ID=plane-cursor-legacy RESULT=skip
11873 10:03:39.308579 r or no outputs, pipes: 8, outputs: 0
11874 10:03:39.315415 [1mSubtest plane-immutable-zpos: SKIP (0.000s)[0m
11875 10:03:39.318097 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11876 10:03:39.321260 Opened device: /dev/dri/card0
11877 10:03:39.328716 No KMS driver or no o<14>[ 23.956010] [IGT] kms_atomic: executing
11878 10:03:39.334987 utputs, pipes: 8<14>[ 23.961041] [IGT] kms_atomic: exiting, ret=77
11879 10:03:39.335434 , outputs: 0
11880 10:03:39.337998 [1mSubtest test-only: SKIP (0.000s)[0m
11881 10:03:39.347929 IGT-Version: 1.27.1-g766<8>[ 23.972147] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-invalid-params RESULT=skip>
11882 10:03:39.348616 Received signal: <TESTCASE> TEST_CASE_ID=plane-invalid-params RESULT=skip
11884 10:03:39.351170 edf9 (aarch64) (Linux: 6.1.31 aarch64)
11885 10:03:39.354937 Opened device: /dev/dri/card0
11886 10:03:39.358108 No KMS driver or no outputs, pipes: 8, outputs: 0
11887 10:03:39.364617 [1mSubtest plane-cursor-legacy: SKIP (0.000s)[0m
11888 10:03:39.371439 IGT-Version: 1.27.1-g766edf9 (aarc<14>[ 23.998169] [IGT] kms_atomic: executing
11889 10:03:39.377879 h64) (Linux: 6.1<14>[ 24.003861] [IGT] kms_atomic: exiting, ret=77
11890 10:03:39.378313 .31 aarch64)
11891 10:03:39.381292 Opened device: /dev/dri/card0
11892 10:03:39.390769 No KMS driver or no outputs, pipes:<8>[ 24.015130] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-invalid-params-fence RESULT=skip>
11893 10:03:39.391028 Received signal: <TESTCASE> TEST_CASE_ID=plane-invalid-params-fence RESULT=skip
11895 10:03:39.394212 8, outputs: 0
11896 10:03:39.397900 [1mSubtest plane-invalid-params: SKIP (0.000s)[0m
11897 10:03:39.404794 IGT-Version: 1.27.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11898 10:03:39.407732 Opened device: /dev/dri/card0
11899 10:03:39.414767 No KMS driver or no outputs, pipes: 8, outpu<14>[ 24.041659] [IGT] kms_atomic: executing
11900 10:03:39.415205 ts: 0
11901 10:03:39.421386 [1mSubte<14>[ 24.047636] [IGT] kms_atomic: exiting, ret=77
11902 10:03:39.424085 st plane-invalid-params-fence: SKIP (0.000s)[0m
11903 10:03:39.434606 IGT-Version: 1.27.1-g766edf9 (<8>[ 24.058625] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-invalid-params RESULT=skip>
11904 10:03:39.435302 Received signal: <TESTCASE> TEST_CASE_ID=crtc-invalid-params RESULT=skip
11906 10:03:39.437245 aarch64) (Linux: 6.1.31 aarch64)
11907 10:03:39.440976 Opened device: /dev/dri/card0
11908 10:03:39.444071 No KMS driver or no outputs, pipes: 8, outputs: 0
11909 10:03:39.450628 [1mSubtest crtc-invalid-params: SKIP (0.000s)[0m
11910 10:03:39.457395 <14>[ 24.085407] [IGT] kms_atomic: executing
11911 10:03:39.464184 IGT-Version: 1.2<14>[ 24.090375] [IGT] kms_atomic: exiting, ret=77
11912 10:03:39.467323 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11913 10:03:39.470581 Opened device: /dev/dri/card0
11914 10:03:39.477864 N<8>[ 24.102045] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-invalid-params-fence RESULT=skip>
11915 10:03:39.478121 Received signal: <TESTCASE> TEST_CASE_ID=crtc-invalid-params-fence RESULT=skip
11917 10:03:39.484211 o KMS driver or no outputs, pipes: 8, outputs: 0
11918 10:03:39.487019 [1mSubtest crtc-invalid-params-fence: SKIP (0.000s)[0m
11919 10:03:39.501806 <14>[ 24.129354] [IGT] kms_atomic: executing
11920 10:03:39.508616 IGT-Version: 1.2<14>[ 24.134328] [IGT] kms_atomic: exiting, ret=77
11921 10:03:39.511537 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11922 10:03:39.515271 Opened device: /dev/dri/card0
11923 10:03:39.521709 N<8>[ 24.145847] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=atomic-invalid-params RESULT=skip>
11924 10:03:39.521966 Received signal: <TESTCASE> TEST_CASE_ID=atomic-invalid-params RESULT=skip
11926 10:03:39.524669 o KMS driver or no outputs, pipes: 8, outputs: 0
11927 10:03:39.531370 [1mSubtest atomic-invalid-params: SKIP (0.000s)[0m
11928 10:03:39.544151 <14>[ 24.171992] [IGT] kms_atomic: executing
11929 10:03:39.550748 IGT-Version: 1.2<14>[ 24.176699] [IGT] kms_atomic: exiting, ret=77
11930 10:03:39.554017 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11931 10:03:39.557717 Opened device: /dev/dri/card0
11932 10:03:39.564282 N<8>[ 24.188103] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=atomic_plane_damage RESULT=skip>
11933 10:03:39.564579 Received signal: <TESTCASE> TEST_CASE_ID=atomic_plane_damage RESULT=skip
11935 10:03:39.570605 o KMS driver or no outputs, pipe<8>[ 24.198600] <LAVA_SIGNAL_TESTSET STOP>
11936 10:03:39.570858 Received signal: <TESTSET> STOP
11937 10:03:39.570927 Closing test_set kms_atomic
11938 10:03:39.574117 s: 8, outputs: 0
11939 10:03:39.577329 [1mSubtest atomic_plane_damage: SKIP (0.000s)[0m
11940 10:03:39.597373 <8>[ 24.225414] <LAVA_SIGNAL_TESTSET START kms_flip_event_leak>
11941 10:03:39.597635 Received signal: <TESTSET> START kms_flip_event_leak
11942 10:03:39.597712 Starting test_set kms_flip_event_leak
11943 10:03:39.621663 <14>[ 24.248993] [IGT] kms_flip_event_leak: executing
11944 10:03:39.628234 IGT-Version: 1.2<14>[ 24.254692] [IGT] kms_flip_event_leak: exiting, ret=77
11945 10:03:39.631426 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
11946 10:03:39.634896 Opened device: /dev/dri/card0
11947 10:03:39.641435 N<8>[ 24.266973] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=skip>
11948 10:03:39.642114 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=skip
11950 10:03:39.648194 o KMS driver or no outputs, pipe<8>[ 24.276383] <LAVA_SIGNAL_TESTSET STOP>
11951 10:03:39.648892 Received signal: <TESTSET> STOP
11952 10:03:39.649246 Closing test_set kms_flip_event_leak
11953 10:03:39.651612 s: 8, outputs: 0
11954 10:03:39.654838 [1mSubtest basic: SKIP (0.000s)[0m
11955 10:03:39.674033 <8>[ 24.301902] <LAVA_SIGNAL_TESTSET START kms_prop_blob>
11956 10:03:39.674306 Received signal: <TESTSET> START kms_prop_blob
11957 10:03:39.674386 Starting test_set kms_prop_blob
11958 10:03:39.697386 <14>[ 24.325052] [IGT] kms_prop_blob: executing
11959 10:03:39.704175 IGT-Version: 1.2<14>[ 24.330161] [IGT] kms_prop_blob: starting subtest basic
11960 10:03:39.710682 7.1-g766edf9 (aa<14>[ 24.337046] [IGT] kms_prop_blob: exiting, ret=0
11961 10:03:39.714231 rch64) (Linux: 6.1.31 aarch64)
11962 10:03:39.717723 Opened device: /dev/dri/card0
11963 10:03:39.724270 Starting subtest:<8>[ 24.348928] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=pass>
11964 10:03:39.724426 basic
11965 10:03:39.724739 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=pass
11967 10:03:39.727253 [1mSubtest basic: SUCCESS (0.000s)[0m
11968 10:03:39.746467 <14>[ 24.374369] [IGT] kms_prop_blob: executing
11969 10:03:39.753130 IGT-Version: 1.2<14>[ 24.379432] [IGT] kms_prop_blob: starting subtest blob-prop-core
11970 10:03:39.760127 7.1-g766edf9 (aa<14>[ 24.386963] [IGT] kms_prop_blob: exiting, ret=0
11971 10:03:39.763685 rch64) (Linux: 6.1.31 aarch64)
11972 10:03:39.766950 Opened device: /dev/dri/card0
11973 10:03:39.773605 Starting subtest:<8>[ 24.399522] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-core RESULT=pass>
11974 10:03:39.774244 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-core RESULT=pass
11976 10:03:39.776987 blob-prop-core
11977 10:03:39.780450 [1mSubtest blob-prop-core: SUCCESS (0.000s)[0m
11978 10:03:39.797901 <14>[ 24.425565] [IGT] kms_prop_blob: executing
11979 10:03:39.804553 IGT-Version: 1.2<14>[ 24.430588] [IGT] kms_prop_blob: starting subtest blob-prop-validate
11980 10:03:39.811244 7.1-g766edf9 (aa<14>[ 24.438609] [IGT] kms_prop_blob: exiting, ret=0
11981 10:03:39.814849 rch64) (Linux: 6.1.31 aarch64)
11982 10:03:39.817746 Opened device: /dev/dri/card0
11983 10:03:39.827123 Starting subtest:<8>[ 24.450588] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-validate RESULT=pass>
11984 10:03:39.827214 blob-prop-validate
11985 10:03:39.827457 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-validate RESULT=pass
11987 10:03:39.834268 [1mSubtest blob-prop-validate: SUCCESS (0.000s)[0m
11988 10:03:39.849664 <14>[ 24.477326] [IGT] kms_prop_blob: executing
11989 10:03:39.856362 IGT-Version: 1.2<14>[ 24.482223] [IGT] kms_prop_blob: starting subtest blob-prop-lifetime
11990 10:03:39.862915 7.1-g766edf9 (aa<14>[ 24.490558] [IGT] kms_prop_blob: exiting, ret=0
11991 10:03:39.865873 rch64) (Linux: 6.1.31 aarch64)
11992 10:03:39.869604 Opened device: /dev/dri/card0
11993 10:03:39.879245 Starting subtest:<8>[ 24.502559] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-lifetime RESULT=pass>
11994 10:03:39.879355 blob-prop-lifetime
11995 10:03:39.879624 Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-lifetime RESULT=pass
11997 10:03:39.885722 [1mSubtest blob-prop-lifetime: SUCCESS (0.000s)[0m
11998 10:03:39.900076 <14>[ 24.528188] [IGT] kms_prop_blob: executing
11999 10:03:39.906740 IGT-Version: 1.2<14>[ 24.533173] [IGT] kms_prop_blob: starting subtest blob-multiple
12000 10:03:39.913731 7.1-g766edf9 (aa<14>[ 24.540902] [IGT] kms_prop_blob: exiting, ret=0
12001 10:03:39.916766 rch64) (Linux: 6.1.31 aarch64)
12002 10:03:39.920221 Opened device: /dev/dri/card0
12003 10:03:39.926662 Starting subtest:<8>[ 24.552884] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-multiple RESULT=pass>
12004 10:03:39.926936 Received signal: <TESTCASE> TEST_CASE_ID=blob-multiple RESULT=pass
12006 10:03:39.930399 blob-multiple
12007 10:03:39.933699 [1mSubtest blob-multiple: SUCCESS (0.000s)[0m
12008 10:03:39.950158 <14>[ 24.577940] [IGT] kms_prop_blob: executing
12009 10:03:39.956689 IGT-Version: 1.2<14>[ 24.582781] [IGT] kms_prop_blob: starting subtest invalid-get-prop-any
12010 10:03:39.963506 7.1-g766edf9 (aa<14>[ 24.590964] [IGT] kms_prop_blob: exiting, ret=0
12011 10:03:39.966978 rch64) (Linux: 6.1.31 aarch64)
12012 10:03:39.969931 Opened device: /dev/dri/card0
12013 10:03:39.976947 S<8>[ 24.602572] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop-any RESULT=pass>
12014 10:03:39.977207 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop-any RESULT=pass
12016 10:03:39.980361 tarting subtest: invalid-get-prop-any
12017 10:03:39.987066 [1mSubtest invalid-get-prop-any: SUCCESS (0.000s)[0m
12018 10:03:40.000848 <14>[ 24.628562] [IGT] kms_prop_blob: executing
12019 10:03:40.007834 IGT-Version: 1.2<14>[ 24.633424] [IGT] kms_prop_blob: starting subtest invalid-get-prop
12020 10:03:40.014739 7.1-g766edf9 (aa<14>[ 24.641562] [IGT] kms_prop_blob: exiting, ret=0
12021 10:03:40.017815 rch64) (Linux: 6.1.31 aarch64)
12022 10:03:40.021218 Opened device: /dev/dri/card0
12023 10:03:40.028124 Starting subtest:<8>[ 24.653126] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop RESULT=pass>
12024 10:03:40.028836 Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop RESULT=pass
12026 10:03:40.030926 invalid-get-prop
12027 10:03:40.034163 [1mSubtest invalid-get-prop: SUCCESS (0.000s)[0m
12028 10:03:40.051233 <14>[ 24.678852] [IGT] kms_prop_blob: executing
12029 10:03:40.057660 IGT-Version: 1.2<14>[ 24.683803] [IGT] kms_prop_blob: starting subtest invalid-set-prop-any
12030 10:03:40.064336 7.1-g766edf9 (aa<14>[ 24.692001] [IGT] kms_prop_blob: exiting, ret=0
12031 10:03:40.067935 rch64) (Linux: 6.1.31 aarch64)
12032 10:03:40.071047 Opened device: /dev/dri/card0
12033 10:03:40.080980 Starting subtest:<8>[ 24.703769] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop-any RESULT=pass>
12034 10:03:40.081418 invalid-set-prop-any
12035 10:03:40.082014 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop-any RESULT=pass
12037 10:03:40.087266 [1mSubtest invalid-set-prop-any: SUCCESS (0.000s)[0m
12038 10:03:40.103416 <14>[ 24.730829] [IGT] kms_prop_blob: executing
12039 10:03:40.110356 IGT-Version: 1.2<14>[ 24.735852] [IGT] kms_prop_blob: starting subtest invalid-set-prop
12040 10:03:40.116775 7.1-g766edf9 (aa<14>[ 24.743618] [IGT] kms_prop_blob: exiting, ret=0
12041 10:03:40.120287 rch64) (Linux: 6.1.31 aarch64)
12042 10:03:40.123593 Opened device: /dev/dri/card0
12043 10:03:40.130101 Starting subtest:<8>[ 24.755617] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop RESULT=pass>
12044 10:03:40.130783 Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop RESULT=pass
12046 10:03:40.133321 invalid-set-prop
12047 10:03:40.137134 [1mSubtest i<8>[ 24.765492] <LAVA_SIGNAL_TESTSET STOP>
12048 10:03:40.137806 Received signal: <TESTSET> STOP
12049 10:03:40.138160 Closing test_set kms_prop_blob
12050 10:03:40.143044 nvalid-set-prop: SUCCESS (0.000s)[0m
12051 10:03:40.164913 <8>[ 24.792153] <LAVA_SIGNAL_TESTSET START kms_setmode>
12052 10:03:40.165672 Received signal: <TESTSET> START kms_setmode
12053 10:03:40.166031 Starting test_set kms_setmode
12054 10:03:40.187446 <14>[ 24.815161] [IGT] kms_setmode: executing
12055 10:03:40.194537 IGT-Version: 1.2<14>[ 24.820163] [IGT] kms_setmode: starting subtest basic
12056 10:03:40.201462 7.1-g766edf9 (aa<14>[ 24.827159] [IGT] kms_setmode: exiting, ret=77
12057 10:03:40.204356 rch64) (Linux: 6.1.31 aarch64)
12058 10:03:40.204777 Opened device: /dev/dri/card0
12059 10:03:40.214008 Starting subtest:<8>[ 24.838606] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=skip>
12060 10:03:40.214434 basic
12061 10:03:40.215072 Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=skip
12063 10:03:40.217791 No dynamic tests executed.
12064 10:03:40.220687 [1mSubtest basic: SKIP (0.000s)[0m
12065 10:03:40.236546 <14>[ 24.864330] [IGT] kms_setmode: executing
12066 10:03:40.243480 IGT-Version: 1.2<14>[ 24.869037] [IGT] kms_setmode: starting subtest basic-clone-single-crtc
12067 10:03:40.250320 7.1-g766edf9 (aa<14>[ 24.877474] [IGT] kms_setmode: exiting, ret=77
12068 10:03:40.253191 rch64) (Linux: 6.1.31 aarch64)
12069 10:03:40.256460 Opened device: /dev/dri/card0
12070 10:03:40.266830 Starting subtest:<8>[ 24.889373] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-clone-single-crtc RESULT=skip>
12071 10:03:40.267278 basic-clone-single-crtc
12072 10:03:40.267950 Received signal: <TESTCASE> TEST_CASE_ID=basic-clone-single-crtc RESULT=skip
12074 10:03:40.269784 No dynamic tests executed.
12075 10:03:40.276529 [1mSubtest basic-clone-single-crtc: SKIP (0.000s)[0m
12076 10:03:40.289236 <14>[ 24.916427] [IGT] kms_setmode: executing
12077 10:03:40.295278 IGT-Version: 1.2<14>[ 24.921429] [IGT] kms_setmode: starting subtest invalid-clone-single-crtc
12078 10:03:40.302109 7.1-g766edf9 (aa<14>[ 24.929935] [IGT] kms_setmode: exiting, ret=77
12079 10:03:40.305792 rch64) (Linux: 6.1.31 aarch64)
12080 10:03:40.308767 Opened device: /dev/dri/card0
12081 10:03:40.318943 Starting subtest:<8>[ 24.941605] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-single-crtc RESULT=skip>
12082 10:03:40.319630 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-single-crtc RESULT=skip
12084 10:03:40.321896 invalid-clone-single-crtc
12085 10:03:40.322322 No dynamic tests executed.
12086 10:03:40.328365 [1mSubtest invalid-clone-single-crtc: SKIP (0.000s)[0m
12087 10:03:40.341837 <14>[ 24.969137] [IGT] kms_setmode: executing
12088 10:03:40.351478 IGT-Version: 1.2<14>[ 24.974122] [IGT] kms_setmode: starting subtest invalid-clone-exclusive-crtc
12089 10:03:40.354742 7.1-g766edf9 (aa<14>[ 24.982751] [IGT] kms_setmode: exiting, ret=77
12090 10:03:40.358078 rch64) (Linux: 6.1.31 aarch64)
12091 10:03:40.361287 Opened device: /dev/dri/card0
12092 10:03:40.371479 Starting subtest:<8>[ 24.994354] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-exclusive-crtc RESULT=skip>
12093 10:03:40.372421 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-exclusive-crtc RESULT=skip
12095 10:03:40.374702 invalid-clone-exclusive-crtc
12096 10:03:40.377774 No dynamic tests executed.
12097 10:03:40.381334 [1mSubtest invalid-clone-exclusive-crtc: SKIP (0.000s)[0m
12098 10:03:40.394547 <14>[ 25.022279] [IGT] kms_setmode: executing
12099 10:03:40.401274 IGT-Version: 1.2<14>[ 25.027649] [IGT] kms_setmode: starting subtest clone-exclusive-crtc
12100 10:03:40.408117 7.1-g766edf9 (aa<14>[ 25.035360] [IGT] kms_setmode: exiting, ret=77
12101 10:03:40.410941 rch64) (Linux: 6.1.31 aarch64)
12102 10:03:40.414733 Opened device: /dev/dri/card0
12103 10:03:40.424798 Starting subtest:<8>[ 25.047200] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=clone-exclusive-crtc RESULT=skip>
12104 10:03:40.425308 clone-exclusive-crtc
12105 10:03:40.426036 Received signal: <TESTCASE> TEST_CASE_ID=clone-exclusive-crtc RESULT=skip
12107 10:03:40.427943 No dynamic tests executed.
12108 10:03:40.430981 [1mSubtest clone-exclusive-crtc: SKIP (0.000s)[0m
12109 10:03:40.446810 <14>[ 25.074188] [IGT] kms_setmode: executing
12110 10:03:40.456577 IGT-Version: 1.2<14>[ 25.079115] [IGT] kms_setmode: starting subtest invalid-clone-single-crtc-stealing
12111 10:03:40.463283 7.1-g766edf9 (aa<14>[ 25.088121] [IGT] kms_setmode: exiting, ret=77
12112 10:03:40.463771 rch64) (Linux: 6.1.31 aarch64)
12113 10:03:40.466618 Opened device: /dev/dri/card0
12114 10:03:40.476485 Starting subtest:<8>[ 25.099912] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-single-crtc-stealing RESULT=skip>
12115 10:03:40.477283 Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-single-crtc-stealing RESULT=skip
12117 10:03:40.482780 invalid-clone-single-crtc-steal<8>[ 25.111563] <LAVA_SIGNAL_TESTSET STOP>
12118 10:03:40.483221 ing
12119 10:03:40.483908 Received signal: <TESTSET> STOP
12120 10:03:40.484274 Closing test_set kms_setmode
12121 10:03:40.486365 No dynamic tests executed.
12122 10:03:40.493017 [1mSubtest invalid-clone-single-crtc-stealing: SKIP (0.000s)[0m
12123 10:03:40.510309 <8>[ 25.138278] <LAVA_SIGNAL_TESTSET START kms_vblank>
12124 10:03:40.511003 Received signal: <TESTSET> START kms_vblank
12125 10:03:40.511389 Starting test_set kms_vblank
12126 10:03:40.533607 <14>[ 25.161189] [IGT] kms_vblank: executing
12127 10:03:40.540118 IGT-Version: 1.2<14>[ 25.166341] [IGT] kms_vblank: exiting, ret=77
12128 10:03:40.543313 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12129 10:03:40.546622 Opened device: /dev/dri/card0
12130 10:03:40.553259 N<8>[ 25.177836] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid RESULT=skip>
12131 10:03:40.553957 Received signal: <TESTCASE> TEST_CASE_ID=invalid RESULT=skip
12133 10:03:40.556755 o KMS driver or no outputs, pipes: 8, outputs: 0
12134 10:03:40.560224 [1mSubtest invalid: SKIP (0.000s)[0m
12135 10:03:40.574733 <14>[ 25.202241] [IGT] kms_vblank: executing
12136 10:03:40.581613 IGT-Version: 1.2<14>[ 25.207410] [IGT] kms_vblank: exiting, ret=77
12137 10:03:40.584297 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12138 10:03:40.587859 Opened device: /dev/dri/card0
12139 10:03:40.594438 N<8>[ 25.218382] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-id RESULT=skip>
12140 10:03:40.595144 Received signal: <TESTCASE> TEST_CASE_ID=crtc-id RESULT=skip
12142 10:03:40.598271 o KMS driver or no outputs, pipes: 8, outputs: 0
12143 10:03:40.601101 [1mSubtest crtc-id: SKIP (0.000s)[0m
12144 10:03:40.616532 <14>[ 25.244115] [IGT] kms_vblank: executing
12145 10:03:40.622762 IGT-Version: 1.2<14>[ 25.249607] [IGT] kms_vblank: exiting, ret=77
12146 10:03:40.626225 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12147 10:03:40.630213 Opened device: /dev/dri/card0
12148 10:03:40.636355 N<8>[ 25.260666] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-accuracy-idle RESULT=skip>
12149 10:03:40.637092 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-accuracy-idle RESULT=skip
12151 10:03:40.642927 o KMS driver or no outputs, pipes: 8, outputs: 0
12152 10:03:40.646337 [1mSubtest pipe-A-accuracy-idle: SKIP (0.000s)[0m
12153 10:03:40.660108 <14>[ 25.287656] [IGT] kms_vblank: executing
12154 10:03:40.666713 IGT-Version: 1.2<14>[ 25.292722] [IGT] kms_vblank: exiting, ret=77
12155 10:03:40.669860 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12156 10:03:40.673386 Opened device: /dev/dri/card0
12157 10:03:40.679644 N<8>[ 25.304165] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-idle RESULT=skip>
12158 10:03:40.680319 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-idle RESULT=skip
12160 10:03:40.683101 o KMS driver or no outputs, pipes: 8, outputs: 0
12161 10:03:40.689863 [1mSubtest pipe-A-query-idle: SKIP (0.000s)[0m
12162 10:03:40.702976 <14>[ 25.330459] [IGT] kms_vblank: executing
12163 10:03:40.709563 IGT-Version: 1.2<14>[ 25.335627] [IGT] kms_vblank: exiting, ret=77
12164 10:03:40.712455 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12165 10:03:40.716200 Opened device: /dev/dri/card0
12166 10:03:40.722641 N<8>[ 25.346824] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-idle-hang RESULT=skip>
12167 10:03:40.723443 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-idle-hang RESULT=skip
12169 10:03:40.726012 o KMS driver or no outputs, pipes: 8, outputs: 0
12170 10:03:40.732780 [1mSubtest pipe-A-query-idle-hang: SKIP (0.000s)[0m
12171 10:03:40.746172 <14>[ 25.373698] [IGT] kms_vblank: executing
12172 10:03:40.752687 IGT-Version: 1.2<14>[ 25.378964] [IGT] kms_vblank: exiting, ret=77
12173 10:03:40.756048 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12174 10:03:40.759485 Opened device: /dev/dri/card0
12175 10:03:40.765986 N<8>[ 25.390006] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked RESULT=skip>
12176 10:03:40.766818 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked RESULT=skip
12178 10:03:40.769244 o KMS driver or no outputs, pipes: 8, outputs: 0
12179 10:03:40.775992 [1mSubtest pipe-A-query-forked: SKIP (0.000s)[0m
12180 10:03:40.789264 <14>[ 25.416949] [IGT] kms_vblank: executing
12181 10:03:40.795882 IGT-Version: 1.2<14>[ 25.422119] [IGT] kms_vblank: exiting, ret=77
12182 10:03:40.799248 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12183 10:03:40.802488 Opened device: /dev/dri/card0
12184 10:03:40.809231 N<8>[ 25.433289] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-hang RESULT=skip>
12185 10:03:40.809995 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-hang RESULT=skip
12187 10:03:40.815972 o KMS driver or no outputs, pipes: 8, outputs: 0
12188 10:03:40.818972 [1mSubtest pipe-A-query-forked-hang: SKIP (0.000s)[0m
12189 10:03:40.832796 <14>[ 25.460444] [IGT] kms_vblank: executing
12190 10:03:40.839530 IGT-Version: 1.2<14>[ 25.465611] [IGT] kms_vblank: exiting, ret=77
12191 10:03:40.842272 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12192 10:03:40.845814 Opened device: /dev/dri/card0
12193 10:03:40.852688 N<8>[ 25.476753] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-busy RESULT=skip>
12194 10:03:40.853458 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-busy RESULT=skip
12196 10:03:40.855709 o KMS driver or no outputs, pipes: 8, outputs: 0
12197 10:03:40.862277 [1mSubtest pipe-A-query-busy: SKIP (0.000s)[0m
12198 10:03:40.875554 <14>[ 25.503425] [IGT] kms_vblank: executing
12199 10:03:40.882348 IGT-Version: 1.2<14>[ 25.508596] [IGT] kms_vblank: exiting, ret=77
12200 10:03:40.885717 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12201 10:03:40.888904 Opened device: /dev/dri/card0
12202 10:03:40.896170 N<8>[ 25.519725] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-busy-hang RESULT=skip>
12203 10:03:40.897022 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-busy-hang RESULT=skip
12205 10:03:40.899107 o KMS driver or no outputs, pipes: 8, outputs: 0
12206 10:03:40.905857 [1mSubtest pipe-A-query-busy-hang: SKIP (0.000s)[0m
12207 10:03:40.919301 <14>[ 25.546756] [IGT] kms_vblank: executing
12208 10:03:40.926071 IGT-Version: 1.2<14>[ 25.552230] [IGT] kms_vblank: exiting, ret=77
12209 10:03:40.929087 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12210 10:03:40.932670 Opened device: /dev/dri/card0
12211 10:03:40.939359 N<8>[ 25.563371] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-busy RESULT=skip>
12212 10:03:40.940188 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-busy RESULT=skip
12214 10:03:40.945642 o KMS driver or no outputs, pipes: 8, outputs: 0
12215 10:03:40.948863 [1mSubtest pipe-A-query-forked-busy: SKIP (0.000s)[0m
12216 10:03:40.963195 <14>[ 25.590708] [IGT] kms_vblank: executing
12217 10:03:40.969602 IGT-Version: 1.2<14>[ 25.596048] [IGT] kms_vblank: exiting, ret=77
12218 10:03:40.973012 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12219 10:03:40.976531 Opened device: /dev/dri/card0
12220 10:03:40.983084 N<8>[ 25.607281] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-busy-hang RESULT=skip>
12221 10:03:40.983783 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-busy-hang RESULT=skip
12223 10:03:40.989800 o KMS driver or no outputs, pipes: 8, outputs: 0
12224 10:03:40.993379 [1mSubtest pipe-A-query-forked-busy-hang: SKIP (0.000s)[0m
12225 10:03:41.007369 <14>[ 25.634748] [IGT] kms_vblank: executing
12226 10:03:41.013638 IGT-Version: 1.2<14>[ 25.640158] [IGT] kms_vblank: exiting, ret=77
12227 10:03:41.017213 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12228 10:03:41.019995 Opened device: /dev/dri/card0
12229 10:03:41.027073 N<8>[ 25.651318] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-idle RESULT=skip>
12230 10:03:41.027935 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-idle RESULT=skip
12232 10:03:41.029985 o KMS driver or no outputs, pipes: 8, outputs: 0
12233 10:03:41.036645 [1mSubtest pipe-A-wait-idle: SKIP (0.000s)[0m
12234 10:03:41.050039 <14>[ 25.677750] [IGT] kms_vblank: executing
12235 10:03:41.056525 IGT-Version: 1.2<14>[ 25.683347] [IGT] kms_vblank: exiting, ret=77
12236 10:03:41.060257 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12237 10:03:41.063409 Opened device: /dev/dri/card0
12238 10:03:41.069702 N<8>[ 25.694258] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-idle-hang RESULT=skip>
12239 10:03:41.070399 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-idle-hang RESULT=skip
12241 10:03:41.076523 o KMS driver or no outputs, pipes: 8, outputs: 0
12242 10:03:41.079724 [1mSubtest pipe-A-wait-idle-hang: SKIP (0.000s)[0m
12243 10:03:41.093569 <14>[ 25.721519] [IGT] kms_vblank: executing
12244 10:03:41.100263 IGT-Version: 1.2<14>[ 25.726982] [IGT] kms_vblank: exiting, ret=77
12245 10:03:41.103816 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12246 10:03:41.106833 Opened device: /dev/dri/card0
12247 10:03:41.113787 N<8>[ 25.738151] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked RESULT=skip>
12248 10:03:41.114045 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked RESULT=skip
12250 10:03:41.116720 o KMS driver or no outputs, pipes: 8, outputs: 0
12251 10:03:41.123070 [1mSubtest pipe-A-wait-forked: SKIP (0.000s)[0m
12252 10:03:41.136844 <14>[ 25.765007] [IGT] kms_vblank: executing
12253 10:03:41.143437 IGT-Version: 1.2<14>[ 25.770275] [IGT] kms_vblank: exiting, ret=77
12254 10:03:41.147298 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12255 10:03:41.150176 Opened device: /dev/dri/card0
12256 10:03:41.156745 N<8>[ 25.781504] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-hang RESULT=skip>
12257 10:03:41.157037 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-hang RESULT=skip
12259 10:03:41.160396 o KMS driver or no outputs, pipes: 8, outputs: 0
12260 10:03:41.167087 [1mSubtest pipe-A-wait-forked-hang: SKIP (0.000s)[0m
12261 10:03:41.179704 <14>[ 25.807731] [IGT] kms_vblank: executing
12262 10:03:41.186354 IGT-Version: 1.2<14>[ 25.812726] [IGT] kms_vblank: exiting, ret=77
12263 10:03:41.189585 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12264 10:03:41.193260 Opened device: /dev/dri/card0
12265 10:03:41.199587 N<8>[ 25.823903] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-busy RESULT=skip>
12266 10:03:41.199873 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-busy RESULT=skip
12268 10:03:41.202944 o KMS driver or no outputs, pipes: 8, outputs: 0
12269 10:03:41.209558 [1mSubtest pipe-A-wait-busy: SKIP (0.000s)[0m
12270 10:03:41.222258 <14>[ 25.850422] [IGT] kms_vblank: executing
12271 10:03:41.228839 IGT-Version: 1.2<14>[ 25.855661] [IGT] kms_vblank: exiting, ret=77
12272 10:03:41.232450 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12273 10:03:41.235667 Opened device: /dev/dri/card0
12274 10:03:41.242428 N<8>[ 25.867354] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-busy-hang RESULT=skip>
12275 10:03:41.243099 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-busy-hang RESULT=skip
12277 10:03:41.246238 o KMS driver or no outputs, pipes: 8, outputs: 0
12278 10:03:41.252494 [1mSubtest pipe-A-wait-busy-hang: SKIP (0.000s)[0m
12279 10:03:41.265995 <14>[ 25.893610] [IGT] kms_vblank: executing
12280 10:03:41.272101 IGT-Version: 1.2<14>[ 25.898790] [IGT] kms_vblank: exiting, ret=77
12281 10:03:41.275478 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12282 10:03:41.279081 Opened device: /dev/dri/card0
12283 10:03:41.285732 N<8>[ 25.909892] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-busy RESULT=skip>
12284 10:03:41.286067 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-busy RESULT=skip
12286 10:03:41.289299 o KMS driver or no outputs, pipes: 8, outputs: 0
12287 10:03:41.295378 [1mSubtest pipe-A-wait-forked-busy: SKIP (0.000s)[0m
12288 10:03:41.309082 <14>[ 25.937236] [IGT] kms_vblank: executing
12289 10:03:41.315923 IGT-Version: 1.2<14>[ 25.942499] [IGT] kms_vblank: exiting, ret=77
12290 10:03:41.319174 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12291 10:03:41.322853 Opened device: /dev/dri/card0
12292 10:03:41.329116 N<8>[ 25.953703] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-busy-hang RESULT=skip>
12293 10:03:41.329363 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-busy-hang RESULT=skip
12295 10:03:41.335959 o KMS driver or no outputs, pipes: 8, outputs: 0
12296 10:03:41.339123 [1mSubtest pipe-A-wait-forked-busy-hang: SKIP (0.000s)[0m
12297 10:03:41.353008 <14>[ 25.981271] [IGT] kms_vblank: executing
12298 10:03:41.359549 IGT-Version: 1.2<14>[ 25.986285] [IGT] kms_vblank: exiting, ret=77
12299 10:03:41.363098 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12300 10:03:41.366976 Opened device: /dev/dri/card0
12301 10:03:41.373492 N<8>[ 25.997761] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-idle RESULT=skip>
12302 10:03:41.373751 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-idle RESULT=skip
12304 10:03:41.379480 o KMS driver or no outputs, pipes: 8, outputs: 0
12305 10:03:41.383334 [1mSubtest pipe-A-ts-continuation-idle: SKIP (0.000s)[0m
12306 10:03:41.396898 <14>[ 26.024956] [IGT] kms_vblank: executing
12307 10:03:41.403538 IGT-Version: 1.2<14>[ 26.030036] [IGT] kms_vblank: exiting, ret=77
12308 10:03:41.406734 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12309 10:03:41.410362 Opened device: /dev/dri/card0
12310 10:03:41.416942 N<8>[ 26.041379] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-idle-hang RESULT=skip>
12311 10:03:41.417203 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-idle-hang RESULT=skip
12313 10:03:41.423856 o KMS driver or no outputs, pipes: 8, outputs: 0
12314 10:03:41.426929 [1mSubtest pipe-A-ts-continuation-idle-hang: SKIP (0.000s)[0m
12315 10:03:41.440922 <14>[ 26.069171] [IGT] kms_vblank: executing
12316 10:03:41.447915 IGT-Version: 1.2<14>[ 26.074163] [IGT] kms_vblank: exiting, ret=77
12317 10:03:41.450933 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12318 10:03:41.454104 Opened device: /dev/dri/card0
12319 10:03:41.461090 N<8>[ 26.085536] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-dpms-rpm RESULT=skip>
12320 10:03:41.461339 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-dpms-rpm RESULT=skip
12322 10:03:41.467660 o KMS driver or no outputs, pipes: 8, outputs: 0
12323 10:03:41.470602 [1mSubtest pipe-A-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
12324 10:03:41.484929 <14>[ 26.113154] [IGT] kms_vblank: executing
12325 10:03:41.491920 IGT-Version: 1.2<14>[ 26.118243] [IGT] kms_vblank: exiting, ret=77
12326 10:03:41.494815 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12327 10:03:41.498399 Opened device: /dev/dri/card0
12328 10:03:41.505315 N<8>[ 26.129721] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-dpms-suspend RESULT=skip>
12329 10:03:41.505568 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-dpms-suspend RESULT=skip
12331 10:03:41.511796 o KMS driver or no outputs, pipes: 8, outputs: 0
12332 10:03:41.518138 [1mSubtest pipe-A-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
12333 10:03:41.529650 <14>[ 26.157498] [IGT] kms_vblank: executing
12334 10:03:41.536169 IGT-Version: 1.2<14>[ 26.162708] [IGT] kms_vblank: exiting, ret=77
12335 10:03:41.539610 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12336 10:03:41.542692 Opened device: /dev/dri/card0
12337 10:03:41.549455 N<8>[ 26.173798] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-suspend RESULT=skip>
12338 10:03:41.549746 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-suspend RESULT=skip
12340 10:03:41.555934 o KMS driver or no outputs, pipes: 8, outputs: 0
12341 10:03:41.559639 [1mSubtest pipe-A-ts-continuation-suspend: SKIP (0.000s)[0m
12342 10:03:41.573424 <14>[ 26.201451] [IGT] kms_vblank: executing
12343 10:03:41.579847 IGT-Version: 1.2<14>[ 26.206643] [IGT] kms_vblank: exiting, ret=77
12344 10:03:41.583540 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12345 10:03:41.587018 Opened device: /dev/dri/card0
12346 10:03:41.593336 N<8>[ 26.217653] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset RESULT=skip>
12347 10:03:41.594038 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset RESULT=skip
12349 10:03:41.600310 o KMS driver or no outputs, pipes: 8, outputs: 0
12350 10:03:41.603387 [1mSubtest pipe-A-ts-continuation-modeset: SKIP (0.000s)[0m
12351 10:03:41.617242 <14>[ 26.245492] [IGT] kms_vblank: executing
12352 10:03:41.624053 IGT-Version: 1.2<14>[ 26.250685] [IGT] kms_vblank: exiting, ret=77
12353 10:03:41.627285 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12354 10:03:41.630767 Opened device: /dev/dri/card0
12355 10:03:41.637380 N<8>[ 26.261725] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset-hang RESULT=skip>
12356 10:03:41.637623 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset-hang RESULT=skip
12358 10:03:41.643850 o KMS driver or no outputs, pipes: 8, outputs: 0
12359 10:03:41.650130 [1mSubtest pipe-A-ts-continuation-modeset-hang: SKIP (0.000s)[0m
12360 10:03:41.661799 <14>[ 26.290067] [IGT] kms_vblank: executing
12361 10:03:41.668525 IGT-Version: 1.2<14>[ 26.295282] [IGT] kms_vblank: exiting, ret=77
12362 10:03:41.671955 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12363 10:03:41.675562 Opened device: /dev/dri/card0
12364 10:03:41.682158 N<8>[ 26.306384] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset-rpm RESULT=skip>
12365 10:03:41.682407 Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset-rpm RESULT=skip
12367 10:03:41.689094 o KMS driver or no outputs, pipes: 8, outputs: 0
12368 10:03:41.692182 [1mSubtest pipe-A-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
12369 10:03:41.706355 <14>[ 26.334588] [IGT] kms_vblank: executing
12370 10:03:41.713015 IGT-Version: 1.2<14>[ 26.340055] [IGT] kms_vblank: exiting, ret=77
12371 10:03:41.716610 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12372 10:03:41.719893 Opened device: /dev/dri/card0
12373 10:03:41.726334 N<8>[ 26.350804] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-accuracy-idle RESULT=skip>
12374 10:03:41.726599 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-accuracy-idle RESULT=skip
12376 10:03:41.729937 o KMS driver or no outputs, pipes: 8, outputs: 0
12377 10:03:41.736447 [1mSubtest pipe-B-accuracy-idle: SKIP (0.000s)[0m
12378 10:03:41.749449 <14>[ 26.377718] [IGT] kms_vblank: executing
12379 10:03:41.756160 IGT-Version: 1.2<14>[ 26.382789] [IGT] kms_vblank: exiting, ret=77
12380 10:03:41.759761 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12381 10:03:41.763087 Opened device: /dev/dri/card0
12382 10:03:41.769645 N<8>[ 26.394061] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-idle RESULT=skip>
12383 10:03:41.769952 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-idle RESULT=skip
12385 10:03:41.773259 o KMS driver or no outputs, pipes: 8, outputs: 0
12386 10:03:41.779714 [1mSubtest pipe-B-query-idle: SKIP (0.000s)[0m
12387 10:03:41.793052 <14>[ 26.420618] [IGT] kms_vblank: executing
12388 10:03:41.799217 IGT-Version: 1.2<14>[ 26.425812] [IGT] kms_vblank: exiting, ret=77
12389 10:03:41.802349 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12390 10:03:41.805857 Opened device: /dev/dri/card0
12391 10:03:41.812445 N<8>[ 26.436925] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-idle-hang RESULT=skip>
12392 10:03:41.812788 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-idle-hang RESULT=skip
12394 10:03:41.815804 o KMS driver or no outputs, pipes: 8, outputs: 0
12395 10:03:41.822306 [1mSubtest pipe-B-query-idle-hang: SKIP (0.000s)[0m
12396 10:03:41.836169 <14>[ 26.463853] [IGT] kms_vblank: executing
12397 10:03:41.842838 IGT-Version: 1.2<14>[ 26.469289] [IGT] kms_vblank: exiting, ret=77
12398 10:03:41.845954 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12399 10:03:41.849546 Opened device: /dev/dri/card0
12400 10:03:41.855965 N<8>[ 26.480482] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked RESULT=skip>
12401 10:03:41.856634 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked RESULT=skip
12403 10:03:41.859712 o KMS driver or no outputs, pipes: 8, outputs: 0
12404 10:03:41.865891 [1mSubtest pipe-B-query-forked: SKIP (0.000s)[0m
12405 10:03:41.879460 <14>[ 26.507301] [IGT] kms_vblank: executing
12406 10:03:41.886295 IGT-Version: 1.2<14>[ 26.512369] [IGT] kms_vblank: exiting, ret=77
12407 10:03:41.888964 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12408 10:03:41.892756 Opened device: /dev/dri/card0
12409 10:03:41.899619 N<8>[ 26.523666] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-hang RESULT=skip>
12410 10:03:41.899888 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-hang RESULT=skip
12412 10:03:41.902739 o KMS driver or no outputs, pipes: 8, outputs: 0
12413 10:03:41.909265 [1mSubtest pipe-B-query-forked-hang: SKIP (0.000s)[0m
12414 10:03:41.921571 <14>[ 26.549692] [IGT] kms_vblank: executing
12415 10:03:41.928173 IGT-Version: 1.2<14>[ 26.554741] [IGT] kms_vblank: exiting, ret=77
12416 10:03:41.931616 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12417 10:03:41.934947 Opened device: /dev/dri/card0
12418 10:03:41.941969 N<8>[ 26.565765] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-busy RESULT=skip>
12419 10:03:41.942706 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-busy RESULT=skip
12421 10:03:41.945065 o KMS driver or no outputs, pipes: 8, outputs: 0
12422 10:03:41.951668 [1mSubtest pipe-B-query-busy: SKIP (0.000s)[0m
12423 10:03:41.964787 <14>[ 26.592440] [IGT] kms_vblank: executing
12424 10:03:41.971408 IGT-Version: 1.2<14>[ 26.597397] [IGT] kms_vblank: exiting, ret=77
12425 10:03:41.974907 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12426 10:03:41.977598 Opened device: /dev/dri/card0
12427 10:03:41.984376 N<8>[ 26.608921] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-busy-hang RESULT=skip>
12428 10:03:41.985240 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-busy-hang RESULT=skip
12430 10:03:41.988053 o KMS driver or no outputs, pipes: 8, outputs: 0
12431 10:03:41.994286 [1mSubtest pipe-B-query-busy-hang: SKIP (0.000s)[0m
12432 10:03:42.008217 <14>[ 26.635944] [IGT] kms_vblank: executing
12433 10:03:42.014915 IGT-Version: 1.2<14>[ 26.641278] [IGT] kms_vblank: exiting, ret=77
12434 10:03:42.017993 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12435 10:03:42.021266 Opened device: /dev/dri/card0
12436 10:03:42.027847 N<8>[ 26.652407] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-busy RESULT=skip>
12437 10:03:42.028568 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-busy RESULT=skip
12439 10:03:42.034677 o KMS driver or no outputs, pipes: 8, outputs: 0
12440 10:03:42.038238 [1mSubtest pipe-B-query-forked-busy: SKIP (0.000s)[0m
12441 10:03:42.050746 <14>[ 26.678675] [IGT] kms_vblank: executing
12442 10:03:42.057589 IGT-Version: 1.2<14>[ 26.683724] [IGT] kms_vblank: exiting, ret=77
12443 10:03:42.061175 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12444 10:03:42.064217 Opened device: /dev/dri/card0
12445 10:03:42.070840 N<8>[ 26.694705] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-busy-hang RESULT=skip>
12446 10:03:42.071583 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-busy-hang RESULT=skip
12448 10:03:42.077472 o KMS driver or no outputs, pipes: 8, outputs: 0
12449 10:03:42.080869 [1mSubtest pipe-B-query-forked-busy-hang: SKIP (0.000s)[0m
12450 10:03:42.094800 <14>[ 26.722451] [IGT] kms_vblank: executing
12451 10:03:42.100971 IGT-Version: 1.2<14>[ 26.727690] [IGT] kms_vblank: exiting, ret=77
12452 10:03:42.104639 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12453 10:03:42.111595 Opened device: /<8>[ 26.738325] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-idle RESULT=skip>
12454 10:03:42.112272 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-idle RESULT=skip
12456 10:03:42.114358 dev/dri/card0
12457 10:03:42.117844 No KMS driver or no outputs, pipes: 8, outputs: 0
12458 10:03:42.121267 [1mSubtest pipe-B-wait-idle: SKIP (0.000s)[0m
12459 10:03:42.135304 <14>[ 26.762653] [IGT] kms_vblank: executing
12460 10:03:42.141265 IGT-Version: 1.2<14>[ 26.767817] [IGT] kms_vblank: exiting, ret=77
12461 10:03:42.144593 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12462 10:03:42.148119 Opened device: /dev/dri/card0
12463 10:03:42.154609 N<8>[ 26.778700] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-idle-hang RESULT=skip>
12464 10:03:42.155285 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-idle-hang RESULT=skip
12466 10:03:42.157962 o KMS driver or no outputs, pipes: 8, outputs: 0
12467 10:03:42.164718 [1mSubtest pipe-B-wait-idle-hang: SKIP (0.000s)[0m
12468 10:03:42.176748 <14>[ 26.804668] [IGT] kms_vblank: executing
12469 10:03:42.183470 IGT-Version: 1.2<14>[ 26.809805] [IGT] kms_vblank: exiting, ret=77
12470 10:03:42.186770 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12471 10:03:42.190115 Opened device: /dev/dri/card0
12472 10:03:42.197155 N<8>[ 26.820909] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked RESULT=skip>
12473 10:03:42.197835 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked RESULT=skip
12475 10:03:42.200290 o KMS driver or no outputs, pipes: 8, outputs: 0
12476 10:03:42.206443 [1mSubtest pipe-B-wait-forked: SKIP (0.000s)[0m
12477 10:03:42.218667 <14>[ 26.846657] [IGT] kms_vblank: executing
12478 10:03:42.225361 IGT-Version: 1.2<14>[ 26.851828] [IGT] kms_vblank: exiting, ret=77
12479 10:03:42.228639 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12480 10:03:42.232294 Opened device: /dev/dri/card0
12481 10:03:42.238970 N<8>[ 26.862666] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-hang RESULT=skip>
12482 10:03:42.239889 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-hang RESULT=skip
12484 10:03:42.242030 o KMS driver or no outputs, pipes: 8, outputs: 0
12485 10:03:42.248059 [1mSubtest pipe-B-wait-forked-hang: SKIP (0.000s)[0m
12486 10:03:42.260887 <14>[ 26.888987] [IGT] kms_vblank: executing
12487 10:03:42.267790 IGT-Version: 1.2<14>[ 26.893975] [IGT] kms_vblank: exiting, ret=77
12488 10:03:42.270764 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12489 10:03:42.274669 Opened device: /dev/dri/card0
12490 10:03:42.280901 N<8>[ 26.904980] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-busy RESULT=skip>
12491 10:03:42.281169 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-busy RESULT=skip
12493 10:03:42.284540 o KMS driver or no outputs, pipes: 8, outputs: 0
12494 10:03:42.290670 [1mSubtest pipe-B-wait-busy: SKIP (0.000s)[0m
12495 10:03:42.303663 <14>[ 26.931637] [IGT] kms_vblank: executing
12496 10:03:42.310243 IGT-Version: 1.2<14>[ 26.936643] [IGT] kms_vblank: exiting, ret=77
12497 10:03:42.313184 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12498 10:03:42.317010 Opened device: /dev/dri/card0
12499 10:03:42.323037 N<8>[ 26.947986] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-busy-hang RESULT=skip>
12500 10:03:42.323290 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-busy-hang RESULT=skip
12502 10:03:42.326700 o KMS driver or no outputs, pipes: 8, outputs: 0
12503 10:03:42.333395 [1mSubtest pipe-B-wait-busy-hang: SKIP (0.000s)[0m
12504 10:03:42.346415 <14>[ 26.974469] [IGT] kms_vblank: executing
12505 10:03:42.353376 IGT-Version: 1.2<14>[ 26.979506] [IGT] kms_vblank: exiting, ret=77
12506 10:03:42.356297 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12507 10:03:42.359773 Opened device: /dev/dri/card0
12508 10:03:42.366547 N<8>[ 26.990748] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-busy RESULT=skip>
12509 10:03:42.366812 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-busy RESULT=skip
12511 10:03:42.369442 o KMS driver or no outputs, pipes: 8, outputs: 0
12512 10:03:42.376101 [1mSubtest pipe-B-wait-forked-busy: SKIP (0.000s)[0m
12513 10:03:42.388839 <14>[ 27.017023] [IGT] kms_vblank: executing
12514 10:03:42.395514 IGT-Version: 1.2<14>[ 27.022089] [IGT] kms_vblank: exiting, ret=77
12515 10:03:42.399118 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12516 10:03:42.402272 Opened device: /dev/dri/card0
12517 10:03:42.409009 N<8>[ 27.033985] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-busy-hang RESULT=skip>
12518 10:03:42.409270 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-busy-hang RESULT=skip
12520 10:03:42.415831 o KMS driver or no outputs, pipes: 8, outputs: 0
12521 10:03:42.418813 [1mSubtest pipe-B-wait-forked-busy-hang: SKIP (0.000s)[0m
12522 10:03:42.432042 <14>[ 27.060058] [IGT] kms_vblank: executing
12523 10:03:42.438283 IGT-Version: 1.2<14>[ 27.065167] [IGT] kms_vblank: exiting, ret=77
12524 10:03:42.441816 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12525 10:03:42.445141 Opened device: /dev/dri/card0
12526 10:03:42.451488 N<8>[ 27.077138] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-idle RESULT=skip>
12527 10:03:42.451756 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-idle RESULT=skip
12529 10:03:42.458255 o KMS driver or no outputs, pipes: 8, outputs: 0
12530 10:03:42.461783 [1mSubtest pipe-B-ts-continuation-idle: SKIP (0.000s)[0m
12531 10:03:42.475052 <14>[ 27.103213] [IGT] kms_vblank: executing
12532 10:03:42.481525 IGT-Version: 1.2<14>[ 27.108213] [IGT] kms_vblank: exiting, ret=77
12533 10:03:42.485182 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12534 10:03:42.488198 Opened device: /dev/dri/card0
12535 10:03:42.494925 N<8>[ 27.120165] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-idle-hang RESULT=skip>
12536 10:03:42.495220 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-idle-hang RESULT=skip
12538 10:03:42.501785 o KMS driver or no outputs, pipes: 8, outputs: 0
12539 10:03:42.504577 [1mSubtest pipe-B-ts-continuation-idle-hang: SKIP (0.000s)[0m
12540 10:03:42.518684 <14>[ 27.146766] [IGT] kms_vblank: executing
12541 10:03:42.525646 IGT-Version: 1.2<14>[ 27.151954] [IGT] kms_vblank: exiting, ret=77
12542 10:03:42.528639 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12543 10:03:42.532302 Opened device: /dev/dri/card0
12544 10:03:42.539036 N<8>[ 27.163914] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-dpms-rpm RESULT=skip>
12545 10:03:42.539752 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-dpms-rpm RESULT=skip
12547 10:03:42.545220 o KMS driver or no outputs, pipes: 8, outputs: 0
12548 10:03:42.548574 [1mSubtest pipe-B-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
12549 10:03:42.562572 <14>[ 27.190204] [IGT] kms_vblank: executing
12550 10:03:42.569294 IGT-Version: 1.2<14>[ 27.195368] [IGT] kms_vblank: exiting, ret=77
12551 10:03:42.572542 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12552 10:03:42.575405 Opened device: /dev/dri/card0
12553 10:03:42.582229 N<8>[ 27.207142] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-dpms-suspend RESULT=skip>
12554 10:03:42.582911 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-dpms-suspend RESULT=skip
12556 10:03:42.588784 o KMS driver or no outputs, pipes: 8, outputs: 0
12557 10:03:42.595627 [1mSubtest pipe-B-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
12558 10:03:42.606157 <14>[ 27.234023] [IGT] kms_vblank: executing
12559 10:03:42.612870 IGT-Version: 1.2<14>[ 27.239027] [IGT] kms_vblank: exiting, ret=77
12560 10:03:42.616139 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12561 10:03:42.619386 Opened device: /dev/dri/card0
12562 10:03:42.626133 N<8>[ 27.250587] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-suspend RESULT=skip>
12563 10:03:42.626811 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-suspend RESULT=skip
12565 10:03:42.632596 o KMS driver or no outputs, pipes: 8, outputs: 0
12566 10:03:42.636089 [1mSubtest pipe-B-ts-continuation-suspend: SKIP (0.000s)[0m
12567 10:03:42.650593 <14>[ 27.278358] [IGT] kms_vblank: executing
12568 10:03:42.657299 IGT-Version: 1.2<14>[ 27.283699] [IGT] kms_vblank: exiting, ret=77
12569 10:03:42.660222 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12570 10:03:42.663967 Opened device: /dev/dri/card0
12571 10:03:42.670324 N<8>[ 27.294574] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset RESULT=skip>
12572 10:03:42.670949 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset RESULT=skip
12574 10:03:42.677055 o KMS driver or no outputs, pipes: 8, outputs: 0
12575 10:03:42.680231 [1mSubtest pipe-B-ts-continuation-modeset: SKIP (0.000s)[0m
12576 10:03:42.694885 <14>[ 27.322356] [IGT] kms_vblank: executing
12577 10:03:42.701394 IGT-Version: 1.2<14>[ 27.327893] [IGT] kms_vblank: exiting, ret=77
12578 10:03:42.704386 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12579 10:03:42.708055 Opened device: /dev/dri/card0
12580 10:03:42.714544 N<8>[ 27.338533] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset-hang RESULT=skip>
12581 10:03:42.715236 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset-hang RESULT=skip
12583 10:03:42.721041 o KMS driver or no outputs, pipes: 8, outputs: 0
12584 10:03:42.727807 [1mSubtest pipe-B-ts-continuation-modeset-hang: SKIP (0.000s)[0m
12585 10:03:42.738491 <14>[ 27.366780] [IGT] kms_vblank: executing
12586 10:03:42.744916 IGT-Version: 1.2<14>[ 27.371880] [IGT] kms_vblank: exiting, ret=77
12587 10:03:42.748654 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12588 10:03:42.752211 Opened device: /dev/dri/card0
12589 10:03:42.758288 N<8>[ 27.383183] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset-rpm RESULT=skip>
12590 10:03:42.758545 Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset-rpm RESULT=skip
12592 10:03:42.765112 o KMS driver or no outputs, pipes: 8, outputs: 0
12593 10:03:42.768725 [1mSubtest pipe-B-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
12594 10:03:42.783084 <14>[ 27.410970] [IGT] kms_vblank: executing
12595 10:03:42.789520 IGT-Version: 1.2<14>[ 27.415928] [IGT] kms_vblank: exiting, ret=77
12596 10:03:42.792772 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12597 10:03:42.796380 Opened device: /dev/dri/card0
12598 10:03:42.802897 N<8>[ 27.427806] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-accuracy-idle RESULT=skip>
12599 10:03:42.803152 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-accuracy-idle RESULT=skip
12601 10:03:42.806066 o KMS driver or no outputs, pipes: 8, outputs: 0
12602 10:03:42.812769 [1mSubtest pipe-C-accuracy-idle: SKIP (0.000s)[0m
12603 10:03:42.826164 <14>[ 27.454031] [IGT] kms_vblank: executing
12604 10:03:42.832886 IGT-Version: 1.2<14>[ 27.459033] [IGT] kms_vblank: exiting, ret=77
12605 10:03:42.835567 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12606 10:03:42.839077 Opened device: /dev/dri/card0
12607 10:03:42.845701 N<8>[ 27.470132] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-idle RESULT=skip>
12608 10:03:42.845956 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-idle RESULT=skip
12610 10:03:42.848906 o KMS driver or no outputs, pipes: 8, outputs: 0
12611 10:03:42.855726 [1mSubtest pipe-C-query-idle: SKIP (0.000s)[0m
12612 10:03:42.868655 <14>[ 27.496794] [IGT] kms_vblank: executing
12613 10:03:42.875586 IGT-Version: 1.2<14>[ 27.502013] [IGT] kms_vblank: exiting, ret=77
12614 10:03:42.878781 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12615 10:03:42.882220 Opened device: /dev/dri/card0
12616 10:03:42.888217 N<8>[ 27.513270] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-idle-hang RESULT=skip>
12617 10:03:42.888480 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-idle-hang RESULT=skip
12619 10:03:42.891839 o KMS driver or no outputs, pipes: 8, outputs: 0
12620 10:03:42.898538 [1mSubtest pipe-C-query-idle-hang: SKIP (0.000s)[0m
12621 10:03:42.911854 <14>[ 27.540277] [IGT] kms_vblank: executing
12622 10:03:42.918721 IGT-Version: 1.2<14>[ 27.545438] [IGT] kms_vblank: exiting, ret=77
12623 10:03:42.921858 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12624 10:03:42.925522 Opened device: /dev/dri/card0
12625 10:03:42.932010 N<8>[ 27.556629] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked RESULT=skip>
12626 10:03:42.932535 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked RESULT=skip
12628 10:03:42.935500 o KMS driver or no outputs, pipes: 8, outputs: 0
12629 10:03:42.941985 [1mSubtest pipe-C-query-forked: SKIP (0.000s)[0m
12630 10:03:42.956039 <14>[ 27.583932] [IGT] kms_vblank: executing
12631 10:03:42.963201 IGT-Version: 1.2<14>[ 27.589116] [IGT] kms_vblank: exiting, ret=77
12632 10:03:42.965922 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12633 10:03:42.969406 Opened device: /dev/dri/card0
12634 10:03:42.975656 N<8>[ 27.600555] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-hang RESULT=skip>
12635 10:03:42.976343 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-hang RESULT=skip
12637 10:03:42.982612 o KMS driver or no outputs, pipes: 8, outputs: 0
12638 10:03:42.985975 [1mSubtest pipe-C-query-forked-hang: SKIP (0.000s)[0m
12639 10:03:42.999653 <14>[ 27.627786] [IGT] kms_vblank: executing
12640 10:03:43.006472 IGT-Version: 1.2<14>[ 27.632732] [IGT] kms_vblank: exiting, ret=77
12641 10:03:43.009575 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12642 10:03:43.012691 Opened device: /dev/dri/card0
12643 10:03:43.019528 N<8>[ 27.644444] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-busy RESULT=skip>
12644 10:03:43.019889 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-busy RESULT=skip
12646 10:03:43.022515 o KMS driver or no outputs, pipes: 8, outputs: 0
12647 10:03:43.029209 [1mSubtest pipe-C-query-busy: SKIP (0.000s)[0m
12648 10:03:43.041033 <14>[ 27.669514] [IGT] kms_vblank: executing
12649 10:03:43.047625 IGT-Version: 1.2<14>[ 27.674528] [IGT] kms_vblank: exiting, ret=77
12650 10:03:43.050998 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12651 10:03:43.054263 Opened device: /dev/dri/card0
12652 10:03:43.060838 N<8>[ 27.685807] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-busy-hang RESULT=skip>
12653 10:03:43.061193 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-busy-hang RESULT=skip
12655 10:03:43.064623 o KMS driver or no outputs, pipes: 8, outputs: 0
12656 10:03:43.071408 [1mSubtest pipe-C-query-busy-hang: SKIP (0.000s)[0m
12657 10:03:43.084971 <14>[ 27.713211] [IGT] kms_vblank: executing
12658 10:03:43.091891 IGT-Version: 1.2<14>[ 27.718489] [IGT] kms_vblank: exiting, ret=77
12659 10:03:43.095556 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12660 10:03:43.098793 Opened device: /dev/dri/card0
12661 10:03:43.105608 N<8>[ 27.729690] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-busy RESULT=skip>
12662 10:03:43.106297 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-busy RESULT=skip
12664 10:03:43.108409 o KMS driver or no outputs, pipes: 8, outputs: 0
12665 10:03:43.115084 [1mSubtest pipe-C-query-forked-busy: SKIP (0.000s)[0m
12666 10:03:43.129261 <14>[ 27.756670] [IGT] kms_vblank: executing
12667 10:03:43.135263 IGT-Version: 1.2<14>[ 27.761663] [IGT] kms_vblank: exiting, ret=77
12668 10:03:43.138633 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12669 10:03:43.142036 Opened device: /dev/dri/card0
12670 10:03:43.148744 N<8>[ 27.773194] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-busy-hang RESULT=skip>
12671 10:03:43.149482 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-busy-hang RESULT=skip
12673 10:03:43.155085 o KMS driver or no outputs, pipes: 8, outputs: 0
12674 10:03:43.158096 [1mSubtest pipe-C-query-forked-busy-hang: SKIP (0.000s)[0m
12675 10:03:43.172424 <14>[ 27.800768] [IGT] kms_vblank: executing
12676 10:03:43.179038 IGT-Version: 1.2<14>[ 27.805988] [IGT] kms_vblank: exiting, ret=77
12677 10:03:43.182448 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12678 10:03:43.185987 Opened device: /dev/dri/card0
12679 10:03:43.192246 N<8>[ 27.817257] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-idle RESULT=skip>
12680 10:03:43.192518 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-idle RESULT=skip
12682 10:03:43.196183 o KMS driver or no outputs, pipes: 8, outputs: 0
12683 10:03:43.202117 [1mSubtest pipe-C-wait-idle: SKIP (0.000s)[0m
12684 10:03:43.215205 <14>[ 27.843024] [IGT] kms_vblank: executing
12685 10:03:43.221614 IGT-Version: 1.2<14>[ 27.848217] [IGT] kms_vblank: exiting, ret=77
12686 10:03:43.224727 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12687 10:03:43.228520 Opened device: /dev/dri/card0
12688 10:03:43.234565 N<8>[ 27.859337] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-idle-hang RESULT=skip>
12689 10:03:43.234822 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-idle-hang RESULT=skip
12691 10:03:43.238321 o KMS driver or no outputs, pipes: 8, outputs: 0
12692 10:03:43.244660 [1mSubtest pipe-C-wait-idle-hang: SKIP (0.000s)[0m
12693 10:03:43.256983 <14>[ 27.885387] [IGT] kms_vblank: executing
12694 10:03:43.263633 IGT-Version: 1.2<14>[ 27.890406] [IGT] kms_vblank: exiting, ret=77
12695 10:03:43.267319 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12696 10:03:43.270827 Opened device: /dev/dri/card0
12697 10:03:43.276771 N<8>[ 27.901807] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked RESULT=skip>
12698 10:03:43.277049 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked RESULT=skip
12700 10:03:43.280603 o KMS driver or no outputs, pipes: 8, outputs: 0
12701 10:03:43.287671 [1mSubtest pipe-C-wait-forked: SKIP (0.000s)[0m
12702 10:03:43.299821 <14>[ 27.927607] [IGT] kms_vblank: executing
12703 10:03:43.305926 IGT-Version: 1.2<14>[ 27.932715] [IGT] kms_vblank: exiting, ret=77
12704 10:03:43.309270 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12705 10:03:43.313038 Opened device: /dev/dri/card0
12706 10:03:43.318986 N<8>[ 27.944209] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-hang RESULT=skip>
12707 10:03:43.319272 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-hang RESULT=skip
12709 10:03:43.325847 o KMS driver or no outputs, pipes: 8, outputs: 0
12710 10:03:43.328889 [1mSubtest pipe-C-wait-forked-hang: SKIP (0.000s)[0m
12711 10:03:43.341717 <14>[ 27.969807] [IGT] kms_vblank: executing
12712 10:03:43.348299 IGT-Version: 1.2<14>[ 27.974751] [IGT] kms_vblank: exiting, ret=77
12713 10:03:43.351626 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12714 10:03:43.354854 Opened device: /dev/dri/card0
12715 10:03:43.361642 N<8>[ 27.986007] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-busy RESULT=skip>
12716 10:03:43.361906 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-busy RESULT=skip
12718 10:03:43.364445 o KMS driver or no outputs, pipes: 8, outputs: 0
12719 10:03:43.371483 [1mSubtest pipe-C-wait-busy: SKIP (0.000s)[0m
12720 10:03:43.384554 <14>[ 28.012264] [IGT] kms_vblank: executing
12721 10:03:43.390871 IGT-Version: 1.2<14>[ 28.017374] [IGT] kms_vblank: exiting, ret=77
12722 10:03:43.394029 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12723 10:03:43.397387 Opened device: /dev/dri/card0
12724 10:03:43.403655 N<8>[ 28.028707] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-busy-hang RESULT=skip>
12725 10:03:43.403913 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-busy-hang RESULT=skip
12727 10:03:43.407578 o KMS driver or no outputs, pipes: 8, outputs: 0
12728 10:03:43.414058 [1mSubtest pipe-C-wait-busy-hang: SKIP (0.000s)[0m
12729 10:03:43.426812 <14>[ 28.054725] [IGT] kms_vblank: executing
12730 10:03:43.433495 IGT-Version: 1.2<14>[ 28.059907] [IGT] kms_vblank: exiting, ret=77
12731 10:03:43.436560 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12732 10:03:43.440353 Opened device: /dev/dri/card0
12733 10:03:43.446340 N<8>[ 28.070840] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-busy RESULT=skip>
12734 10:03:43.447133 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-busy RESULT=skip
12736 10:03:43.449934 o KMS driver or no outputs, pipes: 8, outputs: 0
12737 10:03:43.456334 [1mSubtest pipe-C-wait-forked-busy: SKIP (0.000s)[0m
12738 10:03:43.470423 <14>[ 28.098234] [IGT] kms_vblank: executing
12739 10:03:43.477651 IGT-Version: 1.2<14>[ 28.103498] [IGT] kms_vblank: exiting, ret=77
12740 10:03:43.480173 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12741 10:03:43.483894 Opened device: /dev/dri/card0
12742 10:03:43.489899 N<8>[ 28.114405] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-busy-hang RESULT=skip>
12743 10:03:43.490582 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-busy-hang RESULT=skip
12745 10:03:43.496791 o KMS driver or no outputs, pipes: 8, outputs: 0
12746 10:03:43.500129 [1mSubtest pipe-C-wait-forked-busy-hang: SKIP (0.000s)[0m
12747 10:03:43.514158 <14>[ 28.142307] [IGT] kms_vblank: executing
12748 10:03:43.520979 IGT-Version: 1.2<14>[ 28.147652] [IGT] kms_vblank: exiting, ret=77
12749 10:03:43.524477 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12750 10:03:43.527664 Opened device: /dev/dri/card0
12751 10:03:43.534615 N<8>[ 28.158467] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-idle RESULT=skip>
12752 10:03:43.535354 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-idle RESULT=skip
12754 10:03:43.541021 o KMS driver or no outputs, pipes: 8, outputs: 0
12755 10:03:43.544176 [1mSubtest pipe-C-ts-continuation-idle: SKIP (0.000s)[0m
12756 10:03:43.558616 <14>[ 28.186352] [IGT] kms_vblank: executing
12757 10:03:43.565209 IGT-Version: 1.2<14>[ 28.191735] [IGT] kms_vblank: exiting, ret=77
12758 10:03:43.568266 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12759 10:03:43.571949 Opened device: /dev/dri/card0
12760 10:03:43.578684 N<8>[ 28.202861] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-idle-hang RESULT=skip>
12761 10:03:43.579541 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-idle-hang RESULT=skip
12763 10:03:43.585419 o KMS driver or no outputs, pipes: 8, outputs: 0
12764 10:03:43.588631 [1mSubtest pipe-C-ts-continuation-idle-hang: SKIP (0.000s)[0m
12765 10:03:43.601742 <14>[ 28.229769] [IGT] kms_vblank: executing
12766 10:03:43.608439 IGT-Version: 1.2<14>[ 28.234744] [IGT] kms_vblank: exiting, ret=77
12767 10:03:43.611442 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12768 10:03:43.614989 Opened device: /dev/dri/card0
12769 10:03:43.621514 N<8>[ 28.246084] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-dpms-rpm RESULT=skip>
12770 10:03:43.622192 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-dpms-rpm RESULT=skip
12772 10:03:43.628496 o KMS driver or no outputs, pipes: 8, outputs: 0
12773 10:03:43.631641 [1mSubtest pipe-C-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
12774 10:03:43.644847 <14>[ 28.272764] [IGT] kms_vblank: executing
12775 10:03:43.651475 IGT-Version: 1.2<14>[ 28.277746] [IGT] kms_vblank: exiting, ret=77
12776 10:03:43.654485 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12777 10:03:43.658110 Opened device: /dev/dri/card0
12778 10:03:43.664648 N<8>[ 28.288835] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-dpms-suspend RESULT=skip>
12779 10:03:43.665383 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-dpms-suspend RESULT=skip
12781 10:03:43.671392 o KMS driver or no outputs, pipes: 8, outputs: 0
12782 10:03:43.677995 [1mSubtest pipe-C-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
12783 10:03:43.689493 <14>[ 28.317062] [IGT] kms_vblank: executing
12784 10:03:43.695586 IGT-Version: 1.2<14>[ 28.322213] [IGT] kms_vblank: exiting, ret=77
12785 10:03:43.698762 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12786 10:03:43.702642 Opened device: /dev/dri/card0
12787 10:03:43.708863 N<8>[ 28.333757] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-suspend RESULT=skip>
12788 10:03:43.709586 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-suspend RESULT=skip
12790 10:03:43.715596 o KMS driver or no outputs, pipes: 8, outputs: 0
12791 10:03:43.719146 [1mSubtest pipe-C-ts-continuation-suspend: SKIP (0.000s)[0m
12792 10:03:43.732599 <14>[ 28.360383] [IGT] kms_vblank: executing
12793 10:03:43.739032 IGT-Version: 1.2<14>[ 28.365387] [IGT] kms_vblank: exiting, ret=77
12794 10:03:43.742155 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12795 10:03:43.745312 Opened device: /dev/dri/card0
12796 10:03:43.752191 N<8>[ 28.376456] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset RESULT=skip>
12797 10:03:43.752933 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset RESULT=skip
12799 10:03:43.759185 o KMS driver or no outputs, pipes: 8, outputs: 0
12800 10:03:43.762176 [1mSubtest pipe-C-ts-continuation-modeset: SKIP (0.000s)[0m
12801 10:03:43.776712 <14>[ 28.404384] [IGT] kms_vblank: executing
12802 10:03:43.783240 IGT-Version: 1.2<14>[ 28.409612] [IGT] kms_vblank: exiting, ret=77
12803 10:03:43.786651 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12804 10:03:43.789719 Opened device: /dev/dri/card0
12805 10:03:43.796354 N<8>[ 28.420905] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset-hang RESULT=skip>
12806 10:03:43.797093 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset-hang RESULT=skip
12808 10:03:43.803293 o KMS driver or no outputs, pipes: 8, outputs: 0
12809 10:03:43.809547 [1mSubtest pipe-C-ts-continuation-modeset-hang: SKIP (0.000s)[0m
12810 10:03:43.820296 <14>[ 28.448095] [IGT] kms_vblank: executing
12811 10:03:43.826939 IGT-Version: 1.2<14>[ 28.453090] [IGT] kms_vblank: exiting, ret=77
12812 10:03:43.829928 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12813 10:03:43.833512 Opened device: /dev/dri/card0
12814 10:03:43.840122 N<8>[ 28.464245] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset-rpm RESULT=skip>
12815 10:03:43.840886 Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset-rpm RESULT=skip
12817 10:03:43.846707 o KMS driver or no outputs, pipes: 8, outputs: 0
12818 10:03:43.850175 [1mSubtest pipe-C-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
12819 10:03:43.863242 <14>[ 28.491622] [IGT] kms_vblank: executing
12820 10:03:43.870708 IGT-Version: 1.2<14>[ 28.496643] [IGT] kms_vblank: exiting, ret=77
12821 10:03:43.873396 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12822 10:03:43.877022 Opened device: /dev/dri/card0
12823 10:03:43.883749 N<8>[ 28.507900] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-accuracy-idle RESULT=skip>
12824 10:03:43.884424 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-accuracy-idle RESULT=skip
12826 10:03:43.886760 o KMS driver or no outputs, pipes: 8, outputs: 0
12827 10:03:43.893568 [1mSubtest pipe-D-accuracy-idle: SKIP (0.000s)[0m
12828 10:03:43.906330 <14>[ 28.533705] [IGT] kms_vblank: executing
12829 10:03:43.912923 IGT-Version: 1.2<14>[ 28.538674] [IGT] kms_vblank: exiting, ret=77
12830 10:03:43.915622 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12831 10:03:43.919189 Opened device: /dev/dri/card0
12832 10:03:43.925758 N<8>[ 28.549766] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-idle RESULT=skip>
12833 10:03:43.926465 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-idle RESULT=skip
12835 10:03:43.929127 o KMS driver or no outputs, pipes: 8, outputs: 0
12836 10:03:43.935606 [1mSubtest pipe-D-query-idle: SKIP (0.000s)[0m
12837 10:03:43.948563 <14>[ 28.576534] [IGT] kms_vblank: executing
12838 10:03:43.955187 IGT-Version: 1.2<14>[ 28.581613] [IGT] kms_vblank: exiting, ret=77
12839 10:03:43.958783 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12840 10:03:43.961548 Opened device: /dev/dri/card0
12841 10:03:43.968432 N<8>[ 28.593234] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-idle-hang RESULT=skip>
12842 10:03:43.969159 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-idle-hang RESULT=skip
12844 10:03:43.971734 o KMS driver or no outputs, pipes: 8, outputs: 0
12845 10:03:43.978135 [1mSubtest pipe-D-query-idle-hang: SKIP (0.000s)[0m
12846 10:03:43.992360 <14>[ 28.620095] [IGT] kms_vblank: executing
12847 10:03:43.998850 IGT-Version: 1.2<14>[ 28.625291] [IGT] kms_vblank: exiting, ret=77
12848 10:03:44.002440 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12849 10:03:44.005546 Opened device: /dev/dri/card0
12850 10:03:44.012182 N<8>[ 28.636758] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked RESULT=skip>
12851 10:03:44.012934 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked RESULT=skip
12853 10:03:44.015669 o KMS driver or no outputs, pipes: 8, outputs: 0
12854 10:03:44.022006 [1mSubtest pipe-D-query-forked: SKIP (0.000s)[0m
12855 10:03:44.034292 <14>[ 28.662332] [IGT] kms_vblank: executing
12856 10:03:44.040910 IGT-Version: 1.2<14>[ 28.667404] [IGT] kms_vblank: exiting, ret=77
12857 10:03:44.044019 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12858 10:03:44.047473 Opened device: /dev/dri/card0
12859 10:03:44.054273 N<8>[ 28.678585] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-hang RESULT=skip>
12860 10:03:44.054979 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-hang RESULT=skip
12862 10:03:44.057339 o KMS driver or no outputs, pipes: 8, outputs: 0
12863 10:03:44.063877 [1mSubtest pipe-D-query-forked-hang: SKIP (0.000s)[0m
12864 10:03:44.077762 <14>[ 28.705665] [IGT] kms_vblank: executing
12865 10:03:44.084330 IGT-Version: 1.2<14>[ 28.710840] [IGT] kms_vblank: exiting, ret=77
12866 10:03:44.087262 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12867 10:03:44.090888 Opened device: /dev/dri/card0
12868 10:03:44.097467 N<8>[ 28.722394] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-busy RESULT=skip>
12869 10:03:44.098185 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-busy RESULT=skip
12871 10:03:44.100882 o KMS driver or no outputs, pipes: 8, outputs: 0
12872 10:03:44.107117 [1mSubtest pipe-D-query-busy: SKIP (0.000s)[0m
12873 10:03:44.119580 <14>[ 28.747686] [IGT] kms_vblank: executing
12874 10:03:44.126477 IGT-Version: 1.2<14>[ 28.752672] [IGT] kms_vblank: exiting, ret=77
12875 10:03:44.129725 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12876 10:03:44.132908 Opened device: /dev/dri/card0
12877 10:03:44.139222 N<8>[ 28.763777] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-busy-hang RESULT=skip>
12878 10:03:44.139951 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-busy-hang RESULT=skip
12880 10:03:44.142536 o KMS driver or no outputs, pipes: 8, outputs: 0
12881 10:03:44.149665 [1mSubtest pipe-D-query-busy-hang: SKIP (0.000s)[0m
12882 10:03:44.162092 <14>[ 28.789943] [IGT] kms_vblank: executing
12883 10:03:44.168660 IGT-Version: 1.2<14>[ 28.794919] [IGT] kms_vblank: exiting, ret=77
12884 10:03:44.171710 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12885 10:03:44.175363 Opened device: /dev/dri/card0
12886 10:03:44.181640 N<8>[ 28.805893] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-busy RESULT=skip>
12887 10:03:44.182327 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-busy RESULT=skip
12889 10:03:44.184941 o KMS driver or no outputs, pipes: 8, outputs: 0
12890 10:03:44.191702 [1mSubtest pipe-D-query-forked-busy: SKIP (0.000s)[0m
12891 10:03:44.205211 <14>[ 28.833322] [IGT] kms_vblank: executing
12892 10:03:44.211826 IGT-Version: 1.2<14>[ 28.838400] [IGT] kms_vblank: exiting, ret=77
12893 10:03:44.215328 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12894 10:03:44.218571 Opened device: /dev/dri/card0
12895 10:03:44.225353 N<8>[ 28.849982] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-busy-hang RESULT=skip>
12896 10:03:44.226034 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-busy-hang RESULT=skip
12898 10:03:44.232081 o KMS driver or no outputs, pipes: 8, outputs: 0
12899 10:03:44.235075 [1mSubtest pipe-D-query-forked-busy-hang: SKIP (0.000s)[0m
12900 10:03:44.248770 <14>[ 28.876529] [IGT] kms_vblank: executing
12901 10:03:44.254950 IGT-Version: 1.2<14>[ 28.881503] [IGT] kms_vblank: exiting, ret=77
12902 10:03:44.258676 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12903 10:03:44.261513 Opened device: /dev/dri/card0
12904 10:03:44.268398 N<8>[ 28.892719] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-idle RESULT=skip>
12905 10:03:44.269164 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-idle RESULT=skip
12907 10:03:44.271736 o KMS driver or no outputs, pipes: 8, outputs: 0
12908 10:03:44.278290 [1mSubtest pipe-D-wait-idle: SKIP (0.000s)[0m
12909 10:03:44.292007 <14>[ 28.919675] [IGT] kms_vblank: executing
12910 10:03:44.298102 IGT-Version: 1.2<14>[ 28.924871] [IGT] kms_vblank: exiting, ret=77
12911 10:03:44.301374 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12912 10:03:44.305131 Opened device: /dev/dri/card0
12913 10:03:44.311588 N<8>[ 28.936099] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-idle-hang RESULT=skip>
12914 10:03:44.312279 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-idle-hang RESULT=skip
12916 10:03:44.314605 o KMS driver or no outputs, pipes: 8, outputs: 0
12917 10:03:44.321528 [1mSubtest pipe-D-wait-idle-hang: SKIP (0.000s)[0m
12918 10:03:44.333640 <14>[ 28.962108] [IGT] kms_vblank: executing
12919 10:03:44.340599 IGT-Version: 1.2<14>[ 28.967120] [IGT] kms_vblank: exiting, ret=77
12920 10:03:44.343648 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12921 10:03:44.350709 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked RESULT=skip
12923 10:03:44.353480 Opened device: /<8>[ 28.978052] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked RESULT=skip>
12924 10:03:44.353585 dev/dri/card0
12925 10:03:44.357107 No KMS driver or no outputs, pipes: 8, outputs: 0
12926 10:03:44.363712 [1mSubtest pipe-D-wait-forked: SKIP (0.000s)[0m
12927 10:03:44.374524 <14>[ 29.002684] [IGT] kms_vblank: executing
12928 10:03:44.380638 IGT-Version: 1.2<14>[ 29.007878] [IGT] kms_vblank: exiting, ret=77
12929 10:03:44.384388 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12930 10:03:44.394281 Opened device: /<8>[ 29.018688] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-hang RESULT=skip>
12931 10:03:44.394400 dev/dri/card0
12932 10:03:44.394653 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-hang RESULT=skip
12934 10:03:44.397380 No KMS driver or no outputs, pipes: 8, outputs: 0
12935 10:03:44.404125 [1mSubtest pipe-D-wait-forked-hang: SKIP (0.000s)[0m
12936 10:03:44.415393 <14>[ 29.043715] [IGT] kms_vblank: executing
12937 10:03:44.421849 IGT-Version: 1.2<14>[ 29.048675] [IGT] kms_vblank: exiting, ret=77
12938 10:03:44.426147 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12939 10:03:44.428872 Opened device: /dev/dri/card0
12940 10:03:44.435743 N<8>[ 29.059746] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-busy RESULT=skip>
12941 10:03:44.436472 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-busy RESULT=skip
12943 10:03:44.439306 o KMS driver or no outputs, pipes: 8, outputs: 0
12944 10:03:44.445699 [1mSubtest pipe-D-wait-busy: SKIP (0.000s)[0m
12945 10:03:44.458172 <14>[ 29.086402] [IGT] kms_vblank: executing
12946 10:03:44.464778 IGT-Version: 1.2<14>[ 29.091573] [IGT] kms_vblank: exiting, ret=77
12947 10:03:44.468034 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12948 10:03:44.471592 Opened device: /dev/dri/card0
12949 10:03:44.478113 N<8>[ 29.102896] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-busy-hang RESULT=skip>
12950 10:03:44.478908 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-busy-hang RESULT=skip
12952 10:03:44.482061 o KMS driver or no outputs, pipes: 8, outputs: 0
12953 10:03:44.488177 [1mSubtest pipe-D-wait-busy-hang: SKIP (0.000s)[0m
12954 10:03:44.500306 <14>[ 29.128668] [IGT] kms_vblank: executing
12955 10:03:44.507079 IGT-Version: 1.2<14>[ 29.133687] [IGT] kms_vblank: exiting, ret=77
12956 10:03:44.510427 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12957 10:03:44.514052 Opened device: /dev/dri/card0
12958 10:03:44.520284 N<8>[ 29.144864] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-busy RESULT=skip>
12959 10:03:44.520968 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-busy RESULT=skip
12961 10:03:44.523718 o KMS driver or no outputs, pipes: 8, outputs: 0
12962 10:03:44.530436 [1mSubtest pipe-D-wait-forked-busy: SKIP (0.000s)[0m
12963 10:03:44.543765 <14>[ 29.171906] [IGT] kms_vblank: executing
12964 10:03:44.550670 IGT-Version: 1.2<14>[ 29.176986] [IGT] kms_vblank: exiting, ret=77
12965 10:03:44.553791 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12966 10:03:44.556979 Opened device: /dev/dri/card0
12967 10:03:44.563767 N<8>[ 29.188291] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-busy-hang RESULT=skip>
12968 10:03:44.564452 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-busy-hang RESULT=skip
12970 10:03:44.570359 o KMS driver or no outputs, pipes: 8, outputs: 0
12971 10:03:44.574027 [1mSubtest pipe-D-wait-forked-busy-hang: SKIP (0.000s)[0m
12972 10:03:44.587505 <14>[ 29.215421] [IGT] kms_vblank: executing
12973 10:03:44.593680 IGT-Version: 1.2<14>[ 29.220391] [IGT] kms_vblank: exiting, ret=77
12974 10:03:44.597348 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12975 10:03:44.600584 Opened device: /dev/dri/card0
12976 10:03:44.607084 N<8>[ 29.231767] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-idle RESULT=skip>
12977 10:03:44.607766 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-idle RESULT=skip
12979 10:03:44.613948 o KMS driver or no outputs, pipes: 8, outputs: 0
12980 10:03:44.616864 [1mSubtest pipe-D-ts-continuation-idle: SKIP (0.000s)[0m
12981 10:03:44.629720 <14>[ 29.258042] [IGT] kms_vblank: executing
12982 10:03:44.636413 IGT-Version: 1.2<14>[ 29.262976] [IGT] kms_vblank: exiting, ret=77
12983 10:03:44.639340 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12984 10:03:44.643353 Opened device: /dev/dri/card0
12985 10:03:44.649866 N<8>[ 29.274159] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-idle-hang RESULT=skip>
12986 10:03:44.650537 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-idle-hang RESULT=skip
12988 10:03:44.656624 o KMS driver or no outputs, pipes: 8, outputs: 0
12989 10:03:44.659220 [1mSubtest pipe-D-ts-continuation-idle-hang: SKIP (0.000s)[0m
12990 10:03:44.672799 <14>[ 29.301012] [IGT] kms_vblank: executing
12991 10:03:44.679353 IGT-Version: 1.2<14>[ 29.306011] [IGT] kms_vblank: exiting, ret=77
12992 10:03:44.683067 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
12993 10:03:44.686674 Opened device: /dev/dri/card0
12994 10:03:44.692962 N<8>[ 29.317427] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-dpms-rpm RESULT=skip>
12995 10:03:44.693641 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-dpms-rpm RESULT=skip
12997 10:03:44.699669 o KMS driver or no outputs, pipes: 8, outputs: 0
12998 10:03:44.702990 [1mSubtest pipe-D-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
12999 10:03:44.716886 <14>[ 29.345085] [IGT] kms_vblank: executing
13000 10:03:44.723999 IGT-Version: 1.2<14>[ 29.350386] [IGT] kms_vblank: exiting, ret=77
13001 10:03:44.726800 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13002 10:03:44.730399 Opened device: /dev/dri/card0
13003 10:03:44.737424 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-dpms-suspend RESULT=skip
13005 10:03:44.740267 N<8>[ 29.361579] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-dpms-suspend RESULT=skip>
13006 10:03:44.743366 o KMS driver or no outputs, pipes: 8, outputs: 0
13007 10:03:44.750281 [1mSubtest pipe-D-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13008 10:03:44.760447 <14>[ 29.388765] [IGT] kms_vblank: executing
13009 10:03:44.767463 IGT-Version: 1.2<14>[ 29.393769] [IGT] kms_vblank: exiting, ret=77
13010 10:03:44.770610 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13011 10:03:44.780860 Opened device: /<8>[ 29.404696] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-suspend RESULT=skip>
13012 10:03:44.781306 dev/dri/card0
13013 10:03:44.781929 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-suspend RESULT=skip
13015 10:03:44.787570 No KMS driver or no outputs, pipes: 8, outputs: 0
13016 10:03:44.790367 [1mSubtest pipe-D-ts-continuation-suspend: SKIP (0.000s)[0m
13017 10:03:44.801883 <14>[ 29.430301] [IGT] kms_vblank: executing
13018 10:03:44.808671 IGT-Version: 1.2<14>[ 29.435358] [IGT] kms_vblank: exiting, ret=77
13019 10:03:44.812357 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13020 10:03:44.821842 Opened device: /<8>[ 29.446154] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset RESULT=skip>
13021 10:03:44.821925 dev/dri/card0
13022 10:03:44.822159 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset RESULT=skip
13024 10:03:44.828602 No KMS driver or no outputs, pipes: 8, outputs: 0
13025 10:03:44.831922 [1mSubtest pipe-D-ts-continuation-modeset: SKIP (0.000s)[0m
13026 10:03:44.844691 <14>[ 29.472851] [IGT] kms_vblank: executing
13027 10:03:44.850985 IGT-Version: 1.2<14>[ 29.477852] [IGT] kms_vblank: exiting, ret=77
13028 10:03:44.855061 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13029 10:03:44.857763 Opened device: /dev/dri/card0
13030 10:03:44.864622 N<8>[ 29.489376] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset-hang RESULT=skip>
13031 10:03:44.865089 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset-hang RESULT=skip
13033 10:03:44.871197 o KMS driver or no outputs, pipes: 8, outputs: 0
13034 10:03:44.877555 [1mSubtest pipe-D-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13035 10:03:44.889319 <14>[ 29.517392] [IGT] kms_vblank: executing
13036 10:03:44.895693 IGT-Version: 1.2<14>[ 29.522488] [IGT] kms_vblank: exiting, ret=77
13037 10:03:44.899558 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13038 10:03:44.902571 Opened device: /dev/dri/card0
13039 10:03:44.909226 N<8>[ 29.533781] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset-rpm RESULT=skip>
13040 10:03:44.910037 Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset-rpm RESULT=skip
13042 10:03:44.915742 o KMS driver or no outputs, pipes: 8, outputs: 0
13043 10:03:44.919303 [1mSubtest pipe-D-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13044 10:03:44.932461 <14>[ 29.560779] [IGT] kms_vblank: executing
13045 10:03:44.939061 IGT-Version: 1.2<14>[ 29.565764] [IGT] kms_vblank: exiting, ret=77
13046 10:03:44.942420 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13047 10:03:44.952768 Opened device: /<8>[ 29.576653] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-accuracy-idle RESULT=skip>
13048 10:03:44.953258 dev/dri/card0
13049 10:03:44.953867 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-accuracy-idle RESULT=skip
13051 10:03:44.955841 No KMS driver or no outputs, pipes: 8, outputs: 0
13052 10:03:44.962461 [1mSubtest pipe-E-accuracy-idle: SKIP (0.000s)[0m
13053 10:03:44.973191 <14>[ 29.601195] [IGT] kms_vblank: executing
13054 10:03:44.979949 IGT-Version: 1.2<14>[ 29.606382] [IGT] kms_vblank: exiting, ret=77
13055 10:03:44.982959 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13056 10:03:44.993430 Opened device: /<8>[ 29.617266] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-idle RESULT=skip>
13057 10:03:44.993856 dev/dri/card0
13058 10:03:44.994475 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-idle RESULT=skip
13060 10:03:44.996326 No KMS driver or no outputs, pipes: 8, outputs: 0
13061 10:03:45.002858 [1mSubtest pipe-E-query-idle: SKIP (0.000s)[0m
13062 10:03:45.014218 <14>[ 29.642021] [IGT] kms_vblank: executing
13063 10:03:45.020395 IGT-Version: 1.2<14>[ 29.647060] [IGT] kms_vblank: exiting, ret=77
13064 10:03:45.023907 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13065 10:03:45.033973 Opened device: /<8>[ 29.657902] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-idle-hang RESULT=skip>
13066 10:03:45.034419 dev/dri/card0
13067 10:03:45.035168 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-idle-hang RESULT=skip
13069 10:03:45.037262 No KMS driver or no outputs, pipes: 8, outputs: 0
13070 10:03:45.043868 [1mSubtest pipe-E-query-idle-hang: SKIP (0.000s)[0m
13071 10:03:45.054716 <14>[ 29.682759] [IGT] kms_vblank: executing
13072 10:03:45.061496 IGT-Version: 1.2<14>[ 29.687892] [IGT] kms_vblank: exiting, ret=77
13073 10:03:45.064670 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13074 10:03:45.067906 Opened device: /dev/dri/card0
13075 10:03:45.074960 N<8>[ 29.698753] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked RESULT=skip>
13076 10:03:45.075857 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked RESULT=skip
13078 10:03:45.078200 o KMS driver or no outputs, pipes: 8, outputs: 0
13079 10:03:45.084739 [1mSubtest pipe-E-query-forked: SKIP (0.000s)[0m
13080 10:03:45.096937 <14>[ 29.724719] [IGT] kms_vblank: executing
13081 10:03:45.103467 IGT-Version: 1.2<14>[ 29.729713] [IGT] kms_vblank: exiting, ret=77
13082 10:03:45.106935 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13083 10:03:45.110126 Opened device: /dev/dri/card0
13084 10:03:45.116734 N<8>[ 29.740862] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-hang RESULT=skip>
13085 10:03:45.117604 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-hang RESULT=skip
13087 10:03:45.120068 o KMS driver or no outputs, pipes: 8, outputs: 0
13088 10:03:45.126359 [1mSubtest pipe-E-query-forked-hang: SKIP (0.000s)[0m
13089 10:03:45.138867 <14>[ 29.767100] [IGT] kms_vblank: executing
13090 10:03:45.145396 IGT-Version: 1.2<14>[ 29.772094] [IGT] kms_vblank: exiting, ret=77
13091 10:03:45.148535 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13092 10:03:45.155898 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-busy RESULT=skip
13094 10:03:45.158550 Opened device: /<8>[ 29.782947] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-busy RESULT=skip>
13095 10:03:45.159014 dev/dri/card0
13096 10:03:45.162146 No KMS driver or no outputs, pipes: 8, outputs: 0
13097 10:03:45.168794 [1mSubtest pipe-E-query-busy: SKIP (0.000s)[0m
13098 10:03:45.179322 <14>[ 29.807634] [IGT] kms_vblank: executing
13099 10:03:45.186467 IGT-Version: 1.2<14>[ 29.812674] [IGT] kms_vblank: exiting, ret=77
13100 10:03:45.189409 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13101 10:03:45.192949 Opened device: /dev/dri/card0
13102 10:03:45.199670 N<8>[ 29.823736] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-busy-hang RESULT=skip>
13103 10:03:45.200402 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-busy-hang RESULT=skip
13105 10:03:45.202738 o KMS driver or no outputs, pipes: 8, outputs: 0
13106 10:03:45.209026 [1mSubtest pipe-E-query-busy-hang: SKIP (0.000s)[0m
13107 10:03:45.221687 <14>[ 29.850012] [IGT] kms_vblank: executing
13108 10:03:45.228331 IGT-Version: 1.2<14>[ 29.854998] [IGT] kms_vblank: exiting, ret=77
13109 10:03:45.231171 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13110 10:03:45.241475 Opened device: /<8>[ 29.865843] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-busy RESULT=skip>
13111 10:03:45.241572 dev/dri/card0
13112 10:03:45.241819 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-busy RESULT=skip
13114 10:03:45.247542 No KMS driver or no outputs, pipes: 8, outputs: 0
13115 10:03:45.251175 [1mSubtest pipe-E-query-forked-busy: SKIP (0.000s)[0m
13116 10:03:45.262747 <14>[ 29.890998] [IGT] kms_vblank: executing
13117 10:03:45.269540 IGT-Version: 1.2<14>[ 29.896016] [IGT] kms_vblank: exiting, ret=77
13118 10:03:45.273133 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13119 10:03:45.276396 Opened device: /dev/dri/card0
13120 10:03:45.282862 N<8>[ 29.906965] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-busy-hang RESULT=skip>
13121 10:03:45.283191 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-busy-hang RESULT=skip
13123 10:03:45.289332 o KMS driver or no outputs, pipes: 8, outputs: 0
13124 10:03:45.293150 [1mSubtest pipe-E-query-forked-busy-hang: SKIP (0.000s)[0m
13125 10:03:45.305382 <14>[ 29.933743] [IGT] kms_vblank: executing
13126 10:03:45.311628 IGT-Version: 1.2<14>[ 29.938714] [IGT] kms_vblank: exiting, ret=77
13127 10:03:45.315114 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13128 10:03:45.318292 Opened device: /dev/dri/card0
13129 10:03:45.325100 N<8>[ 29.949704] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-idle RESULT=skip>
13130 10:03:45.325374 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-idle RESULT=skip
13132 10:03:45.328580 o KMS driver or no outputs, pipes: 8, outputs: 0
13133 10:03:45.335209 [1mSubtest pipe-E-wait-idle: SKIP (0.000s)[0m
13134 10:03:45.347189 <14>[ 29.975567] [IGT] kms_vblank: executing
13135 10:03:45.353883 IGT-Version: 1.2<14>[ 29.980579] [IGT] kms_vblank: exiting, ret=77
13136 10:03:45.357373 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13137 10:03:45.360884 Opened device: /dev/dri/card0
13138 10:03:45.367208 N<8>[ 29.991628] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-idle-hang RESULT=skip>
13139 10:03:45.367911 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-idle-hang RESULT=skip
13141 10:03:45.370340 o KMS driver or no outputs, pipes: 8, outputs: 0
13142 10:03:45.377069 [1mSubtest pipe-E-wait-idle-hang: SKIP (0.000s)[0m
13143 10:03:45.390343 <14>[ 30.017932] [IGT] kms_vblank: executing
13144 10:03:45.396302 IGT-Version: 1.2<14>[ 30.022947] [IGT] kms_vblank: exiting, ret=77
13145 10:03:45.399951 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13146 10:03:45.402823 Opened device: /dev/dri/card0
13147 10:03:45.409652 N<8>[ 30.034043] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked RESULT=skip>
13148 10:03:45.409911 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked RESULT=skip
13150 10:03:45.412725 o KMS driver or no outputs, pipes: 8, outputs: 0
13151 10:03:45.419124 [1mSubtest pipe-E-wait-forked: SKIP (0.000s)[0m
13152 10:03:45.432703 <14>[ 30.061148] [IGT] kms_vblank: executing
13153 10:03:45.439247 IGT-Version: 1.2<14>[ 30.066377] [IGT] kms_vblank: exiting, ret=77
13154 10:03:45.442964 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13155 10:03:45.446203 Opened device: /dev/dri/card0
13156 10:03:45.452571 N<8>[ 30.077421] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-hang RESULT=skip>
13157 10:03:45.452850 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-hang RESULT=skip
13159 10:03:45.456247 o KMS driver or no outputs, pipes: 8, outputs: 0
13160 10:03:45.462816 [1mSubtest pipe-E-wait-forked-hang: SKIP (0.000s)[0m
13161 10:03:45.475595 <14>[ 30.103571] [IGT] kms_vblank: executing
13162 10:03:45.482065 IGT-Version: 1.2<14>[ 30.108560] [IGT] kms_vblank: exiting, ret=77
13163 10:03:45.485486 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13164 10:03:45.488959 Opened device: /dev/dri/card0
13165 10:03:45.495350 N<8>[ 30.119673] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-busy RESULT=skip>
13166 10:03:45.495609 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-busy RESULT=skip
13168 10:03:45.498569 o KMS driver or no outputs, pipes: 8, outputs: 0
13169 10:03:45.505102 [1mSubtest pipe-E-wait-busy: SKIP (0.000s)[0m
13170 10:03:45.516769 <14>[ 30.145330] [IGT] kms_vblank: executing
13171 10:03:45.523281 IGT-Version: 1.2<14>[ 30.150325] [IGT] kms_vblank: exiting, ret=77
13172 10:03:45.526993 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13173 10:03:45.529931 Opened device: /dev/dri/card0
13174 10:03:45.536558 N<8>[ 30.161455] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-busy-hang RESULT=skip>
13175 10:03:45.536830 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-busy-hang RESULT=skip
13177 10:03:45.540019 o KMS driver or no outputs, pipes: 8, outputs: 0
13178 10:03:45.546692 [1mSubtest pipe-E-wait-busy-hang: SKIP (0.000s)[0m
13179 10:03:45.560151 <14>[ 30.188465] [IGT] kms_vblank: executing
13180 10:03:45.566789 IGT-Version: 1.2<14>[ 30.193636] [IGT] kms_vblank: exiting, ret=77
13181 10:03:45.569873 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13182 10:03:45.573757 Opened device: /dev/dri/card0
13183 10:03:45.580011 N<8>[ 30.204778] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-busy RESULT=skip>
13184 10:03:45.580270 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-busy RESULT=skip
13186 10:03:45.583373 o KMS driver or no outputs, pipes: 8, outputs: 0
13187 10:03:45.589735 [1mSubtest pipe-E-wait-forked-busy: SKIP (0.000s)[0m
13188 10:03:45.602721 <14>[ 30.231043] [IGT] kms_vblank: executing
13189 10:03:45.609153 IGT-Version: 1.2<14>[ 30.236056] [IGT] kms_vblank: exiting, ret=77
13190 10:03:45.612585 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13191 10:03:45.615913 Opened device: /dev/dri/card0
13192 10:03:45.622403 N<8>[ 30.247035] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-busy-hang RESULT=skip>
13193 10:03:45.622670 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-busy-hang RESULT=skip
13195 10:03:45.628820 o KMS driver or no outputs, pipes: 8, outputs: 0
13196 10:03:45.632482 [1mSubtest pipe-E-wait-forked-busy-hang: SKIP (0.000s)[0m
13197 10:03:45.646173 <14>[ 30.273939] [IGT] kms_vblank: executing
13198 10:03:45.652440 IGT-Version: 1.2<14>[ 30.278933] [IGT] kms_vblank: exiting, ret=77
13199 10:03:45.655413 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13200 10:03:45.658746 Opened device: /dev/dri/card0
13201 10:03:45.665685 N<8>[ 30.290251] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-idle RESULT=skip>
13202 10:03:45.666373 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-idle RESULT=skip
13204 10:03:45.672286 o KMS driver or no outputs, pipes: 8, outputs: 0
13205 10:03:45.674830 [1mSubtest pipe-E-ts-continuation-idle: SKIP (0.000s)[0m
13206 10:03:45.688038 <14>[ 30.316658] [IGT] kms_vblank: executing
13207 10:03:45.694950 IGT-Version: 1.2<14>[ 30.321729] [IGT] kms_vblank: exiting, ret=77
13208 10:03:45.697969 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13209 10:03:45.701344 Opened device: /dev/dri/card0
13210 10:03:45.708323 N<8>[ 30.332856] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-idle-hang RESULT=skip>
13211 10:03:45.708606 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-idle-hang RESULT=skip
13213 10:03:45.714921 o KMS driver or no outputs, pipes: 8, outputs: 0
13214 10:03:45.718388 [1mSubtest pipe-E-ts-continuation-idle-hang: SKIP (0.000s)[0m
13215 10:03:45.732679 <14>[ 30.360743] [IGT] kms_vblank: executing
13216 10:03:45.739281 IGT-Version: 1.2<14>[ 30.365893] [IGT] kms_vblank: exiting, ret=77
13217 10:03:45.741988 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13218 10:03:45.745654 Opened device: /dev/dri/card0
13219 10:03:45.752589 N<8>[ 30.377570] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-dpms-rpm RESULT=skip>
13220 10:03:45.752829 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-dpms-rpm RESULT=skip
13222 10:03:45.758796 o KMS driver or no outputs, pipes: 8, outputs: 0
13223 10:03:45.761950 [1mSubtest pipe-E-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13224 10:03:45.777079 <14>[ 30.405123] [IGT] kms_vblank: executing
13225 10:03:45.783420 IGT-Version: 1.2<14>[ 30.410206] [IGT] kms_vblank: exiting, ret=77
13226 10:03:45.786964 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13227 10:03:45.790256 Opened device: /dev/dri/card0
13228 10:03:45.797046 N<8>[ 30.421474] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-dpms-suspend RESULT=skip>
13229 10:03:45.797352 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-dpms-suspend RESULT=skip
13231 10:03:45.803306 o KMS driver or no outputs, pipes: 8, outputs: 0
13232 10:03:45.809938 [1mSubtest pipe-E-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13233 10:03:45.820993 <14>[ 30.448479] [IGT] kms_vblank: executing
13234 10:03:45.826811 IGT-Version: 1.2<14>[ 30.453572] [IGT] kms_vblank: exiting, ret=77
13235 10:03:45.829872 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13236 10:03:45.833587 Opened device: /dev/dri/card0
13237 10:03:45.839759 N<8>[ 30.464559] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-suspend RESULT=skip>
13238 10:03:45.840034 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-suspend RESULT=skip
13240 10:03:45.846334 o KMS driver or no outputs, pipes: 8, outputs: 0
13241 10:03:45.850048 [1mSubtest pipe-E-ts-continuation-suspend: SKIP (0.000s)[0m
13242 10:03:45.863751 <14>[ 30.491518] [IGT] kms_vblank: executing
13243 10:03:45.869539 IGT-Version: 1.2<14>[ 30.496617] [IGT] kms_vblank: exiting, ret=77
13244 10:03:45.873037 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13245 10:03:45.876631 Opened device: /dev/dri/card0
13246 10:03:45.883238 N<8>[ 30.507719] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset RESULT=skip>
13247 10:03:45.883566 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset RESULT=skip
13249 10:03:45.889849 o KMS driver or no outputs, pipes: 8, outputs: 0
13250 10:03:45.892679 [1mSubtest pipe-E-ts-continuation-modeset: SKIP (0.000s)[0m
13251 10:03:45.905937 <14>[ 30.534478] [IGT] kms_vblank: executing
13252 10:03:45.912479 IGT-Version: 1.2<14>[ 30.539547] [IGT] kms_vblank: exiting, ret=77
13253 10:03:45.915819 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13254 10:03:45.919327 Opened device: /dev/dri/card0
13255 10:03:45.925803 N<8>[ 30.550505] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset-hang RESULT=skip>
13256 10:03:45.926066 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset-hang RESULT=skip
13258 10:03:45.932271 o KMS driver or no outputs, pipes: 8, outputs: 0
13259 10:03:45.939000 [1mSubtest pipe-E-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13260 10:03:45.949890 <14>[ 30.578722] [IGT] kms_vblank: executing
13261 10:03:45.956925 IGT-Version: 1.2<14>[ 30.583893] [IGT] kms_vblank: exiting, ret=77
13262 10:03:45.960388 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13263 10:03:45.963728 Opened device: /dev/dri/card0
13264 10:03:45.970230 N<8>[ 30.595299] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset-rpm RESULT=skip>
13265 10:03:45.970488 Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset-rpm RESULT=skip
13267 10:03:45.976730 o KMS driver or no outputs, pipes: 8, outputs: 0
13268 10:03:45.980004 [1mSubtest pipe-E-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13269 10:03:45.993541 <14>[ 30.621999] [IGT] kms_vblank: executing
13270 10:03:46.000336 IGT-Version: 1.2<14>[ 30.626999] [IGT] kms_vblank: exiting, ret=77
13271 10:03:46.003422 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13272 10:03:46.006843 Opened device: /dev/dri/card0
13273 10:03:46.013136 N<8>[ 30.638011] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-accuracy-idle RESULT=skip>
13274 10:03:46.013399 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-accuracy-idle RESULT=skip
13276 10:03:46.016527 o KMS driver or no outputs, pipes: 8, outputs: 0
13277 10:03:46.023418 [1mSubtest pipe-F-accuracy-idle: SKIP (0.000s)[0m
13278 10:03:46.036537 <14>[ 30.665008] [IGT] kms_vblank: executing
13279 10:03:46.043245 IGT-Version: 1.2<14>[ 30.670512] [IGT] kms_vblank: exiting, ret=77
13280 10:03:46.046128 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13281 10:03:46.049825 Opened device: /dev/dri/card0
13282 10:03:46.056005 N<8>[ 30.681942] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-idle RESULT=skip>
13283 10:03:46.056262 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-idle RESULT=skip
13285 10:03:46.059705 o KMS driver or no outputs, pipes: 8, outputs: 0
13286 10:03:46.066312 [1mSubtest pipe-F-query-idle: SKIP (0.000s)[0m
13287 10:03:46.079662 <14>[ 30.708412] [IGT] kms_vblank: executing
13288 10:03:46.086446 IGT-Version: 1.2<14>[ 30.713603] [IGT] kms_vblank: exiting, ret=77
13289 10:03:46.089728 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13290 10:03:46.093097 Opened device: /dev/dri/card0
13291 10:03:46.099808 N<8>[ 30.724743] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-idle-hang RESULT=skip>
13292 10:03:46.100143 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-idle-hang RESULT=skip
13294 10:03:46.102913 o KMS driver or no outputs, pipes: 8, outputs: 0
13295 10:03:46.109827 [1mSubtest pipe-F-query-idle-hang: SKIP (0.000s)[0m
13296 10:03:46.122809 <14>[ 30.750780] [IGT] kms_vblank: executing
13297 10:03:46.128816 IGT-Version: 1.2<14>[ 30.755945] [IGT] kms_vblank: exiting, ret=77
13298 10:03:46.132404 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13299 10:03:46.135970 Opened device: /dev/dri/card0
13300 10:03:46.142544 N<8>[ 30.766810] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked RESULT=skip>
13301 10:03:46.143264 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked RESULT=skip
13303 10:03:46.146086 o KMS driver or no outputs, pipes: 8, outputs: 0
13304 10:03:46.152080 [1mSubtest pipe-F-query-forked: SKIP (0.000s)[0m
13305 10:03:46.164238 <14>[ 30.792800] [IGT] kms_vblank: executing
13306 10:03:46.170489 IGT-Version: 1.2<14>[ 30.797897] [IGT] kms_vblank: exiting, ret=77
13307 10:03:46.174413 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13308 10:03:46.177547 Opened device: /dev/dri/card0
13309 10:03:46.183905 N<8>[ 30.808936] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-hang RESULT=skip>
13310 10:03:46.184170 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-hang RESULT=skip
13312 10:03:46.190673 o KMS driver or no outputs, pipes: 8, outputs: 0
13313 10:03:46.194407 [1mSubtest pipe-F-query-forked-hang: SKIP (0.000s)[0m
13314 10:03:46.208135 <14>[ 30.836361] [IGT] kms_vblank: executing
13315 10:03:46.214657 IGT-Version: 1.2<14>[ 30.841649] [IGT] kms_vblank: exiting, ret=77
13316 10:03:46.217929 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13317 10:03:46.220945 Opened device: /dev/dri/card0
13318 10:03:46.227721 N<8>[ 30.852551] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-busy RESULT=skip>
13319 10:03:46.227984 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-busy RESULT=skip
13321 10:03:46.231017 o KMS driver or no outputs, pipes: 8, outputs: 0
13322 10:03:46.237629 [1mSubtest pipe-F-query-busy: SKIP (0.000s)[0m
13323 10:03:46.249669 <14>[ 30.878221] [IGT] kms_vblank: executing
13324 10:03:46.256719 IGT-Version: 1.2<14>[ 30.883206] [IGT] kms_vblank: exiting, ret=77
13325 10:03:46.259658 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13326 10:03:46.262682 Opened device: /dev/dri/card0
13327 10:03:46.269734 N<8>[ 30.894412] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-busy-hang RESULT=skip>
13328 10:03:46.269990 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-busy-hang RESULT=skip
13330 10:03:46.272616 o KMS driver or no outputs, pipes: 8, outputs: 0
13331 10:03:46.279330 [1mSubtest pipe-F-query-busy-hang: SKIP (0.000s)[0m
13332 10:03:46.293047 <14>[ 30.921545] [IGT] kms_vblank: executing
13333 10:03:46.299999 IGT-Version: 1.2<14>[ 30.926778] [IGT] kms_vblank: exiting, ret=77
13334 10:03:46.303111 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13335 10:03:46.306529 Opened device: /dev/dri/card0
13336 10:03:46.313049 N<8>[ 30.937994] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-busy RESULT=skip>
13337 10:03:46.313338 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-busy RESULT=skip
13339 10:03:46.319277 o KMS driver or no outputs, pipes: 8, outputs: 0
13340 10:03:46.323127 [1mSubtest pipe-F-query-forked-busy: SKIP (0.000s)[0m
13341 10:03:46.336839 <14>[ 30.965221] [IGT] kms_vblank: executing
13342 10:03:46.343181 IGT-Version: 1.2<14>[ 30.970276] [IGT] kms_vblank: exiting, ret=77
13343 10:03:46.346668 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13344 10:03:46.350314 Opened device: /dev/dri/card0
13345 10:03:46.356523 N<8>[ 30.981538] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-busy-hang RESULT=skip>
13346 10:03:46.356820 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-busy-hang RESULT=skip
13348 10:03:46.363549 o KMS driver or no outputs, pipes: 8, outputs: 0
13349 10:03:46.366512 [1mSubtest pipe-F-query-forked-busy-hang: SKIP (0.000s)[0m
13350 10:03:46.379682 <14>[ 31.008179] [IGT] kms_vblank: executing
13351 10:03:46.386363 IGT-Version: 1.2<14>[ 31.013119] [IGT] kms_vblank: exiting, ret=77
13352 10:03:46.389455 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13353 10:03:46.393383 Opened device: /dev/dri/card0
13354 10:03:46.399751 N<8>[ 31.024538] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-idle RESULT=skip>
13355 10:03:46.400050 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-idle RESULT=skip
13357 10:03:46.402634 o KMS driver or no outputs, pipes: 8, outputs: 0
13358 10:03:46.409245 [1mSubtest pipe-F-wait-idle: SKIP (0.000s)[0m
13359 10:03:46.422620 <14>[ 31.050964] [IGT] kms_vblank: executing
13360 10:03:46.428732 IGT-Version: 1.2<14>[ 31.056195] [IGT] kms_vblank: exiting, ret=77
13361 10:03:46.432556 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13362 10:03:46.435467 Opened device: /dev/dri/card0
13363 10:03:46.442274 N<8>[ 31.067312] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-idle-hang RESULT=skip>
13364 10:03:46.442545 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-idle-hang RESULT=skip
13366 10:03:46.445803 o KMS driver or no outputs, pipes: 8, outputs: 0
13367 10:03:46.452630 [1mSubtest pipe-F-wait-idle-hang: SKIP (0.000s)[0m
13368 10:03:46.464470 <14>[ 31.093197] [IGT] kms_vblank: executing
13369 10:03:46.471171 IGT-Version: 1.2<14>[ 31.098164] [IGT] kms_vblank: exiting, ret=77
13370 10:03:46.474811 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13371 10:03:46.477773 Opened device: /dev/dri/card0
13372 10:03:46.484212 N<8>[ 31.109489] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked RESULT=skip>
13373 10:03:46.484466 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked RESULT=skip
13375 10:03:46.487825 o KMS driver or no outputs, pipes: 8, outputs: 0
13376 10:03:46.494560 [1mSubtest pipe-F-wait-forked: SKIP (0.000s)[0m
13377 10:03:46.506256 <14>[ 31.134934] [IGT] kms_vblank: executing
13378 10:03:46.513124 IGT-Version: 1.2<14>[ 31.139899] [IGT] kms_vblank: exiting, ret=77
13379 10:03:46.516155 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13380 10:03:46.520249 Opened device: /dev/dri/card0
13381 10:03:46.525974 N<8>[ 31.151210] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-hang RESULT=skip>
13382 10:03:46.526227 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-hang RESULT=skip
13384 10:03:46.529654 o KMS driver or no outputs, pipes: 8, outputs: 0
13385 10:03:46.535956 [1mSubtest pipe-F-wait-forked-hang: SKIP (0.000s)[0m
13386 10:03:46.549722 <14>[ 31.178366] [IGT] kms_vblank: executing
13387 10:03:46.556303 IGT-Version: 1.2<14>[ 31.184016] [IGT] kms_vblank: exiting, ret=77
13388 10:03:46.559971 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13389 10:03:46.562788 Opened device: /dev/dri/card0
13390 10:03:46.569505 N<8>[ 31.194955] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-busy RESULT=skip>
13391 10:03:46.569855 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-busy RESULT=skip
13393 10:03:46.573105 o KMS driver or no outputs, pipes: 8, outputs: 0
13394 10:03:46.579459 [1mSubtest pipe-F-wait-busy: SKIP (0.000s)[0m
13395 10:03:46.593732 <14>[ 31.221987] [IGT] kms_vblank: executing
13396 10:03:46.599958 IGT-Version: 1.2<14>[ 31.227324] [IGT] kms_vblank: exiting, ret=77
13397 10:03:46.603663 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13398 10:03:46.606990 Opened device: /dev/dri/card0
13399 10:03:46.613334 N<8>[ 31.238172] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-busy-hang RESULT=skip>
13400 10:03:46.613638 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-busy-hang RESULT=skip
13402 10:03:46.616729 o KMS driver or no outputs, pipes: 8, outputs: 0
13403 10:03:46.623124 [1mSubtest pipe-F-wait-busy-hang: SKIP (0.000s)[0m
13404 10:03:46.637190 <14>[ 31.265344] [IGT] kms_vblank: executing
13405 10:03:46.643260 IGT-Version: 1.2<14>[ 31.270592] [IGT] kms_vblank: exiting, ret=77
13406 10:03:46.647079 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13407 10:03:46.650405 Opened device: /dev/dri/card0
13408 10:03:46.656770 N<8>[ 31.281690] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-busy RESULT=skip>
13409 10:03:46.657645 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-busy RESULT=skip
13411 10:03:46.660551 o KMS driver or no outputs, pipes: 8, outputs: 0
13412 10:03:46.666611 [1mSubtest pipe-F-wait-forked-busy: SKIP (0.000s)[0m
13413 10:03:46.679218 <14>[ 31.307852] [IGT] kms_vblank: executing
13414 10:03:46.685800 IGT-Version: 1.2<14>[ 31.312969] [IGT] kms_vblank: exiting, ret=77
13415 10:03:46.689402 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13416 10:03:46.692976 Opened device: /dev/dri/card0
13417 10:03:46.698919 N<8>[ 31.324014] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-busy-hang RESULT=skip>
13418 10:03:46.699193 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-busy-hang RESULT=skip
13420 10:03:46.705527 o KMS driver or no outputs, pipes: 8, outputs: 0
13421 10:03:46.709012 [1mSubtest pipe-F-wait-forked-busy-hang: SKIP (0.000s)[0m
13422 10:03:46.722105 <14>[ 31.350576] [IGT] kms_vblank: executing
13423 10:03:46.729343 IGT-Version: 1.2<14>[ 31.355790] [IGT] kms_vblank: exiting, ret=77
13424 10:03:46.732161 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13425 10:03:46.735288 Opened device: /dev/dri/card0
13426 10:03:46.742011 N<8>[ 31.366680] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-idle RESULT=skip>
13427 10:03:46.742694 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-idle RESULT=skip
13429 10:03:46.748971 o KMS driver or no outputs, pipes: 8, outputs: 0
13430 10:03:46.751679 [1mSubtest pipe-F-ts-continuation-idle: SKIP (0.000s)[0m
13431 10:03:46.765971 <14>[ 31.394208] [IGT] kms_vblank: executing
13432 10:03:46.772730 IGT-Version: 1.2<14>[ 31.399394] [IGT] kms_vblank: exiting, ret=77
13433 10:03:46.776174 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13434 10:03:46.779092 Opened device: /dev/dri/card0
13435 10:03:46.785841 N<8>[ 31.410517] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-idle-hang RESULT=skip>
13436 10:03:46.786637 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-idle-hang RESULT=skip
13438 10:03:46.792704 o KMS driver or no outputs, pipes: 8, outputs: 0
13439 10:03:46.796428 [1mSubtest pipe-F-ts-continuation-idle-hang: SKIP (0.000s)[0m
13440 10:03:46.809297 <14>[ 31.437329] [IGT] kms_vblank: executing
13441 10:03:46.815887 IGT-Version: 1.2<14>[ 31.442382] [IGT] kms_vblank: exiting, ret=77
13442 10:03:46.819127 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13443 10:03:46.822249 Opened device: /dev/dri/card0
13444 10:03:46.829087 N<8>[ 31.453404] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-dpms-rpm RESULT=skip>
13445 10:03:46.829777 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-dpms-rpm RESULT=skip
13447 10:03:46.835856 o KMS driver or no outputs, pipes: 8, outputs: 0
13448 10:03:46.838843 [1mSubtest pipe-F-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13449 10:03:46.851745 <14>[ 31.480351] [IGT] kms_vblank: executing
13450 10:03:46.858582 IGT-Version: 1.2<14>[ 31.485347] [IGT] kms_vblank: exiting, ret=77
13451 10:03:46.862256 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13452 10:03:46.865863 Opened device: /dev/dri/card0
13453 10:03:46.871843 N<8>[ 31.496432] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-dpms-suspend RESULT=skip>
13454 10:03:46.872515 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-dpms-suspend RESULT=skip
13456 10:03:46.878654 o KMS driver or no outputs, pipes: 8, outputs: 0
13457 10:03:46.885139 [1mSubtest pipe-F-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13458 10:03:46.896359 <14>[ 31.524852] [IGT] kms_vblank: executing
13459 10:03:46.902789 IGT-Version: 1.2<14>[ 31.530063] [IGT] kms_vblank: exiting, ret=77
13460 10:03:46.906911 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13461 10:03:46.910133 Opened device: /dev/dri/card0
13462 10:03:46.916429 N<8>[ 31.541141] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-suspend RESULT=skip>
13463 10:03:46.917145 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-suspend RESULT=skip
13465 10:03:46.923160 o KMS driver or no outputs, pipes: 8, outputs: 0
13466 10:03:46.926512 [1mSubtest pipe-F-ts-continuation-suspend: SKIP (0.000s)[0m
13467 10:03:46.940937 <14>[ 31.569225] [IGT] kms_vblank: executing
13468 10:03:46.947756 IGT-Version: 1.2<14>[ 31.574476] [IGT] kms_vblank: exiting, ret=77
13469 10:03:46.950731 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13470 10:03:46.954198 Opened device: /dev/dri/card0
13471 10:03:46.960593 N<8>[ 31.585882] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset RESULT=skip>
13472 10:03:46.961337 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset RESULT=skip
13474 10:03:46.967273 o KMS driver or no outputs, pipes: 8, outputs: 0
13475 10:03:46.970909 [1mSubtest pipe-F-ts-continuation-modeset: SKIP (0.000s)[0m
13476 10:03:46.984678 <14>[ 31.612811] [IGT] kms_vblank: executing
13477 10:03:46.991595 IGT-Version: 1.2<14>[ 31.617851] [IGT] kms_vblank: exiting, ret=77
13478 10:03:46.994188 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13479 10:03:46.997744 Opened device: /dev/dri/card0
13480 10:03:47.004583 N<8>[ 31.629123] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset-hang RESULT=skip>
13481 10:03:47.005270 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset-hang RESULT=skip
13483 10:03:47.011166 o KMS driver or no outputs, pipes: 8, outputs: 0
13484 10:03:47.017786 [1mSubtest pipe-F-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13485 10:03:47.027760 <14>[ 31.656276] [IGT] kms_vblank: executing
13486 10:03:47.034536 IGT-Version: 1.2<14>[ 31.661345] [IGT] kms_vblank: exiting, ret=77
13487 10:03:47.038037 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13488 10:03:47.041027 Opened device: /dev/dri/card0
13489 10:03:47.048001 N<8>[ 31.672376] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset-rpm RESULT=skip>
13490 10:03:47.048689 Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset-rpm RESULT=skip
13492 10:03:47.054179 o KMS driver or no outputs, pipes: 8, outputs: 0
13493 10:03:47.061320 [1mSubtest pipe-F-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13494 10:03:47.072488 <14>[ 31.700615] [IGT] kms_vblank: executing
13495 10:03:47.078995 IGT-Version: 1.2<14>[ 31.706120] [IGT] kms_vblank: exiting, ret=77
13496 10:03:47.082120 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13497 10:03:47.085398 Opened device: /dev/dri/card0
13498 10:03:47.092178 N<8>[ 31.717251] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-accuracy-idle RESULT=skip>
13499 10:03:47.092881 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-accuracy-idle RESULT=skip
13501 10:03:47.098171 o KMS driver or no outputs, pipes: 8, outputs: 0
13502 10:03:47.101274 [1mSubtest pipe-G-accuracy-idle: SKIP (0.000s)[0m
13503 10:03:47.116119 <14>[ 31.744554] [IGT] kms_vblank: executing
13504 10:03:47.123067 IGT-Version: 1.2<14>[ 31.749779] [IGT] kms_vblank: exiting, ret=77
13505 10:03:47.126158 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13506 10:03:47.129714 Opened device: /dev/dri/card0
13507 10:03:47.135836 N<8>[ 31.760923] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-idle RESULT=skip>
13508 10:03:47.136514 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-idle RESULT=skip
13510 10:03:47.139598 o KMS driver or no outputs, pipes: 8, outputs: 0
13511 10:03:47.145876 [1mSubtest pipe-G-query-idle: SKIP (0.000s)[0m
13512 10:03:47.158074 <14>[ 31.786318] [IGT] kms_vblank: executing
13513 10:03:47.164884 IGT-Version: 1.2<14>[ 31.791363] [IGT] kms_vblank: exiting, ret=77
13514 10:03:47.168291 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13515 10:03:47.170992 Opened device: /dev/dri/card0
13516 10:03:47.177555 N<8>[ 31.802479] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-idle-hang RESULT=skip>
13517 10:03:47.178399 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-idle-hang RESULT=skip
13519 10:03:47.180986 o KMS driver or no outputs, pipes: 8, outputs: 0
13520 10:03:47.188031 [1mSubtest pipe-G-query-idle-hang: SKIP (0.000s)[0m
13521 10:03:47.200570 <14>[ 31.829123] [IGT] kms_vblank: executing
13522 10:03:47.207303 IGT-Version: 1.2<14>[ 31.834272] [IGT] kms_vblank: exiting, ret=77
13523 10:03:47.210582 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13524 10:03:47.213777 Opened device: /dev/dri/card0
13525 10:03:47.220694 N<8>[ 31.845526] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked RESULT=skip>
13526 10:03:47.221428 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked RESULT=skip
13528 10:03:47.224007 o KMS driver or no outputs, pipes: 8, outputs: 0
13529 10:03:47.230797 [1mSubtest pipe-G-query-forked: SKIP (0.000s)[0m
13530 10:03:47.243662 <14>[ 31.872416] [IGT] kms_vblank: executing
13531 10:03:47.250357 IGT-Version: 1.2<14>[ 31.877632] [IGT] kms_vblank: exiting, ret=77
13532 10:03:47.253897 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13533 10:03:47.257252 Opened device: /dev/dri/card0
13534 10:03:47.263744 N<8>[ 31.888788] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-hang RESULT=skip>
13535 10:03:47.264421 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-hang RESULT=skip
13537 10:03:47.270730 o KMS driver or no outputs, pipes: 8, outputs: 0
13538 10:03:47.273764 [1mSubtest pipe-G-query-forked-hang: SKIP (0.000s)[0m
13539 10:03:47.287765 <14>[ 31.916165] [IGT] kms_vblank: executing
13540 10:03:47.294264 IGT-Version: 1.2<14>[ 31.921356] [IGT] kms_vblank: exiting, ret=77
13541 10:03:47.297826 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13542 10:03:47.300769 Opened device: /dev/dri/card0
13543 10:03:47.307659 N<8>[ 31.932837] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-busy RESULT=skip>
13544 10:03:47.308549 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-busy RESULT=skip
13546 10:03:47.311008 o KMS driver or no outputs, pipes: 8, outputs: 0
13547 10:03:47.317742 [1mSubtest pipe-G-query-busy: SKIP (0.000s)[0m
13548 10:03:47.329487 <14>[ 31.958237] [IGT] kms_vblank: executing
13549 10:03:47.337185 IGT-Version: 1.2<14>[ 31.963318] [IGT] kms_vblank: exiting, ret=77
13550 10:03:47.339487 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13551 10:03:47.343206 Opened device: /dev/dri/card0
13552 10:03:47.349864 N<8>[ 31.974302] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-busy-hang RESULT=skip>
13553 10:03:47.350596 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-busy-hang RESULT=skip
13555 10:03:47.352932 o KMS driver or no outputs, pipes: 8, outputs: 0
13556 10:03:47.359801 [1mSubtest pipe-G-query-busy-hang: SKIP (0.000s)[0m
13557 10:03:47.372340 <14>[ 32.000747] [IGT] kms_vblank: executing
13558 10:03:47.379116 IGT-Version: 1.2<14>[ 32.005767] [IGT] kms_vblank: exiting, ret=77
13559 10:03:47.383224 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13560 10:03:47.386310 Opened device: /dev/dri/card0
13561 10:03:47.392634 N<8>[ 32.016871] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-busy RESULT=skip>
13562 10:03:47.393359 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-busy RESULT=skip
13564 10:03:47.395607 o KMS driver or no outputs, pipes: 8, outputs: 0
13565 10:03:47.402425 [1mSubtest pipe-G-query-forked-busy: SKIP (0.000s)[0m
13566 10:03:47.414639 <14>[ 32.043333] [IGT] kms_vblank: executing
13567 10:03:47.421273 IGT-Version: 1.2<14>[ 32.048358] [IGT] kms_vblank: exiting, ret=77
13568 10:03:47.424849 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13569 10:03:47.428386 Opened device: /dev/dri/card0
13570 10:03:47.435147 N<8>[ 32.059701] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-busy-hang RESULT=skip>
13571 10:03:47.435863 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-busy-hang RESULT=skip
13573 10:03:47.441432 o KMS driver or no outputs, pipes: 8, outputs: 0
13574 10:03:47.445006 [1mSubtest pipe-G-query-forked-busy-hang: SKIP (0.000s)[0m
13575 10:03:47.458926 <14>[ 32.087445] [IGT] kms_vblank: executing
13576 10:03:47.466066 IGT-Version: 1.2<14>[ 32.092613] [IGT] kms_vblank: exiting, ret=77
13577 10:03:47.469485 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13578 10:03:47.472133 Opened device: /dev/dri/card0
13579 10:03:47.479524 N<8>[ 32.103795] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-idle RESULT=skip>
13580 10:03:47.480213 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-idle RESULT=skip
13582 10:03:47.482428 o KMS driver or no outputs, pipes: 8, outputs: 0
13583 10:03:47.488629 [1mSubtest pipe-G-wait-idle: SKIP (0.000s)[0m
13584 10:03:47.500654 <14>[ 32.129340] [IGT] kms_vblank: executing
13585 10:03:47.507714 IGT-Version: 1.2<14>[ 32.134370] [IGT] kms_vblank: exiting, ret=77
13586 10:03:47.511621 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13587 10:03:47.513987 Opened device: /dev/dri/card0
13588 10:03:47.520518 N<8>[ 32.145792] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-idle-hang RESULT=skip>
13589 10:03:47.521262 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-idle-hang RESULT=skip
13591 10:03:47.524367 o KMS driver or no outputs, pipes: 8, outputs: 0
13592 10:03:47.530545 [1mSubtest pipe-G-wait-idle-hang: SKIP (0.000s)[0m
13593 10:03:47.543221 <14>[ 32.171914] [IGT] kms_vblank: executing
13594 10:03:47.550244 IGT-Version: 1.2<14>[ 32.176908] [IGT] kms_vblank: exiting, ret=77
13595 10:03:47.553359 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13596 10:03:47.557064 Opened device: /dev/dri/card0
13597 10:03:47.563774 N<8>[ 32.188168] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked RESULT=skip>
13598 10:03:47.564505 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked RESULT=skip
13600 10:03:47.566734 o KMS driver or no outputs, pipes: 8, outputs: 0
13601 10:03:47.573290 [1mSubtest pipe-G-wait-forked: SKIP (0.000s)[0m
13602 10:03:47.585244 <14>[ 32.213968] [IGT] kms_vblank: executing
13603 10:03:47.591847 IGT-Version: 1.2<14>[ 32.218988] [IGT] kms_vblank: exiting, ret=77
13604 10:03:47.595437 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13605 10:03:47.598728 Opened device: /dev/dri/card0
13606 10:03:47.605541 N<8>[ 32.230084] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-hang RESULT=skip>
13607 10:03:47.605814 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-hang RESULT=skip
13609 10:03:47.608755 o KMS driver or no outputs, pipes: 8, outputs: 0
13610 10:03:47.614948 [1mSubtest pipe-G-wait-forked-hang: SKIP (0.000s)[0m
13611 10:03:47.628026 <14>[ 32.256580] [IGT] kms_vblank: executing
13612 10:03:47.634266 IGT-Version: 1.2<14>[ 32.261562] [IGT] kms_vblank: exiting, ret=77
13613 10:03:47.637544 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13614 10:03:47.641268 Opened device: /dev/dri/card0
13615 10:03:47.648296 N<8>[ 32.272973] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-busy RESULT=skip>
13616 10:03:47.648856 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-busy RESULT=skip
13618 10:03:47.651510 o KMS driver or no outputs, pipes: 8, outputs: 0
13619 10:03:47.657637 [1mSubtest pipe-G-wait-busy: SKIP (0.000s)[0m
13620 10:03:47.670062 <14>[ 32.298443] [IGT] kms_vblank: executing
13621 10:03:47.676134 IGT-Version: 1.2<14>[ 32.303570] [IGT] kms_vblank: exiting, ret=77
13622 10:03:47.680223 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13623 10:03:47.683719 Opened device: /dev/dri/card0
13624 10:03:47.690050 N<8>[ 32.314526] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-busy-hang RESULT=skip>
13625 10:03:47.690783 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-busy-hang RESULT=skip
13627 10:03:47.693365 o KMS driver or no outputs, pipes: 8, outputs: 0
13628 10:03:47.699953 [1mSubtest pipe-G-wait-busy-hang: SKIP (0.000s)[0m
13629 10:03:47.712535 <14>[ 32.340852] [IGT] kms_vblank: executing
13630 10:03:47.719218 IGT-Version: 1.2<14>[ 32.345843] [IGT] kms_vblank: exiting, ret=77
13631 10:03:47.722172 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13632 10:03:47.726030 Opened device: /dev/dri/card0
13633 10:03:47.732357 N<8>[ 32.356819] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-busy RESULT=skip>
13634 10:03:47.733221 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-busy RESULT=skip
13636 10:03:47.735509 o KMS driver or no outputs, pipes: 8, outputs: 0
13637 10:03:47.742537 [1mSubtest pipe-G-wait-forked-busy: SKIP (0.000s)[0m
13638 10:03:47.755115 <14>[ 32.383385] [IGT] kms_vblank: executing
13639 10:03:47.761644 IGT-Version: 1.2<14>[ 32.388385] [IGT] kms_vblank: exiting, ret=77
13640 10:03:47.765390 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13641 10:03:47.768351 Opened device: /dev/dri/card0
13642 10:03:47.775051 N<8>[ 32.399517] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-busy-hang RESULT=skip>
13643 10:03:47.775830 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-busy-hang RESULT=skip
13645 10:03:47.781691 o KMS driver or no outputs, pipes: 8, outputs: 0
13646 10:03:47.784956 [1mSubtest pipe-G-wait-forked-busy-hang: SKIP (0.000s)[0m
13647 10:03:47.797937 <14>[ 32.426217] [IGT] kms_vblank: executing
13648 10:03:47.804451 IGT-Version: 1.2<14>[ 32.431294] [IGT] kms_vblank: exiting, ret=77
13649 10:03:47.807187 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13650 10:03:47.810882 Opened device: /dev/dri/card0
13651 10:03:47.817751 N<8>[ 32.442259] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-idle RESULT=skip>
13652 10:03:47.818037 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-idle RESULT=skip
13654 10:03:47.823818 o KMS driver or no outputs, pipes: 8, outputs: 0
13655 10:03:47.827422 [1mSubtest pipe-G-ts-continuation-idle: SKIP (0.000s)[0m
13656 10:03:47.841398 <14>[ 32.469903] [IGT] kms_vblank: executing
13657 10:03:47.847848 IGT-Version: 1.2<14>[ 32.475118] [IGT] kms_vblank: exiting, ret=77
13658 10:03:47.851181 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13659 10:03:47.854541 Opened device: /dev/dri/card0
13660 10:03:47.861334 N<8>[ 32.486079] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-idle-hang RESULT=skip>
13661 10:03:47.861717 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-idle-hang RESULT=skip
13663 10:03:47.868198 o KMS driver or no outputs, pipes: 8, outputs: 0
13664 10:03:47.871119 [1mSubtest pipe-G-ts-continuation-idle-hang: SKIP (0.000s)[0m
13665 10:03:47.885343 <14>[ 32.513902] [IGT] kms_vblank: executing
13666 10:03:47.892104 IGT-Version: 1.2<14>[ 32.518962] [IGT] kms_vblank: exiting, ret=77
13667 10:03:47.895706 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13668 10:03:47.898481 Opened device: /dev/dri/card0
13669 10:03:47.905359 N<8>[ 32.530194] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-dpms-rpm RESULT=skip>
13670 10:03:47.906056 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-dpms-rpm RESULT=skip
13672 10:03:47.911644 o KMS driver or no outputs, pipes: 8, outputs: 0
13673 10:03:47.914845 [1mSubtest pipe-G-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13674 10:03:47.928225 <14>[ 32.557073] [IGT] kms_vblank: executing
13675 10:03:47.935173 IGT-Version: 1.2<14>[ 32.562101] [IGT] kms_vblank: exiting, ret=77
13676 10:03:47.938292 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13677 10:03:47.941709 Opened device: /dev/dri/card0
13678 10:03:47.948096 N<8>[ 32.573178] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-dpms-suspend RESULT=skip>
13679 10:03:47.948418 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-dpms-suspend RESULT=skip
13681 10:03:47.954956 o KMS driver or no outputs, pipes: 8, outputs: 0
13682 10:03:47.961331 [1mSubtest pipe-G-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13683 10:03:47.971704 <14>[ 32.600587] [IGT] kms_vblank: executing
13684 10:03:47.978592 IGT-Version: 1.2<14>[ 32.605582] [IGT] kms_vblank: exiting, ret=77
13685 10:03:47.981638 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13686 10:03:47.985721 Opened device: /dev/dri/card0
13687 10:03:47.991846 N<8>[ 32.616682] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-suspend RESULT=skip>
13688 10:03:47.992131 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-suspend RESULT=skip
13690 10:03:47.998359 o KMS driver or no outputs, pipes: 8, outputs: 0
13691 10:03:48.001993 [1mSubtest pipe-G-ts-continuation-suspend: SKIP (0.000s)[0m
13692 10:03:48.014763 <14>[ 32.643653] [IGT] kms_vblank: executing
13693 10:03:48.021924 IGT-Version: 1.2<14>[ 32.648646] [IGT] kms_vblank: exiting, ret=77
13694 10:03:48.025173 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13695 10:03:48.028084 Opened device: /dev/dri/card0
13696 10:03:48.035002 N<8>[ 32.659908] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset RESULT=skip>
13697 10:03:48.035344 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset RESULT=skip
13699 10:03:48.041586 o KMS driver or no outputs, pipes: 8, outputs: 0
13700 10:03:48.044417 [1mSubtest pipe-G-ts-continuation-modeset: SKIP (0.000s)[0m
13701 10:03:48.057644 <14>[ 32.686623] [IGT] kms_vblank: executing
13702 10:03:48.064941 IGT-Version: 1.2<14>[ 32.691836] [IGT] kms_vblank: exiting, ret=77
13703 10:03:48.068410 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13704 10:03:48.071493 Opened device: /dev/dri/card0
13705 10:03:48.077683 N<8>[ 32.702637] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset-hang RESULT=skip>
13706 10:03:48.078438 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset-hang RESULT=skip
13708 10:03:48.084362 o KMS driver or no outputs, pipes: 8, outputs: 0
13709 10:03:48.090954 [1mSubtest pipe-G-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13710 10:03:48.101671 <14>[ 32.730015] [IGT] kms_vblank: executing
13711 10:03:48.107986 IGT-Version: 1.2<14>[ 32.735037] [IGT] kms_vblank: exiting, ret=77
13712 10:03:48.111248 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13713 10:03:48.114761 Opened device: /dev/dri/card0
13714 10:03:48.121255 N<8>[ 32.746199] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset-rpm RESULT=skip>
13715 10:03:48.121949 Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset-rpm RESULT=skip
13717 10:03:48.128217 o KMS driver or no outputs, pipes: 8, outputs: 0
13718 10:03:48.134456 [1mSubtest pipe-G-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13719 10:03:48.145952 <14>[ 32.774491] [IGT] kms_vblank: executing
13720 10:03:48.152625 IGT-Version: 1.2<14>[ 32.779840] [IGT] kms_vblank: exiting, ret=77
13721 10:03:48.156259 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13722 10:03:48.159540 Opened device: /dev/dri/card0
13723 10:03:48.166187 N<8>[ 32.790599] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-accuracy-idle RESULT=skip>
13724 10:03:48.166896 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-accuracy-idle RESULT=skip
13726 10:03:48.169615 o KMS driver or no outputs, pipes: 8, outputs: 0
13727 10:03:48.176173 [1mSubtest pipe-H-accuracy-idle: SKIP (0.000s)[0m
13728 10:03:48.188967 <14>[ 32.817669] [IGT] kms_vblank: executing
13729 10:03:48.195620 IGT-Version: 1.2<14>[ 32.822896] [IGT] kms_vblank: exiting, ret=77
13730 10:03:48.199164 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13731 10:03:48.202703 Opened device: /dev/dri/card0
13732 10:03:48.208732 N<8>[ 32.834120] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-idle RESULT=skip>
13733 10:03:48.209006 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-idle RESULT=skip
13735 10:03:48.211922 o KMS driver or no outputs, pipes: 8, outputs: 0
13736 10:03:48.218920 [1mSubtest pipe-H-query-idle: SKIP (0.000s)[0m
13737 10:03:48.232294 <14>[ 32.861059] [IGT] kms_vblank: executing
13738 10:03:48.239023 IGT-Version: 1.2<14>[ 32.866316] [IGT] kms_vblank: exiting, ret=77
13739 10:03:48.241906 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13740 10:03:48.245714 Opened device: /dev/dri/card0
13741 10:03:48.252429 N<8>[ 32.877715] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-idle-hang RESULT=skip>
13742 10:03:48.252738 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-idle-hang RESULT=skip
13744 10:03:48.258935 o KMS driver or no outputs, pipes: 8, outputs: 0
13745 10:03:48.262242 [1mSubtest pipe-H-query-idle-hang: SKIP (0.000s)[0m
13746 10:03:48.274996 <14>[ 32.903611] [IGT] kms_vblank: executing
13747 10:03:48.281659 IGT-Version: 1.2<14>[ 32.908724] [IGT] kms_vblank: exiting, ret=77
13748 10:03:48.285378 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13749 10:03:48.288671 Opened device: /dev/dri/card0
13750 10:03:48.295089 N<8>[ 32.919978] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked RESULT=skip>
13751 10:03:48.295829 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked RESULT=skip
13753 10:03:48.298648 o KMS driver or no outputs, pipes: 8, outputs: 0
13754 10:03:48.304645 [1mSubtest pipe-H-query-forked: SKIP (0.000s)[0m
13755 10:03:48.318407 <14>[ 32.946704] [IGT] kms_vblank: executing
13756 10:03:48.324760 IGT-Version: 1.2<14>[ 32.952056] [IGT] kms_vblank: exiting, ret=77
13757 10:03:48.327980 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13758 10:03:48.331509 Opened device: /dev/dri/card0
13759 10:03:48.338297 N<8>[ 32.963042] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-hang RESULT=skip>
13760 10:03:48.338987 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-hang RESULT=skip
13762 10:03:48.345295 o KMS driver or no outputs, pipes: 8, outputs: 0
13763 10:03:48.348181 [1mSubtest pipe-H-query-forked-hang: SKIP (0.000s)[0m
13764 10:03:48.362306 <14>[ 32.990640] [IGT] kms_vblank: executing
13765 10:03:48.369144 IGT-Version: 1.2<14>[ 32.995976] [IGT] kms_vblank: exiting, ret=77
13766 10:03:48.371963 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13767 10:03:48.375248 Opened device: /dev/dri/card0
13768 10:03:48.382290 N<8>[ 33.007336] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-busy RESULT=skip>
13769 10:03:48.382981 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-busy RESULT=skip
13771 10:03:48.385483 o KMS driver or no outputs, pipes: 8, outputs: 0
13772 10:03:48.391726 [1mSubtest pipe-H-query-busy: SKIP (0.000s)[0m
13773 10:03:48.405632 <14>[ 33.033987] [IGT] kms_vblank: executing
13774 10:03:48.412434 IGT-Version: 1.2<14>[ 33.039265] [IGT] kms_vblank: exiting, ret=77
13775 10:03:48.415750 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13776 10:03:48.418656 Opened device: /dev/dri/card0
13777 10:03:48.426019 N<8>[ 33.050385] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-busy-hang RESULT=skip>
13778 10:03:48.426708 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-busy-hang RESULT=skip
13780 10:03:48.428513 o KMS driver or no outputs, pipes: 8, outputs: 0
13781 10:03:48.435158 [1mSubtest pipe-H-query-busy-hang: SKIP (0.000s)[0m
13782 10:03:48.448241 <14>[ 33.076553] [IGT] kms_vblank: executing
13783 10:03:48.454546 IGT-Version: 1.2<14>[ 33.081540] [IGT] kms_vblank: exiting, ret=77
13784 10:03:48.458301 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13785 10:03:48.461206 Opened device: /dev/dri/card0
13786 10:03:48.467695 N<8>[ 33.092750] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-busy RESULT=skip>
13787 10:03:48.468387 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-busy RESULT=skip
13789 10:03:48.471347 o KMS driver or no outputs, pipes: 8, outputs: 0
13790 10:03:48.478065 [1mSubtest pipe-H-query-forked-busy: SKIP (0.000s)[0m
13791 10:03:48.490285 <14>[ 33.119125] [IGT] kms_vblank: executing
13792 10:03:48.496901 IGT-Version: 1.2<14>[ 33.124178] [IGT] kms_vblank: exiting, ret=77
13793 10:03:48.500628 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13794 10:03:48.503577 Opened device: /dev/dri/card0
13795 10:03:48.510225 N<8>[ 33.135397] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-busy-hang RESULT=skip>
13796 10:03:48.510967 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-busy-hang RESULT=skip
13798 10:03:48.516685 o KMS driver or no outputs, pipes: 8, outputs: 0
13799 10:03:48.519989 [1mSubtest pipe-H-query-forked-busy-hang: SKIP (0.000s)[0m
13800 10:03:48.534892 <14>[ 33.162997] [IGT] kms_vblank: executing
13801 10:03:48.540944 IGT-Version: 1.2<14>[ 33.168242] [IGT] kms_vblank: exiting, ret=77
13802 10:03:48.544351 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13803 10:03:48.547810 Opened device: /dev/dri/card0
13804 10:03:48.554690 N<8>[ 33.179581] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-idle RESULT=skip>
13805 10:03:48.555544 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-idle RESULT=skip
13807 10:03:48.557560 o KMS driver or no outputs, pipes: 8, outputs: 0
13808 10:03:48.564465 [1mSubtest pipe-H-wait-idle: SKIP (0.000s)[0m
13809 10:03:48.576357 <14>[ 33.204987] [IGT] kms_vblank: executing
13810 10:03:48.583427 IGT-Version: 1.2<14>[ 33.210073] [IGT] kms_vblank: exiting, ret=77
13811 10:03:48.586084 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13812 10:03:48.589924 Opened device: /dev/dri/card0
13813 10:03:48.595932 N<8>[ 33.221251] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-idle-hang RESULT=skip>
13814 10:03:48.596648 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-idle-hang RESULT=skip
13816 10:03:48.599785 o KMS driver or no outputs, pipes: 8, outputs: 0
13817 10:03:48.606595 [1mSubtest pipe-H-wait-idle-hang: SKIP (0.000s)[0m
13818 10:03:48.618269 <14>[ 33.247188] [IGT] kms_vblank: executing
13819 10:03:48.625036 IGT-Version: 1.2<14>[ 33.252151] [IGT] kms_vblank: exiting, ret=77
13820 10:03:48.628555 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13821 10:03:48.631831 Opened device: /dev/dri/card0
13822 10:03:48.638925 N<8>[ 33.263289] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked RESULT=skip>
13823 10:03:48.639768 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked RESULT=skip
13825 10:03:48.641902 o KMS driver or no outputs, pipes: 8, outputs: 0
13826 10:03:48.648749 [1mSubtest pipe-H-wait-forked: SKIP (0.000s)[0m
13827 10:03:48.660214 <14>[ 33.289100] [IGT] kms_vblank: executing
13828 10:03:48.667356 IGT-Version: 1.2<14>[ 33.294217] [IGT] kms_vblank: exiting, ret=77
13829 10:03:48.670766 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13830 10:03:48.673736 Opened device: /dev/dri/card0
13831 10:03:48.680263 N<8>[ 33.305334] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-hang RESULT=skip>
13832 10:03:48.681171 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-hang RESULT=skip
13834 10:03:48.684189 o KMS driver or no outputs, pipes: 8, outputs: 0
13835 10:03:48.690559 [1mSubtest pipe-H-wait-forked-hang: SKIP (0.000s)[0m
13836 10:03:48.704054 <14>[ 33.332391] [IGT] kms_vblank: executing
13837 10:03:48.710611 IGT-Version: 1.2<14>[ 33.337458] [IGT] kms_vblank: exiting, ret=77
13838 10:03:48.713820 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13839 10:03:48.717448 Opened device: /dev/dri/card0
13840 10:03:48.723970 N<8>[ 33.349135] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-busy RESULT=skip>
13841 10:03:48.724655 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-busy RESULT=skip
13843 10:03:48.727188 o KMS driver or no outputs, pipes: 8, outputs: 0
13844 10:03:48.733455 [1mSubtest pipe-H-wait-busy: SKIP (0.000s)[0m
13845 10:03:48.746931 <14>[ 33.375710] [IGT] kms_vblank: executing
13846 10:03:48.753688 IGT-Version: 1.2<14>[ 33.380941] [IGT] kms_vblank: exiting, ret=77
13847 10:03:48.757166 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13848 10:03:48.760583 Opened device: /dev/dri/card0
13849 10:03:48.766932 N<8>[ 33.392353] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-busy-hang RESULT=skip>
13850 10:03:48.767634 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-busy-hang RESULT=skip
13852 10:03:48.770237 o KMS driver or no outputs, pipes: 8, outputs: 0
13853 10:03:48.776789 [1mSubtest pipe-H-wait-busy-hang: SKIP (0.000s)[0m
13854 10:03:48.789471 <14>[ 33.418201] [IGT] kms_vblank: executing
13855 10:03:48.796268 IGT-Version: 1.2<14>[ 33.423323] [IGT] kms_vblank: exiting, ret=77
13856 10:03:48.799367 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13857 10:03:48.802957 Opened device: /dev/dri/card0
13858 10:03:48.809863 N<8>[ 33.434491] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-busy RESULT=skip>
13859 10:03:48.810564 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-busy RESULT=skip
13861 10:03:48.812899 o KMS driver or no outputs, pipes: 8, outputs: 0
13862 10:03:48.819290 [1mSubtest pipe-H-wait-forked-busy: SKIP (0.000s)[0m
13863 10:03:48.833568 <14>[ 33.461826] [IGT] kms_vblank: executing
13864 10:03:48.840044 IGT-Version: 1.2<14>[ 33.467126] [IGT] kms_vblank: exiting, ret=77
13865 10:03:48.843345 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13866 10:03:48.846754 Opened device: /dev/dri/card0
13867 10:03:48.853042 N<8>[ 33.478130] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-busy-hang RESULT=skip>
13868 10:03:48.853814 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-busy-hang RESULT=skip
13870 10:03:48.860003 o KMS driver or no outputs, pipes: 8, outputs: 0
13871 10:03:48.863891 [1mSubtest pipe-H-wait-forked-busy-hang: SKIP (0.000s)[0m
13872 10:03:48.877311 <14>[ 33.506057] [IGT] kms_vblank: executing
13873 10:03:48.884284 IGT-Version: 1.2<14>[ 33.511286] [IGT] kms_vblank: exiting, ret=77
13874 10:03:48.887497 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13875 10:03:48.890670 Opened device: /dev/dri/card0
13876 10:03:48.897295 N<8>[ 33.522481] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-idle RESULT=skip>
13877 10:03:48.897988 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-idle RESULT=skip
13879 10:03:48.903890 o KMS driver or no outputs, pipes: 8, outputs: 0
13880 10:03:48.907345 [1mSubtest pipe-H-ts-continuation-idle: SKIP (0.000s)[0m
13881 10:03:48.920398 <14>[ 33.548988] [IGT] kms_vblank: executing
13882 10:03:48.927079 IGT-Version: 1.2<14>[ 33.554004] [IGT] kms_vblank: exiting, ret=77
13883 10:03:48.930661 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13884 10:03:48.933560 Opened device: /dev/dri/card0
13885 10:03:48.940674 N<8>[ 33.565184] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-idle-hang RESULT=skip>
13886 10:03:48.941467 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-idle-hang RESULT=skip
13888 10:03:48.946644 o KMS driver or no outputs, pipes: 8, outputs: 0
13889 10:03:48.950026 [1mSubtest pipe-H-ts-continuation-idle-hang: SKIP (0.000s)[0m
13890 10:03:48.964878 <14>[ 33.593112] [IGT] kms_vblank: executing
13891 10:03:48.971146 IGT-Version: 1.2<14>[ 33.598436] [IGT] kms_vblank: exiting, ret=77
13892 10:03:48.974325 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13893 10:03:48.977997 Opened device: /dev/dri/card0
13894 10:03:48.984441 N<8>[ 33.609748] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-dpms-rpm RESULT=skip>
13895 10:03:48.985370 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-dpms-rpm RESULT=skip
13897 10:03:48.990977 o KMS driver or no outputs, pipes: 8, outputs: 0
13898 10:03:48.994394 [1mSubtest pipe-H-ts-continuation-dpms-rpm: SKIP (0.000s)[0m
13899 10:03:49.009087 <14>[ 33.637619] [IGT] kms_vblank: executing
13900 10:03:49.015953 IGT-Version: 1.2<14>[ 33.642862] [IGT] kms_vblank: exiting, ret=77
13901 10:03:49.018716 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13902 10:03:49.022414 Opened device: /dev/dri/card0
13903 10:03:49.029574 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-dpms-suspend RESULT=skip
13905 10:03:49.032099 N<8>[ 33.654110] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-dpms-suspend RESULT=skip>
13906 10:03:49.035828 o KMS driver or no outputs, pipes: 8, outputs: 0
13907 10:03:49.041579 [1mSubtest pipe-H-ts-continuation-dpms-suspend: SKIP (0.000s)[0m
13908 10:03:49.053525 <14>[ 33.682412] [IGT] kms_vblank: executing
13909 10:03:49.060096 IGT-Version: 1.2<14>[ 33.687727] [IGT] kms_vblank: exiting, ret=77
13910 10:03:49.063219 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13911 10:03:49.066536 Opened device: /dev/dri/card0
13912 10:03:49.073706 N<8>[ 33.698899] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-suspend RESULT=skip>
13913 10:03:49.073963 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-suspend RESULT=skip
13915 10:03:49.080306 o KMS driver or no outputs, pipes: 8, outputs: 0
13916 10:03:49.083597 [1mSubtest pipe-H-ts-continuation-suspend: SKIP (0.000s)[0m
13917 10:03:49.096620 <14>[ 33.725736] [IGT] kms_vblank: executing
13918 10:03:49.103489 IGT-Version: 1.2<14>[ 33.730780] [IGT] kms_vblank: exiting, ret=77
13919 10:03:49.106866 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13920 10:03:49.110443 Opened device: /dev/dri/card0
13921 10:03:49.116622 N<8>[ 33.742004] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset RESULT=skip>
13922 10:03:49.116902 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset RESULT=skip
13924 10:03:49.123410 o KMS driver or no outputs, pipes: 8, outputs: 0
13925 10:03:49.126863 [1mSubtest pipe-H-ts-continuation-modeset: SKIP (0.000s)[0m
13926 10:03:49.140259 <14>[ 33.768878] [IGT] kms_vblank: executing
13927 10:03:49.146724 IGT-Version: 1.2<14>[ 33.773867] [IGT] kms_vblank: exiting, ret=77
13928 10:03:49.149774 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13929 10:03:49.153206 Opened device: /dev/dri/card0
13930 10:03:49.159772 N<8>[ 33.784966] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset-hang RESULT=skip>
13931 10:03:49.160031 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset-hang RESULT=skip
13933 10:03:49.166566 o KMS driver or no outputs, pipes: 8, outputs: 0
13934 10:03:49.172940 [1mSubtest pipe-H-ts-continuation-modeset-hang: SKIP (0.000s)[0m
13935 10:03:49.184177 <14>[ 33.813379] [IGT] kms_vblank: executing
13936 10:03:49.190705 IGT-Version: 1.2<14>[ 33.818562] [IGT] kms_vblank: exiting, ret=77
13937 10:03:49.194386 7.1-g766edf9 (aarch64) (Linux: 6.1.31 aarch64)
13938 10:03:49.197630 Opened device: /dev/dri/card0
13939 10:03:49.204131 N<8>[ 33.829643] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset-rpm RESULT=skip>
13940 10:03:49.204387 Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset-rpm RESULT=skip
13942 10:03:49.210823 Received signal: <TESTSET> STOP
13943 10:03:49.210906 Closing test_set kms_vblank
13944 10:03:49.214041 o KMS driver or no outputs, pipe<8>[ 33.841216] <LAVA_SIGNAL_TESTSET STOP>
13945 10:03:49.221551 s: 8, outputs: 0<8>[ 33.847185] <LAVA_SIGNAL_ENDRUN 0_igt-kms-mediatek 10670673_1.5.2.3.1>
13946 10:03:49.221636
13947 10:03:49.221872 Received signal: <ENDRUN> 0_igt-kms-mediatek 10670673_1.5.2.3.1
13948 10:03:49.221956 Ending use of test pattern.
13949 10:03:49.222034 Ending test lava.0_igt-kms-mediatek (10670673_1.5.2.3.1), duration 13.63
13951 10:03:49.227310 [1mSubtest pipe-H-ts-continuation-modeset-rpm: SKIP (0.000s)[0m
13952 10:03:49.227392 + set +x
13953 10:03:49.231055 <LAVA_TEST_RUNNER EXIT>
13954 10:03:49.231316 ok: lava_test_shell seems to have completed
13955 10:03:49.235629 addfb25-4-tiled:
result: skip
set: kms_addfb_basic
addfb25-bad-modifier:
result: fail
set: kms_addfb_basic
addfb25-framebuffer-vs-set-tiling:
result: skip
set: kms_addfb_basic
addfb25-modifier-no-flag:
result: pass
set: kms_addfb_basic
addfb25-x-tiled-legacy:
result: skip
set: kms_addfb_basic
addfb25-x-tiled-mismatch-legacy:
result: skip
set: kms_addfb_basic
addfb25-y-tiled-legacy:
result: skip
set: kms_addfb_basic
addfb25-y-tiled-small-legacy:
result: skip
set: kms_addfb_basic
addfb25-yf-tiled-legacy:
result: skip
set: kms_addfb_basic
atomic-invalid-params:
result: skip
set: kms_atomic
atomic_plane_damage:
result: skip
set: kms_atomic
bad-pitch-0:
result: pass
set: kms_addfb_basic
bad-pitch-1024:
result: pass
set: kms_addfb_basic
bad-pitch-128:
result: pass
set: kms_addfb_basic
bad-pitch-256:
result: pass
set: kms_addfb_basic
bad-pitch-32:
result: pass
set: kms_addfb_basic
bad-pitch-63:
result: pass
set: kms_addfb_basic
bad-pitch-65536:
result: pass
set: kms_addfb_basic
bad-pitch-999:
result: pass
set: kms_addfb_basic
basic:
result: skip
set: kms_setmode
basic-auth:
result: pass
set: core_auth
basic-clone-single-crtc:
result: skip
set: kms_setmode
basic-x-tiled-legacy:
result: skip
set: kms_addfb_basic
basic-y-tiled-legacy:
result: skip
set: kms_addfb_basic
blob-multiple:
result: pass
set: kms_prop_blob
blob-prop-core:
result: pass
set: kms_prop_blob
blob-prop-lifetime:
result: pass
set: kms_prop_blob
blob-prop-validate:
result: pass
set: kms_prop_blob
bo-too-small:
result: skip
set: kms_addfb_basic
bo-too-small-due-to-tiling:
result: skip
set: kms_addfb_basic
clobberred-modifier:
result: skip
set: kms_addfb_basic
clone-exclusive-crtc:
result: skip
set: kms_setmode
core_getclient: pass
core_getstats: pass
core_getversion: pass
core_setmaster_vs_auth: pass
crtc-id:
result: skip
set: kms_vblank
crtc-invalid-params:
result: skip
set: kms_atomic
crtc-invalid-params-fence:
result: skip
set: kms_atomic
empty-block:
result: skip
set: drm_read
empty-nonblock:
result: skip
set: drm_read
fault-buffer:
result: skip
set: drm_read
framebuffer-vs-set-tiling:
result: skip
set: kms_addfb_basic
getclient-master-drop:
result: pass
set: core_auth
getclient-simple:
result: pass
set: core_auth
invalid:
result: skip
set: kms_vblank
invalid-buffer:
result: skip
set: drm_read
invalid-clone-exclusive-crtc:
result: skip
set: kms_setmode
invalid-clone-single-crtc:
result: skip
set: kms_setmode
invalid-clone-single-crtc-stealing:
result: skip
set: kms_setmode
invalid-get-prop:
result: pass
set: kms_prop_blob
invalid-get-prop-any:
result: pass
set: kms_prop_blob
invalid-set-prop:
result: pass
set: kms_prop_blob
invalid-set-prop-any:
result: pass
set: kms_prop_blob
invalid-smem-bo-on-discrete:
result: skip
set: kms_addfb_basic
legacy-format:
result: pass
set: kms_addfb_basic
many-magics:
result: pass
set: core_auth
master-rmfb:
result: pass
set: kms_addfb_basic
no-handle:
result: pass
set: kms_addfb_basic
pipe-A-accuracy-idle:
result: skip
set: kms_vblank
pipe-A-query-busy:
result: skip
set: kms_vblank
pipe-A-query-busy-hang:
result: skip
set: kms_vblank
pipe-A-query-forked:
result: skip
set: kms_vblank
pipe-A-query-forked-busy:
result: skip
set: kms_vblank
pipe-A-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-A-query-forked-hang:
result: skip
set: kms_vblank
pipe-A-query-idle:
result: skip
set: kms_vblank
pipe-A-query-idle-hang:
result: skip
set: kms_vblank
pipe-A-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-A-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-A-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-A-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-A-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-A-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-A-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-A-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-A-wait-busy:
result: skip
set: kms_vblank
pipe-A-wait-busy-hang:
result: skip
set: kms_vblank
pipe-A-wait-forked:
result: skip
set: kms_vblank
pipe-A-wait-forked-busy:
result: skip
set: kms_vblank
pipe-A-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-A-wait-forked-hang:
result: skip
set: kms_vblank
pipe-A-wait-idle:
result: skip
set: kms_vblank
pipe-A-wait-idle-hang:
result: skip
set: kms_vblank
pipe-B-accuracy-idle:
result: skip
set: kms_vblank
pipe-B-query-busy:
result: skip
set: kms_vblank
pipe-B-query-busy-hang:
result: skip
set: kms_vblank
pipe-B-query-forked:
result: skip
set: kms_vblank
pipe-B-query-forked-busy:
result: skip
set: kms_vblank
pipe-B-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-B-query-forked-hang:
result: skip
set: kms_vblank
pipe-B-query-idle:
result: skip
set: kms_vblank
pipe-B-query-idle-hang:
result: skip
set: kms_vblank
pipe-B-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-B-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-B-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-B-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-B-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-B-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-B-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-B-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-B-wait-busy:
result: skip
set: kms_vblank
pipe-B-wait-busy-hang:
result: skip
set: kms_vblank
pipe-B-wait-forked:
result: skip
set: kms_vblank
pipe-B-wait-forked-busy:
result: skip
set: kms_vblank
pipe-B-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-B-wait-forked-hang:
result: skip
set: kms_vblank
pipe-B-wait-idle:
result: skip
set: kms_vblank
pipe-B-wait-idle-hang:
result: skip
set: kms_vblank
pipe-C-accuracy-idle:
result: skip
set: kms_vblank
pipe-C-query-busy:
result: skip
set: kms_vblank
pipe-C-query-busy-hang:
result: skip
set: kms_vblank
pipe-C-query-forked:
result: skip
set: kms_vblank
pipe-C-query-forked-busy:
result: skip
set: kms_vblank
pipe-C-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-C-query-forked-hang:
result: skip
set: kms_vblank
pipe-C-query-idle:
result: skip
set: kms_vblank
pipe-C-query-idle-hang:
result: skip
set: kms_vblank
pipe-C-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-C-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-C-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-C-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-C-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-C-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-C-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-C-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-C-wait-busy:
result: skip
set: kms_vblank
pipe-C-wait-busy-hang:
result: skip
set: kms_vblank
pipe-C-wait-forked:
result: skip
set: kms_vblank
pipe-C-wait-forked-busy:
result: skip
set: kms_vblank
pipe-C-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-C-wait-forked-hang:
result: skip
set: kms_vblank
pipe-C-wait-idle:
result: skip
set: kms_vblank
pipe-C-wait-idle-hang:
result: skip
set: kms_vblank
pipe-D-accuracy-idle:
result: skip
set: kms_vblank
pipe-D-query-busy:
result: skip
set: kms_vblank
pipe-D-query-busy-hang:
result: skip
set: kms_vblank
pipe-D-query-forked:
result: skip
set: kms_vblank
pipe-D-query-forked-busy:
result: skip
set: kms_vblank
pipe-D-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-D-query-forked-hang:
result: skip
set: kms_vblank
pipe-D-query-idle:
result: skip
set: kms_vblank
pipe-D-query-idle-hang:
result: skip
set: kms_vblank
pipe-D-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-D-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-D-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-D-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-D-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-D-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-D-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-D-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-D-wait-busy:
result: skip
set: kms_vblank
pipe-D-wait-busy-hang:
result: skip
set: kms_vblank
pipe-D-wait-forked:
result: skip
set: kms_vblank
pipe-D-wait-forked-busy:
result: skip
set: kms_vblank
pipe-D-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-D-wait-forked-hang:
result: skip
set: kms_vblank
pipe-D-wait-idle:
result: skip
set: kms_vblank
pipe-D-wait-idle-hang:
result: skip
set: kms_vblank
pipe-E-accuracy-idle:
result: skip
set: kms_vblank
pipe-E-query-busy:
result: skip
set: kms_vblank
pipe-E-query-busy-hang:
result: skip
set: kms_vblank
pipe-E-query-forked:
result: skip
set: kms_vblank
pipe-E-query-forked-busy:
result: skip
set: kms_vblank
pipe-E-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-E-query-forked-hang:
result: skip
set: kms_vblank
pipe-E-query-idle:
result: skip
set: kms_vblank
pipe-E-query-idle-hang:
result: skip
set: kms_vblank
pipe-E-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-E-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-E-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-E-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-E-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-E-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-E-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-E-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-E-wait-busy:
result: skip
set: kms_vblank
pipe-E-wait-busy-hang:
result: skip
set: kms_vblank
pipe-E-wait-forked:
result: skip
set: kms_vblank
pipe-E-wait-forked-busy:
result: skip
set: kms_vblank
pipe-E-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-E-wait-forked-hang:
result: skip
set: kms_vblank
pipe-E-wait-idle:
result: skip
set: kms_vblank
pipe-E-wait-idle-hang:
result: skip
set: kms_vblank
pipe-F-accuracy-idle:
result: skip
set: kms_vblank
pipe-F-query-busy:
result: skip
set: kms_vblank
pipe-F-query-busy-hang:
result: skip
set: kms_vblank
pipe-F-query-forked:
result: skip
set: kms_vblank
pipe-F-query-forked-busy:
result: skip
set: kms_vblank
pipe-F-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-F-query-forked-hang:
result: skip
set: kms_vblank
pipe-F-query-idle:
result: skip
set: kms_vblank
pipe-F-query-idle-hang:
result: skip
set: kms_vblank
pipe-F-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-F-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-F-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-F-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-F-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-F-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-F-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-F-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-F-wait-busy:
result: skip
set: kms_vblank
pipe-F-wait-busy-hang:
result: skip
set: kms_vblank
pipe-F-wait-forked:
result: skip
set: kms_vblank
pipe-F-wait-forked-busy:
result: skip
set: kms_vblank
pipe-F-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-F-wait-forked-hang:
result: skip
set: kms_vblank
pipe-F-wait-idle:
result: skip
set: kms_vblank
pipe-F-wait-idle-hang:
result: skip
set: kms_vblank
pipe-G-accuracy-idle:
result: skip
set: kms_vblank
pipe-G-query-busy:
result: skip
set: kms_vblank
pipe-G-query-busy-hang:
result: skip
set: kms_vblank
pipe-G-query-forked:
result: skip
set: kms_vblank
pipe-G-query-forked-busy:
result: skip
set: kms_vblank
pipe-G-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-G-query-forked-hang:
result: skip
set: kms_vblank
pipe-G-query-idle:
result: skip
set: kms_vblank
pipe-G-query-idle-hang:
result: skip
set: kms_vblank
pipe-G-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-G-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-G-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-G-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-G-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-G-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-G-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-G-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-G-wait-busy:
result: skip
set: kms_vblank
pipe-G-wait-busy-hang:
result: skip
set: kms_vblank
pipe-G-wait-forked:
result: skip
set: kms_vblank
pipe-G-wait-forked-busy:
result: skip
set: kms_vblank
pipe-G-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-G-wait-forked-hang:
result: skip
set: kms_vblank
pipe-G-wait-idle:
result: skip
set: kms_vblank
pipe-G-wait-idle-hang:
result: skip
set: kms_vblank
pipe-H-accuracy-idle:
result: skip
set: kms_vblank
pipe-H-query-busy:
result: skip
set: kms_vblank
pipe-H-query-busy-hang:
result: skip
set: kms_vblank
pipe-H-query-forked:
result: skip
set: kms_vblank
pipe-H-query-forked-busy:
result: skip
set: kms_vblank
pipe-H-query-forked-busy-hang:
result: skip
set: kms_vblank
pipe-H-query-forked-hang:
result: skip
set: kms_vblank
pipe-H-query-idle:
result: skip
set: kms_vblank
pipe-H-query-idle-hang:
result: skip
set: kms_vblank
pipe-H-ts-continuation-dpms-rpm:
result: skip
set: kms_vblank
pipe-H-ts-continuation-dpms-suspend:
result: skip
set: kms_vblank
pipe-H-ts-continuation-idle:
result: skip
set: kms_vblank
pipe-H-ts-continuation-idle-hang:
result: skip
set: kms_vblank
pipe-H-ts-continuation-modeset:
result: skip
set: kms_vblank
pipe-H-ts-continuation-modeset-hang:
result: skip
set: kms_vblank
pipe-H-ts-continuation-modeset-rpm:
result: skip
set: kms_vblank
pipe-H-ts-continuation-suspend:
result: skip
set: kms_vblank
pipe-H-wait-busy:
result: skip
set: kms_vblank
pipe-H-wait-busy-hang:
result: skip
set: kms_vblank
pipe-H-wait-forked:
result: skip
set: kms_vblank
pipe-H-wait-forked-busy:
result: skip
set: kms_vblank
pipe-H-wait-forked-busy-hang:
result: skip
set: kms_vblank
pipe-H-wait-forked-hang:
result: skip
set: kms_vblank
pipe-H-wait-idle:
result: skip
set: kms_vblank
pipe-H-wait-idle-hang:
result: skip
set: kms_vblank
plane-cursor-legacy:
result: skip
set: kms_atomic
plane-immutable-zpos:
result: skip
set: kms_atomic
plane-invalid-params:
result: skip
set: kms_atomic
plane-invalid-params-fence:
result: skip
set: kms_atomic
plane-overlay-legacy:
result: skip
set: kms_atomic
plane-primary-legacy:
result: skip
set: kms_atomic
plane-primary-overlay-mutable-zpos:
result: skip
set: kms_atomic
short-buffer-block:
result: skip
set: drm_read
short-buffer-nonblock:
result: skip
set: drm_read
short-buffer-wakeup:
result: skip
set: drm_read
size-max:
result: skip
set: kms_addfb_basic
small-bo:
result: skip
set: kms_addfb_basic
test-only:
result: skip
set: kms_atomic
tile-pitch-mismatch:
result: skip
set: kms_addfb_basic
too-high:
result: skip
set: kms_addfb_basic
too-wide:
result: skip
set: kms_addfb_basic
unused-handle:
result: pass
set: kms_addfb_basic
unused-modifier:
result: pass
set: kms_addfb_basic
unused-offsets:
result: pass
set: kms_addfb_basic
unused-pitches:
result: pass
set: kms_addfb_basic
13956 10:03:49.235906 end: 3.1 lava-test-shell (duration 00:00:14) [common]
13957 10:03:49.236025 end: 3 lava-test-retry (duration 00:00:14) [common]
13958 10:03:49.236142 start: 4 finalize (timeout 00:07:46) [common]
13959 10:03:49.236258 start: 4.1 power-off (timeout 00:00:30) [common]
13960 10:03:49.236534 Calling: 'pduclient' '--daemon=localhost' '--hostname=mt8192-asurada-spherion-r0-cbg-0' '--port=1' '--command=off'
13961 10:03:49.314443 >> Command sent successfully.
13962 10:03:49.317092 Returned 0 in 0 seconds
13963 10:03:49.417489 end: 4.1 power-off (duration 00:00:00) [common]
13965 10:03:49.417835 start: 4.2 read-feedback (timeout 00:07:46) [common]
13966 10:03:49.418115 Listened to connection for namespace 'common' for up to 1s
13967 10:03:50.419028 Finalising connection for namespace 'common'
13968 10:03:50.419188 Disconnecting from shell: Finalise
13969 10:03:50.419282 / #
13970 10:03:50.519842 end: 4.2 read-feedback (duration 00:00:01) [common]
13971 10:03:50.520452 end: 4 finalize (duration 00:00:01) [common]
13972 10:03:50.521175 Cleaning after the job
13973 10:03:50.521657 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10670673/tftp-deploy-cw7483qk/ramdisk
13974 10:03:50.546906 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10670673/tftp-deploy-cw7483qk/kernel
13975 10:03:50.560079 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10670673/tftp-deploy-cw7483qk/dtb
13976 10:03:50.560396 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10670673/tftp-deploy-cw7483qk/modules
13977 10:03:50.568734 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10670673
13978 10:03:50.666866 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10670673
13979 10:03:50.667044 Job finished correctly